drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <netinet/in.h>
   7 #include <sys/queue.h>
   8 #include <stdalign.h>
   9 #include <stdint.h>
  10 #include <string.h>
  11 #include <stdbool.h>
  12
  13 #include <rte_common.h>
  14 #include <rte_ether.h>
  15 #include <ethdev_driver.h>
  16 #include <rte_eal_paging.h>
  17 #include <rte_flow.h>
  18 #include <rte_cycles.h>
  19 #include <rte_flow_driver.h>
  20 #include <rte_malloc.h>
  21 #include <rte_ip.h>
  22
  23 #include <mlx5_glue.h>
  24 #include <mlx5_devx_cmds.h>
  25 #include <mlx5_prm.h>
  26 #include <mlx5_malloc.h>
  27
  28 #include "mlx5_defs.h"
  29 #include "mlx5.h"
  30 #include "mlx5_flow.h"
  31 #include "mlx5_flow_os.h"
  32 #include "mlx5_rxtx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              struct tunnel_default_miss_ctx *ctx,
  54                              struct rte_flow_error *error);
  55 static struct mlx5_flow_tunnel *
  56 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  57 static void
  58 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  59 static uint32_t
  60 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  61                                 const struct mlx5_flow_tunnel *tunnel,
  62                                 uint32_t group, uint32_t *table,
  63                                 struct rte_flow_error *error);
  64
  65 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  66 static void mlx5_flow_pop_thread_workspace(void);
  67
  68
  69 /** Device flow drivers. */
  70 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  71
  72 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  73
  74 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  75         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  76 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  77         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  78 #endif
  79         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  80         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  81 };
  82
  83 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  84 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  85         (const int []){ \
  86                 __VA_ARGS__, 0, \
  87         }
  88
  89 /** Node object of input graph for mlx5_flow_expand_rss(). */
  90 struct mlx5_flow_expand_node {
  91         const int *const next;
  92         /**<
  93          * List of next node indexes. Index 0 is interpreted as a terminator.
  94          */
  95         const enum rte_flow_item_type type;
  96         /**< Pattern item type of current node. */
  97         uint64_t rss_types;
  98         /**<
  99          * RSS types bit-field associated with this node
 100          * (see ETH_RSS_* definitions).
 101          */
 102 };
 103
 104 /** Object returned by mlx5_flow_expand_rss(). */
 105 struct mlx5_flow_expand_rss {
 106         uint32_t entries;
 107         /**< Number of entries @p patterns and @p priorities. */
 108         struct {
 109                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 110                 uint32_t priority; /**< Priority offset for each expansion. */
 111         } entry[];
 112 };
 113
 114 static enum rte_flow_item_type
 115 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 116 {
 117         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 118         uint16_t ether_type = 0;
 119         uint16_t ether_type_m;
 120         uint8_t ip_next_proto = 0;
 121         uint8_t ip_next_proto_m;
 122
 123         if (item == NULL || item->spec == NULL)
 124                 return ret;
 125         switch (item->type) {
 126         case RTE_FLOW_ITEM_TYPE_ETH:
 127                 if (item->mask)
 128                         ether_type_m = ((const struct rte_flow_item_eth *)
 129                                                 (item->mask))->type;
 130                 else
 131                         ether_type_m = rte_flow_item_eth_mask.type;
 132                 if (ether_type_m != RTE_BE16(0xFFFF))
 133                         break;
 134                 ether_type = ((const struct rte_flow_item_eth *)
 135                                 (item->spec))->type;
 136                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 137                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 138                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 139                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 140                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 141                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 142                 else
 143                         ret = RTE_FLOW_ITEM_TYPE_END;
 144                 break;
 145         case RTE_FLOW_ITEM_TYPE_VLAN:
 146                 if (item->mask)
 147                         ether_type_m = ((const struct rte_flow_item_vlan *)
 148                                                 (item->mask))->inner_type;
 149                 else
 150                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 151                 if (ether_type_m != RTE_BE16(0xFFFF))
 152                         break;
 153                 ether_type = ((const struct rte_flow_item_vlan *)
 154                                 (item->spec))->inner_type;
 155                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 156                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 157                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 158                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 159                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 160                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 161                 else
 162                         ret = RTE_FLOW_ITEM_TYPE_END;
 163                 break;
 164         case RTE_FLOW_ITEM_TYPE_IPV4:
 165                 if (item->mask)
 166                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 167                                         (item->mask))->hdr.next_proto_id;
 168                 else
 169                         ip_next_proto_m =
 170                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 171                 if (ip_next_proto_m != 0xFF)
 172                         break;
 173                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 174                                 (item->spec))->hdr.next_proto_id;
 175                 if (ip_next_proto == IPPROTO_UDP)
 176                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 177                 else if (ip_next_proto == IPPROTO_TCP)
 178                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 179                 else if (ip_next_proto == IPPROTO_IP)
 180                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 181                 else if (ip_next_proto == IPPROTO_IPV6)
 182                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 183                 else
 184                         ret = RTE_FLOW_ITEM_TYPE_END;
 185                 break;
 186         case RTE_FLOW_ITEM_TYPE_IPV6:
 187                 if (item->mask)
 188                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 189                                                 (item->mask))->hdr.proto;
 190                 else
 191                         ip_next_proto_m =
 192                                 rte_flow_item_ipv6_mask.hdr.proto;
 193                 if (ip_next_proto_m != 0xFF)
 194                         break;
 195                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 196                                 (item->spec))->hdr.proto;
 197                 if (ip_next_proto == IPPROTO_UDP)
 198                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 199                 else if (ip_next_proto == IPPROTO_TCP)
 200                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 201                 else if (ip_next_proto == IPPROTO_IP)
 202                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 203                 else if (ip_next_proto == IPPROTO_IPV6)
 204                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 205                 else
 206                         ret = RTE_FLOW_ITEM_TYPE_END;
 207                 break;
 208         default:
 209                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 210                 break;
 211         }
 212         return ret;
 213 }
 214
 215 #define MLX5_RSS_EXP_ELT_N 8
 216
 217 /**
 218  * Expand RSS flows into several possible flows according to the RSS hash
 219  * fields requested and the driver capabilities.
 220  *
 221  * @param[out] buf
 222  *   Buffer to store the result expansion.
 223  * @param[in] size
 224  *   Buffer size in bytes. If 0, @p buf can be NULL.
 225  * @param[in] pattern
 226  *   User flow pattern.
 227  * @param[in] types
 228  *   RSS types to expand (see ETH_RSS_* definitions).
 229  * @param[in] graph
 230  *   Input graph to expand @p pattern according to @p types.
 231  * @param[in] graph_root_index
 232  *   Index of root node in @p graph, typically 0.
 233  *
 234  * @return
 235  *   A positive value representing the size of @p buf in bytes regardless of
 236  *   @p size on success, a negative errno value otherwise and rte_errno is
 237  *   set, the following errors are defined:
 238  *
 239  *   -E2BIG: graph-depth @p graph is too deep.
 240  */
 241 static int
 242 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 243                      const struct rte_flow_item *pattern, uint64_t types,
 244                      const struct mlx5_flow_expand_node graph[],
 245                      int graph_root_index)
 246 {
 247         const struct rte_flow_item *item;
 248         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 249         const int *next_node;
 250         const int *stack[MLX5_RSS_EXP_ELT_N];
 251         int stack_pos = 0;
 252         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 253         unsigned int i;
 254         size_t lsize;
 255         size_t user_pattern_size = 0;
 256         void *addr = NULL;
 257         const struct mlx5_flow_expand_node *next = NULL;
 258         struct rte_flow_item missed_item;
 259         int missed = 0;
 260         int elt = 0;
 261         const struct rte_flow_item *last_item = NULL;
 262
 263         memset(&missed_item, 0, sizeof(missed_item));
 264         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 265                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 266         if (lsize <= size) {
 267                 buf->entry[0].priority = 0;
 268                 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 269                 buf->entries = 0;
 270                 addr = buf->entry[0].pattern;
 271         }
 272         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 273                 if (item->type != RTE_FLOW_ITEM_TYPE_VOID)
 274                         last_item = item;
 275                 for (i = 0; node->next && node->next[i]; ++i) {
 276                         next = &graph[node->next[i]];
 277                         if (next->type == item->type)
 278                                 break;
 279                 }
 280                 if (next)
 281                         node = next;
 282                 user_pattern_size += sizeof(*item);
 283         }
 284         user_pattern_size += sizeof(*item); /* Handle END item. */
 285         lsize += user_pattern_size;
 286         /* Copy the user pattern in the first entry of the buffer. */
 287         if (lsize <= size) {
 288                 rte_memcpy(addr, pattern, user_pattern_size);
 289                 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 290                 buf->entries = 1;
 291         }
 292         /* Start expanding. */
 293         memset(flow_items, 0, sizeof(flow_items));
 294         user_pattern_size -= sizeof(*item);
 295         /*
 296          * Check if the last valid item has spec set, need complete pattern,
 297          * and the pattern can be used for expansion.
 298          */
 299         missed_item.type = mlx5_flow_expand_rss_item_complete(last_item);
 300         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 301                 /* Item type END indicates expansion is not required. */
 302                 return lsize;
 303         }
 304         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 305                 next = NULL;
 306                 missed = 1;
 307                 for (i = 0; node->next && node->next[i]; ++i) {
 308                         next = &graph[node->next[i]];
 309                         if (next->type == missed_item.type) {
 310                                 flow_items[0].type = missed_item.type;
 311                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 312                                 break;
 313                         }
 314                         next = NULL;
 315                 }
 316         }
 317         if (next && missed) {
 318                 elt = 2; /* missed item + item end. */
 319                 node = next;
 320                 lsize += elt * sizeof(*item) + user_pattern_size;
 321                 if ((node->rss_types & types) && lsize <= size) {
 322                         buf->entry[buf->entries].priority = 1;
 323                         buf->entry[buf->entries].pattern = addr;
 324                         buf->entries++;
 325                         rte_memcpy(addr, buf->entry[0].pattern,
 326                                    user_pattern_size);
 327                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 328                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 329                         addr = (void *)(((uintptr_t)addr) +
 330                                         elt * sizeof(*item));
 331                 }
 332         }
 333         memset(flow_items, 0, sizeof(flow_items));
 334         next_node = node->next;
 335         stack[stack_pos] = next_node;
 336         node = next_node ? &graph[*next_node] : NULL;
 337         while (node) {
 338                 flow_items[stack_pos].type = node->type;
 339                 if (node->rss_types & types) {
 340                         /*
 341                          * compute the number of items to copy from the
 342                          * expansion and copy it.
 343                          * When the stack_pos is 0, there are 1 element in it,
 344                          * plus the addition END item.
 345                          */
 346                         elt = stack_pos + 2;
 347                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 348                         lsize += elt * sizeof(*item) + user_pattern_size;
 349                         if (lsize <= size) {
 350                                 size_t n = elt * sizeof(*item);
 351
 352                                 buf->entry[buf->entries].priority =
 353                                         stack_pos + 1 + missed;
 354                                 buf->entry[buf->entries].pattern = addr;
 355                                 buf->entries++;
 356                                 rte_memcpy(addr, buf->entry[0].pattern,
 357                                            user_pattern_size);
 358                                 addr = (void *)(((uintptr_t)addr) +
 359                                                 user_pattern_size);
 360                                 rte_memcpy(addr, &missed_item,
 361                                            missed * sizeof(*item));
 362                                 addr = (void *)(((uintptr_t)addr) +
 363                                         missed * sizeof(*item));
 364                                 rte_memcpy(addr, flow_items, n);
 365                                 addr = (void *)(((uintptr_t)addr) + n);
 366                         }
 367                 }
 368                 /* Go deeper. */
 369                 if (node->next) {
 370                         next_node = node->next;
 371                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 372                                 rte_errno = E2BIG;
 373                                 return -rte_errno;
 374                         }
 375                         stack[stack_pos] = next_node;
 376                 } else if (*(next_node + 1)) {
 377                         /* Follow up with the next possibility. */
 378                         ++next_node;
 379                 } else {
 380                         /* Move to the next path. */
 381                         if (stack_pos)
 382                                 next_node = stack[--stack_pos];
 383                         next_node++;
 384                         stack[stack_pos] = next_node;
 385                 }
 386                 node = *next_node ? &graph[*next_node] : NULL;
 387         };
 388         /* no expanded flows but we have missed item, create one rule for it */
 389         if (buf->entries == 1 && missed != 0) {
 390                 elt = 2;
 391                 lsize += elt * sizeof(*item) + user_pattern_size;
 392                 if (lsize <= size) {
 393                         buf->entry[buf->entries].priority = 1;
 394                         buf->entry[buf->entries].pattern = addr;
 395                         buf->entries++;
 396                         flow_items[0].type = missed_item.type;
 397                         flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 398                         rte_memcpy(addr, buf->entry[0].pattern,
 399                                    user_pattern_size);
 400                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 401                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 402                 }
 403         }
 404         return lsize;
 405 }
 406
 407 enum mlx5_expansion {
 408         MLX5_EXPANSION_ROOT,
 409         MLX5_EXPANSION_ROOT_OUTER,
 410         MLX5_EXPANSION_ROOT_ETH_VLAN,
 411         MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
 412         MLX5_EXPANSION_OUTER_ETH,
 413         MLX5_EXPANSION_OUTER_ETH_VLAN,
 414         MLX5_EXPANSION_OUTER_VLAN,
 415         MLX5_EXPANSION_OUTER_IPV4,
 416         MLX5_EXPANSION_OUTER_IPV4_UDP,
 417         MLX5_EXPANSION_OUTER_IPV4_TCP,
 418         MLX5_EXPANSION_OUTER_IPV6,
 419         MLX5_EXPANSION_OUTER_IPV6_UDP,
 420         MLX5_EXPANSION_OUTER_IPV6_TCP,
 421         MLX5_EXPANSION_VXLAN,
 422         MLX5_EXPANSION_VXLAN_GPE,
 423         MLX5_EXPANSION_GRE,
 424         MLX5_EXPANSION_MPLS,
 425         MLX5_EXPANSION_ETH,
 426         MLX5_EXPANSION_ETH_VLAN,
 427         MLX5_EXPANSION_VLAN,
 428         MLX5_EXPANSION_IPV4,
 429         MLX5_EXPANSION_IPV4_UDP,
 430         MLX5_EXPANSION_IPV4_TCP,
 431         MLX5_EXPANSION_IPV6,
 432         MLX5_EXPANSION_IPV6_UDP,
 433         MLX5_EXPANSION_IPV6_TCP,
 434 };
 435
 436 /** Supported expansion of items. */
 437 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 438         [MLX5_EXPANSION_ROOT] = {
 439                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 440                                                   MLX5_EXPANSION_IPV4,
 441                                                   MLX5_EXPANSION_IPV6),
 442                 .type = RTE_FLOW_ITEM_TYPE_END,
 443         },
 444         [MLX5_EXPANSION_ROOT_OUTER] = {
 445                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 446                                                   MLX5_EXPANSION_OUTER_IPV4,
 447                                                   MLX5_EXPANSION_OUTER_IPV6),
 448                 .type = RTE_FLOW_ITEM_TYPE_END,
 449         },
 450         [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
 451                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
 452                 .type = RTE_FLOW_ITEM_TYPE_END,
 453         },
 454         [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
 455                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 456                                                 (MLX5_EXPANSION_OUTER_ETH_VLAN),
 457                 .type = RTE_FLOW_ITEM_TYPE_END,
 458         },
 459         [MLX5_EXPANSION_OUTER_ETH] = {
 460                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 461                                                   MLX5_EXPANSION_OUTER_IPV6,
 462                                                   MLX5_EXPANSION_MPLS),
 463                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 464                 .rss_types = 0,
 465         },
 466         [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
 467                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 468                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 469                 .rss_types = 0,
 470         },
 471         [MLX5_EXPANSION_OUTER_VLAN] = {
 472                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 473                                                   MLX5_EXPANSION_OUTER_IPV6),
 474                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 475         },
 476         [MLX5_EXPANSION_OUTER_IPV4] = {
 477                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 478                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 479                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 480                          MLX5_EXPANSION_GRE,
 481                          MLX5_EXPANSION_IPV4,
 482                          MLX5_EXPANSION_IPV6),
 483                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 484                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 485                         ETH_RSS_NONFRAG_IPV4_OTHER,
 486         },
 487         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 488                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 489                                                   MLX5_EXPANSION_VXLAN_GPE),
 490                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 491                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 492         },
 493         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 494                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 495                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 496         },
 497         [MLX5_EXPANSION_OUTER_IPV6] = {
 498                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 499                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 500                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 501                          MLX5_EXPANSION_IPV4,
 502                          MLX5_EXPANSION_IPV6),
 503                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 504                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 505                         ETH_RSS_NONFRAG_IPV6_OTHER,
 506         },
 507         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 508                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 509                                                   MLX5_EXPANSION_VXLAN_GPE),
 510                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 511                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 512         },
 513         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 514                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 515                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 516         },
 517         [MLX5_EXPANSION_VXLAN] = {
 518                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 519                                                   MLX5_EXPANSION_IPV4,
 520                                                   MLX5_EXPANSION_IPV6),
 521                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 522         },
 523         [MLX5_EXPANSION_VXLAN_GPE] = {
 524                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 525                                                   MLX5_EXPANSION_IPV4,
 526                                                   MLX5_EXPANSION_IPV6),
 527                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 528         },
 529         [MLX5_EXPANSION_GRE] = {
 530                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
 531                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 532         },
 533         [MLX5_EXPANSION_MPLS] = {
 534                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 535                                                   MLX5_EXPANSION_IPV6),
 536                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 537         },
 538         [MLX5_EXPANSION_ETH] = {
 539                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 540                                                   MLX5_EXPANSION_IPV6),
 541                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 542         },
 543         [MLX5_EXPANSION_ETH_VLAN] = {
 544                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 545                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 546         },
 547         [MLX5_EXPANSION_VLAN] = {
 548                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 549                                                   MLX5_EXPANSION_IPV6),
 550                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 551         },
 552         [MLX5_EXPANSION_IPV4] = {
 553                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 554                                                   MLX5_EXPANSION_IPV4_TCP),
 555                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 556                 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
 557                         ETH_RSS_NONFRAG_IPV4_OTHER,
 558         },
 559         [MLX5_EXPANSION_IPV4_UDP] = {
 560                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 561                 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
 562         },
 563         [MLX5_EXPANSION_IPV4_TCP] = {
 564                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 565                 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
 566         },
 567         [MLX5_EXPANSION_IPV6] = {
 568                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 569                                                   MLX5_EXPANSION_IPV6_TCP),
 570                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 571                 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
 572                         ETH_RSS_NONFRAG_IPV6_OTHER,
 573         },
 574         [MLX5_EXPANSION_IPV6_UDP] = {
 575                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 576                 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
 577         },
 578         [MLX5_EXPANSION_IPV6_TCP] = {
 579                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 580                 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
 581         },
 582 };
 583
 584 static struct rte_flow_shared_action *
 585 mlx5_shared_action_create(struct rte_eth_dev *dev,
 586                           const struct rte_flow_shared_action_conf *conf,
 587                           const struct rte_flow_action *action,
 588                           struct rte_flow_error *error);
 589 static int mlx5_shared_action_destroy
 590                                 (struct rte_eth_dev *dev,
 591                                  struct rte_flow_shared_action *shared_action,
 592                                  struct rte_flow_error *error);
 593 static int mlx5_shared_action_update
 594                                 (struct rte_eth_dev *dev,
 595                                  struct rte_flow_shared_action *shared_action,
 596                                  const struct rte_flow_action *action,
 597                                  struct rte_flow_error *error);
 598 static int mlx5_shared_action_query
 599                                 (struct rte_eth_dev *dev,
 600                                  const struct rte_flow_shared_action *action,
 601                                  void *data,
 602                                  struct rte_flow_error *error);
 603 static int
 604 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 605                     struct rte_flow_tunnel *app_tunnel,
 606                     struct rte_flow_action **actions,
 607                     uint32_t *num_of_actions,
 608                     struct rte_flow_error *error);
 609 static int
 610 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 611                        struct rte_flow_tunnel *app_tunnel,
 612                        struct rte_flow_item **items,
 613                        uint32_t *num_of_items,
 614                        struct rte_flow_error *error);
 615 static int
 616 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 617                               struct rte_flow_item *pmd_items,
 618                               uint32_t num_items, struct rte_flow_error *err);
 619 static int
 620 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 621                                 struct rte_flow_action *pmd_actions,
 622                                 uint32_t num_actions,
 623                                 struct rte_flow_error *err);
 624 static int
 625 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 626                                   struct rte_mbuf *m,
 627                                   struct rte_flow_restore_info *info,
 628                                   struct rte_flow_error *err);
 629
 630 static const struct rte_flow_ops mlx5_flow_ops = {
 631         .validate = mlx5_flow_validate,
 632         .create = mlx5_flow_create,
 633         .destroy = mlx5_flow_destroy,
 634         .flush = mlx5_flow_flush,
 635         .isolate = mlx5_flow_isolate,
 636         .query = mlx5_flow_query,
 637         .dev_dump = mlx5_flow_dev_dump,
 638         .get_aged_flows = mlx5_flow_get_aged_flows,
 639         .shared_action_create = mlx5_shared_action_create,
 640         .shared_action_destroy = mlx5_shared_action_destroy,
 641         .shared_action_update = mlx5_shared_action_update,
 642         .shared_action_query = mlx5_shared_action_query,
 643         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 644         .tunnel_match = mlx5_flow_tunnel_match,
 645         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 646         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 647         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 648 };
 649
 650 /* Tunnel information. */
 651 struct mlx5_flow_tunnel_info {
 652         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 653         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 654 };
 655
 656 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 657         {
 658                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 659                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 660         },
 661         {
 662                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 663                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 664         },
 665         {
 666                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 667                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 668         },
 669         {
 670                 .tunnel = MLX5_FLOW_LAYER_GRE,
 671                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 672         },
 673         {
 674                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 675                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 676         },
 677         {
 678                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 679                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 680         },
 681         {
 682                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 683                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 684         },
 685         {
 686                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 687                 .ptype = RTE_PTYPE_TUNNEL_IP,
 688         },
 689         {
 690                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 691                 .ptype = RTE_PTYPE_TUNNEL_IP,
 692         },
 693         {
 694                 .tunnel = MLX5_FLOW_LAYER_GTP,
 695                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 696         },
 697 };
 698
 699
 700
 701 /**
 702  * Translate tag ID to register.
 703  *
 704  * @param[in] dev
 705  *   Pointer to the Ethernet device structure.
 706  * @param[in] feature
 707  *   The feature that request the register.
 708  * @param[in] id
 709  *   The request register ID.
 710  * @param[out] error
 711  *   Error description in case of any.
 712  *
 713  * @return
 714  *   The request register on success, a negative errno
 715  *   value otherwise and rte_errno is set.
 716  */
 717 int
 718 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 719                      enum mlx5_feature_name feature,
 720                      uint32_t id,
 721                      struct rte_flow_error *error)
 722 {
 723         struct mlx5_priv *priv = dev->data->dev_private;
 724         struct mlx5_dev_config *config = &priv->config;
 725         enum modify_reg start_reg;
 726         bool skip_mtr_reg = false;
 727
 728         switch (feature) {
 729         case MLX5_HAIRPIN_RX:
 730                 return REG_B;
 731         case MLX5_HAIRPIN_TX:
 732                 return REG_A;
 733         case MLX5_METADATA_RX:
 734                 switch (config->dv_xmeta_en) {
 735                 case MLX5_XMETA_MODE_LEGACY:
 736                         return REG_B;
 737                 case MLX5_XMETA_MODE_META16:
 738                         return REG_C_0;
 739                 case MLX5_XMETA_MODE_META32:
 740                         return REG_C_1;
 741                 }
 742                 break;
 743         case MLX5_METADATA_TX:
 744                 return REG_A;
 745         case MLX5_METADATA_FDB:
 746                 switch (config->dv_xmeta_en) {
 747                 case MLX5_XMETA_MODE_LEGACY:
 748                         return REG_NON;
 749                 case MLX5_XMETA_MODE_META16:
 750                         return REG_C_0;
 751                 case MLX5_XMETA_MODE_META32:
 752                         return REG_C_1;
 753                 }
 754                 break;
 755         case MLX5_FLOW_MARK:
 756                 switch (config->dv_xmeta_en) {
 757                 case MLX5_XMETA_MODE_LEGACY:
 758                         return REG_NON;
 759                 case MLX5_XMETA_MODE_META16:
 760                         return REG_C_1;
 761                 case MLX5_XMETA_MODE_META32:
 762                         return REG_C_0;
 763                 }
 764                 break;
 765         case MLX5_MTR_SFX:
 766                 /*
 767                  * If meter color and flow match share one register, flow match
 768                  * should use the meter color register for match.
 769                  */
 770                 if (priv->mtr_reg_share)
 771                         return priv->mtr_color_reg;
 772                 else
 773                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 774                                REG_C_3;
 775         case MLX5_MTR_COLOR:
 776         case MLX5_ASO_FLOW_HIT: /* Both features use the same REG_C. */
 777                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 778                 return priv->mtr_color_reg;
 779         case MLX5_COPY_MARK:
 780                 /*
 781                  * Metadata COPY_MARK register using is in meter suffix sub
 782                  * flow while with meter. It's safe to share the same register.
 783                  */
 784                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 785         case MLX5_APP_TAG:
 786                 /*
 787                  * If meter is enable, it will engage the register for color
 788                  * match and flow match. If meter color match is not using the
 789                  * REG_C_2, need to skip the REG_C_x be used by meter color
 790                  * match.
 791                  * If meter is disable, free to use all available registers.
 792                  */
 793                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 794                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 795                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 796                 if (id > (uint32_t)(REG_C_7 - start_reg))
 797                         return rte_flow_error_set(error, EINVAL,
 798                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 799                                                   NULL, "invalid tag id");
 800                 if (config->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 801                         return rte_flow_error_set(error, ENOTSUP,
 802                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 803                                                   NULL, "unsupported tag id");
 804                 /*
 805                  * This case means meter is using the REG_C_x great than 2.
 806                  * Take care not to conflict with meter color REG_C_x.
 807                  * If the available index REG_C_y >= REG_C_x, skip the
 808                  * color register.
 809                  */
 810                 if (skip_mtr_reg && config->flow_mreg_c
 811                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 812                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 813                                 return rte_flow_error_set(error, EINVAL,
 814                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 815                                                         NULL, "invalid tag id");
 816                         if (config->flow_mreg_c
 817                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 818                                 return config->flow_mreg_c
 819                                                [id + 1 + start_reg - REG_C_0];
 820                         return rte_flow_error_set(error, ENOTSUP,
 821                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 822                                                   NULL, "unsupported tag id");
 823                 }
 824                 return config->flow_mreg_c[id + start_reg - REG_C_0];
 825         }
 826         MLX5_ASSERT(false);
 827         return rte_flow_error_set(error, EINVAL,
 828                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 829                                   NULL, "invalid feature name");
 830 }
 831
 832 /**
 833  * Check extensive flow metadata register support.
 834  *
 835  * @param dev
 836  *   Pointer to rte_eth_dev structure.
 837  *
 838  * @return
 839  *   True if device supports extensive flow metadata register, otherwise false.
 840  */
 841 bool
 842 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 843 {
 844         struct mlx5_priv *priv = dev->data->dev_private;
 845         struct mlx5_dev_config *config = &priv->config;
 846
 847         /*
 848          * Having available reg_c can be regarded inclusively as supporting
 849          * extensive flow metadata register, which could mean,
 850          * - metadata register copy action by modify header.
 851          * - 16 modify header actions is supported.
 852          * - reg_c's are preserved across different domain (FDB and NIC) on
 853          *   packet loopback by flow lookup miss.
 854          */
 855         return config->flow_mreg_c[2] != REG_NON;
 856 }
 857
 858 /**
 859  * Verify the @p item specifications (spec, last, mask) are compatible with the
 860  * NIC capabilities.
 861  *
 862  * @param[in] item
 863  *   Item specification.
 864  * @param[in] mask
 865  *   @p item->mask or flow default bit-masks.
 866  * @param[in] nic_mask
 867  *   Bit-masks covering supported fields by the NIC to compare with user mask.
 868  * @param[in] size
 869  *   Bit-masks size in bytes.
 870  * @param[in] range_accepted
 871  *   True if range of values is accepted for specific fields, false otherwise.
 872  * @param[out] error
 873  *   Pointer to error structure.
 874  *
 875  * @return
 876  *   0 on success, a negative errno value otherwise and rte_errno is set.
 877  */
 878 int
 879 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
 880                           const uint8_t *mask,
 881                           const uint8_t *nic_mask,
 882                           unsigned int size,
 883                           bool range_accepted,
 884                           struct rte_flow_error *error)
 885 {
 886         unsigned int i;
 887
 888         MLX5_ASSERT(nic_mask);
 889         for (i = 0; i < size; ++i)
 890                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
 891                         return rte_flow_error_set(error, ENOTSUP,
 892                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 893                                                   item,
 894                                                   "mask enables non supported"
 895                                                   " bits");
 896         if (!item->spec && (item->mask || item->last))
 897                 return rte_flow_error_set(error, EINVAL,
 898                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
 899                                           "mask/last without a spec is not"
 900                                           " supported");
 901         if (item->spec && item->last && !range_accepted) {
 902                 uint8_t spec[size];
 903                 uint8_t last[size];
 904                 unsigned int i;
 905                 int ret;
 906
 907                 for (i = 0; i < size; ++i) {
 908                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
 909                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
 910                 }
 911                 ret = memcmp(spec, last, size);
 912                 if (ret != 0)
 913                         return rte_flow_error_set(error, EINVAL,
 914                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 915                                                   item,
 916                                                   "range is not valid");
 917         }
 918         return 0;
 919 }
 920
 921 /**
 922  * Adjust the hash fields according to the @p flow information.
 923  *
 924  * @param[in] dev_flow.
 925  *   Pointer to the mlx5_flow.
 926  * @param[in] tunnel
 927  *   1 when the hash field is for a tunnel item.
 928  * @param[in] layer_types
 929  *   ETH_RSS_* types.
 930  * @param[in] hash_fields
 931  *   Item hash fields.
 932  *
 933  * @return
 934  *   The hash fields that should be used.
 935  */
 936 uint64_t
 937 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
 938                             int tunnel __rte_unused, uint64_t layer_types,
 939                             uint64_t hash_fields)
 940 {
 941 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
 942         int rss_request_inner = rss_desc->level >= 2;
 943
 944         /* Check RSS hash level for tunnel. */
 945         if (tunnel && rss_request_inner)
 946                 hash_fields |= IBV_RX_HASH_INNER;
 947         else if (tunnel || rss_request_inner)
 948                 return 0;
 949 #endif
 950         /* Check if requested layer matches RSS hash fields. */
 951         if (!(rss_desc->types & layer_types))
 952                 return 0;
 953         return hash_fields;
 954 }
 955
 956 /**
 957  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
 958  * if several tunnel rules are used on this queue, the tunnel ptype will be
 959  * cleared.
 960  *
 961  * @param rxq_ctrl
 962  *   Rx queue to update.
 963  */
 964 static void
 965 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
 966 {
 967         unsigned int i;
 968         uint32_t tunnel_ptype = 0;
 969
 970         /* Look up for the ptype to use. */
 971         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
 972                 if (!rxq_ctrl->flow_tunnels_n[i])
 973                         continue;
 974                 if (!tunnel_ptype) {
 975                         tunnel_ptype = tunnels_info[i].ptype;
 976                 } else {
 977                         tunnel_ptype = 0;
 978                         break;
 979                 }
 980         }
 981         rxq_ctrl->rxq.tunnel = tunnel_ptype;
 982 }
 983
 984 /**
 985  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
 986  * flow.
 987  *
 988  * @param[in] dev
 989  *   Pointer to the Ethernet device structure.
 990  * @param[in] dev_handle
 991  *   Pointer to device flow handle structure.
 992  */
 993 static void
 994 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
 995                        struct mlx5_flow_handle *dev_handle)
 996 {
 997         struct mlx5_priv *priv = dev->data->dev_private;
 998         const int mark = dev_handle->mark;
 999         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1000         struct mlx5_ind_table_obj *ind_tbl = NULL;
1001         unsigned int i;
1002
1003         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1004                 struct mlx5_hrxq *hrxq;
1005
1006                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1007                               dev_handle->rix_hrxq);
1008                 if (hrxq)
1009                         ind_tbl = hrxq->ind_table;
1010         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1011                 struct mlx5_shared_action_rss *shared_rss;
1012
1013                 shared_rss = mlx5_ipool_get
1014                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1015                          dev_handle->rix_srss);
1016                 if (shared_rss)
1017                         ind_tbl = shared_rss->ind_tbl;
1018         }
1019         if (!ind_tbl)
1020                 return;
1021         for (i = 0; i != ind_tbl->queues_n; ++i) {
1022                 int idx = ind_tbl->queues[i];
1023                 struct mlx5_rxq_ctrl *rxq_ctrl =
1024                         container_of((*priv->rxqs)[idx],
1025                                      struct mlx5_rxq_ctrl, rxq);
1026
1027                 /*
1028                  * To support metadata register copy on Tx loopback,
1029                  * this must be always enabled (metadata may arive
1030                  * from other port - not from local flows only.
1031                  */
1032                 if (priv->config.dv_flow_en &&
1033                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1034                     mlx5_flow_ext_mreg_supported(dev)) {
1035                         rxq_ctrl->rxq.mark = 1;
1036                         rxq_ctrl->flow_mark_n = 1;
1037                 } else if (mark) {
1038                         rxq_ctrl->rxq.mark = 1;
1039                         rxq_ctrl->flow_mark_n++;
1040                 }
1041                 if (tunnel) {
1042                         unsigned int j;
1043
1044                         /* Increase the counter matching the flow. */
1045                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1046                                 if ((tunnels_info[j].tunnel &
1047                                      dev_handle->layers) ==
1048                                     tunnels_info[j].tunnel) {
1049                                         rxq_ctrl->flow_tunnels_n[j]++;
1050                                         break;
1051                                 }
1052                         }
1053                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1054                 }
1055         }
1056 }
1057
1058 /**
1059  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1060  *
1061  * @param[in] dev
1062  *   Pointer to the Ethernet device structure.
1063  * @param[in] flow
1064  *   Pointer to flow structure.
1065  */
1066 static void
1067 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1068 {
1069         struct mlx5_priv *priv = dev->data->dev_private;
1070         uint32_t handle_idx;
1071         struct mlx5_flow_handle *dev_handle;
1072
1073         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1074                        handle_idx, dev_handle, next)
1075                 flow_drv_rxq_flags_set(dev, dev_handle);
1076 }
1077
1078 /**
1079  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1080  * device flow if no other flow uses it with the same kind of request.
1081  *
1082  * @param dev
1083  *   Pointer to Ethernet device.
1084  * @param[in] dev_handle
1085  *   Pointer to the device flow handle structure.
1086  */
1087 static void
1088 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1089                         struct mlx5_flow_handle *dev_handle)
1090 {
1091         struct mlx5_priv *priv = dev->data->dev_private;
1092         const int mark = dev_handle->mark;
1093         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1094         struct mlx5_ind_table_obj *ind_tbl = NULL;
1095         unsigned int i;
1096
1097         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1098                 struct mlx5_hrxq *hrxq;
1099
1100                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1101                               dev_handle->rix_hrxq);
1102                 if (hrxq)
1103                         ind_tbl = hrxq->ind_table;
1104         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1105                 struct mlx5_shared_action_rss *shared_rss;
1106
1107                 shared_rss = mlx5_ipool_get
1108                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1109                          dev_handle->rix_srss);
1110                 if (shared_rss)
1111                         ind_tbl = shared_rss->ind_tbl;
1112         }
1113         if (!ind_tbl)
1114                 return;
1115         MLX5_ASSERT(dev->data->dev_started);
1116         for (i = 0; i != ind_tbl->queues_n; ++i) {
1117                 int idx = ind_tbl->queues[i];
1118                 struct mlx5_rxq_ctrl *rxq_ctrl =
1119                         container_of((*priv->rxqs)[idx],
1120                                      struct mlx5_rxq_ctrl, rxq);
1121
1122                 if (priv->config.dv_flow_en &&
1123                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1124                     mlx5_flow_ext_mreg_supported(dev)) {
1125                         rxq_ctrl->rxq.mark = 1;
1126                         rxq_ctrl->flow_mark_n = 1;
1127                 } else if (mark) {
1128                         rxq_ctrl->flow_mark_n--;
1129                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1130                 }
1131                 if (tunnel) {
1132                         unsigned int j;
1133
1134                         /* Decrease the counter matching the flow. */
1135                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1136                                 if ((tunnels_info[j].tunnel &
1137                                      dev_handle->layers) ==
1138                                     tunnels_info[j].tunnel) {
1139                                         rxq_ctrl->flow_tunnels_n[j]--;
1140                                         break;
1141                                 }
1142                         }
1143                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1144                 }
1145         }
1146 }
1147
1148 /**
1149  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1150  * @p flow if no other flow uses it with the same kind of request.
1151  *
1152  * @param dev
1153  *   Pointer to Ethernet device.
1154  * @param[in] flow
1155  *   Pointer to the flow.
1156  */
1157 static void
1158 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1159 {
1160         struct mlx5_priv *priv = dev->data->dev_private;
1161         uint32_t handle_idx;
1162         struct mlx5_flow_handle *dev_handle;
1163
1164         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1165                        handle_idx, dev_handle, next)
1166                 flow_drv_rxq_flags_trim(dev, dev_handle);
1167 }
1168
1169 /**
1170  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1171  *
1172  * @param dev
1173  *   Pointer to Ethernet device.
1174  */
1175 static void
1176 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1177 {
1178         struct mlx5_priv *priv = dev->data->dev_private;
1179         unsigned int i;
1180
1181         for (i = 0; i != priv->rxqs_n; ++i) {
1182                 struct mlx5_rxq_ctrl *rxq_ctrl;
1183                 unsigned int j;
1184
1185                 if (!(*priv->rxqs)[i])
1186                         continue;
1187                 rxq_ctrl = container_of((*priv->rxqs)[i],
1188                                         struct mlx5_rxq_ctrl, rxq);
1189                 rxq_ctrl->flow_mark_n = 0;
1190                 rxq_ctrl->rxq.mark = 0;
1191                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1192                         rxq_ctrl->flow_tunnels_n[j] = 0;
1193                 rxq_ctrl->rxq.tunnel = 0;
1194         }
1195 }
1196
1197 /**
1198  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1199  *
1200  * @param[in] dev
1201  *   Pointer to the Ethernet device structure.
1202  */
1203 void
1204 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1205 {
1206         struct mlx5_priv *priv = dev->data->dev_private;
1207         struct mlx5_rxq_data *data;
1208         unsigned int i;
1209
1210         for (i = 0; i != priv->rxqs_n; ++i) {
1211                 if (!(*priv->rxqs)[i])
1212                         continue;
1213                 data = (*priv->rxqs)[i];
1214                 if (!rte_flow_dynf_metadata_avail()) {
1215                         data->dynf_meta = 0;
1216                         data->flow_meta_mask = 0;
1217                         data->flow_meta_offset = -1;
1218                 } else {
1219                         data->dynf_meta = 1;
1220                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1221                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1222                 }
1223         }
1224 }
1225
1226 /*
1227  * return a pointer to the desired action in the list of actions.
1228  *
1229  * @param[in] actions
1230  *   The list of actions to search the action in.
1231  * @param[in] action
1232  *   The action to find.
1233  *
1234  * @return
1235  *   Pointer to the action in the list, if found. NULL otherwise.
1236  */
1237 const struct rte_flow_action *
1238 mlx5_flow_find_action(const struct rte_flow_action *actions,
1239                       enum rte_flow_action_type action)
1240 {
1241         if (actions == NULL)
1242                 return NULL;
1243         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1244                 if (actions->type == action)
1245                         return actions;
1246         return NULL;
1247 }
1248
1249 /*
1250  * Validate the flag action.
1251  *
1252  * @param[in] action_flags
1253  *   Bit-fields that holds the actions detected until now.
1254  * @param[in] attr
1255  *   Attributes of flow that includes this action.
1256  * @param[out] error
1257  *   Pointer to error structure.
1258  *
1259  * @return
1260  *   0 on success, a negative errno value otherwise and rte_errno is set.
1261  */
1262 int
1263 mlx5_flow_validate_action_flag(uint64_t action_flags,
1264                                const struct rte_flow_attr *attr,
1265                                struct rte_flow_error *error)
1266 {
1267         if (action_flags & MLX5_FLOW_ACTION_MARK)
1268                 return rte_flow_error_set(error, EINVAL,
1269                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1270                                           "can't mark and flag in same flow");
1271         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1272                 return rte_flow_error_set(error, EINVAL,
1273                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1274                                           "can't have 2 flag"
1275                                           " actions in same flow");
1276         if (attr->egress)
1277                 return rte_flow_error_set(error, ENOTSUP,
1278                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1279                                           "flag action not supported for "
1280                                           "egress");
1281         return 0;
1282 }
1283
1284 /*
1285  * Validate the mark action.
1286  *
1287  * @param[in] action
1288  *   Pointer to the queue action.
1289  * @param[in] action_flags
1290  *   Bit-fields that holds the actions detected until now.
1291  * @param[in] attr
1292  *   Attributes of flow that includes this action.
1293  * @param[out] error
1294  *   Pointer to error structure.
1295  *
1296  * @return
1297  *   0 on success, a negative errno value otherwise and rte_errno is set.
1298  */
1299 int
1300 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1301                                uint64_t action_flags,
1302                                const struct rte_flow_attr *attr,
1303                                struct rte_flow_error *error)
1304 {
1305         const struct rte_flow_action_mark *mark = action->conf;
1306
1307         if (!mark)
1308                 return rte_flow_error_set(error, EINVAL,
1309                                           RTE_FLOW_ERROR_TYPE_ACTION,
1310                                           action,
1311                                           "configuration cannot be null");
1312         if (mark->id >= MLX5_FLOW_MARK_MAX)
1313                 return rte_flow_error_set(error, EINVAL,
1314                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1315                                           &mark->id,
1316                                           "mark id must in 0 <= id < "
1317                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1318         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1319                 return rte_flow_error_set(error, EINVAL,
1320                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1321                                           "can't flag and mark in same flow");
1322         if (action_flags & MLX5_FLOW_ACTION_MARK)
1323                 return rte_flow_error_set(error, EINVAL,
1324                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1325                                           "can't have 2 mark actions in same"
1326                                           " flow");
1327         if (attr->egress)
1328                 return rte_flow_error_set(error, ENOTSUP,
1329                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1330                                           "mark action not supported for "
1331                                           "egress");
1332         return 0;
1333 }
1334
1335 /*
1336  * Validate the drop action.
1337  *
1338  * @param[in] action_flags
1339  *   Bit-fields that holds the actions detected until now.
1340  * @param[in] attr
1341  *   Attributes of flow that includes this action.
1342  * @param[out] error
1343  *   Pointer to error structure.
1344  *
1345  * @return
1346  *   0 on success, a negative errno value otherwise and rte_errno is set.
1347  */
1348 int
1349 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1350                                const struct rte_flow_attr *attr,
1351                                struct rte_flow_error *error)
1352 {
1353         if (attr->egress)
1354                 return rte_flow_error_set(error, ENOTSUP,
1355                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1356                                           "drop action not supported for "
1357                                           "egress");
1358         return 0;
1359 }
1360
1361 /*
1362  * Validate the queue action.
1363  *
1364  * @param[in] action
1365  *   Pointer to the queue action.
1366  * @param[in] action_flags
1367  *   Bit-fields that holds the actions detected until now.
1368  * @param[in] dev
1369  *   Pointer to the Ethernet device structure.
1370  * @param[in] attr
1371  *   Attributes of flow that includes this action.
1372  * @param[out] error
1373  *   Pointer to error structure.
1374  *
1375  * @return
1376  *   0 on success, a negative errno value otherwise and rte_errno is set.
1377  */
1378 int
1379 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1380                                 uint64_t action_flags,
1381                                 struct rte_eth_dev *dev,
1382                                 const struct rte_flow_attr *attr,
1383                                 struct rte_flow_error *error)
1384 {
1385         struct mlx5_priv *priv = dev->data->dev_private;
1386         const struct rte_flow_action_queue *queue = action->conf;
1387
1388         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1389                 return rte_flow_error_set(error, EINVAL,
1390                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1391                                           "can't have 2 fate actions in"
1392                                           " same flow");
1393         if (!priv->rxqs_n)
1394                 return rte_flow_error_set(error, EINVAL,
1395                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1396                                           NULL, "No Rx queues configured");
1397         if (queue->index >= priv->rxqs_n)
1398                 return rte_flow_error_set(error, EINVAL,
1399                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1400                                           &queue->index,
1401                                           "queue index out of range");
1402         if (!(*priv->rxqs)[queue->index])
1403                 return rte_flow_error_set(error, EINVAL,
1404                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1405                                           &queue->index,
1406                                           "queue is not configured");
1407         if (attr->egress)
1408                 return rte_flow_error_set(error, ENOTSUP,
1409                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1410                                           "queue action not supported for "
1411                                           "egress");
1412         return 0;
1413 }
1414
1415 /*
1416  * Validate the rss action.
1417  *
1418  * @param[in] dev
1419  *   Pointer to the Ethernet device structure.
1420  * @param[in] action
1421  *   Pointer to the queue action.
1422  * @param[out] error
1423  *   Pointer to error structure.
1424  *
1425  * @return
1426  *   0 on success, a negative errno value otherwise and rte_errno is set.
1427  */
1428 int
1429 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1430                          const struct rte_flow_action *action,
1431                          struct rte_flow_error *error)
1432 {
1433         struct mlx5_priv *priv = dev->data->dev_private;
1434         const struct rte_flow_action_rss *rss = action->conf;
1435         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1436         unsigned int i;
1437
1438         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1439             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1440                 return rte_flow_error_set(error, ENOTSUP,
1441                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1442                                           &rss->func,
1443                                           "RSS hash function not supported");
1444 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1445         if (rss->level > 2)
1446 #else
1447         if (rss->level > 1)
1448 #endif
1449                 return rte_flow_error_set(error, ENOTSUP,
1450                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1451                                           &rss->level,
1452                                           "tunnel RSS is not supported");
1453         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1454         if (rss->key_len == 0 && rss->key != NULL)
1455                 return rte_flow_error_set(error, ENOTSUP,
1456                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1457                                           &rss->key_len,
1458                                           "RSS hash key length 0");
1459         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1460                 return rte_flow_error_set(error, ENOTSUP,
1461                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1462                                           &rss->key_len,
1463                                           "RSS hash key too small");
1464         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1465                 return rte_flow_error_set(error, ENOTSUP,
1466                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1467                                           &rss->key_len,
1468                                           "RSS hash key too large");
1469         if (rss->queue_num > priv->config.ind_table_max_size)
1470                 return rte_flow_error_set(error, ENOTSUP,
1471                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1472                                           &rss->queue_num,
1473                                           "number of queues too large");
1474         if (rss->types & MLX5_RSS_HF_MASK)
1475                 return rte_flow_error_set(error, ENOTSUP,
1476                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1477                                           &rss->types,
1478                                           "some RSS protocols are not"
1479                                           " supported");
1480         if ((rss->types & (ETH_RSS_L3_SRC_ONLY | ETH_RSS_L3_DST_ONLY)) &&
1481             !(rss->types & ETH_RSS_IP))
1482                 return rte_flow_error_set(error, EINVAL,
1483                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1484                                           "L3 partial RSS requested but L3 RSS"
1485                                           " type not specified");
1486         if ((rss->types & (ETH_RSS_L4_SRC_ONLY | ETH_RSS_L4_DST_ONLY)) &&
1487             !(rss->types & (ETH_RSS_UDP | ETH_RSS_TCP)))
1488                 return rte_flow_error_set(error, EINVAL,
1489                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1490                                           "L4 partial RSS requested but L4 RSS"
1491                                           " type not specified");
1492         if (!priv->rxqs_n)
1493                 return rte_flow_error_set(error, EINVAL,
1494                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1495                                           NULL, "No Rx queues configured");
1496         if (!rss->queue_num)
1497                 return rte_flow_error_set(error, EINVAL,
1498                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1499                                           NULL, "No queues configured");
1500         for (i = 0; i != rss->queue_num; ++i) {
1501                 struct mlx5_rxq_ctrl *rxq_ctrl;
1502
1503                 if (rss->queue[i] >= priv->rxqs_n)
1504                         return rte_flow_error_set
1505                                 (error, EINVAL,
1506                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1507                                  &rss->queue[i], "queue index out of range");
1508                 if (!(*priv->rxqs)[rss->queue[i]])
1509                         return rte_flow_error_set
1510                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1511                                  &rss->queue[i], "queue is not configured");
1512                 rxq_ctrl = container_of((*priv->rxqs)[rss->queue[i]],
1513                                         struct mlx5_rxq_ctrl, rxq);
1514                 if (i == 0)
1515                         rxq_type = rxq_ctrl->type;
1516                 if (rxq_type != rxq_ctrl->type)
1517                         return rte_flow_error_set
1518                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1519                                  &rss->queue[i],
1520                                  "combining hairpin and regular RSS queues is not supported");
1521         }
1522         return 0;
1523 }
1524
1525 /*
1526  * Validate the rss action.
1527  *
1528  * @param[in] action
1529  *   Pointer to the queue action.
1530  * @param[in] action_flags
1531  *   Bit-fields that holds the actions detected until now.
1532  * @param[in] dev
1533  *   Pointer to the Ethernet device structure.
1534  * @param[in] attr
1535  *   Attributes of flow that includes this action.
1536  * @param[in] item_flags
1537  *   Items that were detected.
1538  * @param[out] error
1539  *   Pointer to error structure.
1540  *
1541  * @return
1542  *   0 on success, a negative errno value otherwise and rte_errno is set.
1543  */
1544 int
1545 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1546                               uint64_t action_flags,
1547                               struct rte_eth_dev *dev,
1548                               const struct rte_flow_attr *attr,
1549                               uint64_t item_flags,
1550                               struct rte_flow_error *error)
1551 {
1552         const struct rte_flow_action_rss *rss = action->conf;
1553         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1554         int ret;
1555
1556         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1557                 return rte_flow_error_set(error, EINVAL,
1558                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1559                                           "can't have 2 fate actions"
1560                                           " in same flow");
1561         ret = mlx5_validate_action_rss(dev, action, error);
1562         if (ret)
1563                 return ret;
1564         if (attr->egress)
1565                 return rte_flow_error_set(error, ENOTSUP,
1566                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1567                                           "rss action not supported for "
1568                                           "egress");
1569         if (rss->level > 1 && !tunnel)
1570                 return rte_flow_error_set(error, EINVAL,
1571                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1572                                           "inner RSS is not supported for "
1573                                           "non-tunnel flows");
1574         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1575             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1576                 return rte_flow_error_set(error, EINVAL,
1577                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1578                                           "RSS on eCPRI is not supported now");
1579         }
1580         return 0;
1581 }
1582
1583 /*
1584  * Validate the default miss action.
1585  *
1586  * @param[in] action_flags
1587  *   Bit-fields that holds the actions detected until now.
1588  * @param[out] error
1589  *   Pointer to error structure.
1590  *
1591  * @return
1592  *   0 on success, a negative errno value otherwise and rte_errno is set.
1593  */
1594 int
1595 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1596                                 const struct rte_flow_attr *attr,
1597                                 struct rte_flow_error *error)
1598 {
1599         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1600                 return rte_flow_error_set(error, EINVAL,
1601                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1602                                           "can't have 2 fate actions in"
1603                                           " same flow");
1604         if (attr->egress)
1605                 return rte_flow_error_set(error, ENOTSUP,
1606                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1607                                           "default miss action not supported "
1608                                           "for egress");
1609         if (attr->group)
1610                 return rte_flow_error_set(error, ENOTSUP,
1611                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1612                                           "only group 0 is supported");
1613         if (attr->transfer)
1614                 return rte_flow_error_set(error, ENOTSUP,
1615                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1616                                           NULL, "transfer is not supported");
1617         return 0;
1618 }
1619
1620 /*
1621  * Validate the count action.
1622  *
1623  * @param[in] dev
1624  *   Pointer to the Ethernet device structure.
1625  * @param[in] attr
1626  *   Attributes of flow that includes this action.
1627  * @param[out] error
1628  *   Pointer to error structure.
1629  *
1630  * @return
1631  *   0 on success, a negative errno value otherwise and rte_errno is set.
1632  */
1633 int
1634 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1635                                 const struct rte_flow_attr *attr,
1636                                 struct rte_flow_error *error)
1637 {
1638         if (attr->egress)
1639                 return rte_flow_error_set(error, ENOTSUP,
1640                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1641                                           "count action not supported for "
1642                                           "egress");
1643         return 0;
1644 }
1645
1646 /**
1647  * Verify the @p attributes will be correctly understood by the NIC and store
1648  * them in the @p flow if everything is correct.
1649  *
1650  * @param[in] dev
1651  *   Pointer to the Ethernet device structure.
1652  * @param[in] attributes
1653  *   Pointer to flow attributes
1654  * @param[out] error
1655  *   Pointer to error structure.
1656  *
1657  * @return
1658  *   0 on success, a negative errno value otherwise and rte_errno is set.
1659  */
1660 int
1661 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1662                               const struct rte_flow_attr *attributes,
1663                               struct rte_flow_error *error)
1664 {
1665         struct mlx5_priv *priv = dev->data->dev_private;
1666         uint32_t priority_max = priv->config.flow_prio - 1;
1667
1668         if (attributes->group)
1669                 return rte_flow_error_set(error, ENOTSUP,
1670                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1671                                           NULL, "groups is not supported");
1672         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1673             attributes->priority >= priority_max)
1674                 return rte_flow_error_set(error, ENOTSUP,
1675                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1676                                           NULL, "priority out of range");
1677         if (attributes->egress)
1678                 return rte_flow_error_set(error, ENOTSUP,
1679                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1680                                           "egress is not supported");
1681         if (attributes->transfer && !priv->config.dv_esw_en)
1682                 return rte_flow_error_set(error, ENOTSUP,
1683                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1684                                           NULL, "transfer is not supported");
1685         if (!attributes->ingress)
1686                 return rte_flow_error_set(error, EINVAL,
1687                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1688                                           NULL,
1689                                           "ingress attribute is mandatory");
1690         return 0;
1691 }
1692
1693 /**
1694  * Validate ICMP6 item.
1695  *
1696  * @param[in] item
1697  *   Item specification.
1698  * @param[in] item_flags
1699  *   Bit-fields that holds the items detected until now.
1700  * @param[in] ext_vlan_sup
1701  *   Whether extended VLAN features are supported or not.
1702  * @param[out] error
1703  *   Pointer to error structure.
1704  *
1705  * @return
1706  *   0 on success, a negative errno value otherwise and rte_errno is set.
1707  */
1708 int
1709 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1710                                uint64_t item_flags,
1711                                uint8_t target_protocol,
1712                                struct rte_flow_error *error)
1713 {
1714         const struct rte_flow_item_icmp6 *mask = item->mask;
1715         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1716         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1717                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1718         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1719                                       MLX5_FLOW_LAYER_OUTER_L4;
1720         int ret;
1721
1722         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1723                 return rte_flow_error_set(error, EINVAL,
1724                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1725                                           "protocol filtering not compatible"
1726                                           " with ICMP6 layer");
1727         if (!(item_flags & l3m))
1728                 return rte_flow_error_set(error, EINVAL,
1729                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1730                                           "IPv6 is mandatory to filter on"
1731                                           " ICMP6");
1732         if (item_flags & l4m)
1733                 return rte_flow_error_set(error, EINVAL,
1734                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1735                                           "multiple L4 layers not supported");
1736         if (!mask)
1737                 mask = &rte_flow_item_icmp6_mask;
1738         ret = mlx5_flow_item_acceptable
1739                 (item, (const uint8_t *)mask,
1740                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1741                  sizeof(struct rte_flow_item_icmp6),
1742                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1743         if (ret < 0)
1744                 return ret;
1745         return 0;
1746 }
1747
1748 /**
1749  * Validate ICMP item.
1750  *
1751  * @param[in] item
1752  *   Item specification.
1753  * @param[in] item_flags
1754  *   Bit-fields that holds the items detected until now.
1755  * @param[out] error
1756  *   Pointer to error structure.
1757  *
1758  * @return
1759  *   0 on success, a negative errno value otherwise and rte_errno is set.
1760  */
1761 int
1762 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1763                              uint64_t item_flags,
1764                              uint8_t target_protocol,
1765                              struct rte_flow_error *error)
1766 {
1767         const struct rte_flow_item_icmp *mask = item->mask;
1768         const struct rte_flow_item_icmp nic_mask = {
1769                 .hdr.icmp_type = 0xff,
1770                 .hdr.icmp_code = 0xff,
1771                 .hdr.icmp_ident = RTE_BE16(0xffff),
1772                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
1773         };
1774         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1775         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1776                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1777         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1778                                       MLX5_FLOW_LAYER_OUTER_L4;
1779         int ret;
1780
1781         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1782                 return rte_flow_error_set(error, EINVAL,
1783                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1784                                           "protocol filtering not compatible"
1785                                           " with ICMP layer");
1786         if (!(item_flags & l3m))
1787                 return rte_flow_error_set(error, EINVAL,
1788                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1789                                           "IPv4 is mandatory to filter"
1790                                           " on ICMP");
1791         if (item_flags & l4m)
1792                 return rte_flow_error_set(error, EINVAL,
1793                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1794                                           "multiple L4 layers not supported");
1795         if (!mask)
1796                 mask = &nic_mask;
1797         ret = mlx5_flow_item_acceptable
1798                 (item, (const uint8_t *)mask,
1799                  (const uint8_t *)&nic_mask,
1800                  sizeof(struct rte_flow_item_icmp),
1801                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1802         if (ret < 0)
1803                 return ret;
1804         return 0;
1805 }
1806
1807 /**
1808  * Validate Ethernet item.
1809  *
1810  * @param[in] item
1811  *   Item specification.
1812  * @param[in] item_flags
1813  *   Bit-fields that holds the items detected until now.
1814  * @param[out] error
1815  *   Pointer to error structure.
1816  *
1817  * @return
1818  *   0 on success, a negative errno value otherwise and rte_errno is set.
1819  */
1820 int
1821 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1822                             uint64_t item_flags, bool ext_vlan_sup,
1823                             struct rte_flow_error *error)
1824 {
1825         const struct rte_flow_item_eth *mask = item->mask;
1826         const struct rte_flow_item_eth nic_mask = {
1827                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1828                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1829                 .type = RTE_BE16(0xffff),
1830                 .has_vlan = ext_vlan_sup ? 1 : 0,
1831         };
1832         int ret;
1833         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1834         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1835                                        MLX5_FLOW_LAYER_OUTER_L2;
1836
1837         if (item_flags & ethm)
1838                 return rte_flow_error_set(error, ENOTSUP,
1839                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1840                                           "multiple L2 layers not supported");
1841         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1842             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1843                 return rte_flow_error_set(error, EINVAL,
1844                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1845                                           "L2 layer should not follow "
1846                                           "L3 layers");
1847         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1848             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1849                 return rte_flow_error_set(error, EINVAL,
1850                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1851                                           "L2 layer should not follow VLAN");
1852         if (!mask)
1853                 mask = &rte_flow_item_eth_mask;
1854         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1855                                         (const uint8_t *)&nic_mask,
1856                                         sizeof(struct rte_flow_item_eth),
1857                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1858         return ret;
1859 }
1860
1861 /**
1862  * Validate VLAN item.
1863  *
1864  * @param[in] item
1865  *   Item specification.
1866  * @param[in] item_flags
1867  *   Bit-fields that holds the items detected until now.
1868  * @param[in] dev
1869  *   Ethernet device flow is being created on.
1870  * @param[out] error
1871  *   Pointer to error structure.
1872  *
1873  * @return
1874  *   0 on success, a negative errno value otherwise and rte_errno is set.
1875  */
1876 int
1877 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1878                              uint64_t item_flags,
1879                              struct rte_eth_dev *dev,
1880                              struct rte_flow_error *error)
1881 {
1882         const struct rte_flow_item_vlan *spec = item->spec;
1883         const struct rte_flow_item_vlan *mask = item->mask;
1884         const struct rte_flow_item_vlan nic_mask = {
1885                 .tci = RTE_BE16(UINT16_MAX),
1886                 .inner_type = RTE_BE16(UINT16_MAX),
1887         };
1888         uint16_t vlan_tag = 0;
1889         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1890         int ret;
1891         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1892                                         MLX5_FLOW_LAYER_INNER_L4) :
1893                                        (MLX5_FLOW_LAYER_OUTER_L3 |
1894                                         MLX5_FLOW_LAYER_OUTER_L4);
1895         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1896                                         MLX5_FLOW_LAYER_OUTER_VLAN;
1897
1898         if (item_flags & vlanm)
1899                 return rte_flow_error_set(error, EINVAL,
1900                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1901                                           "multiple VLAN layers not supported");
1902         else if ((item_flags & l34m) != 0)
1903                 return rte_flow_error_set(error, EINVAL,
1904                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1905                                           "VLAN cannot follow L3/L4 layer");
1906         if (!mask)
1907                 mask = &rte_flow_item_vlan_mask;
1908         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1909                                         (const uint8_t *)&nic_mask,
1910                                         sizeof(struct rte_flow_item_vlan),
1911                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1912         if (ret)
1913                 return ret;
1914         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1915                 struct mlx5_priv *priv = dev->data->dev_private;
1916
1917                 if (priv->vmwa_context) {
1918                         /*
1919                          * Non-NULL context means we have a virtual machine
1920                          * and SR-IOV enabled, we have to create VLAN interface
1921                          * to make hypervisor to setup E-Switch vport
1922                          * context correctly. We avoid creating the multiple
1923                          * VLAN interfaces, so we cannot support VLAN tag mask.
1924                          */
1925                         return rte_flow_error_set(error, EINVAL,
1926                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1927                                                   item,
1928                                                   "VLAN tag mask is not"
1929                                                   " supported in virtual"
1930                                                   " environment");
1931                 }
1932         }
1933         if (spec) {
1934                 vlan_tag = spec->tci;
1935                 vlan_tag &= mask->tci;
1936         }
1937         /*
1938          * From verbs perspective an empty VLAN is equivalent
1939          * to a packet without VLAN layer.
1940          */
1941         if (!vlan_tag)
1942                 return rte_flow_error_set(error, EINVAL,
1943                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1944                                           item->spec,
1945                                           "VLAN cannot be empty");
1946         return 0;
1947 }
1948
1949 /**
1950  * Validate IPV4 item.
1951  *
1952  * @param[in] item
1953  *   Item specification.
1954  * @param[in] item_flags
1955  *   Bit-fields that holds the items detected until now.
1956  * @param[in] last_item
1957  *   Previous validated item in the pattern items.
1958  * @param[in] ether_type
1959  *   Type in the ethernet layer header (including dot1q).
1960  * @param[in] acc_mask
1961  *   Acceptable mask, if NULL default internal default mask
1962  *   will be used to check whether item fields are supported.
1963  * @param[in] range_accepted
1964  *   True if range of values is accepted for specific fields, false otherwise.
1965  * @param[out] error
1966  *   Pointer to error structure.
1967  *
1968  * @return
1969  *   0 on success, a negative errno value otherwise and rte_errno is set.
1970  */
1971 int
1972 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1973                              uint64_t item_flags,
1974                              uint64_t last_item,
1975                              uint16_t ether_type,
1976                              const struct rte_flow_item_ipv4 *acc_mask,
1977                              bool range_accepted,
1978                              struct rte_flow_error *error)
1979 {
1980         const struct rte_flow_item_ipv4 *mask = item->mask;
1981         const struct rte_flow_item_ipv4 *spec = item->spec;
1982         const struct rte_flow_item_ipv4 nic_mask = {
1983                 .hdr = {
1984                         .src_addr = RTE_BE32(0xffffffff),
1985                         .dst_addr = RTE_BE32(0xffffffff),
1986                         .type_of_service = 0xff,
1987                         .next_proto_id = 0xff,
1988                 },
1989         };
1990         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1991         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1992                                       MLX5_FLOW_LAYER_OUTER_L3;
1993         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1994                                       MLX5_FLOW_LAYER_OUTER_L4;
1995         int ret;
1996         uint8_t next_proto = 0xFF;
1997         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1998                                   MLX5_FLOW_LAYER_OUTER_VLAN |
1999                                   MLX5_FLOW_LAYER_INNER_VLAN);
2000
2001         if ((last_item & l2_vlan) && ether_type &&
2002             ether_type != RTE_ETHER_TYPE_IPV4)
2003                 return rte_flow_error_set(error, EINVAL,
2004                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2005                                           "IPv4 cannot follow L2/VLAN layer "
2006                                           "which ether type is not IPv4");
2007         if (item_flags & MLX5_FLOW_LAYER_IPIP) {
2008                 if (mask && spec)
2009                         next_proto = mask->hdr.next_proto_id &
2010                                      spec->hdr.next_proto_id;
2011                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2012                         return rte_flow_error_set(error, EINVAL,
2013                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2014                                                   item,
2015                                                   "multiple tunnel "
2016                                                   "not supported");
2017         }
2018         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2019                 return rte_flow_error_set(error, EINVAL,
2020                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2021                                           "wrong tunnel type - IPv6 specified "
2022                                           "but IPv4 item provided");
2023         if (item_flags & l3m)
2024                 return rte_flow_error_set(error, ENOTSUP,
2025                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2026                                           "multiple L3 layers not supported");
2027         else if (item_flags & l4m)
2028                 return rte_flow_error_set(error, EINVAL,
2029                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2030                                           "L3 cannot follow an L4 layer.");
2031         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2032                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2033                 return rte_flow_error_set(error, EINVAL,
2034                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2035                                           "L3 cannot follow an NVGRE layer.");
2036         if (!mask)
2037                 mask = &rte_flow_item_ipv4_mask;
2038         else if (mask->hdr.next_proto_id != 0 &&
2039                  mask->hdr.next_proto_id != 0xff)
2040                 return rte_flow_error_set(error, EINVAL,
2041                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2042                                           "partial mask is not supported"
2043                                           " for protocol");
2044         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2045                                         acc_mask ? (const uint8_t *)acc_mask
2046                                                  : (const uint8_t *)&nic_mask,
2047                                         sizeof(struct rte_flow_item_ipv4),
2048                                         range_accepted, error);
2049         if (ret < 0)
2050                 return ret;
2051         return 0;
2052 }
2053
2054 /**
2055  * Validate IPV6 item.
2056  *
2057  * @param[in] item
2058  *   Item specification.
2059  * @param[in] item_flags
2060  *   Bit-fields that holds the items detected until now.
2061  * @param[in] last_item
2062  *   Previous validated item in the pattern items.
2063  * @param[in] ether_type
2064  *   Type in the ethernet layer header (including dot1q).
2065  * @param[in] acc_mask
2066  *   Acceptable mask, if NULL default internal default mask
2067  *   will be used to check whether item fields are supported.
2068  * @param[out] error
2069  *   Pointer to error structure.
2070  *
2071  * @return
2072  *   0 on success, a negative errno value otherwise and rte_errno is set.
2073  */
2074 int
2075 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2076                              uint64_t item_flags,
2077                              uint64_t last_item,
2078                              uint16_t ether_type,
2079                              const struct rte_flow_item_ipv6 *acc_mask,
2080                              struct rte_flow_error *error)
2081 {
2082         const struct rte_flow_item_ipv6 *mask = item->mask;
2083         const struct rte_flow_item_ipv6 *spec = item->spec;
2084         const struct rte_flow_item_ipv6 nic_mask = {
2085                 .hdr = {
2086                         .src_addr =
2087                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2088                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2089                         .dst_addr =
2090                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2091                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2092                         .vtc_flow = RTE_BE32(0xffffffff),
2093                         .proto = 0xff,
2094                 },
2095         };
2096         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2097         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2098                                       MLX5_FLOW_LAYER_OUTER_L3;
2099         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2100                                       MLX5_FLOW_LAYER_OUTER_L4;
2101         int ret;
2102         uint8_t next_proto = 0xFF;
2103         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2104                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2105                                   MLX5_FLOW_LAYER_INNER_VLAN);
2106
2107         if ((last_item & l2_vlan) && ether_type &&
2108             ether_type != RTE_ETHER_TYPE_IPV6)
2109                 return rte_flow_error_set(error, EINVAL,
2110                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2111                                           "IPv6 cannot follow L2/VLAN layer "
2112                                           "which ether type is not IPv6");
2113         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2114                 next_proto = spec->hdr.proto;
2115         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
2116                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2117                         return rte_flow_error_set(error, EINVAL,
2118                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2119                                                   item,
2120                                                   "multiple tunnel "
2121                                                   "not supported");
2122         }
2123         if (next_proto == IPPROTO_HOPOPTS  ||
2124             next_proto == IPPROTO_ROUTING  ||
2125             next_proto == IPPROTO_FRAGMENT ||
2126             next_proto == IPPROTO_ESP      ||
2127             next_proto == IPPROTO_AH       ||
2128             next_proto == IPPROTO_DSTOPTS)
2129                 return rte_flow_error_set(error, EINVAL,
2130                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2131                                           "IPv6 proto (next header) should "
2132                                           "not be set as extension header");
2133         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2134                 return rte_flow_error_set(error, EINVAL,
2135                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2136                                           "wrong tunnel type - IPv4 specified "
2137                                           "but IPv6 item provided");
2138         if (item_flags & l3m)
2139                 return rte_flow_error_set(error, ENOTSUP,
2140                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2141                                           "multiple L3 layers not supported");
2142         else if (item_flags & l4m)
2143                 return rte_flow_error_set(error, EINVAL,
2144                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2145                                           "L3 cannot follow an L4 layer.");
2146         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2147                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2148                 return rte_flow_error_set(error, EINVAL,
2149                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2150                                           "L3 cannot follow an NVGRE layer.");
2151         if (!mask)
2152                 mask = &rte_flow_item_ipv6_mask;
2153         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2154                                         acc_mask ? (const uint8_t *)acc_mask
2155                                                  : (const uint8_t *)&nic_mask,
2156                                         sizeof(struct rte_flow_item_ipv6),
2157                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2158         if (ret < 0)
2159                 return ret;
2160         return 0;
2161 }
2162
2163 /**
2164  * Validate UDP item.
2165  *
2166  * @param[in] item
2167  *   Item specification.
2168  * @param[in] item_flags
2169  *   Bit-fields that holds the items detected until now.
2170  * @param[in] target_protocol
2171  *   The next protocol in the previous item.
2172  * @param[in] flow_mask
2173  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2174  * @param[out] error
2175  *   Pointer to error structure.
2176  *
2177  * @return
2178  *   0 on success, a negative errno value otherwise and rte_errno is set.
2179  */
2180 int
2181 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2182                             uint64_t item_flags,
2183                             uint8_t target_protocol,
2184                             struct rte_flow_error *error)
2185 {
2186         const struct rte_flow_item_udp *mask = item->mask;
2187         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2188         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2189                                       MLX5_FLOW_LAYER_OUTER_L3;
2190         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2191                                       MLX5_FLOW_LAYER_OUTER_L4;
2192         int ret;
2193
2194         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2195                 return rte_flow_error_set(error, EINVAL,
2196                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2197                                           "protocol filtering not compatible"
2198                                           " with UDP layer");
2199         if (!(item_flags & l3m))
2200                 return rte_flow_error_set(error, EINVAL,
2201                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2202                                           "L3 is mandatory to filter on L4");
2203         if (item_flags & l4m)
2204                 return rte_flow_error_set(error, EINVAL,
2205                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2206                                           "multiple L4 layers not supported");
2207         if (!mask)
2208                 mask = &rte_flow_item_udp_mask;
2209         ret = mlx5_flow_item_acceptable
2210                 (item, (const uint8_t *)mask,
2211                  (const uint8_t *)&rte_flow_item_udp_mask,
2212                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2213                  error);
2214         if (ret < 0)
2215                 return ret;
2216         return 0;
2217 }
2218
2219 /**
2220  * Validate TCP item.
2221  *
2222  * @param[in] item
2223  *   Item specification.
2224  * @param[in] item_flags
2225  *   Bit-fields that holds the items detected until now.
2226  * @param[in] target_protocol
2227  *   The next protocol in the previous item.
2228  * @param[out] error
2229  *   Pointer to error structure.
2230  *
2231  * @return
2232  *   0 on success, a negative errno value otherwise and rte_errno is set.
2233  */
2234 int
2235 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2236                             uint64_t item_flags,
2237                             uint8_t target_protocol,
2238                             const struct rte_flow_item_tcp *flow_mask,
2239                             struct rte_flow_error *error)
2240 {
2241         const struct rte_flow_item_tcp *mask = item->mask;
2242         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2243         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2244                                       MLX5_FLOW_LAYER_OUTER_L3;
2245         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2246                                       MLX5_FLOW_LAYER_OUTER_L4;
2247         int ret;
2248
2249         MLX5_ASSERT(flow_mask);
2250         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2251                 return rte_flow_error_set(error, EINVAL,
2252                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2253                                           "protocol filtering not compatible"
2254                                           " with TCP layer");
2255         if (!(item_flags & l3m))
2256                 return rte_flow_error_set(error, EINVAL,
2257                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2258                                           "L3 is mandatory to filter on L4");
2259         if (item_flags & l4m)
2260                 return rte_flow_error_set(error, EINVAL,
2261                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2262                                           "multiple L4 layers not supported");
2263         if (!mask)
2264                 mask = &rte_flow_item_tcp_mask;
2265         ret = mlx5_flow_item_acceptable
2266                 (item, (const uint8_t *)mask,
2267                  (const uint8_t *)flow_mask,
2268                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2269                  error);
2270         if (ret < 0)
2271                 return ret;
2272         return 0;
2273 }
2274
2275 /**
2276  * Validate VXLAN item.
2277  *
2278  * @param[in] item
2279  *   Item specification.
2280  * @param[in] item_flags
2281  *   Bit-fields that holds the items detected until now.
2282  * @param[in] target_protocol
2283  *   The next protocol in the previous item.
2284  * @param[out] error
2285  *   Pointer to error structure.
2286  *
2287  * @return
2288  *   0 on success, a negative errno value otherwise and rte_errno is set.
2289  */
2290 int
2291 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
2292                               uint64_t item_flags,
2293                               struct rte_flow_error *error)
2294 {
2295         const struct rte_flow_item_vxlan *spec = item->spec;
2296         const struct rte_flow_item_vxlan *mask = item->mask;
2297         int ret;
2298         union vni {
2299                 uint32_t vlan_id;
2300                 uint8_t vni[4];
2301         } id = { .vlan_id = 0, };
2302
2303
2304         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2305                 return rte_flow_error_set(error, ENOTSUP,
2306                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2307                                           "multiple tunnel layers not"
2308                                           " supported");
2309         /*
2310          * Verify only UDPv4 is present as defined in
2311          * https://tools.ietf.org/html/rfc7348
2312          */
2313         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2314                 return rte_flow_error_set(error, EINVAL,
2315                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2316                                           "no outer UDP layer found");
2317         if (!mask)
2318                 mask = &rte_flow_item_vxlan_mask;
2319         ret = mlx5_flow_item_acceptable
2320                 (item, (const uint8_t *)mask,
2321                  (const uint8_t *)&rte_flow_item_vxlan_mask,
2322                  sizeof(struct rte_flow_item_vxlan),
2323                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2324         if (ret < 0)
2325                 return ret;
2326         if (spec) {
2327                 memcpy(&id.vni[1], spec->vni, 3);
2328                 memcpy(&id.vni[1], mask->vni, 3);
2329         }
2330         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2331                 return rte_flow_error_set(error, ENOTSUP,
2332                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2333                                           "VXLAN tunnel must be fully defined");
2334         return 0;
2335 }
2336
2337 /**
2338  * Validate VXLAN_GPE item.
2339  *
2340  * @param[in] item
2341  *   Item specification.
2342  * @param[in] item_flags
2343  *   Bit-fields that holds the items detected until now.
2344  * @param[in] priv
2345  *   Pointer to the private data structure.
2346  * @param[in] target_protocol
2347  *   The next protocol in the previous item.
2348  * @param[out] error
2349  *   Pointer to error structure.
2350  *
2351  * @return
2352  *   0 on success, a negative errno value otherwise and rte_errno is set.
2353  */
2354 int
2355 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2356                                   uint64_t item_flags,
2357                                   struct rte_eth_dev *dev,
2358                                   struct rte_flow_error *error)
2359 {
2360         struct mlx5_priv *priv = dev->data->dev_private;
2361         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2362         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2363         int ret;
2364         union vni {
2365                 uint32_t vlan_id;
2366                 uint8_t vni[4];
2367         } id = { .vlan_id = 0, };
2368
2369         if (!priv->config.l3_vxlan_en)
2370                 return rte_flow_error_set(error, ENOTSUP,
2371                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2372                                           "L3 VXLAN is not enabled by device"
2373                                           " parameter and/or not configured in"
2374                                           " firmware");
2375         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2376                 return rte_flow_error_set(error, ENOTSUP,
2377                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2378                                           "multiple tunnel layers not"
2379                                           " supported");
2380         /*
2381          * Verify only UDPv4 is present as defined in
2382          * https://tools.ietf.org/html/rfc7348
2383          */
2384         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2385                 return rte_flow_error_set(error, EINVAL,
2386                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2387                                           "no outer UDP layer found");
2388         if (!mask)
2389                 mask = &rte_flow_item_vxlan_gpe_mask;
2390         ret = mlx5_flow_item_acceptable
2391                 (item, (const uint8_t *)mask,
2392                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2393                  sizeof(struct rte_flow_item_vxlan_gpe),
2394                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2395         if (ret < 0)
2396                 return ret;
2397         if (spec) {
2398                 if (spec->protocol)
2399                         return rte_flow_error_set(error, ENOTSUP,
2400                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2401                                                   item,
2402                                                   "VxLAN-GPE protocol"
2403                                                   " not supported");
2404                 memcpy(&id.vni[1], spec->vni, 3);
2405                 memcpy(&id.vni[1], mask->vni, 3);
2406         }
2407         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2408                 return rte_flow_error_set(error, ENOTSUP,
2409                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2410                                           "VXLAN-GPE tunnel must be fully"
2411                                           " defined");
2412         return 0;
2413 }
2414 /**
2415  * Validate GRE Key item.
2416  *
2417  * @param[in] item
2418  *   Item specification.
2419  * @param[in] item_flags
2420  *   Bit flags to mark detected items.
2421  * @param[in] gre_item
2422  *   Pointer to gre_item
2423  * @param[out] error
2424  *   Pointer to error structure.
2425  *
2426  * @return
2427  *   0 on success, a negative errno value otherwise and rte_errno is set.
2428  */
2429 int
2430 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2431                                 uint64_t item_flags,
2432                                 const struct rte_flow_item *gre_item,
2433                                 struct rte_flow_error *error)
2434 {
2435         const rte_be32_t *mask = item->mask;
2436         int ret = 0;
2437         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2438         const struct rte_flow_item_gre *gre_spec;
2439         const struct rte_flow_item_gre *gre_mask;
2440
2441         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2442                 return rte_flow_error_set(error, ENOTSUP,
2443                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2444                                           "Multiple GRE key not support");
2445         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2446                 return rte_flow_error_set(error, ENOTSUP,
2447                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2448                                           "No preceding GRE header");
2449         if (item_flags & MLX5_FLOW_LAYER_INNER)
2450                 return rte_flow_error_set(error, ENOTSUP,
2451                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2452                                           "GRE key following a wrong item");
2453         gre_mask = gre_item->mask;
2454         if (!gre_mask)
2455                 gre_mask = &rte_flow_item_gre_mask;
2456         gre_spec = gre_item->spec;
2457         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2458                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2459                 return rte_flow_error_set(error, EINVAL,
2460                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2461                                           "Key bit must be on");
2462
2463         if (!mask)
2464                 mask = &gre_key_default_mask;
2465         ret = mlx5_flow_item_acceptable
2466                 (item, (const uint8_t *)mask,
2467                  (const uint8_t *)&gre_key_default_mask,
2468                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2469         return ret;
2470 }
2471
2472 /**
2473  * Validate GRE item.
2474  *
2475  * @param[in] item
2476  *   Item specification.
2477  * @param[in] item_flags
2478  *   Bit flags to mark detected items.
2479  * @param[in] target_protocol
2480  *   The next protocol in the previous item.
2481  * @param[out] error
2482  *   Pointer to error structure.
2483  *
2484  * @return
2485  *   0 on success, a negative errno value otherwise and rte_errno is set.
2486  */
2487 int
2488 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2489                             uint64_t item_flags,
2490                             uint8_t target_protocol,
2491                             struct rte_flow_error *error)
2492 {
2493         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2494         const struct rte_flow_item_gre *mask = item->mask;
2495         int ret;
2496         const struct rte_flow_item_gre nic_mask = {
2497                 .c_rsvd0_ver = RTE_BE16(0xB000),
2498                 .protocol = RTE_BE16(UINT16_MAX),
2499         };
2500
2501         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2502                 return rte_flow_error_set(error, EINVAL,
2503                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2504                                           "protocol filtering not compatible"
2505                                           " with this GRE layer");
2506         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2507                 return rte_flow_error_set(error, ENOTSUP,
2508                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2509                                           "multiple tunnel layers not"
2510                                           " supported");
2511         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2512                 return rte_flow_error_set(error, ENOTSUP,
2513                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2514                                           "L3 Layer is missing");
2515         if (!mask)
2516                 mask = &rte_flow_item_gre_mask;
2517         ret = mlx5_flow_item_acceptable
2518                 (item, (const uint8_t *)mask,
2519                  (const uint8_t *)&nic_mask,
2520                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2521                  error);
2522         if (ret < 0)
2523                 return ret;
2524 #ifndef HAVE_MLX5DV_DR
2525 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2526         if (spec && (spec->protocol & mask->protocol))
2527                 return rte_flow_error_set(error, ENOTSUP,
2528                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2529                                           "without MPLS support the"
2530                                           " specification cannot be used for"
2531                                           " filtering");
2532 #endif
2533 #endif
2534         return 0;
2535 }
2536
2537 /**
2538  * Validate Geneve item.
2539  *
2540  * @param[in] item
2541  *   Item specification.
2542  * @param[in] itemFlags
2543  *   Bit-fields that holds the items detected until now.
2544  * @param[in] enPriv
2545  *   Pointer to the private data structure.
2546  * @param[out] error
2547  *   Pointer to error structure.
2548  *
2549  * @return
2550  *   0 on success, a negative errno value otherwise and rte_errno is set.
2551  */
2552
2553 int
2554 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2555                                uint64_t item_flags,
2556                                struct rte_eth_dev *dev,
2557                                struct rte_flow_error *error)
2558 {
2559         struct mlx5_priv *priv = dev->data->dev_private;
2560         const struct rte_flow_item_geneve *spec = item->spec;
2561         const struct rte_flow_item_geneve *mask = item->mask;
2562         int ret;
2563         uint16_t gbhdr;
2564         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2565                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2566         const struct rte_flow_item_geneve nic_mask = {
2567                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2568                 .vni = "\xff\xff\xff",
2569                 .protocol = RTE_BE16(UINT16_MAX),
2570         };
2571
2572         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2573                 return rte_flow_error_set(error, ENOTSUP,
2574                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2575                                           "L3 Geneve is not enabled by device"
2576                                           " parameter and/or not configured in"
2577                                           " firmware");
2578         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2579                 return rte_flow_error_set(error, ENOTSUP,
2580                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2581                                           "multiple tunnel layers not"
2582                                           " supported");
2583         /*
2584          * Verify only UDPv4 is present as defined in
2585          * https://tools.ietf.org/html/rfc7348
2586          */
2587         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2588                 return rte_flow_error_set(error, EINVAL,
2589                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2590                                           "no outer UDP layer found");
2591         if (!mask)
2592                 mask = &rte_flow_item_geneve_mask;
2593         ret = mlx5_flow_item_acceptable
2594                                   (item, (const uint8_t *)mask,
2595                                    (const uint8_t *)&nic_mask,
2596                                    sizeof(struct rte_flow_item_geneve),
2597                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2598         if (ret)
2599                 return ret;
2600         if (spec) {
2601                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2602                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2603                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2604                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2605                         return rte_flow_error_set(error, ENOTSUP,
2606                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2607                                                   item,
2608                                                   "Geneve protocol unsupported"
2609                                                   " fields are being used");
2610                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2611                         return rte_flow_error_set
2612                                         (error, ENOTSUP,
2613                                          RTE_FLOW_ERROR_TYPE_ITEM,
2614                                          item,
2615                                          "Unsupported Geneve options length");
2616         }
2617         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2618                 return rte_flow_error_set
2619                                     (error, ENOTSUP,
2620                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2621                                      "Geneve tunnel must be fully defined");
2622         return 0;
2623 }
2624
2625 /**
2626  * Validate Geneve TLV option item.
2627  *
2628  * @param[in] item
2629  *   Item specification.
2630  * @param[in] last_item
2631  *   Previous validated item in the pattern items.
2632  * @param[in] geneve_item
2633  *   Previous GENEVE item specification.
2634  * @param[in] dev
2635  *   Pointer to the rte_eth_dev structure.
2636  * @param[out] error
2637  *   Pointer to error structure.
2638  *
2639  * @return
2640  *   0 on success, a negative errno value otherwise and rte_errno is set.
2641  */
2642 int
2643 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2644                                    uint64_t last_item,
2645                                    const struct rte_flow_item *geneve_item,
2646                                    struct rte_eth_dev *dev,
2647                                    struct rte_flow_error *error)
2648 {
2649         struct mlx5_priv *priv = dev->data->dev_private;
2650         struct mlx5_dev_ctx_shared *sh = priv->sh;
2651         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2652         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2653         uint8_t data_max_supported =
2654                         hca_attr->max_geneve_tlv_option_data_len * 4;
2655         struct mlx5_dev_config *config = &priv->config;
2656         const struct rte_flow_item_geneve *geneve_spec;
2657         const struct rte_flow_item_geneve *geneve_mask;
2658         const struct rte_flow_item_geneve_opt *spec = item->spec;
2659         const struct rte_flow_item_geneve_opt *mask = item->mask;
2660         unsigned int i;
2661         unsigned int data_len;
2662         uint8_t tlv_option_len;
2663         uint16_t optlen_m, optlen_v;
2664         const struct rte_flow_item_geneve_opt full_mask = {
2665                 .option_class = RTE_BE16(0xffff),
2666                 .option_type = 0xff,
2667                 .option_len = 0x1f,
2668         };
2669
2670         if (!mask)
2671                 mask = &rte_flow_item_geneve_opt_mask;
2672         if (!spec)
2673                 return rte_flow_error_set
2674                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2675                         "Geneve TLV opt class/type/length must be specified");
2676         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
2677                 return rte_flow_error_set
2678                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2679                         "Geneve TLV opt length exceeeds the limit (31)");
2680         /* Check if class type and length masks are full. */
2681         if (full_mask.option_class != mask->option_class ||
2682             full_mask.option_type != mask->option_type ||
2683             full_mask.option_len != (mask->option_len & full_mask.option_len))
2684                 return rte_flow_error_set
2685                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2686                         "Geneve TLV opt class/type/length masks must be full");
2687         /* Check if length is supported */
2688         if ((uint32_t)spec->option_len >
2689                         config->hca_attr.max_geneve_tlv_option_data_len)
2690                 return rte_flow_error_set
2691                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2692                         "Geneve TLV opt length not supported");
2693         if (config->hca_attr.max_geneve_tlv_options > 1)
2694                 DRV_LOG(DEBUG,
2695                         "max_geneve_tlv_options supports more than 1 option");
2696         /* Check GENEVE item preceding. */
2697         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
2698                 return rte_flow_error_set
2699                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2700                         "Geneve opt item must be preceded with Geneve item");
2701         geneve_spec = geneve_item->spec;
2702         geneve_mask = geneve_item->mask ? geneve_item->mask :
2703                                           &rte_flow_item_geneve_mask;
2704         /* Check if GENEVE TLV option size doesn't exceed option length */
2705         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
2706                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
2707                 tlv_option_len = spec->option_len & mask->option_len;
2708                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
2709                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
2710                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
2711                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
2712                 if ((optlen_v & optlen_m) <= tlv_option_len)
2713                         return rte_flow_error_set
2714                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2715                                  "GENEVE TLV option length exceeds optlen");
2716         }
2717         /* Check if length is 0 or data is 0. */
2718         if (spec->data == NULL || spec->option_len == 0)
2719                 return rte_flow_error_set
2720                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2721                         "Geneve TLV opt with zero data/length not supported");
2722         /* Check not all data & mask are 0. */
2723         data_len = spec->option_len * 4;
2724         if (mask->data == NULL) {
2725                 for (i = 0; i < data_len; i++)
2726                         if (spec->data[i])
2727                                 break;
2728                 if (i == data_len)
2729                         return rte_flow_error_set(error, ENOTSUP,
2730                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2731                                 "Can't match on Geneve option data 0");
2732         } else {
2733                 for (i = 0; i < data_len; i++)
2734                         if (spec->data[i] & mask->data[i])
2735                                 break;
2736                 if (i == data_len)
2737                         return rte_flow_error_set(error, ENOTSUP,
2738                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2739                                 "Can't match on Geneve option data and mask 0");
2740                 /* Check data mask supported. */
2741                 for (i = data_max_supported; i < data_len ; i++)
2742                         if (mask->data[i])
2743                                 return rte_flow_error_set(error, ENOTSUP,
2744                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2745                                         "Data mask is of unsupported size");
2746         }
2747         /* Check GENEVE option is supported in NIC. */
2748         if (!config->hca_attr.geneve_tlv_opt)
2749                 return rte_flow_error_set
2750                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2751                         "Geneve TLV opt not supported");
2752         /* Check if we already have geneve option with different type/class. */
2753         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
2754         geneve_opt_resource = sh->geneve_tlv_option_resource;
2755         if (geneve_opt_resource != NULL)
2756                 if (geneve_opt_resource->option_class != spec->option_class ||
2757                     geneve_opt_resource->option_type != spec->option_type ||
2758                     geneve_opt_resource->length != spec->option_len) {
2759                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2760                         return rte_flow_error_set(error, ENOTSUP,
2761                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
2762                                 "Only one Geneve TLV option supported");
2763                 }
2764         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
2765         return 0;
2766 }
2767
2768 /**
2769  * Validate MPLS item.
2770  *
2771  * @param[in] dev
2772  *   Pointer to the rte_eth_dev structure.
2773  * @param[in] item
2774  *   Item specification.
2775  * @param[in] item_flags
2776  *   Bit-fields that holds the items detected until now.
2777  * @param[in] prev_layer
2778  *   The protocol layer indicated in previous item.
2779  * @param[out] error
2780  *   Pointer to error structure.
2781  *
2782  * @return
2783  *   0 on success, a negative errno value otherwise and rte_errno is set.
2784  */
2785 int
2786 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2787                              const struct rte_flow_item *item __rte_unused,
2788                              uint64_t item_flags __rte_unused,
2789                              uint64_t prev_layer __rte_unused,
2790                              struct rte_flow_error *error)
2791 {
2792 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2793         const struct rte_flow_item_mpls *mask = item->mask;
2794         struct mlx5_priv *priv = dev->data->dev_private;
2795         int ret;
2796
2797         if (!priv->config.mpls_en)
2798                 return rte_flow_error_set(error, ENOTSUP,
2799                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2800                                           "MPLS not supported or"
2801                                           " disabled in firmware"
2802                                           " configuration.");
2803         /* MPLS over IP, UDP, GRE is allowed */
2804         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2805                             MLX5_FLOW_LAYER_OUTER_L4_UDP |
2806                             MLX5_FLOW_LAYER_GRE |
2807                             MLX5_FLOW_LAYER_GRE_KEY)))
2808                 return rte_flow_error_set(error, EINVAL,
2809                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2810                                           "protocol filtering not compatible"
2811                                           " with MPLS layer");
2812         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2813         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2814             !(item_flags & MLX5_FLOW_LAYER_GRE))
2815                 return rte_flow_error_set(error, ENOTSUP,
2816                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2817                                           "multiple tunnel layers not"
2818                                           " supported");
2819         if (!mask)
2820                 mask = &rte_flow_item_mpls_mask;
2821         ret = mlx5_flow_item_acceptable
2822                 (item, (const uint8_t *)mask,
2823                  (const uint8_t *)&rte_flow_item_mpls_mask,
2824                  sizeof(struct rte_flow_item_mpls),
2825                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2826         if (ret < 0)
2827                 return ret;
2828         return 0;
2829 #else
2830         return rte_flow_error_set(error, ENOTSUP,
2831                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
2832                                   "MPLS is not supported by Verbs, please"
2833                                   " update.");
2834 #endif
2835 }
2836
2837 /**
2838  * Validate NVGRE item.
2839  *
2840  * @param[in] item
2841  *   Item specification.
2842  * @param[in] item_flags
2843  *   Bit flags to mark detected items.
2844  * @param[in] target_protocol
2845  *   The next protocol in the previous item.
2846  * @param[out] error
2847  *   Pointer to error structure.
2848  *
2849  * @return
2850  *   0 on success, a negative errno value otherwise and rte_errno is set.
2851  */
2852 int
2853 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2854                               uint64_t item_flags,
2855                               uint8_t target_protocol,
2856                               struct rte_flow_error *error)
2857 {
2858         const struct rte_flow_item_nvgre *mask = item->mask;
2859         int ret;
2860
2861         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2862                 return rte_flow_error_set(error, EINVAL,
2863                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2864                                           "protocol filtering not compatible"
2865                                           " with this GRE layer");
2866         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2867                 return rte_flow_error_set(error, ENOTSUP,
2868                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2869                                           "multiple tunnel layers not"
2870                                           " supported");
2871         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2872                 return rte_flow_error_set(error, ENOTSUP,
2873                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2874                                           "L3 Layer is missing");
2875         if (!mask)
2876                 mask = &rte_flow_item_nvgre_mask;
2877         ret = mlx5_flow_item_acceptable
2878                 (item, (const uint8_t *)mask,
2879                  (const uint8_t *)&rte_flow_item_nvgre_mask,
2880                  sizeof(struct rte_flow_item_nvgre),
2881                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2882         if (ret < 0)
2883                 return ret;
2884         return 0;
2885 }
2886
2887 /**
2888  * Validate eCPRI item.
2889  *
2890  * @param[in] item
2891  *   Item specification.
2892  * @param[in] item_flags
2893  *   Bit-fields that holds the items detected until now.
2894  * @param[in] last_item
2895  *   Previous validated item in the pattern items.
2896  * @param[in] ether_type
2897  *   Type in the ethernet layer header (including dot1q).
2898  * @param[in] acc_mask
2899  *   Acceptable mask, if NULL default internal default mask
2900  *   will be used to check whether item fields are supported.
2901  * @param[out] error
2902  *   Pointer to error structure.
2903  *
2904  * @return
2905  *   0 on success, a negative errno value otherwise and rte_errno is set.
2906  */
2907 int
2908 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
2909                               uint64_t item_flags,
2910                               uint64_t last_item,
2911                               uint16_t ether_type,
2912                               const struct rte_flow_item_ecpri *acc_mask,
2913                               struct rte_flow_error *error)
2914 {
2915         const struct rte_flow_item_ecpri *mask = item->mask;
2916         const struct rte_flow_item_ecpri nic_mask = {
2917                 .hdr = {
2918                         .common = {
2919                                 .u32 =
2920                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
2921                                         .type = 0xFF,
2922                                         }).u32),
2923                         },
2924                         .dummy[0] = 0xFFFFFFFF,
2925                 },
2926         };
2927         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
2928                                         MLX5_FLOW_LAYER_OUTER_VLAN);
2929         struct rte_flow_item_ecpri mask_lo;
2930
2931         if (!(last_item & outer_l2_vlan) &&
2932             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
2933                 return rte_flow_error_set(error, EINVAL,
2934                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2935                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
2936         if ((last_item & outer_l2_vlan) && ether_type &&
2937             ether_type != RTE_ETHER_TYPE_ECPRI)
2938                 return rte_flow_error_set(error, EINVAL,
2939                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2940                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
2941         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2942                 return rte_flow_error_set(error, EINVAL,
2943                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2944                                           "eCPRI with tunnel is not supported right now");
2945         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
2946                 return rte_flow_error_set(error, ENOTSUP,
2947                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2948                                           "multiple L3 layers not supported");
2949         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
2950                 return rte_flow_error_set(error, EINVAL,
2951                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2952                                           "eCPRI cannot coexist with a TCP layer");
2953         /* In specification, eCPRI could be over UDP layer. */
2954         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
2955                 return rte_flow_error_set(error, EINVAL,
2956                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2957                                           "eCPRI over UDP layer is not yet supported right now");
2958         /* Mask for type field in common header could be zero. */
2959         if (!mask)
2960                 mask = &rte_flow_item_ecpri_mask;
2961         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
2962         /* Input mask is in big-endian format. */
2963         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
2964                 return rte_flow_error_set(error, EINVAL,
2965                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2966                                           "partial mask is not supported for protocol");
2967         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
2968                 return rte_flow_error_set(error, EINVAL,
2969                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2970                                           "message header mask must be after a type mask");
2971         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2972                                          acc_mask ? (const uint8_t *)acc_mask
2973                                                   : (const uint8_t *)&nic_mask,
2974                                          sizeof(struct rte_flow_item_ecpri),
2975                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2976 }
2977
2978 /**
2979  * Release resource related QUEUE/RSS action split.
2980  *
2981  * @param dev
2982  *   Pointer to Ethernet device.
2983  * @param flow
2984  *   Flow to release id's from.
2985  */
2986 static void
2987 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2988                              struct rte_flow *flow)
2989 {
2990         struct mlx5_priv *priv = dev->data->dev_private;
2991         uint32_t handle_idx;
2992         struct mlx5_flow_handle *dev_handle;
2993
2994         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
2995                        handle_idx, dev_handle, next)
2996                 if (dev_handle->split_flow_id)
2997                         mlx5_ipool_free(priv->sh->ipool
2998                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
2999                                         dev_handle->split_flow_id);
3000 }
3001
3002 static int
3003 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3004                    const struct rte_flow_attr *attr __rte_unused,
3005                    const struct rte_flow_item items[] __rte_unused,
3006                    const struct rte_flow_action actions[] __rte_unused,
3007                    bool external __rte_unused,
3008                    int hairpin __rte_unused,
3009                    struct rte_flow_error *error)
3010 {
3011         return rte_flow_error_set(error, ENOTSUP,
3012                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3013 }
3014
3015 static struct mlx5_flow *
3016 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3017                   const struct rte_flow_attr *attr __rte_unused,
3018                   const struct rte_flow_item items[] __rte_unused,
3019                   const struct rte_flow_action actions[] __rte_unused,
3020                   struct rte_flow_error *error)
3021 {
3022         rte_flow_error_set(error, ENOTSUP,
3023                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3024         return NULL;
3025 }
3026
3027 static int
3028 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3029                     struct mlx5_flow *dev_flow __rte_unused,
3030                     const struct rte_flow_attr *attr __rte_unused,
3031                     const struct rte_flow_item items[] __rte_unused,
3032                     const struct rte_flow_action actions[] __rte_unused,
3033                     struct rte_flow_error *error)
3034 {
3035         return rte_flow_error_set(error, ENOTSUP,
3036                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3037 }
3038
3039 static int
3040 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3041                 struct rte_flow *flow __rte_unused,
3042                 struct rte_flow_error *error)
3043 {
3044         return rte_flow_error_set(error, ENOTSUP,
3045                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3046 }
3047
3048 static void
3049 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3050                  struct rte_flow *flow __rte_unused)
3051 {
3052 }
3053
3054 static void
3055 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3056                   struct rte_flow *flow __rte_unused)
3057 {
3058 }
3059
3060 static int
3061 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3062                 struct rte_flow *flow __rte_unused,
3063                 const struct rte_flow_action *actions __rte_unused,
3064                 void *data __rte_unused,
3065                 struct rte_flow_error *error)
3066 {
3067         return rte_flow_error_set(error, ENOTSUP,
3068                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3069 }
3070
3071 static int
3072 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3073                       uint32_t domains __rte_unused,
3074                       uint32_t flags __rte_unused)
3075 {
3076         return 0;
3077 }
3078
3079 /* Void driver to protect from null pointer reference. */
3080 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3081         .validate = flow_null_validate,
3082         .prepare = flow_null_prepare,
3083         .translate = flow_null_translate,
3084         .apply = flow_null_apply,
3085         .remove = flow_null_remove,
3086         .destroy = flow_null_destroy,
3087         .query = flow_null_query,
3088         .sync_domain = flow_null_sync_domain,
3089 };
3090
3091 /**
3092  * Select flow driver type according to flow attributes and device
3093  * configuration.
3094  *
3095  * @param[in] dev
3096  *   Pointer to the dev structure.
3097  * @param[in] attr
3098  *   Pointer to the flow attributes.
3099  *
3100  * @return
3101  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3102  */
3103 static enum mlx5_flow_drv_type
3104 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3105 {
3106         struct mlx5_priv *priv = dev->data->dev_private;
3107         /* The OS can determine first a specific flow type (DV, VERBS) */
3108         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3109
3110         if (type != MLX5_FLOW_TYPE_MAX)
3111                 return type;
3112         /* If no OS specific type - continue with DV/VERBS selection */
3113         if (attr->transfer && priv->config.dv_esw_en)
3114                 type = MLX5_FLOW_TYPE_DV;
3115         if (!attr->transfer)
3116                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3117                                                  MLX5_FLOW_TYPE_VERBS;
3118         return type;
3119 }
3120
3121 #define flow_get_drv_ops(type) flow_drv_ops[type]
3122
3123 /**
3124  * Flow driver validation API. This abstracts calling driver specific functions.
3125  * The type of flow driver is determined according to flow attributes.
3126  *
3127  * @param[in] dev
3128  *   Pointer to the dev structure.
3129  * @param[in] attr
3130  *   Pointer to the flow attributes.
3131  * @param[in] items
3132  *   Pointer to the list of items.
3133  * @param[in] actions
3134  *   Pointer to the list of actions.
3135  * @param[in] external
3136  *   This flow rule is created by request external to PMD.
3137  * @param[in] hairpin
3138  *   Number of hairpin TX actions, 0 means classic flow.
3139  * @param[out] error
3140  *   Pointer to the error structure.
3141  *
3142  * @return
3143  *   0 on success, a negative errno value otherwise and rte_errno is set.
3144  */
3145 static inline int
3146 flow_drv_validate(struct rte_eth_dev *dev,
3147                   const struct rte_flow_attr *attr,
3148                   const struct rte_flow_item items[],
3149                   const struct rte_flow_action actions[],
3150                   bool external, int hairpin, struct rte_flow_error *error)
3151 {
3152         const struct mlx5_flow_driver_ops *fops;
3153         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3154
3155         fops = flow_get_drv_ops(type);
3156         return fops->validate(dev, attr, items, actions, external,
3157                               hairpin, error);
3158 }
3159
3160 /**
3161  * Flow driver preparation API. This abstracts calling driver specific
3162  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3163  * calculates the size of memory required for device flow, allocates the memory,
3164  * initializes the device flow and returns the pointer.
3165  *
3166  * @note
3167  *   This function initializes device flow structure such as dv or verbs in
3168  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3169  *   rest. For example, adding returning device flow to flow->dev_flow list and
3170  *   setting backward reference to the flow should be done out of this function.
3171  *   layers field is not filled either.
3172  *
3173  * @param[in] dev
3174  *   Pointer to the dev structure.
3175  * @param[in] attr
3176  *   Pointer to the flow attributes.
3177  * @param[in] items
3178  *   Pointer to the list of items.
3179  * @param[in] actions
3180  *   Pointer to the list of actions.
3181  * @param[in] flow_idx
3182  *   This memory pool index to the flow.
3183  * @param[out] error
3184  *   Pointer to the error structure.
3185  *
3186  * @return
3187  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3188  */
3189 static inline struct mlx5_flow *
3190 flow_drv_prepare(struct rte_eth_dev *dev,
3191                  const struct rte_flow *flow,
3192                  const struct rte_flow_attr *attr,
3193                  const struct rte_flow_item items[],
3194                  const struct rte_flow_action actions[],
3195                  uint32_t flow_idx,
3196                  struct rte_flow_error *error)
3197 {
3198         const struct mlx5_flow_driver_ops *fops;
3199         enum mlx5_flow_drv_type type = flow->drv_type;
3200         struct mlx5_flow *mlx5_flow = NULL;
3201
3202         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3203         fops = flow_get_drv_ops(type);
3204         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3205         if (mlx5_flow)
3206                 mlx5_flow->flow_idx = flow_idx;
3207         return mlx5_flow;
3208 }
3209
3210 /**
3211  * Flow driver translation API. This abstracts calling driver specific
3212  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3213  * translates a generic flow into a driver flow. flow_drv_prepare() must
3214  * precede.
3215  *
3216  * @note
3217  *   dev_flow->layers could be filled as a result of parsing during translation
3218  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3219  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3220  *   flow->actions could be overwritten even though all the expanded dev_flows
3221  *   have the same actions.
3222  *
3223  * @param[in] dev
3224  *   Pointer to the rte dev structure.
3225  * @param[in, out] dev_flow
3226  *   Pointer to the mlx5 flow.
3227  * @param[in] attr
3228  *   Pointer to the flow attributes.
3229  * @param[in] items
3230  *   Pointer to the list of items.
3231  * @param[in] actions
3232  *   Pointer to the list of actions.
3233  * @param[out] error
3234  *   Pointer to the error structure.
3235  *
3236  * @return
3237  *   0 on success, a negative errno value otherwise and rte_errno is set.
3238  */
3239 static inline int
3240 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3241                    const struct rte_flow_attr *attr,
3242                    const struct rte_flow_item items[],
3243                    const struct rte_flow_action actions[],
3244                    struct rte_flow_error *error)
3245 {
3246         const struct mlx5_flow_driver_ops *fops;
3247         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3248
3249         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3250         fops = flow_get_drv_ops(type);
3251         return fops->translate(dev, dev_flow, attr, items, actions, error);
3252 }
3253
3254 /**
3255  * Flow driver apply API. This abstracts calling driver specific functions.
3256  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3257  * translated driver flows on to device. flow_drv_translate() must precede.
3258  *
3259  * @param[in] dev
3260  *   Pointer to Ethernet device structure.
3261  * @param[in, out] flow
3262  *   Pointer to flow structure.
3263  * @param[out] error
3264  *   Pointer to error structure.
3265  *
3266  * @return
3267  *   0 on success, a negative errno value otherwise and rte_errno is set.
3268  */
3269 static inline int
3270 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3271                struct rte_flow_error *error)
3272 {
3273         const struct mlx5_flow_driver_ops *fops;
3274         enum mlx5_flow_drv_type type = flow->drv_type;
3275
3276         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3277         fops = flow_get_drv_ops(type);
3278         return fops->apply(dev, flow, error);
3279 }
3280
3281 /**
3282  * Flow driver destroy API. This abstracts calling driver specific functions.
3283  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3284  * on device and releases resources of the flow.
3285  *
3286  * @param[in] dev
3287  *   Pointer to Ethernet device.
3288  * @param[in, out] flow
3289  *   Pointer to flow structure.
3290  */
3291 static inline void
3292 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3293 {
3294         const struct mlx5_flow_driver_ops *fops;
3295         enum mlx5_flow_drv_type type = flow->drv_type;
3296
3297         flow_mreg_split_qrss_release(dev, flow);
3298         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3299         fops = flow_get_drv_ops(type);
3300         fops->destroy(dev, flow);
3301 }
3302
3303 /**
3304  * Get RSS action from the action list.
3305  *
3306  * @param[in] actions
3307  *   Pointer to the list of actions.
3308  *
3309  * @return
3310  *   Pointer to the RSS action if exist, else return NULL.
3311  */
3312 static const struct rte_flow_action_rss*
3313 flow_get_rss_action(const struct rte_flow_action actions[])
3314 {
3315         const struct rte_flow_action_rss *rss = NULL;
3316
3317         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3318                 switch (actions->type) {
3319                 case RTE_FLOW_ACTION_TYPE_RSS:
3320                         rss = actions->conf;
3321                         break;
3322                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3323                 {
3324                         const struct rte_flow_action_sample *sample =
3325                                                                 actions->conf;
3326                         const struct rte_flow_action *act = sample->actions;
3327                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3328                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3329                                         rss = act->conf;
3330                         break;
3331                 }
3332                 default:
3333                         break;
3334                 }
3335         }
3336         return rss;
3337 }
3338
3339 /**
3340  * Get ASO age action by index.
3341  *
3342  * @param[in] dev
3343  *   Pointer to the Ethernet device structure.
3344  * @param[in] age_idx
3345  *   Index to the ASO age action.
3346  *
3347  * @return
3348  *   The specified ASO age action.
3349  */
3350 struct mlx5_aso_age_action*
3351 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3352 {
3353         uint16_t pool_idx = age_idx & UINT16_MAX;
3354         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3355         struct mlx5_priv *priv = dev->data->dev_private;
3356         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3357         struct mlx5_aso_age_pool *pool = mng->pools[pool_idx];
3358
3359         return &pool->actions[offset - 1];
3360 }
3361
3362 /* maps shared action to translated non shared in some actions array */
3363 struct mlx5_translated_shared_action {
3364         struct rte_flow_shared_action *action; /**< Shared action */
3365         int index; /**< Index in related array of rte_flow_action */
3366 };
3367
3368 /**
3369  * Translates actions of type RTE_FLOW_ACTION_TYPE_SHARED to related
3370  * non shared action if translation possible.
3371  * This functionality used to run same execution path for both shared & non
3372  * shared actions on flow create. All necessary preparations for shared
3373  * action handling should be preformed on *shared* actions list returned
3374  * from this call.
3375  *
3376  * @param[in] dev
3377  *   Pointer to Ethernet device.
3378  * @param[in] actions
3379  *   List of actions to translate.
3380  * @param[out] shared
3381  *   List to store translated shared actions.
3382  * @param[in, out] shared_n
3383  *   Size of *shared* array. On return should be updated with number of shared
3384  *   actions retrieved from the *actions* list.
3385  * @param[out] translated_actions
3386  *   List of actions where all shared actions were translated to non shared
3387  *   if possible. NULL if no translation took place.
3388  * @param[out] error
3389  *   Pointer to the error structure.
3390  *
3391  * @return
3392  *   0 on success, a negative errno value otherwise and rte_errno is set.
3393  */
3394 static int
3395 flow_shared_actions_translate(struct rte_eth_dev *dev,
3396                               const struct rte_flow_action actions[],
3397                               struct mlx5_translated_shared_action *shared,
3398                               int *shared_n,
3399                               struct rte_flow_action **translated_actions,
3400                               struct rte_flow_error *error)
3401 {
3402         struct mlx5_priv *priv = dev->data->dev_private;
3403         struct rte_flow_action *translated = NULL;
3404         size_t actions_size;
3405         int n;
3406         int copied_n = 0;
3407         struct mlx5_translated_shared_action *shared_end = NULL;
3408
3409         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3410                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_SHARED)
3411                         continue;
3412                 if (copied_n == *shared_n) {
3413                         return rte_flow_error_set
3414                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3415                                  NULL, "too many shared actions");
3416                 }
3417                 rte_memcpy(&shared[copied_n].action, &actions[n].conf,
3418                            sizeof(actions[n].conf));
3419                 shared[copied_n].index = n;
3420                 copied_n++;
3421         }
3422         n++;
3423         *shared_n = copied_n;
3424         if (!copied_n)
3425                 return 0;
3426         actions_size = sizeof(struct rte_flow_action) * n;
3427         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3428         if (!translated) {
3429                 rte_errno = ENOMEM;
3430                 return -ENOMEM;
3431         }
3432         memcpy(translated, actions, actions_size);
3433         for (shared_end = shared + copied_n; shared < shared_end; shared++) {
3434                 struct mlx5_shared_action_rss *shared_rss;
3435                 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
3436                 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
3437                 uint32_t idx = act_idx & ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET)
3438                                                                            - 1);
3439
3440                 switch (type) {
3441                 case MLX5_SHARED_ACTION_TYPE_RSS:
3442                         shared_rss = mlx5_ipool_get
3443                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3444                         translated[shared->index].type =
3445                                 RTE_FLOW_ACTION_TYPE_RSS;
3446                         translated[shared->index].conf =
3447                                 &shared_rss->origin;
3448                         break;
3449                 case MLX5_SHARED_ACTION_TYPE_AGE:
3450                         if (priv->sh->flow_hit_aso_en) {
3451                                 translated[shared->index].type =
3452                                         (enum rte_flow_action_type)
3453                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3454                                 translated[shared->index].conf =
3455                                                          (void *)(uintptr_t)idx;
3456                                 break;
3457                         }
3458                         /* Fall-through */
3459                 default:
3460                         mlx5_free(translated);
3461                         return rte_flow_error_set
3462                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3463                                  NULL, "invalid shared action type");
3464                 }
3465         }
3466         *translated_actions = translated;
3467         return 0;
3468 }
3469
3470 /**
3471  * Get Shared RSS action from the action list.
3472  *
3473  * @param[in] dev
3474  *   Pointer to Ethernet device.
3475  * @param[in] shared
3476  *   Pointer to the list of actions.
3477  * @param[in] shared_n
3478  *   Actions list length.
3479  *
3480  * @return
3481  *   The MLX5 RSS action ID if exists, otherwise return 0.
3482  */
3483 static uint32_t
3484 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3485                            struct mlx5_translated_shared_action *shared,
3486                            int shared_n)
3487 {
3488         struct mlx5_translated_shared_action *shared_end;
3489         struct mlx5_priv *priv = dev->data->dev_private;
3490         struct mlx5_shared_action_rss *shared_rss;
3491
3492
3493         for (shared_end = shared + shared_n; shared < shared_end; shared++) {
3494                 uint32_t act_idx = (uint32_t)(uintptr_t)shared->action;
3495                 uint32_t type = act_idx >> MLX5_SHARED_ACTION_TYPE_OFFSET;
3496                 uint32_t idx = act_idx &
3497                                    ((1u << MLX5_SHARED_ACTION_TYPE_OFFSET) - 1);
3498                 switch (type) {
3499                 case MLX5_SHARED_ACTION_TYPE_RSS:
3500                         shared_rss = mlx5_ipool_get
3501                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3502                                                                            idx);
3503                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3504                                            __ATOMIC_RELAXED);
3505                         return idx;
3506                 default:
3507                         break;
3508                 }
3509         }
3510         return 0;
3511 }
3512
3513 static unsigned int
3514 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
3515 {
3516         const struct rte_flow_item *item;
3517         unsigned int has_vlan = 0;
3518
3519         for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
3520                 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
3521                         has_vlan = 1;
3522                         break;
3523                 }
3524         }
3525         if (has_vlan)
3526                 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
3527                                        MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
3528         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3529                                MLX5_EXPANSION_ROOT_OUTER;
3530 }
3531
3532 /**
3533  *  Get layer flags from the prefix flow.
3534  *
3535  *  Some flows may be split to several subflows, the prefix subflow gets the
3536  *  match items and the suffix sub flow gets the actions.
3537  *  Some actions need the user defined match item flags to get the detail for
3538  *  the action.
3539  *  This function helps the suffix flow to get the item layer flags from prefix
3540  *  subflow.
3541  *
3542  * @param[in] dev_flow
3543  *   Pointer the created preifx subflow.
3544  *
3545  * @return
3546  *   The layers get from prefix subflow.
3547  */
3548 static inline uint64_t
3549 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3550 {
3551         uint64_t layers = 0;
3552
3553         /*
3554          * Layers bits could be localization, but usually the compiler will
3555          * help to do the optimization work for source code.
3556          * If no decap actions, use the layers directly.
3557          */
3558         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3559                 return dev_flow->handle->layers;
3560         /* Convert L3 layers with decap action. */
3561         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3562                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3563         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3564                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3565         /* Convert L4 layers with decap action.  */
3566         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3567                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3568         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3569                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3570         return layers;
3571 }
3572
3573 /**
3574  * Get metadata split action information.
3575  *
3576  * @param[in] actions
3577  *   Pointer to the list of actions.
3578  * @param[out] qrss
3579  *   Pointer to the return pointer.
3580  * @param[out] qrss_type
3581  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3582  *   if no QUEUE/RSS is found.
3583  * @param[out] encap_idx
3584  *   Pointer to the index of the encap action if exists, otherwise the last
3585  *   action index.
3586  *
3587  * @return
3588  *   Total number of actions.
3589  */
3590 static int
3591 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3592                                        const struct rte_flow_action **qrss,
3593                                        int *encap_idx)
3594 {
3595         const struct rte_flow_action_raw_encap *raw_encap;
3596         int actions_n = 0;
3597         int raw_decap_idx = -1;
3598
3599         *encap_idx = -1;
3600         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3601                 switch (actions->type) {
3602                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3603                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3604                         *encap_idx = actions_n;
3605                         break;
3606                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3607                         raw_decap_idx = actions_n;
3608                         break;
3609                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3610                         raw_encap = actions->conf;
3611                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3612                                 *encap_idx = raw_decap_idx != -1 ?
3613                                                       raw_decap_idx : actions_n;
3614                         break;
3615                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3616                 case RTE_FLOW_ACTION_TYPE_RSS:
3617                         *qrss = actions;
3618                         break;
3619                 default:
3620                         break;
3621                 }
3622                 actions_n++;
3623         }
3624         if (*encap_idx == -1)
3625                 *encap_idx = actions_n;
3626         /* Count RTE_FLOW_ACTION_TYPE_END. */
3627         return actions_n + 1;
3628 }
3629
3630 /**
3631  * Check meter action from the action list.
3632  *
3633  * @param[in] actions
3634  *   Pointer to the list of actions.
3635  * @param[out] mtr
3636  *   Pointer to the meter exist flag.
3637  *
3638  * @return
3639  *   Total number of actions.
3640  */
3641 static int
3642 flow_check_meter_action(const struct rte_flow_action actions[], uint32_t *mtr)
3643 {
3644         int actions_n = 0;
3645
3646         MLX5_ASSERT(mtr);
3647         *mtr = 0;
3648         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3649                 switch (actions->type) {
3650                 case RTE_FLOW_ACTION_TYPE_METER:
3651                         *mtr = 1;
3652                         break;
3653                 default:
3654                         break;
3655                 }
3656                 actions_n++;
3657         }
3658         /* Count RTE_FLOW_ACTION_TYPE_END. */
3659         return actions_n + 1;
3660 }
3661
3662 /**
3663  * Check if the flow should be split due to hairpin.
3664  * The reason for the split is that in current HW we can't
3665  * support encap and push-vlan on Rx, so if a flow contains
3666  * these actions we move it to Tx.
3667  *
3668  * @param dev
3669  *   Pointer to Ethernet device.
3670  * @param[in] attr
3671  *   Flow rule attributes.
3672  * @param[in] actions
3673  *   Associated actions (list terminated by the END action).
3674  *
3675  * @return
3676  *   > 0 the number of actions and the flow should be split,
3677  *   0 when no split required.
3678  */
3679 static int
3680 flow_check_hairpin_split(struct rte_eth_dev *dev,
3681                          const struct rte_flow_attr *attr,
3682                          const struct rte_flow_action actions[])
3683 {
3684         int queue_action = 0;
3685         int action_n = 0;
3686         int split = 0;
3687         const struct rte_flow_action_queue *queue;
3688         const struct rte_flow_action_rss *rss;
3689         const struct rte_flow_action_raw_encap *raw_encap;
3690         const struct rte_eth_hairpin_conf *conf;
3691
3692         if (!attr->ingress)
3693                 return 0;
3694         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3695                 switch (actions->type) {
3696                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3697                         queue = actions->conf;
3698                         if (queue == NULL)
3699                                 return 0;
3700                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
3701                         if (conf == NULL || conf->tx_explicit != 0)
3702                                 return 0;
3703                         queue_action = 1;
3704                         action_n++;
3705                         break;
3706                 case RTE_FLOW_ACTION_TYPE_RSS:
3707                         rss = actions->conf;
3708                         if (rss == NULL || rss->queue_num == 0)
3709                                 return 0;
3710                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
3711                         if (conf == NULL || conf->tx_explicit != 0)
3712                                 return 0;
3713                         queue_action = 1;
3714                         action_n++;
3715                         break;
3716                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3717                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3718                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
3719                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
3720                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
3721                         split++;
3722                         action_n++;
3723                         break;
3724                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3725                         raw_encap = actions->conf;
3726                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3727                                 split++;
3728                         action_n++;
3729                         break;
3730                 default:
3731                         action_n++;
3732                         break;
3733                 }
3734         }
3735         if (split && queue_action)
3736                 return action_n;
3737         return 0;
3738 }
3739
3740 /* Declare flow create/destroy prototype in advance. */
3741 static uint32_t
3742 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
3743                  const struct rte_flow_attr *attr,
3744                  const struct rte_flow_item items[],
3745                  const struct rte_flow_action actions[],
3746                  bool external, struct rte_flow_error *error);
3747
3748 static void
3749 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
3750                   uint32_t flow_idx);
3751
3752 int
3753 flow_dv_mreg_match_cb(struct mlx5_hlist *list __rte_unused,
3754                       struct mlx5_hlist_entry *entry,
3755                       uint64_t key, void *cb_ctx __rte_unused)
3756 {
3757         struct mlx5_flow_mreg_copy_resource *mcp_res =
3758                 container_of(entry, typeof(*mcp_res), hlist_ent);
3759
3760         return mcp_res->mark_id != key;
3761 }
3762
3763 struct mlx5_hlist_entry *
3764 flow_dv_mreg_create_cb(struct mlx5_hlist *list, uint64_t key,
3765                        void *cb_ctx)
3766 {
3767         struct rte_eth_dev *dev = list->ctx;
3768         struct mlx5_priv *priv = dev->data->dev_private;
3769         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3770         struct mlx5_flow_mreg_copy_resource *mcp_res;
3771         struct rte_flow_error *error = ctx->error;
3772         uint32_t idx = 0;
3773         int ret;
3774         uint32_t mark_id = key;
3775         struct rte_flow_attr attr = {
3776                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3777                 .ingress = 1,
3778         };
3779         struct mlx5_rte_flow_item_tag tag_spec = {
3780                 .data = mark_id,
3781         };
3782         struct rte_flow_item items[] = {
3783                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
3784         };
3785         struct rte_flow_action_mark ftag = {
3786                 .id = mark_id,
3787         };
3788         struct mlx5_flow_action_copy_mreg cp_mreg = {
3789                 .dst = REG_B,
3790                 .src = REG_NON,
3791         };
3792         struct rte_flow_action_jump jump = {
3793                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3794         };
3795         struct rte_flow_action actions[] = {
3796                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
3797         };
3798
3799         /* Fill the register fileds in the flow. */
3800         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3801         if (ret < 0)
3802                 return NULL;
3803         tag_spec.id = ret;
3804         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3805         if (ret < 0)
3806                 return NULL;
3807         cp_mreg.src = ret;
3808         /* Provide the full width of FLAG specific value. */
3809         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
3810                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
3811         /* Build a new flow. */
3812         if (mark_id != MLX5_DEFAULT_COPY_ID) {
3813                 items[0] = (struct rte_flow_item){
3814                         .type = (enum rte_flow_item_type)
3815                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3816                         .spec = &tag_spec,
3817                 };
3818                 items[1] = (struct rte_flow_item){
3819                         .type = RTE_FLOW_ITEM_TYPE_END,
3820                 };
3821                 actions[0] = (struct rte_flow_action){
3822                         .type = (enum rte_flow_action_type)
3823                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
3824                         .conf = &ftag,
3825                 };
3826                 actions[1] = (struct rte_flow_action){
3827                         .type = (enum rte_flow_action_type)
3828                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3829                         .conf = &cp_mreg,
3830                 };
3831                 actions[2] = (struct rte_flow_action){
3832                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3833                         .conf = &jump,
3834                 };
3835                 actions[3] = (struct rte_flow_action){
3836                         .type = RTE_FLOW_ACTION_TYPE_END,
3837                 };
3838         } else {
3839                 /* Default rule, wildcard match. */
3840                 attr.priority = MLX5_FLOW_PRIO_RSVD;
3841                 items[0] = (struct rte_flow_item){
3842                         .type = RTE_FLOW_ITEM_TYPE_END,
3843                 };
3844                 actions[0] = (struct rte_flow_action){
3845                         .type = (enum rte_flow_action_type)
3846                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3847                         .conf = &cp_mreg,
3848                 };
3849                 actions[1] = (struct rte_flow_action){
3850                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
3851                         .conf = &jump,
3852                 };
3853                 actions[2] = (struct rte_flow_action){
3854                         .type = RTE_FLOW_ACTION_TYPE_END,
3855                 };
3856         }
3857         /* Build a new entry. */
3858         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
3859         if (!mcp_res) {
3860                 rte_errno = ENOMEM;
3861                 return NULL;
3862         }
3863         mcp_res->idx = idx;
3864         mcp_res->mark_id = mark_id;
3865         /*
3866          * The copy Flows are not included in any list. There
3867          * ones are referenced from other Flows and can not
3868          * be applied, removed, deleted in ardbitrary order
3869          * by list traversing.
3870          */
3871         mcp_res->rix_flow = flow_list_create(dev, NULL, &attr, items,
3872                                          actions, false, error);
3873         if (!mcp_res->rix_flow) {
3874                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
3875                 return NULL;
3876         }
3877         return &mcp_res->hlist_ent;
3878 }
3879
3880 /**
3881  * Add a flow of copying flow metadata registers in RX_CP_TBL.
3882  *
3883  * As mark_id is unique, if there's already a registered flow for the mark_id,
3884  * return by increasing the reference counter of the resource. Otherwise, create
3885  * the resource (mcp_res) and flow.
3886  *
3887  * Flow looks like,
3888  *   - If ingress port is ANY and reg_c[1] is mark_id,
3889  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
3890  *
3891  * For default flow (zero mark_id), flow is like,
3892  *   - If ingress port is ANY,
3893  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
3894  *
3895  * @param dev
3896  *   Pointer to Ethernet device.
3897  * @param mark_id
3898  *   ID of MARK action, zero means default flow for META.
3899  * @param[out] error
3900  *   Perform verbose error reporting if not NULL.
3901  *
3902  * @return
3903  *   Associated resource on success, NULL otherwise and rte_errno is set.
3904  */
3905 static struct mlx5_flow_mreg_copy_resource *
3906 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
3907                           struct rte_flow_error *error)
3908 {
3909         struct mlx5_priv *priv = dev->data->dev_private;
3910         struct mlx5_hlist_entry *entry;
3911         struct mlx5_flow_cb_ctx ctx = {
3912                 .dev = dev,
3913                 .error = error,
3914         };
3915
3916         /* Check if already registered. */
3917         MLX5_ASSERT(priv->mreg_cp_tbl);
3918         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
3919         if (!entry)
3920                 return NULL;
3921         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
3922                             hlist_ent);
3923 }
3924
3925 void
3926 flow_dv_mreg_remove_cb(struct mlx5_hlist *list, struct mlx5_hlist_entry *entry)
3927 {
3928         struct mlx5_flow_mreg_copy_resource *mcp_res =
3929                 container_of(entry, typeof(*mcp_res), hlist_ent);
3930         struct rte_eth_dev *dev = list->ctx;
3931         struct mlx5_priv *priv = dev->data->dev_private;
3932
3933         MLX5_ASSERT(mcp_res->rix_flow);
3934         flow_list_destroy(dev, NULL, mcp_res->rix_flow);
3935         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
3936 }
3937
3938 /**
3939  * Release flow in RX_CP_TBL.
3940  *
3941  * @param dev
3942  *   Pointer to Ethernet device.
3943  * @flow
3944  *   Parent flow for wich copying is provided.
3945  */
3946 static void
3947 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
3948                           struct rte_flow *flow)
3949 {
3950         struct mlx5_flow_mreg_copy_resource *mcp_res;
3951         struct mlx5_priv *priv = dev->data->dev_private;
3952
3953         if (!flow->rix_mreg_copy)
3954                 return;
3955         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
3956                                  flow->rix_mreg_copy);
3957         if (!mcp_res || !priv->mreg_cp_tbl)
3958                 return;
3959         MLX5_ASSERT(mcp_res->rix_flow);
3960         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
3961         flow->rix_mreg_copy = 0;
3962 }
3963
3964 /**
3965  * Remove the default copy action from RX_CP_TBL.
3966  *
3967  * This functions is called in the mlx5_dev_start(). No thread safe
3968  * is guaranteed.
3969  *
3970  * @param dev
3971  *   Pointer to Ethernet device.
3972  */
3973 static void
3974 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
3975 {
3976         struct mlx5_hlist_entry *entry;
3977         struct mlx5_priv *priv = dev->data->dev_private;
3978
3979         /* Check if default flow is registered. */
3980         if (!priv->mreg_cp_tbl)
3981                 return;
3982         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl,
3983                                   MLX5_DEFAULT_COPY_ID, NULL);
3984         if (!entry)
3985                 return;
3986         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
3987 }
3988
3989 /**
3990  * Add the default copy action in in RX_CP_TBL.
3991  *
3992  * This functions is called in the mlx5_dev_start(). No thread safe
3993  * is guaranteed.
3994  *
3995  * @param dev
3996  *   Pointer to Ethernet device.
3997  * @param[out] error
3998  *   Perform verbose error reporting if not NULL.
3999  *
4000  * @return
4001  *   0 for success, negative value otherwise and rte_errno is set.
4002  */
4003 static int
4004 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4005                                   struct rte_flow_error *error)
4006 {
4007         struct mlx5_priv *priv = dev->data->dev_private;
4008         struct mlx5_flow_mreg_copy_resource *mcp_res;
4009
4010         /* Check whether extensive metadata feature is engaged. */
4011         if (!priv->config.dv_flow_en ||
4012             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4013             !mlx5_flow_ext_mreg_supported(dev) ||
4014             !priv->sh->dv_regc0_mask)
4015                 return 0;
4016         /*
4017          * Add default mreg copy flow may be called multiple time, but
4018          * only be called once in stop. Avoid register it twice.
4019          */
4020         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, MLX5_DEFAULT_COPY_ID, NULL))
4021                 return 0;
4022         mcp_res = flow_mreg_add_copy_action(dev, MLX5_DEFAULT_COPY_ID, error);
4023         if (!mcp_res)
4024                 return -rte_errno;
4025         return 0;
4026 }
4027
4028 /**
4029  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4030  *
4031  * All the flow having Q/RSS action should be split by
4032  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4033  * performs the following,
4034  *   - CQE->flow_tag := reg_c[1] (MARK)
4035  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4036  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4037  * but there should be a flow per each MARK ID set by MARK action.
4038  *
4039  * For the aforementioned reason, if there's a MARK action in flow's action
4040  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4041  * the MARK ID to CQE's flow_tag like,
4042  *   - If reg_c[1] is mark_id,
4043  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4044  *
4045  * For SET_META action which stores value in reg_c[0], as the destination is
4046  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4047  * MARK ID means the default flow. The default flow looks like,
4048  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4049  *
4050  * @param dev
4051  *   Pointer to Ethernet device.
4052  * @param flow
4053  *   Pointer to flow structure.
4054  * @param[in] actions
4055  *   Pointer to the list of actions.
4056  * @param[out] error
4057  *   Perform verbose error reporting if not NULL.
4058  *
4059  * @return
4060  *   0 on success, negative value otherwise and rte_errno is set.
4061  */
4062 static int
4063 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4064                             struct rte_flow *flow,
4065                             const struct rte_flow_action *actions,
4066                             struct rte_flow_error *error)
4067 {
4068         struct mlx5_priv *priv = dev->data->dev_private;
4069         struct mlx5_dev_config *config = &priv->config;
4070         struct mlx5_flow_mreg_copy_resource *mcp_res;
4071         const struct rte_flow_action_mark *mark;
4072
4073         /* Check whether extensive metadata feature is engaged. */
4074         if (!config->dv_flow_en ||
4075             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4076             !mlx5_flow_ext_mreg_supported(dev) ||
4077             !priv->sh->dv_regc0_mask)
4078                 return 0;
4079         /* Find MARK action. */
4080         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4081                 switch (actions->type) {
4082                 case RTE_FLOW_ACTION_TYPE_FLAG:
4083                         mcp_res = flow_mreg_add_copy_action
4084                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4085                         if (!mcp_res)
4086                                 return -rte_errno;
4087                         flow->rix_mreg_copy = mcp_res->idx;
4088                         return 0;
4089                 case RTE_FLOW_ACTION_TYPE_MARK:
4090                         mark = (const struct rte_flow_action_mark *)
4091                                 actions->conf;
4092                         mcp_res =
4093                                 flow_mreg_add_copy_action(dev, mark->id, error);
4094                         if (!mcp_res)
4095                                 return -rte_errno;
4096                         flow->rix_mreg_copy = mcp_res->idx;
4097                         return 0;
4098                 default:
4099                         break;
4100                 }
4101         }
4102         return 0;
4103 }
4104
4105 #define MLX5_MAX_SPLIT_ACTIONS 24
4106 #define MLX5_MAX_SPLIT_ITEMS 24
4107
4108 /**
4109  * Split the hairpin flow.
4110  * Since HW can't support encap and push-vlan on Rx, we move these
4111  * actions to Tx.
4112  * If the count action is after the encap then we also
4113  * move the count action. in this case the count will also measure
4114  * the outer bytes.
4115  *
4116  * @param dev
4117  *   Pointer to Ethernet device.
4118  * @param[in] actions
4119  *   Associated actions (list terminated by the END action).
4120  * @param[out] actions_rx
4121  *   Rx flow actions.
4122  * @param[out] actions_tx
4123  *   Tx flow actions..
4124  * @param[out] pattern_tx
4125  *   The pattern items for the Tx flow.
4126  * @param[out] flow_id
4127  *   The flow ID connected to this flow.
4128  *
4129  * @return
4130  *   0 on success.
4131  */
4132 static int
4133 flow_hairpin_split(struct rte_eth_dev *dev,
4134                    const struct rte_flow_action actions[],
4135                    struct rte_flow_action actions_rx[],
4136                    struct rte_flow_action actions_tx[],
4137                    struct rte_flow_item pattern_tx[],
4138                    uint32_t flow_id)
4139 {
4140         const struct rte_flow_action_raw_encap *raw_encap;
4141         const struct rte_flow_action_raw_decap *raw_decap;
4142         struct mlx5_rte_flow_action_set_tag *set_tag;
4143         struct rte_flow_action *tag_action;
4144         struct mlx5_rte_flow_item_tag *tag_item;
4145         struct rte_flow_item *item;
4146         char *addr;
4147         int encap = 0;
4148
4149         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4150                 switch (actions->type) {
4151                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4152                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4153                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4154                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4155                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4156                         rte_memcpy(actions_tx, actions,
4157                                sizeof(struct rte_flow_action));
4158                         actions_tx++;
4159                         break;
4160                 case RTE_FLOW_ACTION_TYPE_COUNT:
4161                         if (encap) {
4162                                 rte_memcpy(actions_tx, actions,
4163                                            sizeof(struct rte_flow_action));
4164                                 actions_tx++;
4165                         } else {
4166                                 rte_memcpy(actions_rx, actions,
4167                                            sizeof(struct rte_flow_action));
4168                                 actions_rx++;
4169                         }
4170                         break;
4171                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4172                         raw_encap = actions->conf;
4173                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4174                                 memcpy(actions_tx, actions,
4175                                        sizeof(struct rte_flow_action));
4176                                 actions_tx++;
4177                                 encap = 1;
4178                         } else {
4179                                 rte_memcpy(actions_rx, actions,
4180                                            sizeof(struct rte_flow_action));
4181                                 actions_rx++;
4182                         }
4183                         break;
4184                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4185                         raw_decap = actions->conf;
4186                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4187                                 memcpy(actions_tx, actions,
4188                                        sizeof(struct rte_flow_action));
4189                                 actions_tx++;
4190                         } else {
4191                                 rte_memcpy(actions_rx, actions,
4192                                            sizeof(struct rte_flow_action));
4193                                 actions_rx++;
4194                         }
4195                         break;
4196                 default:
4197                         rte_memcpy(actions_rx, actions,
4198                                    sizeof(struct rte_flow_action));
4199                         actions_rx++;
4200                         break;
4201                 }
4202         }
4203         /* Add set meta action and end action for the Rx flow. */
4204         tag_action = actions_rx;
4205         tag_action->type = (enum rte_flow_action_type)
4206                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4207         actions_rx++;
4208         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4209         actions_rx++;
4210         set_tag = (void *)actions_rx;
4211         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
4212         MLX5_ASSERT(set_tag->id > REG_NON);
4213         set_tag->data = flow_id;
4214         tag_action->conf = set_tag;
4215         /* Create Tx item list. */
4216         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4217         addr = (void *)&pattern_tx[2];
4218         item = pattern_tx;
4219         item->type = (enum rte_flow_item_type)
4220                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4221         tag_item = (void *)addr;
4222         tag_item->data = flow_id;
4223         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4224         MLX5_ASSERT(set_tag->id > REG_NON);
4225         item->spec = tag_item;
4226         addr += sizeof(struct mlx5_rte_flow_item_tag);
4227         tag_item = (void *)addr;
4228         tag_item->data = UINT32_MAX;
4229         tag_item->id = UINT16_MAX;
4230         item->mask = tag_item;
4231         item->last = NULL;
4232         item++;
4233         item->type = RTE_FLOW_ITEM_TYPE_END;
4234         return 0;
4235 }
4236
4237 /**
4238  * The last stage of splitting chain, just creates the subflow
4239  * without any modification.
4240  *
4241  * @param[in] dev
4242  *   Pointer to Ethernet device.
4243  * @param[in] flow
4244  *   Parent flow structure pointer.
4245  * @param[in, out] sub_flow
4246  *   Pointer to return the created subflow, may be NULL.
4247  * @param[in] attr
4248  *   Flow rule attributes.
4249  * @param[in] items
4250  *   Pattern specification (list terminated by the END pattern item).
4251  * @param[in] actions
4252  *   Associated actions (list terminated by the END action).
4253  * @param[in] flow_split_info
4254  *   Pointer to flow split info structure.
4255  * @param[out] error
4256  *   Perform verbose error reporting if not NULL.
4257  * @return
4258  *   0 on success, negative value otherwise
4259  */
4260 static int
4261 flow_create_split_inner(struct rte_eth_dev *dev,
4262                         struct rte_flow *flow,
4263                         struct mlx5_flow **sub_flow,
4264                         const struct rte_flow_attr *attr,
4265                         const struct rte_flow_item items[],
4266                         const struct rte_flow_action actions[],
4267                         struct mlx5_flow_split_info *flow_split_info,
4268                         struct rte_flow_error *error)
4269 {
4270         struct mlx5_flow *dev_flow;
4271
4272         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4273                                     flow_split_info->flow_idx, error);
4274         if (!dev_flow)
4275                 return -rte_errno;
4276         dev_flow->flow = flow;
4277         dev_flow->external = flow_split_info->external;
4278         dev_flow->skip_scale = flow_split_info->skip_scale;
4279         /* Subflow object was created, we must include one in the list. */
4280         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4281                       dev_flow->handle, next);
4282         /*
4283          * If dev_flow is as one of the suffix flow, some actions in suffix
4284          * flow may need some user defined item layer flags, and pass the
4285          * Metadate rxq mark flag to suffix flow as well.
4286          */
4287         if (flow_split_info->prefix_layers)
4288                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4289         if (flow_split_info->prefix_mark)
4290                 dev_flow->handle->mark = 1;
4291         if (sub_flow)
4292                 *sub_flow = dev_flow;
4293         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4294 }
4295
4296 /**
4297  * Split the meter flow.
4298  *
4299  * As meter flow will split to three sub flow, other than meter
4300  * action, the other actions make sense to only meter accepts
4301  * the packet. If it need to be dropped, no other additional
4302  * actions should be take.
4303  *
4304  * One kind of special action which decapsulates the L3 tunnel
4305  * header will be in the prefix sub flow, as not to take the
4306  * L3 tunnel header into account.
4307  *
4308  * @param dev
4309  *   Pointer to Ethernet device.
4310  * @param[in] items
4311  *   Pattern specification (list terminated by the END pattern item).
4312  * @param[out] sfx_items
4313  *   Suffix flow match items (list terminated by the END pattern item).
4314  * @param[in] actions
4315  *   Associated actions (list terminated by the END action).
4316  * @param[out] actions_sfx
4317  *   Suffix flow actions.
4318  * @param[out] actions_pre
4319  *   Prefix flow actions.
4320  * @param[out] pattern_sfx
4321  *   The pattern items for the suffix flow.
4322  * @param[out] tag_sfx
4323  *   Pointer to suffix flow tag.
4324  *
4325  * @return
4326  *   0 on success.
4327  */
4328 static int
4329 flow_meter_split_prep(struct rte_eth_dev *dev,
4330                  const struct rte_flow_item items[],
4331                  struct rte_flow_item sfx_items[],
4332                  const struct rte_flow_action actions[],
4333                  struct rte_flow_action actions_sfx[],
4334                  struct rte_flow_action actions_pre[])
4335 {
4336         struct mlx5_priv *priv = dev->data->dev_private;
4337         struct rte_flow_action *tag_action = NULL;
4338         struct rte_flow_item *tag_item;
4339         struct mlx5_rte_flow_action_set_tag *set_tag;
4340         struct rte_flow_error error;
4341         const struct rte_flow_action_raw_encap *raw_encap;
4342         const struct rte_flow_action_raw_decap *raw_decap;
4343         struct mlx5_rte_flow_item_tag *tag_spec;
4344         struct mlx5_rte_flow_item_tag *tag_mask;
4345         uint32_t tag_id = 0;
4346         bool copy_vlan = false;
4347
4348         /* Prepare the actions for prefix and suffix flow. */
4349         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4350                 struct rte_flow_action **action_cur = NULL;
4351
4352                 switch (actions->type) {
4353                 case RTE_FLOW_ACTION_TYPE_METER:
4354                         /* Add the extra tag action first. */
4355                         tag_action = actions_pre;
4356                         tag_action->type = (enum rte_flow_action_type)
4357                                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4358                         actions_pre++;
4359                         action_cur = &actions_pre;
4360                         break;
4361                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4362                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4363                         action_cur = &actions_pre;
4364                         break;
4365                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4366                         raw_encap = actions->conf;
4367                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
4368                                 action_cur = &actions_pre;
4369                         break;
4370                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4371                         raw_decap = actions->conf;
4372                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4373                                 action_cur = &actions_pre;
4374                         break;
4375                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4376                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4377                         copy_vlan = true;
4378                         break;
4379                 default:
4380                         break;
4381                 }
4382                 if (!action_cur)
4383                         action_cur = &actions_sfx;
4384                 memcpy(*action_cur, actions, sizeof(struct rte_flow_action));
4385                 (*action_cur)++;
4386         }
4387         /* Add end action to the actions. */
4388         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
4389         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
4390         actions_pre++;
4391         /* Set the tag. */
4392         set_tag = (void *)actions_pre;
4393         set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4394         mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
4395                           &tag_id);
4396         if (tag_id >= (1 << (sizeof(tag_id) * 8 - MLX5_MTR_COLOR_BITS))) {
4397                 DRV_LOG(ERR, "Port %u meter flow id exceed max limit.",
4398                         dev->data->port_id);
4399                 mlx5_ipool_free(priv->sh->ipool
4400                                 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], tag_id);
4401                 return 0;
4402         } else if (!tag_id) {
4403                 return 0;
4404         }
4405         set_tag->data = tag_id << MLX5_MTR_COLOR_BITS;
4406         assert(tag_action);
4407         tag_action->conf = set_tag;
4408         /* Prepare the suffix subflow items. */
4409         tag_item = sfx_items++;
4410         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4411                 int item_type = items->type;
4412
4413                 switch (item_type) {
4414                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4415                         memcpy(sfx_items, items, sizeof(*sfx_items));
4416                         sfx_items++;
4417                         break;
4418                 case RTE_FLOW_ITEM_TYPE_VLAN:
4419                         if (copy_vlan) {
4420                                 memcpy(sfx_items, items, sizeof(*sfx_items));
4421                                 /*
4422                                  * Convert to internal match item, it is used
4423                                  * for vlan push and set vid.
4424                                  */
4425                                 sfx_items->type = (enum rte_flow_item_type)
4426                                                   MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
4427                                 sfx_items++;
4428                         }
4429                         break;
4430                 default:
4431                         break;
4432                 }
4433         }
4434         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
4435         sfx_items++;
4436         tag_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
4437         tag_spec->data = tag_id << MLX5_MTR_COLOR_BITS;
4438         tag_spec->id = mlx5_flow_get_reg_id(dev, MLX5_MTR_SFX, 0, &error);
4439         tag_mask = tag_spec + 1;
4440         tag_mask->data = 0xffffff00;
4441         tag_item->type = (enum rte_flow_item_type)
4442                          MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4443         tag_item->spec = tag_spec;
4444         tag_item->last = NULL;
4445         tag_item->mask = tag_mask;
4446         return tag_id;
4447 }
4448
4449 /**
4450  * Split action list having QUEUE/RSS for metadata register copy.
4451  *
4452  * Once Q/RSS action is detected in user's action list, the flow action
4453  * should be split in order to copy metadata registers, which will happen in
4454  * RX_CP_TBL like,
4455  *   - CQE->flow_tag := reg_c[1] (MARK)
4456  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4457  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
4458  * This is because the last action of each flow must be a terminal action
4459  * (QUEUE, RSS or DROP).
4460  *
4461  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
4462  * stored and kept in the mlx5_flow structure per each sub_flow.
4463  *
4464  * The Q/RSS action is replaced with,
4465  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
4466  * And the following JUMP action is added at the end,
4467  *   - JUMP, to RX_CP_TBL.
4468  *
4469  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
4470  * flow_create_split_metadata() routine. The flow will look like,
4471  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
4472  *
4473  * @param dev
4474  *   Pointer to Ethernet device.
4475  * @param[out] split_actions
4476  *   Pointer to store split actions to jump to CP_TBL.
4477  * @param[in] actions
4478  *   Pointer to the list of original flow actions.
4479  * @param[in] qrss
4480  *   Pointer to the Q/RSS action.
4481  * @param[in] actions_n
4482  *   Number of original actions.
4483  * @param[out] error
4484  *   Perform verbose error reporting if not NULL.
4485  *
4486  * @return
4487  *   non-zero unique flow_id on success, otherwise 0 and
4488  *   error/rte_error are set.
4489  */
4490 static uint32_t
4491 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
4492                           struct rte_flow_action *split_actions,
4493                           const struct rte_flow_action *actions,
4494                           const struct rte_flow_action *qrss,
4495                           int actions_n, struct rte_flow_error *error)
4496 {
4497         struct mlx5_priv *priv = dev->data->dev_private;
4498         struct mlx5_rte_flow_action_set_tag *set_tag;
4499         struct rte_flow_action_jump *jump;
4500         const int qrss_idx = qrss - actions;
4501         uint32_t flow_id = 0;
4502         int ret = 0;
4503
4504         /*
4505          * Given actions will be split
4506          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
4507          * - Add jump to mreg CP_TBL.
4508          * As a result, there will be one more action.
4509          */
4510         ++actions_n;
4511         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
4512         set_tag = (void *)(split_actions + actions_n);
4513         /*
4514          * If tag action is not set to void(it means we are not the meter
4515          * suffix flow), add the tag action. Since meter suffix flow already
4516          * has the tag added.
4517          */
4518         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
4519                 /*
4520                  * Allocate the new subflow ID. This one is unique within
4521                  * device and not shared with representors. Otherwise,
4522                  * we would have to resolve multi-thread access synch
4523                  * issue. Each flow on the shared device is appended
4524                  * with source vport identifier, so the resulting
4525                  * flows will be unique in the shared (by master and
4526                  * representors) domain even if they have coinciding
4527                  * IDs.
4528                  */
4529                 mlx5_ipool_malloc(priv->sh->ipool
4530                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
4531                 if (!flow_id)
4532                         return rte_flow_error_set(error, ENOMEM,
4533                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4534                                                   NULL, "can't allocate id "
4535                                                   "for split Q/RSS subflow");
4536                 /* Internal SET_TAG action to set flow ID. */
4537                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
4538                         .data = flow_id,
4539                 };
4540                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
4541                 if (ret < 0)
4542                         return ret;
4543                 set_tag->id = ret;
4544                 /* Construct new actions array. */
4545                 /* Replace QUEUE/RSS action. */
4546                 split_actions[qrss_idx] = (struct rte_flow_action){
4547                         .type = (enum rte_flow_action_type)
4548                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4549                         .conf = set_tag,
4550                 };
4551         }
4552         /* JUMP action to jump to mreg copy table (CP_TBL). */
4553         jump = (void *)(set_tag + 1);
4554         *jump = (struct rte_flow_action_jump){
4555                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4556         };
4557         split_actions[actions_n - 2] = (struct rte_flow_action){
4558                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4559                 .conf = jump,
4560         };
4561         split_actions[actions_n - 1] = (struct rte_flow_action){
4562                 .type = RTE_FLOW_ACTION_TYPE_END,
4563         };
4564         return flow_id;
4565 }
4566
4567 /**
4568  * Extend the given action list for Tx metadata copy.
4569  *
4570  * Copy the given action list to the ext_actions and add flow metadata register
4571  * copy action in order to copy reg_a set by WQE to reg_c[0].
4572  *
4573  * @param[out] ext_actions
4574  *   Pointer to the extended action list.
4575  * @param[in] actions
4576  *   Pointer to the list of actions.
4577  * @param[in] actions_n
4578  *   Number of actions in the list.
4579  * @param[out] error
4580  *   Perform verbose error reporting if not NULL.
4581  * @param[in] encap_idx
4582  *   The encap action inndex.
4583  *
4584  * @return
4585  *   0 on success, negative value otherwise
4586  */
4587 static int
4588 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
4589                        struct rte_flow_action *ext_actions,
4590                        const struct rte_flow_action *actions,
4591                        int actions_n, struct rte_flow_error *error,
4592                        int encap_idx)
4593 {
4594         struct mlx5_flow_action_copy_mreg *cp_mreg =
4595                 (struct mlx5_flow_action_copy_mreg *)
4596                         (ext_actions + actions_n + 1);
4597         int ret;
4598
4599         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4600         if (ret < 0)
4601                 return ret;
4602         cp_mreg->dst = ret;
4603         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
4604         if (ret < 0)
4605                 return ret;
4606         cp_mreg->src = ret;
4607         if (encap_idx != 0)
4608                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
4609         if (encap_idx == actions_n - 1) {
4610                 ext_actions[actions_n - 1] = (struct rte_flow_action){
4611                         .type = (enum rte_flow_action_type)
4612                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4613                         .conf = cp_mreg,
4614                 };
4615                 ext_actions[actions_n] = (struct rte_flow_action){
4616                         .type = RTE_FLOW_ACTION_TYPE_END,
4617                 };
4618         } else {
4619                 ext_actions[encap_idx] = (struct rte_flow_action){
4620                         .type = (enum rte_flow_action_type)
4621                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4622                         .conf = cp_mreg,
4623                 };
4624                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
4625                                 sizeof(*ext_actions) * (actions_n - encap_idx));
4626         }
4627         return 0;
4628 }
4629
4630 /**
4631  * Check the match action from the action list.
4632  *
4633  * @param[in] actions
4634  *   Pointer to the list of actions.
4635  * @param[in] attr
4636  *   Flow rule attributes.
4637  * @param[in] action
4638  *   The action to be check if exist.
4639  * @param[out] match_action_pos
4640  *   Pointer to the position of the matched action if exists, otherwise is -1.
4641  * @param[out] qrss_action_pos
4642  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
4643  * @param[out] modify_after_mirror
4644  *   Pointer to the flag of modify action after FDB mirroring.
4645  *
4646  * @return
4647  *   > 0 the total number of actions.
4648  *   0 if not found match action in action list.
4649  */
4650 static int
4651 flow_check_match_action(const struct rte_flow_action actions[],
4652                         const struct rte_flow_attr *attr,
4653                         enum rte_flow_action_type action,
4654                         int *match_action_pos, int *qrss_action_pos,
4655                         int *modify_after_mirror)
4656 {
4657         const struct rte_flow_action_sample *sample;
4658         int actions_n = 0;
4659         uint32_t ratio = 0;
4660         int sub_type = 0;
4661         int flag = 0;
4662         int fdb_mirror = 0;
4663
4664         *match_action_pos = -1;
4665         *qrss_action_pos = -1;
4666         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4667                 if (actions->type == action) {
4668                         flag = 1;
4669                         *match_action_pos = actions_n;
4670                 }
4671                 switch (actions->type) {
4672                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4673                 case RTE_FLOW_ACTION_TYPE_RSS:
4674                         *qrss_action_pos = actions_n;
4675                         break;
4676                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
4677                         sample = actions->conf;
4678                         ratio = sample->ratio;
4679                         sub_type = ((const struct rte_flow_action *)
4680                                         (sample->actions))->type;
4681                         if (ratio == 1 && attr->transfer)
4682                                 fdb_mirror = 1;
4683                         break;
4684                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4685                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4686                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4687                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4688                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4689                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4690                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4691                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4692                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4693                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4694                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4695                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4696                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4697                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4698                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4699                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
4700                 case RTE_FLOW_ACTION_TYPE_FLAG:
4701                 case RTE_FLOW_ACTION_TYPE_MARK:
4702                 case RTE_FLOW_ACTION_TYPE_SET_META:
4703                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4704                         if (fdb_mirror)
4705                                 *modify_after_mirror = 1;
4706                         break;
4707                 default:
4708                         break;
4709                 }
4710                 actions_n++;
4711         }
4712         if (flag && fdb_mirror && !*modify_after_mirror) {
4713                 /* FDB mirroring uses the destination array to implement
4714                  * instead of FLOW_SAMPLER object.
4715                  */
4716                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
4717                         flag = 0;
4718         }
4719         /* Count RTE_FLOW_ACTION_TYPE_END. */
4720         return flag ? actions_n + 1 : 0;
4721 }
4722
4723 #define SAMPLE_SUFFIX_ITEM 2
4724
4725 /**
4726  * Split the sample flow.
4727  *
4728  * As sample flow will split to two sub flow, sample flow with
4729  * sample action, the other actions will move to new suffix flow.
4730  *
4731  * Also add unique tag id with tag action in the sample flow,
4732  * the same tag id will be as match in the suffix flow.
4733  *
4734  * @param dev
4735  *   Pointer to Ethernet device.
4736  * @param[in] add_tag
4737  *   Add extra tag action flag.
4738  * @param[out] sfx_items
4739  *   Suffix flow match items (list terminated by the END pattern item).
4740  * @param[in] actions
4741  *   Associated actions (list terminated by the END action).
4742  * @param[out] actions_sfx
4743  *   Suffix flow actions.
4744  * @param[out] actions_pre
4745  *   Prefix flow actions.
4746  * @param[in] actions_n
4747  *  The total number of actions.
4748  * @param[in] sample_action_pos
4749  *   The sample action position.
4750  * @param[in] qrss_action_pos
4751  *   The Queue/RSS action position.
4752  * @param[in] jump_table
4753  *   Add extra jump action flag.
4754  * @param[out] error
4755  *   Perform verbose error reporting if not NULL.
4756  *
4757  * @return
4758  *   0 on success, or unique flow_id, a negative errno value
4759  *   otherwise and rte_errno is set.
4760  */
4761 static int
4762 flow_sample_split_prep(struct rte_eth_dev *dev,
4763                        int add_tag,
4764                        struct rte_flow_item sfx_items[],
4765                        const struct rte_flow_action actions[],
4766                        struct rte_flow_action actions_sfx[],
4767                        struct rte_flow_action actions_pre[],
4768                        int actions_n,
4769                        int sample_action_pos,
4770                        int qrss_action_pos,
4771                        int jump_table,
4772                        struct rte_flow_error *error)
4773 {
4774         struct mlx5_priv *priv = dev->data->dev_private;
4775         struct mlx5_rte_flow_action_set_tag *set_tag;
4776         struct mlx5_rte_flow_item_tag *tag_spec;
4777         struct mlx5_rte_flow_item_tag *tag_mask;
4778         struct rte_flow_action_jump *jump_action;
4779         uint32_t tag_id = 0;
4780         int index;
4781         int append_index = 0;
4782         int ret;
4783
4784         if (sample_action_pos < 0)
4785                 return rte_flow_error_set(error, EINVAL,
4786                                           RTE_FLOW_ERROR_TYPE_ACTION,
4787                                           NULL, "invalid position of sample "
4788                                           "action in list");
4789         /* Prepare the actions for prefix and suffix flow. */
4790         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
4791                 index = qrss_action_pos;
4792                 /* Put the preceding the Queue/RSS action into prefix flow. */
4793                 if (index != 0)
4794                         memcpy(actions_pre, actions,
4795                                sizeof(struct rte_flow_action) * index);
4796                 /* Put others preceding the sample action into prefix flow. */
4797                 if (sample_action_pos > index + 1)
4798                         memcpy(actions_pre + index, actions + index + 1,
4799                                sizeof(struct rte_flow_action) *
4800                                (sample_action_pos - index - 1));
4801                 index = sample_action_pos - 1;
4802                 /* Put Queue/RSS action into Suffix flow. */
4803                 memcpy(actions_sfx, actions + qrss_action_pos,
4804                        sizeof(struct rte_flow_action));
4805                 actions_sfx++;
4806         } else {
4807                 index = sample_action_pos;
4808                 if (index != 0)
4809                         memcpy(actions_pre, actions,
4810                                sizeof(struct rte_flow_action) * index);
4811         }
4812         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
4813          * For CX6DX and above, metadata registers Cx preserve their value,
4814          * add an extra tag action for NIC-RX and E-Switch Domain.
4815          */
4816         if (add_tag) {
4817                 /* Prepare the prefix tag action. */
4818                 append_index++;
4819                 set_tag = (void *)(actions_pre + actions_n + append_index);
4820                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
4821                 if (ret < 0)
4822                         return ret;
4823                 set_tag->id = ret;
4824                 mlx5_ipool_malloc(priv->sh->ipool
4825                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
4826                 set_tag->data = tag_id;
4827                 /* Prepare the suffix subflow items. */
4828                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
4829                 tag_spec->data = tag_id;
4830                 tag_spec->id = set_tag->id;
4831                 tag_mask = tag_spec + 1;
4832                 tag_mask->data = UINT32_MAX;
4833                 sfx_items[0] = (struct rte_flow_item){
4834                         .type = (enum rte_flow_item_type)
4835                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4836                         .spec = tag_spec,
4837                         .last = NULL,
4838                         .mask = tag_mask,
4839                 };
4840                 sfx_items[1] = (struct rte_flow_item){
4841                         .type = (enum rte_flow_item_type)
4842                                 RTE_FLOW_ITEM_TYPE_END,
4843                 };
4844                 /* Prepare the tag action in prefix subflow. */
4845                 actions_pre[index++] =
4846                         (struct rte_flow_action){
4847                         .type = (enum rte_flow_action_type)
4848                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
4849                         .conf = set_tag,
4850                 };
4851         }
4852         memcpy(actions_pre + index, actions + sample_action_pos,
4853                sizeof(struct rte_flow_action));
4854         index += 1;
4855         /* For the modify action after the sample action in E-Switch mirroring,
4856          * Add the extra jump action in prefix subflow and jump into the next
4857          * table, then do the modify action in the new table.
4858          */
4859         if (jump_table) {
4860                 /* Prepare the prefix jump action. */
4861                 append_index++;
4862                 jump_action = (void *)(actions_pre + actions_n + append_index);
4863                 jump_action->group = jump_table;
4864                 actions_pre[index++] =
4865                         (struct rte_flow_action){
4866                         .type = (enum rte_flow_action_type)
4867                                 RTE_FLOW_ACTION_TYPE_JUMP,
4868                         .conf = jump_action,
4869                 };
4870         }
4871         actions_pre[index] = (struct rte_flow_action){
4872                 .type = (enum rte_flow_action_type)
4873                         RTE_FLOW_ACTION_TYPE_END,
4874         };
4875         /* Put the actions after sample into Suffix flow. */
4876         memcpy(actions_sfx, actions + sample_action_pos + 1,
4877                sizeof(struct rte_flow_action) *
4878                (actions_n - sample_action_pos - 1));
4879         return tag_id;
4880 }
4881
4882 /**
4883  * The splitting for metadata feature.
4884  *
4885  * - Q/RSS action on NIC Rx should be split in order to pass by
4886  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
4887  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
4888  *
4889  * - All the actions on NIC Tx should have a mreg copy action to
4890  *   copy reg_a from WQE to reg_c[0].
4891  *
4892  * @param dev
4893  *   Pointer to Ethernet device.
4894  * @param[in] flow
4895  *   Parent flow structure pointer.
4896  * @param[in] attr
4897  *   Flow rule attributes.
4898  * @param[in] items
4899  *   Pattern specification (list terminated by the END pattern item).
4900  * @param[in] actions
4901  *   Associated actions (list terminated by the END action).
4902  * @param[in] flow_split_info
4903  *   Pointer to flow split info structure.
4904  * @param[out] error
4905  *   Perform verbose error reporting if not NULL.
4906  * @return
4907  *   0 on success, negative value otherwise
4908  */
4909 static int
4910 flow_create_split_metadata(struct rte_eth_dev *dev,
4911                            struct rte_flow *flow,
4912                            const struct rte_flow_attr *attr,
4913                            const struct rte_flow_item items[],
4914                            const struct rte_flow_action actions[],
4915                            struct mlx5_flow_split_info *flow_split_info,
4916                            struct rte_flow_error *error)
4917 {
4918         struct mlx5_priv *priv = dev->data->dev_private;
4919         struct mlx5_dev_config *config = &priv->config;
4920         const struct rte_flow_action *qrss = NULL;
4921         struct rte_flow_action *ext_actions = NULL;
4922         struct mlx5_flow *dev_flow = NULL;
4923         uint32_t qrss_id = 0;
4924         int mtr_sfx = 0;
4925         size_t act_size;
4926         int actions_n;
4927         int encap_idx;
4928         int ret;
4929
4930         /* Check whether extensive metadata feature is engaged. */
4931         if (!config->dv_flow_en ||
4932             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4933             !mlx5_flow_ext_mreg_supported(dev))
4934                 return flow_create_split_inner(dev, flow, NULL, attr, items,
4935                                                actions, flow_split_info, error);
4936         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
4937                                                            &encap_idx);
4938         if (qrss) {
4939                 /* Exclude hairpin flows from splitting. */
4940                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
4941                         const struct rte_flow_action_queue *queue;
4942
4943                         queue = qrss->conf;
4944                         if (mlx5_rxq_get_type(dev, queue->index) ==
4945                             MLX5_RXQ_TYPE_HAIRPIN)
4946                                 qrss = NULL;
4947                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
4948                         const struct rte_flow_action_rss *rss;
4949
4950                         rss = qrss->conf;
4951                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
4952                             MLX5_RXQ_TYPE_HAIRPIN)
4953                                 qrss = NULL;
4954                 }
4955         }
4956         if (qrss) {
4957                 /* Check if it is in meter suffix table. */
4958                 mtr_sfx = attr->group == (attr->transfer ?
4959                           (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
4960                           MLX5_FLOW_TABLE_LEVEL_SUFFIX);
4961                 /*
4962                  * Q/RSS action on NIC Rx should be split in order to pass by
4963                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
4964                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
4965                  */
4966                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
4967                            sizeof(struct rte_flow_action_set_tag) +
4968                            sizeof(struct rte_flow_action_jump);
4969                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
4970                                           SOCKET_ID_ANY);
4971                 if (!ext_actions)
4972                         return rte_flow_error_set(error, ENOMEM,
4973                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4974                                                   NULL, "no memory to split "
4975                                                   "metadata flow");
4976                 /*
4977                  * If we are the suffix flow of meter, tag already exist.
4978                  * Set the tag action to void.
4979                  */
4980                 if (mtr_sfx)
4981                         ext_actions[qrss - actions].type =
4982                                                 RTE_FLOW_ACTION_TYPE_VOID;
4983                 else
4984                         ext_actions[qrss - actions].type =
4985                                                 (enum rte_flow_action_type)
4986                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4987                 /*
4988                  * Create the new actions list with removed Q/RSS action
4989                  * and appended set tag and jump to register copy table
4990                  * (RX_CP_TBL). We should preallocate unique tag ID here
4991                  * in advance, because it is needed for set tag action.
4992                  */
4993                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
4994                                                     qrss, actions_n, error);
4995                 if (!mtr_sfx && !qrss_id) {
4996                         ret = -rte_errno;
4997                         goto exit;
4998                 }
4999         } else if (attr->egress && !attr->transfer) {
5000                 /*
5001                  * All the actions on NIC Tx should have a metadata register
5002                  * copy action to copy reg_a from WQE to reg_c[meta]
5003                  */
5004                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5005                            sizeof(struct mlx5_flow_action_copy_mreg);
5006                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5007                                           SOCKET_ID_ANY);
5008                 if (!ext_actions)
5009                         return rte_flow_error_set(error, ENOMEM,
5010                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5011                                                   NULL, "no memory to split "
5012                                                   "metadata flow");
5013                 /* Create the action list appended with copy register. */
5014                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5015                                              actions_n, error, encap_idx);
5016                 if (ret < 0)
5017                         goto exit;
5018         }
5019         /* Add the unmodified original or prefix subflow. */
5020         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5021                                       items, ext_actions ? ext_actions :
5022                                       actions, flow_split_info, error);
5023         if (ret < 0)
5024                 goto exit;
5025         MLX5_ASSERT(dev_flow);
5026         if (qrss) {
5027                 const struct rte_flow_attr q_attr = {
5028                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5029                         .ingress = 1,
5030                 };
5031                 /* Internal PMD action to set register. */
5032                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5033                         .data = qrss_id,
5034                         .id = REG_NON,
5035                 };
5036                 struct rte_flow_item q_items[] = {
5037                         {
5038                                 .type = (enum rte_flow_item_type)
5039                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5040                                 .spec = &q_tag_spec,
5041                                 .last = NULL,
5042                                 .mask = NULL,
5043                         },
5044                         {
5045                                 .type = RTE_FLOW_ITEM_TYPE_END,
5046                         },
5047                 };
5048                 struct rte_flow_action q_actions[] = {
5049                         {
5050                                 .type = qrss->type,
5051                                 .conf = qrss->conf,
5052                         },
5053                         {
5054                                 .type = RTE_FLOW_ACTION_TYPE_END,
5055                         },
5056                 };
5057                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5058
5059                 /*
5060                  * Configure the tag item only if there is no meter subflow.
5061                  * Since tag is already marked in the meter suffix subflow
5062                  * we can just use the meter suffix items as is.
5063                  */
5064                 if (qrss_id) {
5065                         /* Not meter subflow. */
5066                         MLX5_ASSERT(!mtr_sfx);
5067                         /*
5068                          * Put unique id in prefix flow due to it is destroyed
5069                          * after suffix flow and id will be freed after there
5070                          * is no actual flows with this id and identifier
5071                          * reallocation becomes possible (for example, for
5072                          * other flows in other threads).
5073                          */
5074                         dev_flow->handle->split_flow_id = qrss_id;
5075                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5076                                                    error);
5077                         if (ret < 0)
5078                                 goto exit;
5079                         q_tag_spec.id = ret;
5080                 }
5081                 dev_flow = NULL;
5082                 /* Add suffix subflow to execute Q/RSS. */
5083                 flow_split_info->prefix_layers = layers;
5084                 flow_split_info->prefix_mark = 0;
5085                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5086                                               &q_attr, mtr_sfx ? items :
5087                                               q_items, q_actions,
5088                                               flow_split_info, error);
5089                 if (ret < 0)
5090                         goto exit;
5091                 /* qrss ID should be freed if failed. */
5092                 qrss_id = 0;
5093                 MLX5_ASSERT(dev_flow);
5094         }
5095
5096 exit:
5097         /*
5098          * We do not destroy the partially created sub_flows in case of error.
5099          * These ones are included into parent flow list and will be destroyed
5100          * by flow_drv_destroy.
5101          */
5102         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5103                         qrss_id);
5104         mlx5_free(ext_actions);
5105         return ret;
5106 }
5107
5108 /**
5109  * The splitting for meter feature.
5110  *
5111  * - The meter flow will be split to two flows as prefix and
5112  *   suffix flow. The packets make sense only it pass the prefix
5113  *   meter action.
5114  *
5115  * - Reg_C_5 is used for the packet to match betweend prefix and
5116  *   suffix flow.
5117  *
5118  * @param dev
5119  *   Pointer to Ethernet device.
5120  * @param[in] flow
5121  *   Parent flow structure pointer.
5122  * @param[in] attr
5123  *   Flow rule attributes.
5124  * @param[in] items
5125  *   Pattern specification (list terminated by the END pattern item).
5126  * @param[in] actions
5127  *   Associated actions (list terminated by the END action).
5128  * @param[in] flow_split_info
5129  *   Pointer to flow split info structure.
5130  * @param[out] error
5131  *   Perform verbose error reporting if not NULL.
5132  * @return
5133  *   0 on success, negative value otherwise
5134  */
5135 static int
5136 flow_create_split_meter(struct rte_eth_dev *dev,
5137                         struct rte_flow *flow,
5138                         const struct rte_flow_attr *attr,
5139                         const struct rte_flow_item items[],
5140                         const struct rte_flow_action actions[],
5141                         struct mlx5_flow_split_info *flow_split_info,
5142                         struct rte_flow_error *error)
5143 {
5144         struct mlx5_priv *priv = dev->data->dev_private;
5145         struct rte_flow_action *sfx_actions = NULL;
5146         struct rte_flow_action *pre_actions = NULL;
5147         struct rte_flow_item *sfx_items = NULL;
5148         struct mlx5_flow *dev_flow = NULL;
5149         struct rte_flow_attr sfx_attr = *attr;
5150         uint32_t mtr = 0;
5151         uint32_t mtr_tag_id = 0;
5152         size_t act_size;
5153         size_t item_size;
5154         int actions_n = 0;
5155         int ret;
5156
5157         if (priv->mtr_en)
5158                 actions_n = flow_check_meter_action(actions, &mtr);
5159         if (mtr) {
5160                 /* The five prefix actions: meter, decap, encap, tag, end. */
5161                 act_size = sizeof(struct rte_flow_action) * (actions_n + 5) +
5162                            sizeof(struct mlx5_rte_flow_action_set_tag);
5163                 /* tag, vlan, port id, end. */
5164 #define METER_SUFFIX_ITEM 4
5165                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
5166                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5167                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
5168                                           0, SOCKET_ID_ANY);
5169                 if (!sfx_actions)
5170                         return rte_flow_error_set(error, ENOMEM,
5171                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5172                                                   NULL, "no memory to split "
5173                                                   "meter flow");
5174                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
5175                              act_size);
5176                 pre_actions = sfx_actions + actions_n;
5177                 mtr_tag_id = flow_meter_split_prep(dev, items, sfx_items,
5178                                                    actions, sfx_actions,
5179                                                    pre_actions);
5180                 if (!mtr_tag_id) {
5181                         ret = -rte_errno;
5182                         goto exit;
5183                 }
5184                 /* Add the prefix subflow. */
5185                 flow_split_info->prefix_mark = 0;
5186                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5187                                               attr, items, pre_actions,
5188                                               flow_split_info, error);
5189                 if (ret) {
5190                         ret = -rte_errno;
5191                         goto exit;
5192                 }
5193                 dev_flow->handle->split_flow_id = mtr_tag_id;
5194                 /* Setting the sfx group atrr. */
5195                 sfx_attr.group = sfx_attr.transfer ?
5196                                 (MLX5_FLOW_TABLE_LEVEL_SUFFIX - 1) :
5197                                  MLX5_FLOW_TABLE_LEVEL_SUFFIX;
5198                 flow_split_info->prefix_layers =
5199                                 flow_get_prefix_layer_flags(dev_flow);
5200                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5201         }
5202         /* Add the prefix subflow. */
5203         ret = flow_create_split_metadata(dev, flow,
5204                                          &sfx_attr, sfx_items ?
5205                                          sfx_items : items,
5206                                          sfx_actions ? sfx_actions : actions,
5207                                          flow_split_info, error);
5208 exit:
5209         if (sfx_actions)
5210                 mlx5_free(sfx_actions);
5211         return ret;
5212 }
5213
5214 /**
5215  * The splitting for sample feature.
5216  *
5217  * Once Sample action is detected in the action list, the flow actions should
5218  * be split into prefix sub flow and suffix sub flow.
5219  *
5220  * The original items remain in the prefix sub flow, all actions preceding the
5221  * sample action and the sample action itself will be copied to the prefix
5222  * sub flow, the actions following the sample action will be copied to the
5223  * suffix sub flow, Queue action always be located in the suffix sub flow.
5224  *
5225  * In order to make the packet from prefix sub flow matches with suffix sub
5226  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
5227  * flow uses tag item with the unique flow id.
5228  *
5229  * @param dev
5230  *   Pointer to Ethernet device.
5231  * @param[in] flow
5232  *   Parent flow structure pointer.
5233  * @param[in] attr
5234  *   Flow rule attributes.
5235  * @param[in] items
5236  *   Pattern specification (list terminated by the END pattern item).
5237  * @param[in] actions
5238  *   Associated actions (list terminated by the END action).
5239  * @param[in] flow_split_info
5240  *   Pointer to flow split info structure.
5241  * @param[out] error
5242  *   Perform verbose error reporting if not NULL.
5243  * @return
5244  *   0 on success, negative value otherwise
5245  */
5246 static int
5247 flow_create_split_sample(struct rte_eth_dev *dev,
5248                          struct rte_flow *flow,
5249                          const struct rte_flow_attr *attr,
5250                          const struct rte_flow_item items[],
5251                          const struct rte_flow_action actions[],
5252                          struct mlx5_flow_split_info *flow_split_info,
5253                          struct rte_flow_error *error)
5254 {
5255         struct mlx5_priv *priv = dev->data->dev_private;
5256         struct rte_flow_action *sfx_actions = NULL;
5257         struct rte_flow_action *pre_actions = NULL;
5258         struct rte_flow_item *sfx_items = NULL;
5259         struct mlx5_flow *dev_flow = NULL;
5260         struct rte_flow_attr sfx_attr = *attr;
5261 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5262         struct mlx5_flow_dv_sample_resource *sample_res;
5263         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
5264         struct mlx5_flow_tbl_resource *sfx_tbl;
5265 #endif
5266         size_t act_size;
5267         size_t item_size;
5268         uint32_t fdb_tx = 0;
5269         int32_t tag_id = 0;
5270         int actions_n = 0;
5271         int sample_action_pos;
5272         int qrss_action_pos;
5273         int add_tag = 0;
5274         int modify_after_mirror = 0;
5275         uint16_t jump_table = 0;
5276         const uint32_t next_ft_step = 1;
5277         int ret = 0;
5278
5279         if (priv->sampler_en)
5280                 actions_n = flow_check_match_action(actions, attr,
5281                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
5282                                         &sample_action_pos, &qrss_action_pos,
5283                                         &modify_after_mirror);
5284         if (actions_n) {
5285                 /* The prefix actions must includes sample, tag, end. */
5286                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
5287                            + sizeof(struct mlx5_rte_flow_action_set_tag);
5288                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
5289                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
5290                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
5291                                           item_size), 0, SOCKET_ID_ANY);
5292                 if (!sfx_actions)
5293                         return rte_flow_error_set(error, ENOMEM,
5294                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5295                                                   NULL, "no memory to split "
5296                                                   "sample flow");
5297                 /* The representor_id is -1 for uplink. */
5298                 fdb_tx = (attr->transfer && priv->representor_id != -1);
5299                 /*
5300                  * When reg_c_preserve is set, metadata registers Cx preserve
5301                  * their value even through packet duplication.
5302                  */
5303                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
5304                 if (add_tag)
5305                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
5306                                         + act_size);
5307                 if (modify_after_mirror)
5308                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
5309                                      next_ft_step;
5310                 pre_actions = sfx_actions + actions_n;
5311                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
5312                                                 actions, sfx_actions,
5313                                                 pre_actions, actions_n,
5314                                                 sample_action_pos,
5315                                                 qrss_action_pos, jump_table,
5316                                                 error);
5317                 if (tag_id < 0 || (add_tag && !tag_id)) {
5318                         ret = -rte_errno;
5319                         goto exit;
5320                 }
5321                 if (modify_after_mirror)
5322                         flow_split_info->skip_scale =
5323                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
5324                 /* Add the prefix subflow. */
5325                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5326                                               items, pre_actions,
5327                                               flow_split_info, error);
5328                 if (ret) {
5329                         ret = -rte_errno;
5330                         goto exit;
5331                 }
5332                 dev_flow->handle->split_flow_id = tag_id;
5333 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5334                 if (!modify_after_mirror) {
5335                         /* Set the sfx group attr. */
5336                         sample_res = (struct mlx5_flow_dv_sample_resource *)
5337                                                 dev_flow->dv.sample_res;
5338                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
5339                                                 sample_res->normal_path_tbl;
5340                         sfx_tbl_data = container_of(sfx_tbl,
5341                                                 struct mlx5_flow_tbl_data_entry,
5342                                                 tbl);
5343                         sfx_attr.group = sfx_attr.transfer ?
5344                                                 (sfx_tbl_data->table_id - 1) :
5345                                                 sfx_tbl_data->table_id;
5346                 } else {
5347                         MLX5_ASSERT(attr->transfer);
5348                         sfx_attr.group = jump_table;
5349                 }
5350                 flow_split_info->prefix_layers =
5351                                 flow_get_prefix_layer_flags(dev_flow);
5352                 flow_split_info->prefix_mark = dev_flow->handle->mark;
5353                 /* Suffix group level already be scaled with factor, set
5354                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
5355                  * again in translation.
5356                  */
5357                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5358 #endif
5359         }
5360         /* Add the suffix subflow. */
5361         ret = flow_create_split_meter(dev, flow, &sfx_attr,
5362                                       sfx_items ? sfx_items : items,
5363                                       sfx_actions ? sfx_actions : actions,
5364                                       flow_split_info, error);
5365 exit:
5366         if (sfx_actions)
5367                 mlx5_free(sfx_actions);
5368         return ret;
5369 }
5370
5371 /**
5372  * Split the flow to subflow set. The splitters might be linked
5373  * in the chain, like this:
5374  * flow_create_split_outer() calls:
5375  *   flow_create_split_meter() calls:
5376  *     flow_create_split_metadata(meter_subflow_0) calls:
5377  *       flow_create_split_inner(metadata_subflow_0)
5378  *       flow_create_split_inner(metadata_subflow_1)
5379  *       flow_create_split_inner(metadata_subflow_2)
5380  *     flow_create_split_metadata(meter_subflow_1) calls:
5381  *       flow_create_split_inner(metadata_subflow_0)
5382  *       flow_create_split_inner(metadata_subflow_1)
5383  *       flow_create_split_inner(metadata_subflow_2)
5384  *
5385  * This provide flexible way to add new levels of flow splitting.
5386  * The all of successfully created subflows are included to the
5387  * parent flow dev_flow list.
5388  *
5389  * @param dev
5390  *   Pointer to Ethernet device.
5391  * @param[in] flow
5392  *   Parent flow structure pointer.
5393  * @param[in] attr
5394  *   Flow rule attributes.
5395  * @param[in] items
5396  *   Pattern specification (list terminated by the END pattern item).
5397  * @param[in] actions
5398  *   Associated actions (list terminated by the END action).
5399  * @param[in] flow_split_info
5400  *   Pointer to flow split info structure.
5401  * @param[out] error
5402  *   Perform verbose error reporting if not NULL.
5403  * @return
5404  *   0 on success, negative value otherwise
5405  */
5406 static int
5407 flow_create_split_outer(struct rte_eth_dev *dev,
5408                         struct rte_flow *flow,
5409                         const struct rte_flow_attr *attr,
5410                         const struct rte_flow_item items[],
5411                         const struct rte_flow_action actions[],
5412                         struct mlx5_flow_split_info *flow_split_info,
5413                         struct rte_flow_error *error)
5414 {
5415         int ret;
5416
5417         ret = flow_create_split_sample(dev, flow, attr, items,
5418                                        actions, flow_split_info, error);
5419         MLX5_ASSERT(ret <= 0);
5420         return ret;
5421 }
5422
5423 static struct mlx5_flow_tunnel *
5424 flow_tunnel_from_rule(struct rte_eth_dev *dev,
5425                       const struct rte_flow_attr *attr,
5426                       const struct rte_flow_item items[],
5427                       const struct rte_flow_action actions[])
5428 {
5429         struct mlx5_flow_tunnel *tunnel;
5430
5431 #pragma GCC diagnostic push
5432 #pragma GCC diagnostic ignored "-Wcast-qual"
5433         if (is_flow_tunnel_match_rule(dev, attr, items, actions))
5434                 tunnel = (struct mlx5_flow_tunnel *)items[0].spec;
5435         else if (is_flow_tunnel_steer_rule(dev, attr, items, actions))
5436                 tunnel = (struct mlx5_flow_tunnel *)actions[0].conf;
5437         else
5438                 tunnel = NULL;
5439 #pragma GCC diagnostic pop
5440
5441         return tunnel;
5442 }
5443
5444 /**
5445  * Adjust flow RSS workspace if needed.
5446  *
5447  * @param wks
5448  *   Pointer to thread flow work space.
5449  * @param rss_desc
5450  *   Pointer to RSS descriptor.
5451  * @param[in] nrssq_num
5452  *   New RSS queue number.
5453  *
5454  * @return
5455  *   0 on success, -1 otherwise and rte_errno is set.
5456  */
5457 static int
5458 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
5459                           struct mlx5_flow_rss_desc *rss_desc,
5460                           uint32_t nrssq_num)
5461 {
5462         if (likely(nrssq_num <= wks->rssq_num))
5463                 return 0;
5464         rss_desc->queue = realloc(rss_desc->queue,
5465                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
5466         if (!rss_desc->queue) {
5467                 rte_errno = ENOMEM;
5468                 return -1;
5469         }
5470         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
5471         return 0;
5472 }
5473
5474 /**
5475  * Create a flow and add it to @p list.
5476  *
5477  * @param dev
5478  *   Pointer to Ethernet device.
5479  * @param list
5480  *   Pointer to a TAILQ flow list. If this parameter NULL,
5481  *   no list insertion occurred, flow is just created,
5482  *   this is caller's responsibility to track the
5483  *   created flow.
5484  * @param[in] attr
5485  *   Flow rule attributes.
5486  * @param[in] items
5487  *   Pattern specification (list terminated by the END pattern item).
5488  * @param[in] actions
5489  *   Associated actions (list terminated by the END action).
5490  * @param[in] external
5491  *   This flow rule is created by request external to PMD.
5492  * @param[out] error
5493  *   Perform verbose error reporting if not NULL.
5494  *
5495  * @return
5496  *   A flow index on success, 0 otherwise and rte_errno is set.
5497  */
5498 static uint32_t
5499 flow_list_create(struct rte_eth_dev *dev, uint32_t *list,
5500                  const struct rte_flow_attr *attr,
5501                  const struct rte_flow_item items[],
5502                  const struct rte_flow_action original_actions[],
5503                  bool external, struct rte_flow_error *error)
5504 {
5505         struct mlx5_priv *priv = dev->data->dev_private;
5506         struct rte_flow *flow = NULL;
5507         struct mlx5_flow *dev_flow;
5508         const struct rte_flow_action_rss *rss = NULL;
5509         struct mlx5_translated_shared_action
5510                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5511         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5512         union {
5513                 struct mlx5_flow_expand_rss buf;
5514                 uint8_t buffer[2048];
5515         } expand_buffer;
5516         union {
5517                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5518                 uint8_t buffer[2048];
5519         } actions_rx;
5520         union {
5521                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
5522                 uint8_t buffer[2048];
5523         } actions_hairpin_tx;
5524         union {
5525                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
5526                 uint8_t buffer[2048];
5527         } items_tx;
5528         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
5529         struct mlx5_flow_rss_desc *rss_desc;
5530         const struct rte_flow_action *p_actions_rx;
5531         uint32_t i;
5532         uint32_t idx = 0;
5533         int hairpin_flow;
5534         struct rte_flow_attr attr_tx = { .priority = 0 };
5535         const struct rte_flow_action *actions;
5536         struct rte_flow_action *translated_actions = NULL;
5537         struct mlx5_flow_tunnel *tunnel;
5538         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
5539         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
5540         struct mlx5_flow_split_info flow_split_info = {
5541                 .external = !!external,
5542                 .skip_scale = 0,
5543                 .flow_idx = 0,
5544                 .prefix_mark = 0,
5545                 .prefix_layers = 0
5546         };
5547         int ret;
5548
5549         MLX5_ASSERT(wks);
5550         rss_desc = &wks->rss_desc;
5551         ret = flow_shared_actions_translate(dev, original_actions,
5552                                             shared_actions,
5553                                             &shared_actions_n,
5554                                             &translated_actions, error);
5555         if (ret < 0) {
5556                 MLX5_ASSERT(translated_actions == NULL);
5557                 return 0;
5558         }
5559         actions = translated_actions ? translated_actions : original_actions;
5560         p_actions_rx = actions;
5561         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5562         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
5563                                 external, hairpin_flow, error);
5564         if (ret < 0)
5565                 goto error_before_hairpin_split;
5566         flow = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], &idx);
5567         if (!flow) {
5568                 rte_errno = ENOMEM;
5569                 goto error_before_hairpin_split;
5570         }
5571         if (hairpin_flow > 0) {
5572                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
5573                         rte_errno = EINVAL;
5574                         goto error_before_hairpin_split;
5575                 }
5576                 flow_hairpin_split(dev, actions, actions_rx.actions,
5577                                    actions_hairpin_tx.actions, items_tx.items,
5578                                    idx);
5579                 p_actions_rx = actions_rx.actions;
5580         }
5581         flow_split_info.flow_idx = idx;
5582         flow->drv_type = flow_get_drv_type(dev, attr);
5583         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
5584                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
5585         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
5586         /* RSS Action only works on NIC RX domain */
5587         if (attr->ingress && !attr->transfer)
5588                 rss = flow_get_rss_action(p_actions_rx);
5589         if (rss) {
5590                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
5591                         return 0;
5592                 /*
5593                  * The following information is required by
5594                  * mlx5_flow_hashfields_adjust() in advance.
5595                  */
5596                 rss_desc->level = rss->level;
5597                 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
5598                 rss_desc->types = !rss->types ? ETH_RSS_IP : rss->types;
5599         }
5600         flow->dev_handles = 0;
5601         if (rss && rss->types) {
5602                 unsigned int graph_root;
5603
5604                 graph_root = find_graph_root(items, rss->level);
5605                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
5606                                            items, rss->types,
5607                                            mlx5_support_expansion, graph_root);
5608                 MLX5_ASSERT(ret > 0 &&
5609                        (unsigned int)ret < sizeof(expand_buffer.buffer));
5610         } else {
5611                 buf->entries = 1;
5612                 buf->entry[0].pattern = (void *)(uintptr_t)items;
5613         }
5614         rss_desc->shared_rss = flow_get_shared_rss_action(dev, shared_actions,
5615                                                       shared_actions_n);
5616         for (i = 0; i < buf->entries; ++i) {
5617                 /* Initialize flow split data. */
5618                 flow_split_info.prefix_layers = 0;
5619                 flow_split_info.prefix_mark = 0;
5620                 flow_split_info.skip_scale = 0;
5621                 /*
5622                  * The splitter may create multiple dev_flows,
5623                  * depending on configuration. In the simplest
5624                  * case it just creates unmodified original flow.
5625                  */
5626                 ret = flow_create_split_outer(dev, flow, attr,
5627                                               buf->entry[i].pattern,
5628                                               p_actions_rx, &flow_split_info,
5629                                               error);
5630                 if (ret < 0)
5631                         goto error;
5632                 if (is_flow_tunnel_steer_rule(dev, attr,
5633                                               buf->entry[i].pattern,
5634                                               p_actions_rx)) {
5635                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
5636                                                            p_actions_rx,
5637                                                            idx,
5638                                                            &default_miss_ctx,
5639                                                            error);
5640                         if (ret < 0) {
5641                                 mlx5_free(default_miss_ctx.queue);
5642                                 goto error;
5643                         }
5644                 }
5645         }
5646         /* Create the tx flow. */
5647         if (hairpin_flow) {
5648                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
5649                 attr_tx.ingress = 0;
5650                 attr_tx.egress = 1;
5651                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
5652                                          actions_hairpin_tx.actions,
5653                                          idx, error);
5654                 if (!dev_flow)
5655                         goto error;
5656                 dev_flow->flow = flow;
5657                 dev_flow->external = 0;
5658                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
5659                               dev_flow->handle, next);
5660                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
5661                                          items_tx.items,
5662                                          actions_hairpin_tx.actions, error);
5663                 if (ret < 0)
5664                         goto error;
5665         }
5666         /*
5667          * Update the metadata register copy table. If extensive
5668          * metadata feature is enabled and registers are supported
5669          * we might create the extra rte_flow for each unique
5670          * MARK/FLAG action ID.
5671          *
5672          * The table is updated for ingress Flows only, because
5673          * the egress Flows belong to the different device and
5674          * copy table should be updated in peer NIC Rx domain.
5675          */
5676         if (attr->ingress &&
5677             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
5678                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
5679                 if (ret)
5680                         goto error;
5681         }
5682         /*
5683          * If the flow is external (from application) OR device is started,
5684          * OR mreg discover, then apply immediately.
5685          */
5686         if (external || dev->data->dev_started ||
5687             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
5688              attr->priority == MLX5_FLOW_PRIO_RSVD)) {
5689                 ret = flow_drv_apply(dev, flow, error);
5690                 if (ret < 0)
5691                         goto error;
5692         }
5693         if (list) {
5694                 rte_spinlock_lock(&priv->flow_list_lock);
5695                 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list, idx,
5696                              flow, next);
5697                 rte_spinlock_unlock(&priv->flow_list_lock);
5698         }
5699         flow_rxq_flags_set(dev, flow);
5700         rte_free(translated_actions);
5701         tunnel = flow_tunnel_from_rule(dev, attr, items, actions);
5702         if (tunnel) {
5703                 flow->tunnel = 1;
5704                 flow->tunnel_id = tunnel->tunnel_id;
5705                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
5706                 mlx5_free(default_miss_ctx.queue);
5707         }
5708         mlx5_flow_pop_thread_workspace();
5709         return idx;
5710 error:
5711         MLX5_ASSERT(flow);
5712         ret = rte_errno; /* Save rte_errno before cleanup. */
5713         flow_mreg_del_copy_action(dev, flow);
5714         flow_drv_destroy(dev, flow);
5715         if (rss_desc->shared_rss)
5716                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
5717                         mlx5_ipool_get
5718                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
5719                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
5720         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], idx);
5721         rte_errno = ret; /* Restore rte_errno. */
5722         ret = rte_errno;
5723         rte_errno = ret;
5724         mlx5_flow_pop_thread_workspace();
5725 error_before_hairpin_split:
5726         rte_free(translated_actions);
5727         return 0;
5728 }
5729
5730 /**
5731  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
5732  * incoming packets to table 1.
5733  *
5734  * Other flow rules, requested for group n, will be created in
5735  * e-switch table n+1.
5736  * Jump action to e-switch group n will be created to group n+1.
5737  *
5738  * Used when working in switchdev mode, to utilise advantages of table 1
5739  * and above.
5740  *
5741  * @param dev
5742  *   Pointer to Ethernet device.
5743  *
5744  * @return
5745  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
5746  */
5747 struct rte_flow *
5748 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
5749 {
5750         const struct rte_flow_attr attr = {
5751                 .group = 0,
5752                 .priority = 0,
5753                 .ingress = 1,
5754                 .egress = 0,
5755                 .transfer = 1,
5756         };
5757         const struct rte_flow_item pattern = {
5758                 .type = RTE_FLOW_ITEM_TYPE_END,
5759         };
5760         struct rte_flow_action_jump jump = {
5761                 .group = 1,
5762         };
5763         const struct rte_flow_action actions[] = {
5764                 {
5765                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
5766                         .conf = &jump,
5767                 },
5768                 {
5769                         .type = RTE_FLOW_ACTION_TYPE_END,
5770                 },
5771         };
5772         struct mlx5_priv *priv = dev->data->dev_private;
5773         struct rte_flow_error error;
5774
5775         return (void *)(uintptr_t)flow_list_create(dev, &priv->ctrl_flows,
5776                                                    &attr, &pattern,
5777                                                    actions, false, &error);
5778 }
5779
5780 /**
5781  * Validate a flow supported by the NIC.
5782  *
5783  * @see rte_flow_validate()
5784  * @see rte_flow_ops
5785  */
5786 int
5787 mlx5_flow_validate(struct rte_eth_dev *dev,
5788                    const struct rte_flow_attr *attr,
5789                    const struct rte_flow_item items[],
5790                    const struct rte_flow_action original_actions[],
5791                    struct rte_flow_error *error)
5792 {
5793         int hairpin_flow;
5794         struct mlx5_translated_shared_action
5795                 shared_actions[MLX5_MAX_SHARED_ACTIONS];
5796         int shared_actions_n = MLX5_MAX_SHARED_ACTIONS;
5797         const struct rte_flow_action *actions;
5798         struct rte_flow_action *translated_actions = NULL;
5799         int ret = flow_shared_actions_translate(dev, original_actions,
5800                                                 shared_actions,
5801                                                 &shared_actions_n,
5802                                                 &translated_actions, error);
5803
5804         if (ret)
5805                 return ret;
5806         actions = translated_actions ? translated_actions : original_actions;
5807         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
5808         ret = flow_drv_validate(dev, attr, items, actions,
5809                                 true, hairpin_flow, error);
5810         rte_free(translated_actions);
5811         return ret;
5812 }
5813
5814 /**
5815  * Create a flow.
5816  *
5817  * @see rte_flow_create()
5818  * @see rte_flow_ops
5819  */
5820 struct rte_flow *
5821 mlx5_flow_create(struct rte_eth_dev *dev,
5822                  const struct rte_flow_attr *attr,
5823                  const struct rte_flow_item items[],
5824                  const struct rte_flow_action actions[],
5825                  struct rte_flow_error *error)
5826 {
5827         struct mlx5_priv *priv = dev->data->dev_private;
5828
5829         /*
5830          * If the device is not started yet, it is not allowed to created a
5831          * flow from application. PMD default flows and traffic control flows
5832          * are not affected.
5833          */
5834         if (unlikely(!dev->data->dev_started)) {
5835                 DRV_LOG(DEBUG, "port %u is not started when "
5836                         "inserting a flow", dev->data->port_id);
5837                 rte_flow_error_set(error, ENODEV,
5838                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5839                                    NULL,
5840                                    "port not started");
5841                 return NULL;
5842         }
5843
5844         return (void *)(uintptr_t)flow_list_create(dev, &priv->flows,
5845                                   attr, items, actions, true, error);
5846 }
5847
5848 /**
5849  * Destroy a flow in a list.
5850  *
5851  * @param dev
5852  *   Pointer to Ethernet device.
5853  * @param list
5854  *   Pointer to the Indexed flow list. If this parameter NULL,
5855  *   there is no flow removal from the list. Be noted that as
5856  *   flow is add to the indexed list, memory of the indexed
5857  *   list points to maybe changed as flow destroyed.
5858  * @param[in] flow_idx
5859  *   Index of flow to destroy.
5860  */
5861 static void
5862 flow_list_destroy(struct rte_eth_dev *dev, uint32_t *list,
5863                   uint32_t flow_idx)
5864 {
5865         struct mlx5_priv *priv = dev->data->dev_private;
5866         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
5867                                                [MLX5_IPOOL_RTE_FLOW], flow_idx);
5868
5869         if (!flow)
5870                 return;
5871         /*
5872          * Update RX queue flags only if port is started, otherwise it is
5873          * already clean.
5874          */
5875         if (dev->data->dev_started)
5876                 flow_rxq_flags_trim(dev, flow);
5877         flow_drv_destroy(dev, flow);
5878         if (list) {
5879                 rte_spinlock_lock(&priv->flow_list_lock);
5880                 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], list,
5881                              flow_idx, flow, next);
5882                 rte_spinlock_unlock(&priv->flow_list_lock);
5883         }
5884         if (flow->tunnel) {
5885                 struct mlx5_flow_tunnel *tunnel;
5886
5887                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
5888                 RTE_VERIFY(tunnel);
5889                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
5890                         mlx5_flow_tunnel_free(dev, tunnel);
5891         }
5892         flow_mreg_del_copy_action(dev, flow);
5893         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], flow_idx);
5894 }
5895
5896 /**
5897  * Destroy all flows.
5898  *
5899  * @param dev
5900  *   Pointer to Ethernet device.
5901  * @param list
5902  *   Pointer to the Indexed flow list.
5903  * @param active
5904  *   If flushing is called avtively.
5905  */
5906 void
5907 mlx5_flow_list_flush(struct rte_eth_dev *dev, uint32_t *list, bool active)
5908 {
5909         uint32_t num_flushed = 0;
5910
5911         while (*list) {
5912                 flow_list_destroy(dev, list, *list);
5913                 num_flushed++;
5914         }
5915         if (active) {
5916                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
5917                         dev->data->port_id, num_flushed);
5918         }
5919 }
5920
5921 /**
5922  * Stop all default actions for flows.
5923  *
5924  * @param dev
5925  *   Pointer to Ethernet device.
5926  */
5927 void
5928 mlx5_flow_stop_default(struct rte_eth_dev *dev)
5929 {
5930         flow_mreg_del_default_copy_action(dev);
5931         flow_rxq_flags_clear(dev);
5932 }
5933
5934 /**
5935  * Start all default actions for flows.
5936  *
5937  * @param dev
5938  *   Pointer to Ethernet device.
5939  * @return
5940  *   0 on success, a negative errno value otherwise and rte_errno is set.
5941  */
5942 int
5943 mlx5_flow_start_default(struct rte_eth_dev *dev)
5944 {
5945         struct rte_flow_error error;
5946
5947         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
5948         return flow_mreg_add_default_copy_action(dev, &error);
5949 }
5950
5951 /**
5952  * Release key of thread specific flow workspace data.
5953  */
5954 void
5955 flow_release_workspace(void *data)
5956 {
5957         struct mlx5_flow_workspace *wks = data;
5958         struct mlx5_flow_workspace *next;
5959
5960         while (wks) {
5961                 next = wks->next;
5962                 free(wks->rss_desc.queue);
5963                 free(wks);
5964                 wks = next;
5965         }
5966 }
5967
5968 /**
5969  * Get thread specific current flow workspace.
5970  *
5971  * @return pointer to thread specific flow workspace data, NULL on error.
5972  */
5973 struct mlx5_flow_workspace*
5974 mlx5_flow_get_thread_workspace(void)
5975 {
5976         struct mlx5_flow_workspace *data;
5977
5978         data = mlx5_flow_os_get_specific_workspace();
5979         MLX5_ASSERT(data && data->inuse);
5980         if (!data || !data->inuse)
5981                 DRV_LOG(ERR, "flow workspace not initialized.");
5982         return data;
5983 }
5984
5985 /**
5986  * Allocate and init new flow workspace.
5987  *
5988  * @return pointer to flow workspace data, NULL on error.
5989  */
5990 static struct mlx5_flow_workspace*
5991 flow_alloc_thread_workspace(void)
5992 {
5993         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
5994
5995         if (!data) {
5996                 DRV_LOG(ERR, "Failed to allocate flow workspace "
5997                         "memory.");
5998                 return NULL;
5999         }
6000         data->rss_desc.queue = calloc(1,
6001                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6002         if (!data->rss_desc.queue)
6003                 goto err;
6004         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6005         return data;
6006 err:
6007         if (data->rss_desc.queue)
6008                 free(data->rss_desc.queue);
6009         free(data);
6010         return NULL;
6011 }
6012
6013 /**
6014  * Get new thread specific flow workspace.
6015  *
6016  * If current workspace inuse, create new one and set as current.
6017  *
6018  * @return pointer to thread specific flow workspace data, NULL on error.
6019  */
6020 static struct mlx5_flow_workspace*
6021 mlx5_flow_push_thread_workspace(void)
6022 {
6023         struct mlx5_flow_workspace *curr;
6024         struct mlx5_flow_workspace *data;
6025
6026         curr = mlx5_flow_os_get_specific_workspace();
6027         if (!curr) {
6028                 data = flow_alloc_thread_workspace();
6029                 if (!data)
6030                         return NULL;
6031         } else if (!curr->inuse) {
6032                 data = curr;
6033         } else if (curr->next) {
6034                 data = curr->next;
6035         } else {
6036                 data = flow_alloc_thread_workspace();
6037                 if (!data)
6038                         return NULL;
6039                 curr->next = data;
6040                 data->prev = curr;
6041         }
6042         data->inuse = 1;
6043         data->flow_idx = 0;
6044         /* Set as current workspace */
6045         if (mlx5_flow_os_set_specific_workspace(data))
6046                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6047         return data;
6048 }
6049
6050 /**
6051  * Close current thread specific flow workspace.
6052  *
6053  * If previous workspace available, set it as current.
6054  *
6055  * @return pointer to thread specific flow workspace data, NULL on error.
6056  */
6057 static void
6058 mlx5_flow_pop_thread_workspace(void)
6059 {
6060         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
6061
6062         if (!data)
6063                 return;
6064         if (!data->inuse) {
6065                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
6066                 return;
6067         }
6068         data->inuse = 0;
6069         if (!data->prev)
6070                 return;
6071         if (mlx5_flow_os_set_specific_workspace(data->prev))
6072                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6073 }
6074
6075 /**
6076  * Verify the flow list is empty
6077  *
6078  * @param dev
6079  *  Pointer to Ethernet device.
6080  *
6081  * @return the number of flows not released.
6082  */
6083 int
6084 mlx5_flow_verify(struct rte_eth_dev *dev)
6085 {
6086         struct mlx5_priv *priv = dev->data->dev_private;
6087         struct rte_flow *flow;
6088         uint32_t idx;
6089         int ret = 0;
6090
6091         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW], priv->flows, idx,
6092                       flow, next) {
6093                 DRV_LOG(DEBUG, "port %u flow %p still referenced",
6094                         dev->data->port_id, (void *)flow);
6095                 ++ret;
6096         }
6097         return ret;
6098 }
6099
6100 /**
6101  * Enable default hairpin egress flow.
6102  *
6103  * @param dev
6104  *   Pointer to Ethernet device.
6105  * @param queue
6106  *   The queue index.
6107  *
6108  * @return
6109  *   0 on success, a negative errno value otherwise and rte_errno is set.
6110  */
6111 int
6112 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
6113                             uint32_t queue)
6114 {
6115         struct mlx5_priv *priv = dev->data->dev_private;
6116         const struct rte_flow_attr attr = {
6117                 .egress = 1,
6118                 .priority = 0,
6119         };
6120         struct mlx5_rte_flow_item_tx_queue queue_spec = {
6121                 .queue = queue,
6122         };
6123         struct mlx5_rte_flow_item_tx_queue queue_mask = {
6124                 .queue = UINT32_MAX,
6125         };
6126         struct rte_flow_item items[] = {
6127                 {
6128                         .type = (enum rte_flow_item_type)
6129                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6130                         .spec = &queue_spec,
6131                         .last = NULL,
6132                         .mask = &queue_mask,
6133                 },
6134                 {
6135                         .type = RTE_FLOW_ITEM_TYPE_END,
6136                 },
6137         };
6138         struct rte_flow_action_jump jump = {
6139                 .group = MLX5_HAIRPIN_TX_TABLE,
6140         };
6141         struct rte_flow_action actions[2];
6142         uint32_t flow_idx;
6143         struct rte_flow_error error;
6144
6145         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
6146         actions[0].conf = &jump;
6147         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
6148         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6149                                 &attr, items, actions, false, &error);
6150         if (!flow_idx) {
6151                 DRV_LOG(DEBUG,
6152                         "Failed to create ctrl flow: rte_errno(%d),"
6153                         " type(%d), message(%s)",
6154                         rte_errno, error.type,
6155                         error.message ? error.message : " (no stated reason)");
6156                 return -rte_errno;
6157         }
6158         return 0;
6159 }
6160
6161 /**
6162  * Enable a control flow configured from the control plane.
6163  *
6164  * @param dev
6165  *   Pointer to Ethernet device.
6166  * @param eth_spec
6167  *   An Ethernet flow spec to apply.
6168  * @param eth_mask
6169  *   An Ethernet flow mask to apply.
6170  * @param vlan_spec
6171  *   A VLAN flow spec to apply.
6172  * @param vlan_mask
6173  *   A VLAN flow mask to apply.
6174  *
6175  * @return
6176  *   0 on success, a negative errno value otherwise and rte_errno is set.
6177  */
6178 int
6179 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
6180                     struct rte_flow_item_eth *eth_spec,
6181                     struct rte_flow_item_eth *eth_mask,
6182                     struct rte_flow_item_vlan *vlan_spec,
6183                     struct rte_flow_item_vlan *vlan_mask)
6184 {
6185         struct mlx5_priv *priv = dev->data->dev_private;
6186         const struct rte_flow_attr attr = {
6187                 .ingress = 1,
6188                 .priority = MLX5_FLOW_PRIO_RSVD,
6189         };
6190         struct rte_flow_item items[] = {
6191                 {
6192                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6193                         .spec = eth_spec,
6194                         .last = NULL,
6195                         .mask = eth_mask,
6196                 },
6197                 {
6198                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
6199                                               RTE_FLOW_ITEM_TYPE_END,
6200                         .spec = vlan_spec,
6201                         .last = NULL,
6202                         .mask = vlan_mask,
6203                 },
6204                 {
6205                         .type = RTE_FLOW_ITEM_TYPE_END,
6206                 },
6207         };
6208         uint16_t queue[priv->reta_idx_n];
6209         struct rte_flow_action_rss action_rss = {
6210                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
6211                 .level = 0,
6212                 .types = priv->rss_conf.rss_hf,
6213                 .key_len = priv->rss_conf.rss_key_len,
6214                 .queue_num = priv->reta_idx_n,
6215                 .key = priv->rss_conf.rss_key,
6216                 .queue = queue,
6217         };
6218         struct rte_flow_action actions[] = {
6219                 {
6220                         .type = RTE_FLOW_ACTION_TYPE_RSS,
6221                         .conf = &action_rss,
6222                 },
6223                 {
6224                         .type = RTE_FLOW_ACTION_TYPE_END,
6225                 },
6226         };
6227         uint32_t flow_idx;
6228         struct rte_flow_error error;
6229         unsigned int i;
6230
6231         if (!priv->reta_idx_n || !priv->rxqs_n) {
6232                 return 0;
6233         }
6234         if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
6235                 action_rss.types = 0;
6236         for (i = 0; i != priv->reta_idx_n; ++i)
6237                 queue[i] = (*priv->reta_idx)[i];
6238         flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6239                                 &attr, items, actions, false, &error);
6240         if (!flow_idx)
6241                 return -rte_errno;
6242         return 0;
6243 }
6244
6245 /**
6246  * Enable a flow control configured from the control plane.
6247  *
6248  * @param dev
6249  *   Pointer to Ethernet device.
6250  * @param eth_spec
6251  *   An Ethernet flow spec to apply.
6252  * @param eth_mask
6253  *   An Ethernet flow mask to apply.
6254  *
6255  * @return
6256  *   0 on success, a negative errno value otherwise and rte_errno is set.
6257  */
6258 int
6259 mlx5_ctrl_flow(struct rte_eth_dev *dev,
6260                struct rte_flow_item_eth *eth_spec,
6261                struct rte_flow_item_eth *eth_mask)
6262 {
6263         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
6264 }
6265
6266 /**
6267  * Create default miss flow rule matching lacp traffic
6268  *
6269  * @param dev
6270  *   Pointer to Ethernet device.
6271  * @param eth_spec
6272  *   An Ethernet flow spec to apply.
6273  *
6274  * @return
6275  *   0 on success, a negative errno value otherwise and rte_errno is set.
6276  */
6277 int
6278 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
6279 {
6280         struct mlx5_priv *priv = dev->data->dev_private;
6281         /*
6282          * The LACP matching is done by only using ether type since using
6283          * a multicast dst mac causes kernel to give low priority to this flow.
6284          */
6285         static const struct rte_flow_item_eth lacp_spec = {
6286                 .type = RTE_BE16(0x8809),
6287         };
6288         static const struct rte_flow_item_eth lacp_mask = {
6289                 .type = 0xffff,
6290         };
6291         const struct rte_flow_attr attr = {
6292                 .ingress = 1,
6293         };
6294         struct rte_flow_item items[] = {
6295                 {
6296                         .type = RTE_FLOW_ITEM_TYPE_ETH,
6297                         .spec = &lacp_spec,
6298                         .mask = &lacp_mask,
6299                 },
6300                 {
6301                         .type = RTE_FLOW_ITEM_TYPE_END,
6302                 },
6303         };
6304         struct rte_flow_action actions[] = {
6305                 {
6306                         .type = (enum rte_flow_action_type)
6307                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
6308                 },
6309                 {
6310                         .type = RTE_FLOW_ACTION_TYPE_END,
6311                 },
6312         };
6313         struct rte_flow_error error;
6314         uint32_t flow_idx = flow_list_create(dev, &priv->ctrl_flows,
6315                                 &attr, items, actions, false, &error);
6316
6317         if (!flow_idx)
6318                 return -rte_errno;
6319         return 0;
6320 }
6321
6322 /**
6323  * Destroy a flow.
6324  *
6325  * @see rte_flow_destroy()
6326  * @see rte_flow_ops
6327  */
6328 int
6329 mlx5_flow_destroy(struct rte_eth_dev *dev,
6330                   struct rte_flow *flow,
6331                   struct rte_flow_error *error __rte_unused)
6332 {
6333         struct mlx5_priv *priv = dev->data->dev_private;
6334
6335         flow_list_destroy(dev, &priv->flows, (uintptr_t)(void *)flow);
6336         return 0;
6337 }
6338
6339 /**
6340  * Destroy all flows.
6341  *
6342  * @see rte_flow_flush()
6343  * @see rte_flow_ops
6344  */
6345 int
6346 mlx5_flow_flush(struct rte_eth_dev *dev,
6347                 struct rte_flow_error *error __rte_unused)
6348 {
6349         struct mlx5_priv *priv = dev->data->dev_private;
6350
6351         mlx5_flow_list_flush(dev, &priv->flows, false);
6352         return 0;
6353 }
6354
6355 /**
6356  * Isolated mode.
6357  *
6358  * @see rte_flow_isolate()
6359  * @see rte_flow_ops
6360  */
6361 int
6362 mlx5_flow_isolate(struct rte_eth_dev *dev,
6363                   int enable,
6364                   struct rte_flow_error *error)
6365 {
6366         struct mlx5_priv *priv = dev->data->dev_private;
6367
6368         if (dev->data->dev_started) {
6369                 rte_flow_error_set(error, EBUSY,
6370                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6371                                    NULL,
6372                                    "port must be stopped first");
6373                 return -rte_errno;
6374         }
6375         priv->isolated = !!enable;
6376         if (enable)
6377                 dev->dev_ops = &mlx5_dev_ops_isolate;
6378         else
6379                 dev->dev_ops = &mlx5_dev_ops;
6380
6381         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
6382         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
6383
6384         return 0;
6385 }
6386
6387 /**
6388  * Query a flow.
6389  *
6390  * @see rte_flow_query()
6391  * @see rte_flow_ops
6392  */
6393 static int
6394 flow_drv_query(struct rte_eth_dev *dev,
6395                uint32_t flow_idx,
6396                const struct rte_flow_action *actions,
6397                void *data,
6398                struct rte_flow_error *error)
6399 {
6400         struct mlx5_priv *priv = dev->data->dev_private;
6401         const struct mlx5_flow_driver_ops *fops;
6402         struct rte_flow *flow = mlx5_ipool_get(priv->sh->ipool
6403                                                [MLX5_IPOOL_RTE_FLOW],
6404                                                flow_idx);
6405         enum mlx5_flow_drv_type ftype;
6406
6407         if (!flow) {
6408                 return rte_flow_error_set(error, ENOENT,
6409                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6410                           NULL,
6411                           "invalid flow handle");
6412         }
6413         ftype = flow->drv_type;
6414         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
6415         fops = flow_get_drv_ops(ftype);
6416
6417         return fops->query(dev, flow, actions, data, error);
6418 }
6419
6420 /**
6421  * Query a flow.
6422  *
6423  * @see rte_flow_query()
6424  * @see rte_flow_ops
6425  */
6426 int
6427 mlx5_flow_query(struct rte_eth_dev *dev,
6428                 struct rte_flow *flow,
6429                 const struct rte_flow_action *actions,
6430                 void *data,
6431                 struct rte_flow_error *error)
6432 {
6433         int ret;
6434
6435         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
6436                              error);
6437         if (ret < 0)
6438                 return ret;
6439         return 0;
6440 }
6441
6442 /**
6443  * Manage filter operations.
6444  *
6445  * @param dev
6446  *   Pointer to Ethernet device structure.
6447  * @param filter_type
6448  *   Filter type.
6449  * @param filter_op
6450  *   Operation to perform.
6451  * @param arg
6452  *   Pointer to operation-specific structure.
6453  *
6454  * @return
6455  *   0 on success, a negative errno value otherwise and rte_errno is set.
6456  */
6457 int
6458 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
6459                      enum rte_filter_type filter_type,
6460                      enum rte_filter_op filter_op,
6461                      void *arg)
6462 {
6463         switch (filter_type) {
6464         case RTE_ETH_FILTER_GENERIC:
6465                 if (filter_op != RTE_ETH_FILTER_GET) {
6466                         rte_errno = EINVAL;
6467                         return -rte_errno;
6468                 }
6469                 *(const void **)arg = &mlx5_flow_ops;
6470                 return 0;
6471         default:
6472                 DRV_LOG(ERR, "port %u filter type (%d) not supported",
6473                         dev->data->port_id, filter_type);
6474                 rte_errno = ENOTSUP;
6475                 return -rte_errno;
6476         }
6477         return 0;
6478 }
6479
6480 /**
6481  * Create the needed meter and suffix tables.
6482  *
6483  * @param[in] dev
6484  *   Pointer to Ethernet device.
6485  * @param[in] fm
6486  *   Pointer to the flow meter.
6487  *
6488  * @return
6489  *   Pointer to table set on success, NULL otherwise.
6490  */
6491 struct mlx5_meter_domains_infos *
6492 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
6493                           const struct mlx5_flow_meter *fm)
6494 {
6495         const struct mlx5_flow_driver_ops *fops;
6496
6497         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6498         return fops->create_mtr_tbls(dev, fm);
6499 }
6500
6501 /**
6502  * Destroy the meter table set.
6503  *
6504  * @param[in] dev
6505  *   Pointer to Ethernet device.
6506  * @param[in] tbl
6507  *   Pointer to the meter table set.
6508  *
6509  * @return
6510  *   0 on success.
6511  */
6512 int
6513 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
6514                            struct mlx5_meter_domains_infos *tbls)
6515 {
6516         const struct mlx5_flow_driver_ops *fops;
6517
6518         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6519         return fops->destroy_mtr_tbls(dev, tbls);
6520 }
6521
6522 /**
6523  * Create policer rules.
6524  *
6525  * @param[in] dev
6526  *   Pointer to Ethernet device.
6527  * @param[in] fm
6528  *   Pointer to flow meter structure.
6529  * @param[in] attr
6530  *   Pointer to flow attributes.
6531  *
6532  * @return
6533  *   0 on success, -1 otherwise.
6534  */
6535 int
6536 mlx5_flow_create_policer_rules(struct rte_eth_dev *dev,
6537                                struct mlx5_flow_meter *fm,
6538                                const struct rte_flow_attr *attr)
6539 {
6540         const struct mlx5_flow_driver_ops *fops;
6541
6542         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6543         return fops->create_policer_rules(dev, fm, attr);
6544 }
6545
6546 /**
6547  * Destroy policer rules.
6548  *
6549  * @param[in] fm
6550  *   Pointer to flow meter structure.
6551  * @param[in] attr
6552  *   Pointer to flow attributes.
6553  *
6554  * @return
6555  *   0 on success, -1 otherwise.
6556  */
6557 int
6558 mlx5_flow_destroy_policer_rules(struct rte_eth_dev *dev,
6559                                 struct mlx5_flow_meter *fm,
6560                                 const struct rte_flow_attr *attr)
6561 {
6562         const struct mlx5_flow_driver_ops *fops;
6563
6564         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6565         return fops->destroy_policer_rules(dev, fm, attr);
6566 }
6567
6568 /**
6569  * Allocate a counter.
6570  *
6571  * @param[in] dev
6572  *   Pointer to Ethernet device structure.
6573  *
6574  * @return
6575  *   Index to allocated counter  on success, 0 otherwise.
6576  */
6577 uint32_t
6578 mlx5_counter_alloc(struct rte_eth_dev *dev)
6579 {
6580         const struct mlx5_flow_driver_ops *fops;
6581         struct rte_flow_attr attr = { .transfer = 0 };
6582
6583         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6584                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6585                 return fops->counter_alloc(dev);
6586         }
6587         DRV_LOG(ERR,
6588                 "port %u counter allocate is not supported.",
6589                  dev->data->port_id);
6590         return 0;
6591 }
6592
6593 /**
6594  * Free a counter.
6595  *
6596  * @param[in] dev
6597  *   Pointer to Ethernet device structure.
6598  * @param[in] cnt
6599  *   Index to counter to be free.
6600  */
6601 void
6602 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
6603 {
6604         const struct mlx5_flow_driver_ops *fops;
6605         struct rte_flow_attr attr = { .transfer = 0 };
6606
6607         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6608                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6609                 fops->counter_free(dev, cnt);
6610                 return;
6611         }
6612         DRV_LOG(ERR,
6613                 "port %u counter free is not supported.",
6614                  dev->data->port_id);
6615 }
6616
6617 /**
6618  * Query counter statistics.
6619  *
6620  * @param[in] dev
6621  *   Pointer to Ethernet device structure.
6622  * @param[in] cnt
6623  *   Index to counter to query.
6624  * @param[in] clear
6625  *   Set to clear counter statistics.
6626  * @param[out] pkts
6627  *   The counter hits packets number to save.
6628  * @param[out] bytes
6629  *   The counter hits bytes number to save.
6630  *
6631  * @return
6632  *   0 on success, a negative errno value otherwise.
6633  */
6634 int
6635 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
6636                    bool clear, uint64_t *pkts, uint64_t *bytes)
6637 {
6638         const struct mlx5_flow_driver_ops *fops;
6639         struct rte_flow_attr attr = { .transfer = 0 };
6640
6641         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
6642                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
6643                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
6644         }
6645         DRV_LOG(ERR,
6646                 "port %u counter query is not supported.",
6647                  dev->data->port_id);
6648         return -ENOTSUP;
6649 }
6650
6651 /**
6652  * Allocate a new memory for the counter values wrapped by all the needed
6653  * management.
6654  *
6655  * @param[in] sh
6656  *   Pointer to mlx5_dev_ctx_shared object.
6657  *
6658  * @return
6659  *   0 on success, a negative errno value otherwise.
6660  */
6661 static int
6662 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
6663 {
6664         struct mlx5_devx_mkey_attr mkey_attr;
6665         struct mlx5_counter_stats_mem_mng *mem_mng;
6666         volatile struct flow_counter_stats *raw_data;
6667         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
6668         int size = (sizeof(struct flow_counter_stats) *
6669                         MLX5_COUNTERS_PER_POOL +
6670                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
6671                         sizeof(struct mlx5_counter_stats_mem_mng);
6672         size_t pgsize = rte_mem_page_size();
6673         uint8_t *mem;
6674         int i;
6675
6676         if (pgsize == (size_t)-1) {
6677                 DRV_LOG(ERR, "Failed to get mem page size");
6678                 rte_errno = ENOMEM;
6679                 return -ENOMEM;
6680         }
6681         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
6682         if (!mem) {
6683                 rte_errno = ENOMEM;
6684                 return -ENOMEM;
6685         }
6686         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
6687         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
6688         mem_mng->umem = mlx5_os_umem_reg(sh->ctx, mem, size,
6689                                                  IBV_ACCESS_LOCAL_WRITE);
6690         if (!mem_mng->umem) {
6691                 rte_errno = errno;
6692                 mlx5_free(mem);
6693                 return -rte_errno;
6694         }
6695         mkey_attr.addr = (uintptr_t)mem;
6696         mkey_attr.size = size;
6697         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
6698         mkey_attr.pd = sh->pdn;
6699         mkey_attr.log_entity_size = 0;
6700         mkey_attr.pg_access = 0;
6701         mkey_attr.klm_array = NULL;
6702         mkey_attr.klm_num = 0;
6703         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
6704         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
6705         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
6706         if (!mem_mng->dm) {
6707                 mlx5_os_umem_dereg(mem_mng->umem);
6708                 rte_errno = errno;
6709                 mlx5_free(mem);
6710                 return -rte_errno;
6711         }
6712         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
6713         raw_data = (volatile struct flow_counter_stats *)mem;
6714         for (i = 0; i < raws_n; ++i) {
6715                 mem_mng->raws[i].mem_mng = mem_mng;
6716                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
6717         }
6718         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
6719                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
6720                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
6721                                  next);
6722         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
6723         sh->cmng.mem_mng = mem_mng;
6724         return 0;
6725 }
6726
6727 /**
6728  * Set the statistic memory to the new counter pool.
6729  *
6730  * @param[in] sh
6731  *   Pointer to mlx5_dev_ctx_shared object.
6732  * @param[in] pool
6733  *   Pointer to the pool to set the statistic memory.
6734  *
6735  * @return
6736  *   0 on success, a negative errno value otherwise.
6737  */
6738 static int
6739 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
6740                                struct mlx5_flow_counter_pool *pool)
6741 {
6742         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6743         /* Resize statistic memory once used out. */
6744         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
6745             mlx5_flow_create_counter_stat_mem_mng(sh)) {
6746                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
6747                 return -1;
6748         }
6749         rte_spinlock_lock(&pool->sl);
6750         pool->raw = cmng->mem_mng->raws + pool->index %
6751                     MLX5_CNT_CONTAINER_RESIZE;
6752         rte_spinlock_unlock(&pool->sl);
6753         pool->raw_hw = NULL;
6754         return 0;
6755 }
6756
6757 #define MLX5_POOL_QUERY_FREQ_US 1000000
6758
6759 /**
6760  * Set the periodic procedure for triggering asynchronous batch queries for all
6761  * the counter pools.
6762  *
6763  * @param[in] sh
6764  *   Pointer to mlx5_dev_ctx_shared object.
6765  */
6766 void
6767 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
6768 {
6769         uint32_t pools_n, us;
6770
6771         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
6772         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
6773         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
6774         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
6775                 sh->cmng.query_thread_on = 0;
6776                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
6777         } else {
6778                 sh->cmng.query_thread_on = 1;
6779         }
6780 }
6781
6782 /**
6783  * The periodic procedure for triggering asynchronous batch queries for all the
6784  * counter pools. This function is probably called by the host thread.
6785  *
6786  * @param[in] arg
6787  *   The parameter for the alarm process.
6788  */
6789 void
6790 mlx5_flow_query_alarm(void *arg)
6791 {
6792         struct mlx5_dev_ctx_shared *sh = arg;
6793         int ret;
6794         uint16_t pool_index = sh->cmng.pool_index;
6795         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6796         struct mlx5_flow_counter_pool *pool;
6797         uint16_t n_valid;
6798
6799         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
6800                 goto set_alarm;
6801         rte_spinlock_lock(&cmng->pool_update_sl);
6802         pool = cmng->pools[pool_index];
6803         n_valid = cmng->n_valid;
6804         rte_spinlock_unlock(&cmng->pool_update_sl);
6805         /* Set the statistic memory to the new created pool. */
6806         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
6807                 goto set_alarm;
6808         if (pool->raw_hw)
6809                 /* There is a pool query in progress. */
6810                 goto set_alarm;
6811         pool->raw_hw =
6812                 LIST_FIRST(&sh->cmng.free_stat_raws);
6813         if (!pool->raw_hw)
6814                 /* No free counter statistics raw memory. */
6815                 goto set_alarm;
6816         /*
6817          * Identify the counters released between query trigger and query
6818          * handle more efficiently. The counter released in this gap period
6819          * should wait for a new round of query as the new arrived packets
6820          * will not be taken into account.
6821          */
6822         pool->query_gen++;
6823         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
6824                                                MLX5_COUNTERS_PER_POOL,
6825                                                NULL, NULL,
6826                                                pool->raw_hw->mem_mng->dm->id,
6827                                                (void *)(uintptr_t)
6828                                                pool->raw_hw->data,
6829                                                sh->devx_comp,
6830                                                (uint64_t)(uintptr_t)pool);
6831         if (ret) {
6832                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
6833                         " %d", pool->min_dcs->id);
6834                 pool->raw_hw = NULL;
6835                 goto set_alarm;
6836         }
6837         LIST_REMOVE(pool->raw_hw, next);
6838         sh->cmng.pending_queries++;
6839         pool_index++;
6840         if (pool_index >= n_valid)
6841                 pool_index = 0;
6842 set_alarm:
6843         sh->cmng.pool_index = pool_index;
6844         mlx5_set_query_alarm(sh);
6845 }
6846
6847 /**
6848  * Check and callback event for new aged flow in the counter pool
6849  *
6850  * @param[in] sh
6851  *   Pointer to mlx5_dev_ctx_shared object.
6852  * @param[in] pool
6853  *   Pointer to Current counter pool.
6854  */
6855 static void
6856 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
6857                    struct mlx5_flow_counter_pool *pool)
6858 {
6859         struct mlx5_priv *priv;
6860         struct mlx5_flow_counter *cnt;
6861         struct mlx5_age_info *age_info;
6862         struct mlx5_age_param *age_param;
6863         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
6864         struct mlx5_counter_stats_raw *prev = pool->raw;
6865         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
6866         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
6867         uint16_t expected = AGE_CANDIDATE;
6868         uint32_t i;
6869
6870         pool->time_of_last_age_check = curr_time;
6871         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
6872                 cnt = MLX5_POOL_GET_CNT(pool, i);
6873                 age_param = MLX5_CNT_TO_AGE(cnt);
6874                 if (__atomic_load_n(&age_param->state,
6875                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
6876                         continue;
6877                 if (cur->data[i].hits != prev->data[i].hits) {
6878                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
6879                                          __ATOMIC_RELAXED);
6880                         continue;
6881                 }
6882                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
6883                                        time_delta,
6884                                        __ATOMIC_RELAXED) <= age_param->timeout)
6885                         continue;
6886                 /**
6887                  * Hold the lock first, or if between the
6888                  * state AGE_TMOUT and tailq operation the
6889                  * release happened, the release procedure
6890                  * may delete a non-existent tailq node.
6891                  */
6892                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
6893                 age_info = GET_PORT_AGE_INFO(priv);
6894                 rte_spinlock_lock(&age_info->aged_sl);
6895                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
6896                                                 AGE_TMOUT, false,
6897                                                 __ATOMIC_RELAXED,
6898                                                 __ATOMIC_RELAXED)) {
6899                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
6900                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
6901                 }
6902                 rte_spinlock_unlock(&age_info->aged_sl);
6903         }
6904         mlx5_age_event_prepare(sh);
6905 }
6906
6907 /**
6908  * Handler for the HW respond about ready values from an asynchronous batch
6909  * query. This function is probably called by the host thread.
6910  *
6911  * @param[in] sh
6912  *   The pointer to the shared device context.
6913  * @param[in] async_id
6914  *   The Devx async ID.
6915  * @param[in] status
6916  *   The status of the completion.
6917  */
6918 void
6919 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
6920                                   uint64_t async_id, int status)
6921 {
6922         struct mlx5_flow_counter_pool *pool =
6923                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
6924         struct mlx5_counter_stats_raw *raw_to_free;
6925         uint8_t query_gen = pool->query_gen ^ 1;
6926         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
6927         enum mlx5_counter_type cnt_type =
6928                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6929                                 MLX5_COUNTER_TYPE_ORIGIN;
6930
6931         if (unlikely(status)) {
6932                 raw_to_free = pool->raw_hw;
6933         } else {
6934                 raw_to_free = pool->raw;
6935                 if (pool->is_aged)
6936                         mlx5_flow_aging_check(sh, pool);
6937                 rte_spinlock_lock(&pool->sl);
6938                 pool->raw = pool->raw_hw;
6939                 rte_spinlock_unlock(&pool->sl);
6940                 /* Be sure the new raw counters data is updated in memory. */
6941                 rte_io_wmb();
6942                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
6943                         rte_spinlock_lock(&cmng->csl[cnt_type]);
6944                         TAILQ_CONCAT(&cmng->counters[cnt_type],
6945                                      &pool->counters[query_gen], next);
6946                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6947                 }
6948         }
6949         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
6950         pool->raw_hw = NULL;
6951         sh->cmng.pending_queries--;
6952 }
6953
6954 static int
6955 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
6956                     const struct flow_grp_info *grp_info,
6957                     struct rte_flow_error *error)
6958 {
6959         if (grp_info->transfer && grp_info->external &&
6960             grp_info->fdb_def_rule) {
6961                 if (group == UINT32_MAX)
6962                         return rte_flow_error_set
6963                                                 (error, EINVAL,
6964                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6965                                                  NULL,
6966                                                  "group index not supported");
6967                 *table = group + 1;
6968         } else {
6969                 *table = group;
6970         }
6971         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
6972         return 0;
6973 }
6974
6975 /**
6976  * Translate the rte_flow group index to HW table value.
6977  *
6978  * If tunnel offload is disabled, all group ids converted to flow table
6979  * id using the standard method.
6980  * If tunnel offload is enabled, group id can be converted using the
6981  * standard or tunnel conversion method. Group conversion method
6982  * selection depends on flags in `grp_info` parameter:
6983  * - Internal (grp_info.external == 0) groups conversion uses the
6984  *   standard method.
6985  * - Group ids in JUMP action converted with the tunnel conversion.
6986  * - Group id in rule attribute conversion depends on a rule type and
6987  *   group id value:
6988  *   ** non zero group attributes converted with the tunnel method
6989  *   ** zero group attribute in non-tunnel rule is converted using the
6990  *      standard method - there's only one root table
6991  *   ** zero group attribute in steer tunnel rule is converted with the
6992  *      standard method - single root table
6993  *   ** zero group attribute in match tunnel rule is a special OvS
6994  *      case: that value is used for portability reasons. That group
6995  *      id is converted with the tunnel conversion method.
6996  *
6997  * @param[in] dev
6998  *   Port device
6999  * @param[in] tunnel
7000  *   PMD tunnel offload object
7001  * @param[in] group
7002  *   rte_flow group index value.
7003  * @param[out] table
7004  *   HW table value.
7005  * @param[in] grp_info
7006  *   flags used for conversion
7007  * @param[out] error
7008  *   Pointer to error structure.
7009  *
7010  * @return
7011  *   0 on success, a negative errno value otherwise and rte_errno is set.
7012  */
7013 int
7014 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
7015                          const struct mlx5_flow_tunnel *tunnel,
7016                          uint32_t group, uint32_t *table,
7017                          const struct flow_grp_info *grp_info,
7018                          struct rte_flow_error *error)
7019 {
7020         int ret;
7021         bool standard_translation;
7022
7023         if (!grp_info->skip_scale && grp_info->external &&
7024             group < MLX5_MAX_TABLES_EXTERNAL)
7025                 group *= MLX5_FLOW_TABLE_FACTOR;
7026         if (is_tunnel_offload_active(dev)) {
7027                 standard_translation = !grp_info->external ||
7028                                         grp_info->std_tbl_fix;
7029         } else {
7030                 standard_translation = true;
7031         }
7032         DRV_LOG(DEBUG,
7033                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
7034                 dev->data->port_id, group, grp_info->transfer,
7035                 grp_info->external, grp_info->fdb_def_rule,
7036                 standard_translation ? "STANDARD" : "TUNNEL");
7037         if (standard_translation)
7038                 ret = flow_group_to_table(dev->data->port_id, group, table,
7039                                           grp_info, error);
7040         else
7041                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
7042                                                       table, error);
7043
7044         return ret;
7045 }
7046
7047 /**
7048  * Discover availability of metadata reg_c's.
7049  *
7050  * Iteratively use test flows to check availability.
7051  *
7052  * @param[in] dev
7053  *   Pointer to the Ethernet device structure.
7054  *
7055  * @return
7056  *   0 on success, a negative errno value otherwise and rte_errno is set.
7057  */
7058 int
7059 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
7060 {
7061         struct mlx5_priv *priv = dev->data->dev_private;
7062         struct mlx5_dev_config *config = &priv->config;
7063         enum modify_reg idx;
7064         int n = 0;
7065
7066         /* reg_c[0] and reg_c[1] are reserved. */
7067         config->flow_mreg_c[n++] = REG_C_0;
7068         config->flow_mreg_c[n++] = REG_C_1;
7069         /* Discover availability of other reg_c's. */
7070         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
7071                 struct rte_flow_attr attr = {
7072                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
7073                         .priority = MLX5_FLOW_PRIO_RSVD,
7074                         .ingress = 1,
7075                 };
7076                 struct rte_flow_item items[] = {
7077                         [0] = {
7078                                 .type = RTE_FLOW_ITEM_TYPE_END,
7079                         },
7080                 };
7081                 struct rte_flow_action actions[] = {
7082                         [0] = {
7083                                 .type = (enum rte_flow_action_type)
7084                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
7085                                 .conf = &(struct mlx5_flow_action_copy_mreg){
7086                                         .src = REG_C_1,
7087                                         .dst = idx,
7088                                 },
7089                         },
7090                         [1] = {
7091                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
7092                                 .conf = &(struct rte_flow_action_jump){
7093                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
7094                                 },
7095                         },
7096                         [2] = {
7097                                 .type = RTE_FLOW_ACTION_TYPE_END,
7098                         },
7099                 };
7100                 uint32_t flow_idx;
7101                 struct rte_flow *flow;
7102                 struct rte_flow_error error;
7103
7104                 if (!config->dv_flow_en)
7105                         break;
7106                 /* Create internal flow, validation skips copy action. */
7107                 flow_idx = flow_list_create(dev, NULL, &attr, items,
7108                                             actions, false, &error);
7109                 flow = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RTE_FLOW],
7110                                       flow_idx);
7111                 if (!flow)
7112                         continue;
7113                 config->flow_mreg_c[n++] = idx;
7114                 flow_list_destroy(dev, NULL, flow_idx);
7115         }
7116         for (; n < MLX5_MREG_C_NUM; ++n)
7117                 config->flow_mreg_c[n] = REG_NON;
7118         return 0;
7119 }
7120
7121 /**
7122  * Dump flow raw hw data to file
7123  *
7124  * @param[in] dev
7125  *    The pointer to Ethernet device.
7126  * @param[in] file
7127  *   A pointer to a file for output.
7128  * @param[out] error
7129  *   Perform verbose error reporting if not NULL. PMDs initialize this
7130  *   structure in case of error only.
7131  * @return
7132  *   0 on success, a nagative value otherwise.
7133  */
7134 int
7135 mlx5_flow_dev_dump(struct rte_eth_dev *dev,
7136                    FILE *file,
7137                    struct rte_flow_error *error __rte_unused)
7138 {
7139         struct mlx5_priv *priv = dev->data->dev_private;
7140         struct mlx5_dev_ctx_shared *sh = priv->sh;
7141
7142         if (!priv->config.dv_flow_en) {
7143                 if (fputs("device dv flow disabled\n", file) <= 0)
7144                         return -errno;
7145                 return -ENOTSUP;
7146         }
7147         return mlx5_devx_cmd_flow_dump(sh->fdb_domain, sh->rx_domain,
7148                                        sh->tx_domain, file);
7149 }
7150
7151 /**
7152  * Get aged-out flows.
7153  *
7154  * @param[in] dev
7155  *   Pointer to the Ethernet device structure.
7156  * @param[in] context
7157  *   The address of an array of pointers to the aged-out flows contexts.
7158  * @param[in] nb_countexts
7159  *   The length of context array pointers.
7160  * @param[out] error
7161  *   Perform verbose error reporting if not NULL. Initialized in case of
7162  *   error only.
7163  *
7164  * @return
7165  *   how many contexts get in success, otherwise negative errno value.
7166  *   if nb_contexts is 0, return the amount of all aged contexts.
7167  *   if nb_contexts is not 0 , return the amount of aged flows reported
7168  *   in the context array.
7169  */
7170 int
7171 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
7172                         uint32_t nb_contexts, struct rte_flow_error *error)
7173 {
7174         const struct mlx5_flow_driver_ops *fops;
7175         struct rte_flow_attr attr = { .transfer = 0 };
7176
7177         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7178                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7179                 return fops->get_aged_flows(dev, contexts, nb_contexts,
7180                                                     error);
7181         }
7182         DRV_LOG(ERR,
7183                 "port %u get aged flows is not supported.",
7184                  dev->data->port_id);
7185         return -ENOTSUP;
7186 }
7187
7188 /* Wrapper for driver action_validate op callback */
7189 static int
7190 flow_drv_action_validate(struct rte_eth_dev *dev,
7191                          const struct rte_flow_shared_action_conf *conf,
7192                          const struct rte_flow_action *action,
7193                          const struct mlx5_flow_driver_ops *fops,
7194                          struct rte_flow_error *error)
7195 {
7196         static const char err_msg[] = "shared action validation unsupported";
7197
7198         if (!fops->action_validate) {
7199                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7200                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7201                                    NULL, err_msg);
7202                 return -rte_errno;
7203         }
7204         return fops->action_validate(dev, conf, action, error);
7205 }
7206
7207 /**
7208  * Destroys the shared action by handle.
7209  *
7210  * @param dev
7211  *   Pointer to Ethernet device structure.
7212  * @param[in] action
7213  *   Handle for the shared action to be destroyed.
7214  * @param[out] error
7215  *   Perform verbose error reporting if not NULL. PMDs initialize this
7216  *   structure in case of error only.
7217  *
7218  * @return
7219  *   0 on success, a negative errno value otherwise and rte_errno is set.
7220  *
7221  * @note: wrapper for driver action_create op callback.
7222  */
7223 static int
7224 mlx5_shared_action_destroy(struct rte_eth_dev *dev,
7225                            struct rte_flow_shared_action *action,
7226                            struct rte_flow_error *error)
7227 {
7228         static const char err_msg[] = "shared action destruction unsupported";
7229         struct rte_flow_attr attr = { .transfer = 0 };
7230         const struct mlx5_flow_driver_ops *fops =
7231                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7232
7233         if (!fops->action_destroy) {
7234                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7235                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7236                                    NULL, err_msg);
7237                 return -rte_errno;
7238         }
7239         return fops->action_destroy(dev, action, error);
7240 }
7241
7242 /* Wrapper for driver action_destroy op callback */
7243 static int
7244 flow_drv_action_update(struct rte_eth_dev *dev,
7245                        struct rte_flow_shared_action *action,
7246                        const void *action_conf,
7247                        const struct mlx5_flow_driver_ops *fops,
7248                        struct rte_flow_error *error)
7249 {
7250         static const char err_msg[] = "shared action update unsupported";
7251
7252         if (!fops->action_update) {
7253                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7254                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7255                                    NULL, err_msg);
7256                 return -rte_errno;
7257         }
7258         return fops->action_update(dev, action, action_conf, error);
7259 }
7260
7261 /* Wrapper for driver action_destroy op callback */
7262 static int
7263 flow_drv_action_query(struct rte_eth_dev *dev,
7264                       const struct rte_flow_shared_action *action,
7265                       void *data,
7266                       const struct mlx5_flow_driver_ops *fops,
7267                       struct rte_flow_error *error)
7268 {
7269         static const char err_msg[] = "shared action query unsupported";
7270
7271         if (!fops->action_query) {
7272                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7273                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7274                                    NULL, err_msg);
7275                 return -rte_errno;
7276         }
7277         return fops->action_query(dev, action, data, error);
7278 }
7279
7280 /**
7281  * Create shared action for reuse in multiple flow rules.
7282  *
7283  * @param dev
7284  *   Pointer to Ethernet device structure.
7285  * @param[in] action
7286  *   Action configuration for shared action creation.
7287  * @param[out] error
7288  *   Perform verbose error reporting if not NULL. PMDs initialize this
7289  *   structure in case of error only.
7290  * @return
7291  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
7292  */
7293 static struct rte_flow_shared_action *
7294 mlx5_shared_action_create(struct rte_eth_dev *dev,
7295                           const struct rte_flow_shared_action_conf *conf,
7296                           const struct rte_flow_action *action,
7297                           struct rte_flow_error *error)
7298 {
7299         static const char err_msg[] = "shared action creation unsupported";
7300         struct rte_flow_attr attr = { .transfer = 0 };
7301         const struct mlx5_flow_driver_ops *fops =
7302                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7303
7304         if (flow_drv_action_validate(dev, conf, action, fops, error))
7305                 return NULL;
7306         if (!fops->action_create) {
7307                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
7308                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
7309                                    NULL, err_msg);
7310                 return NULL;
7311         }
7312         return fops->action_create(dev, conf, action, error);
7313 }
7314
7315 /**
7316  * Updates inplace the shared action configuration pointed by *action* handle
7317  * with the configuration provided as *action* argument.
7318  * The update of the shared action configuration effects all flow rules reusing
7319  * the action via handle.
7320  *
7321  * @param dev
7322  *   Pointer to Ethernet device structure.
7323  * @param[in] shared_action
7324  *   Handle for the shared action to be updated.
7325  * @param[in] action
7326  *   Action specification used to modify the action pointed by handle.
7327  *   *action* should be of same type with the action pointed by the *action*
7328  *   handle argument, otherwise considered as invalid.
7329  * @param[out] error
7330  *   Perform verbose error reporting if not NULL. PMDs initialize this
7331  *   structure in case of error only.
7332  *
7333  * @return
7334  *   0 on success, a negative errno value otherwise and rte_errno is set.
7335  */
7336 static int
7337 mlx5_shared_action_update(struct rte_eth_dev *dev,
7338                 struct rte_flow_shared_action *shared_action,
7339                 const struct rte_flow_action *action,
7340                 struct rte_flow_error *error)
7341 {
7342         struct rte_flow_attr attr = { .transfer = 0 };
7343         const struct mlx5_flow_driver_ops *fops =
7344                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7345         int ret;
7346
7347         ret = flow_drv_action_validate(dev, NULL, action, fops, error);
7348         if (ret)
7349                 return ret;
7350         return flow_drv_action_update(dev, shared_action, action->conf, fops,
7351                                       error);
7352 }
7353
7354 /**
7355  * Query the shared action by handle.
7356  *
7357  * This function allows retrieving action-specific data such as counters.
7358  * Data is gathered by special action which may be present/referenced in
7359  * more than one flow rule definition.
7360  *
7361  * \see RTE_FLOW_ACTION_TYPE_COUNT
7362  *
7363  * @param dev
7364  *   Pointer to Ethernet device structure.
7365  * @param[in] action
7366  *   Handle for the shared action to query.
7367  * @param[in, out] data
7368  *   Pointer to storage for the associated query data type.
7369  * @param[out] error
7370  *   Perform verbose error reporting if not NULL. PMDs initialize this
7371  *   structure in case of error only.
7372  *
7373  * @return
7374  *   0 on success, a negative errno value otherwise and rte_errno is set.
7375  */
7376 static int
7377 mlx5_shared_action_query(struct rte_eth_dev *dev,
7378                          const struct rte_flow_shared_action *action,
7379                          void *data,
7380                          struct rte_flow_error *error)
7381 {
7382         struct rte_flow_attr attr = { .transfer = 0 };
7383         const struct mlx5_flow_driver_ops *fops =
7384                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7385
7386         return flow_drv_action_query(dev, action, data, fops, error);
7387 }
7388
7389 /**
7390  * Destroy all shared actions.
7391  *
7392  * @param dev
7393  *   Pointer to Ethernet device.
7394  *
7395  * @return
7396  *   0 on success, a negative errno value otherwise and rte_errno is set.
7397  */
7398 int
7399 mlx5_shared_action_flush(struct rte_eth_dev *dev)
7400 {
7401         struct rte_flow_error error;
7402         struct mlx5_priv *priv = dev->data->dev_private;
7403         struct mlx5_shared_action_rss *action;
7404         int ret = 0;
7405         uint32_t idx;
7406
7407         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
7408                       priv->rss_shared_actions, idx, action, next) {
7409                 ret |= mlx5_shared_action_destroy(dev,
7410                        (struct rte_flow_shared_action *)(uintptr_t)idx, &error);
7411         }
7412         return ret;
7413 }
7414
7415 #ifndef HAVE_MLX5DV_DR
7416 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
7417 #else
7418 #define MLX5_DOMAIN_SYNC_FLOW \
7419         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
7420 #endif
7421
7422 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
7423 {
7424         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
7425         const struct mlx5_flow_driver_ops *fops;
7426         int ret;
7427         struct rte_flow_attr attr = { .transfer = 0 };
7428
7429         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
7430         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
7431         if (ret > 0)
7432                 ret = -ret;
7433         return ret;
7434 }
7435
7436 /**
7437  * tunnel offload functionalilty is defined for DV environment only
7438  */
7439 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
7440 __extension__
7441 union tunnel_offload_mark {
7442         uint32_t val;
7443         struct {
7444                 uint32_t app_reserve:8;
7445                 uint32_t table_id:15;
7446                 uint32_t transfer:1;
7447                 uint32_t _unused_:8;
7448         };
7449 };
7450
7451 static bool
7452 mlx5_access_tunnel_offload_db
7453         (struct rte_eth_dev *dev,
7454          bool (*match)(struct rte_eth_dev *,
7455                        struct mlx5_flow_tunnel *, const void *),
7456          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
7457          void (*miss)(struct rte_eth_dev *, void *),
7458          void *ctx, bool lock_op);
7459
7460 static int
7461 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
7462                              struct rte_flow *flow,
7463                              const struct rte_flow_attr *attr,
7464                              const struct rte_flow_action *app_actions,
7465                              uint32_t flow_idx,
7466                              struct tunnel_default_miss_ctx *ctx,
7467                              struct rte_flow_error *error)
7468 {
7469         struct mlx5_priv *priv = dev->data->dev_private;
7470         struct mlx5_flow *dev_flow;
7471         struct rte_flow_attr miss_attr = *attr;
7472         const struct mlx5_flow_tunnel *tunnel = app_actions[0].conf;
7473         const struct rte_flow_item miss_items[2] = {
7474                 {
7475                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7476                         .spec = NULL,
7477                         .last = NULL,
7478                         .mask = NULL
7479                 },
7480                 {
7481                         .type = RTE_FLOW_ITEM_TYPE_END,
7482                         .spec = NULL,
7483                         .last = NULL,
7484                         .mask = NULL
7485                 }
7486         };
7487         union tunnel_offload_mark mark_id;
7488         struct rte_flow_action_mark miss_mark;
7489         struct rte_flow_action miss_actions[3] = {
7490                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
7491                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
7492         };
7493         const struct rte_flow_action_jump *jump_data;
7494         uint32_t i, flow_table = 0; /* prevent compilation warning */
7495         struct flow_grp_info grp_info = {
7496                 .external = 1,
7497                 .transfer = attr->transfer,
7498                 .fdb_def_rule = !!priv->fdb_def_rule,
7499                 .std_tbl_fix = 0,
7500         };
7501         int ret;
7502
7503         if (!attr->transfer) {
7504                 uint32_t q_size;
7505
7506                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
7507                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
7508                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
7509                                          0, SOCKET_ID_ANY);
7510                 if (!ctx->queue)
7511                         return rte_flow_error_set
7512                                 (error, ENOMEM,
7513                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
7514                                 NULL, "invalid default miss RSS");
7515                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
7516                 ctx->action_rss.level = 0,
7517                 ctx->action_rss.types = priv->rss_conf.rss_hf,
7518                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
7519                 ctx->action_rss.queue_num = priv->reta_idx_n,
7520                 ctx->action_rss.key = priv->rss_conf.rss_key,
7521                 ctx->action_rss.queue = ctx->queue;
7522                 if (!priv->reta_idx_n || !priv->rxqs_n)
7523                         return rte_flow_error_set
7524                                 (error, EINVAL,
7525                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
7526                                 NULL, "invalid port configuration");
7527                 if (!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
7528                         ctx->action_rss.types = 0;
7529                 for (i = 0; i != priv->reta_idx_n; ++i)
7530                         ctx->queue[i] = (*priv->reta_idx)[i];
7531         } else {
7532                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
7533                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
7534         }
7535         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
7536         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
7537         jump_data = app_actions->conf;
7538         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
7539         miss_attr.group = jump_data->group;
7540         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
7541                                        &flow_table, &grp_info, error);
7542         if (ret)
7543                 return rte_flow_error_set(error, EINVAL,
7544                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
7545                                           NULL, "invalid tunnel id");
7546         mark_id.app_reserve = 0;
7547         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
7548         mark_id.transfer = !!attr->transfer;
7549         mark_id._unused_ = 0;
7550         miss_mark.id = mark_id.val;
7551         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
7552                                     miss_items, miss_actions, flow_idx, error);
7553         if (!dev_flow)
7554                 return -rte_errno;
7555         dev_flow->flow = flow;
7556         dev_flow->external = true;
7557         dev_flow->tunnel = tunnel;
7558         /* Subflow object was created, we must include one in the list. */
7559         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
7560                       dev_flow->handle, next);
7561         DRV_LOG(DEBUG,
7562                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
7563                 dev->data->port_id, tunnel->app_tunnel.type,
7564                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
7565         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
7566                                   miss_actions, error);
7567         if (!ret)
7568                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
7569                                                   error);
7570
7571         return ret;
7572 }
7573
7574 static const struct mlx5_flow_tbl_data_entry  *
7575 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
7576 {
7577         struct mlx5_priv *priv = dev->data->dev_private;
7578         struct mlx5_dev_ctx_shared *sh = priv->sh;
7579         struct mlx5_hlist_entry *he;
7580         union tunnel_offload_mark mbits = { .val = mark };
7581         union mlx5_flow_tbl_key table_key = {
7582                 {
7583                         .table_id = tunnel_id_to_flow_tbl(mbits.table_id),
7584                         .dummy = 0,
7585                         .domain = !!mbits.transfer,
7586                         .direction = 0,
7587                 }
7588         };
7589         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, NULL);
7590         return he ?
7591                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
7592 }
7593
7594 static void
7595 mlx5_flow_tunnel_grp2tbl_remove_cb(struct mlx5_hlist *list,
7596                                    struct mlx5_hlist_entry *entry)
7597 {
7598         struct mlx5_dev_ctx_shared *sh = list->ctx;
7599         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
7600
7601         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7602                         tunnel_flow_tbl_to_id(tte->flow_table));
7603         mlx5_free(tte);
7604 }
7605
7606 static int
7607 mlx5_flow_tunnel_grp2tbl_match_cb(struct mlx5_hlist *list __rte_unused,
7608                                   struct mlx5_hlist_entry *entry,
7609                                   uint64_t key, void *cb_ctx __rte_unused)
7610 {
7611         union tunnel_tbl_key tbl = {
7612                 .val = key,
7613         };
7614         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
7615
7616         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
7617 }
7618
7619 static struct mlx5_hlist_entry *
7620 mlx5_flow_tunnel_grp2tbl_create_cb(struct mlx5_hlist *list, uint64_t key,
7621                                    void *ctx __rte_unused)
7622 {
7623         struct mlx5_dev_ctx_shared *sh = list->ctx;
7624         struct tunnel_tbl_entry *tte;
7625         union tunnel_tbl_key tbl = {
7626                 .val = key,
7627         };
7628
7629         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
7630                           sizeof(*tte), 0,
7631                           SOCKET_ID_ANY);
7632         if (!tte)
7633                 goto err;
7634         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7635                           &tte->flow_table);
7636         if (tte->flow_table >= MLX5_MAX_TABLES) {
7637                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
7638                         tte->flow_table);
7639                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
7640                                 tte->flow_table);
7641                 goto err;
7642         } else if (!tte->flow_table) {
7643                 goto err;
7644         }
7645         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
7646         tte->tunnel_id = tbl.tunnel_id;
7647         tte->group = tbl.group;
7648         return &tte->hash;
7649 err:
7650         if (tte)
7651                 mlx5_free(tte);
7652         return NULL;
7653 }
7654
7655 static uint32_t
7656 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
7657                                 const struct mlx5_flow_tunnel *tunnel,
7658                                 uint32_t group, uint32_t *table,
7659                                 struct rte_flow_error *error)
7660 {
7661         struct mlx5_hlist_entry *he;
7662         struct tunnel_tbl_entry *tte;
7663         union tunnel_tbl_key key = {
7664                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
7665                 .group = group
7666         };
7667         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7668         struct mlx5_hlist *group_hash;
7669
7670         group_hash = tunnel ? tunnel->groups : thub->groups;
7671         he = mlx5_hlist_register(group_hash, key.val, NULL);
7672         if (!he)
7673                 return rte_flow_error_set(error, EINVAL,
7674                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
7675                                           NULL,
7676                                           "tunnel group index not supported");
7677         tte = container_of(he, typeof(*tte), hash);
7678         *table = tte->flow_table;
7679         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
7680                 dev->data->port_id, key.tunnel_id, group, *table);
7681         return 0;
7682 }
7683
7684 static void
7685 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
7686                       struct mlx5_flow_tunnel *tunnel)
7687 {
7688         struct mlx5_priv *priv = dev->data->dev_private;
7689         struct mlx5_indexed_pool *ipool;
7690
7691         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
7692                 dev->data->port_id, tunnel->tunnel_id);
7693         LIST_REMOVE(tunnel, chain);
7694         mlx5_hlist_destroy(tunnel->groups);
7695         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
7696         mlx5_ipool_free(ipool, tunnel->tunnel_id);
7697 }
7698
7699 static bool
7700 mlx5_access_tunnel_offload_db
7701         (struct rte_eth_dev *dev,
7702          bool (*match)(struct rte_eth_dev *,
7703                        struct mlx5_flow_tunnel *, const void *),
7704          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
7705          void (*miss)(struct rte_eth_dev *, void *),
7706          void *ctx, bool lock_op)
7707 {
7708         bool verdict = false;
7709         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7710         struct mlx5_flow_tunnel *tunnel;
7711
7712         rte_spinlock_lock(&thub->sl);
7713         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
7714                 verdict = match(dev, tunnel, (const void *)ctx);
7715                 if (verdict)
7716                         break;
7717         }
7718         if (!lock_op)
7719                 rte_spinlock_unlock(&thub->sl);
7720         if (verdict && hit)
7721                 hit(dev, tunnel, ctx);
7722         if (!verdict && miss)
7723                 miss(dev, ctx);
7724         if (lock_op)
7725                 rte_spinlock_unlock(&thub->sl);
7726
7727         return verdict;
7728 }
7729
7730 struct tunnel_db_find_tunnel_id_ctx {
7731         uint32_t tunnel_id;
7732         struct mlx5_flow_tunnel *tunnel;
7733 };
7734
7735 static bool
7736 find_tunnel_id_match(struct rte_eth_dev *dev,
7737                      struct mlx5_flow_tunnel *tunnel, const void *x)
7738 {
7739         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
7740
7741         RTE_SET_USED(dev);
7742         return tunnel->tunnel_id == ctx->tunnel_id;
7743 }
7744
7745 static void
7746 find_tunnel_id_hit(struct rte_eth_dev *dev,
7747                    struct mlx5_flow_tunnel *tunnel, void *x)
7748 {
7749         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
7750         RTE_SET_USED(dev);
7751         ctx->tunnel = tunnel;
7752 }
7753
7754 static struct mlx5_flow_tunnel *
7755 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
7756 {
7757         struct tunnel_db_find_tunnel_id_ctx ctx = {
7758                 .tunnel_id = id,
7759         };
7760
7761         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
7762                                       find_tunnel_id_hit, NULL, &ctx, true);
7763
7764         return ctx.tunnel;
7765 }
7766
7767 static struct mlx5_flow_tunnel *
7768 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
7769                           const struct rte_flow_tunnel *app_tunnel)
7770 {
7771         struct mlx5_priv *priv = dev->data->dev_private;
7772         struct mlx5_indexed_pool *ipool;
7773         struct mlx5_flow_tunnel *tunnel;
7774         uint32_t id;
7775
7776         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
7777         tunnel = mlx5_ipool_zmalloc(ipool, &id);
7778         if (!tunnel)
7779                 return NULL;
7780         if (id >= MLX5_MAX_TUNNELS) {
7781                 mlx5_ipool_free(ipool, id);
7782                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
7783                 return NULL;
7784         }
7785         tunnel->groups = mlx5_hlist_create("tunnel groups", 1024, 0, 0,
7786                                            mlx5_flow_tunnel_grp2tbl_create_cb,
7787                                            mlx5_flow_tunnel_grp2tbl_match_cb,
7788                                            mlx5_flow_tunnel_grp2tbl_remove_cb);
7789         if (!tunnel->groups) {
7790                 mlx5_ipool_free(ipool, id);
7791                 return NULL;
7792         }
7793         tunnel->groups->ctx = priv->sh;
7794         /* initiate new PMD tunnel */
7795         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
7796         tunnel->tunnel_id = id;
7797         tunnel->action.type = (typeof(tunnel->action.type))
7798                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
7799         tunnel->action.conf = tunnel;
7800         tunnel->item.type = (typeof(tunnel->item.type))
7801                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
7802         tunnel->item.spec = tunnel;
7803         tunnel->item.last = NULL;
7804         tunnel->item.mask = NULL;
7805
7806         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
7807                 dev->data->port_id, tunnel->tunnel_id);
7808
7809         return tunnel;
7810 }
7811
7812 struct tunnel_db_get_tunnel_ctx {
7813         const struct rte_flow_tunnel *app_tunnel;
7814         struct mlx5_flow_tunnel *tunnel;
7815 };
7816
7817 static bool get_tunnel_match(struct rte_eth_dev *dev,
7818                              struct mlx5_flow_tunnel *tunnel, const void *x)
7819 {
7820         const struct tunnel_db_get_tunnel_ctx *ctx = x;
7821
7822         RTE_SET_USED(dev);
7823         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
7824                        sizeof(*ctx->app_tunnel));
7825 }
7826
7827 static void get_tunnel_hit(struct rte_eth_dev *dev,
7828                            struct mlx5_flow_tunnel *tunnel, void *x)
7829 {
7830         /* called under tunnel spinlock protection */
7831         struct tunnel_db_get_tunnel_ctx *ctx = x;
7832
7833         RTE_SET_USED(dev);
7834         tunnel->refctn++;
7835         ctx->tunnel = tunnel;
7836 }
7837
7838 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
7839 {
7840         /* called under tunnel spinlock protection */
7841         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
7842         struct tunnel_db_get_tunnel_ctx *ctx = x;
7843
7844         rte_spinlock_unlock(&thub->sl);
7845         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
7846         ctx->tunnel->refctn = 1;
7847         rte_spinlock_lock(&thub->sl);
7848         if (ctx->tunnel)
7849                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
7850 }
7851
7852
7853 static int
7854 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
7855                      const struct rte_flow_tunnel *app_tunnel,
7856                      struct mlx5_flow_tunnel **tunnel)
7857 {
7858         struct tunnel_db_get_tunnel_ctx ctx = {
7859                 .app_tunnel = app_tunnel,
7860         };
7861
7862         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
7863                                       get_tunnel_miss, &ctx, true);
7864         *tunnel = ctx.tunnel;
7865         return ctx.tunnel ? 0 : -ENOMEM;
7866 }
7867
7868 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
7869 {
7870         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
7871
7872         if (!thub)
7873                 return;
7874         if (!LIST_EMPTY(&thub->tunnels))
7875                 DRV_LOG(WARNING, "port %u tunnels present\n", port_id);
7876         mlx5_hlist_destroy(thub->groups);
7877         mlx5_free(thub);
7878 }
7879
7880 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
7881 {
7882         int err;
7883         struct mlx5_flow_tunnel_hub *thub;
7884
7885         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
7886                            0, SOCKET_ID_ANY);
7887         if (!thub)
7888                 return -ENOMEM;
7889         LIST_INIT(&thub->tunnels);
7890         rte_spinlock_init(&thub->sl);
7891         thub->groups = mlx5_hlist_create("flow groups", MLX5_MAX_TABLES, 0,
7892                                          0, mlx5_flow_tunnel_grp2tbl_create_cb,
7893                                          mlx5_flow_tunnel_grp2tbl_match_cb,
7894                                          mlx5_flow_tunnel_grp2tbl_remove_cb);
7895         if (!thub->groups) {
7896                 err = -rte_errno;
7897                 goto err;
7898         }
7899         thub->groups->ctx = sh;
7900         sh->tunnel_hub = thub;
7901
7902         return 0;
7903
7904 err:
7905         if (thub->groups)
7906                 mlx5_hlist_destroy(thub->groups);
7907         if (thub)
7908                 mlx5_free(thub);
7909         return err;
7910 }
7911
7912 static inline bool
7913 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
7914                           struct rte_flow_tunnel *tunnel,
7915                           const char *err_msg)
7916 {
7917         err_msg = NULL;
7918         if (!is_tunnel_offload_active(dev)) {
7919                 err_msg = "tunnel offload was not activated";
7920                 goto out;
7921         } else if (!tunnel) {
7922                 err_msg = "no application tunnel";
7923                 goto out;
7924         }
7925
7926         switch (tunnel->type) {
7927         default:
7928                 err_msg = "unsupported tunnel type";
7929                 goto out;
7930         case RTE_FLOW_ITEM_TYPE_VXLAN:
7931                 break;
7932         }
7933
7934 out:
7935         return !err_msg;
7936 }
7937
7938 static int
7939 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
7940                     struct rte_flow_tunnel *app_tunnel,
7941                     struct rte_flow_action **actions,
7942                     uint32_t *num_of_actions,
7943                     struct rte_flow_error *error)
7944 {
7945         int ret;
7946         struct mlx5_flow_tunnel *tunnel;
7947         const char *err_msg = NULL;
7948         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
7949
7950         if (!verdict)
7951                 return rte_flow_error_set(error, EINVAL,
7952                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
7953                                           err_msg);
7954         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
7955         if (ret < 0) {
7956                 return rte_flow_error_set(error, ret,
7957                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
7958                                           "failed to initialize pmd tunnel");
7959         }
7960         *actions = &tunnel->action;
7961         *num_of_actions = 1;
7962         return 0;
7963 }
7964
7965 static int
7966 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
7967                        struct rte_flow_tunnel *app_tunnel,
7968                        struct rte_flow_item **items,
7969                        uint32_t *num_of_items,
7970                        struct rte_flow_error *error)
7971 {
7972         int ret;
7973         struct mlx5_flow_tunnel *tunnel;
7974         const char *err_msg = NULL;
7975         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
7976
7977         if (!verdict)
7978                 return rte_flow_error_set(error, EINVAL,
7979                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
7980                                           err_msg);
7981         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
7982         if (ret < 0) {
7983                 return rte_flow_error_set(error, ret,
7984                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
7985                                           "failed to initialize pmd tunnel");
7986         }
7987         *items = &tunnel->item;
7988         *num_of_items = 1;
7989         return 0;
7990 }
7991
7992 struct tunnel_db_element_release_ctx {
7993         struct rte_flow_item *items;
7994         struct rte_flow_action *actions;
7995         uint32_t num_elements;
7996         struct rte_flow_error *error;
7997         int ret;
7998 };
7999
8000 static bool
8001 tunnel_element_release_match(struct rte_eth_dev *dev,
8002                              struct mlx5_flow_tunnel *tunnel, const void *x)
8003 {
8004         const struct tunnel_db_element_release_ctx *ctx = x;
8005
8006         RTE_SET_USED(dev);
8007         if (ctx->num_elements != 1)
8008                 return false;
8009         else if (ctx->items)
8010                 return ctx->items == &tunnel->item;
8011         else if (ctx->actions)
8012                 return ctx->actions == &tunnel->action;
8013
8014         return false;
8015 }
8016
8017 static void
8018 tunnel_element_release_hit(struct rte_eth_dev *dev,
8019                            struct mlx5_flow_tunnel *tunnel, void *x)
8020 {
8021         struct tunnel_db_element_release_ctx *ctx = x;
8022         ctx->ret = 0;
8023         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
8024                 mlx5_flow_tunnel_free(dev, tunnel);
8025 }
8026
8027 static void
8028 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
8029 {
8030         struct tunnel_db_element_release_ctx *ctx = x;
8031         RTE_SET_USED(dev);
8032         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
8033                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
8034                                       "invalid argument");
8035 }
8036
8037 static int
8038 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
8039                        struct rte_flow_item *pmd_items,
8040                        uint32_t num_items, struct rte_flow_error *err)
8041 {
8042         struct tunnel_db_element_release_ctx ctx = {
8043                 .items = pmd_items,
8044                 .actions = NULL,
8045                 .num_elements = num_items,
8046                 .error = err,
8047         };
8048
8049         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
8050                                       tunnel_element_release_hit,
8051                                       tunnel_element_release_miss, &ctx, false);
8052
8053         return ctx.ret;
8054 }
8055
8056 static int
8057 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
8058                          struct rte_flow_action *pmd_actions,
8059                          uint32_t num_actions, struct rte_flow_error *err)
8060 {
8061         struct tunnel_db_element_release_ctx ctx = {
8062                 .items = NULL,
8063                 .actions = pmd_actions,
8064                 .num_elements = num_actions,
8065                 .error = err,
8066         };
8067
8068         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
8069                                       tunnel_element_release_hit,
8070                                       tunnel_element_release_miss, &ctx, false);
8071
8072         return ctx.ret;
8073 }
8074
8075 static int
8076 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
8077                                   struct rte_mbuf *m,
8078                                   struct rte_flow_restore_info *info,
8079                                   struct rte_flow_error *err)
8080 {
8081         uint64_t ol_flags = m->ol_flags;
8082         const struct mlx5_flow_tbl_data_entry *tble;
8083         const uint64_t mask = PKT_RX_FDIR | PKT_RX_FDIR_ID;
8084
8085         if (!is_tunnel_offload_active(dev)) {
8086                 info->flags = 0;
8087                 return 0;
8088         }
8089
8090         if ((ol_flags & mask) != mask)
8091                 goto err;
8092         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
8093         if (!tble) {
8094                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
8095                         dev->data->port_id, m->hash.fdir.hi);
8096                 goto err;
8097         }
8098         MLX5_ASSERT(tble->tunnel);
8099         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
8100         info->group_id = tble->group_id;
8101         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
8102                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
8103                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
8104
8105         return 0;
8106
8107 err:
8108         return rte_flow_error_set(err, EINVAL,
8109                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8110                                   "failed to get restore info");
8111 }
8112
8113 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
8114 static int
8115 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
8116                            __rte_unused struct rte_flow_tunnel *app_tunnel,
8117                            __rte_unused struct rte_flow_action **actions,
8118                            __rte_unused uint32_t *num_of_actions,
8119                            __rte_unused struct rte_flow_error *error)
8120 {
8121         return -ENOTSUP;
8122 }
8123
8124 static int
8125 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
8126                        __rte_unused struct rte_flow_tunnel *app_tunnel,
8127                        __rte_unused struct rte_flow_item **items,
8128                        __rte_unused uint32_t *num_of_items,
8129                        __rte_unused struct rte_flow_error *error)
8130 {
8131         return -ENOTSUP;
8132 }
8133
8134 static int
8135 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
8136                               __rte_unused struct rte_flow_item *pmd_items,
8137                               __rte_unused uint32_t num_items,
8138                               __rte_unused struct rte_flow_error *err)
8139 {
8140         return -ENOTSUP;
8141 }
8142
8143 static int
8144 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
8145                                 __rte_unused struct rte_flow_action *pmd_action,
8146                                 __rte_unused uint32_t num_actions,
8147                                 __rte_unused struct rte_flow_error *err)
8148 {
8149         return -ENOTSUP;
8150 }
8151
8152 static int
8153 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
8154                                   __rte_unused struct rte_mbuf *m,
8155                                   __rte_unused struct rte_flow_restore_info *i,
8156                                   __rte_unused struct rte_flow_error *err)
8157 {
8158         return -ENOTSUP;
8159 }
8160
8161 static int
8162 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
8163                              __rte_unused struct rte_flow *flow,
8164                              __rte_unused const struct rte_flow_attr *attr,
8165                              __rte_unused const struct rte_flow_action *actions,
8166                              __rte_unused uint32_t flow_idx,
8167                              __rte_unused struct tunnel_default_miss_ctx *ctx,
8168                              __rte_unused struct rte_flow_error *error)
8169 {
8170         return -ENOTSUP;
8171 }
8172
8173 static struct mlx5_flow_tunnel *
8174 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
8175                     __rte_unused uint32_t id)
8176 {
8177         return NULL;
8178 }
8179
8180 static void
8181 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
8182                       __rte_unused struct mlx5_flow_tunnel *tunnel)
8183 {
8184 }
8185
8186 static uint32_t
8187 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
8188                                 __rte_unused const struct mlx5_flow_tunnel *t,
8189                                 __rte_unused uint32_t group,
8190                                 __rte_unused uint32_t *table,
8191                                 struct rte_flow_error *error)
8192 {
8193         return rte_flow_error_set(error, ENOTSUP,
8194                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8195                                   "tunnel offload requires DV support");
8196 }
8197
8198 void
8199 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
8200                         __rte_unused  uint16_t port_id)
8201 {
8202 }
8203 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
8204