1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2016 6WIND S.A.
3 * Copyright 2016 Mellanox Technologies, Ltd
6 #include <netinet/in.h>
13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
15 #pragma GCC diagnostic ignored "-Wpedantic"
17 #include <infiniband/verbs.h>
19 #pragma GCC diagnostic error "-Wpedantic"
22 #include <rte_common.h>
23 #include <rte_ether.h>
24 #include <rte_ethdev_driver.h>
26 #include <rte_flow_driver.h>
27 #include <rte_malloc.h>
31 #include "mlx5_defs.h"
32 #include "mlx5_flow.h"
33 #include "mlx5_glue.h"
35 #include "mlx5_rxtx.h"
37 /* Dev ops structure defined in mlx5.c */
38 extern const struct eth_dev_ops mlx5_dev_ops;
39 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
41 /** Device flow drivers. */
42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
45 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
47 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
49 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
50 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
51 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
52 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
54 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
55 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
60 MLX5_EXPANSION_ROOT_OUTER,
61 MLX5_EXPANSION_ROOT_ETH_VLAN,
62 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
63 MLX5_EXPANSION_OUTER_ETH,
64 MLX5_EXPANSION_OUTER_ETH_VLAN,
65 MLX5_EXPANSION_OUTER_VLAN,
66 MLX5_EXPANSION_OUTER_IPV4,
67 MLX5_EXPANSION_OUTER_IPV4_UDP,
68 MLX5_EXPANSION_OUTER_IPV4_TCP,
69 MLX5_EXPANSION_OUTER_IPV6,
70 MLX5_EXPANSION_OUTER_IPV6_UDP,
71 MLX5_EXPANSION_OUTER_IPV6_TCP,
73 MLX5_EXPANSION_VXLAN_GPE,
77 MLX5_EXPANSION_ETH_VLAN,
80 MLX5_EXPANSION_IPV4_UDP,
81 MLX5_EXPANSION_IPV4_TCP,
83 MLX5_EXPANSION_IPV6_UDP,
84 MLX5_EXPANSION_IPV6_TCP,
87 /** Supported expansion of items. */
88 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
89 [MLX5_EXPANSION_ROOT] = {
90 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
93 .type = RTE_FLOW_ITEM_TYPE_END,
95 [MLX5_EXPANSION_ROOT_OUTER] = {
96 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
97 MLX5_EXPANSION_OUTER_IPV4,
98 MLX5_EXPANSION_OUTER_IPV6),
99 .type = RTE_FLOW_ITEM_TYPE_END,
101 [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
102 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
103 .type = RTE_FLOW_ITEM_TYPE_END,
105 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
106 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
107 .type = RTE_FLOW_ITEM_TYPE_END,
109 [MLX5_EXPANSION_OUTER_ETH] = {
110 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
111 MLX5_EXPANSION_OUTER_IPV6,
112 MLX5_EXPANSION_MPLS),
113 .type = RTE_FLOW_ITEM_TYPE_ETH,
116 [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
117 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
118 .type = RTE_FLOW_ITEM_TYPE_ETH,
121 [MLX5_EXPANSION_OUTER_VLAN] = {
122 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
123 MLX5_EXPANSION_OUTER_IPV6),
124 .type = RTE_FLOW_ITEM_TYPE_VLAN,
126 [MLX5_EXPANSION_OUTER_IPV4] = {
127 .next = RTE_FLOW_EXPAND_RSS_NEXT
128 (MLX5_EXPANSION_OUTER_IPV4_UDP,
129 MLX5_EXPANSION_OUTER_IPV4_TCP,
132 MLX5_EXPANSION_IPV6),
133 .type = RTE_FLOW_ITEM_TYPE_IPV4,
134 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
135 ETH_RSS_NONFRAG_IPV4_OTHER,
137 [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
138 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
139 MLX5_EXPANSION_VXLAN_GPE),
140 .type = RTE_FLOW_ITEM_TYPE_UDP,
141 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
143 [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
144 .type = RTE_FLOW_ITEM_TYPE_TCP,
145 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
147 [MLX5_EXPANSION_OUTER_IPV6] = {
148 .next = RTE_FLOW_EXPAND_RSS_NEXT
149 (MLX5_EXPANSION_OUTER_IPV6_UDP,
150 MLX5_EXPANSION_OUTER_IPV6_TCP,
152 MLX5_EXPANSION_IPV6),
153 .type = RTE_FLOW_ITEM_TYPE_IPV6,
154 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
155 ETH_RSS_NONFRAG_IPV6_OTHER,
157 [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
158 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
159 MLX5_EXPANSION_VXLAN_GPE),
160 .type = RTE_FLOW_ITEM_TYPE_UDP,
161 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
163 [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
164 .type = RTE_FLOW_ITEM_TYPE_TCP,
165 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
167 [MLX5_EXPANSION_VXLAN] = {
168 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
169 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
171 [MLX5_EXPANSION_VXLAN_GPE] = {
172 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
174 MLX5_EXPANSION_IPV6),
175 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
177 [MLX5_EXPANSION_GRE] = {
178 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
179 .type = RTE_FLOW_ITEM_TYPE_GRE,
181 [MLX5_EXPANSION_MPLS] = {
182 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
183 MLX5_EXPANSION_IPV6),
184 .type = RTE_FLOW_ITEM_TYPE_MPLS,
186 [MLX5_EXPANSION_ETH] = {
187 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
188 MLX5_EXPANSION_IPV6),
189 .type = RTE_FLOW_ITEM_TYPE_ETH,
191 [MLX5_EXPANSION_ETH_VLAN] = {
192 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
193 .type = RTE_FLOW_ITEM_TYPE_ETH,
195 [MLX5_EXPANSION_VLAN] = {
196 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
197 MLX5_EXPANSION_IPV6),
198 .type = RTE_FLOW_ITEM_TYPE_VLAN,
200 [MLX5_EXPANSION_IPV4] = {
201 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
202 MLX5_EXPANSION_IPV4_TCP),
203 .type = RTE_FLOW_ITEM_TYPE_IPV4,
204 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
205 ETH_RSS_NONFRAG_IPV4_OTHER,
207 [MLX5_EXPANSION_IPV4_UDP] = {
208 .type = RTE_FLOW_ITEM_TYPE_UDP,
209 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
211 [MLX5_EXPANSION_IPV4_TCP] = {
212 .type = RTE_FLOW_ITEM_TYPE_TCP,
213 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
215 [MLX5_EXPANSION_IPV6] = {
216 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
217 MLX5_EXPANSION_IPV6_TCP),
218 .type = RTE_FLOW_ITEM_TYPE_IPV6,
219 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
220 ETH_RSS_NONFRAG_IPV6_OTHER,
222 [MLX5_EXPANSION_IPV6_UDP] = {
223 .type = RTE_FLOW_ITEM_TYPE_UDP,
224 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
226 [MLX5_EXPANSION_IPV6_TCP] = {
227 .type = RTE_FLOW_ITEM_TYPE_TCP,
228 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
232 static const struct rte_flow_ops mlx5_flow_ops = {
233 .validate = mlx5_flow_validate,
234 .create = mlx5_flow_create,
235 .destroy = mlx5_flow_destroy,
236 .flush = mlx5_flow_flush,
237 .isolate = mlx5_flow_isolate,
238 .query = mlx5_flow_query,
241 /* Convert FDIR request to Generic flow. */
243 struct rte_flow_attr attr;
244 struct rte_flow_item items[4];
245 struct rte_flow_item_eth l2;
246 struct rte_flow_item_eth l2_mask;
248 struct rte_flow_item_ipv4 ipv4;
249 struct rte_flow_item_ipv6 ipv6;
252 struct rte_flow_item_ipv4 ipv4;
253 struct rte_flow_item_ipv6 ipv6;
256 struct rte_flow_item_udp udp;
257 struct rte_flow_item_tcp tcp;
260 struct rte_flow_item_udp udp;
261 struct rte_flow_item_tcp tcp;
263 struct rte_flow_action actions[2];
264 struct rte_flow_action_queue queue;
267 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
268 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
269 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
272 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
273 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
274 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
275 { 9, 10, 11 }, { 12, 13, 14 },
278 /* Tunnel information. */
279 struct mlx5_flow_tunnel_info {
280 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
281 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
284 static struct mlx5_flow_tunnel_info tunnels_info[] = {
286 .tunnel = MLX5_FLOW_LAYER_VXLAN,
287 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
290 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
291 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
294 .tunnel = MLX5_FLOW_LAYER_GRE,
295 .ptype = RTE_PTYPE_TUNNEL_GRE,
298 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
299 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
302 .tunnel = MLX5_FLOW_LAYER_MPLS,
303 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
306 .tunnel = MLX5_FLOW_LAYER_NVGRE,
307 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
310 .tunnel = MLX5_FLOW_LAYER_IPIP,
311 .ptype = RTE_PTYPE_TUNNEL_IP,
314 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
315 .ptype = RTE_PTYPE_TUNNEL_IP,
320 * Discover the maximum number of priority available.
323 * Pointer to the Ethernet device structure.
326 * number of supported flow priority on success, a negative errno
327 * value otherwise and rte_errno is set.
330 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
332 struct mlx5_priv *priv = dev->data->dev_private;
334 struct ibv_flow_attr attr;
335 struct ibv_flow_spec_eth eth;
336 struct ibv_flow_spec_action_drop drop;
340 .port = (uint8_t)priv->ibv_port,
343 .type = IBV_FLOW_SPEC_ETH,
344 .size = sizeof(struct ibv_flow_spec_eth),
347 .size = sizeof(struct ibv_flow_spec_action_drop),
348 .type = IBV_FLOW_SPEC_ACTION_DROP,
351 struct ibv_flow *flow;
352 struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
353 uint16_t vprio[] = { 8, 16 };
361 for (i = 0; i != RTE_DIM(vprio); i++) {
362 flow_attr.attr.priority = vprio[i] - 1;
363 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
366 claim_zero(mlx5_glue->destroy_flow(flow));
369 mlx5_hrxq_drop_release(dev);
372 priority = RTE_DIM(priority_map_3);
375 priority = RTE_DIM(priority_map_5);
380 "port %u verbs maximum priority: %d expected 8/16",
381 dev->data->port_id, priority);
384 DRV_LOG(INFO, "port %u flow maximum priority: %d",
385 dev->data->port_id, priority);
390 * Adjust flow priority based on the highest layer and the request priority.
393 * Pointer to the Ethernet device structure.
394 * @param[in] priority
395 * The rule base priority.
396 * @param[in] subpriority
397 * The priority based on the items.
402 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
403 uint32_t subpriority)
406 struct mlx5_priv *priv = dev->data->dev_private;
408 switch (priv->config.flow_prio) {
409 case RTE_DIM(priority_map_3):
410 res = priority_map_3[priority][subpriority];
412 case RTE_DIM(priority_map_5):
413 res = priority_map_5[priority][subpriority];
420 * Verify the @p item specifications (spec, last, mask) are compatible with the
424 * Item specification.
426 * @p item->mask or flow default bit-masks.
427 * @param[in] nic_mask
428 * Bit-masks covering supported fields by the NIC to compare with user mask.
430 * Bit-masks size in bytes.
432 * Pointer to error structure.
435 * 0 on success, a negative errno value otherwise and rte_errno is set.
438 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
440 const uint8_t *nic_mask,
442 struct rte_flow_error *error)
447 for (i = 0; i < size; ++i)
448 if ((nic_mask[i] | mask[i]) != nic_mask[i])
449 return rte_flow_error_set(error, ENOTSUP,
450 RTE_FLOW_ERROR_TYPE_ITEM,
452 "mask enables non supported"
454 if (!item->spec && (item->mask || item->last))
455 return rte_flow_error_set(error, EINVAL,
456 RTE_FLOW_ERROR_TYPE_ITEM, item,
457 "mask/last without a spec is not"
459 if (item->spec && item->last) {
465 for (i = 0; i < size; ++i) {
466 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
467 last[i] = ((const uint8_t *)item->last)[i] & mask[i];
469 ret = memcmp(spec, last, size);
471 return rte_flow_error_set(error, EINVAL,
472 RTE_FLOW_ERROR_TYPE_ITEM,
474 "range is not valid");
480 * Adjust the hash fields according to the @p flow information.
482 * @param[in] dev_flow.
483 * Pointer to the mlx5_flow.
485 * 1 when the hash field is for a tunnel item.
486 * @param[in] layer_types
488 * @param[in] hash_fields
492 * The hash fields that should be used.
495 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
496 int tunnel __rte_unused, uint64_t layer_types,
497 uint64_t hash_fields)
499 struct rte_flow *flow = dev_flow->flow;
500 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
501 int rss_request_inner = flow->rss.level >= 2;
503 /* Check RSS hash level for tunnel. */
504 if (tunnel && rss_request_inner)
505 hash_fields |= IBV_RX_HASH_INNER;
506 else if (tunnel || rss_request_inner)
509 /* Check if requested layer matches RSS hash fields. */
510 if (!(flow->rss.types & layer_types))
516 * Lookup and set the ptype in the data Rx part. A single Ptype can be used,
517 * if several tunnel rules are used on this queue, the tunnel ptype will be
521 * Rx queue to update.
524 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
527 uint32_t tunnel_ptype = 0;
529 /* Look up for the ptype to use. */
530 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
531 if (!rxq_ctrl->flow_tunnels_n[i])
534 tunnel_ptype = tunnels_info[i].ptype;
540 rxq_ctrl->rxq.tunnel = tunnel_ptype;
544 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
548 * Pointer to the Ethernet device structure.
549 * @param[in] dev_flow
550 * Pointer to device flow structure.
553 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
555 struct mlx5_priv *priv = dev->data->dev_private;
556 struct rte_flow *flow = dev_flow->flow;
557 const int mark = !!(flow->actions &
558 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
559 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
562 for (i = 0; i != flow->rss.queue_num; ++i) {
563 int idx = (*flow->queue)[i];
564 struct mlx5_rxq_ctrl *rxq_ctrl =
565 container_of((*priv->rxqs)[idx],
566 struct mlx5_rxq_ctrl, rxq);
569 rxq_ctrl->rxq.mark = 1;
570 rxq_ctrl->flow_mark_n++;
575 /* Increase the counter matching the flow. */
576 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
577 if ((tunnels_info[j].tunnel &
579 tunnels_info[j].tunnel) {
580 rxq_ctrl->flow_tunnels_n[j]++;
584 flow_rxq_tunnel_ptype_update(rxq_ctrl);
590 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
593 * Pointer to the Ethernet device structure.
595 * Pointer to flow structure.
598 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
600 struct mlx5_flow *dev_flow;
602 LIST_FOREACH(dev_flow, &flow->dev_flows, next)
603 flow_drv_rxq_flags_set(dev, dev_flow);
607 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
608 * device flow if no other flow uses it with the same kind of request.
611 * Pointer to Ethernet device.
612 * @param[in] dev_flow
613 * Pointer to the device flow.
616 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
618 struct mlx5_priv *priv = dev->data->dev_private;
619 struct rte_flow *flow = dev_flow->flow;
620 const int mark = !!(flow->actions &
621 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
622 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
625 assert(dev->data->dev_started);
626 for (i = 0; i != flow->rss.queue_num; ++i) {
627 int idx = (*flow->queue)[i];
628 struct mlx5_rxq_ctrl *rxq_ctrl =
629 container_of((*priv->rxqs)[idx],
630 struct mlx5_rxq_ctrl, rxq);
633 rxq_ctrl->flow_mark_n--;
634 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
639 /* Decrease the counter matching the flow. */
640 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
641 if ((tunnels_info[j].tunnel &
643 tunnels_info[j].tunnel) {
644 rxq_ctrl->flow_tunnels_n[j]--;
648 flow_rxq_tunnel_ptype_update(rxq_ctrl);
654 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
655 * @p flow if no other flow uses it with the same kind of request.
658 * Pointer to Ethernet device.
660 * Pointer to the flow.
663 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
665 struct mlx5_flow *dev_flow;
667 LIST_FOREACH(dev_flow, &flow->dev_flows, next)
668 flow_drv_rxq_flags_trim(dev, dev_flow);
672 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
675 * Pointer to Ethernet device.
678 flow_rxq_flags_clear(struct rte_eth_dev *dev)
680 struct mlx5_priv *priv = dev->data->dev_private;
683 for (i = 0; i != priv->rxqs_n; ++i) {
684 struct mlx5_rxq_ctrl *rxq_ctrl;
687 if (!(*priv->rxqs)[i])
689 rxq_ctrl = container_of((*priv->rxqs)[i],
690 struct mlx5_rxq_ctrl, rxq);
691 rxq_ctrl->flow_mark_n = 0;
692 rxq_ctrl->rxq.mark = 0;
693 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
694 rxq_ctrl->flow_tunnels_n[j] = 0;
695 rxq_ctrl->rxq.tunnel = 0;
700 * Validate the flag action.
702 * @param[in] action_flags
703 * Bit-fields that holds the actions detected until now.
705 * Attributes of flow that includes this action.
707 * Pointer to error structure.
710 * 0 on success, a negative errno value otherwise and rte_errno is set.
713 mlx5_flow_validate_action_flag(uint64_t action_flags,
714 const struct rte_flow_attr *attr,
715 struct rte_flow_error *error)
718 if (action_flags & MLX5_FLOW_ACTION_DROP)
719 return rte_flow_error_set(error, EINVAL,
720 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
721 "can't drop and flag in same flow");
722 if (action_flags & MLX5_FLOW_ACTION_MARK)
723 return rte_flow_error_set(error, EINVAL,
724 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
725 "can't mark and flag in same flow");
726 if (action_flags & MLX5_FLOW_ACTION_FLAG)
727 return rte_flow_error_set(error, EINVAL,
728 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
730 " actions in same flow");
732 return rte_flow_error_set(error, ENOTSUP,
733 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
734 "flag action not supported for "
740 * Validate the mark action.
743 * Pointer to the queue action.
744 * @param[in] action_flags
745 * Bit-fields that holds the actions detected until now.
747 * Attributes of flow that includes this action.
749 * Pointer to error structure.
752 * 0 on success, a negative errno value otherwise and rte_errno is set.
755 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
756 uint64_t action_flags,
757 const struct rte_flow_attr *attr,
758 struct rte_flow_error *error)
760 const struct rte_flow_action_mark *mark = action->conf;
763 return rte_flow_error_set(error, EINVAL,
764 RTE_FLOW_ERROR_TYPE_ACTION,
766 "configuration cannot be null");
767 if (mark->id >= MLX5_FLOW_MARK_MAX)
768 return rte_flow_error_set(error, EINVAL,
769 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
771 "mark id must in 0 <= id < "
772 RTE_STR(MLX5_FLOW_MARK_MAX));
773 if (action_flags & MLX5_FLOW_ACTION_DROP)
774 return rte_flow_error_set(error, EINVAL,
775 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
776 "can't drop and mark in same flow");
777 if (action_flags & MLX5_FLOW_ACTION_FLAG)
778 return rte_flow_error_set(error, EINVAL,
779 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
780 "can't flag and mark in same flow");
781 if (action_flags & MLX5_FLOW_ACTION_MARK)
782 return rte_flow_error_set(error, EINVAL,
783 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
784 "can't have 2 mark actions in same"
787 return rte_flow_error_set(error, ENOTSUP,
788 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
789 "mark action not supported for "
795 * Validate the drop action.
797 * @param[in] action_flags
798 * Bit-fields that holds the actions detected until now.
800 * Attributes of flow that includes this action.
802 * Pointer to error structure.
805 * 0 on success, a negative errno value otherwise and rte_errno is set.
808 mlx5_flow_validate_action_drop(uint64_t action_flags,
809 const struct rte_flow_attr *attr,
810 struct rte_flow_error *error)
812 if (action_flags & MLX5_FLOW_ACTION_FLAG)
813 return rte_flow_error_set(error, EINVAL,
814 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
815 "can't drop and flag in same flow");
816 if (action_flags & MLX5_FLOW_ACTION_MARK)
817 return rte_flow_error_set(error, EINVAL,
818 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
819 "can't drop and mark in same flow");
820 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
821 return rte_flow_error_set(error, EINVAL,
822 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
823 "can't have 2 fate actions in"
826 return rte_flow_error_set(error, ENOTSUP,
827 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
828 "drop action not supported for "
834 * Validate the queue action.
837 * Pointer to the queue action.
838 * @param[in] action_flags
839 * Bit-fields that holds the actions detected until now.
841 * Pointer to the Ethernet device structure.
843 * Attributes of flow that includes this action.
845 * Pointer to error structure.
848 * 0 on success, a negative errno value otherwise and rte_errno is set.
851 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
852 uint64_t action_flags,
853 struct rte_eth_dev *dev,
854 const struct rte_flow_attr *attr,
855 struct rte_flow_error *error)
857 struct mlx5_priv *priv = dev->data->dev_private;
858 const struct rte_flow_action_queue *queue = action->conf;
860 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
861 return rte_flow_error_set(error, EINVAL,
862 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
863 "can't have 2 fate actions in"
866 return rte_flow_error_set(error, EINVAL,
867 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
868 NULL, "No Rx queues configured");
869 if (queue->index >= priv->rxqs_n)
870 return rte_flow_error_set(error, EINVAL,
871 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
873 "queue index out of range");
874 if (!(*priv->rxqs)[queue->index])
875 return rte_flow_error_set(error, EINVAL,
876 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
878 "queue is not configured");
880 return rte_flow_error_set(error, ENOTSUP,
881 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
882 "queue action not supported for "
888 * Validate the rss action.
891 * Pointer to the queue action.
892 * @param[in] action_flags
893 * Bit-fields that holds the actions detected until now.
895 * Pointer to the Ethernet device structure.
897 * Attributes of flow that includes this action.
898 * @param[in] item_flags
899 * Items that were detected.
901 * Pointer to error structure.
904 * 0 on success, a negative errno value otherwise and rte_errno is set.
907 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
908 uint64_t action_flags,
909 struct rte_eth_dev *dev,
910 const struct rte_flow_attr *attr,
912 struct rte_flow_error *error)
914 struct mlx5_priv *priv = dev->data->dev_private;
915 const struct rte_flow_action_rss *rss = action->conf;
916 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
919 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
920 return rte_flow_error_set(error, EINVAL,
921 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
922 "can't have 2 fate actions"
924 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
925 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
926 return rte_flow_error_set(error, ENOTSUP,
927 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
929 "RSS hash function not supported");
930 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
935 return rte_flow_error_set(error, ENOTSUP,
936 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
938 "tunnel RSS is not supported");
939 /* allow RSS key_len 0 in case of NULL (default) RSS key. */
940 if (rss->key_len == 0 && rss->key != NULL)
941 return rte_flow_error_set(error, ENOTSUP,
942 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
944 "RSS hash key length 0");
945 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
946 return rte_flow_error_set(error, ENOTSUP,
947 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
949 "RSS hash key too small");
950 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
951 return rte_flow_error_set(error, ENOTSUP,
952 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
954 "RSS hash key too large");
955 if (rss->queue_num > priv->config.ind_table_max_size)
956 return rte_flow_error_set(error, ENOTSUP,
957 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
959 "number of queues too large");
960 if (rss->types & MLX5_RSS_HF_MASK)
961 return rte_flow_error_set(error, ENOTSUP,
962 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
964 "some RSS protocols are not"
967 return rte_flow_error_set(error, EINVAL,
968 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
969 NULL, "No Rx queues configured");
971 return rte_flow_error_set(error, EINVAL,
972 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
973 NULL, "No queues configured");
974 for (i = 0; i != rss->queue_num; ++i) {
975 if (!(*priv->rxqs)[rss->queue[i]])
976 return rte_flow_error_set
977 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
978 &rss->queue[i], "queue is not configured");
981 return rte_flow_error_set(error, ENOTSUP,
982 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
983 "rss action not supported for "
985 if (rss->level > 1 && !tunnel)
986 return rte_flow_error_set(error, EINVAL,
987 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
988 "inner RSS is not supported for "
994 * Validate the count action.
997 * Pointer to the Ethernet device structure.
999 * Attributes of flow that includes this action.
1001 * Pointer to error structure.
1004 * 0 on success, a negative errno value otherwise and rte_errno is set.
1007 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1008 const struct rte_flow_attr *attr,
1009 struct rte_flow_error *error)
1012 return rte_flow_error_set(error, ENOTSUP,
1013 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1014 "count action not supported for "
1020 * Verify the @p attributes will be correctly understood by the NIC and store
1021 * them in the @p flow if everything is correct.
1024 * Pointer to the Ethernet device structure.
1025 * @param[in] attributes
1026 * Pointer to flow attributes
1028 * Pointer to error structure.
1031 * 0 on success, a negative errno value otherwise and rte_errno is set.
1034 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1035 const struct rte_flow_attr *attributes,
1036 struct rte_flow_error *error)
1038 struct mlx5_priv *priv = dev->data->dev_private;
1039 uint32_t priority_max = priv->config.flow_prio - 1;
1041 if (attributes->group)
1042 return rte_flow_error_set(error, ENOTSUP,
1043 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1044 NULL, "groups is not supported");
1045 if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1046 attributes->priority >= priority_max)
1047 return rte_flow_error_set(error, ENOTSUP,
1048 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1049 NULL, "priority out of range");
1050 if (attributes->egress)
1051 return rte_flow_error_set(error, ENOTSUP,
1052 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1053 "egress is not supported");
1054 if (attributes->transfer && !priv->config.dv_esw_en)
1055 return rte_flow_error_set(error, ENOTSUP,
1056 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1057 NULL, "transfer is not supported");
1058 if (!attributes->ingress)
1059 return rte_flow_error_set(error, EINVAL,
1060 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1062 "ingress attribute is mandatory");
1067 * Validate ICMP6 item.
1070 * Item specification.
1071 * @param[in] item_flags
1072 * Bit-fields that holds the items detected until now.
1074 * Pointer to error structure.
1077 * 0 on success, a negative errno value otherwise and rte_errno is set.
1080 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1081 uint64_t item_flags,
1082 uint8_t target_protocol,
1083 struct rte_flow_error *error)
1085 const struct rte_flow_item_icmp6 *mask = item->mask;
1086 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1087 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1088 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1089 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1090 MLX5_FLOW_LAYER_OUTER_L4;
1093 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1094 return rte_flow_error_set(error, EINVAL,
1095 RTE_FLOW_ERROR_TYPE_ITEM, item,
1096 "protocol filtering not compatible"
1097 " with ICMP6 layer");
1098 if (!(item_flags & l3m))
1099 return rte_flow_error_set(error, EINVAL,
1100 RTE_FLOW_ERROR_TYPE_ITEM, item,
1101 "IPv6 is mandatory to filter on"
1103 if (item_flags & l4m)
1104 return rte_flow_error_set(error, EINVAL,
1105 RTE_FLOW_ERROR_TYPE_ITEM, item,
1106 "multiple L4 layers not supported");
1108 mask = &rte_flow_item_icmp6_mask;
1109 ret = mlx5_flow_item_acceptable
1110 (item, (const uint8_t *)mask,
1111 (const uint8_t *)&rte_flow_item_icmp6_mask,
1112 sizeof(struct rte_flow_item_icmp6), error);
1119 * Validate ICMP item.
1122 * Item specification.
1123 * @param[in] item_flags
1124 * Bit-fields that holds the items detected until now.
1126 * Pointer to error structure.
1129 * 0 on success, a negative errno value otherwise and rte_errno is set.
1132 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1133 uint64_t item_flags,
1134 uint8_t target_protocol,
1135 struct rte_flow_error *error)
1137 const struct rte_flow_item_icmp *mask = item->mask;
1138 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1139 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1140 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1141 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1142 MLX5_FLOW_LAYER_OUTER_L4;
1145 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1146 return rte_flow_error_set(error, EINVAL,
1147 RTE_FLOW_ERROR_TYPE_ITEM, item,
1148 "protocol filtering not compatible"
1149 " with ICMP layer");
1150 if (!(item_flags & l3m))
1151 return rte_flow_error_set(error, EINVAL,
1152 RTE_FLOW_ERROR_TYPE_ITEM, item,
1153 "IPv4 is mandatory to filter"
1155 if (item_flags & l4m)
1156 return rte_flow_error_set(error, EINVAL,
1157 RTE_FLOW_ERROR_TYPE_ITEM, item,
1158 "multiple L4 layers not supported");
1160 mask = &rte_flow_item_icmp_mask;
1161 ret = mlx5_flow_item_acceptable
1162 (item, (const uint8_t *)mask,
1163 (const uint8_t *)&rte_flow_item_icmp_mask,
1164 sizeof(struct rte_flow_item_icmp), error);
1171 * Validate Ethernet item.
1174 * Item specification.
1175 * @param[in] item_flags
1176 * Bit-fields that holds the items detected until now.
1178 * Pointer to error structure.
1181 * 0 on success, a negative errno value otherwise and rte_errno is set.
1184 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1185 uint64_t item_flags,
1186 struct rte_flow_error *error)
1188 const struct rte_flow_item_eth *mask = item->mask;
1189 const struct rte_flow_item_eth nic_mask = {
1190 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1191 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1192 .type = RTE_BE16(0xffff),
1195 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1196 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1197 MLX5_FLOW_LAYER_OUTER_L2;
1199 if (item_flags & ethm)
1200 return rte_flow_error_set(error, ENOTSUP,
1201 RTE_FLOW_ERROR_TYPE_ITEM, item,
1202 "multiple L2 layers not supported");
1204 mask = &rte_flow_item_eth_mask;
1205 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1206 (const uint8_t *)&nic_mask,
1207 sizeof(struct rte_flow_item_eth),
1213 * Validate VLAN item.
1216 * Item specification.
1217 * @param[in] item_flags
1218 * Bit-fields that holds the items detected until now.
1220 * Ethernet device flow is being created on.
1222 * Pointer to error structure.
1225 * 0 on success, a negative errno value otherwise and rte_errno is set.
1228 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1229 uint64_t item_flags,
1230 struct rte_eth_dev *dev,
1231 struct rte_flow_error *error)
1233 const struct rte_flow_item_vlan *spec = item->spec;
1234 const struct rte_flow_item_vlan *mask = item->mask;
1235 const struct rte_flow_item_vlan nic_mask = {
1236 .tci = RTE_BE16(UINT16_MAX),
1237 .inner_type = RTE_BE16(UINT16_MAX),
1239 uint16_t vlan_tag = 0;
1240 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1242 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1243 MLX5_FLOW_LAYER_INNER_L4) :
1244 (MLX5_FLOW_LAYER_OUTER_L3 |
1245 MLX5_FLOW_LAYER_OUTER_L4);
1246 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1247 MLX5_FLOW_LAYER_OUTER_VLAN;
1249 if (item_flags & vlanm)
1250 return rte_flow_error_set(error, EINVAL,
1251 RTE_FLOW_ERROR_TYPE_ITEM, item,
1252 "multiple VLAN layers not supported");
1253 else if ((item_flags & l34m) != 0)
1254 return rte_flow_error_set(error, EINVAL,
1255 RTE_FLOW_ERROR_TYPE_ITEM, item,
1256 "L2 layer cannot follow L3/L4 layer");
1258 mask = &rte_flow_item_vlan_mask;
1259 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1260 (const uint8_t *)&nic_mask,
1261 sizeof(struct rte_flow_item_vlan),
1265 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1266 struct mlx5_priv *priv = dev->data->dev_private;
1268 if (priv->vmwa_context) {
1270 * Non-NULL context means we have a virtual machine
1271 * and SR-IOV enabled, we have to create VLAN interface
1272 * to make hypervisor to setup E-Switch vport
1273 * context correctly. We avoid creating the multiple
1274 * VLAN interfaces, so we cannot support VLAN tag mask.
1276 return rte_flow_error_set(error, EINVAL,
1277 RTE_FLOW_ERROR_TYPE_ITEM,
1279 "VLAN tag mask is not"
1280 " supported in virtual"
1285 vlan_tag = spec->tci;
1286 vlan_tag &= mask->tci;
1289 * From verbs perspective an empty VLAN is equivalent
1290 * to a packet without VLAN layer.
1293 return rte_flow_error_set(error, EINVAL,
1294 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1296 "VLAN cannot be empty");
1301 * Validate IPV4 item.
1304 * Item specification.
1305 * @param[in] item_flags
1306 * Bit-fields that holds the items detected until now.
1307 * @param[in] acc_mask
1308 * Acceptable mask, if NULL default internal default mask
1309 * will be used to check whether item fields are supported.
1311 * Pointer to error structure.
1314 * 0 on success, a negative errno value otherwise and rte_errno is set.
1317 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1318 uint64_t item_flags,
1319 const struct rte_flow_item_ipv4 *acc_mask,
1320 struct rte_flow_error *error)
1322 const struct rte_flow_item_ipv4 *mask = item->mask;
1323 const struct rte_flow_item_ipv4 *spec = item->spec;
1324 const struct rte_flow_item_ipv4 nic_mask = {
1326 .src_addr = RTE_BE32(0xffffffff),
1327 .dst_addr = RTE_BE32(0xffffffff),
1328 .type_of_service = 0xff,
1329 .next_proto_id = 0xff,
1332 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1333 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1334 MLX5_FLOW_LAYER_OUTER_L3;
1335 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1336 MLX5_FLOW_LAYER_OUTER_L4;
1338 uint8_t next_proto = 0xFF;
1340 if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1342 next_proto = mask->hdr.next_proto_id &
1343 spec->hdr.next_proto_id;
1344 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1345 return rte_flow_error_set(error, EINVAL,
1346 RTE_FLOW_ERROR_TYPE_ITEM,
1351 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1352 return rte_flow_error_set(error, EINVAL,
1353 RTE_FLOW_ERROR_TYPE_ITEM, item,
1354 "wrong tunnel type - IPv6 specified "
1355 "but IPv4 item provided");
1356 if (item_flags & l3m)
1357 return rte_flow_error_set(error, ENOTSUP,
1358 RTE_FLOW_ERROR_TYPE_ITEM, item,
1359 "multiple L3 layers not supported");
1360 else if (item_flags & l4m)
1361 return rte_flow_error_set(error, EINVAL,
1362 RTE_FLOW_ERROR_TYPE_ITEM, item,
1363 "L3 cannot follow an L4 layer.");
1364 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1365 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1366 return rte_flow_error_set(error, EINVAL,
1367 RTE_FLOW_ERROR_TYPE_ITEM, item,
1368 "L3 cannot follow an NVGRE layer.");
1370 mask = &rte_flow_item_ipv4_mask;
1371 else if (mask->hdr.next_proto_id != 0 &&
1372 mask->hdr.next_proto_id != 0xff)
1373 return rte_flow_error_set(error, EINVAL,
1374 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1375 "partial mask is not supported"
1377 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1378 acc_mask ? (const uint8_t *)acc_mask
1379 : (const uint8_t *)&nic_mask,
1380 sizeof(struct rte_flow_item_ipv4),
1388 * Validate IPV6 item.
1391 * Item specification.
1392 * @param[in] item_flags
1393 * Bit-fields that holds the items detected until now.
1394 * @param[in] acc_mask
1395 * Acceptable mask, if NULL default internal default mask
1396 * will be used to check whether item fields are supported.
1398 * Pointer to error structure.
1401 * 0 on success, a negative errno value otherwise and rte_errno is set.
1404 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1405 uint64_t item_flags,
1406 const struct rte_flow_item_ipv6 *acc_mask,
1407 struct rte_flow_error *error)
1409 const struct rte_flow_item_ipv6 *mask = item->mask;
1410 const struct rte_flow_item_ipv6 *spec = item->spec;
1411 const struct rte_flow_item_ipv6 nic_mask = {
1414 "\xff\xff\xff\xff\xff\xff\xff\xff"
1415 "\xff\xff\xff\xff\xff\xff\xff\xff",
1417 "\xff\xff\xff\xff\xff\xff\xff\xff"
1418 "\xff\xff\xff\xff\xff\xff\xff\xff",
1419 .vtc_flow = RTE_BE32(0xffffffff),
1424 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1425 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1426 MLX5_FLOW_LAYER_OUTER_L3;
1427 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1428 MLX5_FLOW_LAYER_OUTER_L4;
1430 uint8_t next_proto = 0xFF;
1432 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1434 next_proto = mask->hdr.proto & spec->hdr.proto;
1435 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1436 return rte_flow_error_set(error, EINVAL,
1437 RTE_FLOW_ERROR_TYPE_ITEM,
1442 if (item_flags & MLX5_FLOW_LAYER_IPIP)
1443 return rte_flow_error_set(error, EINVAL,
1444 RTE_FLOW_ERROR_TYPE_ITEM, item,
1445 "wrong tunnel type - IPv4 specified "
1446 "but IPv6 item provided");
1447 if (item_flags & l3m)
1448 return rte_flow_error_set(error, ENOTSUP,
1449 RTE_FLOW_ERROR_TYPE_ITEM, item,
1450 "multiple L3 layers not supported");
1451 else if (item_flags & l4m)
1452 return rte_flow_error_set(error, EINVAL,
1453 RTE_FLOW_ERROR_TYPE_ITEM, item,
1454 "L3 cannot follow an L4 layer.");
1455 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1456 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1457 return rte_flow_error_set(error, EINVAL,
1458 RTE_FLOW_ERROR_TYPE_ITEM, item,
1459 "L3 cannot follow an NVGRE layer.");
1461 mask = &rte_flow_item_ipv6_mask;
1462 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1463 acc_mask ? (const uint8_t *)acc_mask
1464 : (const uint8_t *)&nic_mask,
1465 sizeof(struct rte_flow_item_ipv6),
1473 * Validate UDP item.
1476 * Item specification.
1477 * @param[in] item_flags
1478 * Bit-fields that holds the items detected until now.
1479 * @param[in] target_protocol
1480 * The next protocol in the previous item.
1481 * @param[in] flow_mask
1482 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1484 * Pointer to error structure.
1487 * 0 on success, a negative errno value otherwise and rte_errno is set.
1490 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1491 uint64_t item_flags,
1492 uint8_t target_protocol,
1493 struct rte_flow_error *error)
1495 const struct rte_flow_item_udp *mask = item->mask;
1496 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1497 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1498 MLX5_FLOW_LAYER_OUTER_L3;
1499 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1500 MLX5_FLOW_LAYER_OUTER_L4;
1503 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1504 return rte_flow_error_set(error, EINVAL,
1505 RTE_FLOW_ERROR_TYPE_ITEM, item,
1506 "protocol filtering not compatible"
1508 if (!(item_flags & l3m))
1509 return rte_flow_error_set(error, EINVAL,
1510 RTE_FLOW_ERROR_TYPE_ITEM, item,
1511 "L3 is mandatory to filter on L4");
1512 if (item_flags & l4m)
1513 return rte_flow_error_set(error, EINVAL,
1514 RTE_FLOW_ERROR_TYPE_ITEM, item,
1515 "multiple L4 layers not supported");
1517 mask = &rte_flow_item_udp_mask;
1518 ret = mlx5_flow_item_acceptable
1519 (item, (const uint8_t *)mask,
1520 (const uint8_t *)&rte_flow_item_udp_mask,
1521 sizeof(struct rte_flow_item_udp), error);
1528 * Validate TCP item.
1531 * Item specification.
1532 * @param[in] item_flags
1533 * Bit-fields that holds the items detected until now.
1534 * @param[in] target_protocol
1535 * The next protocol in the previous item.
1537 * Pointer to error structure.
1540 * 0 on success, a negative errno value otherwise and rte_errno is set.
1543 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1544 uint64_t item_flags,
1545 uint8_t target_protocol,
1546 const struct rte_flow_item_tcp *flow_mask,
1547 struct rte_flow_error *error)
1549 const struct rte_flow_item_tcp *mask = item->mask;
1550 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1551 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1552 MLX5_FLOW_LAYER_OUTER_L3;
1553 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1554 MLX5_FLOW_LAYER_OUTER_L4;
1558 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1559 return rte_flow_error_set(error, EINVAL,
1560 RTE_FLOW_ERROR_TYPE_ITEM, item,
1561 "protocol filtering not compatible"
1563 if (!(item_flags & l3m))
1564 return rte_flow_error_set(error, EINVAL,
1565 RTE_FLOW_ERROR_TYPE_ITEM, item,
1566 "L3 is mandatory to filter on L4");
1567 if (item_flags & l4m)
1568 return rte_flow_error_set(error, EINVAL,
1569 RTE_FLOW_ERROR_TYPE_ITEM, item,
1570 "multiple L4 layers not supported");
1572 mask = &rte_flow_item_tcp_mask;
1573 ret = mlx5_flow_item_acceptable
1574 (item, (const uint8_t *)mask,
1575 (const uint8_t *)flow_mask,
1576 sizeof(struct rte_flow_item_tcp), error);
1583 * Validate VXLAN item.
1586 * Item specification.
1587 * @param[in] item_flags
1588 * Bit-fields that holds the items detected until now.
1589 * @param[in] target_protocol
1590 * The next protocol in the previous item.
1592 * Pointer to error structure.
1595 * 0 on success, a negative errno value otherwise and rte_errno is set.
1598 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1599 uint64_t item_flags,
1600 struct rte_flow_error *error)
1602 const struct rte_flow_item_vxlan *spec = item->spec;
1603 const struct rte_flow_item_vxlan *mask = item->mask;
1608 } id = { .vlan_id = 0, };
1609 uint32_t vlan_id = 0;
1612 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1613 return rte_flow_error_set(error, ENOTSUP,
1614 RTE_FLOW_ERROR_TYPE_ITEM, item,
1615 "multiple tunnel layers not"
1618 * Verify only UDPv4 is present as defined in
1619 * https://tools.ietf.org/html/rfc7348
1621 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1622 return rte_flow_error_set(error, EINVAL,
1623 RTE_FLOW_ERROR_TYPE_ITEM, item,
1624 "no outer UDP layer found");
1626 mask = &rte_flow_item_vxlan_mask;
1627 ret = mlx5_flow_item_acceptable
1628 (item, (const uint8_t *)mask,
1629 (const uint8_t *)&rte_flow_item_vxlan_mask,
1630 sizeof(struct rte_flow_item_vxlan),
1635 memcpy(&id.vni[1], spec->vni, 3);
1636 vlan_id = id.vlan_id;
1637 memcpy(&id.vni[1], mask->vni, 3);
1638 vlan_id &= id.vlan_id;
1641 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if
1642 * only this layer is defined in the Verbs specification it is
1643 * interpreted as wildcard and all packets will match this
1644 * rule, if it follows a full stack layer (ex: eth / ipv4 /
1645 * udp), all packets matching the layers before will also
1646 * match this rule. To avoid such situation, VNI 0 is
1647 * currently refused.
1650 return rte_flow_error_set(error, ENOTSUP,
1651 RTE_FLOW_ERROR_TYPE_ITEM, item,
1652 "VXLAN vni cannot be 0");
1653 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1654 return rte_flow_error_set(error, ENOTSUP,
1655 RTE_FLOW_ERROR_TYPE_ITEM, item,
1656 "VXLAN tunnel must be fully defined");
1661 * Validate VXLAN_GPE item.
1664 * Item specification.
1665 * @param[in] item_flags
1666 * Bit-fields that holds the items detected until now.
1668 * Pointer to the private data structure.
1669 * @param[in] target_protocol
1670 * The next protocol in the previous item.
1672 * Pointer to error structure.
1675 * 0 on success, a negative errno value otherwise and rte_errno is set.
1678 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1679 uint64_t item_flags,
1680 struct rte_eth_dev *dev,
1681 struct rte_flow_error *error)
1683 struct mlx5_priv *priv = dev->data->dev_private;
1684 const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1685 const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1690 } id = { .vlan_id = 0, };
1691 uint32_t vlan_id = 0;
1693 if (!priv->config.l3_vxlan_en)
1694 return rte_flow_error_set(error, ENOTSUP,
1695 RTE_FLOW_ERROR_TYPE_ITEM, item,
1696 "L3 VXLAN is not enabled by device"
1697 " parameter and/or not configured in"
1699 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1700 return rte_flow_error_set(error, ENOTSUP,
1701 RTE_FLOW_ERROR_TYPE_ITEM, item,
1702 "multiple tunnel layers not"
1705 * Verify only UDPv4 is present as defined in
1706 * https://tools.ietf.org/html/rfc7348
1708 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1709 return rte_flow_error_set(error, EINVAL,
1710 RTE_FLOW_ERROR_TYPE_ITEM, item,
1711 "no outer UDP layer found");
1713 mask = &rte_flow_item_vxlan_gpe_mask;
1714 ret = mlx5_flow_item_acceptable
1715 (item, (const uint8_t *)mask,
1716 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1717 sizeof(struct rte_flow_item_vxlan_gpe),
1723 return rte_flow_error_set(error, ENOTSUP,
1724 RTE_FLOW_ERROR_TYPE_ITEM,
1726 "VxLAN-GPE protocol"
1728 memcpy(&id.vni[1], spec->vni, 3);
1729 vlan_id = id.vlan_id;
1730 memcpy(&id.vni[1], mask->vni, 3);
1731 vlan_id &= id.vlan_id;
1734 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this
1735 * layer is defined in the Verbs specification it is interpreted as
1736 * wildcard and all packets will match this rule, if it follows a full
1737 * stack layer (ex: eth / ipv4 / udp), all packets matching the layers
1738 * before will also match this rule. To avoid such situation, VNI 0
1739 * is currently refused.
1742 return rte_flow_error_set(error, ENOTSUP,
1743 RTE_FLOW_ERROR_TYPE_ITEM, item,
1744 "VXLAN-GPE vni cannot be 0");
1745 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1746 return rte_flow_error_set(error, ENOTSUP,
1747 RTE_FLOW_ERROR_TYPE_ITEM, item,
1748 "VXLAN-GPE tunnel must be fully"
1753 * Validate GRE Key item.
1756 * Item specification.
1757 * @param[in] item_flags
1758 * Bit flags to mark detected items.
1759 * @param[in] gre_item
1760 * Pointer to gre_item
1762 * Pointer to error structure.
1765 * 0 on success, a negative errno value otherwise and rte_errno is set.
1768 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1769 uint64_t item_flags,
1770 const struct rte_flow_item *gre_item,
1771 struct rte_flow_error *error)
1773 const rte_be32_t *mask = item->mask;
1775 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
1776 const struct rte_flow_item_gre *gre_spec = gre_item->spec;
1777 const struct rte_flow_item_gre *gre_mask = gre_item->mask;
1779 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
1780 return rte_flow_error_set(error, ENOTSUP,
1781 RTE_FLOW_ERROR_TYPE_ITEM, item,
1782 "Multiple GRE key not support");
1783 if (!(item_flags & MLX5_FLOW_LAYER_GRE))
1784 return rte_flow_error_set(error, ENOTSUP,
1785 RTE_FLOW_ERROR_TYPE_ITEM, item,
1786 "No preceding GRE header");
1787 if (item_flags & MLX5_FLOW_LAYER_INNER)
1788 return rte_flow_error_set(error, ENOTSUP,
1789 RTE_FLOW_ERROR_TYPE_ITEM, item,
1790 "GRE key following a wrong item");
1792 gre_mask = &rte_flow_item_gre_mask;
1793 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
1794 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
1795 return rte_flow_error_set(error, EINVAL,
1796 RTE_FLOW_ERROR_TYPE_ITEM, item,
1797 "Key bit must be on");
1800 mask = &gre_key_default_mask;
1801 ret = mlx5_flow_item_acceptable
1802 (item, (const uint8_t *)mask,
1803 (const uint8_t *)&gre_key_default_mask,
1804 sizeof(rte_be32_t), error);
1809 * Validate GRE item.
1812 * Item specification.
1813 * @param[in] item_flags
1814 * Bit flags to mark detected items.
1815 * @param[in] target_protocol
1816 * The next protocol in the previous item.
1818 * Pointer to error structure.
1821 * 0 on success, a negative errno value otherwise and rte_errno is set.
1824 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
1825 uint64_t item_flags,
1826 uint8_t target_protocol,
1827 struct rte_flow_error *error)
1829 const struct rte_flow_item_gre *spec __rte_unused = item->spec;
1830 const struct rte_flow_item_gre *mask = item->mask;
1832 const struct rte_flow_item_gre nic_mask = {
1833 .c_rsvd0_ver = RTE_BE16(0xB000),
1834 .protocol = RTE_BE16(UINT16_MAX),
1837 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
1838 return rte_flow_error_set(error, EINVAL,
1839 RTE_FLOW_ERROR_TYPE_ITEM, item,
1840 "protocol filtering not compatible"
1841 " with this GRE layer");
1842 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1843 return rte_flow_error_set(error, ENOTSUP,
1844 RTE_FLOW_ERROR_TYPE_ITEM, item,
1845 "multiple tunnel layers not"
1847 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
1848 return rte_flow_error_set(error, ENOTSUP,
1849 RTE_FLOW_ERROR_TYPE_ITEM, item,
1850 "L3 Layer is missing");
1852 mask = &rte_flow_item_gre_mask;
1853 ret = mlx5_flow_item_acceptable
1854 (item, (const uint8_t *)mask,
1855 (const uint8_t *)&nic_mask,
1856 sizeof(struct rte_flow_item_gre), error);
1859 #ifndef HAVE_MLX5DV_DR
1860 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
1861 if (spec && (spec->protocol & mask->protocol))
1862 return rte_flow_error_set(error, ENOTSUP,
1863 RTE_FLOW_ERROR_TYPE_ITEM, item,
1864 "without MPLS support the"
1865 " specification cannot be used for"
1873 * Validate MPLS item.
1876 * Pointer to the rte_eth_dev structure.
1878 * Item specification.
1879 * @param[in] item_flags
1880 * Bit-fields that holds the items detected until now.
1881 * @param[in] prev_layer
1882 * The protocol layer indicated in previous item.
1884 * Pointer to error structure.
1887 * 0 on success, a negative errno value otherwise and rte_errno is set.
1890 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
1891 const struct rte_flow_item *item __rte_unused,
1892 uint64_t item_flags __rte_unused,
1893 uint64_t prev_layer __rte_unused,
1894 struct rte_flow_error *error)
1896 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
1897 const struct rte_flow_item_mpls *mask = item->mask;
1898 struct mlx5_priv *priv = dev->data->dev_private;
1901 if (!priv->config.mpls_en)
1902 return rte_flow_error_set(error, ENOTSUP,
1903 RTE_FLOW_ERROR_TYPE_ITEM, item,
1904 "MPLS not supported or"
1905 " disabled in firmware"
1907 /* MPLS over IP, UDP, GRE is allowed */
1908 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
1909 MLX5_FLOW_LAYER_OUTER_L4_UDP |
1910 MLX5_FLOW_LAYER_GRE)))
1911 return rte_flow_error_set(error, EINVAL,
1912 RTE_FLOW_ERROR_TYPE_ITEM, item,
1913 "protocol filtering not compatible"
1914 " with MPLS layer");
1915 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
1916 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
1917 !(item_flags & MLX5_FLOW_LAYER_GRE))
1918 return rte_flow_error_set(error, ENOTSUP,
1919 RTE_FLOW_ERROR_TYPE_ITEM, item,
1920 "multiple tunnel layers not"
1923 mask = &rte_flow_item_mpls_mask;
1924 ret = mlx5_flow_item_acceptable
1925 (item, (const uint8_t *)mask,
1926 (const uint8_t *)&rte_flow_item_mpls_mask,
1927 sizeof(struct rte_flow_item_mpls), error);
1932 return rte_flow_error_set(error, ENOTSUP,
1933 RTE_FLOW_ERROR_TYPE_ITEM, item,
1934 "MPLS is not supported by Verbs, please"
1939 * Validate NVGRE item.
1942 * Item specification.
1943 * @param[in] item_flags
1944 * Bit flags to mark detected items.
1945 * @param[in] target_protocol
1946 * The next protocol in the previous item.
1948 * Pointer to error structure.
1951 * 0 on success, a negative errno value otherwise and rte_errno is set.
1954 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
1955 uint64_t item_flags,
1956 uint8_t target_protocol,
1957 struct rte_flow_error *error)
1959 const struct rte_flow_item_nvgre *mask = item->mask;
1962 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
1963 return rte_flow_error_set(error, EINVAL,
1964 RTE_FLOW_ERROR_TYPE_ITEM, item,
1965 "protocol filtering not compatible"
1966 " with this GRE layer");
1967 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1968 return rte_flow_error_set(error, ENOTSUP,
1969 RTE_FLOW_ERROR_TYPE_ITEM, item,
1970 "multiple tunnel layers not"
1972 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
1973 return rte_flow_error_set(error, ENOTSUP,
1974 RTE_FLOW_ERROR_TYPE_ITEM, item,
1975 "L3 Layer is missing");
1977 mask = &rte_flow_item_nvgre_mask;
1978 ret = mlx5_flow_item_acceptable
1979 (item, (const uint8_t *)mask,
1980 (const uint8_t *)&rte_flow_item_nvgre_mask,
1981 sizeof(struct rte_flow_item_nvgre), error);
1988 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
1989 const struct rte_flow_attr *attr __rte_unused,
1990 const struct rte_flow_item items[] __rte_unused,
1991 const struct rte_flow_action actions[] __rte_unused,
1992 struct rte_flow_error *error)
1994 return rte_flow_error_set(error, ENOTSUP,
1995 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
1998 static struct mlx5_flow *
1999 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused,
2000 const struct rte_flow_item items[] __rte_unused,
2001 const struct rte_flow_action actions[] __rte_unused,
2002 struct rte_flow_error *error)
2004 rte_flow_error_set(error, ENOTSUP,
2005 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2010 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2011 struct mlx5_flow *dev_flow __rte_unused,
2012 const struct rte_flow_attr *attr __rte_unused,
2013 const struct rte_flow_item items[] __rte_unused,
2014 const struct rte_flow_action actions[] __rte_unused,
2015 struct rte_flow_error *error)
2017 return rte_flow_error_set(error, ENOTSUP,
2018 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2022 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2023 struct rte_flow *flow __rte_unused,
2024 struct rte_flow_error *error)
2026 return rte_flow_error_set(error, ENOTSUP,
2027 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2031 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2032 struct rte_flow *flow __rte_unused)
2037 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2038 struct rte_flow *flow __rte_unused)
2043 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2044 struct rte_flow *flow __rte_unused,
2045 const struct rte_flow_action *actions __rte_unused,
2046 void *data __rte_unused,
2047 struct rte_flow_error *error)
2049 return rte_flow_error_set(error, ENOTSUP,
2050 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2053 /* Void driver to protect from null pointer reference. */
2054 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2055 .validate = flow_null_validate,
2056 .prepare = flow_null_prepare,
2057 .translate = flow_null_translate,
2058 .apply = flow_null_apply,
2059 .remove = flow_null_remove,
2060 .destroy = flow_null_destroy,
2061 .query = flow_null_query,
2065 * Select flow driver type according to flow attributes and device
2069 * Pointer to the dev structure.
2071 * Pointer to the flow attributes.
2074 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2076 static enum mlx5_flow_drv_type
2077 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2079 struct mlx5_priv *priv = dev->data->dev_private;
2080 enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2082 if (attr->transfer && priv->config.dv_esw_en)
2083 type = MLX5_FLOW_TYPE_DV;
2084 if (!attr->transfer)
2085 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2086 MLX5_FLOW_TYPE_VERBS;
2090 #define flow_get_drv_ops(type) flow_drv_ops[type]
2093 * Flow driver validation API. This abstracts calling driver specific functions.
2094 * The type of flow driver is determined according to flow attributes.
2097 * Pointer to the dev structure.
2099 * Pointer to the flow attributes.
2101 * Pointer to the list of items.
2102 * @param[in] actions
2103 * Pointer to the list of actions.
2105 * Pointer to the error structure.
2108 * 0 on success, a negative errno value otherwise and rte_errno is set.
2111 flow_drv_validate(struct rte_eth_dev *dev,
2112 const struct rte_flow_attr *attr,
2113 const struct rte_flow_item items[],
2114 const struct rte_flow_action actions[],
2115 struct rte_flow_error *error)
2117 const struct mlx5_flow_driver_ops *fops;
2118 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2120 fops = flow_get_drv_ops(type);
2121 return fops->validate(dev, attr, items, actions, error);
2125 * Flow driver preparation API. This abstracts calling driver specific
2126 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2127 * calculates the size of memory required for device flow, allocates the memory,
2128 * initializes the device flow and returns the pointer.
2131 * This function initializes device flow structure such as dv or verbs in
2132 * struct mlx5_flow. However, it is caller's responsibility to initialize the
2133 * rest. For example, adding returning device flow to flow->dev_flow list and
2134 * setting backward reference to the flow should be done out of this function.
2135 * layers field is not filled either.
2138 * Pointer to the flow attributes.
2140 * Pointer to the list of items.
2141 * @param[in] actions
2142 * Pointer to the list of actions.
2144 * Pointer to the error structure.
2147 * Pointer to device flow on success, otherwise NULL and rte_errno is set.
2149 static inline struct mlx5_flow *
2150 flow_drv_prepare(const struct rte_flow *flow,
2151 const struct rte_flow_attr *attr,
2152 const struct rte_flow_item items[],
2153 const struct rte_flow_action actions[],
2154 struct rte_flow_error *error)
2156 const struct mlx5_flow_driver_ops *fops;
2157 enum mlx5_flow_drv_type type = flow->drv_type;
2159 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2160 fops = flow_get_drv_ops(type);
2161 return fops->prepare(attr, items, actions, error);
2165 * Flow driver translation API. This abstracts calling driver specific
2166 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2167 * translates a generic flow into a driver flow. flow_drv_prepare() must
2171 * dev_flow->layers could be filled as a result of parsing during translation
2172 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2173 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2174 * flow->actions could be overwritten even though all the expanded dev_flows
2175 * have the same actions.
2178 * Pointer to the rte dev structure.
2179 * @param[in, out] dev_flow
2180 * Pointer to the mlx5 flow.
2182 * Pointer to the flow attributes.
2184 * Pointer to the list of items.
2185 * @param[in] actions
2186 * Pointer to the list of actions.
2188 * Pointer to the error structure.
2191 * 0 on success, a negative errno value otherwise and rte_errno is set.
2194 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2195 const struct rte_flow_attr *attr,
2196 const struct rte_flow_item items[],
2197 const struct rte_flow_action actions[],
2198 struct rte_flow_error *error)
2200 const struct mlx5_flow_driver_ops *fops;
2201 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2203 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2204 fops = flow_get_drv_ops(type);
2205 return fops->translate(dev, dev_flow, attr, items, actions, error);
2209 * Flow driver apply API. This abstracts calling driver specific functions.
2210 * Parent flow (rte_flow) should have driver type (drv_type). It applies
2211 * translated driver flows on to device. flow_drv_translate() must precede.
2214 * Pointer to Ethernet device structure.
2215 * @param[in, out] flow
2216 * Pointer to flow structure.
2218 * Pointer to error structure.
2221 * 0 on success, a negative errno value otherwise and rte_errno is set.
2224 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2225 struct rte_flow_error *error)
2227 const struct mlx5_flow_driver_ops *fops;
2228 enum mlx5_flow_drv_type type = flow->drv_type;
2230 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2231 fops = flow_get_drv_ops(type);
2232 return fops->apply(dev, flow, error);
2236 * Flow driver remove API. This abstracts calling driver specific functions.
2237 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2238 * on device. All the resources of the flow should be freed by calling
2239 * flow_drv_destroy().
2242 * Pointer to Ethernet device.
2243 * @param[in, out] flow
2244 * Pointer to flow structure.
2247 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2249 const struct mlx5_flow_driver_ops *fops;
2250 enum mlx5_flow_drv_type type = flow->drv_type;
2252 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2253 fops = flow_get_drv_ops(type);
2254 fops->remove(dev, flow);
2258 * Flow driver destroy API. This abstracts calling driver specific functions.
2259 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2260 * on device and releases resources of the flow.
2263 * Pointer to Ethernet device.
2264 * @param[in, out] flow
2265 * Pointer to flow structure.
2268 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2270 const struct mlx5_flow_driver_ops *fops;
2271 enum mlx5_flow_drv_type type = flow->drv_type;
2273 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2274 fops = flow_get_drv_ops(type);
2275 fops->destroy(dev, flow);
2279 * Validate a flow supported by the NIC.
2281 * @see rte_flow_validate()
2285 mlx5_flow_validate(struct rte_eth_dev *dev,
2286 const struct rte_flow_attr *attr,
2287 const struct rte_flow_item items[],
2288 const struct rte_flow_action actions[],
2289 struct rte_flow_error *error)
2293 ret = flow_drv_validate(dev, attr, items, actions, error);
2300 * Get RSS action from the action list.
2302 * @param[in] actions
2303 * Pointer to the list of actions.
2306 * Pointer to the RSS action if exist, else return NULL.
2308 static const struct rte_flow_action_rss*
2309 flow_get_rss_action(const struct rte_flow_action actions[])
2311 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2312 switch (actions->type) {
2313 case RTE_FLOW_ACTION_TYPE_RSS:
2314 return (const struct rte_flow_action_rss *)
2324 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2326 const struct rte_flow_item *item;
2327 unsigned int has_vlan = 0;
2329 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2330 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2336 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2337 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2338 return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2339 MLX5_EXPANSION_ROOT_OUTER;
2343 * Create a flow and add it to @p list.
2346 * Pointer to Ethernet device.
2348 * Pointer to a TAILQ flow list.
2350 * Flow rule attributes.
2352 * Pattern specification (list terminated by the END pattern item).
2353 * @param[in] actions
2354 * Associated actions (list terminated by the END action).
2356 * Perform verbose error reporting if not NULL.
2359 * A flow on success, NULL otherwise and rte_errno is set.
2361 static struct rte_flow *
2362 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
2363 const struct rte_flow_attr *attr,
2364 const struct rte_flow_item items[],
2365 const struct rte_flow_action actions[],
2366 struct rte_flow_error *error)
2368 struct rte_flow *flow = NULL;
2369 struct mlx5_flow *dev_flow;
2370 const struct rte_flow_action_rss *rss;
2372 struct rte_flow_expand_rss buf;
2373 uint8_t buffer[2048];
2375 struct rte_flow_expand_rss *buf = &expand_buffer.buf;
2380 ret = flow_drv_validate(dev, attr, items, actions, error);
2383 flow_size = sizeof(struct rte_flow);
2384 rss = flow_get_rss_action(actions);
2386 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
2389 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
2390 flow = rte_calloc(__func__, 1, flow_size, 0);
2395 flow->drv_type = flow_get_drv_type(dev, attr);
2396 flow->ingress = attr->ingress;
2397 flow->transfer = attr->transfer;
2398 assert(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
2399 flow->drv_type < MLX5_FLOW_TYPE_MAX);
2400 flow->queue = (void *)(flow + 1);
2401 LIST_INIT(&flow->dev_flows);
2402 if (rss && rss->types) {
2403 unsigned int graph_root;
2405 graph_root = find_graph_root(items, rss->level);
2406 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
2408 mlx5_support_expansion,
2411 (unsigned int)ret < sizeof(expand_buffer.buffer));
2414 buf->entry[0].pattern = (void *)(uintptr_t)items;
2416 for (i = 0; i < buf->entries; ++i) {
2417 dev_flow = flow_drv_prepare(flow, attr, buf->entry[i].pattern,
2421 dev_flow->flow = flow;
2422 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
2423 ret = flow_drv_translate(dev, dev_flow, attr,
2424 buf->entry[i].pattern,
2429 if (dev->data->dev_started) {
2430 ret = flow_drv_apply(dev, flow, error);
2434 TAILQ_INSERT_TAIL(list, flow, next);
2435 flow_rxq_flags_set(dev, flow);
2438 ret = rte_errno; /* Save rte_errno before cleanup. */
2440 flow_drv_destroy(dev, flow);
2442 rte_errno = ret; /* Restore rte_errno. */
2449 * @see rte_flow_create()
2453 mlx5_flow_create(struct rte_eth_dev *dev,
2454 const struct rte_flow_attr *attr,
2455 const struct rte_flow_item items[],
2456 const struct rte_flow_action actions[],
2457 struct rte_flow_error *error)
2459 struct mlx5_priv *priv = dev->data->dev_private;
2461 return flow_list_create(dev, &priv->flows,
2462 attr, items, actions, error);
2466 * Destroy a flow in a list.
2469 * Pointer to Ethernet device.
2471 * Pointer to a TAILQ flow list.
2476 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
2477 struct rte_flow *flow)
2480 * Update RX queue flags only if port is started, otherwise it is
2483 if (dev->data->dev_started)
2484 flow_rxq_flags_trim(dev, flow);
2485 flow_drv_destroy(dev, flow);
2486 TAILQ_REMOVE(list, flow, next);
2487 rte_free(flow->fdir);
2492 * Destroy all flows.
2495 * Pointer to Ethernet device.
2497 * Pointer to a TAILQ flow list.
2500 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list)
2502 while (!TAILQ_EMPTY(list)) {
2503 struct rte_flow *flow;
2505 flow = TAILQ_FIRST(list);
2506 flow_list_destroy(dev, list, flow);
2514 * Pointer to Ethernet device.
2516 * Pointer to a TAILQ flow list.
2519 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
2521 struct rte_flow *flow;
2523 TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next)
2524 flow_drv_remove(dev, flow);
2525 flow_rxq_flags_clear(dev);
2532 * Pointer to Ethernet device.
2534 * Pointer to a TAILQ flow list.
2537 * 0 on success, a negative errno value otherwise and rte_errno is set.
2540 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
2542 struct rte_flow *flow;
2543 struct rte_flow_error error;
2546 TAILQ_FOREACH(flow, list, next) {
2547 ret = flow_drv_apply(dev, flow, &error);
2550 flow_rxq_flags_set(dev, flow);
2554 ret = rte_errno; /* Save rte_errno before cleanup. */
2555 mlx5_flow_stop(dev, list);
2556 rte_errno = ret; /* Restore rte_errno. */
2561 * Verify the flow list is empty
2564 * Pointer to Ethernet device.
2566 * @return the number of flows not released.
2569 mlx5_flow_verify(struct rte_eth_dev *dev)
2571 struct mlx5_priv *priv = dev->data->dev_private;
2572 struct rte_flow *flow;
2575 TAILQ_FOREACH(flow, &priv->flows, next) {
2576 DRV_LOG(DEBUG, "port %u flow %p still referenced",
2577 dev->data->port_id, (void *)flow);
2584 * Enable a control flow configured from the control plane.
2587 * Pointer to Ethernet device.
2589 * An Ethernet flow spec to apply.
2591 * An Ethernet flow mask to apply.
2593 * A VLAN flow spec to apply.
2595 * A VLAN flow mask to apply.
2598 * 0 on success, a negative errno value otherwise and rte_errno is set.
2601 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
2602 struct rte_flow_item_eth *eth_spec,
2603 struct rte_flow_item_eth *eth_mask,
2604 struct rte_flow_item_vlan *vlan_spec,
2605 struct rte_flow_item_vlan *vlan_mask)
2607 struct mlx5_priv *priv = dev->data->dev_private;
2608 const struct rte_flow_attr attr = {
2610 .priority = MLX5_FLOW_PRIO_RSVD,
2612 struct rte_flow_item items[] = {
2614 .type = RTE_FLOW_ITEM_TYPE_ETH,
2620 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
2621 RTE_FLOW_ITEM_TYPE_END,
2627 .type = RTE_FLOW_ITEM_TYPE_END,
2630 uint16_t queue[priv->reta_idx_n];
2631 struct rte_flow_action_rss action_rss = {
2632 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
2634 .types = priv->rss_conf.rss_hf,
2635 .key_len = priv->rss_conf.rss_key_len,
2636 .queue_num = priv->reta_idx_n,
2637 .key = priv->rss_conf.rss_key,
2640 struct rte_flow_action actions[] = {
2642 .type = RTE_FLOW_ACTION_TYPE_RSS,
2643 .conf = &action_rss,
2646 .type = RTE_FLOW_ACTION_TYPE_END,
2649 struct rte_flow *flow;
2650 struct rte_flow_error error;
2653 if (!priv->reta_idx_n || !priv->rxqs_n) {
2656 for (i = 0; i != priv->reta_idx_n; ++i)
2657 queue[i] = (*priv->reta_idx)[i];
2658 flow = flow_list_create(dev, &priv->ctrl_flows,
2659 &attr, items, actions, &error);
2666 * Enable a flow control configured from the control plane.
2669 * Pointer to Ethernet device.
2671 * An Ethernet flow spec to apply.
2673 * An Ethernet flow mask to apply.
2676 * 0 on success, a negative errno value otherwise and rte_errno is set.
2679 mlx5_ctrl_flow(struct rte_eth_dev *dev,
2680 struct rte_flow_item_eth *eth_spec,
2681 struct rte_flow_item_eth *eth_mask)
2683 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
2689 * @see rte_flow_destroy()
2693 mlx5_flow_destroy(struct rte_eth_dev *dev,
2694 struct rte_flow *flow,
2695 struct rte_flow_error *error __rte_unused)
2697 struct mlx5_priv *priv = dev->data->dev_private;
2699 flow_list_destroy(dev, &priv->flows, flow);
2704 * Destroy all flows.
2706 * @see rte_flow_flush()
2710 mlx5_flow_flush(struct rte_eth_dev *dev,
2711 struct rte_flow_error *error __rte_unused)
2713 struct mlx5_priv *priv = dev->data->dev_private;
2715 mlx5_flow_list_flush(dev, &priv->flows);
2722 * @see rte_flow_isolate()
2726 mlx5_flow_isolate(struct rte_eth_dev *dev,
2728 struct rte_flow_error *error)
2730 struct mlx5_priv *priv = dev->data->dev_private;
2732 if (dev->data->dev_started) {
2733 rte_flow_error_set(error, EBUSY,
2734 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2736 "port must be stopped first");
2739 priv->isolated = !!enable;
2741 dev->dev_ops = &mlx5_dev_ops_isolate;
2743 dev->dev_ops = &mlx5_dev_ops;
2750 * @see rte_flow_query()
2754 flow_drv_query(struct rte_eth_dev *dev,
2755 struct rte_flow *flow,
2756 const struct rte_flow_action *actions,
2758 struct rte_flow_error *error)
2760 const struct mlx5_flow_driver_ops *fops;
2761 enum mlx5_flow_drv_type ftype = flow->drv_type;
2763 assert(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
2764 fops = flow_get_drv_ops(ftype);
2766 return fops->query(dev, flow, actions, data, error);
2772 * @see rte_flow_query()
2776 mlx5_flow_query(struct rte_eth_dev *dev,
2777 struct rte_flow *flow,
2778 const struct rte_flow_action *actions,
2780 struct rte_flow_error *error)
2784 ret = flow_drv_query(dev, flow, actions, data, error);
2791 * Convert a flow director filter to a generic flow.
2794 * Pointer to Ethernet device.
2795 * @param fdir_filter
2796 * Flow director filter to add.
2798 * Generic flow parameters structure.
2801 * 0 on success, a negative errno value otherwise and rte_errno is set.
2804 flow_fdir_filter_convert(struct rte_eth_dev *dev,
2805 const struct rte_eth_fdir_filter *fdir_filter,
2806 struct mlx5_fdir *attributes)
2808 struct mlx5_priv *priv = dev->data->dev_private;
2809 const struct rte_eth_fdir_input *input = &fdir_filter->input;
2810 const struct rte_eth_fdir_masks *mask =
2811 &dev->data->dev_conf.fdir_conf.mask;
2813 /* Validate queue number. */
2814 if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
2815 DRV_LOG(ERR, "port %u invalid queue number %d",
2816 dev->data->port_id, fdir_filter->action.rx_queue);
2820 attributes->attr.ingress = 1;
2821 attributes->items[0] = (struct rte_flow_item) {
2822 .type = RTE_FLOW_ITEM_TYPE_ETH,
2823 .spec = &attributes->l2,
2824 .mask = &attributes->l2_mask,
2826 switch (fdir_filter->action.behavior) {
2827 case RTE_ETH_FDIR_ACCEPT:
2828 attributes->actions[0] = (struct rte_flow_action){
2829 .type = RTE_FLOW_ACTION_TYPE_QUEUE,
2830 .conf = &attributes->queue,
2833 case RTE_ETH_FDIR_REJECT:
2834 attributes->actions[0] = (struct rte_flow_action){
2835 .type = RTE_FLOW_ACTION_TYPE_DROP,
2839 DRV_LOG(ERR, "port %u invalid behavior %d",
2841 fdir_filter->action.behavior);
2842 rte_errno = ENOTSUP;
2845 attributes->queue.index = fdir_filter->action.rx_queue;
2847 switch (fdir_filter->input.flow_type) {
2848 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2849 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2850 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2851 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
2852 .src_addr = input->flow.ip4_flow.src_ip,
2853 .dst_addr = input->flow.ip4_flow.dst_ip,
2854 .time_to_live = input->flow.ip4_flow.ttl,
2855 .type_of_service = input->flow.ip4_flow.tos,
2857 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
2858 .src_addr = mask->ipv4_mask.src_ip,
2859 .dst_addr = mask->ipv4_mask.dst_ip,
2860 .time_to_live = mask->ipv4_mask.ttl,
2861 .type_of_service = mask->ipv4_mask.tos,
2862 .next_proto_id = mask->ipv4_mask.proto,
2864 attributes->items[1] = (struct rte_flow_item){
2865 .type = RTE_FLOW_ITEM_TYPE_IPV4,
2866 .spec = &attributes->l3,
2867 .mask = &attributes->l3_mask,
2870 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2871 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2872 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2873 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
2874 .hop_limits = input->flow.ipv6_flow.hop_limits,
2875 .proto = input->flow.ipv6_flow.proto,
2878 memcpy(attributes->l3.ipv6.hdr.src_addr,
2879 input->flow.ipv6_flow.src_ip,
2880 RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
2881 memcpy(attributes->l3.ipv6.hdr.dst_addr,
2882 input->flow.ipv6_flow.dst_ip,
2883 RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
2884 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
2885 mask->ipv6_mask.src_ip,
2886 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
2887 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
2888 mask->ipv6_mask.dst_ip,
2889 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
2890 attributes->items[1] = (struct rte_flow_item){
2891 .type = RTE_FLOW_ITEM_TYPE_IPV6,
2892 .spec = &attributes->l3,
2893 .mask = &attributes->l3_mask,
2897 DRV_LOG(ERR, "port %u invalid flow type%d",
2898 dev->data->port_id, fdir_filter->input.flow_type);
2899 rte_errno = ENOTSUP;
2903 switch (fdir_filter->input.flow_type) {
2904 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
2905 attributes->l4.udp.hdr = (struct rte_udp_hdr){
2906 .src_port = input->flow.udp4_flow.src_port,
2907 .dst_port = input->flow.udp4_flow.dst_port,
2909 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
2910 .src_port = mask->src_port_mask,
2911 .dst_port = mask->dst_port_mask,
2913 attributes->items[2] = (struct rte_flow_item){
2914 .type = RTE_FLOW_ITEM_TYPE_UDP,
2915 .spec = &attributes->l4,
2916 .mask = &attributes->l4_mask,
2919 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
2920 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
2921 .src_port = input->flow.tcp4_flow.src_port,
2922 .dst_port = input->flow.tcp4_flow.dst_port,
2924 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
2925 .src_port = mask->src_port_mask,
2926 .dst_port = mask->dst_port_mask,
2928 attributes->items[2] = (struct rte_flow_item){
2929 .type = RTE_FLOW_ITEM_TYPE_TCP,
2930 .spec = &attributes->l4,
2931 .mask = &attributes->l4_mask,
2934 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
2935 attributes->l4.udp.hdr = (struct rte_udp_hdr){
2936 .src_port = input->flow.udp6_flow.src_port,
2937 .dst_port = input->flow.udp6_flow.dst_port,
2939 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
2940 .src_port = mask->src_port_mask,
2941 .dst_port = mask->dst_port_mask,
2943 attributes->items[2] = (struct rte_flow_item){
2944 .type = RTE_FLOW_ITEM_TYPE_UDP,
2945 .spec = &attributes->l4,
2946 .mask = &attributes->l4_mask,
2949 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
2950 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
2951 .src_port = input->flow.tcp6_flow.src_port,
2952 .dst_port = input->flow.tcp6_flow.dst_port,
2954 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
2955 .src_port = mask->src_port_mask,
2956 .dst_port = mask->dst_port_mask,
2958 attributes->items[2] = (struct rte_flow_item){
2959 .type = RTE_FLOW_ITEM_TYPE_TCP,
2960 .spec = &attributes->l4,
2961 .mask = &attributes->l4_mask,
2964 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
2965 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
2968 DRV_LOG(ERR, "port %u invalid flow type%d",
2969 dev->data->port_id, fdir_filter->input.flow_type);
2970 rte_errno = ENOTSUP;
2976 #define FLOW_FDIR_CMP(f1, f2, fld) \
2977 memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
2980 * Compare two FDIR flows. If items and actions are identical, the two flows are
2984 * Pointer to Ethernet device.
2986 * FDIR flow to compare.
2988 * FDIR flow to compare.
2991 * Zero on match, 1 otherwise.
2994 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
2996 if (FLOW_FDIR_CMP(f1, f2, attr) ||
2997 FLOW_FDIR_CMP(f1, f2, l2) ||
2998 FLOW_FDIR_CMP(f1, f2, l2_mask) ||
2999 FLOW_FDIR_CMP(f1, f2, l3) ||
3000 FLOW_FDIR_CMP(f1, f2, l3_mask) ||
3001 FLOW_FDIR_CMP(f1, f2, l4) ||
3002 FLOW_FDIR_CMP(f1, f2, l4_mask) ||
3003 FLOW_FDIR_CMP(f1, f2, actions[0].type))
3005 if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
3006 FLOW_FDIR_CMP(f1, f2, queue))
3012 * Search device flow list to find out a matched FDIR flow.
3015 * Pointer to Ethernet device.
3017 * FDIR flow to lookup.
3020 * Pointer of flow if found, NULL otherwise.
3022 static struct rte_flow *
3023 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
3025 struct mlx5_priv *priv = dev->data->dev_private;
3026 struct rte_flow *flow = NULL;
3029 TAILQ_FOREACH(flow, &priv->flows, next) {
3030 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
3031 DRV_LOG(DEBUG, "port %u found FDIR flow %p",
3032 dev->data->port_id, (void *)flow);
3040 * Add new flow director filter and store it in list.
3043 * Pointer to Ethernet device.
3044 * @param fdir_filter
3045 * Flow director filter to add.
3048 * 0 on success, a negative errno value otherwise and rte_errno is set.
3051 flow_fdir_filter_add(struct rte_eth_dev *dev,
3052 const struct rte_eth_fdir_filter *fdir_filter)
3054 struct mlx5_priv *priv = dev->data->dev_private;
3055 struct mlx5_fdir *fdir_flow;
3056 struct rte_flow *flow;
3059 fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
3064 ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
3067 flow = flow_fdir_filter_lookup(dev, fdir_flow);
3072 flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
3073 fdir_flow->items, fdir_flow->actions, NULL);
3076 assert(!flow->fdir);
3077 flow->fdir = fdir_flow;
3078 DRV_LOG(DEBUG, "port %u created FDIR flow %p",
3079 dev->data->port_id, (void *)flow);
3082 rte_free(fdir_flow);
3087 * Delete specific filter.
3090 * Pointer to Ethernet device.
3091 * @param fdir_filter
3092 * Filter to be deleted.
3095 * 0 on success, a negative errno value otherwise and rte_errno is set.
3098 flow_fdir_filter_delete(struct rte_eth_dev *dev,
3099 const struct rte_eth_fdir_filter *fdir_filter)
3101 struct mlx5_priv *priv = dev->data->dev_private;
3102 struct rte_flow *flow;
3103 struct mlx5_fdir fdir_flow = {
3108 ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
3111 flow = flow_fdir_filter_lookup(dev, &fdir_flow);
3116 flow_list_destroy(dev, &priv->flows, flow);
3117 DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
3118 dev->data->port_id, (void *)flow);
3123 * Update queue for specific filter.
3126 * Pointer to Ethernet device.
3127 * @param fdir_filter
3128 * Filter to be updated.
3131 * 0 on success, a negative errno value otherwise and rte_errno is set.
3134 flow_fdir_filter_update(struct rte_eth_dev *dev,
3135 const struct rte_eth_fdir_filter *fdir_filter)
3139 ret = flow_fdir_filter_delete(dev, fdir_filter);
3142 return flow_fdir_filter_add(dev, fdir_filter);
3146 * Flush all filters.
3149 * Pointer to Ethernet device.
3152 flow_fdir_filter_flush(struct rte_eth_dev *dev)
3154 struct mlx5_priv *priv = dev->data->dev_private;
3156 mlx5_flow_list_flush(dev, &priv->flows);
3160 * Get flow director information.
3163 * Pointer to Ethernet device.
3164 * @param[out] fdir_info
3165 * Resulting flow director information.
3168 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
3170 struct rte_eth_fdir_masks *mask =
3171 &dev->data->dev_conf.fdir_conf.mask;
3173 fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
3174 fdir_info->guarant_spc = 0;
3175 rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
3176 fdir_info->max_flexpayload = 0;
3177 fdir_info->flow_types_mask[0] = 0;
3178 fdir_info->flex_payload_unit = 0;
3179 fdir_info->max_flex_payload_segment_num = 0;
3180 fdir_info->flex_payload_limit = 0;
3181 memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
3185 * Deal with flow director operations.
3188 * Pointer to Ethernet device.
3190 * Operation to perform.
3192 * Pointer to operation-specific structure.
3195 * 0 on success, a negative errno value otherwise and rte_errno is set.
3198 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
3201 enum rte_fdir_mode fdir_mode =
3202 dev->data->dev_conf.fdir_conf.mode;
3204 if (filter_op == RTE_ETH_FILTER_NOP)
3206 if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
3207 fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
3208 DRV_LOG(ERR, "port %u flow director mode %d not supported",
3209 dev->data->port_id, fdir_mode);
3213 switch (filter_op) {
3214 case RTE_ETH_FILTER_ADD:
3215 return flow_fdir_filter_add(dev, arg);
3216 case RTE_ETH_FILTER_UPDATE:
3217 return flow_fdir_filter_update(dev, arg);
3218 case RTE_ETH_FILTER_DELETE:
3219 return flow_fdir_filter_delete(dev, arg);
3220 case RTE_ETH_FILTER_FLUSH:
3221 flow_fdir_filter_flush(dev);
3223 case RTE_ETH_FILTER_INFO:
3224 flow_fdir_info_get(dev, arg);
3227 DRV_LOG(DEBUG, "port %u unknown operation %u",
3228 dev->data->port_id, filter_op);
3236 * Manage filter operations.
3239 * Pointer to Ethernet device structure.
3240 * @param filter_type
3243 * Operation to perform.
3245 * Pointer to operation-specific structure.
3248 * 0 on success, a negative errno value otherwise and rte_errno is set.
3251 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
3252 enum rte_filter_type filter_type,
3253 enum rte_filter_op filter_op,
3256 switch (filter_type) {
3257 case RTE_ETH_FILTER_GENERIC:
3258 if (filter_op != RTE_ETH_FILTER_GET) {
3262 *(const void **)arg = &mlx5_flow_ops;
3264 case RTE_ETH_FILTER_FDIR:
3265 return flow_fdir_ctrl_func(dev, filter_op, arg);
3267 DRV_LOG(ERR, "port %u filter type (%d) not supported",
3268 dev->data->port_id, filter_type);
3269 rte_errno = ENOTSUP;
3275 #define MLX5_POOL_QUERY_FREQ_US 1000000
3278 * Set the periodic procedure for triggering asynchronous batch queries for all
3279 * the counter pools.
3282 * Pointer to mlx5_ibv_shared object.
3285 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
3287 struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
3288 uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
3291 cont = MLX5_CNT_CONTAINER(sh, 1, 0);
3292 pools_n += rte_atomic16_read(&cont->n_valid);
3293 us = MLX5_POOL_QUERY_FREQ_US / pools_n;
3294 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us\n", pools_n, us);
3295 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
3296 sh->cmng.query_thread_on = 0;
3297 DRV_LOG(ERR, "Cannot reinitialize query alarm\n");
3299 sh->cmng.query_thread_on = 1;
3304 * The periodic procedure for triggering asynchronous batch queries for all the
3305 * counter pools. This function is probably called by the host thread.
3308 * The parameter for the alarm process.
3311 mlx5_flow_query_alarm(void *arg)
3313 struct mlx5_ibv_shared *sh = arg;
3314 struct mlx5_devx_obj *dcs;
3317 uint8_t batch = sh->cmng.batch;
3318 uint16_t pool_index = sh->cmng.pool_index;
3319 struct mlx5_pools_container *cont;
3320 struct mlx5_pools_container *mcont;
3321 struct mlx5_flow_counter_pool *pool;
3323 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
3326 cont = MLX5_CNT_CONTAINER(sh, batch, 1);
3327 mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
3328 /* Check if resize was done and need to flip a container. */
3329 if (cont != mcont) {
3331 /* Clean the old container. */
3332 rte_free(cont->pools);
3333 memset(cont, 0, sizeof(*cont));
3336 /* Flip the host container. */
3337 sh->cmng.mhi[batch] ^= (uint8_t)2;
3341 /* 2 empty containers case is unexpected. */
3342 if (unlikely(batch != sh->cmng.batch))
3346 goto next_container;
3348 pool = cont->pools[pool_index];
3350 /* There is a pool query in progress. */
3353 LIST_FIRST(&sh->cmng.free_stat_raws);
3355 /* No free counter statistics raw memory. */
3357 dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
3359 offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
3360 ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
3362 pool->raw_hw->mem_mng->dm->id,
3364 (pool->raw_hw->data + offset),
3366 (uint64_t)(uintptr_t)pool);
3368 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
3369 " %d\n", pool->min_dcs->id);
3370 pool->raw_hw = NULL;
3373 pool->raw_hw->min_dcs_id = dcs->id;
3374 LIST_REMOVE(pool->raw_hw, next);
3375 sh->cmng.pending_queries++;
3377 if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
3382 sh->cmng.batch = batch;
3383 sh->cmng.pool_index = pool_index;
3384 mlx5_set_query_alarm(sh);
3388 * Handler for the HW respond about ready values from an asynchronous batch
3389 * query. This function is probably called by the host thread.
3392 * The pointer to the shared IB device context.
3393 * @param[in] async_id
3394 * The Devx async ID.
3396 * The status of the completion.
3399 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
3400 uint64_t async_id, int status)
3402 struct mlx5_flow_counter_pool *pool =
3403 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
3404 struct mlx5_counter_stats_raw *raw_to_free;
3406 if (unlikely(status)) {
3407 raw_to_free = pool->raw_hw;
3409 raw_to_free = pool->raw;
3410 rte_spinlock_lock(&pool->sl);
3411 pool->raw = pool->raw_hw;
3412 rte_spinlock_unlock(&pool->sl);
3413 rte_atomic64_add(&pool->query_gen, 1);
3414 /* Be sure the new raw counters data is updated in memory. */
3417 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
3418 pool->raw_hw = NULL;
3419 sh->cmng.pending_queries--;