drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <stdbool.h>
  10 #include <sys/queue.h>
  11
  12 #include <rte_common.h>
  13 #include <rte_ether.h>
  14 #include <ethdev_driver.h>
  15 #include <rte_eal_paging.h>
  16 #include <rte_flow.h>
  17 #include <rte_cycles.h>
  18 #include <rte_flow_driver.h>
  19 #include <rte_malloc.h>
  20 #include <rte_ip.h>
  21
  22 #include <mlx5_glue.h>
  23 #include <mlx5_devx_cmds.h>
  24 #include <mlx5_prm.h>
  25 #include <mlx5_malloc.h>
  26
  27 #include "mlx5_defs.h"
  28 #include "mlx5.h"
  29 #include "mlx5_flow.h"
  30 #include "mlx5_flow_os.h"
  31 #include "mlx5_rx.h"
  32 #include "mlx5_tx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              const struct mlx5_flow_tunnel *tunnel,
  54                              struct tunnel_default_miss_ctx *ctx,
  55                              struct rte_flow_error *error);
  56 static struct mlx5_flow_tunnel *
  57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  58 static void
  59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  60 static uint32_t
  61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  62                                 const struct mlx5_flow_tunnel *tunnel,
  63                                 uint32_t group, uint32_t *table,
  64                                 struct rte_flow_error *error);
  65
  66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  67 static void mlx5_flow_pop_thread_workspace(void);
  68
  69
  70 /** Device flow drivers. */
  71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  72
  73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  74
  75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  76         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  78         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  79         [MLX5_FLOW_TYPE_HW] = &mlx5_flow_hw_drv_ops,
  80 #endif
  81         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  82         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  83 };
  84
  85 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  86 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  87         (const int []){ \
  88                 __VA_ARGS__, 0, \
  89         }
  90
  91 /** Node object of input graph for mlx5_flow_expand_rss(). */
  92 struct mlx5_flow_expand_node {
  93         const int *const next;
  94         /**<
  95          * List of next node indexes. Index 0 is interpreted as a terminator.
  96          */
  97         const enum rte_flow_item_type type;
  98         /**< Pattern item type of current node. */
  99         uint64_t rss_types;
 100         /**<
 101          * RSS types bit-field associated with this node
 102          * (see RTE_ETH_RSS_* definitions).
 103          */
 104         uint64_t node_flags;
 105         /**<
 106          *  Bit-fields that define how the node is used in the expansion.
 107          * (see MLX5_EXPANSION_NODE_* definitions).
 108          */
 109 };
 110
 111 /* Optional expand field. The expansion alg will not go deeper. */
 112 #define MLX5_EXPANSION_NODE_OPTIONAL (UINT64_C(1) << 0)
 113
 114 /* The node is not added implicitly as expansion to the flow pattern.
 115  * If the node type does not match the flow pattern item type, the
 116  * expansion alg will go deeper to its next items.
 117  * In the current implementation, the list of next nodes indexes can
 118  * have up to one node with this flag set and it has to be the last
 119  * node index (before the list terminator).
 120  */
 121 #define MLX5_EXPANSION_NODE_EXPLICIT (UINT64_C(1) << 1)
 122
 123 /** Object returned by mlx5_flow_expand_rss(). */
 124 struct mlx5_flow_expand_rss {
 125         uint32_t entries;
 126         /**< Number of entries @p patterns and @p priorities. */
 127         struct {
 128                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 129                 uint32_t priority; /**< Priority offset for each expansion. */
 130         } entry[];
 131 };
 132
 133 static void
 134 mlx5_dbg__print_pattern(const struct rte_flow_item *item);
 135
 136 static const struct mlx5_flow_expand_node *
 137 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
 138                 unsigned int item_idx,
 139                 const struct mlx5_flow_expand_node graph[],
 140                 const struct mlx5_flow_expand_node *node);
 141
 142 static bool
 143 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item)
 144 {
 145         switch (item->type) {
 146         case RTE_FLOW_ITEM_TYPE_ETH:
 147         case RTE_FLOW_ITEM_TYPE_VLAN:
 148         case RTE_FLOW_ITEM_TYPE_IPV4:
 149         case RTE_FLOW_ITEM_TYPE_IPV6:
 150         case RTE_FLOW_ITEM_TYPE_UDP:
 151         case RTE_FLOW_ITEM_TYPE_TCP:
 152         case RTE_FLOW_ITEM_TYPE_VXLAN:
 153         case RTE_FLOW_ITEM_TYPE_NVGRE:
 154         case RTE_FLOW_ITEM_TYPE_GRE:
 155         case RTE_FLOW_ITEM_TYPE_GENEVE:
 156         case RTE_FLOW_ITEM_TYPE_MPLS:
 157         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 158         case RTE_FLOW_ITEM_TYPE_GRE_KEY:
 159         case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
 160         case RTE_FLOW_ITEM_TYPE_GTP:
 161                 return true;
 162         default:
 163                 break;
 164         }
 165         return false;
 166 }
 167
 168 /**
 169  * Network Service Header (NSH) and its next protocol values
 170  * are described in RFC-8393.
 171  */
 172 static enum rte_flow_item_type
 173 mlx5_nsh_proto_to_item_type(uint8_t proto_spec, uint8_t proto_mask)
 174 {
 175         enum rte_flow_item_type type;
 176
 177         switch (proto_mask & proto_spec) {
 178         case 0:
 179                 type = RTE_FLOW_ITEM_TYPE_VOID;
 180                 break;
 181         case RTE_VXLAN_GPE_TYPE_IPV4:
 182                 type = RTE_FLOW_ITEM_TYPE_IPV4;
 183                 break;
 184         case RTE_VXLAN_GPE_TYPE_IPV6:
 185                 type = RTE_VXLAN_GPE_TYPE_IPV6;
 186                 break;
 187         case RTE_VXLAN_GPE_TYPE_ETH:
 188                 type = RTE_FLOW_ITEM_TYPE_ETH;
 189                 break;
 190         default:
 191                 type = RTE_FLOW_ITEM_TYPE_END;
 192         }
 193         return type;
 194 }
 195
 196 static enum rte_flow_item_type
 197 mlx5_inet_proto_to_item_type(uint8_t proto_spec, uint8_t proto_mask)
 198 {
 199         enum rte_flow_item_type type;
 200
 201         switch (proto_mask & proto_spec) {
 202         case 0:
 203                 type = RTE_FLOW_ITEM_TYPE_VOID;
 204                 break;
 205         case IPPROTO_UDP:
 206                 type = RTE_FLOW_ITEM_TYPE_UDP;
 207                 break;
 208         case IPPROTO_TCP:
 209                 type = RTE_FLOW_ITEM_TYPE_TCP;
 210                 break;
 211         case IPPROTO_IPIP:
 212                 type = RTE_FLOW_ITEM_TYPE_IPV4;
 213                 break;
 214         case IPPROTO_IPV6:
 215                 type = RTE_FLOW_ITEM_TYPE_IPV6;
 216                 break;
 217         default:
 218                 type = RTE_FLOW_ITEM_TYPE_END;
 219         }
 220         return type;
 221 }
 222
 223 static enum rte_flow_item_type
 224 mlx5_ethertype_to_item_type(rte_be16_t type_spec,
 225                             rte_be16_t type_mask, bool is_tunnel)
 226 {
 227         enum rte_flow_item_type type;
 228
 229         switch (rte_be_to_cpu_16(type_spec & type_mask)) {
 230         case 0:
 231                 type = RTE_FLOW_ITEM_TYPE_VOID;
 232                 break;
 233         case RTE_ETHER_TYPE_TEB:
 234                 type = is_tunnel ?
 235                        RTE_FLOW_ITEM_TYPE_ETH : RTE_FLOW_ITEM_TYPE_END;
 236                 break;
 237         case RTE_ETHER_TYPE_VLAN:
 238                 type = !is_tunnel ?
 239                        RTE_FLOW_ITEM_TYPE_VLAN : RTE_FLOW_ITEM_TYPE_END;
 240                 break;
 241         case RTE_ETHER_TYPE_IPV4:
 242                 type = RTE_FLOW_ITEM_TYPE_IPV4;
 243                 break;
 244         case RTE_ETHER_TYPE_IPV6:
 245                 type = RTE_FLOW_ITEM_TYPE_IPV6;
 246                 break;
 247         default:
 248                 type = RTE_FLOW_ITEM_TYPE_END;
 249         }
 250         return type;
 251 }
 252
 253 static enum rte_flow_item_type
 254 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 255 {
 256 #define MLX5_XSET_ITEM_MASK_SPEC(type, fld)                              \
 257         do {                                                             \
 258                 const void *m = item->mask;                              \
 259                 const void *s = item->spec;                              \
 260                 mask = m ?                                               \
 261                         ((const struct rte_flow_item_##type *)m)->fld :  \
 262                         rte_flow_item_##type##_mask.fld;                 \
 263                 spec = ((const struct rte_flow_item_##type *)s)->fld;    \
 264         } while (0)
 265
 266         enum rte_flow_item_type ret;
 267         uint16_t spec, mask;
 268
 269         if (item == NULL || item->spec == NULL)
 270                 return RTE_FLOW_ITEM_TYPE_VOID;
 271         switch (item->type) {
 272         case RTE_FLOW_ITEM_TYPE_ETH:
 273                 MLX5_XSET_ITEM_MASK_SPEC(eth, type);
 274                 if (!mask)
 275                         return RTE_FLOW_ITEM_TYPE_VOID;
 276                 ret = mlx5_ethertype_to_item_type(spec, mask, false);
 277                 break;
 278         case RTE_FLOW_ITEM_TYPE_VLAN:
 279                 MLX5_XSET_ITEM_MASK_SPEC(vlan, inner_type);
 280                 if (!mask)
 281                         return RTE_FLOW_ITEM_TYPE_VOID;
 282                 ret = mlx5_ethertype_to_item_type(spec, mask, false);
 283                 break;
 284         case RTE_FLOW_ITEM_TYPE_IPV4:
 285                 MLX5_XSET_ITEM_MASK_SPEC(ipv4, hdr.next_proto_id);
 286                 if (!mask)
 287                         return RTE_FLOW_ITEM_TYPE_VOID;
 288                 ret = mlx5_inet_proto_to_item_type(spec, mask);
 289                 break;
 290         case RTE_FLOW_ITEM_TYPE_IPV6:
 291                 MLX5_XSET_ITEM_MASK_SPEC(ipv6, hdr.proto);
 292                 if (!mask)
 293                         return RTE_FLOW_ITEM_TYPE_VOID;
 294                 ret = mlx5_inet_proto_to_item_type(spec, mask);
 295                 break;
 296         case RTE_FLOW_ITEM_TYPE_GENEVE:
 297                 MLX5_XSET_ITEM_MASK_SPEC(geneve, protocol);
 298                 ret = mlx5_ethertype_to_item_type(spec, mask, true);
 299                 break;
 300         case RTE_FLOW_ITEM_TYPE_GRE:
 301                 MLX5_XSET_ITEM_MASK_SPEC(gre, protocol);
 302                 ret = mlx5_ethertype_to_item_type(spec, mask, true);
 303                 break;
 304         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 305                 MLX5_XSET_ITEM_MASK_SPEC(vxlan_gpe, protocol);
 306                 ret = mlx5_nsh_proto_to_item_type(spec, mask);
 307                 break;
 308         default:
 309                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 310                 break;
 311         }
 312         return ret;
 313 #undef MLX5_XSET_ITEM_MASK_SPEC
 314 }
 315
 316 static const int *
 317 mlx5_flow_expand_rss_skip_explicit(const struct mlx5_flow_expand_node graph[],
 318                 const int *next_node)
 319 {
 320         const struct mlx5_flow_expand_node *node = NULL;
 321         const int *next = next_node;
 322
 323         while (next && *next) {
 324                 /*
 325                  * Skip the nodes with the MLX5_EXPANSION_NODE_EXPLICIT
 326                  * flag set, because they were not found in the flow pattern.
 327                  */
 328                 node = &graph[*next];
 329                 if (!(node->node_flags & MLX5_EXPANSION_NODE_EXPLICIT))
 330                         break;
 331                 next = node->next;
 332         }
 333         return next;
 334 }
 335
 336 #define MLX5_RSS_EXP_ELT_N 16
 337
 338 /**
 339  * Expand RSS flows into several possible flows according to the RSS hash
 340  * fields requested and the driver capabilities.
 341  *
 342  * @param[out] buf
 343  *   Buffer to store the result expansion.
 344  * @param[in] size
 345  *   Buffer size in bytes. If 0, @p buf can be NULL.
 346  * @param[in] pattern
 347  *   User flow pattern.
 348  * @param[in] types
 349  *   RSS types to expand (see RTE_ETH_RSS_* definitions).
 350  * @param[in] graph
 351  *   Input graph to expand @p pattern according to @p types.
 352  * @param[in] graph_root_index
 353  *   Index of root node in @p graph, typically 0.
 354  *
 355  * @return
 356  *   A positive value representing the size of @p buf in bytes regardless of
 357  *   @p size on success, a negative errno value otherwise and rte_errno is
 358  *   set, the following errors are defined:
 359  *
 360  *   -E2BIG: graph-depth @p graph is too deep.
 361  *   -EINVAL: @p size has not enough space for expanded pattern.
 362  */
 363 static int
 364 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 365                      const struct rte_flow_item *pattern, uint64_t types,
 366                      const struct mlx5_flow_expand_node graph[],
 367                      int graph_root_index)
 368 {
 369         const struct rte_flow_item *item;
 370         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 371         const int *next_node;
 372         const int *stack[MLX5_RSS_EXP_ELT_N];
 373         int stack_pos = 0;
 374         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 375         unsigned int i, item_idx, last_expand_item_idx = 0;
 376         size_t lsize;
 377         size_t user_pattern_size = 0;
 378         void *addr = NULL;
 379         const struct mlx5_flow_expand_node *next = NULL;
 380         struct rte_flow_item missed_item;
 381         int missed = 0;
 382         int elt = 0;
 383         const struct rte_flow_item *last_expand_item = NULL;
 384
 385         memset(&missed_item, 0, sizeof(missed_item));
 386         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 387                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 388         if (lsize > size)
 389                 return -EINVAL;
 390         buf->entry[0].priority = 0;
 391         buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 392         buf->entries = 0;
 393         addr = buf->entry[0].pattern;
 394         for (item = pattern, item_idx = 0;
 395                         item->type != RTE_FLOW_ITEM_TYPE_END;
 396                         item++, item_idx++) {
 397                 if (!mlx5_flow_is_rss_expandable_item(item)) {
 398                         user_pattern_size += sizeof(*item);
 399                         continue;
 400                 }
 401                 last_expand_item = item;
 402                 last_expand_item_idx = item_idx;
 403                 i = 0;
 404                 while (node->next && node->next[i]) {
 405                         next = &graph[node->next[i]];
 406                         if (next->type == item->type)
 407                                 break;
 408                         if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
 409                                 node = next;
 410                                 i = 0;
 411                         } else {
 412                                 ++i;
 413                         }
 414                 }
 415                 if (next)
 416                         node = next;
 417                 user_pattern_size += sizeof(*item);
 418         }
 419         user_pattern_size += sizeof(*item); /* Handle END item. */
 420         lsize += user_pattern_size;
 421         if (lsize > size)
 422                 return -EINVAL;
 423         /* Copy the user pattern in the first entry of the buffer. */
 424         rte_memcpy(addr, pattern, user_pattern_size);
 425         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 426         buf->entries = 1;
 427         /* Start expanding. */
 428         memset(flow_items, 0, sizeof(flow_items));
 429         user_pattern_size -= sizeof(*item);
 430         /*
 431          * Check if the last valid item has spec set, need complete pattern,
 432          * and the pattern can be used for expansion.
 433          */
 434         missed_item.type = mlx5_flow_expand_rss_item_complete(last_expand_item);
 435         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 436                 /* Item type END indicates expansion is not required. */
 437                 return lsize;
 438         }
 439         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 440                 next = NULL;
 441                 missed = 1;
 442                 i = 0;
 443                 while (node->next && node->next[i]) {
 444                         next = &graph[node->next[i]];
 445                         if (next->type == missed_item.type) {
 446                                 flow_items[0].type = missed_item.type;
 447                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 448                                 break;
 449                         }
 450                         if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
 451                                 node = next;
 452                                 i = 0;
 453                         } else {
 454                                 ++i;
 455                         }
 456                         next = NULL;
 457                 }
 458         }
 459         if (next && missed) {
 460                 elt = 2; /* missed item + item end. */
 461                 node = next;
 462                 lsize += elt * sizeof(*item) + user_pattern_size;
 463                 if (lsize > size)
 464                         return -EINVAL;
 465                 if (node->rss_types & types) {
 466                         buf->entry[buf->entries].priority = 1;
 467                         buf->entry[buf->entries].pattern = addr;
 468                         buf->entries++;
 469                         rte_memcpy(addr, buf->entry[0].pattern,
 470                                    user_pattern_size);
 471                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 472                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 473                         addr = (void *)(((uintptr_t)addr) +
 474                                         elt * sizeof(*item));
 475                 }
 476         } else if (last_expand_item != NULL) {
 477                 node = mlx5_flow_expand_rss_adjust_node(pattern,
 478                                 last_expand_item_idx, graph, node);
 479         }
 480         memset(flow_items, 0, sizeof(flow_items));
 481         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 482                         node->next);
 483         stack[stack_pos] = next_node;
 484         node = next_node ? &graph[*next_node] : NULL;
 485         while (node) {
 486                 flow_items[stack_pos].type = node->type;
 487                 if (node->rss_types & types) {
 488                         size_t n;
 489                         /*
 490                          * compute the number of items to copy from the
 491                          * expansion and copy it.
 492                          * When the stack_pos is 0, there are 1 element in it,
 493                          * plus the addition END item.
 494                          */
 495                         elt = stack_pos + 2;
 496                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 497                         lsize += elt * sizeof(*item) + user_pattern_size;
 498                         if (lsize > size)
 499                                 return -EINVAL;
 500                         n = elt * sizeof(*item);
 501                         buf->entry[buf->entries].priority =
 502                                 stack_pos + 1 + missed;
 503                         buf->entry[buf->entries].pattern = addr;
 504                         buf->entries++;
 505                         rte_memcpy(addr, buf->entry[0].pattern,
 506                                    user_pattern_size);
 507                         addr = (void *)(((uintptr_t)addr) +
 508                                         user_pattern_size);
 509                         rte_memcpy(addr, &missed_item,
 510                                    missed * sizeof(*item));
 511                         addr = (void *)(((uintptr_t)addr) +
 512                                 missed * sizeof(*item));
 513                         rte_memcpy(addr, flow_items, n);
 514                         addr = (void *)(((uintptr_t)addr) + n);
 515                 }
 516                 /* Go deeper. */
 517                 if (!(node->node_flags & MLX5_EXPANSION_NODE_OPTIONAL) &&
 518                                 node->next) {
 519                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 520                                         node->next);
 521                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 522                                 rte_errno = E2BIG;
 523                                 return -rte_errno;
 524                         }
 525                         stack[stack_pos] = next_node;
 526                 } else if (*(next_node + 1)) {
 527                         /* Follow up with the next possibility. */
 528                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 529                                         ++next_node);
 530                 } else if (!stack_pos) {
 531                         /*
 532                          * Completing the traverse over the different paths.
 533                          * The next_node is advanced to the terminator.
 534                          */
 535                         ++next_node;
 536                 } else {
 537                         /* Move to the next path. */
 538                         while (stack_pos) {
 539                                 next_node = stack[--stack_pos];
 540                                 next_node++;
 541                                 if (*next_node)
 542                                         break;
 543                         }
 544                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 545                                         next_node);
 546                         stack[stack_pos] = next_node;
 547                 }
 548                 node = next_node && *next_node ? &graph[*next_node] : NULL;
 549         };
 550         return lsize;
 551 }
 552
 553 enum mlx5_expansion {
 554         MLX5_EXPANSION_ROOT,
 555         MLX5_EXPANSION_ROOT_OUTER,
 556         MLX5_EXPANSION_OUTER_ETH,
 557         MLX5_EXPANSION_OUTER_VLAN,
 558         MLX5_EXPANSION_OUTER_IPV4,
 559         MLX5_EXPANSION_OUTER_IPV4_UDP,
 560         MLX5_EXPANSION_OUTER_IPV4_TCP,
 561         MLX5_EXPANSION_OUTER_IPV6,
 562         MLX5_EXPANSION_OUTER_IPV6_UDP,
 563         MLX5_EXPANSION_OUTER_IPV6_TCP,
 564         MLX5_EXPANSION_VXLAN,
 565         MLX5_EXPANSION_STD_VXLAN,
 566         MLX5_EXPANSION_L3_VXLAN,
 567         MLX5_EXPANSION_VXLAN_GPE,
 568         MLX5_EXPANSION_GRE,
 569         MLX5_EXPANSION_NVGRE,
 570         MLX5_EXPANSION_GRE_KEY,
 571         MLX5_EXPANSION_MPLS,
 572         MLX5_EXPANSION_ETH,
 573         MLX5_EXPANSION_VLAN,
 574         MLX5_EXPANSION_IPV4,
 575         MLX5_EXPANSION_IPV4_UDP,
 576         MLX5_EXPANSION_IPV4_TCP,
 577         MLX5_EXPANSION_IPV6,
 578         MLX5_EXPANSION_IPV6_UDP,
 579         MLX5_EXPANSION_IPV6_TCP,
 580         MLX5_EXPANSION_IPV6_FRAG_EXT,
 581         MLX5_EXPANSION_GTP,
 582         MLX5_EXPANSION_GENEVE,
 583 };
 584
 585 /** Supported expansion of items. */
 586 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 587         [MLX5_EXPANSION_ROOT] = {
 588                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 589                                                   MLX5_EXPANSION_IPV4,
 590                                                   MLX5_EXPANSION_IPV6),
 591                 .type = RTE_FLOW_ITEM_TYPE_END,
 592         },
 593         [MLX5_EXPANSION_ROOT_OUTER] = {
 594                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 595                                                   MLX5_EXPANSION_OUTER_IPV4,
 596                                                   MLX5_EXPANSION_OUTER_IPV6),
 597                 .type = RTE_FLOW_ITEM_TYPE_END,
 598         },
 599         [MLX5_EXPANSION_OUTER_ETH] = {
 600                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 601                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 602                 .rss_types = 0,
 603         },
 604         [MLX5_EXPANSION_OUTER_VLAN] = {
 605                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 606                                                   MLX5_EXPANSION_OUTER_IPV6),
 607                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 608                 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
 609         },
 610         [MLX5_EXPANSION_OUTER_IPV4] = {
 611                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 612                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 613                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 614                          MLX5_EXPANSION_GRE,
 615                          MLX5_EXPANSION_NVGRE,
 616                          MLX5_EXPANSION_IPV4,
 617                          MLX5_EXPANSION_IPV6),
 618                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 619                 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 |
 620                         RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
 621         },
 622         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 623                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 624                                                   MLX5_EXPANSION_VXLAN_GPE,
 625                                                   MLX5_EXPANSION_MPLS,
 626                                                   MLX5_EXPANSION_GENEVE,
 627                                                   MLX5_EXPANSION_GTP),
 628                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 629                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP,
 630         },
 631         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 632                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 633                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP,
 634         },
 635         [MLX5_EXPANSION_OUTER_IPV6] = {
 636                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 637                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 638                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 639                          MLX5_EXPANSION_IPV4,
 640                          MLX5_EXPANSION_IPV6,
 641                          MLX5_EXPANSION_GRE,
 642                          MLX5_EXPANSION_NVGRE),
 643                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 644                 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 |
 645                         RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
 646         },
 647         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 648                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 649                                                   MLX5_EXPANSION_VXLAN_GPE,
 650                                                   MLX5_EXPANSION_MPLS,
 651                                                   MLX5_EXPANSION_GENEVE,
 652                                                   MLX5_EXPANSION_GTP),
 653                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 654                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP,
 655         },
 656         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 657                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 658                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP,
 659         },
 660         [MLX5_EXPANSION_VXLAN] = {
 661                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 662                                                   MLX5_EXPANSION_IPV4,
 663                                                   MLX5_EXPANSION_IPV6),
 664                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 665         },
 666         [MLX5_EXPANSION_STD_VXLAN] = {
 667                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 668                                         .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 669         },
 670         [MLX5_EXPANSION_L3_VXLAN] = {
 671                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 672                                         MLX5_EXPANSION_IPV6),
 673                                         .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 674         },
 675         [MLX5_EXPANSION_VXLAN_GPE] = {
 676                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 677                                                   MLX5_EXPANSION_IPV4,
 678                                                   MLX5_EXPANSION_IPV6),
 679                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 680         },
 681         [MLX5_EXPANSION_GRE] = {
 682                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 683                                                   MLX5_EXPANSION_IPV4,
 684                                                   MLX5_EXPANSION_IPV6,
 685                                                   MLX5_EXPANSION_GRE_KEY,
 686                                                   MLX5_EXPANSION_MPLS),
 687                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 688         },
 689         [MLX5_EXPANSION_GRE_KEY] = {
 690                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 691                                                   MLX5_EXPANSION_IPV6,
 692                                                   MLX5_EXPANSION_MPLS),
 693                 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY,
 694                 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
 695         },
 696         [MLX5_EXPANSION_NVGRE] = {
 697                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 698                 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
 699         },
 700         [MLX5_EXPANSION_MPLS] = {
 701                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 702                                                   MLX5_EXPANSION_IPV6,
 703                                                   MLX5_EXPANSION_ETH),
 704                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 705                 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
 706         },
 707         [MLX5_EXPANSION_ETH] = {
 708                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 709                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 710         },
 711         [MLX5_EXPANSION_VLAN] = {
 712                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 713                                                   MLX5_EXPANSION_IPV6),
 714                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 715                 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
 716         },
 717         [MLX5_EXPANSION_IPV4] = {
 718                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 719                                                   MLX5_EXPANSION_IPV4_TCP),
 720                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 721                 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 |
 722                         RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
 723         },
 724         [MLX5_EXPANSION_IPV4_UDP] = {
 725                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 726                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP,
 727         },
 728         [MLX5_EXPANSION_IPV4_TCP] = {
 729                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 730                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP,
 731         },
 732         [MLX5_EXPANSION_IPV6] = {
 733                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 734                                                   MLX5_EXPANSION_IPV6_TCP,
 735                                                   MLX5_EXPANSION_IPV6_FRAG_EXT),
 736                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 737                 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 |
 738                         RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
 739         },
 740         [MLX5_EXPANSION_IPV6_UDP] = {
 741                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 742                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP,
 743         },
 744         [MLX5_EXPANSION_IPV6_TCP] = {
 745                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 746                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP,
 747         },
 748         [MLX5_EXPANSION_IPV6_FRAG_EXT] = {
 749                 .type = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT,
 750         },
 751         [MLX5_EXPANSION_GTP] = {
 752                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 753                                                   MLX5_EXPANSION_IPV6),
 754                 .type = RTE_FLOW_ITEM_TYPE_GTP,
 755         },
 756         [MLX5_EXPANSION_GENEVE] = {
 757                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 758                                                   MLX5_EXPANSION_IPV4,
 759                                                   MLX5_EXPANSION_IPV6),
 760                 .type = RTE_FLOW_ITEM_TYPE_GENEVE,
 761         },
 762 };
 763
 764 static struct rte_flow_action_handle *
 765 mlx5_action_handle_create(struct rte_eth_dev *dev,
 766                           const struct rte_flow_indir_action_conf *conf,
 767                           const struct rte_flow_action *action,
 768                           struct rte_flow_error *error);
 769 static int mlx5_action_handle_destroy
 770                                 (struct rte_eth_dev *dev,
 771                                  struct rte_flow_action_handle *handle,
 772                                  struct rte_flow_error *error);
 773 static int mlx5_action_handle_update
 774                                 (struct rte_eth_dev *dev,
 775                                  struct rte_flow_action_handle *handle,
 776                                  const void *update,
 777                                  struct rte_flow_error *error);
 778 static int mlx5_action_handle_query
 779                                 (struct rte_eth_dev *dev,
 780                                  const struct rte_flow_action_handle *handle,
 781                                  void *data,
 782                                  struct rte_flow_error *error);
 783 static int
 784 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 785                     struct rte_flow_tunnel *app_tunnel,
 786                     struct rte_flow_action **actions,
 787                     uint32_t *num_of_actions,
 788                     struct rte_flow_error *error);
 789 static int
 790 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 791                        struct rte_flow_tunnel *app_tunnel,
 792                        struct rte_flow_item **items,
 793                        uint32_t *num_of_items,
 794                        struct rte_flow_error *error);
 795 static int
 796 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 797                               struct rte_flow_item *pmd_items,
 798                               uint32_t num_items, struct rte_flow_error *err);
 799 static int
 800 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 801                                 struct rte_flow_action *pmd_actions,
 802                                 uint32_t num_actions,
 803                                 struct rte_flow_error *err);
 804 static int
 805 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 806                                   struct rte_mbuf *m,
 807                                   struct rte_flow_restore_info *info,
 808                                   struct rte_flow_error *err);
 809 static struct rte_flow_item_flex_handle *
 810 mlx5_flow_flex_item_create(struct rte_eth_dev *dev,
 811                            const struct rte_flow_item_flex_conf *conf,
 812                            struct rte_flow_error *error);
 813 static int
 814 mlx5_flow_flex_item_release(struct rte_eth_dev *dev,
 815                             const struct rte_flow_item_flex_handle *handle,
 816                             struct rte_flow_error *error);
 817 static int
 818 mlx5_flow_info_get(struct rte_eth_dev *dev,
 819                    struct rte_flow_port_info *port_info,
 820                    struct rte_flow_queue_info *queue_info,
 821                    struct rte_flow_error *error);
 822 static int
 823 mlx5_flow_port_configure(struct rte_eth_dev *dev,
 824                          const struct rte_flow_port_attr *port_attr,
 825                          uint16_t nb_queue,
 826                          const struct rte_flow_queue_attr *queue_attr[],
 827                          struct rte_flow_error *err);
 828
 829 static struct rte_flow_pattern_template *
 830 mlx5_flow_pattern_template_create(struct rte_eth_dev *dev,
 831                 const struct rte_flow_pattern_template_attr *attr,
 832                 const struct rte_flow_item items[],
 833                 struct rte_flow_error *error);
 834
 835 static int
 836 mlx5_flow_pattern_template_destroy(struct rte_eth_dev *dev,
 837                                    struct rte_flow_pattern_template *template,
 838                                    struct rte_flow_error *error);
 839 static struct rte_flow_actions_template *
 840 mlx5_flow_actions_template_create(struct rte_eth_dev *dev,
 841                         const struct rte_flow_actions_template_attr *attr,
 842                         const struct rte_flow_action actions[],
 843                         const struct rte_flow_action masks[],
 844                         struct rte_flow_error *error);
 845 static int
 846 mlx5_flow_actions_template_destroy(struct rte_eth_dev *dev,
 847                                    struct rte_flow_actions_template *template,
 848                                    struct rte_flow_error *error);
 849
 850 static struct rte_flow_template_table *
 851 mlx5_flow_table_create(struct rte_eth_dev *dev,
 852                        const struct rte_flow_template_table_attr *attr,
 853                        struct rte_flow_pattern_template *item_templates[],
 854                        uint8_t nb_item_templates,
 855                        struct rte_flow_actions_template *action_templates[],
 856                        uint8_t nb_action_templates,
 857                        struct rte_flow_error *error);
 858 static int
 859 mlx5_flow_table_destroy(struct rte_eth_dev *dev,
 860                         struct rte_flow_template_table *table,
 861                         struct rte_flow_error *error);
 862 static struct rte_flow *
 863 mlx5_flow_async_flow_create(struct rte_eth_dev *dev,
 864                             uint32_t queue,
 865                             const struct rte_flow_op_attr *attr,
 866                             struct rte_flow_template_table *table,
 867                             const struct rte_flow_item items[],
 868                             uint8_t pattern_template_index,
 869                             const struct rte_flow_action actions[],
 870                             uint8_t action_template_index,
 871                             void *user_data,
 872                             struct rte_flow_error *error);
 873 static int
 874 mlx5_flow_async_flow_destroy(struct rte_eth_dev *dev,
 875                              uint32_t queue,
 876                              const struct rte_flow_op_attr *attr,
 877                              struct rte_flow *flow,
 878                              void *user_data,
 879                              struct rte_flow_error *error);
 880 static int
 881 mlx5_flow_pull(struct rte_eth_dev *dev,
 882                uint32_t queue,
 883                struct rte_flow_op_result res[],
 884                uint16_t n_res,
 885                struct rte_flow_error *error);
 886 static int
 887 mlx5_flow_push(struct rte_eth_dev *dev,
 888                uint32_t queue,
 889                struct rte_flow_error *error);
 890
 891 static struct rte_flow_action_handle *
 892 mlx5_flow_async_action_handle_create(struct rte_eth_dev *dev, uint32_t queue,
 893                                  const struct rte_flow_op_attr *attr,
 894                                  const struct rte_flow_indir_action_conf *conf,
 895                                  const struct rte_flow_action *action,
 896                                  void *user_data,
 897                                  struct rte_flow_error *error);
 898
 899 static int
 900 mlx5_flow_async_action_handle_update(struct rte_eth_dev *dev, uint32_t queue,
 901                                  const struct rte_flow_op_attr *attr,
 902                                  struct rte_flow_action_handle *handle,
 903                                  const void *update,
 904                                  void *user_data,
 905                                  struct rte_flow_error *error);
 906
 907 static int
 908 mlx5_flow_async_action_handle_destroy(struct rte_eth_dev *dev, uint32_t queue,
 909                                   const struct rte_flow_op_attr *attr,
 910                                   struct rte_flow_action_handle *handle,
 911                                   void *user_data,
 912                                   struct rte_flow_error *error);
 913
 914 static const struct rte_flow_ops mlx5_flow_ops = {
 915         .validate = mlx5_flow_validate,
 916         .create = mlx5_flow_create,
 917         .destroy = mlx5_flow_destroy,
 918         .flush = mlx5_flow_flush,
 919         .isolate = mlx5_flow_isolate,
 920         .query = mlx5_flow_query,
 921         .dev_dump = mlx5_flow_dev_dump,
 922         .get_aged_flows = mlx5_flow_get_aged_flows,
 923         .action_handle_create = mlx5_action_handle_create,
 924         .action_handle_destroy = mlx5_action_handle_destroy,
 925         .action_handle_update = mlx5_action_handle_update,
 926         .action_handle_query = mlx5_action_handle_query,
 927         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 928         .tunnel_match = mlx5_flow_tunnel_match,
 929         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 930         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 931         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 932         .flex_item_create = mlx5_flow_flex_item_create,
 933         .flex_item_release = mlx5_flow_flex_item_release,
 934         .info_get = mlx5_flow_info_get,
 935         .configure = mlx5_flow_port_configure,
 936         .pattern_template_create = mlx5_flow_pattern_template_create,
 937         .pattern_template_destroy = mlx5_flow_pattern_template_destroy,
 938         .actions_template_create = mlx5_flow_actions_template_create,
 939         .actions_template_destroy = mlx5_flow_actions_template_destroy,
 940         .template_table_create = mlx5_flow_table_create,
 941         .template_table_destroy = mlx5_flow_table_destroy,
 942         .async_create = mlx5_flow_async_flow_create,
 943         .async_destroy = mlx5_flow_async_flow_destroy,
 944         .pull = mlx5_flow_pull,
 945         .push = mlx5_flow_push,
 946         .async_action_handle_create = mlx5_flow_async_action_handle_create,
 947         .async_action_handle_update = mlx5_flow_async_action_handle_update,
 948         .async_action_handle_destroy = mlx5_flow_async_action_handle_destroy,
 949 };
 950
 951 /* Tunnel information. */
 952 struct mlx5_flow_tunnel_info {
 953         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 954         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 955 };
 956
 957 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 958         {
 959                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 960                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 961         },
 962         {
 963                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 964                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 965         },
 966         {
 967                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 968                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 969         },
 970         {
 971                 .tunnel = MLX5_FLOW_LAYER_GRE,
 972                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 973         },
 974         {
 975                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 976                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 977         },
 978         {
 979                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 980                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 981         },
 982         {
 983                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 984                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 985         },
 986         {
 987                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 988                 .ptype = RTE_PTYPE_TUNNEL_IP,
 989         },
 990         {
 991                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 992                 .ptype = RTE_PTYPE_TUNNEL_IP,
 993         },
 994         {
 995                 .tunnel = MLX5_FLOW_LAYER_GTP,
 996                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 997         },
 998 };
 999
1000
1001
1002 /**
1003  * Translate tag ID to register.
1004  *
1005  * @param[in] dev
1006  *   Pointer to the Ethernet device structure.
1007  * @param[in] feature
1008  *   The feature that request the register.
1009  * @param[in] id
1010  *   The request register ID.
1011  * @param[out] error
1012  *   Error description in case of any.
1013  *
1014  * @return
1015  *   The request register on success, a negative errno
1016  *   value otherwise and rte_errno is set.
1017  */
1018 int
1019 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
1020                      enum mlx5_feature_name feature,
1021                      uint32_t id,
1022                      struct rte_flow_error *error)
1023 {
1024         struct mlx5_priv *priv = dev->data->dev_private;
1025         struct mlx5_sh_config *config = &priv->sh->config;
1026         enum modify_reg start_reg;
1027         bool skip_mtr_reg = false;
1028
1029         switch (feature) {
1030         case MLX5_HAIRPIN_RX:
1031                 return REG_B;
1032         case MLX5_HAIRPIN_TX:
1033                 return REG_A;
1034         case MLX5_METADATA_RX:
1035                 switch (config->dv_xmeta_en) {
1036                 case MLX5_XMETA_MODE_LEGACY:
1037                         return REG_B;
1038                 case MLX5_XMETA_MODE_META16:
1039                         return REG_C_0;
1040                 case MLX5_XMETA_MODE_META32:
1041                         return REG_C_1;
1042                 }
1043                 break;
1044         case MLX5_METADATA_TX:
1045                 return REG_A;
1046         case MLX5_METADATA_FDB:
1047                 switch (config->dv_xmeta_en) {
1048                 case MLX5_XMETA_MODE_LEGACY:
1049                         return REG_NON;
1050                 case MLX5_XMETA_MODE_META16:
1051                         return REG_C_0;
1052                 case MLX5_XMETA_MODE_META32:
1053                         return REG_C_1;
1054                 }
1055                 break;
1056         case MLX5_FLOW_MARK:
1057                 switch (config->dv_xmeta_en) {
1058                 case MLX5_XMETA_MODE_LEGACY:
1059                         return REG_NON;
1060                 case MLX5_XMETA_MODE_META16:
1061                         return REG_C_1;
1062                 case MLX5_XMETA_MODE_META32:
1063                         return REG_C_0;
1064                 }
1065                 break;
1066         case MLX5_MTR_ID:
1067                 /*
1068                  * If meter color and meter id share one register, flow match
1069                  * should use the meter color register for match.
1070                  */
1071                 if (priv->mtr_reg_share)
1072                         return priv->mtr_color_reg;
1073                 else
1074                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
1075                                REG_C_3;
1076         case MLX5_MTR_COLOR:
1077         case MLX5_ASO_FLOW_HIT:
1078         case MLX5_ASO_CONNTRACK:
1079         case MLX5_SAMPLE_ID:
1080                 /* All features use the same REG_C. */
1081                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
1082                 return priv->mtr_color_reg;
1083         case MLX5_COPY_MARK:
1084                 /*
1085                  * Metadata COPY_MARK register using is in meter suffix sub
1086                  * flow while with meter. It's safe to share the same register.
1087                  */
1088                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
1089         case MLX5_APP_TAG:
1090                 /*
1091                  * If meter is enable, it will engage the register for color
1092                  * match and flow match. If meter color match is not using the
1093                  * REG_C_2, need to skip the REG_C_x be used by meter color
1094                  * match.
1095                  * If meter is disable, free to use all available registers.
1096                  */
1097                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
1098                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
1099                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
1100                 if (id > (uint32_t)(REG_C_7 - start_reg))
1101                         return rte_flow_error_set(error, EINVAL,
1102                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1103                                                   NULL, "invalid tag id");
1104                 if (priv->sh->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
1105                         return rte_flow_error_set(error, ENOTSUP,
1106                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1107                                                   NULL, "unsupported tag id");
1108                 /*
1109                  * This case means meter is using the REG_C_x great than 2.
1110                  * Take care not to conflict with meter color REG_C_x.
1111                  * If the available index REG_C_y >= REG_C_x, skip the
1112                  * color register.
1113                  */
1114                 if (skip_mtr_reg && priv->sh->flow_mreg_c
1115                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
1116                         if (id >= (uint32_t)(REG_C_7 - start_reg))
1117                                 return rte_flow_error_set(error, EINVAL,
1118                                                        RTE_FLOW_ERROR_TYPE_ITEM,
1119                                                         NULL, "invalid tag id");
1120                         if (priv->sh->flow_mreg_c
1121                             [id + 1 + start_reg - REG_C_0] != REG_NON)
1122                                 return priv->sh->flow_mreg_c
1123                                                [id + 1 + start_reg - REG_C_0];
1124                         return rte_flow_error_set(error, ENOTSUP,
1125                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1126                                                   NULL, "unsupported tag id");
1127                 }
1128                 return priv->sh->flow_mreg_c[id + start_reg - REG_C_0];
1129         }
1130         MLX5_ASSERT(false);
1131         return rte_flow_error_set(error, EINVAL,
1132                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1133                                   NULL, "invalid feature name");
1134 }
1135
1136 /**
1137  * Check extensive flow metadata register support.
1138  *
1139  * @param dev
1140  *   Pointer to rte_eth_dev structure.
1141  *
1142  * @return
1143  *   True if device supports extensive flow metadata register, otherwise false.
1144  */
1145 bool
1146 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
1147 {
1148         struct mlx5_priv *priv = dev->data->dev_private;
1149
1150         /*
1151          * Having available reg_c can be regarded inclusively as supporting
1152          * extensive flow metadata register, which could mean,
1153          * - metadata register copy action by modify header.
1154          * - 16 modify header actions is supported.
1155          * - reg_c's are preserved across different domain (FDB and NIC) on
1156          *   packet loopback by flow lookup miss.
1157          */
1158         return priv->sh->flow_mreg_c[2] != REG_NON;
1159 }
1160
1161 /**
1162  * Get the lowest priority.
1163  *
1164  * @param[in] dev
1165  *   Pointer to the Ethernet device structure.
1166  * @param[in] attributes
1167  *   Pointer to device flow rule attributes.
1168  *
1169  * @return
1170  *   The value of lowest priority of flow.
1171  */
1172 uint32_t
1173 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
1174                           const struct rte_flow_attr *attr)
1175 {
1176         struct mlx5_priv *priv = dev->data->dev_private;
1177
1178         if (!attr->group && !attr->transfer)
1179                 return priv->sh->flow_max_priority - 2;
1180         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
1181 }
1182
1183 /**
1184  * Calculate matcher priority of the flow.
1185  *
1186  * @param[in] dev
1187  *   Pointer to the Ethernet device structure.
1188  * @param[in] attr
1189  *   Pointer to device flow rule attributes.
1190  * @param[in] subpriority
1191  *   The priority based on the items.
1192  * @param[in] external
1193  *   Flow is user flow.
1194  * @return
1195  *   The matcher priority of the flow.
1196  */
1197 uint16_t
1198 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
1199                           const struct rte_flow_attr *attr,
1200                           uint32_t subpriority, bool external)
1201 {
1202         uint16_t priority = (uint16_t)attr->priority;
1203         struct mlx5_priv *priv = dev->data->dev_private;
1204
1205         if (!attr->group && !attr->transfer) {
1206                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1207                         priority = priv->sh->flow_max_priority - 1;
1208                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
1209         } else if (!external && attr->transfer && attr->group == 0 &&
1210                    attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) {
1211                 return (priv->sh->flow_max_priority - 1) * 3;
1212         }
1213         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1214                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
1215         return priority * 3 + subpriority;
1216 }
1217
1218 /**
1219  * Verify the @p item specifications (spec, last, mask) are compatible with the
1220  * NIC capabilities.
1221  *
1222  * @param[in] item
1223  *   Item specification.
1224  * @param[in] mask
1225  *   @p item->mask or flow default bit-masks.
1226  * @param[in] nic_mask
1227  *   Bit-masks covering supported fields by the NIC to compare with user mask.
1228  * @param[in] size
1229  *   Bit-masks size in bytes.
1230  * @param[in] range_accepted
1231  *   True if range of values is accepted for specific fields, false otherwise.
1232  * @param[out] error
1233  *   Pointer to error structure.
1234  *
1235  * @return
1236  *   0 on success, a negative errno value otherwise and rte_errno is set.
1237  */
1238 int
1239 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
1240                           const uint8_t *mask,
1241                           const uint8_t *nic_mask,
1242                           unsigned int size,
1243                           bool range_accepted,
1244                           struct rte_flow_error *error)
1245 {
1246         unsigned int i;
1247
1248         MLX5_ASSERT(nic_mask);
1249         for (i = 0; i < size; ++i)
1250                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1251                         return rte_flow_error_set(error, ENOTSUP,
1252                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1253                                                   item,
1254                                                   "mask enables non supported"
1255                                                   " bits");
1256         if (!item->spec && (item->mask || item->last))
1257                 return rte_flow_error_set(error, EINVAL,
1258                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1259                                           "mask/last without a spec is not"
1260                                           " supported");
1261         if (item->spec && item->last && !range_accepted) {
1262                 uint8_t spec[size];
1263                 uint8_t last[size];
1264                 unsigned int i;
1265                 int ret;
1266
1267                 for (i = 0; i < size; ++i) {
1268                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1269                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1270                 }
1271                 ret = memcmp(spec, last, size);
1272                 if (ret != 0)
1273                         return rte_flow_error_set(error, EINVAL,
1274                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1275                                                   item,
1276                                                   "range is not valid");
1277         }
1278         return 0;
1279 }
1280
1281 /**
1282  * Adjust the hash fields according to the @p flow information.
1283  *
1284  * @param[in] dev_flow.
1285  *   Pointer to the mlx5_flow.
1286  * @param[in] tunnel
1287  *   1 when the hash field is for a tunnel item.
1288  * @param[in] layer_types
1289  *   RTE_ETH_RSS_* types.
1290  * @param[in] hash_fields
1291  *   Item hash fields.
1292  *
1293  * @return
1294  *   The hash fields that should be used.
1295  */
1296 uint64_t
1297 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1298                             int tunnel __rte_unused, uint64_t layer_types,
1299                             uint64_t hash_fields)
1300 {
1301 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1302         int rss_request_inner = rss_desc->level >= 2;
1303
1304         /* Check RSS hash level for tunnel. */
1305         if (tunnel && rss_request_inner)
1306                 hash_fields |= IBV_RX_HASH_INNER;
1307         else if (tunnel || rss_request_inner)
1308                 return 0;
1309 #endif
1310         /* Check if requested layer matches RSS hash fields. */
1311         if (!(rss_desc->types & layer_types))
1312                 return 0;
1313         return hash_fields;
1314 }
1315
1316 /**
1317  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1318  * if several tunnel rules are used on this queue, the tunnel ptype will be
1319  * cleared.
1320  *
1321  * @param rxq_ctrl
1322  *   Rx queue to update.
1323  */
1324 static void
1325 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1326 {
1327         unsigned int i;
1328         uint32_t tunnel_ptype = 0;
1329
1330         /* Look up for the ptype to use. */
1331         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1332                 if (!rxq_ctrl->flow_tunnels_n[i])
1333                         continue;
1334                 if (!tunnel_ptype) {
1335                         tunnel_ptype = tunnels_info[i].ptype;
1336                 } else {
1337                         tunnel_ptype = 0;
1338                         break;
1339                 }
1340         }
1341         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1342 }
1343
1344 /**
1345  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the device
1346  * flow.
1347  *
1348  * @param[in] dev
1349  *   Pointer to the Ethernet device structure.
1350  * @param[in] dev_handle
1351  *   Pointer to device flow handle structure.
1352  */
1353 void
1354 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1355                        struct mlx5_flow_handle *dev_handle)
1356 {
1357         struct mlx5_priv *priv = dev->data->dev_private;
1358         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1359         struct mlx5_ind_table_obj *ind_tbl = NULL;
1360         unsigned int i;
1361
1362         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1363                 struct mlx5_hrxq *hrxq;
1364
1365                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1366                               dev_handle->rix_hrxq);
1367                 if (hrxq)
1368                         ind_tbl = hrxq->ind_table;
1369         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1370                 struct mlx5_shared_action_rss *shared_rss;
1371
1372                 shared_rss = mlx5_ipool_get
1373                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1374                          dev_handle->rix_srss);
1375                 if (shared_rss)
1376                         ind_tbl = shared_rss->ind_tbl;
1377         }
1378         if (!ind_tbl)
1379                 return;
1380         for (i = 0; i != ind_tbl->queues_n; ++i) {
1381                 int idx = ind_tbl->queues[i];
1382                 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx);
1383
1384                 MLX5_ASSERT(rxq_ctrl != NULL);
1385                 if (rxq_ctrl == NULL)
1386                         continue;
1387                 /*
1388                  * To support metadata register copy on Tx loopback,
1389                  * this must be always enabled (metadata may arive
1390                  * from other port - not from local flows only.
1391                  */
1392                 if (tunnel) {
1393                         unsigned int j;
1394
1395                         /* Increase the counter matching the flow. */
1396                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1397                                 if ((tunnels_info[j].tunnel &
1398                                      dev_handle->layers) ==
1399                                     tunnels_info[j].tunnel) {
1400                                         rxq_ctrl->flow_tunnels_n[j]++;
1401                                         break;
1402                                 }
1403                         }
1404                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1405                 }
1406         }
1407 }
1408
1409 static void
1410 flow_rxq_mark_flag_set(struct rte_eth_dev *dev)
1411 {
1412         struct mlx5_priv *priv = dev->data->dev_private;
1413         struct mlx5_rxq_ctrl *rxq_ctrl;
1414
1415         if (priv->mark_enabled)
1416                 return;
1417         LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
1418                 rxq_ctrl->rxq.mark = 1;
1419         }
1420         priv->mark_enabled = 1;
1421 }
1422
1423 /**
1424  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1425  *
1426  * @param[in] dev
1427  *   Pointer to the Ethernet device structure.
1428  * @param[in] flow
1429  *   Pointer to flow structure.
1430  */
1431 static void
1432 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1433 {
1434         struct mlx5_priv *priv = dev->data->dev_private;
1435         uint32_t handle_idx;
1436         struct mlx5_flow_handle *dev_handle;
1437         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
1438
1439         MLX5_ASSERT(wks);
1440         if (wks->mark)
1441                 flow_rxq_mark_flag_set(dev);
1442         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1443                        handle_idx, dev_handle, next)
1444                 flow_drv_rxq_flags_set(dev, dev_handle);
1445 }
1446
1447 /**
1448  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1449  * device flow if no other flow uses it with the same kind of request.
1450  *
1451  * @param dev
1452  *   Pointer to Ethernet device.
1453  * @param[in] dev_handle
1454  *   Pointer to the device flow handle structure.
1455  */
1456 static void
1457 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1458                         struct mlx5_flow_handle *dev_handle)
1459 {
1460         struct mlx5_priv *priv = dev->data->dev_private;
1461         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1462         struct mlx5_ind_table_obj *ind_tbl = NULL;
1463         unsigned int i;
1464
1465         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1466                 struct mlx5_hrxq *hrxq;
1467
1468                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1469                               dev_handle->rix_hrxq);
1470                 if (hrxq)
1471                         ind_tbl = hrxq->ind_table;
1472         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1473                 struct mlx5_shared_action_rss *shared_rss;
1474
1475                 shared_rss = mlx5_ipool_get
1476                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1477                          dev_handle->rix_srss);
1478                 if (shared_rss)
1479                         ind_tbl = shared_rss->ind_tbl;
1480         }
1481         if (!ind_tbl)
1482                 return;
1483         MLX5_ASSERT(dev->data->dev_started);
1484         for (i = 0; i != ind_tbl->queues_n; ++i) {
1485                 int idx = ind_tbl->queues[i];
1486                 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx);
1487
1488                 MLX5_ASSERT(rxq_ctrl != NULL);
1489                 if (rxq_ctrl == NULL)
1490                         continue;
1491                 if (tunnel) {
1492                         unsigned int j;
1493
1494                         /* Decrease the counter matching the flow. */
1495                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1496                                 if ((tunnels_info[j].tunnel &
1497                                      dev_handle->layers) ==
1498                                     tunnels_info[j].tunnel) {
1499                                         rxq_ctrl->flow_tunnels_n[j]--;
1500                                         break;
1501                                 }
1502                         }
1503                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1504                 }
1505         }
1506 }
1507
1508 /**
1509  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1510  * @p flow if no other flow uses it with the same kind of request.
1511  *
1512  * @param dev
1513  *   Pointer to Ethernet device.
1514  * @param[in] flow
1515  *   Pointer to the flow.
1516  */
1517 static void
1518 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1519 {
1520         struct mlx5_priv *priv = dev->data->dev_private;
1521         uint32_t handle_idx;
1522         struct mlx5_flow_handle *dev_handle;
1523
1524         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1525                        handle_idx, dev_handle, next)
1526                 flow_drv_rxq_flags_trim(dev, dev_handle);
1527 }
1528
1529 /**
1530  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1531  *
1532  * @param dev
1533  *   Pointer to Ethernet device.
1534  */
1535 static void
1536 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1537 {
1538         struct mlx5_priv *priv = dev->data->dev_private;
1539         unsigned int i;
1540
1541         for (i = 0; i != priv->rxqs_n; ++i) {
1542                 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
1543                 unsigned int j;
1544
1545                 if (rxq == NULL || rxq->ctrl == NULL)
1546                         continue;
1547                 rxq->ctrl->rxq.mark = 0;
1548                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1549                         rxq->ctrl->flow_tunnels_n[j] = 0;
1550                 rxq->ctrl->rxq.tunnel = 0;
1551         }
1552         priv->mark_enabled = 0;
1553 }
1554
1555 /**
1556  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1557  *
1558  * @param[in] dev
1559  *   Pointer to the Ethernet device structure.
1560  */
1561 void
1562 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1563 {
1564         struct mlx5_priv *priv = dev->data->dev_private;
1565         unsigned int i;
1566
1567         for (i = 0; i != priv->rxqs_n; ++i) {
1568                 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
1569                 struct mlx5_rxq_data *data;
1570
1571                 if (rxq == NULL || rxq->ctrl == NULL)
1572                         continue;
1573                 data = &rxq->ctrl->rxq;
1574                 if (!rte_flow_dynf_metadata_avail()) {
1575                         data->dynf_meta = 0;
1576                         data->flow_meta_mask = 0;
1577                         data->flow_meta_offset = -1;
1578                         data->flow_meta_port_mask = 0;
1579                 } else {
1580                         data->dynf_meta = 1;
1581                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1582                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1583                         data->flow_meta_port_mask = priv->sh->dv_meta_mask;
1584                 }
1585         }
1586 }
1587
1588 /*
1589  * return a pointer to the desired action in the list of actions.
1590  *
1591  * @param[in] actions
1592  *   The list of actions to search the action in.
1593  * @param[in] action
1594  *   The action to find.
1595  *
1596  * @return
1597  *   Pointer to the action in the list, if found. NULL otherwise.
1598  */
1599 const struct rte_flow_action *
1600 mlx5_flow_find_action(const struct rte_flow_action *actions,
1601                       enum rte_flow_action_type action)
1602 {
1603         if (actions == NULL)
1604                 return NULL;
1605         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1606                 if (actions->type == action)
1607                         return actions;
1608         return NULL;
1609 }
1610
1611 /*
1612  * Validate the flag action.
1613  *
1614  * @param[in] action_flags
1615  *   Bit-fields that holds the actions detected until now.
1616  * @param[in] attr
1617  *   Attributes of flow that includes this action.
1618  * @param[out] error
1619  *   Pointer to error structure.
1620  *
1621  * @return
1622  *   0 on success, a negative errno value otherwise and rte_errno is set.
1623  */
1624 int
1625 mlx5_flow_validate_action_flag(uint64_t action_flags,
1626                                const struct rte_flow_attr *attr,
1627                                struct rte_flow_error *error)
1628 {
1629         if (action_flags & MLX5_FLOW_ACTION_MARK)
1630                 return rte_flow_error_set(error, EINVAL,
1631                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1632                                           "can't mark and flag in same flow");
1633         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1634                 return rte_flow_error_set(error, EINVAL,
1635                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1636                                           "can't have 2 flag"
1637                                           " actions in same flow");
1638         if (attr->egress)
1639                 return rte_flow_error_set(error, ENOTSUP,
1640                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1641                                           "flag action not supported for "
1642                                           "egress");
1643         return 0;
1644 }
1645
1646 /*
1647  * Validate the mark action.
1648  *
1649  * @param[in] action
1650  *   Pointer to the queue action.
1651  * @param[in] action_flags
1652  *   Bit-fields that holds the actions detected until now.
1653  * @param[in] attr
1654  *   Attributes of flow that includes this action.
1655  * @param[out] error
1656  *   Pointer to error structure.
1657  *
1658  * @return
1659  *   0 on success, a negative errno value otherwise and rte_errno is set.
1660  */
1661 int
1662 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1663                                uint64_t action_flags,
1664                                const struct rte_flow_attr *attr,
1665                                struct rte_flow_error *error)
1666 {
1667         const struct rte_flow_action_mark *mark = action->conf;
1668
1669         if (!mark)
1670                 return rte_flow_error_set(error, EINVAL,
1671                                           RTE_FLOW_ERROR_TYPE_ACTION,
1672                                           action,
1673                                           "configuration cannot be null");
1674         if (mark->id >= MLX5_FLOW_MARK_MAX)
1675                 return rte_flow_error_set(error, EINVAL,
1676                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1677                                           &mark->id,
1678                                           "mark id must in 0 <= id < "
1679                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1680         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1681                 return rte_flow_error_set(error, EINVAL,
1682                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1683                                           "can't flag and mark in same flow");
1684         if (action_flags & MLX5_FLOW_ACTION_MARK)
1685                 return rte_flow_error_set(error, EINVAL,
1686                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1687                                           "can't have 2 mark actions in same"
1688                                           " flow");
1689         if (attr->egress)
1690                 return rte_flow_error_set(error, ENOTSUP,
1691                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1692                                           "mark action not supported for "
1693                                           "egress");
1694         return 0;
1695 }
1696
1697 /*
1698  * Validate the drop action.
1699  *
1700  * @param[in] action_flags
1701  *   Bit-fields that holds the actions detected until now.
1702  * @param[in] attr
1703  *   Attributes of flow that includes this action.
1704  * @param[out] error
1705  *   Pointer to error structure.
1706  *
1707  * @return
1708  *   0 on success, a negative errno value otherwise and rte_errno is set.
1709  */
1710 int
1711 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1712                                const struct rte_flow_attr *attr,
1713                                struct rte_flow_error *error)
1714 {
1715         if (attr->egress)
1716                 return rte_flow_error_set(error, ENOTSUP,
1717                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1718                                           "drop action not supported for "
1719                                           "egress");
1720         return 0;
1721 }
1722
1723 /*
1724  * Validate the queue action.
1725  *
1726  * @param[in] action
1727  *   Pointer to the queue action.
1728  * @param[in] action_flags
1729  *   Bit-fields that holds the actions detected until now.
1730  * @param[in] dev
1731  *   Pointer to the Ethernet device structure.
1732  * @param[in] attr
1733  *   Attributes of flow that includes this action.
1734  * @param[out] error
1735  *   Pointer to error structure.
1736  *
1737  * @return
1738  *   0 on success, a negative errno value otherwise and rte_errno is set.
1739  */
1740 int
1741 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1742                                 uint64_t action_flags,
1743                                 struct rte_eth_dev *dev,
1744                                 const struct rte_flow_attr *attr,
1745                                 struct rte_flow_error *error)
1746 {
1747         struct mlx5_priv *priv = dev->data->dev_private;
1748         const struct rte_flow_action_queue *queue = action->conf;
1749
1750         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1751                 return rte_flow_error_set(error, EINVAL,
1752                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1753                                           "can't have 2 fate actions in"
1754                                           " same flow");
1755         if (attr->egress)
1756                 return rte_flow_error_set(error, ENOTSUP,
1757                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1758                                           "queue action not supported for egress.");
1759         if (mlx5_is_external_rxq(dev, queue->index))
1760                 return 0;
1761         if (!priv->rxqs_n)
1762                 return rte_flow_error_set(error, EINVAL,
1763                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1764                                           NULL, "No Rx queues configured");
1765         if (queue->index >= priv->rxqs_n)
1766                 return rte_flow_error_set(error, EINVAL,
1767                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1768                                           &queue->index,
1769                                           "queue index out of range");
1770         if (mlx5_rxq_get(dev, queue->index) == NULL)
1771                 return rte_flow_error_set(error, EINVAL,
1772                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1773                                           &queue->index,
1774                                           "queue is not configured");
1775         return 0;
1776 }
1777
1778 /**
1779  * Validate queue numbers for device RSS.
1780  *
1781  * @param[in] dev
1782  *   Configured device.
1783  * @param[in] queues
1784  *   Array of queue numbers.
1785  * @param[in] queues_n
1786  *   Size of the @p queues array.
1787  * @param[out] error
1788  *   On error, filled with a textual error description.
1789  * @param[out] queue_idx
1790  *   On error, filled with an offending queue index in @p queues array.
1791  *
1792  * @return
1793  *   0 on success, a negative errno code on error.
1794  */
1795 static int
1796 mlx5_validate_rss_queues(struct rte_eth_dev *dev,
1797                          const uint16_t *queues, uint32_t queues_n,
1798                          const char **error, uint32_t *queue_idx)
1799 {
1800         const struct mlx5_priv *priv = dev->data->dev_private;
1801         bool is_hairpin = false;
1802         bool is_ext_rss = false;
1803         uint32_t i;
1804
1805         for (i = 0; i != queues_n; ++i) {
1806                 struct mlx5_rxq_ctrl *rxq_ctrl;
1807
1808                 if (mlx5_is_external_rxq(dev, queues[0])) {
1809                         is_ext_rss = true;
1810                         continue;
1811                 }
1812                 if (is_ext_rss) {
1813                         *error = "Combining external and regular RSS queues is not supported";
1814                         *queue_idx = i;
1815                         return -ENOTSUP;
1816                 }
1817                 if (queues[i] >= priv->rxqs_n) {
1818                         *error = "queue index out of range";
1819                         *queue_idx = i;
1820                         return -EINVAL;
1821                 }
1822                 rxq_ctrl = mlx5_rxq_ctrl_get(dev, queues[i]);
1823                 if (rxq_ctrl == NULL) {
1824                         *error =  "queue is not configured";
1825                         *queue_idx = i;
1826                         return -EINVAL;
1827                 }
1828                 if (i == 0 && rxq_ctrl->is_hairpin)
1829                         is_hairpin = true;
1830                 if (is_hairpin != rxq_ctrl->is_hairpin) {
1831                         *error = "combining hairpin and regular RSS queues is not supported";
1832                         *queue_idx = i;
1833                         return -ENOTSUP;
1834                 }
1835         }
1836         return 0;
1837 }
1838
1839 /*
1840  * Validate the rss action.
1841  *
1842  * @param[in] dev
1843  *   Pointer to the Ethernet device structure.
1844  * @param[in] action
1845  *   Pointer to the queue action.
1846  * @param[out] error
1847  *   Pointer to error structure.
1848  *
1849  * @return
1850  *   0 on success, a negative errno value otherwise and rte_errno is set.
1851  */
1852 int
1853 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1854                          const struct rte_flow_action *action,
1855                          struct rte_flow_error *error)
1856 {
1857         struct mlx5_priv *priv = dev->data->dev_private;
1858         const struct rte_flow_action_rss *rss = action->conf;
1859         int ret;
1860         const char *message;
1861         uint32_t queue_idx;
1862
1863         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1864             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1865                 return rte_flow_error_set(error, ENOTSUP,
1866                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1867                                           &rss->func,
1868                                           "RSS hash function not supported");
1869 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1870         if (rss->level > 2)
1871 #else
1872         if (rss->level > 1)
1873 #endif
1874                 return rte_flow_error_set(error, ENOTSUP,
1875                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1876                                           &rss->level,
1877                                           "tunnel RSS is not supported");
1878         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1879         if (rss->key_len == 0 && rss->key != NULL)
1880                 return rte_flow_error_set(error, ENOTSUP,
1881                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1882                                           &rss->key_len,
1883                                           "RSS hash key length 0");
1884         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1885                 return rte_flow_error_set(error, ENOTSUP,
1886                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1887                                           &rss->key_len,
1888                                           "RSS hash key too small");
1889         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1890                 return rte_flow_error_set(error, ENOTSUP,
1891                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1892                                           &rss->key_len,
1893                                           "RSS hash key too large");
1894         if (rss->queue_num > priv->sh->dev_cap.ind_table_max_size)
1895                 return rte_flow_error_set(error, ENOTSUP,
1896                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1897                                           &rss->queue_num,
1898                                           "number of queues too large");
1899         if (rss->types & MLX5_RSS_HF_MASK)
1900                 return rte_flow_error_set(error, ENOTSUP,
1901                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1902                                           &rss->types,
1903                                           "some RSS protocols are not"
1904                                           " supported");
1905         if ((rss->types & (RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY)) &&
1906             !(rss->types & RTE_ETH_RSS_IP))
1907                 return rte_flow_error_set(error, EINVAL,
1908                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1909                                           "L3 partial RSS requested but L3 RSS"
1910                                           " type not specified");
1911         if ((rss->types & (RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY)) &&
1912             !(rss->types & (RTE_ETH_RSS_UDP | RTE_ETH_RSS_TCP)))
1913                 return rte_flow_error_set(error, EINVAL,
1914                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1915                                           "L4 partial RSS requested but L4 RSS"
1916                                           " type not specified");
1917         if (!priv->rxqs_n && priv->ext_rxqs == NULL)
1918                 return rte_flow_error_set(error, EINVAL,
1919                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1920                                           NULL, "No Rx queues configured");
1921         if (!rss->queue_num)
1922                 return rte_flow_error_set(error, EINVAL,
1923                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1924                                           NULL, "No queues configured");
1925         ret = mlx5_validate_rss_queues(dev, rss->queue, rss->queue_num,
1926                                        &message, &queue_idx);
1927         if (ret != 0) {
1928                 return rte_flow_error_set(error, -ret,
1929                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1930                                           &rss->queue[queue_idx], message);
1931         }
1932         return 0;
1933 }
1934
1935 /*
1936  * Validate the rss action.
1937  *
1938  * @param[in] action
1939  *   Pointer to the queue action.
1940  * @param[in] action_flags
1941  *   Bit-fields that holds the actions detected until now.
1942  * @param[in] dev
1943  *   Pointer to the Ethernet device structure.
1944  * @param[in] attr
1945  *   Attributes of flow that includes this action.
1946  * @param[in] item_flags
1947  *   Items that were detected.
1948  * @param[out] error
1949  *   Pointer to error structure.
1950  *
1951  * @return
1952  *   0 on success, a negative errno value otherwise and rte_errno is set.
1953  */
1954 int
1955 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1956                               uint64_t action_flags,
1957                               struct rte_eth_dev *dev,
1958                               const struct rte_flow_attr *attr,
1959                               uint64_t item_flags,
1960                               struct rte_flow_error *error)
1961 {
1962         const struct rte_flow_action_rss *rss = action->conf;
1963         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1964         int ret;
1965
1966         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1967                 return rte_flow_error_set(error, EINVAL,
1968                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1969                                           "can't have 2 fate actions"
1970                                           " in same flow");
1971         ret = mlx5_validate_action_rss(dev, action, error);
1972         if (ret)
1973                 return ret;
1974         if (attr->egress)
1975                 return rte_flow_error_set(error, ENOTSUP,
1976                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1977                                           "rss action not supported for "
1978                                           "egress");
1979         if (rss->level > 1 && !tunnel)
1980                 return rte_flow_error_set(error, EINVAL,
1981                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1982                                           "inner RSS is not supported for "
1983                                           "non-tunnel flows");
1984         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1985             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1986                 return rte_flow_error_set(error, EINVAL,
1987                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1988                                           "RSS on eCPRI is not supported now");
1989         }
1990         if ((item_flags & MLX5_FLOW_LAYER_MPLS) &&
1991             !(item_flags &
1992               (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) &&
1993             rss->level > 1)
1994                 return rte_flow_error_set(error, EINVAL,
1995                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1996                                           "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern");
1997         return 0;
1998 }
1999
2000 /*
2001  * Validate the default miss action.
2002  *
2003  * @param[in] action_flags
2004  *   Bit-fields that holds the actions detected until now.
2005  * @param[out] error
2006  *   Pointer to error structure.
2007  *
2008  * @return
2009  *   0 on success, a negative errno value otherwise and rte_errno is set.
2010  */
2011 int
2012 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
2013                                 const struct rte_flow_attr *attr,
2014                                 struct rte_flow_error *error)
2015 {
2016         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
2017                 return rte_flow_error_set(error, EINVAL,
2018                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2019                                           "can't have 2 fate actions in"
2020                                           " same flow");
2021         if (attr->egress)
2022                 return rte_flow_error_set(error, ENOTSUP,
2023                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
2024                                           "default miss action not supported "
2025                                           "for egress");
2026         if (attr->group)
2027                 return rte_flow_error_set(error, ENOTSUP,
2028                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
2029                                           "only group 0 is supported");
2030         if (attr->transfer)
2031                 return rte_flow_error_set(error, ENOTSUP,
2032                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
2033                                           NULL, "transfer is not supported");
2034         return 0;
2035 }
2036
2037 /*
2038  * Validate the count action.
2039  *
2040  * @param[in] dev
2041  *   Pointer to the Ethernet device structure.
2042  * @param[in] attr
2043  *   Attributes of flow that includes this action.
2044  * @param[out] error
2045  *   Pointer to error structure.
2046  *
2047  * @return
2048  *   0 on success, a negative errno value otherwise and rte_errno is set.
2049  */
2050 int
2051 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
2052                                 const struct rte_flow_attr *attr,
2053                                 struct rte_flow_error *error)
2054 {
2055         if (attr->egress)
2056                 return rte_flow_error_set(error, ENOTSUP,
2057                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
2058                                           "count action not supported for "
2059                                           "egress");
2060         return 0;
2061 }
2062
2063 /*
2064  * Validate the ASO CT action.
2065  *
2066  * @param[in] dev
2067  *   Pointer to the Ethernet device structure.
2068  * @param[in] conntrack
2069  *   Pointer to the CT action profile.
2070  * @param[out] error
2071  *   Pointer to error structure.
2072  *
2073  * @return
2074  *   0 on success, a negative errno value otherwise and rte_errno is set.
2075  */
2076 int
2077 mlx5_validate_action_ct(struct rte_eth_dev *dev,
2078                         const struct rte_flow_action_conntrack *conntrack,
2079                         struct rte_flow_error *error)
2080 {
2081         RTE_SET_USED(dev);
2082
2083         if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT)
2084                 return rte_flow_error_set(error, EINVAL,
2085                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2086                                           "Invalid CT state");
2087         if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST)
2088                 return rte_flow_error_set(error, EINVAL,
2089                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2090                                           "Invalid last TCP packet flag");
2091         return 0;
2092 }
2093
2094 /**
2095  * Verify the @p attributes will be correctly understood by the NIC and store
2096  * them in the @p flow if everything is correct.
2097  *
2098  * @param[in] dev
2099  *   Pointer to the Ethernet device structure.
2100  * @param[in] attributes
2101  *   Pointer to flow attributes
2102  * @param[out] error
2103  *   Pointer to error structure.
2104  *
2105  * @return
2106  *   0 on success, a negative errno value otherwise and rte_errno is set.
2107  */
2108 int
2109 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
2110                               const struct rte_flow_attr *attributes,
2111                               struct rte_flow_error *error)
2112 {
2113         struct mlx5_priv *priv = dev->data->dev_private;
2114         uint32_t priority_max = priv->sh->flow_max_priority - 1;
2115
2116         if (attributes->group)
2117                 return rte_flow_error_set(error, ENOTSUP,
2118                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
2119                                           NULL, "groups is not supported");
2120         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
2121             attributes->priority >= priority_max)
2122                 return rte_flow_error_set(error, ENOTSUP,
2123                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
2124                                           NULL, "priority out of range");
2125         if (attributes->egress)
2126                 return rte_flow_error_set(error, ENOTSUP,
2127                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
2128                                           "egress is not supported");
2129         if (attributes->transfer && !priv->sh->config.dv_esw_en)
2130                 return rte_flow_error_set(error, ENOTSUP,
2131                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
2132                                           NULL, "transfer is not supported");
2133         if (!attributes->ingress)
2134                 return rte_flow_error_set(error, EINVAL,
2135                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2136                                           NULL,
2137                                           "ingress attribute is mandatory");
2138         return 0;
2139 }
2140
2141 /**
2142  * Validate ICMP6 item.
2143  *
2144  * @param[in] item
2145  *   Item specification.
2146  * @param[in] item_flags
2147  *   Bit-fields that holds the items detected until now.
2148  * @param[in] ext_vlan_sup
2149  *   Whether extended VLAN features are supported or not.
2150  * @param[out] error
2151  *   Pointer to error structure.
2152  *
2153  * @return
2154  *   0 on success, a negative errno value otherwise and rte_errno is set.
2155  */
2156 int
2157 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
2158                                uint64_t item_flags,
2159                                uint8_t target_protocol,
2160                                struct rte_flow_error *error)
2161 {
2162         const struct rte_flow_item_icmp6 *mask = item->mask;
2163         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2164         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
2165                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
2166         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2167                                       MLX5_FLOW_LAYER_OUTER_L4;
2168         int ret;
2169
2170         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
2171                 return rte_flow_error_set(error, EINVAL,
2172                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2173                                           "protocol filtering not compatible"
2174                                           " with ICMP6 layer");
2175         if (!(item_flags & l3m))
2176                 return rte_flow_error_set(error, EINVAL,
2177                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2178                                           "IPv6 is mandatory to filter on"
2179                                           " ICMP6");
2180         if (item_flags & l4m)
2181                 return rte_flow_error_set(error, EINVAL,
2182                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2183                                           "multiple L4 layers not supported");
2184         if (!mask)
2185                 mask = &rte_flow_item_icmp6_mask;
2186         ret = mlx5_flow_item_acceptable
2187                 (item, (const uint8_t *)mask,
2188                  (const uint8_t *)&rte_flow_item_icmp6_mask,
2189                  sizeof(struct rte_flow_item_icmp6),
2190                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2191         if (ret < 0)
2192                 return ret;
2193         return 0;
2194 }
2195
2196 /**
2197  * Validate ICMP item.
2198  *
2199  * @param[in] item
2200  *   Item specification.
2201  * @param[in] item_flags
2202  *   Bit-fields that holds the items detected until now.
2203  * @param[out] error
2204  *   Pointer to error structure.
2205  *
2206  * @return
2207  *   0 on success, a negative errno value otherwise and rte_errno is set.
2208  */
2209 int
2210 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
2211                              uint64_t item_flags,
2212                              uint8_t target_protocol,
2213                              struct rte_flow_error *error)
2214 {
2215         const struct rte_flow_item_icmp *mask = item->mask;
2216         const struct rte_flow_item_icmp nic_mask = {
2217                 .hdr.icmp_type = 0xff,
2218                 .hdr.icmp_code = 0xff,
2219                 .hdr.icmp_ident = RTE_BE16(0xffff),
2220                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
2221         };
2222         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2223         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
2224                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2225         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2226                                       MLX5_FLOW_LAYER_OUTER_L4;
2227         int ret;
2228
2229         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
2230                 return rte_flow_error_set(error, EINVAL,
2231                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2232                                           "protocol filtering not compatible"
2233                                           " with ICMP layer");
2234         if (!(item_flags & l3m))
2235                 return rte_flow_error_set(error, EINVAL,
2236                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2237                                           "IPv4 is mandatory to filter"
2238                                           " on ICMP");
2239         if (item_flags & l4m)
2240                 return rte_flow_error_set(error, EINVAL,
2241                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2242                                           "multiple L4 layers not supported");
2243         if (!mask)
2244                 mask = &nic_mask;
2245         ret = mlx5_flow_item_acceptable
2246                 (item, (const uint8_t *)mask,
2247                  (const uint8_t *)&nic_mask,
2248                  sizeof(struct rte_flow_item_icmp),
2249                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2250         if (ret < 0)
2251                 return ret;
2252         return 0;
2253 }
2254
2255 /**
2256  * Validate Ethernet item.
2257  *
2258  * @param[in] item
2259  *   Item specification.
2260  * @param[in] item_flags
2261  *   Bit-fields that holds the items detected until now.
2262  * @param[out] error
2263  *   Pointer to error structure.
2264  *
2265  * @return
2266  *   0 on success, a negative errno value otherwise and rte_errno is set.
2267  */
2268 int
2269 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
2270                             uint64_t item_flags, bool ext_vlan_sup,
2271                             struct rte_flow_error *error)
2272 {
2273         const struct rte_flow_item_eth *mask = item->mask;
2274         const struct rte_flow_item_eth nic_mask = {
2275                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2276                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2277                 .type = RTE_BE16(0xffff),
2278                 .has_vlan = ext_vlan_sup ? 1 : 0,
2279         };
2280         int ret;
2281         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2282         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
2283                                        MLX5_FLOW_LAYER_OUTER_L2;
2284
2285         if (item_flags & ethm)
2286                 return rte_flow_error_set(error, ENOTSUP,
2287                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2288                                           "multiple L2 layers not supported");
2289         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
2290             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
2291                 return rte_flow_error_set(error, EINVAL,
2292                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2293                                           "L2 layer should not follow "
2294                                           "L3 layers");
2295         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
2296             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
2297                 return rte_flow_error_set(error, EINVAL,
2298                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2299                                           "L2 layer should not follow VLAN");
2300         if (item_flags & MLX5_FLOW_LAYER_GTP)
2301                 return rte_flow_error_set(error, EINVAL,
2302                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2303                                           "L2 layer should not follow GTP");
2304         if (!mask)
2305                 mask = &rte_flow_item_eth_mask;
2306         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2307                                         (const uint8_t *)&nic_mask,
2308                                         sizeof(struct rte_flow_item_eth),
2309                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2310         return ret;
2311 }
2312
2313 /**
2314  * Validate VLAN item.
2315  *
2316  * @param[in] item
2317  *   Item specification.
2318  * @param[in] item_flags
2319  *   Bit-fields that holds the items detected until now.
2320  * @param[in] dev
2321  *   Ethernet device flow is being created on.
2322  * @param[out] error
2323  *   Pointer to error structure.
2324  *
2325  * @return
2326  *   0 on success, a negative errno value otherwise and rte_errno is set.
2327  */
2328 int
2329 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
2330                              uint64_t item_flags,
2331                              struct rte_eth_dev *dev,
2332                              struct rte_flow_error *error)
2333 {
2334         const struct rte_flow_item_vlan *spec = item->spec;
2335         const struct rte_flow_item_vlan *mask = item->mask;
2336         const struct rte_flow_item_vlan nic_mask = {
2337                 .tci = RTE_BE16(UINT16_MAX),
2338                 .inner_type = RTE_BE16(UINT16_MAX),
2339         };
2340         uint16_t vlan_tag = 0;
2341         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2342         int ret;
2343         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2344                                         MLX5_FLOW_LAYER_INNER_L4) :
2345                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2346                                         MLX5_FLOW_LAYER_OUTER_L4);
2347         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2348                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2349
2350         if (item_flags & vlanm)
2351                 return rte_flow_error_set(error, EINVAL,
2352                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2353                                           "multiple VLAN layers not supported");
2354         else if ((item_flags & l34m) != 0)
2355                 return rte_flow_error_set(error, EINVAL,
2356                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2357                                           "VLAN cannot follow L3/L4 layer");
2358         if (!mask)
2359                 mask = &rte_flow_item_vlan_mask;
2360         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2361                                         (const uint8_t *)&nic_mask,
2362                                         sizeof(struct rte_flow_item_vlan),
2363                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2364         if (ret)
2365                 return ret;
2366         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2367                 struct mlx5_priv *priv = dev->data->dev_private;
2368
2369                 if (priv->vmwa_context) {
2370                         /*
2371                          * Non-NULL context means we have a virtual machine
2372                          * and SR-IOV enabled, we have to create VLAN interface
2373                          * to make hypervisor to setup E-Switch vport
2374                          * context correctly. We avoid creating the multiple
2375                          * VLAN interfaces, so we cannot support VLAN tag mask.
2376                          */
2377                         return rte_flow_error_set(error, EINVAL,
2378                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2379                                                   item,
2380                                                   "VLAN tag mask is not"
2381                                                   " supported in virtual"
2382                                                   " environment");
2383                 }
2384         }
2385         if (spec) {
2386                 vlan_tag = spec->tci;
2387                 vlan_tag &= mask->tci;
2388         }
2389         /*
2390          * From verbs perspective an empty VLAN is equivalent
2391          * to a packet without VLAN layer.
2392          */
2393         if (!vlan_tag)
2394                 return rte_flow_error_set(error, EINVAL,
2395                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2396                                           item->spec,
2397                                           "VLAN cannot be empty");
2398         return 0;
2399 }
2400
2401 /**
2402  * Validate IPV4 item.
2403  *
2404  * @param[in] item
2405  *   Item specification.
2406  * @param[in] item_flags
2407  *   Bit-fields that holds the items detected until now.
2408  * @param[in] last_item
2409  *   Previous validated item in the pattern items.
2410  * @param[in] ether_type
2411  *   Type in the ethernet layer header (including dot1q).
2412  * @param[in] acc_mask
2413  *   Acceptable mask, if NULL default internal default mask
2414  *   will be used to check whether item fields are supported.
2415  * @param[in] range_accepted
2416  *   True if range of values is accepted for specific fields, false otherwise.
2417  * @param[out] error
2418  *   Pointer to error structure.
2419  *
2420  * @return
2421  *   0 on success, a negative errno value otherwise and rte_errno is set.
2422  */
2423 int
2424 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2425                              uint64_t item_flags,
2426                              uint64_t last_item,
2427                              uint16_t ether_type,
2428                              const struct rte_flow_item_ipv4 *acc_mask,
2429                              bool range_accepted,
2430                              struct rte_flow_error *error)
2431 {
2432         const struct rte_flow_item_ipv4 *mask = item->mask;
2433         const struct rte_flow_item_ipv4 *spec = item->spec;
2434         const struct rte_flow_item_ipv4 nic_mask = {
2435                 .hdr = {
2436                         .src_addr = RTE_BE32(0xffffffff),
2437                         .dst_addr = RTE_BE32(0xffffffff),
2438                         .type_of_service = 0xff,
2439                         .next_proto_id = 0xff,
2440                 },
2441         };
2442         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2443         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2444                                       MLX5_FLOW_LAYER_OUTER_L3;
2445         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2446                                       MLX5_FLOW_LAYER_OUTER_L4;
2447         int ret;
2448         uint8_t next_proto = 0xFF;
2449         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2450                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2451                                   MLX5_FLOW_LAYER_INNER_VLAN);
2452
2453         if ((last_item & l2_vlan) && ether_type &&
2454             ether_type != RTE_ETHER_TYPE_IPV4)
2455                 return rte_flow_error_set(error, EINVAL,
2456                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2457                                           "IPv4 cannot follow L2/VLAN layer "
2458                                           "which ether type is not IPv4");
2459         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2460                 if (mask && spec)
2461                         next_proto = mask->hdr.next_proto_id &
2462                                      spec->hdr.next_proto_id;
2463                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2464                         return rte_flow_error_set(error, EINVAL,
2465                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2466                                                   item,
2467                                                   "multiple tunnel "
2468                                                   "not supported");
2469         }
2470         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2471                 return rte_flow_error_set(error, EINVAL,
2472                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2473                                           "wrong tunnel type - IPv6 specified "
2474                                           "but IPv4 item provided");
2475         if (item_flags & l3m)
2476                 return rte_flow_error_set(error, ENOTSUP,
2477                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2478                                           "multiple L3 layers not supported");
2479         else if (item_flags & l4m)
2480                 return rte_flow_error_set(error, EINVAL,
2481                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2482                                           "L3 cannot follow an L4 layer.");
2483         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2484                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2485                 return rte_flow_error_set(error, EINVAL,
2486                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2487                                           "L3 cannot follow an NVGRE layer.");
2488         if (!mask)
2489                 mask = &rte_flow_item_ipv4_mask;
2490         else if (mask->hdr.next_proto_id != 0 &&
2491                  mask->hdr.next_proto_id != 0xff)
2492                 return rte_flow_error_set(error, EINVAL,
2493                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2494                                           "partial mask is not supported"
2495                                           " for protocol");
2496         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2497                                         acc_mask ? (const uint8_t *)acc_mask
2498                                                  : (const uint8_t *)&nic_mask,
2499                                         sizeof(struct rte_flow_item_ipv4),
2500                                         range_accepted, error);
2501         if (ret < 0)
2502                 return ret;
2503         return 0;
2504 }
2505
2506 /**
2507  * Validate IPV6 item.
2508  *
2509  * @param[in] item
2510  *   Item specification.
2511  * @param[in] item_flags
2512  *   Bit-fields that holds the items detected until now.
2513  * @param[in] last_item
2514  *   Previous validated item in the pattern items.
2515  * @param[in] ether_type
2516  *   Type in the ethernet layer header (including dot1q).
2517  * @param[in] acc_mask
2518  *   Acceptable mask, if NULL default internal default mask
2519  *   will be used to check whether item fields are supported.
2520  * @param[out] error
2521  *   Pointer to error structure.
2522  *
2523  * @return
2524  *   0 on success, a negative errno value otherwise and rte_errno is set.
2525  */
2526 int
2527 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2528                              uint64_t item_flags,
2529                              uint64_t last_item,
2530                              uint16_t ether_type,
2531                              const struct rte_flow_item_ipv6 *acc_mask,
2532                              struct rte_flow_error *error)
2533 {
2534         const struct rte_flow_item_ipv6 *mask = item->mask;
2535         const struct rte_flow_item_ipv6 *spec = item->spec;
2536         const struct rte_flow_item_ipv6 nic_mask = {
2537                 .hdr = {
2538                         .src_addr =
2539                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2540                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2541                         .dst_addr =
2542                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2543                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2544                         .vtc_flow = RTE_BE32(0xffffffff),
2545                         .proto = 0xff,
2546                 },
2547         };
2548         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2549         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2550                                       MLX5_FLOW_LAYER_OUTER_L3;
2551         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2552                                       MLX5_FLOW_LAYER_OUTER_L4;
2553         int ret;
2554         uint8_t next_proto = 0xFF;
2555         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2556                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2557                                   MLX5_FLOW_LAYER_INNER_VLAN);
2558
2559         if ((last_item & l2_vlan) && ether_type &&
2560             ether_type != RTE_ETHER_TYPE_IPV6)
2561                 return rte_flow_error_set(error, EINVAL,
2562                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2563                                           "IPv6 cannot follow L2/VLAN layer "
2564                                           "which ether type is not IPv6");
2565         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2566                 next_proto = spec->hdr.proto;
2567         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2568                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2569                         return rte_flow_error_set(error, EINVAL,
2570                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2571                                                   item,
2572                                                   "multiple tunnel "
2573                                                   "not supported");
2574         }
2575         if (next_proto == IPPROTO_HOPOPTS  ||
2576             next_proto == IPPROTO_ROUTING  ||
2577             next_proto == IPPROTO_FRAGMENT ||
2578             next_proto == IPPROTO_ESP      ||
2579             next_proto == IPPROTO_AH       ||
2580             next_proto == IPPROTO_DSTOPTS)
2581                 return rte_flow_error_set(error, EINVAL,
2582                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2583                                           "IPv6 proto (next header) should "
2584                                           "not be set as extension header");
2585         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2586                 return rte_flow_error_set(error, EINVAL,
2587                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2588                                           "wrong tunnel type - IPv4 specified "
2589                                           "but IPv6 item provided");
2590         if (item_flags & l3m)
2591                 return rte_flow_error_set(error, ENOTSUP,
2592                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2593                                           "multiple L3 layers not supported");
2594         else if (item_flags & l4m)
2595                 return rte_flow_error_set(error, EINVAL,
2596                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2597                                           "L3 cannot follow an L4 layer.");
2598         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2599                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2600                 return rte_flow_error_set(error, EINVAL,
2601                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2602                                           "L3 cannot follow an NVGRE layer.");
2603         if (!mask)
2604                 mask = &rte_flow_item_ipv6_mask;
2605         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2606                                         acc_mask ? (const uint8_t *)acc_mask
2607                                                  : (const uint8_t *)&nic_mask,
2608                                         sizeof(struct rte_flow_item_ipv6),
2609                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2610         if (ret < 0)
2611                 return ret;
2612         return 0;
2613 }
2614
2615 /**
2616  * Validate UDP item.
2617  *
2618  * @param[in] item
2619  *   Item specification.
2620  * @param[in] item_flags
2621  *   Bit-fields that holds the items detected until now.
2622  * @param[in] target_protocol
2623  *   The next protocol in the previous item.
2624  * @param[in] flow_mask
2625  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2626  * @param[out] error
2627  *   Pointer to error structure.
2628  *
2629  * @return
2630  *   0 on success, a negative errno value otherwise and rte_errno is set.
2631  */
2632 int
2633 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2634                             uint64_t item_flags,
2635                             uint8_t target_protocol,
2636                             struct rte_flow_error *error)
2637 {
2638         const struct rte_flow_item_udp *mask = item->mask;
2639         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2640         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2641                                       MLX5_FLOW_LAYER_OUTER_L3;
2642         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2643                                       MLX5_FLOW_LAYER_OUTER_L4;
2644         int ret;
2645
2646         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2647                 return rte_flow_error_set(error, EINVAL,
2648                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2649                                           "protocol filtering not compatible"
2650                                           " with UDP layer");
2651         if (!(item_flags & l3m))
2652                 return rte_flow_error_set(error, EINVAL,
2653                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2654                                           "L3 is mandatory to filter on L4");
2655         if (item_flags & l4m)
2656                 return rte_flow_error_set(error, EINVAL,
2657                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2658                                           "multiple L4 layers not supported");
2659         if (!mask)
2660                 mask = &rte_flow_item_udp_mask;
2661         ret = mlx5_flow_item_acceptable
2662                 (item, (const uint8_t *)mask,
2663                  (const uint8_t *)&rte_flow_item_udp_mask,
2664                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2665                  error);
2666         if (ret < 0)
2667                 return ret;
2668         return 0;
2669 }
2670
2671 /**
2672  * Validate TCP item.
2673  *
2674  * @param[in] item
2675  *   Item specification.
2676  * @param[in] item_flags
2677  *   Bit-fields that holds the items detected until now.
2678  * @param[in] target_protocol
2679  *   The next protocol in the previous item.
2680  * @param[out] error
2681  *   Pointer to error structure.
2682  *
2683  * @return
2684  *   0 on success, a negative errno value otherwise and rte_errno is set.
2685  */
2686 int
2687 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2688                             uint64_t item_flags,
2689                             uint8_t target_protocol,
2690                             const struct rte_flow_item_tcp *flow_mask,
2691                             struct rte_flow_error *error)
2692 {
2693         const struct rte_flow_item_tcp *mask = item->mask;
2694         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2695         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2696                                       MLX5_FLOW_LAYER_OUTER_L3;
2697         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2698                                       MLX5_FLOW_LAYER_OUTER_L4;
2699         int ret;
2700
2701         MLX5_ASSERT(flow_mask);
2702         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2703                 return rte_flow_error_set(error, EINVAL,
2704                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2705                                           "protocol filtering not compatible"
2706                                           " with TCP layer");
2707         if (!(item_flags & l3m))
2708                 return rte_flow_error_set(error, EINVAL,
2709                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2710                                           "L3 is mandatory to filter on L4");
2711         if (item_flags & l4m)
2712                 return rte_flow_error_set(error, EINVAL,
2713                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2714                                           "multiple L4 layers not supported");
2715         if (!mask)
2716                 mask = &rte_flow_item_tcp_mask;
2717         ret = mlx5_flow_item_acceptable
2718                 (item, (const uint8_t *)mask,
2719                  (const uint8_t *)flow_mask,
2720                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2721                  error);
2722         if (ret < 0)
2723                 return ret;
2724         return 0;
2725 }
2726
2727 /**
2728  * Validate VXLAN item.
2729  *
2730  * @param[in] dev
2731  *   Pointer to the Ethernet device structure.
2732  * @param[in] udp_dport
2733  *   UDP destination port
2734  * @param[in] item
2735  *   Item specification.
2736  * @param[in] item_flags
2737  *   Bit-fields that holds the items detected until now.
2738  * @param[in] attr
2739  *   Flow rule attributes.
2740  * @param[out] error
2741  *   Pointer to error structure.
2742  *
2743  * @return
2744  *   0 on success, a negative errno value otherwise and rte_errno is set.
2745  */
2746 int
2747 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev,
2748                               uint16_t udp_dport,
2749                               const struct rte_flow_item *item,
2750                               uint64_t item_flags,
2751                               const struct rte_flow_attr *attr,
2752                               struct rte_flow_error *error)
2753 {
2754         const struct rte_flow_item_vxlan *spec = item->spec;
2755         const struct rte_flow_item_vxlan *mask = item->mask;
2756         int ret;
2757         struct mlx5_priv *priv = dev->data->dev_private;
2758         union vni {
2759                 uint32_t vlan_id;
2760                 uint8_t vni[4];
2761         } id = { .vlan_id = 0, };
2762         const struct rte_flow_item_vxlan nic_mask = {
2763                 .vni = "\xff\xff\xff",
2764                 .rsvd1 = 0xff,
2765         };
2766         const struct rte_flow_item_vxlan *valid_mask;
2767
2768         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2769                 return rte_flow_error_set(error, ENOTSUP,
2770                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2771                                           "multiple tunnel layers not"
2772                                           " supported");
2773         valid_mask = &rte_flow_item_vxlan_mask;
2774         /*
2775          * Verify only UDPv4 is present as defined in
2776          * https://tools.ietf.org/html/rfc7348
2777          */
2778         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2779                 return rte_flow_error_set(error, EINVAL,
2780                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2781                                           "no outer UDP layer found");
2782         if (!mask)
2783                 mask = &rte_flow_item_vxlan_mask;
2784
2785         if (priv->sh->steering_format_version !=
2786             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 ||
2787             !udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN) {
2788                 /* FDB domain & NIC domain non-zero group */
2789                 if ((attr->transfer || attr->group) && priv->sh->misc5_cap)
2790                         valid_mask = &nic_mask;
2791                 /* Group zero in NIC domain */
2792                 if (!attr->group && !attr->transfer &&
2793                     priv->sh->tunnel_header_0_1)
2794                         valid_mask = &nic_mask;
2795         }
2796         ret = mlx5_flow_item_acceptable
2797                 (item, (const uint8_t *)mask,
2798                  (const uint8_t *)valid_mask,
2799                  sizeof(struct rte_flow_item_vxlan),
2800                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2801         if (ret < 0)
2802                 return ret;
2803         if (spec) {
2804                 memcpy(&id.vni[1], spec->vni, 3);
2805                 memcpy(&id.vni[1], mask->vni, 3);
2806         }
2807         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2808                 return rte_flow_error_set(error, ENOTSUP,
2809                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2810                                           "VXLAN tunnel must be fully defined");
2811         return 0;
2812 }
2813
2814 /**
2815  * Validate VXLAN_GPE item.
2816  *
2817  * @param[in] item
2818  *   Item specification.
2819  * @param[in] item_flags
2820  *   Bit-fields that holds the items detected until now.
2821  * @param[in] priv
2822  *   Pointer to the private data structure.
2823  * @param[in] target_protocol
2824  *   The next protocol in the previous item.
2825  * @param[out] error
2826  *   Pointer to error structure.
2827  *
2828  * @return
2829  *   0 on success, a negative errno value otherwise and rte_errno is set.
2830  */
2831 int
2832 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2833                                   uint64_t item_flags,
2834                                   struct rte_eth_dev *dev,
2835                                   struct rte_flow_error *error)
2836 {
2837         struct mlx5_priv *priv = dev->data->dev_private;
2838         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2839         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2840         int ret;
2841         union vni {
2842                 uint32_t vlan_id;
2843                 uint8_t vni[4];
2844         } id = { .vlan_id = 0, };
2845
2846         if (!priv->sh->config.l3_vxlan_en)
2847                 return rte_flow_error_set(error, ENOTSUP,
2848                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2849                                           "L3 VXLAN is not enabled by device"
2850                                           " parameter and/or not configured in"
2851                                           " firmware");
2852         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2853                 return rte_flow_error_set(error, ENOTSUP,
2854                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2855                                           "multiple tunnel layers not"
2856                                           " supported");
2857         /*
2858          * Verify only UDPv4 is present as defined in
2859          * https://tools.ietf.org/html/rfc7348
2860          */
2861         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2862                 return rte_flow_error_set(error, EINVAL,
2863                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2864                                           "no outer UDP layer found");
2865         if (!mask)
2866                 mask = &rte_flow_item_vxlan_gpe_mask;
2867         ret = mlx5_flow_item_acceptable
2868                 (item, (const uint8_t *)mask,
2869                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2870                  sizeof(struct rte_flow_item_vxlan_gpe),
2871                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2872         if (ret < 0)
2873                 return ret;
2874         if (spec) {
2875                 if (spec->protocol)
2876                         return rte_flow_error_set(error, ENOTSUP,
2877                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2878                                                   item,
2879                                                   "VxLAN-GPE protocol"
2880                                                   " not supported");
2881                 memcpy(&id.vni[1], spec->vni, 3);
2882                 memcpy(&id.vni[1], mask->vni, 3);
2883         }
2884         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2885                 return rte_flow_error_set(error, ENOTSUP,
2886                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2887                                           "VXLAN-GPE tunnel must be fully"
2888                                           " defined");
2889         return 0;
2890 }
2891 /**
2892  * Validate GRE Key item.
2893  *
2894  * @param[in] item
2895  *   Item specification.
2896  * @param[in] item_flags
2897  *   Bit flags to mark detected items.
2898  * @param[in] gre_item
2899  *   Pointer to gre_item
2900  * @param[out] error
2901  *   Pointer to error structure.
2902  *
2903  * @return
2904  *   0 on success, a negative errno value otherwise and rte_errno is set.
2905  */
2906 int
2907 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2908                                 uint64_t item_flags,
2909                                 const struct rte_flow_item *gre_item,
2910                                 struct rte_flow_error *error)
2911 {
2912         const rte_be32_t *mask = item->mask;
2913         int ret = 0;
2914         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2915         const struct rte_flow_item_gre *gre_spec;
2916         const struct rte_flow_item_gre *gre_mask;
2917
2918         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2919                 return rte_flow_error_set(error, ENOTSUP,
2920                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2921                                           "Multiple GRE key not support");
2922         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2923                 return rte_flow_error_set(error, ENOTSUP,
2924                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2925                                           "No preceding GRE header");
2926         if (item_flags & MLX5_FLOW_LAYER_INNER)
2927                 return rte_flow_error_set(error, ENOTSUP,
2928                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2929                                           "GRE key following a wrong item");
2930         gre_mask = gre_item->mask;
2931         if (!gre_mask)
2932                 gre_mask = &rte_flow_item_gre_mask;
2933         gre_spec = gre_item->spec;
2934         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2935                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2936                 return rte_flow_error_set(error, EINVAL,
2937                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2938                                           "Key bit must be on");
2939
2940         if (!mask)
2941                 mask = &gre_key_default_mask;
2942         ret = mlx5_flow_item_acceptable
2943                 (item, (const uint8_t *)mask,
2944                  (const uint8_t *)&gre_key_default_mask,
2945                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2946         return ret;
2947 }
2948
2949 /**
2950  * Validate GRE optional item.
2951  *
2952  * @param[in] dev
2953  *   Pointer to the Ethernet device structure.
2954  * @param[in] item
2955  *   Item specification.
2956  * @param[in] item_flags
2957  *   Bit flags to mark detected items.
2958  * @param[in] attr
2959  *   Flow rule attributes.
2960  * @param[in] gre_item
2961  *   Pointer to gre_item
2962  * @param[out] error
2963  *   Pointer to error structure.
2964  *
2965  * @return
2966  *   0 on success, a negative errno value otherwise and rte_errno is set.
2967  */
2968 int
2969 mlx5_flow_validate_item_gre_option(struct rte_eth_dev *dev,
2970                                    const struct rte_flow_item *item,
2971                                    uint64_t item_flags,
2972                                    const struct rte_flow_attr *attr,
2973                                    const struct rte_flow_item *gre_item,
2974                                    struct rte_flow_error *error)
2975 {
2976         const struct rte_flow_item_gre *gre_spec = gre_item->spec;
2977         const struct rte_flow_item_gre *gre_mask = gre_item->mask;
2978         const struct rte_flow_item_gre_opt *spec = item->spec;
2979         const struct rte_flow_item_gre_opt *mask = item->mask;
2980         struct mlx5_priv *priv = dev->data->dev_private;
2981         int ret = 0;
2982         struct rte_flow_item_gre_opt nic_mask = {
2983                 .checksum_rsvd = {
2984                         .checksum = RTE_BE16(UINT16_MAX),
2985                         .reserved1 = 0x0,
2986                 },
2987                 .key = {
2988                         .key = RTE_BE32(UINT32_MAX),
2989                 },
2990                 .sequence = {
2991                         .sequence = RTE_BE32(UINT32_MAX),
2992                 },
2993         };
2994
2995         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2996                 return rte_flow_error_set(error, ENOTSUP,
2997                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2998                                           "No preceding GRE header");
2999         if (item_flags & MLX5_FLOW_LAYER_INNER)
3000                 return rte_flow_error_set(error, ENOTSUP,
3001                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3002                                           "GRE option following a wrong item");
3003         if (!spec || !mask)
3004                 return rte_flow_error_set(error, EINVAL,
3005                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3006                                           "At least one field gre_option(checksum/key/sequence) must be specified");
3007         if (!gre_mask)
3008                 gre_mask = &rte_flow_item_gre_mask;
3009         if (mask->checksum_rsvd.checksum)
3010                 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x8000)) &&
3011                                  !(gre_spec->c_rsvd0_ver & RTE_BE16(0x8000)))
3012                         return rte_flow_error_set(error, EINVAL,
3013                                                   RTE_FLOW_ERROR_TYPE_ITEM,
3014                                                   item,
3015                                                   "Checksum bit must be on");
3016         if (mask->key.key)
3017                 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
3018                                  !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
3019                         return rte_flow_error_set(error, EINVAL,
3020                                                   RTE_FLOW_ERROR_TYPE_ITEM,
3021                                                   item, "Key bit must be on");
3022         if (mask->sequence.sequence)
3023                 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x1000)) &&
3024                                  !(gre_spec->c_rsvd0_ver & RTE_BE16(0x1000)))
3025                         return rte_flow_error_set(error, EINVAL,
3026                                                   RTE_FLOW_ERROR_TYPE_ITEM,
3027                                                   item,
3028                                                   "Sequence bit must be on");
3029         if (mask->checksum_rsvd.checksum || mask->sequence.sequence) {
3030                 if (priv->sh->steering_format_version ==
3031                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 ||
3032                     ((attr->group || attr->transfer) &&
3033                      !priv->sh->misc5_cap) ||
3034                     (!(priv->sh->tunnel_header_0_1 &&
3035                        priv->sh->tunnel_header_2_3) &&
3036                     !attr->group && !attr->transfer))
3037                         return rte_flow_error_set(error, EINVAL,
3038                                                   RTE_FLOW_ERROR_TYPE_ITEM,
3039                                                   item,
3040                                                   "Checksum/Sequence not supported");
3041         }
3042         ret = mlx5_flow_item_acceptable
3043                 (item, (const uint8_t *)mask,
3044                  (const uint8_t *)&nic_mask,
3045                  sizeof(struct rte_flow_item_gre_opt),
3046                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3047         return ret;
3048 }
3049
3050 /**
3051  * Validate GRE item.
3052  *
3053  * @param[in] item
3054  *   Item specification.
3055  * @param[in] item_flags
3056  *   Bit flags to mark detected items.
3057  * @param[in] target_protocol
3058  *   The next protocol in the previous item.
3059  * @param[out] error
3060  *   Pointer to error structure.
3061  *
3062  * @return
3063  *   0 on success, a negative errno value otherwise and rte_errno is set.
3064  */
3065 int
3066 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
3067                             uint64_t item_flags,
3068                             uint8_t target_protocol,
3069                             struct rte_flow_error *error)
3070 {
3071         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
3072         const struct rte_flow_item_gre *mask = item->mask;
3073         int ret;
3074         const struct rte_flow_item_gre nic_mask = {
3075                 .c_rsvd0_ver = RTE_BE16(0xB000),
3076                 .protocol = RTE_BE16(UINT16_MAX),
3077         };
3078
3079         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3080                 return rte_flow_error_set(error, EINVAL,
3081                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3082                                           "protocol filtering not compatible"
3083                                           " with this GRE layer");
3084         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3085                 return rte_flow_error_set(error, ENOTSUP,
3086                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3087                                           "multiple tunnel layers not"
3088                                           " supported");
3089         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3090                 return rte_flow_error_set(error, ENOTSUP,
3091                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3092                                           "L3 Layer is missing");
3093         if (!mask)
3094                 mask = &rte_flow_item_gre_mask;
3095         ret = mlx5_flow_item_acceptable
3096                 (item, (const uint8_t *)mask,
3097                  (const uint8_t *)&nic_mask,
3098                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
3099                  error);
3100         if (ret < 0)
3101                 return ret;
3102 #ifndef HAVE_MLX5DV_DR
3103 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
3104         if (spec && (spec->protocol & mask->protocol))
3105                 return rte_flow_error_set(error, ENOTSUP,
3106                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3107                                           "without MPLS support the"
3108                                           " specification cannot be used for"
3109                                           " filtering");
3110 #endif
3111 #endif
3112         return 0;
3113 }
3114
3115 /**
3116  * Validate Geneve item.
3117  *
3118  * @param[in] item
3119  *   Item specification.
3120  * @param[in] itemFlags
3121  *   Bit-fields that holds the items detected until now.
3122  * @param[in] enPriv
3123  *   Pointer to the private data structure.
3124  * @param[out] error
3125  *   Pointer to error structure.
3126  *
3127  * @return
3128  *   0 on success, a negative errno value otherwise and rte_errno is set.
3129  */
3130
3131 int
3132 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
3133                                uint64_t item_flags,
3134                                struct rte_eth_dev *dev,
3135                                struct rte_flow_error *error)
3136 {
3137         struct mlx5_priv *priv = dev->data->dev_private;
3138         const struct rte_flow_item_geneve *spec = item->spec;
3139         const struct rte_flow_item_geneve *mask = item->mask;
3140         int ret;
3141         uint16_t gbhdr;
3142         uint8_t opt_len = priv->sh->cdev->config.hca_attr.geneve_max_opt_len ?
3143                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
3144         const struct rte_flow_item_geneve nic_mask = {
3145                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
3146                 .vni = "\xff\xff\xff",
3147                 .protocol = RTE_BE16(UINT16_MAX),
3148         };
3149
3150         if (!priv->sh->cdev->config.hca_attr.tunnel_stateless_geneve_rx)
3151                 return rte_flow_error_set(error, ENOTSUP,
3152                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3153                                           "L3 Geneve is not enabled by device"
3154                                           " parameter and/or not configured in"
3155                                           " firmware");
3156         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3157                 return rte_flow_error_set(error, ENOTSUP,
3158                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3159                                           "multiple tunnel layers not"
3160                                           " supported");
3161         /*
3162          * Verify only UDPv4 is present as defined in
3163          * https://tools.ietf.org/html/rfc7348
3164          */
3165         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
3166                 return rte_flow_error_set(error, EINVAL,
3167                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3168                                           "no outer UDP layer found");
3169         if (!mask)
3170                 mask = &rte_flow_item_geneve_mask;
3171         ret = mlx5_flow_item_acceptable
3172                                   (item, (const uint8_t *)mask,
3173                                    (const uint8_t *)&nic_mask,
3174                                    sizeof(struct rte_flow_item_geneve),
3175                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3176         if (ret)
3177                 return ret;
3178         if (spec) {
3179                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
3180                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
3181                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
3182                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
3183                         return rte_flow_error_set(error, ENOTSUP,
3184                                                   RTE_FLOW_ERROR_TYPE_ITEM,
3185                                                   item,
3186                                                   "Geneve protocol unsupported"
3187                                                   " fields are being used");
3188                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
3189                         return rte_flow_error_set
3190                                         (error, ENOTSUP,
3191                                          RTE_FLOW_ERROR_TYPE_ITEM,
3192                                          item,
3193                                          "Unsupported Geneve options length");
3194         }
3195         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
3196                 return rte_flow_error_set
3197                                     (error, ENOTSUP,
3198                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
3199                                      "Geneve tunnel must be fully defined");
3200         return 0;
3201 }
3202
3203 /**
3204  * Validate Geneve TLV option item.
3205  *
3206  * @param[in] item
3207  *   Item specification.
3208  * @param[in] last_item
3209  *   Previous validated item in the pattern items.
3210  * @param[in] geneve_item
3211  *   Previous GENEVE item specification.
3212  * @param[in] dev
3213  *   Pointer to the rte_eth_dev structure.
3214  * @param[out] error
3215  *   Pointer to error structure.
3216  *
3217  * @return
3218  *   0 on success, a negative errno value otherwise and rte_errno is set.
3219  */
3220 int
3221 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
3222                                    uint64_t last_item,
3223                                    const struct rte_flow_item *geneve_item,
3224                                    struct rte_eth_dev *dev,
3225                                    struct rte_flow_error *error)
3226 {
3227         struct mlx5_priv *priv = dev->data->dev_private;
3228         struct mlx5_dev_ctx_shared *sh = priv->sh;
3229         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
3230         struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
3231         uint8_t data_max_supported =
3232                         hca_attr->max_geneve_tlv_option_data_len * 4;
3233         const struct rte_flow_item_geneve *geneve_spec;
3234         const struct rte_flow_item_geneve *geneve_mask;
3235         const struct rte_flow_item_geneve_opt *spec = item->spec;
3236         const struct rte_flow_item_geneve_opt *mask = item->mask;
3237         unsigned int i;
3238         unsigned int data_len;
3239         uint8_t tlv_option_len;
3240         uint16_t optlen_m, optlen_v;
3241         const struct rte_flow_item_geneve_opt full_mask = {
3242                 .option_class = RTE_BE16(0xffff),
3243                 .option_type = 0xff,
3244                 .option_len = 0x1f,
3245         };
3246
3247         if (!mask)
3248                 mask = &rte_flow_item_geneve_opt_mask;
3249         if (!spec)
3250                 return rte_flow_error_set
3251                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3252                         "Geneve TLV opt class/type/length must be specified");
3253         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
3254                 return rte_flow_error_set
3255                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3256                         "Geneve TLV opt length exceeds the limit (31)");
3257         /* Check if class type and length masks are full. */
3258         if (full_mask.option_class != mask->option_class ||
3259             full_mask.option_type != mask->option_type ||
3260             full_mask.option_len != (mask->option_len & full_mask.option_len))
3261                 return rte_flow_error_set
3262                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3263                         "Geneve TLV opt class/type/length masks must be full");
3264         /* Check if length is supported */
3265         if ((uint32_t)spec->option_len >
3266                         hca_attr->max_geneve_tlv_option_data_len)
3267                 return rte_flow_error_set
3268                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3269                         "Geneve TLV opt length not supported");
3270         if (hca_attr->max_geneve_tlv_options > 1)
3271                 DRV_LOG(DEBUG,
3272                         "max_geneve_tlv_options supports more than 1 option");
3273         /* Check GENEVE item preceding. */
3274         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
3275                 return rte_flow_error_set
3276                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3277                         "Geneve opt item must be preceded with Geneve item");
3278         geneve_spec = geneve_item->spec;
3279         geneve_mask = geneve_item->mask ? geneve_item->mask :
3280                                           &rte_flow_item_geneve_mask;
3281         /* Check if GENEVE TLV option size doesn't exceed option length */
3282         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
3283                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
3284                 tlv_option_len = spec->option_len & mask->option_len;
3285                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
3286                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
3287                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
3288                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
3289                 if ((optlen_v & optlen_m) <= tlv_option_len)
3290                         return rte_flow_error_set
3291                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3292                                  "GENEVE TLV option length exceeds optlen");
3293         }
3294         /* Check if length is 0 or data is 0. */
3295         if (spec->data == NULL || spec->option_len == 0)
3296                 return rte_flow_error_set
3297                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3298                         "Geneve TLV opt with zero data/length not supported");
3299         /* Check not all data & mask are 0. */
3300         data_len = spec->option_len * 4;
3301         if (mask->data == NULL) {
3302                 for (i = 0; i < data_len; i++)
3303                         if (spec->data[i])
3304                                 break;
3305                 if (i == data_len)
3306                         return rte_flow_error_set(error, ENOTSUP,
3307                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3308                                 "Can't match on Geneve option data 0");
3309         } else {
3310                 for (i = 0; i < data_len; i++)
3311                         if (spec->data[i] & mask->data[i])
3312                                 break;
3313                 if (i == data_len)
3314                         return rte_flow_error_set(error, ENOTSUP,
3315                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3316                                 "Can't match on Geneve option data and mask 0");
3317                 /* Check data mask supported. */
3318                 for (i = data_max_supported; i < data_len ; i++)
3319                         if (mask->data[i])
3320                                 return rte_flow_error_set(error, ENOTSUP,
3321                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
3322                                         "Data mask is of unsupported size");
3323         }
3324         /* Check GENEVE option is supported in NIC. */
3325         if (!hca_attr->geneve_tlv_opt)
3326                 return rte_flow_error_set
3327                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3328                         "Geneve TLV opt not supported");
3329         /* Check if we already have geneve option with different type/class. */
3330         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
3331         geneve_opt_resource = sh->geneve_tlv_option_resource;
3332         if (geneve_opt_resource != NULL)
3333                 if (geneve_opt_resource->option_class != spec->option_class ||
3334                     geneve_opt_resource->option_type != spec->option_type ||
3335                     geneve_opt_resource->length != spec->option_len) {
3336                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3337                         return rte_flow_error_set(error, ENOTSUP,
3338                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3339                                 "Only one Geneve TLV option supported");
3340                 }
3341         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3342         return 0;
3343 }
3344
3345 /**
3346  * Validate MPLS item.
3347  *
3348  * @param[in] dev
3349  *   Pointer to the rte_eth_dev structure.
3350  * @param[in] item
3351  *   Item specification.
3352  * @param[in] item_flags
3353  *   Bit-fields that holds the items detected until now.
3354  * @param[in] prev_layer
3355  *   The protocol layer indicated in previous item.
3356  * @param[out] error
3357  *   Pointer to error structure.
3358  *
3359  * @return
3360  *   0 on success, a negative errno value otherwise and rte_errno is set.
3361  */
3362 int
3363 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
3364                              const struct rte_flow_item *item __rte_unused,
3365                              uint64_t item_flags __rte_unused,
3366                              uint64_t prev_layer __rte_unused,
3367                              struct rte_flow_error *error)
3368 {
3369 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
3370         const struct rte_flow_item_mpls *mask = item->mask;
3371         struct mlx5_priv *priv = dev->data->dev_private;
3372         int ret;
3373
3374         if (!priv->sh->dev_cap.mpls_en)
3375                 return rte_flow_error_set(error, ENOTSUP,
3376                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3377                                           "MPLS not supported or"
3378                                           " disabled in firmware"
3379                                           " configuration.");
3380         /* MPLS over UDP, GRE is allowed */
3381         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |
3382                             MLX5_FLOW_LAYER_GRE |
3383                             MLX5_FLOW_LAYER_GRE_KEY)))
3384                 return rte_flow_error_set(error, EINVAL,
3385                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3386                                           "protocol filtering not compatible"
3387                                           " with MPLS layer");
3388         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
3389         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
3390             !(item_flags & MLX5_FLOW_LAYER_GRE))
3391                 return rte_flow_error_set(error, ENOTSUP,
3392                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3393                                           "multiple tunnel layers not"
3394                                           " supported");
3395         if (!mask)
3396                 mask = &rte_flow_item_mpls_mask;
3397         ret = mlx5_flow_item_acceptable
3398                 (item, (const uint8_t *)mask,
3399                  (const uint8_t *)&rte_flow_item_mpls_mask,
3400                  sizeof(struct rte_flow_item_mpls),
3401                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3402         if (ret < 0)
3403                 return ret;
3404         return 0;
3405 #else
3406         return rte_flow_error_set(error, ENOTSUP,
3407                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
3408                                   "MPLS is not supported by Verbs, please"
3409                                   " update.");
3410 #endif
3411 }
3412
3413 /**
3414  * Validate NVGRE item.
3415  *
3416  * @param[in] item
3417  *   Item specification.
3418  * @param[in] item_flags
3419  *   Bit flags to mark detected items.
3420  * @param[in] target_protocol
3421  *   The next protocol in the previous item.
3422  * @param[out] error
3423  *   Pointer to error structure.
3424  *
3425  * @return
3426  *   0 on success, a negative errno value otherwise and rte_errno is set.
3427  */
3428 int
3429 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
3430                               uint64_t item_flags,
3431                               uint8_t target_protocol,
3432                               struct rte_flow_error *error)
3433 {
3434         const struct rte_flow_item_nvgre *mask = item->mask;
3435         int ret;
3436
3437         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3438                 return rte_flow_error_set(error, EINVAL,
3439                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3440                                           "protocol filtering not compatible"
3441                                           " with this GRE layer");
3442         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3443                 return rte_flow_error_set(error, ENOTSUP,
3444                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3445                                           "multiple tunnel layers not"
3446                                           " supported");
3447         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3448                 return rte_flow_error_set(error, ENOTSUP,
3449                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3450                                           "L3 Layer is missing");
3451         if (!mask)
3452                 mask = &rte_flow_item_nvgre_mask;
3453         ret = mlx5_flow_item_acceptable
3454                 (item, (const uint8_t *)mask,
3455                  (const uint8_t *)&rte_flow_item_nvgre_mask,
3456                  sizeof(struct rte_flow_item_nvgre),
3457                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3458         if (ret < 0)
3459                 return ret;
3460         return 0;
3461 }
3462
3463 /**
3464  * Validate eCPRI item.
3465  *
3466  * @param[in] item
3467  *   Item specification.
3468  * @param[in] item_flags
3469  *   Bit-fields that holds the items detected until now.
3470  * @param[in] last_item
3471  *   Previous validated item in the pattern items.
3472  * @param[in] ether_type
3473  *   Type in the ethernet layer header (including dot1q).
3474  * @param[in] acc_mask
3475  *   Acceptable mask, if NULL default internal default mask
3476  *   will be used to check whether item fields are supported.
3477  * @param[out] error
3478  *   Pointer to error structure.
3479  *
3480  * @return
3481  *   0 on success, a negative errno value otherwise and rte_errno is set.
3482  */
3483 int
3484 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
3485                               uint64_t item_flags,
3486                               uint64_t last_item,
3487                               uint16_t ether_type,
3488                               const struct rte_flow_item_ecpri *acc_mask,
3489                               struct rte_flow_error *error)
3490 {
3491         const struct rte_flow_item_ecpri *mask = item->mask;
3492         const struct rte_flow_item_ecpri nic_mask = {
3493                 .hdr = {
3494                         .common = {
3495                                 .u32 =
3496                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
3497                                         .type = 0xFF,
3498                                         }).u32),
3499                         },
3500                         .dummy[0] = 0xFFFFFFFF,
3501                 },
3502         };
3503         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
3504                                         MLX5_FLOW_LAYER_OUTER_VLAN);
3505         struct rte_flow_item_ecpri mask_lo;
3506
3507         if (!(last_item & outer_l2_vlan) &&
3508             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
3509                 return rte_flow_error_set(error, EINVAL,
3510                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3511                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
3512         if ((last_item & outer_l2_vlan) && ether_type &&
3513             ether_type != RTE_ETHER_TYPE_ECPRI)
3514                 return rte_flow_error_set(error, EINVAL,
3515                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3516                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
3517         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3518                 return rte_flow_error_set(error, EINVAL,
3519                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3520                                           "eCPRI with tunnel is not supported right now");
3521         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3522                 return rte_flow_error_set(error, ENOTSUP,
3523                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3524                                           "multiple L3 layers not supported");
3525         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3526                 return rte_flow_error_set(error, EINVAL,
3527                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3528                                           "eCPRI cannot coexist with a TCP layer");
3529         /* In specification, eCPRI could be over UDP layer. */
3530         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3531                 return rte_flow_error_set(error, EINVAL,
3532                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3533                                           "eCPRI over UDP layer is not yet supported right now");
3534         /* Mask for type field in common header could be zero. */
3535         if (!mask)
3536                 mask = &rte_flow_item_ecpri_mask;
3537         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3538         /* Input mask is in big-endian format. */
3539         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3540                 return rte_flow_error_set(error, EINVAL,
3541                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3542                                           "partial mask is not supported for protocol");
3543         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3544                 return rte_flow_error_set(error, EINVAL,
3545                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3546                                           "message header mask must be after a type mask");
3547         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3548                                          acc_mask ? (const uint8_t *)acc_mask
3549                                                   : (const uint8_t *)&nic_mask,
3550                                          sizeof(struct rte_flow_item_ecpri),
3551                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3552 }
3553
3554 static int
3555 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3556                    const struct rte_flow_attr *attr __rte_unused,
3557                    const struct rte_flow_item items[] __rte_unused,
3558                    const struct rte_flow_action actions[] __rte_unused,
3559                    bool external __rte_unused,
3560                    int hairpin __rte_unused,
3561                    struct rte_flow_error *error)
3562 {
3563         return rte_flow_error_set(error, ENOTSUP,
3564                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3565 }
3566
3567 static struct mlx5_flow *
3568 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3569                   const struct rte_flow_attr *attr __rte_unused,
3570                   const struct rte_flow_item items[] __rte_unused,
3571                   const struct rte_flow_action actions[] __rte_unused,
3572                   struct rte_flow_error *error)
3573 {
3574         rte_flow_error_set(error, ENOTSUP,
3575                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3576         return NULL;
3577 }
3578
3579 static int
3580 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3581                     struct mlx5_flow *dev_flow __rte_unused,
3582                     const struct rte_flow_attr *attr __rte_unused,
3583                     const struct rte_flow_item items[] __rte_unused,
3584                     const struct rte_flow_action actions[] __rte_unused,
3585                     struct rte_flow_error *error)
3586 {
3587         return rte_flow_error_set(error, ENOTSUP,
3588                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3589 }
3590
3591 static int
3592 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3593                 struct rte_flow *flow __rte_unused,
3594                 struct rte_flow_error *error)
3595 {
3596         return rte_flow_error_set(error, ENOTSUP,
3597                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3598 }
3599
3600 static void
3601 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3602                  struct rte_flow *flow __rte_unused)
3603 {
3604 }
3605
3606 static void
3607 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3608                   struct rte_flow *flow __rte_unused)
3609 {
3610 }
3611
3612 static int
3613 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3614                 struct rte_flow *flow __rte_unused,
3615                 const struct rte_flow_action *actions __rte_unused,
3616                 void *data __rte_unused,
3617                 struct rte_flow_error *error)
3618 {
3619         return rte_flow_error_set(error, ENOTSUP,
3620                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3621 }
3622
3623 static int
3624 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3625                       uint32_t domains __rte_unused,
3626                       uint32_t flags __rte_unused)
3627 {
3628         return 0;
3629 }
3630
3631 /* Void driver to protect from null pointer reference. */
3632 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3633         .validate = flow_null_validate,
3634         .prepare = flow_null_prepare,
3635         .translate = flow_null_translate,
3636         .apply = flow_null_apply,
3637         .remove = flow_null_remove,
3638         .destroy = flow_null_destroy,
3639         .query = flow_null_query,
3640         .sync_domain = flow_null_sync_domain,
3641 };
3642
3643 /**
3644  * Select flow driver type according to flow attributes and device
3645  * configuration.
3646  *
3647  * @param[in] dev
3648  *   Pointer to the dev structure.
3649  * @param[in] attr
3650  *   Pointer to the flow attributes.
3651  *
3652  * @return
3653  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3654  */
3655 static enum mlx5_flow_drv_type
3656 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3657 {
3658         struct mlx5_priv *priv = dev->data->dev_private;
3659         /* The OS can determine first a specific flow type (DV, VERBS) */
3660         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3661
3662         if (type != MLX5_FLOW_TYPE_MAX)
3663                 return type;
3664         /*
3665          * Currently when dv_flow_en == 2, only HW steering engine is
3666          * supported. New engines can also be chosen here if ready.
3667          */
3668         if (priv->sh->config.dv_flow_en == 2)
3669                 return MLX5_FLOW_TYPE_HW;
3670         /* If no OS specific type - continue with DV/VERBS selection */
3671         if (attr->transfer && priv->sh->config.dv_esw_en)
3672                 type = MLX5_FLOW_TYPE_DV;
3673         if (!attr->transfer)
3674                 type = priv->sh->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3675                                                      MLX5_FLOW_TYPE_VERBS;
3676         return type;
3677 }
3678
3679 #define flow_get_drv_ops(type) flow_drv_ops[type]
3680
3681 /**
3682  * Flow driver validation API. This abstracts calling driver specific functions.
3683  * The type of flow driver is determined according to flow attributes.
3684  *
3685  * @param[in] dev
3686  *   Pointer to the dev structure.
3687  * @param[in] attr
3688  *   Pointer to the flow attributes.
3689  * @param[in] items
3690  *   Pointer to the list of items.
3691  * @param[in] actions
3692  *   Pointer to the list of actions.
3693  * @param[in] external
3694  *   This flow rule is created by request external to PMD.
3695  * @param[in] hairpin
3696  *   Number of hairpin TX actions, 0 means classic flow.
3697  * @param[out] error
3698  *   Pointer to the error structure.
3699  *
3700  * @return
3701  *   0 on success, a negative errno value otherwise and rte_errno is set.
3702  */
3703 static inline int
3704 flow_drv_validate(struct rte_eth_dev *dev,
3705                   const struct rte_flow_attr *attr,
3706                   const struct rte_flow_item items[],
3707                   const struct rte_flow_action actions[],
3708                   bool external, int hairpin, struct rte_flow_error *error)
3709 {
3710         const struct mlx5_flow_driver_ops *fops;
3711         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3712
3713         fops = flow_get_drv_ops(type);
3714         return fops->validate(dev, attr, items, actions, external,
3715                               hairpin, error);
3716 }
3717
3718 /**
3719  * Flow driver preparation API. This abstracts calling driver specific
3720  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3721  * calculates the size of memory required for device flow, allocates the memory,
3722  * initializes the device flow and returns the pointer.
3723  *
3724  * @note
3725  *   This function initializes device flow structure such as dv or verbs in
3726  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3727  *   rest. For example, adding returning device flow to flow->dev_flow list and
3728  *   setting backward reference to the flow should be done out of this function.
3729  *   layers field is not filled either.
3730  *
3731  * @param[in] dev
3732  *   Pointer to the dev structure.
3733  * @param[in] attr
3734  *   Pointer to the flow attributes.
3735  * @param[in] items
3736  *   Pointer to the list of items.
3737  * @param[in] actions
3738  *   Pointer to the list of actions.
3739  * @param[in] flow_idx
3740  *   This memory pool index to the flow.
3741  * @param[out] error
3742  *   Pointer to the error structure.
3743  *
3744  * @return
3745  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3746  */
3747 static inline struct mlx5_flow *
3748 flow_drv_prepare(struct rte_eth_dev *dev,
3749                  const struct rte_flow *flow,
3750                  const struct rte_flow_attr *attr,
3751                  const struct rte_flow_item items[],
3752                  const struct rte_flow_action actions[],
3753                  uint32_t flow_idx,
3754                  struct rte_flow_error *error)
3755 {
3756         const struct mlx5_flow_driver_ops *fops;
3757         enum mlx5_flow_drv_type type = flow->drv_type;
3758         struct mlx5_flow *mlx5_flow = NULL;
3759
3760         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3761         fops = flow_get_drv_ops(type);
3762         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3763         if (mlx5_flow)
3764                 mlx5_flow->flow_idx = flow_idx;
3765         return mlx5_flow;
3766 }
3767
3768 /**
3769  * Flow driver translation API. This abstracts calling driver specific
3770  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3771  * translates a generic flow into a driver flow. flow_drv_prepare() must
3772  * precede.
3773  *
3774  * @note
3775  *   dev_flow->layers could be filled as a result of parsing during translation
3776  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3777  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3778  *   flow->actions could be overwritten even though all the expanded dev_flows
3779  *   have the same actions.
3780  *
3781  * @param[in] dev
3782  *   Pointer to the rte dev structure.
3783  * @param[in, out] dev_flow
3784  *   Pointer to the mlx5 flow.
3785  * @param[in] attr
3786  *   Pointer to the flow attributes.
3787  * @param[in] items
3788  *   Pointer to the list of items.
3789  * @param[in] actions
3790  *   Pointer to the list of actions.
3791  * @param[out] error
3792  *   Pointer to the error structure.
3793  *
3794  * @return
3795  *   0 on success, a negative errno value otherwise and rte_errno is set.
3796  */
3797 static inline int
3798 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3799                    const struct rte_flow_attr *attr,
3800                    const struct rte_flow_item items[],
3801                    const struct rte_flow_action actions[],
3802                    struct rte_flow_error *error)
3803 {
3804         const struct mlx5_flow_driver_ops *fops;
3805         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3806
3807         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3808         fops = flow_get_drv_ops(type);
3809         return fops->translate(dev, dev_flow, attr, items, actions, error);
3810 }
3811
3812 /**
3813  * Flow driver apply API. This abstracts calling driver specific functions.
3814  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3815  * translated driver flows on to device. flow_drv_translate() must precede.
3816  *
3817  * @param[in] dev
3818  *   Pointer to Ethernet device structure.
3819  * @param[in, out] flow
3820  *   Pointer to flow structure.
3821  * @param[out] error
3822  *   Pointer to error structure.
3823  *
3824  * @return
3825  *   0 on success, a negative errno value otherwise and rte_errno is set.
3826  */
3827 static inline int
3828 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3829                struct rte_flow_error *error)
3830 {
3831         const struct mlx5_flow_driver_ops *fops;
3832         enum mlx5_flow_drv_type type = flow->drv_type;
3833
3834         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3835         fops = flow_get_drv_ops(type);
3836         return fops->apply(dev, flow, error);
3837 }
3838
3839 /**
3840  * Flow driver destroy API. This abstracts calling driver specific functions.
3841  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3842  * on device and releases resources of the flow.
3843  *
3844  * @param[in] dev
3845  *   Pointer to Ethernet device.
3846  * @param[in, out] flow
3847  *   Pointer to flow structure.
3848  */
3849 static inline void
3850 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3851 {
3852         const struct mlx5_flow_driver_ops *fops;
3853         enum mlx5_flow_drv_type type = flow->drv_type;
3854
3855         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3856         fops = flow_get_drv_ops(type);
3857         fops->destroy(dev, flow);
3858 }
3859
3860 /**
3861  * Flow driver find RSS policy tbl API. This abstracts calling driver
3862  * specific functions. Parent flow (rte_flow) should have driver
3863  * type (drv_type). It will find the RSS policy table that has the rss_desc.
3864  *
3865  * @param[in] dev
3866  *   Pointer to Ethernet device.
3867  * @param[in, out] flow
3868  *   Pointer to flow structure.
3869  * @param[in] policy
3870  *   Pointer to meter policy table.
3871  * @param[in] rss_desc
3872  *   Pointer to rss_desc
3873  */
3874 static struct mlx5_flow_meter_sub_policy *
3875 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3876                 struct rte_flow *flow,
3877                 struct mlx5_flow_meter_policy *policy,
3878                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3879 {
3880         const struct mlx5_flow_driver_ops *fops;
3881         enum mlx5_flow_drv_type type = flow->drv_type;
3882
3883         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3884         fops = flow_get_drv_ops(type);
3885         return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3886 }
3887
3888 /**
3889  * Flow driver color tag rule API. This abstracts calling driver
3890  * specific functions. Parent flow (rte_flow) should have driver
3891  * type (drv_type). It will create the color tag rules in hierarchy meter.
3892  *
3893  * @param[in] dev
3894  *   Pointer to Ethernet device.
3895  * @param[in, out] flow
3896  *   Pointer to flow structure.
3897  * @param[in] fm
3898  *   Pointer to flow meter structure.
3899  * @param[in] src_port
3900  *   The src port this extra rule should use.
3901  * @param[in] item
3902  *   The src port id match item.
3903  * @param[out] error
3904  *   Pointer to error structure.
3905  */
3906 static int
3907 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev,
3908                 struct rte_flow *flow,
3909                 struct mlx5_flow_meter_info *fm,
3910                 int32_t src_port,
3911                 const struct rte_flow_item *item,
3912                 struct rte_flow_error *error)
3913 {
3914         const struct mlx5_flow_driver_ops *fops;
3915         enum mlx5_flow_drv_type type = flow->drv_type;
3916
3917         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3918         fops = flow_get_drv_ops(type);
3919         return fops->meter_hierarchy_rule_create(dev, fm,
3920                                                 src_port, item, error);
3921 }
3922
3923 /**
3924  * Get RSS action from the action list.
3925  *
3926  * @param[in] dev
3927  *   Pointer to Ethernet device.
3928  * @param[in] actions
3929  *   Pointer to the list of actions.
3930  * @param[in] flow
3931  *   Parent flow structure pointer.
3932  *
3933  * @return
3934  *   Pointer to the RSS action if exist, else return NULL.
3935  */
3936 static const struct rte_flow_action_rss*
3937 flow_get_rss_action(struct rte_eth_dev *dev,
3938                     const struct rte_flow_action actions[])
3939 {
3940         struct mlx5_priv *priv = dev->data->dev_private;
3941         const struct rte_flow_action_rss *rss = NULL;
3942         struct mlx5_meter_policy_action_container *acg;
3943         struct mlx5_meter_policy_action_container *acy;
3944
3945         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3946                 switch (actions->type) {
3947                 case RTE_FLOW_ACTION_TYPE_RSS:
3948                         rss = actions->conf;
3949                         break;
3950                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3951                 {
3952                         const struct rte_flow_action_sample *sample =
3953                                                                 actions->conf;
3954                         const struct rte_flow_action *act = sample->actions;
3955                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3956                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3957                                         rss = act->conf;
3958                         break;
3959                 }
3960                 case RTE_FLOW_ACTION_TYPE_METER:
3961                 {
3962                         uint32_t mtr_idx;
3963                         struct mlx5_flow_meter_info *fm;
3964                         struct mlx5_flow_meter_policy *policy;
3965                         const struct rte_flow_action_meter *mtr = actions->conf;
3966
3967                         fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3968                         if (fm && !fm->def_policy) {
3969                                 policy = mlx5_flow_meter_policy_find(dev,
3970                                                 fm->policy_id, NULL);
3971                                 MLX5_ASSERT(policy);
3972                                 if (policy->is_hierarchy) {
3973                                         policy =
3974                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
3975                                                                         policy);
3976                                         if (!policy)
3977                                                 return NULL;
3978                                 }
3979                                 if (policy->is_rss) {
3980                                         acg =
3981                                         &policy->act_cnt[RTE_COLOR_GREEN];
3982                                         acy =
3983                                         &policy->act_cnt[RTE_COLOR_YELLOW];
3984                                         if (acg->fate_action ==
3985                                             MLX5_FLOW_FATE_SHARED_RSS)
3986                                                 rss = acg->rss->conf;
3987                                         else if (acy->fate_action ==
3988                                                  MLX5_FLOW_FATE_SHARED_RSS)
3989                                                 rss = acy->rss->conf;
3990                                 }
3991                         }
3992                         break;
3993                 }
3994                 default:
3995                         break;
3996                 }
3997         }
3998         return rss;
3999 }
4000
4001 /**
4002  * Get ASO age action by index.
4003  *
4004  * @param[in] dev
4005  *   Pointer to the Ethernet device structure.
4006  * @param[in] age_idx
4007  *   Index to the ASO age action.
4008  *
4009  * @return
4010  *   The specified ASO age action.
4011  */
4012 struct mlx5_aso_age_action*
4013 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
4014 {
4015         uint16_t pool_idx = age_idx & UINT16_MAX;
4016         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
4017         struct mlx5_priv *priv = dev->data->dev_private;
4018         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
4019         struct mlx5_aso_age_pool *pool;
4020
4021         rte_rwlock_read_lock(&mng->resize_rwl);
4022         pool = mng->pools[pool_idx];
4023         rte_rwlock_read_unlock(&mng->resize_rwl);
4024         return &pool->actions[offset - 1];
4025 }
4026
4027 /* maps indirect action to translated direct in some actions array */
4028 struct mlx5_translated_action_handle {
4029         struct rte_flow_action_handle *action; /**< Indirect action handle. */
4030         int index; /**< Index in related array of rte_flow_action. */
4031 };
4032
4033 /**
4034  * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
4035  * direct action if translation possible.
4036  * This functionality used to run same execution path for both direct and
4037  * indirect actions on flow create. All necessary preparations for indirect
4038  * action handling should be performed on *handle* actions list returned
4039  * from this call.
4040  *
4041  * @param[in] dev
4042  *   Pointer to Ethernet device.
4043  * @param[in] actions
4044  *   List of actions to translate.
4045  * @param[out] handle
4046  *   List to store translated indirect action object handles.
4047  * @param[in, out] indir_n
4048  *   Size of *handle* array. On return should be updated with number of
4049  *   indirect actions retrieved from the *actions* list.
4050  * @param[out] translated_actions
4051  *   List of actions where all indirect actions were translated to direct
4052  *   if possible. NULL if no translation took place.
4053  * @param[out] error
4054  *   Pointer to the error structure.
4055  *
4056  * @return
4057  *   0 on success, a negative errno value otherwise and rte_errno is set.
4058  */
4059 static int
4060 flow_action_handles_translate(struct rte_eth_dev *dev,
4061                               const struct rte_flow_action actions[],
4062                               struct mlx5_translated_action_handle *handle,
4063                               int *indir_n,
4064                               struct rte_flow_action **translated_actions,
4065                               struct rte_flow_error *error)
4066 {
4067         struct mlx5_priv *priv = dev->data->dev_private;
4068         struct rte_flow_action *translated = NULL;
4069         size_t actions_size;
4070         int n;
4071         int copied_n = 0;
4072         struct mlx5_translated_action_handle *handle_end = NULL;
4073
4074         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
4075                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
4076                         continue;
4077                 if (copied_n == *indir_n) {
4078                         return rte_flow_error_set
4079                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
4080                                  NULL, "too many shared actions");
4081                 }
4082                 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
4083                            sizeof(actions[n].conf));
4084                 handle[copied_n].index = n;
4085                 copied_n++;
4086         }
4087         n++;
4088         *indir_n = copied_n;
4089         if (!copied_n)
4090                 return 0;
4091         actions_size = sizeof(struct rte_flow_action) * n;
4092         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
4093         if (!translated) {
4094                 rte_errno = ENOMEM;
4095                 return -ENOMEM;
4096         }
4097         memcpy(translated, actions, actions_size);
4098         for (handle_end = handle + copied_n; handle < handle_end; handle++) {
4099                 struct mlx5_shared_action_rss *shared_rss;
4100                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
4101                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
4102                 uint32_t idx = act_idx &
4103                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
4104
4105                 switch (type) {
4106                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
4107                         shared_rss = mlx5_ipool_get
4108                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
4109                         translated[handle->index].type =
4110                                 RTE_FLOW_ACTION_TYPE_RSS;
4111                         translated[handle->index].conf =
4112                                 &shared_rss->origin;
4113                         break;
4114                 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
4115                         translated[handle->index].type =
4116                                                 (enum rte_flow_action_type)
4117                                                 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
4118                         translated[handle->index].conf = (void *)(uintptr_t)idx;
4119                         break;
4120                 case MLX5_INDIRECT_ACTION_TYPE_AGE:
4121                         if (priv->sh->flow_hit_aso_en) {
4122                                 translated[handle->index].type =
4123                                         (enum rte_flow_action_type)
4124                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
4125                                 translated[handle->index].conf =
4126                                                          (void *)(uintptr_t)idx;
4127                                 break;
4128                         }
4129                         /* Fall-through */
4130                 case MLX5_INDIRECT_ACTION_TYPE_CT:
4131                         if (priv->sh->ct_aso_en) {
4132                                 translated[handle->index].type =
4133                                         RTE_FLOW_ACTION_TYPE_CONNTRACK;
4134                                 translated[handle->index].conf =
4135                                                          (void *)(uintptr_t)idx;
4136                                 break;
4137                         }
4138                         /* Fall-through */
4139                 default:
4140                         mlx5_free(translated);
4141                         return rte_flow_error_set
4142                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
4143                                  NULL, "invalid indirect action type");
4144                 }
4145         }
4146         *translated_actions = translated;
4147         return 0;
4148 }
4149
4150 /**
4151  * Get Shared RSS action from the action list.
4152  *
4153  * @param[in] dev
4154  *   Pointer to Ethernet device.
4155  * @param[in] shared
4156  *   Pointer to the list of actions.
4157  * @param[in] shared_n
4158  *   Actions list length.
4159  *
4160  * @return
4161  *   The MLX5 RSS action ID if exists, otherwise return 0.
4162  */
4163 static uint32_t
4164 flow_get_shared_rss_action(struct rte_eth_dev *dev,
4165                            struct mlx5_translated_action_handle *handle,
4166                            int shared_n)
4167 {
4168         struct mlx5_translated_action_handle *handle_end;
4169         struct mlx5_priv *priv = dev->data->dev_private;
4170         struct mlx5_shared_action_rss *shared_rss;
4171
4172
4173         for (handle_end = handle + shared_n; handle < handle_end; handle++) {
4174                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
4175                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
4176                 uint32_t idx = act_idx &
4177                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
4178                 switch (type) {
4179                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
4180                         shared_rss = mlx5_ipool_get
4181                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
4182                                                                            idx);
4183                         __atomic_add_fetch(&shared_rss->refcnt, 1,
4184                                            __ATOMIC_RELAXED);
4185                         return idx;
4186                 default:
4187                         break;
4188                 }
4189         }
4190         return 0;
4191 }
4192
4193 static unsigned int
4194 find_graph_root(uint32_t rss_level)
4195 {
4196         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
4197                                MLX5_EXPANSION_ROOT_OUTER;
4198 }
4199
4200 /**
4201  *  Get layer flags from the prefix flow.
4202  *
4203  *  Some flows may be split to several subflows, the prefix subflow gets the
4204  *  match items and the suffix sub flow gets the actions.
4205  *  Some actions need the user defined match item flags to get the detail for
4206  *  the action.
4207  *  This function helps the suffix flow to get the item layer flags from prefix
4208  *  subflow.
4209  *
4210  * @param[in] dev_flow
4211  *   Pointer the created prefix subflow.
4212  *
4213  * @return
4214  *   The layers get from prefix subflow.
4215  */
4216 static inline uint64_t
4217 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
4218 {
4219         uint64_t layers = 0;
4220
4221         /*
4222          * Layers bits could be localization, but usually the compiler will
4223          * help to do the optimization work for source code.
4224          * If no decap actions, use the layers directly.
4225          */
4226         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
4227                 return dev_flow->handle->layers;
4228         /* Convert L3 layers with decap action. */
4229         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
4230                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4231         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
4232                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4233         /* Convert L4 layers with decap action.  */
4234         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
4235                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
4236         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
4237                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
4238         return layers;
4239 }
4240
4241 /**
4242  * Get metadata split action information.
4243  *
4244  * @param[in] actions
4245  *   Pointer to the list of actions.
4246  * @param[out] qrss
4247  *   Pointer to the return pointer.
4248  * @param[out] qrss_type
4249  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
4250  *   if no QUEUE/RSS is found.
4251  * @param[out] encap_idx
4252  *   Pointer to the index of the encap action if exists, otherwise the last
4253  *   action index.
4254  *
4255  * @return
4256  *   Total number of actions.
4257  */
4258 static int
4259 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
4260                                        const struct rte_flow_action **qrss,
4261                                        int *encap_idx)
4262 {
4263         const struct rte_flow_action_raw_encap *raw_encap;
4264         int actions_n = 0;
4265         int raw_decap_idx = -1;
4266
4267         *encap_idx = -1;
4268         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4269                 switch (actions->type) {
4270                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4271                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4272                         *encap_idx = actions_n;
4273                         break;
4274                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4275                         raw_decap_idx = actions_n;
4276                         break;
4277                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4278                         raw_encap = actions->conf;
4279                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4280                                 *encap_idx = raw_decap_idx != -1 ?
4281                                                       raw_decap_idx : actions_n;
4282                         break;
4283                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4284                 case RTE_FLOW_ACTION_TYPE_RSS:
4285                         *qrss = actions;
4286                         break;
4287                 default:
4288                         break;
4289                 }
4290                 actions_n++;
4291         }
4292         if (*encap_idx == -1)
4293                 *encap_idx = actions_n;
4294         /* Count RTE_FLOW_ACTION_TYPE_END. */
4295         return actions_n + 1;
4296 }
4297
4298 /**
4299  * Check if the action will change packet.
4300  *
4301  * @param dev
4302  *   Pointer to Ethernet device.
4303  * @param[in] type
4304  *   action type.
4305  *
4306  * @return
4307  *   true if action will change packet, false otherwise.
4308  */
4309 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
4310                                           enum rte_flow_action_type type)
4311 {
4312         struct mlx5_priv *priv = dev->data->dev_private;
4313
4314         switch (type) {
4315         case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4316         case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4317         case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4318         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4319         case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4320         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4321         case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4322         case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4323         case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4324         case RTE_FLOW_ACTION_TYPE_SET_TTL:
4325         case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4326         case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4327         case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4328         case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4329         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4330         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
4331         case RTE_FLOW_ACTION_TYPE_SET_META:
4332         case RTE_FLOW_ACTION_TYPE_SET_TAG:
4333         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4334         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4335         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4336         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4337         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4338         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4339         case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4340         case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4341         case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4342         case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4343         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
4344                 return true;
4345         case RTE_FLOW_ACTION_TYPE_FLAG:
4346         case RTE_FLOW_ACTION_TYPE_MARK:
4347                 if (priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
4348                         return true;
4349                 else
4350                         return false;
4351         default:
4352                 return false;
4353         }
4354 }
4355
4356 /**
4357  * Check meter action from the action list.
4358  *
4359  * @param dev
4360  *   Pointer to Ethernet device.
4361  * @param[in] actions
4362  *   Pointer to the list of actions.
4363  * @param[out] has_mtr
4364  *   Pointer to the meter exist flag.
4365  * @param[out] has_modify
4366  *   Pointer to the flag showing there's packet change action.
4367  * @param[out] meter_id
4368  *   Pointer to the meter id.
4369  *
4370  * @return
4371  *   Total number of actions.
4372  */
4373 static int
4374 flow_check_meter_action(struct rte_eth_dev *dev,
4375                         const struct rte_flow_action actions[],
4376                         bool *has_mtr, bool *has_modify, uint32_t *meter_id)
4377 {
4378         const struct rte_flow_action_meter *mtr = NULL;
4379         int actions_n = 0;
4380
4381         MLX5_ASSERT(has_mtr);
4382         *has_mtr = false;
4383         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4384                 switch (actions->type) {
4385                 case RTE_FLOW_ACTION_TYPE_METER:
4386                         mtr = actions->conf;
4387                         *meter_id = mtr->mtr_id;
4388                         *has_mtr = true;
4389                         break;
4390                 default:
4391                         break;
4392                 }
4393                 if (!*has_mtr)
4394                         *has_modify |= flow_check_modify_action_type(dev,
4395                                                                 actions->type);
4396                 actions_n++;
4397         }
4398         /* Count RTE_FLOW_ACTION_TYPE_END. */
4399         return actions_n + 1;
4400 }
4401
4402 /**
4403  * Check if the flow should be split due to hairpin.
4404  * The reason for the split is that in current HW we can't
4405  * support encap and push-vlan on Rx, so if a flow contains
4406  * these actions we move it to Tx.
4407  *
4408  * @param dev
4409  *   Pointer to Ethernet device.
4410  * @param[in] attr
4411  *   Flow rule attributes.
4412  * @param[in] actions
4413  *   Associated actions (list terminated by the END action).
4414  *
4415  * @return
4416  *   > 0 the number of actions and the flow should be split,
4417  *   0 when no split required.
4418  */
4419 static int
4420 flow_check_hairpin_split(struct rte_eth_dev *dev,
4421                          const struct rte_flow_attr *attr,
4422                          const struct rte_flow_action actions[])
4423 {
4424         int queue_action = 0;
4425         int action_n = 0;
4426         int split = 0;
4427         const struct rte_flow_action_queue *queue;
4428         const struct rte_flow_action_rss *rss;
4429         const struct rte_flow_action_raw_encap *raw_encap;
4430         const struct rte_eth_hairpin_conf *conf;
4431
4432         if (!attr->ingress)
4433                 return 0;
4434         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4435                 switch (actions->type) {
4436                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4437                         queue = actions->conf;
4438                         if (queue == NULL)
4439                                 return 0;
4440                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
4441                         if (conf == NULL || conf->tx_explicit != 0)
4442                                 return 0;
4443                         queue_action = 1;
4444                         action_n++;
4445                         break;
4446                 case RTE_FLOW_ACTION_TYPE_RSS:
4447                         rss = actions->conf;
4448                         if (rss == NULL || rss->queue_num == 0)
4449                                 return 0;
4450                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
4451                         if (conf == NULL || conf->tx_explicit != 0)
4452                                 return 0;
4453                         queue_action = 1;
4454                         action_n++;
4455                         break;
4456                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4457                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4458                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4459                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4460                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4461                         split++;
4462                         action_n++;
4463                         break;
4464                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4465                         raw_encap = actions->conf;
4466                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4467                                 split++;
4468                         action_n++;
4469                         break;
4470                 default:
4471                         action_n++;
4472                         break;
4473                 }
4474         }
4475         if (split && queue_action)
4476                 return action_n;
4477         return 0;
4478 }
4479
4480 /* Declare flow create/destroy prototype in advance. */
4481 static uint32_t
4482 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4483                  const struct rte_flow_attr *attr,
4484                  const struct rte_flow_item items[],
4485                  const struct rte_flow_action actions[],
4486                  bool external, struct rte_flow_error *error);
4487
4488 static void
4489 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4490                   uint32_t flow_idx);
4491
4492 int
4493 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused,
4494                       struct mlx5_list_entry *entry, void *cb_ctx)
4495 {
4496         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4497         struct mlx5_flow_mreg_copy_resource *mcp_res =
4498                                container_of(entry, typeof(*mcp_res), hlist_ent);
4499
4500         return mcp_res->mark_id != *(uint32_t *)(ctx->data);
4501 }
4502
4503 struct mlx5_list_entry *
4504 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx)
4505 {
4506         struct rte_eth_dev *dev = tool_ctx;
4507         struct mlx5_priv *priv = dev->data->dev_private;
4508         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4509         struct mlx5_flow_mreg_copy_resource *mcp_res;
4510         struct rte_flow_error *error = ctx->error;
4511         uint32_t idx = 0;
4512         int ret;
4513         uint32_t mark_id = *(uint32_t *)(ctx->data);
4514         struct rte_flow_attr attr = {
4515                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4516                 .ingress = 1,
4517         };
4518         struct mlx5_rte_flow_item_tag tag_spec = {
4519                 .data = mark_id,
4520         };
4521         struct rte_flow_item items[] = {
4522                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
4523         };
4524         struct rte_flow_action_mark ftag = {
4525                 .id = mark_id,
4526         };
4527         struct mlx5_flow_action_copy_mreg cp_mreg = {
4528                 .dst = REG_B,
4529                 .src = REG_NON,
4530         };
4531         struct rte_flow_action_jump jump = {
4532                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4533         };
4534         struct rte_flow_action actions[] = {
4535                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
4536         };
4537
4538         /* Fill the register fields in the flow. */
4539         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
4540         if (ret < 0)
4541                 return NULL;
4542         tag_spec.id = ret;
4543         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4544         if (ret < 0)
4545                 return NULL;
4546         cp_mreg.src = ret;
4547         /* Provide the full width of FLAG specific value. */
4548         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
4549                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
4550         /* Build a new flow. */
4551         if (mark_id != MLX5_DEFAULT_COPY_ID) {
4552                 items[0] = (struct rte_flow_item){
4553                         .type = (enum rte_flow_item_type)
4554                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4555                         .spec = &tag_spec,
4556                 };
4557                 items[1] = (struct rte_flow_item){
4558                         .type = RTE_FLOW_ITEM_TYPE_END,
4559                 };
4560                 actions[0] = (struct rte_flow_action){
4561                         .type = (enum rte_flow_action_type)
4562                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4563                         .conf = &ftag,
4564                 };
4565                 actions[1] = (struct rte_flow_action){
4566                         .type = (enum rte_flow_action_type)
4567                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4568                         .conf = &cp_mreg,
4569                 };
4570                 actions[2] = (struct rte_flow_action){
4571                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4572                         .conf = &jump,
4573                 };
4574                 actions[3] = (struct rte_flow_action){
4575                         .type = RTE_FLOW_ACTION_TYPE_END,
4576                 };
4577         } else {
4578                 /* Default rule, wildcard match. */
4579                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4580                 items[0] = (struct rte_flow_item){
4581                         .type = RTE_FLOW_ITEM_TYPE_END,
4582                 };
4583                 actions[0] = (struct rte_flow_action){
4584                         .type = (enum rte_flow_action_type)
4585                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4586                         .conf = &cp_mreg,
4587                 };
4588                 actions[1] = (struct rte_flow_action){
4589                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4590                         .conf = &jump,
4591                 };
4592                 actions[2] = (struct rte_flow_action){
4593                         .type = RTE_FLOW_ACTION_TYPE_END,
4594                 };
4595         }
4596         /* Build a new entry. */
4597         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4598         if (!mcp_res) {
4599                 rte_errno = ENOMEM;
4600                 return NULL;
4601         }
4602         mcp_res->idx = idx;
4603         mcp_res->mark_id = mark_id;
4604         /*
4605          * The copy Flows are not included in any list. There
4606          * ones are referenced from other Flows and can not
4607          * be applied, removed, deleted in arbitrary order
4608          * by list traversing.
4609          */
4610         mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP,
4611                                         &attr, items, actions, false, error);
4612         if (!mcp_res->rix_flow) {
4613                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4614                 return NULL;
4615         }
4616         return &mcp_res->hlist_ent;
4617 }
4618
4619 struct mlx5_list_entry *
4620 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
4621                       void *cb_ctx __rte_unused)
4622 {
4623         struct rte_eth_dev *dev = tool_ctx;
4624         struct mlx5_priv *priv = dev->data->dev_private;
4625         struct mlx5_flow_mreg_copy_resource *mcp_res;
4626         uint32_t idx = 0;
4627
4628         mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4629         if (!mcp_res) {
4630                 rte_errno = ENOMEM;
4631                 return NULL;
4632         }
4633         memcpy(mcp_res, oentry, sizeof(*mcp_res));
4634         mcp_res->idx = idx;
4635         return &mcp_res->hlist_ent;
4636 }
4637
4638 void
4639 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4640 {
4641         struct mlx5_flow_mreg_copy_resource *mcp_res =
4642                                container_of(entry, typeof(*mcp_res), hlist_ent);
4643         struct rte_eth_dev *dev = tool_ctx;
4644         struct mlx5_priv *priv = dev->data->dev_private;
4645
4646         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4647 }
4648
4649 /**
4650  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4651  *
4652  * As mark_id is unique, if there's already a registered flow for the mark_id,
4653  * return by increasing the reference counter of the resource. Otherwise, create
4654  * the resource (mcp_res) and flow.
4655  *
4656  * Flow looks like,
4657  *   - If ingress port is ANY and reg_c[1] is mark_id,
4658  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4659  *
4660  * For default flow (zero mark_id), flow is like,
4661  *   - If ingress port is ANY,
4662  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
4663  *
4664  * @param dev
4665  *   Pointer to Ethernet device.
4666  * @param mark_id
4667  *   ID of MARK action, zero means default flow for META.
4668  * @param[out] error
4669  *   Perform verbose error reporting if not NULL.
4670  *
4671  * @return
4672  *   Associated resource on success, NULL otherwise and rte_errno is set.
4673  */
4674 static struct mlx5_flow_mreg_copy_resource *
4675 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4676                           struct rte_flow_error *error)
4677 {
4678         struct mlx5_priv *priv = dev->data->dev_private;
4679         struct mlx5_list_entry *entry;
4680         struct mlx5_flow_cb_ctx ctx = {
4681                 .dev = dev,
4682                 .error = error,
4683                 .data = &mark_id,
4684         };
4685
4686         /* Check if already registered. */
4687         MLX5_ASSERT(priv->mreg_cp_tbl);
4688         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4689         if (!entry)
4690                 return NULL;
4691         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4692                             hlist_ent);
4693 }
4694
4695 void
4696 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4697 {
4698         struct mlx5_flow_mreg_copy_resource *mcp_res =
4699                                container_of(entry, typeof(*mcp_res), hlist_ent);
4700         struct rte_eth_dev *dev = tool_ctx;
4701         struct mlx5_priv *priv = dev->data->dev_private;
4702
4703         MLX5_ASSERT(mcp_res->rix_flow);
4704         flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow);
4705         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4706 }
4707
4708 /**
4709  * Release flow in RX_CP_TBL.
4710  *
4711  * @param dev
4712  *   Pointer to Ethernet device.
4713  * @flow
4714  *   Parent flow for wich copying is provided.
4715  */
4716 static void
4717 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4718                           struct rte_flow *flow)
4719 {
4720         struct mlx5_flow_mreg_copy_resource *mcp_res;
4721         struct mlx5_priv *priv = dev->data->dev_private;
4722
4723         if (!flow->rix_mreg_copy)
4724                 return;
4725         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4726                                  flow->rix_mreg_copy);
4727         if (!mcp_res || !priv->mreg_cp_tbl)
4728                 return;
4729         MLX5_ASSERT(mcp_res->rix_flow);
4730         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4731         flow->rix_mreg_copy = 0;
4732 }
4733
4734 /**
4735  * Remove the default copy action from RX_CP_TBL.
4736  *
4737  * This functions is called in the mlx5_dev_start(). No thread safe
4738  * is guaranteed.
4739  *
4740  * @param dev
4741  *   Pointer to Ethernet device.
4742  */
4743 static void
4744 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4745 {
4746         struct mlx5_list_entry *entry;
4747         struct mlx5_priv *priv = dev->data->dev_private;
4748         struct mlx5_flow_cb_ctx ctx;
4749         uint32_t mark_id;
4750
4751         /* Check if default flow is registered. */
4752         if (!priv->mreg_cp_tbl)
4753                 return;
4754         mark_id = MLX5_DEFAULT_COPY_ID;
4755         ctx.data = &mark_id;
4756         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx);
4757         if (!entry)
4758                 return;
4759         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4760 }
4761
4762 /**
4763  * Add the default copy action in in RX_CP_TBL.
4764  *
4765  * This functions is called in the mlx5_dev_start(). No thread safe
4766  * is guaranteed.
4767  *
4768  * @param dev
4769  *   Pointer to Ethernet device.
4770  * @param[out] error
4771  *   Perform verbose error reporting if not NULL.
4772  *
4773  * @return
4774  *   0 for success, negative value otherwise and rte_errno is set.
4775  */
4776 static int
4777 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4778                                   struct rte_flow_error *error)
4779 {
4780         struct mlx5_priv *priv = dev->data->dev_private;
4781         struct mlx5_flow_mreg_copy_resource *mcp_res;
4782         struct mlx5_flow_cb_ctx ctx;
4783         uint32_t mark_id;
4784
4785         /* Check whether extensive metadata feature is engaged. */
4786         if (!priv->sh->config.dv_flow_en ||
4787             priv->sh->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4788             !mlx5_flow_ext_mreg_supported(dev) ||
4789             !priv->sh->dv_regc0_mask)
4790                 return 0;
4791         /*
4792          * Add default mreg copy flow may be called multiple time, but
4793          * only be called once in stop. Avoid register it twice.
4794          */
4795         mark_id = MLX5_DEFAULT_COPY_ID;
4796         ctx.data = &mark_id;
4797         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx))
4798                 return 0;
4799         mcp_res = flow_mreg_add_copy_action(dev, mark_id, error);
4800         if (!mcp_res)
4801                 return -rte_errno;
4802         return 0;
4803 }
4804
4805 /**
4806  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4807  *
4808  * All the flow having Q/RSS action should be split by
4809  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4810  * performs the following,
4811  *   - CQE->flow_tag := reg_c[1] (MARK)
4812  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4813  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4814  * but there should be a flow per each MARK ID set by MARK action.
4815  *
4816  * For the aforementioned reason, if there's a MARK action in flow's action
4817  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4818  * the MARK ID to CQE's flow_tag like,
4819  *   - If reg_c[1] is mark_id,
4820  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4821  *
4822  * For SET_META action which stores value in reg_c[0], as the destination is
4823  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4824  * MARK ID means the default flow. The default flow looks like,
4825  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4826  *
4827  * @param dev
4828  *   Pointer to Ethernet device.
4829  * @param flow
4830  *   Pointer to flow structure.
4831  * @param[in] actions
4832  *   Pointer to the list of actions.
4833  * @param[out] error
4834  *   Perform verbose error reporting if not NULL.
4835  *
4836  * @return
4837  *   0 on success, negative value otherwise and rte_errno is set.
4838  */
4839 static int
4840 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4841                             struct rte_flow *flow,
4842                             const struct rte_flow_action *actions,
4843                             struct rte_flow_error *error)
4844 {
4845         struct mlx5_priv *priv = dev->data->dev_private;
4846         struct mlx5_sh_config *config = &priv->sh->config;
4847         struct mlx5_flow_mreg_copy_resource *mcp_res;
4848         const struct rte_flow_action_mark *mark;
4849
4850         /* Check whether extensive metadata feature is engaged. */
4851         if (!config->dv_flow_en ||
4852             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4853             !mlx5_flow_ext_mreg_supported(dev) ||
4854             !priv->sh->dv_regc0_mask)
4855                 return 0;
4856         /* Find MARK action. */
4857         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4858                 switch (actions->type) {
4859                 case RTE_FLOW_ACTION_TYPE_FLAG:
4860                         mcp_res = flow_mreg_add_copy_action
4861                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4862                         if (!mcp_res)
4863                                 return -rte_errno;
4864                         flow->rix_mreg_copy = mcp_res->idx;
4865                         return 0;
4866                 case RTE_FLOW_ACTION_TYPE_MARK:
4867                         mark = (const struct rte_flow_action_mark *)
4868                                 actions->conf;
4869                         mcp_res =
4870                                 flow_mreg_add_copy_action(dev, mark->id, error);
4871                         if (!mcp_res)
4872                                 return -rte_errno;
4873                         flow->rix_mreg_copy = mcp_res->idx;
4874                         return 0;
4875                 default:
4876                         break;
4877                 }
4878         }
4879         return 0;
4880 }
4881
4882 #define MLX5_MAX_SPLIT_ACTIONS 24
4883 #define MLX5_MAX_SPLIT_ITEMS 24
4884
4885 /**
4886  * Split the hairpin flow.
4887  * Since HW can't support encap and push-vlan on Rx, we move these
4888  * actions to Tx.
4889  * If the count action is after the encap then we also
4890  * move the count action. in this case the count will also measure
4891  * the outer bytes.
4892  *
4893  * @param dev
4894  *   Pointer to Ethernet device.
4895  * @param[in] actions
4896  *   Associated actions (list terminated by the END action).
4897  * @param[out] actions_rx
4898  *   Rx flow actions.
4899  * @param[out] actions_tx
4900  *   Tx flow actions..
4901  * @param[out] pattern_tx
4902  *   The pattern items for the Tx flow.
4903  * @param[out] flow_id
4904  *   The flow ID connected to this flow.
4905  *
4906  * @return
4907  *   0 on success.
4908  */
4909 static int
4910 flow_hairpin_split(struct rte_eth_dev *dev,
4911                    const struct rte_flow_action actions[],
4912                    struct rte_flow_action actions_rx[],
4913                    struct rte_flow_action actions_tx[],
4914                    struct rte_flow_item pattern_tx[],
4915                    uint32_t flow_id)
4916 {
4917         const struct rte_flow_action_raw_encap *raw_encap;
4918         const struct rte_flow_action_raw_decap *raw_decap;
4919         struct mlx5_rte_flow_action_set_tag *set_tag;
4920         struct rte_flow_action *tag_action;
4921         struct mlx5_rte_flow_item_tag *tag_item;
4922         struct rte_flow_item *item;
4923         char *addr;
4924         int encap = 0;
4925
4926         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4927                 switch (actions->type) {
4928                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4929                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4930                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4931                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4932                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4933                         rte_memcpy(actions_tx, actions,
4934                                sizeof(struct rte_flow_action));
4935                         actions_tx++;
4936                         break;
4937                 case RTE_FLOW_ACTION_TYPE_COUNT:
4938                         if (encap) {
4939                                 rte_memcpy(actions_tx, actions,
4940                                            sizeof(struct rte_flow_action));
4941                                 actions_tx++;
4942                         } else {
4943                                 rte_memcpy(actions_rx, actions,
4944                                            sizeof(struct rte_flow_action));
4945                                 actions_rx++;
4946                         }
4947                         break;
4948                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4949                         raw_encap = actions->conf;
4950                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4951                                 memcpy(actions_tx, actions,
4952                                        sizeof(struct rte_flow_action));
4953                                 actions_tx++;
4954                                 encap = 1;
4955                         } else {
4956                                 rte_memcpy(actions_rx, actions,
4957                                            sizeof(struct rte_flow_action));
4958                                 actions_rx++;
4959                         }
4960                         break;
4961                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4962                         raw_decap = actions->conf;
4963                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4964                                 memcpy(actions_tx, actions,
4965                                        sizeof(struct rte_flow_action));
4966                                 actions_tx++;
4967                         } else {
4968                                 rte_memcpy(actions_rx, actions,
4969                                            sizeof(struct rte_flow_action));
4970                                 actions_rx++;
4971                         }
4972                         break;
4973                 default:
4974                         rte_memcpy(actions_rx, actions,
4975                                    sizeof(struct rte_flow_action));
4976                         actions_rx++;
4977                         break;
4978                 }
4979         }
4980         /* Add set meta action and end action for the Rx flow. */
4981         tag_action = actions_rx;
4982         tag_action->type = (enum rte_flow_action_type)
4983                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4984         actions_rx++;
4985         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4986         actions_rx++;
4987         set_tag = (void *)actions_rx;
4988         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4989                 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4990                 .data = flow_id,
4991         };
4992         MLX5_ASSERT(set_tag->id > REG_NON);
4993         tag_action->conf = set_tag;
4994         /* Create Tx item list. */
4995         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4996         addr = (void *)&pattern_tx[2];
4997         item = pattern_tx;
4998         item->type = (enum rte_flow_item_type)
4999                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
5000         tag_item = (void *)addr;
5001         tag_item->data = flow_id;
5002         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
5003         MLX5_ASSERT(set_tag->id > REG_NON);
5004         item->spec = tag_item;
5005         addr += sizeof(struct mlx5_rte_flow_item_tag);
5006         tag_item = (void *)addr;
5007         tag_item->data = UINT32_MAX;
5008         tag_item->id = UINT16_MAX;
5009         item->mask = tag_item;
5010         item->last = NULL;
5011         item++;
5012         item->type = RTE_FLOW_ITEM_TYPE_END;
5013         return 0;
5014 }
5015
5016 /**
5017  * The last stage of splitting chain, just creates the subflow
5018  * without any modification.
5019  *
5020  * @param[in] dev
5021  *   Pointer to Ethernet device.
5022  * @param[in] flow
5023  *   Parent flow structure pointer.
5024  * @param[in, out] sub_flow
5025  *   Pointer to return the created subflow, may be NULL.
5026  * @param[in] attr
5027  *   Flow rule attributes.
5028  * @param[in] items
5029  *   Pattern specification (list terminated by the END pattern item).
5030  * @param[in] actions
5031  *   Associated actions (list terminated by the END action).
5032  * @param[in] flow_split_info
5033  *   Pointer to flow split info structure.
5034  * @param[out] error
5035  *   Perform verbose error reporting if not NULL.
5036  * @return
5037  *   0 on success, negative value otherwise
5038  */
5039 static int
5040 flow_create_split_inner(struct rte_eth_dev *dev,
5041                         struct rte_flow *flow,
5042                         struct mlx5_flow **sub_flow,
5043                         const struct rte_flow_attr *attr,
5044                         const struct rte_flow_item items[],
5045                         const struct rte_flow_action actions[],
5046                         struct mlx5_flow_split_info *flow_split_info,
5047                         struct rte_flow_error *error)
5048 {
5049         struct mlx5_flow *dev_flow;
5050         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5051
5052         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
5053                                     flow_split_info->flow_idx, error);
5054         if (!dev_flow)
5055                 return -rte_errno;
5056         dev_flow->flow = flow;
5057         dev_flow->external = flow_split_info->external;
5058         dev_flow->skip_scale = flow_split_info->skip_scale;
5059         /* Subflow object was created, we must include one in the list. */
5060         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
5061                       dev_flow->handle, next);
5062         /*
5063          * If dev_flow is as one of the suffix flow, some actions in suffix
5064          * flow may need some user defined item layer flags, and pass the
5065          * Metadata rxq mark flag to suffix flow as well.
5066          */
5067         if (flow_split_info->prefix_layers)
5068                 dev_flow->handle->layers = flow_split_info->prefix_layers;
5069         if (flow_split_info->prefix_mark) {
5070                 MLX5_ASSERT(wks);
5071                 wks->mark = 1;
5072         }
5073         if (sub_flow)
5074                 *sub_flow = dev_flow;
5075 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5076         dev_flow->dv.table_id = flow_split_info->table_id;
5077 #endif
5078         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
5079 }
5080
5081 /**
5082  * Get the sub policy of a meter.
5083  *
5084  * @param[in] dev
5085  *   Pointer to Ethernet device.
5086  * @param[in] flow
5087  *   Parent flow structure pointer.
5088  * @param wks
5089  *   Pointer to thread flow work space.
5090  * @param[in] attr
5091  *   Flow rule attributes.
5092  * @param[in] items
5093  *   Pattern specification (list terminated by the END pattern item).
5094  * @param[out] error
5095  *   Perform verbose error reporting if not NULL.
5096  *
5097  * @return
5098  *   Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
5099  */
5100 static struct mlx5_flow_meter_sub_policy *
5101 get_meter_sub_policy(struct rte_eth_dev *dev,
5102                      struct rte_flow *flow,
5103                      struct mlx5_flow_workspace *wks,
5104                      const struct rte_flow_attr *attr,
5105                      const struct rte_flow_item items[],
5106                      struct rte_flow_error *error)
5107 {
5108         struct mlx5_flow_meter_policy *policy;
5109         struct mlx5_flow_meter_policy *final_policy;
5110         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
5111
5112         policy = wks->policy;
5113         final_policy = policy->is_hierarchy ? wks->final_policy : policy;
5114         if (final_policy->is_rss || final_policy->is_queue) {
5115                 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
5116                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
5117                 uint32_t i;
5118
5119                 /*
5120                  * This is a tmp dev_flow,
5121                  * no need to register any matcher for it in translate.
5122                  */
5123                 wks->skip_matcher_reg = 1;
5124                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
5125                         struct mlx5_flow dev_flow = {0};
5126                         struct mlx5_flow_handle dev_handle = { {0} };
5127                         uint8_t fate = final_policy->act_cnt[i].fate_action;
5128
5129                         if (fate == MLX5_FLOW_FATE_SHARED_RSS) {
5130                                 const struct rte_flow_action_rss *rss_act =
5131                                         final_policy->act_cnt[i].rss->conf;
5132                                 struct rte_flow_action rss_actions[2] = {
5133                                         [0] = {
5134                                         .type = RTE_FLOW_ACTION_TYPE_RSS,
5135                                         .conf = rss_act,
5136                                         },
5137                                         [1] = {
5138                                         .type = RTE_FLOW_ACTION_TYPE_END,
5139                                         .conf = NULL,
5140                                         }
5141                                 };
5142
5143                                 dev_flow.handle = &dev_handle;
5144                                 dev_flow.ingress = attr->ingress;
5145                                 dev_flow.flow = flow;
5146                                 dev_flow.external = 0;
5147 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5148                                 dev_flow.dv.transfer = attr->transfer;
5149 #endif
5150                                 /**
5151                                  * Translate RSS action to get rss hash fields.
5152                                  */
5153                                 if (flow_drv_translate(dev, &dev_flow, attr,
5154                                                 items, rss_actions, error))
5155                                         goto exit;
5156                                 rss_desc_v[i] = wks->rss_desc;
5157                                 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
5158                                 rss_desc_v[i].hash_fields =
5159                                                 dev_flow.hash_fields;
5160                                 rss_desc_v[i].queue_num =
5161                                                 rss_desc_v[i].hash_fields ?
5162                                                 rss_desc_v[i].queue_num : 1;
5163                                 rss_desc_v[i].tunnel =
5164                                                 !!(dev_flow.handle->layers &
5165                                                    MLX5_FLOW_LAYER_TUNNEL);
5166                                 /* Use the RSS queues in the containers. */
5167                                 rss_desc_v[i].queue =
5168                                         (uint16_t *)(uintptr_t)rss_act->queue;
5169                                 rss_desc[i] = &rss_desc_v[i];
5170                         } else if (fate == MLX5_FLOW_FATE_QUEUE) {
5171                                 /* This is queue action. */
5172                                 rss_desc_v[i] = wks->rss_desc;
5173                                 rss_desc_v[i].key_len = 0;
5174                                 rss_desc_v[i].hash_fields = 0;
5175                                 rss_desc_v[i].queue =
5176                                         &final_policy->act_cnt[i].queue;
5177                                 rss_desc_v[i].queue_num = 1;
5178                                 rss_desc[i] = &rss_desc_v[i];
5179                         } else {
5180                                 rss_desc[i] = NULL;
5181                         }
5182                 }
5183                 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
5184                                                 flow, policy, rss_desc);
5185         } else {
5186                 enum mlx5_meter_domain mtr_domain =
5187                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
5188                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
5189                                                 MLX5_MTR_DOMAIN_INGRESS);
5190                 sub_policy = policy->sub_policys[mtr_domain][0];
5191         }
5192         if (!sub_policy)
5193                 rte_flow_error_set(error, EINVAL,
5194                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5195                                    "Failed to get meter sub-policy.");
5196 exit:
5197         return sub_policy;
5198 }
5199
5200 /**
5201  * Split the meter flow.
5202  *
5203  * As meter flow will split to three sub flow, other than meter
5204  * action, the other actions make sense to only meter accepts
5205  * the packet. If it need to be dropped, no other additional
5206  * actions should be take.
5207  *
5208  * One kind of special action which decapsulates the L3 tunnel
5209  * header will be in the prefix sub flow, as not to take the
5210  * L3 tunnel header into account.
5211  *
5212  * @param[in] dev
5213  *   Pointer to Ethernet device.
5214  * @param[in] flow
5215  *   Parent flow structure pointer.
5216  * @param wks
5217  *   Pointer to thread flow work space.
5218  * @param[in] attr
5219  *   Flow rule attributes.
5220  * @param[in] items
5221  *   Pattern specification (list terminated by the END pattern item).
5222  * @param[out] sfx_items
5223  *   Suffix flow match items (list terminated by the END pattern item).
5224  * @param[in] actions
5225  *   Associated actions (list terminated by the END action).
5226  * @param[out] actions_sfx
5227  *   Suffix flow actions.
5228  * @param[out] actions_pre
5229  *   Prefix flow actions.
5230  * @param[out] mtr_flow_id
5231  *   Pointer to meter flow id.
5232  * @param[out] error
5233  *   Perform verbose error reporting if not NULL.
5234  *
5235  * @return
5236  *   0 on success, a negative errno value otherwise and rte_errno is set.
5237  */
5238 static int
5239 flow_meter_split_prep(struct rte_eth_dev *dev,
5240                       struct rte_flow *flow,
5241                       struct mlx5_flow_workspace *wks,
5242                       const struct rte_flow_attr *attr,
5243                       const struct rte_flow_item items[],
5244                       struct rte_flow_item sfx_items[],
5245                       const struct rte_flow_action actions[],
5246                       struct rte_flow_action actions_sfx[],
5247                       struct rte_flow_action actions_pre[],
5248                       uint32_t *mtr_flow_id,
5249                       struct rte_flow_error *error)
5250 {
5251         struct mlx5_priv *priv = dev->data->dev_private;
5252         struct mlx5_flow_meter_info *fm = wks->fm;
5253         struct rte_flow_action *tag_action = NULL;
5254         struct rte_flow_item *tag_item;
5255         struct mlx5_rte_flow_action_set_tag *set_tag;
5256         const struct rte_flow_action_raw_encap *raw_encap;
5257         const struct rte_flow_action_raw_decap *raw_decap;
5258         struct mlx5_rte_flow_item_tag *tag_item_spec;
5259         struct mlx5_rte_flow_item_tag *tag_item_mask;
5260         uint32_t tag_id = 0;
5261         struct rte_flow_item *vlan_item_dst = NULL;
5262         const struct rte_flow_item *vlan_item_src = NULL;
5263         const struct rte_flow_item *orig_items = items;
5264         struct rte_flow_action *hw_mtr_action;
5265         struct rte_flow_action *action_pre_head = NULL;
5266         int32_t flow_src_port = priv->representor_id;
5267         bool mtr_first;
5268         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
5269         uint8_t mtr_reg_bits = priv->mtr_reg_share ?
5270                                 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
5271         uint32_t flow_id = 0;
5272         uint32_t flow_id_reversed = 0;
5273         uint8_t flow_id_bits = 0;
5274         int shift;
5275
5276         /* Prepare the suffix subflow items. */
5277         tag_item = sfx_items++;
5278         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
5279                 struct mlx5_priv *port_priv;
5280                 const struct rte_flow_item_port_id *pid_v;
5281                 int item_type = items->type;
5282
5283                 switch (item_type) {
5284                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
5285                         pid_v = items->spec;
5286                         MLX5_ASSERT(pid_v);
5287                         port_priv = mlx5_port_to_eswitch_info(pid_v->id, false);
5288                         if (!port_priv)
5289                                 return rte_flow_error_set(error,
5290                                                 rte_errno,
5291                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5292                                                 pid_v,
5293                                                 "Failed to get port info.");
5294                         flow_src_port = port_priv->representor_id;
5295                         if (!fm->def_policy && wks->policy->is_hierarchy &&
5296                             flow_src_port != priv->representor_id) {
5297                                 if (flow_drv_mtr_hierarchy_rule_create(dev,
5298                                                                 flow, fm,
5299                                                                 flow_src_port,
5300                                                                 items,
5301                                                                 error))
5302                                         return -rte_errno;
5303                         }
5304                         memcpy(sfx_items, items, sizeof(*sfx_items));
5305                         sfx_items++;
5306                         break;
5307                 case RTE_FLOW_ITEM_TYPE_VLAN:
5308                         /* Determine if copy vlan item below. */
5309                         vlan_item_src = items;
5310                         vlan_item_dst = sfx_items++;
5311                         vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID;
5312                         break;
5313                 default:
5314                         break;
5315                 }
5316         }
5317         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
5318         sfx_items++;
5319         mtr_first = priv->sh->meter_aso_en &&
5320                 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX));
5321         /* For ASO meter, meter must be before tag in TX direction. */
5322         if (mtr_first) {
5323                 action_pre_head = actions_pre++;
5324                 /* Leave space for tag action. */
5325                 tag_action = actions_pre++;
5326         }
5327         /* Prepare the actions for prefix and suffix flow. */
5328         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5329                 struct rte_flow_action *action_cur = NULL;
5330
5331                 switch (actions->type) {
5332                 case RTE_FLOW_ACTION_TYPE_METER:
5333                         if (mtr_first) {
5334                                 action_cur = action_pre_head;
5335                         } else {
5336                                 /* Leave space for tag action. */
5337                                 tag_action = actions_pre++;
5338                                 action_cur = actions_pre++;
5339                         }
5340                         break;
5341                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5342                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5343                         action_cur = actions_pre++;
5344                         break;
5345                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5346                         raw_encap = actions->conf;
5347                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
5348                                 action_cur = actions_pre++;
5349                         break;
5350                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5351                         raw_decap = actions->conf;
5352                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
5353                                 action_cur = actions_pre++;
5354                         break;
5355                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5356                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5357                         if (vlan_item_dst && vlan_item_src) {
5358                                 memcpy(vlan_item_dst, vlan_item_src,
5359                                         sizeof(*vlan_item_dst));
5360                                 /*
5361                                  * Convert to internal match item, it is used
5362                                  * for vlan push and set vid.
5363                                  */
5364                                 vlan_item_dst->type = (enum rte_flow_item_type)
5365                                                 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
5366                         }
5367                         break;
5368                 default:
5369                         break;
5370                 }
5371                 if (!action_cur)
5372                         action_cur = (fm->def_policy) ?
5373                                         actions_sfx++ : actions_pre++;
5374                 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
5375         }
5376         /* Add end action to the actions. */
5377         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
5378         if (priv->sh->meter_aso_en) {
5379                 /**
5380                  * For ASO meter, need to add an extra jump action explicitly,
5381                  * to jump from meter to policer table.
5382                  */
5383                 struct mlx5_flow_meter_sub_policy *sub_policy;
5384                 struct mlx5_flow_tbl_data_entry *tbl_data;
5385
5386                 if (!fm->def_policy) {
5387                         sub_policy = get_meter_sub_policy(dev, flow, wks,
5388                                                           attr, orig_items,
5389                                                           error);
5390                         if (!sub_policy)
5391                                 return -rte_errno;
5392                 } else {
5393                         enum mlx5_meter_domain mtr_domain =
5394                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
5395                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
5396                                                 MLX5_MTR_DOMAIN_INGRESS);
5397
5398                         sub_policy =
5399                         &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
5400                 }
5401                 tbl_data = container_of(sub_policy->tbl_rsc,
5402                                         struct mlx5_flow_tbl_data_entry, tbl);
5403                 hw_mtr_action = actions_pre++;
5404                 hw_mtr_action->type = (enum rte_flow_action_type)
5405                                       MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
5406                 hw_mtr_action->conf = tbl_data->jump.action;
5407         }
5408         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
5409         actions_pre++;
5410         if (!tag_action)
5411                 return rte_flow_error_set(error, ENOMEM,
5412                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5413                                           NULL, "No tag action space.");
5414         if (!mtr_flow_id) {
5415                 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
5416                 goto exit;
5417         }
5418         /* Only default-policy Meter creates mtr flow id. */
5419         if (fm->def_policy) {
5420                 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
5421                 if (!tag_id)
5422                         return rte_flow_error_set(error, ENOMEM,
5423                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5424                                         "Failed to allocate meter flow id.");
5425                 flow_id = tag_id - 1;
5426                 flow_id_bits = (!flow_id) ? 1 :
5427                                 (MLX5_REG_BITS - __builtin_clz(flow_id));
5428                 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
5429                     mtr_reg_bits) {
5430                         mlx5_ipool_free(fm->flow_ipool, tag_id);
5431                         return rte_flow_error_set(error, EINVAL,
5432                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5433                                         "Meter flow id exceeds max limit.");
5434                 }
5435                 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
5436                         priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
5437         }
5438         /* Build tag actions and items for meter_id/meter flow_id. */
5439         set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
5440         tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
5441         tag_item_mask = tag_item_spec + 1;
5442         /* Both flow_id and meter_id share the same register. */
5443         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5444                 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
5445                                                             0, error),
5446                 .offset = mtr_id_offset,
5447                 .length = mtr_reg_bits,
5448                 .data = flow->meter,
5449         };
5450         /*
5451          * The color Reg bits used by flow_id are growing from
5452          * msb to lsb, so must do bit reverse for flow_id val in RegC.
5453          */
5454         for (shift = 0; shift < flow_id_bits; shift++)
5455                 flow_id_reversed = (flow_id_reversed << 1) |
5456                                 ((flow_id >> shift) & 0x1);
5457         set_tag->data |=
5458                 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
5459         tag_item_spec->id = set_tag->id;
5460         tag_item_spec->data = set_tag->data << mtr_id_offset;
5461         tag_item_mask->data = UINT32_MAX << mtr_id_offset;
5462         tag_action->type = (enum rte_flow_action_type)
5463                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5464         tag_action->conf = set_tag;
5465         tag_item->type = (enum rte_flow_item_type)
5466                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
5467         tag_item->spec = tag_item_spec;
5468         tag_item->last = NULL;
5469         tag_item->mask = tag_item_mask;
5470 exit:
5471         if (mtr_flow_id)
5472                 *mtr_flow_id = tag_id;
5473         return 0;
5474 }
5475
5476 /**
5477  * Split action list having QUEUE/RSS for metadata register copy.
5478  *
5479  * Once Q/RSS action is detected in user's action list, the flow action
5480  * should be split in order to copy metadata registers, which will happen in
5481  * RX_CP_TBL like,
5482  *   - CQE->flow_tag := reg_c[1] (MARK)
5483  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
5484  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
5485  * This is because the last action of each flow must be a terminal action
5486  * (QUEUE, RSS or DROP).
5487  *
5488  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
5489  * stored and kept in the mlx5_flow structure per each sub_flow.
5490  *
5491  * The Q/RSS action is replaced with,
5492  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
5493  * And the following JUMP action is added at the end,
5494  *   - JUMP, to RX_CP_TBL.
5495  *
5496  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
5497  * flow_create_split_metadata() routine. The flow will look like,
5498  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
5499  *
5500  * @param dev
5501  *   Pointer to Ethernet device.
5502  * @param[out] split_actions
5503  *   Pointer to store split actions to jump to CP_TBL.
5504  * @param[in] actions
5505  *   Pointer to the list of original flow actions.
5506  * @param[in] qrss
5507  *   Pointer to the Q/RSS action.
5508  * @param[in] actions_n
5509  *   Number of original actions.
5510  * @param[in] mtr_sfx
5511  *   Check if it is in meter suffix table.
5512  * @param[out] error
5513  *   Perform verbose error reporting if not NULL.
5514  *
5515  * @return
5516  *   non-zero unique flow_id on success, otherwise 0 and
5517  *   error/rte_error are set.
5518  */
5519 static uint32_t
5520 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
5521                           struct rte_flow_action *split_actions,
5522                           const struct rte_flow_action *actions,
5523                           const struct rte_flow_action *qrss,
5524                           int actions_n, int mtr_sfx,
5525                           struct rte_flow_error *error)
5526 {
5527         struct mlx5_priv *priv = dev->data->dev_private;
5528         struct mlx5_rte_flow_action_set_tag *set_tag;
5529         struct rte_flow_action_jump *jump;
5530         const int qrss_idx = qrss - actions;
5531         uint32_t flow_id = 0;
5532         int ret = 0;
5533
5534         /*
5535          * Given actions will be split
5536          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
5537          * - Add jump to mreg CP_TBL.
5538          * As a result, there will be one more action.
5539          */
5540         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
5541         /* Count MLX5_RTE_FLOW_ACTION_TYPE_TAG. */
5542         ++actions_n;
5543         set_tag = (void *)(split_actions + actions_n);
5544         /*
5545          * If we are not the meter suffix flow, add the tag action.
5546          * Since meter suffix flow already has the tag added.
5547          */
5548         if (!mtr_sfx) {
5549                 /*
5550                  * Allocate the new subflow ID. This one is unique within
5551                  * device and not shared with representors. Otherwise,
5552                  * we would have to resolve multi-thread access synch
5553                  * issue. Each flow on the shared device is appended
5554                  * with source vport identifier, so the resulting
5555                  * flows will be unique in the shared (by master and
5556                  * representors) domain even if they have coinciding
5557                  * IDs.
5558                  */
5559                 mlx5_ipool_malloc(priv->sh->ipool
5560                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
5561                 if (!flow_id)
5562                         return rte_flow_error_set(error, ENOMEM,
5563                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5564                                                   NULL, "can't allocate id "
5565                                                   "for split Q/RSS subflow");
5566                 /* Internal SET_TAG action to set flow ID. */
5567                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
5568                         .data = flow_id,
5569                 };
5570                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
5571                 if (ret < 0)
5572                         return ret;
5573                 set_tag->id = ret;
5574                 /* Construct new actions array. */
5575                 /* Replace QUEUE/RSS action. */
5576                 split_actions[qrss_idx] = (struct rte_flow_action){
5577                         .type = (enum rte_flow_action_type)
5578                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5579                         .conf = set_tag,
5580                 };
5581         } else {
5582                 /*
5583                  * If we are the suffix flow of meter, tag already exist.
5584                  * Set the QUEUE/RSS action to void.
5585                  */
5586                 split_actions[qrss_idx].type = RTE_FLOW_ACTION_TYPE_VOID;
5587         }
5588         /* JUMP action to jump to mreg copy table (CP_TBL). */
5589         jump = (void *)(set_tag + 1);
5590         *jump = (struct rte_flow_action_jump){
5591                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5592         };
5593         split_actions[actions_n - 2] = (struct rte_flow_action){
5594                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5595                 .conf = jump,
5596         };
5597         split_actions[actions_n - 1] = (struct rte_flow_action){
5598                 .type = RTE_FLOW_ACTION_TYPE_END,
5599         };
5600         return flow_id;
5601 }
5602
5603 /**
5604  * Extend the given action list for Tx metadata copy.
5605  *
5606  * Copy the given action list to the ext_actions and add flow metadata register
5607  * copy action in order to copy reg_a set by WQE to reg_c[0].
5608  *
5609  * @param[out] ext_actions
5610  *   Pointer to the extended action list.
5611  * @param[in] actions
5612  *   Pointer to the list of actions.
5613  * @param[in] actions_n
5614  *   Number of actions in the list.
5615  * @param[out] error
5616  *   Perform verbose error reporting if not NULL.
5617  * @param[in] encap_idx
5618  *   The encap action index.
5619  *
5620  * @return
5621  *   0 on success, negative value otherwise
5622  */
5623 static int
5624 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
5625                        struct rte_flow_action *ext_actions,
5626                        const struct rte_flow_action *actions,
5627                        int actions_n, struct rte_flow_error *error,
5628                        int encap_idx)
5629 {
5630         struct mlx5_flow_action_copy_mreg *cp_mreg =
5631                 (struct mlx5_flow_action_copy_mreg *)
5632                         (ext_actions + actions_n + 1);
5633         int ret;
5634
5635         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
5636         if (ret < 0)
5637                 return ret;
5638         cp_mreg->dst = ret;
5639         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
5640         if (ret < 0)
5641                 return ret;
5642         cp_mreg->src = ret;
5643         if (encap_idx != 0)
5644                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
5645         if (encap_idx == actions_n - 1) {
5646                 ext_actions[actions_n - 1] = (struct rte_flow_action){
5647                         .type = (enum rte_flow_action_type)
5648                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5649                         .conf = cp_mreg,
5650                 };
5651                 ext_actions[actions_n] = (struct rte_flow_action){
5652                         .type = RTE_FLOW_ACTION_TYPE_END,
5653                 };
5654         } else {
5655                 ext_actions[encap_idx] = (struct rte_flow_action){
5656                         .type = (enum rte_flow_action_type)
5657                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5658                         .conf = cp_mreg,
5659                 };
5660                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5661                                 sizeof(*ext_actions) * (actions_n - encap_idx));
5662         }
5663         return 0;
5664 }
5665
5666 /**
5667  * Check the match action from the action list.
5668  *
5669  * @param[in] actions
5670  *   Pointer to the list of actions.
5671  * @param[in] attr
5672  *   Flow rule attributes.
5673  * @param[in] action
5674  *   The action to be check if exist.
5675  * @param[out] match_action_pos
5676  *   Pointer to the position of the matched action if exists, otherwise is -1.
5677  * @param[out] qrss_action_pos
5678  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5679  * @param[out] modify_after_mirror
5680  *   Pointer to the flag of modify action after FDB mirroring.
5681  *
5682  * @return
5683  *   > 0 the total number of actions.
5684  *   0 if not found match action in action list.
5685  */
5686 static int
5687 flow_check_match_action(const struct rte_flow_action actions[],
5688                         const struct rte_flow_attr *attr,
5689                         enum rte_flow_action_type action,
5690                         int *match_action_pos, int *qrss_action_pos,
5691                         int *modify_after_mirror)
5692 {
5693         const struct rte_flow_action_sample *sample;
5694         const struct rte_flow_action_raw_decap *decap;
5695         int actions_n = 0;
5696         uint32_t ratio = 0;
5697         int sub_type = 0;
5698         int flag = 0;
5699         int fdb_mirror = 0;
5700
5701         *match_action_pos = -1;
5702         *qrss_action_pos = -1;
5703         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5704                 if (actions->type == action) {
5705                         flag = 1;
5706                         *match_action_pos = actions_n;
5707                 }
5708                 switch (actions->type) {
5709                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5710                 case RTE_FLOW_ACTION_TYPE_RSS:
5711                         *qrss_action_pos = actions_n;
5712                         break;
5713                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5714                         sample = actions->conf;
5715                         ratio = sample->ratio;
5716                         sub_type = ((const struct rte_flow_action *)
5717                                         (sample->actions))->type;
5718                         if (ratio == 1 && attr->transfer)
5719                                 fdb_mirror = 1;
5720                         break;
5721                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5722                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5723                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5724                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5725                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5726                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5727                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5728                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5729                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5730                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5731                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5732                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5733                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5734                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5735                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5736                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5737                 case RTE_FLOW_ACTION_TYPE_FLAG:
5738                 case RTE_FLOW_ACTION_TYPE_MARK:
5739                 case RTE_FLOW_ACTION_TYPE_SET_META:
5740                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5741                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5742                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5743                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5744                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5745                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5746                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5747                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5748                 case RTE_FLOW_ACTION_TYPE_METER:
5749                         if (fdb_mirror)
5750                                 *modify_after_mirror = 1;
5751                         break;
5752                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5753                         decap = actions->conf;
5754                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5755                                 ;
5756                         actions_n++;
5757                         if (actions->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5758                                 const struct rte_flow_action_raw_encap *encap =
5759                                                                 actions->conf;
5760                                 if (decap->size <=
5761                                         MLX5_ENCAPSULATION_DECISION_SIZE &&
5762                                     encap->size >
5763                                         MLX5_ENCAPSULATION_DECISION_SIZE)
5764                                         /* L3 encap. */
5765                                         break;
5766                         }
5767                         if (fdb_mirror)
5768                                 *modify_after_mirror = 1;
5769                         break;
5770                 default:
5771                         break;
5772                 }
5773                 actions_n++;
5774         }
5775         if (flag && fdb_mirror && !*modify_after_mirror) {
5776                 /* FDB mirroring uses the destination array to implement
5777                  * instead of FLOW_SAMPLER object.
5778                  */
5779                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5780                         flag = 0;
5781         }
5782         /* Count RTE_FLOW_ACTION_TYPE_END. */
5783         return flag ? actions_n + 1 : 0;
5784 }
5785
5786 #define SAMPLE_SUFFIX_ITEM 3
5787
5788 /**
5789  * Split the sample flow.
5790  *
5791  * As sample flow will split to two sub flow, sample flow with
5792  * sample action, the other actions will move to new suffix flow.
5793  *
5794  * Also add unique tag id with tag action in the sample flow,
5795  * the same tag id will be as match in the suffix flow.
5796  *
5797  * @param dev
5798  *   Pointer to Ethernet device.
5799  * @param[in] add_tag
5800  *   Add extra tag action flag.
5801  * @param[out] sfx_items
5802  *   Suffix flow match items (list terminated by the END pattern item).
5803  * @param[in] actions
5804  *   Associated actions (list terminated by the END action).
5805  * @param[out] actions_sfx
5806  *   Suffix flow actions.
5807  * @param[out] actions_pre
5808  *   Prefix flow actions.
5809  * @param[in] actions_n
5810  *  The total number of actions.
5811  * @param[in] sample_action_pos
5812  *   The sample action position.
5813  * @param[in] qrss_action_pos
5814  *   The Queue/RSS action position.
5815  * @param[in] jump_table
5816  *   Add extra jump action flag.
5817  * @param[out] error
5818  *   Perform verbose error reporting if not NULL.
5819  *
5820  * @return
5821  *   0 on success, or unique flow_id, a negative errno value
5822  *   otherwise and rte_errno is set.
5823  */
5824 static int
5825 flow_sample_split_prep(struct rte_eth_dev *dev,
5826                        int add_tag,
5827                        const struct rte_flow_item items[],
5828                        struct rte_flow_item sfx_items[],
5829                        const struct rte_flow_action actions[],
5830                        struct rte_flow_action actions_sfx[],
5831                        struct rte_flow_action actions_pre[],
5832                        int actions_n,
5833                        int sample_action_pos,
5834                        int qrss_action_pos,
5835                        int jump_table,
5836                        struct rte_flow_error *error)
5837 {
5838         struct mlx5_priv *priv = dev->data->dev_private;
5839         struct mlx5_rte_flow_action_set_tag *set_tag;
5840         struct mlx5_rte_flow_item_tag *tag_spec;
5841         struct mlx5_rte_flow_item_tag *tag_mask;
5842         struct rte_flow_action_jump *jump_action;
5843         uint32_t tag_id = 0;
5844         int append_index = 0;
5845         int set_tag_idx = -1;
5846         int index;
5847         int ret;
5848
5849         if (sample_action_pos < 0)
5850                 return rte_flow_error_set(error, EINVAL,
5851                                           RTE_FLOW_ERROR_TYPE_ACTION,
5852                                           NULL, "invalid position of sample "
5853                                           "action in list");
5854         /* Prepare the actions for prefix and suffix flow. */
5855         if (add_tag) {
5856                 /* Update the new added tag action index preceding
5857                  * the PUSH_VLAN or ENCAP action.
5858                  */
5859                 const struct rte_flow_action_raw_encap *raw_encap;
5860                 const struct rte_flow_action *action = actions;
5861                 int encap_idx;
5862                 int action_idx = 0;
5863                 int raw_decap_idx = -1;
5864                 int push_vlan_idx = -1;
5865                 for (; action->type != RTE_FLOW_ACTION_TYPE_END; action++) {
5866                         switch (action->type) {
5867                         case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5868                                 raw_decap_idx = action_idx;
5869                                 break;
5870                         case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5871                                 raw_encap = action->conf;
5872                                 if (raw_encap->size >
5873                                         MLX5_ENCAPSULATION_DECISION_SIZE) {
5874                                         encap_idx = raw_decap_idx != -1 ?
5875                                                     raw_decap_idx : action_idx;
5876                                         if (encap_idx < sample_action_pos &&
5877                                             push_vlan_idx == -1)
5878                                                 set_tag_idx = encap_idx;
5879                                 }
5880                                 break;
5881                         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5882                         case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5883                                 encap_idx = action_idx;
5884                                 if (encap_idx < sample_action_pos &&
5885                                     push_vlan_idx == -1)
5886                                         set_tag_idx = encap_idx;
5887                                 break;
5888                         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5889                         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5890                                 push_vlan_idx = action_idx;
5891                                 if (push_vlan_idx < sample_action_pos)
5892                                         set_tag_idx = action_idx;
5893                                 break;
5894                         default:
5895                                 break;
5896                         }
5897                         action_idx++;
5898                 }
5899         }
5900         /* Prepare the actions for prefix and suffix flow. */
5901         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5902                 index = qrss_action_pos;
5903                 /* Put the preceding the Queue/RSS action into prefix flow. */
5904                 if (index != 0)
5905                         memcpy(actions_pre, actions,
5906                                sizeof(struct rte_flow_action) * index);
5907                 /* Put others preceding the sample action into prefix flow. */
5908                 if (sample_action_pos > index + 1)
5909                         memcpy(actions_pre + index, actions + index + 1,
5910                                sizeof(struct rte_flow_action) *
5911                                (sample_action_pos - index - 1));
5912                 index = sample_action_pos - 1;
5913                 /* Put Queue/RSS action into Suffix flow. */
5914                 memcpy(actions_sfx, actions + qrss_action_pos,
5915                        sizeof(struct rte_flow_action));
5916                 actions_sfx++;
5917         } else if (add_tag && set_tag_idx >= 0) {
5918                 if (set_tag_idx > 0)
5919                         memcpy(actions_pre, actions,
5920                                sizeof(struct rte_flow_action) * set_tag_idx);
5921                 memcpy(actions_pre + set_tag_idx + 1, actions + set_tag_idx,
5922                        sizeof(struct rte_flow_action) *
5923                        (sample_action_pos - set_tag_idx));
5924                 index = sample_action_pos;
5925         } else {
5926                 index = sample_action_pos;
5927                 if (index != 0)
5928                         memcpy(actions_pre, actions,
5929                                sizeof(struct rte_flow_action) * index);
5930         }
5931         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5932          * For CX6DX and above, metadata registers Cx preserve their value,
5933          * add an extra tag action for NIC-RX and E-Switch Domain.
5934          */
5935         if (add_tag) {
5936                 /* Prepare the prefix tag action. */
5937                 append_index++;
5938                 set_tag = (void *)(actions_pre + actions_n + append_index);
5939                 ret = mlx5_flow_get_reg_id(dev, MLX5_SAMPLE_ID, 0, error);
5940                 /* Trust VF/SF on CX5 not supported meter so that the reserved
5941                  * metadata regC is REG_NON, back to use application tag
5942                  * index 0.
5943                  */
5944                 if (unlikely(ret == REG_NON))
5945                         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
5946                 if (ret < 0)
5947                         return ret;
5948                 mlx5_ipool_malloc(priv->sh->ipool
5949                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5950                 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5951                         .id = ret,
5952                         .data = tag_id,
5953                 };
5954                 /* Prepare the suffix subflow items. */
5955                 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
5956                         if (items->type == RTE_FLOW_ITEM_TYPE_PORT_ID) {
5957                                 memcpy(sfx_items, items, sizeof(*sfx_items));
5958                                 sfx_items++;
5959                         }
5960                 }
5961                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5962                 tag_spec->data = tag_id;
5963                 tag_spec->id = set_tag->id;
5964                 tag_mask = tag_spec + 1;
5965                 tag_mask->data = UINT32_MAX;
5966                 sfx_items[0] = (struct rte_flow_item){
5967                         .type = (enum rte_flow_item_type)
5968                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5969                         .spec = tag_spec,
5970                         .last = NULL,
5971                         .mask = tag_mask,
5972                 };
5973                 sfx_items[1] = (struct rte_flow_item){
5974                         .type = (enum rte_flow_item_type)
5975                                 RTE_FLOW_ITEM_TYPE_END,
5976                 };
5977                 /* Prepare the tag action in prefix subflow. */
5978                 set_tag_idx = (set_tag_idx == -1) ? index : set_tag_idx;
5979                 actions_pre[set_tag_idx] =
5980                         (struct rte_flow_action){
5981                         .type = (enum rte_flow_action_type)
5982                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5983                         .conf = set_tag,
5984                 };
5985                 /* Update next sample position due to add one tag action */
5986                 index += 1;
5987         }
5988         /* Copy the sample action into prefix flow. */
5989         memcpy(actions_pre + index, actions + sample_action_pos,
5990                sizeof(struct rte_flow_action));
5991         index += 1;
5992         /* For the modify action after the sample action in E-Switch mirroring,
5993          * Add the extra jump action in prefix subflow and jump into the next
5994          * table, then do the modify action in the new table.
5995          */
5996         if (jump_table) {
5997                 /* Prepare the prefix jump action. */
5998                 append_index++;
5999                 jump_action = (void *)(actions_pre + actions_n + append_index);
6000                 jump_action->group = jump_table;
6001                 actions_pre[index++] =
6002                         (struct rte_flow_action){
6003                         .type = (enum rte_flow_action_type)
6004                                 RTE_FLOW_ACTION_TYPE_JUMP,
6005                         .conf = jump_action,
6006                 };
6007         }
6008         actions_pre[index] = (struct rte_flow_action){
6009                 .type = (enum rte_flow_action_type)
6010                         RTE_FLOW_ACTION_TYPE_END,
6011         };
6012         /* Put the actions after sample into Suffix flow. */
6013         memcpy(actions_sfx, actions + sample_action_pos + 1,
6014                sizeof(struct rte_flow_action) *
6015                (actions_n - sample_action_pos - 1));
6016         return tag_id;
6017 }
6018
6019 /**
6020  * The splitting for metadata feature.
6021  *
6022  * - Q/RSS action on NIC Rx should be split in order to pass by
6023  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
6024  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
6025  *
6026  * - All the actions on NIC Tx should have a mreg copy action to
6027  *   copy reg_a from WQE to reg_c[0].
6028  *
6029  * @param dev
6030  *   Pointer to Ethernet device.
6031  * @param[in] flow
6032  *   Parent flow structure pointer.
6033  * @param[in] attr
6034  *   Flow rule attributes.
6035  * @param[in] items
6036  *   Pattern specification (list terminated by the END pattern item).
6037  * @param[in] actions
6038  *   Associated actions (list terminated by the END action).
6039  * @param[in] flow_split_info
6040  *   Pointer to flow split info structure.
6041  * @param[out] error
6042  *   Perform verbose error reporting if not NULL.
6043  * @return
6044  *   0 on success, negative value otherwise
6045  */
6046 static int
6047 flow_create_split_metadata(struct rte_eth_dev *dev,
6048                            struct rte_flow *flow,
6049                            const struct rte_flow_attr *attr,
6050                            const struct rte_flow_item items[],
6051                            const struct rte_flow_action actions[],
6052                            struct mlx5_flow_split_info *flow_split_info,
6053                            struct rte_flow_error *error)
6054 {
6055         struct mlx5_priv *priv = dev->data->dev_private;
6056         struct mlx5_sh_config *config = &priv->sh->config;
6057         const struct rte_flow_action *qrss = NULL;
6058         struct rte_flow_action *ext_actions = NULL;
6059         struct mlx5_flow *dev_flow = NULL;
6060         uint32_t qrss_id = 0;
6061         int mtr_sfx = 0;
6062         size_t act_size;
6063         int actions_n;
6064         int encap_idx;
6065         int ret;
6066
6067         /* Check whether extensive metadata feature is engaged. */
6068         if (!config->dv_flow_en ||
6069             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
6070             !mlx5_flow_ext_mreg_supported(dev))
6071                 return flow_create_split_inner(dev, flow, NULL, attr, items,
6072                                                actions, flow_split_info, error);
6073         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
6074                                                            &encap_idx);
6075         if (qrss) {
6076                 /* Exclude hairpin flows from splitting. */
6077                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
6078                         const struct rte_flow_action_queue *queue;
6079
6080                         queue = qrss->conf;
6081                         if (mlx5_rxq_is_hairpin(dev, queue->index))
6082                                 qrss = NULL;
6083                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
6084                         const struct rte_flow_action_rss *rss;
6085
6086                         rss = qrss->conf;
6087                         if (mlx5_rxq_is_hairpin(dev, rss->queue[0]))
6088                                 qrss = NULL;
6089                 }
6090         }
6091         if (qrss) {
6092                 /* Check if it is in meter suffix table. */
6093                 mtr_sfx = attr->group == (attr->transfer ?
6094                           (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
6095                           MLX5_FLOW_TABLE_LEVEL_METER);
6096                 /*
6097                  * Q/RSS action on NIC Rx should be split in order to pass by
6098                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
6099                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
6100                  */
6101                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
6102                            sizeof(struct rte_flow_action_set_tag) +
6103                            sizeof(struct rte_flow_action_jump);
6104                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
6105                                           SOCKET_ID_ANY);
6106                 if (!ext_actions)
6107                         return rte_flow_error_set(error, ENOMEM,
6108                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6109                                                   NULL, "no memory to split "
6110                                                   "metadata flow");
6111                 /*
6112                  * Create the new actions list with removed Q/RSS action
6113                  * and appended set tag and jump to register copy table
6114                  * (RX_CP_TBL). We should preallocate unique tag ID here
6115                  * in advance, because it is needed for set tag action.
6116                  */
6117                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
6118                                                     qrss, actions_n,
6119                                                     mtr_sfx, error);
6120                 if (!mtr_sfx && !qrss_id) {
6121                         ret = -rte_errno;
6122                         goto exit;
6123                 }
6124         } else if (attr->egress && !attr->transfer) {
6125                 /*
6126                  * All the actions on NIC Tx should have a metadata register
6127                  * copy action to copy reg_a from WQE to reg_c[meta]
6128                  */
6129                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
6130                            sizeof(struct mlx5_flow_action_copy_mreg);
6131                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
6132                                           SOCKET_ID_ANY);
6133                 if (!ext_actions)
6134                         return rte_flow_error_set(error, ENOMEM,
6135                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6136                                                   NULL, "no memory to split "
6137                                                   "metadata flow");
6138                 /* Create the action list appended with copy register. */
6139                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
6140                                              actions_n, error, encap_idx);
6141                 if (ret < 0)
6142                         goto exit;
6143         }
6144         /* Add the unmodified original or prefix subflow. */
6145         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6146                                       items, ext_actions ? ext_actions :
6147                                       actions, flow_split_info, error);
6148         if (ret < 0)
6149                 goto exit;
6150         MLX5_ASSERT(dev_flow);
6151         if (qrss) {
6152                 const struct rte_flow_attr q_attr = {
6153                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
6154                         .ingress = 1,
6155                 };
6156                 /* Internal PMD action to set register. */
6157                 struct mlx5_rte_flow_item_tag q_tag_spec = {
6158                         .data = qrss_id,
6159                         .id = REG_NON,
6160                 };
6161                 struct rte_flow_item q_items[] = {
6162                         {
6163                                 .type = (enum rte_flow_item_type)
6164                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
6165                                 .spec = &q_tag_spec,
6166                                 .last = NULL,
6167                                 .mask = NULL,
6168                         },
6169                         {
6170                                 .type = RTE_FLOW_ITEM_TYPE_END,
6171                         },
6172                 };
6173                 struct rte_flow_action q_actions[] = {
6174                         {
6175                                 .type = qrss->type,
6176                                 .conf = qrss->conf,
6177                         },
6178                         {
6179                                 .type = RTE_FLOW_ACTION_TYPE_END,
6180                         },
6181                 };
6182                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
6183
6184                 /*
6185                  * Configure the tag item only if there is no meter subflow.
6186                  * Since tag is already marked in the meter suffix subflow
6187                  * we can just use the meter suffix items as is.
6188                  */
6189                 if (qrss_id) {
6190                         /* Not meter subflow. */
6191                         MLX5_ASSERT(!mtr_sfx);
6192                         /*
6193                          * Put unique id in prefix flow due to it is destroyed
6194                          * after suffix flow and id will be freed after there
6195                          * is no actual flows with this id and identifier
6196                          * reallocation becomes possible (for example, for
6197                          * other flows in other threads).
6198                          */
6199                         dev_flow->handle->split_flow_id = qrss_id;
6200                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
6201                                                    error);
6202                         if (ret < 0)
6203                                 goto exit;
6204                         q_tag_spec.id = ret;
6205                 }
6206                 dev_flow = NULL;
6207                 /* Add suffix subflow to execute Q/RSS. */
6208                 flow_split_info->prefix_layers = layers;
6209                 flow_split_info->prefix_mark = 0;
6210                 flow_split_info->table_id = 0;
6211                 ret = flow_create_split_inner(dev, flow, &dev_flow,
6212                                               &q_attr, mtr_sfx ? items :
6213                                               q_items, q_actions,
6214                                               flow_split_info, error);
6215                 if (ret < 0)
6216                         goto exit;
6217                 /* qrss ID should be freed if failed. */
6218                 qrss_id = 0;
6219                 MLX5_ASSERT(dev_flow);
6220         }
6221
6222 exit:
6223         /*
6224          * We do not destroy the partially created sub_flows in case of error.
6225          * These ones are included into parent flow list and will be destroyed
6226          * by flow_drv_destroy.
6227          */
6228         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
6229                         qrss_id);
6230         mlx5_free(ext_actions);
6231         return ret;
6232 }
6233
6234 /**
6235  * Create meter internal drop flow with the original pattern.
6236  *
6237  * @param dev
6238  *   Pointer to Ethernet device.
6239  * @param[in] flow
6240  *   Parent flow structure pointer.
6241  * @param[in] attr
6242  *   Flow rule attributes.
6243  * @param[in] items
6244  *   Pattern specification (list terminated by the END pattern item).
6245  * @param[in] flow_split_info
6246  *   Pointer to flow split info structure.
6247  * @param[in] fm
6248  *   Pointer to flow meter structure.
6249  * @param[out] error
6250  *   Perform verbose error reporting if not NULL.
6251  * @return
6252  *   0 on success, negative value otherwise
6253  */
6254 static uint32_t
6255 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
6256                         struct rte_flow *flow,
6257                         const struct rte_flow_attr *attr,
6258                         const struct rte_flow_item items[],
6259                         struct mlx5_flow_split_info *flow_split_info,
6260                         struct mlx5_flow_meter_info *fm,
6261                         struct rte_flow_error *error)
6262 {
6263         struct mlx5_flow *dev_flow = NULL;
6264         struct rte_flow_attr drop_attr = *attr;
6265         struct rte_flow_action drop_actions[3];
6266         struct mlx5_flow_split_info drop_split_info = *flow_split_info;
6267
6268         MLX5_ASSERT(fm->drop_cnt);
6269         drop_actions[0].type =
6270                 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
6271         drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
6272         drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
6273         drop_actions[1].conf = NULL;
6274         drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
6275         drop_actions[2].conf = NULL;
6276         drop_split_info.external = false;
6277         drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6278         drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
6279         drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
6280         return flow_create_split_inner(dev, flow, &dev_flow,
6281                                 &drop_attr, items, drop_actions,
6282                                 &drop_split_info, error);
6283 }
6284
6285 /**
6286  * The splitting for meter feature.
6287  *
6288  * - The meter flow will be split to two flows as prefix and
6289  *   suffix flow. The packets make sense only it pass the prefix
6290  *   meter action.
6291  *
6292  * - Reg_C_5 is used for the packet to match betweend prefix and
6293  *   suffix flow.
6294  *
6295  * @param dev
6296  *   Pointer to Ethernet device.
6297  * @param[in] flow
6298  *   Parent flow structure pointer.
6299  * @param[in] attr
6300  *   Flow rule attributes.
6301  * @param[in] items
6302  *   Pattern specification (list terminated by the END pattern item).
6303  * @param[in] actions
6304  *   Associated actions (list terminated by the END action).
6305  * @param[in] flow_split_info
6306  *   Pointer to flow split info structure.
6307  * @param[out] error
6308  *   Perform verbose error reporting if not NULL.
6309  * @return
6310  *   0 on success, negative value otherwise
6311  */
6312 static int
6313 flow_create_split_meter(struct rte_eth_dev *dev,
6314                         struct rte_flow *flow,
6315                         const struct rte_flow_attr *attr,
6316                         const struct rte_flow_item items[],
6317                         const struct rte_flow_action actions[],
6318                         struct mlx5_flow_split_info *flow_split_info,
6319                         struct rte_flow_error *error)
6320 {
6321         struct mlx5_priv *priv = dev->data->dev_private;
6322         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
6323         struct rte_flow_action *sfx_actions = NULL;
6324         struct rte_flow_action *pre_actions = NULL;
6325         struct rte_flow_item *sfx_items = NULL;
6326         struct mlx5_flow *dev_flow = NULL;
6327         struct rte_flow_attr sfx_attr = *attr;
6328         struct mlx5_flow_meter_info *fm = NULL;
6329         uint8_t skip_scale_restore;
6330         bool has_mtr = false;
6331         bool has_modify = false;
6332         bool set_mtr_reg = true;
6333         bool is_mtr_hierarchy = false;
6334         uint32_t meter_id = 0;
6335         uint32_t mtr_idx = 0;
6336         uint32_t mtr_flow_id = 0;
6337         size_t act_size;
6338         size_t item_size;
6339         int actions_n = 0;
6340         int ret = 0;
6341
6342         if (priv->mtr_en)
6343                 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
6344                                                     &has_modify, &meter_id);
6345         if (has_mtr) {
6346                 if (flow->meter) {
6347                         fm = flow_dv_meter_find_by_idx(priv, flow->meter);
6348                         if (!fm)
6349                                 return rte_flow_error_set(error, EINVAL,
6350                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6351                                                 NULL, "Meter not found.");
6352                 } else {
6353                         fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
6354                         if (!fm)
6355                                 return rte_flow_error_set(error, EINVAL,
6356                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6357                                                 NULL, "Meter not found.");
6358                         ret = mlx5_flow_meter_attach(priv, fm,
6359                                                      &sfx_attr, error);
6360                         if (ret)
6361                                 return -rte_errno;
6362                         flow->meter = mtr_idx;
6363                 }
6364                 MLX5_ASSERT(wks);
6365                 wks->fm = fm;
6366                 if (!fm->def_policy) {
6367                         wks->policy = mlx5_flow_meter_policy_find(dev,
6368                                                                   fm->policy_id,
6369                                                                   NULL);
6370                         MLX5_ASSERT(wks->policy);
6371                         if (wks->policy->mark)
6372                                 wks->mark = 1;
6373                         if (wks->policy->is_hierarchy) {
6374                                 wks->final_policy =
6375                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
6376                                                                 wks->policy);
6377                                 if (!wks->final_policy)
6378                                         return rte_flow_error_set(error,
6379                                         EINVAL,
6380                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6381                                 "Failed to find terminal policy of hierarchy.");
6382                                 is_mtr_hierarchy = true;
6383                         }
6384                 }
6385                 /*
6386                  * If it isn't default-policy Meter, and
6387                  * 1. There's no action in flow to change
6388                  *    packet (modify/encap/decap etc.), OR
6389                  * 2. No drop count needed for this meter.
6390                  * 3. It's not meter hierarchy.
6391                  * Then no need to use regC to save meter id anymore.
6392                  */
6393                 if (!fm->def_policy && !is_mtr_hierarchy &&
6394                     (!has_modify || !fm->drop_cnt))
6395                         set_mtr_reg = false;
6396                 /* Prefix actions: meter, decap, encap, tag, jump, end. */
6397                 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
6398                            sizeof(struct mlx5_rte_flow_action_set_tag);
6399                 /* Suffix items: tag, vlan, port id, end. */
6400 #define METER_SUFFIX_ITEM 4
6401                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
6402                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6403                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
6404                                           0, SOCKET_ID_ANY);
6405                 if (!sfx_actions)
6406                         return rte_flow_error_set(error, ENOMEM,
6407                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6408                                                   NULL, "no memory to split "
6409                                                   "meter flow");
6410                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
6411                              act_size);
6412                 /* There's no suffix flow for meter of non-default policy. */
6413                 if (!fm->def_policy)
6414                         pre_actions = sfx_actions + 1;
6415                 else
6416                         pre_actions = sfx_actions + actions_n;
6417                 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr,
6418                                             items, sfx_items, actions,
6419                                             sfx_actions, pre_actions,
6420                                             (set_mtr_reg ? &mtr_flow_id : NULL),
6421                                             error);
6422                 if (ret) {
6423                         ret = -rte_errno;
6424                         goto exit;
6425                 }
6426                 /* Add the prefix subflow. */
6427                 skip_scale_restore = flow_split_info->skip_scale;
6428                 flow_split_info->skip_scale |=
6429                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6430                 ret = flow_create_split_inner(dev, flow, &dev_flow,
6431                                               attr, items, pre_actions,
6432                                               flow_split_info, error);
6433                 flow_split_info->skip_scale = skip_scale_restore;
6434                 if (ret) {
6435                         if (mtr_flow_id)
6436                                 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
6437                         ret = -rte_errno;
6438                         goto exit;
6439                 }
6440                 if (mtr_flow_id) {
6441                         dev_flow->handle->split_flow_id = mtr_flow_id;
6442                         dev_flow->handle->is_meter_flow_id = 1;
6443                 }
6444                 if (!fm->def_policy) {
6445                         if (!set_mtr_reg && fm->drop_cnt)
6446                                 ret =
6447                         flow_meter_create_drop_flow_with_org_pattern(dev, flow,
6448                                                         &sfx_attr, items,
6449                                                         flow_split_info,
6450                                                         fm, error);
6451                         goto exit;
6452                 }
6453                 /* Setting the sfx group atrr. */
6454                 sfx_attr.group = sfx_attr.transfer ?
6455                                 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
6456                                  MLX5_FLOW_TABLE_LEVEL_METER;
6457                 flow_split_info->prefix_layers =
6458                                 flow_get_prefix_layer_flags(dev_flow);
6459                 flow_split_info->prefix_mark |= wks->mark;
6460                 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
6461         }
6462         /* Add the prefix subflow. */
6463         ret = flow_create_split_metadata(dev, flow,
6464                                          &sfx_attr, sfx_items ?
6465                                          sfx_items : items,
6466                                          sfx_actions ? sfx_actions : actions,
6467                                          flow_split_info, error);
6468 exit:
6469         if (sfx_actions)
6470                 mlx5_free(sfx_actions);
6471         return ret;
6472 }
6473
6474 /**
6475  * The splitting for sample feature.
6476  *
6477  * Once Sample action is detected in the action list, the flow actions should
6478  * be split into prefix sub flow and suffix sub flow.
6479  *
6480  * The original items remain in the prefix sub flow, all actions preceding the
6481  * sample action and the sample action itself will be copied to the prefix
6482  * sub flow, the actions following the sample action will be copied to the
6483  * suffix sub flow, Queue action always be located in the suffix sub flow.
6484  *
6485  * In order to make the packet from prefix sub flow matches with suffix sub
6486  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
6487  * flow uses tag item with the unique flow id.
6488  *
6489  * @param dev
6490  *   Pointer to Ethernet device.
6491  * @param[in] flow
6492  *   Parent flow structure pointer.
6493  * @param[in] attr
6494  *   Flow rule attributes.
6495  * @param[in] items
6496  *   Pattern specification (list terminated by the END pattern item).
6497  * @param[in] actions
6498  *   Associated actions (list terminated by the END action).
6499  * @param[in] flow_split_info
6500  *   Pointer to flow split info structure.
6501  * @param[out] error
6502  *   Perform verbose error reporting if not NULL.
6503  * @return
6504  *   0 on success, negative value otherwise
6505  */
6506 static int
6507 flow_create_split_sample(struct rte_eth_dev *dev,
6508                          struct rte_flow *flow,
6509                          const struct rte_flow_attr *attr,
6510                          const struct rte_flow_item items[],
6511                          const struct rte_flow_action actions[],
6512                          struct mlx5_flow_split_info *flow_split_info,
6513                          struct rte_flow_error *error)
6514 {
6515         struct mlx5_priv *priv = dev->data->dev_private;
6516         struct rte_flow_action *sfx_actions = NULL;
6517         struct rte_flow_action *pre_actions = NULL;
6518         struct rte_flow_item *sfx_items = NULL;
6519         struct mlx5_flow *dev_flow = NULL;
6520         struct rte_flow_attr sfx_attr = *attr;
6521 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6522         struct mlx5_flow_dv_sample_resource *sample_res;
6523         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
6524         struct mlx5_flow_tbl_resource *sfx_tbl;
6525         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
6526 #endif
6527         size_t act_size;
6528         size_t item_size;
6529         uint32_t fdb_tx = 0;
6530         int32_t tag_id = 0;
6531         int actions_n = 0;
6532         int sample_action_pos;
6533         int qrss_action_pos;
6534         int add_tag = 0;
6535         int modify_after_mirror = 0;
6536         uint16_t jump_table = 0;
6537         const uint32_t next_ft_step = 1;
6538         int ret = 0;
6539
6540         if (priv->sampler_en)
6541                 actions_n = flow_check_match_action(actions, attr,
6542                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
6543                                         &sample_action_pos, &qrss_action_pos,
6544                                         &modify_after_mirror);
6545         if (actions_n) {
6546                 /* The prefix actions must includes sample, tag, end. */
6547                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
6548                            + sizeof(struct mlx5_rte_flow_action_set_tag);
6549                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
6550                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6551                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
6552                                           item_size), 0, SOCKET_ID_ANY);
6553                 if (!sfx_actions)
6554                         return rte_flow_error_set(error, ENOMEM,
6555                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6556                                                   NULL, "no memory to split "
6557                                                   "sample flow");
6558                 /* The representor_id is UINT16_MAX for uplink. */
6559                 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX);
6560                 /*
6561                  * When reg_c_preserve is set, metadata registers Cx preserve
6562                  * their value even through packet duplication.
6563                  */
6564                 add_tag = (!fdb_tx ||
6565                            priv->sh->cdev->config.hca_attr.reg_c_preserve);
6566                 if (add_tag)
6567                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
6568                                         + act_size);
6569                 if (modify_after_mirror)
6570                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
6571                                      next_ft_step;
6572                 pre_actions = sfx_actions + actions_n;
6573                 tag_id = flow_sample_split_prep(dev, add_tag, items, sfx_items,
6574                                                 actions, sfx_actions,
6575                                                 pre_actions, actions_n,
6576                                                 sample_action_pos,
6577                                                 qrss_action_pos, jump_table,
6578                                                 error);
6579                 if (tag_id < 0 || (add_tag && !tag_id)) {
6580                         ret = -rte_errno;
6581                         goto exit;
6582                 }
6583                 if (modify_after_mirror)
6584                         flow_split_info->skip_scale =
6585                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6586                 /* Add the prefix subflow. */
6587                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6588                                               items, pre_actions,
6589                                               flow_split_info, error);
6590                 if (ret) {
6591                         ret = -rte_errno;
6592                         goto exit;
6593                 }
6594                 dev_flow->handle->split_flow_id = tag_id;
6595 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6596                 if (!modify_after_mirror) {
6597                         /* Set the sfx group attr. */
6598                         sample_res = (struct mlx5_flow_dv_sample_resource *)
6599                                                 dev_flow->dv.sample_res;
6600                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
6601                                                 sample_res->normal_path_tbl;
6602                         sfx_tbl_data = container_of(sfx_tbl,
6603                                                 struct mlx5_flow_tbl_data_entry,
6604                                                 tbl);
6605                         sfx_attr.group = sfx_attr.transfer ?
6606                         (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
6607                 } else {
6608                         MLX5_ASSERT(attr->transfer);
6609                         sfx_attr.group = jump_table;
6610                 }
6611                 flow_split_info->prefix_layers =
6612                                 flow_get_prefix_layer_flags(dev_flow);
6613                 MLX5_ASSERT(wks);
6614                 flow_split_info->prefix_mark |= wks->mark;
6615                 /* Suffix group level already be scaled with factor, set
6616                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
6617                  * again in translation.
6618                  */
6619                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6620 #endif
6621         }
6622         /* Add the suffix subflow. */
6623         ret = flow_create_split_meter(dev, flow, &sfx_attr,
6624                                       sfx_items ? sfx_items : items,
6625                                       sfx_actions ? sfx_actions : actions,
6626                                       flow_split_info, error);
6627 exit:
6628         if (sfx_actions)
6629                 mlx5_free(sfx_actions);
6630         return ret;
6631 }
6632
6633 /**
6634  * Split the flow to subflow set. The splitters might be linked
6635  * in the chain, like this:
6636  * flow_create_split_outer() calls:
6637  *   flow_create_split_meter() calls:
6638  *     flow_create_split_metadata(meter_subflow_0) calls:
6639  *       flow_create_split_inner(metadata_subflow_0)
6640  *       flow_create_split_inner(metadata_subflow_1)
6641  *       flow_create_split_inner(metadata_subflow_2)
6642  *     flow_create_split_metadata(meter_subflow_1) calls:
6643  *       flow_create_split_inner(metadata_subflow_0)
6644  *       flow_create_split_inner(metadata_subflow_1)
6645  *       flow_create_split_inner(metadata_subflow_2)
6646  *
6647  * This provide flexible way to add new levels of flow splitting.
6648  * The all of successfully created subflows are included to the
6649  * parent flow dev_flow list.
6650  *
6651  * @param dev
6652  *   Pointer to Ethernet device.
6653  * @param[in] flow
6654  *   Parent flow structure pointer.
6655  * @param[in] attr
6656  *   Flow rule attributes.
6657  * @param[in] items
6658  *   Pattern specification (list terminated by the END pattern item).
6659  * @param[in] actions
6660  *   Associated actions (list terminated by the END action).
6661  * @param[in] flow_split_info
6662  *   Pointer to flow split info structure.
6663  * @param[out] error
6664  *   Perform verbose error reporting if not NULL.
6665  * @return
6666  *   0 on success, negative value otherwise
6667  */
6668 static int
6669 flow_create_split_outer(struct rte_eth_dev *dev,
6670                         struct rte_flow *flow,
6671                         const struct rte_flow_attr *attr,
6672                         const struct rte_flow_item items[],
6673                         const struct rte_flow_action actions[],
6674                         struct mlx5_flow_split_info *flow_split_info,
6675                         struct rte_flow_error *error)
6676 {
6677         int ret;
6678
6679         ret = flow_create_split_sample(dev, flow, attr, items,
6680                                        actions, flow_split_info, error);
6681         MLX5_ASSERT(ret <= 0);
6682         return ret;
6683 }
6684
6685 static inline struct mlx5_flow_tunnel *
6686 flow_tunnel_from_rule(const struct mlx5_flow *flow)
6687 {
6688         struct mlx5_flow_tunnel *tunnel;
6689
6690 #pragma GCC diagnostic push
6691 #pragma GCC diagnostic ignored "-Wcast-qual"
6692         tunnel = (typeof(tunnel))flow->tunnel;
6693 #pragma GCC diagnostic pop
6694
6695         return tunnel;
6696 }
6697
6698 /**
6699  * Adjust flow RSS workspace if needed.
6700  *
6701  * @param wks
6702  *   Pointer to thread flow work space.
6703  * @param rss_desc
6704  *   Pointer to RSS descriptor.
6705  * @param[in] nrssq_num
6706  *   New RSS queue number.
6707  *
6708  * @return
6709  *   0 on success, -1 otherwise and rte_errno is set.
6710  */
6711 static int
6712 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
6713                           struct mlx5_flow_rss_desc *rss_desc,
6714                           uint32_t nrssq_num)
6715 {
6716         if (likely(nrssq_num <= wks->rssq_num))
6717                 return 0;
6718         rss_desc->queue = realloc(rss_desc->queue,
6719                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
6720         if (!rss_desc->queue) {
6721                 rte_errno = ENOMEM;
6722                 return -1;
6723         }
6724         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
6725         return 0;
6726 }
6727
6728 /**
6729  * Create a flow and add it to @p list.
6730  *
6731  * @param dev
6732  *   Pointer to Ethernet device.
6733  * @param list
6734  *   Pointer to a TAILQ flow list. If this parameter NULL,
6735  *   no list insertion occurred, flow is just created,
6736  *   this is caller's responsibility to track the
6737  *   created flow.
6738  * @param[in] attr
6739  *   Flow rule attributes.
6740  * @param[in] items
6741  *   Pattern specification (list terminated by the END pattern item).
6742  * @param[in] actions
6743  *   Associated actions (list terminated by the END action).
6744  * @param[in] external
6745  *   This flow rule is created by request external to PMD.
6746  * @param[out] error
6747  *   Perform verbose error reporting if not NULL.
6748  *
6749  * @return
6750  *   A flow index on success, 0 otherwise and rte_errno is set.
6751  */
6752 static uint32_t
6753 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6754                  const struct rte_flow_attr *attr,
6755                  const struct rte_flow_item items[],
6756                  const struct rte_flow_action original_actions[],
6757                  bool external, struct rte_flow_error *error)
6758 {
6759         struct mlx5_priv *priv = dev->data->dev_private;
6760         struct rte_flow *flow = NULL;
6761         struct mlx5_flow *dev_flow;
6762         const struct rte_flow_action_rss *rss = NULL;
6763         struct mlx5_translated_action_handle
6764                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6765         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6766         union {
6767                 struct mlx5_flow_expand_rss buf;
6768                 uint8_t buffer[4096];
6769         } expand_buffer;
6770         union {
6771                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6772                 uint8_t buffer[2048];
6773         } actions_rx;
6774         union {
6775                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6776                 uint8_t buffer[2048];
6777         } actions_hairpin_tx;
6778         union {
6779                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6780                 uint8_t buffer[2048];
6781         } items_tx;
6782         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6783         struct mlx5_flow_rss_desc *rss_desc;
6784         const struct rte_flow_action *p_actions_rx;
6785         uint32_t i;
6786         uint32_t idx = 0;
6787         int hairpin_flow;
6788         struct rte_flow_attr attr_tx = { .priority = 0 };
6789         const struct rte_flow_action *actions;
6790         struct rte_flow_action *translated_actions = NULL;
6791         struct mlx5_flow_tunnel *tunnel;
6792         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6793         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6794         struct mlx5_flow_split_info flow_split_info = {
6795                 .external = !!external,
6796                 .skip_scale = 0,
6797                 .flow_idx = 0,
6798                 .prefix_mark = 0,
6799                 .prefix_layers = 0,
6800                 .table_id = 0
6801         };
6802         int ret;
6803
6804         MLX5_ASSERT(wks);
6805         rss_desc = &wks->rss_desc;
6806         ret = flow_action_handles_translate(dev, original_actions,
6807                                             indir_actions,
6808                                             &indir_actions_n,
6809                                             &translated_actions, error);
6810         if (ret < 0) {
6811                 MLX5_ASSERT(translated_actions == NULL);
6812                 return 0;
6813         }
6814         actions = translated_actions ? translated_actions : original_actions;
6815         p_actions_rx = actions;
6816         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6817         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6818                                 external, hairpin_flow, error);
6819         if (ret < 0)
6820                 goto error_before_hairpin_split;
6821         flow = mlx5_ipool_zmalloc(priv->flows[type], &idx);
6822         if (!flow) {
6823                 rte_errno = ENOMEM;
6824                 goto error_before_hairpin_split;
6825         }
6826         if (hairpin_flow > 0) {
6827                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6828                         rte_errno = EINVAL;
6829                         goto error_before_hairpin_split;
6830                 }
6831                 flow_hairpin_split(dev, actions, actions_rx.actions,
6832                                    actions_hairpin_tx.actions, items_tx.items,
6833                                    idx);
6834                 p_actions_rx = actions_rx.actions;
6835         }
6836         flow_split_info.flow_idx = idx;
6837         flow->drv_type = flow_get_drv_type(dev, attr);
6838         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6839                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
6840         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6841         /* RSS Action only works on NIC RX domain */
6842         if (attr->ingress && !attr->transfer)
6843                 rss = flow_get_rss_action(dev, p_actions_rx);
6844         if (rss) {
6845                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6846                         return 0;
6847                 /*
6848                  * The following information is required by
6849                  * mlx5_flow_hashfields_adjust() in advance.
6850                  */
6851                 rss_desc->level = rss->level;
6852                 /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
6853                 rss_desc->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
6854         }
6855         flow->dev_handles = 0;
6856         if (rss && rss->types) {
6857                 unsigned int graph_root;
6858
6859                 graph_root = find_graph_root(rss->level);
6860                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6861                                            items, rss->types,
6862                                            mlx5_support_expansion, graph_root);
6863                 MLX5_ASSERT(ret > 0 &&
6864                        (unsigned int)ret < sizeof(expand_buffer.buffer));
6865                 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) {
6866                         for (i = 0; i < buf->entries; ++i)
6867                                 mlx5_dbg__print_pattern(buf->entry[i].pattern);
6868                 }
6869         } else {
6870                 buf->entries = 1;
6871                 buf->entry[0].pattern = (void *)(uintptr_t)items;
6872         }
6873         rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6874                                                       indir_actions_n);
6875         for (i = 0; i < buf->entries; ++i) {
6876                 /* Initialize flow split data. */
6877                 flow_split_info.prefix_layers = 0;
6878                 flow_split_info.prefix_mark = 0;
6879                 flow_split_info.skip_scale = 0;
6880                 /*
6881                  * The splitter may create multiple dev_flows,
6882                  * depending on configuration. In the simplest
6883                  * case it just creates unmodified original flow.
6884                  */
6885                 ret = flow_create_split_outer(dev, flow, attr,
6886                                               buf->entry[i].pattern,
6887                                               p_actions_rx, &flow_split_info,
6888                                               error);
6889                 if (ret < 0)
6890                         goto error;
6891                 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) {
6892                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
6893                                                            p_actions_rx,
6894                                                            idx,
6895                                                            wks->flows[0].tunnel,
6896                                                            &default_miss_ctx,
6897                                                            error);
6898                         if (ret < 0) {
6899                                 mlx5_free(default_miss_ctx.queue);
6900                                 goto error;
6901                         }
6902                 }
6903         }
6904         /* Create the tx flow. */
6905         if (hairpin_flow) {
6906                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6907                 attr_tx.ingress = 0;
6908                 attr_tx.egress = 1;
6909                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6910                                          actions_hairpin_tx.actions,
6911                                          idx, error);
6912                 if (!dev_flow)
6913                         goto error;
6914                 dev_flow->flow = flow;
6915                 dev_flow->external = 0;
6916                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6917                               dev_flow->handle, next);
6918                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6919                                          items_tx.items,
6920                                          actions_hairpin_tx.actions, error);
6921                 if (ret < 0)
6922                         goto error;
6923         }
6924         /*
6925          * Update the metadata register copy table. If extensive
6926          * metadata feature is enabled and registers are supported
6927          * we might create the extra rte_flow for each unique
6928          * MARK/FLAG action ID.
6929          *
6930          * The table is updated for ingress Flows only, because
6931          * the egress Flows belong to the different device and
6932          * copy table should be updated in peer NIC Rx domain.
6933          */
6934         if (attr->ingress &&
6935             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6936                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6937                 if (ret)
6938                         goto error;
6939         }
6940         /*
6941          * If the flow is external (from application) OR device is started,
6942          * OR mreg discover, then apply immediately.
6943          */
6944         if (external || dev->data->dev_started ||
6945             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6946              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6947                 ret = flow_drv_apply(dev, flow, error);
6948                 if (ret < 0)
6949                         goto error;
6950         }
6951         flow->type = type;
6952         flow_rxq_flags_set(dev, flow);
6953         rte_free(translated_actions);
6954         tunnel = flow_tunnel_from_rule(wks->flows);
6955         if (tunnel) {
6956                 flow->tunnel = 1;
6957                 flow->tunnel_id = tunnel->tunnel_id;
6958                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6959                 mlx5_free(default_miss_ctx.queue);
6960         }
6961         mlx5_flow_pop_thread_workspace();
6962         return idx;
6963 error:
6964         MLX5_ASSERT(flow);
6965         ret = rte_errno; /* Save rte_errno before cleanup. */
6966         flow_mreg_del_copy_action(dev, flow);
6967         flow_drv_destroy(dev, flow);
6968         if (rss_desc->shared_rss)
6969                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6970                         mlx5_ipool_get
6971                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6972                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6973         mlx5_ipool_free(priv->flows[type], idx);
6974         rte_errno = ret; /* Restore rte_errno. */
6975         ret = rte_errno;
6976         rte_errno = ret;
6977         mlx5_flow_pop_thread_workspace();
6978 error_before_hairpin_split:
6979         rte_free(translated_actions);
6980         return 0;
6981 }
6982
6983 /**
6984  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6985  * incoming packets to table 1.
6986  *
6987  * Other flow rules, requested for group n, will be created in
6988  * e-switch table n+1.
6989  * Jump action to e-switch group n will be created to group n+1.
6990  *
6991  * Used when working in switchdev mode, to utilise advantages of table 1
6992  * and above.
6993  *
6994  * @param dev
6995  *   Pointer to Ethernet device.
6996  *
6997  * @return
6998  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
6999  */
7000 struct rte_flow *
7001 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
7002 {
7003         const struct rte_flow_attr attr = {
7004                 .group = 0,
7005                 .priority = 0,
7006                 .ingress = 1,
7007                 .egress = 0,
7008                 .transfer = 1,
7009         };
7010         const struct rte_flow_item pattern = {
7011                 .type = RTE_FLOW_ITEM_TYPE_END,
7012         };
7013         struct rte_flow_action_jump jump = {
7014                 .group = 1,
7015         };
7016         const struct rte_flow_action actions[] = {
7017                 {
7018                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
7019                         .conf = &jump,
7020                 },
7021                 {
7022                         .type = RTE_FLOW_ACTION_TYPE_END,
7023                 },
7024         };
7025         struct rte_flow_error error;
7026
7027         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7028                                                    &attr, &pattern,
7029                                                    actions, false, &error);
7030 }
7031
7032 /**
7033  * Create a dedicated flow rule on e-switch table 1, matches ESW manager
7034  * and sq number, directs all packets to peer vport.
7035  *
7036  * @param dev
7037  *   Pointer to Ethernet device.
7038  * @param txq
7039  *   Txq index.
7040  *
7041  * @return
7042  *   Flow ID on success, 0 otherwise and rte_errno is set.
7043  */
7044 uint32_t
7045 mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev, uint32_t txq)
7046 {
7047         struct rte_flow_attr attr = {
7048                 .group = 0,
7049                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7050                 .ingress = 1,
7051                 .egress = 0,
7052                 .transfer = 1,
7053         };
7054         struct rte_flow_item_port_id port_spec = {
7055                 .id = MLX5_PORT_ESW_MGR,
7056         };
7057         struct mlx5_rte_flow_item_tx_queue txq_spec = {
7058                 .queue = txq,
7059         };
7060         struct rte_flow_item pattern[] = {
7061                 {
7062                         .type = RTE_FLOW_ITEM_TYPE_PORT_ID,
7063                         .spec = &port_spec,
7064                 },
7065                 {
7066                         .type = (enum rte_flow_item_type)
7067                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
7068                         .spec = &txq_spec,
7069                 },
7070                 {
7071                         .type = RTE_FLOW_ITEM_TYPE_END,
7072                 },
7073         };
7074         struct rte_flow_action_jump jump = {
7075                 .group = 1,
7076         };
7077         struct rte_flow_action_port_id port = {
7078                 .id = dev->data->port_id,
7079         };
7080         struct rte_flow_action actions[] = {
7081                 {
7082                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
7083                         .conf = &jump,
7084                 },
7085                 {
7086                         .type = RTE_FLOW_ACTION_TYPE_END,
7087                 },
7088         };
7089         struct rte_flow_error error;
7090
7091         /*
7092          * Creates group 0, highest priority jump flow.
7093          * Matches txq to bypass kernel packets.
7094          */
7095         if (flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern, actions,
7096                              false, &error) == 0)
7097                 return 0;
7098         /* Create group 1, lowest priority redirect flow for txq. */
7099         attr.group = 1;
7100         actions[0].conf = &port;
7101         actions[0].type = RTE_FLOW_ACTION_TYPE_PORT_ID;
7102         return flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern,
7103                                 actions, false, &error);
7104 }
7105
7106 /**
7107  * Validate a flow supported by the NIC.
7108  *
7109  * @see rte_flow_validate()
7110  * @see rte_flow_ops
7111  */
7112 int
7113 mlx5_flow_validate(struct rte_eth_dev *dev,
7114                    const struct rte_flow_attr *attr,
7115                    const struct rte_flow_item items[],
7116                    const struct rte_flow_action original_actions[],
7117                    struct rte_flow_error *error)
7118 {
7119         int hairpin_flow;
7120         struct mlx5_translated_action_handle
7121                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
7122         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
7123         const struct rte_flow_action *actions;
7124         struct rte_flow_action *translated_actions = NULL;
7125         int ret = flow_action_handles_translate(dev, original_actions,
7126                                                 indir_actions,
7127                                                 &indir_actions_n,
7128                                                 &translated_actions, error);
7129
7130         if (ret)
7131                 return ret;
7132         actions = translated_actions ? translated_actions : original_actions;
7133         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
7134         ret = flow_drv_validate(dev, attr, items, actions,
7135                                 true, hairpin_flow, error);
7136         rte_free(translated_actions);
7137         return ret;
7138 }
7139
7140 /**
7141  * Create a flow.
7142  *
7143  * @see rte_flow_create()
7144  * @see rte_flow_ops
7145  */
7146 struct rte_flow *
7147 mlx5_flow_create(struct rte_eth_dev *dev,
7148                  const struct rte_flow_attr *attr,
7149                  const struct rte_flow_item items[],
7150                  const struct rte_flow_action actions[],
7151                  struct rte_flow_error *error)
7152 {
7153         struct mlx5_priv *priv = dev->data->dev_private;
7154
7155         if (priv->sh->config.dv_flow_en == 2) {
7156                 rte_flow_error_set(error, ENOTSUP,
7157                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7158                           NULL,
7159                           "Flow non-Q creation not supported");
7160                 return NULL;
7161         }
7162         /*
7163          * If the device is not started yet, it is not allowed to created a
7164          * flow from application. PMD default flows and traffic control flows
7165          * are not affected.
7166          */
7167         if (unlikely(!dev->data->dev_started)) {
7168                 DRV_LOG(DEBUG, "port %u is not started when "
7169                         "inserting a flow", dev->data->port_id);
7170                 rte_flow_error_set(error, ENODEV,
7171                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7172                                    NULL,
7173                                    "port not started");
7174                 return NULL;
7175         }
7176
7177         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN,
7178                                                    attr, items, actions,
7179                                                    true, error);
7180 }
7181
7182 /**
7183  * Destroy a flow in a list.
7184  *
7185  * @param dev
7186  *   Pointer to Ethernet device.
7187  * @param[in] flow_idx
7188  *   Index of flow to destroy.
7189  */
7190 static void
7191 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
7192                   uint32_t flow_idx)
7193 {
7194         struct mlx5_priv *priv = dev->data->dev_private;
7195         struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx);
7196
7197         if (!flow)
7198                 return;
7199         MLX5_ASSERT(flow->type == type);
7200         /*
7201          * Update RX queue flags only if port is started, otherwise it is
7202          * already clean.
7203          */
7204         if (dev->data->dev_started)
7205                 flow_rxq_flags_trim(dev, flow);
7206         flow_drv_destroy(dev, flow);
7207         if (flow->tunnel) {
7208                 struct mlx5_flow_tunnel *tunnel;
7209
7210                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
7211                 RTE_VERIFY(tunnel);
7212                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
7213                         mlx5_flow_tunnel_free(dev, tunnel);
7214         }
7215         flow_mreg_del_copy_action(dev, flow);
7216         mlx5_ipool_free(priv->flows[type], flow_idx);
7217 }
7218
7219 /**
7220  * Destroy all flows.
7221  *
7222  * @param dev
7223  *   Pointer to Ethernet device.
7224  * @param type
7225  *   Flow type to be flushed.
7226  * @param active
7227  *   If flushing is called actively.
7228  */
7229 void
7230 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type,
7231                      bool active)
7232 {
7233         struct mlx5_priv *priv = dev->data->dev_private;
7234         uint32_t num_flushed = 0, fidx = 1;
7235         struct rte_flow *flow;
7236
7237 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
7238         if (priv->sh->config.dv_flow_en == 2 &&
7239             type == MLX5_FLOW_TYPE_GEN) {
7240                 flow_hw_q_flow_flush(dev, NULL);
7241                 return;
7242         }
7243 #endif
7244
7245         MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) {
7246                 flow_list_destroy(dev, type, fidx);
7247                 num_flushed++;
7248         }
7249         if (active) {
7250                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
7251                         dev->data->port_id, num_flushed);
7252         }
7253 }
7254
7255 /**
7256  * Stop all default actions for flows.
7257  *
7258  * @param dev
7259  *   Pointer to Ethernet device.
7260  */
7261 void
7262 mlx5_flow_stop_default(struct rte_eth_dev *dev)
7263 {
7264         flow_mreg_del_default_copy_action(dev);
7265         flow_rxq_flags_clear(dev);
7266 }
7267
7268 /**
7269  * Start all default actions for flows.
7270  *
7271  * @param dev
7272  *   Pointer to Ethernet device.
7273  * @return
7274  *   0 on success, a negative errno value otherwise and rte_errno is set.
7275  */
7276 int
7277 mlx5_flow_start_default(struct rte_eth_dev *dev)
7278 {
7279         struct rte_flow_error error;
7280
7281         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
7282         return flow_mreg_add_default_copy_action(dev, &error);
7283 }
7284
7285 /**
7286  * Release key of thread specific flow workspace data.
7287  */
7288 void
7289 flow_release_workspace(void *data)
7290 {
7291         struct mlx5_flow_workspace *wks = data;
7292         struct mlx5_flow_workspace *next;
7293
7294         while (wks) {
7295                 next = wks->next;
7296                 free(wks->rss_desc.queue);
7297                 free(wks);
7298                 wks = next;
7299         }
7300 }
7301
7302 /**
7303  * Get thread specific current flow workspace.
7304  *
7305  * @return pointer to thread specific flow workspace data, NULL on error.
7306  */
7307 struct mlx5_flow_workspace*
7308 mlx5_flow_get_thread_workspace(void)
7309 {
7310         struct mlx5_flow_workspace *data;
7311
7312         data = mlx5_flow_os_get_specific_workspace();
7313         MLX5_ASSERT(data && data->inuse);
7314         if (!data || !data->inuse)
7315                 DRV_LOG(ERR, "flow workspace not initialized.");
7316         return data;
7317 }
7318
7319 /**
7320  * Allocate and init new flow workspace.
7321  *
7322  * @return pointer to flow workspace data, NULL on error.
7323  */
7324 static struct mlx5_flow_workspace*
7325 flow_alloc_thread_workspace(void)
7326 {
7327         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
7328
7329         if (!data) {
7330                 DRV_LOG(ERR, "Failed to allocate flow workspace "
7331                         "memory.");
7332                 return NULL;
7333         }
7334         data->rss_desc.queue = calloc(1,
7335                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
7336         if (!data->rss_desc.queue)
7337                 goto err;
7338         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
7339         return data;
7340 err:
7341         free(data->rss_desc.queue);
7342         free(data);
7343         return NULL;
7344 }
7345
7346 /**
7347  * Get new thread specific flow workspace.
7348  *
7349  * If current workspace inuse, create new one and set as current.
7350  *
7351  * @return pointer to thread specific flow workspace data, NULL on error.
7352  */
7353 static struct mlx5_flow_workspace*
7354 mlx5_flow_push_thread_workspace(void)
7355 {
7356         struct mlx5_flow_workspace *curr;
7357         struct mlx5_flow_workspace *data;
7358
7359         curr = mlx5_flow_os_get_specific_workspace();
7360         if (!curr) {
7361                 data = flow_alloc_thread_workspace();
7362                 if (!data)
7363                         return NULL;
7364         } else if (!curr->inuse) {
7365                 data = curr;
7366         } else if (curr->next) {
7367                 data = curr->next;
7368         } else {
7369                 data = flow_alloc_thread_workspace();
7370                 if (!data)
7371                         return NULL;
7372                 curr->next = data;
7373                 data->prev = curr;
7374         }
7375         data->inuse = 1;
7376         data->flow_idx = 0;
7377         /* Set as current workspace */
7378         if (mlx5_flow_os_set_specific_workspace(data))
7379                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
7380         return data;
7381 }
7382
7383 /**
7384  * Close current thread specific flow workspace.
7385  *
7386  * If previous workspace available, set it as current.
7387  *
7388  * @return pointer to thread specific flow workspace data, NULL on error.
7389  */
7390 static void
7391 mlx5_flow_pop_thread_workspace(void)
7392 {
7393         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
7394
7395         if (!data)
7396                 return;
7397         if (!data->inuse) {
7398                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
7399                 return;
7400         }
7401         data->inuse = 0;
7402         if (!data->prev)
7403                 return;
7404         if (mlx5_flow_os_set_specific_workspace(data->prev))
7405                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
7406 }
7407
7408 /**
7409  * Verify the flow list is empty
7410  *
7411  * @param dev
7412  *  Pointer to Ethernet device.
7413  *
7414  * @return the number of flows not released.
7415  */
7416 int
7417 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused)
7418 {
7419         struct mlx5_priv *priv = dev->data->dev_private;
7420         struct rte_flow *flow;
7421         uint32_t idx = 0;
7422         int ret = 0, i;
7423
7424         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
7425                 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) {
7426                         DRV_LOG(DEBUG, "port %u flow %p still referenced",
7427                                 dev->data->port_id, (void *)flow);
7428                         ret++;
7429                 }
7430         }
7431         return ret;
7432 }
7433
7434 /**
7435  * Enable default hairpin egress flow.
7436  *
7437  * @param dev
7438  *   Pointer to Ethernet device.
7439  * @param queue
7440  *   The queue index.
7441  *
7442  * @return
7443  *   0 on success, a negative errno value otherwise and rte_errno is set.
7444  */
7445 int
7446 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
7447                             uint32_t queue)
7448 {
7449         const struct rte_flow_attr attr = {
7450                 .egress = 1,
7451                 .priority = 0,
7452         };
7453         struct mlx5_rte_flow_item_tx_queue queue_spec = {
7454                 .queue = queue,
7455         };
7456         struct mlx5_rte_flow_item_tx_queue queue_mask = {
7457                 .queue = UINT32_MAX,
7458         };
7459         struct rte_flow_item items[] = {
7460                 {
7461                         .type = (enum rte_flow_item_type)
7462                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
7463                         .spec = &queue_spec,
7464                         .last = NULL,
7465                         .mask = &queue_mask,
7466                 },
7467                 {
7468                         .type = RTE_FLOW_ITEM_TYPE_END,
7469                 },
7470         };
7471         struct rte_flow_action_jump jump = {
7472                 .group = MLX5_HAIRPIN_TX_TABLE,
7473         };
7474         struct rte_flow_action actions[2];
7475         uint32_t flow_idx;
7476         struct rte_flow_error error;
7477
7478         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
7479         actions[0].conf = &jump;
7480         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
7481         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7482                                     &attr, items, actions, false, &error);
7483         if (!flow_idx) {
7484                 DRV_LOG(DEBUG,
7485                         "Failed to create ctrl flow: rte_errno(%d),"
7486                         " type(%d), message(%s)",
7487                         rte_errno, error.type,
7488                         error.message ? error.message : " (no stated reason)");
7489                 return -rte_errno;
7490         }
7491         return 0;
7492 }
7493
7494 /**
7495  * Enable a control flow configured from the control plane.
7496  *
7497  * @param dev
7498  *   Pointer to Ethernet device.
7499  * @param eth_spec
7500  *   An Ethernet flow spec to apply.
7501  * @param eth_mask
7502  *   An Ethernet flow mask to apply.
7503  * @param vlan_spec
7504  *   A VLAN flow spec to apply.
7505  * @param vlan_mask
7506  *   A VLAN flow mask to apply.
7507  *
7508  * @return
7509  *   0 on success, a negative errno value otherwise and rte_errno is set.
7510  */
7511 int
7512 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
7513                     struct rte_flow_item_eth *eth_spec,
7514                     struct rte_flow_item_eth *eth_mask,
7515                     struct rte_flow_item_vlan *vlan_spec,
7516                     struct rte_flow_item_vlan *vlan_mask)
7517 {
7518         struct mlx5_priv *priv = dev->data->dev_private;
7519         const struct rte_flow_attr attr = {
7520                 .ingress = 1,
7521                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7522         };
7523         struct rte_flow_item items[] = {
7524                 {
7525                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7526                         .spec = eth_spec,
7527                         .last = NULL,
7528                         .mask = eth_mask,
7529                 },
7530                 {
7531                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
7532                                               RTE_FLOW_ITEM_TYPE_END,
7533                         .spec = vlan_spec,
7534                         .last = NULL,
7535                         .mask = vlan_mask,
7536                 },
7537                 {
7538                         .type = RTE_FLOW_ITEM_TYPE_END,
7539                 },
7540         };
7541         uint16_t queue[priv->reta_idx_n];
7542         struct rte_flow_action_rss action_rss = {
7543                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
7544                 .level = 0,
7545                 .types = priv->rss_conf.rss_hf,
7546                 .key_len = priv->rss_conf.rss_key_len,
7547                 .queue_num = priv->reta_idx_n,
7548                 .key = priv->rss_conf.rss_key,
7549                 .queue = queue,
7550         };
7551         struct rte_flow_action actions[] = {
7552                 {
7553                         .type = RTE_FLOW_ACTION_TYPE_RSS,
7554                         .conf = &action_rss,
7555                 },
7556                 {
7557                         .type = RTE_FLOW_ACTION_TYPE_END,
7558                 },
7559         };
7560         uint32_t flow_idx;
7561         struct rte_flow_error error;
7562         unsigned int i;
7563
7564         if (!priv->reta_idx_n || !priv->rxqs_n) {
7565                 return 0;
7566         }
7567         if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG))
7568                 action_rss.types = 0;
7569         for (i = 0; i != priv->reta_idx_n; ++i)
7570                 queue[i] = (*priv->reta_idx)[i];
7571         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7572                                     &attr, items, actions, false, &error);
7573         if (!flow_idx)
7574                 return -rte_errno;
7575         return 0;
7576 }
7577
7578 /**
7579  * Enable a flow control configured from the control plane.
7580  *
7581  * @param dev
7582  *   Pointer to Ethernet device.
7583  * @param eth_spec
7584  *   An Ethernet flow spec to apply.
7585  * @param eth_mask
7586  *   An Ethernet flow mask to apply.
7587  *
7588  * @return
7589  *   0 on success, a negative errno value otherwise and rte_errno is set.
7590  */
7591 int
7592 mlx5_ctrl_flow(struct rte_eth_dev *dev,
7593                struct rte_flow_item_eth *eth_spec,
7594                struct rte_flow_item_eth *eth_mask)
7595 {
7596         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
7597 }
7598
7599 /**
7600  * Create default miss flow rule matching lacp traffic
7601  *
7602  * @param dev
7603  *   Pointer to Ethernet device.
7604  * @param eth_spec
7605  *   An Ethernet flow spec to apply.
7606  *
7607  * @return
7608  *   0 on success, a negative errno value otherwise and rte_errno is set.
7609  */
7610 int
7611 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
7612 {
7613         /*
7614          * The LACP matching is done by only using ether type since using
7615          * a multicast dst mac causes kernel to give low priority to this flow.
7616          */
7617         static const struct rte_flow_item_eth lacp_spec = {
7618                 .type = RTE_BE16(0x8809),
7619         };
7620         static const struct rte_flow_item_eth lacp_mask = {
7621                 .type = 0xffff,
7622         };
7623         const struct rte_flow_attr attr = {
7624                 .ingress = 1,
7625         };
7626         struct rte_flow_item items[] = {
7627                 {
7628                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7629                         .spec = &lacp_spec,
7630                         .mask = &lacp_mask,
7631                 },
7632                 {
7633                         .type = RTE_FLOW_ITEM_TYPE_END,
7634                 },
7635         };
7636         struct rte_flow_action actions[] = {
7637                 {
7638                         .type = (enum rte_flow_action_type)
7639                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
7640                 },
7641                 {
7642                         .type = RTE_FLOW_ACTION_TYPE_END,
7643                 },
7644         };
7645         struct rte_flow_error error;
7646         uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7647                                         &attr, items, actions,
7648                                         false, &error);
7649
7650         if (!flow_idx)
7651                 return -rte_errno;
7652         return 0;
7653 }
7654
7655 /**
7656  * Destroy a flow.
7657  *
7658  * @see rte_flow_destroy()
7659  * @see rte_flow_ops
7660  */
7661 int
7662 mlx5_flow_destroy(struct rte_eth_dev *dev,
7663                   struct rte_flow *flow,
7664                   struct rte_flow_error *error __rte_unused)
7665 {
7666         struct mlx5_priv *priv = dev->data->dev_private;
7667
7668         if (priv->sh->config.dv_flow_en == 2)
7669                 return rte_flow_error_set(error, ENOTSUP,
7670                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7671                           NULL,
7672                           "Flow non-Q destruction not supported");
7673         flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN,
7674                                 (uintptr_t)(void *)flow);
7675         return 0;
7676 }
7677
7678 /**
7679  * Destroy all flows.
7680  *
7681  * @see rte_flow_flush()
7682  * @see rte_flow_ops
7683  */
7684 int
7685 mlx5_flow_flush(struct rte_eth_dev *dev,
7686                 struct rte_flow_error *error __rte_unused)
7687 {
7688         mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false);
7689         return 0;
7690 }
7691
7692 /**
7693  * Isolated mode.
7694  *
7695  * @see rte_flow_isolate()
7696  * @see rte_flow_ops
7697  */
7698 int
7699 mlx5_flow_isolate(struct rte_eth_dev *dev,
7700                   int enable,
7701                   struct rte_flow_error *error)
7702 {
7703         struct mlx5_priv *priv = dev->data->dev_private;
7704
7705         if (dev->data->dev_started) {
7706                 rte_flow_error_set(error, EBUSY,
7707                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7708                                    NULL,
7709                                    "port must be stopped first");
7710                 return -rte_errno;
7711         }
7712         priv->isolated = !!enable;
7713         if (enable)
7714                 dev->dev_ops = &mlx5_dev_ops_isolate;
7715         else
7716                 dev->dev_ops = &mlx5_dev_ops;
7717
7718         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
7719         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
7720
7721         return 0;
7722 }
7723
7724 /**
7725  * Query a flow.
7726  *
7727  * @see rte_flow_query()
7728  * @see rte_flow_ops
7729  */
7730 static int
7731 flow_drv_query(struct rte_eth_dev *dev,
7732                uint32_t flow_idx,
7733                const struct rte_flow_action *actions,
7734                void *data,
7735                struct rte_flow_error *error)
7736 {
7737         struct mlx5_priv *priv = dev->data->dev_private;
7738         const struct mlx5_flow_driver_ops *fops;
7739         struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
7740                                                flow_idx);
7741         enum mlx5_flow_drv_type ftype;
7742
7743         if (!flow) {
7744                 return rte_flow_error_set(error, ENOENT,
7745                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7746                           NULL,
7747                           "invalid flow handle");
7748         }
7749         ftype = flow->drv_type;
7750         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
7751         fops = flow_get_drv_ops(ftype);
7752
7753         return fops->query(dev, flow, actions, data, error);
7754 }
7755
7756 /**
7757  * Query a flow.
7758  *
7759  * @see rte_flow_query()
7760  * @see rte_flow_ops
7761  */
7762 int
7763 mlx5_flow_query(struct rte_eth_dev *dev,
7764                 struct rte_flow *flow,
7765                 const struct rte_flow_action *actions,
7766                 void *data,
7767                 struct rte_flow_error *error)
7768 {
7769         int ret;
7770         struct mlx5_priv *priv = dev->data->dev_private;
7771
7772         if (priv->sh->config.dv_flow_en == 2)
7773                 return rte_flow_error_set(error, ENOTSUP,
7774                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7775                           NULL,
7776                           "Flow non-Q query not supported");
7777         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
7778                              error);
7779         if (ret < 0)
7780                 return ret;
7781         return 0;
7782 }
7783
7784 /**
7785  * Get rte_flow callbacks.
7786  *
7787  * @param dev
7788  *   Pointer to Ethernet device structure.
7789  * @param ops
7790  *   Pointer to operation-specific structure.
7791  *
7792  * @return 0
7793  */
7794 int
7795 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
7796                   const struct rte_flow_ops **ops)
7797 {
7798         *ops = &mlx5_flow_ops;
7799         return 0;
7800 }
7801
7802 /**
7803  * Validate meter policy actions.
7804  * Dispatcher for action type specific validation.
7805  *
7806  * @param[in] dev
7807  *   Pointer to the Ethernet device structure.
7808  * @param[in] action
7809  *   The meter policy action object to validate.
7810  * @param[in] attr
7811  *   Attributes of flow to determine steering domain.
7812  * @param[out] is_rss
7813  *   Is RSS or not.
7814  * @param[out] domain_bitmap
7815  *   Domain bitmap.
7816  * @param[out] is_def_policy
7817  *   Is default policy or not.
7818  * @param[out] error
7819  *   Perform verbose error reporting if not NULL. Initialized in case of
7820  *   error only.
7821  *
7822  * @return
7823  *   0 on success, otherwise negative errno value.
7824  */
7825 int
7826 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
7827                         const struct rte_flow_action *actions[RTE_COLORS],
7828                         struct rte_flow_attr *attr,
7829                         bool *is_rss,
7830                         uint8_t *domain_bitmap,
7831                         uint8_t *policy_mode,
7832                         struct rte_mtr_error *error)
7833 {
7834         const struct mlx5_flow_driver_ops *fops;
7835
7836         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7837         return fops->validate_mtr_acts(dev, actions, attr, is_rss,
7838                                        domain_bitmap, policy_mode, error);
7839 }
7840
7841 /**
7842  * Destroy the meter table set.
7843  *
7844  * @param[in] dev
7845  *   Pointer to Ethernet device.
7846  * @param[in] mtr_policy
7847  *   Meter policy struct.
7848  */
7849 void
7850 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7851                       struct mlx5_flow_meter_policy *mtr_policy)
7852 {
7853         const struct mlx5_flow_driver_ops *fops;
7854
7855         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7856         fops->destroy_mtr_acts(dev, mtr_policy);
7857 }
7858
7859 /**
7860  * Create policy action, lock free,
7861  * (mutex should be acquired by caller).
7862  * Dispatcher for action type specific call.
7863  *
7864  * @param[in] dev
7865  *   Pointer to the Ethernet device structure.
7866  * @param[in] mtr_policy
7867  *   Meter policy struct.
7868  * @param[in] action
7869  *   Action specification used to create meter actions.
7870  * @param[out] error
7871  *   Perform verbose error reporting if not NULL. Initialized in case of
7872  *   error only.
7873  *
7874  * @return
7875  *   0 on success, otherwise negative errno value.
7876  */
7877 int
7878 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7879                       struct mlx5_flow_meter_policy *mtr_policy,
7880                       const struct rte_flow_action *actions[RTE_COLORS],
7881                       struct rte_mtr_error *error)
7882 {
7883         const struct mlx5_flow_driver_ops *fops;
7884
7885         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7886         return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7887 }
7888
7889 /**
7890  * Create policy rules, lock free,
7891  * (mutex should be acquired by caller).
7892  * Dispatcher for action type specific call.
7893  *
7894  * @param[in] dev
7895  *   Pointer to the Ethernet device structure.
7896  * @param[in] mtr_policy
7897  *   Meter policy struct.
7898  *
7899  * @return
7900  *   0 on success, -1 otherwise.
7901  */
7902 int
7903 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7904                              struct mlx5_flow_meter_policy *mtr_policy)
7905 {
7906         const struct mlx5_flow_driver_ops *fops;
7907
7908         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7909         return fops->create_policy_rules(dev, mtr_policy);
7910 }
7911
7912 /**
7913  * Destroy policy rules, lock free,
7914  * (mutex should be acquired by caller).
7915  * Dispatcher for action type specific call.
7916  *
7917  * @param[in] dev
7918  *   Pointer to the Ethernet device structure.
7919  * @param[in] mtr_policy
7920  *   Meter policy struct.
7921  */
7922 void
7923 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7924                              struct mlx5_flow_meter_policy *mtr_policy)
7925 {
7926         const struct mlx5_flow_driver_ops *fops;
7927
7928         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7929         fops->destroy_policy_rules(dev, mtr_policy);
7930 }
7931
7932 /**
7933  * Destroy the default policy table set.
7934  *
7935  * @param[in] dev
7936  *   Pointer to Ethernet device.
7937  */
7938 void
7939 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7940 {
7941         const struct mlx5_flow_driver_ops *fops;
7942
7943         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7944         fops->destroy_def_policy(dev);
7945 }
7946
7947 /**
7948  * Destroy the default policy table set.
7949  *
7950  * @param[in] dev
7951  *   Pointer to Ethernet device.
7952  *
7953  * @return
7954  *   0 on success, -1 otherwise.
7955  */
7956 int
7957 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7958 {
7959         const struct mlx5_flow_driver_ops *fops;
7960
7961         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7962         return fops->create_def_policy(dev);
7963 }
7964
7965 /**
7966  * Create the needed meter and suffix tables.
7967  *
7968  * @param[in] dev
7969  *   Pointer to Ethernet device.
7970  *
7971  * @return
7972  *   0 on success, -1 otherwise.
7973  */
7974 int
7975 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7976                         struct mlx5_flow_meter_info *fm,
7977                         uint32_t mtr_idx,
7978                         uint8_t domain_bitmap)
7979 {
7980         const struct mlx5_flow_driver_ops *fops;
7981
7982         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7983         return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7984 }
7985
7986 /**
7987  * Destroy the meter table set.
7988  *
7989  * @param[in] dev
7990  *   Pointer to Ethernet device.
7991  * @param[in] tbl
7992  *   Pointer to the meter table set.
7993  */
7994 void
7995 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7996                            struct mlx5_flow_meter_info *fm)
7997 {
7998         const struct mlx5_flow_driver_ops *fops;
7999
8000         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8001         fops->destroy_mtr_tbls(dev, fm);
8002 }
8003
8004 /**
8005  * Destroy the global meter drop table.
8006  *
8007  * @param[in] dev
8008  *   Pointer to Ethernet device.
8009  */
8010 void
8011 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
8012 {
8013         const struct mlx5_flow_driver_ops *fops;
8014
8015         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8016         fops->destroy_mtr_drop_tbls(dev);
8017 }
8018
8019 /**
8020  * Destroy the sub policy table with RX queue.
8021  *
8022  * @param[in] dev
8023  *   Pointer to Ethernet device.
8024  * @param[in] mtr_policy
8025  *   Pointer to meter policy table.
8026  */
8027 void
8028 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
8029                 struct mlx5_flow_meter_policy *mtr_policy)
8030 {
8031         const struct mlx5_flow_driver_ops *fops;
8032
8033         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8034         fops->destroy_sub_policy_with_rxq(dev, mtr_policy);
8035 }
8036
8037 /**
8038  * Allocate the needed aso flow meter id.
8039  *
8040  * @param[in] dev
8041  *   Pointer to Ethernet device.
8042  *
8043  * @return
8044  *   Index to aso flow meter on success, NULL otherwise.
8045  */
8046 uint32_t
8047 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
8048 {
8049         const struct mlx5_flow_driver_ops *fops;
8050
8051         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8052         return fops->create_meter(dev);
8053 }
8054
8055 /**
8056  * Free the aso flow meter id.
8057  *
8058  * @param[in] dev
8059  *   Pointer to Ethernet device.
8060  * @param[in] mtr_idx
8061  *  Index to aso flow meter to be free.
8062  *
8063  * @return
8064  *   0 on success.
8065  */
8066 void
8067 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
8068 {
8069         const struct mlx5_flow_driver_ops *fops;
8070
8071         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8072         fops->free_meter(dev, mtr_idx);
8073 }
8074
8075 /**
8076  * Allocate a counter.
8077  *
8078  * @param[in] dev
8079  *   Pointer to Ethernet device structure.
8080  *
8081  * @return
8082  *   Index to allocated counter  on success, 0 otherwise.
8083  */
8084 uint32_t
8085 mlx5_counter_alloc(struct rte_eth_dev *dev)
8086 {
8087         const struct mlx5_flow_driver_ops *fops;
8088         struct rte_flow_attr attr = { .transfer = 0 };
8089
8090         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8091                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8092                 return fops->counter_alloc(dev);
8093         }
8094         DRV_LOG(ERR,
8095                 "port %u counter allocate is not supported.",
8096                  dev->data->port_id);
8097         return 0;
8098 }
8099
8100 /**
8101  * Free a counter.
8102  *
8103  * @param[in] dev
8104  *   Pointer to Ethernet device structure.
8105  * @param[in] cnt
8106  *   Index to counter to be free.
8107  */
8108 void
8109 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
8110 {
8111         const struct mlx5_flow_driver_ops *fops;
8112         struct rte_flow_attr attr = { .transfer = 0 };
8113
8114         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8115                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8116                 fops->counter_free(dev, cnt);
8117                 return;
8118         }
8119         DRV_LOG(ERR,
8120                 "port %u counter free is not supported.",
8121                  dev->data->port_id);
8122 }
8123
8124 /**
8125  * Query counter statistics.
8126  *
8127  * @param[in] dev
8128  *   Pointer to Ethernet device structure.
8129  * @param[in] cnt
8130  *   Index to counter to query.
8131  * @param[in] clear
8132  *   Set to clear counter statistics.
8133  * @param[out] pkts
8134  *   The counter hits packets number to save.
8135  * @param[out] bytes
8136  *   The counter hits bytes number to save.
8137  *
8138  * @return
8139  *   0 on success, a negative errno value otherwise.
8140  */
8141 int
8142 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
8143                    bool clear, uint64_t *pkts, uint64_t *bytes, void **action)
8144 {
8145         const struct mlx5_flow_driver_ops *fops;
8146         struct rte_flow_attr attr = { .transfer = 0 };
8147
8148         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8149                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8150                 return fops->counter_query(dev, cnt, clear, pkts,
8151                                         bytes, action);
8152         }
8153         DRV_LOG(ERR,
8154                 "port %u counter query is not supported.",
8155                  dev->data->port_id);
8156         return -ENOTSUP;
8157 }
8158
8159 /**
8160  * Get information about HWS pre-configurable resources.
8161  *
8162  * @param[in] dev
8163  *   Pointer to the rte_eth_dev structure.
8164  * @param[out] port_info
8165  *   Pointer to port information.
8166  * @param[out] queue_info
8167  *   Pointer to queue information.
8168  * @param[out] error
8169  *   Pointer to error structure.
8170  *
8171  * @return
8172  *   0 on success, a negative errno value otherwise and rte_errno is set.
8173  */
8174 static int
8175 mlx5_flow_info_get(struct rte_eth_dev *dev,
8176                    struct rte_flow_port_info *port_info,
8177                    struct rte_flow_queue_info *queue_info,
8178                    struct rte_flow_error *error)
8179 {
8180         const struct mlx5_flow_driver_ops *fops;
8181
8182         if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8183                 return rte_flow_error_set(error, ENOTSUP,
8184                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8185                                 NULL,
8186                                 "info get with incorrect steering mode");
8187         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8188         return fops->info_get(dev, port_info, queue_info, error);
8189 }
8190
8191 /**
8192  * Configure port HWS resources.
8193  *
8194  * @param[in] dev
8195  *   Pointer to the rte_eth_dev structure.
8196  * @param[in] port_attr
8197  *   Port configuration attributes.
8198  * @param[in] nb_queue
8199  *   Number of queue.
8200  * @param[in] queue_attr
8201  *   Array that holds attributes for each flow queue.
8202  * @param[out] error
8203  *   Pointer to error structure.
8204  *
8205  * @return
8206  *   0 on success, a negative errno value otherwise and rte_errno is set.
8207  */
8208 static int
8209 mlx5_flow_port_configure(struct rte_eth_dev *dev,
8210                          const struct rte_flow_port_attr *port_attr,
8211                          uint16_t nb_queue,
8212                          const struct rte_flow_queue_attr *queue_attr[],
8213                          struct rte_flow_error *error)
8214 {
8215         const struct mlx5_flow_driver_ops *fops;
8216
8217         if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8218                 return rte_flow_error_set(error, ENOTSUP,
8219                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8220                                 NULL,
8221                                 "port configure with incorrect steering mode");
8222         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8223         return fops->configure(dev, port_attr, nb_queue, queue_attr, error);
8224 }
8225
8226 /**
8227  * Create flow item template.
8228  *
8229  * @param[in] dev
8230  *   Pointer to the rte_eth_dev structure.
8231  * @param[in] attr
8232  *   Pointer to the item template attributes.
8233  * @param[in] items
8234  *   The template item pattern.
8235  * @param[out] error
8236  *   Pointer to error structure.
8237  *
8238  * @return
8239  *   0 on success, a negative errno value otherwise and rte_errno is set.
8240  */
8241 static struct rte_flow_pattern_template *
8242 mlx5_flow_pattern_template_create(struct rte_eth_dev *dev,
8243                 const struct rte_flow_pattern_template_attr *attr,
8244                 const struct rte_flow_item items[],
8245                 struct rte_flow_error *error)
8246 {
8247         const struct mlx5_flow_driver_ops *fops;
8248
8249         if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW) {
8250                 rte_flow_error_set(error, ENOTSUP,
8251                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8252                                 NULL,
8253                                 "pattern create with incorrect steering mode");
8254                 return NULL;
8255         }
8256         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8257         return fops->pattern_template_create(dev, attr, items, error);
8258 }
8259
8260 /**
8261  * Destroy flow item template.
8262  *
8263  * @param[in] dev
8264  *   Pointer to the rte_eth_dev structure.
8265  * @param[in] template
8266  *   Pointer to the item template to be destroyed.
8267  * @param[out] error
8268  *   Pointer to error structure.
8269  *
8270  * @return
8271  *   0 on success, a negative errno value otherwise and rte_errno is set.
8272  */
8273 static int
8274 mlx5_flow_pattern_template_destroy(struct rte_eth_dev *dev,
8275                                    struct rte_flow_pattern_template *template,
8276                                    struct rte_flow_error *error)
8277 {
8278         const struct mlx5_flow_driver_ops *fops;
8279
8280         if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8281                 return rte_flow_error_set(error, ENOTSUP,
8282                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8283                                 NULL,
8284                                 "pattern destroy with incorrect steering mode");
8285         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8286         return fops->pattern_template_destroy(dev, template, error);
8287 }
8288
8289 /**
8290  * Create flow item template.
8291  *
8292  * @param[in] dev
8293  *   Pointer to the rte_eth_dev structure.
8294  * @param[in] attr
8295  *   Pointer to the action template attributes.
8296  * @param[in] actions
8297  *   Associated actions (list terminated by the END action).
8298  * @param[in] masks
8299  *   List of actions that marks which of the action's member is constant.
8300  * @param[out] error
8301  *   Pointer to error structure.
8302  *
8303  * @return
8304  *   0 on success, a negative errno value otherwise and rte_errno is set.
8305  */
8306 static struct rte_flow_actions_template *
8307 mlx5_flow_actions_template_create(struct rte_eth_dev *dev,
8308                         const struct rte_flow_actions_template_attr *attr,
8309                         const struct rte_flow_action actions[],
8310                         const struct rte_flow_action masks[],
8311                         struct rte_flow_error *error)
8312 {
8313         const struct mlx5_flow_driver_ops *fops;
8314
8315         if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW) {
8316                 rte_flow_error_set(error, ENOTSUP,
8317                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8318                                 NULL,
8319                                 "action create with incorrect steering mode");
8320                 return NULL;
8321         }
8322         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8323         return fops->actions_template_create(dev, attr, actions, masks, error);
8324 }
8325
8326 /**
8327  * Destroy flow action template.
8328  *
8329  * @param[in] dev
8330  *   Pointer to the rte_eth_dev structure.
8331  * @param[in] template
8332  *   Pointer to the action template to be destroyed.
8333  * @param[out] error
8334  *   Pointer to error structure.
8335  *
8336  * @return
8337  *   0 on success, a negative errno value otherwise and rte_errno is set.
8338  */
8339 static int
8340 mlx5_flow_actions_template_destroy(struct rte_eth_dev *dev,
8341                                    struct rte_flow_actions_template *template,
8342                                    struct rte_flow_error *error)
8343 {
8344         const struct mlx5_flow_driver_ops *fops;
8345
8346         if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8347                 return rte_flow_error_set(error, ENOTSUP,
8348                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8349                                 NULL,
8350                                 "action destroy with incorrect steering mode");
8351         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8352         return fops->actions_template_destroy(dev, template, error);
8353 }
8354
8355 /**
8356  * Create flow table.
8357  *
8358  * @param[in] dev
8359  *   Pointer to the rte_eth_dev structure.
8360  * @param[in] attr
8361  *   Pointer to the table attributes.
8362  * @param[in] item_templates
8363  *   Item template array to be binded to the table.
8364  * @param[in] nb_item_templates
8365  *   Number of item template.
8366  * @param[in] action_templates
8367  *   Action template array to be binded to the table.
8368  * @param[in] nb_action_templates
8369  *   Number of action template.
8370  * @param[out] error
8371  *   Pointer to error structure.
8372  *
8373  * @return
8374  *    Table on success, NULL otherwise and rte_errno is set.
8375  */
8376 static struct rte_flow_template_table *
8377 mlx5_flow_table_create(struct rte_eth_dev *dev,
8378                        const struct rte_flow_template_table_attr *attr,
8379                        struct rte_flow_pattern_template *item_templates[],
8380                        uint8_t nb_item_templates,
8381                        struct rte_flow_actions_template *action_templates[],
8382                        uint8_t nb_action_templates,
8383                        struct rte_flow_error *error)
8384 {
8385         const struct mlx5_flow_driver_ops *fops;
8386
8387         if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW) {
8388                 rte_flow_error_set(error, ENOTSUP,
8389                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8390                                 NULL,
8391                                 "table create with incorrect steering mode");
8392                 return NULL;
8393         }
8394         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8395         return fops->template_table_create(dev,
8396                                            attr,
8397                                            item_templates,
8398                                            nb_item_templates,
8399                                            action_templates,
8400                                            nb_action_templates,
8401                                            error);
8402 }
8403
8404 /**
8405  * PMD destroy flow table.
8406  *
8407  * @param[in] dev
8408  *   Pointer to the rte_eth_dev structure.
8409  * @param[in] table
8410  *   Pointer to the table to be destroyed.
8411  * @param[out] error
8412  *   Pointer to error structure.
8413  *
8414  * @return
8415  *   0 on success, a negative errno value otherwise and rte_errno is set.
8416  */
8417 static int
8418 mlx5_flow_table_destroy(struct rte_eth_dev *dev,
8419                         struct rte_flow_template_table *table,
8420                         struct rte_flow_error *error)
8421 {
8422         const struct mlx5_flow_driver_ops *fops;
8423
8424         if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8425                 return rte_flow_error_set(error, ENOTSUP,
8426                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8427                                 NULL,
8428                                 "table destroy with incorrect steering mode");
8429         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8430         return fops->template_table_destroy(dev, table, error);
8431 }
8432
8433 /**
8434  * Enqueue flow creation.
8435  *
8436  * @param[in] dev
8437  *   Pointer to the rte_eth_dev structure.
8438  * @param[in] queue_id
8439  *   The queue to create the flow.
8440  * @param[in] attr
8441  *   Pointer to the flow operation attributes.
8442  * @param[in] items
8443  *   Items with flow spec value.
8444  * @param[in] pattern_template_index
8445  *   The item pattern flow follows from the table.
8446  * @param[in] actions
8447  *   Action with flow spec value.
8448  * @param[in] action_template_index
8449  *   The action pattern flow follows from the table.
8450  * @param[in] user_data
8451  *   Pointer to the user_data.
8452  * @param[out] error
8453  *   Pointer to error structure.
8454  *
8455  * @return
8456  *    Flow pointer on success, NULL otherwise and rte_errno is set.
8457  */
8458 static struct rte_flow *
8459 mlx5_flow_async_flow_create(struct rte_eth_dev *dev,
8460                             uint32_t queue_id,
8461                             const struct rte_flow_op_attr *attr,
8462                             struct rte_flow_template_table *table,
8463                             const struct rte_flow_item items[],
8464                             uint8_t pattern_template_index,
8465                             const struct rte_flow_action actions[],
8466                             uint8_t action_template_index,
8467                             void *user_data,
8468                             struct rte_flow_error *error)
8469 {
8470         const struct mlx5_flow_driver_ops *fops;
8471
8472         if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW) {
8473                 rte_flow_error_set(error, ENOTSUP,
8474                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8475                                 NULL,
8476                                 "flow_q create with incorrect steering mode");
8477                 return NULL;
8478         }
8479         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8480         return fops->async_flow_create(dev, queue_id, attr, table,
8481                                        items, pattern_template_index,
8482                                        actions, action_template_index,
8483                                        user_data, error);
8484 }
8485
8486 /**
8487  * Enqueue flow destruction.
8488  *
8489  * @param[in] dev
8490  *   Pointer to the rte_eth_dev structure.
8491  * @param[in] queue
8492  *   The queue to destroy the flow.
8493  * @param[in] attr
8494  *   Pointer to the flow operation attributes.
8495  * @param[in] flow
8496  *   Pointer to the flow to be destroyed.
8497  * @param[in] user_data
8498  *   Pointer to the user_data.
8499  * @param[out] error
8500  *   Pointer to error structure.
8501  *
8502  * @return
8503  *    0 on success, negative value otherwise and rte_errno is set.
8504  */
8505 static int
8506 mlx5_flow_async_flow_destroy(struct rte_eth_dev *dev,
8507                              uint32_t queue,
8508                              const struct rte_flow_op_attr *attr,
8509                              struct rte_flow *flow,
8510                              void *user_data,
8511                              struct rte_flow_error *error)
8512 {
8513         const struct mlx5_flow_driver_ops *fops;
8514
8515         if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8516                 return rte_flow_error_set(error, ENOTSUP,
8517                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8518                                 NULL,
8519                                 "flow_q destroy with incorrect steering mode");
8520         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8521         return fops->async_flow_destroy(dev, queue, attr, flow,
8522                                         user_data, error);
8523 }
8524
8525 /**
8526  * Pull the enqueued flows.
8527  *
8528  * @param[in] dev
8529  *   Pointer to the rte_eth_dev structure.
8530  * @param[in] queue
8531  *   The queue to pull the result.
8532  * @param[in/out] res
8533  *   Array to save the results.
8534  * @param[in] n_res
8535  *   Available result with the array.
8536  * @param[out] error
8537  *   Pointer to error structure.
8538  *
8539  * @return
8540  *    Result number on success, negative value otherwise and rte_errno is set.
8541  */
8542 static int
8543 mlx5_flow_pull(struct rte_eth_dev *dev,
8544                uint32_t queue,
8545                struct rte_flow_op_result res[],
8546                uint16_t n_res,
8547                struct rte_flow_error *error)
8548 {
8549         const struct mlx5_flow_driver_ops *fops;
8550
8551         if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8552                 return rte_flow_error_set(error, ENOTSUP,
8553                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8554                                 NULL,
8555                                 "flow_q pull with incorrect steering mode");
8556         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8557         return fops->pull(dev, queue, res, n_res, error);
8558 }
8559
8560 /**
8561  * Push the enqueued flows.
8562  *
8563  * @param[in] dev
8564  *   Pointer to the rte_eth_dev structure.
8565  * @param[in] queue
8566  *   The queue to push the flows.
8567  * @param[out] error
8568  *   Pointer to error structure.
8569  *
8570  * @return
8571  *    0 on success, negative value otherwise and rte_errno is set.
8572  */
8573 static int
8574 mlx5_flow_push(struct rte_eth_dev *dev,
8575                uint32_t queue,
8576                struct rte_flow_error *error)
8577 {
8578         const struct mlx5_flow_driver_ops *fops;
8579
8580         if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8581                 return rte_flow_error_set(error, ENOTSUP,
8582                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8583                                 NULL,
8584                                 "flow_q push with incorrect steering mode");
8585         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8586         return fops->push(dev, queue, error);
8587 }
8588
8589 /**
8590  * Create shared action.
8591  *
8592  * @param[in] dev
8593  *   Pointer to the rte_eth_dev structure.
8594  * @param[in] queue
8595  *   Which queue to be used..
8596  * @param[in] attr
8597  *   Operation attribute.
8598  * @param[in] conf
8599  *   Indirect action configuration.
8600  * @param[in] action
8601  *   rte_flow action detail.
8602  * @param[in] user_data
8603  *   Pointer to the user_data.
8604  * @param[out] error
8605  *   Pointer to error structure.
8606  *
8607  * @return
8608  *   Action handle on success, NULL otherwise and rte_errno is set.
8609  */
8610 static struct rte_flow_action_handle *
8611 mlx5_flow_async_action_handle_create(struct rte_eth_dev *dev, uint32_t queue,
8612                                  const struct rte_flow_op_attr *attr,
8613                                  const struct rte_flow_indir_action_conf *conf,
8614                                  const struct rte_flow_action *action,
8615                                  void *user_data,
8616                                  struct rte_flow_error *error)
8617 {
8618         const struct mlx5_flow_driver_ops *fops =
8619                         flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8620
8621         return fops->async_action_create(dev, queue, attr, conf, action,
8622                                          user_data, error);
8623 }
8624
8625 /**
8626  * Update shared action.
8627  *
8628  * @param[in] dev
8629  *   Pointer to the rte_eth_dev structure.
8630  * @param[in] queue
8631  *   Which queue to be used..
8632  * @param[in] attr
8633  *   Operation attribute.
8634  * @param[in] handle
8635  *   Action handle to be updated.
8636  * @param[in] update
8637  *   Update value.
8638  * @param[in] user_data
8639  *   Pointer to the user_data.
8640  * @param[out] error
8641  *   Pointer to error structure.
8642  *
8643  * @return
8644  *   0 on success, negative value otherwise and rte_errno is set.
8645  */
8646 static int
8647 mlx5_flow_async_action_handle_update(struct rte_eth_dev *dev, uint32_t queue,
8648                                      const struct rte_flow_op_attr *attr,
8649                                      struct rte_flow_action_handle *handle,
8650                                      const void *update,
8651                                      void *user_data,
8652                                      struct rte_flow_error *error)
8653 {
8654         const struct mlx5_flow_driver_ops *fops =
8655                         flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8656
8657         return fops->async_action_update(dev, queue, attr, handle,
8658                                          update, user_data, error);
8659 }
8660
8661 /**
8662  * Destroy shared action.
8663  *
8664  * @param[in] dev
8665  *   Pointer to the rte_eth_dev structure.
8666  * @param[in] queue
8667  *   Which queue to be used..
8668  * @param[in] attr
8669  *   Operation attribute.
8670  * @param[in] handle
8671  *   Action handle to be destroyed.
8672  * @param[in] user_data
8673  *   Pointer to the user_data.
8674  * @param[out] error
8675  *   Pointer to error structure.
8676  *
8677  * @return
8678  *   0 on success, negative value otherwise and rte_errno is set.
8679  */
8680 static int
8681 mlx5_flow_async_action_handle_destroy(struct rte_eth_dev *dev, uint32_t queue,
8682                                       const struct rte_flow_op_attr *attr,
8683                                       struct rte_flow_action_handle *handle,
8684                                       void *user_data,
8685                                       struct rte_flow_error *error)
8686 {
8687         const struct mlx5_flow_driver_ops *fops =
8688                         flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8689
8690         return fops->async_action_destroy(dev, queue, attr, handle,
8691                                           user_data, error);
8692 }
8693
8694 /**
8695  * Allocate a new memory for the counter values wrapped by all the needed
8696  * management.
8697  *
8698  * @param[in] sh
8699  *   Pointer to mlx5_dev_ctx_shared object.
8700  *
8701  * @return
8702  *   0 on success, a negative errno value otherwise.
8703  */
8704 static int
8705 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
8706 {
8707         struct mlx5_counter_stats_mem_mng *mem_mng;
8708         volatile struct flow_counter_stats *raw_data;
8709         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
8710         int size = (sizeof(struct flow_counter_stats) *
8711                         MLX5_COUNTERS_PER_POOL +
8712                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
8713                         sizeof(struct mlx5_counter_stats_mem_mng);
8714         size_t pgsize = rte_mem_page_size();
8715         uint8_t *mem;
8716         int ret;
8717         int i;
8718
8719         if (pgsize == (size_t)-1) {
8720                 DRV_LOG(ERR, "Failed to get mem page size");
8721                 rte_errno = ENOMEM;
8722                 return -ENOMEM;
8723         }
8724         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
8725         if (!mem) {
8726                 rte_errno = ENOMEM;
8727                 return -ENOMEM;
8728         }
8729         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
8730         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
8731         ret = mlx5_os_wrapped_mkey_create(sh->cdev->ctx, sh->cdev->pd,
8732                                           sh->cdev->pdn, mem, size,
8733                                           &mem_mng->wm);
8734         if (ret) {
8735                 rte_errno = errno;
8736                 mlx5_free(mem);
8737                 return -rte_errno;
8738         }
8739         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
8740         raw_data = (volatile struct flow_counter_stats *)mem;
8741         for (i = 0; i < raws_n; ++i) {
8742                 mem_mng->raws[i].mem_mng = mem_mng;
8743                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
8744         }
8745         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
8746                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
8747                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
8748                                  next);
8749         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
8750         sh->cmng.mem_mng = mem_mng;
8751         return 0;
8752 }
8753
8754 /**
8755  * Set the statistic memory to the new counter pool.
8756  *
8757  * @param[in] sh
8758  *   Pointer to mlx5_dev_ctx_shared object.
8759  * @param[in] pool
8760  *   Pointer to the pool to set the statistic memory.
8761  *
8762  * @return
8763  *   0 on success, a negative errno value otherwise.
8764  */
8765 static int
8766 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
8767                                struct mlx5_flow_counter_pool *pool)
8768 {
8769         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
8770         /* Resize statistic memory once used out. */
8771         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
8772             mlx5_flow_create_counter_stat_mem_mng(sh)) {
8773                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
8774                 return -1;
8775         }
8776         rte_spinlock_lock(&pool->sl);
8777         pool->raw = cmng->mem_mng->raws + pool->index %
8778                     MLX5_CNT_CONTAINER_RESIZE;
8779         rte_spinlock_unlock(&pool->sl);
8780         pool->raw_hw = NULL;
8781         return 0;
8782 }
8783
8784 #define MLX5_POOL_QUERY_FREQ_US 1000000
8785
8786 /**
8787  * Set the periodic procedure for triggering asynchronous batch queries for all
8788  * the counter pools.
8789  *
8790  * @param[in] sh
8791  *   Pointer to mlx5_dev_ctx_shared object.
8792  */
8793 void
8794 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
8795 {
8796         uint32_t pools_n, us;
8797
8798         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
8799         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
8800         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
8801         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
8802                 sh->cmng.query_thread_on = 0;
8803                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
8804         } else {
8805                 sh->cmng.query_thread_on = 1;
8806         }
8807 }
8808
8809 /**
8810  * The periodic procedure for triggering asynchronous batch queries for all the
8811  * counter pools. This function is probably called by the host thread.
8812  *
8813  * @param[in] arg
8814  *   The parameter for the alarm process.
8815  */
8816 void
8817 mlx5_flow_query_alarm(void *arg)
8818 {
8819         struct mlx5_dev_ctx_shared *sh = arg;
8820         int ret;
8821         uint16_t pool_index = sh->cmng.pool_index;
8822         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
8823         struct mlx5_flow_counter_pool *pool;
8824         uint16_t n_valid;
8825
8826         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
8827                 goto set_alarm;
8828         rte_spinlock_lock(&cmng->pool_update_sl);
8829         pool = cmng->pools[pool_index];
8830         n_valid = cmng->n_valid;
8831         rte_spinlock_unlock(&cmng->pool_update_sl);
8832         /* Set the statistic memory to the new created pool. */
8833         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
8834                 goto set_alarm;
8835         if (pool->raw_hw)
8836                 /* There is a pool query in progress. */
8837                 goto set_alarm;
8838         pool->raw_hw =
8839                 LIST_FIRST(&sh->cmng.free_stat_raws);
8840         if (!pool->raw_hw)
8841                 /* No free counter statistics raw memory. */
8842                 goto set_alarm;
8843         /*
8844          * Identify the counters released between query trigger and query
8845          * handle more efficiently. The counter released in this gap period
8846          * should wait for a new round of query as the new arrived packets
8847          * will not be taken into account.
8848          */
8849         pool->query_gen++;
8850         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
8851                                                MLX5_COUNTERS_PER_POOL,
8852                                                NULL, NULL,
8853                                                pool->raw_hw->mem_mng->wm.lkey,
8854                                                (void *)(uintptr_t)
8855                                                pool->raw_hw->data,
8856                                                sh->devx_comp,
8857                                                (uint64_t)(uintptr_t)pool);
8858         if (ret) {
8859                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
8860                         " %d", pool->min_dcs->id);
8861                 pool->raw_hw = NULL;
8862                 goto set_alarm;
8863         }
8864         LIST_REMOVE(pool->raw_hw, next);
8865         sh->cmng.pending_queries++;
8866         pool_index++;
8867         if (pool_index >= n_valid)
8868                 pool_index = 0;
8869 set_alarm:
8870         sh->cmng.pool_index = pool_index;
8871         mlx5_set_query_alarm(sh);
8872 }
8873
8874 /**
8875  * Check and callback event for new aged flow in the counter pool
8876  *
8877  * @param[in] sh
8878  *   Pointer to mlx5_dev_ctx_shared object.
8879  * @param[in] pool
8880  *   Pointer to Current counter pool.
8881  */
8882 static void
8883 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
8884                    struct mlx5_flow_counter_pool *pool)
8885 {
8886         struct mlx5_priv *priv;
8887         struct mlx5_flow_counter *cnt;
8888         struct mlx5_age_info *age_info;
8889         struct mlx5_age_param *age_param;
8890         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
8891         struct mlx5_counter_stats_raw *prev = pool->raw;
8892         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
8893         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
8894         uint16_t expected = AGE_CANDIDATE;
8895         uint32_t i;
8896
8897         pool->time_of_last_age_check = curr_time;
8898         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
8899                 cnt = MLX5_POOL_GET_CNT(pool, i);
8900                 age_param = MLX5_CNT_TO_AGE(cnt);
8901                 if (__atomic_load_n(&age_param->state,
8902                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
8903                         continue;
8904                 if (cur->data[i].hits != prev->data[i].hits) {
8905                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
8906                                          __ATOMIC_RELAXED);
8907                         continue;
8908                 }
8909                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
8910                                        time_delta,
8911                                        __ATOMIC_RELAXED) <= age_param->timeout)
8912                         continue;
8913                 /**
8914                  * Hold the lock first, or if between the
8915                  * state AGE_TMOUT and tailq operation the
8916                  * release happened, the release procedure
8917                  * may delete a non-existent tailq node.
8918                  */
8919                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
8920                 age_info = GET_PORT_AGE_INFO(priv);
8921                 rte_spinlock_lock(&age_info->aged_sl);
8922                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
8923                                                 AGE_TMOUT, false,
8924                                                 __ATOMIC_RELAXED,
8925                                                 __ATOMIC_RELAXED)) {
8926                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
8927                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
8928                 }
8929                 rte_spinlock_unlock(&age_info->aged_sl);
8930         }
8931         mlx5_age_event_prepare(sh);
8932 }
8933
8934 /**
8935  * Handler for the HW respond about ready values from an asynchronous batch
8936  * query. This function is probably called by the host thread.
8937  *
8938  * @param[in] sh
8939  *   The pointer to the shared device context.
8940  * @param[in] async_id
8941  *   The Devx async ID.
8942  * @param[in] status
8943  *   The status of the completion.
8944  */
8945 void
8946 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
8947                                   uint64_t async_id, int status)
8948 {
8949         struct mlx5_flow_counter_pool *pool =
8950                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
8951         struct mlx5_counter_stats_raw *raw_to_free;
8952         uint8_t query_gen = pool->query_gen ^ 1;
8953         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
8954         enum mlx5_counter_type cnt_type =
8955                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
8956                                 MLX5_COUNTER_TYPE_ORIGIN;
8957
8958         if (unlikely(status)) {
8959                 raw_to_free = pool->raw_hw;
8960         } else {
8961                 raw_to_free = pool->raw;
8962                 if (pool->is_aged)
8963                         mlx5_flow_aging_check(sh, pool);
8964                 rte_spinlock_lock(&pool->sl);
8965                 pool->raw = pool->raw_hw;
8966                 rte_spinlock_unlock(&pool->sl);
8967                 /* Be sure the new raw counters data is updated in memory. */
8968                 rte_io_wmb();
8969                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
8970                         rte_spinlock_lock(&cmng->csl[cnt_type]);
8971                         TAILQ_CONCAT(&cmng->counters[cnt_type],
8972                                      &pool->counters[query_gen], next);
8973                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
8974                 }
8975         }
8976         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
8977         pool->raw_hw = NULL;
8978         sh->cmng.pending_queries--;
8979 }
8980
8981 static int
8982 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
8983                     const struct flow_grp_info *grp_info,
8984                     struct rte_flow_error *error)
8985 {
8986         if (grp_info->transfer && grp_info->external &&
8987             grp_info->fdb_def_rule) {
8988                 if (group == UINT32_MAX)
8989                         return rte_flow_error_set
8990                                                 (error, EINVAL,
8991                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8992                                                  NULL,
8993                                                  "group index not supported");
8994                 *table = group + 1;
8995         } else {
8996                 *table = group;
8997         }
8998         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
8999         return 0;
9000 }
9001
9002 /**
9003  * Translate the rte_flow group index to HW table value.
9004  *
9005  * If tunnel offload is disabled, all group ids converted to flow table
9006  * id using the standard method.
9007  * If tunnel offload is enabled, group id can be converted using the
9008  * standard or tunnel conversion method. Group conversion method
9009  * selection depends on flags in `grp_info` parameter:
9010  * - Internal (grp_info.external == 0) groups conversion uses the
9011  *   standard method.
9012  * - Group ids in JUMP action converted with the tunnel conversion.
9013  * - Group id in rule attribute conversion depends on a rule type and
9014  *   group id value:
9015  *   ** non zero group attributes converted with the tunnel method
9016  *   ** zero group attribute in non-tunnel rule is converted using the
9017  *      standard method - there's only one root table
9018  *   ** zero group attribute in steer tunnel rule is converted with the
9019  *      standard method - single root table
9020  *   ** zero group attribute in match tunnel rule is a special OvS
9021  *      case: that value is used for portability reasons. That group
9022  *      id is converted with the tunnel conversion method.
9023  *
9024  * @param[in] dev
9025  *   Port device
9026  * @param[in] tunnel
9027  *   PMD tunnel offload object
9028  * @param[in] group
9029  *   rte_flow group index value.
9030  * @param[out] table
9031  *   HW table value.
9032  * @param[in] grp_info
9033  *   flags used for conversion
9034  * @param[out] error
9035  *   Pointer to error structure.
9036  *
9037  * @return
9038  *   0 on success, a negative errno value otherwise and rte_errno is set.
9039  */
9040 int
9041 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
9042                          const struct mlx5_flow_tunnel *tunnel,
9043                          uint32_t group, uint32_t *table,
9044                          const struct flow_grp_info *grp_info,
9045                          struct rte_flow_error *error)
9046 {
9047         int ret;
9048         bool standard_translation;
9049
9050         if (!grp_info->skip_scale && grp_info->external &&
9051             group < MLX5_MAX_TABLES_EXTERNAL)
9052                 group *= MLX5_FLOW_TABLE_FACTOR;
9053         if (is_tunnel_offload_active(dev)) {
9054                 standard_translation = !grp_info->external ||
9055                                         grp_info->std_tbl_fix;
9056         } else {
9057                 standard_translation = true;
9058         }
9059         DRV_LOG(DEBUG,
9060                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
9061                 dev->data->port_id, group, grp_info->transfer,
9062                 grp_info->external, grp_info->fdb_def_rule,
9063                 standard_translation ? "STANDARD" : "TUNNEL");
9064         if (standard_translation)
9065                 ret = flow_group_to_table(dev->data->port_id, group, table,
9066                                           grp_info, error);
9067         else
9068                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
9069                                                       table, error);
9070
9071         return ret;
9072 }
9073
9074 /**
9075  * Discover availability of metadata reg_c's.
9076  *
9077  * Iteratively use test flows to check availability.
9078  *
9079  * @param[in] dev
9080  *   Pointer to the Ethernet device structure.
9081  *
9082  * @return
9083  *   0 on success, a negative errno value otherwise and rte_errno is set.
9084  */
9085 int
9086 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
9087 {
9088         struct mlx5_priv *priv = dev->data->dev_private;
9089         enum modify_reg idx;
9090         int n = 0;
9091
9092         /* reg_c[0] and reg_c[1] are reserved. */
9093         priv->sh->flow_mreg_c[n++] = REG_C_0;
9094         priv->sh->flow_mreg_c[n++] = REG_C_1;
9095         /* Discover availability of other reg_c's. */
9096         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
9097                 struct rte_flow_attr attr = {
9098                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
9099                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
9100                         .ingress = 1,
9101                 };
9102                 struct rte_flow_item items[] = {
9103                         [0] = {
9104                                 .type = RTE_FLOW_ITEM_TYPE_END,
9105                         },
9106                 };
9107                 struct rte_flow_action actions[] = {
9108                         [0] = {
9109                                 .type = (enum rte_flow_action_type)
9110                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
9111                                 .conf = &(struct mlx5_flow_action_copy_mreg){
9112                                         .src = REG_C_1,
9113                                         .dst = idx,
9114                                 },
9115                         },
9116                         [1] = {
9117                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
9118                                 .conf = &(struct rte_flow_action_jump){
9119                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
9120                                 },
9121                         },
9122                         [2] = {
9123                                 .type = RTE_FLOW_ACTION_TYPE_END,
9124                         },
9125                 };
9126                 uint32_t flow_idx;
9127                 struct rte_flow *flow;
9128                 struct rte_flow_error error;
9129
9130                 if (!priv->sh->config.dv_flow_en)
9131                         break;
9132                 /* Create internal flow, validation skips copy action. */
9133                 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr,
9134                                         items, actions, false, &error);
9135                 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
9136                                       flow_idx);
9137                 if (!flow)
9138                         continue;
9139                 priv->sh->flow_mreg_c[n++] = idx;
9140                 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx);
9141         }
9142         for (; n < MLX5_MREG_C_NUM; ++n)
9143                 priv->sh->flow_mreg_c[n] = REG_NON;
9144         priv->sh->metadata_regc_check_flag = 1;
9145         return 0;
9146 }
9147
9148 int
9149 save_dump_file(const uint8_t *data, uint32_t size,
9150         uint32_t type, uint64_t id, void *arg, FILE *file)
9151 {
9152         char line[BUF_SIZE];
9153         uint32_t out = 0;
9154         uint32_t k;
9155         uint32_t actions_num;
9156         struct rte_flow_query_count *count;
9157
9158         memset(line, 0, BUF_SIZE);
9159         switch (type) {
9160         case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR:
9161                 actions_num = *(uint32_t *)(arg);
9162                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",%d,",
9163                                 type, id, actions_num);
9164                 break;
9165         case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT:
9166                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",",
9167                                 type, id);
9168                 break;
9169         case DR_DUMP_REC_TYPE_PMD_COUNTER:
9170                 count = (struct rte_flow_query_count *)arg;
9171                 fprintf(file,
9172                         "%d,0x%" PRIx64 ",%" PRIu64 ",%" PRIu64 "\n",
9173                         type, id, count->hits, count->bytes);
9174                 return 0;
9175         default:
9176                 return -1;
9177         }
9178
9179         for (k = 0; k < size; k++) {
9180                 /* Make sure we do not overrun the line buffer length. */
9181                 if (out >= BUF_SIZE - 4) {
9182                         line[out] = '\0';
9183                         break;
9184                 }
9185                 out += snprintf(line + out, BUF_SIZE - out, "%02x",
9186                                 (data[k]) & 0xff);
9187         }
9188         fprintf(file, "%s\n", line);
9189         return 0;
9190 }
9191
9192 int
9193 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow,
9194         struct rte_flow_query_count *count, struct rte_flow_error *error)
9195 {
9196         struct rte_flow_action action[2];
9197         enum mlx5_flow_drv_type ftype;
9198         const struct mlx5_flow_driver_ops *fops;
9199
9200         if (!flow) {
9201                 return rte_flow_error_set(error, ENOENT,
9202                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9203                                 NULL,
9204                                 "invalid flow handle");
9205         }
9206         action[0].type = RTE_FLOW_ACTION_TYPE_COUNT;
9207         action[1].type = RTE_FLOW_ACTION_TYPE_END;
9208         if (flow->counter) {
9209                 memset(count, 0, sizeof(struct rte_flow_query_count));
9210                 ftype = (enum mlx5_flow_drv_type)(flow->drv_type);
9211                 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN &&
9212                                                 ftype < MLX5_FLOW_TYPE_MAX);
9213                 fops = flow_get_drv_ops(ftype);
9214                 return fops->query(dev, flow, action, count, error);
9215         }
9216         return -1;
9217 }
9218
9219 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
9220 /**
9221  * Dump flow ipool data to file
9222  *
9223  * @param[in] dev
9224  *   The pointer to Ethernet device.
9225  * @param[in] file
9226  *   A pointer to a file for output.
9227  * @param[out] error
9228  *   Perform verbose error reporting if not NULL. PMDs initialize this
9229  *   structure in case of error only.
9230  * @return
9231  *   0 on success, a negative value otherwise.
9232  */
9233 int
9234 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev,
9235         struct rte_flow *flow, FILE *file,
9236         struct rte_flow_error *error)
9237 {
9238         struct mlx5_priv *priv = dev->data->dev_private;
9239         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
9240         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
9241         uint32_t handle_idx;
9242         struct mlx5_flow_handle *dh;
9243         struct rte_flow_query_count count;
9244         uint32_t actions_num;
9245         const uint8_t *data;
9246         size_t size;
9247         uint64_t id;
9248         uint32_t type;
9249         void *action = NULL;
9250
9251         if (!flow) {
9252                 return rte_flow_error_set(error, ENOENT,
9253                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9254                                 NULL,
9255                                 "invalid flow handle");
9256         }
9257         handle_idx = flow->dev_handles;
9258         /* query counter */
9259         if (flow->counter &&
9260         (!mlx5_counter_query(dev, flow->counter, false,
9261         &count.hits, &count.bytes, &action)) && action) {
9262                 id = (uint64_t)(uintptr_t)action;
9263                 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
9264                 save_dump_file(NULL, 0, type,
9265                         id, (void *)&count, file);
9266         }
9267
9268         while (handle_idx) {
9269                 dh = mlx5_ipool_get(priv->sh->ipool
9270                                 [MLX5_IPOOL_MLX5_FLOW], handle_idx);
9271                 if (!dh)
9272                         continue;
9273                 handle_idx = dh->next.next;
9274
9275                 /* Get modify_hdr and encap_decap buf from ipools. */
9276                 encap_decap = NULL;
9277                 modify_hdr = dh->dvh.modify_hdr;
9278
9279                 if (dh->dvh.rix_encap_decap) {
9280                         encap_decap = mlx5_ipool_get(priv->sh->ipool
9281                                                 [MLX5_IPOOL_DECAP_ENCAP],
9282                                                 dh->dvh.rix_encap_decap);
9283                 }
9284                 if (modify_hdr) {
9285                         data = (const uint8_t *)modify_hdr->actions;
9286                         size = (size_t)(modify_hdr->actions_num) * 8;
9287                         id = (uint64_t)(uintptr_t)modify_hdr->action;
9288                         actions_num = modify_hdr->actions_num;
9289                         type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
9290                         save_dump_file(data, size, type, id,
9291                                                 (void *)(&actions_num), file);
9292                 }
9293                 if (encap_decap) {
9294                         data = encap_decap->buf;
9295                         size = encap_decap->size;
9296                         id = (uint64_t)(uintptr_t)encap_decap->action;
9297                         type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
9298                         save_dump_file(data, size, type,
9299                                                 id, NULL, file);
9300                 }
9301         }
9302         return 0;
9303 }
9304
9305 /**
9306  * Dump all flow's encap_decap/modify_hdr/counter data to file
9307  *
9308  * @param[in] dev
9309  *   The pointer to Ethernet device.
9310  * @param[in] file
9311  *   A pointer to a file for output.
9312  * @param[out] error
9313  *   Perform verbose error reporting if not NULL. PMDs initialize this
9314  *   structure in case of error only.
9315  * @return
9316  *   0 on success, a negative value otherwise.
9317  */
9318 static int
9319 mlx5_flow_dev_dump_sh_all(struct rte_eth_dev *dev,
9320         FILE *file, struct rte_flow_error *error __rte_unused)
9321 {
9322         struct mlx5_priv *priv = dev->data->dev_private;
9323         struct mlx5_dev_ctx_shared *sh = priv->sh;
9324         struct mlx5_hlist *h;
9325         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
9326         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
9327         struct rte_flow_query_count count;
9328         uint32_t actions_num;
9329         const uint8_t *data;
9330         size_t size;
9331         uint64_t id;
9332         uint32_t type;
9333         uint32_t i;
9334         uint32_t j;
9335         struct mlx5_list_inconst *l_inconst;
9336         struct mlx5_list_entry *e;
9337         int lcore_index;
9338         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
9339         uint32_t max;
9340         void *action;
9341
9342         /* encap_decap hlist is lcore_share, get global core cache. */
9343         i = MLX5_LIST_GLOBAL;
9344         h = sh->encaps_decaps;
9345         if (h) {
9346                 for (j = 0; j <= h->mask; j++) {
9347                         l_inconst = &h->buckets[j].l;
9348                         if (!l_inconst || !l_inconst->cache[i])
9349                                 continue;
9350
9351                         e = LIST_FIRST(&l_inconst->cache[i]->h);
9352                         while (e) {
9353                                 encap_decap =
9354                                 (struct mlx5_flow_dv_encap_decap_resource *)e;
9355                                 data = encap_decap->buf;
9356                                 size = encap_decap->size;
9357                                 id = (uint64_t)(uintptr_t)encap_decap->action;
9358                                 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
9359                                 save_dump_file(data, size, type,
9360                                         id, NULL, file);
9361                                 e = LIST_NEXT(e, next);
9362                         }
9363                 }
9364         }
9365
9366         /* get modify_hdr */
9367         h = sh->modify_cmds;
9368         if (h) {
9369                 lcore_index = rte_lcore_index(rte_lcore_id());
9370                 if (unlikely(lcore_index == -1)) {
9371                         lcore_index = MLX5_LIST_NLCORE;
9372                         rte_spinlock_lock(&h->l_const.lcore_lock);
9373                 }
9374                 i = lcore_index;
9375
9376                 for (j = 0; j <= h->mask; j++) {
9377                         l_inconst = &h->buckets[j].l;
9378                         if (!l_inconst || !l_inconst->cache[i])
9379                                 continue;
9380
9381                         e = LIST_FIRST(&l_inconst->cache[i]->h);
9382                         while (e) {
9383                                 modify_hdr =
9384                                 (struct mlx5_flow_dv_modify_hdr_resource *)e;
9385                                 data = (const uint8_t *)modify_hdr->actions;
9386                                 size = (size_t)(modify_hdr->actions_num) * 8;
9387                                 actions_num = modify_hdr->actions_num;
9388                                 id = (uint64_t)(uintptr_t)modify_hdr->action;
9389                                 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
9390                                 save_dump_file(data, size, type, id,
9391                                                 (void *)(&actions_num), file);
9392                                 e = LIST_NEXT(e, next);
9393                         }
9394                 }
9395
9396                 if (unlikely(lcore_index == MLX5_LIST_NLCORE))
9397                         rte_spinlock_unlock(&h->l_const.lcore_lock);
9398         }
9399
9400         /* get counter */
9401         MLX5_ASSERT(cmng->n_valid <= cmng->n);
9402         max = MLX5_COUNTERS_PER_POOL * cmng->n_valid;
9403         for (j = 1; j <= max; j++) {
9404                 action = NULL;
9405                 if ((!mlx5_counter_query(dev, j, false, &count.hits,
9406                 &count.bytes, &action)) && action) {
9407                         id = (uint64_t)(uintptr_t)action;
9408                         type = DR_DUMP_REC_TYPE_PMD_COUNTER;
9409                         save_dump_file(NULL, 0, type,
9410                                         id, (void *)&count, file);
9411                 }
9412         }
9413         return 0;
9414 }
9415 #endif
9416
9417 /**
9418  * Dump flow raw hw data to file
9419  *
9420  * @param[in] dev
9421  *    The pointer to Ethernet device.
9422  * @param[in] file
9423  *   A pointer to a file for output.
9424  * @param[out] error
9425  *   Perform verbose error reporting if not NULL. PMDs initialize this
9426  *   structure in case of error only.
9427  * @return
9428  *   0 on success, a negative value otherwise.
9429  */
9430 int
9431 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
9432                    FILE *file,
9433                    struct rte_flow_error *error __rte_unused)
9434 {
9435         struct mlx5_priv *priv = dev->data->dev_private;
9436         struct mlx5_dev_ctx_shared *sh = priv->sh;
9437         uint32_t handle_idx;
9438         int ret;
9439         struct mlx5_flow_handle *dh;
9440         struct rte_flow *flow;
9441
9442         if (!sh->config.dv_flow_en) {
9443                 if (fputs("device dv flow disabled\n", file) <= 0)
9444                         return -errno;
9445                 return -ENOTSUP;
9446         }
9447
9448         /* dump all */
9449         if (!flow_idx) {
9450 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
9451                 if (mlx5_flow_dev_dump_sh_all(dev, file, error))
9452                         return -EINVAL;
9453 #endif
9454                 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
9455                                         sh->rx_domain,
9456                                         sh->tx_domain, file);
9457         }
9458         /* dump one */
9459         flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
9460                         (uintptr_t)(void *)flow_idx);
9461         if (!flow)
9462                 return -EINVAL;
9463
9464 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
9465         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
9466 #endif
9467         handle_idx = flow->dev_handles;
9468         while (handle_idx) {
9469                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
9470                                 handle_idx);
9471                 if (!dh)
9472                         return -ENOENT;
9473                 if (dh->drv_flow) {
9474                         ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
9475                                         file);
9476                         if (ret)
9477                                 return -ENOENT;
9478                 }
9479                 handle_idx = dh->next.next;
9480         }
9481         return 0;
9482 }
9483
9484 /**
9485  * Get aged-out flows.
9486  *
9487  * @param[in] dev
9488  *   Pointer to the Ethernet device structure.
9489  * @param[in] context
9490  *   The address of an array of pointers to the aged-out flows contexts.
9491  * @param[in] nb_countexts
9492  *   The length of context array pointers.
9493  * @param[out] error
9494  *   Perform verbose error reporting if not NULL. Initialized in case of
9495  *   error only.
9496  *
9497  * @return
9498  *   how many contexts get in success, otherwise negative errno value.
9499  *   if nb_contexts is 0, return the amount of all aged contexts.
9500  *   if nb_contexts is not 0 , return the amount of aged flows reported
9501  *   in the context array.
9502  */
9503 int
9504 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
9505                         uint32_t nb_contexts, struct rte_flow_error *error)
9506 {
9507         const struct mlx5_flow_driver_ops *fops;
9508         struct rte_flow_attr attr = { .transfer = 0 };
9509
9510         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
9511                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
9512                 return fops->get_aged_flows(dev, contexts, nb_contexts,
9513                                                     error);
9514         }
9515         DRV_LOG(ERR,
9516                 "port %u get aged flows is not supported.",
9517                  dev->data->port_id);
9518         return -ENOTSUP;
9519 }
9520
9521 /* Wrapper for driver action_validate op callback */
9522 static int
9523 flow_drv_action_validate(struct rte_eth_dev *dev,
9524                          const struct rte_flow_indir_action_conf *conf,
9525                          const struct rte_flow_action *action,
9526                          const struct mlx5_flow_driver_ops *fops,
9527                          struct rte_flow_error *error)
9528 {
9529         static const char err_msg[] = "indirect action validation unsupported";
9530
9531         if (!fops->action_validate) {
9532                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9533                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9534                                    NULL, err_msg);
9535                 return -rte_errno;
9536         }
9537         return fops->action_validate(dev, conf, action, error);
9538 }
9539
9540 /**
9541  * Destroys the shared action by handle.
9542  *
9543  * @param dev
9544  *   Pointer to Ethernet device structure.
9545  * @param[in] handle
9546  *   Handle for the indirect action object to be destroyed.
9547  * @param[out] error
9548  *   Perform verbose error reporting if not NULL. PMDs initialize this
9549  *   structure in case of error only.
9550  *
9551  * @return
9552  *   0 on success, a negative errno value otherwise and rte_errno is set.
9553  *
9554  * @note: wrapper for driver action_create op callback.
9555  */
9556 static int
9557 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
9558                            struct rte_flow_action_handle *handle,
9559                            struct rte_flow_error *error)
9560 {
9561         static const char err_msg[] = "indirect action destruction unsupported";
9562         struct rte_flow_attr attr = { .transfer = 0 };
9563         const struct mlx5_flow_driver_ops *fops =
9564                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9565
9566         if (!fops->action_destroy) {
9567                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9568                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9569                                    NULL, err_msg);
9570                 return -rte_errno;
9571         }
9572         return fops->action_destroy(dev, handle, error);
9573 }
9574
9575 /* Wrapper for driver action_destroy op callback */
9576 static int
9577 flow_drv_action_update(struct rte_eth_dev *dev,
9578                        struct rte_flow_action_handle *handle,
9579                        const void *update,
9580                        const struct mlx5_flow_driver_ops *fops,
9581                        struct rte_flow_error *error)
9582 {
9583         static const char err_msg[] = "indirect action update unsupported";
9584
9585         if (!fops->action_update) {
9586                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9587                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9588                                    NULL, err_msg);
9589                 return -rte_errno;
9590         }
9591         return fops->action_update(dev, handle, update, error);
9592 }
9593
9594 /* Wrapper for driver action_destroy op callback */
9595 static int
9596 flow_drv_action_query(struct rte_eth_dev *dev,
9597                       const struct rte_flow_action_handle *handle,
9598                       void *data,
9599                       const struct mlx5_flow_driver_ops *fops,
9600                       struct rte_flow_error *error)
9601 {
9602         static const char err_msg[] = "indirect action query unsupported";
9603
9604         if (!fops->action_query) {
9605                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9606                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9607                                    NULL, err_msg);
9608                 return -rte_errno;
9609         }
9610         return fops->action_query(dev, handle, data, error);
9611 }
9612
9613 /**
9614  * Create indirect action for reuse in multiple flow rules.
9615  *
9616  * @param dev
9617  *   Pointer to Ethernet device structure.
9618  * @param conf
9619  *   Pointer to indirect action object configuration.
9620  * @param[in] action
9621  *   Action configuration for indirect action object creation.
9622  * @param[out] error
9623  *   Perform verbose error reporting if not NULL. PMDs initialize this
9624  *   structure in case of error only.
9625  * @return
9626  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
9627  */
9628 static struct rte_flow_action_handle *
9629 mlx5_action_handle_create(struct rte_eth_dev *dev,
9630                           const struct rte_flow_indir_action_conf *conf,
9631                           const struct rte_flow_action *action,
9632                           struct rte_flow_error *error)
9633 {
9634         static const char err_msg[] = "indirect action creation unsupported";
9635         struct rte_flow_attr attr = { .transfer = 0 };
9636         const struct mlx5_flow_driver_ops *fops =
9637                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9638
9639         if (flow_drv_action_validate(dev, conf, action, fops, error))
9640                 return NULL;
9641         if (!fops->action_create) {
9642                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9643                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9644                                    NULL, err_msg);
9645                 return NULL;
9646         }
9647         return fops->action_create(dev, conf, action, error);
9648 }
9649
9650 /**
9651  * Updates inplace the indirect action configuration pointed by *handle*
9652  * with the configuration provided as *update* argument.
9653  * The update of the indirect action configuration effects all flow rules
9654  * reusing the action via handle.
9655  *
9656  * @param dev
9657  *   Pointer to Ethernet device structure.
9658  * @param[in] handle
9659  *   Handle for the indirect action to be updated.
9660  * @param[in] update
9661  *   Action specification used to modify the action pointed by handle.
9662  *   *update* could be of same type with the action pointed by the *handle*
9663  *   handle argument, or some other structures like a wrapper, depending on
9664  *   the indirect action type.
9665  * @param[out] error
9666  *   Perform verbose error reporting if not NULL. PMDs initialize this
9667  *   structure in case of error only.
9668  *
9669  * @return
9670  *   0 on success, a negative errno value otherwise and rte_errno is set.
9671  */
9672 static int
9673 mlx5_action_handle_update(struct rte_eth_dev *dev,
9674                 struct rte_flow_action_handle *handle,
9675                 const void *update,
9676                 struct rte_flow_error *error)
9677 {
9678         struct rte_flow_attr attr = { .transfer = 0 };
9679         const struct mlx5_flow_driver_ops *fops =
9680                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9681         int ret;
9682
9683         ret = flow_drv_action_validate(dev, NULL,
9684                         (const struct rte_flow_action *)update, fops, error);
9685         if (ret)
9686                 return ret;
9687         return flow_drv_action_update(dev, handle, update, fops,
9688                                       error);
9689 }
9690
9691 /**
9692  * Query the indirect action by handle.
9693  *
9694  * This function allows retrieving action-specific data such as counters.
9695  * Data is gathered by special action which may be present/referenced in
9696  * more than one flow rule definition.
9697  *
9698  * see @RTE_FLOW_ACTION_TYPE_COUNT
9699  *
9700  * @param dev
9701  *   Pointer to Ethernet device structure.
9702  * @param[in] handle
9703  *   Handle for the indirect action to query.
9704  * @param[in, out] data
9705  *   Pointer to storage for the associated query data type.
9706  * @param[out] error
9707  *   Perform verbose error reporting if not NULL. PMDs initialize this
9708  *   structure in case of error only.
9709  *
9710  * @return
9711  *   0 on success, a negative errno value otherwise and rte_errno is set.
9712  */
9713 static int
9714 mlx5_action_handle_query(struct rte_eth_dev *dev,
9715                          const struct rte_flow_action_handle *handle,
9716                          void *data,
9717                          struct rte_flow_error *error)
9718 {
9719         struct rte_flow_attr attr = { .transfer = 0 };
9720         const struct mlx5_flow_driver_ops *fops =
9721                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9722
9723         return flow_drv_action_query(dev, handle, data, fops, error);
9724 }
9725
9726 /**
9727  * Destroy all indirect actions (shared RSS).
9728  *
9729  * @param dev
9730  *   Pointer to Ethernet device.
9731  *
9732  * @return
9733  *   0 on success, a negative errno value otherwise and rte_errno is set.
9734  */
9735 int
9736 mlx5_action_handle_flush(struct rte_eth_dev *dev)
9737 {
9738         struct rte_flow_error error;
9739         struct mlx5_priv *priv = dev->data->dev_private;
9740         struct mlx5_shared_action_rss *shared_rss;
9741         int ret = 0;
9742         uint32_t idx;
9743
9744         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
9745                       priv->rss_shared_actions, idx, shared_rss, next) {
9746                 ret |= mlx5_action_handle_destroy(dev,
9747                        (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
9748         }
9749         return ret;
9750 }
9751
9752 /**
9753  * Validate existing indirect actions against current device configuration
9754  * and attach them to device resources.
9755  *
9756  * @param dev
9757  *   Pointer to Ethernet device.
9758  *
9759  * @return
9760  *   0 on success, a negative errno value otherwise and rte_errno is set.
9761  */
9762 int
9763 mlx5_action_handle_attach(struct rte_eth_dev *dev)
9764 {
9765         struct mlx5_priv *priv = dev->data->dev_private;
9766         int ret = 0;
9767         struct mlx5_ind_table_obj *ind_tbl, *ind_tbl_last;
9768
9769         LIST_FOREACH(ind_tbl, &priv->standalone_ind_tbls, next) {
9770                 const char *message;
9771                 uint32_t queue_idx;
9772
9773                 ret = mlx5_validate_rss_queues(dev, ind_tbl->queues,
9774                                                ind_tbl->queues_n,
9775                                                &message, &queue_idx);
9776                 if (ret != 0) {
9777                         DRV_LOG(ERR, "Port %u cannot use queue %u in RSS: %s",
9778                                 dev->data->port_id, ind_tbl->queues[queue_idx],
9779                                 message);
9780                         break;
9781                 }
9782         }
9783         if (ret != 0)
9784                 return ret;
9785         LIST_FOREACH(ind_tbl, &priv->standalone_ind_tbls, next) {
9786                 ret = mlx5_ind_table_obj_attach(dev, ind_tbl);
9787                 if (ret != 0) {
9788                         DRV_LOG(ERR, "Port %u could not attach "
9789                                 "indirection table obj %p",
9790                                 dev->data->port_id, (void *)ind_tbl);
9791                         goto error;
9792                 }
9793         }
9794
9795         return 0;
9796 error:
9797         ind_tbl_last = ind_tbl;
9798         LIST_FOREACH(ind_tbl, &priv->standalone_ind_tbls, next) {
9799                 if (ind_tbl == ind_tbl_last)
9800                         break;
9801                 if (mlx5_ind_table_obj_detach(dev, ind_tbl) != 0)
9802                         DRV_LOG(CRIT, "Port %u could not detach "
9803                                 "indirection table obj %p on rollback",
9804                                 dev->data->port_id, (void *)ind_tbl);
9805         }
9806         return ret;
9807 }
9808
9809 /**
9810  * Detach indirect actions of the device from its resources.
9811  *
9812  * @param dev
9813  *   Pointer to Ethernet device.
9814  *
9815  * @return
9816  *   0 on success, a negative errno value otherwise and rte_errno is set.
9817  */
9818 int
9819 mlx5_action_handle_detach(struct rte_eth_dev *dev)
9820 {
9821         struct mlx5_priv *priv = dev->data->dev_private;
9822         int ret = 0;
9823         struct mlx5_ind_table_obj *ind_tbl, *ind_tbl_last;
9824
9825         LIST_FOREACH(ind_tbl, &priv->standalone_ind_tbls, next) {
9826                 ret = mlx5_ind_table_obj_detach(dev, ind_tbl);
9827                 if (ret != 0) {
9828                         DRV_LOG(ERR, "Port %u could not detach "
9829                                 "indirection table obj %p",
9830                                 dev->data->port_id, (void *)ind_tbl);
9831                         goto error;
9832                 }
9833         }
9834         return 0;
9835 error:
9836         ind_tbl_last = ind_tbl;
9837         LIST_FOREACH(ind_tbl, &priv->standalone_ind_tbls, next) {
9838                 if (ind_tbl == ind_tbl_last)
9839                         break;
9840                 if (mlx5_ind_table_obj_attach(dev, ind_tbl) != 0)
9841                         DRV_LOG(CRIT, "Port %u could not attach "
9842                                 "indirection table obj %p on rollback",
9843                                 dev->data->port_id, (void *)ind_tbl);
9844         }
9845         return ret;
9846 }
9847
9848 #ifndef HAVE_MLX5DV_DR
9849 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
9850 #else
9851 #define MLX5_DOMAIN_SYNC_FLOW \
9852         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
9853 #endif
9854
9855 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
9856 {
9857         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
9858         const struct mlx5_flow_driver_ops *fops;
9859         int ret;
9860         struct rte_flow_attr attr = { .transfer = 0 };
9861
9862         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9863         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
9864         if (ret > 0)
9865                 ret = -ret;
9866         return ret;
9867 }
9868
9869 const struct mlx5_flow_tunnel *
9870 mlx5_get_tof(const struct rte_flow_item *item,
9871              const struct rte_flow_action *action,
9872              enum mlx5_tof_rule_type *rule_type)
9873 {
9874         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
9875                 if (item->type == (typeof(item->type))
9876                                   MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) {
9877                         *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE;
9878                         return flow_items_to_tunnel(item);
9879                 }
9880         }
9881         for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) {
9882                 if (action->type == (typeof(action->type))
9883                                     MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) {
9884                         *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE;
9885                         return flow_actions_to_tunnel(action);
9886                 }
9887         }
9888         return NULL;
9889 }
9890
9891 /**
9892  * tunnel offload functionality is defined for DV environment only
9893  */
9894 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
9895 __extension__
9896 union tunnel_offload_mark {
9897         uint32_t val;
9898         struct {
9899                 uint32_t app_reserve:8;
9900                 uint32_t table_id:15;
9901                 uint32_t transfer:1;
9902                 uint32_t _unused_:8;
9903         };
9904 };
9905
9906 static bool
9907 mlx5_access_tunnel_offload_db
9908         (struct rte_eth_dev *dev,
9909          bool (*match)(struct rte_eth_dev *,
9910                        struct mlx5_flow_tunnel *, const void *),
9911          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
9912          void (*miss)(struct rte_eth_dev *, void *),
9913          void *ctx, bool lock_op);
9914
9915 static int
9916 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
9917                              struct rte_flow *flow,
9918                              const struct rte_flow_attr *attr,
9919                              const struct rte_flow_action *app_actions,
9920                              uint32_t flow_idx,
9921                              const struct mlx5_flow_tunnel *tunnel,
9922                              struct tunnel_default_miss_ctx *ctx,
9923                              struct rte_flow_error *error)
9924 {
9925         struct mlx5_priv *priv = dev->data->dev_private;
9926         struct mlx5_flow *dev_flow;
9927         struct rte_flow_attr miss_attr = *attr;
9928         const struct rte_flow_item miss_items[2] = {
9929                 {
9930                         .type = RTE_FLOW_ITEM_TYPE_ETH,
9931                         .spec = NULL,
9932                         .last = NULL,
9933                         .mask = NULL
9934                 },
9935                 {
9936                         .type = RTE_FLOW_ITEM_TYPE_END,
9937                         .spec = NULL,
9938                         .last = NULL,
9939                         .mask = NULL
9940                 }
9941         };
9942         union tunnel_offload_mark mark_id;
9943         struct rte_flow_action_mark miss_mark;
9944         struct rte_flow_action miss_actions[3] = {
9945                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
9946                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
9947         };
9948         const struct rte_flow_action_jump *jump_data;
9949         uint32_t i, flow_table = 0; /* prevent compilation warning */
9950         struct flow_grp_info grp_info = {
9951                 .external = 1,
9952                 .transfer = attr->transfer,
9953                 .fdb_def_rule = !!priv->fdb_def_rule,
9954                 .std_tbl_fix = 0,
9955         };
9956         int ret;
9957
9958         if (!attr->transfer) {
9959                 uint32_t q_size;
9960
9961                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
9962                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
9963                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
9964                                          0, SOCKET_ID_ANY);
9965                 if (!ctx->queue)
9966                         return rte_flow_error_set
9967                                 (error, ENOMEM,
9968                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9969                                 NULL, "invalid default miss RSS");
9970                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
9971                 ctx->action_rss.level = 0,
9972                 ctx->action_rss.types = priv->rss_conf.rss_hf,
9973                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
9974                 ctx->action_rss.queue_num = priv->reta_idx_n,
9975                 ctx->action_rss.key = priv->rss_conf.rss_key,
9976                 ctx->action_rss.queue = ctx->queue;
9977                 if (!priv->reta_idx_n || !priv->rxqs_n)
9978                         return rte_flow_error_set
9979                                 (error, EINVAL,
9980                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9981                                 NULL, "invalid port configuration");
9982                 if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG))
9983                         ctx->action_rss.types = 0;
9984                 for (i = 0; i != priv->reta_idx_n; ++i)
9985                         ctx->queue[i] = (*priv->reta_idx)[i];
9986         } else {
9987                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
9988                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
9989         }
9990         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
9991         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
9992         jump_data = app_actions->conf;
9993         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
9994         miss_attr.group = jump_data->group;
9995         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
9996                                        &flow_table, &grp_info, error);
9997         if (ret)
9998                 return rte_flow_error_set(error, EINVAL,
9999                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
10000                                           NULL, "invalid tunnel id");
10001         mark_id.app_reserve = 0;
10002         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
10003         mark_id.transfer = !!attr->transfer;
10004         mark_id._unused_ = 0;
10005         miss_mark.id = mark_id.val;
10006         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
10007                                     miss_items, miss_actions, flow_idx, error);
10008         if (!dev_flow)
10009                 return -rte_errno;
10010         dev_flow->flow = flow;
10011         dev_flow->external = true;
10012         dev_flow->tunnel = tunnel;
10013         dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE;
10014         /* Subflow object was created, we must include one in the list. */
10015         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
10016                       dev_flow->handle, next);
10017         DRV_LOG(DEBUG,
10018                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
10019                 dev->data->port_id, tunnel->app_tunnel.type,
10020                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
10021         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
10022                                   miss_actions, error);
10023         if (!ret)
10024                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
10025                                                   error);
10026
10027         return ret;
10028 }
10029
10030 static const struct mlx5_flow_tbl_data_entry  *
10031 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
10032 {
10033         struct mlx5_priv *priv = dev->data->dev_private;
10034         struct mlx5_dev_ctx_shared *sh = priv->sh;
10035         struct mlx5_list_entry *he;
10036         union tunnel_offload_mark mbits = { .val = mark };
10037         union mlx5_flow_tbl_key table_key = {
10038                 {
10039                         .level = tunnel_id_to_flow_tbl(mbits.table_id),
10040                         .id = 0,
10041                         .reserved = 0,
10042                         .dummy = 0,
10043                         .is_fdb = !!mbits.transfer,
10044                         .is_egress = 0,
10045                 }
10046         };
10047         struct mlx5_flow_cb_ctx ctx = {
10048                 .data = &table_key.v64,
10049         };
10050
10051         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx);
10052         return he ?
10053                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
10054 }
10055
10056 static void
10057 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx,
10058                                    struct mlx5_list_entry *entry)
10059 {
10060         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10061         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
10062
10063         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
10064                         tunnel_flow_tbl_to_id(tte->flow_table));
10065         mlx5_free(tte);
10066 }
10067
10068 static int
10069 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused,
10070                                   struct mlx5_list_entry *entry, void *cb_ctx)
10071 {
10072         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10073         union tunnel_tbl_key tbl = {
10074                 .val = *(uint64_t *)(ctx->data),
10075         };
10076         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
10077
10078         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
10079 }
10080
10081 static struct mlx5_list_entry *
10082 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx)
10083 {
10084         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10085         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10086         struct tunnel_tbl_entry *tte;
10087         union tunnel_tbl_key tbl = {
10088                 .val = *(uint64_t *)(ctx->data),
10089         };
10090
10091         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
10092                           sizeof(*tte), 0,
10093                           SOCKET_ID_ANY);
10094         if (!tte)
10095                 goto err;
10096         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
10097                           &tte->flow_table);
10098         if (tte->flow_table >= MLX5_MAX_TABLES) {
10099                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
10100                         tte->flow_table);
10101                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
10102                                 tte->flow_table);
10103                 goto err;
10104         } else if (!tte->flow_table) {
10105                 goto err;
10106         }
10107         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
10108         tte->tunnel_id = tbl.tunnel_id;
10109         tte->group = tbl.group;
10110         return &tte->hash;
10111 err:
10112         if (tte)
10113                 mlx5_free(tte);
10114         return NULL;
10115 }
10116
10117 static struct mlx5_list_entry *
10118 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused,
10119                                   struct mlx5_list_entry *oentry,
10120                                   void *cb_ctx __rte_unused)
10121 {
10122         struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte),
10123                                                    0, SOCKET_ID_ANY);
10124
10125         if (!tte)
10126                 return NULL;
10127         memcpy(tte, oentry, sizeof(*tte));
10128         return &tte->hash;
10129 }
10130
10131 static void
10132 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused,
10133                                        struct mlx5_list_entry *entry)
10134 {
10135         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
10136
10137         mlx5_free(tte);
10138 }
10139
10140 static uint32_t
10141 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
10142                                 const struct mlx5_flow_tunnel *tunnel,
10143                                 uint32_t group, uint32_t *table,
10144                                 struct rte_flow_error *error)
10145 {
10146         struct mlx5_list_entry *he;
10147         struct tunnel_tbl_entry *tte;
10148         union tunnel_tbl_key key = {
10149                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
10150                 .group = group
10151         };
10152         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
10153         struct mlx5_hlist *group_hash;
10154         struct mlx5_flow_cb_ctx ctx = {
10155                 .data = &key.val,
10156         };
10157
10158         group_hash = tunnel ? tunnel->groups : thub->groups;
10159         he = mlx5_hlist_register(group_hash, key.val, &ctx);
10160         if (!he)
10161                 return rte_flow_error_set(error, EINVAL,
10162                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
10163                                           NULL,
10164                                           "tunnel group index not supported");
10165         tte = container_of(he, typeof(*tte), hash);
10166         *table = tte->flow_table;
10167         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
10168                 dev->data->port_id, key.tunnel_id, group, *table);
10169         return 0;
10170 }
10171
10172 static void
10173 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
10174                       struct mlx5_flow_tunnel *tunnel)
10175 {
10176         struct mlx5_priv *priv = dev->data->dev_private;
10177         struct mlx5_indexed_pool *ipool;
10178
10179         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
10180                 dev->data->port_id, tunnel->tunnel_id);
10181         LIST_REMOVE(tunnel, chain);
10182         mlx5_hlist_destroy(tunnel->groups);
10183         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
10184         mlx5_ipool_free(ipool, tunnel->tunnel_id);
10185 }
10186
10187 static bool
10188 mlx5_access_tunnel_offload_db
10189         (struct rte_eth_dev *dev,
10190          bool (*match)(struct rte_eth_dev *,
10191                        struct mlx5_flow_tunnel *, const void *),
10192          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
10193          void (*miss)(struct rte_eth_dev *, void *),
10194          void *ctx, bool lock_op)
10195 {
10196         bool verdict = false;
10197         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
10198         struct mlx5_flow_tunnel *tunnel;
10199
10200         rte_spinlock_lock(&thub->sl);
10201         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
10202                 verdict = match(dev, tunnel, (const void *)ctx);
10203                 if (verdict)
10204                         break;
10205         }
10206         if (!lock_op)
10207                 rte_spinlock_unlock(&thub->sl);
10208         if (verdict && hit)
10209                 hit(dev, tunnel, ctx);
10210         if (!verdict && miss)
10211                 miss(dev, ctx);
10212         if (lock_op)
10213                 rte_spinlock_unlock(&thub->sl);
10214
10215         return verdict;
10216 }
10217
10218 struct tunnel_db_find_tunnel_id_ctx {
10219         uint32_t tunnel_id;
10220         struct mlx5_flow_tunnel *tunnel;
10221 };
10222
10223 static bool
10224 find_tunnel_id_match(struct rte_eth_dev *dev,
10225                      struct mlx5_flow_tunnel *tunnel, const void *x)
10226 {
10227         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
10228
10229         RTE_SET_USED(dev);
10230         return tunnel->tunnel_id == ctx->tunnel_id;
10231 }
10232
10233 static void
10234 find_tunnel_id_hit(struct rte_eth_dev *dev,
10235                    struct mlx5_flow_tunnel *tunnel, void *x)
10236 {
10237         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
10238         RTE_SET_USED(dev);
10239         ctx->tunnel = tunnel;
10240 }
10241
10242 static struct mlx5_flow_tunnel *
10243 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
10244 {
10245         struct tunnel_db_find_tunnel_id_ctx ctx = {
10246                 .tunnel_id = id,
10247         };
10248
10249         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
10250                                       find_tunnel_id_hit, NULL, &ctx, true);
10251
10252         return ctx.tunnel;
10253 }
10254
10255 static struct mlx5_flow_tunnel *
10256 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
10257                           const struct rte_flow_tunnel *app_tunnel)
10258 {
10259         struct mlx5_priv *priv = dev->data->dev_private;
10260         struct mlx5_indexed_pool *ipool;
10261         struct mlx5_flow_tunnel *tunnel;
10262         uint32_t id;
10263
10264         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
10265         tunnel = mlx5_ipool_zmalloc(ipool, &id);
10266         if (!tunnel)
10267                 return NULL;
10268         if (id >= MLX5_MAX_TUNNELS) {
10269                 mlx5_ipool_free(ipool, id);
10270                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
10271                 return NULL;
10272         }
10273         tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true,
10274                                            priv->sh,
10275                                            mlx5_flow_tunnel_grp2tbl_create_cb,
10276                                            mlx5_flow_tunnel_grp2tbl_match_cb,
10277                                            mlx5_flow_tunnel_grp2tbl_remove_cb,
10278                                            mlx5_flow_tunnel_grp2tbl_clone_cb,
10279                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
10280         if (!tunnel->groups) {
10281                 mlx5_ipool_free(ipool, id);
10282                 return NULL;
10283         }
10284         /* initiate new PMD tunnel */
10285         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
10286         tunnel->tunnel_id = id;
10287         tunnel->action.type = (typeof(tunnel->action.type))
10288                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
10289         tunnel->action.conf = tunnel;
10290         tunnel->item.type = (typeof(tunnel->item.type))
10291                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
10292         tunnel->item.spec = tunnel;
10293         tunnel->item.last = NULL;
10294         tunnel->item.mask = NULL;
10295
10296         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
10297                 dev->data->port_id, tunnel->tunnel_id);
10298
10299         return tunnel;
10300 }
10301
10302 struct tunnel_db_get_tunnel_ctx {
10303         const struct rte_flow_tunnel *app_tunnel;
10304         struct mlx5_flow_tunnel *tunnel;
10305 };
10306
10307 static bool get_tunnel_match(struct rte_eth_dev *dev,
10308                              struct mlx5_flow_tunnel *tunnel, const void *x)
10309 {
10310         const struct tunnel_db_get_tunnel_ctx *ctx = x;
10311
10312         RTE_SET_USED(dev);
10313         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
10314                        sizeof(*ctx->app_tunnel));
10315 }
10316
10317 static void get_tunnel_hit(struct rte_eth_dev *dev,
10318                            struct mlx5_flow_tunnel *tunnel, void *x)
10319 {
10320         /* called under tunnel spinlock protection */
10321         struct tunnel_db_get_tunnel_ctx *ctx = x;
10322
10323         RTE_SET_USED(dev);
10324         tunnel->refctn++;
10325         ctx->tunnel = tunnel;
10326 }
10327
10328 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
10329 {
10330         /* called under tunnel spinlock protection */
10331         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
10332         struct tunnel_db_get_tunnel_ctx *ctx = x;
10333
10334         rte_spinlock_unlock(&thub->sl);
10335         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
10336         rte_spinlock_lock(&thub->sl);
10337         if (ctx->tunnel) {
10338                 ctx->tunnel->refctn = 1;
10339                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
10340         }
10341 }
10342
10343
10344 static int
10345 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
10346                      const struct rte_flow_tunnel *app_tunnel,
10347                      struct mlx5_flow_tunnel **tunnel)
10348 {
10349         struct tunnel_db_get_tunnel_ctx ctx = {
10350                 .app_tunnel = app_tunnel,
10351         };
10352
10353         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
10354                                       get_tunnel_miss, &ctx, true);
10355         *tunnel = ctx.tunnel;
10356         return ctx.tunnel ? 0 : -ENOMEM;
10357 }
10358
10359 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
10360 {
10361         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10362
10363         if (!thub)
10364                 return;
10365         if (!LIST_EMPTY(&thub->tunnels))
10366                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
10367         mlx5_hlist_destroy(thub->groups);
10368         mlx5_free(thub);
10369 }
10370
10371 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
10372 {
10373         int err;
10374         struct mlx5_flow_tunnel_hub *thub;
10375
10376         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
10377                            0, SOCKET_ID_ANY);
10378         if (!thub)
10379                 return -ENOMEM;
10380         LIST_INIT(&thub->tunnels);
10381         rte_spinlock_init(&thub->sl);
10382         thub->groups = mlx5_hlist_create("flow groups", 64,
10383                                          false, true, sh,
10384                                          mlx5_flow_tunnel_grp2tbl_create_cb,
10385                                          mlx5_flow_tunnel_grp2tbl_match_cb,
10386                                          mlx5_flow_tunnel_grp2tbl_remove_cb,
10387                                          mlx5_flow_tunnel_grp2tbl_clone_cb,
10388                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
10389         if (!thub->groups) {
10390                 err = -rte_errno;
10391                 goto err;
10392         }
10393         sh->tunnel_hub = thub;
10394
10395         return 0;
10396
10397 err:
10398         if (thub->groups)
10399                 mlx5_hlist_destroy(thub->groups);
10400         if (thub)
10401                 mlx5_free(thub);
10402         return err;
10403 }
10404
10405 static inline int
10406 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
10407                           struct rte_flow_tunnel *tunnel,
10408                           struct rte_flow_error *error)
10409 {
10410         struct mlx5_priv *priv = dev->data->dev_private;
10411
10412         if (!priv->sh->config.dv_flow_en)
10413                 return rte_flow_error_set(error, ENOTSUP,
10414                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
10415                                           "flow DV interface is off");
10416         if (!is_tunnel_offload_active(dev))
10417                 return rte_flow_error_set(error, ENOTSUP,
10418                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
10419                                           "tunnel offload was not activated");
10420         if (!tunnel)
10421                 return rte_flow_error_set(error, EINVAL,
10422                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
10423                                           "no application tunnel");
10424         switch (tunnel->type) {
10425         default:
10426                 return rte_flow_error_set(error, EINVAL,
10427                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
10428                                           "unsupported tunnel type");
10429         case RTE_FLOW_ITEM_TYPE_VXLAN:
10430         case RTE_FLOW_ITEM_TYPE_GRE:
10431         case RTE_FLOW_ITEM_TYPE_NVGRE:
10432         case RTE_FLOW_ITEM_TYPE_GENEVE:
10433                 break;
10434         }
10435         return 0;
10436 }
10437
10438 static int
10439 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
10440                     struct rte_flow_tunnel *app_tunnel,
10441                     struct rte_flow_action **actions,
10442                     uint32_t *num_of_actions,
10443                     struct rte_flow_error *error)
10444 {
10445         struct mlx5_flow_tunnel *tunnel;
10446         int ret = mlx5_flow_tunnel_validate(dev, app_tunnel, error);
10447
10448         if (ret)
10449                 return ret;
10450         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
10451         if (ret < 0) {
10452                 return rte_flow_error_set(error, ret,
10453                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
10454                                           "failed to initialize pmd tunnel");
10455         }
10456         *actions = &tunnel->action;
10457         *num_of_actions = 1;
10458         return 0;
10459 }
10460
10461 static int
10462 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
10463                        struct rte_flow_tunnel *app_tunnel,
10464                        struct rte_flow_item **items,
10465                        uint32_t *num_of_items,
10466                        struct rte_flow_error *error)
10467 {
10468         struct mlx5_flow_tunnel *tunnel;
10469         int ret = mlx5_flow_tunnel_validate(dev, app_tunnel, error);
10470
10471         if (ret)
10472                 return ret;
10473         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
10474         if (ret < 0) {
10475                 return rte_flow_error_set(error, ret,
10476                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
10477                                           "failed to initialize pmd tunnel");
10478         }
10479         *items = &tunnel->item;
10480         *num_of_items = 1;
10481         return 0;
10482 }
10483
10484 struct tunnel_db_element_release_ctx {
10485         struct rte_flow_item *items;
10486         struct rte_flow_action *actions;
10487         uint32_t num_elements;
10488         struct rte_flow_error *error;
10489         int ret;
10490 };
10491
10492 static bool
10493 tunnel_element_release_match(struct rte_eth_dev *dev,
10494                              struct mlx5_flow_tunnel *tunnel, const void *x)
10495 {
10496         const struct tunnel_db_element_release_ctx *ctx = x;
10497
10498         RTE_SET_USED(dev);
10499         if (ctx->num_elements != 1)
10500                 return false;
10501         else if (ctx->items)
10502                 return ctx->items == &tunnel->item;
10503         else if (ctx->actions)
10504                 return ctx->actions == &tunnel->action;
10505
10506         return false;
10507 }
10508
10509 static void
10510 tunnel_element_release_hit(struct rte_eth_dev *dev,
10511                            struct mlx5_flow_tunnel *tunnel, void *x)
10512 {
10513         struct tunnel_db_element_release_ctx *ctx = x;
10514         ctx->ret = 0;
10515         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
10516                 mlx5_flow_tunnel_free(dev, tunnel);
10517 }
10518
10519 static void
10520 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
10521 {
10522         struct tunnel_db_element_release_ctx *ctx = x;
10523         RTE_SET_USED(dev);
10524         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
10525                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
10526                                       "invalid argument");
10527 }
10528
10529 static int
10530 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
10531                        struct rte_flow_item *pmd_items,
10532                        uint32_t num_items, struct rte_flow_error *err)
10533 {
10534         struct tunnel_db_element_release_ctx ctx = {
10535                 .items = pmd_items,
10536                 .actions = NULL,
10537                 .num_elements = num_items,
10538                 .error = err,
10539         };
10540
10541         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
10542                                       tunnel_element_release_hit,
10543                                       tunnel_element_release_miss, &ctx, false);
10544
10545         return ctx.ret;
10546 }
10547
10548 static int
10549 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
10550                          struct rte_flow_action *pmd_actions,
10551                          uint32_t num_actions, struct rte_flow_error *err)
10552 {
10553         struct tunnel_db_element_release_ctx ctx = {
10554                 .items = NULL,
10555                 .actions = pmd_actions,
10556                 .num_elements = num_actions,
10557                 .error = err,
10558         };
10559
10560         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
10561                                       tunnel_element_release_hit,
10562                                       tunnel_element_release_miss, &ctx, false);
10563
10564         return ctx.ret;
10565 }
10566
10567 static int
10568 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
10569                                   struct rte_mbuf *m,
10570                                   struct rte_flow_restore_info *info,
10571                                   struct rte_flow_error *err)
10572 {
10573         uint64_t ol_flags = m->ol_flags;
10574         const struct mlx5_flow_tbl_data_entry *tble;
10575         const uint64_t mask = RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID;
10576
10577         if (!is_tunnel_offload_active(dev)) {
10578                 info->flags = 0;
10579                 return 0;
10580         }
10581
10582         if ((ol_flags & mask) != mask)
10583                 goto err;
10584         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
10585         if (!tble) {
10586                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
10587                         dev->data->port_id, m->hash.fdir.hi);
10588                 goto err;
10589         }
10590         MLX5_ASSERT(tble->tunnel);
10591         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
10592         info->group_id = tble->group_id;
10593         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
10594                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
10595                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
10596
10597         return 0;
10598
10599 err:
10600         return rte_flow_error_set(err, EINVAL,
10601                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10602                                   "failed to get restore info");
10603 }
10604
10605 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
10606 static int
10607 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
10608                            __rte_unused struct rte_flow_tunnel *app_tunnel,
10609                            __rte_unused struct rte_flow_action **actions,
10610                            __rte_unused uint32_t *num_of_actions,
10611                            __rte_unused struct rte_flow_error *error)
10612 {
10613         return -ENOTSUP;
10614 }
10615
10616 static int
10617 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
10618                        __rte_unused struct rte_flow_tunnel *app_tunnel,
10619                        __rte_unused struct rte_flow_item **items,
10620                        __rte_unused uint32_t *num_of_items,
10621                        __rte_unused struct rte_flow_error *error)
10622 {
10623         return -ENOTSUP;
10624 }
10625
10626 static int
10627 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
10628                               __rte_unused struct rte_flow_item *pmd_items,
10629                               __rte_unused uint32_t num_items,
10630                               __rte_unused struct rte_flow_error *err)
10631 {
10632         return -ENOTSUP;
10633 }
10634
10635 static int
10636 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
10637                                 __rte_unused struct rte_flow_action *pmd_action,
10638                                 __rte_unused uint32_t num_actions,
10639                                 __rte_unused struct rte_flow_error *err)
10640 {
10641         return -ENOTSUP;
10642 }
10643
10644 static int
10645 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
10646                                   __rte_unused struct rte_mbuf *m,
10647                                   __rte_unused struct rte_flow_restore_info *i,
10648                                   __rte_unused struct rte_flow_error *err)
10649 {
10650         return -ENOTSUP;
10651 }
10652
10653 static int
10654 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
10655                              __rte_unused struct rte_flow *flow,
10656                              __rte_unused const struct rte_flow_attr *attr,
10657                              __rte_unused const struct rte_flow_action *actions,
10658                              __rte_unused uint32_t flow_idx,
10659                              __rte_unused const struct mlx5_flow_tunnel *tunnel,
10660                              __rte_unused struct tunnel_default_miss_ctx *ctx,
10661                              __rte_unused struct rte_flow_error *error)
10662 {
10663         return -ENOTSUP;
10664 }
10665
10666 static struct mlx5_flow_tunnel *
10667 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
10668                     __rte_unused uint32_t id)
10669 {
10670         return NULL;
10671 }
10672
10673 static void
10674 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
10675                       __rte_unused struct mlx5_flow_tunnel *tunnel)
10676 {
10677 }
10678
10679 static uint32_t
10680 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
10681                                 __rte_unused const struct mlx5_flow_tunnel *t,
10682                                 __rte_unused uint32_t group,
10683                                 __rte_unused uint32_t *table,
10684                                 struct rte_flow_error *error)
10685 {
10686         return rte_flow_error_set(error, ENOTSUP,
10687                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10688                                   "tunnel offload requires DV support");
10689 }
10690
10691 void
10692 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
10693                         __rte_unused  uint16_t port_id)
10694 {
10695 }
10696 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
10697
10698 /* Flex flow item API */
10699 static struct rte_flow_item_flex_handle *
10700 mlx5_flow_flex_item_create(struct rte_eth_dev *dev,
10701                            const struct rte_flow_item_flex_conf *conf,
10702                            struct rte_flow_error *error)
10703 {
10704         static const char err_msg[] = "flex item creation unsupported";
10705         struct mlx5_priv *priv = dev->data->dev_private;
10706         struct rte_flow_attr attr = { .transfer = 0 };
10707         const struct mlx5_flow_driver_ops *fops =
10708                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
10709
10710         if (!priv->pci_dev) {
10711                 rte_flow_error_set(error, ENOTSUP,
10712                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10713                                    "create flex item on PF only");
10714                 return NULL;
10715         }
10716         switch (priv->pci_dev->id.device_id) {
10717         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
10718         case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
10719                 break;
10720         default:
10721                 rte_flow_error_set(error, ENOTSUP,
10722                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10723                                    "flex item available on BlueField ports only");
10724                 return NULL;
10725         }
10726         if (!fops->item_create) {
10727                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
10728                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
10729                                    NULL, err_msg);
10730                 return NULL;
10731         }
10732         return fops->item_create(dev, conf, error);
10733 }
10734
10735 static int
10736 mlx5_flow_flex_item_release(struct rte_eth_dev *dev,
10737                             const struct rte_flow_item_flex_handle *handle,
10738                             struct rte_flow_error *error)
10739 {
10740         static const char err_msg[] = "flex item release unsupported";
10741         struct rte_flow_attr attr = { .transfer = 0 };
10742         const struct mlx5_flow_driver_ops *fops =
10743                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
10744
10745         if (!fops->item_release) {
10746                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
10747                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
10748                                    NULL, err_msg);
10749                 return -rte_errno;
10750         }
10751         return fops->item_release(dev, handle, error);
10752 }
10753
10754 static void
10755 mlx5_dbg__print_pattern(const struct rte_flow_item *item)
10756 {
10757         int ret;
10758         struct rte_flow_error error;
10759
10760         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
10761                 char *item_name;
10762                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name,
10763                                     sizeof(item_name),
10764                                     (void *)(uintptr_t)item->type, &error);
10765                 if (ret > 0)
10766                         printf("%s ", item_name);
10767                 else
10768                         printf("%d\n", (int)item->type);
10769         }
10770         printf("END\n");
10771 }
10772
10773 static int
10774 mlx5_flow_is_std_vxlan_port(const struct rte_flow_item *udp_item)
10775 {
10776         const struct rte_flow_item_udp *spec = udp_item->spec;
10777         const struct rte_flow_item_udp *mask = udp_item->mask;
10778         uint16_t udp_dport = 0;
10779
10780         if (spec != NULL) {
10781                 if (!mask)
10782                         mask = &rte_flow_item_udp_mask;
10783                 udp_dport = rte_be_to_cpu_16(spec->hdr.dst_port &
10784                                 mask->hdr.dst_port);
10785         }
10786         return (!udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN);
10787 }
10788
10789 static const struct mlx5_flow_expand_node *
10790 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
10791                 unsigned int item_idx,
10792                 const struct mlx5_flow_expand_node graph[],
10793                 const struct mlx5_flow_expand_node *node)
10794 {
10795         const struct rte_flow_item *item = pattern + item_idx, *prev_item;
10796
10797         if (item->type == RTE_FLOW_ITEM_TYPE_VXLAN &&
10798                         node != NULL &&
10799                         node->type == RTE_FLOW_ITEM_TYPE_VXLAN) {
10800                 /*
10801                  * The expansion node is VXLAN and it is also the last
10802                  * expandable item in the pattern, so need to continue
10803                  * expansion of the inner tunnel.
10804                  */
10805                 MLX5_ASSERT(item_idx > 0);
10806                 prev_item = pattern + item_idx - 1;
10807                 MLX5_ASSERT(prev_item->type == RTE_FLOW_ITEM_TYPE_UDP);
10808                 if (mlx5_flow_is_std_vxlan_port(prev_item))
10809                         return &graph[MLX5_EXPANSION_STD_VXLAN];
10810                 return &graph[MLX5_EXPANSION_L3_VXLAN];
10811         }
10812         return node;
10813 }
10814
10815 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
10816 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
10817         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
10818 };
10819
10820 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
10821 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
10822         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
10823         { 9, 10, 11 }, { 12, 13, 14 },
10824 };
10825
10826 /**
10827  * Discover the number of available flow priorities.
10828  *
10829  * @param dev
10830  *   Ethernet device.
10831  *
10832  * @return
10833  *   On success, number of available flow priorities.
10834  *   On failure, a negative errno-style code and rte_errno is set.
10835  */
10836 int
10837 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
10838 {
10839         static const uint16_t vprio[] = {8, 16};
10840         const struct mlx5_priv *priv = dev->data->dev_private;
10841         const struct mlx5_flow_driver_ops *fops;
10842         enum mlx5_flow_drv_type type;
10843         int ret;
10844
10845         type = mlx5_flow_os_get_type();
10846         if (type == MLX5_FLOW_TYPE_MAX) {
10847                 type = MLX5_FLOW_TYPE_VERBS;
10848                 if (priv->sh->cdev->config.devx && priv->sh->config.dv_flow_en)
10849                         type = MLX5_FLOW_TYPE_DV;
10850         }
10851         fops = flow_get_drv_ops(type);
10852         if (fops->discover_priorities == NULL) {
10853                 DRV_LOG(ERR, "Priority discovery not supported");
10854                 rte_errno = ENOTSUP;
10855                 return -rte_errno;
10856         }
10857         ret = fops->discover_priorities(dev, vprio, RTE_DIM(vprio));
10858         if (ret < 0)
10859                 return ret;
10860         switch (ret) {
10861         case 8:
10862                 ret = RTE_DIM(priority_map_3);
10863                 break;
10864         case 16:
10865                 ret = RTE_DIM(priority_map_5);
10866                 break;
10867         default:
10868                 rte_errno = ENOTSUP;
10869                 DRV_LOG(ERR,
10870                         "port %u maximum priority: %d expected 8/16",
10871                         dev->data->port_id, ret);
10872                 return -rte_errno;
10873         }
10874         DRV_LOG(INFO, "port %u supported flow priorities:"
10875                 " 0-%d for ingress or egress root table,"
10876                 " 0-%d for non-root table or transfer root table.",
10877                 dev->data->port_id, ret - 2,
10878                 MLX5_NON_ROOT_FLOW_MAX_PRIO - 1);
10879         return ret;
10880 }
10881
10882 /**
10883  * Adjust flow priority based on the highest layer and the request priority.
10884  *
10885  * @param[in] dev
10886  *   Pointer to the Ethernet device structure.
10887  * @param[in] priority
10888  *   The rule base priority.
10889  * @param[in] subpriority
10890  *   The priority based on the items.
10891  *
10892  * @return
10893  *   The new priority.
10894  */
10895 uint32_t
10896 mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
10897                           uint32_t subpriority)
10898 {
10899         uint32_t res = 0;
10900         struct mlx5_priv *priv = dev->data->dev_private;
10901
10902         switch (priv->sh->flow_max_priority) {
10903         case RTE_DIM(priority_map_3):
10904                 res = priority_map_3[priority][subpriority];
10905                 break;
10906         case RTE_DIM(priority_map_5):
10907                 res = priority_map_5[priority][subpriority];
10908                 break;
10909         }
10910         return  res;
10911 }