drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <stdbool.h>
  10 #include <sys/queue.h>
  11
  12 #include <rte_common.h>
  13 #include <rte_ether.h>
  14 #include <ethdev_driver.h>
  15 #include <rte_eal_paging.h>
  16 #include <rte_flow.h>
  17 #include <rte_cycles.h>
  18 #include <rte_flow_driver.h>
  19 #include <rte_malloc.h>
  20 #include <rte_ip.h>
  21
  22 #include <mlx5_glue.h>
  23 #include <mlx5_devx_cmds.h>
  24 #include <mlx5_prm.h>
  25 #include <mlx5_malloc.h>
  26
  27 #include "mlx5_defs.h"
  28 #include "mlx5.h"
  29 #include "mlx5_flow.h"
  30 #include "mlx5_flow_os.h"
  31 #include "mlx5_rx.h"
  32 #include "mlx5_tx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              const struct mlx5_flow_tunnel *tunnel,
  54                              struct tunnel_default_miss_ctx *ctx,
  55                              struct rte_flow_error *error);
  56 static struct mlx5_flow_tunnel *
  57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  58 static void
  59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  60 static uint32_t
  61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  62                                 const struct mlx5_flow_tunnel *tunnel,
  63                                 uint32_t group, uint32_t *table,
  64                                 struct rte_flow_error *error);
  65
  66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  67 static void mlx5_flow_pop_thread_workspace(void);
  68
  69
  70 /** Device flow drivers. */
  71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  72
  73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  74
  75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  76         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  78         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  79 #endif
  80         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  81         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  82 };
  83
  84 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  85 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  86         (const int []){ \
  87                 __VA_ARGS__, 0, \
  88         }
  89
  90 /** Node object of input graph for mlx5_flow_expand_rss(). */
  91 struct mlx5_flow_expand_node {
  92         const int *const next;
  93         /**<
  94          * List of next node indexes. Index 0 is interpreted as a terminator.
  95          */
  96         const enum rte_flow_item_type type;
  97         /**< Pattern item type of current node. */
  98         uint64_t rss_types;
  99         /**<
 100          * RSS types bit-field associated with this node
 101          * (see RTE_ETH_RSS_* definitions).
 102          */
 103         uint64_t node_flags;
 104         /**<
 105          *  Bit-fields that define how the node is used in the expansion.
 106          * (see MLX5_EXPANSION_NODE_* definitions).
 107          */
 108 };
 109
 110 /* Optional expand field. The expansion alg will not go deeper. */
 111 #define MLX5_EXPANSION_NODE_OPTIONAL (UINT64_C(1) << 0)
 112
 113 /* The node is not added implicitly as expansion to the flow pattern.
 114  * If the node type does not match the flow pattern item type, the
 115  * expansion alg will go deeper to its next items.
 116  * In the current implementation, the list of next nodes indexes can
 117  * have up to one node with this flag set and it has to be the last
 118  * node index (before the list terminator).
 119  */
 120 #define MLX5_EXPANSION_NODE_EXPLICIT (UINT64_C(1) << 1)
 121
 122 /** Object returned by mlx5_flow_expand_rss(). */
 123 struct mlx5_flow_expand_rss {
 124         uint32_t entries;
 125         /**< Number of entries @p patterns and @p priorities. */
 126         struct {
 127                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 128                 uint32_t priority; /**< Priority offset for each expansion. */
 129         } entry[];
 130 };
 131
 132 static void
 133 mlx5_dbg__print_pattern(const struct rte_flow_item *item);
 134
 135 static const struct mlx5_flow_expand_node *
 136 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
 137                 unsigned int item_idx,
 138                 const struct mlx5_flow_expand_node graph[],
 139                 const struct mlx5_flow_expand_node *node);
 140
 141 static bool
 142 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item)
 143 {
 144         switch (item->type) {
 145         case RTE_FLOW_ITEM_TYPE_ETH:
 146         case RTE_FLOW_ITEM_TYPE_VLAN:
 147         case RTE_FLOW_ITEM_TYPE_IPV4:
 148         case RTE_FLOW_ITEM_TYPE_IPV6:
 149         case RTE_FLOW_ITEM_TYPE_UDP:
 150         case RTE_FLOW_ITEM_TYPE_TCP:
 151         case RTE_FLOW_ITEM_TYPE_VXLAN:
 152         case RTE_FLOW_ITEM_TYPE_NVGRE:
 153         case RTE_FLOW_ITEM_TYPE_GRE:
 154         case RTE_FLOW_ITEM_TYPE_GENEVE:
 155         case RTE_FLOW_ITEM_TYPE_MPLS:
 156         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 157         case RTE_FLOW_ITEM_TYPE_GRE_KEY:
 158         case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
 159         case RTE_FLOW_ITEM_TYPE_GTP:
 160                 return true;
 161         default:
 162                 break;
 163         }
 164         return false;
 165 }
 166
 167 static enum rte_flow_item_type
 168 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 169 {
 170         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 171         uint16_t ether_type = 0;
 172         uint16_t ether_type_m;
 173         uint8_t ip_next_proto = 0;
 174         uint8_t ip_next_proto_m;
 175
 176         if (item == NULL || item->spec == NULL)
 177                 return ret;
 178         switch (item->type) {
 179         case RTE_FLOW_ITEM_TYPE_ETH:
 180                 if (item->mask)
 181                         ether_type_m = ((const struct rte_flow_item_eth *)
 182                                                 (item->mask))->type;
 183                 else
 184                         ether_type_m = rte_flow_item_eth_mask.type;
 185                 if (ether_type_m != RTE_BE16(0xFFFF))
 186                         break;
 187                 ether_type = ((const struct rte_flow_item_eth *)
 188                                 (item->spec))->type;
 189                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 190                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 191                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 192                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 193                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 194                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 195                 else
 196                         ret = RTE_FLOW_ITEM_TYPE_END;
 197                 break;
 198         case RTE_FLOW_ITEM_TYPE_VLAN:
 199                 if (item->mask)
 200                         ether_type_m = ((const struct rte_flow_item_vlan *)
 201                                                 (item->mask))->inner_type;
 202                 else
 203                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 204                 if (ether_type_m != RTE_BE16(0xFFFF))
 205                         break;
 206                 ether_type = ((const struct rte_flow_item_vlan *)
 207                                 (item->spec))->inner_type;
 208                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 209                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 210                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 211                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 212                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 213                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 214                 else
 215                         ret = RTE_FLOW_ITEM_TYPE_END;
 216                 break;
 217         case RTE_FLOW_ITEM_TYPE_IPV4:
 218                 if (item->mask)
 219                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 220                                         (item->mask))->hdr.next_proto_id;
 221                 else
 222                         ip_next_proto_m =
 223                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 224                 if (ip_next_proto_m != 0xFF)
 225                         break;
 226                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 227                                 (item->spec))->hdr.next_proto_id;
 228                 if (ip_next_proto == IPPROTO_UDP)
 229                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 230                 else if (ip_next_proto == IPPROTO_TCP)
 231                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 232                 else if (ip_next_proto == IPPROTO_IP)
 233                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 234                 else if (ip_next_proto == IPPROTO_IPV6)
 235                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 236                 else
 237                         ret = RTE_FLOW_ITEM_TYPE_END;
 238                 break;
 239         case RTE_FLOW_ITEM_TYPE_IPV6:
 240                 if (item->mask)
 241                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 242                                                 (item->mask))->hdr.proto;
 243                 else
 244                         ip_next_proto_m =
 245                                 rte_flow_item_ipv6_mask.hdr.proto;
 246                 if (ip_next_proto_m != 0xFF)
 247                         break;
 248                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 249                                 (item->spec))->hdr.proto;
 250                 if (ip_next_proto == IPPROTO_UDP)
 251                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 252                 else if (ip_next_proto == IPPROTO_TCP)
 253                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 254                 else if (ip_next_proto == IPPROTO_IP)
 255                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 256                 else if (ip_next_proto == IPPROTO_IPV6)
 257                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 258                 else
 259                         ret = RTE_FLOW_ITEM_TYPE_END;
 260                 break;
 261         default:
 262                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 263                 break;
 264         }
 265         return ret;
 266 }
 267
 268 static const int *
 269 mlx5_flow_expand_rss_skip_explicit(const struct mlx5_flow_expand_node graph[],
 270                 const int *next_node)
 271 {
 272         const struct mlx5_flow_expand_node *node = NULL;
 273         const int *next = next_node;
 274
 275         while (next && *next) {
 276                 /*
 277                  * Skip the nodes with the MLX5_EXPANSION_NODE_EXPLICIT
 278                  * flag set, because they were not found in the flow pattern.
 279                  */
 280                 node = &graph[*next];
 281                 if (!(node->node_flags & MLX5_EXPANSION_NODE_EXPLICIT))
 282                         break;
 283                 next = node->next;
 284         }
 285         return next;
 286 }
 287
 288 #define MLX5_RSS_EXP_ELT_N 16
 289
 290 /**
 291  * Expand RSS flows into several possible flows according to the RSS hash
 292  * fields requested and the driver capabilities.
 293  *
 294  * @param[out] buf
 295  *   Buffer to store the result expansion.
 296  * @param[in] size
 297  *   Buffer size in bytes. If 0, @p buf can be NULL.
 298  * @param[in] pattern
 299  *   User flow pattern.
 300  * @param[in] types
 301  *   RSS types to expand (see RTE_ETH_RSS_* definitions).
 302  * @param[in] graph
 303  *   Input graph to expand @p pattern according to @p types.
 304  * @param[in] graph_root_index
 305  *   Index of root node in @p graph, typically 0.
 306  *
 307  * @return
 308  *   A positive value representing the size of @p buf in bytes regardless of
 309  *   @p size on success, a negative errno value otherwise and rte_errno is
 310  *   set, the following errors are defined:
 311  *
 312  *   -E2BIG: graph-depth @p graph is too deep.
 313  *   -EINVAL: @p size has not enough space for expanded pattern.
 314  */
 315 static int
 316 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 317                      const struct rte_flow_item *pattern, uint64_t types,
 318                      const struct mlx5_flow_expand_node graph[],
 319                      int graph_root_index)
 320 {
 321         const struct rte_flow_item *item;
 322         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 323         const int *next_node;
 324         const int *stack[MLX5_RSS_EXP_ELT_N];
 325         int stack_pos = 0;
 326         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 327         unsigned int i, item_idx, last_expand_item_idx = 0;
 328         size_t lsize;
 329         size_t user_pattern_size = 0;
 330         void *addr = NULL;
 331         const struct mlx5_flow_expand_node *next = NULL;
 332         struct rte_flow_item missed_item;
 333         int missed = 0;
 334         int elt = 0;
 335         const struct rte_flow_item *last_expand_item = NULL;
 336
 337         memset(&missed_item, 0, sizeof(missed_item));
 338         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 339                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 340         if (lsize > size)
 341                 return -EINVAL;
 342         buf->entry[0].priority = 0;
 343         buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 344         buf->entries = 0;
 345         addr = buf->entry[0].pattern;
 346         for (item = pattern, item_idx = 0;
 347                         item->type != RTE_FLOW_ITEM_TYPE_END;
 348                         item++, item_idx++) {
 349                 if (!mlx5_flow_is_rss_expandable_item(item)) {
 350                         user_pattern_size += sizeof(*item);
 351                         continue;
 352                 }
 353                 last_expand_item = item;
 354                 last_expand_item_idx = item_idx;
 355                 i = 0;
 356                 while (node->next && node->next[i]) {
 357                         next = &graph[node->next[i]];
 358                         if (next->type == item->type)
 359                                 break;
 360                         if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
 361                                 node = next;
 362                                 i = 0;
 363                         } else {
 364                                 ++i;
 365                         }
 366                 }
 367                 if (next)
 368                         node = next;
 369                 user_pattern_size += sizeof(*item);
 370         }
 371         user_pattern_size += sizeof(*item); /* Handle END item. */
 372         lsize += user_pattern_size;
 373         if (lsize > size)
 374                 return -EINVAL;
 375         /* Copy the user pattern in the first entry of the buffer. */
 376         rte_memcpy(addr, pattern, user_pattern_size);
 377         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 378         buf->entries = 1;
 379         /* Start expanding. */
 380         memset(flow_items, 0, sizeof(flow_items));
 381         user_pattern_size -= sizeof(*item);
 382         /*
 383          * Check if the last valid item has spec set, need complete pattern,
 384          * and the pattern can be used for expansion.
 385          */
 386         missed_item.type = mlx5_flow_expand_rss_item_complete(last_expand_item);
 387         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 388                 /* Item type END indicates expansion is not required. */
 389                 return lsize;
 390         }
 391         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 392                 next = NULL;
 393                 missed = 1;
 394                 i = 0;
 395                 while (node->next && node->next[i]) {
 396                         next = &graph[node->next[i]];
 397                         if (next->type == missed_item.type) {
 398                                 flow_items[0].type = missed_item.type;
 399                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 400                                 break;
 401                         }
 402                         if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
 403                                 node = next;
 404                                 i = 0;
 405                         } else {
 406                                 ++i;
 407                         }
 408                         next = NULL;
 409                 }
 410         }
 411         if (next && missed) {
 412                 elt = 2; /* missed item + item end. */
 413                 node = next;
 414                 lsize += elt * sizeof(*item) + user_pattern_size;
 415                 if (lsize > size)
 416                         return -EINVAL;
 417                 if (node->rss_types & types) {
 418                         buf->entry[buf->entries].priority = 1;
 419                         buf->entry[buf->entries].pattern = addr;
 420                         buf->entries++;
 421                         rte_memcpy(addr, buf->entry[0].pattern,
 422                                    user_pattern_size);
 423                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 424                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 425                         addr = (void *)(((uintptr_t)addr) +
 426                                         elt * sizeof(*item));
 427                 }
 428         } else if (last_expand_item != NULL) {
 429                 node = mlx5_flow_expand_rss_adjust_node(pattern,
 430                                 last_expand_item_idx, graph, node);
 431         }
 432         memset(flow_items, 0, sizeof(flow_items));
 433         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 434                         node->next);
 435         stack[stack_pos] = next_node;
 436         node = next_node ? &graph[*next_node] : NULL;
 437         while (node) {
 438                 flow_items[stack_pos].type = node->type;
 439                 if (node->rss_types & types) {
 440                         size_t n;
 441                         /*
 442                          * compute the number of items to copy from the
 443                          * expansion and copy it.
 444                          * When the stack_pos is 0, there are 1 element in it,
 445                          * plus the addition END item.
 446                          */
 447                         elt = stack_pos + 2;
 448                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 449                         lsize += elt * sizeof(*item) + user_pattern_size;
 450                         if (lsize > size)
 451                                 return -EINVAL;
 452                         n = elt * sizeof(*item);
 453                         buf->entry[buf->entries].priority =
 454                                 stack_pos + 1 + missed;
 455                         buf->entry[buf->entries].pattern = addr;
 456                         buf->entries++;
 457                         rte_memcpy(addr, buf->entry[0].pattern,
 458                                    user_pattern_size);
 459                         addr = (void *)(((uintptr_t)addr) +
 460                                         user_pattern_size);
 461                         rte_memcpy(addr, &missed_item,
 462                                    missed * sizeof(*item));
 463                         addr = (void *)(((uintptr_t)addr) +
 464                                 missed * sizeof(*item));
 465                         rte_memcpy(addr, flow_items, n);
 466                         addr = (void *)(((uintptr_t)addr) + n);
 467                 }
 468                 /* Go deeper. */
 469                 if (!(node->node_flags & MLX5_EXPANSION_NODE_OPTIONAL) &&
 470                                 node->next) {
 471                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 472                                         node->next);
 473                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 474                                 rte_errno = E2BIG;
 475                                 return -rte_errno;
 476                         }
 477                         stack[stack_pos] = next_node;
 478                 } else if (*(next_node + 1)) {
 479                         /* Follow up with the next possibility. */
 480                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 481                                         ++next_node);
 482                 } else if (!stack_pos) {
 483                         /*
 484                          * Completing the traverse over the different paths.
 485                          * The next_node is advanced to the terminator.
 486                          */
 487                         ++next_node;
 488                 } else {
 489                         /* Move to the next path. */
 490                         while (stack_pos) {
 491                                 next_node = stack[--stack_pos];
 492                                 next_node++;
 493                                 if (*next_node)
 494                                         break;
 495                         }
 496                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 497                                         next_node);
 498                         stack[stack_pos] = next_node;
 499                 }
 500                 node = next_node && *next_node ? &graph[*next_node] : NULL;
 501         };
 502         return lsize;
 503 }
 504
 505 enum mlx5_expansion {
 506         MLX5_EXPANSION_ROOT,
 507         MLX5_EXPANSION_ROOT_OUTER,
 508         MLX5_EXPANSION_OUTER_ETH,
 509         MLX5_EXPANSION_OUTER_VLAN,
 510         MLX5_EXPANSION_OUTER_IPV4,
 511         MLX5_EXPANSION_OUTER_IPV4_UDP,
 512         MLX5_EXPANSION_OUTER_IPV4_TCP,
 513         MLX5_EXPANSION_OUTER_IPV6,
 514         MLX5_EXPANSION_OUTER_IPV6_UDP,
 515         MLX5_EXPANSION_OUTER_IPV6_TCP,
 516         MLX5_EXPANSION_VXLAN,
 517         MLX5_EXPANSION_STD_VXLAN,
 518         MLX5_EXPANSION_L3_VXLAN,
 519         MLX5_EXPANSION_VXLAN_GPE,
 520         MLX5_EXPANSION_GRE,
 521         MLX5_EXPANSION_NVGRE,
 522         MLX5_EXPANSION_GRE_KEY,
 523         MLX5_EXPANSION_MPLS,
 524         MLX5_EXPANSION_ETH,
 525         MLX5_EXPANSION_VLAN,
 526         MLX5_EXPANSION_IPV4,
 527         MLX5_EXPANSION_IPV4_UDP,
 528         MLX5_EXPANSION_IPV4_TCP,
 529         MLX5_EXPANSION_IPV6,
 530         MLX5_EXPANSION_IPV6_UDP,
 531         MLX5_EXPANSION_IPV6_TCP,
 532         MLX5_EXPANSION_IPV6_FRAG_EXT,
 533         MLX5_EXPANSION_GTP
 534 };
 535
 536 /** Supported expansion of items. */
 537 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 538         [MLX5_EXPANSION_ROOT] = {
 539                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 540                                                   MLX5_EXPANSION_IPV4,
 541                                                   MLX5_EXPANSION_IPV6),
 542                 .type = RTE_FLOW_ITEM_TYPE_END,
 543         },
 544         [MLX5_EXPANSION_ROOT_OUTER] = {
 545                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 546                                                   MLX5_EXPANSION_OUTER_IPV4,
 547                                                   MLX5_EXPANSION_OUTER_IPV6),
 548                 .type = RTE_FLOW_ITEM_TYPE_END,
 549         },
 550         [MLX5_EXPANSION_OUTER_ETH] = {
 551                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 552                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 553                 .rss_types = 0,
 554         },
 555         [MLX5_EXPANSION_OUTER_VLAN] = {
 556                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 557                                                   MLX5_EXPANSION_OUTER_IPV6),
 558                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 559                 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
 560         },
 561         [MLX5_EXPANSION_OUTER_IPV4] = {
 562                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 563                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 564                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 565                          MLX5_EXPANSION_GRE,
 566                          MLX5_EXPANSION_NVGRE,
 567                          MLX5_EXPANSION_IPV4,
 568                          MLX5_EXPANSION_IPV6),
 569                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 570                 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 |
 571                         RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
 572         },
 573         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 574                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 575                                                   MLX5_EXPANSION_VXLAN_GPE,
 576                                                   MLX5_EXPANSION_MPLS,
 577                                                   MLX5_EXPANSION_GTP),
 578                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 579                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP,
 580         },
 581         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 582                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 583                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP,
 584         },
 585         [MLX5_EXPANSION_OUTER_IPV6] = {
 586                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 587                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 588                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 589                          MLX5_EXPANSION_IPV4,
 590                          MLX5_EXPANSION_IPV6,
 591                          MLX5_EXPANSION_GRE,
 592                          MLX5_EXPANSION_NVGRE),
 593                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 594                 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 |
 595                         RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
 596         },
 597         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 598                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 599                                                   MLX5_EXPANSION_VXLAN_GPE,
 600                                                   MLX5_EXPANSION_MPLS,
 601                                                   MLX5_EXPANSION_GTP),
 602                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 603                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP,
 604         },
 605         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 606                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 607                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP,
 608         },
 609         [MLX5_EXPANSION_VXLAN] = {
 610                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 611                                                   MLX5_EXPANSION_IPV4,
 612                                                   MLX5_EXPANSION_IPV6),
 613                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 614         },
 615         [MLX5_EXPANSION_STD_VXLAN] = {
 616                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 617                                         .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 618         },
 619         [MLX5_EXPANSION_L3_VXLAN] = {
 620                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 621                                         MLX5_EXPANSION_IPV6),
 622                                         .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 623         },
 624         [MLX5_EXPANSION_VXLAN_GPE] = {
 625                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 626                                                   MLX5_EXPANSION_IPV4,
 627                                                   MLX5_EXPANSION_IPV6),
 628                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 629         },
 630         [MLX5_EXPANSION_GRE] = {
 631                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 632                                                   MLX5_EXPANSION_IPV6,
 633                                                   MLX5_EXPANSION_GRE_KEY,
 634                                                   MLX5_EXPANSION_MPLS),
 635                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 636         },
 637         [MLX5_EXPANSION_GRE_KEY] = {
 638                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 639                                                   MLX5_EXPANSION_IPV6,
 640                                                   MLX5_EXPANSION_MPLS),
 641                 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY,
 642                 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
 643         },
 644         [MLX5_EXPANSION_NVGRE] = {
 645                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 646                 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
 647         },
 648         [MLX5_EXPANSION_MPLS] = {
 649                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 650                                                   MLX5_EXPANSION_IPV6,
 651                                                   MLX5_EXPANSION_ETH),
 652                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 653                 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
 654         },
 655         [MLX5_EXPANSION_ETH] = {
 656                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 657                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 658         },
 659         [MLX5_EXPANSION_VLAN] = {
 660                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 661                                                   MLX5_EXPANSION_IPV6),
 662                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 663                 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
 664         },
 665         [MLX5_EXPANSION_IPV4] = {
 666                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 667                                                   MLX5_EXPANSION_IPV4_TCP),
 668                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 669                 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 |
 670                         RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
 671         },
 672         [MLX5_EXPANSION_IPV4_UDP] = {
 673                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 674                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP,
 675         },
 676         [MLX5_EXPANSION_IPV4_TCP] = {
 677                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 678                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP,
 679         },
 680         [MLX5_EXPANSION_IPV6] = {
 681                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 682                                                   MLX5_EXPANSION_IPV6_TCP,
 683                                                   MLX5_EXPANSION_IPV6_FRAG_EXT),
 684                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 685                 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 |
 686                         RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
 687         },
 688         [MLX5_EXPANSION_IPV6_UDP] = {
 689                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 690                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP,
 691         },
 692         [MLX5_EXPANSION_IPV6_TCP] = {
 693                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 694                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP,
 695         },
 696         [MLX5_EXPANSION_IPV6_FRAG_EXT] = {
 697                 .type = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT,
 698         },
 699         [MLX5_EXPANSION_GTP] = {
 700                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 701                                                   MLX5_EXPANSION_IPV6),
 702                 .type = RTE_FLOW_ITEM_TYPE_GTP,
 703         },
 704 };
 705
 706 static struct rte_flow_action_handle *
 707 mlx5_action_handle_create(struct rte_eth_dev *dev,
 708                           const struct rte_flow_indir_action_conf *conf,
 709                           const struct rte_flow_action *action,
 710                           struct rte_flow_error *error);
 711 static int mlx5_action_handle_destroy
 712                                 (struct rte_eth_dev *dev,
 713                                  struct rte_flow_action_handle *handle,
 714                                  struct rte_flow_error *error);
 715 static int mlx5_action_handle_update
 716                                 (struct rte_eth_dev *dev,
 717                                  struct rte_flow_action_handle *handle,
 718                                  const void *update,
 719                                  struct rte_flow_error *error);
 720 static int mlx5_action_handle_query
 721                                 (struct rte_eth_dev *dev,
 722                                  const struct rte_flow_action_handle *handle,
 723                                  void *data,
 724                                  struct rte_flow_error *error);
 725 static int
 726 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 727                     struct rte_flow_tunnel *app_tunnel,
 728                     struct rte_flow_action **actions,
 729                     uint32_t *num_of_actions,
 730                     struct rte_flow_error *error);
 731 static int
 732 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 733                        struct rte_flow_tunnel *app_tunnel,
 734                        struct rte_flow_item **items,
 735                        uint32_t *num_of_items,
 736                        struct rte_flow_error *error);
 737 static int
 738 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 739                               struct rte_flow_item *pmd_items,
 740                               uint32_t num_items, struct rte_flow_error *err);
 741 static int
 742 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 743                                 struct rte_flow_action *pmd_actions,
 744                                 uint32_t num_actions,
 745                                 struct rte_flow_error *err);
 746 static int
 747 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 748                                   struct rte_mbuf *m,
 749                                   struct rte_flow_restore_info *info,
 750                                   struct rte_flow_error *err);
 751
 752 static const struct rte_flow_ops mlx5_flow_ops = {
 753         .validate = mlx5_flow_validate,
 754         .create = mlx5_flow_create,
 755         .destroy = mlx5_flow_destroy,
 756         .flush = mlx5_flow_flush,
 757         .isolate = mlx5_flow_isolate,
 758         .query = mlx5_flow_query,
 759         .dev_dump = mlx5_flow_dev_dump,
 760         .get_aged_flows = mlx5_flow_get_aged_flows,
 761         .action_handle_create = mlx5_action_handle_create,
 762         .action_handle_destroy = mlx5_action_handle_destroy,
 763         .action_handle_update = mlx5_action_handle_update,
 764         .action_handle_query = mlx5_action_handle_query,
 765         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 766         .tunnel_match = mlx5_flow_tunnel_match,
 767         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 768         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 769         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 770 };
 771
 772 /* Tunnel information. */
 773 struct mlx5_flow_tunnel_info {
 774         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 775         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 776 };
 777
 778 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 779         {
 780                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 781                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 782         },
 783         {
 784                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 785                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 786         },
 787         {
 788                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 789                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 790         },
 791         {
 792                 .tunnel = MLX5_FLOW_LAYER_GRE,
 793                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 794         },
 795         {
 796                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 797                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 798         },
 799         {
 800                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 801                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 802         },
 803         {
 804                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 805                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 806         },
 807         {
 808                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 809                 .ptype = RTE_PTYPE_TUNNEL_IP,
 810         },
 811         {
 812                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 813                 .ptype = RTE_PTYPE_TUNNEL_IP,
 814         },
 815         {
 816                 .tunnel = MLX5_FLOW_LAYER_GTP,
 817                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 818         },
 819 };
 820
 821
 822
 823 /**
 824  * Translate tag ID to register.
 825  *
 826  * @param[in] dev
 827  *   Pointer to the Ethernet device structure.
 828  * @param[in] feature
 829  *   The feature that request the register.
 830  * @param[in] id
 831  *   The request register ID.
 832  * @param[out] error
 833  *   Error description in case of any.
 834  *
 835  * @return
 836  *   The request register on success, a negative errno
 837  *   value otherwise and rte_errno is set.
 838  */
 839 int
 840 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 841                      enum mlx5_feature_name feature,
 842                      uint32_t id,
 843                      struct rte_flow_error *error)
 844 {
 845         struct mlx5_priv *priv = dev->data->dev_private;
 846         struct mlx5_dev_config *config = &priv->config;
 847         enum modify_reg start_reg;
 848         bool skip_mtr_reg = false;
 849
 850         switch (feature) {
 851         case MLX5_HAIRPIN_RX:
 852                 return REG_B;
 853         case MLX5_HAIRPIN_TX:
 854                 return REG_A;
 855         case MLX5_METADATA_RX:
 856                 switch (config->dv_xmeta_en) {
 857                 case MLX5_XMETA_MODE_LEGACY:
 858                         return REG_B;
 859                 case MLX5_XMETA_MODE_META16:
 860                         return REG_C_0;
 861                 case MLX5_XMETA_MODE_META32:
 862                         return REG_C_1;
 863                 }
 864                 break;
 865         case MLX5_METADATA_TX:
 866                 return REG_A;
 867         case MLX5_METADATA_FDB:
 868                 switch (config->dv_xmeta_en) {
 869                 case MLX5_XMETA_MODE_LEGACY:
 870                         return REG_NON;
 871                 case MLX5_XMETA_MODE_META16:
 872                         return REG_C_0;
 873                 case MLX5_XMETA_MODE_META32:
 874                         return REG_C_1;
 875                 }
 876                 break;
 877         case MLX5_FLOW_MARK:
 878                 switch (config->dv_xmeta_en) {
 879                 case MLX5_XMETA_MODE_LEGACY:
 880                         return REG_NON;
 881                 case MLX5_XMETA_MODE_META16:
 882                         return REG_C_1;
 883                 case MLX5_XMETA_MODE_META32:
 884                         return REG_C_0;
 885                 }
 886                 break;
 887         case MLX5_MTR_ID:
 888                 /*
 889                  * If meter color and meter id share one register, flow match
 890                  * should use the meter color register for match.
 891                  */
 892                 if (priv->mtr_reg_share)
 893                         return priv->mtr_color_reg;
 894                 else
 895                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 896                                REG_C_3;
 897         case MLX5_MTR_COLOR:
 898         case MLX5_ASO_FLOW_HIT:
 899         case MLX5_ASO_CONNTRACK:
 900                 /* All features use the same REG_C. */
 901                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 902                 return priv->mtr_color_reg;
 903         case MLX5_COPY_MARK:
 904                 /*
 905                  * Metadata COPY_MARK register using is in meter suffix sub
 906                  * flow while with meter. It's safe to share the same register.
 907                  */
 908                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 909         case MLX5_APP_TAG:
 910                 /*
 911                  * If meter is enable, it will engage the register for color
 912                  * match and flow match. If meter color match is not using the
 913                  * REG_C_2, need to skip the REG_C_x be used by meter color
 914                  * match.
 915                  * If meter is disable, free to use all available registers.
 916                  */
 917                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 918                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 919                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 920                 if (id > (uint32_t)(REG_C_7 - start_reg))
 921                         return rte_flow_error_set(error, EINVAL,
 922                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 923                                                   NULL, "invalid tag id");
 924                 if (priv->sh->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 925                         return rte_flow_error_set(error, ENOTSUP,
 926                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 927                                                   NULL, "unsupported tag id");
 928                 /*
 929                  * This case means meter is using the REG_C_x great than 2.
 930                  * Take care not to conflict with meter color REG_C_x.
 931                  * If the available index REG_C_y >= REG_C_x, skip the
 932                  * color register.
 933                  */
 934                 if (skip_mtr_reg && priv->sh->flow_mreg_c
 935                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 936                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 937                                 return rte_flow_error_set(error, EINVAL,
 938                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 939                                                         NULL, "invalid tag id");
 940                         if (priv->sh->flow_mreg_c
 941                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 942                                 return priv->sh->flow_mreg_c
 943                                                [id + 1 + start_reg - REG_C_0];
 944                         return rte_flow_error_set(error, ENOTSUP,
 945                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 946                                                   NULL, "unsupported tag id");
 947                 }
 948                 return priv->sh->flow_mreg_c[id + start_reg - REG_C_0];
 949         }
 950         MLX5_ASSERT(false);
 951         return rte_flow_error_set(error, EINVAL,
 952                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 953                                   NULL, "invalid feature name");
 954 }
 955
 956 /**
 957  * Check extensive flow metadata register support.
 958  *
 959  * @param dev
 960  *   Pointer to rte_eth_dev structure.
 961  *
 962  * @return
 963  *   True if device supports extensive flow metadata register, otherwise false.
 964  */
 965 bool
 966 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 967 {
 968         struct mlx5_priv *priv = dev->data->dev_private;
 969
 970         /*
 971          * Having available reg_c can be regarded inclusively as supporting
 972          * extensive flow metadata register, which could mean,
 973          * - metadata register copy action by modify header.
 974          * - 16 modify header actions is supported.
 975          * - reg_c's are preserved across different domain (FDB and NIC) on
 976          *   packet loopback by flow lookup miss.
 977          */
 978         return priv->sh->flow_mreg_c[2] != REG_NON;
 979 }
 980
 981 /**
 982  * Get the lowest priority.
 983  *
 984  * @param[in] dev
 985  *   Pointer to the Ethernet device structure.
 986  * @param[in] attributes
 987  *   Pointer to device flow rule attributes.
 988  *
 989  * @return
 990  *   The value of lowest priority of flow.
 991  */
 992 uint32_t
 993 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
 994                           const struct rte_flow_attr *attr)
 995 {
 996         struct mlx5_priv *priv = dev->data->dev_private;
 997
 998         if (!attr->group && !attr->transfer)
 999                 return priv->sh->flow_max_priority - 2;
1000         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
1001 }
1002
1003 /**
1004  * Calculate matcher priority of the flow.
1005  *
1006  * @param[in] dev
1007  *   Pointer to the Ethernet device structure.
1008  * @param[in] attr
1009  *   Pointer to device flow rule attributes.
1010  * @param[in] subpriority
1011  *   The priority based on the items.
1012  * @param[in] external
1013  *   Flow is user flow.
1014  * @return
1015  *   The matcher priority of the flow.
1016  */
1017 uint16_t
1018 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
1019                           const struct rte_flow_attr *attr,
1020                           uint32_t subpriority, bool external)
1021 {
1022         uint16_t priority = (uint16_t)attr->priority;
1023         struct mlx5_priv *priv = dev->data->dev_private;
1024
1025         if (!attr->group && !attr->transfer) {
1026                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1027                         priority = priv->sh->flow_max_priority - 1;
1028                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
1029         } else if (!external && attr->transfer && attr->group == 0 &&
1030                    attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) {
1031                 return (priv->sh->flow_max_priority - 1) * 3;
1032         }
1033         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1034                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
1035         return priority * 3 + subpriority;
1036 }
1037
1038 /**
1039  * Verify the @p item specifications (spec, last, mask) are compatible with the
1040  * NIC capabilities.
1041  *
1042  * @param[in] item
1043  *   Item specification.
1044  * @param[in] mask
1045  *   @p item->mask or flow default bit-masks.
1046  * @param[in] nic_mask
1047  *   Bit-masks covering supported fields by the NIC to compare with user mask.
1048  * @param[in] size
1049  *   Bit-masks size in bytes.
1050  * @param[in] range_accepted
1051  *   True if range of values is accepted for specific fields, false otherwise.
1052  * @param[out] error
1053  *   Pointer to error structure.
1054  *
1055  * @return
1056  *   0 on success, a negative errno value otherwise and rte_errno is set.
1057  */
1058 int
1059 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
1060                           const uint8_t *mask,
1061                           const uint8_t *nic_mask,
1062                           unsigned int size,
1063                           bool range_accepted,
1064                           struct rte_flow_error *error)
1065 {
1066         unsigned int i;
1067
1068         MLX5_ASSERT(nic_mask);
1069         for (i = 0; i < size; ++i)
1070                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1071                         return rte_flow_error_set(error, ENOTSUP,
1072                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1073                                                   item,
1074                                                   "mask enables non supported"
1075                                                   " bits");
1076         if (!item->spec && (item->mask || item->last))
1077                 return rte_flow_error_set(error, EINVAL,
1078                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1079                                           "mask/last without a spec is not"
1080                                           " supported");
1081         if (item->spec && item->last && !range_accepted) {
1082                 uint8_t spec[size];
1083                 uint8_t last[size];
1084                 unsigned int i;
1085                 int ret;
1086
1087                 for (i = 0; i < size; ++i) {
1088                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1089                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1090                 }
1091                 ret = memcmp(spec, last, size);
1092                 if (ret != 0)
1093                         return rte_flow_error_set(error, EINVAL,
1094                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1095                                                   item,
1096                                                   "range is not valid");
1097         }
1098         return 0;
1099 }
1100
1101 /**
1102  * Adjust the hash fields according to the @p flow information.
1103  *
1104  * @param[in] dev_flow.
1105  *   Pointer to the mlx5_flow.
1106  * @param[in] tunnel
1107  *   1 when the hash field is for a tunnel item.
1108  * @param[in] layer_types
1109  *   RTE_ETH_RSS_* types.
1110  * @param[in] hash_fields
1111  *   Item hash fields.
1112  *
1113  * @return
1114  *   The hash fields that should be used.
1115  */
1116 uint64_t
1117 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1118                             int tunnel __rte_unused, uint64_t layer_types,
1119                             uint64_t hash_fields)
1120 {
1121 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1122         int rss_request_inner = rss_desc->level >= 2;
1123
1124         /* Check RSS hash level for tunnel. */
1125         if (tunnel && rss_request_inner)
1126                 hash_fields |= IBV_RX_HASH_INNER;
1127         else if (tunnel || rss_request_inner)
1128                 return 0;
1129 #endif
1130         /* Check if requested layer matches RSS hash fields. */
1131         if (!(rss_desc->types & layer_types))
1132                 return 0;
1133         return hash_fields;
1134 }
1135
1136 /**
1137  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1138  * if several tunnel rules are used on this queue, the tunnel ptype will be
1139  * cleared.
1140  *
1141  * @param rxq_ctrl
1142  *   Rx queue to update.
1143  */
1144 static void
1145 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1146 {
1147         unsigned int i;
1148         uint32_t tunnel_ptype = 0;
1149
1150         /* Look up for the ptype to use. */
1151         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1152                 if (!rxq_ctrl->flow_tunnels_n[i])
1153                         continue;
1154                 if (!tunnel_ptype) {
1155                         tunnel_ptype = tunnels_info[i].ptype;
1156                 } else {
1157                         tunnel_ptype = 0;
1158                         break;
1159                 }
1160         }
1161         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1162 }
1163
1164 /**
1165  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1166  * flow.
1167  *
1168  * @param[in] dev
1169  *   Pointer to the Ethernet device structure.
1170  * @param[in] dev_handle
1171  *   Pointer to device flow handle structure.
1172  */
1173 void
1174 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1175                        struct mlx5_flow_handle *dev_handle)
1176 {
1177         struct mlx5_priv *priv = dev->data->dev_private;
1178         const int mark = dev_handle->mark;
1179         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1180         struct mlx5_ind_table_obj *ind_tbl = NULL;
1181         unsigned int i;
1182
1183         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1184                 struct mlx5_hrxq *hrxq;
1185
1186                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1187                               dev_handle->rix_hrxq);
1188                 if (hrxq)
1189                         ind_tbl = hrxq->ind_table;
1190         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1191                 struct mlx5_shared_action_rss *shared_rss;
1192
1193                 shared_rss = mlx5_ipool_get
1194                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1195                          dev_handle->rix_srss);
1196                 if (shared_rss)
1197                         ind_tbl = shared_rss->ind_tbl;
1198         }
1199         if (!ind_tbl)
1200                 return;
1201         for (i = 0; i != ind_tbl->queues_n; ++i) {
1202                 int idx = ind_tbl->queues[i];
1203                 struct mlx5_rxq_ctrl *rxq_ctrl =
1204                         container_of((*priv->rxqs)[idx],
1205                                      struct mlx5_rxq_ctrl, rxq);
1206
1207                 /*
1208                  * To support metadata register copy on Tx loopback,
1209                  * this must be always enabled (metadata may arive
1210                  * from other port - not from local flows only.
1211                  */
1212                 if (priv->config.dv_flow_en &&
1213                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1214                     mlx5_flow_ext_mreg_supported(dev)) {
1215                         rxq_ctrl->rxq.mark = 1;
1216                         rxq_ctrl->flow_mark_n = 1;
1217                 } else if (mark) {
1218                         rxq_ctrl->rxq.mark = 1;
1219                         rxq_ctrl->flow_mark_n++;
1220                 }
1221                 if (tunnel) {
1222                         unsigned int j;
1223
1224                         /* Increase the counter matching the flow. */
1225                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1226                                 if ((tunnels_info[j].tunnel &
1227                                      dev_handle->layers) ==
1228                                     tunnels_info[j].tunnel) {
1229                                         rxq_ctrl->flow_tunnels_n[j]++;
1230                                         break;
1231                                 }
1232                         }
1233                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1234                 }
1235         }
1236 }
1237
1238 /**
1239  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1240  *
1241  * @param[in] dev
1242  *   Pointer to the Ethernet device structure.
1243  * @param[in] flow
1244  *   Pointer to flow structure.
1245  */
1246 static void
1247 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1248 {
1249         struct mlx5_priv *priv = dev->data->dev_private;
1250         uint32_t handle_idx;
1251         struct mlx5_flow_handle *dev_handle;
1252
1253         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1254                        handle_idx, dev_handle, next)
1255                 flow_drv_rxq_flags_set(dev, dev_handle);
1256 }
1257
1258 /**
1259  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1260  * device flow if no other flow uses it with the same kind of request.
1261  *
1262  * @param dev
1263  *   Pointer to Ethernet device.
1264  * @param[in] dev_handle
1265  *   Pointer to the device flow handle structure.
1266  */
1267 static void
1268 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1269                         struct mlx5_flow_handle *dev_handle)
1270 {
1271         struct mlx5_priv *priv = dev->data->dev_private;
1272         const int mark = dev_handle->mark;
1273         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1274         struct mlx5_ind_table_obj *ind_tbl = NULL;
1275         unsigned int i;
1276
1277         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1278                 struct mlx5_hrxq *hrxq;
1279
1280                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1281                               dev_handle->rix_hrxq);
1282                 if (hrxq)
1283                         ind_tbl = hrxq->ind_table;
1284         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1285                 struct mlx5_shared_action_rss *shared_rss;
1286
1287                 shared_rss = mlx5_ipool_get
1288                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1289                          dev_handle->rix_srss);
1290                 if (shared_rss)
1291                         ind_tbl = shared_rss->ind_tbl;
1292         }
1293         if (!ind_tbl)
1294                 return;
1295         MLX5_ASSERT(dev->data->dev_started);
1296         for (i = 0; i != ind_tbl->queues_n; ++i) {
1297                 int idx = ind_tbl->queues[i];
1298                 struct mlx5_rxq_ctrl *rxq_ctrl =
1299                         container_of((*priv->rxqs)[idx],
1300                                      struct mlx5_rxq_ctrl, rxq);
1301
1302                 if (priv->config.dv_flow_en &&
1303                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1304                     mlx5_flow_ext_mreg_supported(dev)) {
1305                         rxq_ctrl->rxq.mark = 1;
1306                         rxq_ctrl->flow_mark_n = 1;
1307                 } else if (mark) {
1308                         rxq_ctrl->flow_mark_n--;
1309                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1310                 }
1311                 if (tunnel) {
1312                         unsigned int j;
1313
1314                         /* Decrease the counter matching the flow. */
1315                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1316                                 if ((tunnels_info[j].tunnel &
1317                                      dev_handle->layers) ==
1318                                     tunnels_info[j].tunnel) {
1319                                         rxq_ctrl->flow_tunnels_n[j]--;
1320                                         break;
1321                                 }
1322                         }
1323                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1324                 }
1325         }
1326 }
1327
1328 /**
1329  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1330  * @p flow if no other flow uses it with the same kind of request.
1331  *
1332  * @param dev
1333  *   Pointer to Ethernet device.
1334  * @param[in] flow
1335  *   Pointer to the flow.
1336  */
1337 static void
1338 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1339 {
1340         struct mlx5_priv *priv = dev->data->dev_private;
1341         uint32_t handle_idx;
1342         struct mlx5_flow_handle *dev_handle;
1343
1344         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1345                        handle_idx, dev_handle, next)
1346                 flow_drv_rxq_flags_trim(dev, dev_handle);
1347 }
1348
1349 /**
1350  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1351  *
1352  * @param dev
1353  *   Pointer to Ethernet device.
1354  */
1355 static void
1356 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1357 {
1358         struct mlx5_priv *priv = dev->data->dev_private;
1359         unsigned int i;
1360
1361         for (i = 0; i != priv->rxqs_n; ++i) {
1362                 struct mlx5_rxq_ctrl *rxq_ctrl;
1363                 unsigned int j;
1364
1365                 if (!(*priv->rxqs)[i])
1366                         continue;
1367                 rxq_ctrl = container_of((*priv->rxqs)[i],
1368                                         struct mlx5_rxq_ctrl, rxq);
1369                 rxq_ctrl->flow_mark_n = 0;
1370                 rxq_ctrl->rxq.mark = 0;
1371                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1372                         rxq_ctrl->flow_tunnels_n[j] = 0;
1373                 rxq_ctrl->rxq.tunnel = 0;
1374         }
1375 }
1376
1377 /**
1378  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1379  *
1380  * @param[in] dev
1381  *   Pointer to the Ethernet device structure.
1382  */
1383 void
1384 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1385 {
1386         struct mlx5_priv *priv = dev->data->dev_private;
1387         struct mlx5_rxq_data *data;
1388         unsigned int i;
1389
1390         for (i = 0; i != priv->rxqs_n; ++i) {
1391                 if (!(*priv->rxqs)[i])
1392                         continue;
1393                 data = (*priv->rxqs)[i];
1394                 if (!rte_flow_dynf_metadata_avail()) {
1395                         data->dynf_meta = 0;
1396                         data->flow_meta_mask = 0;
1397                         data->flow_meta_offset = -1;
1398                         data->flow_meta_port_mask = 0;
1399                 } else {
1400                         data->dynf_meta = 1;
1401                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1402                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1403                         data->flow_meta_port_mask = priv->sh->dv_meta_mask;
1404                 }
1405         }
1406 }
1407
1408 /*
1409  * return a pointer to the desired action in the list of actions.
1410  *
1411  * @param[in] actions
1412  *   The list of actions to search the action in.
1413  * @param[in] action
1414  *   The action to find.
1415  *
1416  * @return
1417  *   Pointer to the action in the list, if found. NULL otherwise.
1418  */
1419 const struct rte_flow_action *
1420 mlx5_flow_find_action(const struct rte_flow_action *actions,
1421                       enum rte_flow_action_type action)
1422 {
1423         if (actions == NULL)
1424                 return NULL;
1425         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1426                 if (actions->type == action)
1427                         return actions;
1428         return NULL;
1429 }
1430
1431 /*
1432  * Validate the flag action.
1433  *
1434  * @param[in] action_flags
1435  *   Bit-fields that holds the actions detected until now.
1436  * @param[in] attr
1437  *   Attributes of flow that includes this action.
1438  * @param[out] error
1439  *   Pointer to error structure.
1440  *
1441  * @return
1442  *   0 on success, a negative errno value otherwise and rte_errno is set.
1443  */
1444 int
1445 mlx5_flow_validate_action_flag(uint64_t action_flags,
1446                                const struct rte_flow_attr *attr,
1447                                struct rte_flow_error *error)
1448 {
1449         if (action_flags & MLX5_FLOW_ACTION_MARK)
1450                 return rte_flow_error_set(error, EINVAL,
1451                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1452                                           "can't mark and flag in same flow");
1453         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1454                 return rte_flow_error_set(error, EINVAL,
1455                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1456                                           "can't have 2 flag"
1457                                           " actions in same flow");
1458         if (attr->egress)
1459                 return rte_flow_error_set(error, ENOTSUP,
1460                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1461                                           "flag action not supported for "
1462                                           "egress");
1463         return 0;
1464 }
1465
1466 /*
1467  * Validate the mark action.
1468  *
1469  * @param[in] action
1470  *   Pointer to the queue action.
1471  * @param[in] action_flags
1472  *   Bit-fields that holds the actions detected until now.
1473  * @param[in] attr
1474  *   Attributes of flow that includes this action.
1475  * @param[out] error
1476  *   Pointer to error structure.
1477  *
1478  * @return
1479  *   0 on success, a negative errno value otherwise and rte_errno is set.
1480  */
1481 int
1482 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1483                                uint64_t action_flags,
1484                                const struct rte_flow_attr *attr,
1485                                struct rte_flow_error *error)
1486 {
1487         const struct rte_flow_action_mark *mark = action->conf;
1488
1489         if (!mark)
1490                 return rte_flow_error_set(error, EINVAL,
1491                                           RTE_FLOW_ERROR_TYPE_ACTION,
1492                                           action,
1493                                           "configuration cannot be null");
1494         if (mark->id >= MLX5_FLOW_MARK_MAX)
1495                 return rte_flow_error_set(error, EINVAL,
1496                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1497                                           &mark->id,
1498                                           "mark id must in 0 <= id < "
1499                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1500         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1501                 return rte_flow_error_set(error, EINVAL,
1502                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1503                                           "can't flag and mark in same flow");
1504         if (action_flags & MLX5_FLOW_ACTION_MARK)
1505                 return rte_flow_error_set(error, EINVAL,
1506                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1507                                           "can't have 2 mark actions in same"
1508                                           " flow");
1509         if (attr->egress)
1510                 return rte_flow_error_set(error, ENOTSUP,
1511                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1512                                           "mark action not supported for "
1513                                           "egress");
1514         return 0;
1515 }
1516
1517 /*
1518  * Validate the drop action.
1519  *
1520  * @param[in] action_flags
1521  *   Bit-fields that holds the actions detected until now.
1522  * @param[in] attr
1523  *   Attributes of flow that includes this action.
1524  * @param[out] error
1525  *   Pointer to error structure.
1526  *
1527  * @return
1528  *   0 on success, a negative errno value otherwise and rte_errno is set.
1529  */
1530 int
1531 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1532                                const struct rte_flow_attr *attr,
1533                                struct rte_flow_error *error)
1534 {
1535         if (attr->egress)
1536                 return rte_flow_error_set(error, ENOTSUP,
1537                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1538                                           "drop action not supported for "
1539                                           "egress");
1540         return 0;
1541 }
1542
1543 /*
1544  * Validate the queue action.
1545  *
1546  * @param[in] action
1547  *   Pointer to the queue action.
1548  * @param[in] action_flags
1549  *   Bit-fields that holds the actions detected until now.
1550  * @param[in] dev
1551  *   Pointer to the Ethernet device structure.
1552  * @param[in] attr
1553  *   Attributes of flow that includes this action.
1554  * @param[out] error
1555  *   Pointer to error structure.
1556  *
1557  * @return
1558  *   0 on success, a negative errno value otherwise and rte_errno is set.
1559  */
1560 int
1561 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1562                                 uint64_t action_flags,
1563                                 struct rte_eth_dev *dev,
1564                                 const struct rte_flow_attr *attr,
1565                                 struct rte_flow_error *error)
1566 {
1567         struct mlx5_priv *priv = dev->data->dev_private;
1568         const struct rte_flow_action_queue *queue = action->conf;
1569
1570         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1571                 return rte_flow_error_set(error, EINVAL,
1572                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1573                                           "can't have 2 fate actions in"
1574                                           " same flow");
1575         if (!priv->rxqs_n)
1576                 return rte_flow_error_set(error, EINVAL,
1577                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1578                                           NULL, "No Rx queues configured");
1579         if (queue->index >= priv->rxqs_n)
1580                 return rte_flow_error_set(error, EINVAL,
1581                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1582                                           &queue->index,
1583                                           "queue index out of range");
1584         if (!(*priv->rxqs)[queue->index])
1585                 return rte_flow_error_set(error, EINVAL,
1586                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1587                                           &queue->index,
1588                                           "queue is not configured");
1589         if (attr->egress)
1590                 return rte_flow_error_set(error, ENOTSUP,
1591                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1592                                           "queue action not supported for "
1593                                           "egress");
1594         return 0;
1595 }
1596
1597 /**
1598  * Validate queue numbers for device RSS.
1599  *
1600  * @param[in] dev
1601  *   Configured device.
1602  * @param[in] queues
1603  *   Array of queue numbers.
1604  * @param[in] queues_n
1605  *   Size of the @p queues array.
1606  * @param[out] error
1607  *   On error, filled with a textual error description.
1608  * @param[out] queue
1609  *   On error, filled with an offending queue index in @p queues array.
1610  *
1611  * @return
1612  *   0 on success, a negative errno code on error.
1613  */
1614 static int
1615 mlx5_validate_rss_queues(const struct rte_eth_dev *dev,
1616                          const uint16_t *queues, uint32_t queues_n,
1617                          const char **error, uint32_t *queue_idx)
1618 {
1619         const struct mlx5_priv *priv = dev->data->dev_private;
1620         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1621         uint32_t i;
1622
1623         for (i = 0; i != queues_n; ++i) {
1624                 struct mlx5_rxq_ctrl *rxq_ctrl;
1625
1626                 if (queues[i] >= priv->rxqs_n) {
1627                         *error = "queue index out of range";
1628                         *queue_idx = i;
1629                         return -EINVAL;
1630                 }
1631                 if (!(*priv->rxqs)[queues[i]]) {
1632                         *error =  "queue is not configured";
1633                         *queue_idx = i;
1634                         return -EINVAL;
1635                 }
1636                 rxq_ctrl = container_of((*priv->rxqs)[queues[i]],
1637                                         struct mlx5_rxq_ctrl, rxq);
1638                 if (i == 0)
1639                         rxq_type = rxq_ctrl->type;
1640                 if (rxq_type != rxq_ctrl->type) {
1641                         *error = "combining hairpin and regular RSS queues is not supported";
1642                         *queue_idx = i;
1643                         return -ENOTSUP;
1644                 }
1645         }
1646         return 0;
1647 }
1648
1649 /*
1650  * Validate the rss action.
1651  *
1652  * @param[in] dev
1653  *   Pointer to the Ethernet device structure.
1654  * @param[in] action
1655  *   Pointer to the queue action.
1656  * @param[out] error
1657  *   Pointer to error structure.
1658  *
1659  * @return
1660  *   0 on success, a negative errno value otherwise and rte_errno is set.
1661  */
1662 int
1663 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1664                          const struct rte_flow_action *action,
1665                          struct rte_flow_error *error)
1666 {
1667         struct mlx5_priv *priv = dev->data->dev_private;
1668         const struct rte_flow_action_rss *rss = action->conf;
1669         int ret;
1670         const char *message;
1671         uint32_t queue_idx;
1672
1673         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1674             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1675                 return rte_flow_error_set(error, ENOTSUP,
1676                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1677                                           &rss->func,
1678                                           "RSS hash function not supported");
1679 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1680         if (rss->level > 2)
1681 #else
1682         if (rss->level > 1)
1683 #endif
1684                 return rte_flow_error_set(error, ENOTSUP,
1685                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1686                                           &rss->level,
1687                                           "tunnel RSS is not supported");
1688         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1689         if (rss->key_len == 0 && rss->key != NULL)
1690                 return rte_flow_error_set(error, ENOTSUP,
1691                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1692                                           &rss->key_len,
1693                                           "RSS hash key length 0");
1694         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1695                 return rte_flow_error_set(error, ENOTSUP,
1696                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1697                                           &rss->key_len,
1698                                           "RSS hash key too small");
1699         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1700                 return rte_flow_error_set(error, ENOTSUP,
1701                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1702                                           &rss->key_len,
1703                                           "RSS hash key too large");
1704         if (rss->queue_num > priv->config.ind_table_max_size)
1705                 return rte_flow_error_set(error, ENOTSUP,
1706                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1707                                           &rss->queue_num,
1708                                           "number of queues too large");
1709         if (rss->types & MLX5_RSS_HF_MASK)
1710                 return rte_flow_error_set(error, ENOTSUP,
1711                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1712                                           &rss->types,
1713                                           "some RSS protocols are not"
1714                                           " supported");
1715         if ((rss->types & (RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY)) &&
1716             !(rss->types & RTE_ETH_RSS_IP))
1717                 return rte_flow_error_set(error, EINVAL,
1718                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1719                                           "L3 partial RSS requested but L3 RSS"
1720                                           " type not specified");
1721         if ((rss->types & (RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY)) &&
1722             !(rss->types & (RTE_ETH_RSS_UDP | RTE_ETH_RSS_TCP)))
1723                 return rte_flow_error_set(error, EINVAL,
1724                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1725                                           "L4 partial RSS requested but L4 RSS"
1726                                           " type not specified");
1727         if (!priv->rxqs_n)
1728                 return rte_flow_error_set(error, EINVAL,
1729                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1730                                           NULL, "No Rx queues configured");
1731         if (!rss->queue_num)
1732                 return rte_flow_error_set(error, EINVAL,
1733                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1734                                           NULL, "No queues configured");
1735         ret = mlx5_validate_rss_queues(dev, rss->queue, rss->queue_num,
1736                                        &message, &queue_idx);
1737         if (ret != 0) {
1738                 return rte_flow_error_set(error, -ret,
1739                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1740                                           &rss->queue[queue_idx], message);
1741         }
1742         return 0;
1743 }
1744
1745 /*
1746  * Validate the rss action.
1747  *
1748  * @param[in] action
1749  *   Pointer to the queue action.
1750  * @param[in] action_flags
1751  *   Bit-fields that holds the actions detected until now.
1752  * @param[in] dev
1753  *   Pointer to the Ethernet device structure.
1754  * @param[in] attr
1755  *   Attributes of flow that includes this action.
1756  * @param[in] item_flags
1757  *   Items that were detected.
1758  * @param[out] error
1759  *   Pointer to error structure.
1760  *
1761  * @return
1762  *   0 on success, a negative errno value otherwise and rte_errno is set.
1763  */
1764 int
1765 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1766                               uint64_t action_flags,
1767                               struct rte_eth_dev *dev,
1768                               const struct rte_flow_attr *attr,
1769                               uint64_t item_flags,
1770                               struct rte_flow_error *error)
1771 {
1772         const struct rte_flow_action_rss *rss = action->conf;
1773         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1774         int ret;
1775
1776         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1777                 return rte_flow_error_set(error, EINVAL,
1778                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1779                                           "can't have 2 fate actions"
1780                                           " in same flow");
1781         ret = mlx5_validate_action_rss(dev, action, error);
1782         if (ret)
1783                 return ret;
1784         if (attr->egress)
1785                 return rte_flow_error_set(error, ENOTSUP,
1786                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1787                                           "rss action not supported for "
1788                                           "egress");
1789         if (rss->level > 1 && !tunnel)
1790                 return rte_flow_error_set(error, EINVAL,
1791                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1792                                           "inner RSS is not supported for "
1793                                           "non-tunnel flows");
1794         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1795             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1796                 return rte_flow_error_set(error, EINVAL,
1797                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1798                                           "RSS on eCPRI is not supported now");
1799         }
1800         if ((item_flags & MLX5_FLOW_LAYER_MPLS) &&
1801             !(item_flags &
1802               (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) &&
1803             rss->level > 1)
1804                 return rte_flow_error_set(error, EINVAL,
1805                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1806                                           "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern");
1807         return 0;
1808 }
1809
1810 /*
1811  * Validate the default miss action.
1812  *
1813  * @param[in] action_flags
1814  *   Bit-fields that holds the actions detected until now.
1815  * @param[out] error
1816  *   Pointer to error structure.
1817  *
1818  * @return
1819  *   0 on success, a negative errno value otherwise and rte_errno is set.
1820  */
1821 int
1822 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1823                                 const struct rte_flow_attr *attr,
1824                                 struct rte_flow_error *error)
1825 {
1826         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1827                 return rte_flow_error_set(error, EINVAL,
1828                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1829                                           "can't have 2 fate actions in"
1830                                           " same flow");
1831         if (attr->egress)
1832                 return rte_flow_error_set(error, ENOTSUP,
1833                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1834                                           "default miss action not supported "
1835                                           "for egress");
1836         if (attr->group)
1837                 return rte_flow_error_set(error, ENOTSUP,
1838                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1839                                           "only group 0 is supported");
1840         if (attr->transfer)
1841                 return rte_flow_error_set(error, ENOTSUP,
1842                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1843                                           NULL, "transfer is not supported");
1844         return 0;
1845 }
1846
1847 /*
1848  * Validate the count action.
1849  *
1850  * @param[in] dev
1851  *   Pointer to the Ethernet device structure.
1852  * @param[in] attr
1853  *   Attributes of flow that includes this action.
1854  * @param[out] error
1855  *   Pointer to error structure.
1856  *
1857  * @return
1858  *   0 on success, a negative errno value otherwise and rte_errno is set.
1859  */
1860 int
1861 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1862                                 const struct rte_flow_attr *attr,
1863                                 struct rte_flow_error *error)
1864 {
1865         if (attr->egress)
1866                 return rte_flow_error_set(error, ENOTSUP,
1867                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1868                                           "count action not supported for "
1869                                           "egress");
1870         return 0;
1871 }
1872
1873 /*
1874  * Validate the ASO CT action.
1875  *
1876  * @param[in] dev
1877  *   Pointer to the Ethernet device structure.
1878  * @param[in] conntrack
1879  *   Pointer to the CT action profile.
1880  * @param[out] error
1881  *   Pointer to error structure.
1882  *
1883  * @return
1884  *   0 on success, a negative errno value otherwise and rte_errno is set.
1885  */
1886 int
1887 mlx5_validate_action_ct(struct rte_eth_dev *dev,
1888                         const struct rte_flow_action_conntrack *conntrack,
1889                         struct rte_flow_error *error)
1890 {
1891         RTE_SET_USED(dev);
1892
1893         if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT)
1894                 return rte_flow_error_set(error, EINVAL,
1895                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1896                                           "Invalid CT state");
1897         if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST)
1898                 return rte_flow_error_set(error, EINVAL,
1899                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1900                                           "Invalid last TCP packet flag");
1901         return 0;
1902 }
1903
1904 /**
1905  * Verify the @p attributes will be correctly understood by the NIC and store
1906  * them in the @p flow if everything is correct.
1907  *
1908  * @param[in] dev
1909  *   Pointer to the Ethernet device structure.
1910  * @param[in] attributes
1911  *   Pointer to flow attributes
1912  * @param[out] error
1913  *   Pointer to error structure.
1914  *
1915  * @return
1916  *   0 on success, a negative errno value otherwise and rte_errno is set.
1917  */
1918 int
1919 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1920                               const struct rte_flow_attr *attributes,
1921                               struct rte_flow_error *error)
1922 {
1923         struct mlx5_priv *priv = dev->data->dev_private;
1924         uint32_t priority_max = priv->sh->flow_max_priority - 1;
1925
1926         if (attributes->group)
1927                 return rte_flow_error_set(error, ENOTSUP,
1928                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1929                                           NULL, "groups is not supported");
1930         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1931             attributes->priority >= priority_max)
1932                 return rte_flow_error_set(error, ENOTSUP,
1933                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1934                                           NULL, "priority out of range");
1935         if (attributes->egress)
1936                 return rte_flow_error_set(error, ENOTSUP,
1937                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1938                                           "egress is not supported");
1939         if (attributes->transfer && !priv->config.dv_esw_en)
1940                 return rte_flow_error_set(error, ENOTSUP,
1941                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1942                                           NULL, "transfer is not supported");
1943         if (!attributes->ingress)
1944                 return rte_flow_error_set(error, EINVAL,
1945                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1946                                           NULL,
1947                                           "ingress attribute is mandatory");
1948         return 0;
1949 }
1950
1951 /**
1952  * Validate ICMP6 item.
1953  *
1954  * @param[in] item
1955  *   Item specification.
1956  * @param[in] item_flags
1957  *   Bit-fields that holds the items detected until now.
1958  * @param[in] ext_vlan_sup
1959  *   Whether extended VLAN features are supported or not.
1960  * @param[out] error
1961  *   Pointer to error structure.
1962  *
1963  * @return
1964  *   0 on success, a negative errno value otherwise and rte_errno is set.
1965  */
1966 int
1967 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1968                                uint64_t item_flags,
1969                                uint8_t target_protocol,
1970                                struct rte_flow_error *error)
1971 {
1972         const struct rte_flow_item_icmp6 *mask = item->mask;
1973         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1974         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1975                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1976         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1977                                       MLX5_FLOW_LAYER_OUTER_L4;
1978         int ret;
1979
1980         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1981                 return rte_flow_error_set(error, EINVAL,
1982                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1983                                           "protocol filtering not compatible"
1984                                           " with ICMP6 layer");
1985         if (!(item_flags & l3m))
1986                 return rte_flow_error_set(error, EINVAL,
1987                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1988                                           "IPv6 is mandatory to filter on"
1989                                           " ICMP6");
1990         if (item_flags & l4m)
1991                 return rte_flow_error_set(error, EINVAL,
1992                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1993                                           "multiple L4 layers not supported");
1994         if (!mask)
1995                 mask = &rte_flow_item_icmp6_mask;
1996         ret = mlx5_flow_item_acceptable
1997                 (item, (const uint8_t *)mask,
1998                  (const uint8_t *)&rte_flow_item_icmp6_mask,
1999                  sizeof(struct rte_flow_item_icmp6),
2000                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2001         if (ret < 0)
2002                 return ret;
2003         return 0;
2004 }
2005
2006 /**
2007  * Validate ICMP item.
2008  *
2009  * @param[in] item
2010  *   Item specification.
2011  * @param[in] item_flags
2012  *   Bit-fields that holds the items detected until now.
2013  * @param[out] error
2014  *   Pointer to error structure.
2015  *
2016  * @return
2017  *   0 on success, a negative errno value otherwise and rte_errno is set.
2018  */
2019 int
2020 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
2021                              uint64_t item_flags,
2022                              uint8_t target_protocol,
2023                              struct rte_flow_error *error)
2024 {
2025         const struct rte_flow_item_icmp *mask = item->mask;
2026         const struct rte_flow_item_icmp nic_mask = {
2027                 .hdr.icmp_type = 0xff,
2028                 .hdr.icmp_code = 0xff,
2029                 .hdr.icmp_ident = RTE_BE16(0xffff),
2030                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
2031         };
2032         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2033         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
2034                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2035         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2036                                       MLX5_FLOW_LAYER_OUTER_L4;
2037         int ret;
2038
2039         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
2040                 return rte_flow_error_set(error, EINVAL,
2041                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2042                                           "protocol filtering not compatible"
2043                                           " with ICMP layer");
2044         if (!(item_flags & l3m))
2045                 return rte_flow_error_set(error, EINVAL,
2046                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2047                                           "IPv4 is mandatory to filter"
2048                                           " on ICMP");
2049         if (item_flags & l4m)
2050                 return rte_flow_error_set(error, EINVAL,
2051                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2052                                           "multiple L4 layers not supported");
2053         if (!mask)
2054                 mask = &nic_mask;
2055         ret = mlx5_flow_item_acceptable
2056                 (item, (const uint8_t *)mask,
2057                  (const uint8_t *)&nic_mask,
2058                  sizeof(struct rte_flow_item_icmp),
2059                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2060         if (ret < 0)
2061                 return ret;
2062         return 0;
2063 }
2064
2065 /**
2066  * Validate Ethernet item.
2067  *
2068  * @param[in] item
2069  *   Item specification.
2070  * @param[in] item_flags
2071  *   Bit-fields that holds the items detected until now.
2072  * @param[out] error
2073  *   Pointer to error structure.
2074  *
2075  * @return
2076  *   0 on success, a negative errno value otherwise and rte_errno is set.
2077  */
2078 int
2079 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
2080                             uint64_t item_flags, bool ext_vlan_sup,
2081                             struct rte_flow_error *error)
2082 {
2083         const struct rte_flow_item_eth *mask = item->mask;
2084         const struct rte_flow_item_eth nic_mask = {
2085                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2086                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2087                 .type = RTE_BE16(0xffff),
2088                 .has_vlan = ext_vlan_sup ? 1 : 0,
2089         };
2090         int ret;
2091         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2092         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
2093                                        MLX5_FLOW_LAYER_OUTER_L2;
2094
2095         if (item_flags & ethm)
2096                 return rte_flow_error_set(error, ENOTSUP,
2097                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2098                                           "multiple L2 layers not supported");
2099         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
2100             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
2101                 return rte_flow_error_set(error, EINVAL,
2102                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2103                                           "L2 layer should not follow "
2104                                           "L3 layers");
2105         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
2106             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
2107                 return rte_flow_error_set(error, EINVAL,
2108                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2109                                           "L2 layer should not follow VLAN");
2110         if (item_flags & MLX5_FLOW_LAYER_GTP)
2111                 return rte_flow_error_set(error, EINVAL,
2112                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2113                                           "L2 layer should not follow GTP");
2114         if (!mask)
2115                 mask = &rte_flow_item_eth_mask;
2116         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2117                                         (const uint8_t *)&nic_mask,
2118                                         sizeof(struct rte_flow_item_eth),
2119                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2120         return ret;
2121 }
2122
2123 /**
2124  * Validate VLAN item.
2125  *
2126  * @param[in] item
2127  *   Item specification.
2128  * @param[in] item_flags
2129  *   Bit-fields that holds the items detected until now.
2130  * @param[in] dev
2131  *   Ethernet device flow is being created on.
2132  * @param[out] error
2133  *   Pointer to error structure.
2134  *
2135  * @return
2136  *   0 on success, a negative errno value otherwise and rte_errno is set.
2137  */
2138 int
2139 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
2140                              uint64_t item_flags,
2141                              struct rte_eth_dev *dev,
2142                              struct rte_flow_error *error)
2143 {
2144         const struct rte_flow_item_vlan *spec = item->spec;
2145         const struct rte_flow_item_vlan *mask = item->mask;
2146         const struct rte_flow_item_vlan nic_mask = {
2147                 .tci = RTE_BE16(UINT16_MAX),
2148                 .inner_type = RTE_BE16(UINT16_MAX),
2149         };
2150         uint16_t vlan_tag = 0;
2151         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2152         int ret;
2153         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2154                                         MLX5_FLOW_LAYER_INNER_L4) :
2155                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2156                                         MLX5_FLOW_LAYER_OUTER_L4);
2157         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2158                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2159
2160         if (item_flags & vlanm)
2161                 return rte_flow_error_set(error, EINVAL,
2162                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2163                                           "multiple VLAN layers not supported");
2164         else if ((item_flags & l34m) != 0)
2165                 return rte_flow_error_set(error, EINVAL,
2166                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2167                                           "VLAN cannot follow L3/L4 layer");
2168         if (!mask)
2169                 mask = &rte_flow_item_vlan_mask;
2170         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2171                                         (const uint8_t *)&nic_mask,
2172                                         sizeof(struct rte_flow_item_vlan),
2173                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2174         if (ret)
2175                 return ret;
2176         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2177                 struct mlx5_priv *priv = dev->data->dev_private;
2178
2179                 if (priv->vmwa_context) {
2180                         /*
2181                          * Non-NULL context means we have a virtual machine
2182                          * and SR-IOV enabled, we have to create VLAN interface
2183                          * to make hypervisor to setup E-Switch vport
2184                          * context correctly. We avoid creating the multiple
2185                          * VLAN interfaces, so we cannot support VLAN tag mask.
2186                          */
2187                         return rte_flow_error_set(error, EINVAL,
2188                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2189                                                   item,
2190                                                   "VLAN tag mask is not"
2191                                                   " supported in virtual"
2192                                                   " environment");
2193                 }
2194         }
2195         if (spec) {
2196                 vlan_tag = spec->tci;
2197                 vlan_tag &= mask->tci;
2198         }
2199         /*
2200          * From verbs perspective an empty VLAN is equivalent
2201          * to a packet without VLAN layer.
2202          */
2203         if (!vlan_tag)
2204                 return rte_flow_error_set(error, EINVAL,
2205                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2206                                           item->spec,
2207                                           "VLAN cannot be empty");
2208         return 0;
2209 }
2210
2211 /**
2212  * Validate IPV4 item.
2213  *
2214  * @param[in] item
2215  *   Item specification.
2216  * @param[in] item_flags
2217  *   Bit-fields that holds the items detected until now.
2218  * @param[in] last_item
2219  *   Previous validated item in the pattern items.
2220  * @param[in] ether_type
2221  *   Type in the ethernet layer header (including dot1q).
2222  * @param[in] acc_mask
2223  *   Acceptable mask, if NULL default internal default mask
2224  *   will be used to check whether item fields are supported.
2225  * @param[in] range_accepted
2226  *   True if range of values is accepted for specific fields, false otherwise.
2227  * @param[out] error
2228  *   Pointer to error structure.
2229  *
2230  * @return
2231  *   0 on success, a negative errno value otherwise and rte_errno is set.
2232  */
2233 int
2234 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2235                              uint64_t item_flags,
2236                              uint64_t last_item,
2237                              uint16_t ether_type,
2238                              const struct rte_flow_item_ipv4 *acc_mask,
2239                              bool range_accepted,
2240                              struct rte_flow_error *error)
2241 {
2242         const struct rte_flow_item_ipv4 *mask = item->mask;
2243         const struct rte_flow_item_ipv4 *spec = item->spec;
2244         const struct rte_flow_item_ipv4 nic_mask = {
2245                 .hdr = {
2246                         .src_addr = RTE_BE32(0xffffffff),
2247                         .dst_addr = RTE_BE32(0xffffffff),
2248                         .type_of_service = 0xff,
2249                         .next_proto_id = 0xff,
2250                 },
2251         };
2252         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2253         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2254                                       MLX5_FLOW_LAYER_OUTER_L3;
2255         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2256                                       MLX5_FLOW_LAYER_OUTER_L4;
2257         int ret;
2258         uint8_t next_proto = 0xFF;
2259         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2260                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2261                                   MLX5_FLOW_LAYER_INNER_VLAN);
2262
2263         if ((last_item & l2_vlan) && ether_type &&
2264             ether_type != RTE_ETHER_TYPE_IPV4)
2265                 return rte_flow_error_set(error, EINVAL,
2266                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2267                                           "IPv4 cannot follow L2/VLAN layer "
2268                                           "which ether type is not IPv4");
2269         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2270                 if (mask && spec)
2271                         next_proto = mask->hdr.next_proto_id &
2272                                      spec->hdr.next_proto_id;
2273                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2274                         return rte_flow_error_set(error, EINVAL,
2275                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2276                                                   item,
2277                                                   "multiple tunnel "
2278                                                   "not supported");
2279         }
2280         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2281                 return rte_flow_error_set(error, EINVAL,
2282                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2283                                           "wrong tunnel type - IPv6 specified "
2284                                           "but IPv4 item provided");
2285         if (item_flags & l3m)
2286                 return rte_flow_error_set(error, ENOTSUP,
2287                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2288                                           "multiple L3 layers not supported");
2289         else if (item_flags & l4m)
2290                 return rte_flow_error_set(error, EINVAL,
2291                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2292                                           "L3 cannot follow an L4 layer.");
2293         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2294                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2295                 return rte_flow_error_set(error, EINVAL,
2296                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2297                                           "L3 cannot follow an NVGRE layer.");
2298         if (!mask)
2299                 mask = &rte_flow_item_ipv4_mask;
2300         else if (mask->hdr.next_proto_id != 0 &&
2301                  mask->hdr.next_proto_id != 0xff)
2302                 return rte_flow_error_set(error, EINVAL,
2303                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2304                                           "partial mask is not supported"
2305                                           " for protocol");
2306         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2307                                         acc_mask ? (const uint8_t *)acc_mask
2308                                                  : (const uint8_t *)&nic_mask,
2309                                         sizeof(struct rte_flow_item_ipv4),
2310                                         range_accepted, error);
2311         if (ret < 0)
2312                 return ret;
2313         return 0;
2314 }
2315
2316 /**
2317  * Validate IPV6 item.
2318  *
2319  * @param[in] item
2320  *   Item specification.
2321  * @param[in] item_flags
2322  *   Bit-fields that holds the items detected until now.
2323  * @param[in] last_item
2324  *   Previous validated item in the pattern items.
2325  * @param[in] ether_type
2326  *   Type in the ethernet layer header (including dot1q).
2327  * @param[in] acc_mask
2328  *   Acceptable mask, if NULL default internal default mask
2329  *   will be used to check whether item fields are supported.
2330  * @param[out] error
2331  *   Pointer to error structure.
2332  *
2333  * @return
2334  *   0 on success, a negative errno value otherwise and rte_errno is set.
2335  */
2336 int
2337 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2338                              uint64_t item_flags,
2339                              uint64_t last_item,
2340                              uint16_t ether_type,
2341                              const struct rte_flow_item_ipv6 *acc_mask,
2342                              struct rte_flow_error *error)
2343 {
2344         const struct rte_flow_item_ipv6 *mask = item->mask;
2345         const struct rte_flow_item_ipv6 *spec = item->spec;
2346         const struct rte_flow_item_ipv6 nic_mask = {
2347                 .hdr = {
2348                         .src_addr =
2349                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2350                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2351                         .dst_addr =
2352                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2353                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2354                         .vtc_flow = RTE_BE32(0xffffffff),
2355                         .proto = 0xff,
2356                 },
2357         };
2358         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2359         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2360                                       MLX5_FLOW_LAYER_OUTER_L3;
2361         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2362                                       MLX5_FLOW_LAYER_OUTER_L4;
2363         int ret;
2364         uint8_t next_proto = 0xFF;
2365         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2366                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2367                                   MLX5_FLOW_LAYER_INNER_VLAN);
2368
2369         if ((last_item & l2_vlan) && ether_type &&
2370             ether_type != RTE_ETHER_TYPE_IPV6)
2371                 return rte_flow_error_set(error, EINVAL,
2372                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2373                                           "IPv6 cannot follow L2/VLAN layer "
2374                                           "which ether type is not IPv6");
2375         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2376                 next_proto = spec->hdr.proto;
2377         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2378                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2379                         return rte_flow_error_set(error, EINVAL,
2380                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2381                                                   item,
2382                                                   "multiple tunnel "
2383                                                   "not supported");
2384         }
2385         if (next_proto == IPPROTO_HOPOPTS  ||
2386             next_proto == IPPROTO_ROUTING  ||
2387             next_proto == IPPROTO_FRAGMENT ||
2388             next_proto == IPPROTO_ESP      ||
2389             next_proto == IPPROTO_AH       ||
2390             next_proto == IPPROTO_DSTOPTS)
2391                 return rte_flow_error_set(error, EINVAL,
2392                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2393                                           "IPv6 proto (next header) should "
2394                                           "not be set as extension header");
2395         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2396                 return rte_flow_error_set(error, EINVAL,
2397                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2398                                           "wrong tunnel type - IPv4 specified "
2399                                           "but IPv6 item provided");
2400         if (item_flags & l3m)
2401                 return rte_flow_error_set(error, ENOTSUP,
2402                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2403                                           "multiple L3 layers not supported");
2404         else if (item_flags & l4m)
2405                 return rte_flow_error_set(error, EINVAL,
2406                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2407                                           "L3 cannot follow an L4 layer.");
2408         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2409                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2410                 return rte_flow_error_set(error, EINVAL,
2411                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2412                                           "L3 cannot follow an NVGRE layer.");
2413         if (!mask)
2414                 mask = &rte_flow_item_ipv6_mask;
2415         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2416                                         acc_mask ? (const uint8_t *)acc_mask
2417                                                  : (const uint8_t *)&nic_mask,
2418                                         sizeof(struct rte_flow_item_ipv6),
2419                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2420         if (ret < 0)
2421                 return ret;
2422         return 0;
2423 }
2424
2425 /**
2426  * Validate UDP item.
2427  *
2428  * @param[in] item
2429  *   Item specification.
2430  * @param[in] item_flags
2431  *   Bit-fields that holds the items detected until now.
2432  * @param[in] target_protocol
2433  *   The next protocol in the previous item.
2434  * @param[in] flow_mask
2435  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2436  * @param[out] error
2437  *   Pointer to error structure.
2438  *
2439  * @return
2440  *   0 on success, a negative errno value otherwise and rte_errno is set.
2441  */
2442 int
2443 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2444                             uint64_t item_flags,
2445                             uint8_t target_protocol,
2446                             struct rte_flow_error *error)
2447 {
2448         const struct rte_flow_item_udp *mask = item->mask;
2449         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2450         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2451                                       MLX5_FLOW_LAYER_OUTER_L3;
2452         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2453                                       MLX5_FLOW_LAYER_OUTER_L4;
2454         int ret;
2455
2456         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2457                 return rte_flow_error_set(error, EINVAL,
2458                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2459                                           "protocol filtering not compatible"
2460                                           " with UDP layer");
2461         if (!(item_flags & l3m))
2462                 return rte_flow_error_set(error, EINVAL,
2463                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2464                                           "L3 is mandatory to filter on L4");
2465         if (item_flags & l4m)
2466                 return rte_flow_error_set(error, EINVAL,
2467                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2468                                           "multiple L4 layers not supported");
2469         if (!mask)
2470                 mask = &rte_flow_item_udp_mask;
2471         ret = mlx5_flow_item_acceptable
2472                 (item, (const uint8_t *)mask,
2473                  (const uint8_t *)&rte_flow_item_udp_mask,
2474                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2475                  error);
2476         if (ret < 0)
2477                 return ret;
2478         return 0;
2479 }
2480
2481 /**
2482  * Validate TCP item.
2483  *
2484  * @param[in] item
2485  *   Item specification.
2486  * @param[in] item_flags
2487  *   Bit-fields that holds the items detected until now.
2488  * @param[in] target_protocol
2489  *   The next protocol in the previous item.
2490  * @param[out] error
2491  *   Pointer to error structure.
2492  *
2493  * @return
2494  *   0 on success, a negative errno value otherwise and rte_errno is set.
2495  */
2496 int
2497 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2498                             uint64_t item_flags,
2499                             uint8_t target_protocol,
2500                             const struct rte_flow_item_tcp *flow_mask,
2501                             struct rte_flow_error *error)
2502 {
2503         const struct rte_flow_item_tcp *mask = item->mask;
2504         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2505         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2506                                       MLX5_FLOW_LAYER_OUTER_L3;
2507         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2508                                       MLX5_FLOW_LAYER_OUTER_L4;
2509         int ret;
2510
2511         MLX5_ASSERT(flow_mask);
2512         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2513                 return rte_flow_error_set(error, EINVAL,
2514                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2515                                           "protocol filtering not compatible"
2516                                           " with TCP layer");
2517         if (!(item_flags & l3m))
2518                 return rte_flow_error_set(error, EINVAL,
2519                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2520                                           "L3 is mandatory to filter on L4");
2521         if (item_flags & l4m)
2522                 return rte_flow_error_set(error, EINVAL,
2523                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2524                                           "multiple L4 layers not supported");
2525         if (!mask)
2526                 mask = &rte_flow_item_tcp_mask;
2527         ret = mlx5_flow_item_acceptable
2528                 (item, (const uint8_t *)mask,
2529                  (const uint8_t *)flow_mask,
2530                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2531                  error);
2532         if (ret < 0)
2533                 return ret;
2534         return 0;
2535 }
2536
2537 /**
2538  * Validate VXLAN item.
2539  *
2540  * @param[in] dev
2541  *   Pointer to the Ethernet device structure.
2542  * @param[in] udp_dport
2543  *   UDP destination port
2544  * @param[in] item
2545  *   Item specification.
2546  * @param[in] item_flags
2547  *   Bit-fields that holds the items detected until now.
2548  * @param[in] attr
2549  *   Flow rule attributes.
2550  * @param[out] error
2551  *   Pointer to error structure.
2552  *
2553  * @return
2554  *   0 on success, a negative errno value otherwise and rte_errno is set.
2555  */
2556 int
2557 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev,
2558                               uint16_t udp_dport,
2559                               const struct rte_flow_item *item,
2560                               uint64_t item_flags,
2561                               const struct rte_flow_attr *attr,
2562                               struct rte_flow_error *error)
2563 {
2564         const struct rte_flow_item_vxlan *spec = item->spec;
2565         const struct rte_flow_item_vxlan *mask = item->mask;
2566         int ret;
2567         struct mlx5_priv *priv = dev->data->dev_private;
2568         union vni {
2569                 uint32_t vlan_id;
2570                 uint8_t vni[4];
2571         } id = { .vlan_id = 0, };
2572         const struct rte_flow_item_vxlan nic_mask = {
2573                 .vni = "\xff\xff\xff",
2574                 .rsvd1 = 0xff,
2575         };
2576         const struct rte_flow_item_vxlan *valid_mask;
2577
2578         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2579                 return rte_flow_error_set(error, ENOTSUP,
2580                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2581                                           "multiple tunnel layers not"
2582                                           " supported");
2583         valid_mask = &rte_flow_item_vxlan_mask;
2584         /*
2585          * Verify only UDPv4 is present as defined in
2586          * https://tools.ietf.org/html/rfc7348
2587          */
2588         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2589                 return rte_flow_error_set(error, EINVAL,
2590                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2591                                           "no outer UDP layer found");
2592         if (!mask)
2593                 mask = &rte_flow_item_vxlan_mask;
2594
2595         if (priv->sh->steering_format_version !=
2596             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 ||
2597             !udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN) {
2598                 /* FDB domain & NIC domain non-zero group */
2599                 if ((attr->transfer || attr->group) && priv->sh->misc5_cap)
2600                         valid_mask = &nic_mask;
2601                 /* Group zero in NIC domain */
2602                 if (!attr->group && !attr->transfer &&
2603                     priv->sh->tunnel_header_0_1)
2604                         valid_mask = &nic_mask;
2605         }
2606         ret = mlx5_flow_item_acceptable
2607                 (item, (const uint8_t *)mask,
2608                  (const uint8_t *)valid_mask,
2609                  sizeof(struct rte_flow_item_vxlan),
2610                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2611         if (ret < 0)
2612                 return ret;
2613         if (spec) {
2614                 memcpy(&id.vni[1], spec->vni, 3);
2615                 memcpy(&id.vni[1], mask->vni, 3);
2616         }
2617         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2618                 return rte_flow_error_set(error, ENOTSUP,
2619                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2620                                           "VXLAN tunnel must be fully defined");
2621         return 0;
2622 }
2623
2624 /**
2625  * Validate VXLAN_GPE item.
2626  *
2627  * @param[in] item
2628  *   Item specification.
2629  * @param[in] item_flags
2630  *   Bit-fields that holds the items detected until now.
2631  * @param[in] priv
2632  *   Pointer to the private data structure.
2633  * @param[in] target_protocol
2634  *   The next protocol in the previous item.
2635  * @param[out] error
2636  *   Pointer to error structure.
2637  *
2638  * @return
2639  *   0 on success, a negative errno value otherwise and rte_errno is set.
2640  */
2641 int
2642 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2643                                   uint64_t item_flags,
2644                                   struct rte_eth_dev *dev,
2645                                   struct rte_flow_error *error)
2646 {
2647         struct mlx5_priv *priv = dev->data->dev_private;
2648         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2649         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2650         int ret;
2651         union vni {
2652                 uint32_t vlan_id;
2653                 uint8_t vni[4];
2654         } id = { .vlan_id = 0, };
2655
2656         if (!priv->config.l3_vxlan_en)
2657                 return rte_flow_error_set(error, ENOTSUP,
2658                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2659                                           "L3 VXLAN is not enabled by device"
2660                                           " parameter and/or not configured in"
2661                                           " firmware");
2662         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2663                 return rte_flow_error_set(error, ENOTSUP,
2664                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2665                                           "multiple tunnel layers not"
2666                                           " supported");
2667         /*
2668          * Verify only UDPv4 is present as defined in
2669          * https://tools.ietf.org/html/rfc7348
2670          */
2671         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2672                 return rte_flow_error_set(error, EINVAL,
2673                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2674                                           "no outer UDP layer found");
2675         if (!mask)
2676                 mask = &rte_flow_item_vxlan_gpe_mask;
2677         ret = mlx5_flow_item_acceptable
2678                 (item, (const uint8_t *)mask,
2679                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2680                  sizeof(struct rte_flow_item_vxlan_gpe),
2681                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2682         if (ret < 0)
2683                 return ret;
2684         if (spec) {
2685                 if (spec->protocol)
2686                         return rte_flow_error_set(error, ENOTSUP,
2687                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2688                                                   item,
2689                                                   "VxLAN-GPE protocol"
2690                                                   " not supported");
2691                 memcpy(&id.vni[1], spec->vni, 3);
2692                 memcpy(&id.vni[1], mask->vni, 3);
2693         }
2694         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2695                 return rte_flow_error_set(error, ENOTSUP,
2696                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2697                                           "VXLAN-GPE tunnel must be fully"
2698                                           " defined");
2699         return 0;
2700 }
2701 /**
2702  * Validate GRE Key item.
2703  *
2704  * @param[in] item
2705  *   Item specification.
2706  * @param[in] item_flags
2707  *   Bit flags to mark detected items.
2708  * @param[in] gre_item
2709  *   Pointer to gre_item
2710  * @param[out] error
2711  *   Pointer to error structure.
2712  *
2713  * @return
2714  *   0 on success, a negative errno value otherwise and rte_errno is set.
2715  */
2716 int
2717 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2718                                 uint64_t item_flags,
2719                                 const struct rte_flow_item *gre_item,
2720                                 struct rte_flow_error *error)
2721 {
2722         const rte_be32_t *mask = item->mask;
2723         int ret = 0;
2724         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2725         const struct rte_flow_item_gre *gre_spec;
2726         const struct rte_flow_item_gre *gre_mask;
2727
2728         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2729                 return rte_flow_error_set(error, ENOTSUP,
2730                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2731                                           "Multiple GRE key not support");
2732         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2733                 return rte_flow_error_set(error, ENOTSUP,
2734                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2735                                           "No preceding GRE header");
2736         if (item_flags & MLX5_FLOW_LAYER_INNER)
2737                 return rte_flow_error_set(error, ENOTSUP,
2738                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2739                                           "GRE key following a wrong item");
2740         gre_mask = gre_item->mask;
2741         if (!gre_mask)
2742                 gre_mask = &rte_flow_item_gre_mask;
2743         gre_spec = gre_item->spec;
2744         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2745                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2746                 return rte_flow_error_set(error, EINVAL,
2747                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2748                                           "Key bit must be on");
2749
2750         if (!mask)
2751                 mask = &gre_key_default_mask;
2752         ret = mlx5_flow_item_acceptable
2753                 (item, (const uint8_t *)mask,
2754                  (const uint8_t *)&gre_key_default_mask,
2755                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2756         return ret;
2757 }
2758
2759 /**
2760  * Validate GRE item.
2761  *
2762  * @param[in] item
2763  *   Item specification.
2764  * @param[in] item_flags
2765  *   Bit flags to mark detected items.
2766  * @param[in] target_protocol
2767  *   The next protocol in the previous item.
2768  * @param[out] error
2769  *   Pointer to error structure.
2770  *
2771  * @return
2772  *   0 on success, a negative errno value otherwise and rte_errno is set.
2773  */
2774 int
2775 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2776                             uint64_t item_flags,
2777                             uint8_t target_protocol,
2778                             struct rte_flow_error *error)
2779 {
2780         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2781         const struct rte_flow_item_gre *mask = item->mask;
2782         int ret;
2783         const struct rte_flow_item_gre nic_mask = {
2784                 .c_rsvd0_ver = RTE_BE16(0xB000),
2785                 .protocol = RTE_BE16(UINT16_MAX),
2786         };
2787
2788         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2789                 return rte_flow_error_set(error, EINVAL,
2790                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2791                                           "protocol filtering not compatible"
2792                                           " with this GRE layer");
2793         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2794                 return rte_flow_error_set(error, ENOTSUP,
2795                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2796                                           "multiple tunnel layers not"
2797                                           " supported");
2798         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2799                 return rte_flow_error_set(error, ENOTSUP,
2800                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2801                                           "L3 Layer is missing");
2802         if (!mask)
2803                 mask = &rte_flow_item_gre_mask;
2804         ret = mlx5_flow_item_acceptable
2805                 (item, (const uint8_t *)mask,
2806                  (const uint8_t *)&nic_mask,
2807                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2808                  error);
2809         if (ret < 0)
2810                 return ret;
2811 #ifndef HAVE_MLX5DV_DR
2812 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2813         if (spec && (spec->protocol & mask->protocol))
2814                 return rte_flow_error_set(error, ENOTSUP,
2815                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2816                                           "without MPLS support the"
2817                                           " specification cannot be used for"
2818                                           " filtering");
2819 #endif
2820 #endif
2821         return 0;
2822 }
2823
2824 /**
2825  * Validate Geneve item.
2826  *
2827  * @param[in] item
2828  *   Item specification.
2829  * @param[in] itemFlags
2830  *   Bit-fields that holds the items detected until now.
2831  * @param[in] enPriv
2832  *   Pointer to the private data structure.
2833  * @param[out] error
2834  *   Pointer to error structure.
2835  *
2836  * @return
2837  *   0 on success, a negative errno value otherwise and rte_errno is set.
2838  */
2839
2840 int
2841 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2842                                uint64_t item_flags,
2843                                struct rte_eth_dev *dev,
2844                                struct rte_flow_error *error)
2845 {
2846         struct mlx5_priv *priv = dev->data->dev_private;
2847         const struct rte_flow_item_geneve *spec = item->spec;
2848         const struct rte_flow_item_geneve *mask = item->mask;
2849         int ret;
2850         uint16_t gbhdr;
2851         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2852                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2853         const struct rte_flow_item_geneve nic_mask = {
2854                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2855                 .vni = "\xff\xff\xff",
2856                 .protocol = RTE_BE16(UINT16_MAX),
2857         };
2858
2859         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2860                 return rte_flow_error_set(error, ENOTSUP,
2861                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2862                                           "L3 Geneve is not enabled by device"
2863                                           " parameter and/or not configured in"
2864                                           " firmware");
2865         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2866                 return rte_flow_error_set(error, ENOTSUP,
2867                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2868                                           "multiple tunnel layers not"
2869                                           " supported");
2870         /*
2871          * Verify only UDPv4 is present as defined in
2872          * https://tools.ietf.org/html/rfc7348
2873          */
2874         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2875                 return rte_flow_error_set(error, EINVAL,
2876                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2877                                           "no outer UDP layer found");
2878         if (!mask)
2879                 mask = &rte_flow_item_geneve_mask;
2880         ret = mlx5_flow_item_acceptable
2881                                   (item, (const uint8_t *)mask,
2882                                    (const uint8_t *)&nic_mask,
2883                                    sizeof(struct rte_flow_item_geneve),
2884                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2885         if (ret)
2886                 return ret;
2887         if (spec) {
2888                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2889                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2890                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2891                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2892                         return rte_flow_error_set(error, ENOTSUP,
2893                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2894                                                   item,
2895                                                   "Geneve protocol unsupported"
2896                                                   " fields are being used");
2897                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2898                         return rte_flow_error_set
2899                                         (error, ENOTSUP,
2900                                          RTE_FLOW_ERROR_TYPE_ITEM,
2901                                          item,
2902                                          "Unsupported Geneve options length");
2903         }
2904         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2905                 return rte_flow_error_set
2906                                     (error, ENOTSUP,
2907                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2908                                      "Geneve tunnel must be fully defined");
2909         return 0;
2910 }
2911
2912 /**
2913  * Validate Geneve TLV option item.
2914  *
2915  * @param[in] item
2916  *   Item specification.
2917  * @param[in] last_item
2918  *   Previous validated item in the pattern items.
2919  * @param[in] geneve_item
2920  *   Previous GENEVE item specification.
2921  * @param[in] dev
2922  *   Pointer to the rte_eth_dev structure.
2923  * @param[out] error
2924  *   Pointer to error structure.
2925  *
2926  * @return
2927  *   0 on success, a negative errno value otherwise and rte_errno is set.
2928  */
2929 int
2930 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2931                                    uint64_t last_item,
2932                                    const struct rte_flow_item *geneve_item,
2933                                    struct rte_eth_dev *dev,
2934                                    struct rte_flow_error *error)
2935 {
2936         struct mlx5_priv *priv = dev->data->dev_private;
2937         struct mlx5_dev_ctx_shared *sh = priv->sh;
2938         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2939         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2940         uint8_t data_max_supported =
2941                         hca_attr->max_geneve_tlv_option_data_len * 4;
2942         struct mlx5_dev_config *config = &priv->config;
2943         const struct rte_flow_item_geneve *geneve_spec;
2944         const struct rte_flow_item_geneve *geneve_mask;
2945         const struct rte_flow_item_geneve_opt *spec = item->spec;
2946         const struct rte_flow_item_geneve_opt *mask = item->mask;
2947         unsigned int i;
2948         unsigned int data_len;
2949         uint8_t tlv_option_len;
2950         uint16_t optlen_m, optlen_v;
2951         const struct rte_flow_item_geneve_opt full_mask = {
2952                 .option_class = RTE_BE16(0xffff),
2953                 .option_type = 0xff,
2954                 .option_len = 0x1f,
2955         };
2956
2957         if (!mask)
2958                 mask = &rte_flow_item_geneve_opt_mask;
2959         if (!spec)
2960                 return rte_flow_error_set
2961                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2962                         "Geneve TLV opt class/type/length must be specified");
2963         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
2964                 return rte_flow_error_set
2965                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2966                         "Geneve TLV opt length exceeeds the limit (31)");
2967         /* Check if class type and length masks are full. */
2968         if (full_mask.option_class != mask->option_class ||
2969             full_mask.option_type != mask->option_type ||
2970             full_mask.option_len != (mask->option_len & full_mask.option_len))
2971                 return rte_flow_error_set
2972                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2973                         "Geneve TLV opt class/type/length masks must be full");
2974         /* Check if length is supported */
2975         if ((uint32_t)spec->option_len >
2976                         config->hca_attr.max_geneve_tlv_option_data_len)
2977                 return rte_flow_error_set
2978                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2979                         "Geneve TLV opt length not supported");
2980         if (config->hca_attr.max_geneve_tlv_options > 1)
2981                 DRV_LOG(DEBUG,
2982                         "max_geneve_tlv_options supports more than 1 option");
2983         /* Check GENEVE item preceding. */
2984         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
2985                 return rte_flow_error_set
2986                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2987                         "Geneve opt item must be preceded with Geneve item");
2988         geneve_spec = geneve_item->spec;
2989         geneve_mask = geneve_item->mask ? geneve_item->mask :
2990                                           &rte_flow_item_geneve_mask;
2991         /* Check if GENEVE TLV option size doesn't exceed option length */
2992         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
2993                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
2994                 tlv_option_len = spec->option_len & mask->option_len;
2995                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
2996                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
2997                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
2998                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
2999                 if ((optlen_v & optlen_m) <= tlv_option_len)
3000                         return rte_flow_error_set
3001                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3002                                  "GENEVE TLV option length exceeds optlen");
3003         }
3004         /* Check if length is 0 or data is 0. */
3005         if (spec->data == NULL || spec->option_len == 0)
3006                 return rte_flow_error_set
3007                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3008                         "Geneve TLV opt with zero data/length not supported");
3009         /* Check not all data & mask are 0. */
3010         data_len = spec->option_len * 4;
3011         if (mask->data == NULL) {
3012                 for (i = 0; i < data_len; i++)
3013                         if (spec->data[i])
3014                                 break;
3015                 if (i == data_len)
3016                         return rte_flow_error_set(error, ENOTSUP,
3017                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3018                                 "Can't match on Geneve option data 0");
3019         } else {
3020                 for (i = 0; i < data_len; i++)
3021                         if (spec->data[i] & mask->data[i])
3022                                 break;
3023                 if (i == data_len)
3024                         return rte_flow_error_set(error, ENOTSUP,
3025                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3026                                 "Can't match on Geneve option data and mask 0");
3027                 /* Check data mask supported. */
3028                 for (i = data_max_supported; i < data_len ; i++)
3029                         if (mask->data[i])
3030                                 return rte_flow_error_set(error, ENOTSUP,
3031                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
3032                                         "Data mask is of unsupported size");
3033         }
3034         /* Check GENEVE option is supported in NIC. */
3035         if (!config->hca_attr.geneve_tlv_opt)
3036                 return rte_flow_error_set
3037                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3038                         "Geneve TLV opt not supported");
3039         /* Check if we already have geneve option with different type/class. */
3040         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
3041         geneve_opt_resource = sh->geneve_tlv_option_resource;
3042         if (geneve_opt_resource != NULL)
3043                 if (geneve_opt_resource->option_class != spec->option_class ||
3044                     geneve_opt_resource->option_type != spec->option_type ||
3045                     geneve_opt_resource->length != spec->option_len) {
3046                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3047                         return rte_flow_error_set(error, ENOTSUP,
3048                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3049                                 "Only one Geneve TLV option supported");
3050                 }
3051         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3052         return 0;
3053 }
3054
3055 /**
3056  * Validate MPLS item.
3057  *
3058  * @param[in] dev
3059  *   Pointer to the rte_eth_dev structure.
3060  * @param[in] item
3061  *   Item specification.
3062  * @param[in] item_flags
3063  *   Bit-fields that holds the items detected until now.
3064  * @param[in] prev_layer
3065  *   The protocol layer indicated in previous item.
3066  * @param[out] error
3067  *   Pointer to error structure.
3068  *
3069  * @return
3070  *   0 on success, a negative errno value otherwise and rte_errno is set.
3071  */
3072 int
3073 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
3074                              const struct rte_flow_item *item __rte_unused,
3075                              uint64_t item_flags __rte_unused,
3076                              uint64_t prev_layer __rte_unused,
3077                              struct rte_flow_error *error)
3078 {
3079 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
3080         const struct rte_flow_item_mpls *mask = item->mask;
3081         struct mlx5_priv *priv = dev->data->dev_private;
3082         int ret;
3083
3084         if (!priv->config.mpls_en)
3085                 return rte_flow_error_set(error, ENOTSUP,
3086                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3087                                           "MPLS not supported or"
3088                                           " disabled in firmware"
3089                                           " configuration.");
3090         /* MPLS over UDP, GRE is allowed */
3091         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |
3092                             MLX5_FLOW_LAYER_GRE |
3093                             MLX5_FLOW_LAYER_GRE_KEY)))
3094                 return rte_flow_error_set(error, EINVAL,
3095                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3096                                           "protocol filtering not compatible"
3097                                           " with MPLS layer");
3098         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
3099         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
3100             !(item_flags & MLX5_FLOW_LAYER_GRE))
3101                 return rte_flow_error_set(error, ENOTSUP,
3102                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3103                                           "multiple tunnel layers not"
3104                                           " supported");
3105         if (!mask)
3106                 mask = &rte_flow_item_mpls_mask;
3107         ret = mlx5_flow_item_acceptable
3108                 (item, (const uint8_t *)mask,
3109                  (const uint8_t *)&rte_flow_item_mpls_mask,
3110                  sizeof(struct rte_flow_item_mpls),
3111                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3112         if (ret < 0)
3113                 return ret;
3114         return 0;
3115 #else
3116         return rte_flow_error_set(error, ENOTSUP,
3117                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
3118                                   "MPLS is not supported by Verbs, please"
3119                                   " update.");
3120 #endif
3121 }
3122
3123 /**
3124  * Validate NVGRE item.
3125  *
3126  * @param[in] item
3127  *   Item specification.
3128  * @param[in] item_flags
3129  *   Bit flags to mark detected items.
3130  * @param[in] target_protocol
3131  *   The next protocol in the previous item.
3132  * @param[out] error
3133  *   Pointer to error structure.
3134  *
3135  * @return
3136  *   0 on success, a negative errno value otherwise and rte_errno is set.
3137  */
3138 int
3139 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
3140                               uint64_t item_flags,
3141                               uint8_t target_protocol,
3142                               struct rte_flow_error *error)
3143 {
3144         const struct rte_flow_item_nvgre *mask = item->mask;
3145         int ret;
3146
3147         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3148                 return rte_flow_error_set(error, EINVAL,
3149                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3150                                           "protocol filtering not compatible"
3151                                           " with this GRE layer");
3152         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3153                 return rte_flow_error_set(error, ENOTSUP,
3154                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3155                                           "multiple tunnel layers not"
3156                                           " supported");
3157         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3158                 return rte_flow_error_set(error, ENOTSUP,
3159                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3160                                           "L3 Layer is missing");
3161         if (!mask)
3162                 mask = &rte_flow_item_nvgre_mask;
3163         ret = mlx5_flow_item_acceptable
3164                 (item, (const uint8_t *)mask,
3165                  (const uint8_t *)&rte_flow_item_nvgre_mask,
3166                  sizeof(struct rte_flow_item_nvgre),
3167                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3168         if (ret < 0)
3169                 return ret;
3170         return 0;
3171 }
3172
3173 /**
3174  * Validate eCPRI item.
3175  *
3176  * @param[in] item
3177  *   Item specification.
3178  * @param[in] item_flags
3179  *   Bit-fields that holds the items detected until now.
3180  * @param[in] last_item
3181  *   Previous validated item in the pattern items.
3182  * @param[in] ether_type
3183  *   Type in the ethernet layer header (including dot1q).
3184  * @param[in] acc_mask
3185  *   Acceptable mask, if NULL default internal default mask
3186  *   will be used to check whether item fields are supported.
3187  * @param[out] error
3188  *   Pointer to error structure.
3189  *
3190  * @return
3191  *   0 on success, a negative errno value otherwise and rte_errno is set.
3192  */
3193 int
3194 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
3195                               uint64_t item_flags,
3196                               uint64_t last_item,
3197                               uint16_t ether_type,
3198                               const struct rte_flow_item_ecpri *acc_mask,
3199                               struct rte_flow_error *error)
3200 {
3201         const struct rte_flow_item_ecpri *mask = item->mask;
3202         const struct rte_flow_item_ecpri nic_mask = {
3203                 .hdr = {
3204                         .common = {
3205                                 .u32 =
3206                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
3207                                         .type = 0xFF,
3208                                         }).u32),
3209                         },
3210                         .dummy[0] = 0xFFFFFFFF,
3211                 },
3212         };
3213         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
3214                                         MLX5_FLOW_LAYER_OUTER_VLAN);
3215         struct rte_flow_item_ecpri mask_lo;
3216
3217         if (!(last_item & outer_l2_vlan) &&
3218             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
3219                 return rte_flow_error_set(error, EINVAL,
3220                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3221                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
3222         if ((last_item & outer_l2_vlan) && ether_type &&
3223             ether_type != RTE_ETHER_TYPE_ECPRI)
3224                 return rte_flow_error_set(error, EINVAL,
3225                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3226                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
3227         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3228                 return rte_flow_error_set(error, EINVAL,
3229                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3230                                           "eCPRI with tunnel is not supported right now");
3231         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3232                 return rte_flow_error_set(error, ENOTSUP,
3233                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3234                                           "multiple L3 layers not supported");
3235         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3236                 return rte_flow_error_set(error, EINVAL,
3237                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3238                                           "eCPRI cannot coexist with a TCP layer");
3239         /* In specification, eCPRI could be over UDP layer. */
3240         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3241                 return rte_flow_error_set(error, EINVAL,
3242                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3243                                           "eCPRI over UDP layer is not yet supported right now");
3244         /* Mask for type field in common header could be zero. */
3245         if (!mask)
3246                 mask = &rte_flow_item_ecpri_mask;
3247         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3248         /* Input mask is in big-endian format. */
3249         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3250                 return rte_flow_error_set(error, EINVAL,
3251                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3252                                           "partial mask is not supported for protocol");
3253         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3254                 return rte_flow_error_set(error, EINVAL,
3255                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3256                                           "message header mask must be after a type mask");
3257         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3258                                          acc_mask ? (const uint8_t *)acc_mask
3259                                                   : (const uint8_t *)&nic_mask,
3260                                          sizeof(struct rte_flow_item_ecpri),
3261                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3262 }
3263
3264 static int
3265 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3266                    const struct rte_flow_attr *attr __rte_unused,
3267                    const struct rte_flow_item items[] __rte_unused,
3268                    const struct rte_flow_action actions[] __rte_unused,
3269                    bool external __rte_unused,
3270                    int hairpin __rte_unused,
3271                    struct rte_flow_error *error)
3272 {
3273         return rte_flow_error_set(error, ENOTSUP,
3274                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3275 }
3276
3277 static struct mlx5_flow *
3278 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3279                   const struct rte_flow_attr *attr __rte_unused,
3280                   const struct rte_flow_item items[] __rte_unused,
3281                   const struct rte_flow_action actions[] __rte_unused,
3282                   struct rte_flow_error *error)
3283 {
3284         rte_flow_error_set(error, ENOTSUP,
3285                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3286         return NULL;
3287 }
3288
3289 static int
3290 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3291                     struct mlx5_flow *dev_flow __rte_unused,
3292                     const struct rte_flow_attr *attr __rte_unused,
3293                     const struct rte_flow_item items[] __rte_unused,
3294                     const struct rte_flow_action actions[] __rte_unused,
3295                     struct rte_flow_error *error)
3296 {
3297         return rte_flow_error_set(error, ENOTSUP,
3298                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3299 }
3300
3301 static int
3302 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3303                 struct rte_flow *flow __rte_unused,
3304                 struct rte_flow_error *error)
3305 {
3306         return rte_flow_error_set(error, ENOTSUP,
3307                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3308 }
3309
3310 static void
3311 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3312                  struct rte_flow *flow __rte_unused)
3313 {
3314 }
3315
3316 static void
3317 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3318                   struct rte_flow *flow __rte_unused)
3319 {
3320 }
3321
3322 static int
3323 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3324                 struct rte_flow *flow __rte_unused,
3325                 const struct rte_flow_action *actions __rte_unused,
3326                 void *data __rte_unused,
3327                 struct rte_flow_error *error)
3328 {
3329         return rte_flow_error_set(error, ENOTSUP,
3330                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3331 }
3332
3333 static int
3334 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3335                       uint32_t domains __rte_unused,
3336                       uint32_t flags __rte_unused)
3337 {
3338         return 0;
3339 }
3340
3341 /* Void driver to protect from null pointer reference. */
3342 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3343         .validate = flow_null_validate,
3344         .prepare = flow_null_prepare,
3345         .translate = flow_null_translate,
3346         .apply = flow_null_apply,
3347         .remove = flow_null_remove,
3348         .destroy = flow_null_destroy,
3349         .query = flow_null_query,
3350         .sync_domain = flow_null_sync_domain,
3351 };
3352
3353 /**
3354  * Select flow driver type according to flow attributes and device
3355  * configuration.
3356  *
3357  * @param[in] dev
3358  *   Pointer to the dev structure.
3359  * @param[in] attr
3360  *   Pointer to the flow attributes.
3361  *
3362  * @return
3363  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3364  */
3365 static enum mlx5_flow_drv_type
3366 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3367 {
3368         struct mlx5_priv *priv = dev->data->dev_private;
3369         /* The OS can determine first a specific flow type (DV, VERBS) */
3370         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3371
3372         if (type != MLX5_FLOW_TYPE_MAX)
3373                 return type;
3374         /* If no OS specific type - continue with DV/VERBS selection */
3375         if (attr->transfer && priv->config.dv_esw_en)
3376                 type = MLX5_FLOW_TYPE_DV;
3377         if (!attr->transfer)
3378                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3379                                                  MLX5_FLOW_TYPE_VERBS;
3380         return type;
3381 }
3382
3383 #define flow_get_drv_ops(type) flow_drv_ops[type]
3384
3385 /**
3386  * Flow driver validation API. This abstracts calling driver specific functions.
3387  * The type of flow driver is determined according to flow attributes.
3388  *
3389  * @param[in] dev
3390  *   Pointer to the dev structure.
3391  * @param[in] attr
3392  *   Pointer to the flow attributes.
3393  * @param[in] items
3394  *   Pointer to the list of items.
3395  * @param[in] actions
3396  *   Pointer to the list of actions.
3397  * @param[in] external
3398  *   This flow rule is created by request external to PMD.
3399  * @param[in] hairpin
3400  *   Number of hairpin TX actions, 0 means classic flow.
3401  * @param[out] error
3402  *   Pointer to the error structure.
3403  *
3404  * @return
3405  *   0 on success, a negative errno value otherwise and rte_errno is set.
3406  */
3407 static inline int
3408 flow_drv_validate(struct rte_eth_dev *dev,
3409                   const struct rte_flow_attr *attr,
3410                   const struct rte_flow_item items[],
3411                   const struct rte_flow_action actions[],
3412                   bool external, int hairpin, struct rte_flow_error *error)
3413 {
3414         const struct mlx5_flow_driver_ops *fops;
3415         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3416
3417         fops = flow_get_drv_ops(type);
3418         return fops->validate(dev, attr, items, actions, external,
3419                               hairpin, error);
3420 }
3421
3422 /**
3423  * Flow driver preparation API. This abstracts calling driver specific
3424  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3425  * calculates the size of memory required for device flow, allocates the memory,
3426  * initializes the device flow and returns the pointer.
3427  *
3428  * @note
3429  *   This function initializes device flow structure such as dv or verbs in
3430  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3431  *   rest. For example, adding returning device flow to flow->dev_flow list and
3432  *   setting backward reference to the flow should be done out of this function.
3433  *   layers field is not filled either.
3434  *
3435  * @param[in] dev
3436  *   Pointer to the dev structure.
3437  * @param[in] attr
3438  *   Pointer to the flow attributes.
3439  * @param[in] items
3440  *   Pointer to the list of items.
3441  * @param[in] actions
3442  *   Pointer to the list of actions.
3443  * @param[in] flow_idx
3444  *   This memory pool index to the flow.
3445  * @param[out] error
3446  *   Pointer to the error structure.
3447  *
3448  * @return
3449  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3450  */
3451 static inline struct mlx5_flow *
3452 flow_drv_prepare(struct rte_eth_dev *dev,
3453                  const struct rte_flow *flow,
3454                  const struct rte_flow_attr *attr,
3455                  const struct rte_flow_item items[],
3456                  const struct rte_flow_action actions[],
3457                  uint32_t flow_idx,
3458                  struct rte_flow_error *error)
3459 {
3460         const struct mlx5_flow_driver_ops *fops;
3461         enum mlx5_flow_drv_type type = flow->drv_type;
3462         struct mlx5_flow *mlx5_flow = NULL;
3463
3464         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3465         fops = flow_get_drv_ops(type);
3466         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3467         if (mlx5_flow)
3468                 mlx5_flow->flow_idx = flow_idx;
3469         return mlx5_flow;
3470 }
3471
3472 /**
3473  * Flow driver translation API. This abstracts calling driver specific
3474  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3475  * translates a generic flow into a driver flow. flow_drv_prepare() must
3476  * precede.
3477  *
3478  * @note
3479  *   dev_flow->layers could be filled as a result of parsing during translation
3480  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3481  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3482  *   flow->actions could be overwritten even though all the expanded dev_flows
3483  *   have the same actions.
3484  *
3485  * @param[in] dev
3486  *   Pointer to the rte dev structure.
3487  * @param[in, out] dev_flow
3488  *   Pointer to the mlx5 flow.
3489  * @param[in] attr
3490  *   Pointer to the flow attributes.
3491  * @param[in] items
3492  *   Pointer to the list of items.
3493  * @param[in] actions
3494  *   Pointer to the list of actions.
3495  * @param[out] error
3496  *   Pointer to the error structure.
3497  *
3498  * @return
3499  *   0 on success, a negative errno value otherwise and rte_errno is set.
3500  */
3501 static inline int
3502 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3503                    const struct rte_flow_attr *attr,
3504                    const struct rte_flow_item items[],
3505                    const struct rte_flow_action actions[],
3506                    struct rte_flow_error *error)
3507 {
3508         const struct mlx5_flow_driver_ops *fops;
3509         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3510
3511         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3512         fops = flow_get_drv_ops(type);
3513         return fops->translate(dev, dev_flow, attr, items, actions, error);
3514 }
3515
3516 /**
3517  * Flow driver apply API. This abstracts calling driver specific functions.
3518  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3519  * translated driver flows on to device. flow_drv_translate() must precede.
3520  *
3521  * @param[in] dev
3522  *   Pointer to Ethernet device structure.
3523  * @param[in, out] flow
3524  *   Pointer to flow structure.
3525  * @param[out] error
3526  *   Pointer to error structure.
3527  *
3528  * @return
3529  *   0 on success, a negative errno value otherwise and rte_errno is set.
3530  */
3531 static inline int
3532 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3533                struct rte_flow_error *error)
3534 {
3535         const struct mlx5_flow_driver_ops *fops;
3536         enum mlx5_flow_drv_type type = flow->drv_type;
3537
3538         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3539         fops = flow_get_drv_ops(type);
3540         return fops->apply(dev, flow, error);
3541 }
3542
3543 /**
3544  * Flow driver destroy API. This abstracts calling driver specific functions.
3545  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3546  * on device and releases resources of the flow.
3547  *
3548  * @param[in] dev
3549  *   Pointer to Ethernet device.
3550  * @param[in, out] flow
3551  *   Pointer to flow structure.
3552  */
3553 static inline void
3554 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3555 {
3556         const struct mlx5_flow_driver_ops *fops;
3557         enum mlx5_flow_drv_type type = flow->drv_type;
3558
3559         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3560         fops = flow_get_drv_ops(type);
3561         fops->destroy(dev, flow);
3562 }
3563
3564 /**
3565  * Flow driver find RSS policy tbl API. This abstracts calling driver
3566  * specific functions. Parent flow (rte_flow) should have driver
3567  * type (drv_type). It will find the RSS policy table that has the rss_desc.
3568  *
3569  * @param[in] dev
3570  *   Pointer to Ethernet device.
3571  * @param[in, out] flow
3572  *   Pointer to flow structure.
3573  * @param[in] policy
3574  *   Pointer to meter policy table.
3575  * @param[in] rss_desc
3576  *   Pointer to rss_desc
3577  */
3578 static struct mlx5_flow_meter_sub_policy *
3579 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3580                 struct rte_flow *flow,
3581                 struct mlx5_flow_meter_policy *policy,
3582                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3583 {
3584         const struct mlx5_flow_driver_ops *fops;
3585         enum mlx5_flow_drv_type type = flow->drv_type;
3586
3587         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3588         fops = flow_get_drv_ops(type);
3589         return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3590 }
3591
3592 /**
3593  * Flow driver color tag rule API. This abstracts calling driver
3594  * specific functions. Parent flow (rte_flow) should have driver
3595  * type (drv_type). It will create the color tag rules in hierarchy meter.
3596  *
3597  * @param[in] dev
3598  *   Pointer to Ethernet device.
3599  * @param[in, out] flow
3600  *   Pointer to flow structure.
3601  * @param[in] fm
3602  *   Pointer to flow meter structure.
3603  * @param[in] src_port
3604  *   The src port this extra rule should use.
3605  * @param[in] item
3606  *   The src port id match item.
3607  * @param[out] error
3608  *   Pointer to error structure.
3609  */
3610 static int
3611 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev,
3612                 struct rte_flow *flow,
3613                 struct mlx5_flow_meter_info *fm,
3614                 int32_t src_port,
3615                 const struct rte_flow_item *item,
3616                 struct rte_flow_error *error)
3617 {
3618         const struct mlx5_flow_driver_ops *fops;
3619         enum mlx5_flow_drv_type type = flow->drv_type;
3620
3621         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3622         fops = flow_get_drv_ops(type);
3623         return fops->meter_hierarchy_rule_create(dev, fm,
3624                                                 src_port, item, error);
3625 }
3626
3627 /**
3628  * Get RSS action from the action list.
3629  *
3630  * @param[in] dev
3631  *   Pointer to Ethernet device.
3632  * @param[in] actions
3633  *   Pointer to the list of actions.
3634  * @param[in] flow
3635  *   Parent flow structure pointer.
3636  *
3637  * @return
3638  *   Pointer to the RSS action if exist, else return NULL.
3639  */
3640 static const struct rte_flow_action_rss*
3641 flow_get_rss_action(struct rte_eth_dev *dev,
3642                     const struct rte_flow_action actions[])
3643 {
3644         struct mlx5_priv *priv = dev->data->dev_private;
3645         const struct rte_flow_action_rss *rss = NULL;
3646         struct mlx5_meter_policy_action_container *acg;
3647         struct mlx5_meter_policy_action_container *acy;
3648
3649         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3650                 switch (actions->type) {
3651                 case RTE_FLOW_ACTION_TYPE_RSS:
3652                         rss = actions->conf;
3653                         break;
3654                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3655                 {
3656                         const struct rte_flow_action_sample *sample =
3657                                                                 actions->conf;
3658                         const struct rte_flow_action *act = sample->actions;
3659                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3660                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3661                                         rss = act->conf;
3662                         break;
3663                 }
3664                 case RTE_FLOW_ACTION_TYPE_METER:
3665                 {
3666                         uint32_t mtr_idx;
3667                         struct mlx5_flow_meter_info *fm;
3668                         struct mlx5_flow_meter_policy *policy;
3669                         const struct rte_flow_action_meter *mtr = actions->conf;
3670
3671                         fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3672                         if (fm && !fm->def_policy) {
3673                                 policy = mlx5_flow_meter_policy_find(dev,
3674                                                 fm->policy_id, NULL);
3675                                 MLX5_ASSERT(policy);
3676                                 if (policy->is_hierarchy) {
3677                                         policy =
3678                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
3679                                                                         policy);
3680                                         if (!policy)
3681                                                 return NULL;
3682                                 }
3683                                 if (policy->is_rss) {
3684                                         acg =
3685                                         &policy->act_cnt[RTE_COLOR_GREEN];
3686                                         acy =
3687                                         &policy->act_cnt[RTE_COLOR_YELLOW];
3688                                         if (acg->fate_action ==
3689                                             MLX5_FLOW_FATE_SHARED_RSS)
3690                                                 rss = acg->rss->conf;
3691                                         else if (acy->fate_action ==
3692                                                  MLX5_FLOW_FATE_SHARED_RSS)
3693                                                 rss = acy->rss->conf;
3694                                 }
3695                         }
3696                         break;
3697                 }
3698                 default:
3699                         break;
3700                 }
3701         }
3702         return rss;
3703 }
3704
3705 /**
3706  * Get ASO age action by index.
3707  *
3708  * @param[in] dev
3709  *   Pointer to the Ethernet device structure.
3710  * @param[in] age_idx
3711  *   Index to the ASO age action.
3712  *
3713  * @return
3714  *   The specified ASO age action.
3715  */
3716 struct mlx5_aso_age_action*
3717 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3718 {
3719         uint16_t pool_idx = age_idx & UINT16_MAX;
3720         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3721         struct mlx5_priv *priv = dev->data->dev_private;
3722         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3723         struct mlx5_aso_age_pool *pool;
3724
3725         rte_rwlock_read_lock(&mng->resize_rwl);
3726         pool = mng->pools[pool_idx];
3727         rte_rwlock_read_unlock(&mng->resize_rwl);
3728         return &pool->actions[offset - 1];
3729 }
3730
3731 /* maps indirect action to translated direct in some actions array */
3732 struct mlx5_translated_action_handle {
3733         struct rte_flow_action_handle *action; /**< Indirect action handle. */
3734         int index; /**< Index in related array of rte_flow_action. */
3735 };
3736
3737 /**
3738  * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
3739  * direct action if translation possible.
3740  * This functionality used to run same execution path for both direct and
3741  * indirect actions on flow create. All necessary preparations for indirect
3742  * action handling should be performed on *handle* actions list returned
3743  * from this call.
3744  *
3745  * @param[in] dev
3746  *   Pointer to Ethernet device.
3747  * @param[in] actions
3748  *   List of actions to translate.
3749  * @param[out] handle
3750  *   List to store translated indirect action object handles.
3751  * @param[in, out] indir_n
3752  *   Size of *handle* array. On return should be updated with number of
3753  *   indirect actions retrieved from the *actions* list.
3754  * @param[out] translated_actions
3755  *   List of actions where all indirect actions were translated to direct
3756  *   if possible. NULL if no translation took place.
3757  * @param[out] error
3758  *   Pointer to the error structure.
3759  *
3760  * @return
3761  *   0 on success, a negative errno value otherwise and rte_errno is set.
3762  */
3763 static int
3764 flow_action_handles_translate(struct rte_eth_dev *dev,
3765                               const struct rte_flow_action actions[],
3766                               struct mlx5_translated_action_handle *handle,
3767                               int *indir_n,
3768                               struct rte_flow_action **translated_actions,
3769                               struct rte_flow_error *error)
3770 {
3771         struct mlx5_priv *priv = dev->data->dev_private;
3772         struct rte_flow_action *translated = NULL;
3773         size_t actions_size;
3774         int n;
3775         int copied_n = 0;
3776         struct mlx5_translated_action_handle *handle_end = NULL;
3777
3778         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3779                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
3780                         continue;
3781                 if (copied_n == *indir_n) {
3782                         return rte_flow_error_set
3783                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3784                                  NULL, "too many shared actions");
3785                 }
3786                 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
3787                            sizeof(actions[n].conf));
3788                 handle[copied_n].index = n;
3789                 copied_n++;
3790         }
3791         n++;
3792         *indir_n = copied_n;
3793         if (!copied_n)
3794                 return 0;
3795         actions_size = sizeof(struct rte_flow_action) * n;
3796         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3797         if (!translated) {
3798                 rte_errno = ENOMEM;
3799                 return -ENOMEM;
3800         }
3801         memcpy(translated, actions, actions_size);
3802         for (handle_end = handle + copied_n; handle < handle_end; handle++) {
3803                 struct mlx5_shared_action_rss *shared_rss;
3804                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3805                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3806                 uint32_t idx = act_idx &
3807                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3808
3809                 switch (type) {
3810                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3811                         shared_rss = mlx5_ipool_get
3812                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3813                         translated[handle->index].type =
3814                                 RTE_FLOW_ACTION_TYPE_RSS;
3815                         translated[handle->index].conf =
3816                                 &shared_rss->origin;
3817                         break;
3818                 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
3819                         translated[handle->index].type =
3820                                                 (enum rte_flow_action_type)
3821                                                 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
3822                         translated[handle->index].conf = (void *)(uintptr_t)idx;
3823                         break;
3824                 case MLX5_INDIRECT_ACTION_TYPE_AGE:
3825                         if (priv->sh->flow_hit_aso_en) {
3826                                 translated[handle->index].type =
3827                                         (enum rte_flow_action_type)
3828                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3829                                 translated[handle->index].conf =
3830                                                          (void *)(uintptr_t)idx;
3831                                 break;
3832                         }
3833                         /* Fall-through */
3834                 case MLX5_INDIRECT_ACTION_TYPE_CT:
3835                         if (priv->sh->ct_aso_en) {
3836                                 translated[handle->index].type =
3837                                         RTE_FLOW_ACTION_TYPE_CONNTRACK;
3838                                 translated[handle->index].conf =
3839                                                          (void *)(uintptr_t)idx;
3840                                 break;
3841                         }
3842                         /* Fall-through */
3843                 default:
3844                         mlx5_free(translated);
3845                         return rte_flow_error_set
3846                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3847                                  NULL, "invalid indirect action type");
3848                 }
3849         }
3850         *translated_actions = translated;
3851         return 0;
3852 }
3853
3854 /**
3855  * Get Shared RSS action from the action list.
3856  *
3857  * @param[in] dev
3858  *   Pointer to Ethernet device.
3859  * @param[in] shared
3860  *   Pointer to the list of actions.
3861  * @param[in] shared_n
3862  *   Actions list length.
3863  *
3864  * @return
3865  *   The MLX5 RSS action ID if exists, otherwise return 0.
3866  */
3867 static uint32_t
3868 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3869                            struct mlx5_translated_action_handle *handle,
3870                            int shared_n)
3871 {
3872         struct mlx5_translated_action_handle *handle_end;
3873         struct mlx5_priv *priv = dev->data->dev_private;
3874         struct mlx5_shared_action_rss *shared_rss;
3875
3876
3877         for (handle_end = handle + shared_n; handle < handle_end; handle++) {
3878                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3879                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3880                 uint32_t idx = act_idx &
3881                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3882                 switch (type) {
3883                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3884                         shared_rss = mlx5_ipool_get
3885                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3886                                                                            idx);
3887                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3888                                            __ATOMIC_RELAXED);
3889                         return idx;
3890                 default:
3891                         break;
3892                 }
3893         }
3894         return 0;
3895 }
3896
3897 static unsigned int
3898 find_graph_root(uint32_t rss_level)
3899 {
3900         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3901                                MLX5_EXPANSION_ROOT_OUTER;
3902 }
3903
3904 /**
3905  *  Get layer flags from the prefix flow.
3906  *
3907  *  Some flows may be split to several subflows, the prefix subflow gets the
3908  *  match items and the suffix sub flow gets the actions.
3909  *  Some actions need the user defined match item flags to get the detail for
3910  *  the action.
3911  *  This function helps the suffix flow to get the item layer flags from prefix
3912  *  subflow.
3913  *
3914  * @param[in] dev_flow
3915  *   Pointer the created preifx subflow.
3916  *
3917  * @return
3918  *   The layers get from prefix subflow.
3919  */
3920 static inline uint64_t
3921 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3922 {
3923         uint64_t layers = 0;
3924
3925         /*
3926          * Layers bits could be localization, but usually the compiler will
3927          * help to do the optimization work for source code.
3928          * If no decap actions, use the layers directly.
3929          */
3930         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3931                 return dev_flow->handle->layers;
3932         /* Convert L3 layers with decap action. */
3933         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3934                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3935         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3936                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3937         /* Convert L4 layers with decap action.  */
3938         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3939                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3940         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3941                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3942         return layers;
3943 }
3944
3945 /**
3946  * Get metadata split action information.
3947  *
3948  * @param[in] actions
3949  *   Pointer to the list of actions.
3950  * @param[out] qrss
3951  *   Pointer to the return pointer.
3952  * @param[out] qrss_type
3953  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3954  *   if no QUEUE/RSS is found.
3955  * @param[out] encap_idx
3956  *   Pointer to the index of the encap action if exists, otherwise the last
3957  *   action index.
3958  *
3959  * @return
3960  *   Total number of actions.
3961  */
3962 static int
3963 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3964                                        const struct rte_flow_action **qrss,
3965                                        int *encap_idx)
3966 {
3967         const struct rte_flow_action_raw_encap *raw_encap;
3968         int actions_n = 0;
3969         int raw_decap_idx = -1;
3970
3971         *encap_idx = -1;
3972         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3973                 switch (actions->type) {
3974                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3975                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3976                         *encap_idx = actions_n;
3977                         break;
3978                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3979                         raw_decap_idx = actions_n;
3980                         break;
3981                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3982                         raw_encap = actions->conf;
3983                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3984                                 *encap_idx = raw_decap_idx != -1 ?
3985                                                       raw_decap_idx : actions_n;
3986                         break;
3987                 case RTE_FLOW_ACTION_TYPE_QUEUE:
3988                 case RTE_FLOW_ACTION_TYPE_RSS:
3989                         *qrss = actions;
3990                         break;
3991                 default:
3992                         break;
3993                 }
3994                 actions_n++;
3995         }
3996         if (*encap_idx == -1)
3997                 *encap_idx = actions_n;
3998         /* Count RTE_FLOW_ACTION_TYPE_END. */
3999         return actions_n + 1;
4000 }
4001
4002 /**
4003  * Check if the action will change packet.
4004  *
4005  * @param dev
4006  *   Pointer to Ethernet device.
4007  * @param[in] type
4008  *   action type.
4009  *
4010  * @return
4011  *   true if action will change packet, false otherwise.
4012  */
4013 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
4014                                           enum rte_flow_action_type type)
4015 {
4016         struct mlx5_priv *priv = dev->data->dev_private;
4017
4018         switch (type) {
4019         case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4020         case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4021         case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4022         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4023         case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4024         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4025         case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4026         case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4027         case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4028         case RTE_FLOW_ACTION_TYPE_SET_TTL:
4029         case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4030         case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4031         case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4032         case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4033         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4034         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
4035         case RTE_FLOW_ACTION_TYPE_SET_META:
4036         case RTE_FLOW_ACTION_TYPE_SET_TAG:
4037         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4038         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4039         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4040         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4041         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4042         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4043         case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4044         case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4045         case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4046         case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4047         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
4048                 return true;
4049         case RTE_FLOW_ACTION_TYPE_FLAG:
4050         case RTE_FLOW_ACTION_TYPE_MARK:
4051                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
4052                         return true;
4053                 else
4054                         return false;
4055         default:
4056                 return false;
4057         }
4058 }
4059
4060 /**
4061  * Check meter action from the action list.
4062  *
4063  * @param dev
4064  *   Pointer to Ethernet device.
4065  * @param[in] actions
4066  *   Pointer to the list of actions.
4067  * @param[out] has_mtr
4068  *   Pointer to the meter exist flag.
4069  * @param[out] has_modify
4070  *   Pointer to the flag showing there's packet change action.
4071  * @param[out] meter_id
4072  *   Pointer to the meter id.
4073  *
4074  * @return
4075  *   Total number of actions.
4076  */
4077 static int
4078 flow_check_meter_action(struct rte_eth_dev *dev,
4079                         const struct rte_flow_action actions[],
4080                         bool *has_mtr, bool *has_modify, uint32_t *meter_id)
4081 {
4082         const struct rte_flow_action_meter *mtr = NULL;
4083         int actions_n = 0;
4084
4085         MLX5_ASSERT(has_mtr);
4086         *has_mtr = false;
4087         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4088                 switch (actions->type) {
4089                 case RTE_FLOW_ACTION_TYPE_METER:
4090                         mtr = actions->conf;
4091                         *meter_id = mtr->mtr_id;
4092                         *has_mtr = true;
4093                         break;
4094                 default:
4095                         break;
4096                 }
4097                 if (!*has_mtr)
4098                         *has_modify |= flow_check_modify_action_type(dev,
4099                                                                 actions->type);
4100                 actions_n++;
4101         }
4102         /* Count RTE_FLOW_ACTION_TYPE_END. */
4103         return actions_n + 1;
4104 }
4105
4106 /**
4107  * Check if the flow should be split due to hairpin.
4108  * The reason for the split is that in current HW we can't
4109  * support encap and push-vlan on Rx, so if a flow contains
4110  * these actions we move it to Tx.
4111  *
4112  * @param dev
4113  *   Pointer to Ethernet device.
4114  * @param[in] attr
4115  *   Flow rule attributes.
4116  * @param[in] actions
4117  *   Associated actions (list terminated by the END action).
4118  *
4119  * @return
4120  *   > 0 the number of actions and the flow should be split,
4121  *   0 when no split required.
4122  */
4123 static int
4124 flow_check_hairpin_split(struct rte_eth_dev *dev,
4125                          const struct rte_flow_attr *attr,
4126                          const struct rte_flow_action actions[])
4127 {
4128         int queue_action = 0;
4129         int action_n = 0;
4130         int split = 0;
4131         const struct rte_flow_action_queue *queue;
4132         const struct rte_flow_action_rss *rss;
4133         const struct rte_flow_action_raw_encap *raw_encap;
4134         const struct rte_eth_hairpin_conf *conf;
4135
4136         if (!attr->ingress)
4137                 return 0;
4138         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4139                 switch (actions->type) {
4140                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4141                         queue = actions->conf;
4142                         if (queue == NULL)
4143                                 return 0;
4144                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
4145                         if (conf == NULL || conf->tx_explicit != 0)
4146                                 return 0;
4147                         queue_action = 1;
4148                         action_n++;
4149                         break;
4150                 case RTE_FLOW_ACTION_TYPE_RSS:
4151                         rss = actions->conf;
4152                         if (rss == NULL || rss->queue_num == 0)
4153                                 return 0;
4154                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
4155                         if (conf == NULL || conf->tx_explicit != 0)
4156                                 return 0;
4157                         queue_action = 1;
4158                         action_n++;
4159                         break;
4160                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4161                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4162                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4163                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4164                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4165                         split++;
4166                         action_n++;
4167                         break;
4168                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4169                         raw_encap = actions->conf;
4170                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4171                                 split++;
4172                         action_n++;
4173                         break;
4174                 default:
4175                         action_n++;
4176                         break;
4177                 }
4178         }
4179         if (split && queue_action)
4180                 return action_n;
4181         return 0;
4182 }
4183
4184 /* Declare flow create/destroy prototype in advance. */
4185 static uint32_t
4186 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4187                  const struct rte_flow_attr *attr,
4188                  const struct rte_flow_item items[],
4189                  const struct rte_flow_action actions[],
4190                  bool external, struct rte_flow_error *error);
4191
4192 static void
4193 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4194                   uint32_t flow_idx);
4195
4196 int
4197 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused,
4198                       struct mlx5_list_entry *entry, void *cb_ctx)
4199 {
4200         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4201         struct mlx5_flow_mreg_copy_resource *mcp_res =
4202                                container_of(entry, typeof(*mcp_res), hlist_ent);
4203
4204         return mcp_res->mark_id != *(uint32_t *)(ctx->data);
4205 }
4206
4207 struct mlx5_list_entry *
4208 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx)
4209 {
4210         struct rte_eth_dev *dev = tool_ctx;
4211         struct mlx5_priv *priv = dev->data->dev_private;
4212         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4213         struct mlx5_flow_mreg_copy_resource *mcp_res;
4214         struct rte_flow_error *error = ctx->error;
4215         uint32_t idx = 0;
4216         int ret;
4217         uint32_t mark_id = *(uint32_t *)(ctx->data);
4218         struct rte_flow_attr attr = {
4219                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4220                 .ingress = 1,
4221         };
4222         struct mlx5_rte_flow_item_tag tag_spec = {
4223                 .data = mark_id,
4224         };
4225         struct rte_flow_item items[] = {
4226                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
4227         };
4228         struct rte_flow_action_mark ftag = {
4229                 .id = mark_id,
4230         };
4231         struct mlx5_flow_action_copy_mreg cp_mreg = {
4232                 .dst = REG_B,
4233                 .src = REG_NON,
4234         };
4235         struct rte_flow_action_jump jump = {
4236                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4237         };
4238         struct rte_flow_action actions[] = {
4239                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
4240         };
4241
4242         /* Fill the register fileds in the flow. */
4243         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
4244         if (ret < 0)
4245                 return NULL;
4246         tag_spec.id = ret;
4247         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4248         if (ret < 0)
4249                 return NULL;
4250         cp_mreg.src = ret;
4251         /* Provide the full width of FLAG specific value. */
4252         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
4253                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
4254         /* Build a new flow. */
4255         if (mark_id != MLX5_DEFAULT_COPY_ID) {
4256                 items[0] = (struct rte_flow_item){
4257                         .type = (enum rte_flow_item_type)
4258                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4259                         .spec = &tag_spec,
4260                 };
4261                 items[1] = (struct rte_flow_item){
4262                         .type = RTE_FLOW_ITEM_TYPE_END,
4263                 };
4264                 actions[0] = (struct rte_flow_action){
4265                         .type = (enum rte_flow_action_type)
4266                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4267                         .conf = &ftag,
4268                 };
4269                 actions[1] = (struct rte_flow_action){
4270                         .type = (enum rte_flow_action_type)
4271                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4272                         .conf = &cp_mreg,
4273                 };
4274                 actions[2] = (struct rte_flow_action){
4275                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4276                         .conf = &jump,
4277                 };
4278                 actions[3] = (struct rte_flow_action){
4279                         .type = RTE_FLOW_ACTION_TYPE_END,
4280                 };
4281         } else {
4282                 /* Default rule, wildcard match. */
4283                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4284                 items[0] = (struct rte_flow_item){
4285                         .type = RTE_FLOW_ITEM_TYPE_END,
4286                 };
4287                 actions[0] = (struct rte_flow_action){
4288                         .type = (enum rte_flow_action_type)
4289                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4290                         .conf = &cp_mreg,
4291                 };
4292                 actions[1] = (struct rte_flow_action){
4293                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4294                         .conf = &jump,
4295                 };
4296                 actions[2] = (struct rte_flow_action){
4297                         .type = RTE_FLOW_ACTION_TYPE_END,
4298                 };
4299         }
4300         /* Build a new entry. */
4301         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4302         if (!mcp_res) {
4303                 rte_errno = ENOMEM;
4304                 return NULL;
4305         }
4306         mcp_res->idx = idx;
4307         mcp_res->mark_id = mark_id;
4308         /*
4309          * The copy Flows are not included in any list. There
4310          * ones are referenced from other Flows and can not
4311          * be applied, removed, deleted in ardbitrary order
4312          * by list traversing.
4313          */
4314         mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP,
4315                                         &attr, items, actions, false, error);
4316         if (!mcp_res->rix_flow) {
4317                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4318                 return NULL;
4319         }
4320         return &mcp_res->hlist_ent;
4321 }
4322
4323 struct mlx5_list_entry *
4324 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
4325                       void *cb_ctx __rte_unused)
4326 {
4327         struct rte_eth_dev *dev = tool_ctx;
4328         struct mlx5_priv *priv = dev->data->dev_private;
4329         struct mlx5_flow_mreg_copy_resource *mcp_res;
4330         uint32_t idx = 0;
4331
4332         mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4333         if (!mcp_res) {
4334                 rte_errno = ENOMEM;
4335                 return NULL;
4336         }
4337         memcpy(mcp_res, oentry, sizeof(*mcp_res));
4338         mcp_res->idx = idx;
4339         return &mcp_res->hlist_ent;
4340 }
4341
4342 void
4343 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4344 {
4345         struct mlx5_flow_mreg_copy_resource *mcp_res =
4346                                container_of(entry, typeof(*mcp_res), hlist_ent);
4347         struct rte_eth_dev *dev = tool_ctx;
4348         struct mlx5_priv *priv = dev->data->dev_private;
4349
4350         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4351 }
4352
4353 /**
4354  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4355  *
4356  * As mark_id is unique, if there's already a registered flow for the mark_id,
4357  * return by increasing the reference counter of the resource. Otherwise, create
4358  * the resource (mcp_res) and flow.
4359  *
4360  * Flow looks like,
4361  *   - If ingress port is ANY and reg_c[1] is mark_id,
4362  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4363  *
4364  * For default flow (zero mark_id), flow is like,
4365  *   - If ingress port is ANY,
4366  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
4367  *
4368  * @param dev
4369  *   Pointer to Ethernet device.
4370  * @param mark_id
4371  *   ID of MARK action, zero means default flow for META.
4372  * @param[out] error
4373  *   Perform verbose error reporting if not NULL.
4374  *
4375  * @return
4376  *   Associated resource on success, NULL otherwise and rte_errno is set.
4377  */
4378 static struct mlx5_flow_mreg_copy_resource *
4379 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4380                           struct rte_flow_error *error)
4381 {
4382         struct mlx5_priv *priv = dev->data->dev_private;
4383         struct mlx5_list_entry *entry;
4384         struct mlx5_flow_cb_ctx ctx = {
4385                 .dev = dev,
4386                 .error = error,
4387                 .data = &mark_id,
4388         };
4389
4390         /* Check if already registered. */
4391         MLX5_ASSERT(priv->mreg_cp_tbl);
4392         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4393         if (!entry)
4394                 return NULL;
4395         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4396                             hlist_ent);
4397 }
4398
4399 void
4400 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4401 {
4402         struct mlx5_flow_mreg_copy_resource *mcp_res =
4403                                container_of(entry, typeof(*mcp_res), hlist_ent);
4404         struct rte_eth_dev *dev = tool_ctx;
4405         struct mlx5_priv *priv = dev->data->dev_private;
4406
4407         MLX5_ASSERT(mcp_res->rix_flow);
4408         flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow);
4409         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4410 }
4411
4412 /**
4413  * Release flow in RX_CP_TBL.
4414  *
4415  * @param dev
4416  *   Pointer to Ethernet device.
4417  * @flow
4418  *   Parent flow for wich copying is provided.
4419  */
4420 static void
4421 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4422                           struct rte_flow *flow)
4423 {
4424         struct mlx5_flow_mreg_copy_resource *mcp_res;
4425         struct mlx5_priv *priv = dev->data->dev_private;
4426
4427         if (!flow->rix_mreg_copy)
4428                 return;
4429         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4430                                  flow->rix_mreg_copy);
4431         if (!mcp_res || !priv->mreg_cp_tbl)
4432                 return;
4433         MLX5_ASSERT(mcp_res->rix_flow);
4434         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4435         flow->rix_mreg_copy = 0;
4436 }
4437
4438 /**
4439  * Remove the default copy action from RX_CP_TBL.
4440  *
4441  * This functions is called in the mlx5_dev_start(). No thread safe
4442  * is guaranteed.
4443  *
4444  * @param dev
4445  *   Pointer to Ethernet device.
4446  */
4447 static void
4448 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4449 {
4450         struct mlx5_list_entry *entry;
4451         struct mlx5_priv *priv = dev->data->dev_private;
4452         struct mlx5_flow_cb_ctx ctx;
4453         uint32_t mark_id;
4454
4455         /* Check if default flow is registered. */
4456         if (!priv->mreg_cp_tbl)
4457                 return;
4458         mark_id = MLX5_DEFAULT_COPY_ID;
4459         ctx.data = &mark_id;
4460         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx);
4461         if (!entry)
4462                 return;
4463         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4464 }
4465
4466 /**
4467  * Add the default copy action in in RX_CP_TBL.
4468  *
4469  * This functions is called in the mlx5_dev_start(). No thread safe
4470  * is guaranteed.
4471  *
4472  * @param dev
4473  *   Pointer to Ethernet device.
4474  * @param[out] error
4475  *   Perform verbose error reporting if not NULL.
4476  *
4477  * @return
4478  *   0 for success, negative value otherwise and rte_errno is set.
4479  */
4480 static int
4481 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4482                                   struct rte_flow_error *error)
4483 {
4484         struct mlx5_priv *priv = dev->data->dev_private;
4485         struct mlx5_flow_mreg_copy_resource *mcp_res;
4486         struct mlx5_flow_cb_ctx ctx;
4487         uint32_t mark_id;
4488
4489         /* Check whether extensive metadata feature is engaged. */
4490         if (!priv->config.dv_flow_en ||
4491             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4492             !mlx5_flow_ext_mreg_supported(dev) ||
4493             !priv->sh->dv_regc0_mask)
4494                 return 0;
4495         /*
4496          * Add default mreg copy flow may be called multiple time, but
4497          * only be called once in stop. Avoid register it twice.
4498          */
4499         mark_id = MLX5_DEFAULT_COPY_ID;
4500         ctx.data = &mark_id;
4501         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx))
4502                 return 0;
4503         mcp_res = flow_mreg_add_copy_action(dev, mark_id, error);
4504         if (!mcp_res)
4505                 return -rte_errno;
4506         return 0;
4507 }
4508
4509 /**
4510  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4511  *
4512  * All the flow having Q/RSS action should be split by
4513  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4514  * performs the following,
4515  *   - CQE->flow_tag := reg_c[1] (MARK)
4516  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4517  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4518  * but there should be a flow per each MARK ID set by MARK action.
4519  *
4520  * For the aforementioned reason, if there's a MARK action in flow's action
4521  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4522  * the MARK ID to CQE's flow_tag like,
4523  *   - If reg_c[1] is mark_id,
4524  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4525  *
4526  * For SET_META action which stores value in reg_c[0], as the destination is
4527  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4528  * MARK ID means the default flow. The default flow looks like,
4529  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4530  *
4531  * @param dev
4532  *   Pointer to Ethernet device.
4533  * @param flow
4534  *   Pointer to flow structure.
4535  * @param[in] actions
4536  *   Pointer to the list of actions.
4537  * @param[out] error
4538  *   Perform verbose error reporting if not NULL.
4539  *
4540  * @return
4541  *   0 on success, negative value otherwise and rte_errno is set.
4542  */
4543 static int
4544 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4545                             struct rte_flow *flow,
4546                             const struct rte_flow_action *actions,
4547                             struct rte_flow_error *error)
4548 {
4549         struct mlx5_priv *priv = dev->data->dev_private;
4550         struct mlx5_dev_config *config = &priv->config;
4551         struct mlx5_flow_mreg_copy_resource *mcp_res;
4552         const struct rte_flow_action_mark *mark;
4553
4554         /* Check whether extensive metadata feature is engaged. */
4555         if (!config->dv_flow_en ||
4556             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4557             !mlx5_flow_ext_mreg_supported(dev) ||
4558             !priv->sh->dv_regc0_mask)
4559                 return 0;
4560         /* Find MARK action. */
4561         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4562                 switch (actions->type) {
4563                 case RTE_FLOW_ACTION_TYPE_FLAG:
4564                         mcp_res = flow_mreg_add_copy_action
4565                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4566                         if (!mcp_res)
4567                                 return -rte_errno;
4568                         flow->rix_mreg_copy = mcp_res->idx;
4569                         return 0;
4570                 case RTE_FLOW_ACTION_TYPE_MARK:
4571                         mark = (const struct rte_flow_action_mark *)
4572                                 actions->conf;
4573                         mcp_res =
4574                                 flow_mreg_add_copy_action(dev, mark->id, error);
4575                         if (!mcp_res)
4576                                 return -rte_errno;
4577                         flow->rix_mreg_copy = mcp_res->idx;
4578                         return 0;
4579                 default:
4580                         break;
4581                 }
4582         }
4583         return 0;
4584 }
4585
4586 #define MLX5_MAX_SPLIT_ACTIONS 24
4587 #define MLX5_MAX_SPLIT_ITEMS 24
4588
4589 /**
4590  * Split the hairpin flow.
4591  * Since HW can't support encap and push-vlan on Rx, we move these
4592  * actions to Tx.
4593  * If the count action is after the encap then we also
4594  * move the count action. in this case the count will also measure
4595  * the outer bytes.
4596  *
4597  * @param dev
4598  *   Pointer to Ethernet device.
4599  * @param[in] actions
4600  *   Associated actions (list terminated by the END action).
4601  * @param[out] actions_rx
4602  *   Rx flow actions.
4603  * @param[out] actions_tx
4604  *   Tx flow actions..
4605  * @param[out] pattern_tx
4606  *   The pattern items for the Tx flow.
4607  * @param[out] flow_id
4608  *   The flow ID connected to this flow.
4609  *
4610  * @return
4611  *   0 on success.
4612  */
4613 static int
4614 flow_hairpin_split(struct rte_eth_dev *dev,
4615                    const struct rte_flow_action actions[],
4616                    struct rte_flow_action actions_rx[],
4617                    struct rte_flow_action actions_tx[],
4618                    struct rte_flow_item pattern_tx[],
4619                    uint32_t flow_id)
4620 {
4621         const struct rte_flow_action_raw_encap *raw_encap;
4622         const struct rte_flow_action_raw_decap *raw_decap;
4623         struct mlx5_rte_flow_action_set_tag *set_tag;
4624         struct rte_flow_action *tag_action;
4625         struct mlx5_rte_flow_item_tag *tag_item;
4626         struct rte_flow_item *item;
4627         char *addr;
4628         int encap = 0;
4629
4630         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4631                 switch (actions->type) {
4632                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4633                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4634                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4635                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4636                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4637                         rte_memcpy(actions_tx, actions,
4638                                sizeof(struct rte_flow_action));
4639                         actions_tx++;
4640                         break;
4641                 case RTE_FLOW_ACTION_TYPE_COUNT:
4642                         if (encap) {
4643                                 rte_memcpy(actions_tx, actions,
4644                                            sizeof(struct rte_flow_action));
4645                                 actions_tx++;
4646                         } else {
4647                                 rte_memcpy(actions_rx, actions,
4648                                            sizeof(struct rte_flow_action));
4649                                 actions_rx++;
4650                         }
4651                         break;
4652                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4653                         raw_encap = actions->conf;
4654                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4655                                 memcpy(actions_tx, actions,
4656                                        sizeof(struct rte_flow_action));
4657                                 actions_tx++;
4658                                 encap = 1;
4659                         } else {
4660                                 rte_memcpy(actions_rx, actions,
4661                                            sizeof(struct rte_flow_action));
4662                                 actions_rx++;
4663                         }
4664                         break;
4665                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4666                         raw_decap = actions->conf;
4667                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4668                                 memcpy(actions_tx, actions,
4669                                        sizeof(struct rte_flow_action));
4670                                 actions_tx++;
4671                         } else {
4672                                 rte_memcpy(actions_rx, actions,
4673                                            sizeof(struct rte_flow_action));
4674                                 actions_rx++;
4675                         }
4676                         break;
4677                 default:
4678                         rte_memcpy(actions_rx, actions,
4679                                    sizeof(struct rte_flow_action));
4680                         actions_rx++;
4681                         break;
4682                 }
4683         }
4684         /* Add set meta action and end action for the Rx flow. */
4685         tag_action = actions_rx;
4686         tag_action->type = (enum rte_flow_action_type)
4687                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4688         actions_rx++;
4689         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4690         actions_rx++;
4691         set_tag = (void *)actions_rx;
4692         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4693                 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4694                 .data = flow_id,
4695         };
4696         MLX5_ASSERT(set_tag->id > REG_NON);
4697         tag_action->conf = set_tag;
4698         /* Create Tx item list. */
4699         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4700         addr = (void *)&pattern_tx[2];
4701         item = pattern_tx;
4702         item->type = (enum rte_flow_item_type)
4703                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4704         tag_item = (void *)addr;
4705         tag_item->data = flow_id;
4706         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4707         MLX5_ASSERT(set_tag->id > REG_NON);
4708         item->spec = tag_item;
4709         addr += sizeof(struct mlx5_rte_flow_item_tag);
4710         tag_item = (void *)addr;
4711         tag_item->data = UINT32_MAX;
4712         tag_item->id = UINT16_MAX;
4713         item->mask = tag_item;
4714         item->last = NULL;
4715         item++;
4716         item->type = RTE_FLOW_ITEM_TYPE_END;
4717         return 0;
4718 }
4719
4720 /**
4721  * The last stage of splitting chain, just creates the subflow
4722  * without any modification.
4723  *
4724  * @param[in] dev
4725  *   Pointer to Ethernet device.
4726  * @param[in] flow
4727  *   Parent flow structure pointer.
4728  * @param[in, out] sub_flow
4729  *   Pointer to return the created subflow, may be NULL.
4730  * @param[in] attr
4731  *   Flow rule attributes.
4732  * @param[in] items
4733  *   Pattern specification (list terminated by the END pattern item).
4734  * @param[in] actions
4735  *   Associated actions (list terminated by the END action).
4736  * @param[in] flow_split_info
4737  *   Pointer to flow split info structure.
4738  * @param[out] error
4739  *   Perform verbose error reporting if not NULL.
4740  * @return
4741  *   0 on success, negative value otherwise
4742  */
4743 static int
4744 flow_create_split_inner(struct rte_eth_dev *dev,
4745                         struct rte_flow *flow,
4746                         struct mlx5_flow **sub_flow,
4747                         const struct rte_flow_attr *attr,
4748                         const struct rte_flow_item items[],
4749                         const struct rte_flow_action actions[],
4750                         struct mlx5_flow_split_info *flow_split_info,
4751                         struct rte_flow_error *error)
4752 {
4753         struct mlx5_flow *dev_flow;
4754
4755         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4756                                     flow_split_info->flow_idx, error);
4757         if (!dev_flow)
4758                 return -rte_errno;
4759         dev_flow->flow = flow;
4760         dev_flow->external = flow_split_info->external;
4761         dev_flow->skip_scale = flow_split_info->skip_scale;
4762         /* Subflow object was created, we must include one in the list. */
4763         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4764                       dev_flow->handle, next);
4765         /*
4766          * If dev_flow is as one of the suffix flow, some actions in suffix
4767          * flow may need some user defined item layer flags, and pass the
4768          * Metadate rxq mark flag to suffix flow as well.
4769          */
4770         if (flow_split_info->prefix_layers)
4771                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4772         if (flow_split_info->prefix_mark)
4773                 dev_flow->handle->mark = 1;
4774         if (sub_flow)
4775                 *sub_flow = dev_flow;
4776 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4777         dev_flow->dv.table_id = flow_split_info->table_id;
4778 #endif
4779         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4780 }
4781
4782 /**
4783  * Get the sub policy of a meter.
4784  *
4785  * @param[in] dev
4786  *   Pointer to Ethernet device.
4787  * @param[in] flow
4788  *   Parent flow structure pointer.
4789  * @param wks
4790  *   Pointer to thread flow work space.
4791  * @param[in] attr
4792  *   Flow rule attributes.
4793  * @param[in] items
4794  *   Pattern specification (list terminated by the END pattern item).
4795  * @param[out] error
4796  *   Perform verbose error reporting if not NULL.
4797  *
4798  * @return
4799  *   Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
4800  */
4801 static struct mlx5_flow_meter_sub_policy *
4802 get_meter_sub_policy(struct rte_eth_dev *dev,
4803                      struct rte_flow *flow,
4804                      struct mlx5_flow_workspace *wks,
4805                      const struct rte_flow_attr *attr,
4806                      const struct rte_flow_item items[],
4807                      struct rte_flow_error *error)
4808 {
4809         struct mlx5_flow_meter_policy *policy;
4810         struct mlx5_flow_meter_policy *final_policy;
4811         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
4812
4813         policy = wks->policy;
4814         final_policy = policy->is_hierarchy ? wks->final_policy : policy;
4815         if (final_policy->is_rss || final_policy->is_queue) {
4816                 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
4817                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
4818                 uint32_t i;
4819
4820                 /*
4821                  * This is a tmp dev_flow,
4822                  * no need to register any matcher for it in translate.
4823                  */
4824                 wks->skip_matcher_reg = 1;
4825                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
4826                         struct mlx5_flow dev_flow = {0};
4827                         struct mlx5_flow_handle dev_handle = { {0} };
4828                         uint8_t fate = final_policy->act_cnt[i].fate_action;
4829
4830                         if (fate == MLX5_FLOW_FATE_SHARED_RSS) {
4831                                 const struct rte_flow_action_rss *rss_act =
4832                                         final_policy->act_cnt[i].rss->conf;
4833                                 struct rte_flow_action rss_actions[2] = {
4834                                         [0] = {
4835                                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4836                                         .conf = rss_act,
4837                                         },
4838                                         [1] = {
4839                                         .type = RTE_FLOW_ACTION_TYPE_END,
4840                                         .conf = NULL,
4841                                         }
4842                                 };
4843
4844                                 dev_flow.handle = &dev_handle;
4845                                 dev_flow.ingress = attr->ingress;
4846                                 dev_flow.flow = flow;
4847                                 dev_flow.external = 0;
4848 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4849                                 dev_flow.dv.transfer = attr->transfer;
4850 #endif
4851                                 /**
4852                                  * Translate RSS action to get rss hash fields.
4853                                  */
4854                                 if (flow_drv_translate(dev, &dev_flow, attr,
4855                                                 items, rss_actions, error))
4856                                         goto exit;
4857                                 rss_desc_v[i] = wks->rss_desc;
4858                                 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
4859                                 rss_desc_v[i].hash_fields =
4860                                                 dev_flow.hash_fields;
4861                                 rss_desc_v[i].queue_num =
4862                                                 rss_desc_v[i].hash_fields ?
4863                                                 rss_desc_v[i].queue_num : 1;
4864                                 rss_desc_v[i].tunnel =
4865                                                 !!(dev_flow.handle->layers &
4866                                                    MLX5_FLOW_LAYER_TUNNEL);
4867                                 /* Use the RSS queues in the containers. */
4868                                 rss_desc_v[i].queue =
4869                                         (uint16_t *)(uintptr_t)rss_act->queue;
4870                                 rss_desc[i] = &rss_desc_v[i];
4871                         } else if (fate == MLX5_FLOW_FATE_QUEUE) {
4872                                 /* This is queue action. */
4873                                 rss_desc_v[i] = wks->rss_desc;
4874                                 rss_desc_v[i].key_len = 0;
4875                                 rss_desc_v[i].hash_fields = 0;
4876                                 rss_desc_v[i].queue =
4877                                         &final_policy->act_cnt[i].queue;
4878                                 rss_desc_v[i].queue_num = 1;
4879                                 rss_desc[i] = &rss_desc_v[i];
4880                         } else {
4881                                 rss_desc[i] = NULL;
4882                         }
4883                 }
4884                 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
4885                                                 flow, policy, rss_desc);
4886         } else {
4887                 enum mlx5_meter_domain mtr_domain =
4888                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4889                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4890                                                 MLX5_MTR_DOMAIN_INGRESS);
4891                 sub_policy = policy->sub_policys[mtr_domain][0];
4892         }
4893         if (!sub_policy)
4894                 rte_flow_error_set(error, EINVAL,
4895                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4896                                    "Failed to get meter sub-policy.");
4897 exit:
4898         return sub_policy;
4899 }
4900
4901 /**
4902  * Split the meter flow.
4903  *
4904  * As meter flow will split to three sub flow, other than meter
4905  * action, the other actions make sense to only meter accepts
4906  * the packet. If it need to be dropped, no other additional
4907  * actions should be take.
4908  *
4909  * One kind of special action which decapsulates the L3 tunnel
4910  * header will be in the prefix sub flow, as not to take the
4911  * L3 tunnel header into account.
4912  *
4913  * @param[in] dev
4914  *   Pointer to Ethernet device.
4915  * @param[in] flow
4916  *   Parent flow structure pointer.
4917  * @param wks
4918  *   Pointer to thread flow work space.
4919  * @param[in] attr
4920  *   Flow rule attributes.
4921  * @param[in] items
4922  *   Pattern specification (list terminated by the END pattern item).
4923  * @param[out] sfx_items
4924  *   Suffix flow match items (list terminated by the END pattern item).
4925  * @param[in] actions
4926  *   Associated actions (list terminated by the END action).
4927  * @param[out] actions_sfx
4928  *   Suffix flow actions.
4929  * @param[out] actions_pre
4930  *   Prefix flow actions.
4931  * @param[out] mtr_flow_id
4932  *   Pointer to meter flow id.
4933  * @param[out] error
4934  *   Perform verbose error reporting if not NULL.
4935  *
4936  * @return
4937  *   0 on success, a negative errno value otherwise and rte_errno is set.
4938  */
4939 static int
4940 flow_meter_split_prep(struct rte_eth_dev *dev,
4941                       struct rte_flow *flow,
4942                       struct mlx5_flow_workspace *wks,
4943                       const struct rte_flow_attr *attr,
4944                       const struct rte_flow_item items[],
4945                       struct rte_flow_item sfx_items[],
4946                       const struct rte_flow_action actions[],
4947                       struct rte_flow_action actions_sfx[],
4948                       struct rte_flow_action actions_pre[],
4949                       uint32_t *mtr_flow_id,
4950                       struct rte_flow_error *error)
4951 {
4952         struct mlx5_priv *priv = dev->data->dev_private;
4953         struct mlx5_flow_meter_info *fm = wks->fm;
4954         struct rte_flow_action *tag_action = NULL;
4955         struct rte_flow_item *tag_item;
4956         struct mlx5_rte_flow_action_set_tag *set_tag;
4957         const struct rte_flow_action_raw_encap *raw_encap;
4958         const struct rte_flow_action_raw_decap *raw_decap;
4959         struct mlx5_rte_flow_item_tag *tag_item_spec;
4960         struct mlx5_rte_flow_item_tag *tag_item_mask;
4961         uint32_t tag_id = 0;
4962         struct rte_flow_item *vlan_item_dst = NULL;
4963         const struct rte_flow_item *vlan_item_src = NULL;
4964         struct rte_flow_action *hw_mtr_action;
4965         struct rte_flow_action *action_pre_head = NULL;
4966         int32_t flow_src_port = priv->representor_id;
4967         bool mtr_first;
4968         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
4969         uint8_t mtr_reg_bits = priv->mtr_reg_share ?
4970                                 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
4971         uint32_t flow_id = 0;
4972         uint32_t flow_id_reversed = 0;
4973         uint8_t flow_id_bits = 0;
4974         int shift;
4975
4976         /* Prepare the suffix subflow items. */
4977         tag_item = sfx_items++;
4978         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4979                 struct mlx5_priv *port_priv;
4980                 const struct rte_flow_item_port_id *pid_v;
4981                 int item_type = items->type;
4982
4983                 switch (item_type) {
4984                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4985                         pid_v = items->spec;
4986                         MLX5_ASSERT(pid_v);
4987                         port_priv = mlx5_port_to_eswitch_info(pid_v->id, false);
4988                         if (!port_priv)
4989                                 return rte_flow_error_set(error,
4990                                                 rte_errno,
4991                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
4992                                                 pid_v,
4993                                                 "Failed to get port info.");
4994                         flow_src_port = port_priv->representor_id;
4995                         if (!fm->def_policy && wks->policy->is_hierarchy &&
4996                             flow_src_port != priv->representor_id) {
4997                                 if (flow_drv_mtr_hierarchy_rule_create(dev,
4998                                                                 flow, fm,
4999                                                                 flow_src_port,
5000                                                                 items,
5001                                                                 error))
5002                                         return -rte_errno;
5003                         }
5004                         memcpy(sfx_items, items, sizeof(*sfx_items));
5005                         sfx_items++;
5006                         break;
5007                 case RTE_FLOW_ITEM_TYPE_VLAN:
5008                         /* Determine if copy vlan item below. */
5009                         vlan_item_src = items;
5010                         vlan_item_dst = sfx_items++;
5011                         vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID;
5012                         break;
5013                 default:
5014                         break;
5015                 }
5016         }
5017         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
5018         sfx_items++;
5019         mtr_first = priv->sh->meter_aso_en &&
5020                 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX));
5021         /* For ASO meter, meter must be before tag in TX direction. */
5022         if (mtr_first) {
5023                 action_pre_head = actions_pre++;
5024                 /* Leave space for tag action. */
5025                 tag_action = actions_pre++;
5026         }
5027         /* Prepare the actions for prefix and suffix flow. */
5028         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5029                 struct rte_flow_action *action_cur = NULL;
5030
5031                 switch (actions->type) {
5032                 case RTE_FLOW_ACTION_TYPE_METER:
5033                         if (mtr_first) {
5034                                 action_cur = action_pre_head;
5035                         } else {
5036                                 /* Leave space for tag action. */
5037                                 tag_action = actions_pre++;
5038                                 action_cur = actions_pre++;
5039                         }
5040                         break;
5041                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5042                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5043                         action_cur = actions_pre++;
5044                         break;
5045                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5046                         raw_encap = actions->conf;
5047                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
5048                                 action_cur = actions_pre++;
5049                         break;
5050                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5051                         raw_decap = actions->conf;
5052                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
5053                                 action_cur = actions_pre++;
5054                         break;
5055                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5056                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5057                         if (vlan_item_dst && vlan_item_src) {
5058                                 memcpy(vlan_item_dst, vlan_item_src,
5059                                         sizeof(*vlan_item_dst));
5060                                 /*
5061                                  * Convert to internal match item, it is used
5062                                  * for vlan push and set vid.
5063                                  */
5064                                 vlan_item_dst->type = (enum rte_flow_item_type)
5065                                                 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
5066                         }
5067                         break;
5068                 default:
5069                         break;
5070                 }
5071                 if (!action_cur)
5072                         action_cur = (fm->def_policy) ?
5073                                         actions_sfx++ : actions_pre++;
5074                 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
5075         }
5076         /* Add end action to the actions. */
5077         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
5078         if (priv->sh->meter_aso_en) {
5079                 /**
5080                  * For ASO meter, need to add an extra jump action explicitly,
5081                  * to jump from meter to policer table.
5082                  */
5083                 struct mlx5_flow_meter_sub_policy *sub_policy;
5084                 struct mlx5_flow_tbl_data_entry *tbl_data;
5085
5086                 if (!fm->def_policy) {
5087                         sub_policy = get_meter_sub_policy(dev, flow, wks,
5088                                                           attr, items, error);
5089                         if (!sub_policy)
5090                                 return -rte_errno;
5091                 } else {
5092                         enum mlx5_meter_domain mtr_domain =
5093                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
5094                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
5095                                                 MLX5_MTR_DOMAIN_INGRESS);
5096
5097                         sub_policy =
5098                         &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
5099                 }
5100                 tbl_data = container_of(sub_policy->tbl_rsc,
5101                                         struct mlx5_flow_tbl_data_entry, tbl);
5102                 hw_mtr_action = actions_pre++;
5103                 hw_mtr_action->type = (enum rte_flow_action_type)
5104                                       MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
5105                 hw_mtr_action->conf = tbl_data->jump.action;
5106         }
5107         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
5108         actions_pre++;
5109         if (!tag_action)
5110                 return rte_flow_error_set(error, ENOMEM,
5111                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5112                                           NULL, "No tag action space.");
5113         if (!mtr_flow_id) {
5114                 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
5115                 goto exit;
5116         }
5117         /* Only default-policy Meter creates mtr flow id. */
5118         if (fm->def_policy) {
5119                 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
5120                 if (!tag_id)
5121                         return rte_flow_error_set(error, ENOMEM,
5122                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5123                                         "Failed to allocate meter flow id.");
5124                 flow_id = tag_id - 1;
5125                 flow_id_bits = (!flow_id) ? 1 :
5126                                 (MLX5_REG_BITS - __builtin_clz(flow_id));
5127                 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
5128                     mtr_reg_bits) {
5129                         mlx5_ipool_free(fm->flow_ipool, tag_id);
5130                         return rte_flow_error_set(error, EINVAL,
5131                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5132                                         "Meter flow id exceeds max limit.");
5133                 }
5134                 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
5135                         priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
5136         }
5137         /* Build tag actions and items for meter_id/meter flow_id. */
5138         set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
5139         tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
5140         tag_item_mask = tag_item_spec + 1;
5141         /* Both flow_id and meter_id share the same register. */
5142         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5143                 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
5144                                                             0, error),
5145                 .offset = mtr_id_offset,
5146                 .length = mtr_reg_bits,
5147                 .data = flow->meter,
5148         };
5149         /*
5150          * The color Reg bits used by flow_id are growing from
5151          * msb to lsb, so must do bit reverse for flow_id val in RegC.
5152          */
5153         for (shift = 0; shift < flow_id_bits; shift++)
5154                 flow_id_reversed = (flow_id_reversed << 1) |
5155                                 ((flow_id >> shift) & 0x1);
5156         set_tag->data |=
5157                 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
5158         tag_item_spec->id = set_tag->id;
5159         tag_item_spec->data = set_tag->data << mtr_id_offset;
5160         tag_item_mask->data = UINT32_MAX << mtr_id_offset;
5161         tag_action->type = (enum rte_flow_action_type)
5162                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5163         tag_action->conf = set_tag;
5164         tag_item->type = (enum rte_flow_item_type)
5165                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
5166         tag_item->spec = tag_item_spec;
5167         tag_item->last = NULL;
5168         tag_item->mask = tag_item_mask;
5169 exit:
5170         if (mtr_flow_id)
5171                 *mtr_flow_id = tag_id;
5172         return 0;
5173 }
5174
5175 /**
5176  * Split action list having QUEUE/RSS for metadata register copy.
5177  *
5178  * Once Q/RSS action is detected in user's action list, the flow action
5179  * should be split in order to copy metadata registers, which will happen in
5180  * RX_CP_TBL like,
5181  *   - CQE->flow_tag := reg_c[1] (MARK)
5182  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
5183  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
5184  * This is because the last action of each flow must be a terminal action
5185  * (QUEUE, RSS or DROP).
5186  *
5187  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
5188  * stored and kept in the mlx5_flow structure per each sub_flow.
5189  *
5190  * The Q/RSS action is replaced with,
5191  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
5192  * And the following JUMP action is added at the end,
5193  *   - JUMP, to RX_CP_TBL.
5194  *
5195  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
5196  * flow_create_split_metadata() routine. The flow will look like,
5197  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
5198  *
5199  * @param dev
5200  *   Pointer to Ethernet device.
5201  * @param[out] split_actions
5202  *   Pointer to store split actions to jump to CP_TBL.
5203  * @param[in] actions
5204  *   Pointer to the list of original flow actions.
5205  * @param[in] qrss
5206  *   Pointer to the Q/RSS action.
5207  * @param[in] actions_n
5208  *   Number of original actions.
5209  * @param[out] error
5210  *   Perform verbose error reporting if not NULL.
5211  *
5212  * @return
5213  *   non-zero unique flow_id on success, otherwise 0 and
5214  *   error/rte_error are set.
5215  */
5216 static uint32_t
5217 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
5218                           struct rte_flow_action *split_actions,
5219                           const struct rte_flow_action *actions,
5220                           const struct rte_flow_action *qrss,
5221                           int actions_n, struct rte_flow_error *error)
5222 {
5223         struct mlx5_priv *priv = dev->data->dev_private;
5224         struct mlx5_rte_flow_action_set_tag *set_tag;
5225         struct rte_flow_action_jump *jump;
5226         const int qrss_idx = qrss - actions;
5227         uint32_t flow_id = 0;
5228         int ret = 0;
5229
5230         /*
5231          * Given actions will be split
5232          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
5233          * - Add jump to mreg CP_TBL.
5234          * As a result, there will be one more action.
5235          */
5236         ++actions_n;
5237         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
5238         set_tag = (void *)(split_actions + actions_n);
5239         /*
5240          * If tag action is not set to void(it means we are not the meter
5241          * suffix flow), add the tag action. Since meter suffix flow already
5242          * has the tag added.
5243          */
5244         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
5245                 /*
5246                  * Allocate the new subflow ID. This one is unique within
5247                  * device and not shared with representors. Otherwise,
5248                  * we would have to resolve multi-thread access synch
5249                  * issue. Each flow on the shared device is appended
5250                  * with source vport identifier, so the resulting
5251                  * flows will be unique in the shared (by master and
5252                  * representors) domain even if they have coinciding
5253                  * IDs.
5254                  */
5255                 mlx5_ipool_malloc(priv->sh->ipool
5256                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
5257                 if (!flow_id)
5258                         return rte_flow_error_set(error, ENOMEM,
5259                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5260                                                   NULL, "can't allocate id "
5261                                                   "for split Q/RSS subflow");
5262                 /* Internal SET_TAG action to set flow ID. */
5263                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
5264                         .data = flow_id,
5265                 };
5266                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
5267                 if (ret < 0)
5268                         return ret;
5269                 set_tag->id = ret;
5270                 /* Construct new actions array. */
5271                 /* Replace QUEUE/RSS action. */
5272                 split_actions[qrss_idx] = (struct rte_flow_action){
5273                         .type = (enum rte_flow_action_type)
5274                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5275                         .conf = set_tag,
5276                 };
5277         }
5278         /* JUMP action to jump to mreg copy table (CP_TBL). */
5279         jump = (void *)(set_tag + 1);
5280         *jump = (struct rte_flow_action_jump){
5281                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5282         };
5283         split_actions[actions_n - 2] = (struct rte_flow_action){
5284                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5285                 .conf = jump,
5286         };
5287         split_actions[actions_n - 1] = (struct rte_flow_action){
5288                 .type = RTE_FLOW_ACTION_TYPE_END,
5289         };
5290         return flow_id;
5291 }
5292
5293 /**
5294  * Extend the given action list for Tx metadata copy.
5295  *
5296  * Copy the given action list to the ext_actions and add flow metadata register
5297  * copy action in order to copy reg_a set by WQE to reg_c[0].
5298  *
5299  * @param[out] ext_actions
5300  *   Pointer to the extended action list.
5301  * @param[in] actions
5302  *   Pointer to the list of actions.
5303  * @param[in] actions_n
5304  *   Number of actions in the list.
5305  * @param[out] error
5306  *   Perform verbose error reporting if not NULL.
5307  * @param[in] encap_idx
5308  *   The encap action inndex.
5309  *
5310  * @return
5311  *   0 on success, negative value otherwise
5312  */
5313 static int
5314 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
5315                        struct rte_flow_action *ext_actions,
5316                        const struct rte_flow_action *actions,
5317                        int actions_n, struct rte_flow_error *error,
5318                        int encap_idx)
5319 {
5320         struct mlx5_flow_action_copy_mreg *cp_mreg =
5321                 (struct mlx5_flow_action_copy_mreg *)
5322                         (ext_actions + actions_n + 1);
5323         int ret;
5324
5325         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
5326         if (ret < 0)
5327                 return ret;
5328         cp_mreg->dst = ret;
5329         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
5330         if (ret < 0)
5331                 return ret;
5332         cp_mreg->src = ret;
5333         if (encap_idx != 0)
5334                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
5335         if (encap_idx == actions_n - 1) {
5336                 ext_actions[actions_n - 1] = (struct rte_flow_action){
5337                         .type = (enum rte_flow_action_type)
5338                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5339                         .conf = cp_mreg,
5340                 };
5341                 ext_actions[actions_n] = (struct rte_flow_action){
5342                         .type = RTE_FLOW_ACTION_TYPE_END,
5343                 };
5344         } else {
5345                 ext_actions[encap_idx] = (struct rte_flow_action){
5346                         .type = (enum rte_flow_action_type)
5347                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5348                         .conf = cp_mreg,
5349                 };
5350                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5351                                 sizeof(*ext_actions) * (actions_n - encap_idx));
5352         }
5353         return 0;
5354 }
5355
5356 /**
5357  * Check the match action from the action list.
5358  *
5359  * @param[in] actions
5360  *   Pointer to the list of actions.
5361  * @param[in] attr
5362  *   Flow rule attributes.
5363  * @param[in] action
5364  *   The action to be check if exist.
5365  * @param[out] match_action_pos
5366  *   Pointer to the position of the matched action if exists, otherwise is -1.
5367  * @param[out] qrss_action_pos
5368  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5369  * @param[out] modify_after_mirror
5370  *   Pointer to the flag of modify action after FDB mirroring.
5371  *
5372  * @return
5373  *   > 0 the total number of actions.
5374  *   0 if not found match action in action list.
5375  */
5376 static int
5377 flow_check_match_action(const struct rte_flow_action actions[],
5378                         const struct rte_flow_attr *attr,
5379                         enum rte_flow_action_type action,
5380                         int *match_action_pos, int *qrss_action_pos,
5381                         int *modify_after_mirror)
5382 {
5383         const struct rte_flow_action_sample *sample;
5384         const struct rte_flow_action_raw_decap *decap;
5385         int actions_n = 0;
5386         uint32_t ratio = 0;
5387         int sub_type = 0;
5388         int flag = 0;
5389         int fdb_mirror = 0;
5390
5391         *match_action_pos = -1;
5392         *qrss_action_pos = -1;
5393         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5394                 if (actions->type == action) {
5395                         flag = 1;
5396                         *match_action_pos = actions_n;
5397                 }
5398                 switch (actions->type) {
5399                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5400                 case RTE_FLOW_ACTION_TYPE_RSS:
5401                         *qrss_action_pos = actions_n;
5402                         break;
5403                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5404                         sample = actions->conf;
5405                         ratio = sample->ratio;
5406                         sub_type = ((const struct rte_flow_action *)
5407                                         (sample->actions))->type;
5408                         if (ratio == 1 && attr->transfer)
5409                                 fdb_mirror = 1;
5410                         break;
5411                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5412                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5413                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5414                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5415                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5416                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5417                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5418                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5419                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5420                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5421                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5422                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5423                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5424                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5425                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5426                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5427                 case RTE_FLOW_ACTION_TYPE_FLAG:
5428                 case RTE_FLOW_ACTION_TYPE_MARK:
5429                 case RTE_FLOW_ACTION_TYPE_SET_META:
5430                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5431                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5432                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5433                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5434                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5435                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5436                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5437                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5438                 case RTE_FLOW_ACTION_TYPE_METER:
5439                         if (fdb_mirror)
5440                                 *modify_after_mirror = 1;
5441                         break;
5442                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5443                         decap = actions->conf;
5444                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5445                                 ;
5446                         actions_n++;
5447                         if (actions->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5448                                 const struct rte_flow_action_raw_encap *encap =
5449                                                                 actions->conf;
5450                                 if (decap->size <=
5451                                         MLX5_ENCAPSULATION_DECISION_SIZE &&
5452                                     encap->size >
5453                                         MLX5_ENCAPSULATION_DECISION_SIZE)
5454                                         /* L3 encap. */
5455                                         break;
5456                         }
5457                         if (fdb_mirror)
5458                                 *modify_after_mirror = 1;
5459                         break;
5460                 default:
5461                         break;
5462                 }
5463                 actions_n++;
5464         }
5465         if (flag && fdb_mirror && !*modify_after_mirror) {
5466                 /* FDB mirroring uses the destination array to implement
5467                  * instead of FLOW_SAMPLER object.
5468                  */
5469                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5470                         flag = 0;
5471         }
5472         /* Count RTE_FLOW_ACTION_TYPE_END. */
5473         return flag ? actions_n + 1 : 0;
5474 }
5475
5476 #define SAMPLE_SUFFIX_ITEM 2
5477
5478 /**
5479  * Split the sample flow.
5480  *
5481  * As sample flow will split to two sub flow, sample flow with
5482  * sample action, the other actions will move to new suffix flow.
5483  *
5484  * Also add unique tag id with tag action in the sample flow,
5485  * the same tag id will be as match in the suffix flow.
5486  *
5487  * @param dev
5488  *   Pointer to Ethernet device.
5489  * @param[in] add_tag
5490  *   Add extra tag action flag.
5491  * @param[out] sfx_items
5492  *   Suffix flow match items (list terminated by the END pattern item).
5493  * @param[in] actions
5494  *   Associated actions (list terminated by the END action).
5495  * @param[out] actions_sfx
5496  *   Suffix flow actions.
5497  * @param[out] actions_pre
5498  *   Prefix flow actions.
5499  * @param[in] actions_n
5500  *  The total number of actions.
5501  * @param[in] sample_action_pos
5502  *   The sample action position.
5503  * @param[in] qrss_action_pos
5504  *   The Queue/RSS action position.
5505  * @param[in] jump_table
5506  *   Add extra jump action flag.
5507  * @param[out] error
5508  *   Perform verbose error reporting if not NULL.
5509  *
5510  * @return
5511  *   0 on success, or unique flow_id, a negative errno value
5512  *   otherwise and rte_errno is set.
5513  */
5514 static int
5515 flow_sample_split_prep(struct rte_eth_dev *dev,
5516                        int add_tag,
5517                        struct rte_flow_item sfx_items[],
5518                        const struct rte_flow_action actions[],
5519                        struct rte_flow_action actions_sfx[],
5520                        struct rte_flow_action actions_pre[],
5521                        int actions_n,
5522                        int sample_action_pos,
5523                        int qrss_action_pos,
5524                        int jump_table,
5525                        struct rte_flow_error *error)
5526 {
5527         struct mlx5_priv *priv = dev->data->dev_private;
5528         struct mlx5_rte_flow_action_set_tag *set_tag;
5529         struct mlx5_rte_flow_item_tag *tag_spec;
5530         struct mlx5_rte_flow_item_tag *tag_mask;
5531         struct rte_flow_action_jump *jump_action;
5532         uint32_t tag_id = 0;
5533         int index;
5534         int append_index = 0;
5535         int ret;
5536
5537         if (sample_action_pos < 0)
5538                 return rte_flow_error_set(error, EINVAL,
5539                                           RTE_FLOW_ERROR_TYPE_ACTION,
5540                                           NULL, "invalid position of sample "
5541                                           "action in list");
5542         /* Prepare the actions for prefix and suffix flow. */
5543         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5544                 index = qrss_action_pos;
5545                 /* Put the preceding the Queue/RSS action into prefix flow. */
5546                 if (index != 0)
5547                         memcpy(actions_pre, actions,
5548                                sizeof(struct rte_flow_action) * index);
5549                 /* Put others preceding the sample action into prefix flow. */
5550                 if (sample_action_pos > index + 1)
5551                         memcpy(actions_pre + index, actions + index + 1,
5552                                sizeof(struct rte_flow_action) *
5553                                (sample_action_pos - index - 1));
5554                 index = sample_action_pos - 1;
5555                 /* Put Queue/RSS action into Suffix flow. */
5556                 memcpy(actions_sfx, actions + qrss_action_pos,
5557                        sizeof(struct rte_flow_action));
5558                 actions_sfx++;
5559         } else {
5560                 index = sample_action_pos;
5561                 if (index != 0)
5562                         memcpy(actions_pre, actions,
5563                                sizeof(struct rte_flow_action) * index);
5564         }
5565         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5566          * For CX6DX and above, metadata registers Cx preserve their value,
5567          * add an extra tag action for NIC-RX and E-Switch Domain.
5568          */
5569         if (add_tag) {
5570                 /* Prepare the prefix tag action. */
5571                 append_index++;
5572                 set_tag = (void *)(actions_pre + actions_n + append_index);
5573                 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, 0, error);
5574                 if (ret < 0)
5575                         return ret;
5576                 mlx5_ipool_malloc(priv->sh->ipool
5577                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5578                 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5579                         .id = ret,
5580                         .data = tag_id,
5581                 };
5582                 /* Prepare the suffix subflow items. */
5583                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5584                 tag_spec->data = tag_id;
5585                 tag_spec->id = set_tag->id;
5586                 tag_mask = tag_spec + 1;
5587                 tag_mask->data = UINT32_MAX;
5588                 sfx_items[0] = (struct rte_flow_item){
5589                         .type = (enum rte_flow_item_type)
5590                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5591                         .spec = tag_spec,
5592                         .last = NULL,
5593                         .mask = tag_mask,
5594                 };
5595                 sfx_items[1] = (struct rte_flow_item){
5596                         .type = (enum rte_flow_item_type)
5597                                 RTE_FLOW_ITEM_TYPE_END,
5598                 };
5599                 /* Prepare the tag action in prefix subflow. */
5600                 actions_pre[index++] =
5601                         (struct rte_flow_action){
5602                         .type = (enum rte_flow_action_type)
5603                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5604                         .conf = set_tag,
5605                 };
5606         }
5607         memcpy(actions_pre + index, actions + sample_action_pos,
5608                sizeof(struct rte_flow_action));
5609         index += 1;
5610         /* For the modify action after the sample action in E-Switch mirroring,
5611          * Add the extra jump action in prefix subflow and jump into the next
5612          * table, then do the modify action in the new table.
5613          */
5614         if (jump_table) {
5615                 /* Prepare the prefix jump action. */
5616                 append_index++;
5617                 jump_action = (void *)(actions_pre + actions_n + append_index);
5618                 jump_action->group = jump_table;
5619                 actions_pre[index++] =
5620                         (struct rte_flow_action){
5621                         .type = (enum rte_flow_action_type)
5622                                 RTE_FLOW_ACTION_TYPE_JUMP,
5623                         .conf = jump_action,
5624                 };
5625         }
5626         actions_pre[index] = (struct rte_flow_action){
5627                 .type = (enum rte_flow_action_type)
5628                         RTE_FLOW_ACTION_TYPE_END,
5629         };
5630         /* Put the actions after sample into Suffix flow. */
5631         memcpy(actions_sfx, actions + sample_action_pos + 1,
5632                sizeof(struct rte_flow_action) *
5633                (actions_n - sample_action_pos - 1));
5634         return tag_id;
5635 }
5636
5637 /**
5638  * The splitting for metadata feature.
5639  *
5640  * - Q/RSS action on NIC Rx should be split in order to pass by
5641  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
5642  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
5643  *
5644  * - All the actions on NIC Tx should have a mreg copy action to
5645  *   copy reg_a from WQE to reg_c[0].
5646  *
5647  * @param dev
5648  *   Pointer to Ethernet device.
5649  * @param[in] flow
5650  *   Parent flow structure pointer.
5651  * @param[in] attr
5652  *   Flow rule attributes.
5653  * @param[in] items
5654  *   Pattern specification (list terminated by the END pattern item).
5655  * @param[in] actions
5656  *   Associated actions (list terminated by the END action).
5657  * @param[in] flow_split_info
5658  *   Pointer to flow split info structure.
5659  * @param[out] error
5660  *   Perform verbose error reporting if not NULL.
5661  * @return
5662  *   0 on success, negative value otherwise
5663  */
5664 static int
5665 flow_create_split_metadata(struct rte_eth_dev *dev,
5666                            struct rte_flow *flow,
5667                            const struct rte_flow_attr *attr,
5668                            const struct rte_flow_item items[],
5669                            const struct rte_flow_action actions[],
5670                            struct mlx5_flow_split_info *flow_split_info,
5671                            struct rte_flow_error *error)
5672 {
5673         struct mlx5_priv *priv = dev->data->dev_private;
5674         struct mlx5_dev_config *config = &priv->config;
5675         const struct rte_flow_action *qrss = NULL;
5676         struct rte_flow_action *ext_actions = NULL;
5677         struct mlx5_flow *dev_flow = NULL;
5678         uint32_t qrss_id = 0;
5679         int mtr_sfx = 0;
5680         size_t act_size;
5681         int actions_n;
5682         int encap_idx;
5683         int ret;
5684
5685         /* Check whether extensive metadata feature is engaged. */
5686         if (!config->dv_flow_en ||
5687             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5688             !mlx5_flow_ext_mreg_supported(dev))
5689                 return flow_create_split_inner(dev, flow, NULL, attr, items,
5690                                                actions, flow_split_info, error);
5691         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5692                                                            &encap_idx);
5693         if (qrss) {
5694                 /* Exclude hairpin flows from splitting. */
5695                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5696                         const struct rte_flow_action_queue *queue;
5697
5698                         queue = qrss->conf;
5699                         if (mlx5_rxq_get_type(dev, queue->index) ==
5700                             MLX5_RXQ_TYPE_HAIRPIN)
5701                                 qrss = NULL;
5702                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5703                         const struct rte_flow_action_rss *rss;
5704
5705                         rss = qrss->conf;
5706                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5707                             MLX5_RXQ_TYPE_HAIRPIN)
5708                                 qrss = NULL;
5709                 }
5710         }
5711         if (qrss) {
5712                 /* Check if it is in meter suffix table. */
5713                 mtr_sfx = attr->group == (attr->transfer ?
5714                           (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5715                           MLX5_FLOW_TABLE_LEVEL_METER);
5716                 /*
5717                  * Q/RSS action on NIC Rx should be split in order to pass by
5718                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5719                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5720                  */
5721                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5722                            sizeof(struct rte_flow_action_set_tag) +
5723                            sizeof(struct rte_flow_action_jump);
5724                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5725                                           SOCKET_ID_ANY);
5726                 if (!ext_actions)
5727                         return rte_flow_error_set(error, ENOMEM,
5728                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5729                                                   NULL, "no memory to split "
5730                                                   "metadata flow");
5731                 /*
5732                  * If we are the suffix flow of meter, tag already exist.
5733                  * Set the tag action to void.
5734                  */
5735                 if (mtr_sfx)
5736                         ext_actions[qrss - actions].type =
5737                                                 RTE_FLOW_ACTION_TYPE_VOID;
5738                 else
5739                         ext_actions[qrss - actions].type =
5740                                                 (enum rte_flow_action_type)
5741                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5742                 /*
5743                  * Create the new actions list with removed Q/RSS action
5744                  * and appended set tag and jump to register copy table
5745                  * (RX_CP_TBL). We should preallocate unique tag ID here
5746                  * in advance, because it is needed for set tag action.
5747                  */
5748                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5749                                                     qrss, actions_n, error);
5750                 if (!mtr_sfx && !qrss_id) {
5751                         ret = -rte_errno;
5752                         goto exit;
5753                 }
5754         } else if (attr->egress && !attr->transfer) {
5755                 /*
5756                  * All the actions on NIC Tx should have a metadata register
5757                  * copy action to copy reg_a from WQE to reg_c[meta]
5758                  */
5759                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5760                            sizeof(struct mlx5_flow_action_copy_mreg);
5761                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5762                                           SOCKET_ID_ANY);
5763                 if (!ext_actions)
5764                         return rte_flow_error_set(error, ENOMEM,
5765                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5766                                                   NULL, "no memory to split "
5767                                                   "metadata flow");
5768                 /* Create the action list appended with copy register. */
5769                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5770                                              actions_n, error, encap_idx);
5771                 if (ret < 0)
5772                         goto exit;
5773         }
5774         /* Add the unmodified original or prefix subflow. */
5775         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5776                                       items, ext_actions ? ext_actions :
5777                                       actions, flow_split_info, error);
5778         if (ret < 0)
5779                 goto exit;
5780         MLX5_ASSERT(dev_flow);
5781         if (qrss) {
5782                 const struct rte_flow_attr q_attr = {
5783                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5784                         .ingress = 1,
5785                 };
5786                 /* Internal PMD action to set register. */
5787                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5788                         .data = qrss_id,
5789                         .id = REG_NON,
5790                 };
5791                 struct rte_flow_item q_items[] = {
5792                         {
5793                                 .type = (enum rte_flow_item_type)
5794                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5795                                 .spec = &q_tag_spec,
5796                                 .last = NULL,
5797                                 .mask = NULL,
5798                         },
5799                         {
5800                                 .type = RTE_FLOW_ITEM_TYPE_END,
5801                         },
5802                 };
5803                 struct rte_flow_action q_actions[] = {
5804                         {
5805                                 .type = qrss->type,
5806                                 .conf = qrss->conf,
5807                         },
5808                         {
5809                                 .type = RTE_FLOW_ACTION_TYPE_END,
5810                         },
5811                 };
5812                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5813
5814                 /*
5815                  * Configure the tag item only if there is no meter subflow.
5816                  * Since tag is already marked in the meter suffix subflow
5817                  * we can just use the meter suffix items as is.
5818                  */
5819                 if (qrss_id) {
5820                         /* Not meter subflow. */
5821                         MLX5_ASSERT(!mtr_sfx);
5822                         /*
5823                          * Put unique id in prefix flow due to it is destroyed
5824                          * after suffix flow and id will be freed after there
5825                          * is no actual flows with this id and identifier
5826                          * reallocation becomes possible (for example, for
5827                          * other flows in other threads).
5828                          */
5829                         dev_flow->handle->split_flow_id = qrss_id;
5830                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5831                                                    error);
5832                         if (ret < 0)
5833                                 goto exit;
5834                         q_tag_spec.id = ret;
5835                 }
5836                 dev_flow = NULL;
5837                 /* Add suffix subflow to execute Q/RSS. */
5838                 flow_split_info->prefix_layers = layers;
5839                 flow_split_info->prefix_mark = 0;
5840                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5841                                               &q_attr, mtr_sfx ? items :
5842                                               q_items, q_actions,
5843                                               flow_split_info, error);
5844                 if (ret < 0)
5845                         goto exit;
5846                 /* qrss ID should be freed if failed. */
5847                 qrss_id = 0;
5848                 MLX5_ASSERT(dev_flow);
5849         }
5850
5851 exit:
5852         /*
5853          * We do not destroy the partially created sub_flows in case of error.
5854          * These ones are included into parent flow list and will be destroyed
5855          * by flow_drv_destroy.
5856          */
5857         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5858                         qrss_id);
5859         mlx5_free(ext_actions);
5860         return ret;
5861 }
5862
5863 /**
5864  * Create meter internal drop flow with the original pattern.
5865  *
5866  * @param dev
5867  *   Pointer to Ethernet device.
5868  * @param[in] flow
5869  *   Parent flow structure pointer.
5870  * @param[in] attr
5871  *   Flow rule attributes.
5872  * @param[in] items
5873  *   Pattern specification (list terminated by the END pattern item).
5874  * @param[in] flow_split_info
5875  *   Pointer to flow split info structure.
5876  * @param[in] fm
5877  *   Pointer to flow meter structure.
5878  * @param[out] error
5879  *   Perform verbose error reporting if not NULL.
5880  * @return
5881  *   0 on success, negative value otherwise
5882  */
5883 static uint32_t
5884 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
5885                         struct rte_flow *flow,
5886                         const struct rte_flow_attr *attr,
5887                         const struct rte_flow_item items[],
5888                         struct mlx5_flow_split_info *flow_split_info,
5889                         struct mlx5_flow_meter_info *fm,
5890                         struct rte_flow_error *error)
5891 {
5892         struct mlx5_flow *dev_flow = NULL;
5893         struct rte_flow_attr drop_attr = *attr;
5894         struct rte_flow_action drop_actions[3];
5895         struct mlx5_flow_split_info drop_split_info = *flow_split_info;
5896
5897         MLX5_ASSERT(fm->drop_cnt);
5898         drop_actions[0].type =
5899                 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
5900         drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
5901         drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
5902         drop_actions[1].conf = NULL;
5903         drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
5904         drop_actions[2].conf = NULL;
5905         drop_split_info.external = false;
5906         drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5907         drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
5908         drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
5909         return flow_create_split_inner(dev, flow, &dev_flow,
5910                                 &drop_attr, items, drop_actions,
5911                                 &drop_split_info, error);
5912 }
5913
5914 /**
5915  * The splitting for meter feature.
5916  *
5917  * - The meter flow will be split to two flows as prefix and
5918  *   suffix flow. The packets make sense only it pass the prefix
5919  *   meter action.
5920  *
5921  * - Reg_C_5 is used for the packet to match betweend prefix and
5922  *   suffix flow.
5923  *
5924  * @param dev
5925  *   Pointer to Ethernet device.
5926  * @param[in] flow
5927  *   Parent flow structure pointer.
5928  * @param[in] attr
5929  *   Flow rule attributes.
5930  * @param[in] items
5931  *   Pattern specification (list terminated by the END pattern item).
5932  * @param[in] actions
5933  *   Associated actions (list terminated by the END action).
5934  * @param[in] flow_split_info
5935  *   Pointer to flow split info structure.
5936  * @param[out] error
5937  *   Perform verbose error reporting if not NULL.
5938  * @return
5939  *   0 on success, negative value otherwise
5940  */
5941 static int
5942 flow_create_split_meter(struct rte_eth_dev *dev,
5943                         struct rte_flow *flow,
5944                         const struct rte_flow_attr *attr,
5945                         const struct rte_flow_item items[],
5946                         const struct rte_flow_action actions[],
5947                         struct mlx5_flow_split_info *flow_split_info,
5948                         struct rte_flow_error *error)
5949 {
5950         struct mlx5_priv *priv = dev->data->dev_private;
5951         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5952         struct rte_flow_action *sfx_actions = NULL;
5953         struct rte_flow_action *pre_actions = NULL;
5954         struct rte_flow_item *sfx_items = NULL;
5955         struct mlx5_flow *dev_flow = NULL;
5956         struct rte_flow_attr sfx_attr = *attr;
5957         struct mlx5_flow_meter_info *fm = NULL;
5958         uint8_t skip_scale_restore;
5959         bool has_mtr = false;
5960         bool has_modify = false;
5961         bool set_mtr_reg = true;
5962         bool is_mtr_hierarchy = false;
5963         uint32_t meter_id = 0;
5964         uint32_t mtr_idx = 0;
5965         uint32_t mtr_flow_id = 0;
5966         size_t act_size;
5967         size_t item_size;
5968         int actions_n = 0;
5969         int ret = 0;
5970
5971         if (priv->mtr_en)
5972                 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
5973                                                     &has_modify, &meter_id);
5974         if (has_mtr) {
5975                 if (flow->meter) {
5976                         fm = flow_dv_meter_find_by_idx(priv, flow->meter);
5977                         if (!fm)
5978                                 return rte_flow_error_set(error, EINVAL,
5979                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5980                                                 NULL, "Meter not found.");
5981                 } else {
5982                         fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
5983                         if (!fm)
5984                                 return rte_flow_error_set(error, EINVAL,
5985                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5986                                                 NULL, "Meter not found.");
5987                         ret = mlx5_flow_meter_attach(priv, fm,
5988                                                      &sfx_attr, error);
5989                         if (ret)
5990                                 return -rte_errno;
5991                         flow->meter = mtr_idx;
5992                 }
5993                 MLX5_ASSERT(wks);
5994                 wks->fm = fm;
5995                 if (!fm->def_policy) {
5996                         wks->policy = mlx5_flow_meter_policy_find(dev,
5997                                                                   fm->policy_id,
5998                                                                   NULL);
5999                         MLX5_ASSERT(wks->policy);
6000                         if (wks->policy->is_hierarchy) {
6001                                 wks->final_policy =
6002                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
6003                                                                 wks->policy);
6004                                 if (!wks->final_policy)
6005                                         return rte_flow_error_set(error,
6006                                         EINVAL,
6007                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6008                                 "Failed to find terminal policy of hierarchy.");
6009                                 is_mtr_hierarchy = true;
6010                         }
6011                 }
6012                 /*
6013                  * If it isn't default-policy Meter, and
6014                  * 1. There's no action in flow to change
6015                  *    packet (modify/encap/decap etc.), OR
6016                  * 2. No drop count needed for this meter.
6017                  * 3. It's not meter hierarchy.
6018                  * Then no need to use regC to save meter id anymore.
6019                  */
6020                 if (!fm->def_policy && !is_mtr_hierarchy &&
6021                     (!has_modify || !fm->drop_cnt))
6022                         set_mtr_reg = false;
6023                 /* Prefix actions: meter, decap, encap, tag, jump, end. */
6024                 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
6025                            sizeof(struct mlx5_rte_flow_action_set_tag);
6026                 /* Suffix items: tag, vlan, port id, end. */
6027 #define METER_SUFFIX_ITEM 4
6028                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
6029                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6030                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
6031                                           0, SOCKET_ID_ANY);
6032                 if (!sfx_actions)
6033                         return rte_flow_error_set(error, ENOMEM,
6034                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6035                                                   NULL, "no memory to split "
6036                                                   "meter flow");
6037                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
6038                              act_size);
6039                 /* There's no suffix flow for meter of non-default policy. */
6040                 if (!fm->def_policy)
6041                         pre_actions = sfx_actions + 1;
6042                 else
6043                         pre_actions = sfx_actions + actions_n;
6044                 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr,
6045                                             items, sfx_items, actions,
6046                                             sfx_actions, pre_actions,
6047                                             (set_mtr_reg ? &mtr_flow_id : NULL),
6048                                             error);
6049                 if (ret) {
6050                         ret = -rte_errno;
6051                         goto exit;
6052                 }
6053                 /* Add the prefix subflow. */
6054                 flow_split_info->prefix_mark = 0;
6055                 skip_scale_restore = flow_split_info->skip_scale;
6056                 flow_split_info->skip_scale |=
6057                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6058                 ret = flow_create_split_inner(dev, flow, &dev_flow,
6059                                               attr, items, pre_actions,
6060                                               flow_split_info, error);
6061                 flow_split_info->skip_scale = skip_scale_restore;
6062                 if (ret) {
6063                         if (mtr_flow_id)
6064                                 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
6065                         ret = -rte_errno;
6066                         goto exit;
6067                 }
6068                 if (mtr_flow_id) {
6069                         dev_flow->handle->split_flow_id = mtr_flow_id;
6070                         dev_flow->handle->is_meter_flow_id = 1;
6071                 }
6072                 if (!fm->def_policy) {
6073                         if (!set_mtr_reg && fm->drop_cnt)
6074                                 ret =
6075                         flow_meter_create_drop_flow_with_org_pattern(dev, flow,
6076                                                         &sfx_attr, items,
6077                                                         flow_split_info,
6078                                                         fm, error);
6079                         goto exit;
6080                 }
6081                 /* Setting the sfx group atrr. */
6082                 sfx_attr.group = sfx_attr.transfer ?
6083                                 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
6084                                  MLX5_FLOW_TABLE_LEVEL_METER;
6085                 flow_split_info->prefix_layers =
6086                                 flow_get_prefix_layer_flags(dev_flow);
6087                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6088                 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
6089         }
6090         /* Add the prefix subflow. */
6091         ret = flow_create_split_metadata(dev, flow,
6092                                          &sfx_attr, sfx_items ?
6093                                          sfx_items : items,
6094                                          sfx_actions ? sfx_actions : actions,
6095                                          flow_split_info, error);
6096 exit:
6097         if (sfx_actions)
6098                 mlx5_free(sfx_actions);
6099         return ret;
6100 }
6101
6102 /**
6103  * The splitting for sample feature.
6104  *
6105  * Once Sample action is detected in the action list, the flow actions should
6106  * be split into prefix sub flow and suffix sub flow.
6107  *
6108  * The original items remain in the prefix sub flow, all actions preceding the
6109  * sample action and the sample action itself will be copied to the prefix
6110  * sub flow, the actions following the sample action will be copied to the
6111  * suffix sub flow, Queue action always be located in the suffix sub flow.
6112  *
6113  * In order to make the packet from prefix sub flow matches with suffix sub
6114  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
6115  * flow uses tag item with the unique flow id.
6116  *
6117  * @param dev
6118  *   Pointer to Ethernet device.
6119  * @param[in] flow
6120  *   Parent flow structure pointer.
6121  * @param[in] attr
6122  *   Flow rule attributes.
6123  * @param[in] items
6124  *   Pattern specification (list terminated by the END pattern item).
6125  * @param[in] actions
6126  *   Associated actions (list terminated by the END action).
6127  * @param[in] flow_split_info
6128  *   Pointer to flow split info structure.
6129  * @param[out] error
6130  *   Perform verbose error reporting if not NULL.
6131  * @return
6132  *   0 on success, negative value otherwise
6133  */
6134 static int
6135 flow_create_split_sample(struct rte_eth_dev *dev,
6136                          struct rte_flow *flow,
6137                          const struct rte_flow_attr *attr,
6138                          const struct rte_flow_item items[],
6139                          const struct rte_flow_action actions[],
6140                          struct mlx5_flow_split_info *flow_split_info,
6141                          struct rte_flow_error *error)
6142 {
6143         struct mlx5_priv *priv = dev->data->dev_private;
6144         struct rte_flow_action *sfx_actions = NULL;
6145         struct rte_flow_action *pre_actions = NULL;
6146         struct rte_flow_item *sfx_items = NULL;
6147         struct mlx5_flow *dev_flow = NULL;
6148         struct rte_flow_attr sfx_attr = *attr;
6149 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6150         struct mlx5_flow_dv_sample_resource *sample_res;
6151         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
6152         struct mlx5_flow_tbl_resource *sfx_tbl;
6153 #endif
6154         size_t act_size;
6155         size_t item_size;
6156         uint32_t fdb_tx = 0;
6157         int32_t tag_id = 0;
6158         int actions_n = 0;
6159         int sample_action_pos;
6160         int qrss_action_pos;
6161         int add_tag = 0;
6162         int modify_after_mirror = 0;
6163         uint16_t jump_table = 0;
6164         const uint32_t next_ft_step = 1;
6165         int ret = 0;
6166
6167         if (priv->sampler_en)
6168                 actions_n = flow_check_match_action(actions, attr,
6169                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
6170                                         &sample_action_pos, &qrss_action_pos,
6171                                         &modify_after_mirror);
6172         if (actions_n) {
6173                 /* The prefix actions must includes sample, tag, end. */
6174                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
6175                            + sizeof(struct mlx5_rte_flow_action_set_tag);
6176                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
6177                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6178                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
6179                                           item_size), 0, SOCKET_ID_ANY);
6180                 if (!sfx_actions)
6181                         return rte_flow_error_set(error, ENOMEM,
6182                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6183                                                   NULL, "no memory to split "
6184                                                   "sample flow");
6185                 /* The representor_id is UINT16_MAX for uplink. */
6186                 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX);
6187                 /*
6188                  * When reg_c_preserve is set, metadata registers Cx preserve
6189                  * their value even through packet duplication.
6190                  */
6191                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
6192                 if (add_tag)
6193                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
6194                                         + act_size);
6195                 if (modify_after_mirror)
6196                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
6197                                      next_ft_step;
6198                 pre_actions = sfx_actions + actions_n;
6199                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
6200                                                 actions, sfx_actions,
6201                                                 pre_actions, actions_n,
6202                                                 sample_action_pos,
6203                                                 qrss_action_pos, jump_table,
6204                                                 error);
6205                 if (tag_id < 0 || (add_tag && !tag_id)) {
6206                         ret = -rte_errno;
6207                         goto exit;
6208                 }
6209                 if (modify_after_mirror)
6210                         flow_split_info->skip_scale =
6211                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6212                 /* Add the prefix subflow. */
6213                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6214                                               items, pre_actions,
6215                                               flow_split_info, error);
6216                 if (ret) {
6217                         ret = -rte_errno;
6218                         goto exit;
6219                 }
6220                 dev_flow->handle->split_flow_id = tag_id;
6221 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6222                 if (!modify_after_mirror) {
6223                         /* Set the sfx group attr. */
6224                         sample_res = (struct mlx5_flow_dv_sample_resource *)
6225                                                 dev_flow->dv.sample_res;
6226                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
6227                                                 sample_res->normal_path_tbl;
6228                         sfx_tbl_data = container_of(sfx_tbl,
6229                                                 struct mlx5_flow_tbl_data_entry,
6230                                                 tbl);
6231                         sfx_attr.group = sfx_attr.transfer ?
6232                         (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
6233                 } else {
6234                         MLX5_ASSERT(attr->transfer);
6235                         sfx_attr.group = jump_table;
6236                 }
6237                 flow_split_info->prefix_layers =
6238                                 flow_get_prefix_layer_flags(dev_flow);
6239                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6240                 /* Suffix group level already be scaled with factor, set
6241                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
6242                  * again in translation.
6243                  */
6244                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6245 #endif
6246         }
6247         /* Add the suffix subflow. */
6248         ret = flow_create_split_meter(dev, flow, &sfx_attr,
6249                                       sfx_items ? sfx_items : items,
6250                                       sfx_actions ? sfx_actions : actions,
6251                                       flow_split_info, error);
6252 exit:
6253         if (sfx_actions)
6254                 mlx5_free(sfx_actions);
6255         return ret;
6256 }
6257
6258 /**
6259  * Split the flow to subflow set. The splitters might be linked
6260  * in the chain, like this:
6261  * flow_create_split_outer() calls:
6262  *   flow_create_split_meter() calls:
6263  *     flow_create_split_metadata(meter_subflow_0) calls:
6264  *       flow_create_split_inner(metadata_subflow_0)
6265  *       flow_create_split_inner(metadata_subflow_1)
6266  *       flow_create_split_inner(metadata_subflow_2)
6267  *     flow_create_split_metadata(meter_subflow_1) calls:
6268  *       flow_create_split_inner(metadata_subflow_0)
6269  *       flow_create_split_inner(metadata_subflow_1)
6270  *       flow_create_split_inner(metadata_subflow_2)
6271  *
6272  * This provide flexible way to add new levels of flow splitting.
6273  * The all of successfully created subflows are included to the
6274  * parent flow dev_flow list.
6275  *
6276  * @param dev
6277  *   Pointer to Ethernet device.
6278  * @param[in] flow
6279  *   Parent flow structure pointer.
6280  * @param[in] attr
6281  *   Flow rule attributes.
6282  * @param[in] items
6283  *   Pattern specification (list terminated by the END pattern item).
6284  * @param[in] actions
6285  *   Associated actions (list terminated by the END action).
6286  * @param[in] flow_split_info
6287  *   Pointer to flow split info structure.
6288  * @param[out] error
6289  *   Perform verbose error reporting if not NULL.
6290  * @return
6291  *   0 on success, negative value otherwise
6292  */
6293 static int
6294 flow_create_split_outer(struct rte_eth_dev *dev,
6295                         struct rte_flow *flow,
6296                         const struct rte_flow_attr *attr,
6297                         const struct rte_flow_item items[],
6298                         const struct rte_flow_action actions[],
6299                         struct mlx5_flow_split_info *flow_split_info,
6300                         struct rte_flow_error *error)
6301 {
6302         int ret;
6303
6304         ret = flow_create_split_sample(dev, flow, attr, items,
6305                                        actions, flow_split_info, error);
6306         MLX5_ASSERT(ret <= 0);
6307         return ret;
6308 }
6309
6310 static inline struct mlx5_flow_tunnel *
6311 flow_tunnel_from_rule(const struct mlx5_flow *flow)
6312 {
6313         struct mlx5_flow_tunnel *tunnel;
6314
6315 #pragma GCC diagnostic push
6316 #pragma GCC diagnostic ignored "-Wcast-qual"
6317         tunnel = (typeof(tunnel))flow->tunnel;
6318 #pragma GCC diagnostic pop
6319
6320         return tunnel;
6321 }
6322
6323 /**
6324  * Adjust flow RSS workspace if needed.
6325  *
6326  * @param wks
6327  *   Pointer to thread flow work space.
6328  * @param rss_desc
6329  *   Pointer to RSS descriptor.
6330  * @param[in] nrssq_num
6331  *   New RSS queue number.
6332  *
6333  * @return
6334  *   0 on success, -1 otherwise and rte_errno is set.
6335  */
6336 static int
6337 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
6338                           struct mlx5_flow_rss_desc *rss_desc,
6339                           uint32_t nrssq_num)
6340 {
6341         if (likely(nrssq_num <= wks->rssq_num))
6342                 return 0;
6343         rss_desc->queue = realloc(rss_desc->queue,
6344                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
6345         if (!rss_desc->queue) {
6346                 rte_errno = ENOMEM;
6347                 return -1;
6348         }
6349         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
6350         return 0;
6351 }
6352
6353 /**
6354  * Create a flow and add it to @p list.
6355  *
6356  * @param dev
6357  *   Pointer to Ethernet device.
6358  * @param list
6359  *   Pointer to a TAILQ flow list. If this parameter NULL,
6360  *   no list insertion occurred, flow is just created,
6361  *   this is caller's responsibility to track the
6362  *   created flow.
6363  * @param[in] attr
6364  *   Flow rule attributes.
6365  * @param[in] items
6366  *   Pattern specification (list terminated by the END pattern item).
6367  * @param[in] actions
6368  *   Associated actions (list terminated by the END action).
6369  * @param[in] external
6370  *   This flow rule is created by request external to PMD.
6371  * @param[out] error
6372  *   Perform verbose error reporting if not NULL.
6373  *
6374  * @return
6375  *   A flow index on success, 0 otherwise and rte_errno is set.
6376  */
6377 static uint32_t
6378 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6379                  const struct rte_flow_attr *attr,
6380                  const struct rte_flow_item items[],
6381                  const struct rte_flow_action original_actions[],
6382                  bool external, struct rte_flow_error *error)
6383 {
6384         struct mlx5_priv *priv = dev->data->dev_private;
6385         struct rte_flow *flow = NULL;
6386         struct mlx5_flow *dev_flow;
6387         const struct rte_flow_action_rss *rss = NULL;
6388         struct mlx5_translated_action_handle
6389                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6390         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6391         union {
6392                 struct mlx5_flow_expand_rss buf;
6393                 uint8_t buffer[4096];
6394         } expand_buffer;
6395         union {
6396                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6397                 uint8_t buffer[2048];
6398         } actions_rx;
6399         union {
6400                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6401                 uint8_t buffer[2048];
6402         } actions_hairpin_tx;
6403         union {
6404                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6405                 uint8_t buffer[2048];
6406         } items_tx;
6407         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6408         struct mlx5_flow_rss_desc *rss_desc;
6409         const struct rte_flow_action *p_actions_rx;
6410         uint32_t i;
6411         uint32_t idx = 0;
6412         int hairpin_flow;
6413         struct rte_flow_attr attr_tx = { .priority = 0 };
6414         const struct rte_flow_action *actions;
6415         struct rte_flow_action *translated_actions = NULL;
6416         struct mlx5_flow_tunnel *tunnel;
6417         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6418         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6419         struct mlx5_flow_split_info flow_split_info = {
6420                 .external = !!external,
6421                 .skip_scale = 0,
6422                 .flow_idx = 0,
6423                 .prefix_mark = 0,
6424                 .prefix_layers = 0,
6425                 .table_id = 0
6426         };
6427         int ret;
6428
6429         MLX5_ASSERT(wks);
6430         rss_desc = &wks->rss_desc;
6431         ret = flow_action_handles_translate(dev, original_actions,
6432                                             indir_actions,
6433                                             &indir_actions_n,
6434                                             &translated_actions, error);
6435         if (ret < 0) {
6436                 MLX5_ASSERT(translated_actions == NULL);
6437                 return 0;
6438         }
6439         actions = translated_actions ? translated_actions : original_actions;
6440         p_actions_rx = actions;
6441         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6442         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6443                                 external, hairpin_flow, error);
6444         if (ret < 0)
6445                 goto error_before_hairpin_split;
6446         flow = mlx5_ipool_zmalloc(priv->flows[type], &idx);
6447         if (!flow) {
6448                 rte_errno = ENOMEM;
6449                 goto error_before_hairpin_split;
6450         }
6451         if (hairpin_flow > 0) {
6452                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6453                         rte_errno = EINVAL;
6454                         goto error_before_hairpin_split;
6455                 }
6456                 flow_hairpin_split(dev, actions, actions_rx.actions,
6457                                    actions_hairpin_tx.actions, items_tx.items,
6458                                    idx);
6459                 p_actions_rx = actions_rx.actions;
6460         }
6461         flow_split_info.flow_idx = idx;
6462         flow->drv_type = flow_get_drv_type(dev, attr);
6463         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6464                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
6465         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6466         /* RSS Action only works on NIC RX domain */
6467         if (attr->ingress && !attr->transfer)
6468                 rss = flow_get_rss_action(dev, p_actions_rx);
6469         if (rss) {
6470                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6471                         return 0;
6472                 /*
6473                  * The following information is required by
6474                  * mlx5_flow_hashfields_adjust() in advance.
6475                  */
6476                 rss_desc->level = rss->level;
6477                 /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
6478                 rss_desc->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
6479         }
6480         flow->dev_handles = 0;
6481         if (rss && rss->types) {
6482                 unsigned int graph_root;
6483
6484                 graph_root = find_graph_root(rss->level);
6485                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6486                                            items, rss->types,
6487                                            mlx5_support_expansion, graph_root);
6488                 MLX5_ASSERT(ret > 0 &&
6489                        (unsigned int)ret < sizeof(expand_buffer.buffer));
6490                 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) {
6491                         for (i = 0; i < buf->entries; ++i)
6492                                 mlx5_dbg__print_pattern(buf->entry[i].pattern);
6493                 }
6494         } else {
6495                 buf->entries = 1;
6496                 buf->entry[0].pattern = (void *)(uintptr_t)items;
6497         }
6498         rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6499                                                       indir_actions_n);
6500         for (i = 0; i < buf->entries; ++i) {
6501                 /* Initialize flow split data. */
6502                 flow_split_info.prefix_layers = 0;
6503                 flow_split_info.prefix_mark = 0;
6504                 flow_split_info.skip_scale = 0;
6505                 /*
6506                  * The splitter may create multiple dev_flows,
6507                  * depending on configuration. In the simplest
6508                  * case it just creates unmodified original flow.
6509                  */
6510                 ret = flow_create_split_outer(dev, flow, attr,
6511                                               buf->entry[i].pattern,
6512                                               p_actions_rx, &flow_split_info,
6513                                               error);
6514                 if (ret < 0)
6515                         goto error;
6516                 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) {
6517                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
6518                                                            p_actions_rx,
6519                                                            idx,
6520                                                            wks->flows[0].tunnel,
6521                                                            &default_miss_ctx,
6522                                                            error);
6523                         if (ret < 0) {
6524                                 mlx5_free(default_miss_ctx.queue);
6525                                 goto error;
6526                         }
6527                 }
6528         }
6529         /* Create the tx flow. */
6530         if (hairpin_flow) {
6531                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6532                 attr_tx.ingress = 0;
6533                 attr_tx.egress = 1;
6534                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6535                                          actions_hairpin_tx.actions,
6536                                          idx, error);
6537                 if (!dev_flow)
6538                         goto error;
6539                 dev_flow->flow = flow;
6540                 dev_flow->external = 0;
6541                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6542                               dev_flow->handle, next);
6543                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6544                                          items_tx.items,
6545                                          actions_hairpin_tx.actions, error);
6546                 if (ret < 0)
6547                         goto error;
6548         }
6549         /*
6550          * Update the metadata register copy table. If extensive
6551          * metadata feature is enabled and registers are supported
6552          * we might create the extra rte_flow for each unique
6553          * MARK/FLAG action ID.
6554          *
6555          * The table is updated for ingress Flows only, because
6556          * the egress Flows belong to the different device and
6557          * copy table should be updated in peer NIC Rx domain.
6558          */
6559         if (attr->ingress &&
6560             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6561                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6562                 if (ret)
6563                         goto error;
6564         }
6565         /*
6566          * If the flow is external (from application) OR device is started,
6567          * OR mreg discover, then apply immediately.
6568          */
6569         if (external || dev->data->dev_started ||
6570             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6571              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6572                 ret = flow_drv_apply(dev, flow, error);
6573                 if (ret < 0)
6574                         goto error;
6575         }
6576         flow->type = type;
6577         flow_rxq_flags_set(dev, flow);
6578         rte_free(translated_actions);
6579         tunnel = flow_tunnel_from_rule(wks->flows);
6580         if (tunnel) {
6581                 flow->tunnel = 1;
6582                 flow->tunnel_id = tunnel->tunnel_id;
6583                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6584                 mlx5_free(default_miss_ctx.queue);
6585         }
6586         mlx5_flow_pop_thread_workspace();
6587         return idx;
6588 error:
6589         MLX5_ASSERT(flow);
6590         ret = rte_errno; /* Save rte_errno before cleanup. */
6591         flow_mreg_del_copy_action(dev, flow);
6592         flow_drv_destroy(dev, flow);
6593         if (rss_desc->shared_rss)
6594                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6595                         mlx5_ipool_get
6596                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6597                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6598         mlx5_ipool_free(priv->flows[type], idx);
6599         rte_errno = ret; /* Restore rte_errno. */
6600         ret = rte_errno;
6601         rte_errno = ret;
6602         mlx5_flow_pop_thread_workspace();
6603 error_before_hairpin_split:
6604         rte_free(translated_actions);
6605         return 0;
6606 }
6607
6608 /**
6609  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6610  * incoming packets to table 1.
6611  *
6612  * Other flow rules, requested for group n, will be created in
6613  * e-switch table n+1.
6614  * Jump action to e-switch group n will be created to group n+1.
6615  *
6616  * Used when working in switchdev mode, to utilise advantages of table 1
6617  * and above.
6618  *
6619  * @param dev
6620  *   Pointer to Ethernet device.
6621  *
6622  * @return
6623  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
6624  */
6625 struct rte_flow *
6626 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6627 {
6628         const struct rte_flow_attr attr = {
6629                 .group = 0,
6630                 .priority = 0,
6631                 .ingress = 1,
6632                 .egress = 0,
6633                 .transfer = 1,
6634         };
6635         const struct rte_flow_item pattern = {
6636                 .type = RTE_FLOW_ITEM_TYPE_END,
6637         };
6638         struct rte_flow_action_jump jump = {
6639                 .group = 1,
6640         };
6641         const struct rte_flow_action actions[] = {
6642                 {
6643                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6644                         .conf = &jump,
6645                 },
6646                 {
6647                         .type = RTE_FLOW_ACTION_TYPE_END,
6648                 },
6649         };
6650         struct rte_flow_error error;
6651
6652         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6653                                                    &attr, &pattern,
6654                                                    actions, false, &error);
6655 }
6656
6657 /**
6658  * Create a dedicated flow rule on e-switch table 1, matches ESW manager
6659  * and sq number, directs all packets to peer vport.
6660  *
6661  * @param dev
6662  *   Pointer to Ethernet device.
6663  * @param txq
6664  *   Txq index.
6665  *
6666  * @return
6667  *   Flow ID on success, 0 otherwise and rte_errno is set.
6668  */
6669 uint32_t
6670 mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev, uint32_t txq)
6671 {
6672         struct rte_flow_attr attr = {
6673                 .group = 0,
6674                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6675                 .ingress = 1,
6676                 .egress = 0,
6677                 .transfer = 1,
6678         };
6679         struct rte_flow_item_port_id port_spec = {
6680                 .id = MLX5_PORT_ESW_MGR,
6681         };
6682         struct mlx5_rte_flow_item_tx_queue txq_spec = {
6683                 .queue = txq,
6684         };
6685         struct rte_flow_item pattern[] = {
6686                 {
6687                         .type = RTE_FLOW_ITEM_TYPE_PORT_ID,
6688                         .spec = &port_spec,
6689                 },
6690                 {
6691                         .type = (enum rte_flow_item_type)
6692                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6693                         .spec = &txq_spec,
6694                 },
6695                 {
6696                         .type = RTE_FLOW_ITEM_TYPE_END,
6697                 },
6698         };
6699         struct rte_flow_action_jump jump = {
6700                 .group = 1,
6701         };
6702         struct rte_flow_action_port_id port = {
6703                 .id = dev->data->port_id,
6704         };
6705         struct rte_flow_action actions[] = {
6706                 {
6707                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6708                         .conf = &jump,
6709                 },
6710                 {
6711                         .type = RTE_FLOW_ACTION_TYPE_END,
6712                 },
6713         };
6714         struct rte_flow_error error;
6715
6716         /*
6717          * Creates group 0, highest priority jump flow.
6718          * Matches txq to bypass kernel packets.
6719          */
6720         if (flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern, actions,
6721                              false, &error) == 0)
6722                 return 0;
6723         /* Create group 1, lowest priority redirect flow for txq. */
6724         attr.group = 1;
6725         actions[0].conf = &port;
6726         actions[0].type = RTE_FLOW_ACTION_TYPE_PORT_ID;
6727         return flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern,
6728                                 actions, false, &error);
6729 }
6730
6731 /**
6732  * Validate a flow supported by the NIC.
6733  *
6734  * @see rte_flow_validate()
6735  * @see rte_flow_ops
6736  */
6737 int
6738 mlx5_flow_validate(struct rte_eth_dev *dev,
6739                    const struct rte_flow_attr *attr,
6740                    const struct rte_flow_item items[],
6741                    const struct rte_flow_action original_actions[],
6742                    struct rte_flow_error *error)
6743 {
6744         int hairpin_flow;
6745         struct mlx5_translated_action_handle
6746                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6747         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6748         const struct rte_flow_action *actions;
6749         struct rte_flow_action *translated_actions = NULL;
6750         int ret = flow_action_handles_translate(dev, original_actions,
6751                                                 indir_actions,
6752                                                 &indir_actions_n,
6753                                                 &translated_actions, error);
6754
6755         if (ret)
6756                 return ret;
6757         actions = translated_actions ? translated_actions : original_actions;
6758         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6759         ret = flow_drv_validate(dev, attr, items, actions,
6760                                 true, hairpin_flow, error);
6761         rte_free(translated_actions);
6762         return ret;
6763 }
6764
6765 /**
6766  * Create a flow.
6767  *
6768  * @see rte_flow_create()
6769  * @see rte_flow_ops
6770  */
6771 struct rte_flow *
6772 mlx5_flow_create(struct rte_eth_dev *dev,
6773                  const struct rte_flow_attr *attr,
6774                  const struct rte_flow_item items[],
6775                  const struct rte_flow_action actions[],
6776                  struct rte_flow_error *error)
6777 {
6778         /*
6779          * If the device is not started yet, it is not allowed to created a
6780          * flow from application. PMD default flows and traffic control flows
6781          * are not affected.
6782          */
6783         if (unlikely(!dev->data->dev_started)) {
6784                 DRV_LOG(DEBUG, "port %u is not started when "
6785                         "inserting a flow", dev->data->port_id);
6786                 rte_flow_error_set(error, ENODEV,
6787                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6788                                    NULL,
6789                                    "port not started");
6790                 return NULL;
6791         }
6792
6793         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN,
6794                                                    attr, items, actions,
6795                                                    true, error);
6796 }
6797
6798 /**
6799  * Destroy a flow in a list.
6800  *
6801  * @param dev
6802  *   Pointer to Ethernet device.
6803  * @param[in] flow_idx
6804  *   Index of flow to destroy.
6805  */
6806 static void
6807 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6808                   uint32_t flow_idx)
6809 {
6810         struct mlx5_priv *priv = dev->data->dev_private;
6811         struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx);
6812
6813         if (!flow)
6814                 return;
6815         MLX5_ASSERT(flow->type == type);
6816         /*
6817          * Update RX queue flags only if port is started, otherwise it is
6818          * already clean.
6819          */
6820         if (dev->data->dev_started)
6821                 flow_rxq_flags_trim(dev, flow);
6822         flow_drv_destroy(dev, flow);
6823         if (flow->tunnel) {
6824                 struct mlx5_flow_tunnel *tunnel;
6825
6826                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6827                 RTE_VERIFY(tunnel);
6828                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6829                         mlx5_flow_tunnel_free(dev, tunnel);
6830         }
6831         flow_mreg_del_copy_action(dev, flow);
6832         mlx5_ipool_free(priv->flows[type], flow_idx);
6833 }
6834
6835 /**
6836  * Destroy all flows.
6837  *
6838  * @param dev
6839  *   Pointer to Ethernet device.
6840  * @param type
6841  *   Flow type to be flushed.
6842  * @param active
6843  *   If flushing is called avtively.
6844  */
6845 void
6846 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6847                      bool active)
6848 {
6849         struct mlx5_priv *priv = dev->data->dev_private;
6850         uint32_t num_flushed = 0, fidx = 1;
6851         struct rte_flow *flow;
6852
6853         MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) {
6854                 flow_list_destroy(dev, type, fidx);
6855                 num_flushed++;
6856         }
6857         if (active) {
6858                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
6859                         dev->data->port_id, num_flushed);
6860         }
6861 }
6862
6863 /**
6864  * Stop all default actions for flows.
6865  *
6866  * @param dev
6867  *   Pointer to Ethernet device.
6868  */
6869 void
6870 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6871 {
6872         flow_mreg_del_default_copy_action(dev);
6873         flow_rxq_flags_clear(dev);
6874 }
6875
6876 /**
6877  * Start all default actions for flows.
6878  *
6879  * @param dev
6880  *   Pointer to Ethernet device.
6881  * @return
6882  *   0 on success, a negative errno value otherwise and rte_errno is set.
6883  */
6884 int
6885 mlx5_flow_start_default(struct rte_eth_dev *dev)
6886 {
6887         struct rte_flow_error error;
6888
6889         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6890         return flow_mreg_add_default_copy_action(dev, &error);
6891 }
6892
6893 /**
6894  * Release key of thread specific flow workspace data.
6895  */
6896 void
6897 flow_release_workspace(void *data)
6898 {
6899         struct mlx5_flow_workspace *wks = data;
6900         struct mlx5_flow_workspace *next;
6901
6902         while (wks) {
6903                 next = wks->next;
6904                 free(wks->rss_desc.queue);
6905                 free(wks);
6906                 wks = next;
6907         }
6908 }
6909
6910 /**
6911  * Get thread specific current flow workspace.
6912  *
6913  * @return pointer to thread specific flow workspace data, NULL on error.
6914  */
6915 struct mlx5_flow_workspace*
6916 mlx5_flow_get_thread_workspace(void)
6917 {
6918         struct mlx5_flow_workspace *data;
6919
6920         data = mlx5_flow_os_get_specific_workspace();
6921         MLX5_ASSERT(data && data->inuse);
6922         if (!data || !data->inuse)
6923                 DRV_LOG(ERR, "flow workspace not initialized.");
6924         return data;
6925 }
6926
6927 /**
6928  * Allocate and init new flow workspace.
6929  *
6930  * @return pointer to flow workspace data, NULL on error.
6931  */
6932 static struct mlx5_flow_workspace*
6933 flow_alloc_thread_workspace(void)
6934 {
6935         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6936
6937         if (!data) {
6938                 DRV_LOG(ERR, "Failed to allocate flow workspace "
6939                         "memory.");
6940                 return NULL;
6941         }
6942         data->rss_desc.queue = calloc(1,
6943                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6944         if (!data->rss_desc.queue)
6945                 goto err;
6946         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6947         return data;
6948 err:
6949         if (data->rss_desc.queue)
6950                 free(data->rss_desc.queue);
6951         free(data);
6952         return NULL;
6953 }
6954
6955 /**
6956  * Get new thread specific flow workspace.
6957  *
6958  * If current workspace inuse, create new one and set as current.
6959  *
6960  * @return pointer to thread specific flow workspace data, NULL on error.
6961  */
6962 static struct mlx5_flow_workspace*
6963 mlx5_flow_push_thread_workspace(void)
6964 {
6965         struct mlx5_flow_workspace *curr;
6966         struct mlx5_flow_workspace *data;
6967
6968         curr = mlx5_flow_os_get_specific_workspace();
6969         if (!curr) {
6970                 data = flow_alloc_thread_workspace();
6971                 if (!data)
6972                         return NULL;
6973         } else if (!curr->inuse) {
6974                 data = curr;
6975         } else if (curr->next) {
6976                 data = curr->next;
6977         } else {
6978                 data = flow_alloc_thread_workspace();
6979                 if (!data)
6980                         return NULL;
6981                 curr->next = data;
6982                 data->prev = curr;
6983         }
6984         data->inuse = 1;
6985         data->flow_idx = 0;
6986         /* Set as current workspace */
6987         if (mlx5_flow_os_set_specific_workspace(data))
6988                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
6989         return data;
6990 }
6991
6992 /**
6993  * Close current thread specific flow workspace.
6994  *
6995  * If previous workspace available, set it as current.
6996  *
6997  * @return pointer to thread specific flow workspace data, NULL on error.
6998  */
6999 static void
7000 mlx5_flow_pop_thread_workspace(void)
7001 {
7002         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
7003
7004         if (!data)
7005                 return;
7006         if (!data->inuse) {
7007                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
7008                 return;
7009         }
7010         data->inuse = 0;
7011         if (!data->prev)
7012                 return;
7013         if (mlx5_flow_os_set_specific_workspace(data->prev))
7014                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
7015 }
7016
7017 /**
7018  * Verify the flow list is empty
7019  *
7020  * @param dev
7021  *  Pointer to Ethernet device.
7022  *
7023  * @return the number of flows not released.
7024  */
7025 int
7026 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused)
7027 {
7028         struct mlx5_priv *priv = dev->data->dev_private;
7029         struct rte_flow *flow;
7030         uint32_t idx = 0;
7031         int ret = 0, i;
7032
7033         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
7034                 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) {
7035                         DRV_LOG(DEBUG, "port %u flow %p still referenced",
7036                                 dev->data->port_id, (void *)flow);
7037                         ret++;
7038                 }
7039         }
7040         return ret;
7041 }
7042
7043 /**
7044  * Enable default hairpin egress flow.
7045  *
7046  * @param dev
7047  *   Pointer to Ethernet device.
7048  * @param queue
7049  *   The queue index.
7050  *
7051  * @return
7052  *   0 on success, a negative errno value otherwise and rte_errno is set.
7053  */
7054 int
7055 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
7056                             uint32_t queue)
7057 {
7058         const struct rte_flow_attr attr = {
7059                 .egress = 1,
7060                 .priority = 0,
7061         };
7062         struct mlx5_rte_flow_item_tx_queue queue_spec = {
7063                 .queue = queue,
7064         };
7065         struct mlx5_rte_flow_item_tx_queue queue_mask = {
7066                 .queue = UINT32_MAX,
7067         };
7068         struct rte_flow_item items[] = {
7069                 {
7070                         .type = (enum rte_flow_item_type)
7071                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
7072                         .spec = &queue_spec,
7073                         .last = NULL,
7074                         .mask = &queue_mask,
7075                 },
7076                 {
7077                         .type = RTE_FLOW_ITEM_TYPE_END,
7078                 },
7079         };
7080         struct rte_flow_action_jump jump = {
7081                 .group = MLX5_HAIRPIN_TX_TABLE,
7082         };
7083         struct rte_flow_action actions[2];
7084         uint32_t flow_idx;
7085         struct rte_flow_error error;
7086
7087         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
7088         actions[0].conf = &jump;
7089         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
7090         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7091                                     &attr, items, actions, false, &error);
7092         if (!flow_idx) {
7093                 DRV_LOG(DEBUG,
7094                         "Failed to create ctrl flow: rte_errno(%d),"
7095                         " type(%d), message(%s)",
7096                         rte_errno, error.type,
7097                         error.message ? error.message : " (no stated reason)");
7098                 return -rte_errno;
7099         }
7100         return 0;
7101 }
7102
7103 /**
7104  * Enable a control flow configured from the control plane.
7105  *
7106  * @param dev
7107  *   Pointer to Ethernet device.
7108  * @param eth_spec
7109  *   An Ethernet flow spec to apply.
7110  * @param eth_mask
7111  *   An Ethernet flow mask to apply.
7112  * @param vlan_spec
7113  *   A VLAN flow spec to apply.
7114  * @param vlan_mask
7115  *   A VLAN flow mask to apply.
7116  *
7117  * @return
7118  *   0 on success, a negative errno value otherwise and rte_errno is set.
7119  */
7120 int
7121 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
7122                     struct rte_flow_item_eth *eth_spec,
7123                     struct rte_flow_item_eth *eth_mask,
7124                     struct rte_flow_item_vlan *vlan_spec,
7125                     struct rte_flow_item_vlan *vlan_mask)
7126 {
7127         struct mlx5_priv *priv = dev->data->dev_private;
7128         const struct rte_flow_attr attr = {
7129                 .ingress = 1,
7130                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7131         };
7132         struct rte_flow_item items[] = {
7133                 {
7134                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7135                         .spec = eth_spec,
7136                         .last = NULL,
7137                         .mask = eth_mask,
7138                 },
7139                 {
7140                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
7141                                               RTE_FLOW_ITEM_TYPE_END,
7142                         .spec = vlan_spec,
7143                         .last = NULL,
7144                         .mask = vlan_mask,
7145                 },
7146                 {
7147                         .type = RTE_FLOW_ITEM_TYPE_END,
7148                 },
7149         };
7150         uint16_t queue[priv->reta_idx_n];
7151         struct rte_flow_action_rss action_rss = {
7152                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
7153                 .level = 0,
7154                 .types = priv->rss_conf.rss_hf,
7155                 .key_len = priv->rss_conf.rss_key_len,
7156                 .queue_num = priv->reta_idx_n,
7157                 .key = priv->rss_conf.rss_key,
7158                 .queue = queue,
7159         };
7160         struct rte_flow_action actions[] = {
7161                 {
7162                         .type = RTE_FLOW_ACTION_TYPE_RSS,
7163                         .conf = &action_rss,
7164                 },
7165                 {
7166                         .type = RTE_FLOW_ACTION_TYPE_END,
7167                 },
7168         };
7169         uint32_t flow_idx;
7170         struct rte_flow_error error;
7171         unsigned int i;
7172
7173         if (!priv->reta_idx_n || !priv->rxqs_n) {
7174                 return 0;
7175         }
7176         if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG))
7177                 action_rss.types = 0;
7178         for (i = 0; i != priv->reta_idx_n; ++i)
7179                 queue[i] = (*priv->reta_idx)[i];
7180         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7181                                     &attr, items, actions, false, &error);
7182         if (!flow_idx)
7183                 return -rte_errno;
7184         return 0;
7185 }
7186
7187 /**
7188  * Enable a flow control configured from the control plane.
7189  *
7190  * @param dev
7191  *   Pointer to Ethernet device.
7192  * @param eth_spec
7193  *   An Ethernet flow spec to apply.
7194  * @param eth_mask
7195  *   An Ethernet flow mask to apply.
7196  *
7197  * @return
7198  *   0 on success, a negative errno value otherwise and rte_errno is set.
7199  */
7200 int
7201 mlx5_ctrl_flow(struct rte_eth_dev *dev,
7202                struct rte_flow_item_eth *eth_spec,
7203                struct rte_flow_item_eth *eth_mask)
7204 {
7205         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
7206 }
7207
7208 /**
7209  * Create default miss flow rule matching lacp traffic
7210  *
7211  * @param dev
7212  *   Pointer to Ethernet device.
7213  * @param eth_spec
7214  *   An Ethernet flow spec to apply.
7215  *
7216  * @return
7217  *   0 on success, a negative errno value otherwise and rte_errno is set.
7218  */
7219 int
7220 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
7221 {
7222         /*
7223          * The LACP matching is done by only using ether type since using
7224          * a multicast dst mac causes kernel to give low priority to this flow.
7225          */
7226         static const struct rte_flow_item_eth lacp_spec = {
7227                 .type = RTE_BE16(0x8809),
7228         };
7229         static const struct rte_flow_item_eth lacp_mask = {
7230                 .type = 0xffff,
7231         };
7232         const struct rte_flow_attr attr = {
7233                 .ingress = 1,
7234         };
7235         struct rte_flow_item items[] = {
7236                 {
7237                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7238                         .spec = &lacp_spec,
7239                         .mask = &lacp_mask,
7240                 },
7241                 {
7242                         .type = RTE_FLOW_ITEM_TYPE_END,
7243                 },
7244         };
7245         struct rte_flow_action actions[] = {
7246                 {
7247                         .type = (enum rte_flow_action_type)
7248                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
7249                 },
7250                 {
7251                         .type = RTE_FLOW_ACTION_TYPE_END,
7252                 },
7253         };
7254         struct rte_flow_error error;
7255         uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7256                                         &attr, items, actions,
7257                                         false, &error);
7258
7259         if (!flow_idx)
7260                 return -rte_errno;
7261         return 0;
7262 }
7263
7264 /**
7265  * Destroy a flow.
7266  *
7267  * @see rte_flow_destroy()
7268  * @see rte_flow_ops
7269  */
7270 int
7271 mlx5_flow_destroy(struct rte_eth_dev *dev,
7272                   struct rte_flow *flow,
7273                   struct rte_flow_error *error __rte_unused)
7274 {
7275         flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN,
7276                                 (uintptr_t)(void *)flow);
7277         return 0;
7278 }
7279
7280 /**
7281  * Destroy all flows.
7282  *
7283  * @see rte_flow_flush()
7284  * @see rte_flow_ops
7285  */
7286 int
7287 mlx5_flow_flush(struct rte_eth_dev *dev,
7288                 struct rte_flow_error *error __rte_unused)
7289 {
7290         mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false);
7291         return 0;
7292 }
7293
7294 /**
7295  * Isolated mode.
7296  *
7297  * @see rte_flow_isolate()
7298  * @see rte_flow_ops
7299  */
7300 int
7301 mlx5_flow_isolate(struct rte_eth_dev *dev,
7302                   int enable,
7303                   struct rte_flow_error *error)
7304 {
7305         struct mlx5_priv *priv = dev->data->dev_private;
7306
7307         if (dev->data->dev_started) {
7308                 rte_flow_error_set(error, EBUSY,
7309                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7310                                    NULL,
7311                                    "port must be stopped first");
7312                 return -rte_errno;
7313         }
7314         priv->isolated = !!enable;
7315         if (enable)
7316                 dev->dev_ops = &mlx5_dev_ops_isolate;
7317         else
7318                 dev->dev_ops = &mlx5_dev_ops;
7319
7320         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
7321         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
7322
7323         return 0;
7324 }
7325
7326 /**
7327  * Query a flow.
7328  *
7329  * @see rte_flow_query()
7330  * @see rte_flow_ops
7331  */
7332 static int
7333 flow_drv_query(struct rte_eth_dev *dev,
7334                uint32_t flow_idx,
7335                const struct rte_flow_action *actions,
7336                void *data,
7337                struct rte_flow_error *error)
7338 {
7339         struct mlx5_priv *priv = dev->data->dev_private;
7340         const struct mlx5_flow_driver_ops *fops;
7341         struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
7342                                                flow_idx);
7343         enum mlx5_flow_drv_type ftype;
7344
7345         if (!flow) {
7346                 return rte_flow_error_set(error, ENOENT,
7347                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7348                           NULL,
7349                           "invalid flow handle");
7350         }
7351         ftype = flow->drv_type;
7352         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
7353         fops = flow_get_drv_ops(ftype);
7354
7355         return fops->query(dev, flow, actions, data, error);
7356 }
7357
7358 /**
7359  * Query a flow.
7360  *
7361  * @see rte_flow_query()
7362  * @see rte_flow_ops
7363  */
7364 int
7365 mlx5_flow_query(struct rte_eth_dev *dev,
7366                 struct rte_flow *flow,
7367                 const struct rte_flow_action *actions,
7368                 void *data,
7369                 struct rte_flow_error *error)
7370 {
7371         int ret;
7372
7373         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
7374                              error);
7375         if (ret < 0)
7376                 return ret;
7377         return 0;
7378 }
7379
7380 /**
7381  * Get rte_flow callbacks.
7382  *
7383  * @param dev
7384  *   Pointer to Ethernet device structure.
7385  * @param ops
7386  *   Pointer to operation-specific structure.
7387  *
7388  * @return 0
7389  */
7390 int
7391 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
7392                   const struct rte_flow_ops **ops)
7393 {
7394         *ops = &mlx5_flow_ops;
7395         return 0;
7396 }
7397
7398 /**
7399  * Validate meter policy actions.
7400  * Dispatcher for action type specific validation.
7401  *
7402  * @param[in] dev
7403  *   Pointer to the Ethernet device structure.
7404  * @param[in] action
7405  *   The meter policy action object to validate.
7406  * @param[in] attr
7407  *   Attributes of flow to determine steering domain.
7408  * @param[out] is_rss
7409  *   Is RSS or not.
7410  * @param[out] domain_bitmap
7411  *   Domain bitmap.
7412  * @param[out] is_def_policy
7413  *   Is default policy or not.
7414  * @param[out] error
7415  *   Perform verbose error reporting if not NULL. Initialized in case of
7416  *   error only.
7417  *
7418  * @return
7419  *   0 on success, otherwise negative errno value.
7420  */
7421 int
7422 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
7423                         const struct rte_flow_action *actions[RTE_COLORS],
7424                         struct rte_flow_attr *attr,
7425                         bool *is_rss,
7426                         uint8_t *domain_bitmap,
7427                         uint8_t *policy_mode,
7428                         struct rte_mtr_error *error)
7429 {
7430         const struct mlx5_flow_driver_ops *fops;
7431
7432         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7433         return fops->validate_mtr_acts(dev, actions, attr, is_rss,
7434                                        domain_bitmap, policy_mode, error);
7435 }
7436
7437 /**
7438  * Destroy the meter table set.
7439  *
7440  * @param[in] dev
7441  *   Pointer to Ethernet device.
7442  * @param[in] mtr_policy
7443  *   Meter policy struct.
7444  */
7445 void
7446 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7447                       struct mlx5_flow_meter_policy *mtr_policy)
7448 {
7449         const struct mlx5_flow_driver_ops *fops;
7450
7451         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7452         fops->destroy_mtr_acts(dev, mtr_policy);
7453 }
7454
7455 /**
7456  * Create policy action, lock free,
7457  * (mutex should be acquired by caller).
7458  * Dispatcher for action type specific call.
7459  *
7460  * @param[in] dev
7461  *   Pointer to the Ethernet device structure.
7462  * @param[in] mtr_policy
7463  *   Meter policy struct.
7464  * @param[in] action
7465  *   Action specification used to create meter actions.
7466  * @param[out] error
7467  *   Perform verbose error reporting if not NULL. Initialized in case of
7468  *   error only.
7469  *
7470  * @return
7471  *   0 on success, otherwise negative errno value.
7472  */
7473 int
7474 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7475                       struct mlx5_flow_meter_policy *mtr_policy,
7476                       const struct rte_flow_action *actions[RTE_COLORS],
7477                       struct rte_mtr_error *error)
7478 {
7479         const struct mlx5_flow_driver_ops *fops;
7480
7481         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7482         return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7483 }
7484
7485 /**
7486  * Create policy rules, lock free,
7487  * (mutex should be acquired by caller).
7488  * Dispatcher for action type specific call.
7489  *
7490  * @param[in] dev
7491  *   Pointer to the Ethernet device structure.
7492  * @param[in] mtr_policy
7493  *   Meter policy struct.
7494  *
7495  * @return
7496  *   0 on success, -1 otherwise.
7497  */
7498 int
7499 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7500                              struct mlx5_flow_meter_policy *mtr_policy)
7501 {
7502         const struct mlx5_flow_driver_ops *fops;
7503
7504         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7505         return fops->create_policy_rules(dev, mtr_policy);
7506 }
7507
7508 /**
7509  * Destroy policy rules, lock free,
7510  * (mutex should be acquired by caller).
7511  * Dispatcher for action type specific call.
7512  *
7513  * @param[in] dev
7514  *   Pointer to the Ethernet device structure.
7515  * @param[in] mtr_policy
7516  *   Meter policy struct.
7517  */
7518 void
7519 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7520                              struct mlx5_flow_meter_policy *mtr_policy)
7521 {
7522         const struct mlx5_flow_driver_ops *fops;
7523
7524         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7525         fops->destroy_policy_rules(dev, mtr_policy);
7526 }
7527
7528 /**
7529  * Destroy the default policy table set.
7530  *
7531  * @param[in] dev
7532  *   Pointer to Ethernet device.
7533  */
7534 void
7535 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7536 {
7537         const struct mlx5_flow_driver_ops *fops;
7538
7539         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7540         fops->destroy_def_policy(dev);
7541 }
7542
7543 /**
7544  * Destroy the default policy table set.
7545  *
7546  * @param[in] dev
7547  *   Pointer to Ethernet device.
7548  *
7549  * @return
7550  *   0 on success, -1 otherwise.
7551  */
7552 int
7553 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7554 {
7555         const struct mlx5_flow_driver_ops *fops;
7556
7557         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7558         return fops->create_def_policy(dev);
7559 }
7560
7561 /**
7562  * Create the needed meter and suffix tables.
7563  *
7564  * @param[in] dev
7565  *   Pointer to Ethernet device.
7566  *
7567  * @return
7568  *   0 on success, -1 otherwise.
7569  */
7570 int
7571 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7572                         struct mlx5_flow_meter_info *fm,
7573                         uint32_t mtr_idx,
7574                         uint8_t domain_bitmap)
7575 {
7576         const struct mlx5_flow_driver_ops *fops;
7577
7578         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7579         return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7580 }
7581
7582 /**
7583  * Destroy the meter table set.
7584  *
7585  * @param[in] dev
7586  *   Pointer to Ethernet device.
7587  * @param[in] tbl
7588  *   Pointer to the meter table set.
7589  */
7590 void
7591 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7592                            struct mlx5_flow_meter_info *fm)
7593 {
7594         const struct mlx5_flow_driver_ops *fops;
7595
7596         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7597         fops->destroy_mtr_tbls(dev, fm);
7598 }
7599
7600 /**
7601  * Destroy the global meter drop table.
7602  *
7603  * @param[in] dev
7604  *   Pointer to Ethernet device.
7605  */
7606 void
7607 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7608 {
7609         const struct mlx5_flow_driver_ops *fops;
7610
7611         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7612         fops->destroy_mtr_drop_tbls(dev);
7613 }
7614
7615 /**
7616  * Destroy the sub policy table with RX queue.
7617  *
7618  * @param[in] dev
7619  *   Pointer to Ethernet device.
7620  * @param[in] mtr_policy
7621  *   Pointer to meter policy table.
7622  */
7623 void
7624 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
7625                 struct mlx5_flow_meter_policy *mtr_policy)
7626 {
7627         const struct mlx5_flow_driver_ops *fops;
7628
7629         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7630         fops->destroy_sub_policy_with_rxq(dev, mtr_policy);
7631 }
7632
7633 /**
7634  * Allocate the needed aso flow meter id.
7635  *
7636  * @param[in] dev
7637  *   Pointer to Ethernet device.
7638  *
7639  * @return
7640  *   Index to aso flow meter on success, NULL otherwise.
7641  */
7642 uint32_t
7643 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7644 {
7645         const struct mlx5_flow_driver_ops *fops;
7646
7647         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7648         return fops->create_meter(dev);
7649 }
7650
7651 /**
7652  * Free the aso flow meter id.
7653  *
7654  * @param[in] dev
7655  *   Pointer to Ethernet device.
7656  * @param[in] mtr_idx
7657  *  Index to aso flow meter to be free.
7658  *
7659  * @return
7660  *   0 on success.
7661  */
7662 void
7663 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7664 {
7665         const struct mlx5_flow_driver_ops *fops;
7666
7667         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7668         fops->free_meter(dev, mtr_idx);
7669 }
7670
7671 /**
7672  * Allocate a counter.
7673  *
7674  * @param[in] dev
7675  *   Pointer to Ethernet device structure.
7676  *
7677  * @return
7678  *   Index to allocated counter  on success, 0 otherwise.
7679  */
7680 uint32_t
7681 mlx5_counter_alloc(struct rte_eth_dev *dev)
7682 {
7683         const struct mlx5_flow_driver_ops *fops;
7684         struct rte_flow_attr attr = { .transfer = 0 };
7685
7686         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7687                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7688                 return fops->counter_alloc(dev);
7689         }
7690         DRV_LOG(ERR,
7691                 "port %u counter allocate is not supported.",
7692                  dev->data->port_id);
7693         return 0;
7694 }
7695
7696 /**
7697  * Free a counter.
7698  *
7699  * @param[in] dev
7700  *   Pointer to Ethernet device structure.
7701  * @param[in] cnt
7702  *   Index to counter to be free.
7703  */
7704 void
7705 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7706 {
7707         const struct mlx5_flow_driver_ops *fops;
7708         struct rte_flow_attr attr = { .transfer = 0 };
7709
7710         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7711                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7712                 fops->counter_free(dev, cnt);
7713                 return;
7714         }
7715         DRV_LOG(ERR,
7716                 "port %u counter free is not supported.",
7717                  dev->data->port_id);
7718 }
7719
7720 /**
7721  * Query counter statistics.
7722  *
7723  * @param[in] dev
7724  *   Pointer to Ethernet device structure.
7725  * @param[in] cnt
7726  *   Index to counter to query.
7727  * @param[in] clear
7728  *   Set to clear counter statistics.
7729  * @param[out] pkts
7730  *   The counter hits packets number to save.
7731  * @param[out] bytes
7732  *   The counter hits bytes number to save.
7733  *
7734  * @return
7735  *   0 on success, a negative errno value otherwise.
7736  */
7737 int
7738 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7739                    bool clear, uint64_t *pkts, uint64_t *bytes)
7740 {
7741         const struct mlx5_flow_driver_ops *fops;
7742         struct rte_flow_attr attr = { .transfer = 0 };
7743
7744         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7745                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7746                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7747         }
7748         DRV_LOG(ERR,
7749                 "port %u counter query is not supported.",
7750                  dev->data->port_id);
7751         return -ENOTSUP;
7752 }
7753
7754 /**
7755  * Allocate a new memory for the counter values wrapped by all the needed
7756  * management.
7757  *
7758  * @param[in] sh
7759  *   Pointer to mlx5_dev_ctx_shared object.
7760  *
7761  * @return
7762  *   0 on success, a negative errno value otherwise.
7763  */
7764 static int
7765 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7766 {
7767         struct mlx5_devx_mkey_attr mkey_attr;
7768         struct mlx5_counter_stats_mem_mng *mem_mng;
7769         volatile struct flow_counter_stats *raw_data;
7770         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7771         int size = (sizeof(struct flow_counter_stats) *
7772                         MLX5_COUNTERS_PER_POOL +
7773                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7774                         sizeof(struct mlx5_counter_stats_mem_mng);
7775         size_t pgsize = rte_mem_page_size();
7776         uint8_t *mem;
7777         int i;
7778
7779         if (pgsize == (size_t)-1) {
7780                 DRV_LOG(ERR, "Failed to get mem page size");
7781                 rte_errno = ENOMEM;
7782                 return -ENOMEM;
7783         }
7784         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7785         if (!mem) {
7786                 rte_errno = ENOMEM;
7787                 return -ENOMEM;
7788         }
7789         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7790         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7791         mem_mng->umem = mlx5_os_umem_reg(sh->cdev->ctx, mem, size,
7792                                                  IBV_ACCESS_LOCAL_WRITE);
7793         if (!mem_mng->umem) {
7794                 rte_errno = errno;
7795                 mlx5_free(mem);
7796                 return -rte_errno;
7797         }
7798         memset(&mkey_attr, 0, sizeof(mkey_attr));
7799         mkey_attr.addr = (uintptr_t)mem;
7800         mkey_attr.size = size;
7801         mkey_attr.umem_id = mlx5_os_get_umem_id(mem_mng->umem);
7802         mkey_attr.pd = sh->cdev->pdn;
7803         mkey_attr.relaxed_ordering_write = sh->cmng.relaxed_ordering_write;
7804         mkey_attr.relaxed_ordering_read = sh->cmng.relaxed_ordering_read;
7805         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->cdev->ctx, &mkey_attr);
7806         if (!mem_mng->dm) {
7807                 mlx5_os_umem_dereg(mem_mng->umem);
7808                 rte_errno = errno;
7809                 mlx5_free(mem);
7810                 return -rte_errno;
7811         }
7812         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7813         raw_data = (volatile struct flow_counter_stats *)mem;
7814         for (i = 0; i < raws_n; ++i) {
7815                 mem_mng->raws[i].mem_mng = mem_mng;
7816                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7817         }
7818         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7819                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7820                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7821                                  next);
7822         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7823         sh->cmng.mem_mng = mem_mng;
7824         return 0;
7825 }
7826
7827 /**
7828  * Set the statistic memory to the new counter pool.
7829  *
7830  * @param[in] sh
7831  *   Pointer to mlx5_dev_ctx_shared object.
7832  * @param[in] pool
7833  *   Pointer to the pool to set the statistic memory.
7834  *
7835  * @return
7836  *   0 on success, a negative errno value otherwise.
7837  */
7838 static int
7839 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7840                                struct mlx5_flow_counter_pool *pool)
7841 {
7842         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7843         /* Resize statistic memory once used out. */
7844         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7845             mlx5_flow_create_counter_stat_mem_mng(sh)) {
7846                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7847                 return -1;
7848         }
7849         rte_spinlock_lock(&pool->sl);
7850         pool->raw = cmng->mem_mng->raws + pool->index %
7851                     MLX5_CNT_CONTAINER_RESIZE;
7852         rte_spinlock_unlock(&pool->sl);
7853         pool->raw_hw = NULL;
7854         return 0;
7855 }
7856
7857 #define MLX5_POOL_QUERY_FREQ_US 1000000
7858
7859 /**
7860  * Set the periodic procedure for triggering asynchronous batch queries for all
7861  * the counter pools.
7862  *
7863  * @param[in] sh
7864  *   Pointer to mlx5_dev_ctx_shared object.
7865  */
7866 void
7867 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7868 {
7869         uint32_t pools_n, us;
7870
7871         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7872         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7873         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7874         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7875                 sh->cmng.query_thread_on = 0;
7876                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7877         } else {
7878                 sh->cmng.query_thread_on = 1;
7879         }
7880 }
7881
7882 /**
7883  * The periodic procedure for triggering asynchronous batch queries for all the
7884  * counter pools. This function is probably called by the host thread.
7885  *
7886  * @param[in] arg
7887  *   The parameter for the alarm process.
7888  */
7889 void
7890 mlx5_flow_query_alarm(void *arg)
7891 {
7892         struct mlx5_dev_ctx_shared *sh = arg;
7893         int ret;
7894         uint16_t pool_index = sh->cmng.pool_index;
7895         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7896         struct mlx5_flow_counter_pool *pool;
7897         uint16_t n_valid;
7898
7899         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7900                 goto set_alarm;
7901         rte_spinlock_lock(&cmng->pool_update_sl);
7902         pool = cmng->pools[pool_index];
7903         n_valid = cmng->n_valid;
7904         rte_spinlock_unlock(&cmng->pool_update_sl);
7905         /* Set the statistic memory to the new created pool. */
7906         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7907                 goto set_alarm;
7908         if (pool->raw_hw)
7909                 /* There is a pool query in progress. */
7910                 goto set_alarm;
7911         pool->raw_hw =
7912                 LIST_FIRST(&sh->cmng.free_stat_raws);
7913         if (!pool->raw_hw)
7914                 /* No free counter statistics raw memory. */
7915                 goto set_alarm;
7916         /*
7917          * Identify the counters released between query trigger and query
7918          * handle more efficiently. The counter released in this gap period
7919          * should wait for a new round of query as the new arrived packets
7920          * will not be taken into account.
7921          */
7922         pool->query_gen++;
7923         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7924                                                MLX5_COUNTERS_PER_POOL,
7925                                                NULL, NULL,
7926                                                pool->raw_hw->mem_mng->dm->id,
7927                                                (void *)(uintptr_t)
7928                                                pool->raw_hw->data,
7929                                                sh->devx_comp,
7930                                                (uint64_t)(uintptr_t)pool);
7931         if (ret) {
7932                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7933                         " %d", pool->min_dcs->id);
7934                 pool->raw_hw = NULL;
7935                 goto set_alarm;
7936         }
7937         LIST_REMOVE(pool->raw_hw, next);
7938         sh->cmng.pending_queries++;
7939         pool_index++;
7940         if (pool_index >= n_valid)
7941                 pool_index = 0;
7942 set_alarm:
7943         sh->cmng.pool_index = pool_index;
7944         mlx5_set_query_alarm(sh);
7945 }
7946
7947 /**
7948  * Check and callback event for new aged flow in the counter pool
7949  *
7950  * @param[in] sh
7951  *   Pointer to mlx5_dev_ctx_shared object.
7952  * @param[in] pool
7953  *   Pointer to Current counter pool.
7954  */
7955 static void
7956 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7957                    struct mlx5_flow_counter_pool *pool)
7958 {
7959         struct mlx5_priv *priv;
7960         struct mlx5_flow_counter *cnt;
7961         struct mlx5_age_info *age_info;
7962         struct mlx5_age_param *age_param;
7963         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7964         struct mlx5_counter_stats_raw *prev = pool->raw;
7965         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7966         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7967         uint16_t expected = AGE_CANDIDATE;
7968         uint32_t i;
7969
7970         pool->time_of_last_age_check = curr_time;
7971         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
7972                 cnt = MLX5_POOL_GET_CNT(pool, i);
7973                 age_param = MLX5_CNT_TO_AGE(cnt);
7974                 if (__atomic_load_n(&age_param->state,
7975                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
7976                         continue;
7977                 if (cur->data[i].hits != prev->data[i].hits) {
7978                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
7979                                          __ATOMIC_RELAXED);
7980                         continue;
7981                 }
7982                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
7983                                        time_delta,
7984                                        __ATOMIC_RELAXED) <= age_param->timeout)
7985                         continue;
7986                 /**
7987                  * Hold the lock first, or if between the
7988                  * state AGE_TMOUT and tailq operation the
7989                  * release happened, the release procedure
7990                  * may delete a non-existent tailq node.
7991                  */
7992                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
7993                 age_info = GET_PORT_AGE_INFO(priv);
7994                 rte_spinlock_lock(&age_info->aged_sl);
7995                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
7996                                                 AGE_TMOUT, false,
7997                                                 __ATOMIC_RELAXED,
7998                                                 __ATOMIC_RELAXED)) {
7999                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
8000                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
8001                 }
8002                 rte_spinlock_unlock(&age_info->aged_sl);
8003         }
8004         mlx5_age_event_prepare(sh);
8005 }
8006
8007 /**
8008  * Handler for the HW respond about ready values from an asynchronous batch
8009  * query. This function is probably called by the host thread.
8010  *
8011  * @param[in] sh
8012  *   The pointer to the shared device context.
8013  * @param[in] async_id
8014  *   The Devx async ID.
8015  * @param[in] status
8016  *   The status of the completion.
8017  */
8018 void
8019 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
8020                                   uint64_t async_id, int status)
8021 {
8022         struct mlx5_flow_counter_pool *pool =
8023                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
8024         struct mlx5_counter_stats_raw *raw_to_free;
8025         uint8_t query_gen = pool->query_gen ^ 1;
8026         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
8027         enum mlx5_counter_type cnt_type =
8028                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
8029                                 MLX5_COUNTER_TYPE_ORIGIN;
8030
8031         if (unlikely(status)) {
8032                 raw_to_free = pool->raw_hw;
8033         } else {
8034                 raw_to_free = pool->raw;
8035                 if (pool->is_aged)
8036                         mlx5_flow_aging_check(sh, pool);
8037                 rte_spinlock_lock(&pool->sl);
8038                 pool->raw = pool->raw_hw;
8039                 rte_spinlock_unlock(&pool->sl);
8040                 /* Be sure the new raw counters data is updated in memory. */
8041                 rte_io_wmb();
8042                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
8043                         rte_spinlock_lock(&cmng->csl[cnt_type]);
8044                         TAILQ_CONCAT(&cmng->counters[cnt_type],
8045                                      &pool->counters[query_gen], next);
8046                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
8047                 }
8048         }
8049         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
8050         pool->raw_hw = NULL;
8051         sh->cmng.pending_queries--;
8052 }
8053
8054 static int
8055 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
8056                     const struct flow_grp_info *grp_info,
8057                     struct rte_flow_error *error)
8058 {
8059         if (grp_info->transfer && grp_info->external &&
8060             grp_info->fdb_def_rule) {
8061                 if (group == UINT32_MAX)
8062                         return rte_flow_error_set
8063                                                 (error, EINVAL,
8064                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8065                                                  NULL,
8066                                                  "group index not supported");
8067                 *table = group + 1;
8068         } else {
8069                 *table = group;
8070         }
8071         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
8072         return 0;
8073 }
8074
8075 /**
8076  * Translate the rte_flow group index to HW table value.
8077  *
8078  * If tunnel offload is disabled, all group ids converted to flow table
8079  * id using the standard method.
8080  * If tunnel offload is enabled, group id can be converted using the
8081  * standard or tunnel conversion method. Group conversion method
8082  * selection depends on flags in `grp_info` parameter:
8083  * - Internal (grp_info.external == 0) groups conversion uses the
8084  *   standard method.
8085  * - Group ids in JUMP action converted with the tunnel conversion.
8086  * - Group id in rule attribute conversion depends on a rule type and
8087  *   group id value:
8088  *   ** non zero group attributes converted with the tunnel method
8089  *   ** zero group attribute in non-tunnel rule is converted using the
8090  *      standard method - there's only one root table
8091  *   ** zero group attribute in steer tunnel rule is converted with the
8092  *      standard method - single root table
8093  *   ** zero group attribute in match tunnel rule is a special OvS
8094  *      case: that value is used for portability reasons. That group
8095  *      id is converted with the tunnel conversion method.
8096  *
8097  * @param[in] dev
8098  *   Port device
8099  * @param[in] tunnel
8100  *   PMD tunnel offload object
8101  * @param[in] group
8102  *   rte_flow group index value.
8103  * @param[out] table
8104  *   HW table value.
8105  * @param[in] grp_info
8106  *   flags used for conversion
8107  * @param[out] error
8108  *   Pointer to error structure.
8109  *
8110  * @return
8111  *   0 on success, a negative errno value otherwise and rte_errno is set.
8112  */
8113 int
8114 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
8115                          const struct mlx5_flow_tunnel *tunnel,
8116                          uint32_t group, uint32_t *table,
8117                          const struct flow_grp_info *grp_info,
8118                          struct rte_flow_error *error)
8119 {
8120         int ret;
8121         bool standard_translation;
8122
8123         if (!grp_info->skip_scale && grp_info->external &&
8124             group < MLX5_MAX_TABLES_EXTERNAL)
8125                 group *= MLX5_FLOW_TABLE_FACTOR;
8126         if (is_tunnel_offload_active(dev)) {
8127                 standard_translation = !grp_info->external ||
8128                                         grp_info->std_tbl_fix;
8129         } else {
8130                 standard_translation = true;
8131         }
8132         DRV_LOG(DEBUG,
8133                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
8134                 dev->data->port_id, group, grp_info->transfer,
8135                 grp_info->external, grp_info->fdb_def_rule,
8136                 standard_translation ? "STANDARD" : "TUNNEL");
8137         if (standard_translation)
8138                 ret = flow_group_to_table(dev->data->port_id, group, table,
8139                                           grp_info, error);
8140         else
8141                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
8142                                                       table, error);
8143
8144         return ret;
8145 }
8146
8147 /**
8148  * Discover availability of metadata reg_c's.
8149  *
8150  * Iteratively use test flows to check availability.
8151  *
8152  * @param[in] dev
8153  *   Pointer to the Ethernet device structure.
8154  *
8155  * @return
8156  *   0 on success, a negative errno value otherwise and rte_errno is set.
8157  */
8158 int
8159 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
8160 {
8161         struct mlx5_priv *priv = dev->data->dev_private;
8162         enum modify_reg idx;
8163         int n = 0;
8164
8165         /* reg_c[0] and reg_c[1] are reserved. */
8166         priv->sh->flow_mreg_c[n++] = REG_C_0;
8167         priv->sh->flow_mreg_c[n++] = REG_C_1;
8168         /* Discover availability of other reg_c's. */
8169         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
8170                 struct rte_flow_attr attr = {
8171                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
8172                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
8173                         .ingress = 1,
8174                 };
8175                 struct rte_flow_item items[] = {
8176                         [0] = {
8177                                 .type = RTE_FLOW_ITEM_TYPE_END,
8178                         },
8179                 };
8180                 struct rte_flow_action actions[] = {
8181                         [0] = {
8182                                 .type = (enum rte_flow_action_type)
8183                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
8184                                 .conf = &(struct mlx5_flow_action_copy_mreg){
8185                                         .src = REG_C_1,
8186                                         .dst = idx,
8187                                 },
8188                         },
8189                         [1] = {
8190                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
8191                                 .conf = &(struct rte_flow_action_jump){
8192                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
8193                                 },
8194                         },
8195                         [2] = {
8196                                 .type = RTE_FLOW_ACTION_TYPE_END,
8197                         },
8198                 };
8199                 uint32_t flow_idx;
8200                 struct rte_flow *flow;
8201                 struct rte_flow_error error;
8202
8203                 if (!priv->config.dv_flow_en)
8204                         break;
8205                 /* Create internal flow, validation skips copy action. */
8206                 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr,
8207                                         items, actions, false, &error);
8208                 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8209                                       flow_idx);
8210                 if (!flow)
8211                         continue;
8212                 priv->sh->flow_mreg_c[n++] = idx;
8213                 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx);
8214         }
8215         for (; n < MLX5_MREG_C_NUM; ++n)
8216                 priv->sh->flow_mreg_c[n] = REG_NON;
8217         priv->sh->metadata_regc_check_flag = 1;
8218         return 0;
8219 }
8220
8221 int
8222 save_dump_file(const uint8_t *data, uint32_t size,
8223         uint32_t type, uint64_t id, void *arg, FILE *file)
8224 {
8225         char line[BUF_SIZE];
8226         uint32_t out = 0;
8227         uint32_t k;
8228         uint32_t actions_num;
8229         struct rte_flow_query_count *count;
8230
8231         memset(line, 0, BUF_SIZE);
8232         switch (type) {
8233         case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR:
8234                 actions_num = *(uint32_t *)(arg);
8235                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",%d,",
8236                                 type, id, actions_num);
8237                 break;
8238         case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT:
8239                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",",
8240                                 type, id);
8241                 break;
8242         case DR_DUMP_REC_TYPE_PMD_COUNTER:
8243                 count = (struct rte_flow_query_count *)arg;
8244                 fprintf(file,
8245                         "%d,0x%" PRIx64 ",%" PRIu64 ",%" PRIu64 "\n",
8246                         type, id, count->hits, count->bytes);
8247                 return 0;
8248         default:
8249                 return -1;
8250         }
8251
8252         for (k = 0; k < size; k++) {
8253                 /* Make sure we do not overrun the line buffer length. */
8254                 if (out >= BUF_SIZE - 4) {
8255                         line[out] = '\0';
8256                         break;
8257                 }
8258                 out += snprintf(line + out, BUF_SIZE - out, "%02x",
8259                                 (data[k]) & 0xff);
8260         }
8261         fprintf(file, "%s\n", line);
8262         return 0;
8263 }
8264
8265 int
8266 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow,
8267         struct rte_flow_query_count *count, struct rte_flow_error *error)
8268 {
8269         struct rte_flow_action action[2];
8270         enum mlx5_flow_drv_type ftype;
8271         const struct mlx5_flow_driver_ops *fops;
8272
8273         if (!flow) {
8274                 return rte_flow_error_set(error, ENOENT,
8275                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8276                                 NULL,
8277                                 "invalid flow handle");
8278         }
8279         action[0].type = RTE_FLOW_ACTION_TYPE_COUNT;
8280         action[1].type = RTE_FLOW_ACTION_TYPE_END;
8281         if (flow->counter) {
8282                 memset(count, 0, sizeof(struct rte_flow_query_count));
8283                 ftype = (enum mlx5_flow_drv_type)(flow->drv_type);
8284                 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN &&
8285                                                 ftype < MLX5_FLOW_TYPE_MAX);
8286                 fops = flow_get_drv_ops(ftype);
8287                 return fops->query(dev, flow, action, count, error);
8288         }
8289         return -1;
8290 }
8291
8292 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8293 /**
8294  * Dump flow ipool data to file
8295  *
8296  * @param[in] dev
8297  *   The pointer to Ethernet device.
8298  * @param[in] file
8299  *   A pointer to a file for output.
8300  * @param[out] error
8301  *   Perform verbose error reporting if not NULL. PMDs initialize this
8302  *   structure in case of error only.
8303  * @return
8304  *   0 on success, a negative value otherwise.
8305  */
8306 int
8307 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev,
8308         struct rte_flow *flow, FILE *file,
8309         struct rte_flow_error *error)
8310 {
8311         struct mlx5_priv *priv = dev->data->dev_private;
8312         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
8313         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8314         uint32_t handle_idx;
8315         struct mlx5_flow_handle *dh;
8316         struct rte_flow_query_count count;
8317         uint32_t actions_num;
8318         const uint8_t *data;
8319         size_t size;
8320         uint64_t id;
8321         uint32_t type;
8322         void *action = NULL;
8323
8324         if (!flow) {
8325                 return rte_flow_error_set(error, ENOENT,
8326                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8327                                 NULL,
8328                                 "invalid flow handle");
8329         }
8330         handle_idx = flow->dev_handles;
8331         while (handle_idx) {
8332                 dh = mlx5_ipool_get(priv->sh->ipool
8333                                 [MLX5_IPOOL_MLX5_FLOW], handle_idx);
8334                 if (!dh)
8335                         continue;
8336                 handle_idx = dh->next.next;
8337
8338                 /* query counter */
8339                 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8340                 flow_dv_query_count_ptr(dev, flow->counter,
8341                                                 &action, error);
8342                 if (action) {
8343                         id = (uint64_t)(uintptr_t)action;
8344                         if (!mlx5_flow_query_counter(dev, flow, &count, error))
8345                                 save_dump_file(NULL, 0, type,
8346                                                 id, (void *)&count, file);
8347                 }
8348                 /* Get modify_hdr and encap_decap buf from ipools. */
8349                 encap_decap = NULL;
8350                 modify_hdr = dh->dvh.modify_hdr;
8351
8352                 if (dh->dvh.rix_encap_decap) {
8353                         encap_decap = mlx5_ipool_get(priv->sh->ipool
8354                                                 [MLX5_IPOOL_DECAP_ENCAP],
8355                                                 dh->dvh.rix_encap_decap);
8356                 }
8357                 if (modify_hdr) {
8358                         data = (const uint8_t *)modify_hdr->actions;
8359                         size = (size_t)(modify_hdr->actions_num) * 8;
8360                         id = (uint64_t)(uintptr_t)modify_hdr->action;
8361                         actions_num = modify_hdr->actions_num;
8362                         type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8363                         save_dump_file(data, size, type, id,
8364                                                 (void *)(&actions_num), file);
8365                 }
8366                 if (encap_decap) {
8367                         data = encap_decap->buf;
8368                         size = encap_decap->size;
8369                         id = (uint64_t)(uintptr_t)encap_decap->action;
8370                         type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8371                         save_dump_file(data, size, type,
8372                                                 id, NULL, file);
8373                 }
8374         }
8375         return 0;
8376 }
8377
8378 /**
8379  * Dump all flow's encap_decap/modify_hdr/counter data to file
8380  *
8381  * @param[in] dev
8382  *   The pointer to Ethernet device.
8383  * @param[in] file
8384  *   A pointer to a file for output.
8385  * @param[out] error
8386  *   Perform verbose error reporting if not NULL. PMDs initialize this
8387  *   structure in case of error only.
8388  * @return
8389  *   0 on success, a negative value otherwise.
8390  */
8391 static int
8392 mlx5_flow_dev_dump_sh_all(struct rte_eth_dev *dev,
8393         FILE *file, struct rte_flow_error *error)
8394 {
8395         struct mlx5_priv *priv = dev->data->dev_private;
8396         struct mlx5_dev_ctx_shared *sh = priv->sh;
8397         struct mlx5_hlist *h;
8398         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
8399         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8400         struct rte_flow_query_count count;
8401         uint32_t actions_num;
8402         const uint8_t *data;
8403         size_t size;
8404         uint64_t id;
8405         uint32_t type;
8406         uint32_t i;
8407         uint32_t j;
8408         struct mlx5_list_inconst *l_inconst;
8409         struct mlx5_list_entry *e;
8410         int lcore_index;
8411         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
8412         uint32_t max;
8413         void *action;
8414
8415         /* encap_decap hlist is lcore_share, get global core cache. */
8416         i = MLX5_LIST_GLOBAL;
8417         h = sh->encaps_decaps;
8418         if (h) {
8419                 for (j = 0; j <= h->mask; j++) {
8420                         l_inconst = &h->buckets[j].l;
8421                         if (!l_inconst || !l_inconst->cache[i])
8422                                 continue;
8423
8424                         e = LIST_FIRST(&l_inconst->cache[i]->h);
8425                         while (e) {
8426                                 encap_decap =
8427                                 (struct mlx5_flow_dv_encap_decap_resource *)e;
8428                                 data = encap_decap->buf;
8429                                 size = encap_decap->size;
8430                                 id = (uint64_t)(uintptr_t)encap_decap->action;
8431                                 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8432                                 save_dump_file(data, size, type,
8433                                         id, NULL, file);
8434                                 e = LIST_NEXT(e, next);
8435                         }
8436                 }
8437         }
8438
8439         /* get modify_hdr */
8440         h = sh->modify_cmds;
8441         if (h) {
8442                 lcore_index = rte_lcore_index(rte_lcore_id());
8443                 if (unlikely(lcore_index == -1)) {
8444                         lcore_index = MLX5_LIST_NLCORE;
8445                         rte_spinlock_lock(&h->l_const.lcore_lock);
8446                 }
8447                 i = lcore_index;
8448
8449                 for (j = 0; j <= h->mask; j++) {
8450                         l_inconst = &h->buckets[j].l;
8451                         if (!l_inconst || !l_inconst->cache[i])
8452                                 continue;
8453
8454                         e = LIST_FIRST(&l_inconst->cache[i]->h);
8455                         while (e) {
8456                                 modify_hdr =
8457                                 (struct mlx5_flow_dv_modify_hdr_resource *)e;
8458                                 data = (const uint8_t *)modify_hdr->actions;
8459                                 size = (size_t)(modify_hdr->actions_num) * 8;
8460                                 actions_num = modify_hdr->actions_num;
8461                                 id = (uint64_t)(uintptr_t)modify_hdr->action;
8462                                 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8463                                 save_dump_file(data, size, type, id,
8464                                                 (void *)(&actions_num), file);
8465                                 e = LIST_NEXT(e, next);
8466                         }
8467                 }
8468
8469                 if (unlikely(lcore_index == MLX5_LIST_NLCORE))
8470                         rte_spinlock_unlock(&h->l_const.lcore_lock);
8471         }
8472
8473         /* get counter */
8474         MLX5_ASSERT(cmng->n_valid <= cmng->n);
8475         max = MLX5_COUNTERS_PER_POOL * cmng->n_valid;
8476         for (j = 1; j <= max; j++) {
8477                 action = NULL;
8478                 flow_dv_query_count_ptr(dev, j, &action, error);
8479                 if (action) {
8480                         if (!flow_dv_query_count(dev, j, &count, error)) {
8481                                 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8482                                 id = (uint64_t)(uintptr_t)action;
8483                                 save_dump_file(NULL, 0, type,
8484                                                 id, (void *)&count, file);
8485                         }
8486                 }
8487         }
8488         return 0;
8489 }
8490 #endif
8491
8492 /**
8493  * Dump flow raw hw data to file
8494  *
8495  * @param[in] dev
8496  *    The pointer to Ethernet device.
8497  * @param[in] file
8498  *   A pointer to a file for output.
8499  * @param[out] error
8500  *   Perform verbose error reporting if not NULL. PMDs initialize this
8501  *   structure in case of error only.
8502  * @return
8503  *   0 on success, a nagative value otherwise.
8504  */
8505 int
8506 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
8507                    FILE *file,
8508                    struct rte_flow_error *error __rte_unused)
8509 {
8510         struct mlx5_priv *priv = dev->data->dev_private;
8511         struct mlx5_dev_ctx_shared *sh = priv->sh;
8512         uint32_t handle_idx;
8513         int ret;
8514         struct mlx5_flow_handle *dh;
8515         struct rte_flow *flow;
8516
8517         if (!priv->config.dv_flow_en) {
8518                 if (fputs("device dv flow disabled\n", file) <= 0)
8519                         return -errno;
8520                 return -ENOTSUP;
8521         }
8522
8523         /* dump all */
8524         if (!flow_idx) {
8525 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8526                 if (mlx5_flow_dev_dump_sh_all(dev, file, error))
8527                         return -EINVAL;
8528 #endif
8529                 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
8530                                         sh->rx_domain,
8531                                         sh->tx_domain, file);
8532         }
8533         /* dump one */
8534         flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8535                         (uintptr_t)(void *)flow_idx);
8536         if (!flow)
8537                 return -EINVAL;
8538
8539 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8540         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8541 #endif
8542         handle_idx = flow->dev_handles;
8543         while (handle_idx) {
8544                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8545                                 handle_idx);
8546                 if (!dh)
8547                         return -ENOENT;
8548                 if (dh->drv_flow) {
8549                         ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
8550                                         file);
8551                         if (ret)
8552                                 return -ENOENT;
8553                 }
8554                 handle_idx = dh->next.next;
8555         }
8556         return 0;
8557 }
8558
8559 /**
8560  * Get aged-out flows.
8561  *
8562  * @param[in] dev
8563  *   Pointer to the Ethernet device structure.
8564  * @param[in] context
8565  *   The address of an array of pointers to the aged-out flows contexts.
8566  * @param[in] nb_countexts
8567  *   The length of context array pointers.
8568  * @param[out] error
8569  *   Perform verbose error reporting if not NULL. Initialized in case of
8570  *   error only.
8571  *
8572  * @return
8573  *   how many contexts get in success, otherwise negative errno value.
8574  *   if nb_contexts is 0, return the amount of all aged contexts.
8575  *   if nb_contexts is not 0 , return the amount of aged flows reported
8576  *   in the context array.
8577  */
8578 int
8579 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
8580                         uint32_t nb_contexts, struct rte_flow_error *error)
8581 {
8582         const struct mlx5_flow_driver_ops *fops;
8583         struct rte_flow_attr attr = { .transfer = 0 };
8584
8585         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8586                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8587                 return fops->get_aged_flows(dev, contexts, nb_contexts,
8588                                                     error);
8589         }
8590         DRV_LOG(ERR,
8591                 "port %u get aged flows is not supported.",
8592                  dev->data->port_id);
8593         return -ENOTSUP;
8594 }
8595
8596 /* Wrapper for driver action_validate op callback */
8597 static int
8598 flow_drv_action_validate(struct rte_eth_dev *dev,
8599                          const struct rte_flow_indir_action_conf *conf,
8600                          const struct rte_flow_action *action,
8601                          const struct mlx5_flow_driver_ops *fops,
8602                          struct rte_flow_error *error)
8603 {
8604         static const char err_msg[] = "indirect action validation unsupported";
8605
8606         if (!fops->action_validate) {
8607                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8608                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8609                                    NULL, err_msg);
8610                 return -rte_errno;
8611         }
8612         return fops->action_validate(dev, conf, action, error);
8613 }
8614
8615 /**
8616  * Destroys the shared action by handle.
8617  *
8618  * @param dev
8619  *   Pointer to Ethernet device structure.
8620  * @param[in] handle
8621  *   Handle for the indirect action object to be destroyed.
8622  * @param[out] error
8623  *   Perform verbose error reporting if not NULL. PMDs initialize this
8624  *   structure in case of error only.
8625  *
8626  * @return
8627  *   0 on success, a negative errno value otherwise and rte_errno is set.
8628  *
8629  * @note: wrapper for driver action_create op callback.
8630  */
8631 static int
8632 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
8633                            struct rte_flow_action_handle *handle,
8634                            struct rte_flow_error *error)
8635 {
8636         static const char err_msg[] = "indirect action destruction unsupported";
8637         struct rte_flow_attr attr = { .transfer = 0 };
8638         const struct mlx5_flow_driver_ops *fops =
8639                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8640
8641         if (!fops->action_destroy) {
8642                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8643                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8644                                    NULL, err_msg);
8645                 return -rte_errno;
8646         }
8647         return fops->action_destroy(dev, handle, error);
8648 }
8649
8650 /* Wrapper for driver action_destroy op callback */
8651 static int
8652 flow_drv_action_update(struct rte_eth_dev *dev,
8653                        struct rte_flow_action_handle *handle,
8654                        const void *update,
8655                        const struct mlx5_flow_driver_ops *fops,
8656                        struct rte_flow_error *error)
8657 {
8658         static const char err_msg[] = "indirect action update unsupported";
8659
8660         if (!fops->action_update) {
8661                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8662                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8663                                    NULL, err_msg);
8664                 return -rte_errno;
8665         }
8666         return fops->action_update(dev, handle, update, error);
8667 }
8668
8669 /* Wrapper for driver action_destroy op callback */
8670 static int
8671 flow_drv_action_query(struct rte_eth_dev *dev,
8672                       const struct rte_flow_action_handle *handle,
8673                       void *data,
8674                       const struct mlx5_flow_driver_ops *fops,
8675                       struct rte_flow_error *error)
8676 {
8677         static const char err_msg[] = "indirect action query unsupported";
8678
8679         if (!fops->action_query) {
8680                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8681                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8682                                    NULL, err_msg);
8683                 return -rte_errno;
8684         }
8685         return fops->action_query(dev, handle, data, error);
8686 }
8687
8688 /**
8689  * Create indirect action for reuse in multiple flow rules.
8690  *
8691  * @param dev
8692  *   Pointer to Ethernet device structure.
8693  * @param conf
8694  *   Pointer to indirect action object configuration.
8695  * @param[in] action
8696  *   Action configuration for indirect action object creation.
8697  * @param[out] error
8698  *   Perform verbose error reporting if not NULL. PMDs initialize this
8699  *   structure in case of error only.
8700  * @return
8701  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
8702  */
8703 static struct rte_flow_action_handle *
8704 mlx5_action_handle_create(struct rte_eth_dev *dev,
8705                           const struct rte_flow_indir_action_conf *conf,
8706                           const struct rte_flow_action *action,
8707                           struct rte_flow_error *error)
8708 {
8709         static const char err_msg[] = "indirect action creation unsupported";
8710         struct rte_flow_attr attr = { .transfer = 0 };
8711         const struct mlx5_flow_driver_ops *fops =
8712                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8713
8714         if (flow_drv_action_validate(dev, conf, action, fops, error))
8715                 return NULL;
8716         if (!fops->action_create) {
8717                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8718                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8719                                    NULL, err_msg);
8720                 return NULL;
8721         }
8722         return fops->action_create(dev, conf, action, error);
8723 }
8724
8725 /**
8726  * Updates inplace the indirect action configuration pointed by *handle*
8727  * with the configuration provided as *update* argument.
8728  * The update of the indirect action configuration effects all flow rules
8729  * reusing the action via handle.
8730  *
8731  * @param dev
8732  *   Pointer to Ethernet device structure.
8733  * @param[in] handle
8734  *   Handle for the indirect action to be updated.
8735  * @param[in] update
8736  *   Action specification used to modify the action pointed by handle.
8737  *   *update* could be of same type with the action pointed by the *handle*
8738  *   handle argument, or some other structures like a wrapper, depending on
8739  *   the indirect action type.
8740  * @param[out] error
8741  *   Perform verbose error reporting if not NULL. PMDs initialize this
8742  *   structure in case of error only.
8743  *
8744  * @return
8745  *   0 on success, a negative errno value otherwise and rte_errno is set.
8746  */
8747 static int
8748 mlx5_action_handle_update(struct rte_eth_dev *dev,
8749                 struct rte_flow_action_handle *handle,
8750                 const void *update,
8751                 struct rte_flow_error *error)
8752 {
8753         struct rte_flow_attr attr = { .transfer = 0 };
8754         const struct mlx5_flow_driver_ops *fops =
8755                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8756         int ret;
8757
8758         ret = flow_drv_action_validate(dev, NULL,
8759                         (const struct rte_flow_action *)update, fops, error);
8760         if (ret)
8761                 return ret;
8762         return flow_drv_action_update(dev, handle, update, fops,
8763                                       error);
8764 }
8765
8766 /**
8767  * Query the indirect action by handle.
8768  *
8769  * This function allows retrieving action-specific data such as counters.
8770  * Data is gathered by special action which may be present/referenced in
8771  * more than one flow rule definition.
8772  *
8773  * see @RTE_FLOW_ACTION_TYPE_COUNT
8774  *
8775  * @param dev
8776  *   Pointer to Ethernet device structure.
8777  * @param[in] handle
8778  *   Handle for the indirect action to query.
8779  * @param[in, out] data
8780  *   Pointer to storage for the associated query data type.
8781  * @param[out] error
8782  *   Perform verbose error reporting if not NULL. PMDs initialize this
8783  *   structure in case of error only.
8784  *
8785  * @return
8786  *   0 on success, a negative errno value otherwise and rte_errno is set.
8787  */
8788 static int
8789 mlx5_action_handle_query(struct rte_eth_dev *dev,
8790                          const struct rte_flow_action_handle *handle,
8791                          void *data,
8792                          struct rte_flow_error *error)
8793 {
8794         struct rte_flow_attr attr = { .transfer = 0 };
8795         const struct mlx5_flow_driver_ops *fops =
8796                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8797
8798         return flow_drv_action_query(dev, handle, data, fops, error);
8799 }
8800
8801 /**
8802  * Destroy all indirect actions (shared RSS).
8803  *
8804  * @param dev
8805  *   Pointer to Ethernet device.
8806  *
8807  * @return
8808  *   0 on success, a negative errno value otherwise and rte_errno is set.
8809  */
8810 int
8811 mlx5_action_handle_flush(struct rte_eth_dev *dev)
8812 {
8813         struct rte_flow_error error;
8814         struct mlx5_priv *priv = dev->data->dev_private;
8815         struct mlx5_shared_action_rss *shared_rss;
8816         int ret = 0;
8817         uint32_t idx;
8818
8819         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
8820                       priv->rss_shared_actions, idx, shared_rss, next) {
8821                 ret |= mlx5_action_handle_destroy(dev,
8822                        (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
8823         }
8824         return ret;
8825 }
8826
8827 /**
8828  * Validate existing indirect actions against current device configuration
8829  * and attach them to device resources.
8830  *
8831  * @param dev
8832  *   Pointer to Ethernet device.
8833  *
8834  * @return
8835  *   0 on success, a negative errno value otherwise and rte_errno is set.
8836  */
8837 int
8838 mlx5_action_handle_attach(struct rte_eth_dev *dev)
8839 {
8840         struct mlx5_priv *priv = dev->data->dev_private;
8841         struct mlx5_indexed_pool *ipool =
8842                         priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS];
8843         struct mlx5_shared_action_rss *shared_rss, *shared_rss_last;
8844         int ret = 0;
8845         uint32_t idx;
8846
8847         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8848                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8849                 const char *message;
8850                 uint32_t queue_idx;
8851
8852                 ret = mlx5_validate_rss_queues(dev, ind_tbl->queues,
8853                                                ind_tbl->queues_n,
8854                                                &message, &queue_idx);
8855                 if (ret != 0) {
8856                         DRV_LOG(ERR, "Port %u cannot use queue %u in RSS: %s",
8857                                 dev->data->port_id, ind_tbl->queues[queue_idx],
8858                                 message);
8859                         break;
8860                 }
8861         }
8862         if (ret != 0)
8863                 return ret;
8864         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8865                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8866
8867                 ret = mlx5_ind_table_obj_attach(dev, ind_tbl);
8868                 if (ret != 0) {
8869                         DRV_LOG(ERR, "Port %u could not attach "
8870                                 "indirection table obj %p",
8871                                 dev->data->port_id, (void *)ind_tbl);
8872                         goto error;
8873                 }
8874         }
8875         return 0;
8876 error:
8877         shared_rss_last = shared_rss;
8878         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8879                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8880
8881                 if (shared_rss == shared_rss_last)
8882                         break;
8883                 if (mlx5_ind_table_obj_detach(dev, ind_tbl) != 0)
8884                         DRV_LOG(CRIT, "Port %u could not detach "
8885                                 "indirection table obj %p on rollback",
8886                                 dev->data->port_id, (void *)ind_tbl);
8887         }
8888         return ret;
8889 }
8890
8891 /**
8892  * Detach indirect actions of the device from its resources.
8893  *
8894  * @param dev
8895  *   Pointer to Ethernet device.
8896  *
8897  * @return
8898  *   0 on success, a negative errno value otherwise and rte_errno is set.
8899  */
8900 int
8901 mlx5_action_handle_detach(struct rte_eth_dev *dev)
8902 {
8903         struct mlx5_priv *priv = dev->data->dev_private;
8904         struct mlx5_indexed_pool *ipool =
8905                         priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS];
8906         struct mlx5_shared_action_rss *shared_rss, *shared_rss_last;
8907         int ret = 0;
8908         uint32_t idx;
8909
8910         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8911                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8912
8913                 ret = mlx5_ind_table_obj_detach(dev, ind_tbl);
8914                 if (ret != 0) {
8915                         DRV_LOG(ERR, "Port %u could not detach "
8916                                 "indirection table obj %p",
8917                                 dev->data->port_id, (void *)ind_tbl);
8918                         goto error;
8919                 }
8920         }
8921         return 0;
8922 error:
8923         shared_rss_last = shared_rss;
8924         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8925                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8926
8927                 if (shared_rss == shared_rss_last)
8928                         break;
8929                 if (mlx5_ind_table_obj_attach(dev, ind_tbl) != 0)
8930                         DRV_LOG(CRIT, "Port %u could not attach "
8931                                 "indirection table obj %p on rollback",
8932                                 dev->data->port_id, (void *)ind_tbl);
8933         }
8934         return ret;
8935 }
8936
8937 #ifndef HAVE_MLX5DV_DR
8938 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
8939 #else
8940 #define MLX5_DOMAIN_SYNC_FLOW \
8941         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
8942 #endif
8943
8944 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
8945 {
8946         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
8947         const struct mlx5_flow_driver_ops *fops;
8948         int ret;
8949         struct rte_flow_attr attr = { .transfer = 0 };
8950
8951         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8952         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
8953         if (ret > 0)
8954                 ret = -ret;
8955         return ret;
8956 }
8957
8958 const struct mlx5_flow_tunnel *
8959 mlx5_get_tof(const struct rte_flow_item *item,
8960              const struct rte_flow_action *action,
8961              enum mlx5_tof_rule_type *rule_type)
8962 {
8963         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
8964                 if (item->type == (typeof(item->type))
8965                                   MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) {
8966                         *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE;
8967                         return flow_items_to_tunnel(item);
8968                 }
8969         }
8970         for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) {
8971                 if (action->type == (typeof(action->type))
8972                                     MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) {
8973                         *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE;
8974                         return flow_actions_to_tunnel(action);
8975                 }
8976         }
8977         return NULL;
8978 }
8979
8980 /**
8981  * tunnel offload functionalilty is defined for DV environment only
8982  */
8983 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8984 __extension__
8985 union tunnel_offload_mark {
8986         uint32_t val;
8987         struct {
8988                 uint32_t app_reserve:8;
8989                 uint32_t table_id:15;
8990                 uint32_t transfer:1;
8991                 uint32_t _unused_:8;
8992         };
8993 };
8994
8995 static bool
8996 mlx5_access_tunnel_offload_db
8997         (struct rte_eth_dev *dev,
8998          bool (*match)(struct rte_eth_dev *,
8999                        struct mlx5_flow_tunnel *, const void *),
9000          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
9001          void (*miss)(struct rte_eth_dev *, void *),
9002          void *ctx, bool lock_op);
9003
9004 static int
9005 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
9006                              struct rte_flow *flow,
9007                              const struct rte_flow_attr *attr,
9008                              const struct rte_flow_action *app_actions,
9009                              uint32_t flow_idx,
9010                              const struct mlx5_flow_tunnel *tunnel,
9011                              struct tunnel_default_miss_ctx *ctx,
9012                              struct rte_flow_error *error)
9013 {
9014         struct mlx5_priv *priv = dev->data->dev_private;
9015         struct mlx5_flow *dev_flow;
9016         struct rte_flow_attr miss_attr = *attr;
9017         const struct rte_flow_item miss_items[2] = {
9018                 {
9019                         .type = RTE_FLOW_ITEM_TYPE_ETH,
9020                         .spec = NULL,
9021                         .last = NULL,
9022                         .mask = NULL
9023                 },
9024                 {
9025                         .type = RTE_FLOW_ITEM_TYPE_END,
9026                         .spec = NULL,
9027                         .last = NULL,
9028                         .mask = NULL
9029                 }
9030         };
9031         union tunnel_offload_mark mark_id;
9032         struct rte_flow_action_mark miss_mark;
9033         struct rte_flow_action miss_actions[3] = {
9034                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
9035                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
9036         };
9037         const struct rte_flow_action_jump *jump_data;
9038         uint32_t i, flow_table = 0; /* prevent compilation warning */
9039         struct flow_grp_info grp_info = {
9040                 .external = 1,
9041                 .transfer = attr->transfer,
9042                 .fdb_def_rule = !!priv->fdb_def_rule,
9043                 .std_tbl_fix = 0,
9044         };
9045         int ret;
9046
9047         if (!attr->transfer) {
9048                 uint32_t q_size;
9049
9050                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
9051                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
9052                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
9053                                          0, SOCKET_ID_ANY);
9054                 if (!ctx->queue)
9055                         return rte_flow_error_set
9056                                 (error, ENOMEM,
9057                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9058                                 NULL, "invalid default miss RSS");
9059                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
9060                 ctx->action_rss.level = 0,
9061                 ctx->action_rss.types = priv->rss_conf.rss_hf,
9062                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
9063                 ctx->action_rss.queue_num = priv->reta_idx_n,
9064                 ctx->action_rss.key = priv->rss_conf.rss_key,
9065                 ctx->action_rss.queue = ctx->queue;
9066                 if (!priv->reta_idx_n || !priv->rxqs_n)
9067                         return rte_flow_error_set
9068                                 (error, EINVAL,
9069                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9070                                 NULL, "invalid port configuration");
9071                 if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG))
9072                         ctx->action_rss.types = 0;
9073                 for (i = 0; i != priv->reta_idx_n; ++i)
9074                         ctx->queue[i] = (*priv->reta_idx)[i];
9075         } else {
9076                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
9077                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
9078         }
9079         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
9080         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
9081         jump_data = app_actions->conf;
9082         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
9083         miss_attr.group = jump_data->group;
9084         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
9085                                        &flow_table, &grp_info, error);
9086         if (ret)
9087                 return rte_flow_error_set(error, EINVAL,
9088                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9089                                           NULL, "invalid tunnel id");
9090         mark_id.app_reserve = 0;
9091         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
9092         mark_id.transfer = !!attr->transfer;
9093         mark_id._unused_ = 0;
9094         miss_mark.id = mark_id.val;
9095         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
9096                                     miss_items, miss_actions, flow_idx, error);
9097         if (!dev_flow)
9098                 return -rte_errno;
9099         dev_flow->flow = flow;
9100         dev_flow->external = true;
9101         dev_flow->tunnel = tunnel;
9102         dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE;
9103         /* Subflow object was created, we must include one in the list. */
9104         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
9105                       dev_flow->handle, next);
9106         DRV_LOG(DEBUG,
9107                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
9108                 dev->data->port_id, tunnel->app_tunnel.type,
9109                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
9110         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
9111                                   miss_actions, error);
9112         if (!ret)
9113                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
9114                                                   error);
9115
9116         return ret;
9117 }
9118
9119 static const struct mlx5_flow_tbl_data_entry  *
9120 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
9121 {
9122         struct mlx5_priv *priv = dev->data->dev_private;
9123         struct mlx5_dev_ctx_shared *sh = priv->sh;
9124         struct mlx5_list_entry *he;
9125         union tunnel_offload_mark mbits = { .val = mark };
9126         union mlx5_flow_tbl_key table_key = {
9127                 {
9128                         .level = tunnel_id_to_flow_tbl(mbits.table_id),
9129                         .id = 0,
9130                         .reserved = 0,
9131                         .dummy = 0,
9132                         .is_fdb = !!mbits.transfer,
9133                         .is_egress = 0,
9134                 }
9135         };
9136         struct mlx5_flow_cb_ctx ctx = {
9137                 .data = &table_key.v64,
9138         };
9139
9140         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx);
9141         return he ?
9142                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
9143 }
9144
9145 static void
9146 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx,
9147                                    struct mlx5_list_entry *entry)
9148 {
9149         struct mlx5_dev_ctx_shared *sh = tool_ctx;
9150         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9151
9152         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9153                         tunnel_flow_tbl_to_id(tte->flow_table));
9154         mlx5_free(tte);
9155 }
9156
9157 static int
9158 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused,
9159                                   struct mlx5_list_entry *entry, void *cb_ctx)
9160 {
9161         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9162         union tunnel_tbl_key tbl = {
9163                 .val = *(uint64_t *)(ctx->data),
9164         };
9165         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9166
9167         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
9168 }
9169
9170 static struct mlx5_list_entry *
9171 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx)
9172 {
9173         struct mlx5_dev_ctx_shared *sh = tool_ctx;
9174         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9175         struct tunnel_tbl_entry *tte;
9176         union tunnel_tbl_key tbl = {
9177                 .val = *(uint64_t *)(ctx->data),
9178         };
9179
9180         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
9181                           sizeof(*tte), 0,
9182                           SOCKET_ID_ANY);
9183         if (!tte)
9184                 goto err;
9185         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9186                           &tte->flow_table);
9187         if (tte->flow_table >= MLX5_MAX_TABLES) {
9188                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
9189                         tte->flow_table);
9190                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9191                                 tte->flow_table);
9192                 goto err;
9193         } else if (!tte->flow_table) {
9194                 goto err;
9195         }
9196         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
9197         tte->tunnel_id = tbl.tunnel_id;
9198         tte->group = tbl.group;
9199         return &tte->hash;
9200 err:
9201         if (tte)
9202                 mlx5_free(tte);
9203         return NULL;
9204 }
9205
9206 static struct mlx5_list_entry *
9207 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused,
9208                                   struct mlx5_list_entry *oentry,
9209                                   void *cb_ctx __rte_unused)
9210 {
9211         struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte),
9212                                                    0, SOCKET_ID_ANY);
9213
9214         if (!tte)
9215                 return NULL;
9216         memcpy(tte, oentry, sizeof(*tte));
9217         return &tte->hash;
9218 }
9219
9220 static void
9221 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused,
9222                                        struct mlx5_list_entry *entry)
9223 {
9224         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9225
9226         mlx5_free(tte);
9227 }
9228
9229 static uint32_t
9230 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
9231                                 const struct mlx5_flow_tunnel *tunnel,
9232                                 uint32_t group, uint32_t *table,
9233                                 struct rte_flow_error *error)
9234 {
9235         struct mlx5_list_entry *he;
9236         struct tunnel_tbl_entry *tte;
9237         union tunnel_tbl_key key = {
9238                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
9239                 .group = group
9240         };
9241         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9242         struct mlx5_hlist *group_hash;
9243         struct mlx5_flow_cb_ctx ctx = {
9244                 .data = &key.val,
9245         };
9246
9247         group_hash = tunnel ? tunnel->groups : thub->groups;
9248         he = mlx5_hlist_register(group_hash, key.val, &ctx);
9249         if (!he)
9250                 return rte_flow_error_set(error, EINVAL,
9251                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
9252                                           NULL,
9253                                           "tunnel group index not supported");
9254         tte = container_of(he, typeof(*tte), hash);
9255         *table = tte->flow_table;
9256         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
9257                 dev->data->port_id, key.tunnel_id, group, *table);
9258         return 0;
9259 }
9260
9261 static void
9262 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
9263                       struct mlx5_flow_tunnel *tunnel)
9264 {
9265         struct mlx5_priv *priv = dev->data->dev_private;
9266         struct mlx5_indexed_pool *ipool;
9267
9268         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
9269                 dev->data->port_id, tunnel->tunnel_id);
9270         LIST_REMOVE(tunnel, chain);
9271         mlx5_hlist_destroy(tunnel->groups);
9272         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
9273         mlx5_ipool_free(ipool, tunnel->tunnel_id);
9274 }
9275
9276 static bool
9277 mlx5_access_tunnel_offload_db
9278         (struct rte_eth_dev *dev,
9279          bool (*match)(struct rte_eth_dev *,
9280                        struct mlx5_flow_tunnel *, const void *),
9281          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
9282          void (*miss)(struct rte_eth_dev *, void *),
9283          void *ctx, bool lock_op)
9284 {
9285         bool verdict = false;
9286         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9287         struct mlx5_flow_tunnel *tunnel;
9288
9289         rte_spinlock_lock(&thub->sl);
9290         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
9291                 verdict = match(dev, tunnel, (const void *)ctx);
9292                 if (verdict)
9293                         break;
9294         }
9295         if (!lock_op)
9296                 rte_spinlock_unlock(&thub->sl);
9297         if (verdict && hit)
9298                 hit(dev, tunnel, ctx);
9299         if (!verdict && miss)
9300                 miss(dev, ctx);
9301         if (lock_op)
9302                 rte_spinlock_unlock(&thub->sl);
9303
9304         return verdict;
9305 }
9306
9307 struct tunnel_db_find_tunnel_id_ctx {
9308         uint32_t tunnel_id;
9309         struct mlx5_flow_tunnel *tunnel;
9310 };
9311
9312 static bool
9313 find_tunnel_id_match(struct rte_eth_dev *dev,
9314                      struct mlx5_flow_tunnel *tunnel, const void *x)
9315 {
9316         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
9317
9318         RTE_SET_USED(dev);
9319         return tunnel->tunnel_id == ctx->tunnel_id;
9320 }
9321
9322 static void
9323 find_tunnel_id_hit(struct rte_eth_dev *dev,
9324                    struct mlx5_flow_tunnel *tunnel, void *x)
9325 {
9326         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
9327         RTE_SET_USED(dev);
9328         ctx->tunnel = tunnel;
9329 }
9330
9331 static struct mlx5_flow_tunnel *
9332 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
9333 {
9334         struct tunnel_db_find_tunnel_id_ctx ctx = {
9335                 .tunnel_id = id,
9336         };
9337
9338         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
9339                                       find_tunnel_id_hit, NULL, &ctx, true);
9340
9341         return ctx.tunnel;
9342 }
9343
9344 static struct mlx5_flow_tunnel *
9345 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
9346                           const struct rte_flow_tunnel *app_tunnel)
9347 {
9348         struct mlx5_priv *priv = dev->data->dev_private;
9349         struct mlx5_indexed_pool *ipool;
9350         struct mlx5_flow_tunnel *tunnel;
9351         uint32_t id;
9352
9353         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
9354         tunnel = mlx5_ipool_zmalloc(ipool, &id);
9355         if (!tunnel)
9356                 return NULL;
9357         if (id >= MLX5_MAX_TUNNELS) {
9358                 mlx5_ipool_free(ipool, id);
9359                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
9360                 return NULL;
9361         }
9362         tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true,
9363                                            priv->sh,
9364                                            mlx5_flow_tunnel_grp2tbl_create_cb,
9365                                            mlx5_flow_tunnel_grp2tbl_match_cb,
9366                                            mlx5_flow_tunnel_grp2tbl_remove_cb,
9367                                            mlx5_flow_tunnel_grp2tbl_clone_cb,
9368                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9369         if (!tunnel->groups) {
9370                 mlx5_ipool_free(ipool, id);
9371                 return NULL;
9372         }
9373         /* initiate new PMD tunnel */
9374         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
9375         tunnel->tunnel_id = id;
9376         tunnel->action.type = (typeof(tunnel->action.type))
9377                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
9378         tunnel->action.conf = tunnel;
9379         tunnel->item.type = (typeof(tunnel->item.type))
9380                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
9381         tunnel->item.spec = tunnel;
9382         tunnel->item.last = NULL;
9383         tunnel->item.mask = NULL;
9384
9385         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
9386                 dev->data->port_id, tunnel->tunnel_id);
9387
9388         return tunnel;
9389 }
9390
9391 struct tunnel_db_get_tunnel_ctx {
9392         const struct rte_flow_tunnel *app_tunnel;
9393         struct mlx5_flow_tunnel *tunnel;
9394 };
9395
9396 static bool get_tunnel_match(struct rte_eth_dev *dev,
9397                              struct mlx5_flow_tunnel *tunnel, const void *x)
9398 {
9399         const struct tunnel_db_get_tunnel_ctx *ctx = x;
9400
9401         RTE_SET_USED(dev);
9402         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
9403                        sizeof(*ctx->app_tunnel));
9404 }
9405
9406 static void get_tunnel_hit(struct rte_eth_dev *dev,
9407                            struct mlx5_flow_tunnel *tunnel, void *x)
9408 {
9409         /* called under tunnel spinlock protection */
9410         struct tunnel_db_get_tunnel_ctx *ctx = x;
9411
9412         RTE_SET_USED(dev);
9413         tunnel->refctn++;
9414         ctx->tunnel = tunnel;
9415 }
9416
9417 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
9418 {
9419         /* called under tunnel spinlock protection */
9420         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9421         struct tunnel_db_get_tunnel_ctx *ctx = x;
9422
9423         rte_spinlock_unlock(&thub->sl);
9424         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
9425         rte_spinlock_lock(&thub->sl);
9426         if (ctx->tunnel) {
9427                 ctx->tunnel->refctn = 1;
9428                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
9429         }
9430 }
9431
9432
9433 static int
9434 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
9435                      const struct rte_flow_tunnel *app_tunnel,
9436                      struct mlx5_flow_tunnel **tunnel)
9437 {
9438         struct tunnel_db_get_tunnel_ctx ctx = {
9439                 .app_tunnel = app_tunnel,
9440         };
9441
9442         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
9443                                       get_tunnel_miss, &ctx, true);
9444         *tunnel = ctx.tunnel;
9445         return ctx.tunnel ? 0 : -ENOMEM;
9446 }
9447
9448 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
9449 {
9450         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
9451
9452         if (!thub)
9453                 return;
9454         if (!LIST_EMPTY(&thub->tunnels))
9455                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
9456         mlx5_hlist_destroy(thub->groups);
9457         mlx5_free(thub);
9458 }
9459
9460 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
9461 {
9462         int err;
9463         struct mlx5_flow_tunnel_hub *thub;
9464
9465         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
9466                            0, SOCKET_ID_ANY);
9467         if (!thub)
9468                 return -ENOMEM;
9469         LIST_INIT(&thub->tunnels);
9470         rte_spinlock_init(&thub->sl);
9471         thub->groups = mlx5_hlist_create("flow groups", 64,
9472                                          false, true, sh,
9473                                          mlx5_flow_tunnel_grp2tbl_create_cb,
9474                                          mlx5_flow_tunnel_grp2tbl_match_cb,
9475                                          mlx5_flow_tunnel_grp2tbl_remove_cb,
9476                                          mlx5_flow_tunnel_grp2tbl_clone_cb,
9477                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9478         if (!thub->groups) {
9479                 err = -rte_errno;
9480                 goto err;
9481         }
9482         sh->tunnel_hub = thub;
9483
9484         return 0;
9485
9486 err:
9487         if (thub->groups)
9488                 mlx5_hlist_destroy(thub->groups);
9489         if (thub)
9490                 mlx5_free(thub);
9491         return err;
9492 }
9493
9494 static inline bool
9495 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
9496                           struct rte_flow_tunnel *tunnel,
9497                           const char *err_msg)
9498 {
9499         err_msg = NULL;
9500         if (!is_tunnel_offload_active(dev)) {
9501                 err_msg = "tunnel offload was not activated";
9502                 goto out;
9503         } else if (!tunnel) {
9504                 err_msg = "no application tunnel";
9505                 goto out;
9506         }
9507
9508         switch (tunnel->type) {
9509         default:
9510                 err_msg = "unsupported tunnel type";
9511                 goto out;
9512         case RTE_FLOW_ITEM_TYPE_VXLAN:
9513         case RTE_FLOW_ITEM_TYPE_GRE:
9514         case RTE_FLOW_ITEM_TYPE_NVGRE:
9515         case RTE_FLOW_ITEM_TYPE_GENEVE:
9516                 break;
9517         }
9518
9519 out:
9520         return !err_msg;
9521 }
9522
9523 static int
9524 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
9525                     struct rte_flow_tunnel *app_tunnel,
9526                     struct rte_flow_action **actions,
9527                     uint32_t *num_of_actions,
9528                     struct rte_flow_error *error)
9529 {
9530         int ret;
9531         struct mlx5_flow_tunnel *tunnel;
9532         const char *err_msg = NULL;
9533         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9534
9535         if (!verdict)
9536                 return rte_flow_error_set(error, EINVAL,
9537                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9538                                           err_msg);
9539         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9540         if (ret < 0) {
9541                 return rte_flow_error_set(error, ret,
9542                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9543                                           "failed to initialize pmd tunnel");
9544         }
9545         *actions = &tunnel->action;
9546         *num_of_actions = 1;
9547         return 0;
9548 }
9549
9550 static int
9551 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
9552                        struct rte_flow_tunnel *app_tunnel,
9553                        struct rte_flow_item **items,
9554                        uint32_t *num_of_items,
9555                        struct rte_flow_error *error)
9556 {
9557         int ret;
9558         struct mlx5_flow_tunnel *tunnel;
9559         const char *err_msg = NULL;
9560         bool verdict = mlx5_flow_tunnel_validate(dev, app_tunnel, err_msg);
9561
9562         if (!verdict)
9563                 return rte_flow_error_set(error, EINVAL,
9564                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9565                                           err_msg);
9566         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9567         if (ret < 0) {
9568                 return rte_flow_error_set(error, ret,
9569                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9570                                           "failed to initialize pmd tunnel");
9571         }
9572         *items = &tunnel->item;
9573         *num_of_items = 1;
9574         return 0;
9575 }
9576
9577 struct tunnel_db_element_release_ctx {
9578         struct rte_flow_item *items;
9579         struct rte_flow_action *actions;
9580         uint32_t num_elements;
9581         struct rte_flow_error *error;
9582         int ret;
9583 };
9584
9585 static bool
9586 tunnel_element_release_match(struct rte_eth_dev *dev,
9587                              struct mlx5_flow_tunnel *tunnel, const void *x)
9588 {
9589         const struct tunnel_db_element_release_ctx *ctx = x;
9590
9591         RTE_SET_USED(dev);
9592         if (ctx->num_elements != 1)
9593                 return false;
9594         else if (ctx->items)
9595                 return ctx->items == &tunnel->item;
9596         else if (ctx->actions)
9597                 return ctx->actions == &tunnel->action;
9598
9599         return false;
9600 }
9601
9602 static void
9603 tunnel_element_release_hit(struct rte_eth_dev *dev,
9604                            struct mlx5_flow_tunnel *tunnel, void *x)
9605 {
9606         struct tunnel_db_element_release_ctx *ctx = x;
9607         ctx->ret = 0;
9608         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
9609                 mlx5_flow_tunnel_free(dev, tunnel);
9610 }
9611
9612 static void
9613 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
9614 {
9615         struct tunnel_db_element_release_ctx *ctx = x;
9616         RTE_SET_USED(dev);
9617         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
9618                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9619                                       "invalid argument");
9620 }
9621
9622 static int
9623 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
9624                        struct rte_flow_item *pmd_items,
9625                        uint32_t num_items, struct rte_flow_error *err)
9626 {
9627         struct tunnel_db_element_release_ctx ctx = {
9628                 .items = pmd_items,
9629                 .actions = NULL,
9630                 .num_elements = num_items,
9631                 .error = err,
9632         };
9633
9634         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9635                                       tunnel_element_release_hit,
9636                                       tunnel_element_release_miss, &ctx, false);
9637
9638         return ctx.ret;
9639 }
9640
9641 static int
9642 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
9643                          struct rte_flow_action *pmd_actions,
9644                          uint32_t num_actions, struct rte_flow_error *err)
9645 {
9646         struct tunnel_db_element_release_ctx ctx = {
9647                 .items = NULL,
9648                 .actions = pmd_actions,
9649                 .num_elements = num_actions,
9650                 .error = err,
9651         };
9652
9653         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9654                                       tunnel_element_release_hit,
9655                                       tunnel_element_release_miss, &ctx, false);
9656
9657         return ctx.ret;
9658 }
9659
9660 static int
9661 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
9662                                   struct rte_mbuf *m,
9663                                   struct rte_flow_restore_info *info,
9664                                   struct rte_flow_error *err)
9665 {
9666         uint64_t ol_flags = m->ol_flags;
9667         const struct mlx5_flow_tbl_data_entry *tble;
9668         const uint64_t mask = RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID;
9669
9670         if (!is_tunnel_offload_active(dev)) {
9671                 info->flags = 0;
9672                 return 0;
9673         }
9674
9675         if ((ol_flags & mask) != mask)
9676                 goto err;
9677         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
9678         if (!tble) {
9679                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
9680                         dev->data->port_id, m->hash.fdir.hi);
9681                 goto err;
9682         }
9683         MLX5_ASSERT(tble->tunnel);
9684         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
9685         info->group_id = tble->group_id;
9686         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
9687                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
9688                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
9689
9690         return 0;
9691
9692 err:
9693         return rte_flow_error_set(err, EINVAL,
9694                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9695                                   "failed to get restore info");
9696 }
9697
9698 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
9699 static int
9700 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
9701                            __rte_unused struct rte_flow_tunnel *app_tunnel,
9702                            __rte_unused struct rte_flow_action **actions,
9703                            __rte_unused uint32_t *num_of_actions,
9704                            __rte_unused struct rte_flow_error *error)
9705 {
9706         return -ENOTSUP;
9707 }
9708
9709 static int
9710 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
9711                        __rte_unused struct rte_flow_tunnel *app_tunnel,
9712                        __rte_unused struct rte_flow_item **items,
9713                        __rte_unused uint32_t *num_of_items,
9714                        __rte_unused struct rte_flow_error *error)
9715 {
9716         return -ENOTSUP;
9717 }
9718
9719 static int
9720 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
9721                               __rte_unused struct rte_flow_item *pmd_items,
9722                               __rte_unused uint32_t num_items,
9723                               __rte_unused struct rte_flow_error *err)
9724 {
9725         return -ENOTSUP;
9726 }
9727
9728 static int
9729 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
9730                                 __rte_unused struct rte_flow_action *pmd_action,
9731                                 __rte_unused uint32_t num_actions,
9732                                 __rte_unused struct rte_flow_error *err)
9733 {
9734         return -ENOTSUP;
9735 }
9736
9737 static int
9738 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
9739                                   __rte_unused struct rte_mbuf *m,
9740                                   __rte_unused struct rte_flow_restore_info *i,
9741                                   __rte_unused struct rte_flow_error *err)
9742 {
9743         return -ENOTSUP;
9744 }
9745
9746 static int
9747 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
9748                              __rte_unused struct rte_flow *flow,
9749                              __rte_unused const struct rte_flow_attr *attr,
9750                              __rte_unused const struct rte_flow_action *actions,
9751                              __rte_unused uint32_t flow_idx,
9752                              __rte_unused const struct mlx5_flow_tunnel *tunnel,
9753                              __rte_unused struct tunnel_default_miss_ctx *ctx,
9754                              __rte_unused struct rte_flow_error *error)
9755 {
9756         return -ENOTSUP;
9757 }
9758
9759 static struct mlx5_flow_tunnel *
9760 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
9761                     __rte_unused uint32_t id)
9762 {
9763         return NULL;
9764 }
9765
9766 static void
9767 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
9768                       __rte_unused struct mlx5_flow_tunnel *tunnel)
9769 {
9770 }
9771
9772 static uint32_t
9773 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
9774                                 __rte_unused const struct mlx5_flow_tunnel *t,
9775                                 __rte_unused uint32_t group,
9776                                 __rte_unused uint32_t *table,
9777                                 struct rte_flow_error *error)
9778 {
9779         return rte_flow_error_set(error, ENOTSUP,
9780                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9781                                   "tunnel offload requires DV support");
9782 }
9783
9784 void
9785 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
9786                         __rte_unused  uint16_t port_id)
9787 {
9788 }
9789 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
9790
9791 static void
9792 mlx5_dbg__print_pattern(const struct rte_flow_item *item)
9793 {
9794         int ret;
9795         struct rte_flow_error error;
9796
9797         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
9798                 char *item_name;
9799                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name,
9800                                     sizeof(item_name),
9801                                     (void *)(uintptr_t)item->type, &error);
9802                 if (ret > 0)
9803                         printf("%s ", item_name);
9804                 else
9805                         printf("%d\n", (int)item->type);
9806         }
9807         printf("END\n");
9808 }
9809
9810 static int
9811 mlx5_flow_is_std_vxlan_port(const struct rte_flow_item *udp_item)
9812 {
9813         const struct rte_flow_item_udp *spec = udp_item->spec;
9814         const struct rte_flow_item_udp *mask = udp_item->mask;
9815         uint16_t udp_dport = 0;
9816
9817         if (spec != NULL) {
9818                 if (!mask)
9819                         mask = &rte_flow_item_udp_mask;
9820                 udp_dport = rte_be_to_cpu_16(spec->hdr.dst_port &
9821                                 mask->hdr.dst_port);
9822         }
9823         return (!udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN);
9824 }
9825
9826 static const struct mlx5_flow_expand_node *
9827 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
9828                 unsigned int item_idx,
9829                 const struct mlx5_flow_expand_node graph[],
9830                 const struct mlx5_flow_expand_node *node)
9831 {
9832         const struct rte_flow_item *item = pattern + item_idx, *prev_item;
9833
9834         if (item->type == RTE_FLOW_ITEM_TYPE_VXLAN &&
9835                         node != NULL &&
9836                         node->type == RTE_FLOW_ITEM_TYPE_VXLAN) {
9837                 /*
9838                  * The expansion node is VXLAN and it is also the last
9839                  * expandable item in the pattern, so need to continue
9840                  * expansion of the inner tunnel.
9841                  */
9842                 MLX5_ASSERT(item_idx > 0);
9843                 prev_item = pattern + item_idx - 1;
9844                 MLX5_ASSERT(prev_item->type == RTE_FLOW_ITEM_TYPE_UDP);
9845                 if (mlx5_flow_is_std_vxlan_port(prev_item))
9846                         return &graph[MLX5_EXPANSION_STD_VXLAN];
9847                 return &graph[MLX5_EXPANSION_L3_VXLAN];
9848         }
9849         return node;
9850 }
9851
9852 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
9853 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
9854         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
9855 };
9856
9857 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
9858 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
9859         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
9860         { 9, 10, 11 }, { 12, 13, 14 },
9861 };
9862
9863 /**
9864  * Discover the number of available flow priorities.
9865  *
9866  * @param dev
9867  *   Ethernet device.
9868  *
9869  * @return
9870  *   On success, number of available flow priorities.
9871  *   On failure, a negative errno-style code and rte_errno is set.
9872  */
9873 int
9874 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
9875 {
9876         static const uint16_t vprio[] = {8, 16};
9877         const struct mlx5_priv *priv = dev->data->dev_private;
9878         const struct mlx5_flow_driver_ops *fops;
9879         enum mlx5_flow_drv_type type;
9880         int ret;
9881
9882         type = mlx5_flow_os_get_type();
9883         if (type == MLX5_FLOW_TYPE_MAX) {
9884                 type = MLX5_FLOW_TYPE_VERBS;
9885                 if (priv->sh->devx && priv->config.dv_flow_en)
9886                         type = MLX5_FLOW_TYPE_DV;
9887         }
9888         fops = flow_get_drv_ops(type);
9889         if (fops->discover_priorities == NULL) {
9890                 DRV_LOG(ERR, "Priority discovery not supported");
9891                 rte_errno = ENOTSUP;
9892                 return -rte_errno;
9893         }
9894         ret = fops->discover_priorities(dev, vprio, RTE_DIM(vprio));
9895         if (ret < 0)
9896                 return ret;
9897         switch (ret) {
9898         case 8:
9899                 ret = RTE_DIM(priority_map_3);
9900                 break;
9901         case 16:
9902                 ret = RTE_DIM(priority_map_5);
9903                 break;
9904         default:
9905                 rte_errno = ENOTSUP;
9906                 DRV_LOG(ERR,
9907                         "port %u maximum priority: %d expected 8/16",
9908                         dev->data->port_id, ret);
9909                 return -rte_errno;
9910         }
9911         DRV_LOG(INFO, "port %u supported flow priorities:"
9912                 " 0-%d for ingress or egress root table,"
9913                 " 0-%d for non-root table or transfer root table.",
9914                 dev->data->port_id, ret - 2,
9915                 MLX5_NON_ROOT_FLOW_MAX_PRIO - 1);
9916         return ret;
9917 }
9918
9919 /**
9920  * Adjust flow priority based on the highest layer and the request priority.
9921  *
9922  * @param[in] dev
9923  *   Pointer to the Ethernet device structure.
9924  * @param[in] priority
9925  *   The rule base priority.
9926  * @param[in] subpriority
9927  *   The priority based on the items.
9928  *
9929  * @return
9930  *   The new priority.
9931  */
9932 uint32_t
9933 mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
9934                           uint32_t subpriority)
9935 {
9936         uint32_t res = 0;
9937         struct mlx5_priv *priv = dev->data->dev_private;
9938
9939         switch (priv->sh->flow_max_priority) {
9940         case RTE_DIM(priority_map_3):
9941                 res = priority_map_3[priority][subpriority];
9942                 break;
9943         case RTE_DIM(priority_map_5):
9944                 res = priority_map_5[priority][subpriority];
9945                 break;
9946         }
9947         return  res;
9948 }