1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2016 6WIND S.A.
3 * Copyright 2016 Mellanox Technologies, Ltd
10 #include <sys/queue.h>
12 #include <rte_common.h>
13 #include <rte_ether.h>
14 #include <ethdev_driver.h>
15 #include <rte_eal_paging.h>
17 #include <rte_cycles.h>
18 #include <rte_flow_driver.h>
19 #include <rte_malloc.h>
22 #include <mlx5_glue.h>
23 #include <mlx5_devx_cmds.h>
25 #include <mlx5_malloc.h>
27 #include "mlx5_defs.h"
29 #include "mlx5_flow.h"
30 #include "mlx5_flow_os.h"
33 #include "mlx5_common_os.h"
34 #include "rte_pmd_mlx5.h"
36 struct tunnel_default_miss_ctx {
40 struct rte_flow_action_rss action_rss;
41 struct rte_flow_action_queue miss_queue;
42 struct rte_flow_action_jump miss_jump;
48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
49 struct rte_flow *flow,
50 const struct rte_flow_attr *attr,
51 const struct rte_flow_action *app_actions,
53 const struct mlx5_flow_tunnel *tunnel,
54 struct tunnel_default_miss_ctx *ctx,
55 struct rte_flow_error *error);
56 static struct mlx5_flow_tunnel *
57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
62 const struct mlx5_flow_tunnel *tunnel,
63 uint32_t group, uint32_t *table,
64 struct rte_flow_error *error);
66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
67 static void mlx5_flow_pop_thread_workspace(void);
70 /** Device flow drivers. */
71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
76 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
78 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
79 [MLX5_FLOW_TYPE_HW] = &mlx5_flow_hw_drv_ops,
81 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
82 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
85 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
86 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
91 /** Node object of input graph for mlx5_flow_expand_rss(). */
92 struct mlx5_flow_expand_node {
93 const int *const next;
95 * List of next node indexes. Index 0 is interpreted as a terminator.
97 const enum rte_flow_item_type type;
98 /**< Pattern item type of current node. */
101 * RSS types bit-field associated with this node
102 * (see RTE_ETH_RSS_* definitions).
106 * Bit-fields that define how the node is used in the expansion.
107 * (see MLX5_EXPANSION_NODE_* definitions).
111 /* Optional expand field. The expansion alg will not go deeper. */
112 #define MLX5_EXPANSION_NODE_OPTIONAL (UINT64_C(1) << 0)
114 /* The node is not added implicitly as expansion to the flow pattern.
115 * If the node type does not match the flow pattern item type, the
116 * expansion alg will go deeper to its next items.
117 * In the current implementation, the list of next nodes indexes can
118 * have up to one node with this flag set and it has to be the last
119 * node index (before the list terminator).
121 #define MLX5_EXPANSION_NODE_EXPLICIT (UINT64_C(1) << 1)
123 /** Object returned by mlx5_flow_expand_rss(). */
124 struct mlx5_flow_expand_rss {
126 /**< Number of entries @p patterns and @p priorities. */
128 struct rte_flow_item *pattern; /**< Expanded pattern array. */
129 uint32_t priority; /**< Priority offset for each expansion. */
134 mlx5_dbg__print_pattern(const struct rte_flow_item *item);
136 static const struct mlx5_flow_expand_node *
137 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
138 unsigned int item_idx,
139 const struct mlx5_flow_expand_node graph[],
140 const struct mlx5_flow_expand_node *node);
143 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item)
145 switch (item->type) {
146 case RTE_FLOW_ITEM_TYPE_ETH:
147 case RTE_FLOW_ITEM_TYPE_VLAN:
148 case RTE_FLOW_ITEM_TYPE_IPV4:
149 case RTE_FLOW_ITEM_TYPE_IPV6:
150 case RTE_FLOW_ITEM_TYPE_UDP:
151 case RTE_FLOW_ITEM_TYPE_TCP:
152 case RTE_FLOW_ITEM_TYPE_VXLAN:
153 case RTE_FLOW_ITEM_TYPE_NVGRE:
154 case RTE_FLOW_ITEM_TYPE_GRE:
155 case RTE_FLOW_ITEM_TYPE_GENEVE:
156 case RTE_FLOW_ITEM_TYPE_MPLS:
157 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
158 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
159 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
160 case RTE_FLOW_ITEM_TYPE_GTP:
169 * Network Service Header (NSH) and its next protocol values
170 * are described in RFC-8393.
172 static enum rte_flow_item_type
173 mlx5_nsh_proto_to_item_type(uint8_t proto_spec, uint8_t proto_mask)
175 enum rte_flow_item_type type;
177 switch (proto_mask & proto_spec) {
178 case RTE_VXLAN_GPE_TYPE_IPV4:
179 type = RTE_FLOW_ITEM_TYPE_IPV4;
181 case RTE_VXLAN_GPE_TYPE_IPV6:
182 type = RTE_VXLAN_GPE_TYPE_IPV6;
184 case RTE_VXLAN_GPE_TYPE_ETH:
185 type = RTE_FLOW_ITEM_TYPE_ETH;
188 type = RTE_FLOW_ITEM_TYPE_END;
193 static enum rte_flow_item_type
194 mlx5_inet_proto_to_item_type(uint8_t proto_spec, uint8_t proto_mask)
196 enum rte_flow_item_type type;
198 switch (proto_mask & proto_spec) {
200 type = RTE_FLOW_ITEM_TYPE_UDP;
203 type = RTE_FLOW_ITEM_TYPE_TCP;
206 type = RTE_FLOW_ITEM_TYPE_IPV4;
209 type = RTE_FLOW_ITEM_TYPE_IPV6;
212 type = RTE_FLOW_ITEM_TYPE_END;
217 static enum rte_flow_item_type
218 mlx5_ethertype_to_item_type(rte_be16_t type_spec,
219 rte_be16_t type_mask, bool is_tunnel)
221 enum rte_flow_item_type type;
223 switch (rte_be_to_cpu_16(type_spec & type_mask)) {
224 case RTE_ETHER_TYPE_TEB:
226 RTE_FLOW_ITEM_TYPE_ETH : RTE_FLOW_ITEM_TYPE_END;
228 case RTE_ETHER_TYPE_VLAN:
230 RTE_FLOW_ITEM_TYPE_VLAN : RTE_FLOW_ITEM_TYPE_END;
232 case RTE_ETHER_TYPE_IPV4:
233 type = RTE_FLOW_ITEM_TYPE_IPV4;
235 case RTE_ETHER_TYPE_IPV6:
236 type = RTE_FLOW_ITEM_TYPE_IPV6;
239 type = RTE_FLOW_ITEM_TYPE_END;
244 static enum rte_flow_item_type
245 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
247 #define MLX5_XSET_ITEM_MASK_SPEC(type, fld) \
249 const void *m = item->mask; \
250 const void *s = item->spec; \
252 ((const struct rte_flow_item_##type *)m)->fld : \
253 rte_flow_item_##type##_mask.fld; \
254 spec = ((const struct rte_flow_item_##type *)s)->fld; \
257 enum rte_flow_item_type ret;
260 if (item == NULL || item->spec == NULL)
261 return RTE_FLOW_ITEM_TYPE_VOID;
262 switch (item->type) {
263 case RTE_FLOW_ITEM_TYPE_ETH:
264 MLX5_XSET_ITEM_MASK_SPEC(eth, type);
266 return RTE_FLOW_ITEM_TYPE_VOID;
267 ret = mlx5_ethertype_to_item_type(spec, mask, false);
269 case RTE_FLOW_ITEM_TYPE_VLAN:
270 MLX5_XSET_ITEM_MASK_SPEC(vlan, inner_type);
272 return RTE_FLOW_ITEM_TYPE_VOID;
273 ret = mlx5_ethertype_to_item_type(spec, mask, false);
275 case RTE_FLOW_ITEM_TYPE_IPV4:
276 MLX5_XSET_ITEM_MASK_SPEC(ipv4, hdr.next_proto_id);
278 return RTE_FLOW_ITEM_TYPE_VOID;
279 ret = mlx5_inet_proto_to_item_type(spec, mask);
281 case RTE_FLOW_ITEM_TYPE_IPV6:
282 MLX5_XSET_ITEM_MASK_SPEC(ipv6, hdr.proto);
284 return RTE_FLOW_ITEM_TYPE_VOID;
285 ret = mlx5_inet_proto_to_item_type(spec, mask);
287 case RTE_FLOW_ITEM_TYPE_GENEVE:
288 MLX5_XSET_ITEM_MASK_SPEC(geneve, protocol);
289 ret = mlx5_ethertype_to_item_type(spec, mask, true);
291 case RTE_FLOW_ITEM_TYPE_GRE:
292 MLX5_XSET_ITEM_MASK_SPEC(gre, protocol);
293 ret = mlx5_ethertype_to_item_type(spec, mask, true);
295 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
296 MLX5_XSET_ITEM_MASK_SPEC(vxlan_gpe, protocol);
297 ret = mlx5_nsh_proto_to_item_type(spec, mask);
300 ret = RTE_FLOW_ITEM_TYPE_VOID;
304 #undef MLX5_XSET_ITEM_MASK_SPEC
308 mlx5_flow_expand_rss_skip_explicit(const struct mlx5_flow_expand_node graph[],
309 const int *next_node)
311 const struct mlx5_flow_expand_node *node = NULL;
312 const int *next = next_node;
314 while (next && *next) {
316 * Skip the nodes with the MLX5_EXPANSION_NODE_EXPLICIT
317 * flag set, because they were not found in the flow pattern.
319 node = &graph[*next];
320 if (!(node->node_flags & MLX5_EXPANSION_NODE_EXPLICIT))
327 #define MLX5_RSS_EXP_ELT_N 16
330 * Expand RSS flows into several possible flows according to the RSS hash
331 * fields requested and the driver capabilities.
334 * Buffer to store the result expansion.
336 * Buffer size in bytes. If 0, @p buf can be NULL.
340 * RSS types to expand (see RTE_ETH_RSS_* definitions).
342 * Input graph to expand @p pattern according to @p types.
343 * @param[in] graph_root_index
344 * Index of root node in @p graph, typically 0.
347 * A positive value representing the size of @p buf in bytes regardless of
348 * @p size on success, a negative errno value otherwise and rte_errno is
349 * set, the following errors are defined:
351 * -E2BIG: graph-depth @p graph is too deep.
352 * -EINVAL: @p size has not enough space for expanded pattern.
355 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
356 const struct rte_flow_item *pattern, uint64_t types,
357 const struct mlx5_flow_expand_node graph[],
358 int graph_root_index)
360 const struct rte_flow_item *item;
361 const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
362 const int *next_node;
363 const int *stack[MLX5_RSS_EXP_ELT_N];
365 struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
366 unsigned int i, item_idx, last_expand_item_idx = 0;
368 size_t user_pattern_size = 0;
370 const struct mlx5_flow_expand_node *next = NULL;
371 struct rte_flow_item missed_item;
374 const struct rte_flow_item *last_expand_item = NULL;
376 memset(&missed_item, 0, sizeof(missed_item));
377 lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
378 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
381 buf->entry[0].priority = 0;
382 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
384 addr = buf->entry[0].pattern;
385 for (item = pattern, item_idx = 0;
386 item->type != RTE_FLOW_ITEM_TYPE_END;
387 item++, item_idx++) {
388 if (!mlx5_flow_is_rss_expandable_item(item)) {
389 user_pattern_size += sizeof(*item);
392 last_expand_item = item;
393 last_expand_item_idx = item_idx;
395 while (node->next && node->next[i]) {
396 next = &graph[node->next[i]];
397 if (next->type == item->type)
399 if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
408 user_pattern_size += sizeof(*item);
410 user_pattern_size += sizeof(*item); /* Handle END item. */
411 lsize += user_pattern_size;
414 /* Copy the user pattern in the first entry of the buffer. */
415 rte_memcpy(addr, pattern, user_pattern_size);
416 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
418 /* Start expanding. */
419 memset(flow_items, 0, sizeof(flow_items));
420 user_pattern_size -= sizeof(*item);
422 * Check if the last valid item has spec set, need complete pattern,
423 * and the pattern can be used for expansion.
425 missed_item.type = mlx5_flow_expand_rss_item_complete(last_expand_item);
426 if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
427 /* Item type END indicates expansion is not required. */
430 if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
434 while (node->next && node->next[i]) {
435 next = &graph[node->next[i]];
436 if (next->type == missed_item.type) {
437 flow_items[0].type = missed_item.type;
438 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
441 if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
450 if (next && missed) {
451 elt = 2; /* missed item + item end. */
453 lsize += elt * sizeof(*item) + user_pattern_size;
456 if (node->rss_types & types) {
457 buf->entry[buf->entries].priority = 1;
458 buf->entry[buf->entries].pattern = addr;
460 rte_memcpy(addr, buf->entry[0].pattern,
462 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
463 rte_memcpy(addr, flow_items, elt * sizeof(*item));
464 addr = (void *)(((uintptr_t)addr) +
465 elt * sizeof(*item));
467 } else if (last_expand_item != NULL) {
468 node = mlx5_flow_expand_rss_adjust_node(pattern,
469 last_expand_item_idx, graph, node);
471 memset(flow_items, 0, sizeof(flow_items));
472 next_node = mlx5_flow_expand_rss_skip_explicit(graph,
474 stack[stack_pos] = next_node;
475 node = next_node ? &graph[*next_node] : NULL;
477 flow_items[stack_pos].type = node->type;
478 if (node->rss_types & types) {
481 * compute the number of items to copy from the
482 * expansion and copy it.
483 * When the stack_pos is 0, there are 1 element in it,
484 * plus the addition END item.
487 flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
488 lsize += elt * sizeof(*item) + user_pattern_size;
491 n = elt * sizeof(*item);
492 buf->entry[buf->entries].priority =
493 stack_pos + 1 + missed;
494 buf->entry[buf->entries].pattern = addr;
496 rte_memcpy(addr, buf->entry[0].pattern,
498 addr = (void *)(((uintptr_t)addr) +
500 rte_memcpy(addr, &missed_item,
501 missed * sizeof(*item));
502 addr = (void *)(((uintptr_t)addr) +
503 missed * sizeof(*item));
504 rte_memcpy(addr, flow_items, n);
505 addr = (void *)(((uintptr_t)addr) + n);
508 if (!(node->node_flags & MLX5_EXPANSION_NODE_OPTIONAL) &&
510 next_node = mlx5_flow_expand_rss_skip_explicit(graph,
512 if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
516 stack[stack_pos] = next_node;
517 } else if (*(next_node + 1)) {
518 /* Follow up with the next possibility. */
519 next_node = mlx5_flow_expand_rss_skip_explicit(graph,
521 } else if (!stack_pos) {
523 * Completing the traverse over the different paths.
524 * The next_node is advanced to the terminator.
528 /* Move to the next path. */
530 next_node = stack[--stack_pos];
535 next_node = mlx5_flow_expand_rss_skip_explicit(graph,
537 stack[stack_pos] = next_node;
539 node = next_node && *next_node ? &graph[*next_node] : NULL;
544 enum mlx5_expansion {
546 MLX5_EXPANSION_ROOT_OUTER,
547 MLX5_EXPANSION_OUTER_ETH,
548 MLX5_EXPANSION_OUTER_VLAN,
549 MLX5_EXPANSION_OUTER_IPV4,
550 MLX5_EXPANSION_OUTER_IPV4_UDP,
551 MLX5_EXPANSION_OUTER_IPV4_TCP,
552 MLX5_EXPANSION_OUTER_IPV6,
553 MLX5_EXPANSION_OUTER_IPV6_UDP,
554 MLX5_EXPANSION_OUTER_IPV6_TCP,
555 MLX5_EXPANSION_VXLAN,
556 MLX5_EXPANSION_STD_VXLAN,
557 MLX5_EXPANSION_L3_VXLAN,
558 MLX5_EXPANSION_VXLAN_GPE,
560 MLX5_EXPANSION_NVGRE,
561 MLX5_EXPANSION_GRE_KEY,
566 MLX5_EXPANSION_IPV4_UDP,
567 MLX5_EXPANSION_IPV4_TCP,
569 MLX5_EXPANSION_IPV6_UDP,
570 MLX5_EXPANSION_IPV6_TCP,
571 MLX5_EXPANSION_IPV6_FRAG_EXT,
573 MLX5_EXPANSION_GENEVE,
576 /** Supported expansion of items. */
577 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
578 [MLX5_EXPANSION_ROOT] = {
579 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
581 MLX5_EXPANSION_IPV6),
582 .type = RTE_FLOW_ITEM_TYPE_END,
584 [MLX5_EXPANSION_ROOT_OUTER] = {
585 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
586 MLX5_EXPANSION_OUTER_IPV4,
587 MLX5_EXPANSION_OUTER_IPV6),
588 .type = RTE_FLOW_ITEM_TYPE_END,
590 [MLX5_EXPANSION_OUTER_ETH] = {
591 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
592 .type = RTE_FLOW_ITEM_TYPE_ETH,
595 [MLX5_EXPANSION_OUTER_VLAN] = {
596 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
597 MLX5_EXPANSION_OUTER_IPV6),
598 .type = RTE_FLOW_ITEM_TYPE_VLAN,
599 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
601 [MLX5_EXPANSION_OUTER_IPV4] = {
602 .next = MLX5_FLOW_EXPAND_RSS_NEXT
603 (MLX5_EXPANSION_OUTER_IPV4_UDP,
604 MLX5_EXPANSION_OUTER_IPV4_TCP,
606 MLX5_EXPANSION_NVGRE,
608 MLX5_EXPANSION_IPV6),
609 .type = RTE_FLOW_ITEM_TYPE_IPV4,
610 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 |
611 RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
613 [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
614 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
615 MLX5_EXPANSION_VXLAN_GPE,
617 MLX5_EXPANSION_GENEVE,
619 .type = RTE_FLOW_ITEM_TYPE_UDP,
620 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP,
622 [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
623 .type = RTE_FLOW_ITEM_TYPE_TCP,
624 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP,
626 [MLX5_EXPANSION_OUTER_IPV6] = {
627 .next = MLX5_FLOW_EXPAND_RSS_NEXT
628 (MLX5_EXPANSION_OUTER_IPV6_UDP,
629 MLX5_EXPANSION_OUTER_IPV6_TCP,
633 MLX5_EXPANSION_NVGRE),
634 .type = RTE_FLOW_ITEM_TYPE_IPV6,
635 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 |
636 RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
638 [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
639 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
640 MLX5_EXPANSION_VXLAN_GPE,
642 MLX5_EXPANSION_GENEVE,
644 .type = RTE_FLOW_ITEM_TYPE_UDP,
645 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP,
647 [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
648 .type = RTE_FLOW_ITEM_TYPE_TCP,
649 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP,
651 [MLX5_EXPANSION_VXLAN] = {
652 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
654 MLX5_EXPANSION_IPV6),
655 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
657 [MLX5_EXPANSION_STD_VXLAN] = {
658 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
659 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
661 [MLX5_EXPANSION_L3_VXLAN] = {
662 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
663 MLX5_EXPANSION_IPV6),
664 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
666 [MLX5_EXPANSION_VXLAN_GPE] = {
667 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
669 MLX5_EXPANSION_IPV6),
670 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
672 [MLX5_EXPANSION_GRE] = {
673 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
676 MLX5_EXPANSION_GRE_KEY,
677 MLX5_EXPANSION_MPLS),
678 .type = RTE_FLOW_ITEM_TYPE_GRE,
680 [MLX5_EXPANSION_GRE_KEY] = {
681 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
683 MLX5_EXPANSION_MPLS),
684 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY,
685 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
687 [MLX5_EXPANSION_NVGRE] = {
688 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
689 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
691 [MLX5_EXPANSION_MPLS] = {
692 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
695 .type = RTE_FLOW_ITEM_TYPE_MPLS,
696 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
698 [MLX5_EXPANSION_ETH] = {
699 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
700 .type = RTE_FLOW_ITEM_TYPE_ETH,
702 [MLX5_EXPANSION_VLAN] = {
703 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
704 MLX5_EXPANSION_IPV6),
705 .type = RTE_FLOW_ITEM_TYPE_VLAN,
706 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
708 [MLX5_EXPANSION_IPV4] = {
709 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
710 MLX5_EXPANSION_IPV4_TCP),
711 .type = RTE_FLOW_ITEM_TYPE_IPV4,
712 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 |
713 RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
715 [MLX5_EXPANSION_IPV4_UDP] = {
716 .type = RTE_FLOW_ITEM_TYPE_UDP,
717 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP,
719 [MLX5_EXPANSION_IPV4_TCP] = {
720 .type = RTE_FLOW_ITEM_TYPE_TCP,
721 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP,
723 [MLX5_EXPANSION_IPV6] = {
724 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
725 MLX5_EXPANSION_IPV6_TCP,
726 MLX5_EXPANSION_IPV6_FRAG_EXT),
727 .type = RTE_FLOW_ITEM_TYPE_IPV6,
728 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 |
729 RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
731 [MLX5_EXPANSION_IPV6_UDP] = {
732 .type = RTE_FLOW_ITEM_TYPE_UDP,
733 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP,
735 [MLX5_EXPANSION_IPV6_TCP] = {
736 .type = RTE_FLOW_ITEM_TYPE_TCP,
737 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP,
739 [MLX5_EXPANSION_IPV6_FRAG_EXT] = {
740 .type = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT,
742 [MLX5_EXPANSION_GTP] = {
743 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
744 MLX5_EXPANSION_IPV6),
745 .type = RTE_FLOW_ITEM_TYPE_GTP,
747 [MLX5_EXPANSION_GENEVE] = {
748 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
750 MLX5_EXPANSION_IPV6),
751 .type = RTE_FLOW_ITEM_TYPE_GENEVE,
755 static struct rte_flow_action_handle *
756 mlx5_action_handle_create(struct rte_eth_dev *dev,
757 const struct rte_flow_indir_action_conf *conf,
758 const struct rte_flow_action *action,
759 struct rte_flow_error *error);
760 static int mlx5_action_handle_destroy
761 (struct rte_eth_dev *dev,
762 struct rte_flow_action_handle *handle,
763 struct rte_flow_error *error);
764 static int mlx5_action_handle_update
765 (struct rte_eth_dev *dev,
766 struct rte_flow_action_handle *handle,
768 struct rte_flow_error *error);
769 static int mlx5_action_handle_query
770 (struct rte_eth_dev *dev,
771 const struct rte_flow_action_handle *handle,
773 struct rte_flow_error *error);
775 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
776 struct rte_flow_tunnel *app_tunnel,
777 struct rte_flow_action **actions,
778 uint32_t *num_of_actions,
779 struct rte_flow_error *error);
781 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
782 struct rte_flow_tunnel *app_tunnel,
783 struct rte_flow_item **items,
784 uint32_t *num_of_items,
785 struct rte_flow_error *error);
787 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
788 struct rte_flow_item *pmd_items,
789 uint32_t num_items, struct rte_flow_error *err);
791 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
792 struct rte_flow_action *pmd_actions,
793 uint32_t num_actions,
794 struct rte_flow_error *err);
796 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
798 struct rte_flow_restore_info *info,
799 struct rte_flow_error *err);
800 static struct rte_flow_item_flex_handle *
801 mlx5_flow_flex_item_create(struct rte_eth_dev *dev,
802 const struct rte_flow_item_flex_conf *conf,
803 struct rte_flow_error *error);
805 mlx5_flow_flex_item_release(struct rte_eth_dev *dev,
806 const struct rte_flow_item_flex_handle *handle,
807 struct rte_flow_error *error);
809 mlx5_flow_info_get(struct rte_eth_dev *dev,
810 struct rte_flow_port_info *port_info,
811 struct rte_flow_queue_info *queue_info,
812 struct rte_flow_error *error);
814 mlx5_flow_port_configure(struct rte_eth_dev *dev,
815 const struct rte_flow_port_attr *port_attr,
817 const struct rte_flow_queue_attr *queue_attr[],
818 struct rte_flow_error *err);
820 static struct rte_flow_pattern_template *
821 mlx5_flow_pattern_template_create(struct rte_eth_dev *dev,
822 const struct rte_flow_pattern_template_attr *attr,
823 const struct rte_flow_item items[],
824 struct rte_flow_error *error);
827 mlx5_flow_pattern_template_destroy(struct rte_eth_dev *dev,
828 struct rte_flow_pattern_template *template,
829 struct rte_flow_error *error);
830 static struct rte_flow_actions_template *
831 mlx5_flow_actions_template_create(struct rte_eth_dev *dev,
832 const struct rte_flow_actions_template_attr *attr,
833 const struct rte_flow_action actions[],
834 const struct rte_flow_action masks[],
835 struct rte_flow_error *error);
837 mlx5_flow_actions_template_destroy(struct rte_eth_dev *dev,
838 struct rte_flow_actions_template *template,
839 struct rte_flow_error *error);
841 static struct rte_flow_template_table *
842 mlx5_flow_table_create(struct rte_eth_dev *dev,
843 const struct rte_flow_template_table_attr *attr,
844 struct rte_flow_pattern_template *item_templates[],
845 uint8_t nb_item_templates,
846 struct rte_flow_actions_template *action_templates[],
847 uint8_t nb_action_templates,
848 struct rte_flow_error *error);
850 mlx5_flow_table_destroy(struct rte_eth_dev *dev,
851 struct rte_flow_template_table *table,
852 struct rte_flow_error *error);
853 static struct rte_flow *
854 mlx5_flow_async_flow_create(struct rte_eth_dev *dev,
856 const struct rte_flow_op_attr *attr,
857 struct rte_flow_template_table *table,
858 const struct rte_flow_item items[],
859 uint8_t pattern_template_index,
860 const struct rte_flow_action actions[],
861 uint8_t action_template_index,
863 struct rte_flow_error *error);
865 mlx5_flow_async_flow_destroy(struct rte_eth_dev *dev,
867 const struct rte_flow_op_attr *attr,
868 struct rte_flow *flow,
870 struct rte_flow_error *error);
872 mlx5_flow_pull(struct rte_eth_dev *dev,
874 struct rte_flow_op_result res[],
876 struct rte_flow_error *error);
878 mlx5_flow_push(struct rte_eth_dev *dev,
880 struct rte_flow_error *error);
882 static struct rte_flow_action_handle *
883 mlx5_flow_async_action_handle_create(struct rte_eth_dev *dev, uint32_t queue,
884 const struct rte_flow_op_attr *attr,
885 const struct rte_flow_indir_action_conf *conf,
886 const struct rte_flow_action *action,
888 struct rte_flow_error *error);
891 mlx5_flow_async_action_handle_update(struct rte_eth_dev *dev, uint32_t queue,
892 const struct rte_flow_op_attr *attr,
893 struct rte_flow_action_handle *handle,
896 struct rte_flow_error *error);
899 mlx5_flow_async_action_handle_destroy(struct rte_eth_dev *dev, uint32_t queue,
900 const struct rte_flow_op_attr *attr,
901 struct rte_flow_action_handle *handle,
903 struct rte_flow_error *error);
905 static const struct rte_flow_ops mlx5_flow_ops = {
906 .validate = mlx5_flow_validate,
907 .create = mlx5_flow_create,
908 .destroy = mlx5_flow_destroy,
909 .flush = mlx5_flow_flush,
910 .isolate = mlx5_flow_isolate,
911 .query = mlx5_flow_query,
912 .dev_dump = mlx5_flow_dev_dump,
913 .get_aged_flows = mlx5_flow_get_aged_flows,
914 .action_handle_create = mlx5_action_handle_create,
915 .action_handle_destroy = mlx5_action_handle_destroy,
916 .action_handle_update = mlx5_action_handle_update,
917 .action_handle_query = mlx5_action_handle_query,
918 .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
919 .tunnel_match = mlx5_flow_tunnel_match,
920 .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
921 .tunnel_item_release = mlx5_flow_tunnel_item_release,
922 .get_restore_info = mlx5_flow_tunnel_get_restore_info,
923 .flex_item_create = mlx5_flow_flex_item_create,
924 .flex_item_release = mlx5_flow_flex_item_release,
925 .info_get = mlx5_flow_info_get,
926 .configure = mlx5_flow_port_configure,
927 .pattern_template_create = mlx5_flow_pattern_template_create,
928 .pattern_template_destroy = mlx5_flow_pattern_template_destroy,
929 .actions_template_create = mlx5_flow_actions_template_create,
930 .actions_template_destroy = mlx5_flow_actions_template_destroy,
931 .template_table_create = mlx5_flow_table_create,
932 .template_table_destroy = mlx5_flow_table_destroy,
933 .async_create = mlx5_flow_async_flow_create,
934 .async_destroy = mlx5_flow_async_flow_destroy,
935 .pull = mlx5_flow_pull,
936 .push = mlx5_flow_push,
937 .async_action_handle_create = mlx5_flow_async_action_handle_create,
938 .async_action_handle_update = mlx5_flow_async_action_handle_update,
939 .async_action_handle_destroy = mlx5_flow_async_action_handle_destroy,
942 /* Tunnel information. */
943 struct mlx5_flow_tunnel_info {
944 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
945 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
948 static struct mlx5_flow_tunnel_info tunnels_info[] = {
950 .tunnel = MLX5_FLOW_LAYER_VXLAN,
951 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
954 .tunnel = MLX5_FLOW_LAYER_GENEVE,
955 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
958 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
959 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
962 .tunnel = MLX5_FLOW_LAYER_GRE,
963 .ptype = RTE_PTYPE_TUNNEL_GRE,
966 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
967 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
970 .tunnel = MLX5_FLOW_LAYER_MPLS,
971 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
974 .tunnel = MLX5_FLOW_LAYER_NVGRE,
975 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
978 .tunnel = MLX5_FLOW_LAYER_IPIP,
979 .ptype = RTE_PTYPE_TUNNEL_IP,
982 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
983 .ptype = RTE_PTYPE_TUNNEL_IP,
986 .tunnel = MLX5_FLOW_LAYER_GTP,
987 .ptype = RTE_PTYPE_TUNNEL_GTPU,
994 * Translate tag ID to register.
997 * Pointer to the Ethernet device structure.
999 * The feature that request the register.
1001 * The request register ID.
1003 * Error description in case of any.
1006 * The request register on success, a negative errno
1007 * value otherwise and rte_errno is set.
1010 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
1011 enum mlx5_feature_name feature,
1013 struct rte_flow_error *error)
1015 struct mlx5_priv *priv = dev->data->dev_private;
1016 struct mlx5_sh_config *config = &priv->sh->config;
1017 enum modify_reg start_reg;
1018 bool skip_mtr_reg = false;
1021 case MLX5_HAIRPIN_RX:
1023 case MLX5_HAIRPIN_TX:
1025 case MLX5_METADATA_RX:
1026 switch (config->dv_xmeta_en) {
1027 case MLX5_XMETA_MODE_LEGACY:
1029 case MLX5_XMETA_MODE_META16:
1031 case MLX5_XMETA_MODE_META32:
1035 case MLX5_METADATA_TX:
1037 case MLX5_METADATA_FDB:
1038 switch (config->dv_xmeta_en) {
1039 case MLX5_XMETA_MODE_LEGACY:
1041 case MLX5_XMETA_MODE_META16:
1043 case MLX5_XMETA_MODE_META32:
1047 case MLX5_FLOW_MARK:
1048 switch (config->dv_xmeta_en) {
1049 case MLX5_XMETA_MODE_LEGACY:
1051 case MLX5_XMETA_MODE_META16:
1053 case MLX5_XMETA_MODE_META32:
1059 * If meter color and meter id share one register, flow match
1060 * should use the meter color register for match.
1062 if (priv->mtr_reg_share)
1063 return priv->mtr_color_reg;
1065 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
1067 case MLX5_MTR_COLOR:
1068 case MLX5_ASO_FLOW_HIT:
1069 case MLX5_ASO_CONNTRACK:
1070 case MLX5_SAMPLE_ID:
1071 /* All features use the same REG_C. */
1072 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
1073 return priv->mtr_color_reg;
1074 case MLX5_COPY_MARK:
1076 * Metadata COPY_MARK register using is in meter suffix sub
1077 * flow while with meter. It's safe to share the same register.
1079 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
1082 * If meter is enable, it will engage the register for color
1083 * match and flow match. If meter color match is not using the
1084 * REG_C_2, need to skip the REG_C_x be used by meter color
1086 * If meter is disable, free to use all available registers.
1088 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
1089 (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
1090 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
1091 if (id > (uint32_t)(REG_C_7 - start_reg))
1092 return rte_flow_error_set(error, EINVAL,
1093 RTE_FLOW_ERROR_TYPE_ITEM,
1094 NULL, "invalid tag id");
1095 if (priv->sh->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
1096 return rte_flow_error_set(error, ENOTSUP,
1097 RTE_FLOW_ERROR_TYPE_ITEM,
1098 NULL, "unsupported tag id");
1100 * This case means meter is using the REG_C_x great than 2.
1101 * Take care not to conflict with meter color REG_C_x.
1102 * If the available index REG_C_y >= REG_C_x, skip the
1105 if (skip_mtr_reg && priv->sh->flow_mreg_c
1106 [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
1107 if (id >= (uint32_t)(REG_C_7 - start_reg))
1108 return rte_flow_error_set(error, EINVAL,
1109 RTE_FLOW_ERROR_TYPE_ITEM,
1110 NULL, "invalid tag id");
1111 if (priv->sh->flow_mreg_c
1112 [id + 1 + start_reg - REG_C_0] != REG_NON)
1113 return priv->sh->flow_mreg_c
1114 [id + 1 + start_reg - REG_C_0];
1115 return rte_flow_error_set(error, ENOTSUP,
1116 RTE_FLOW_ERROR_TYPE_ITEM,
1117 NULL, "unsupported tag id");
1119 return priv->sh->flow_mreg_c[id + start_reg - REG_C_0];
1122 return rte_flow_error_set(error, EINVAL,
1123 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1124 NULL, "invalid feature name");
1128 * Check extensive flow metadata register support.
1131 * Pointer to rte_eth_dev structure.
1134 * True if device supports extensive flow metadata register, otherwise false.
1137 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
1139 struct mlx5_priv *priv = dev->data->dev_private;
1142 * Having available reg_c can be regarded inclusively as supporting
1143 * extensive flow metadata register, which could mean,
1144 * - metadata register copy action by modify header.
1145 * - 16 modify header actions is supported.
1146 * - reg_c's are preserved across different domain (FDB and NIC) on
1147 * packet loopback by flow lookup miss.
1149 return priv->sh->flow_mreg_c[2] != REG_NON;
1153 * Get the lowest priority.
1156 * Pointer to the Ethernet device structure.
1157 * @param[in] attributes
1158 * Pointer to device flow rule attributes.
1161 * The value of lowest priority of flow.
1164 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
1165 const struct rte_flow_attr *attr)
1167 struct mlx5_priv *priv = dev->data->dev_private;
1169 if (!attr->group && !attr->transfer)
1170 return priv->sh->flow_max_priority - 2;
1171 return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
1175 * Calculate matcher priority of the flow.
1178 * Pointer to the Ethernet device structure.
1180 * Pointer to device flow rule attributes.
1181 * @param[in] subpriority
1182 * The priority based on the items.
1183 * @param[in] external
1184 * Flow is user flow.
1186 * The matcher priority of the flow.
1189 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
1190 const struct rte_flow_attr *attr,
1191 uint32_t subpriority, bool external)
1193 uint16_t priority = (uint16_t)attr->priority;
1194 struct mlx5_priv *priv = dev->data->dev_private;
1196 if (!attr->group && !attr->transfer) {
1197 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1198 priority = priv->sh->flow_max_priority - 1;
1199 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
1200 } else if (!external && attr->transfer && attr->group == 0 &&
1201 attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) {
1202 return (priv->sh->flow_max_priority - 1) * 3;
1204 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1205 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
1206 return priority * 3 + subpriority;
1210 * Verify the @p item specifications (spec, last, mask) are compatible with the
1214 * Item specification.
1216 * @p item->mask or flow default bit-masks.
1217 * @param[in] nic_mask
1218 * Bit-masks covering supported fields by the NIC to compare with user mask.
1220 * Bit-masks size in bytes.
1221 * @param[in] range_accepted
1222 * True if range of values is accepted for specific fields, false otherwise.
1224 * Pointer to error structure.
1227 * 0 on success, a negative errno value otherwise and rte_errno is set.
1230 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
1231 const uint8_t *mask,
1232 const uint8_t *nic_mask,
1234 bool range_accepted,
1235 struct rte_flow_error *error)
1239 MLX5_ASSERT(nic_mask);
1240 for (i = 0; i < size; ++i)
1241 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1242 return rte_flow_error_set(error, ENOTSUP,
1243 RTE_FLOW_ERROR_TYPE_ITEM,
1245 "mask enables non supported"
1247 if (!item->spec && (item->mask || item->last))
1248 return rte_flow_error_set(error, EINVAL,
1249 RTE_FLOW_ERROR_TYPE_ITEM, item,
1250 "mask/last without a spec is not"
1252 if (item->spec && item->last && !range_accepted) {
1258 for (i = 0; i < size; ++i) {
1259 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1260 last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1262 ret = memcmp(spec, last, size);
1264 return rte_flow_error_set(error, EINVAL,
1265 RTE_FLOW_ERROR_TYPE_ITEM,
1267 "range is not valid");
1273 * Adjust the hash fields according to the @p flow information.
1275 * @param[in] dev_flow.
1276 * Pointer to the mlx5_flow.
1278 * 1 when the hash field is for a tunnel item.
1279 * @param[in] layer_types
1280 * RTE_ETH_RSS_* types.
1281 * @param[in] hash_fields
1285 * The hash fields that should be used.
1288 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1289 int tunnel __rte_unused, uint64_t layer_types,
1290 uint64_t hash_fields)
1292 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1293 int rss_request_inner = rss_desc->level >= 2;
1295 /* Check RSS hash level for tunnel. */
1296 if (tunnel && rss_request_inner)
1297 hash_fields |= IBV_RX_HASH_INNER;
1298 else if (tunnel || rss_request_inner)
1301 /* Check if requested layer matches RSS hash fields. */
1302 if (!(rss_desc->types & layer_types))
1308 * Lookup and set the ptype in the data Rx part. A single Ptype can be used,
1309 * if several tunnel rules are used on this queue, the tunnel ptype will be
1313 * Rx queue to update.
1316 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1319 uint32_t tunnel_ptype = 0;
1321 /* Look up for the ptype to use. */
1322 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1323 if (!rxq_ctrl->flow_tunnels_n[i])
1325 if (!tunnel_ptype) {
1326 tunnel_ptype = tunnels_info[i].ptype;
1332 rxq_ctrl->rxq.tunnel = tunnel_ptype;
1336 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the device
1340 * Pointer to the Ethernet device structure.
1341 * @param[in] dev_handle
1342 * Pointer to device flow handle structure.
1345 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1346 struct mlx5_flow_handle *dev_handle)
1348 struct mlx5_priv *priv = dev->data->dev_private;
1349 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1350 struct mlx5_ind_table_obj *ind_tbl = NULL;
1353 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1354 struct mlx5_hrxq *hrxq;
1356 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1357 dev_handle->rix_hrxq);
1359 ind_tbl = hrxq->ind_table;
1360 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1361 struct mlx5_shared_action_rss *shared_rss;
1363 shared_rss = mlx5_ipool_get
1364 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1365 dev_handle->rix_srss);
1367 ind_tbl = shared_rss->ind_tbl;
1371 for (i = 0; i != ind_tbl->queues_n; ++i) {
1372 int idx = ind_tbl->queues[i];
1373 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx);
1375 MLX5_ASSERT(rxq_ctrl != NULL);
1376 if (rxq_ctrl == NULL)
1379 * To support metadata register copy on Tx loopback,
1380 * this must be always enabled (metadata may arive
1381 * from other port - not from local flows only.
1386 /* Increase the counter matching the flow. */
1387 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1388 if ((tunnels_info[j].tunnel &
1389 dev_handle->layers) ==
1390 tunnels_info[j].tunnel) {
1391 rxq_ctrl->flow_tunnels_n[j]++;
1395 flow_rxq_tunnel_ptype_update(rxq_ctrl);
1401 flow_rxq_mark_flag_set(struct rte_eth_dev *dev)
1403 struct mlx5_priv *priv = dev->data->dev_private;
1404 struct mlx5_rxq_ctrl *rxq_ctrl;
1406 if (priv->mark_enabled)
1408 LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
1409 rxq_ctrl->rxq.mark = 1;
1411 priv->mark_enabled = 1;
1415 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1418 * Pointer to the Ethernet device structure.
1420 * Pointer to flow structure.
1423 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1425 struct mlx5_priv *priv = dev->data->dev_private;
1426 uint32_t handle_idx;
1427 struct mlx5_flow_handle *dev_handle;
1428 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
1432 flow_rxq_mark_flag_set(dev);
1433 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1434 handle_idx, dev_handle, next)
1435 flow_drv_rxq_flags_set(dev, dev_handle);
1439 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1440 * device flow if no other flow uses it with the same kind of request.
1443 * Pointer to Ethernet device.
1444 * @param[in] dev_handle
1445 * Pointer to the device flow handle structure.
1448 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1449 struct mlx5_flow_handle *dev_handle)
1451 struct mlx5_priv *priv = dev->data->dev_private;
1452 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1453 struct mlx5_ind_table_obj *ind_tbl = NULL;
1456 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1457 struct mlx5_hrxq *hrxq;
1459 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1460 dev_handle->rix_hrxq);
1462 ind_tbl = hrxq->ind_table;
1463 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1464 struct mlx5_shared_action_rss *shared_rss;
1466 shared_rss = mlx5_ipool_get
1467 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1468 dev_handle->rix_srss);
1470 ind_tbl = shared_rss->ind_tbl;
1474 MLX5_ASSERT(dev->data->dev_started);
1475 for (i = 0; i != ind_tbl->queues_n; ++i) {
1476 int idx = ind_tbl->queues[i];
1477 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx);
1479 MLX5_ASSERT(rxq_ctrl != NULL);
1480 if (rxq_ctrl == NULL)
1485 /* Decrease the counter matching the flow. */
1486 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1487 if ((tunnels_info[j].tunnel &
1488 dev_handle->layers) ==
1489 tunnels_info[j].tunnel) {
1490 rxq_ctrl->flow_tunnels_n[j]--;
1494 flow_rxq_tunnel_ptype_update(rxq_ctrl);
1500 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1501 * @p flow if no other flow uses it with the same kind of request.
1504 * Pointer to Ethernet device.
1506 * Pointer to the flow.
1509 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1511 struct mlx5_priv *priv = dev->data->dev_private;
1512 uint32_t handle_idx;
1513 struct mlx5_flow_handle *dev_handle;
1515 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1516 handle_idx, dev_handle, next)
1517 flow_drv_rxq_flags_trim(dev, dev_handle);
1521 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1524 * Pointer to Ethernet device.
1527 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1529 struct mlx5_priv *priv = dev->data->dev_private;
1532 for (i = 0; i != priv->rxqs_n; ++i) {
1533 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
1536 if (rxq == NULL || rxq->ctrl == NULL)
1538 rxq->ctrl->rxq.mark = 0;
1539 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1540 rxq->ctrl->flow_tunnels_n[j] = 0;
1541 rxq->ctrl->rxq.tunnel = 0;
1543 priv->mark_enabled = 0;
1547 * Set the Rx queue dynamic metadata (mask and offset) for a flow
1550 * Pointer to the Ethernet device structure.
1553 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1555 struct mlx5_priv *priv = dev->data->dev_private;
1558 for (i = 0; i != priv->rxqs_n; ++i) {
1559 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
1560 struct mlx5_rxq_data *data;
1562 if (rxq == NULL || rxq->ctrl == NULL)
1564 data = &rxq->ctrl->rxq;
1565 if (!rte_flow_dynf_metadata_avail()) {
1566 data->dynf_meta = 0;
1567 data->flow_meta_mask = 0;
1568 data->flow_meta_offset = -1;
1569 data->flow_meta_port_mask = 0;
1571 data->dynf_meta = 1;
1572 data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1573 data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1574 data->flow_meta_port_mask = priv->sh->dv_meta_mask;
1580 * return a pointer to the desired action in the list of actions.
1582 * @param[in] actions
1583 * The list of actions to search the action in.
1585 * The action to find.
1588 * Pointer to the action in the list, if found. NULL otherwise.
1590 const struct rte_flow_action *
1591 mlx5_flow_find_action(const struct rte_flow_action *actions,
1592 enum rte_flow_action_type action)
1594 if (actions == NULL)
1596 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1597 if (actions->type == action)
1603 * Validate the flag action.
1605 * @param[in] action_flags
1606 * Bit-fields that holds the actions detected until now.
1608 * Attributes of flow that includes this action.
1610 * Pointer to error structure.
1613 * 0 on success, a negative errno value otherwise and rte_errno is set.
1616 mlx5_flow_validate_action_flag(uint64_t action_flags,
1617 const struct rte_flow_attr *attr,
1618 struct rte_flow_error *error)
1620 if (action_flags & MLX5_FLOW_ACTION_MARK)
1621 return rte_flow_error_set(error, EINVAL,
1622 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1623 "can't mark and flag in same flow");
1624 if (action_flags & MLX5_FLOW_ACTION_FLAG)
1625 return rte_flow_error_set(error, EINVAL,
1626 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1628 " actions in same flow");
1630 return rte_flow_error_set(error, ENOTSUP,
1631 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1632 "flag action not supported for "
1638 * Validate the mark action.
1641 * Pointer to the queue action.
1642 * @param[in] action_flags
1643 * Bit-fields that holds the actions detected until now.
1645 * Attributes of flow that includes this action.
1647 * Pointer to error structure.
1650 * 0 on success, a negative errno value otherwise and rte_errno is set.
1653 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1654 uint64_t action_flags,
1655 const struct rte_flow_attr *attr,
1656 struct rte_flow_error *error)
1658 const struct rte_flow_action_mark *mark = action->conf;
1661 return rte_flow_error_set(error, EINVAL,
1662 RTE_FLOW_ERROR_TYPE_ACTION,
1664 "configuration cannot be null");
1665 if (mark->id >= MLX5_FLOW_MARK_MAX)
1666 return rte_flow_error_set(error, EINVAL,
1667 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1669 "mark id must in 0 <= id < "
1670 RTE_STR(MLX5_FLOW_MARK_MAX));
1671 if (action_flags & MLX5_FLOW_ACTION_FLAG)
1672 return rte_flow_error_set(error, EINVAL,
1673 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1674 "can't flag and mark in same flow");
1675 if (action_flags & MLX5_FLOW_ACTION_MARK)
1676 return rte_flow_error_set(error, EINVAL,
1677 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1678 "can't have 2 mark actions in same"
1681 return rte_flow_error_set(error, ENOTSUP,
1682 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1683 "mark action not supported for "
1689 * Validate the drop action.
1691 * @param[in] action_flags
1692 * Bit-fields that holds the actions detected until now.
1694 * Attributes of flow that includes this action.
1696 * Pointer to error structure.
1699 * 0 on success, a negative errno value otherwise and rte_errno is set.
1702 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1703 const struct rte_flow_attr *attr,
1704 struct rte_flow_error *error)
1707 return rte_flow_error_set(error, ENOTSUP,
1708 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1709 "drop action not supported for "
1715 * Validate the queue action.
1718 * Pointer to the queue action.
1719 * @param[in] action_flags
1720 * Bit-fields that holds the actions detected until now.
1722 * Pointer to the Ethernet device structure.
1724 * Attributes of flow that includes this action.
1726 * Pointer to error structure.
1729 * 0 on success, a negative errno value otherwise and rte_errno is set.
1732 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1733 uint64_t action_flags,
1734 struct rte_eth_dev *dev,
1735 const struct rte_flow_attr *attr,
1736 struct rte_flow_error *error)
1738 struct mlx5_priv *priv = dev->data->dev_private;
1739 const struct rte_flow_action_queue *queue = action->conf;
1741 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1742 return rte_flow_error_set(error, EINVAL,
1743 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1744 "can't have 2 fate actions in"
1747 return rte_flow_error_set(error, EINVAL,
1748 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1749 NULL, "No Rx queues configured");
1750 if (queue->index >= priv->rxqs_n)
1751 return rte_flow_error_set(error, EINVAL,
1752 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1754 "queue index out of range");
1755 if (mlx5_rxq_get(dev, queue->index) == NULL)
1756 return rte_flow_error_set(error, EINVAL,
1757 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1759 "queue is not configured");
1761 return rte_flow_error_set(error, ENOTSUP,
1762 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1763 "queue action not supported for "
1769 * Validate queue numbers for device RSS.
1772 * Configured device.
1774 * Array of queue numbers.
1775 * @param[in] queues_n
1776 * Size of the @p queues array.
1778 * On error, filled with a textual error description.
1780 * On error, filled with an offending queue index in @p queues array.
1783 * 0 on success, a negative errno code on error.
1786 mlx5_validate_rss_queues(struct rte_eth_dev *dev,
1787 const uint16_t *queues, uint32_t queues_n,
1788 const char **error, uint32_t *queue_idx)
1790 const struct mlx5_priv *priv = dev->data->dev_private;
1791 bool is_hairpin = false;
1794 for (i = 0; i != queues_n; ++i) {
1795 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev,
1798 if (queues[i] >= priv->rxqs_n) {
1799 *error = "queue index out of range";
1803 if (rxq_ctrl == NULL) {
1804 *error = "queue is not configured";
1808 if (i == 0 && rxq_ctrl->is_hairpin)
1810 if (is_hairpin != rxq_ctrl->is_hairpin) {
1811 *error = "combining hairpin and regular RSS queues is not supported";
1820 * Validate the rss action.
1823 * Pointer to the Ethernet device structure.
1825 * Pointer to the queue action.
1827 * Pointer to error structure.
1830 * 0 on success, a negative errno value otherwise and rte_errno is set.
1833 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1834 const struct rte_flow_action *action,
1835 struct rte_flow_error *error)
1837 struct mlx5_priv *priv = dev->data->dev_private;
1838 const struct rte_flow_action_rss *rss = action->conf;
1840 const char *message;
1843 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1844 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1845 return rte_flow_error_set(error, ENOTSUP,
1846 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1848 "RSS hash function not supported");
1849 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1854 return rte_flow_error_set(error, ENOTSUP,
1855 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1857 "tunnel RSS is not supported");
1858 /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1859 if (rss->key_len == 0 && rss->key != NULL)
1860 return rte_flow_error_set(error, ENOTSUP,
1861 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1863 "RSS hash key length 0");
1864 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1865 return rte_flow_error_set(error, ENOTSUP,
1866 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1868 "RSS hash key too small");
1869 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1870 return rte_flow_error_set(error, ENOTSUP,
1871 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1873 "RSS hash key too large");
1874 if (rss->queue_num > priv->sh->dev_cap.ind_table_max_size)
1875 return rte_flow_error_set(error, ENOTSUP,
1876 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1878 "number of queues too large");
1879 if (rss->types & MLX5_RSS_HF_MASK)
1880 return rte_flow_error_set(error, ENOTSUP,
1881 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1883 "some RSS protocols are not"
1885 if ((rss->types & (RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY)) &&
1886 !(rss->types & RTE_ETH_RSS_IP))
1887 return rte_flow_error_set(error, EINVAL,
1888 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1889 "L3 partial RSS requested but L3 RSS"
1890 " type not specified");
1891 if ((rss->types & (RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY)) &&
1892 !(rss->types & (RTE_ETH_RSS_UDP | RTE_ETH_RSS_TCP)))
1893 return rte_flow_error_set(error, EINVAL,
1894 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1895 "L4 partial RSS requested but L4 RSS"
1896 " type not specified");
1898 return rte_flow_error_set(error, EINVAL,
1899 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1900 NULL, "No Rx queues configured");
1901 if (!rss->queue_num)
1902 return rte_flow_error_set(error, EINVAL,
1903 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1904 NULL, "No queues configured");
1905 ret = mlx5_validate_rss_queues(dev, rss->queue, rss->queue_num,
1906 &message, &queue_idx);
1908 return rte_flow_error_set(error, -ret,
1909 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1910 &rss->queue[queue_idx], message);
1916 * Validate the rss action.
1919 * Pointer to the queue action.
1920 * @param[in] action_flags
1921 * Bit-fields that holds the actions detected until now.
1923 * Pointer to the Ethernet device structure.
1925 * Attributes of flow that includes this action.
1926 * @param[in] item_flags
1927 * Items that were detected.
1929 * Pointer to error structure.
1932 * 0 on success, a negative errno value otherwise and rte_errno is set.
1935 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1936 uint64_t action_flags,
1937 struct rte_eth_dev *dev,
1938 const struct rte_flow_attr *attr,
1939 uint64_t item_flags,
1940 struct rte_flow_error *error)
1942 const struct rte_flow_action_rss *rss = action->conf;
1943 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1946 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1947 return rte_flow_error_set(error, EINVAL,
1948 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1949 "can't have 2 fate actions"
1951 ret = mlx5_validate_action_rss(dev, action, error);
1955 return rte_flow_error_set(error, ENOTSUP,
1956 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1957 "rss action not supported for "
1959 if (rss->level > 1 && !tunnel)
1960 return rte_flow_error_set(error, EINVAL,
1961 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1962 "inner RSS is not supported for "
1963 "non-tunnel flows");
1964 if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1965 !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1966 return rte_flow_error_set(error, EINVAL,
1967 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1968 "RSS on eCPRI is not supported now");
1970 if ((item_flags & MLX5_FLOW_LAYER_MPLS) &&
1972 (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) &&
1974 return rte_flow_error_set(error, EINVAL,
1975 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1976 "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern");
1981 * Validate the default miss action.
1983 * @param[in] action_flags
1984 * Bit-fields that holds the actions detected until now.
1986 * Pointer to error structure.
1989 * 0 on success, a negative errno value otherwise and rte_errno is set.
1992 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1993 const struct rte_flow_attr *attr,
1994 struct rte_flow_error *error)
1996 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1997 return rte_flow_error_set(error, EINVAL,
1998 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1999 "can't have 2 fate actions in"
2002 return rte_flow_error_set(error, ENOTSUP,
2003 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
2004 "default miss action not supported "
2007 return rte_flow_error_set(error, ENOTSUP,
2008 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
2009 "only group 0 is supported");
2011 return rte_flow_error_set(error, ENOTSUP,
2012 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
2013 NULL, "transfer is not supported");
2018 * Validate the count action.
2021 * Pointer to the Ethernet device structure.
2023 * Attributes of flow that includes this action.
2025 * Pointer to error structure.
2028 * 0 on success, a negative errno value otherwise and rte_errno is set.
2031 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
2032 const struct rte_flow_attr *attr,
2033 struct rte_flow_error *error)
2036 return rte_flow_error_set(error, ENOTSUP,
2037 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
2038 "count action not supported for "
2044 * Validate the ASO CT action.
2047 * Pointer to the Ethernet device structure.
2048 * @param[in] conntrack
2049 * Pointer to the CT action profile.
2051 * Pointer to error structure.
2054 * 0 on success, a negative errno value otherwise and rte_errno is set.
2057 mlx5_validate_action_ct(struct rte_eth_dev *dev,
2058 const struct rte_flow_action_conntrack *conntrack,
2059 struct rte_flow_error *error)
2063 if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT)
2064 return rte_flow_error_set(error, EINVAL,
2065 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2066 "Invalid CT state");
2067 if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST)
2068 return rte_flow_error_set(error, EINVAL,
2069 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2070 "Invalid last TCP packet flag");
2075 * Verify the @p attributes will be correctly understood by the NIC and store
2076 * them in the @p flow if everything is correct.
2079 * Pointer to the Ethernet device structure.
2080 * @param[in] attributes
2081 * Pointer to flow attributes
2083 * Pointer to error structure.
2086 * 0 on success, a negative errno value otherwise and rte_errno is set.
2089 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
2090 const struct rte_flow_attr *attributes,
2091 struct rte_flow_error *error)
2093 struct mlx5_priv *priv = dev->data->dev_private;
2094 uint32_t priority_max = priv->sh->flow_max_priority - 1;
2096 if (attributes->group)
2097 return rte_flow_error_set(error, ENOTSUP,
2098 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
2099 NULL, "groups is not supported");
2100 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
2101 attributes->priority >= priority_max)
2102 return rte_flow_error_set(error, ENOTSUP,
2103 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
2104 NULL, "priority out of range");
2105 if (attributes->egress)
2106 return rte_flow_error_set(error, ENOTSUP,
2107 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
2108 "egress is not supported");
2109 if (attributes->transfer && !priv->sh->config.dv_esw_en)
2110 return rte_flow_error_set(error, ENOTSUP,
2111 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
2112 NULL, "transfer is not supported");
2113 if (!attributes->ingress)
2114 return rte_flow_error_set(error, EINVAL,
2115 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2117 "ingress attribute is mandatory");
2122 * Validate ICMP6 item.
2125 * Item specification.
2126 * @param[in] item_flags
2127 * Bit-fields that holds the items detected until now.
2128 * @param[in] ext_vlan_sup
2129 * Whether extended VLAN features are supported or not.
2131 * Pointer to error structure.
2134 * 0 on success, a negative errno value otherwise and rte_errno is set.
2137 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
2138 uint64_t item_flags,
2139 uint8_t target_protocol,
2140 struct rte_flow_error *error)
2142 const struct rte_flow_item_icmp6 *mask = item->mask;
2143 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2144 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
2145 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
2146 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2147 MLX5_FLOW_LAYER_OUTER_L4;
2150 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
2151 return rte_flow_error_set(error, EINVAL,
2152 RTE_FLOW_ERROR_TYPE_ITEM, item,
2153 "protocol filtering not compatible"
2154 " with ICMP6 layer");
2155 if (!(item_flags & l3m))
2156 return rte_flow_error_set(error, EINVAL,
2157 RTE_FLOW_ERROR_TYPE_ITEM, item,
2158 "IPv6 is mandatory to filter on"
2160 if (item_flags & l4m)
2161 return rte_flow_error_set(error, EINVAL,
2162 RTE_FLOW_ERROR_TYPE_ITEM, item,
2163 "multiple L4 layers not supported");
2165 mask = &rte_flow_item_icmp6_mask;
2166 ret = mlx5_flow_item_acceptable
2167 (item, (const uint8_t *)mask,
2168 (const uint8_t *)&rte_flow_item_icmp6_mask,
2169 sizeof(struct rte_flow_item_icmp6),
2170 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2177 * Validate ICMP item.
2180 * Item specification.
2181 * @param[in] item_flags
2182 * Bit-fields that holds the items detected until now.
2184 * Pointer to error structure.
2187 * 0 on success, a negative errno value otherwise and rte_errno is set.
2190 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
2191 uint64_t item_flags,
2192 uint8_t target_protocol,
2193 struct rte_flow_error *error)
2195 const struct rte_flow_item_icmp *mask = item->mask;
2196 const struct rte_flow_item_icmp nic_mask = {
2197 .hdr.icmp_type = 0xff,
2198 .hdr.icmp_code = 0xff,
2199 .hdr.icmp_ident = RTE_BE16(0xffff),
2200 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
2202 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2203 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
2204 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2205 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2206 MLX5_FLOW_LAYER_OUTER_L4;
2209 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
2210 return rte_flow_error_set(error, EINVAL,
2211 RTE_FLOW_ERROR_TYPE_ITEM, item,
2212 "protocol filtering not compatible"
2213 " with ICMP layer");
2214 if (!(item_flags & l3m))
2215 return rte_flow_error_set(error, EINVAL,
2216 RTE_FLOW_ERROR_TYPE_ITEM, item,
2217 "IPv4 is mandatory to filter"
2219 if (item_flags & l4m)
2220 return rte_flow_error_set(error, EINVAL,
2221 RTE_FLOW_ERROR_TYPE_ITEM, item,
2222 "multiple L4 layers not supported");
2225 ret = mlx5_flow_item_acceptable
2226 (item, (const uint8_t *)mask,
2227 (const uint8_t *)&nic_mask,
2228 sizeof(struct rte_flow_item_icmp),
2229 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2236 * Validate Ethernet item.
2239 * Item specification.
2240 * @param[in] item_flags
2241 * Bit-fields that holds the items detected until now.
2243 * Pointer to error structure.
2246 * 0 on success, a negative errno value otherwise and rte_errno is set.
2249 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
2250 uint64_t item_flags, bool ext_vlan_sup,
2251 struct rte_flow_error *error)
2253 const struct rte_flow_item_eth *mask = item->mask;
2254 const struct rte_flow_item_eth nic_mask = {
2255 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2256 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2257 .type = RTE_BE16(0xffff),
2258 .has_vlan = ext_vlan_sup ? 1 : 0,
2261 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2262 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
2263 MLX5_FLOW_LAYER_OUTER_L2;
2265 if (item_flags & ethm)
2266 return rte_flow_error_set(error, ENOTSUP,
2267 RTE_FLOW_ERROR_TYPE_ITEM, item,
2268 "multiple L2 layers not supported");
2269 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
2270 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
2271 return rte_flow_error_set(error, EINVAL,
2272 RTE_FLOW_ERROR_TYPE_ITEM, item,
2273 "L2 layer should not follow "
2275 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
2276 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
2277 return rte_flow_error_set(error, EINVAL,
2278 RTE_FLOW_ERROR_TYPE_ITEM, item,
2279 "L2 layer should not follow VLAN");
2280 if (item_flags & MLX5_FLOW_LAYER_GTP)
2281 return rte_flow_error_set(error, EINVAL,
2282 RTE_FLOW_ERROR_TYPE_ITEM, item,
2283 "L2 layer should not follow GTP");
2285 mask = &rte_flow_item_eth_mask;
2286 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2287 (const uint8_t *)&nic_mask,
2288 sizeof(struct rte_flow_item_eth),
2289 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2294 * Validate VLAN item.
2297 * Item specification.
2298 * @param[in] item_flags
2299 * Bit-fields that holds the items detected until now.
2301 * Ethernet device flow is being created on.
2303 * Pointer to error structure.
2306 * 0 on success, a negative errno value otherwise and rte_errno is set.
2309 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
2310 uint64_t item_flags,
2311 struct rte_eth_dev *dev,
2312 struct rte_flow_error *error)
2314 const struct rte_flow_item_vlan *spec = item->spec;
2315 const struct rte_flow_item_vlan *mask = item->mask;
2316 const struct rte_flow_item_vlan nic_mask = {
2317 .tci = RTE_BE16(UINT16_MAX),
2318 .inner_type = RTE_BE16(UINT16_MAX),
2320 uint16_t vlan_tag = 0;
2321 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2323 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2324 MLX5_FLOW_LAYER_INNER_L4) :
2325 (MLX5_FLOW_LAYER_OUTER_L3 |
2326 MLX5_FLOW_LAYER_OUTER_L4);
2327 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2328 MLX5_FLOW_LAYER_OUTER_VLAN;
2330 if (item_flags & vlanm)
2331 return rte_flow_error_set(error, EINVAL,
2332 RTE_FLOW_ERROR_TYPE_ITEM, item,
2333 "multiple VLAN layers not supported");
2334 else if ((item_flags & l34m) != 0)
2335 return rte_flow_error_set(error, EINVAL,
2336 RTE_FLOW_ERROR_TYPE_ITEM, item,
2337 "VLAN cannot follow L3/L4 layer");
2339 mask = &rte_flow_item_vlan_mask;
2340 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2341 (const uint8_t *)&nic_mask,
2342 sizeof(struct rte_flow_item_vlan),
2343 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2346 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2347 struct mlx5_priv *priv = dev->data->dev_private;
2349 if (priv->vmwa_context) {
2351 * Non-NULL context means we have a virtual machine
2352 * and SR-IOV enabled, we have to create VLAN interface
2353 * to make hypervisor to setup E-Switch vport
2354 * context correctly. We avoid creating the multiple
2355 * VLAN interfaces, so we cannot support VLAN tag mask.
2357 return rte_flow_error_set(error, EINVAL,
2358 RTE_FLOW_ERROR_TYPE_ITEM,
2360 "VLAN tag mask is not"
2361 " supported in virtual"
2366 vlan_tag = spec->tci;
2367 vlan_tag &= mask->tci;
2370 * From verbs perspective an empty VLAN is equivalent
2371 * to a packet without VLAN layer.
2374 return rte_flow_error_set(error, EINVAL,
2375 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2377 "VLAN cannot be empty");
2382 * Validate IPV4 item.
2385 * Item specification.
2386 * @param[in] item_flags
2387 * Bit-fields that holds the items detected until now.
2388 * @param[in] last_item
2389 * Previous validated item in the pattern items.
2390 * @param[in] ether_type
2391 * Type in the ethernet layer header (including dot1q).
2392 * @param[in] acc_mask
2393 * Acceptable mask, if NULL default internal default mask
2394 * will be used to check whether item fields are supported.
2395 * @param[in] range_accepted
2396 * True if range of values is accepted for specific fields, false otherwise.
2398 * Pointer to error structure.
2401 * 0 on success, a negative errno value otherwise and rte_errno is set.
2404 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2405 uint64_t item_flags,
2407 uint16_t ether_type,
2408 const struct rte_flow_item_ipv4 *acc_mask,
2409 bool range_accepted,
2410 struct rte_flow_error *error)
2412 const struct rte_flow_item_ipv4 *mask = item->mask;
2413 const struct rte_flow_item_ipv4 *spec = item->spec;
2414 const struct rte_flow_item_ipv4 nic_mask = {
2416 .src_addr = RTE_BE32(0xffffffff),
2417 .dst_addr = RTE_BE32(0xffffffff),
2418 .type_of_service = 0xff,
2419 .next_proto_id = 0xff,
2422 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2423 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2424 MLX5_FLOW_LAYER_OUTER_L3;
2425 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2426 MLX5_FLOW_LAYER_OUTER_L4;
2428 uint8_t next_proto = 0xFF;
2429 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2430 MLX5_FLOW_LAYER_OUTER_VLAN |
2431 MLX5_FLOW_LAYER_INNER_VLAN);
2433 if ((last_item & l2_vlan) && ether_type &&
2434 ether_type != RTE_ETHER_TYPE_IPV4)
2435 return rte_flow_error_set(error, EINVAL,
2436 RTE_FLOW_ERROR_TYPE_ITEM, item,
2437 "IPv4 cannot follow L2/VLAN layer "
2438 "which ether type is not IPv4");
2439 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2441 next_proto = mask->hdr.next_proto_id &
2442 spec->hdr.next_proto_id;
2443 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2444 return rte_flow_error_set(error, EINVAL,
2445 RTE_FLOW_ERROR_TYPE_ITEM,
2450 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2451 return rte_flow_error_set(error, EINVAL,
2452 RTE_FLOW_ERROR_TYPE_ITEM, item,
2453 "wrong tunnel type - IPv6 specified "
2454 "but IPv4 item provided");
2455 if (item_flags & l3m)
2456 return rte_flow_error_set(error, ENOTSUP,
2457 RTE_FLOW_ERROR_TYPE_ITEM, item,
2458 "multiple L3 layers not supported");
2459 else if (item_flags & l4m)
2460 return rte_flow_error_set(error, EINVAL,
2461 RTE_FLOW_ERROR_TYPE_ITEM, item,
2462 "L3 cannot follow an L4 layer.");
2463 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2464 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2465 return rte_flow_error_set(error, EINVAL,
2466 RTE_FLOW_ERROR_TYPE_ITEM, item,
2467 "L3 cannot follow an NVGRE layer.");
2469 mask = &rte_flow_item_ipv4_mask;
2470 else if (mask->hdr.next_proto_id != 0 &&
2471 mask->hdr.next_proto_id != 0xff)
2472 return rte_flow_error_set(error, EINVAL,
2473 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2474 "partial mask is not supported"
2476 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2477 acc_mask ? (const uint8_t *)acc_mask
2478 : (const uint8_t *)&nic_mask,
2479 sizeof(struct rte_flow_item_ipv4),
2480 range_accepted, error);
2487 * Validate IPV6 item.
2490 * Item specification.
2491 * @param[in] item_flags
2492 * Bit-fields that holds the items detected until now.
2493 * @param[in] last_item
2494 * Previous validated item in the pattern items.
2495 * @param[in] ether_type
2496 * Type in the ethernet layer header (including dot1q).
2497 * @param[in] acc_mask
2498 * Acceptable mask, if NULL default internal default mask
2499 * will be used to check whether item fields are supported.
2501 * Pointer to error structure.
2504 * 0 on success, a negative errno value otherwise and rte_errno is set.
2507 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2508 uint64_t item_flags,
2510 uint16_t ether_type,
2511 const struct rte_flow_item_ipv6 *acc_mask,
2512 struct rte_flow_error *error)
2514 const struct rte_flow_item_ipv6 *mask = item->mask;
2515 const struct rte_flow_item_ipv6 *spec = item->spec;
2516 const struct rte_flow_item_ipv6 nic_mask = {
2519 "\xff\xff\xff\xff\xff\xff\xff\xff"
2520 "\xff\xff\xff\xff\xff\xff\xff\xff",
2522 "\xff\xff\xff\xff\xff\xff\xff\xff"
2523 "\xff\xff\xff\xff\xff\xff\xff\xff",
2524 .vtc_flow = RTE_BE32(0xffffffff),
2528 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2529 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2530 MLX5_FLOW_LAYER_OUTER_L3;
2531 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2532 MLX5_FLOW_LAYER_OUTER_L4;
2534 uint8_t next_proto = 0xFF;
2535 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2536 MLX5_FLOW_LAYER_OUTER_VLAN |
2537 MLX5_FLOW_LAYER_INNER_VLAN);
2539 if ((last_item & l2_vlan) && ether_type &&
2540 ether_type != RTE_ETHER_TYPE_IPV6)
2541 return rte_flow_error_set(error, EINVAL,
2542 RTE_FLOW_ERROR_TYPE_ITEM, item,
2543 "IPv6 cannot follow L2/VLAN layer "
2544 "which ether type is not IPv6");
2545 if (mask && mask->hdr.proto == UINT8_MAX && spec)
2546 next_proto = spec->hdr.proto;
2547 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2548 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2549 return rte_flow_error_set(error, EINVAL,
2550 RTE_FLOW_ERROR_TYPE_ITEM,
2555 if (next_proto == IPPROTO_HOPOPTS ||
2556 next_proto == IPPROTO_ROUTING ||
2557 next_proto == IPPROTO_FRAGMENT ||
2558 next_proto == IPPROTO_ESP ||
2559 next_proto == IPPROTO_AH ||
2560 next_proto == IPPROTO_DSTOPTS)
2561 return rte_flow_error_set(error, EINVAL,
2562 RTE_FLOW_ERROR_TYPE_ITEM, item,
2563 "IPv6 proto (next header) should "
2564 "not be set as extension header");
2565 if (item_flags & MLX5_FLOW_LAYER_IPIP)
2566 return rte_flow_error_set(error, EINVAL,
2567 RTE_FLOW_ERROR_TYPE_ITEM, item,
2568 "wrong tunnel type - IPv4 specified "
2569 "but IPv6 item provided");
2570 if (item_flags & l3m)
2571 return rte_flow_error_set(error, ENOTSUP,
2572 RTE_FLOW_ERROR_TYPE_ITEM, item,
2573 "multiple L3 layers not supported");
2574 else if (item_flags & l4m)
2575 return rte_flow_error_set(error, EINVAL,
2576 RTE_FLOW_ERROR_TYPE_ITEM, item,
2577 "L3 cannot follow an L4 layer.");
2578 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2579 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2580 return rte_flow_error_set(error, EINVAL,
2581 RTE_FLOW_ERROR_TYPE_ITEM, item,
2582 "L3 cannot follow an NVGRE layer.");
2584 mask = &rte_flow_item_ipv6_mask;
2585 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2586 acc_mask ? (const uint8_t *)acc_mask
2587 : (const uint8_t *)&nic_mask,
2588 sizeof(struct rte_flow_item_ipv6),
2589 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2596 * Validate UDP item.
2599 * Item specification.
2600 * @param[in] item_flags
2601 * Bit-fields that holds the items detected until now.
2602 * @param[in] target_protocol
2603 * The next protocol in the previous item.
2604 * @param[in] flow_mask
2605 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2607 * Pointer to error structure.
2610 * 0 on success, a negative errno value otherwise and rte_errno is set.
2613 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2614 uint64_t item_flags,
2615 uint8_t target_protocol,
2616 struct rte_flow_error *error)
2618 const struct rte_flow_item_udp *mask = item->mask;
2619 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2620 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2621 MLX5_FLOW_LAYER_OUTER_L3;
2622 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2623 MLX5_FLOW_LAYER_OUTER_L4;
2626 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2627 return rte_flow_error_set(error, EINVAL,
2628 RTE_FLOW_ERROR_TYPE_ITEM, item,
2629 "protocol filtering not compatible"
2631 if (!(item_flags & l3m))
2632 return rte_flow_error_set(error, EINVAL,
2633 RTE_FLOW_ERROR_TYPE_ITEM, item,
2634 "L3 is mandatory to filter on L4");
2635 if (item_flags & l4m)
2636 return rte_flow_error_set(error, EINVAL,
2637 RTE_FLOW_ERROR_TYPE_ITEM, item,
2638 "multiple L4 layers not supported");
2640 mask = &rte_flow_item_udp_mask;
2641 ret = mlx5_flow_item_acceptable
2642 (item, (const uint8_t *)mask,
2643 (const uint8_t *)&rte_flow_item_udp_mask,
2644 sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2652 * Validate TCP item.
2655 * Item specification.
2656 * @param[in] item_flags
2657 * Bit-fields that holds the items detected until now.
2658 * @param[in] target_protocol
2659 * The next protocol in the previous item.
2661 * Pointer to error structure.
2664 * 0 on success, a negative errno value otherwise and rte_errno is set.
2667 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2668 uint64_t item_flags,
2669 uint8_t target_protocol,
2670 const struct rte_flow_item_tcp *flow_mask,
2671 struct rte_flow_error *error)
2673 const struct rte_flow_item_tcp *mask = item->mask;
2674 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2675 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2676 MLX5_FLOW_LAYER_OUTER_L3;
2677 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2678 MLX5_FLOW_LAYER_OUTER_L4;
2681 MLX5_ASSERT(flow_mask);
2682 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2683 return rte_flow_error_set(error, EINVAL,
2684 RTE_FLOW_ERROR_TYPE_ITEM, item,
2685 "protocol filtering not compatible"
2687 if (!(item_flags & l3m))
2688 return rte_flow_error_set(error, EINVAL,
2689 RTE_FLOW_ERROR_TYPE_ITEM, item,
2690 "L3 is mandatory to filter on L4");
2691 if (item_flags & l4m)
2692 return rte_flow_error_set(error, EINVAL,
2693 RTE_FLOW_ERROR_TYPE_ITEM, item,
2694 "multiple L4 layers not supported");
2696 mask = &rte_flow_item_tcp_mask;
2697 ret = mlx5_flow_item_acceptable
2698 (item, (const uint8_t *)mask,
2699 (const uint8_t *)flow_mask,
2700 sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2708 * Validate VXLAN item.
2711 * Pointer to the Ethernet device structure.
2712 * @param[in] udp_dport
2713 * UDP destination port
2715 * Item specification.
2716 * @param[in] item_flags
2717 * Bit-fields that holds the items detected until now.
2719 * Flow rule attributes.
2721 * Pointer to error structure.
2724 * 0 on success, a negative errno value otherwise and rte_errno is set.
2727 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev,
2729 const struct rte_flow_item *item,
2730 uint64_t item_flags,
2731 const struct rte_flow_attr *attr,
2732 struct rte_flow_error *error)
2734 const struct rte_flow_item_vxlan *spec = item->spec;
2735 const struct rte_flow_item_vxlan *mask = item->mask;
2737 struct mlx5_priv *priv = dev->data->dev_private;
2741 } id = { .vlan_id = 0, };
2742 const struct rte_flow_item_vxlan nic_mask = {
2743 .vni = "\xff\xff\xff",
2746 const struct rte_flow_item_vxlan *valid_mask;
2748 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2749 return rte_flow_error_set(error, ENOTSUP,
2750 RTE_FLOW_ERROR_TYPE_ITEM, item,
2751 "multiple tunnel layers not"
2753 valid_mask = &rte_flow_item_vxlan_mask;
2755 * Verify only UDPv4 is present as defined in
2756 * https://tools.ietf.org/html/rfc7348
2758 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2759 return rte_flow_error_set(error, EINVAL,
2760 RTE_FLOW_ERROR_TYPE_ITEM, item,
2761 "no outer UDP layer found");
2763 mask = &rte_flow_item_vxlan_mask;
2765 if (priv->sh->steering_format_version !=
2766 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 ||
2767 !udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN) {
2768 /* FDB domain & NIC domain non-zero group */
2769 if ((attr->transfer || attr->group) && priv->sh->misc5_cap)
2770 valid_mask = &nic_mask;
2771 /* Group zero in NIC domain */
2772 if (!attr->group && !attr->transfer &&
2773 priv->sh->tunnel_header_0_1)
2774 valid_mask = &nic_mask;
2776 ret = mlx5_flow_item_acceptable
2777 (item, (const uint8_t *)mask,
2778 (const uint8_t *)valid_mask,
2779 sizeof(struct rte_flow_item_vxlan),
2780 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2784 memcpy(&id.vni[1], spec->vni, 3);
2785 memcpy(&id.vni[1], mask->vni, 3);
2787 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2788 return rte_flow_error_set(error, ENOTSUP,
2789 RTE_FLOW_ERROR_TYPE_ITEM, item,
2790 "VXLAN tunnel must be fully defined");
2795 * Validate VXLAN_GPE item.
2798 * Item specification.
2799 * @param[in] item_flags
2800 * Bit-fields that holds the items detected until now.
2802 * Pointer to the private data structure.
2803 * @param[in] target_protocol
2804 * The next protocol in the previous item.
2806 * Pointer to error structure.
2809 * 0 on success, a negative errno value otherwise and rte_errno is set.
2812 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2813 uint64_t item_flags,
2814 struct rte_eth_dev *dev,
2815 struct rte_flow_error *error)
2817 struct mlx5_priv *priv = dev->data->dev_private;
2818 const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2819 const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2824 } id = { .vlan_id = 0, };
2826 if (!priv->sh->config.l3_vxlan_en)
2827 return rte_flow_error_set(error, ENOTSUP,
2828 RTE_FLOW_ERROR_TYPE_ITEM, item,
2829 "L3 VXLAN is not enabled by device"
2830 " parameter and/or not configured in"
2832 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2833 return rte_flow_error_set(error, ENOTSUP,
2834 RTE_FLOW_ERROR_TYPE_ITEM, item,
2835 "multiple tunnel layers not"
2838 * Verify only UDPv4 is present as defined in
2839 * https://tools.ietf.org/html/rfc7348
2841 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2842 return rte_flow_error_set(error, EINVAL,
2843 RTE_FLOW_ERROR_TYPE_ITEM, item,
2844 "no outer UDP layer found");
2846 mask = &rte_flow_item_vxlan_gpe_mask;
2847 ret = mlx5_flow_item_acceptable
2848 (item, (const uint8_t *)mask,
2849 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2850 sizeof(struct rte_flow_item_vxlan_gpe),
2851 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2856 return rte_flow_error_set(error, ENOTSUP,
2857 RTE_FLOW_ERROR_TYPE_ITEM,
2859 "VxLAN-GPE protocol"
2861 memcpy(&id.vni[1], spec->vni, 3);
2862 memcpy(&id.vni[1], mask->vni, 3);
2864 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2865 return rte_flow_error_set(error, ENOTSUP,
2866 RTE_FLOW_ERROR_TYPE_ITEM, item,
2867 "VXLAN-GPE tunnel must be fully"
2872 * Validate GRE Key item.
2875 * Item specification.
2876 * @param[in] item_flags
2877 * Bit flags to mark detected items.
2878 * @param[in] gre_item
2879 * Pointer to gre_item
2881 * Pointer to error structure.
2884 * 0 on success, a negative errno value otherwise and rte_errno is set.
2887 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2888 uint64_t item_flags,
2889 const struct rte_flow_item *gre_item,
2890 struct rte_flow_error *error)
2892 const rte_be32_t *mask = item->mask;
2894 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2895 const struct rte_flow_item_gre *gre_spec;
2896 const struct rte_flow_item_gre *gre_mask;
2898 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2899 return rte_flow_error_set(error, ENOTSUP,
2900 RTE_FLOW_ERROR_TYPE_ITEM, item,
2901 "Multiple GRE key not support");
2902 if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2903 return rte_flow_error_set(error, ENOTSUP,
2904 RTE_FLOW_ERROR_TYPE_ITEM, item,
2905 "No preceding GRE header");
2906 if (item_flags & MLX5_FLOW_LAYER_INNER)
2907 return rte_flow_error_set(error, ENOTSUP,
2908 RTE_FLOW_ERROR_TYPE_ITEM, item,
2909 "GRE key following a wrong item");
2910 gre_mask = gre_item->mask;
2912 gre_mask = &rte_flow_item_gre_mask;
2913 gre_spec = gre_item->spec;
2914 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2915 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2916 return rte_flow_error_set(error, EINVAL,
2917 RTE_FLOW_ERROR_TYPE_ITEM, item,
2918 "Key bit must be on");
2921 mask = &gre_key_default_mask;
2922 ret = mlx5_flow_item_acceptable
2923 (item, (const uint8_t *)mask,
2924 (const uint8_t *)&gre_key_default_mask,
2925 sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2930 * Validate GRE optional item.
2933 * Pointer to the Ethernet device structure.
2935 * Item specification.
2936 * @param[in] item_flags
2937 * Bit flags to mark detected items.
2939 * Flow rule attributes.
2940 * @param[in] gre_item
2941 * Pointer to gre_item
2943 * Pointer to error structure.
2946 * 0 on success, a negative errno value otherwise and rte_errno is set.
2949 mlx5_flow_validate_item_gre_option(struct rte_eth_dev *dev,
2950 const struct rte_flow_item *item,
2951 uint64_t item_flags,
2952 const struct rte_flow_attr *attr,
2953 const struct rte_flow_item *gre_item,
2954 struct rte_flow_error *error)
2956 const struct rte_flow_item_gre *gre_spec = gre_item->spec;
2957 const struct rte_flow_item_gre *gre_mask = gre_item->mask;
2958 const struct rte_flow_item_gre_opt *spec = item->spec;
2959 const struct rte_flow_item_gre_opt *mask = item->mask;
2960 struct mlx5_priv *priv = dev->data->dev_private;
2962 struct rte_flow_item_gre_opt nic_mask = {
2964 .checksum = RTE_BE16(UINT16_MAX),
2968 .key = RTE_BE32(UINT32_MAX),
2971 .sequence = RTE_BE32(UINT32_MAX),
2975 if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2976 return rte_flow_error_set(error, ENOTSUP,
2977 RTE_FLOW_ERROR_TYPE_ITEM, item,
2978 "No preceding GRE header");
2979 if (item_flags & MLX5_FLOW_LAYER_INNER)
2980 return rte_flow_error_set(error, ENOTSUP,
2981 RTE_FLOW_ERROR_TYPE_ITEM, item,
2982 "GRE option following a wrong item");
2984 return rte_flow_error_set(error, EINVAL,
2985 RTE_FLOW_ERROR_TYPE_ITEM, item,
2986 "At least one field gre_option(checksum/key/sequence) must be specified");
2988 gre_mask = &rte_flow_item_gre_mask;
2989 if (mask->checksum_rsvd.checksum)
2990 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x8000)) &&
2991 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x8000)))
2992 return rte_flow_error_set(error, EINVAL,
2993 RTE_FLOW_ERROR_TYPE_ITEM,
2995 "Checksum bit must be on");
2997 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2998 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2999 return rte_flow_error_set(error, EINVAL,
3000 RTE_FLOW_ERROR_TYPE_ITEM,
3001 item, "Key bit must be on");
3002 if (mask->sequence.sequence)
3003 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x1000)) &&
3004 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x1000)))
3005 return rte_flow_error_set(error, EINVAL,
3006 RTE_FLOW_ERROR_TYPE_ITEM,
3008 "Sequence bit must be on");
3009 if (mask->checksum_rsvd.checksum || mask->sequence.sequence) {
3010 if (priv->sh->steering_format_version ==
3011 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 ||
3012 ((attr->group || attr->transfer) &&
3013 !priv->sh->misc5_cap) ||
3014 (!(priv->sh->tunnel_header_0_1 &&
3015 priv->sh->tunnel_header_2_3) &&
3016 !attr->group && !attr->transfer))
3017 return rte_flow_error_set(error, EINVAL,
3018 RTE_FLOW_ERROR_TYPE_ITEM,
3020 "Checksum/Sequence not supported");
3022 ret = mlx5_flow_item_acceptable
3023 (item, (const uint8_t *)mask,
3024 (const uint8_t *)&nic_mask,
3025 sizeof(struct rte_flow_item_gre_opt),
3026 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3031 * Validate GRE item.
3034 * Item specification.
3035 * @param[in] item_flags
3036 * Bit flags to mark detected items.
3037 * @param[in] target_protocol
3038 * The next protocol in the previous item.
3040 * Pointer to error structure.
3043 * 0 on success, a negative errno value otherwise and rte_errno is set.
3046 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
3047 uint64_t item_flags,
3048 uint8_t target_protocol,
3049 struct rte_flow_error *error)
3051 const struct rte_flow_item_gre *spec __rte_unused = item->spec;
3052 const struct rte_flow_item_gre *mask = item->mask;
3054 const struct rte_flow_item_gre nic_mask = {
3055 .c_rsvd0_ver = RTE_BE16(0xB000),
3056 .protocol = RTE_BE16(UINT16_MAX),
3059 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3060 return rte_flow_error_set(error, EINVAL,
3061 RTE_FLOW_ERROR_TYPE_ITEM, item,
3062 "protocol filtering not compatible"
3063 " with this GRE layer");
3064 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3065 return rte_flow_error_set(error, ENOTSUP,
3066 RTE_FLOW_ERROR_TYPE_ITEM, item,
3067 "multiple tunnel layers not"
3069 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3070 return rte_flow_error_set(error, ENOTSUP,
3071 RTE_FLOW_ERROR_TYPE_ITEM, item,
3072 "L3 Layer is missing");
3074 mask = &rte_flow_item_gre_mask;
3075 ret = mlx5_flow_item_acceptable
3076 (item, (const uint8_t *)mask,
3077 (const uint8_t *)&nic_mask,
3078 sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
3082 #ifndef HAVE_MLX5DV_DR
3083 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
3084 if (spec && (spec->protocol & mask->protocol))
3085 return rte_flow_error_set(error, ENOTSUP,
3086 RTE_FLOW_ERROR_TYPE_ITEM, item,
3087 "without MPLS support the"
3088 " specification cannot be used for"
3096 * Validate Geneve item.
3099 * Item specification.
3100 * @param[in] itemFlags
3101 * Bit-fields that holds the items detected until now.
3103 * Pointer to the private data structure.
3105 * Pointer to error structure.
3108 * 0 on success, a negative errno value otherwise and rte_errno is set.
3112 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
3113 uint64_t item_flags,
3114 struct rte_eth_dev *dev,
3115 struct rte_flow_error *error)
3117 struct mlx5_priv *priv = dev->data->dev_private;
3118 const struct rte_flow_item_geneve *spec = item->spec;
3119 const struct rte_flow_item_geneve *mask = item->mask;
3122 uint8_t opt_len = priv->sh->cdev->config.hca_attr.geneve_max_opt_len ?
3123 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
3124 const struct rte_flow_item_geneve nic_mask = {
3125 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
3126 .vni = "\xff\xff\xff",
3127 .protocol = RTE_BE16(UINT16_MAX),
3130 if (!priv->sh->cdev->config.hca_attr.tunnel_stateless_geneve_rx)
3131 return rte_flow_error_set(error, ENOTSUP,
3132 RTE_FLOW_ERROR_TYPE_ITEM, item,
3133 "L3 Geneve is not enabled by device"
3134 " parameter and/or not configured in"
3136 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3137 return rte_flow_error_set(error, ENOTSUP,
3138 RTE_FLOW_ERROR_TYPE_ITEM, item,
3139 "multiple tunnel layers not"
3142 * Verify only UDPv4 is present as defined in
3143 * https://tools.ietf.org/html/rfc7348
3145 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
3146 return rte_flow_error_set(error, EINVAL,
3147 RTE_FLOW_ERROR_TYPE_ITEM, item,
3148 "no outer UDP layer found");
3150 mask = &rte_flow_item_geneve_mask;
3151 ret = mlx5_flow_item_acceptable
3152 (item, (const uint8_t *)mask,
3153 (const uint8_t *)&nic_mask,
3154 sizeof(struct rte_flow_item_geneve),
3155 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3159 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
3160 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
3161 MLX5_GENEVE_CRITO_VAL(gbhdr) ||
3162 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
3163 return rte_flow_error_set(error, ENOTSUP,
3164 RTE_FLOW_ERROR_TYPE_ITEM,
3166 "Geneve protocol unsupported"
3167 " fields are being used");
3168 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
3169 return rte_flow_error_set
3171 RTE_FLOW_ERROR_TYPE_ITEM,
3173 "Unsupported Geneve options length");
3175 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
3176 return rte_flow_error_set
3178 RTE_FLOW_ERROR_TYPE_ITEM, item,
3179 "Geneve tunnel must be fully defined");
3184 * Validate Geneve TLV option item.
3187 * Item specification.
3188 * @param[in] last_item
3189 * Previous validated item in the pattern items.
3190 * @param[in] geneve_item
3191 * Previous GENEVE item specification.
3193 * Pointer to the rte_eth_dev structure.
3195 * Pointer to error structure.
3198 * 0 on success, a negative errno value otherwise and rte_errno is set.
3201 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
3203 const struct rte_flow_item *geneve_item,
3204 struct rte_eth_dev *dev,
3205 struct rte_flow_error *error)
3207 struct mlx5_priv *priv = dev->data->dev_private;
3208 struct mlx5_dev_ctx_shared *sh = priv->sh;
3209 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
3210 struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
3211 uint8_t data_max_supported =
3212 hca_attr->max_geneve_tlv_option_data_len * 4;
3213 const struct rte_flow_item_geneve *geneve_spec;
3214 const struct rte_flow_item_geneve *geneve_mask;
3215 const struct rte_flow_item_geneve_opt *spec = item->spec;
3216 const struct rte_flow_item_geneve_opt *mask = item->mask;
3218 unsigned int data_len;
3219 uint8_t tlv_option_len;
3220 uint16_t optlen_m, optlen_v;
3221 const struct rte_flow_item_geneve_opt full_mask = {
3222 .option_class = RTE_BE16(0xffff),
3223 .option_type = 0xff,
3228 mask = &rte_flow_item_geneve_opt_mask;
3230 return rte_flow_error_set
3231 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3232 "Geneve TLV opt class/type/length must be specified");
3233 if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
3234 return rte_flow_error_set
3235 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3236 "Geneve TLV opt length exceeds the limit (31)");
3237 /* Check if class type and length masks are full. */
3238 if (full_mask.option_class != mask->option_class ||
3239 full_mask.option_type != mask->option_type ||
3240 full_mask.option_len != (mask->option_len & full_mask.option_len))
3241 return rte_flow_error_set
3242 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3243 "Geneve TLV opt class/type/length masks must be full");
3244 /* Check if length is supported */
3245 if ((uint32_t)spec->option_len >
3246 hca_attr->max_geneve_tlv_option_data_len)
3247 return rte_flow_error_set
3248 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3249 "Geneve TLV opt length not supported");
3250 if (hca_attr->max_geneve_tlv_options > 1)
3252 "max_geneve_tlv_options supports more than 1 option");
3253 /* Check GENEVE item preceding. */
3254 if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
3255 return rte_flow_error_set
3256 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3257 "Geneve opt item must be preceded with Geneve item");
3258 geneve_spec = geneve_item->spec;
3259 geneve_mask = geneve_item->mask ? geneve_item->mask :
3260 &rte_flow_item_geneve_mask;
3261 /* Check if GENEVE TLV option size doesn't exceed option length */
3262 if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
3263 geneve_spec->ver_opt_len_o_c_rsvd0)) {
3264 tlv_option_len = spec->option_len & mask->option_len;
3265 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
3266 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
3267 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
3268 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
3269 if ((optlen_v & optlen_m) <= tlv_option_len)
3270 return rte_flow_error_set
3271 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3272 "GENEVE TLV option length exceeds optlen");
3274 /* Check if length is 0 or data is 0. */
3275 if (spec->data == NULL || spec->option_len == 0)
3276 return rte_flow_error_set
3277 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3278 "Geneve TLV opt with zero data/length not supported");
3279 /* Check not all data & mask are 0. */
3280 data_len = spec->option_len * 4;
3281 if (mask->data == NULL) {
3282 for (i = 0; i < data_len; i++)
3286 return rte_flow_error_set(error, ENOTSUP,
3287 RTE_FLOW_ERROR_TYPE_ITEM, item,
3288 "Can't match on Geneve option data 0");
3290 for (i = 0; i < data_len; i++)
3291 if (spec->data[i] & mask->data[i])
3294 return rte_flow_error_set(error, ENOTSUP,
3295 RTE_FLOW_ERROR_TYPE_ITEM, item,
3296 "Can't match on Geneve option data and mask 0");
3297 /* Check data mask supported. */
3298 for (i = data_max_supported; i < data_len ; i++)
3300 return rte_flow_error_set(error, ENOTSUP,
3301 RTE_FLOW_ERROR_TYPE_ITEM, item,
3302 "Data mask is of unsupported size");
3304 /* Check GENEVE option is supported in NIC. */
3305 if (!hca_attr->geneve_tlv_opt)
3306 return rte_flow_error_set
3307 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3308 "Geneve TLV opt not supported");
3309 /* Check if we already have geneve option with different type/class. */
3310 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
3311 geneve_opt_resource = sh->geneve_tlv_option_resource;
3312 if (geneve_opt_resource != NULL)
3313 if (geneve_opt_resource->option_class != spec->option_class ||
3314 geneve_opt_resource->option_type != spec->option_type ||
3315 geneve_opt_resource->length != spec->option_len) {
3316 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3317 return rte_flow_error_set(error, ENOTSUP,
3318 RTE_FLOW_ERROR_TYPE_ITEM, item,
3319 "Only one Geneve TLV option supported");
3321 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3326 * Validate MPLS item.
3329 * Pointer to the rte_eth_dev structure.
3331 * Item specification.
3332 * @param[in] item_flags
3333 * Bit-fields that holds the items detected until now.
3334 * @param[in] prev_layer
3335 * The protocol layer indicated in previous item.
3337 * Pointer to error structure.
3340 * 0 on success, a negative errno value otherwise and rte_errno is set.
3343 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
3344 const struct rte_flow_item *item __rte_unused,
3345 uint64_t item_flags __rte_unused,
3346 uint64_t prev_layer __rte_unused,
3347 struct rte_flow_error *error)
3349 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
3350 const struct rte_flow_item_mpls *mask = item->mask;
3351 struct mlx5_priv *priv = dev->data->dev_private;
3354 if (!priv->sh->dev_cap.mpls_en)
3355 return rte_flow_error_set(error, ENOTSUP,
3356 RTE_FLOW_ERROR_TYPE_ITEM, item,
3357 "MPLS not supported or"
3358 " disabled in firmware"
3360 /* MPLS over UDP, GRE is allowed */
3361 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |
3362 MLX5_FLOW_LAYER_GRE |
3363 MLX5_FLOW_LAYER_GRE_KEY)))
3364 return rte_flow_error_set(error, EINVAL,
3365 RTE_FLOW_ERROR_TYPE_ITEM, item,
3366 "protocol filtering not compatible"
3367 " with MPLS layer");
3368 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
3369 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
3370 !(item_flags & MLX5_FLOW_LAYER_GRE))
3371 return rte_flow_error_set(error, ENOTSUP,
3372 RTE_FLOW_ERROR_TYPE_ITEM, item,
3373 "multiple tunnel layers not"
3376 mask = &rte_flow_item_mpls_mask;
3377 ret = mlx5_flow_item_acceptable
3378 (item, (const uint8_t *)mask,
3379 (const uint8_t *)&rte_flow_item_mpls_mask,
3380 sizeof(struct rte_flow_item_mpls),
3381 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3386 return rte_flow_error_set(error, ENOTSUP,
3387 RTE_FLOW_ERROR_TYPE_ITEM, item,
3388 "MPLS is not supported by Verbs, please"
3394 * Validate NVGRE item.
3397 * Item specification.
3398 * @param[in] item_flags
3399 * Bit flags to mark detected items.
3400 * @param[in] target_protocol
3401 * The next protocol in the previous item.
3403 * Pointer to error structure.
3406 * 0 on success, a negative errno value otherwise and rte_errno is set.
3409 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
3410 uint64_t item_flags,
3411 uint8_t target_protocol,
3412 struct rte_flow_error *error)
3414 const struct rte_flow_item_nvgre *mask = item->mask;
3417 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3418 return rte_flow_error_set(error, EINVAL,
3419 RTE_FLOW_ERROR_TYPE_ITEM, item,
3420 "protocol filtering not compatible"
3421 " with this GRE layer");
3422 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3423 return rte_flow_error_set(error, ENOTSUP,
3424 RTE_FLOW_ERROR_TYPE_ITEM, item,
3425 "multiple tunnel layers not"
3427 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3428 return rte_flow_error_set(error, ENOTSUP,
3429 RTE_FLOW_ERROR_TYPE_ITEM, item,
3430 "L3 Layer is missing");
3432 mask = &rte_flow_item_nvgre_mask;
3433 ret = mlx5_flow_item_acceptable
3434 (item, (const uint8_t *)mask,
3435 (const uint8_t *)&rte_flow_item_nvgre_mask,
3436 sizeof(struct rte_flow_item_nvgre),
3437 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3444 * Validate eCPRI item.
3447 * Item specification.
3448 * @param[in] item_flags
3449 * Bit-fields that holds the items detected until now.
3450 * @param[in] last_item
3451 * Previous validated item in the pattern items.
3452 * @param[in] ether_type
3453 * Type in the ethernet layer header (including dot1q).
3454 * @param[in] acc_mask
3455 * Acceptable mask, if NULL default internal default mask
3456 * will be used to check whether item fields are supported.
3458 * Pointer to error structure.
3461 * 0 on success, a negative errno value otherwise and rte_errno is set.
3464 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
3465 uint64_t item_flags,
3467 uint16_t ether_type,
3468 const struct rte_flow_item_ecpri *acc_mask,
3469 struct rte_flow_error *error)
3471 const struct rte_flow_item_ecpri *mask = item->mask;
3472 const struct rte_flow_item_ecpri nic_mask = {
3476 RTE_BE32(((const struct rte_ecpri_common_hdr) {
3480 .dummy[0] = 0xFFFFFFFF,
3483 const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
3484 MLX5_FLOW_LAYER_OUTER_VLAN);
3485 struct rte_flow_item_ecpri mask_lo;
3487 if (!(last_item & outer_l2_vlan) &&
3488 last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
3489 return rte_flow_error_set(error, EINVAL,
3490 RTE_FLOW_ERROR_TYPE_ITEM, item,
3491 "eCPRI can only follow L2/VLAN layer or UDP layer");
3492 if ((last_item & outer_l2_vlan) && ether_type &&
3493 ether_type != RTE_ETHER_TYPE_ECPRI)
3494 return rte_flow_error_set(error, EINVAL,
3495 RTE_FLOW_ERROR_TYPE_ITEM, item,
3496 "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
3497 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3498 return rte_flow_error_set(error, EINVAL,
3499 RTE_FLOW_ERROR_TYPE_ITEM, item,
3500 "eCPRI with tunnel is not supported right now");
3501 if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3502 return rte_flow_error_set(error, ENOTSUP,
3503 RTE_FLOW_ERROR_TYPE_ITEM, item,
3504 "multiple L3 layers not supported");
3505 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3506 return rte_flow_error_set(error, EINVAL,
3507 RTE_FLOW_ERROR_TYPE_ITEM, item,
3508 "eCPRI cannot coexist with a TCP layer");
3509 /* In specification, eCPRI could be over UDP layer. */
3510 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3511 return rte_flow_error_set(error, EINVAL,
3512 RTE_FLOW_ERROR_TYPE_ITEM, item,
3513 "eCPRI over UDP layer is not yet supported right now");
3514 /* Mask for type field in common header could be zero. */
3516 mask = &rte_flow_item_ecpri_mask;
3517 mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3518 /* Input mask is in big-endian format. */
3519 if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3520 return rte_flow_error_set(error, EINVAL,
3521 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3522 "partial mask is not supported for protocol");
3523 else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3524 return rte_flow_error_set(error, EINVAL,
3525 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3526 "message header mask must be after a type mask");
3527 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3528 acc_mask ? (const uint8_t *)acc_mask
3529 : (const uint8_t *)&nic_mask,
3530 sizeof(struct rte_flow_item_ecpri),
3531 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3535 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3536 const struct rte_flow_attr *attr __rte_unused,
3537 const struct rte_flow_item items[] __rte_unused,
3538 const struct rte_flow_action actions[] __rte_unused,
3539 bool external __rte_unused,
3540 int hairpin __rte_unused,
3541 struct rte_flow_error *error)
3543 return rte_flow_error_set(error, ENOTSUP,
3544 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3547 static struct mlx5_flow *
3548 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3549 const struct rte_flow_attr *attr __rte_unused,
3550 const struct rte_flow_item items[] __rte_unused,
3551 const struct rte_flow_action actions[] __rte_unused,
3552 struct rte_flow_error *error)
3554 rte_flow_error_set(error, ENOTSUP,
3555 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3560 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3561 struct mlx5_flow *dev_flow __rte_unused,
3562 const struct rte_flow_attr *attr __rte_unused,
3563 const struct rte_flow_item items[] __rte_unused,
3564 const struct rte_flow_action actions[] __rte_unused,
3565 struct rte_flow_error *error)
3567 return rte_flow_error_set(error, ENOTSUP,
3568 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3572 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3573 struct rte_flow *flow __rte_unused,
3574 struct rte_flow_error *error)
3576 return rte_flow_error_set(error, ENOTSUP,
3577 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3581 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3582 struct rte_flow *flow __rte_unused)
3587 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3588 struct rte_flow *flow __rte_unused)
3593 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3594 struct rte_flow *flow __rte_unused,
3595 const struct rte_flow_action *actions __rte_unused,
3596 void *data __rte_unused,
3597 struct rte_flow_error *error)
3599 return rte_flow_error_set(error, ENOTSUP,
3600 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3604 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3605 uint32_t domains __rte_unused,
3606 uint32_t flags __rte_unused)
3611 /* Void driver to protect from null pointer reference. */
3612 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3613 .validate = flow_null_validate,
3614 .prepare = flow_null_prepare,
3615 .translate = flow_null_translate,
3616 .apply = flow_null_apply,
3617 .remove = flow_null_remove,
3618 .destroy = flow_null_destroy,
3619 .query = flow_null_query,
3620 .sync_domain = flow_null_sync_domain,
3624 * Select flow driver type according to flow attributes and device
3628 * Pointer to the dev structure.
3630 * Pointer to the flow attributes.
3633 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3635 static enum mlx5_flow_drv_type
3636 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3638 struct mlx5_priv *priv = dev->data->dev_private;
3639 /* The OS can determine first a specific flow type (DV, VERBS) */
3640 enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3642 if (type != MLX5_FLOW_TYPE_MAX)
3645 * Currently when dv_flow_en == 2, only HW steering engine is
3646 * supported. New engines can also be chosen here if ready.
3648 if (priv->sh->config.dv_flow_en == 2)
3649 return MLX5_FLOW_TYPE_HW;
3650 /* If no OS specific type - continue with DV/VERBS selection */
3651 if (attr->transfer && priv->sh->config.dv_esw_en)
3652 type = MLX5_FLOW_TYPE_DV;
3653 if (!attr->transfer)
3654 type = priv->sh->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3655 MLX5_FLOW_TYPE_VERBS;
3659 #define flow_get_drv_ops(type) flow_drv_ops[type]
3662 * Flow driver validation API. This abstracts calling driver specific functions.
3663 * The type of flow driver is determined according to flow attributes.
3666 * Pointer to the dev structure.
3668 * Pointer to the flow attributes.
3670 * Pointer to the list of items.
3671 * @param[in] actions
3672 * Pointer to the list of actions.
3673 * @param[in] external
3674 * This flow rule is created by request external to PMD.
3675 * @param[in] hairpin
3676 * Number of hairpin TX actions, 0 means classic flow.
3678 * Pointer to the error structure.
3681 * 0 on success, a negative errno value otherwise and rte_errno is set.
3684 flow_drv_validate(struct rte_eth_dev *dev,
3685 const struct rte_flow_attr *attr,
3686 const struct rte_flow_item items[],
3687 const struct rte_flow_action actions[],
3688 bool external, int hairpin, struct rte_flow_error *error)
3690 const struct mlx5_flow_driver_ops *fops;
3691 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3693 fops = flow_get_drv_ops(type);
3694 return fops->validate(dev, attr, items, actions, external,
3699 * Flow driver preparation API. This abstracts calling driver specific
3700 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3701 * calculates the size of memory required for device flow, allocates the memory,
3702 * initializes the device flow and returns the pointer.
3705 * This function initializes device flow structure such as dv or verbs in
3706 * struct mlx5_flow. However, it is caller's responsibility to initialize the
3707 * rest. For example, adding returning device flow to flow->dev_flow list and
3708 * setting backward reference to the flow should be done out of this function.
3709 * layers field is not filled either.
3712 * Pointer to the dev structure.
3714 * Pointer to the flow attributes.
3716 * Pointer to the list of items.
3717 * @param[in] actions
3718 * Pointer to the list of actions.
3719 * @param[in] flow_idx
3720 * This memory pool index to the flow.
3722 * Pointer to the error structure.
3725 * Pointer to device flow on success, otherwise NULL and rte_errno is set.
3727 static inline struct mlx5_flow *
3728 flow_drv_prepare(struct rte_eth_dev *dev,
3729 const struct rte_flow *flow,
3730 const struct rte_flow_attr *attr,
3731 const struct rte_flow_item items[],
3732 const struct rte_flow_action actions[],
3734 struct rte_flow_error *error)
3736 const struct mlx5_flow_driver_ops *fops;
3737 enum mlx5_flow_drv_type type = flow->drv_type;
3738 struct mlx5_flow *mlx5_flow = NULL;
3740 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3741 fops = flow_get_drv_ops(type);
3742 mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3744 mlx5_flow->flow_idx = flow_idx;
3749 * Flow driver translation API. This abstracts calling driver specific
3750 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3751 * translates a generic flow into a driver flow. flow_drv_prepare() must
3755 * dev_flow->layers could be filled as a result of parsing during translation
3756 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3757 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3758 * flow->actions could be overwritten even though all the expanded dev_flows
3759 * have the same actions.
3762 * Pointer to the rte dev structure.
3763 * @param[in, out] dev_flow
3764 * Pointer to the mlx5 flow.
3766 * Pointer to the flow attributes.
3768 * Pointer to the list of items.
3769 * @param[in] actions
3770 * Pointer to the list of actions.
3772 * Pointer to the error structure.
3775 * 0 on success, a negative errno value otherwise and rte_errno is set.
3778 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3779 const struct rte_flow_attr *attr,
3780 const struct rte_flow_item items[],
3781 const struct rte_flow_action actions[],
3782 struct rte_flow_error *error)
3784 const struct mlx5_flow_driver_ops *fops;
3785 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3787 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3788 fops = flow_get_drv_ops(type);
3789 return fops->translate(dev, dev_flow, attr, items, actions, error);
3793 * Flow driver apply API. This abstracts calling driver specific functions.
3794 * Parent flow (rte_flow) should have driver type (drv_type). It applies
3795 * translated driver flows on to device. flow_drv_translate() must precede.
3798 * Pointer to Ethernet device structure.
3799 * @param[in, out] flow
3800 * Pointer to flow structure.
3802 * Pointer to error structure.
3805 * 0 on success, a negative errno value otherwise and rte_errno is set.
3808 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3809 struct rte_flow_error *error)
3811 const struct mlx5_flow_driver_ops *fops;
3812 enum mlx5_flow_drv_type type = flow->drv_type;
3814 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3815 fops = flow_get_drv_ops(type);
3816 return fops->apply(dev, flow, error);
3820 * Flow driver destroy API. This abstracts calling driver specific functions.
3821 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3822 * on device and releases resources of the flow.
3825 * Pointer to Ethernet device.
3826 * @param[in, out] flow
3827 * Pointer to flow structure.
3830 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3832 const struct mlx5_flow_driver_ops *fops;
3833 enum mlx5_flow_drv_type type = flow->drv_type;
3835 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3836 fops = flow_get_drv_ops(type);
3837 fops->destroy(dev, flow);
3841 * Flow driver find RSS policy tbl API. This abstracts calling driver
3842 * specific functions. Parent flow (rte_flow) should have driver
3843 * type (drv_type). It will find the RSS policy table that has the rss_desc.
3846 * Pointer to Ethernet device.
3847 * @param[in, out] flow
3848 * Pointer to flow structure.
3850 * Pointer to meter policy table.
3851 * @param[in] rss_desc
3852 * Pointer to rss_desc
3854 static struct mlx5_flow_meter_sub_policy *
3855 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3856 struct rte_flow *flow,
3857 struct mlx5_flow_meter_policy *policy,
3858 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3860 const struct mlx5_flow_driver_ops *fops;
3861 enum mlx5_flow_drv_type type = flow->drv_type;
3863 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3864 fops = flow_get_drv_ops(type);
3865 return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3869 * Flow driver color tag rule API. This abstracts calling driver
3870 * specific functions. Parent flow (rte_flow) should have driver
3871 * type (drv_type). It will create the color tag rules in hierarchy meter.
3874 * Pointer to Ethernet device.
3875 * @param[in, out] flow
3876 * Pointer to flow structure.
3878 * Pointer to flow meter structure.
3879 * @param[in] src_port
3880 * The src port this extra rule should use.
3882 * The src port id match item.
3884 * Pointer to error structure.
3887 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev,
3888 struct rte_flow *flow,
3889 struct mlx5_flow_meter_info *fm,
3891 const struct rte_flow_item *item,
3892 struct rte_flow_error *error)
3894 const struct mlx5_flow_driver_ops *fops;
3895 enum mlx5_flow_drv_type type = flow->drv_type;
3897 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3898 fops = flow_get_drv_ops(type);
3899 return fops->meter_hierarchy_rule_create(dev, fm,
3900 src_port, item, error);
3904 * Get RSS action from the action list.
3907 * Pointer to Ethernet device.
3908 * @param[in] actions
3909 * Pointer to the list of actions.
3911 * Parent flow structure pointer.
3914 * Pointer to the RSS action if exist, else return NULL.
3916 static const struct rte_flow_action_rss*
3917 flow_get_rss_action(struct rte_eth_dev *dev,
3918 const struct rte_flow_action actions[])
3920 struct mlx5_priv *priv = dev->data->dev_private;
3921 const struct rte_flow_action_rss *rss = NULL;
3922 struct mlx5_meter_policy_action_container *acg;
3923 struct mlx5_meter_policy_action_container *acy;
3925 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3926 switch (actions->type) {
3927 case RTE_FLOW_ACTION_TYPE_RSS:
3928 rss = actions->conf;
3930 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3932 const struct rte_flow_action_sample *sample =
3934 const struct rte_flow_action *act = sample->actions;
3935 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3936 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3940 case RTE_FLOW_ACTION_TYPE_METER:
3943 struct mlx5_flow_meter_info *fm;
3944 struct mlx5_flow_meter_policy *policy;
3945 const struct rte_flow_action_meter *mtr = actions->conf;
3947 fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3948 if (fm && !fm->def_policy) {
3949 policy = mlx5_flow_meter_policy_find(dev,
3950 fm->policy_id, NULL);
3951 MLX5_ASSERT(policy);
3952 if (policy->is_hierarchy) {
3954 mlx5_flow_meter_hierarchy_get_final_policy(dev,
3959 if (policy->is_rss) {
3961 &policy->act_cnt[RTE_COLOR_GREEN];
3963 &policy->act_cnt[RTE_COLOR_YELLOW];
3964 if (acg->fate_action ==
3965 MLX5_FLOW_FATE_SHARED_RSS)
3966 rss = acg->rss->conf;
3967 else if (acy->fate_action ==
3968 MLX5_FLOW_FATE_SHARED_RSS)
3969 rss = acy->rss->conf;
3982 * Get ASO age action by index.
3985 * Pointer to the Ethernet device structure.
3986 * @param[in] age_idx
3987 * Index to the ASO age action.
3990 * The specified ASO age action.
3992 struct mlx5_aso_age_action*
3993 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3995 uint16_t pool_idx = age_idx & UINT16_MAX;
3996 uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3997 struct mlx5_priv *priv = dev->data->dev_private;
3998 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3999 struct mlx5_aso_age_pool *pool;
4001 rte_rwlock_read_lock(&mng->resize_rwl);
4002 pool = mng->pools[pool_idx];
4003 rte_rwlock_read_unlock(&mng->resize_rwl);
4004 return &pool->actions[offset - 1];
4007 /* maps indirect action to translated direct in some actions array */
4008 struct mlx5_translated_action_handle {
4009 struct rte_flow_action_handle *action; /**< Indirect action handle. */
4010 int index; /**< Index in related array of rte_flow_action. */
4014 * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
4015 * direct action if translation possible.
4016 * This functionality used to run same execution path for both direct and
4017 * indirect actions on flow create. All necessary preparations for indirect
4018 * action handling should be performed on *handle* actions list returned
4022 * Pointer to Ethernet device.
4023 * @param[in] actions
4024 * List of actions to translate.
4025 * @param[out] handle
4026 * List to store translated indirect action object handles.
4027 * @param[in, out] indir_n
4028 * Size of *handle* array. On return should be updated with number of
4029 * indirect actions retrieved from the *actions* list.
4030 * @param[out] translated_actions
4031 * List of actions where all indirect actions were translated to direct
4032 * if possible. NULL if no translation took place.
4034 * Pointer to the error structure.
4037 * 0 on success, a negative errno value otherwise and rte_errno is set.
4040 flow_action_handles_translate(struct rte_eth_dev *dev,
4041 const struct rte_flow_action actions[],
4042 struct mlx5_translated_action_handle *handle,
4044 struct rte_flow_action **translated_actions,
4045 struct rte_flow_error *error)
4047 struct mlx5_priv *priv = dev->data->dev_private;
4048 struct rte_flow_action *translated = NULL;
4049 size_t actions_size;
4052 struct mlx5_translated_action_handle *handle_end = NULL;
4054 for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
4055 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
4057 if (copied_n == *indir_n) {
4058 return rte_flow_error_set
4059 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
4060 NULL, "too many shared actions");
4062 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
4063 sizeof(actions[n].conf));
4064 handle[copied_n].index = n;
4068 *indir_n = copied_n;
4071 actions_size = sizeof(struct rte_flow_action) * n;
4072 translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
4077 memcpy(translated, actions, actions_size);
4078 for (handle_end = handle + copied_n; handle < handle_end; handle++) {
4079 struct mlx5_shared_action_rss *shared_rss;
4080 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
4081 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
4082 uint32_t idx = act_idx &
4083 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
4086 case MLX5_INDIRECT_ACTION_TYPE_RSS:
4087 shared_rss = mlx5_ipool_get
4088 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
4089 translated[handle->index].type =
4090 RTE_FLOW_ACTION_TYPE_RSS;
4091 translated[handle->index].conf =
4092 &shared_rss->origin;
4094 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
4095 translated[handle->index].type =
4096 (enum rte_flow_action_type)
4097 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
4098 translated[handle->index].conf = (void *)(uintptr_t)idx;
4100 case MLX5_INDIRECT_ACTION_TYPE_AGE:
4101 if (priv->sh->flow_hit_aso_en) {
4102 translated[handle->index].type =
4103 (enum rte_flow_action_type)
4104 MLX5_RTE_FLOW_ACTION_TYPE_AGE;
4105 translated[handle->index].conf =
4106 (void *)(uintptr_t)idx;
4110 case MLX5_INDIRECT_ACTION_TYPE_CT:
4111 if (priv->sh->ct_aso_en) {
4112 translated[handle->index].type =
4113 RTE_FLOW_ACTION_TYPE_CONNTRACK;
4114 translated[handle->index].conf =
4115 (void *)(uintptr_t)idx;
4120 mlx5_free(translated);
4121 return rte_flow_error_set
4122 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
4123 NULL, "invalid indirect action type");
4126 *translated_actions = translated;
4131 * Get Shared RSS action from the action list.
4134 * Pointer to Ethernet device.
4136 * Pointer to the list of actions.
4137 * @param[in] shared_n
4138 * Actions list length.
4141 * The MLX5 RSS action ID if exists, otherwise return 0.
4144 flow_get_shared_rss_action(struct rte_eth_dev *dev,
4145 struct mlx5_translated_action_handle *handle,
4148 struct mlx5_translated_action_handle *handle_end;
4149 struct mlx5_priv *priv = dev->data->dev_private;
4150 struct mlx5_shared_action_rss *shared_rss;
4153 for (handle_end = handle + shared_n; handle < handle_end; handle++) {
4154 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
4155 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
4156 uint32_t idx = act_idx &
4157 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
4159 case MLX5_INDIRECT_ACTION_TYPE_RSS:
4160 shared_rss = mlx5_ipool_get
4161 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
4163 __atomic_add_fetch(&shared_rss->refcnt, 1,
4174 find_graph_root(uint32_t rss_level)
4176 return rss_level < 2 ? MLX5_EXPANSION_ROOT :
4177 MLX5_EXPANSION_ROOT_OUTER;
4181 * Get layer flags from the prefix flow.
4183 * Some flows may be split to several subflows, the prefix subflow gets the
4184 * match items and the suffix sub flow gets the actions.
4185 * Some actions need the user defined match item flags to get the detail for
4187 * This function helps the suffix flow to get the item layer flags from prefix
4190 * @param[in] dev_flow
4191 * Pointer the created prefix subflow.
4194 * The layers get from prefix subflow.
4196 static inline uint64_t
4197 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
4199 uint64_t layers = 0;
4202 * Layers bits could be localization, but usually the compiler will
4203 * help to do the optimization work for source code.
4204 * If no decap actions, use the layers directly.
4206 if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
4207 return dev_flow->handle->layers;
4208 /* Convert L3 layers with decap action. */
4209 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
4210 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4211 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
4212 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4213 /* Convert L4 layers with decap action. */
4214 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
4215 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
4216 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
4217 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
4222 * Get metadata split action information.
4224 * @param[in] actions
4225 * Pointer to the list of actions.
4227 * Pointer to the return pointer.
4228 * @param[out] qrss_type
4229 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
4230 * if no QUEUE/RSS is found.
4231 * @param[out] encap_idx
4232 * Pointer to the index of the encap action if exists, otherwise the last
4236 * Total number of actions.
4239 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
4240 const struct rte_flow_action **qrss,
4243 const struct rte_flow_action_raw_encap *raw_encap;
4245 int raw_decap_idx = -1;
4248 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4249 switch (actions->type) {
4250 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4251 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4252 *encap_idx = actions_n;
4254 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4255 raw_decap_idx = actions_n;
4257 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4258 raw_encap = actions->conf;
4259 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4260 *encap_idx = raw_decap_idx != -1 ?
4261 raw_decap_idx : actions_n;
4263 case RTE_FLOW_ACTION_TYPE_QUEUE:
4264 case RTE_FLOW_ACTION_TYPE_RSS:
4272 if (*encap_idx == -1)
4273 *encap_idx = actions_n;
4274 /* Count RTE_FLOW_ACTION_TYPE_END. */
4275 return actions_n + 1;
4279 * Check if the action will change packet.
4282 * Pointer to Ethernet device.
4287 * true if action will change packet, false otherwise.
4289 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
4290 enum rte_flow_action_type type)
4292 struct mlx5_priv *priv = dev->data->dev_private;
4295 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4296 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4297 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4298 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4299 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4300 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4301 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4302 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4303 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4304 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4305 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4306 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4307 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4308 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4309 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4310 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
4311 case RTE_FLOW_ACTION_TYPE_SET_META:
4312 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4313 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4314 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4315 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4316 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4317 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4318 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4319 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4320 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4321 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4322 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4323 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
4325 case RTE_FLOW_ACTION_TYPE_FLAG:
4326 case RTE_FLOW_ACTION_TYPE_MARK:
4327 if (priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
4337 * Check meter action from the action list.
4340 * Pointer to Ethernet device.
4341 * @param[in] actions
4342 * Pointer to the list of actions.
4343 * @param[out] has_mtr
4344 * Pointer to the meter exist flag.
4345 * @param[out] has_modify
4346 * Pointer to the flag showing there's packet change action.
4347 * @param[out] meter_id
4348 * Pointer to the meter id.
4351 * Total number of actions.
4354 flow_check_meter_action(struct rte_eth_dev *dev,
4355 const struct rte_flow_action actions[],
4356 bool *has_mtr, bool *has_modify, uint32_t *meter_id)
4358 const struct rte_flow_action_meter *mtr = NULL;
4361 MLX5_ASSERT(has_mtr);
4363 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4364 switch (actions->type) {
4365 case RTE_FLOW_ACTION_TYPE_METER:
4366 mtr = actions->conf;
4367 *meter_id = mtr->mtr_id;
4374 *has_modify |= flow_check_modify_action_type(dev,
4378 /* Count RTE_FLOW_ACTION_TYPE_END. */
4379 return actions_n + 1;
4383 * Check if the flow should be split due to hairpin.
4384 * The reason for the split is that in current HW we can't
4385 * support encap and push-vlan on Rx, so if a flow contains
4386 * these actions we move it to Tx.
4389 * Pointer to Ethernet device.
4391 * Flow rule attributes.
4392 * @param[in] actions
4393 * Associated actions (list terminated by the END action).
4396 * > 0 the number of actions and the flow should be split,
4397 * 0 when no split required.
4400 flow_check_hairpin_split(struct rte_eth_dev *dev,
4401 const struct rte_flow_attr *attr,
4402 const struct rte_flow_action actions[])
4404 int queue_action = 0;
4407 const struct rte_flow_action_queue *queue;
4408 const struct rte_flow_action_rss *rss;
4409 const struct rte_flow_action_raw_encap *raw_encap;
4410 const struct rte_eth_hairpin_conf *conf;
4414 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4415 switch (actions->type) {
4416 case RTE_FLOW_ACTION_TYPE_QUEUE:
4417 queue = actions->conf;
4420 conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
4421 if (conf == NULL || conf->tx_explicit != 0)
4426 case RTE_FLOW_ACTION_TYPE_RSS:
4427 rss = actions->conf;
4428 if (rss == NULL || rss->queue_num == 0)
4430 conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
4431 if (conf == NULL || conf->tx_explicit != 0)
4436 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4437 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4438 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4439 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4440 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4444 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4445 raw_encap = actions->conf;
4446 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4455 if (split && queue_action)
4460 /* Declare flow create/destroy prototype in advance. */
4462 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4463 const struct rte_flow_attr *attr,
4464 const struct rte_flow_item items[],
4465 const struct rte_flow_action actions[],
4466 bool external, struct rte_flow_error *error);
4469 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4473 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused,
4474 struct mlx5_list_entry *entry, void *cb_ctx)
4476 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4477 struct mlx5_flow_mreg_copy_resource *mcp_res =
4478 container_of(entry, typeof(*mcp_res), hlist_ent);
4480 return mcp_res->mark_id != *(uint32_t *)(ctx->data);
4483 struct mlx5_list_entry *
4484 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx)
4486 struct rte_eth_dev *dev = tool_ctx;
4487 struct mlx5_priv *priv = dev->data->dev_private;
4488 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4489 struct mlx5_flow_mreg_copy_resource *mcp_res;
4490 struct rte_flow_error *error = ctx->error;
4493 uint32_t mark_id = *(uint32_t *)(ctx->data);
4494 struct rte_flow_attr attr = {
4495 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4498 struct mlx5_rte_flow_item_tag tag_spec = {
4501 struct rte_flow_item items[] = {
4502 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
4504 struct rte_flow_action_mark ftag = {
4507 struct mlx5_flow_action_copy_mreg cp_mreg = {
4511 struct rte_flow_action_jump jump = {
4512 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4514 struct rte_flow_action actions[] = {
4515 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
4518 /* Fill the register fields in the flow. */
4519 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
4523 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4527 /* Provide the full width of FLAG specific value. */
4528 if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
4529 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
4530 /* Build a new flow. */
4531 if (mark_id != MLX5_DEFAULT_COPY_ID) {
4532 items[0] = (struct rte_flow_item){
4533 .type = (enum rte_flow_item_type)
4534 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4537 items[1] = (struct rte_flow_item){
4538 .type = RTE_FLOW_ITEM_TYPE_END,
4540 actions[0] = (struct rte_flow_action){
4541 .type = (enum rte_flow_action_type)
4542 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4545 actions[1] = (struct rte_flow_action){
4546 .type = (enum rte_flow_action_type)
4547 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4550 actions[2] = (struct rte_flow_action){
4551 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4554 actions[3] = (struct rte_flow_action){
4555 .type = RTE_FLOW_ACTION_TYPE_END,
4558 /* Default rule, wildcard match. */
4559 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4560 items[0] = (struct rte_flow_item){
4561 .type = RTE_FLOW_ITEM_TYPE_END,
4563 actions[0] = (struct rte_flow_action){
4564 .type = (enum rte_flow_action_type)
4565 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4568 actions[1] = (struct rte_flow_action){
4569 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4572 actions[2] = (struct rte_flow_action){
4573 .type = RTE_FLOW_ACTION_TYPE_END,
4576 /* Build a new entry. */
4577 mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4583 mcp_res->mark_id = mark_id;
4585 * The copy Flows are not included in any list. There
4586 * ones are referenced from other Flows and can not
4587 * be applied, removed, deleted in arbitrary order
4588 * by list traversing.
4590 mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP,
4591 &attr, items, actions, false, error);
4592 if (!mcp_res->rix_flow) {
4593 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4596 return &mcp_res->hlist_ent;
4599 struct mlx5_list_entry *
4600 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
4601 void *cb_ctx __rte_unused)
4603 struct rte_eth_dev *dev = tool_ctx;
4604 struct mlx5_priv *priv = dev->data->dev_private;
4605 struct mlx5_flow_mreg_copy_resource *mcp_res;
4608 mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4613 memcpy(mcp_res, oentry, sizeof(*mcp_res));
4615 return &mcp_res->hlist_ent;
4619 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4621 struct mlx5_flow_mreg_copy_resource *mcp_res =
4622 container_of(entry, typeof(*mcp_res), hlist_ent);
4623 struct rte_eth_dev *dev = tool_ctx;
4624 struct mlx5_priv *priv = dev->data->dev_private;
4626 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4630 * Add a flow of copying flow metadata registers in RX_CP_TBL.
4632 * As mark_id is unique, if there's already a registered flow for the mark_id,
4633 * return by increasing the reference counter of the resource. Otherwise, create
4634 * the resource (mcp_res) and flow.
4637 * - If ingress port is ANY and reg_c[1] is mark_id,
4638 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4640 * For default flow (zero mark_id), flow is like,
4641 * - If ingress port is ANY,
4642 * reg_b := reg_c[0] and jump to RX_ACT_TBL.
4645 * Pointer to Ethernet device.
4647 * ID of MARK action, zero means default flow for META.
4649 * Perform verbose error reporting if not NULL.
4652 * Associated resource on success, NULL otherwise and rte_errno is set.
4654 static struct mlx5_flow_mreg_copy_resource *
4655 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4656 struct rte_flow_error *error)
4658 struct mlx5_priv *priv = dev->data->dev_private;
4659 struct mlx5_list_entry *entry;
4660 struct mlx5_flow_cb_ctx ctx = {
4666 /* Check if already registered. */
4667 MLX5_ASSERT(priv->mreg_cp_tbl);
4668 entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4671 return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4676 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4678 struct mlx5_flow_mreg_copy_resource *mcp_res =
4679 container_of(entry, typeof(*mcp_res), hlist_ent);
4680 struct rte_eth_dev *dev = tool_ctx;
4681 struct mlx5_priv *priv = dev->data->dev_private;
4683 MLX5_ASSERT(mcp_res->rix_flow);
4684 flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow);
4685 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4689 * Release flow in RX_CP_TBL.
4692 * Pointer to Ethernet device.
4694 * Parent flow for wich copying is provided.
4697 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4698 struct rte_flow *flow)
4700 struct mlx5_flow_mreg_copy_resource *mcp_res;
4701 struct mlx5_priv *priv = dev->data->dev_private;
4703 if (!flow->rix_mreg_copy)
4705 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4706 flow->rix_mreg_copy);
4707 if (!mcp_res || !priv->mreg_cp_tbl)
4709 MLX5_ASSERT(mcp_res->rix_flow);
4710 mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4711 flow->rix_mreg_copy = 0;
4715 * Remove the default copy action from RX_CP_TBL.
4717 * This functions is called in the mlx5_dev_start(). No thread safe
4721 * Pointer to Ethernet device.
4724 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4726 struct mlx5_list_entry *entry;
4727 struct mlx5_priv *priv = dev->data->dev_private;
4728 struct mlx5_flow_cb_ctx ctx;
4731 /* Check if default flow is registered. */
4732 if (!priv->mreg_cp_tbl)
4734 mark_id = MLX5_DEFAULT_COPY_ID;
4735 ctx.data = &mark_id;
4736 entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx);
4739 mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4743 * Add the default copy action in in RX_CP_TBL.
4745 * This functions is called in the mlx5_dev_start(). No thread safe
4749 * Pointer to Ethernet device.
4751 * Perform verbose error reporting if not NULL.
4754 * 0 for success, negative value otherwise and rte_errno is set.
4757 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4758 struct rte_flow_error *error)
4760 struct mlx5_priv *priv = dev->data->dev_private;
4761 struct mlx5_flow_mreg_copy_resource *mcp_res;
4762 struct mlx5_flow_cb_ctx ctx;
4765 /* Check whether extensive metadata feature is engaged. */
4766 if (!priv->sh->config.dv_flow_en ||
4767 priv->sh->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4768 !mlx5_flow_ext_mreg_supported(dev) ||
4769 !priv->sh->dv_regc0_mask)
4772 * Add default mreg copy flow may be called multiple time, but
4773 * only be called once in stop. Avoid register it twice.
4775 mark_id = MLX5_DEFAULT_COPY_ID;
4776 ctx.data = &mark_id;
4777 if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx))
4779 mcp_res = flow_mreg_add_copy_action(dev, mark_id, error);
4786 * Add a flow of copying flow metadata registers in RX_CP_TBL.
4788 * All the flow having Q/RSS action should be split by
4789 * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4790 * performs the following,
4791 * - CQE->flow_tag := reg_c[1] (MARK)
4792 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4793 * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4794 * but there should be a flow per each MARK ID set by MARK action.
4796 * For the aforementioned reason, if there's a MARK action in flow's action
4797 * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4798 * the MARK ID to CQE's flow_tag like,
4799 * - If reg_c[1] is mark_id,
4800 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4802 * For SET_META action which stores value in reg_c[0], as the destination is
4803 * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4804 * MARK ID means the default flow. The default flow looks like,
4805 * - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4808 * Pointer to Ethernet device.
4810 * Pointer to flow structure.
4811 * @param[in] actions
4812 * Pointer to the list of actions.
4814 * Perform verbose error reporting if not NULL.
4817 * 0 on success, negative value otherwise and rte_errno is set.
4820 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4821 struct rte_flow *flow,
4822 const struct rte_flow_action *actions,
4823 struct rte_flow_error *error)
4825 struct mlx5_priv *priv = dev->data->dev_private;
4826 struct mlx5_sh_config *config = &priv->sh->config;
4827 struct mlx5_flow_mreg_copy_resource *mcp_res;
4828 const struct rte_flow_action_mark *mark;
4830 /* Check whether extensive metadata feature is engaged. */
4831 if (!config->dv_flow_en ||
4832 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4833 !mlx5_flow_ext_mreg_supported(dev) ||
4834 !priv->sh->dv_regc0_mask)
4836 /* Find MARK action. */
4837 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4838 switch (actions->type) {
4839 case RTE_FLOW_ACTION_TYPE_FLAG:
4840 mcp_res = flow_mreg_add_copy_action
4841 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4844 flow->rix_mreg_copy = mcp_res->idx;
4846 case RTE_FLOW_ACTION_TYPE_MARK:
4847 mark = (const struct rte_flow_action_mark *)
4850 flow_mreg_add_copy_action(dev, mark->id, error);
4853 flow->rix_mreg_copy = mcp_res->idx;
4862 #define MLX5_MAX_SPLIT_ACTIONS 24
4863 #define MLX5_MAX_SPLIT_ITEMS 24
4866 * Split the hairpin flow.
4867 * Since HW can't support encap and push-vlan on Rx, we move these
4869 * If the count action is after the encap then we also
4870 * move the count action. in this case the count will also measure
4874 * Pointer to Ethernet device.
4875 * @param[in] actions
4876 * Associated actions (list terminated by the END action).
4877 * @param[out] actions_rx
4879 * @param[out] actions_tx
4881 * @param[out] pattern_tx
4882 * The pattern items for the Tx flow.
4883 * @param[out] flow_id
4884 * The flow ID connected to this flow.
4890 flow_hairpin_split(struct rte_eth_dev *dev,
4891 const struct rte_flow_action actions[],
4892 struct rte_flow_action actions_rx[],
4893 struct rte_flow_action actions_tx[],
4894 struct rte_flow_item pattern_tx[],
4897 const struct rte_flow_action_raw_encap *raw_encap;
4898 const struct rte_flow_action_raw_decap *raw_decap;
4899 struct mlx5_rte_flow_action_set_tag *set_tag;
4900 struct rte_flow_action *tag_action;
4901 struct mlx5_rte_flow_item_tag *tag_item;
4902 struct rte_flow_item *item;
4906 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4907 switch (actions->type) {
4908 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4909 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4910 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4911 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4912 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4913 rte_memcpy(actions_tx, actions,
4914 sizeof(struct rte_flow_action));
4917 case RTE_FLOW_ACTION_TYPE_COUNT:
4919 rte_memcpy(actions_tx, actions,
4920 sizeof(struct rte_flow_action));
4923 rte_memcpy(actions_rx, actions,
4924 sizeof(struct rte_flow_action));
4928 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4929 raw_encap = actions->conf;
4930 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4931 memcpy(actions_tx, actions,
4932 sizeof(struct rte_flow_action));
4936 rte_memcpy(actions_rx, actions,
4937 sizeof(struct rte_flow_action));
4941 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4942 raw_decap = actions->conf;
4943 if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4944 memcpy(actions_tx, actions,
4945 sizeof(struct rte_flow_action));
4948 rte_memcpy(actions_rx, actions,
4949 sizeof(struct rte_flow_action));
4954 rte_memcpy(actions_rx, actions,
4955 sizeof(struct rte_flow_action));
4960 /* Add set meta action and end action for the Rx flow. */
4961 tag_action = actions_rx;
4962 tag_action->type = (enum rte_flow_action_type)
4963 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4965 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4967 set_tag = (void *)actions_rx;
4968 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4969 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4972 MLX5_ASSERT(set_tag->id > REG_NON);
4973 tag_action->conf = set_tag;
4974 /* Create Tx item list. */
4975 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4976 addr = (void *)&pattern_tx[2];
4978 item->type = (enum rte_flow_item_type)
4979 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4980 tag_item = (void *)addr;
4981 tag_item->data = flow_id;
4982 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4983 MLX5_ASSERT(set_tag->id > REG_NON);
4984 item->spec = tag_item;
4985 addr += sizeof(struct mlx5_rte_flow_item_tag);
4986 tag_item = (void *)addr;
4987 tag_item->data = UINT32_MAX;
4988 tag_item->id = UINT16_MAX;
4989 item->mask = tag_item;
4992 item->type = RTE_FLOW_ITEM_TYPE_END;
4997 * The last stage of splitting chain, just creates the subflow
4998 * without any modification.
5001 * Pointer to Ethernet device.
5003 * Parent flow structure pointer.
5004 * @param[in, out] sub_flow
5005 * Pointer to return the created subflow, may be NULL.
5007 * Flow rule attributes.
5009 * Pattern specification (list terminated by the END pattern item).
5010 * @param[in] actions
5011 * Associated actions (list terminated by the END action).
5012 * @param[in] flow_split_info
5013 * Pointer to flow split info structure.
5015 * Perform verbose error reporting if not NULL.
5017 * 0 on success, negative value otherwise
5020 flow_create_split_inner(struct rte_eth_dev *dev,
5021 struct rte_flow *flow,
5022 struct mlx5_flow **sub_flow,
5023 const struct rte_flow_attr *attr,
5024 const struct rte_flow_item items[],
5025 const struct rte_flow_action actions[],
5026 struct mlx5_flow_split_info *flow_split_info,
5027 struct rte_flow_error *error)
5029 struct mlx5_flow *dev_flow;
5030 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5032 dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
5033 flow_split_info->flow_idx, error);
5036 dev_flow->flow = flow;
5037 dev_flow->external = flow_split_info->external;
5038 dev_flow->skip_scale = flow_split_info->skip_scale;
5039 /* Subflow object was created, we must include one in the list. */
5040 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
5041 dev_flow->handle, next);
5043 * If dev_flow is as one of the suffix flow, some actions in suffix
5044 * flow may need some user defined item layer flags, and pass the
5045 * Metadata rxq mark flag to suffix flow as well.
5047 if (flow_split_info->prefix_layers)
5048 dev_flow->handle->layers = flow_split_info->prefix_layers;
5049 if (flow_split_info->prefix_mark) {
5054 *sub_flow = dev_flow;
5055 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5056 dev_flow->dv.table_id = flow_split_info->table_id;
5058 return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
5062 * Get the sub policy of a meter.
5065 * Pointer to Ethernet device.
5067 * Parent flow structure pointer.
5069 * Pointer to thread flow work space.
5071 * Flow rule attributes.
5073 * Pattern specification (list terminated by the END pattern item).
5075 * Perform verbose error reporting if not NULL.
5078 * Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
5080 static struct mlx5_flow_meter_sub_policy *
5081 get_meter_sub_policy(struct rte_eth_dev *dev,
5082 struct rte_flow *flow,
5083 struct mlx5_flow_workspace *wks,
5084 const struct rte_flow_attr *attr,
5085 const struct rte_flow_item items[],
5086 struct rte_flow_error *error)
5088 struct mlx5_flow_meter_policy *policy;
5089 struct mlx5_flow_meter_policy *final_policy;
5090 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
5092 policy = wks->policy;
5093 final_policy = policy->is_hierarchy ? wks->final_policy : policy;
5094 if (final_policy->is_rss || final_policy->is_queue) {
5095 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
5096 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
5100 * This is a tmp dev_flow,
5101 * no need to register any matcher for it in translate.
5103 wks->skip_matcher_reg = 1;
5104 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
5105 struct mlx5_flow dev_flow = {0};
5106 struct mlx5_flow_handle dev_handle = { {0} };
5107 uint8_t fate = final_policy->act_cnt[i].fate_action;
5109 if (fate == MLX5_FLOW_FATE_SHARED_RSS) {
5110 const struct rte_flow_action_rss *rss_act =
5111 final_policy->act_cnt[i].rss->conf;
5112 struct rte_flow_action rss_actions[2] = {
5114 .type = RTE_FLOW_ACTION_TYPE_RSS,
5118 .type = RTE_FLOW_ACTION_TYPE_END,
5123 dev_flow.handle = &dev_handle;
5124 dev_flow.ingress = attr->ingress;
5125 dev_flow.flow = flow;
5126 dev_flow.external = 0;
5127 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5128 dev_flow.dv.transfer = attr->transfer;
5131 * Translate RSS action to get rss hash fields.
5133 if (flow_drv_translate(dev, &dev_flow, attr,
5134 items, rss_actions, error))
5136 rss_desc_v[i] = wks->rss_desc;
5137 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
5138 rss_desc_v[i].hash_fields =
5139 dev_flow.hash_fields;
5140 rss_desc_v[i].queue_num =
5141 rss_desc_v[i].hash_fields ?
5142 rss_desc_v[i].queue_num : 1;
5143 rss_desc_v[i].tunnel =
5144 !!(dev_flow.handle->layers &
5145 MLX5_FLOW_LAYER_TUNNEL);
5146 /* Use the RSS queues in the containers. */
5147 rss_desc_v[i].queue =
5148 (uint16_t *)(uintptr_t)rss_act->queue;
5149 rss_desc[i] = &rss_desc_v[i];
5150 } else if (fate == MLX5_FLOW_FATE_QUEUE) {
5151 /* This is queue action. */
5152 rss_desc_v[i] = wks->rss_desc;
5153 rss_desc_v[i].key_len = 0;
5154 rss_desc_v[i].hash_fields = 0;
5155 rss_desc_v[i].queue =
5156 &final_policy->act_cnt[i].queue;
5157 rss_desc_v[i].queue_num = 1;
5158 rss_desc[i] = &rss_desc_v[i];
5163 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
5164 flow, policy, rss_desc);
5166 enum mlx5_meter_domain mtr_domain =
5167 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
5168 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
5169 MLX5_MTR_DOMAIN_INGRESS);
5170 sub_policy = policy->sub_policys[mtr_domain][0];
5173 rte_flow_error_set(error, EINVAL,
5174 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5175 "Failed to get meter sub-policy.");
5181 * Split the meter flow.
5183 * As meter flow will split to three sub flow, other than meter
5184 * action, the other actions make sense to only meter accepts
5185 * the packet. If it need to be dropped, no other additional
5186 * actions should be take.
5188 * One kind of special action which decapsulates the L3 tunnel
5189 * header will be in the prefix sub flow, as not to take the
5190 * L3 tunnel header into account.
5193 * Pointer to Ethernet device.
5195 * Parent flow structure pointer.
5197 * Pointer to thread flow work space.
5199 * Flow rule attributes.
5201 * Pattern specification (list terminated by the END pattern item).
5202 * @param[out] sfx_items
5203 * Suffix flow match items (list terminated by the END pattern item).
5204 * @param[in] actions
5205 * Associated actions (list terminated by the END action).
5206 * @param[out] actions_sfx
5207 * Suffix flow actions.
5208 * @param[out] actions_pre
5209 * Prefix flow actions.
5210 * @param[out] mtr_flow_id
5211 * Pointer to meter flow id.
5213 * Perform verbose error reporting if not NULL.
5216 * 0 on success, a negative errno value otherwise and rte_errno is set.
5219 flow_meter_split_prep(struct rte_eth_dev *dev,
5220 struct rte_flow *flow,
5221 struct mlx5_flow_workspace *wks,
5222 const struct rte_flow_attr *attr,
5223 const struct rte_flow_item items[],
5224 struct rte_flow_item sfx_items[],
5225 const struct rte_flow_action actions[],
5226 struct rte_flow_action actions_sfx[],
5227 struct rte_flow_action actions_pre[],
5228 uint32_t *mtr_flow_id,
5229 struct rte_flow_error *error)
5231 struct mlx5_priv *priv = dev->data->dev_private;
5232 struct mlx5_flow_meter_info *fm = wks->fm;
5233 struct rte_flow_action *tag_action = NULL;
5234 struct rte_flow_item *tag_item;
5235 struct mlx5_rte_flow_action_set_tag *set_tag;
5236 const struct rte_flow_action_raw_encap *raw_encap;
5237 const struct rte_flow_action_raw_decap *raw_decap;
5238 struct mlx5_rte_flow_item_tag *tag_item_spec;
5239 struct mlx5_rte_flow_item_tag *tag_item_mask;
5240 uint32_t tag_id = 0;
5241 struct rte_flow_item *vlan_item_dst = NULL;
5242 const struct rte_flow_item *vlan_item_src = NULL;
5243 const struct rte_flow_item *orig_items = items;
5244 struct rte_flow_action *hw_mtr_action;
5245 struct rte_flow_action *action_pre_head = NULL;
5246 int32_t flow_src_port = priv->representor_id;
5248 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
5249 uint8_t mtr_reg_bits = priv->mtr_reg_share ?
5250 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
5251 uint32_t flow_id = 0;
5252 uint32_t flow_id_reversed = 0;
5253 uint8_t flow_id_bits = 0;
5256 /* Prepare the suffix subflow items. */
5257 tag_item = sfx_items++;
5258 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
5259 struct mlx5_priv *port_priv;
5260 const struct rte_flow_item_port_id *pid_v;
5261 int item_type = items->type;
5263 switch (item_type) {
5264 case RTE_FLOW_ITEM_TYPE_PORT_ID:
5265 pid_v = items->spec;
5267 port_priv = mlx5_port_to_eswitch_info(pid_v->id, false);
5269 return rte_flow_error_set(error,
5271 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5273 "Failed to get port info.");
5274 flow_src_port = port_priv->representor_id;
5275 if (!fm->def_policy && wks->policy->is_hierarchy &&
5276 flow_src_port != priv->representor_id) {
5277 if (flow_drv_mtr_hierarchy_rule_create(dev,
5284 memcpy(sfx_items, items, sizeof(*sfx_items));
5287 case RTE_FLOW_ITEM_TYPE_VLAN:
5288 /* Determine if copy vlan item below. */
5289 vlan_item_src = items;
5290 vlan_item_dst = sfx_items++;
5291 vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID;
5297 sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
5299 mtr_first = priv->sh->meter_aso_en &&
5300 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX));
5301 /* For ASO meter, meter must be before tag in TX direction. */
5303 action_pre_head = actions_pre++;
5304 /* Leave space for tag action. */
5305 tag_action = actions_pre++;
5307 /* Prepare the actions for prefix and suffix flow. */
5308 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5309 struct rte_flow_action *action_cur = NULL;
5311 switch (actions->type) {
5312 case RTE_FLOW_ACTION_TYPE_METER:
5314 action_cur = action_pre_head;
5316 /* Leave space for tag action. */
5317 tag_action = actions_pre++;
5318 action_cur = actions_pre++;
5321 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5322 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5323 action_cur = actions_pre++;
5325 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5326 raw_encap = actions->conf;
5327 if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
5328 action_cur = actions_pre++;
5330 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5331 raw_decap = actions->conf;
5332 if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
5333 action_cur = actions_pre++;
5335 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5336 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5337 if (vlan_item_dst && vlan_item_src) {
5338 memcpy(vlan_item_dst, vlan_item_src,
5339 sizeof(*vlan_item_dst));
5341 * Convert to internal match item, it is used
5342 * for vlan push and set vid.
5344 vlan_item_dst->type = (enum rte_flow_item_type)
5345 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
5352 action_cur = (fm->def_policy) ?
5353 actions_sfx++ : actions_pre++;
5354 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
5356 /* Add end action to the actions. */
5357 actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
5358 if (priv->sh->meter_aso_en) {
5360 * For ASO meter, need to add an extra jump action explicitly,
5361 * to jump from meter to policer table.
5363 struct mlx5_flow_meter_sub_policy *sub_policy;
5364 struct mlx5_flow_tbl_data_entry *tbl_data;
5366 if (!fm->def_policy) {
5367 sub_policy = get_meter_sub_policy(dev, flow, wks,
5373 enum mlx5_meter_domain mtr_domain =
5374 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
5375 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
5376 MLX5_MTR_DOMAIN_INGRESS);
5379 &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
5381 tbl_data = container_of(sub_policy->tbl_rsc,
5382 struct mlx5_flow_tbl_data_entry, tbl);
5383 hw_mtr_action = actions_pre++;
5384 hw_mtr_action->type = (enum rte_flow_action_type)
5385 MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
5386 hw_mtr_action->conf = tbl_data->jump.action;
5388 actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
5391 return rte_flow_error_set(error, ENOMEM,
5392 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5393 NULL, "No tag action space.");
5395 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
5398 /* Only default-policy Meter creates mtr flow id. */
5399 if (fm->def_policy) {
5400 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
5402 return rte_flow_error_set(error, ENOMEM,
5403 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5404 "Failed to allocate meter flow id.");
5405 flow_id = tag_id - 1;
5406 flow_id_bits = (!flow_id) ? 1 :
5407 (MLX5_REG_BITS - __builtin_clz(flow_id));
5408 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
5410 mlx5_ipool_free(fm->flow_ipool, tag_id);
5411 return rte_flow_error_set(error, EINVAL,
5412 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5413 "Meter flow id exceeds max limit.");
5415 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
5416 priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
5418 /* Build tag actions and items for meter_id/meter flow_id. */
5419 set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
5420 tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
5421 tag_item_mask = tag_item_spec + 1;
5422 /* Both flow_id and meter_id share the same register. */
5423 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5424 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
5426 .offset = mtr_id_offset,
5427 .length = mtr_reg_bits,
5428 .data = flow->meter,
5431 * The color Reg bits used by flow_id are growing from
5432 * msb to lsb, so must do bit reverse for flow_id val in RegC.
5434 for (shift = 0; shift < flow_id_bits; shift++)
5435 flow_id_reversed = (flow_id_reversed << 1) |
5436 ((flow_id >> shift) & 0x1);
5438 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
5439 tag_item_spec->id = set_tag->id;
5440 tag_item_spec->data = set_tag->data << mtr_id_offset;
5441 tag_item_mask->data = UINT32_MAX << mtr_id_offset;
5442 tag_action->type = (enum rte_flow_action_type)
5443 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5444 tag_action->conf = set_tag;
5445 tag_item->type = (enum rte_flow_item_type)
5446 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
5447 tag_item->spec = tag_item_spec;
5448 tag_item->last = NULL;
5449 tag_item->mask = tag_item_mask;
5452 *mtr_flow_id = tag_id;
5457 * Split action list having QUEUE/RSS for metadata register copy.
5459 * Once Q/RSS action is detected in user's action list, the flow action
5460 * should be split in order to copy metadata registers, which will happen in
5462 * - CQE->flow_tag := reg_c[1] (MARK)
5463 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
5464 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
5465 * This is because the last action of each flow must be a terminal action
5466 * (QUEUE, RSS or DROP).
5468 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
5469 * stored and kept in the mlx5_flow structure per each sub_flow.
5471 * The Q/RSS action is replaced with,
5472 * - SET_TAG, setting the allocated flow ID to reg_c[2].
5473 * And the following JUMP action is added at the end,
5474 * - JUMP, to RX_CP_TBL.
5476 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
5477 * flow_create_split_metadata() routine. The flow will look like,
5478 * - If flow ID matches (reg_c[2]), perform Q/RSS.
5481 * Pointer to Ethernet device.
5482 * @param[out] split_actions
5483 * Pointer to store split actions to jump to CP_TBL.
5484 * @param[in] actions
5485 * Pointer to the list of original flow actions.
5487 * Pointer to the Q/RSS action.
5488 * @param[in] actions_n
5489 * Number of original actions.
5490 * @param[in] mtr_sfx
5491 * Check if it is in meter suffix table.
5493 * Perform verbose error reporting if not NULL.
5496 * non-zero unique flow_id on success, otherwise 0 and
5497 * error/rte_error are set.
5500 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
5501 struct rte_flow_action *split_actions,
5502 const struct rte_flow_action *actions,
5503 const struct rte_flow_action *qrss,
5504 int actions_n, int mtr_sfx,
5505 struct rte_flow_error *error)
5507 struct mlx5_priv *priv = dev->data->dev_private;
5508 struct mlx5_rte_flow_action_set_tag *set_tag;
5509 struct rte_flow_action_jump *jump;
5510 const int qrss_idx = qrss - actions;
5511 uint32_t flow_id = 0;
5515 * Given actions will be split
5516 * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
5517 * - Add jump to mreg CP_TBL.
5518 * As a result, there will be one more action.
5520 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
5521 /* Count MLX5_RTE_FLOW_ACTION_TYPE_TAG. */
5523 set_tag = (void *)(split_actions + actions_n);
5525 * If we are not the meter suffix flow, add the tag action.
5526 * Since meter suffix flow already has the tag added.
5530 * Allocate the new subflow ID. This one is unique within
5531 * device and not shared with representors. Otherwise,
5532 * we would have to resolve multi-thread access synch
5533 * issue. Each flow on the shared device is appended
5534 * with source vport identifier, so the resulting
5535 * flows will be unique in the shared (by master and
5536 * representors) domain even if they have coinciding
5539 mlx5_ipool_malloc(priv->sh->ipool
5540 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
5542 return rte_flow_error_set(error, ENOMEM,
5543 RTE_FLOW_ERROR_TYPE_ACTION,
5544 NULL, "can't allocate id "
5545 "for split Q/RSS subflow");
5546 /* Internal SET_TAG action to set flow ID. */
5547 *set_tag = (struct mlx5_rte_flow_action_set_tag){
5550 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
5554 /* Construct new actions array. */
5555 /* Replace QUEUE/RSS action. */
5556 split_actions[qrss_idx] = (struct rte_flow_action){
5557 .type = (enum rte_flow_action_type)
5558 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5563 * If we are the suffix flow of meter, tag already exist.
5564 * Set the QUEUE/RSS action to void.
5566 split_actions[qrss_idx].type = RTE_FLOW_ACTION_TYPE_VOID;
5568 /* JUMP action to jump to mreg copy table (CP_TBL). */
5569 jump = (void *)(set_tag + 1);
5570 *jump = (struct rte_flow_action_jump){
5571 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5573 split_actions[actions_n - 2] = (struct rte_flow_action){
5574 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5577 split_actions[actions_n - 1] = (struct rte_flow_action){
5578 .type = RTE_FLOW_ACTION_TYPE_END,
5584 * Extend the given action list for Tx metadata copy.
5586 * Copy the given action list to the ext_actions and add flow metadata register
5587 * copy action in order to copy reg_a set by WQE to reg_c[0].
5589 * @param[out] ext_actions
5590 * Pointer to the extended action list.
5591 * @param[in] actions
5592 * Pointer to the list of actions.
5593 * @param[in] actions_n
5594 * Number of actions in the list.
5596 * Perform verbose error reporting if not NULL.
5597 * @param[in] encap_idx
5598 * The encap action index.
5601 * 0 on success, negative value otherwise
5604 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
5605 struct rte_flow_action *ext_actions,
5606 const struct rte_flow_action *actions,
5607 int actions_n, struct rte_flow_error *error,
5610 struct mlx5_flow_action_copy_mreg *cp_mreg =
5611 (struct mlx5_flow_action_copy_mreg *)
5612 (ext_actions + actions_n + 1);
5615 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
5619 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
5624 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
5625 if (encap_idx == actions_n - 1) {
5626 ext_actions[actions_n - 1] = (struct rte_flow_action){
5627 .type = (enum rte_flow_action_type)
5628 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5631 ext_actions[actions_n] = (struct rte_flow_action){
5632 .type = RTE_FLOW_ACTION_TYPE_END,
5635 ext_actions[encap_idx] = (struct rte_flow_action){
5636 .type = (enum rte_flow_action_type)
5637 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5640 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5641 sizeof(*ext_actions) * (actions_n - encap_idx));
5647 * Check the match action from the action list.
5649 * @param[in] actions
5650 * Pointer to the list of actions.
5652 * Flow rule attributes.
5654 * The action to be check if exist.
5655 * @param[out] match_action_pos
5656 * Pointer to the position of the matched action if exists, otherwise is -1.
5657 * @param[out] qrss_action_pos
5658 * Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5659 * @param[out] modify_after_mirror
5660 * Pointer to the flag of modify action after FDB mirroring.
5663 * > 0 the total number of actions.
5664 * 0 if not found match action in action list.
5667 flow_check_match_action(const struct rte_flow_action actions[],
5668 const struct rte_flow_attr *attr,
5669 enum rte_flow_action_type action,
5670 int *match_action_pos, int *qrss_action_pos,
5671 int *modify_after_mirror)
5673 const struct rte_flow_action_sample *sample;
5674 const struct rte_flow_action_raw_decap *decap;
5681 *match_action_pos = -1;
5682 *qrss_action_pos = -1;
5683 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5684 if (actions->type == action) {
5686 *match_action_pos = actions_n;
5688 switch (actions->type) {
5689 case RTE_FLOW_ACTION_TYPE_QUEUE:
5690 case RTE_FLOW_ACTION_TYPE_RSS:
5691 *qrss_action_pos = actions_n;
5693 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5694 sample = actions->conf;
5695 ratio = sample->ratio;
5696 sub_type = ((const struct rte_flow_action *)
5697 (sample->actions))->type;
5698 if (ratio == 1 && attr->transfer)
5701 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5702 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5703 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5704 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5705 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5706 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5707 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5708 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5709 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5710 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5711 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5712 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5713 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5714 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5715 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5716 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5717 case RTE_FLOW_ACTION_TYPE_FLAG:
5718 case RTE_FLOW_ACTION_TYPE_MARK:
5719 case RTE_FLOW_ACTION_TYPE_SET_META:
5720 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5721 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5722 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5723 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5724 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5725 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5726 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5727 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5728 case RTE_FLOW_ACTION_TYPE_METER:
5730 *modify_after_mirror = 1;
5732 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5733 decap = actions->conf;
5734 while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5737 if (actions->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5738 const struct rte_flow_action_raw_encap *encap =
5741 MLX5_ENCAPSULATION_DECISION_SIZE &&
5743 MLX5_ENCAPSULATION_DECISION_SIZE)
5748 *modify_after_mirror = 1;
5755 if (flag && fdb_mirror && !*modify_after_mirror) {
5756 /* FDB mirroring uses the destination array to implement
5757 * instead of FLOW_SAMPLER object.
5759 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5762 /* Count RTE_FLOW_ACTION_TYPE_END. */
5763 return flag ? actions_n + 1 : 0;
5766 #define SAMPLE_SUFFIX_ITEM 2
5769 * Split the sample flow.
5771 * As sample flow will split to two sub flow, sample flow with
5772 * sample action, the other actions will move to new suffix flow.
5774 * Also add unique tag id with tag action in the sample flow,
5775 * the same tag id will be as match in the suffix flow.
5778 * Pointer to Ethernet device.
5779 * @param[in] add_tag
5780 * Add extra tag action flag.
5781 * @param[out] sfx_items
5782 * Suffix flow match items (list terminated by the END pattern item).
5783 * @param[in] actions
5784 * Associated actions (list terminated by the END action).
5785 * @param[out] actions_sfx
5786 * Suffix flow actions.
5787 * @param[out] actions_pre
5788 * Prefix flow actions.
5789 * @param[in] actions_n
5790 * The total number of actions.
5791 * @param[in] sample_action_pos
5792 * The sample action position.
5793 * @param[in] qrss_action_pos
5794 * The Queue/RSS action position.
5795 * @param[in] jump_table
5796 * Add extra jump action flag.
5798 * Perform verbose error reporting if not NULL.
5801 * 0 on success, or unique flow_id, a negative errno value
5802 * otherwise and rte_errno is set.
5805 flow_sample_split_prep(struct rte_eth_dev *dev,
5807 struct rte_flow_item sfx_items[],
5808 const struct rte_flow_action actions[],
5809 struct rte_flow_action actions_sfx[],
5810 struct rte_flow_action actions_pre[],
5812 int sample_action_pos,
5813 int qrss_action_pos,
5815 struct rte_flow_error *error)
5817 struct mlx5_priv *priv = dev->data->dev_private;
5818 struct mlx5_rte_flow_action_set_tag *set_tag;
5819 struct mlx5_rte_flow_item_tag *tag_spec;
5820 struct mlx5_rte_flow_item_tag *tag_mask;
5821 struct rte_flow_action_jump *jump_action;
5822 uint32_t tag_id = 0;
5824 int append_index = 0;
5827 if (sample_action_pos < 0)
5828 return rte_flow_error_set(error, EINVAL,
5829 RTE_FLOW_ERROR_TYPE_ACTION,
5830 NULL, "invalid position of sample "
5832 /* Prepare the actions for prefix and suffix flow. */
5833 if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5834 index = qrss_action_pos;
5835 /* Put the preceding the Queue/RSS action into prefix flow. */
5837 memcpy(actions_pre, actions,
5838 sizeof(struct rte_flow_action) * index);
5839 /* Put others preceding the sample action into prefix flow. */
5840 if (sample_action_pos > index + 1)
5841 memcpy(actions_pre + index, actions + index + 1,
5842 sizeof(struct rte_flow_action) *
5843 (sample_action_pos - index - 1));
5844 index = sample_action_pos - 1;
5845 /* Put Queue/RSS action into Suffix flow. */
5846 memcpy(actions_sfx, actions + qrss_action_pos,
5847 sizeof(struct rte_flow_action));
5850 index = sample_action_pos;
5852 memcpy(actions_pre, actions,
5853 sizeof(struct rte_flow_action) * index);
5855 /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5856 * For CX6DX and above, metadata registers Cx preserve their value,
5857 * add an extra tag action for NIC-RX and E-Switch Domain.
5860 /* Prepare the prefix tag action. */
5862 set_tag = (void *)(actions_pre + actions_n + append_index);
5863 ret = mlx5_flow_get_reg_id(dev, MLX5_SAMPLE_ID, 0, error);
5866 mlx5_ipool_malloc(priv->sh->ipool
5867 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5868 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5872 /* Prepare the suffix subflow items. */
5873 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5874 tag_spec->data = tag_id;
5875 tag_spec->id = set_tag->id;
5876 tag_mask = tag_spec + 1;
5877 tag_mask->data = UINT32_MAX;
5878 sfx_items[0] = (struct rte_flow_item){
5879 .type = (enum rte_flow_item_type)
5880 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5885 sfx_items[1] = (struct rte_flow_item){
5886 .type = (enum rte_flow_item_type)
5887 RTE_FLOW_ITEM_TYPE_END,
5889 /* Prepare the tag action in prefix subflow. */
5890 actions_pre[index++] =
5891 (struct rte_flow_action){
5892 .type = (enum rte_flow_action_type)
5893 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5897 memcpy(actions_pre + index, actions + sample_action_pos,
5898 sizeof(struct rte_flow_action));
5900 /* For the modify action after the sample action in E-Switch mirroring,
5901 * Add the extra jump action in prefix subflow and jump into the next
5902 * table, then do the modify action in the new table.
5905 /* Prepare the prefix jump action. */
5907 jump_action = (void *)(actions_pre + actions_n + append_index);
5908 jump_action->group = jump_table;
5909 actions_pre[index++] =
5910 (struct rte_flow_action){
5911 .type = (enum rte_flow_action_type)
5912 RTE_FLOW_ACTION_TYPE_JUMP,
5913 .conf = jump_action,
5916 actions_pre[index] = (struct rte_flow_action){
5917 .type = (enum rte_flow_action_type)
5918 RTE_FLOW_ACTION_TYPE_END,
5920 /* Put the actions after sample into Suffix flow. */
5921 memcpy(actions_sfx, actions + sample_action_pos + 1,
5922 sizeof(struct rte_flow_action) *
5923 (actions_n - sample_action_pos - 1));
5928 * The splitting for metadata feature.
5930 * - Q/RSS action on NIC Rx should be split in order to pass by
5931 * the mreg copy table (RX_CP_TBL) and then it jumps to the
5932 * action table (RX_ACT_TBL) which has the split Q/RSS action.
5934 * - All the actions on NIC Tx should have a mreg copy action to
5935 * copy reg_a from WQE to reg_c[0].
5938 * Pointer to Ethernet device.
5940 * Parent flow structure pointer.
5942 * Flow rule attributes.
5944 * Pattern specification (list terminated by the END pattern item).
5945 * @param[in] actions
5946 * Associated actions (list terminated by the END action).
5947 * @param[in] flow_split_info
5948 * Pointer to flow split info structure.
5950 * Perform verbose error reporting if not NULL.
5952 * 0 on success, negative value otherwise
5955 flow_create_split_metadata(struct rte_eth_dev *dev,
5956 struct rte_flow *flow,
5957 const struct rte_flow_attr *attr,
5958 const struct rte_flow_item items[],
5959 const struct rte_flow_action actions[],
5960 struct mlx5_flow_split_info *flow_split_info,
5961 struct rte_flow_error *error)
5963 struct mlx5_priv *priv = dev->data->dev_private;
5964 struct mlx5_sh_config *config = &priv->sh->config;
5965 const struct rte_flow_action *qrss = NULL;
5966 struct rte_flow_action *ext_actions = NULL;
5967 struct mlx5_flow *dev_flow = NULL;
5968 uint32_t qrss_id = 0;
5975 /* Check whether extensive metadata feature is engaged. */
5976 if (!config->dv_flow_en ||
5977 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5978 !mlx5_flow_ext_mreg_supported(dev))
5979 return flow_create_split_inner(dev, flow, NULL, attr, items,
5980 actions, flow_split_info, error);
5981 actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5984 /* Exclude hairpin flows from splitting. */
5985 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5986 const struct rte_flow_action_queue *queue;
5989 if (mlx5_rxq_is_hairpin(dev, queue->index))
5991 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5992 const struct rte_flow_action_rss *rss;
5995 if (mlx5_rxq_is_hairpin(dev, rss->queue[0]))
6000 /* Check if it is in meter suffix table. */
6001 mtr_sfx = attr->group == (attr->transfer ?
6002 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
6003 MLX5_FLOW_TABLE_LEVEL_METER);
6005 * Q/RSS action on NIC Rx should be split in order to pass by
6006 * the mreg copy table (RX_CP_TBL) and then it jumps to the
6007 * action table (RX_ACT_TBL) which has the split Q/RSS action.
6009 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
6010 sizeof(struct rte_flow_action_set_tag) +
6011 sizeof(struct rte_flow_action_jump);
6012 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
6015 return rte_flow_error_set(error, ENOMEM,
6016 RTE_FLOW_ERROR_TYPE_ACTION,
6017 NULL, "no memory to split "
6020 * Create the new actions list with removed Q/RSS action
6021 * and appended set tag and jump to register copy table
6022 * (RX_CP_TBL). We should preallocate unique tag ID here
6023 * in advance, because it is needed for set tag action.
6025 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
6028 if (!mtr_sfx && !qrss_id) {
6032 } else if (attr->egress && !attr->transfer) {
6034 * All the actions on NIC Tx should have a metadata register
6035 * copy action to copy reg_a from WQE to reg_c[meta]
6037 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
6038 sizeof(struct mlx5_flow_action_copy_mreg);
6039 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
6042 return rte_flow_error_set(error, ENOMEM,
6043 RTE_FLOW_ERROR_TYPE_ACTION,
6044 NULL, "no memory to split "
6046 /* Create the action list appended with copy register. */
6047 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
6048 actions_n, error, encap_idx);
6052 /* Add the unmodified original or prefix subflow. */
6053 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6054 items, ext_actions ? ext_actions :
6055 actions, flow_split_info, error);
6058 MLX5_ASSERT(dev_flow);
6060 const struct rte_flow_attr q_attr = {
6061 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
6064 /* Internal PMD action to set register. */
6065 struct mlx5_rte_flow_item_tag q_tag_spec = {
6069 struct rte_flow_item q_items[] = {
6071 .type = (enum rte_flow_item_type)
6072 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
6073 .spec = &q_tag_spec,
6078 .type = RTE_FLOW_ITEM_TYPE_END,
6081 struct rte_flow_action q_actions[] = {
6087 .type = RTE_FLOW_ACTION_TYPE_END,
6090 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
6093 * Configure the tag item only if there is no meter subflow.
6094 * Since tag is already marked in the meter suffix subflow
6095 * we can just use the meter suffix items as is.
6098 /* Not meter subflow. */
6099 MLX5_ASSERT(!mtr_sfx);
6101 * Put unique id in prefix flow due to it is destroyed
6102 * after suffix flow and id will be freed after there
6103 * is no actual flows with this id and identifier
6104 * reallocation becomes possible (for example, for
6105 * other flows in other threads).
6107 dev_flow->handle->split_flow_id = qrss_id;
6108 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
6112 q_tag_spec.id = ret;
6115 /* Add suffix subflow to execute Q/RSS. */
6116 flow_split_info->prefix_layers = layers;
6117 flow_split_info->prefix_mark = 0;
6118 flow_split_info->table_id = 0;
6119 ret = flow_create_split_inner(dev, flow, &dev_flow,
6120 &q_attr, mtr_sfx ? items :
6122 flow_split_info, error);
6125 /* qrss ID should be freed if failed. */
6127 MLX5_ASSERT(dev_flow);
6132 * We do not destroy the partially created sub_flows in case of error.
6133 * These ones are included into parent flow list and will be destroyed
6134 * by flow_drv_destroy.
6136 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
6138 mlx5_free(ext_actions);
6143 * Create meter internal drop flow with the original pattern.
6146 * Pointer to Ethernet device.
6148 * Parent flow structure pointer.
6150 * Flow rule attributes.
6152 * Pattern specification (list terminated by the END pattern item).
6153 * @param[in] flow_split_info
6154 * Pointer to flow split info structure.
6156 * Pointer to flow meter structure.
6158 * Perform verbose error reporting if not NULL.
6160 * 0 on success, negative value otherwise
6163 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
6164 struct rte_flow *flow,
6165 const struct rte_flow_attr *attr,
6166 const struct rte_flow_item items[],
6167 struct mlx5_flow_split_info *flow_split_info,
6168 struct mlx5_flow_meter_info *fm,
6169 struct rte_flow_error *error)
6171 struct mlx5_flow *dev_flow = NULL;
6172 struct rte_flow_attr drop_attr = *attr;
6173 struct rte_flow_action drop_actions[3];
6174 struct mlx5_flow_split_info drop_split_info = *flow_split_info;
6176 MLX5_ASSERT(fm->drop_cnt);
6177 drop_actions[0].type =
6178 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
6179 drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
6180 drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
6181 drop_actions[1].conf = NULL;
6182 drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
6183 drop_actions[2].conf = NULL;
6184 drop_split_info.external = false;
6185 drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6186 drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
6187 drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
6188 return flow_create_split_inner(dev, flow, &dev_flow,
6189 &drop_attr, items, drop_actions,
6190 &drop_split_info, error);
6194 * The splitting for meter feature.
6196 * - The meter flow will be split to two flows as prefix and
6197 * suffix flow. The packets make sense only it pass the prefix
6200 * - Reg_C_5 is used for the packet to match betweend prefix and
6204 * Pointer to Ethernet device.
6206 * Parent flow structure pointer.
6208 * Flow rule attributes.
6210 * Pattern specification (list terminated by the END pattern item).
6211 * @param[in] actions
6212 * Associated actions (list terminated by the END action).
6213 * @param[in] flow_split_info
6214 * Pointer to flow split info structure.
6216 * Perform verbose error reporting if not NULL.
6218 * 0 on success, negative value otherwise
6221 flow_create_split_meter(struct rte_eth_dev *dev,
6222 struct rte_flow *flow,
6223 const struct rte_flow_attr *attr,
6224 const struct rte_flow_item items[],
6225 const struct rte_flow_action actions[],
6226 struct mlx5_flow_split_info *flow_split_info,
6227 struct rte_flow_error *error)
6229 struct mlx5_priv *priv = dev->data->dev_private;
6230 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
6231 struct rte_flow_action *sfx_actions = NULL;
6232 struct rte_flow_action *pre_actions = NULL;
6233 struct rte_flow_item *sfx_items = NULL;
6234 struct mlx5_flow *dev_flow = NULL;
6235 struct rte_flow_attr sfx_attr = *attr;
6236 struct mlx5_flow_meter_info *fm = NULL;
6237 uint8_t skip_scale_restore;
6238 bool has_mtr = false;
6239 bool has_modify = false;
6240 bool set_mtr_reg = true;
6241 bool is_mtr_hierarchy = false;
6242 uint32_t meter_id = 0;
6243 uint32_t mtr_idx = 0;
6244 uint32_t mtr_flow_id = 0;
6251 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
6252 &has_modify, &meter_id);
6255 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
6257 return rte_flow_error_set(error, EINVAL,
6258 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6259 NULL, "Meter not found.");
6261 fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
6263 return rte_flow_error_set(error, EINVAL,
6264 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6265 NULL, "Meter not found.");
6266 ret = mlx5_flow_meter_attach(priv, fm,
6270 flow->meter = mtr_idx;
6274 if (!fm->def_policy) {
6275 wks->policy = mlx5_flow_meter_policy_find(dev,
6278 MLX5_ASSERT(wks->policy);
6279 if (wks->policy->is_hierarchy) {
6281 mlx5_flow_meter_hierarchy_get_final_policy(dev,
6283 if (!wks->final_policy)
6284 return rte_flow_error_set(error,
6286 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6287 "Failed to find terminal policy of hierarchy.");
6288 is_mtr_hierarchy = true;
6292 * If it isn't default-policy Meter, and
6293 * 1. There's no action in flow to change
6294 * packet (modify/encap/decap etc.), OR
6295 * 2. No drop count needed for this meter.
6296 * 3. It's not meter hierarchy.
6297 * Then no need to use regC to save meter id anymore.
6299 if (!fm->def_policy && !is_mtr_hierarchy &&
6300 (!has_modify || !fm->drop_cnt))
6301 set_mtr_reg = false;
6302 /* Prefix actions: meter, decap, encap, tag, jump, end. */
6303 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
6304 sizeof(struct mlx5_rte_flow_action_set_tag);
6305 /* Suffix items: tag, vlan, port id, end. */
6306 #define METER_SUFFIX_ITEM 4
6307 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
6308 sizeof(struct mlx5_rte_flow_item_tag) * 2;
6309 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
6312 return rte_flow_error_set(error, ENOMEM,
6313 RTE_FLOW_ERROR_TYPE_ACTION,
6314 NULL, "no memory to split "
6316 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
6318 /* There's no suffix flow for meter of non-default policy. */
6319 if (!fm->def_policy)
6320 pre_actions = sfx_actions + 1;
6322 pre_actions = sfx_actions + actions_n;
6323 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr,
6324 items, sfx_items, actions,
6325 sfx_actions, pre_actions,
6326 (set_mtr_reg ? &mtr_flow_id : NULL),
6332 /* Add the prefix subflow. */
6333 skip_scale_restore = flow_split_info->skip_scale;
6334 flow_split_info->skip_scale |=
6335 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6336 ret = flow_create_split_inner(dev, flow, &dev_flow,
6337 attr, items, pre_actions,
6338 flow_split_info, error);
6339 flow_split_info->skip_scale = skip_scale_restore;
6342 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
6347 dev_flow->handle->split_flow_id = mtr_flow_id;
6348 dev_flow->handle->is_meter_flow_id = 1;
6350 if (!fm->def_policy) {
6351 if (!set_mtr_reg && fm->drop_cnt)
6353 flow_meter_create_drop_flow_with_org_pattern(dev, flow,
6359 /* Setting the sfx group atrr. */
6360 sfx_attr.group = sfx_attr.transfer ?
6361 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
6362 MLX5_FLOW_TABLE_LEVEL_METER;
6363 flow_split_info->prefix_layers =
6364 flow_get_prefix_layer_flags(dev_flow);
6365 flow_split_info->prefix_mark |= wks->mark;
6366 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
6368 /* Add the prefix subflow. */
6369 ret = flow_create_split_metadata(dev, flow,
6370 &sfx_attr, sfx_items ?
6372 sfx_actions ? sfx_actions : actions,
6373 flow_split_info, error);
6376 mlx5_free(sfx_actions);
6381 * The splitting for sample feature.
6383 * Once Sample action is detected in the action list, the flow actions should
6384 * be split into prefix sub flow and suffix sub flow.
6386 * The original items remain in the prefix sub flow, all actions preceding the
6387 * sample action and the sample action itself will be copied to the prefix
6388 * sub flow, the actions following the sample action will be copied to the
6389 * suffix sub flow, Queue action always be located in the suffix sub flow.
6391 * In order to make the packet from prefix sub flow matches with suffix sub
6392 * flow, an extra tag action be added into prefix sub flow, and the suffix sub
6393 * flow uses tag item with the unique flow id.
6396 * Pointer to Ethernet device.
6398 * Parent flow structure pointer.
6400 * Flow rule attributes.
6402 * Pattern specification (list terminated by the END pattern item).
6403 * @param[in] actions
6404 * Associated actions (list terminated by the END action).
6405 * @param[in] flow_split_info
6406 * Pointer to flow split info structure.
6408 * Perform verbose error reporting if not NULL.
6410 * 0 on success, negative value otherwise
6413 flow_create_split_sample(struct rte_eth_dev *dev,
6414 struct rte_flow *flow,
6415 const struct rte_flow_attr *attr,
6416 const struct rte_flow_item items[],
6417 const struct rte_flow_action actions[],
6418 struct mlx5_flow_split_info *flow_split_info,
6419 struct rte_flow_error *error)
6421 struct mlx5_priv *priv = dev->data->dev_private;
6422 struct rte_flow_action *sfx_actions = NULL;
6423 struct rte_flow_action *pre_actions = NULL;
6424 struct rte_flow_item *sfx_items = NULL;
6425 struct mlx5_flow *dev_flow = NULL;
6426 struct rte_flow_attr sfx_attr = *attr;
6427 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6428 struct mlx5_flow_dv_sample_resource *sample_res;
6429 struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
6430 struct mlx5_flow_tbl_resource *sfx_tbl;
6431 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
6435 uint32_t fdb_tx = 0;
6438 int sample_action_pos;
6439 int qrss_action_pos;
6441 int modify_after_mirror = 0;
6442 uint16_t jump_table = 0;
6443 const uint32_t next_ft_step = 1;
6446 if (priv->sampler_en)
6447 actions_n = flow_check_match_action(actions, attr,
6448 RTE_FLOW_ACTION_TYPE_SAMPLE,
6449 &sample_action_pos, &qrss_action_pos,
6450 &modify_after_mirror);
6452 /* The prefix actions must includes sample, tag, end. */
6453 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
6454 + sizeof(struct mlx5_rte_flow_action_set_tag);
6455 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
6456 sizeof(struct mlx5_rte_flow_item_tag) * 2;
6457 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
6458 item_size), 0, SOCKET_ID_ANY);
6460 return rte_flow_error_set(error, ENOMEM,
6461 RTE_FLOW_ERROR_TYPE_ACTION,
6462 NULL, "no memory to split "
6464 /* The representor_id is UINT16_MAX for uplink. */
6465 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX);
6467 * When reg_c_preserve is set, metadata registers Cx preserve
6468 * their value even through packet duplication.
6470 add_tag = (!fdb_tx ||
6471 priv->sh->cdev->config.hca_attr.reg_c_preserve);
6473 sfx_items = (struct rte_flow_item *)((char *)sfx_actions
6475 if (modify_after_mirror)
6476 jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
6478 pre_actions = sfx_actions + actions_n;
6479 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
6480 actions, sfx_actions,
6481 pre_actions, actions_n,
6483 qrss_action_pos, jump_table,
6485 if (tag_id < 0 || (add_tag && !tag_id)) {
6489 if (modify_after_mirror)
6490 flow_split_info->skip_scale =
6491 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6492 /* Add the prefix subflow. */
6493 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6495 flow_split_info, error);
6500 dev_flow->handle->split_flow_id = tag_id;
6501 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6502 if (!modify_after_mirror) {
6503 /* Set the sfx group attr. */
6504 sample_res = (struct mlx5_flow_dv_sample_resource *)
6505 dev_flow->dv.sample_res;
6506 sfx_tbl = (struct mlx5_flow_tbl_resource *)
6507 sample_res->normal_path_tbl;
6508 sfx_tbl_data = container_of(sfx_tbl,
6509 struct mlx5_flow_tbl_data_entry,
6511 sfx_attr.group = sfx_attr.transfer ?
6512 (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
6514 MLX5_ASSERT(attr->transfer);
6515 sfx_attr.group = jump_table;
6517 flow_split_info->prefix_layers =
6518 flow_get_prefix_layer_flags(dev_flow);
6520 flow_split_info->prefix_mark |= wks->mark;
6521 /* Suffix group level already be scaled with factor, set
6522 * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
6523 * again in translation.
6525 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6528 /* Add the suffix subflow. */
6529 ret = flow_create_split_meter(dev, flow, &sfx_attr,
6530 sfx_items ? sfx_items : items,
6531 sfx_actions ? sfx_actions : actions,
6532 flow_split_info, error);
6535 mlx5_free(sfx_actions);
6540 * Split the flow to subflow set. The splitters might be linked
6541 * in the chain, like this:
6542 * flow_create_split_outer() calls:
6543 * flow_create_split_meter() calls:
6544 * flow_create_split_metadata(meter_subflow_0) calls:
6545 * flow_create_split_inner(metadata_subflow_0)
6546 * flow_create_split_inner(metadata_subflow_1)
6547 * flow_create_split_inner(metadata_subflow_2)
6548 * flow_create_split_metadata(meter_subflow_1) calls:
6549 * flow_create_split_inner(metadata_subflow_0)
6550 * flow_create_split_inner(metadata_subflow_1)
6551 * flow_create_split_inner(metadata_subflow_2)
6553 * This provide flexible way to add new levels of flow splitting.
6554 * The all of successfully created subflows are included to the
6555 * parent flow dev_flow list.
6558 * Pointer to Ethernet device.
6560 * Parent flow structure pointer.
6562 * Flow rule attributes.
6564 * Pattern specification (list terminated by the END pattern item).
6565 * @param[in] actions
6566 * Associated actions (list terminated by the END action).
6567 * @param[in] flow_split_info
6568 * Pointer to flow split info structure.
6570 * Perform verbose error reporting if not NULL.
6572 * 0 on success, negative value otherwise
6575 flow_create_split_outer(struct rte_eth_dev *dev,
6576 struct rte_flow *flow,
6577 const struct rte_flow_attr *attr,
6578 const struct rte_flow_item items[],
6579 const struct rte_flow_action actions[],
6580 struct mlx5_flow_split_info *flow_split_info,
6581 struct rte_flow_error *error)
6585 ret = flow_create_split_sample(dev, flow, attr, items,
6586 actions, flow_split_info, error);
6587 MLX5_ASSERT(ret <= 0);
6591 static inline struct mlx5_flow_tunnel *
6592 flow_tunnel_from_rule(const struct mlx5_flow *flow)
6594 struct mlx5_flow_tunnel *tunnel;
6596 #pragma GCC diagnostic push
6597 #pragma GCC diagnostic ignored "-Wcast-qual"
6598 tunnel = (typeof(tunnel))flow->tunnel;
6599 #pragma GCC diagnostic pop
6605 * Adjust flow RSS workspace if needed.
6608 * Pointer to thread flow work space.
6610 * Pointer to RSS descriptor.
6611 * @param[in] nrssq_num
6612 * New RSS queue number.
6615 * 0 on success, -1 otherwise and rte_errno is set.
6618 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
6619 struct mlx5_flow_rss_desc *rss_desc,
6622 if (likely(nrssq_num <= wks->rssq_num))
6624 rss_desc->queue = realloc(rss_desc->queue,
6625 sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
6626 if (!rss_desc->queue) {
6630 wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
6635 * Create a flow and add it to @p list.
6638 * Pointer to Ethernet device.
6640 * Pointer to a TAILQ flow list. If this parameter NULL,
6641 * no list insertion occurred, flow is just created,
6642 * this is caller's responsibility to track the
6645 * Flow rule attributes.
6647 * Pattern specification (list terminated by the END pattern item).
6648 * @param[in] actions
6649 * Associated actions (list terminated by the END action).
6650 * @param[in] external
6651 * This flow rule is created by request external to PMD.
6653 * Perform verbose error reporting if not NULL.
6656 * A flow index on success, 0 otherwise and rte_errno is set.
6659 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6660 const struct rte_flow_attr *attr,
6661 const struct rte_flow_item items[],
6662 const struct rte_flow_action original_actions[],
6663 bool external, struct rte_flow_error *error)
6665 struct mlx5_priv *priv = dev->data->dev_private;
6666 struct rte_flow *flow = NULL;
6667 struct mlx5_flow *dev_flow;
6668 const struct rte_flow_action_rss *rss = NULL;
6669 struct mlx5_translated_action_handle
6670 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6671 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6673 struct mlx5_flow_expand_rss buf;
6674 uint8_t buffer[4096];
6677 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6678 uint8_t buffer[2048];
6681 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6682 uint8_t buffer[2048];
6683 } actions_hairpin_tx;
6685 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6686 uint8_t buffer[2048];
6688 struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6689 struct mlx5_flow_rss_desc *rss_desc;
6690 const struct rte_flow_action *p_actions_rx;
6694 struct rte_flow_attr attr_tx = { .priority = 0 };
6695 const struct rte_flow_action *actions;
6696 struct rte_flow_action *translated_actions = NULL;
6697 struct mlx5_flow_tunnel *tunnel;
6698 struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6699 struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6700 struct mlx5_flow_split_info flow_split_info = {
6701 .external = !!external,
6711 rss_desc = &wks->rss_desc;
6712 ret = flow_action_handles_translate(dev, original_actions,
6715 &translated_actions, error);
6717 MLX5_ASSERT(translated_actions == NULL);
6720 actions = translated_actions ? translated_actions : original_actions;
6721 p_actions_rx = actions;
6722 hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6723 ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6724 external, hairpin_flow, error);
6726 goto error_before_hairpin_split;
6727 flow = mlx5_ipool_zmalloc(priv->flows[type], &idx);
6730 goto error_before_hairpin_split;
6732 if (hairpin_flow > 0) {
6733 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6735 goto error_before_hairpin_split;
6737 flow_hairpin_split(dev, actions, actions_rx.actions,
6738 actions_hairpin_tx.actions, items_tx.items,
6740 p_actions_rx = actions_rx.actions;
6742 flow_split_info.flow_idx = idx;
6743 flow->drv_type = flow_get_drv_type(dev, attr);
6744 MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6745 flow->drv_type < MLX5_FLOW_TYPE_MAX);
6746 memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6747 /* RSS Action only works on NIC RX domain */
6748 if (attr->ingress && !attr->transfer)
6749 rss = flow_get_rss_action(dev, p_actions_rx);
6751 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6754 * The following information is required by
6755 * mlx5_flow_hashfields_adjust() in advance.
6757 rss_desc->level = rss->level;
6758 /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
6759 rss_desc->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
6761 flow->dev_handles = 0;
6762 if (rss && rss->types) {
6763 unsigned int graph_root;
6765 graph_root = find_graph_root(rss->level);
6766 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6768 mlx5_support_expansion, graph_root);
6769 MLX5_ASSERT(ret > 0 &&
6770 (unsigned int)ret < sizeof(expand_buffer.buffer));
6771 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) {
6772 for (i = 0; i < buf->entries; ++i)
6773 mlx5_dbg__print_pattern(buf->entry[i].pattern);
6777 buf->entry[0].pattern = (void *)(uintptr_t)items;
6779 rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6781 for (i = 0; i < buf->entries; ++i) {
6782 /* Initialize flow split data. */
6783 flow_split_info.prefix_layers = 0;
6784 flow_split_info.prefix_mark = 0;
6785 flow_split_info.skip_scale = 0;
6787 * The splitter may create multiple dev_flows,
6788 * depending on configuration. In the simplest
6789 * case it just creates unmodified original flow.
6791 ret = flow_create_split_outer(dev, flow, attr,
6792 buf->entry[i].pattern,
6793 p_actions_rx, &flow_split_info,
6797 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) {
6798 ret = flow_tunnel_add_default_miss(dev, flow, attr,
6801 wks->flows[0].tunnel,
6805 mlx5_free(default_miss_ctx.queue);
6810 /* Create the tx flow. */
6812 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6813 attr_tx.ingress = 0;
6815 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6816 actions_hairpin_tx.actions,
6820 dev_flow->flow = flow;
6821 dev_flow->external = 0;
6822 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6823 dev_flow->handle, next);
6824 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6826 actions_hairpin_tx.actions, error);
6831 * Update the metadata register copy table. If extensive
6832 * metadata feature is enabled and registers are supported
6833 * we might create the extra rte_flow for each unique
6834 * MARK/FLAG action ID.
6836 * The table is updated for ingress Flows only, because
6837 * the egress Flows belong to the different device and
6838 * copy table should be updated in peer NIC Rx domain.
6840 if (attr->ingress &&
6841 (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6842 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6847 * If the flow is external (from application) OR device is started,
6848 * OR mreg discover, then apply immediately.
6850 if (external || dev->data->dev_started ||
6851 (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6852 attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6853 ret = flow_drv_apply(dev, flow, error);
6858 flow_rxq_flags_set(dev, flow);
6859 rte_free(translated_actions);
6860 tunnel = flow_tunnel_from_rule(wks->flows);
6863 flow->tunnel_id = tunnel->tunnel_id;
6864 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6865 mlx5_free(default_miss_ctx.queue);
6867 mlx5_flow_pop_thread_workspace();
6871 ret = rte_errno; /* Save rte_errno before cleanup. */
6872 flow_mreg_del_copy_action(dev, flow);
6873 flow_drv_destroy(dev, flow);
6874 if (rss_desc->shared_rss)
6875 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6877 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6878 rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6879 mlx5_ipool_free(priv->flows[type], idx);
6880 rte_errno = ret; /* Restore rte_errno. */
6883 mlx5_flow_pop_thread_workspace();
6884 error_before_hairpin_split:
6885 rte_free(translated_actions);
6890 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6891 * incoming packets to table 1.
6893 * Other flow rules, requested for group n, will be created in
6894 * e-switch table n+1.
6895 * Jump action to e-switch group n will be created to group n+1.
6897 * Used when working in switchdev mode, to utilise advantages of table 1
6901 * Pointer to Ethernet device.
6904 * Pointer to flow on success, NULL otherwise and rte_errno is set.
6907 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6909 const struct rte_flow_attr attr = {
6916 const struct rte_flow_item pattern = {
6917 .type = RTE_FLOW_ITEM_TYPE_END,
6919 struct rte_flow_action_jump jump = {
6922 const struct rte_flow_action actions[] = {
6924 .type = RTE_FLOW_ACTION_TYPE_JUMP,
6928 .type = RTE_FLOW_ACTION_TYPE_END,
6931 struct rte_flow_error error;
6933 return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6935 actions, false, &error);
6939 * Create a dedicated flow rule on e-switch table 1, matches ESW manager
6940 * and sq number, directs all packets to peer vport.
6943 * Pointer to Ethernet device.
6948 * Flow ID on success, 0 otherwise and rte_errno is set.
6951 mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev, uint32_t txq)
6953 struct rte_flow_attr attr = {
6955 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6960 struct rte_flow_item_port_id port_spec = {
6961 .id = MLX5_PORT_ESW_MGR,
6963 struct mlx5_rte_flow_item_tx_queue txq_spec = {
6966 struct rte_flow_item pattern[] = {
6968 .type = RTE_FLOW_ITEM_TYPE_PORT_ID,
6972 .type = (enum rte_flow_item_type)
6973 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6977 .type = RTE_FLOW_ITEM_TYPE_END,
6980 struct rte_flow_action_jump jump = {
6983 struct rte_flow_action_port_id port = {
6984 .id = dev->data->port_id,
6986 struct rte_flow_action actions[] = {
6988 .type = RTE_FLOW_ACTION_TYPE_JUMP,
6992 .type = RTE_FLOW_ACTION_TYPE_END,
6995 struct rte_flow_error error;
6998 * Creates group 0, highest priority jump flow.
6999 * Matches txq to bypass kernel packets.
7001 if (flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern, actions,
7002 false, &error) == 0)
7004 /* Create group 1, lowest priority redirect flow for txq. */
7006 actions[0].conf = &port;
7007 actions[0].type = RTE_FLOW_ACTION_TYPE_PORT_ID;
7008 return flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern,
7009 actions, false, &error);
7013 * Validate a flow supported by the NIC.
7015 * @see rte_flow_validate()
7019 mlx5_flow_validate(struct rte_eth_dev *dev,
7020 const struct rte_flow_attr *attr,
7021 const struct rte_flow_item items[],
7022 const struct rte_flow_action original_actions[],
7023 struct rte_flow_error *error)
7026 struct mlx5_translated_action_handle
7027 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
7028 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
7029 const struct rte_flow_action *actions;
7030 struct rte_flow_action *translated_actions = NULL;
7031 int ret = flow_action_handles_translate(dev, original_actions,
7034 &translated_actions, error);
7038 actions = translated_actions ? translated_actions : original_actions;
7039 hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
7040 ret = flow_drv_validate(dev, attr, items, actions,
7041 true, hairpin_flow, error);
7042 rte_free(translated_actions);
7049 * @see rte_flow_create()
7053 mlx5_flow_create(struct rte_eth_dev *dev,
7054 const struct rte_flow_attr *attr,
7055 const struct rte_flow_item items[],
7056 const struct rte_flow_action actions[],
7057 struct rte_flow_error *error)
7059 struct mlx5_priv *priv = dev->data->dev_private;
7061 if (priv->sh->config.dv_flow_en == 2) {
7062 rte_flow_error_set(error, ENOTSUP,
7063 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7065 "Flow non-Q creation not supported");
7069 * If the device is not started yet, it is not allowed to created a
7070 * flow from application. PMD default flows and traffic control flows
7073 if (unlikely(!dev->data->dev_started)) {
7074 DRV_LOG(DEBUG, "port %u is not started when "
7075 "inserting a flow", dev->data->port_id);
7076 rte_flow_error_set(error, ENODEV,
7077 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7079 "port not started");
7083 return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN,
7084 attr, items, actions,
7089 * Destroy a flow in a list.
7092 * Pointer to Ethernet device.
7093 * @param[in] flow_idx
7094 * Index of flow to destroy.
7097 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
7100 struct mlx5_priv *priv = dev->data->dev_private;
7101 struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx);
7105 MLX5_ASSERT(flow->type == type);
7107 * Update RX queue flags only if port is started, otherwise it is
7110 if (dev->data->dev_started)
7111 flow_rxq_flags_trim(dev, flow);
7112 flow_drv_destroy(dev, flow);
7114 struct mlx5_flow_tunnel *tunnel;
7116 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
7118 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
7119 mlx5_flow_tunnel_free(dev, tunnel);
7121 flow_mreg_del_copy_action(dev, flow);
7122 mlx5_ipool_free(priv->flows[type], flow_idx);
7126 * Destroy all flows.
7129 * Pointer to Ethernet device.
7131 * Flow type to be flushed.
7133 * If flushing is called actively.
7136 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type,
7139 struct mlx5_priv *priv = dev->data->dev_private;
7140 uint32_t num_flushed = 0, fidx = 1;
7141 struct rte_flow *flow;
7143 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
7144 if (priv->sh->config.dv_flow_en == 2 &&
7145 type == MLX5_FLOW_TYPE_GEN) {
7146 flow_hw_q_flow_flush(dev, NULL);
7151 MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) {
7152 flow_list_destroy(dev, type, fidx);
7156 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
7157 dev->data->port_id, num_flushed);
7162 * Stop all default actions for flows.
7165 * Pointer to Ethernet device.
7168 mlx5_flow_stop_default(struct rte_eth_dev *dev)
7170 flow_mreg_del_default_copy_action(dev);
7171 flow_rxq_flags_clear(dev);
7175 * Start all default actions for flows.
7178 * Pointer to Ethernet device.
7180 * 0 on success, a negative errno value otherwise and rte_errno is set.
7183 mlx5_flow_start_default(struct rte_eth_dev *dev)
7185 struct rte_flow_error error;
7187 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
7188 return flow_mreg_add_default_copy_action(dev, &error);
7192 * Release key of thread specific flow workspace data.
7195 flow_release_workspace(void *data)
7197 struct mlx5_flow_workspace *wks = data;
7198 struct mlx5_flow_workspace *next;
7202 free(wks->rss_desc.queue);
7209 * Get thread specific current flow workspace.
7211 * @return pointer to thread specific flow workspace data, NULL on error.
7213 struct mlx5_flow_workspace*
7214 mlx5_flow_get_thread_workspace(void)
7216 struct mlx5_flow_workspace *data;
7218 data = mlx5_flow_os_get_specific_workspace();
7219 MLX5_ASSERT(data && data->inuse);
7220 if (!data || !data->inuse)
7221 DRV_LOG(ERR, "flow workspace not initialized.");
7226 * Allocate and init new flow workspace.
7228 * @return pointer to flow workspace data, NULL on error.
7230 static struct mlx5_flow_workspace*
7231 flow_alloc_thread_workspace(void)
7233 struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
7236 DRV_LOG(ERR, "Failed to allocate flow workspace "
7240 data->rss_desc.queue = calloc(1,
7241 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
7242 if (!data->rss_desc.queue)
7244 data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
7247 free(data->rss_desc.queue);
7253 * Get new thread specific flow workspace.
7255 * If current workspace inuse, create new one and set as current.
7257 * @return pointer to thread specific flow workspace data, NULL on error.
7259 static struct mlx5_flow_workspace*
7260 mlx5_flow_push_thread_workspace(void)
7262 struct mlx5_flow_workspace *curr;
7263 struct mlx5_flow_workspace *data;
7265 curr = mlx5_flow_os_get_specific_workspace();
7267 data = flow_alloc_thread_workspace();
7270 } else if (!curr->inuse) {
7272 } else if (curr->next) {
7275 data = flow_alloc_thread_workspace();
7283 /* Set as current workspace */
7284 if (mlx5_flow_os_set_specific_workspace(data))
7285 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
7290 * Close current thread specific flow workspace.
7292 * If previous workspace available, set it as current.
7294 * @return pointer to thread specific flow workspace data, NULL on error.
7297 mlx5_flow_pop_thread_workspace(void)
7299 struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
7304 DRV_LOG(ERR, "Failed to close unused flow workspace.");
7310 if (mlx5_flow_os_set_specific_workspace(data->prev))
7311 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
7315 * Verify the flow list is empty
7318 * Pointer to Ethernet device.
7320 * @return the number of flows not released.
7323 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused)
7325 struct mlx5_priv *priv = dev->data->dev_private;
7326 struct rte_flow *flow;
7330 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
7331 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) {
7332 DRV_LOG(DEBUG, "port %u flow %p still referenced",
7333 dev->data->port_id, (void *)flow);
7341 * Enable default hairpin egress flow.
7344 * Pointer to Ethernet device.
7349 * 0 on success, a negative errno value otherwise and rte_errno is set.
7352 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
7355 const struct rte_flow_attr attr = {
7359 struct mlx5_rte_flow_item_tx_queue queue_spec = {
7362 struct mlx5_rte_flow_item_tx_queue queue_mask = {
7363 .queue = UINT32_MAX,
7365 struct rte_flow_item items[] = {
7367 .type = (enum rte_flow_item_type)
7368 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
7369 .spec = &queue_spec,
7371 .mask = &queue_mask,
7374 .type = RTE_FLOW_ITEM_TYPE_END,
7377 struct rte_flow_action_jump jump = {
7378 .group = MLX5_HAIRPIN_TX_TABLE,
7380 struct rte_flow_action actions[2];
7382 struct rte_flow_error error;
7384 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
7385 actions[0].conf = &jump;
7386 actions[1].type = RTE_FLOW_ACTION_TYPE_END;
7387 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7388 &attr, items, actions, false, &error);
7391 "Failed to create ctrl flow: rte_errno(%d),"
7392 " type(%d), message(%s)",
7393 rte_errno, error.type,
7394 error.message ? error.message : " (no stated reason)");
7401 * Enable a control flow configured from the control plane.
7404 * Pointer to Ethernet device.
7406 * An Ethernet flow spec to apply.
7408 * An Ethernet flow mask to apply.
7410 * A VLAN flow spec to apply.
7412 * A VLAN flow mask to apply.
7415 * 0 on success, a negative errno value otherwise and rte_errno is set.
7418 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
7419 struct rte_flow_item_eth *eth_spec,
7420 struct rte_flow_item_eth *eth_mask,
7421 struct rte_flow_item_vlan *vlan_spec,
7422 struct rte_flow_item_vlan *vlan_mask)
7424 struct mlx5_priv *priv = dev->data->dev_private;
7425 const struct rte_flow_attr attr = {
7427 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7429 struct rte_flow_item items[] = {
7431 .type = RTE_FLOW_ITEM_TYPE_ETH,
7437 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
7438 RTE_FLOW_ITEM_TYPE_END,
7444 .type = RTE_FLOW_ITEM_TYPE_END,
7447 uint16_t queue[priv->reta_idx_n];
7448 struct rte_flow_action_rss action_rss = {
7449 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
7451 .types = priv->rss_conf.rss_hf,
7452 .key_len = priv->rss_conf.rss_key_len,
7453 .queue_num = priv->reta_idx_n,
7454 .key = priv->rss_conf.rss_key,
7457 struct rte_flow_action actions[] = {
7459 .type = RTE_FLOW_ACTION_TYPE_RSS,
7460 .conf = &action_rss,
7463 .type = RTE_FLOW_ACTION_TYPE_END,
7467 struct rte_flow_error error;
7470 if (!priv->reta_idx_n || !priv->rxqs_n) {
7473 if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG))
7474 action_rss.types = 0;
7475 for (i = 0; i != priv->reta_idx_n; ++i)
7476 queue[i] = (*priv->reta_idx)[i];
7477 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7478 &attr, items, actions, false, &error);
7485 * Enable a flow control configured from the control plane.
7488 * Pointer to Ethernet device.
7490 * An Ethernet flow spec to apply.
7492 * An Ethernet flow mask to apply.
7495 * 0 on success, a negative errno value otherwise and rte_errno is set.
7498 mlx5_ctrl_flow(struct rte_eth_dev *dev,
7499 struct rte_flow_item_eth *eth_spec,
7500 struct rte_flow_item_eth *eth_mask)
7502 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
7506 * Create default miss flow rule matching lacp traffic
7509 * Pointer to Ethernet device.
7511 * An Ethernet flow spec to apply.
7514 * 0 on success, a negative errno value otherwise and rte_errno is set.
7517 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
7520 * The LACP matching is done by only using ether type since using
7521 * a multicast dst mac causes kernel to give low priority to this flow.
7523 static const struct rte_flow_item_eth lacp_spec = {
7524 .type = RTE_BE16(0x8809),
7526 static const struct rte_flow_item_eth lacp_mask = {
7529 const struct rte_flow_attr attr = {
7532 struct rte_flow_item items[] = {
7534 .type = RTE_FLOW_ITEM_TYPE_ETH,
7539 .type = RTE_FLOW_ITEM_TYPE_END,
7542 struct rte_flow_action actions[] = {
7544 .type = (enum rte_flow_action_type)
7545 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
7548 .type = RTE_FLOW_ACTION_TYPE_END,
7551 struct rte_flow_error error;
7552 uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7553 &attr, items, actions,
7564 * @see rte_flow_destroy()
7568 mlx5_flow_destroy(struct rte_eth_dev *dev,
7569 struct rte_flow *flow,
7570 struct rte_flow_error *error __rte_unused)
7572 struct mlx5_priv *priv = dev->data->dev_private;
7574 if (priv->sh->config.dv_flow_en == 2)
7575 return rte_flow_error_set(error, ENOTSUP,
7576 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7578 "Flow non-Q destruction not supported");
7579 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN,
7580 (uintptr_t)(void *)flow);
7585 * Destroy all flows.
7587 * @see rte_flow_flush()
7591 mlx5_flow_flush(struct rte_eth_dev *dev,
7592 struct rte_flow_error *error __rte_unused)
7594 mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false);
7601 * @see rte_flow_isolate()
7605 mlx5_flow_isolate(struct rte_eth_dev *dev,
7607 struct rte_flow_error *error)
7609 struct mlx5_priv *priv = dev->data->dev_private;
7611 if (dev->data->dev_started) {
7612 rte_flow_error_set(error, EBUSY,
7613 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7615 "port must be stopped first");
7618 priv->isolated = !!enable;
7620 dev->dev_ops = &mlx5_dev_ops_isolate;
7622 dev->dev_ops = &mlx5_dev_ops;
7624 dev->rx_descriptor_status = mlx5_rx_descriptor_status;
7625 dev->tx_descriptor_status = mlx5_tx_descriptor_status;
7633 * @see rte_flow_query()
7637 flow_drv_query(struct rte_eth_dev *dev,
7639 const struct rte_flow_action *actions,
7641 struct rte_flow_error *error)
7643 struct mlx5_priv *priv = dev->data->dev_private;
7644 const struct mlx5_flow_driver_ops *fops;
7645 struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
7647 enum mlx5_flow_drv_type ftype;
7650 return rte_flow_error_set(error, ENOENT,
7651 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7653 "invalid flow handle");
7655 ftype = flow->drv_type;
7656 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
7657 fops = flow_get_drv_ops(ftype);
7659 return fops->query(dev, flow, actions, data, error);
7665 * @see rte_flow_query()
7669 mlx5_flow_query(struct rte_eth_dev *dev,
7670 struct rte_flow *flow,
7671 const struct rte_flow_action *actions,
7673 struct rte_flow_error *error)
7676 struct mlx5_priv *priv = dev->data->dev_private;
7678 if (priv->sh->config.dv_flow_en == 2)
7679 return rte_flow_error_set(error, ENOTSUP,
7680 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7682 "Flow non-Q query not supported");
7683 ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
7691 * Get rte_flow callbacks.
7694 * Pointer to Ethernet device structure.
7696 * Pointer to operation-specific structure.
7701 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
7702 const struct rte_flow_ops **ops)
7704 *ops = &mlx5_flow_ops;
7709 * Validate meter policy actions.
7710 * Dispatcher for action type specific validation.
7713 * Pointer to the Ethernet device structure.
7715 * The meter policy action object to validate.
7717 * Attributes of flow to determine steering domain.
7718 * @param[out] is_rss
7720 * @param[out] domain_bitmap
7722 * @param[out] is_def_policy
7723 * Is default policy or not.
7725 * Perform verbose error reporting if not NULL. Initialized in case of
7729 * 0 on success, otherwise negative errno value.
7732 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
7733 const struct rte_flow_action *actions[RTE_COLORS],
7734 struct rte_flow_attr *attr,
7736 uint8_t *domain_bitmap,
7737 uint8_t *policy_mode,
7738 struct rte_mtr_error *error)
7740 const struct mlx5_flow_driver_ops *fops;
7742 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7743 return fops->validate_mtr_acts(dev, actions, attr, is_rss,
7744 domain_bitmap, policy_mode, error);
7748 * Destroy the meter table set.
7751 * Pointer to Ethernet device.
7752 * @param[in] mtr_policy
7753 * Meter policy struct.
7756 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7757 struct mlx5_flow_meter_policy *mtr_policy)
7759 const struct mlx5_flow_driver_ops *fops;
7761 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7762 fops->destroy_mtr_acts(dev, mtr_policy);
7766 * Create policy action, lock free,
7767 * (mutex should be acquired by caller).
7768 * Dispatcher for action type specific call.
7771 * Pointer to the Ethernet device structure.
7772 * @param[in] mtr_policy
7773 * Meter policy struct.
7775 * Action specification used to create meter actions.
7777 * Perform verbose error reporting if not NULL. Initialized in case of
7781 * 0 on success, otherwise negative errno value.
7784 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7785 struct mlx5_flow_meter_policy *mtr_policy,
7786 const struct rte_flow_action *actions[RTE_COLORS],
7787 struct rte_mtr_error *error)
7789 const struct mlx5_flow_driver_ops *fops;
7791 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7792 return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7796 * Create policy rules, lock free,
7797 * (mutex should be acquired by caller).
7798 * Dispatcher for action type specific call.
7801 * Pointer to the Ethernet device structure.
7802 * @param[in] mtr_policy
7803 * Meter policy struct.
7806 * 0 on success, -1 otherwise.
7809 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7810 struct mlx5_flow_meter_policy *mtr_policy)
7812 const struct mlx5_flow_driver_ops *fops;
7814 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7815 return fops->create_policy_rules(dev, mtr_policy);
7819 * Destroy policy rules, lock free,
7820 * (mutex should be acquired by caller).
7821 * Dispatcher for action type specific call.
7824 * Pointer to the Ethernet device structure.
7825 * @param[in] mtr_policy
7826 * Meter policy struct.
7829 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7830 struct mlx5_flow_meter_policy *mtr_policy)
7832 const struct mlx5_flow_driver_ops *fops;
7834 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7835 fops->destroy_policy_rules(dev, mtr_policy);
7839 * Destroy the default policy table set.
7842 * Pointer to Ethernet device.
7845 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7847 const struct mlx5_flow_driver_ops *fops;
7849 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7850 fops->destroy_def_policy(dev);
7854 * Destroy the default policy table set.
7857 * Pointer to Ethernet device.
7860 * 0 on success, -1 otherwise.
7863 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7865 const struct mlx5_flow_driver_ops *fops;
7867 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7868 return fops->create_def_policy(dev);
7872 * Create the needed meter and suffix tables.
7875 * Pointer to Ethernet device.
7878 * 0 on success, -1 otherwise.
7881 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7882 struct mlx5_flow_meter_info *fm,
7884 uint8_t domain_bitmap)
7886 const struct mlx5_flow_driver_ops *fops;
7888 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7889 return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7893 * Destroy the meter table set.
7896 * Pointer to Ethernet device.
7898 * Pointer to the meter table set.
7901 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7902 struct mlx5_flow_meter_info *fm)
7904 const struct mlx5_flow_driver_ops *fops;
7906 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7907 fops->destroy_mtr_tbls(dev, fm);
7911 * Destroy the global meter drop table.
7914 * Pointer to Ethernet device.
7917 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7919 const struct mlx5_flow_driver_ops *fops;
7921 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7922 fops->destroy_mtr_drop_tbls(dev);
7926 * Destroy the sub policy table with RX queue.
7929 * Pointer to Ethernet device.
7930 * @param[in] mtr_policy
7931 * Pointer to meter policy table.
7934 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
7935 struct mlx5_flow_meter_policy *mtr_policy)
7937 const struct mlx5_flow_driver_ops *fops;
7939 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7940 fops->destroy_sub_policy_with_rxq(dev, mtr_policy);
7944 * Allocate the needed aso flow meter id.
7947 * Pointer to Ethernet device.
7950 * Index to aso flow meter on success, NULL otherwise.
7953 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7955 const struct mlx5_flow_driver_ops *fops;
7957 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7958 return fops->create_meter(dev);
7962 * Free the aso flow meter id.
7965 * Pointer to Ethernet device.
7966 * @param[in] mtr_idx
7967 * Index to aso flow meter to be free.
7973 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7975 const struct mlx5_flow_driver_ops *fops;
7977 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7978 fops->free_meter(dev, mtr_idx);
7982 * Allocate a counter.
7985 * Pointer to Ethernet device structure.
7988 * Index to allocated counter on success, 0 otherwise.
7991 mlx5_counter_alloc(struct rte_eth_dev *dev)
7993 const struct mlx5_flow_driver_ops *fops;
7994 struct rte_flow_attr attr = { .transfer = 0 };
7996 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7997 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7998 return fops->counter_alloc(dev);
8001 "port %u counter allocate is not supported.",
8002 dev->data->port_id);
8010 * Pointer to Ethernet device structure.
8012 * Index to counter to be free.
8015 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
8017 const struct mlx5_flow_driver_ops *fops;
8018 struct rte_flow_attr attr = { .transfer = 0 };
8020 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8021 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8022 fops->counter_free(dev, cnt);
8026 "port %u counter free is not supported.",
8027 dev->data->port_id);
8031 * Query counter statistics.
8034 * Pointer to Ethernet device structure.
8036 * Index to counter to query.
8038 * Set to clear counter statistics.
8040 * The counter hits packets number to save.
8042 * The counter hits bytes number to save.
8045 * 0 on success, a negative errno value otherwise.
8048 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
8049 bool clear, uint64_t *pkts, uint64_t *bytes, void **action)
8051 const struct mlx5_flow_driver_ops *fops;
8052 struct rte_flow_attr attr = { .transfer = 0 };
8054 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8055 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8056 return fops->counter_query(dev, cnt, clear, pkts,
8060 "port %u counter query is not supported.",
8061 dev->data->port_id);
8066 * Get information about HWS pre-configurable resources.
8069 * Pointer to the rte_eth_dev structure.
8070 * @param[out] port_info
8071 * Pointer to port information.
8072 * @param[out] queue_info
8073 * Pointer to queue information.
8075 * Pointer to error structure.
8078 * 0 on success, a negative errno value otherwise and rte_errno is set.
8081 mlx5_flow_info_get(struct rte_eth_dev *dev,
8082 struct rte_flow_port_info *port_info,
8083 struct rte_flow_queue_info *queue_info,
8084 struct rte_flow_error *error)
8086 const struct mlx5_flow_driver_ops *fops;
8088 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8089 return rte_flow_error_set(error, ENOTSUP,
8090 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8092 "info get with incorrect steering mode");
8093 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8094 return fops->info_get(dev, port_info, queue_info, error);
8098 * Configure port HWS resources.
8101 * Pointer to the rte_eth_dev structure.
8102 * @param[in] port_attr
8103 * Port configuration attributes.
8104 * @param[in] nb_queue
8106 * @param[in] queue_attr
8107 * Array that holds attributes for each flow queue.
8109 * Pointer to error structure.
8112 * 0 on success, a negative errno value otherwise and rte_errno is set.
8115 mlx5_flow_port_configure(struct rte_eth_dev *dev,
8116 const struct rte_flow_port_attr *port_attr,
8118 const struct rte_flow_queue_attr *queue_attr[],
8119 struct rte_flow_error *error)
8121 const struct mlx5_flow_driver_ops *fops;
8123 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8124 return rte_flow_error_set(error, ENOTSUP,
8125 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8127 "port configure with incorrect steering mode");
8128 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8129 return fops->configure(dev, port_attr, nb_queue, queue_attr, error);
8133 * Create flow item template.
8136 * Pointer to the rte_eth_dev structure.
8138 * Pointer to the item template attributes.
8140 * The template item pattern.
8142 * Pointer to error structure.
8145 * 0 on success, a negative errno value otherwise and rte_errno is set.
8147 static struct rte_flow_pattern_template *
8148 mlx5_flow_pattern_template_create(struct rte_eth_dev *dev,
8149 const struct rte_flow_pattern_template_attr *attr,
8150 const struct rte_flow_item items[],
8151 struct rte_flow_error *error)
8153 const struct mlx5_flow_driver_ops *fops;
8155 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW) {
8156 rte_flow_error_set(error, ENOTSUP,
8157 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8159 "pattern create with incorrect steering mode");
8162 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8163 return fops->pattern_template_create(dev, attr, items, error);
8167 * Destroy flow item template.
8170 * Pointer to the rte_eth_dev structure.
8171 * @param[in] template
8172 * Pointer to the item template to be destroyed.
8174 * Pointer to error structure.
8177 * 0 on success, a negative errno value otherwise and rte_errno is set.
8180 mlx5_flow_pattern_template_destroy(struct rte_eth_dev *dev,
8181 struct rte_flow_pattern_template *template,
8182 struct rte_flow_error *error)
8184 const struct mlx5_flow_driver_ops *fops;
8186 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8187 return rte_flow_error_set(error, ENOTSUP,
8188 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8190 "pattern destroy with incorrect steering mode");
8191 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8192 return fops->pattern_template_destroy(dev, template, error);
8196 * Create flow item template.
8199 * Pointer to the rte_eth_dev structure.
8201 * Pointer to the action template attributes.
8202 * @param[in] actions
8203 * Associated actions (list terminated by the END action).
8205 * List of actions that marks which of the action's member is constant.
8207 * Pointer to error structure.
8210 * 0 on success, a negative errno value otherwise and rte_errno is set.
8212 static struct rte_flow_actions_template *
8213 mlx5_flow_actions_template_create(struct rte_eth_dev *dev,
8214 const struct rte_flow_actions_template_attr *attr,
8215 const struct rte_flow_action actions[],
8216 const struct rte_flow_action masks[],
8217 struct rte_flow_error *error)
8219 const struct mlx5_flow_driver_ops *fops;
8221 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW) {
8222 rte_flow_error_set(error, ENOTSUP,
8223 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8225 "action create with incorrect steering mode");
8228 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8229 return fops->actions_template_create(dev, attr, actions, masks, error);
8233 * Destroy flow action template.
8236 * Pointer to the rte_eth_dev structure.
8237 * @param[in] template
8238 * Pointer to the action template to be destroyed.
8240 * Pointer to error structure.
8243 * 0 on success, a negative errno value otherwise and rte_errno is set.
8246 mlx5_flow_actions_template_destroy(struct rte_eth_dev *dev,
8247 struct rte_flow_actions_template *template,
8248 struct rte_flow_error *error)
8250 const struct mlx5_flow_driver_ops *fops;
8252 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8253 return rte_flow_error_set(error, ENOTSUP,
8254 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8256 "action destroy with incorrect steering mode");
8257 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8258 return fops->actions_template_destroy(dev, template, error);
8262 * Create flow table.
8265 * Pointer to the rte_eth_dev structure.
8267 * Pointer to the table attributes.
8268 * @param[in] item_templates
8269 * Item template array to be binded to the table.
8270 * @param[in] nb_item_templates
8271 * Number of item template.
8272 * @param[in] action_templates
8273 * Action template array to be binded to the table.
8274 * @param[in] nb_action_templates
8275 * Number of action template.
8277 * Pointer to error structure.
8280 * Table on success, NULL otherwise and rte_errno is set.
8282 static struct rte_flow_template_table *
8283 mlx5_flow_table_create(struct rte_eth_dev *dev,
8284 const struct rte_flow_template_table_attr *attr,
8285 struct rte_flow_pattern_template *item_templates[],
8286 uint8_t nb_item_templates,
8287 struct rte_flow_actions_template *action_templates[],
8288 uint8_t nb_action_templates,
8289 struct rte_flow_error *error)
8291 const struct mlx5_flow_driver_ops *fops;
8293 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW) {
8294 rte_flow_error_set(error, ENOTSUP,
8295 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8297 "table create with incorrect steering mode");
8300 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8301 return fops->template_table_create(dev,
8306 nb_action_templates,
8311 * PMD destroy flow table.
8314 * Pointer to the rte_eth_dev structure.
8316 * Pointer to the table to be destroyed.
8318 * Pointer to error structure.
8321 * 0 on success, a negative errno value otherwise and rte_errno is set.
8324 mlx5_flow_table_destroy(struct rte_eth_dev *dev,
8325 struct rte_flow_template_table *table,
8326 struct rte_flow_error *error)
8328 const struct mlx5_flow_driver_ops *fops;
8330 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8331 return rte_flow_error_set(error, ENOTSUP,
8332 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8334 "table destroy with incorrect steering mode");
8335 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8336 return fops->template_table_destroy(dev, table, error);
8340 * Enqueue flow creation.
8343 * Pointer to the rte_eth_dev structure.
8344 * @param[in] queue_id
8345 * The queue to create the flow.
8347 * Pointer to the flow operation attributes.
8349 * Items with flow spec value.
8350 * @param[in] pattern_template_index
8351 * The item pattern flow follows from the table.
8352 * @param[in] actions
8353 * Action with flow spec value.
8354 * @param[in] action_template_index
8355 * The action pattern flow follows from the table.
8356 * @param[in] user_data
8357 * Pointer to the user_data.
8359 * Pointer to error structure.
8362 * Flow pointer on success, NULL otherwise and rte_errno is set.
8364 static struct rte_flow *
8365 mlx5_flow_async_flow_create(struct rte_eth_dev *dev,
8367 const struct rte_flow_op_attr *attr,
8368 struct rte_flow_template_table *table,
8369 const struct rte_flow_item items[],
8370 uint8_t pattern_template_index,
8371 const struct rte_flow_action actions[],
8372 uint8_t action_template_index,
8374 struct rte_flow_error *error)
8376 const struct mlx5_flow_driver_ops *fops;
8378 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW) {
8379 rte_flow_error_set(error, ENOTSUP,
8380 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8382 "flow_q create with incorrect steering mode");
8385 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8386 return fops->async_flow_create(dev, queue_id, attr, table,
8387 items, pattern_template_index,
8388 actions, action_template_index,
8393 * Enqueue flow destruction.
8396 * Pointer to the rte_eth_dev structure.
8398 * The queue to destroy the flow.
8400 * Pointer to the flow operation attributes.
8402 * Pointer to the flow to be destroyed.
8403 * @param[in] user_data
8404 * Pointer to the user_data.
8406 * Pointer to error structure.
8409 * 0 on success, negative value otherwise and rte_errno is set.
8412 mlx5_flow_async_flow_destroy(struct rte_eth_dev *dev,
8414 const struct rte_flow_op_attr *attr,
8415 struct rte_flow *flow,
8417 struct rte_flow_error *error)
8419 const struct mlx5_flow_driver_ops *fops;
8421 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8422 return rte_flow_error_set(error, ENOTSUP,
8423 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8425 "flow_q destroy with incorrect steering mode");
8426 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8427 return fops->async_flow_destroy(dev, queue, attr, flow,
8432 * Pull the enqueued flows.
8435 * Pointer to the rte_eth_dev structure.
8437 * The queue to pull the result.
8438 * @param[in/out] res
8439 * Array to save the results.
8441 * Available result with the array.
8443 * Pointer to error structure.
8446 * Result number on success, negative value otherwise and rte_errno is set.
8449 mlx5_flow_pull(struct rte_eth_dev *dev,
8451 struct rte_flow_op_result res[],
8453 struct rte_flow_error *error)
8455 const struct mlx5_flow_driver_ops *fops;
8457 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8458 return rte_flow_error_set(error, ENOTSUP,
8459 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8461 "flow_q pull with incorrect steering mode");
8462 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8463 return fops->pull(dev, queue, res, n_res, error);
8467 * Push the enqueued flows.
8470 * Pointer to the rte_eth_dev structure.
8472 * The queue to push the flows.
8474 * Pointer to error structure.
8477 * 0 on success, negative value otherwise and rte_errno is set.
8480 mlx5_flow_push(struct rte_eth_dev *dev,
8482 struct rte_flow_error *error)
8484 const struct mlx5_flow_driver_ops *fops;
8486 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8487 return rte_flow_error_set(error, ENOTSUP,
8488 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8490 "flow_q push with incorrect steering mode");
8491 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8492 return fops->push(dev, queue, error);
8496 * Create shared action.
8499 * Pointer to the rte_eth_dev structure.
8501 * Which queue to be used..
8503 * Operation attribute.
8505 * Indirect action configuration.
8507 * rte_flow action detail.
8508 * @param[in] user_data
8509 * Pointer to the user_data.
8511 * Pointer to error structure.
8514 * Action handle on success, NULL otherwise and rte_errno is set.
8516 static struct rte_flow_action_handle *
8517 mlx5_flow_async_action_handle_create(struct rte_eth_dev *dev, uint32_t queue,
8518 const struct rte_flow_op_attr *attr,
8519 const struct rte_flow_indir_action_conf *conf,
8520 const struct rte_flow_action *action,
8522 struct rte_flow_error *error)
8524 const struct mlx5_flow_driver_ops *fops =
8525 flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8527 return fops->async_action_create(dev, queue, attr, conf, action,
8532 * Update shared action.
8535 * Pointer to the rte_eth_dev structure.
8537 * Which queue to be used..
8539 * Operation attribute.
8541 * Action handle to be updated.
8544 * @param[in] user_data
8545 * Pointer to the user_data.
8547 * Pointer to error structure.
8550 * 0 on success, negative value otherwise and rte_errno is set.
8553 mlx5_flow_async_action_handle_update(struct rte_eth_dev *dev, uint32_t queue,
8554 const struct rte_flow_op_attr *attr,
8555 struct rte_flow_action_handle *handle,
8558 struct rte_flow_error *error)
8560 const struct mlx5_flow_driver_ops *fops =
8561 flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8563 return fops->async_action_update(dev, queue, attr, handle,
8564 update, user_data, error);
8568 * Destroy shared action.
8571 * Pointer to the rte_eth_dev structure.
8573 * Which queue to be used..
8575 * Operation attribute.
8577 * Action handle to be destroyed.
8578 * @param[in] user_data
8579 * Pointer to the user_data.
8581 * Pointer to error structure.
8584 * 0 on success, negative value otherwise and rte_errno is set.
8587 mlx5_flow_async_action_handle_destroy(struct rte_eth_dev *dev, uint32_t queue,
8588 const struct rte_flow_op_attr *attr,
8589 struct rte_flow_action_handle *handle,
8591 struct rte_flow_error *error)
8593 const struct mlx5_flow_driver_ops *fops =
8594 flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8596 return fops->async_action_destroy(dev, queue, attr, handle,
8601 * Allocate a new memory for the counter values wrapped by all the needed
8605 * Pointer to mlx5_dev_ctx_shared object.
8608 * 0 on success, a negative errno value otherwise.
8611 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
8613 struct mlx5_counter_stats_mem_mng *mem_mng;
8614 volatile struct flow_counter_stats *raw_data;
8615 int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
8616 int size = (sizeof(struct flow_counter_stats) *
8617 MLX5_COUNTERS_PER_POOL +
8618 sizeof(struct mlx5_counter_stats_raw)) * raws_n +
8619 sizeof(struct mlx5_counter_stats_mem_mng);
8620 size_t pgsize = rte_mem_page_size();
8625 if (pgsize == (size_t)-1) {
8626 DRV_LOG(ERR, "Failed to get mem page size");
8630 mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
8635 mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
8636 size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
8637 ret = mlx5_os_wrapped_mkey_create(sh->cdev->ctx, sh->cdev->pd,
8638 sh->cdev->pdn, mem, size,
8645 mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
8646 raw_data = (volatile struct flow_counter_stats *)mem;
8647 for (i = 0; i < raws_n; ++i) {
8648 mem_mng->raws[i].mem_mng = mem_mng;
8649 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
8651 for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
8652 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
8653 mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
8655 LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
8656 sh->cmng.mem_mng = mem_mng;
8661 * Set the statistic memory to the new counter pool.
8664 * Pointer to mlx5_dev_ctx_shared object.
8666 * Pointer to the pool to set the statistic memory.
8669 * 0 on success, a negative errno value otherwise.
8672 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
8673 struct mlx5_flow_counter_pool *pool)
8675 struct mlx5_flow_counter_mng *cmng = &sh->cmng;
8676 /* Resize statistic memory once used out. */
8677 if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
8678 mlx5_flow_create_counter_stat_mem_mng(sh)) {
8679 DRV_LOG(ERR, "Cannot resize counter stat mem.");
8682 rte_spinlock_lock(&pool->sl);
8683 pool->raw = cmng->mem_mng->raws + pool->index %
8684 MLX5_CNT_CONTAINER_RESIZE;
8685 rte_spinlock_unlock(&pool->sl);
8686 pool->raw_hw = NULL;
8690 #define MLX5_POOL_QUERY_FREQ_US 1000000
8693 * Set the periodic procedure for triggering asynchronous batch queries for all
8694 * the counter pools.
8697 * Pointer to mlx5_dev_ctx_shared object.
8700 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
8702 uint32_t pools_n, us;
8704 pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
8705 us = MLX5_POOL_QUERY_FREQ_US / pools_n;
8706 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
8707 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
8708 sh->cmng.query_thread_on = 0;
8709 DRV_LOG(ERR, "Cannot reinitialize query alarm");
8711 sh->cmng.query_thread_on = 1;
8716 * The periodic procedure for triggering asynchronous batch queries for all the
8717 * counter pools. This function is probably called by the host thread.
8720 * The parameter for the alarm process.
8723 mlx5_flow_query_alarm(void *arg)
8725 struct mlx5_dev_ctx_shared *sh = arg;
8727 uint16_t pool_index = sh->cmng.pool_index;
8728 struct mlx5_flow_counter_mng *cmng = &sh->cmng;
8729 struct mlx5_flow_counter_pool *pool;
8732 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
8734 rte_spinlock_lock(&cmng->pool_update_sl);
8735 pool = cmng->pools[pool_index];
8736 n_valid = cmng->n_valid;
8737 rte_spinlock_unlock(&cmng->pool_update_sl);
8738 /* Set the statistic memory to the new created pool. */
8739 if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
8742 /* There is a pool query in progress. */
8745 LIST_FIRST(&sh->cmng.free_stat_raws);
8747 /* No free counter statistics raw memory. */
8750 * Identify the counters released between query trigger and query
8751 * handle more efficiently. The counter released in this gap period
8752 * should wait for a new round of query as the new arrived packets
8753 * will not be taken into account.
8756 ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
8757 MLX5_COUNTERS_PER_POOL,
8759 pool->raw_hw->mem_mng->wm.lkey,
8763 (uint64_t)(uintptr_t)pool);
8765 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
8766 " %d", pool->min_dcs->id);
8767 pool->raw_hw = NULL;
8770 LIST_REMOVE(pool->raw_hw, next);
8771 sh->cmng.pending_queries++;
8773 if (pool_index >= n_valid)
8776 sh->cmng.pool_index = pool_index;
8777 mlx5_set_query_alarm(sh);
8781 * Check and callback event for new aged flow in the counter pool
8784 * Pointer to mlx5_dev_ctx_shared object.
8786 * Pointer to Current counter pool.
8789 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
8790 struct mlx5_flow_counter_pool *pool)
8792 struct mlx5_priv *priv;
8793 struct mlx5_flow_counter *cnt;
8794 struct mlx5_age_info *age_info;
8795 struct mlx5_age_param *age_param;
8796 struct mlx5_counter_stats_raw *cur = pool->raw_hw;
8797 struct mlx5_counter_stats_raw *prev = pool->raw;
8798 const uint64_t curr_time = MLX5_CURR_TIME_SEC;
8799 const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
8800 uint16_t expected = AGE_CANDIDATE;
8803 pool->time_of_last_age_check = curr_time;
8804 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
8805 cnt = MLX5_POOL_GET_CNT(pool, i);
8806 age_param = MLX5_CNT_TO_AGE(cnt);
8807 if (__atomic_load_n(&age_param->state,
8808 __ATOMIC_RELAXED) != AGE_CANDIDATE)
8810 if (cur->data[i].hits != prev->data[i].hits) {
8811 __atomic_store_n(&age_param->sec_since_last_hit, 0,
8815 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
8817 __ATOMIC_RELAXED) <= age_param->timeout)
8820 * Hold the lock first, or if between the
8821 * state AGE_TMOUT and tailq operation the
8822 * release happened, the release procedure
8823 * may delete a non-existent tailq node.
8825 priv = rte_eth_devices[age_param->port_id].data->dev_private;
8826 age_info = GET_PORT_AGE_INFO(priv);
8827 rte_spinlock_lock(&age_info->aged_sl);
8828 if (__atomic_compare_exchange_n(&age_param->state, &expected,
8831 __ATOMIC_RELAXED)) {
8832 TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
8833 MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
8835 rte_spinlock_unlock(&age_info->aged_sl);
8837 mlx5_age_event_prepare(sh);
8841 * Handler for the HW respond about ready values from an asynchronous batch
8842 * query. This function is probably called by the host thread.
8845 * The pointer to the shared device context.
8846 * @param[in] async_id
8847 * The Devx async ID.
8849 * The status of the completion.
8852 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
8853 uint64_t async_id, int status)
8855 struct mlx5_flow_counter_pool *pool =
8856 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
8857 struct mlx5_counter_stats_raw *raw_to_free;
8858 uint8_t query_gen = pool->query_gen ^ 1;
8859 struct mlx5_flow_counter_mng *cmng = &sh->cmng;
8860 enum mlx5_counter_type cnt_type =
8861 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
8862 MLX5_COUNTER_TYPE_ORIGIN;
8864 if (unlikely(status)) {
8865 raw_to_free = pool->raw_hw;
8867 raw_to_free = pool->raw;
8869 mlx5_flow_aging_check(sh, pool);
8870 rte_spinlock_lock(&pool->sl);
8871 pool->raw = pool->raw_hw;
8872 rte_spinlock_unlock(&pool->sl);
8873 /* Be sure the new raw counters data is updated in memory. */
8875 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
8876 rte_spinlock_lock(&cmng->csl[cnt_type]);
8877 TAILQ_CONCAT(&cmng->counters[cnt_type],
8878 &pool->counters[query_gen], next);
8879 rte_spinlock_unlock(&cmng->csl[cnt_type]);
8882 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
8883 pool->raw_hw = NULL;
8884 sh->cmng.pending_queries--;
8888 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
8889 const struct flow_grp_info *grp_info,
8890 struct rte_flow_error *error)
8892 if (grp_info->transfer && grp_info->external &&
8893 grp_info->fdb_def_rule) {
8894 if (group == UINT32_MAX)
8895 return rte_flow_error_set
8897 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8899 "group index not supported");
8904 DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
8909 * Translate the rte_flow group index to HW table value.
8911 * If tunnel offload is disabled, all group ids converted to flow table
8912 * id using the standard method.
8913 * If tunnel offload is enabled, group id can be converted using the
8914 * standard or tunnel conversion method. Group conversion method
8915 * selection depends on flags in `grp_info` parameter:
8916 * - Internal (grp_info.external == 0) groups conversion uses the
8918 * - Group ids in JUMP action converted with the tunnel conversion.
8919 * - Group id in rule attribute conversion depends on a rule type and
8921 * ** non zero group attributes converted with the tunnel method
8922 * ** zero group attribute in non-tunnel rule is converted using the
8923 * standard method - there's only one root table
8924 * ** zero group attribute in steer tunnel rule is converted with the
8925 * standard method - single root table
8926 * ** zero group attribute in match tunnel rule is a special OvS
8927 * case: that value is used for portability reasons. That group
8928 * id is converted with the tunnel conversion method.
8933 * PMD tunnel offload object
8935 * rte_flow group index value.
8938 * @param[in] grp_info
8939 * flags used for conversion
8941 * Pointer to error structure.
8944 * 0 on success, a negative errno value otherwise and rte_errno is set.
8947 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
8948 const struct mlx5_flow_tunnel *tunnel,
8949 uint32_t group, uint32_t *table,
8950 const struct flow_grp_info *grp_info,
8951 struct rte_flow_error *error)
8954 bool standard_translation;
8956 if (!grp_info->skip_scale && grp_info->external &&
8957 group < MLX5_MAX_TABLES_EXTERNAL)
8958 group *= MLX5_FLOW_TABLE_FACTOR;
8959 if (is_tunnel_offload_active(dev)) {
8960 standard_translation = !grp_info->external ||
8961 grp_info->std_tbl_fix;
8963 standard_translation = true;
8966 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
8967 dev->data->port_id, group, grp_info->transfer,
8968 grp_info->external, grp_info->fdb_def_rule,
8969 standard_translation ? "STANDARD" : "TUNNEL");
8970 if (standard_translation)
8971 ret = flow_group_to_table(dev->data->port_id, group, table,
8974 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
8981 * Discover availability of metadata reg_c's.
8983 * Iteratively use test flows to check availability.
8986 * Pointer to the Ethernet device structure.
8989 * 0 on success, a negative errno value otherwise and rte_errno is set.
8992 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
8994 struct mlx5_priv *priv = dev->data->dev_private;
8995 enum modify_reg idx;
8998 /* reg_c[0] and reg_c[1] are reserved. */
8999 priv->sh->flow_mreg_c[n++] = REG_C_0;
9000 priv->sh->flow_mreg_c[n++] = REG_C_1;
9001 /* Discover availability of other reg_c's. */
9002 for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
9003 struct rte_flow_attr attr = {
9004 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
9005 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
9008 struct rte_flow_item items[] = {
9010 .type = RTE_FLOW_ITEM_TYPE_END,
9013 struct rte_flow_action actions[] = {
9015 .type = (enum rte_flow_action_type)
9016 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
9017 .conf = &(struct mlx5_flow_action_copy_mreg){
9023 .type = RTE_FLOW_ACTION_TYPE_JUMP,
9024 .conf = &(struct rte_flow_action_jump){
9025 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
9029 .type = RTE_FLOW_ACTION_TYPE_END,
9033 struct rte_flow *flow;
9034 struct rte_flow_error error;
9036 if (!priv->sh->config.dv_flow_en)
9038 /* Create internal flow, validation skips copy action. */
9039 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr,
9040 items, actions, false, &error);
9041 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
9045 priv->sh->flow_mreg_c[n++] = idx;
9046 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx);
9048 for (; n < MLX5_MREG_C_NUM; ++n)
9049 priv->sh->flow_mreg_c[n] = REG_NON;
9050 priv->sh->metadata_regc_check_flag = 1;
9055 save_dump_file(const uint8_t *data, uint32_t size,
9056 uint32_t type, uint64_t id, void *arg, FILE *file)
9058 char line[BUF_SIZE];
9061 uint32_t actions_num;
9062 struct rte_flow_query_count *count;
9064 memset(line, 0, BUF_SIZE);
9066 case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR:
9067 actions_num = *(uint32_t *)(arg);
9068 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",%d,",
9069 type, id, actions_num);
9071 case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT:
9072 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",",
9075 case DR_DUMP_REC_TYPE_PMD_COUNTER:
9076 count = (struct rte_flow_query_count *)arg;
9078 "%d,0x%" PRIx64 ",%" PRIu64 ",%" PRIu64 "\n",
9079 type, id, count->hits, count->bytes);
9085 for (k = 0; k < size; k++) {
9086 /* Make sure we do not overrun the line buffer length. */
9087 if (out >= BUF_SIZE - 4) {
9091 out += snprintf(line + out, BUF_SIZE - out, "%02x",
9094 fprintf(file, "%s\n", line);
9099 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow,
9100 struct rte_flow_query_count *count, struct rte_flow_error *error)
9102 struct rte_flow_action action[2];
9103 enum mlx5_flow_drv_type ftype;
9104 const struct mlx5_flow_driver_ops *fops;
9107 return rte_flow_error_set(error, ENOENT,
9108 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9110 "invalid flow handle");
9112 action[0].type = RTE_FLOW_ACTION_TYPE_COUNT;
9113 action[1].type = RTE_FLOW_ACTION_TYPE_END;
9114 if (flow->counter) {
9115 memset(count, 0, sizeof(struct rte_flow_query_count));
9116 ftype = (enum mlx5_flow_drv_type)(flow->drv_type);
9117 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN &&
9118 ftype < MLX5_FLOW_TYPE_MAX);
9119 fops = flow_get_drv_ops(ftype);
9120 return fops->query(dev, flow, action, count, error);
9125 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
9127 * Dump flow ipool data to file
9130 * The pointer to Ethernet device.
9132 * A pointer to a file for output.
9134 * Perform verbose error reporting if not NULL. PMDs initialize this
9135 * structure in case of error only.
9137 * 0 on success, a negative value otherwise.
9140 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev,
9141 struct rte_flow *flow, FILE *file,
9142 struct rte_flow_error *error)
9144 struct mlx5_priv *priv = dev->data->dev_private;
9145 struct mlx5_flow_dv_modify_hdr_resource *modify_hdr;
9146 struct mlx5_flow_dv_encap_decap_resource *encap_decap;
9147 uint32_t handle_idx;
9148 struct mlx5_flow_handle *dh;
9149 struct rte_flow_query_count count;
9150 uint32_t actions_num;
9151 const uint8_t *data;
9155 void *action = NULL;
9158 return rte_flow_error_set(error, ENOENT,
9159 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9161 "invalid flow handle");
9163 handle_idx = flow->dev_handles;
9165 if (flow->counter &&
9166 (!mlx5_counter_query(dev, flow->counter, false,
9167 &count.hits, &count.bytes, &action)) && action) {
9168 id = (uint64_t)(uintptr_t)action;
9169 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
9170 save_dump_file(NULL, 0, type,
9171 id, (void *)&count, file);
9174 while (handle_idx) {
9175 dh = mlx5_ipool_get(priv->sh->ipool
9176 [MLX5_IPOOL_MLX5_FLOW], handle_idx);
9179 handle_idx = dh->next.next;
9181 /* Get modify_hdr and encap_decap buf from ipools. */
9183 modify_hdr = dh->dvh.modify_hdr;
9185 if (dh->dvh.rix_encap_decap) {
9186 encap_decap = mlx5_ipool_get(priv->sh->ipool
9187 [MLX5_IPOOL_DECAP_ENCAP],
9188 dh->dvh.rix_encap_decap);
9191 data = (const uint8_t *)modify_hdr->actions;
9192 size = (size_t)(modify_hdr->actions_num) * 8;
9193 id = (uint64_t)(uintptr_t)modify_hdr->action;
9194 actions_num = modify_hdr->actions_num;
9195 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
9196 save_dump_file(data, size, type, id,
9197 (void *)(&actions_num), file);
9200 data = encap_decap->buf;
9201 size = encap_decap->size;
9202 id = (uint64_t)(uintptr_t)encap_decap->action;
9203 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
9204 save_dump_file(data, size, type,
9212 * Dump all flow's encap_decap/modify_hdr/counter data to file
9215 * The pointer to Ethernet device.
9217 * A pointer to a file for output.
9219 * Perform verbose error reporting if not NULL. PMDs initialize this
9220 * structure in case of error only.
9222 * 0 on success, a negative value otherwise.
9225 mlx5_flow_dev_dump_sh_all(struct rte_eth_dev *dev,
9226 FILE *file, struct rte_flow_error *error __rte_unused)
9228 struct mlx5_priv *priv = dev->data->dev_private;
9229 struct mlx5_dev_ctx_shared *sh = priv->sh;
9230 struct mlx5_hlist *h;
9231 struct mlx5_flow_dv_modify_hdr_resource *modify_hdr;
9232 struct mlx5_flow_dv_encap_decap_resource *encap_decap;
9233 struct rte_flow_query_count count;
9234 uint32_t actions_num;
9235 const uint8_t *data;
9241 struct mlx5_list_inconst *l_inconst;
9242 struct mlx5_list_entry *e;
9244 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
9248 /* encap_decap hlist is lcore_share, get global core cache. */
9249 i = MLX5_LIST_GLOBAL;
9250 h = sh->encaps_decaps;
9252 for (j = 0; j <= h->mask; j++) {
9253 l_inconst = &h->buckets[j].l;
9254 if (!l_inconst || !l_inconst->cache[i])
9257 e = LIST_FIRST(&l_inconst->cache[i]->h);
9260 (struct mlx5_flow_dv_encap_decap_resource *)e;
9261 data = encap_decap->buf;
9262 size = encap_decap->size;
9263 id = (uint64_t)(uintptr_t)encap_decap->action;
9264 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
9265 save_dump_file(data, size, type,
9267 e = LIST_NEXT(e, next);
9272 /* get modify_hdr */
9273 h = sh->modify_cmds;
9275 lcore_index = rte_lcore_index(rte_lcore_id());
9276 if (unlikely(lcore_index == -1)) {
9277 lcore_index = MLX5_LIST_NLCORE;
9278 rte_spinlock_lock(&h->l_const.lcore_lock);
9282 for (j = 0; j <= h->mask; j++) {
9283 l_inconst = &h->buckets[j].l;
9284 if (!l_inconst || !l_inconst->cache[i])
9287 e = LIST_FIRST(&l_inconst->cache[i]->h);
9290 (struct mlx5_flow_dv_modify_hdr_resource *)e;
9291 data = (const uint8_t *)modify_hdr->actions;
9292 size = (size_t)(modify_hdr->actions_num) * 8;
9293 actions_num = modify_hdr->actions_num;
9294 id = (uint64_t)(uintptr_t)modify_hdr->action;
9295 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
9296 save_dump_file(data, size, type, id,
9297 (void *)(&actions_num), file);
9298 e = LIST_NEXT(e, next);
9302 if (unlikely(lcore_index == MLX5_LIST_NLCORE))
9303 rte_spinlock_unlock(&h->l_const.lcore_lock);
9307 MLX5_ASSERT(cmng->n_valid <= cmng->n);
9308 max = MLX5_COUNTERS_PER_POOL * cmng->n_valid;
9309 for (j = 1; j <= max; j++) {
9311 if ((!mlx5_counter_query(dev, j, false, &count.hits,
9312 &count.bytes, &action)) && action) {
9313 id = (uint64_t)(uintptr_t)action;
9314 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
9315 save_dump_file(NULL, 0, type,
9316 id, (void *)&count, file);
9324 * Dump flow raw hw data to file
9327 * The pointer to Ethernet device.
9329 * A pointer to a file for output.
9331 * Perform verbose error reporting if not NULL. PMDs initialize this
9332 * structure in case of error only.
9334 * 0 on success, a negative value otherwise.
9337 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
9339 struct rte_flow_error *error __rte_unused)
9341 struct mlx5_priv *priv = dev->data->dev_private;
9342 struct mlx5_dev_ctx_shared *sh = priv->sh;
9343 uint32_t handle_idx;
9345 struct mlx5_flow_handle *dh;
9346 struct rte_flow *flow;
9348 if (!sh->config.dv_flow_en) {
9349 if (fputs("device dv flow disabled\n", file) <= 0)
9356 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
9357 if (mlx5_flow_dev_dump_sh_all(dev, file, error))
9360 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
9362 sh->tx_domain, file);
9365 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
9366 (uintptr_t)(void *)flow_idx);
9370 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
9371 mlx5_flow_dev_dump_ipool(dev, flow, file, error);
9373 handle_idx = flow->dev_handles;
9374 while (handle_idx) {
9375 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
9380 ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
9385 handle_idx = dh->next.next;
9391 * Get aged-out flows.
9394 * Pointer to the Ethernet device structure.
9395 * @param[in] context
9396 * The address of an array of pointers to the aged-out flows contexts.
9397 * @param[in] nb_countexts
9398 * The length of context array pointers.
9400 * Perform verbose error reporting if not NULL. Initialized in case of
9404 * how many contexts get in success, otherwise negative errno value.
9405 * if nb_contexts is 0, return the amount of all aged contexts.
9406 * if nb_contexts is not 0 , return the amount of aged flows reported
9407 * in the context array.
9410 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
9411 uint32_t nb_contexts, struct rte_flow_error *error)
9413 const struct mlx5_flow_driver_ops *fops;
9414 struct rte_flow_attr attr = { .transfer = 0 };
9416 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
9417 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
9418 return fops->get_aged_flows(dev, contexts, nb_contexts,
9422 "port %u get aged flows is not supported.",
9423 dev->data->port_id);
9427 /* Wrapper for driver action_validate op callback */
9429 flow_drv_action_validate(struct rte_eth_dev *dev,
9430 const struct rte_flow_indir_action_conf *conf,
9431 const struct rte_flow_action *action,
9432 const struct mlx5_flow_driver_ops *fops,
9433 struct rte_flow_error *error)
9435 static const char err_msg[] = "indirect action validation unsupported";
9437 if (!fops->action_validate) {
9438 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9439 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9443 return fops->action_validate(dev, conf, action, error);
9447 * Destroys the shared action by handle.
9450 * Pointer to Ethernet device structure.
9452 * Handle for the indirect action object to be destroyed.
9454 * Perform verbose error reporting if not NULL. PMDs initialize this
9455 * structure in case of error only.
9458 * 0 on success, a negative errno value otherwise and rte_errno is set.
9460 * @note: wrapper for driver action_create op callback.
9463 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
9464 struct rte_flow_action_handle *handle,
9465 struct rte_flow_error *error)
9467 static const char err_msg[] = "indirect action destruction unsupported";
9468 struct rte_flow_attr attr = { .transfer = 0 };
9469 const struct mlx5_flow_driver_ops *fops =
9470 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9472 if (!fops->action_destroy) {
9473 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9474 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9478 return fops->action_destroy(dev, handle, error);
9481 /* Wrapper for driver action_destroy op callback */
9483 flow_drv_action_update(struct rte_eth_dev *dev,
9484 struct rte_flow_action_handle *handle,
9486 const struct mlx5_flow_driver_ops *fops,
9487 struct rte_flow_error *error)
9489 static const char err_msg[] = "indirect action update unsupported";
9491 if (!fops->action_update) {
9492 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9493 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9497 return fops->action_update(dev, handle, update, error);
9500 /* Wrapper for driver action_destroy op callback */
9502 flow_drv_action_query(struct rte_eth_dev *dev,
9503 const struct rte_flow_action_handle *handle,
9505 const struct mlx5_flow_driver_ops *fops,
9506 struct rte_flow_error *error)
9508 static const char err_msg[] = "indirect action query unsupported";
9510 if (!fops->action_query) {
9511 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9512 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9516 return fops->action_query(dev, handle, data, error);
9520 * Create indirect action for reuse in multiple flow rules.
9523 * Pointer to Ethernet device structure.
9525 * Pointer to indirect action object configuration.
9527 * Action configuration for indirect action object creation.
9529 * Perform verbose error reporting if not NULL. PMDs initialize this
9530 * structure in case of error only.
9532 * A valid handle in case of success, NULL otherwise and rte_errno is set.
9534 static struct rte_flow_action_handle *
9535 mlx5_action_handle_create(struct rte_eth_dev *dev,
9536 const struct rte_flow_indir_action_conf *conf,
9537 const struct rte_flow_action *action,
9538 struct rte_flow_error *error)
9540 static const char err_msg[] = "indirect action creation unsupported";
9541 struct rte_flow_attr attr = { .transfer = 0 };
9542 const struct mlx5_flow_driver_ops *fops =
9543 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9545 if (flow_drv_action_validate(dev, conf, action, fops, error))
9547 if (!fops->action_create) {
9548 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9549 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9553 return fops->action_create(dev, conf, action, error);
9557 * Updates inplace the indirect action configuration pointed by *handle*
9558 * with the configuration provided as *update* argument.
9559 * The update of the indirect action configuration effects all flow rules
9560 * reusing the action via handle.
9563 * Pointer to Ethernet device structure.
9565 * Handle for the indirect action to be updated.
9567 * Action specification used to modify the action pointed by handle.
9568 * *update* could be of same type with the action pointed by the *handle*
9569 * handle argument, or some other structures like a wrapper, depending on
9570 * the indirect action type.
9572 * Perform verbose error reporting if not NULL. PMDs initialize this
9573 * structure in case of error only.
9576 * 0 on success, a negative errno value otherwise and rte_errno is set.
9579 mlx5_action_handle_update(struct rte_eth_dev *dev,
9580 struct rte_flow_action_handle *handle,
9582 struct rte_flow_error *error)
9584 struct rte_flow_attr attr = { .transfer = 0 };
9585 const struct mlx5_flow_driver_ops *fops =
9586 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9589 ret = flow_drv_action_validate(dev, NULL,
9590 (const struct rte_flow_action *)update, fops, error);
9593 return flow_drv_action_update(dev, handle, update, fops,
9598 * Query the indirect action by handle.
9600 * This function allows retrieving action-specific data such as counters.
9601 * Data is gathered by special action which may be present/referenced in
9602 * more than one flow rule definition.
9604 * see @RTE_FLOW_ACTION_TYPE_COUNT
9607 * Pointer to Ethernet device structure.
9609 * Handle for the indirect action to query.
9610 * @param[in, out] data
9611 * Pointer to storage for the associated query data type.
9613 * Perform verbose error reporting if not NULL. PMDs initialize this
9614 * structure in case of error only.
9617 * 0 on success, a negative errno value otherwise and rte_errno is set.
9620 mlx5_action_handle_query(struct rte_eth_dev *dev,
9621 const struct rte_flow_action_handle *handle,
9623 struct rte_flow_error *error)
9625 struct rte_flow_attr attr = { .transfer = 0 };
9626 const struct mlx5_flow_driver_ops *fops =
9627 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9629 return flow_drv_action_query(dev, handle, data, fops, error);
9633 * Destroy all indirect actions (shared RSS).
9636 * Pointer to Ethernet device.
9639 * 0 on success, a negative errno value otherwise and rte_errno is set.
9642 mlx5_action_handle_flush(struct rte_eth_dev *dev)
9644 struct rte_flow_error error;
9645 struct mlx5_priv *priv = dev->data->dev_private;
9646 struct mlx5_shared_action_rss *shared_rss;
9650 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
9651 priv->rss_shared_actions, idx, shared_rss, next) {
9652 ret |= mlx5_action_handle_destroy(dev,
9653 (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
9659 * Validate existing indirect actions against current device configuration
9660 * and attach them to device resources.
9663 * Pointer to Ethernet device.
9666 * 0 on success, a negative errno value otherwise and rte_errno is set.
9669 mlx5_action_handle_attach(struct rte_eth_dev *dev)
9671 struct mlx5_priv *priv = dev->data->dev_private;
9673 struct mlx5_ind_table_obj *ind_tbl, *ind_tbl_last;
9675 LIST_FOREACH(ind_tbl, &priv->standalone_ind_tbls, next) {
9676 const char *message;
9679 ret = mlx5_validate_rss_queues(dev, ind_tbl->queues,
9681 &message, &queue_idx);
9683 DRV_LOG(ERR, "Port %u cannot use queue %u in RSS: %s",
9684 dev->data->port_id, ind_tbl->queues[queue_idx],
9691 LIST_FOREACH(ind_tbl, &priv->standalone_ind_tbls, next) {
9692 ret = mlx5_ind_table_obj_attach(dev, ind_tbl);
9694 DRV_LOG(ERR, "Port %u could not attach "
9695 "indirection table obj %p",
9696 dev->data->port_id, (void *)ind_tbl);
9703 ind_tbl_last = ind_tbl;
9704 LIST_FOREACH(ind_tbl, &priv->standalone_ind_tbls, next) {
9705 if (ind_tbl == ind_tbl_last)
9707 if (mlx5_ind_table_obj_detach(dev, ind_tbl) != 0)
9708 DRV_LOG(CRIT, "Port %u could not detach "
9709 "indirection table obj %p on rollback",
9710 dev->data->port_id, (void *)ind_tbl);
9716 * Detach indirect actions of the device from its resources.
9719 * Pointer to Ethernet device.
9722 * 0 on success, a negative errno value otherwise and rte_errno is set.
9725 mlx5_action_handle_detach(struct rte_eth_dev *dev)
9727 struct mlx5_priv *priv = dev->data->dev_private;
9729 struct mlx5_ind_table_obj *ind_tbl, *ind_tbl_last;
9731 LIST_FOREACH(ind_tbl, &priv->standalone_ind_tbls, next) {
9732 ret = mlx5_ind_table_obj_detach(dev, ind_tbl);
9734 DRV_LOG(ERR, "Port %u could not detach "
9735 "indirection table obj %p",
9736 dev->data->port_id, (void *)ind_tbl);
9742 ind_tbl_last = ind_tbl;
9743 LIST_FOREACH(ind_tbl, &priv->standalone_ind_tbls, next) {
9744 if (ind_tbl == ind_tbl_last)
9746 if (mlx5_ind_table_obj_attach(dev, ind_tbl) != 0)
9747 DRV_LOG(CRIT, "Port %u could not attach "
9748 "indirection table obj %p on rollback",
9749 dev->data->port_id, (void *)ind_tbl);
9754 #ifndef HAVE_MLX5DV_DR
9755 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
9757 #define MLX5_DOMAIN_SYNC_FLOW \
9758 (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
9761 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
9763 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
9764 const struct mlx5_flow_driver_ops *fops;
9766 struct rte_flow_attr attr = { .transfer = 0 };
9768 fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9769 ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
9775 const struct mlx5_flow_tunnel *
9776 mlx5_get_tof(const struct rte_flow_item *item,
9777 const struct rte_flow_action *action,
9778 enum mlx5_tof_rule_type *rule_type)
9780 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
9781 if (item->type == (typeof(item->type))
9782 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) {
9783 *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE;
9784 return flow_items_to_tunnel(item);
9787 for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) {
9788 if (action->type == (typeof(action->type))
9789 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) {
9790 *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE;
9791 return flow_actions_to_tunnel(action);
9798 * tunnel offload functionality is defined for DV environment only
9800 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
9802 union tunnel_offload_mark {
9805 uint32_t app_reserve:8;
9806 uint32_t table_id:15;
9807 uint32_t transfer:1;
9808 uint32_t _unused_:8;
9813 mlx5_access_tunnel_offload_db
9814 (struct rte_eth_dev *dev,
9815 bool (*match)(struct rte_eth_dev *,
9816 struct mlx5_flow_tunnel *, const void *),
9817 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
9818 void (*miss)(struct rte_eth_dev *, void *),
9819 void *ctx, bool lock_op);
9822 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
9823 struct rte_flow *flow,
9824 const struct rte_flow_attr *attr,
9825 const struct rte_flow_action *app_actions,
9827 const struct mlx5_flow_tunnel *tunnel,
9828 struct tunnel_default_miss_ctx *ctx,
9829 struct rte_flow_error *error)
9831 struct mlx5_priv *priv = dev->data->dev_private;
9832 struct mlx5_flow *dev_flow;
9833 struct rte_flow_attr miss_attr = *attr;
9834 const struct rte_flow_item miss_items[2] = {
9836 .type = RTE_FLOW_ITEM_TYPE_ETH,
9842 .type = RTE_FLOW_ITEM_TYPE_END,
9848 union tunnel_offload_mark mark_id;
9849 struct rte_flow_action_mark miss_mark;
9850 struct rte_flow_action miss_actions[3] = {
9851 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
9852 [2] = { .type = RTE_FLOW_ACTION_TYPE_END, .conf = NULL }
9854 const struct rte_flow_action_jump *jump_data;
9855 uint32_t i, flow_table = 0; /* prevent compilation warning */
9856 struct flow_grp_info grp_info = {
9858 .transfer = attr->transfer,
9859 .fdb_def_rule = !!priv->fdb_def_rule,
9864 if (!attr->transfer) {
9867 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
9868 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
9869 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
9872 return rte_flow_error_set
9874 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9875 NULL, "invalid default miss RSS");
9876 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
9877 ctx->action_rss.level = 0,
9878 ctx->action_rss.types = priv->rss_conf.rss_hf,
9879 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
9880 ctx->action_rss.queue_num = priv->reta_idx_n,
9881 ctx->action_rss.key = priv->rss_conf.rss_key,
9882 ctx->action_rss.queue = ctx->queue;
9883 if (!priv->reta_idx_n || !priv->rxqs_n)
9884 return rte_flow_error_set
9886 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9887 NULL, "invalid port configuration");
9888 if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG))
9889 ctx->action_rss.types = 0;
9890 for (i = 0; i != priv->reta_idx_n; ++i)
9891 ctx->queue[i] = (*priv->reta_idx)[i];
9893 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
9894 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
9896 miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
9897 for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
9898 jump_data = app_actions->conf;
9899 miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
9900 miss_attr.group = jump_data->group;
9901 ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
9902 &flow_table, &grp_info, error);
9904 return rte_flow_error_set(error, EINVAL,
9905 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9906 NULL, "invalid tunnel id");
9907 mark_id.app_reserve = 0;
9908 mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
9909 mark_id.transfer = !!attr->transfer;
9910 mark_id._unused_ = 0;
9911 miss_mark.id = mark_id.val;
9912 dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
9913 miss_items, miss_actions, flow_idx, error);
9916 dev_flow->flow = flow;
9917 dev_flow->external = true;
9918 dev_flow->tunnel = tunnel;
9919 dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE;
9920 /* Subflow object was created, we must include one in the list. */
9921 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
9922 dev_flow->handle, next);
9924 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
9925 dev->data->port_id, tunnel->app_tunnel.type,
9926 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
9927 ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
9928 miss_actions, error);
9930 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
9936 static const struct mlx5_flow_tbl_data_entry *
9937 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
9939 struct mlx5_priv *priv = dev->data->dev_private;
9940 struct mlx5_dev_ctx_shared *sh = priv->sh;
9941 struct mlx5_list_entry *he;
9942 union tunnel_offload_mark mbits = { .val = mark };
9943 union mlx5_flow_tbl_key table_key = {
9945 .level = tunnel_id_to_flow_tbl(mbits.table_id),
9949 .is_fdb = !!mbits.transfer,
9953 struct mlx5_flow_cb_ctx ctx = {
9954 .data = &table_key.v64,
9957 he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx);
9959 container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
9963 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx,
9964 struct mlx5_list_entry *entry)
9966 struct mlx5_dev_ctx_shared *sh = tool_ctx;
9967 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9969 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9970 tunnel_flow_tbl_to_id(tte->flow_table));
9975 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused,
9976 struct mlx5_list_entry *entry, void *cb_ctx)
9978 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9979 union tunnel_tbl_key tbl = {
9980 .val = *(uint64_t *)(ctx->data),
9982 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9984 return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
9987 static struct mlx5_list_entry *
9988 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx)
9990 struct mlx5_dev_ctx_shared *sh = tool_ctx;
9991 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9992 struct tunnel_tbl_entry *tte;
9993 union tunnel_tbl_key tbl = {
9994 .val = *(uint64_t *)(ctx->data),
9997 tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
10002 mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
10004 if (tte->flow_table >= MLX5_MAX_TABLES) {
10005 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
10007 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
10010 } else if (!tte->flow_table) {
10013 tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
10014 tte->tunnel_id = tbl.tunnel_id;
10015 tte->group = tbl.group;
10023 static struct mlx5_list_entry *
10024 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused,
10025 struct mlx5_list_entry *oentry,
10026 void *cb_ctx __rte_unused)
10028 struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte),
10033 memcpy(tte, oentry, sizeof(*tte));
10038 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused,
10039 struct mlx5_list_entry *entry)
10041 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
10047 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
10048 const struct mlx5_flow_tunnel *tunnel,
10049 uint32_t group, uint32_t *table,
10050 struct rte_flow_error *error)
10052 struct mlx5_list_entry *he;
10053 struct tunnel_tbl_entry *tte;
10054 union tunnel_tbl_key key = {
10055 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
10058 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
10059 struct mlx5_hlist *group_hash;
10060 struct mlx5_flow_cb_ctx ctx = {
10064 group_hash = tunnel ? tunnel->groups : thub->groups;
10065 he = mlx5_hlist_register(group_hash, key.val, &ctx);
10067 return rte_flow_error_set(error, EINVAL,
10068 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
10070 "tunnel group index not supported");
10071 tte = container_of(he, typeof(*tte), hash);
10072 *table = tte->flow_table;
10073 DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
10074 dev->data->port_id, key.tunnel_id, group, *table);
10079 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
10080 struct mlx5_flow_tunnel *tunnel)
10082 struct mlx5_priv *priv = dev->data->dev_private;
10083 struct mlx5_indexed_pool *ipool;
10085 DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
10086 dev->data->port_id, tunnel->tunnel_id);
10087 LIST_REMOVE(tunnel, chain);
10088 mlx5_hlist_destroy(tunnel->groups);
10089 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
10090 mlx5_ipool_free(ipool, tunnel->tunnel_id);
10094 mlx5_access_tunnel_offload_db
10095 (struct rte_eth_dev *dev,
10096 bool (*match)(struct rte_eth_dev *,
10097 struct mlx5_flow_tunnel *, const void *),
10098 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
10099 void (*miss)(struct rte_eth_dev *, void *),
10100 void *ctx, bool lock_op)
10102 bool verdict = false;
10103 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
10104 struct mlx5_flow_tunnel *tunnel;
10106 rte_spinlock_lock(&thub->sl);
10107 LIST_FOREACH(tunnel, &thub->tunnels, chain) {
10108 verdict = match(dev, tunnel, (const void *)ctx);
10113 rte_spinlock_unlock(&thub->sl);
10114 if (verdict && hit)
10115 hit(dev, tunnel, ctx);
10116 if (!verdict && miss)
10119 rte_spinlock_unlock(&thub->sl);
10124 struct tunnel_db_find_tunnel_id_ctx {
10125 uint32_t tunnel_id;
10126 struct mlx5_flow_tunnel *tunnel;
10130 find_tunnel_id_match(struct rte_eth_dev *dev,
10131 struct mlx5_flow_tunnel *tunnel, const void *x)
10133 const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
10136 return tunnel->tunnel_id == ctx->tunnel_id;
10140 find_tunnel_id_hit(struct rte_eth_dev *dev,
10141 struct mlx5_flow_tunnel *tunnel, void *x)
10143 struct tunnel_db_find_tunnel_id_ctx *ctx = x;
10145 ctx->tunnel = tunnel;
10148 static struct mlx5_flow_tunnel *
10149 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
10151 struct tunnel_db_find_tunnel_id_ctx ctx = {
10155 mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
10156 find_tunnel_id_hit, NULL, &ctx, true);
10161 static struct mlx5_flow_tunnel *
10162 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
10163 const struct rte_flow_tunnel *app_tunnel)
10165 struct mlx5_priv *priv = dev->data->dev_private;
10166 struct mlx5_indexed_pool *ipool;
10167 struct mlx5_flow_tunnel *tunnel;
10170 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
10171 tunnel = mlx5_ipool_zmalloc(ipool, &id);
10174 if (id >= MLX5_MAX_TUNNELS) {
10175 mlx5_ipool_free(ipool, id);
10176 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
10179 tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true,
10181 mlx5_flow_tunnel_grp2tbl_create_cb,
10182 mlx5_flow_tunnel_grp2tbl_match_cb,
10183 mlx5_flow_tunnel_grp2tbl_remove_cb,
10184 mlx5_flow_tunnel_grp2tbl_clone_cb,
10185 mlx5_flow_tunnel_grp2tbl_clone_free_cb);
10186 if (!tunnel->groups) {
10187 mlx5_ipool_free(ipool, id);
10190 /* initiate new PMD tunnel */
10191 memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
10192 tunnel->tunnel_id = id;
10193 tunnel->action.type = (typeof(tunnel->action.type))
10194 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
10195 tunnel->action.conf = tunnel;
10196 tunnel->item.type = (typeof(tunnel->item.type))
10197 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
10198 tunnel->item.spec = tunnel;
10199 tunnel->item.last = NULL;
10200 tunnel->item.mask = NULL;
10202 DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
10203 dev->data->port_id, tunnel->tunnel_id);
10208 struct tunnel_db_get_tunnel_ctx {
10209 const struct rte_flow_tunnel *app_tunnel;
10210 struct mlx5_flow_tunnel *tunnel;
10213 static bool get_tunnel_match(struct rte_eth_dev *dev,
10214 struct mlx5_flow_tunnel *tunnel, const void *x)
10216 const struct tunnel_db_get_tunnel_ctx *ctx = x;
10219 return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
10220 sizeof(*ctx->app_tunnel));
10223 static void get_tunnel_hit(struct rte_eth_dev *dev,
10224 struct mlx5_flow_tunnel *tunnel, void *x)
10226 /* called under tunnel spinlock protection */
10227 struct tunnel_db_get_tunnel_ctx *ctx = x;
10231 ctx->tunnel = tunnel;
10234 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
10236 /* called under tunnel spinlock protection */
10237 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
10238 struct tunnel_db_get_tunnel_ctx *ctx = x;
10240 rte_spinlock_unlock(&thub->sl);
10241 ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
10242 rte_spinlock_lock(&thub->sl);
10244 ctx->tunnel->refctn = 1;
10245 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
10251 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
10252 const struct rte_flow_tunnel *app_tunnel,
10253 struct mlx5_flow_tunnel **tunnel)
10255 struct tunnel_db_get_tunnel_ctx ctx = {
10256 .app_tunnel = app_tunnel,
10259 mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
10260 get_tunnel_miss, &ctx, true);
10261 *tunnel = ctx.tunnel;
10262 return ctx.tunnel ? 0 : -ENOMEM;
10265 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
10267 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10271 if (!LIST_EMPTY(&thub->tunnels))
10272 DRV_LOG(WARNING, "port %u tunnels present", port_id);
10273 mlx5_hlist_destroy(thub->groups);
10277 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
10280 struct mlx5_flow_tunnel_hub *thub;
10282 thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
10286 LIST_INIT(&thub->tunnels);
10287 rte_spinlock_init(&thub->sl);
10288 thub->groups = mlx5_hlist_create("flow groups", 64,
10290 mlx5_flow_tunnel_grp2tbl_create_cb,
10291 mlx5_flow_tunnel_grp2tbl_match_cb,
10292 mlx5_flow_tunnel_grp2tbl_remove_cb,
10293 mlx5_flow_tunnel_grp2tbl_clone_cb,
10294 mlx5_flow_tunnel_grp2tbl_clone_free_cb);
10295 if (!thub->groups) {
10299 sh->tunnel_hub = thub;
10305 mlx5_hlist_destroy(thub->groups);
10312 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
10313 struct rte_flow_tunnel *tunnel,
10314 struct rte_flow_error *error)
10316 struct mlx5_priv *priv = dev->data->dev_private;
10318 if (!priv->sh->config.dv_flow_en)
10319 return rte_flow_error_set(error, ENOTSUP,
10320 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
10321 "flow DV interface is off");
10322 if (!is_tunnel_offload_active(dev))
10323 return rte_flow_error_set(error, ENOTSUP,
10324 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
10325 "tunnel offload was not activated");
10327 return rte_flow_error_set(error, EINVAL,
10328 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
10329 "no application tunnel");
10330 switch (tunnel->type) {
10332 return rte_flow_error_set(error, EINVAL,
10333 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
10334 "unsupported tunnel type");
10335 case RTE_FLOW_ITEM_TYPE_VXLAN:
10336 case RTE_FLOW_ITEM_TYPE_GRE:
10337 case RTE_FLOW_ITEM_TYPE_NVGRE:
10338 case RTE_FLOW_ITEM_TYPE_GENEVE:
10345 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
10346 struct rte_flow_tunnel *app_tunnel,
10347 struct rte_flow_action **actions,
10348 uint32_t *num_of_actions,
10349 struct rte_flow_error *error)
10351 struct mlx5_flow_tunnel *tunnel;
10352 int ret = mlx5_flow_tunnel_validate(dev, app_tunnel, error);
10356 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
10358 return rte_flow_error_set(error, ret,
10359 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
10360 "failed to initialize pmd tunnel");
10362 *actions = &tunnel->action;
10363 *num_of_actions = 1;
10368 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
10369 struct rte_flow_tunnel *app_tunnel,
10370 struct rte_flow_item **items,
10371 uint32_t *num_of_items,
10372 struct rte_flow_error *error)
10374 struct mlx5_flow_tunnel *tunnel;
10375 int ret = mlx5_flow_tunnel_validate(dev, app_tunnel, error);
10379 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
10381 return rte_flow_error_set(error, ret,
10382 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
10383 "failed to initialize pmd tunnel");
10385 *items = &tunnel->item;
10390 struct tunnel_db_element_release_ctx {
10391 struct rte_flow_item *items;
10392 struct rte_flow_action *actions;
10393 uint32_t num_elements;
10394 struct rte_flow_error *error;
10399 tunnel_element_release_match(struct rte_eth_dev *dev,
10400 struct mlx5_flow_tunnel *tunnel, const void *x)
10402 const struct tunnel_db_element_release_ctx *ctx = x;
10405 if (ctx->num_elements != 1)
10407 else if (ctx->items)
10408 return ctx->items == &tunnel->item;
10409 else if (ctx->actions)
10410 return ctx->actions == &tunnel->action;
10416 tunnel_element_release_hit(struct rte_eth_dev *dev,
10417 struct mlx5_flow_tunnel *tunnel, void *x)
10419 struct tunnel_db_element_release_ctx *ctx = x;
10421 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
10422 mlx5_flow_tunnel_free(dev, tunnel);
10426 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
10428 struct tunnel_db_element_release_ctx *ctx = x;
10430 ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
10431 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
10432 "invalid argument");
10436 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
10437 struct rte_flow_item *pmd_items,
10438 uint32_t num_items, struct rte_flow_error *err)
10440 struct tunnel_db_element_release_ctx ctx = {
10441 .items = pmd_items,
10443 .num_elements = num_items,
10447 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
10448 tunnel_element_release_hit,
10449 tunnel_element_release_miss, &ctx, false);
10455 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
10456 struct rte_flow_action *pmd_actions,
10457 uint32_t num_actions, struct rte_flow_error *err)
10459 struct tunnel_db_element_release_ctx ctx = {
10461 .actions = pmd_actions,
10462 .num_elements = num_actions,
10466 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
10467 tunnel_element_release_hit,
10468 tunnel_element_release_miss, &ctx, false);
10474 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
10475 struct rte_mbuf *m,
10476 struct rte_flow_restore_info *info,
10477 struct rte_flow_error *err)
10479 uint64_t ol_flags = m->ol_flags;
10480 const struct mlx5_flow_tbl_data_entry *tble;
10481 const uint64_t mask = RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID;
10483 if (!is_tunnel_offload_active(dev)) {
10488 if ((ol_flags & mask) != mask)
10490 tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
10492 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
10493 dev->data->port_id, m->hash.fdir.hi);
10496 MLX5_ASSERT(tble->tunnel);
10497 memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
10498 info->group_id = tble->group_id;
10499 info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
10500 RTE_FLOW_RESTORE_INFO_GROUP_ID |
10501 RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
10506 return rte_flow_error_set(err, EINVAL,
10507 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10508 "failed to get restore info");
10511 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
10513 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
10514 __rte_unused struct rte_flow_tunnel *app_tunnel,
10515 __rte_unused struct rte_flow_action **actions,
10516 __rte_unused uint32_t *num_of_actions,
10517 __rte_unused struct rte_flow_error *error)
10523 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
10524 __rte_unused struct rte_flow_tunnel *app_tunnel,
10525 __rte_unused struct rte_flow_item **items,
10526 __rte_unused uint32_t *num_of_items,
10527 __rte_unused struct rte_flow_error *error)
10533 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
10534 __rte_unused struct rte_flow_item *pmd_items,
10535 __rte_unused uint32_t num_items,
10536 __rte_unused struct rte_flow_error *err)
10542 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
10543 __rte_unused struct rte_flow_action *pmd_action,
10544 __rte_unused uint32_t num_actions,
10545 __rte_unused struct rte_flow_error *err)
10551 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
10552 __rte_unused struct rte_mbuf *m,
10553 __rte_unused struct rte_flow_restore_info *i,
10554 __rte_unused struct rte_flow_error *err)
10560 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
10561 __rte_unused struct rte_flow *flow,
10562 __rte_unused const struct rte_flow_attr *attr,
10563 __rte_unused const struct rte_flow_action *actions,
10564 __rte_unused uint32_t flow_idx,
10565 __rte_unused const struct mlx5_flow_tunnel *tunnel,
10566 __rte_unused struct tunnel_default_miss_ctx *ctx,
10567 __rte_unused struct rte_flow_error *error)
10572 static struct mlx5_flow_tunnel *
10573 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
10574 __rte_unused uint32_t id)
10580 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
10581 __rte_unused struct mlx5_flow_tunnel *tunnel)
10586 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
10587 __rte_unused const struct mlx5_flow_tunnel *t,
10588 __rte_unused uint32_t group,
10589 __rte_unused uint32_t *table,
10590 struct rte_flow_error *error)
10592 return rte_flow_error_set(error, ENOTSUP,
10593 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10594 "tunnel offload requires DV support");
10598 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
10599 __rte_unused uint16_t port_id)
10602 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
10604 /* Flex flow item API */
10605 static struct rte_flow_item_flex_handle *
10606 mlx5_flow_flex_item_create(struct rte_eth_dev *dev,
10607 const struct rte_flow_item_flex_conf *conf,
10608 struct rte_flow_error *error)
10610 static const char err_msg[] = "flex item creation unsupported";
10611 struct rte_flow_attr attr = { .transfer = 0 };
10612 const struct mlx5_flow_driver_ops *fops =
10613 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
10615 if (!fops->item_create) {
10616 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
10617 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
10621 return fops->item_create(dev, conf, error);
10625 mlx5_flow_flex_item_release(struct rte_eth_dev *dev,
10626 const struct rte_flow_item_flex_handle *handle,
10627 struct rte_flow_error *error)
10629 static const char err_msg[] = "flex item release unsupported";
10630 struct rte_flow_attr attr = { .transfer = 0 };
10631 const struct mlx5_flow_driver_ops *fops =
10632 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
10634 if (!fops->item_release) {
10635 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
10636 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
10640 return fops->item_release(dev, handle, error);
10644 mlx5_dbg__print_pattern(const struct rte_flow_item *item)
10647 struct rte_flow_error error;
10649 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
10651 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name,
10653 (void *)(uintptr_t)item->type, &error);
10655 printf("%s ", item_name);
10657 printf("%d\n", (int)item->type);
10663 mlx5_flow_is_std_vxlan_port(const struct rte_flow_item *udp_item)
10665 const struct rte_flow_item_udp *spec = udp_item->spec;
10666 const struct rte_flow_item_udp *mask = udp_item->mask;
10667 uint16_t udp_dport = 0;
10669 if (spec != NULL) {
10671 mask = &rte_flow_item_udp_mask;
10672 udp_dport = rte_be_to_cpu_16(spec->hdr.dst_port &
10673 mask->hdr.dst_port);
10675 return (!udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN);
10678 static const struct mlx5_flow_expand_node *
10679 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
10680 unsigned int item_idx,
10681 const struct mlx5_flow_expand_node graph[],
10682 const struct mlx5_flow_expand_node *node)
10684 const struct rte_flow_item *item = pattern + item_idx, *prev_item;
10686 if (item->type == RTE_FLOW_ITEM_TYPE_VXLAN &&
10688 node->type == RTE_FLOW_ITEM_TYPE_VXLAN) {
10690 * The expansion node is VXLAN and it is also the last
10691 * expandable item in the pattern, so need to continue
10692 * expansion of the inner tunnel.
10694 MLX5_ASSERT(item_idx > 0);
10695 prev_item = pattern + item_idx - 1;
10696 MLX5_ASSERT(prev_item->type == RTE_FLOW_ITEM_TYPE_UDP);
10697 if (mlx5_flow_is_std_vxlan_port(prev_item))
10698 return &graph[MLX5_EXPANSION_STD_VXLAN];
10699 return &graph[MLX5_EXPANSION_L3_VXLAN];
10704 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
10705 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
10706 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
10709 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
10710 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
10711 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
10712 { 9, 10, 11 }, { 12, 13, 14 },
10716 * Discover the number of available flow priorities.
10722 * On success, number of available flow priorities.
10723 * On failure, a negative errno-style code and rte_errno is set.
10726 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
10728 static const uint16_t vprio[] = {8, 16};
10729 const struct mlx5_priv *priv = dev->data->dev_private;
10730 const struct mlx5_flow_driver_ops *fops;
10731 enum mlx5_flow_drv_type type;
10734 type = mlx5_flow_os_get_type();
10735 if (type == MLX5_FLOW_TYPE_MAX) {
10736 type = MLX5_FLOW_TYPE_VERBS;
10737 if (priv->sh->cdev->config.devx && priv->sh->config.dv_flow_en)
10738 type = MLX5_FLOW_TYPE_DV;
10740 fops = flow_get_drv_ops(type);
10741 if (fops->discover_priorities == NULL) {
10742 DRV_LOG(ERR, "Priority discovery not supported");
10743 rte_errno = ENOTSUP;
10746 ret = fops->discover_priorities(dev, vprio, RTE_DIM(vprio));
10751 ret = RTE_DIM(priority_map_3);
10754 ret = RTE_DIM(priority_map_5);
10757 rte_errno = ENOTSUP;
10759 "port %u maximum priority: %d expected 8/16",
10760 dev->data->port_id, ret);
10763 DRV_LOG(INFO, "port %u supported flow priorities:"
10764 " 0-%d for ingress or egress root table,"
10765 " 0-%d for non-root table or transfer root table.",
10766 dev->data->port_id, ret - 2,
10767 MLX5_NON_ROOT_FLOW_MAX_PRIO - 1);
10772 * Adjust flow priority based on the highest layer and the request priority.
10775 * Pointer to the Ethernet device structure.
10776 * @param[in] priority
10777 * The rule base priority.
10778 * @param[in] subpriority
10779 * The priority based on the items.
10782 * The new priority.
10785 mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
10786 uint32_t subpriority)
10789 struct mlx5_priv *priv = dev->data->dev_private;
10791 switch (priv->sh->flow_max_priority) {
10792 case RTE_DIM(priority_map_3):
10793 res = priority_map_3[priority][subpriority];
10795 case RTE_DIM(priority_map_5):
10796 res = priority_map_5[priority][subpriority];