1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2016 6WIND S.A.
3 * Copyright 2016 Mellanox Technologies, Ltd
10 #include <sys/queue.h>
12 #include <rte_common.h>
13 #include <rte_ether.h>
14 #include <ethdev_driver.h>
15 #include <rte_eal_paging.h>
17 #include <rte_cycles.h>
18 #include <rte_flow_driver.h>
19 #include <rte_malloc.h>
22 #include <mlx5_glue.h>
23 #include <mlx5_devx_cmds.h>
25 #include <mlx5_malloc.h>
27 #include "mlx5_defs.h"
29 #include "mlx5_flow.h"
30 #include "mlx5_flow_os.h"
33 #include "mlx5_common_os.h"
34 #include "rte_pmd_mlx5.h"
36 struct tunnel_default_miss_ctx {
40 struct rte_flow_action_rss action_rss;
41 struct rte_flow_action_queue miss_queue;
42 struct rte_flow_action_jump miss_jump;
48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
49 struct rte_flow *flow,
50 const struct rte_flow_attr *attr,
51 const struct rte_flow_action *app_actions,
53 const struct mlx5_flow_tunnel *tunnel,
54 struct tunnel_default_miss_ctx *ctx,
55 struct rte_flow_error *error);
56 static struct mlx5_flow_tunnel *
57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
62 const struct mlx5_flow_tunnel *tunnel,
63 uint32_t group, uint32_t *table,
64 struct rte_flow_error *error);
66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
67 static void mlx5_flow_pop_thread_workspace(void);
70 /** Device flow drivers. */
71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
76 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
78 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
80 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
81 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
84 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
85 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
90 /** Node object of input graph for mlx5_flow_expand_rss(). */
91 struct mlx5_flow_expand_node {
92 const int *const next;
94 * List of next node indexes. Index 0 is interpreted as a terminator.
96 const enum rte_flow_item_type type;
97 /**< Pattern item type of current node. */
100 * RSS types bit-field associated with this node
101 * (see RTE_ETH_RSS_* definitions).
105 * Bit-fields that define how the node is used in the expansion.
106 * (see MLX5_EXPANSION_NODE_* definitions).
110 /* Optional expand field. The expansion alg will not go deeper. */
111 #define MLX5_EXPANSION_NODE_OPTIONAL (UINT64_C(1) << 0)
113 /* The node is not added implicitly as expansion to the flow pattern.
114 * If the node type does not match the flow pattern item type, the
115 * expansion alg will go deeper to its next items.
116 * In the current implementation, the list of next nodes indexes can
117 * have up to one node with this flag set and it has to be the last
118 * node index (before the list terminator).
120 #define MLX5_EXPANSION_NODE_EXPLICIT (UINT64_C(1) << 1)
122 /** Object returned by mlx5_flow_expand_rss(). */
123 struct mlx5_flow_expand_rss {
125 /**< Number of entries @p patterns and @p priorities. */
127 struct rte_flow_item *pattern; /**< Expanded pattern array. */
128 uint32_t priority; /**< Priority offset for each expansion. */
133 mlx5_dbg__print_pattern(const struct rte_flow_item *item);
135 static const struct mlx5_flow_expand_node *
136 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
137 unsigned int item_idx,
138 const struct mlx5_flow_expand_node graph[],
139 const struct mlx5_flow_expand_node *node);
142 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item)
144 switch (item->type) {
145 case RTE_FLOW_ITEM_TYPE_ETH:
146 case RTE_FLOW_ITEM_TYPE_VLAN:
147 case RTE_FLOW_ITEM_TYPE_IPV4:
148 case RTE_FLOW_ITEM_TYPE_IPV6:
149 case RTE_FLOW_ITEM_TYPE_UDP:
150 case RTE_FLOW_ITEM_TYPE_TCP:
151 case RTE_FLOW_ITEM_TYPE_VXLAN:
152 case RTE_FLOW_ITEM_TYPE_NVGRE:
153 case RTE_FLOW_ITEM_TYPE_GRE:
154 case RTE_FLOW_ITEM_TYPE_GENEVE:
155 case RTE_FLOW_ITEM_TYPE_MPLS:
156 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
157 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
158 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
159 case RTE_FLOW_ITEM_TYPE_GTP:
167 static enum rte_flow_item_type
168 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
170 enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
171 uint16_t ether_type = 0;
172 uint16_t ether_type_m;
173 uint8_t ip_next_proto = 0;
174 uint8_t ip_next_proto_m;
176 if (item == NULL || item->spec == NULL)
178 switch (item->type) {
179 case RTE_FLOW_ITEM_TYPE_ETH:
181 ether_type_m = ((const struct rte_flow_item_eth *)
184 ether_type_m = rte_flow_item_eth_mask.type;
185 if (ether_type_m != RTE_BE16(0xFFFF))
187 ether_type = ((const struct rte_flow_item_eth *)
189 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
190 ret = RTE_FLOW_ITEM_TYPE_IPV4;
191 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
192 ret = RTE_FLOW_ITEM_TYPE_IPV6;
193 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
194 ret = RTE_FLOW_ITEM_TYPE_VLAN;
196 ret = RTE_FLOW_ITEM_TYPE_END;
198 case RTE_FLOW_ITEM_TYPE_VLAN:
200 ether_type_m = ((const struct rte_flow_item_vlan *)
201 (item->mask))->inner_type;
203 ether_type_m = rte_flow_item_vlan_mask.inner_type;
204 if (ether_type_m != RTE_BE16(0xFFFF))
206 ether_type = ((const struct rte_flow_item_vlan *)
207 (item->spec))->inner_type;
208 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
209 ret = RTE_FLOW_ITEM_TYPE_IPV4;
210 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
211 ret = RTE_FLOW_ITEM_TYPE_IPV6;
212 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
213 ret = RTE_FLOW_ITEM_TYPE_VLAN;
215 ret = RTE_FLOW_ITEM_TYPE_END;
217 case RTE_FLOW_ITEM_TYPE_IPV4:
219 ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
220 (item->mask))->hdr.next_proto_id;
223 rte_flow_item_ipv4_mask.hdr.next_proto_id;
224 if (ip_next_proto_m != 0xFF)
226 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
227 (item->spec))->hdr.next_proto_id;
228 if (ip_next_proto == IPPROTO_UDP)
229 ret = RTE_FLOW_ITEM_TYPE_UDP;
230 else if (ip_next_proto == IPPROTO_TCP)
231 ret = RTE_FLOW_ITEM_TYPE_TCP;
232 else if (ip_next_proto == IPPROTO_IP)
233 ret = RTE_FLOW_ITEM_TYPE_IPV4;
234 else if (ip_next_proto == IPPROTO_IPV6)
235 ret = RTE_FLOW_ITEM_TYPE_IPV6;
237 ret = RTE_FLOW_ITEM_TYPE_END;
239 case RTE_FLOW_ITEM_TYPE_IPV6:
241 ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
242 (item->mask))->hdr.proto;
245 rte_flow_item_ipv6_mask.hdr.proto;
246 if (ip_next_proto_m != 0xFF)
248 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
249 (item->spec))->hdr.proto;
250 if (ip_next_proto == IPPROTO_UDP)
251 ret = RTE_FLOW_ITEM_TYPE_UDP;
252 else if (ip_next_proto == IPPROTO_TCP)
253 ret = RTE_FLOW_ITEM_TYPE_TCP;
254 else if (ip_next_proto == IPPROTO_IP)
255 ret = RTE_FLOW_ITEM_TYPE_IPV4;
256 else if (ip_next_proto == IPPROTO_IPV6)
257 ret = RTE_FLOW_ITEM_TYPE_IPV6;
259 ret = RTE_FLOW_ITEM_TYPE_END;
261 case RTE_FLOW_ITEM_TYPE_GENEVE:
262 ether_type_m = item->mask ?
263 ((const struct rte_flow_item_geneve *)
264 (item->mask))->protocol :
265 rte_flow_item_geneve_mask.protocol;
266 ether_type = ((const struct rte_flow_item_geneve *)
267 (item->spec))->protocol;
268 ether_type_m = rte_be_to_cpu_16(ether_type_m);
269 ether_type = rte_be_to_cpu_16(ether_type);
270 switch (ether_type_m & ether_type) {
271 case RTE_ETHER_TYPE_TEB:
272 ret = RTE_FLOW_ITEM_TYPE_ETH;
274 case RTE_ETHER_TYPE_IPV4:
275 ret = RTE_FLOW_ITEM_TYPE_IPV4;
277 case RTE_ETHER_TYPE_IPV6:
278 ret = RTE_FLOW_ITEM_TYPE_IPV6;
281 ret = RTE_FLOW_ITEM_TYPE_END;
285 ret = RTE_FLOW_ITEM_TYPE_VOID;
292 mlx5_flow_expand_rss_skip_explicit(const struct mlx5_flow_expand_node graph[],
293 const int *next_node)
295 const struct mlx5_flow_expand_node *node = NULL;
296 const int *next = next_node;
298 while (next && *next) {
300 * Skip the nodes with the MLX5_EXPANSION_NODE_EXPLICIT
301 * flag set, because they were not found in the flow pattern.
303 node = &graph[*next];
304 if (!(node->node_flags & MLX5_EXPANSION_NODE_EXPLICIT))
311 #define MLX5_RSS_EXP_ELT_N 16
314 * Expand RSS flows into several possible flows according to the RSS hash
315 * fields requested and the driver capabilities.
318 * Buffer to store the result expansion.
320 * Buffer size in bytes. If 0, @p buf can be NULL.
324 * RSS types to expand (see RTE_ETH_RSS_* definitions).
326 * Input graph to expand @p pattern according to @p types.
327 * @param[in] graph_root_index
328 * Index of root node in @p graph, typically 0.
331 * A positive value representing the size of @p buf in bytes regardless of
332 * @p size on success, a negative errno value otherwise and rte_errno is
333 * set, the following errors are defined:
335 * -E2BIG: graph-depth @p graph is too deep.
336 * -EINVAL: @p size has not enough space for expanded pattern.
339 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
340 const struct rte_flow_item *pattern, uint64_t types,
341 const struct mlx5_flow_expand_node graph[],
342 int graph_root_index)
344 const struct rte_flow_item *item;
345 const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
346 const int *next_node;
347 const int *stack[MLX5_RSS_EXP_ELT_N];
349 struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
350 unsigned int i, item_idx, last_expand_item_idx = 0;
352 size_t user_pattern_size = 0;
354 const struct mlx5_flow_expand_node *next = NULL;
355 struct rte_flow_item missed_item;
358 const struct rte_flow_item *last_expand_item = NULL;
360 memset(&missed_item, 0, sizeof(missed_item));
361 lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
362 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
365 buf->entry[0].priority = 0;
366 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
368 addr = buf->entry[0].pattern;
369 for (item = pattern, item_idx = 0;
370 item->type != RTE_FLOW_ITEM_TYPE_END;
371 item++, item_idx++) {
372 if (!mlx5_flow_is_rss_expandable_item(item)) {
373 user_pattern_size += sizeof(*item);
376 last_expand_item = item;
377 last_expand_item_idx = item_idx;
379 while (node->next && node->next[i]) {
380 next = &graph[node->next[i]];
381 if (next->type == item->type)
383 if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
392 user_pattern_size += sizeof(*item);
394 user_pattern_size += sizeof(*item); /* Handle END item. */
395 lsize += user_pattern_size;
398 /* Copy the user pattern in the first entry of the buffer. */
399 rte_memcpy(addr, pattern, user_pattern_size);
400 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
402 /* Start expanding. */
403 memset(flow_items, 0, sizeof(flow_items));
404 user_pattern_size -= sizeof(*item);
406 * Check if the last valid item has spec set, need complete pattern,
407 * and the pattern can be used for expansion.
409 missed_item.type = mlx5_flow_expand_rss_item_complete(last_expand_item);
410 if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
411 /* Item type END indicates expansion is not required. */
414 if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
418 while (node->next && node->next[i]) {
419 next = &graph[node->next[i]];
420 if (next->type == missed_item.type) {
421 flow_items[0].type = missed_item.type;
422 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
425 if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
434 if (next && missed) {
435 elt = 2; /* missed item + item end. */
437 lsize += elt * sizeof(*item) + user_pattern_size;
440 if (node->rss_types & types) {
441 buf->entry[buf->entries].priority = 1;
442 buf->entry[buf->entries].pattern = addr;
444 rte_memcpy(addr, buf->entry[0].pattern,
446 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
447 rte_memcpy(addr, flow_items, elt * sizeof(*item));
448 addr = (void *)(((uintptr_t)addr) +
449 elt * sizeof(*item));
451 } else if (last_expand_item != NULL) {
452 node = mlx5_flow_expand_rss_adjust_node(pattern,
453 last_expand_item_idx, graph, node);
455 memset(flow_items, 0, sizeof(flow_items));
456 next_node = mlx5_flow_expand_rss_skip_explicit(graph,
458 stack[stack_pos] = next_node;
459 node = next_node ? &graph[*next_node] : NULL;
461 flow_items[stack_pos].type = node->type;
462 if (node->rss_types & types) {
465 * compute the number of items to copy from the
466 * expansion and copy it.
467 * When the stack_pos is 0, there are 1 element in it,
468 * plus the addition END item.
471 flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
472 lsize += elt * sizeof(*item) + user_pattern_size;
475 n = elt * sizeof(*item);
476 buf->entry[buf->entries].priority =
477 stack_pos + 1 + missed;
478 buf->entry[buf->entries].pattern = addr;
480 rte_memcpy(addr, buf->entry[0].pattern,
482 addr = (void *)(((uintptr_t)addr) +
484 rte_memcpy(addr, &missed_item,
485 missed * sizeof(*item));
486 addr = (void *)(((uintptr_t)addr) +
487 missed * sizeof(*item));
488 rte_memcpy(addr, flow_items, n);
489 addr = (void *)(((uintptr_t)addr) + n);
492 if (!(node->node_flags & MLX5_EXPANSION_NODE_OPTIONAL) &&
494 next_node = mlx5_flow_expand_rss_skip_explicit(graph,
496 if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
500 stack[stack_pos] = next_node;
501 } else if (*(next_node + 1)) {
502 /* Follow up with the next possibility. */
503 next_node = mlx5_flow_expand_rss_skip_explicit(graph,
505 } else if (!stack_pos) {
507 * Completing the traverse over the different paths.
508 * The next_node is advanced to the terminator.
512 /* Move to the next path. */
514 next_node = stack[--stack_pos];
519 next_node = mlx5_flow_expand_rss_skip_explicit(graph,
521 stack[stack_pos] = next_node;
523 node = next_node && *next_node ? &graph[*next_node] : NULL;
528 enum mlx5_expansion {
530 MLX5_EXPANSION_ROOT_OUTER,
531 MLX5_EXPANSION_OUTER_ETH,
532 MLX5_EXPANSION_OUTER_VLAN,
533 MLX5_EXPANSION_OUTER_IPV4,
534 MLX5_EXPANSION_OUTER_IPV4_UDP,
535 MLX5_EXPANSION_OUTER_IPV4_TCP,
536 MLX5_EXPANSION_OUTER_IPV6,
537 MLX5_EXPANSION_OUTER_IPV6_UDP,
538 MLX5_EXPANSION_OUTER_IPV6_TCP,
539 MLX5_EXPANSION_VXLAN,
540 MLX5_EXPANSION_STD_VXLAN,
541 MLX5_EXPANSION_L3_VXLAN,
542 MLX5_EXPANSION_VXLAN_GPE,
544 MLX5_EXPANSION_NVGRE,
545 MLX5_EXPANSION_GRE_KEY,
550 MLX5_EXPANSION_IPV4_UDP,
551 MLX5_EXPANSION_IPV4_TCP,
553 MLX5_EXPANSION_IPV6_UDP,
554 MLX5_EXPANSION_IPV6_TCP,
555 MLX5_EXPANSION_IPV6_FRAG_EXT,
557 MLX5_EXPANSION_GENEVE,
560 /** Supported expansion of items. */
561 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
562 [MLX5_EXPANSION_ROOT] = {
563 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
565 MLX5_EXPANSION_IPV6),
566 .type = RTE_FLOW_ITEM_TYPE_END,
568 [MLX5_EXPANSION_ROOT_OUTER] = {
569 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
570 MLX5_EXPANSION_OUTER_IPV4,
571 MLX5_EXPANSION_OUTER_IPV6),
572 .type = RTE_FLOW_ITEM_TYPE_END,
574 [MLX5_EXPANSION_OUTER_ETH] = {
575 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
576 .type = RTE_FLOW_ITEM_TYPE_ETH,
579 [MLX5_EXPANSION_OUTER_VLAN] = {
580 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
581 MLX5_EXPANSION_OUTER_IPV6),
582 .type = RTE_FLOW_ITEM_TYPE_VLAN,
583 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
585 [MLX5_EXPANSION_OUTER_IPV4] = {
586 .next = MLX5_FLOW_EXPAND_RSS_NEXT
587 (MLX5_EXPANSION_OUTER_IPV4_UDP,
588 MLX5_EXPANSION_OUTER_IPV4_TCP,
590 MLX5_EXPANSION_NVGRE,
592 MLX5_EXPANSION_IPV6),
593 .type = RTE_FLOW_ITEM_TYPE_IPV4,
594 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 |
595 RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
597 [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
598 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
599 MLX5_EXPANSION_VXLAN_GPE,
601 MLX5_EXPANSION_GENEVE,
603 .type = RTE_FLOW_ITEM_TYPE_UDP,
604 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP,
606 [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
607 .type = RTE_FLOW_ITEM_TYPE_TCP,
608 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP,
610 [MLX5_EXPANSION_OUTER_IPV6] = {
611 .next = MLX5_FLOW_EXPAND_RSS_NEXT
612 (MLX5_EXPANSION_OUTER_IPV6_UDP,
613 MLX5_EXPANSION_OUTER_IPV6_TCP,
617 MLX5_EXPANSION_NVGRE),
618 .type = RTE_FLOW_ITEM_TYPE_IPV6,
619 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 |
620 RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
622 [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
623 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
624 MLX5_EXPANSION_VXLAN_GPE,
626 MLX5_EXPANSION_GENEVE,
628 .type = RTE_FLOW_ITEM_TYPE_UDP,
629 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP,
631 [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
632 .type = RTE_FLOW_ITEM_TYPE_TCP,
633 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP,
635 [MLX5_EXPANSION_VXLAN] = {
636 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
638 MLX5_EXPANSION_IPV6),
639 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
641 [MLX5_EXPANSION_STD_VXLAN] = {
642 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
643 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
645 [MLX5_EXPANSION_L3_VXLAN] = {
646 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
647 MLX5_EXPANSION_IPV6),
648 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
650 [MLX5_EXPANSION_VXLAN_GPE] = {
651 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
653 MLX5_EXPANSION_IPV6),
654 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
656 [MLX5_EXPANSION_GRE] = {
657 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
660 MLX5_EXPANSION_GRE_KEY,
661 MLX5_EXPANSION_MPLS),
662 .type = RTE_FLOW_ITEM_TYPE_GRE,
664 [MLX5_EXPANSION_GRE_KEY] = {
665 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
667 MLX5_EXPANSION_MPLS),
668 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY,
669 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
671 [MLX5_EXPANSION_NVGRE] = {
672 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
673 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
675 [MLX5_EXPANSION_MPLS] = {
676 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
679 .type = RTE_FLOW_ITEM_TYPE_MPLS,
680 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
682 [MLX5_EXPANSION_ETH] = {
683 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
684 .type = RTE_FLOW_ITEM_TYPE_ETH,
686 [MLX5_EXPANSION_VLAN] = {
687 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
688 MLX5_EXPANSION_IPV6),
689 .type = RTE_FLOW_ITEM_TYPE_VLAN,
690 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
692 [MLX5_EXPANSION_IPV4] = {
693 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
694 MLX5_EXPANSION_IPV4_TCP),
695 .type = RTE_FLOW_ITEM_TYPE_IPV4,
696 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 |
697 RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
699 [MLX5_EXPANSION_IPV4_UDP] = {
700 .type = RTE_FLOW_ITEM_TYPE_UDP,
701 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP,
703 [MLX5_EXPANSION_IPV4_TCP] = {
704 .type = RTE_FLOW_ITEM_TYPE_TCP,
705 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP,
707 [MLX5_EXPANSION_IPV6] = {
708 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
709 MLX5_EXPANSION_IPV6_TCP,
710 MLX5_EXPANSION_IPV6_FRAG_EXT),
711 .type = RTE_FLOW_ITEM_TYPE_IPV6,
712 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 |
713 RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
715 [MLX5_EXPANSION_IPV6_UDP] = {
716 .type = RTE_FLOW_ITEM_TYPE_UDP,
717 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP,
719 [MLX5_EXPANSION_IPV6_TCP] = {
720 .type = RTE_FLOW_ITEM_TYPE_TCP,
721 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP,
723 [MLX5_EXPANSION_IPV6_FRAG_EXT] = {
724 .type = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT,
726 [MLX5_EXPANSION_GTP] = {
727 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
728 MLX5_EXPANSION_IPV6),
729 .type = RTE_FLOW_ITEM_TYPE_GTP,
731 [MLX5_EXPANSION_GENEVE] = {
732 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
734 MLX5_EXPANSION_IPV6),
735 .type = RTE_FLOW_ITEM_TYPE_GENEVE,
739 static struct rte_flow_action_handle *
740 mlx5_action_handle_create(struct rte_eth_dev *dev,
741 const struct rte_flow_indir_action_conf *conf,
742 const struct rte_flow_action *action,
743 struct rte_flow_error *error);
744 static int mlx5_action_handle_destroy
745 (struct rte_eth_dev *dev,
746 struct rte_flow_action_handle *handle,
747 struct rte_flow_error *error);
748 static int mlx5_action_handle_update
749 (struct rte_eth_dev *dev,
750 struct rte_flow_action_handle *handle,
752 struct rte_flow_error *error);
753 static int mlx5_action_handle_query
754 (struct rte_eth_dev *dev,
755 const struct rte_flow_action_handle *handle,
757 struct rte_flow_error *error);
759 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
760 struct rte_flow_tunnel *app_tunnel,
761 struct rte_flow_action **actions,
762 uint32_t *num_of_actions,
763 struct rte_flow_error *error);
765 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
766 struct rte_flow_tunnel *app_tunnel,
767 struct rte_flow_item **items,
768 uint32_t *num_of_items,
769 struct rte_flow_error *error);
771 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
772 struct rte_flow_item *pmd_items,
773 uint32_t num_items, struct rte_flow_error *err);
775 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
776 struct rte_flow_action *pmd_actions,
777 uint32_t num_actions,
778 struct rte_flow_error *err);
780 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
782 struct rte_flow_restore_info *info,
783 struct rte_flow_error *err);
784 static struct rte_flow_item_flex_handle *
785 mlx5_flow_flex_item_create(struct rte_eth_dev *dev,
786 const struct rte_flow_item_flex_conf *conf,
787 struct rte_flow_error *error);
789 mlx5_flow_flex_item_release(struct rte_eth_dev *dev,
790 const struct rte_flow_item_flex_handle *handle,
791 struct rte_flow_error *error);
793 static const struct rte_flow_ops mlx5_flow_ops = {
794 .validate = mlx5_flow_validate,
795 .create = mlx5_flow_create,
796 .destroy = mlx5_flow_destroy,
797 .flush = mlx5_flow_flush,
798 .isolate = mlx5_flow_isolate,
799 .query = mlx5_flow_query,
800 .dev_dump = mlx5_flow_dev_dump,
801 .get_aged_flows = mlx5_flow_get_aged_flows,
802 .action_handle_create = mlx5_action_handle_create,
803 .action_handle_destroy = mlx5_action_handle_destroy,
804 .action_handle_update = mlx5_action_handle_update,
805 .action_handle_query = mlx5_action_handle_query,
806 .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
807 .tunnel_match = mlx5_flow_tunnel_match,
808 .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
809 .tunnel_item_release = mlx5_flow_tunnel_item_release,
810 .get_restore_info = mlx5_flow_tunnel_get_restore_info,
811 .flex_item_create = mlx5_flow_flex_item_create,
812 .flex_item_release = mlx5_flow_flex_item_release,
815 /* Tunnel information. */
816 struct mlx5_flow_tunnel_info {
817 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
818 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
821 static struct mlx5_flow_tunnel_info tunnels_info[] = {
823 .tunnel = MLX5_FLOW_LAYER_VXLAN,
824 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
827 .tunnel = MLX5_FLOW_LAYER_GENEVE,
828 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
831 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
832 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
835 .tunnel = MLX5_FLOW_LAYER_GRE,
836 .ptype = RTE_PTYPE_TUNNEL_GRE,
839 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
840 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
843 .tunnel = MLX5_FLOW_LAYER_MPLS,
844 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
847 .tunnel = MLX5_FLOW_LAYER_NVGRE,
848 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
851 .tunnel = MLX5_FLOW_LAYER_IPIP,
852 .ptype = RTE_PTYPE_TUNNEL_IP,
855 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
856 .ptype = RTE_PTYPE_TUNNEL_IP,
859 .tunnel = MLX5_FLOW_LAYER_GTP,
860 .ptype = RTE_PTYPE_TUNNEL_GTPU,
867 * Translate tag ID to register.
870 * Pointer to the Ethernet device structure.
872 * The feature that request the register.
874 * The request register ID.
876 * Error description in case of any.
879 * The request register on success, a negative errno
880 * value otherwise and rte_errno is set.
883 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
884 enum mlx5_feature_name feature,
886 struct rte_flow_error *error)
888 struct mlx5_priv *priv = dev->data->dev_private;
889 struct mlx5_dev_config *config = &priv->config;
890 enum modify_reg start_reg;
891 bool skip_mtr_reg = false;
894 case MLX5_HAIRPIN_RX:
896 case MLX5_HAIRPIN_TX:
898 case MLX5_METADATA_RX:
899 switch (config->dv_xmeta_en) {
900 case MLX5_XMETA_MODE_LEGACY:
902 case MLX5_XMETA_MODE_META16:
904 case MLX5_XMETA_MODE_META32:
908 case MLX5_METADATA_TX:
910 case MLX5_METADATA_FDB:
911 switch (config->dv_xmeta_en) {
912 case MLX5_XMETA_MODE_LEGACY:
914 case MLX5_XMETA_MODE_META16:
916 case MLX5_XMETA_MODE_META32:
921 switch (config->dv_xmeta_en) {
922 case MLX5_XMETA_MODE_LEGACY:
924 case MLX5_XMETA_MODE_META16:
926 case MLX5_XMETA_MODE_META32:
932 * If meter color and meter id share one register, flow match
933 * should use the meter color register for match.
935 if (priv->mtr_reg_share)
936 return priv->mtr_color_reg;
938 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
941 case MLX5_ASO_FLOW_HIT:
942 case MLX5_ASO_CONNTRACK:
944 /* All features use the same REG_C. */
945 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
946 return priv->mtr_color_reg;
949 * Metadata COPY_MARK register using is in meter suffix sub
950 * flow while with meter. It's safe to share the same register.
952 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
955 * If meter is enable, it will engage the register for color
956 * match and flow match. If meter color match is not using the
957 * REG_C_2, need to skip the REG_C_x be used by meter color
959 * If meter is disable, free to use all available registers.
961 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
962 (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
963 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
964 if (id > (uint32_t)(REG_C_7 - start_reg))
965 return rte_flow_error_set(error, EINVAL,
966 RTE_FLOW_ERROR_TYPE_ITEM,
967 NULL, "invalid tag id");
968 if (priv->sh->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
969 return rte_flow_error_set(error, ENOTSUP,
970 RTE_FLOW_ERROR_TYPE_ITEM,
971 NULL, "unsupported tag id");
973 * This case means meter is using the REG_C_x great than 2.
974 * Take care not to conflict with meter color REG_C_x.
975 * If the available index REG_C_y >= REG_C_x, skip the
978 if (skip_mtr_reg && priv->sh->flow_mreg_c
979 [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
980 if (id >= (uint32_t)(REG_C_7 - start_reg))
981 return rte_flow_error_set(error, EINVAL,
982 RTE_FLOW_ERROR_TYPE_ITEM,
983 NULL, "invalid tag id");
984 if (priv->sh->flow_mreg_c
985 [id + 1 + start_reg - REG_C_0] != REG_NON)
986 return priv->sh->flow_mreg_c
987 [id + 1 + start_reg - REG_C_0];
988 return rte_flow_error_set(error, ENOTSUP,
989 RTE_FLOW_ERROR_TYPE_ITEM,
990 NULL, "unsupported tag id");
992 return priv->sh->flow_mreg_c[id + start_reg - REG_C_0];
995 return rte_flow_error_set(error, EINVAL,
996 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
997 NULL, "invalid feature name");
1001 * Check extensive flow metadata register support.
1004 * Pointer to rte_eth_dev structure.
1007 * True if device supports extensive flow metadata register, otherwise false.
1010 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
1012 struct mlx5_priv *priv = dev->data->dev_private;
1015 * Having available reg_c can be regarded inclusively as supporting
1016 * extensive flow metadata register, which could mean,
1017 * - metadata register copy action by modify header.
1018 * - 16 modify header actions is supported.
1019 * - reg_c's are preserved across different domain (FDB and NIC) on
1020 * packet loopback by flow lookup miss.
1022 return priv->sh->flow_mreg_c[2] != REG_NON;
1026 * Get the lowest priority.
1029 * Pointer to the Ethernet device structure.
1030 * @param[in] attributes
1031 * Pointer to device flow rule attributes.
1034 * The value of lowest priority of flow.
1037 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
1038 const struct rte_flow_attr *attr)
1040 struct mlx5_priv *priv = dev->data->dev_private;
1042 if (!attr->group && !attr->transfer)
1043 return priv->sh->flow_max_priority - 2;
1044 return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
1048 * Calculate matcher priority of the flow.
1051 * Pointer to the Ethernet device structure.
1053 * Pointer to device flow rule attributes.
1054 * @param[in] subpriority
1055 * The priority based on the items.
1056 * @param[in] external
1057 * Flow is user flow.
1059 * The matcher priority of the flow.
1062 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
1063 const struct rte_flow_attr *attr,
1064 uint32_t subpriority, bool external)
1066 uint16_t priority = (uint16_t)attr->priority;
1067 struct mlx5_priv *priv = dev->data->dev_private;
1069 if (!attr->group && !attr->transfer) {
1070 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1071 priority = priv->sh->flow_max_priority - 1;
1072 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
1073 } else if (!external && attr->transfer && attr->group == 0 &&
1074 attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) {
1075 return (priv->sh->flow_max_priority - 1) * 3;
1077 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1078 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
1079 return priority * 3 + subpriority;
1083 * Verify the @p item specifications (spec, last, mask) are compatible with the
1087 * Item specification.
1089 * @p item->mask or flow default bit-masks.
1090 * @param[in] nic_mask
1091 * Bit-masks covering supported fields by the NIC to compare with user mask.
1093 * Bit-masks size in bytes.
1094 * @param[in] range_accepted
1095 * True if range of values is accepted for specific fields, false otherwise.
1097 * Pointer to error structure.
1100 * 0 on success, a negative errno value otherwise and rte_errno is set.
1103 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
1104 const uint8_t *mask,
1105 const uint8_t *nic_mask,
1107 bool range_accepted,
1108 struct rte_flow_error *error)
1112 MLX5_ASSERT(nic_mask);
1113 for (i = 0; i < size; ++i)
1114 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1115 return rte_flow_error_set(error, ENOTSUP,
1116 RTE_FLOW_ERROR_TYPE_ITEM,
1118 "mask enables non supported"
1120 if (!item->spec && (item->mask || item->last))
1121 return rte_flow_error_set(error, EINVAL,
1122 RTE_FLOW_ERROR_TYPE_ITEM, item,
1123 "mask/last without a spec is not"
1125 if (item->spec && item->last && !range_accepted) {
1131 for (i = 0; i < size; ++i) {
1132 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1133 last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1135 ret = memcmp(spec, last, size);
1137 return rte_flow_error_set(error, EINVAL,
1138 RTE_FLOW_ERROR_TYPE_ITEM,
1140 "range is not valid");
1146 * Adjust the hash fields according to the @p flow information.
1148 * @param[in] dev_flow.
1149 * Pointer to the mlx5_flow.
1151 * 1 when the hash field is for a tunnel item.
1152 * @param[in] layer_types
1153 * RTE_ETH_RSS_* types.
1154 * @param[in] hash_fields
1158 * The hash fields that should be used.
1161 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1162 int tunnel __rte_unused, uint64_t layer_types,
1163 uint64_t hash_fields)
1165 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1166 int rss_request_inner = rss_desc->level >= 2;
1168 /* Check RSS hash level for tunnel. */
1169 if (tunnel && rss_request_inner)
1170 hash_fields |= IBV_RX_HASH_INNER;
1171 else if (tunnel || rss_request_inner)
1174 /* Check if requested layer matches RSS hash fields. */
1175 if (!(rss_desc->types & layer_types))
1181 * Lookup and set the ptype in the data Rx part. A single Ptype can be used,
1182 * if several tunnel rules are used on this queue, the tunnel ptype will be
1186 * Rx queue to update.
1189 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1192 uint32_t tunnel_ptype = 0;
1194 /* Look up for the ptype to use. */
1195 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1196 if (!rxq_ctrl->flow_tunnels_n[i])
1198 if (!tunnel_ptype) {
1199 tunnel_ptype = tunnels_info[i].ptype;
1205 rxq_ctrl->rxq.tunnel = tunnel_ptype;
1209 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1213 * Pointer to the Ethernet device structure.
1214 * @param[in] dev_handle
1215 * Pointer to device flow handle structure.
1218 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1219 struct mlx5_flow_handle *dev_handle)
1221 struct mlx5_priv *priv = dev->data->dev_private;
1222 const int mark = dev_handle->mark;
1223 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1224 struct mlx5_ind_table_obj *ind_tbl = NULL;
1227 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1228 struct mlx5_hrxq *hrxq;
1230 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1231 dev_handle->rix_hrxq);
1233 ind_tbl = hrxq->ind_table;
1234 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1235 struct mlx5_shared_action_rss *shared_rss;
1237 shared_rss = mlx5_ipool_get
1238 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1239 dev_handle->rix_srss);
1241 ind_tbl = shared_rss->ind_tbl;
1245 for (i = 0; i != ind_tbl->queues_n; ++i) {
1246 int idx = ind_tbl->queues[i];
1247 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx);
1249 MLX5_ASSERT(rxq_ctrl != NULL);
1250 if (rxq_ctrl == NULL)
1253 * To support metadata register copy on Tx loopback,
1254 * this must be always enabled (metadata may arive
1255 * from other port - not from local flows only.
1257 if (priv->config.dv_flow_en &&
1258 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1259 mlx5_flow_ext_mreg_supported(dev)) {
1260 rxq_ctrl->rxq.mark = 1;
1261 rxq_ctrl->flow_mark_n = 1;
1263 rxq_ctrl->rxq.mark = 1;
1264 rxq_ctrl->flow_mark_n++;
1269 /* Increase the counter matching the flow. */
1270 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1271 if ((tunnels_info[j].tunnel &
1272 dev_handle->layers) ==
1273 tunnels_info[j].tunnel) {
1274 rxq_ctrl->flow_tunnels_n[j]++;
1278 flow_rxq_tunnel_ptype_update(rxq_ctrl);
1284 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1287 * Pointer to the Ethernet device structure.
1289 * Pointer to flow structure.
1292 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1294 struct mlx5_priv *priv = dev->data->dev_private;
1295 uint32_t handle_idx;
1296 struct mlx5_flow_handle *dev_handle;
1298 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1299 handle_idx, dev_handle, next)
1300 flow_drv_rxq_flags_set(dev, dev_handle);
1304 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1305 * device flow if no other flow uses it with the same kind of request.
1308 * Pointer to Ethernet device.
1309 * @param[in] dev_handle
1310 * Pointer to the device flow handle structure.
1313 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1314 struct mlx5_flow_handle *dev_handle)
1316 struct mlx5_priv *priv = dev->data->dev_private;
1317 const int mark = dev_handle->mark;
1318 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1319 struct mlx5_ind_table_obj *ind_tbl = NULL;
1322 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1323 struct mlx5_hrxq *hrxq;
1325 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1326 dev_handle->rix_hrxq);
1328 ind_tbl = hrxq->ind_table;
1329 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1330 struct mlx5_shared_action_rss *shared_rss;
1332 shared_rss = mlx5_ipool_get
1333 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1334 dev_handle->rix_srss);
1336 ind_tbl = shared_rss->ind_tbl;
1340 MLX5_ASSERT(dev->data->dev_started);
1341 for (i = 0; i != ind_tbl->queues_n; ++i) {
1342 int idx = ind_tbl->queues[i];
1343 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx);
1345 MLX5_ASSERT(rxq_ctrl != NULL);
1346 if (rxq_ctrl == NULL)
1348 if (priv->config.dv_flow_en &&
1349 priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1350 mlx5_flow_ext_mreg_supported(dev)) {
1351 rxq_ctrl->rxq.mark = 1;
1352 rxq_ctrl->flow_mark_n = 1;
1354 rxq_ctrl->flow_mark_n--;
1355 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1360 /* Decrease the counter matching the flow. */
1361 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1362 if ((tunnels_info[j].tunnel &
1363 dev_handle->layers) ==
1364 tunnels_info[j].tunnel) {
1365 rxq_ctrl->flow_tunnels_n[j]--;
1369 flow_rxq_tunnel_ptype_update(rxq_ctrl);
1375 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1376 * @p flow if no other flow uses it with the same kind of request.
1379 * Pointer to Ethernet device.
1381 * Pointer to the flow.
1384 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1386 struct mlx5_priv *priv = dev->data->dev_private;
1387 uint32_t handle_idx;
1388 struct mlx5_flow_handle *dev_handle;
1390 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1391 handle_idx, dev_handle, next)
1392 flow_drv_rxq_flags_trim(dev, dev_handle);
1396 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1399 * Pointer to Ethernet device.
1402 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1404 struct mlx5_priv *priv = dev->data->dev_private;
1407 for (i = 0; i != priv->rxqs_n; ++i) {
1408 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
1411 if (rxq == NULL || rxq->ctrl == NULL)
1413 rxq->ctrl->flow_mark_n = 0;
1414 rxq->ctrl->rxq.mark = 0;
1415 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1416 rxq->ctrl->flow_tunnels_n[j] = 0;
1417 rxq->ctrl->rxq.tunnel = 0;
1422 * Set the Rx queue dynamic metadata (mask and offset) for a flow
1425 * Pointer to the Ethernet device structure.
1428 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1430 struct mlx5_priv *priv = dev->data->dev_private;
1433 for (i = 0; i != priv->rxqs_n; ++i) {
1434 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
1435 struct mlx5_rxq_data *data;
1437 if (rxq == NULL || rxq->ctrl == NULL)
1439 data = &rxq->ctrl->rxq;
1440 if (!rte_flow_dynf_metadata_avail()) {
1441 data->dynf_meta = 0;
1442 data->flow_meta_mask = 0;
1443 data->flow_meta_offset = -1;
1444 data->flow_meta_port_mask = 0;
1446 data->dynf_meta = 1;
1447 data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1448 data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1449 data->flow_meta_port_mask = priv->sh->dv_meta_mask;
1455 * return a pointer to the desired action in the list of actions.
1457 * @param[in] actions
1458 * The list of actions to search the action in.
1460 * The action to find.
1463 * Pointer to the action in the list, if found. NULL otherwise.
1465 const struct rte_flow_action *
1466 mlx5_flow_find_action(const struct rte_flow_action *actions,
1467 enum rte_flow_action_type action)
1469 if (actions == NULL)
1471 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1472 if (actions->type == action)
1478 * Validate the flag action.
1480 * @param[in] action_flags
1481 * Bit-fields that holds the actions detected until now.
1483 * Attributes of flow that includes this action.
1485 * Pointer to error structure.
1488 * 0 on success, a negative errno value otherwise and rte_errno is set.
1491 mlx5_flow_validate_action_flag(uint64_t action_flags,
1492 const struct rte_flow_attr *attr,
1493 struct rte_flow_error *error)
1495 if (action_flags & MLX5_FLOW_ACTION_MARK)
1496 return rte_flow_error_set(error, EINVAL,
1497 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1498 "can't mark and flag in same flow");
1499 if (action_flags & MLX5_FLOW_ACTION_FLAG)
1500 return rte_flow_error_set(error, EINVAL,
1501 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1503 " actions in same flow");
1505 return rte_flow_error_set(error, ENOTSUP,
1506 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1507 "flag action not supported for "
1513 * Validate the mark action.
1516 * Pointer to the queue action.
1517 * @param[in] action_flags
1518 * Bit-fields that holds the actions detected until now.
1520 * Attributes of flow that includes this action.
1522 * Pointer to error structure.
1525 * 0 on success, a negative errno value otherwise and rte_errno is set.
1528 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1529 uint64_t action_flags,
1530 const struct rte_flow_attr *attr,
1531 struct rte_flow_error *error)
1533 const struct rte_flow_action_mark *mark = action->conf;
1536 return rte_flow_error_set(error, EINVAL,
1537 RTE_FLOW_ERROR_TYPE_ACTION,
1539 "configuration cannot be null");
1540 if (mark->id >= MLX5_FLOW_MARK_MAX)
1541 return rte_flow_error_set(error, EINVAL,
1542 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1544 "mark id must in 0 <= id < "
1545 RTE_STR(MLX5_FLOW_MARK_MAX));
1546 if (action_flags & MLX5_FLOW_ACTION_FLAG)
1547 return rte_flow_error_set(error, EINVAL,
1548 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1549 "can't flag and mark in same flow");
1550 if (action_flags & MLX5_FLOW_ACTION_MARK)
1551 return rte_flow_error_set(error, EINVAL,
1552 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1553 "can't have 2 mark actions in same"
1556 return rte_flow_error_set(error, ENOTSUP,
1557 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1558 "mark action not supported for "
1564 * Validate the drop action.
1566 * @param[in] action_flags
1567 * Bit-fields that holds the actions detected until now.
1569 * Attributes of flow that includes this action.
1571 * Pointer to error structure.
1574 * 0 on success, a negative errno value otherwise and rte_errno is set.
1577 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1578 const struct rte_flow_attr *attr,
1579 struct rte_flow_error *error)
1582 return rte_flow_error_set(error, ENOTSUP,
1583 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1584 "drop action not supported for "
1590 * Validate the queue action.
1593 * Pointer to the queue action.
1594 * @param[in] action_flags
1595 * Bit-fields that holds the actions detected until now.
1597 * Pointer to the Ethernet device structure.
1599 * Attributes of flow that includes this action.
1601 * Pointer to error structure.
1604 * 0 on success, a negative errno value otherwise and rte_errno is set.
1607 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1608 uint64_t action_flags,
1609 struct rte_eth_dev *dev,
1610 const struct rte_flow_attr *attr,
1611 struct rte_flow_error *error)
1613 struct mlx5_priv *priv = dev->data->dev_private;
1614 const struct rte_flow_action_queue *queue = action->conf;
1616 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1617 return rte_flow_error_set(error, EINVAL,
1618 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1619 "can't have 2 fate actions in"
1622 return rte_flow_error_set(error, EINVAL,
1623 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1624 NULL, "No Rx queues configured");
1625 if (queue->index >= priv->rxqs_n)
1626 return rte_flow_error_set(error, EINVAL,
1627 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1629 "queue index out of range");
1630 if (mlx5_rxq_get(dev, queue->index) == NULL)
1631 return rte_flow_error_set(error, EINVAL,
1632 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1634 "queue is not configured");
1636 return rte_flow_error_set(error, ENOTSUP,
1637 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1638 "queue action not supported for "
1644 * Validate queue numbers for device RSS.
1647 * Configured device.
1649 * Array of queue numbers.
1650 * @param[in] queues_n
1651 * Size of the @p queues array.
1653 * On error, filled with a textual error description.
1655 * On error, filled with an offending queue index in @p queues array.
1658 * 0 on success, a negative errno code on error.
1661 mlx5_validate_rss_queues(struct rte_eth_dev *dev,
1662 const uint16_t *queues, uint32_t queues_n,
1663 const char **error, uint32_t *queue_idx)
1665 const struct mlx5_priv *priv = dev->data->dev_private;
1666 enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1669 for (i = 0; i != queues_n; ++i) {
1670 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev,
1673 if (queues[i] >= priv->rxqs_n) {
1674 *error = "queue index out of range";
1678 if (rxq_ctrl == NULL) {
1679 *error = "queue is not configured";
1684 rxq_type = rxq_ctrl->type;
1685 if (rxq_type != rxq_ctrl->type) {
1686 *error = "combining hairpin and regular RSS queues is not supported";
1695 * Validate the rss action.
1698 * Pointer to the Ethernet device structure.
1700 * Pointer to the queue action.
1702 * Pointer to error structure.
1705 * 0 on success, a negative errno value otherwise and rte_errno is set.
1708 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1709 const struct rte_flow_action *action,
1710 struct rte_flow_error *error)
1712 struct mlx5_priv *priv = dev->data->dev_private;
1713 const struct rte_flow_action_rss *rss = action->conf;
1715 const char *message;
1718 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1719 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1720 return rte_flow_error_set(error, ENOTSUP,
1721 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1723 "RSS hash function not supported");
1724 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1729 return rte_flow_error_set(error, ENOTSUP,
1730 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1732 "tunnel RSS is not supported");
1733 /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1734 if (rss->key_len == 0 && rss->key != NULL)
1735 return rte_flow_error_set(error, ENOTSUP,
1736 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1738 "RSS hash key length 0");
1739 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1740 return rte_flow_error_set(error, ENOTSUP,
1741 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1743 "RSS hash key too small");
1744 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1745 return rte_flow_error_set(error, ENOTSUP,
1746 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1748 "RSS hash key too large");
1749 if (rss->queue_num > priv->config.ind_table_max_size)
1750 return rte_flow_error_set(error, ENOTSUP,
1751 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1753 "number of queues too large");
1754 if (rss->types & MLX5_RSS_HF_MASK)
1755 return rte_flow_error_set(error, ENOTSUP,
1756 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1758 "some RSS protocols are not"
1760 if ((rss->types & (RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY)) &&
1761 !(rss->types & RTE_ETH_RSS_IP))
1762 return rte_flow_error_set(error, EINVAL,
1763 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1764 "L3 partial RSS requested but L3 RSS"
1765 " type not specified");
1766 if ((rss->types & (RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY)) &&
1767 !(rss->types & (RTE_ETH_RSS_UDP | RTE_ETH_RSS_TCP)))
1768 return rte_flow_error_set(error, EINVAL,
1769 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1770 "L4 partial RSS requested but L4 RSS"
1771 " type not specified");
1773 return rte_flow_error_set(error, EINVAL,
1774 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1775 NULL, "No Rx queues configured");
1776 if (!rss->queue_num)
1777 return rte_flow_error_set(error, EINVAL,
1778 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1779 NULL, "No queues configured");
1780 ret = mlx5_validate_rss_queues(dev, rss->queue, rss->queue_num,
1781 &message, &queue_idx);
1783 return rte_flow_error_set(error, -ret,
1784 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1785 &rss->queue[queue_idx], message);
1791 * Validate the rss action.
1794 * Pointer to the queue action.
1795 * @param[in] action_flags
1796 * Bit-fields that holds the actions detected until now.
1798 * Pointer to the Ethernet device structure.
1800 * Attributes of flow that includes this action.
1801 * @param[in] item_flags
1802 * Items that were detected.
1804 * Pointer to error structure.
1807 * 0 on success, a negative errno value otherwise and rte_errno is set.
1810 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1811 uint64_t action_flags,
1812 struct rte_eth_dev *dev,
1813 const struct rte_flow_attr *attr,
1814 uint64_t item_flags,
1815 struct rte_flow_error *error)
1817 const struct rte_flow_action_rss *rss = action->conf;
1818 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1821 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1822 return rte_flow_error_set(error, EINVAL,
1823 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1824 "can't have 2 fate actions"
1826 ret = mlx5_validate_action_rss(dev, action, error);
1830 return rte_flow_error_set(error, ENOTSUP,
1831 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1832 "rss action not supported for "
1834 if (rss->level > 1 && !tunnel)
1835 return rte_flow_error_set(error, EINVAL,
1836 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1837 "inner RSS is not supported for "
1838 "non-tunnel flows");
1839 if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1840 !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1841 return rte_flow_error_set(error, EINVAL,
1842 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1843 "RSS on eCPRI is not supported now");
1845 if ((item_flags & MLX5_FLOW_LAYER_MPLS) &&
1847 (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) &&
1849 return rte_flow_error_set(error, EINVAL,
1850 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1851 "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern");
1856 * Validate the default miss action.
1858 * @param[in] action_flags
1859 * Bit-fields that holds the actions detected until now.
1861 * Pointer to error structure.
1864 * 0 on success, a negative errno value otherwise and rte_errno is set.
1867 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1868 const struct rte_flow_attr *attr,
1869 struct rte_flow_error *error)
1871 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1872 return rte_flow_error_set(error, EINVAL,
1873 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1874 "can't have 2 fate actions in"
1877 return rte_flow_error_set(error, ENOTSUP,
1878 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1879 "default miss action not supported "
1882 return rte_flow_error_set(error, ENOTSUP,
1883 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1884 "only group 0 is supported");
1886 return rte_flow_error_set(error, ENOTSUP,
1887 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1888 NULL, "transfer is not supported");
1893 * Validate the count action.
1896 * Pointer to the Ethernet device structure.
1898 * Attributes of flow that includes this action.
1900 * Pointer to error structure.
1903 * 0 on success, a negative errno value otherwise and rte_errno is set.
1906 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1907 const struct rte_flow_attr *attr,
1908 struct rte_flow_error *error)
1911 return rte_flow_error_set(error, ENOTSUP,
1912 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1913 "count action not supported for "
1919 * Validate the ASO CT action.
1922 * Pointer to the Ethernet device structure.
1923 * @param[in] conntrack
1924 * Pointer to the CT action profile.
1926 * Pointer to error structure.
1929 * 0 on success, a negative errno value otherwise and rte_errno is set.
1932 mlx5_validate_action_ct(struct rte_eth_dev *dev,
1933 const struct rte_flow_action_conntrack *conntrack,
1934 struct rte_flow_error *error)
1938 if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT)
1939 return rte_flow_error_set(error, EINVAL,
1940 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1941 "Invalid CT state");
1942 if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST)
1943 return rte_flow_error_set(error, EINVAL,
1944 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1945 "Invalid last TCP packet flag");
1950 * Verify the @p attributes will be correctly understood by the NIC and store
1951 * them in the @p flow if everything is correct.
1954 * Pointer to the Ethernet device structure.
1955 * @param[in] attributes
1956 * Pointer to flow attributes
1958 * Pointer to error structure.
1961 * 0 on success, a negative errno value otherwise and rte_errno is set.
1964 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1965 const struct rte_flow_attr *attributes,
1966 struct rte_flow_error *error)
1968 struct mlx5_priv *priv = dev->data->dev_private;
1969 uint32_t priority_max = priv->sh->flow_max_priority - 1;
1971 if (attributes->group)
1972 return rte_flow_error_set(error, ENOTSUP,
1973 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1974 NULL, "groups is not supported");
1975 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1976 attributes->priority >= priority_max)
1977 return rte_flow_error_set(error, ENOTSUP,
1978 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1979 NULL, "priority out of range");
1980 if (attributes->egress)
1981 return rte_flow_error_set(error, ENOTSUP,
1982 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1983 "egress is not supported");
1984 if (attributes->transfer && !priv->config.dv_esw_en)
1985 return rte_flow_error_set(error, ENOTSUP,
1986 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1987 NULL, "transfer is not supported");
1988 if (!attributes->ingress)
1989 return rte_flow_error_set(error, EINVAL,
1990 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1992 "ingress attribute is mandatory");
1997 * Validate ICMP6 item.
2000 * Item specification.
2001 * @param[in] item_flags
2002 * Bit-fields that holds the items detected until now.
2003 * @param[in] ext_vlan_sup
2004 * Whether extended VLAN features are supported or not.
2006 * Pointer to error structure.
2009 * 0 on success, a negative errno value otherwise and rte_errno is set.
2012 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
2013 uint64_t item_flags,
2014 uint8_t target_protocol,
2015 struct rte_flow_error *error)
2017 const struct rte_flow_item_icmp6 *mask = item->mask;
2018 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2019 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
2020 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
2021 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2022 MLX5_FLOW_LAYER_OUTER_L4;
2025 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
2026 return rte_flow_error_set(error, EINVAL,
2027 RTE_FLOW_ERROR_TYPE_ITEM, item,
2028 "protocol filtering not compatible"
2029 " with ICMP6 layer");
2030 if (!(item_flags & l3m))
2031 return rte_flow_error_set(error, EINVAL,
2032 RTE_FLOW_ERROR_TYPE_ITEM, item,
2033 "IPv6 is mandatory to filter on"
2035 if (item_flags & l4m)
2036 return rte_flow_error_set(error, EINVAL,
2037 RTE_FLOW_ERROR_TYPE_ITEM, item,
2038 "multiple L4 layers not supported");
2040 mask = &rte_flow_item_icmp6_mask;
2041 ret = mlx5_flow_item_acceptable
2042 (item, (const uint8_t *)mask,
2043 (const uint8_t *)&rte_flow_item_icmp6_mask,
2044 sizeof(struct rte_flow_item_icmp6),
2045 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2052 * Validate ICMP item.
2055 * Item specification.
2056 * @param[in] item_flags
2057 * Bit-fields that holds the items detected until now.
2059 * Pointer to error structure.
2062 * 0 on success, a negative errno value otherwise and rte_errno is set.
2065 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
2066 uint64_t item_flags,
2067 uint8_t target_protocol,
2068 struct rte_flow_error *error)
2070 const struct rte_flow_item_icmp *mask = item->mask;
2071 const struct rte_flow_item_icmp nic_mask = {
2072 .hdr.icmp_type = 0xff,
2073 .hdr.icmp_code = 0xff,
2074 .hdr.icmp_ident = RTE_BE16(0xffff),
2075 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
2077 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2078 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
2079 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2080 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2081 MLX5_FLOW_LAYER_OUTER_L4;
2084 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
2085 return rte_flow_error_set(error, EINVAL,
2086 RTE_FLOW_ERROR_TYPE_ITEM, item,
2087 "protocol filtering not compatible"
2088 " with ICMP layer");
2089 if (!(item_flags & l3m))
2090 return rte_flow_error_set(error, EINVAL,
2091 RTE_FLOW_ERROR_TYPE_ITEM, item,
2092 "IPv4 is mandatory to filter"
2094 if (item_flags & l4m)
2095 return rte_flow_error_set(error, EINVAL,
2096 RTE_FLOW_ERROR_TYPE_ITEM, item,
2097 "multiple L4 layers not supported");
2100 ret = mlx5_flow_item_acceptable
2101 (item, (const uint8_t *)mask,
2102 (const uint8_t *)&nic_mask,
2103 sizeof(struct rte_flow_item_icmp),
2104 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2111 * Validate Ethernet item.
2114 * Item specification.
2115 * @param[in] item_flags
2116 * Bit-fields that holds the items detected until now.
2118 * Pointer to error structure.
2121 * 0 on success, a negative errno value otherwise and rte_errno is set.
2124 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
2125 uint64_t item_flags, bool ext_vlan_sup,
2126 struct rte_flow_error *error)
2128 const struct rte_flow_item_eth *mask = item->mask;
2129 const struct rte_flow_item_eth nic_mask = {
2130 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2131 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2132 .type = RTE_BE16(0xffff),
2133 .has_vlan = ext_vlan_sup ? 1 : 0,
2136 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2137 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
2138 MLX5_FLOW_LAYER_OUTER_L2;
2140 if (item_flags & ethm)
2141 return rte_flow_error_set(error, ENOTSUP,
2142 RTE_FLOW_ERROR_TYPE_ITEM, item,
2143 "multiple L2 layers not supported");
2144 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
2145 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
2146 return rte_flow_error_set(error, EINVAL,
2147 RTE_FLOW_ERROR_TYPE_ITEM, item,
2148 "L2 layer should not follow "
2150 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
2151 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
2152 return rte_flow_error_set(error, EINVAL,
2153 RTE_FLOW_ERROR_TYPE_ITEM, item,
2154 "L2 layer should not follow VLAN");
2155 if (item_flags & MLX5_FLOW_LAYER_GTP)
2156 return rte_flow_error_set(error, EINVAL,
2157 RTE_FLOW_ERROR_TYPE_ITEM, item,
2158 "L2 layer should not follow GTP");
2160 mask = &rte_flow_item_eth_mask;
2161 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2162 (const uint8_t *)&nic_mask,
2163 sizeof(struct rte_flow_item_eth),
2164 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2169 * Validate VLAN item.
2172 * Item specification.
2173 * @param[in] item_flags
2174 * Bit-fields that holds the items detected until now.
2176 * Ethernet device flow is being created on.
2178 * Pointer to error structure.
2181 * 0 on success, a negative errno value otherwise and rte_errno is set.
2184 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
2185 uint64_t item_flags,
2186 struct rte_eth_dev *dev,
2187 struct rte_flow_error *error)
2189 const struct rte_flow_item_vlan *spec = item->spec;
2190 const struct rte_flow_item_vlan *mask = item->mask;
2191 const struct rte_flow_item_vlan nic_mask = {
2192 .tci = RTE_BE16(UINT16_MAX),
2193 .inner_type = RTE_BE16(UINT16_MAX),
2195 uint16_t vlan_tag = 0;
2196 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2198 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2199 MLX5_FLOW_LAYER_INNER_L4) :
2200 (MLX5_FLOW_LAYER_OUTER_L3 |
2201 MLX5_FLOW_LAYER_OUTER_L4);
2202 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2203 MLX5_FLOW_LAYER_OUTER_VLAN;
2205 if (item_flags & vlanm)
2206 return rte_flow_error_set(error, EINVAL,
2207 RTE_FLOW_ERROR_TYPE_ITEM, item,
2208 "multiple VLAN layers not supported");
2209 else if ((item_flags & l34m) != 0)
2210 return rte_flow_error_set(error, EINVAL,
2211 RTE_FLOW_ERROR_TYPE_ITEM, item,
2212 "VLAN cannot follow L3/L4 layer");
2214 mask = &rte_flow_item_vlan_mask;
2215 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2216 (const uint8_t *)&nic_mask,
2217 sizeof(struct rte_flow_item_vlan),
2218 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2221 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2222 struct mlx5_priv *priv = dev->data->dev_private;
2224 if (priv->vmwa_context) {
2226 * Non-NULL context means we have a virtual machine
2227 * and SR-IOV enabled, we have to create VLAN interface
2228 * to make hypervisor to setup E-Switch vport
2229 * context correctly. We avoid creating the multiple
2230 * VLAN interfaces, so we cannot support VLAN tag mask.
2232 return rte_flow_error_set(error, EINVAL,
2233 RTE_FLOW_ERROR_TYPE_ITEM,
2235 "VLAN tag mask is not"
2236 " supported in virtual"
2241 vlan_tag = spec->tci;
2242 vlan_tag &= mask->tci;
2245 * From verbs perspective an empty VLAN is equivalent
2246 * to a packet without VLAN layer.
2249 return rte_flow_error_set(error, EINVAL,
2250 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2252 "VLAN cannot be empty");
2257 * Validate IPV4 item.
2260 * Item specification.
2261 * @param[in] item_flags
2262 * Bit-fields that holds the items detected until now.
2263 * @param[in] last_item
2264 * Previous validated item in the pattern items.
2265 * @param[in] ether_type
2266 * Type in the ethernet layer header (including dot1q).
2267 * @param[in] acc_mask
2268 * Acceptable mask, if NULL default internal default mask
2269 * will be used to check whether item fields are supported.
2270 * @param[in] range_accepted
2271 * True if range of values is accepted for specific fields, false otherwise.
2273 * Pointer to error structure.
2276 * 0 on success, a negative errno value otherwise and rte_errno is set.
2279 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2280 uint64_t item_flags,
2282 uint16_t ether_type,
2283 const struct rte_flow_item_ipv4 *acc_mask,
2284 bool range_accepted,
2285 struct rte_flow_error *error)
2287 const struct rte_flow_item_ipv4 *mask = item->mask;
2288 const struct rte_flow_item_ipv4 *spec = item->spec;
2289 const struct rte_flow_item_ipv4 nic_mask = {
2291 .src_addr = RTE_BE32(0xffffffff),
2292 .dst_addr = RTE_BE32(0xffffffff),
2293 .type_of_service = 0xff,
2294 .next_proto_id = 0xff,
2297 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2298 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2299 MLX5_FLOW_LAYER_OUTER_L3;
2300 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2301 MLX5_FLOW_LAYER_OUTER_L4;
2303 uint8_t next_proto = 0xFF;
2304 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2305 MLX5_FLOW_LAYER_OUTER_VLAN |
2306 MLX5_FLOW_LAYER_INNER_VLAN);
2308 if ((last_item & l2_vlan) && ether_type &&
2309 ether_type != RTE_ETHER_TYPE_IPV4)
2310 return rte_flow_error_set(error, EINVAL,
2311 RTE_FLOW_ERROR_TYPE_ITEM, item,
2312 "IPv4 cannot follow L2/VLAN layer "
2313 "which ether type is not IPv4");
2314 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2316 next_proto = mask->hdr.next_proto_id &
2317 spec->hdr.next_proto_id;
2318 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2319 return rte_flow_error_set(error, EINVAL,
2320 RTE_FLOW_ERROR_TYPE_ITEM,
2325 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2326 return rte_flow_error_set(error, EINVAL,
2327 RTE_FLOW_ERROR_TYPE_ITEM, item,
2328 "wrong tunnel type - IPv6 specified "
2329 "but IPv4 item provided");
2330 if (item_flags & l3m)
2331 return rte_flow_error_set(error, ENOTSUP,
2332 RTE_FLOW_ERROR_TYPE_ITEM, item,
2333 "multiple L3 layers not supported");
2334 else if (item_flags & l4m)
2335 return rte_flow_error_set(error, EINVAL,
2336 RTE_FLOW_ERROR_TYPE_ITEM, item,
2337 "L3 cannot follow an L4 layer.");
2338 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2339 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2340 return rte_flow_error_set(error, EINVAL,
2341 RTE_FLOW_ERROR_TYPE_ITEM, item,
2342 "L3 cannot follow an NVGRE layer.");
2344 mask = &rte_flow_item_ipv4_mask;
2345 else if (mask->hdr.next_proto_id != 0 &&
2346 mask->hdr.next_proto_id != 0xff)
2347 return rte_flow_error_set(error, EINVAL,
2348 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2349 "partial mask is not supported"
2351 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2352 acc_mask ? (const uint8_t *)acc_mask
2353 : (const uint8_t *)&nic_mask,
2354 sizeof(struct rte_flow_item_ipv4),
2355 range_accepted, error);
2362 * Validate IPV6 item.
2365 * Item specification.
2366 * @param[in] item_flags
2367 * Bit-fields that holds the items detected until now.
2368 * @param[in] last_item
2369 * Previous validated item in the pattern items.
2370 * @param[in] ether_type
2371 * Type in the ethernet layer header (including dot1q).
2372 * @param[in] acc_mask
2373 * Acceptable mask, if NULL default internal default mask
2374 * will be used to check whether item fields are supported.
2376 * Pointer to error structure.
2379 * 0 on success, a negative errno value otherwise and rte_errno is set.
2382 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2383 uint64_t item_flags,
2385 uint16_t ether_type,
2386 const struct rte_flow_item_ipv6 *acc_mask,
2387 struct rte_flow_error *error)
2389 const struct rte_flow_item_ipv6 *mask = item->mask;
2390 const struct rte_flow_item_ipv6 *spec = item->spec;
2391 const struct rte_flow_item_ipv6 nic_mask = {
2394 "\xff\xff\xff\xff\xff\xff\xff\xff"
2395 "\xff\xff\xff\xff\xff\xff\xff\xff",
2397 "\xff\xff\xff\xff\xff\xff\xff\xff"
2398 "\xff\xff\xff\xff\xff\xff\xff\xff",
2399 .vtc_flow = RTE_BE32(0xffffffff),
2403 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2404 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2405 MLX5_FLOW_LAYER_OUTER_L3;
2406 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2407 MLX5_FLOW_LAYER_OUTER_L4;
2409 uint8_t next_proto = 0xFF;
2410 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2411 MLX5_FLOW_LAYER_OUTER_VLAN |
2412 MLX5_FLOW_LAYER_INNER_VLAN);
2414 if ((last_item & l2_vlan) && ether_type &&
2415 ether_type != RTE_ETHER_TYPE_IPV6)
2416 return rte_flow_error_set(error, EINVAL,
2417 RTE_FLOW_ERROR_TYPE_ITEM, item,
2418 "IPv6 cannot follow L2/VLAN layer "
2419 "which ether type is not IPv6");
2420 if (mask && mask->hdr.proto == UINT8_MAX && spec)
2421 next_proto = spec->hdr.proto;
2422 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2423 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2424 return rte_flow_error_set(error, EINVAL,
2425 RTE_FLOW_ERROR_TYPE_ITEM,
2430 if (next_proto == IPPROTO_HOPOPTS ||
2431 next_proto == IPPROTO_ROUTING ||
2432 next_proto == IPPROTO_FRAGMENT ||
2433 next_proto == IPPROTO_ESP ||
2434 next_proto == IPPROTO_AH ||
2435 next_proto == IPPROTO_DSTOPTS)
2436 return rte_flow_error_set(error, EINVAL,
2437 RTE_FLOW_ERROR_TYPE_ITEM, item,
2438 "IPv6 proto (next header) should "
2439 "not be set as extension header");
2440 if (item_flags & MLX5_FLOW_LAYER_IPIP)
2441 return rte_flow_error_set(error, EINVAL,
2442 RTE_FLOW_ERROR_TYPE_ITEM, item,
2443 "wrong tunnel type - IPv4 specified "
2444 "but IPv6 item provided");
2445 if (item_flags & l3m)
2446 return rte_flow_error_set(error, ENOTSUP,
2447 RTE_FLOW_ERROR_TYPE_ITEM, item,
2448 "multiple L3 layers not supported");
2449 else if (item_flags & l4m)
2450 return rte_flow_error_set(error, EINVAL,
2451 RTE_FLOW_ERROR_TYPE_ITEM, item,
2452 "L3 cannot follow an L4 layer.");
2453 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2454 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2455 return rte_flow_error_set(error, EINVAL,
2456 RTE_FLOW_ERROR_TYPE_ITEM, item,
2457 "L3 cannot follow an NVGRE layer.");
2459 mask = &rte_flow_item_ipv6_mask;
2460 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2461 acc_mask ? (const uint8_t *)acc_mask
2462 : (const uint8_t *)&nic_mask,
2463 sizeof(struct rte_flow_item_ipv6),
2464 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2471 * Validate UDP item.
2474 * Item specification.
2475 * @param[in] item_flags
2476 * Bit-fields that holds the items detected until now.
2477 * @param[in] target_protocol
2478 * The next protocol in the previous item.
2479 * @param[in] flow_mask
2480 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2482 * Pointer to error structure.
2485 * 0 on success, a negative errno value otherwise and rte_errno is set.
2488 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2489 uint64_t item_flags,
2490 uint8_t target_protocol,
2491 struct rte_flow_error *error)
2493 const struct rte_flow_item_udp *mask = item->mask;
2494 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2495 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2496 MLX5_FLOW_LAYER_OUTER_L3;
2497 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2498 MLX5_FLOW_LAYER_OUTER_L4;
2501 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2502 return rte_flow_error_set(error, EINVAL,
2503 RTE_FLOW_ERROR_TYPE_ITEM, item,
2504 "protocol filtering not compatible"
2506 if (!(item_flags & l3m))
2507 return rte_flow_error_set(error, EINVAL,
2508 RTE_FLOW_ERROR_TYPE_ITEM, item,
2509 "L3 is mandatory to filter on L4");
2510 if (item_flags & l4m)
2511 return rte_flow_error_set(error, EINVAL,
2512 RTE_FLOW_ERROR_TYPE_ITEM, item,
2513 "multiple L4 layers not supported");
2515 mask = &rte_flow_item_udp_mask;
2516 ret = mlx5_flow_item_acceptable
2517 (item, (const uint8_t *)mask,
2518 (const uint8_t *)&rte_flow_item_udp_mask,
2519 sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2527 * Validate TCP item.
2530 * Item specification.
2531 * @param[in] item_flags
2532 * Bit-fields that holds the items detected until now.
2533 * @param[in] target_protocol
2534 * The next protocol in the previous item.
2536 * Pointer to error structure.
2539 * 0 on success, a negative errno value otherwise and rte_errno is set.
2542 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2543 uint64_t item_flags,
2544 uint8_t target_protocol,
2545 const struct rte_flow_item_tcp *flow_mask,
2546 struct rte_flow_error *error)
2548 const struct rte_flow_item_tcp *mask = item->mask;
2549 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2550 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2551 MLX5_FLOW_LAYER_OUTER_L3;
2552 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2553 MLX5_FLOW_LAYER_OUTER_L4;
2556 MLX5_ASSERT(flow_mask);
2557 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2558 return rte_flow_error_set(error, EINVAL,
2559 RTE_FLOW_ERROR_TYPE_ITEM, item,
2560 "protocol filtering not compatible"
2562 if (!(item_flags & l3m))
2563 return rte_flow_error_set(error, EINVAL,
2564 RTE_FLOW_ERROR_TYPE_ITEM, item,
2565 "L3 is mandatory to filter on L4");
2566 if (item_flags & l4m)
2567 return rte_flow_error_set(error, EINVAL,
2568 RTE_FLOW_ERROR_TYPE_ITEM, item,
2569 "multiple L4 layers not supported");
2571 mask = &rte_flow_item_tcp_mask;
2572 ret = mlx5_flow_item_acceptable
2573 (item, (const uint8_t *)mask,
2574 (const uint8_t *)flow_mask,
2575 sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2583 * Validate VXLAN item.
2586 * Pointer to the Ethernet device structure.
2587 * @param[in] udp_dport
2588 * UDP destination port
2590 * Item specification.
2591 * @param[in] item_flags
2592 * Bit-fields that holds the items detected until now.
2594 * Flow rule attributes.
2596 * Pointer to error structure.
2599 * 0 on success, a negative errno value otherwise and rte_errno is set.
2602 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev,
2604 const struct rte_flow_item *item,
2605 uint64_t item_flags,
2606 const struct rte_flow_attr *attr,
2607 struct rte_flow_error *error)
2609 const struct rte_flow_item_vxlan *spec = item->spec;
2610 const struct rte_flow_item_vxlan *mask = item->mask;
2612 struct mlx5_priv *priv = dev->data->dev_private;
2616 } id = { .vlan_id = 0, };
2617 const struct rte_flow_item_vxlan nic_mask = {
2618 .vni = "\xff\xff\xff",
2621 const struct rte_flow_item_vxlan *valid_mask;
2623 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2624 return rte_flow_error_set(error, ENOTSUP,
2625 RTE_FLOW_ERROR_TYPE_ITEM, item,
2626 "multiple tunnel layers not"
2628 valid_mask = &rte_flow_item_vxlan_mask;
2630 * Verify only UDPv4 is present as defined in
2631 * https://tools.ietf.org/html/rfc7348
2633 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2634 return rte_flow_error_set(error, EINVAL,
2635 RTE_FLOW_ERROR_TYPE_ITEM, item,
2636 "no outer UDP layer found");
2638 mask = &rte_flow_item_vxlan_mask;
2640 if (priv->sh->steering_format_version !=
2641 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 ||
2642 !udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN) {
2643 /* FDB domain & NIC domain non-zero group */
2644 if ((attr->transfer || attr->group) && priv->sh->misc5_cap)
2645 valid_mask = &nic_mask;
2646 /* Group zero in NIC domain */
2647 if (!attr->group && !attr->transfer &&
2648 priv->sh->tunnel_header_0_1)
2649 valid_mask = &nic_mask;
2651 ret = mlx5_flow_item_acceptable
2652 (item, (const uint8_t *)mask,
2653 (const uint8_t *)valid_mask,
2654 sizeof(struct rte_flow_item_vxlan),
2655 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2659 memcpy(&id.vni[1], spec->vni, 3);
2660 memcpy(&id.vni[1], mask->vni, 3);
2662 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2663 return rte_flow_error_set(error, ENOTSUP,
2664 RTE_FLOW_ERROR_TYPE_ITEM, item,
2665 "VXLAN tunnel must be fully defined");
2670 * Validate VXLAN_GPE item.
2673 * Item specification.
2674 * @param[in] item_flags
2675 * Bit-fields that holds the items detected until now.
2677 * Pointer to the private data structure.
2678 * @param[in] target_protocol
2679 * The next protocol in the previous item.
2681 * Pointer to error structure.
2684 * 0 on success, a negative errno value otherwise and rte_errno is set.
2687 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2688 uint64_t item_flags,
2689 struct rte_eth_dev *dev,
2690 struct rte_flow_error *error)
2692 struct mlx5_priv *priv = dev->data->dev_private;
2693 const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2694 const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2699 } id = { .vlan_id = 0, };
2701 if (!priv->config.l3_vxlan_en)
2702 return rte_flow_error_set(error, ENOTSUP,
2703 RTE_FLOW_ERROR_TYPE_ITEM, item,
2704 "L3 VXLAN is not enabled by device"
2705 " parameter and/or not configured in"
2707 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2708 return rte_flow_error_set(error, ENOTSUP,
2709 RTE_FLOW_ERROR_TYPE_ITEM, item,
2710 "multiple tunnel layers not"
2713 * Verify only UDPv4 is present as defined in
2714 * https://tools.ietf.org/html/rfc7348
2716 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2717 return rte_flow_error_set(error, EINVAL,
2718 RTE_FLOW_ERROR_TYPE_ITEM, item,
2719 "no outer UDP layer found");
2721 mask = &rte_flow_item_vxlan_gpe_mask;
2722 ret = mlx5_flow_item_acceptable
2723 (item, (const uint8_t *)mask,
2724 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2725 sizeof(struct rte_flow_item_vxlan_gpe),
2726 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2731 return rte_flow_error_set(error, ENOTSUP,
2732 RTE_FLOW_ERROR_TYPE_ITEM,
2734 "VxLAN-GPE protocol"
2736 memcpy(&id.vni[1], spec->vni, 3);
2737 memcpy(&id.vni[1], mask->vni, 3);
2739 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2740 return rte_flow_error_set(error, ENOTSUP,
2741 RTE_FLOW_ERROR_TYPE_ITEM, item,
2742 "VXLAN-GPE tunnel must be fully"
2747 * Validate GRE Key item.
2750 * Item specification.
2751 * @param[in] item_flags
2752 * Bit flags to mark detected items.
2753 * @param[in] gre_item
2754 * Pointer to gre_item
2756 * Pointer to error structure.
2759 * 0 on success, a negative errno value otherwise and rte_errno is set.
2762 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2763 uint64_t item_flags,
2764 const struct rte_flow_item *gre_item,
2765 struct rte_flow_error *error)
2767 const rte_be32_t *mask = item->mask;
2769 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2770 const struct rte_flow_item_gre *gre_spec;
2771 const struct rte_flow_item_gre *gre_mask;
2773 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2774 return rte_flow_error_set(error, ENOTSUP,
2775 RTE_FLOW_ERROR_TYPE_ITEM, item,
2776 "Multiple GRE key not support");
2777 if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2778 return rte_flow_error_set(error, ENOTSUP,
2779 RTE_FLOW_ERROR_TYPE_ITEM, item,
2780 "No preceding GRE header");
2781 if (item_flags & MLX5_FLOW_LAYER_INNER)
2782 return rte_flow_error_set(error, ENOTSUP,
2783 RTE_FLOW_ERROR_TYPE_ITEM, item,
2784 "GRE key following a wrong item");
2785 gre_mask = gre_item->mask;
2787 gre_mask = &rte_flow_item_gre_mask;
2788 gre_spec = gre_item->spec;
2789 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2790 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2791 return rte_flow_error_set(error, EINVAL,
2792 RTE_FLOW_ERROR_TYPE_ITEM, item,
2793 "Key bit must be on");
2796 mask = &gre_key_default_mask;
2797 ret = mlx5_flow_item_acceptable
2798 (item, (const uint8_t *)mask,
2799 (const uint8_t *)&gre_key_default_mask,
2800 sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2805 * Validate GRE item.
2808 * Item specification.
2809 * @param[in] item_flags
2810 * Bit flags to mark detected items.
2811 * @param[in] target_protocol
2812 * The next protocol in the previous item.
2814 * Pointer to error structure.
2817 * 0 on success, a negative errno value otherwise and rte_errno is set.
2820 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2821 uint64_t item_flags,
2822 uint8_t target_protocol,
2823 struct rte_flow_error *error)
2825 const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2826 const struct rte_flow_item_gre *mask = item->mask;
2828 const struct rte_flow_item_gre nic_mask = {
2829 .c_rsvd0_ver = RTE_BE16(0xB000),
2830 .protocol = RTE_BE16(UINT16_MAX),
2833 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2834 return rte_flow_error_set(error, EINVAL,
2835 RTE_FLOW_ERROR_TYPE_ITEM, item,
2836 "protocol filtering not compatible"
2837 " with this GRE layer");
2838 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2839 return rte_flow_error_set(error, ENOTSUP,
2840 RTE_FLOW_ERROR_TYPE_ITEM, item,
2841 "multiple tunnel layers not"
2843 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2844 return rte_flow_error_set(error, ENOTSUP,
2845 RTE_FLOW_ERROR_TYPE_ITEM, item,
2846 "L3 Layer is missing");
2848 mask = &rte_flow_item_gre_mask;
2849 ret = mlx5_flow_item_acceptable
2850 (item, (const uint8_t *)mask,
2851 (const uint8_t *)&nic_mask,
2852 sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2856 #ifndef HAVE_MLX5DV_DR
2857 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2858 if (spec && (spec->protocol & mask->protocol))
2859 return rte_flow_error_set(error, ENOTSUP,
2860 RTE_FLOW_ERROR_TYPE_ITEM, item,
2861 "without MPLS support the"
2862 " specification cannot be used for"
2870 * Validate Geneve item.
2873 * Item specification.
2874 * @param[in] itemFlags
2875 * Bit-fields that holds the items detected until now.
2877 * Pointer to the private data structure.
2879 * Pointer to error structure.
2882 * 0 on success, a negative errno value otherwise and rte_errno is set.
2886 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2887 uint64_t item_flags,
2888 struct rte_eth_dev *dev,
2889 struct rte_flow_error *error)
2891 struct mlx5_priv *priv = dev->data->dev_private;
2892 const struct rte_flow_item_geneve *spec = item->spec;
2893 const struct rte_flow_item_geneve *mask = item->mask;
2896 uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2897 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2898 const struct rte_flow_item_geneve nic_mask = {
2899 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2900 .vni = "\xff\xff\xff",
2901 .protocol = RTE_BE16(UINT16_MAX),
2904 if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2905 return rte_flow_error_set(error, ENOTSUP,
2906 RTE_FLOW_ERROR_TYPE_ITEM, item,
2907 "L3 Geneve is not enabled by device"
2908 " parameter and/or not configured in"
2910 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2911 return rte_flow_error_set(error, ENOTSUP,
2912 RTE_FLOW_ERROR_TYPE_ITEM, item,
2913 "multiple tunnel layers not"
2916 * Verify only UDPv4 is present as defined in
2917 * https://tools.ietf.org/html/rfc7348
2919 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2920 return rte_flow_error_set(error, EINVAL,
2921 RTE_FLOW_ERROR_TYPE_ITEM, item,
2922 "no outer UDP layer found");
2924 mask = &rte_flow_item_geneve_mask;
2925 ret = mlx5_flow_item_acceptable
2926 (item, (const uint8_t *)mask,
2927 (const uint8_t *)&nic_mask,
2928 sizeof(struct rte_flow_item_geneve),
2929 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2933 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2934 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2935 MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2936 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2937 return rte_flow_error_set(error, ENOTSUP,
2938 RTE_FLOW_ERROR_TYPE_ITEM,
2940 "Geneve protocol unsupported"
2941 " fields are being used");
2942 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2943 return rte_flow_error_set
2945 RTE_FLOW_ERROR_TYPE_ITEM,
2947 "Unsupported Geneve options length");
2949 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2950 return rte_flow_error_set
2952 RTE_FLOW_ERROR_TYPE_ITEM, item,
2953 "Geneve tunnel must be fully defined");
2958 * Validate Geneve TLV option item.
2961 * Item specification.
2962 * @param[in] last_item
2963 * Previous validated item in the pattern items.
2964 * @param[in] geneve_item
2965 * Previous GENEVE item specification.
2967 * Pointer to the rte_eth_dev structure.
2969 * Pointer to error structure.
2972 * 0 on success, a negative errno value otherwise and rte_errno is set.
2975 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2977 const struct rte_flow_item *geneve_item,
2978 struct rte_eth_dev *dev,
2979 struct rte_flow_error *error)
2981 struct mlx5_priv *priv = dev->data->dev_private;
2982 struct mlx5_dev_ctx_shared *sh = priv->sh;
2983 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2984 struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2985 uint8_t data_max_supported =
2986 hca_attr->max_geneve_tlv_option_data_len * 4;
2987 struct mlx5_dev_config *config = &priv->config;
2988 const struct rte_flow_item_geneve *geneve_spec;
2989 const struct rte_flow_item_geneve *geneve_mask;
2990 const struct rte_flow_item_geneve_opt *spec = item->spec;
2991 const struct rte_flow_item_geneve_opt *mask = item->mask;
2993 unsigned int data_len;
2994 uint8_t tlv_option_len;
2995 uint16_t optlen_m, optlen_v;
2996 const struct rte_flow_item_geneve_opt full_mask = {
2997 .option_class = RTE_BE16(0xffff),
2998 .option_type = 0xff,
3003 mask = &rte_flow_item_geneve_opt_mask;
3005 return rte_flow_error_set
3006 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3007 "Geneve TLV opt class/type/length must be specified");
3008 if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
3009 return rte_flow_error_set
3010 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3011 "Geneve TLV opt length exceeeds the limit (31)");
3012 /* Check if class type and length masks are full. */
3013 if (full_mask.option_class != mask->option_class ||
3014 full_mask.option_type != mask->option_type ||
3015 full_mask.option_len != (mask->option_len & full_mask.option_len))
3016 return rte_flow_error_set
3017 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3018 "Geneve TLV opt class/type/length masks must be full");
3019 /* Check if length is supported */
3020 if ((uint32_t)spec->option_len >
3021 config->hca_attr.max_geneve_tlv_option_data_len)
3022 return rte_flow_error_set
3023 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3024 "Geneve TLV opt length not supported");
3025 if (config->hca_attr.max_geneve_tlv_options > 1)
3027 "max_geneve_tlv_options supports more than 1 option");
3028 /* Check GENEVE item preceding. */
3029 if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
3030 return rte_flow_error_set
3031 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3032 "Geneve opt item must be preceded with Geneve item");
3033 geneve_spec = geneve_item->spec;
3034 geneve_mask = geneve_item->mask ? geneve_item->mask :
3035 &rte_flow_item_geneve_mask;
3036 /* Check if GENEVE TLV option size doesn't exceed option length */
3037 if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
3038 geneve_spec->ver_opt_len_o_c_rsvd0)) {
3039 tlv_option_len = spec->option_len & mask->option_len;
3040 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
3041 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
3042 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
3043 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
3044 if ((optlen_v & optlen_m) <= tlv_option_len)
3045 return rte_flow_error_set
3046 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3047 "GENEVE TLV option length exceeds optlen");
3049 /* Check if length is 0 or data is 0. */
3050 if (spec->data == NULL || spec->option_len == 0)
3051 return rte_flow_error_set
3052 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3053 "Geneve TLV opt with zero data/length not supported");
3054 /* Check not all data & mask are 0. */
3055 data_len = spec->option_len * 4;
3056 if (mask->data == NULL) {
3057 for (i = 0; i < data_len; i++)
3061 return rte_flow_error_set(error, ENOTSUP,
3062 RTE_FLOW_ERROR_TYPE_ITEM, item,
3063 "Can't match on Geneve option data 0");
3065 for (i = 0; i < data_len; i++)
3066 if (spec->data[i] & mask->data[i])
3069 return rte_flow_error_set(error, ENOTSUP,
3070 RTE_FLOW_ERROR_TYPE_ITEM, item,
3071 "Can't match on Geneve option data and mask 0");
3072 /* Check data mask supported. */
3073 for (i = data_max_supported; i < data_len ; i++)
3075 return rte_flow_error_set(error, ENOTSUP,
3076 RTE_FLOW_ERROR_TYPE_ITEM, item,
3077 "Data mask is of unsupported size");
3079 /* Check GENEVE option is supported in NIC. */
3080 if (!config->hca_attr.geneve_tlv_opt)
3081 return rte_flow_error_set
3082 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3083 "Geneve TLV opt not supported");
3084 /* Check if we already have geneve option with different type/class. */
3085 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
3086 geneve_opt_resource = sh->geneve_tlv_option_resource;
3087 if (geneve_opt_resource != NULL)
3088 if (geneve_opt_resource->option_class != spec->option_class ||
3089 geneve_opt_resource->option_type != spec->option_type ||
3090 geneve_opt_resource->length != spec->option_len) {
3091 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3092 return rte_flow_error_set(error, ENOTSUP,
3093 RTE_FLOW_ERROR_TYPE_ITEM, item,
3094 "Only one Geneve TLV option supported");
3096 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3101 * Validate MPLS item.
3104 * Pointer to the rte_eth_dev structure.
3106 * Item specification.
3107 * @param[in] item_flags
3108 * Bit-fields that holds the items detected until now.
3109 * @param[in] prev_layer
3110 * The protocol layer indicated in previous item.
3112 * Pointer to error structure.
3115 * 0 on success, a negative errno value otherwise and rte_errno is set.
3118 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
3119 const struct rte_flow_item *item __rte_unused,
3120 uint64_t item_flags __rte_unused,
3121 uint64_t prev_layer __rte_unused,
3122 struct rte_flow_error *error)
3124 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
3125 const struct rte_flow_item_mpls *mask = item->mask;
3126 struct mlx5_priv *priv = dev->data->dev_private;
3129 if (!priv->config.mpls_en)
3130 return rte_flow_error_set(error, ENOTSUP,
3131 RTE_FLOW_ERROR_TYPE_ITEM, item,
3132 "MPLS not supported or"
3133 " disabled in firmware"
3135 /* MPLS over UDP, GRE is allowed */
3136 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |
3137 MLX5_FLOW_LAYER_GRE |
3138 MLX5_FLOW_LAYER_GRE_KEY)))
3139 return rte_flow_error_set(error, EINVAL,
3140 RTE_FLOW_ERROR_TYPE_ITEM, item,
3141 "protocol filtering not compatible"
3142 " with MPLS layer");
3143 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
3144 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
3145 !(item_flags & MLX5_FLOW_LAYER_GRE))
3146 return rte_flow_error_set(error, ENOTSUP,
3147 RTE_FLOW_ERROR_TYPE_ITEM, item,
3148 "multiple tunnel layers not"
3151 mask = &rte_flow_item_mpls_mask;
3152 ret = mlx5_flow_item_acceptable
3153 (item, (const uint8_t *)mask,
3154 (const uint8_t *)&rte_flow_item_mpls_mask,
3155 sizeof(struct rte_flow_item_mpls),
3156 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3161 return rte_flow_error_set(error, ENOTSUP,
3162 RTE_FLOW_ERROR_TYPE_ITEM, item,
3163 "MPLS is not supported by Verbs, please"
3169 * Validate NVGRE item.
3172 * Item specification.
3173 * @param[in] item_flags
3174 * Bit flags to mark detected items.
3175 * @param[in] target_protocol
3176 * The next protocol in the previous item.
3178 * Pointer to error structure.
3181 * 0 on success, a negative errno value otherwise and rte_errno is set.
3184 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
3185 uint64_t item_flags,
3186 uint8_t target_protocol,
3187 struct rte_flow_error *error)
3189 const struct rte_flow_item_nvgre *mask = item->mask;
3192 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3193 return rte_flow_error_set(error, EINVAL,
3194 RTE_FLOW_ERROR_TYPE_ITEM, item,
3195 "protocol filtering not compatible"
3196 " with this GRE layer");
3197 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3198 return rte_flow_error_set(error, ENOTSUP,
3199 RTE_FLOW_ERROR_TYPE_ITEM, item,
3200 "multiple tunnel layers not"
3202 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3203 return rte_flow_error_set(error, ENOTSUP,
3204 RTE_FLOW_ERROR_TYPE_ITEM, item,
3205 "L3 Layer is missing");
3207 mask = &rte_flow_item_nvgre_mask;
3208 ret = mlx5_flow_item_acceptable
3209 (item, (const uint8_t *)mask,
3210 (const uint8_t *)&rte_flow_item_nvgre_mask,
3211 sizeof(struct rte_flow_item_nvgre),
3212 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3219 * Validate eCPRI item.
3222 * Item specification.
3223 * @param[in] item_flags
3224 * Bit-fields that holds the items detected until now.
3225 * @param[in] last_item
3226 * Previous validated item in the pattern items.
3227 * @param[in] ether_type
3228 * Type in the ethernet layer header (including dot1q).
3229 * @param[in] acc_mask
3230 * Acceptable mask, if NULL default internal default mask
3231 * will be used to check whether item fields are supported.
3233 * Pointer to error structure.
3236 * 0 on success, a negative errno value otherwise and rte_errno is set.
3239 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
3240 uint64_t item_flags,
3242 uint16_t ether_type,
3243 const struct rte_flow_item_ecpri *acc_mask,
3244 struct rte_flow_error *error)
3246 const struct rte_flow_item_ecpri *mask = item->mask;
3247 const struct rte_flow_item_ecpri nic_mask = {
3251 RTE_BE32(((const struct rte_ecpri_common_hdr) {
3255 .dummy[0] = 0xFFFFFFFF,
3258 const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
3259 MLX5_FLOW_LAYER_OUTER_VLAN);
3260 struct rte_flow_item_ecpri mask_lo;
3262 if (!(last_item & outer_l2_vlan) &&
3263 last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
3264 return rte_flow_error_set(error, EINVAL,
3265 RTE_FLOW_ERROR_TYPE_ITEM, item,
3266 "eCPRI can only follow L2/VLAN layer or UDP layer");
3267 if ((last_item & outer_l2_vlan) && ether_type &&
3268 ether_type != RTE_ETHER_TYPE_ECPRI)
3269 return rte_flow_error_set(error, EINVAL,
3270 RTE_FLOW_ERROR_TYPE_ITEM, item,
3271 "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
3272 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3273 return rte_flow_error_set(error, EINVAL,
3274 RTE_FLOW_ERROR_TYPE_ITEM, item,
3275 "eCPRI with tunnel is not supported right now");
3276 if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3277 return rte_flow_error_set(error, ENOTSUP,
3278 RTE_FLOW_ERROR_TYPE_ITEM, item,
3279 "multiple L3 layers not supported");
3280 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3281 return rte_flow_error_set(error, EINVAL,
3282 RTE_FLOW_ERROR_TYPE_ITEM, item,
3283 "eCPRI cannot coexist with a TCP layer");
3284 /* In specification, eCPRI could be over UDP layer. */
3285 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3286 return rte_flow_error_set(error, EINVAL,
3287 RTE_FLOW_ERROR_TYPE_ITEM, item,
3288 "eCPRI over UDP layer is not yet supported right now");
3289 /* Mask for type field in common header could be zero. */
3291 mask = &rte_flow_item_ecpri_mask;
3292 mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3293 /* Input mask is in big-endian format. */
3294 if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3295 return rte_flow_error_set(error, EINVAL,
3296 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3297 "partial mask is not supported for protocol");
3298 else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3299 return rte_flow_error_set(error, EINVAL,
3300 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3301 "message header mask must be after a type mask");
3302 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3303 acc_mask ? (const uint8_t *)acc_mask
3304 : (const uint8_t *)&nic_mask,
3305 sizeof(struct rte_flow_item_ecpri),
3306 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3310 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3311 const struct rte_flow_attr *attr __rte_unused,
3312 const struct rte_flow_item items[] __rte_unused,
3313 const struct rte_flow_action actions[] __rte_unused,
3314 bool external __rte_unused,
3315 int hairpin __rte_unused,
3316 struct rte_flow_error *error)
3318 return rte_flow_error_set(error, ENOTSUP,
3319 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3322 static struct mlx5_flow *
3323 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3324 const struct rte_flow_attr *attr __rte_unused,
3325 const struct rte_flow_item items[] __rte_unused,
3326 const struct rte_flow_action actions[] __rte_unused,
3327 struct rte_flow_error *error)
3329 rte_flow_error_set(error, ENOTSUP,
3330 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3335 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3336 struct mlx5_flow *dev_flow __rte_unused,
3337 const struct rte_flow_attr *attr __rte_unused,
3338 const struct rte_flow_item items[] __rte_unused,
3339 const struct rte_flow_action actions[] __rte_unused,
3340 struct rte_flow_error *error)
3342 return rte_flow_error_set(error, ENOTSUP,
3343 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3347 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3348 struct rte_flow *flow __rte_unused,
3349 struct rte_flow_error *error)
3351 return rte_flow_error_set(error, ENOTSUP,
3352 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3356 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3357 struct rte_flow *flow __rte_unused)
3362 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3363 struct rte_flow *flow __rte_unused)
3368 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3369 struct rte_flow *flow __rte_unused,
3370 const struct rte_flow_action *actions __rte_unused,
3371 void *data __rte_unused,
3372 struct rte_flow_error *error)
3374 return rte_flow_error_set(error, ENOTSUP,
3375 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3379 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3380 uint32_t domains __rte_unused,
3381 uint32_t flags __rte_unused)
3386 /* Void driver to protect from null pointer reference. */
3387 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3388 .validate = flow_null_validate,
3389 .prepare = flow_null_prepare,
3390 .translate = flow_null_translate,
3391 .apply = flow_null_apply,
3392 .remove = flow_null_remove,
3393 .destroy = flow_null_destroy,
3394 .query = flow_null_query,
3395 .sync_domain = flow_null_sync_domain,
3399 * Select flow driver type according to flow attributes and device
3403 * Pointer to the dev structure.
3405 * Pointer to the flow attributes.
3408 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3410 static enum mlx5_flow_drv_type
3411 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3413 struct mlx5_priv *priv = dev->data->dev_private;
3414 /* The OS can determine first a specific flow type (DV, VERBS) */
3415 enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3417 if (type != MLX5_FLOW_TYPE_MAX)
3419 /* If no OS specific type - continue with DV/VERBS selection */
3420 if (attr->transfer && priv->config.dv_esw_en)
3421 type = MLX5_FLOW_TYPE_DV;
3422 if (!attr->transfer)
3423 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3424 MLX5_FLOW_TYPE_VERBS;
3428 #define flow_get_drv_ops(type) flow_drv_ops[type]
3431 * Flow driver validation API. This abstracts calling driver specific functions.
3432 * The type of flow driver is determined according to flow attributes.
3435 * Pointer to the dev structure.
3437 * Pointer to the flow attributes.
3439 * Pointer to the list of items.
3440 * @param[in] actions
3441 * Pointer to the list of actions.
3442 * @param[in] external
3443 * This flow rule is created by request external to PMD.
3444 * @param[in] hairpin
3445 * Number of hairpin TX actions, 0 means classic flow.
3447 * Pointer to the error structure.
3450 * 0 on success, a negative errno value otherwise and rte_errno is set.
3453 flow_drv_validate(struct rte_eth_dev *dev,
3454 const struct rte_flow_attr *attr,
3455 const struct rte_flow_item items[],
3456 const struct rte_flow_action actions[],
3457 bool external, int hairpin, struct rte_flow_error *error)
3459 const struct mlx5_flow_driver_ops *fops;
3460 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3462 fops = flow_get_drv_ops(type);
3463 return fops->validate(dev, attr, items, actions, external,
3468 * Flow driver preparation API. This abstracts calling driver specific
3469 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3470 * calculates the size of memory required for device flow, allocates the memory,
3471 * initializes the device flow and returns the pointer.
3474 * This function initializes device flow structure such as dv or verbs in
3475 * struct mlx5_flow. However, it is caller's responsibility to initialize the
3476 * rest. For example, adding returning device flow to flow->dev_flow list and
3477 * setting backward reference to the flow should be done out of this function.
3478 * layers field is not filled either.
3481 * Pointer to the dev structure.
3483 * Pointer to the flow attributes.
3485 * Pointer to the list of items.
3486 * @param[in] actions
3487 * Pointer to the list of actions.
3488 * @param[in] flow_idx
3489 * This memory pool index to the flow.
3491 * Pointer to the error structure.
3494 * Pointer to device flow on success, otherwise NULL and rte_errno is set.
3496 static inline struct mlx5_flow *
3497 flow_drv_prepare(struct rte_eth_dev *dev,
3498 const struct rte_flow *flow,
3499 const struct rte_flow_attr *attr,
3500 const struct rte_flow_item items[],
3501 const struct rte_flow_action actions[],
3503 struct rte_flow_error *error)
3505 const struct mlx5_flow_driver_ops *fops;
3506 enum mlx5_flow_drv_type type = flow->drv_type;
3507 struct mlx5_flow *mlx5_flow = NULL;
3509 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3510 fops = flow_get_drv_ops(type);
3511 mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3513 mlx5_flow->flow_idx = flow_idx;
3518 * Flow driver translation API. This abstracts calling driver specific
3519 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3520 * translates a generic flow into a driver flow. flow_drv_prepare() must
3524 * dev_flow->layers could be filled as a result of parsing during translation
3525 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3526 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3527 * flow->actions could be overwritten even though all the expanded dev_flows
3528 * have the same actions.
3531 * Pointer to the rte dev structure.
3532 * @param[in, out] dev_flow
3533 * Pointer to the mlx5 flow.
3535 * Pointer to the flow attributes.
3537 * Pointer to the list of items.
3538 * @param[in] actions
3539 * Pointer to the list of actions.
3541 * Pointer to the error structure.
3544 * 0 on success, a negative errno value otherwise and rte_errno is set.
3547 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3548 const struct rte_flow_attr *attr,
3549 const struct rte_flow_item items[],
3550 const struct rte_flow_action actions[],
3551 struct rte_flow_error *error)
3553 const struct mlx5_flow_driver_ops *fops;
3554 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3556 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3557 fops = flow_get_drv_ops(type);
3558 return fops->translate(dev, dev_flow, attr, items, actions, error);
3562 * Flow driver apply API. This abstracts calling driver specific functions.
3563 * Parent flow (rte_flow) should have driver type (drv_type). It applies
3564 * translated driver flows on to device. flow_drv_translate() must precede.
3567 * Pointer to Ethernet device structure.
3568 * @param[in, out] flow
3569 * Pointer to flow structure.
3571 * Pointer to error structure.
3574 * 0 on success, a negative errno value otherwise and rte_errno is set.
3577 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3578 struct rte_flow_error *error)
3580 const struct mlx5_flow_driver_ops *fops;
3581 enum mlx5_flow_drv_type type = flow->drv_type;
3583 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3584 fops = flow_get_drv_ops(type);
3585 return fops->apply(dev, flow, error);
3589 * Flow driver destroy API. This abstracts calling driver specific functions.
3590 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3591 * on device and releases resources of the flow.
3594 * Pointer to Ethernet device.
3595 * @param[in, out] flow
3596 * Pointer to flow structure.
3599 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3601 const struct mlx5_flow_driver_ops *fops;
3602 enum mlx5_flow_drv_type type = flow->drv_type;
3604 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3605 fops = flow_get_drv_ops(type);
3606 fops->destroy(dev, flow);
3610 * Flow driver find RSS policy tbl API. This abstracts calling driver
3611 * specific functions. Parent flow (rte_flow) should have driver
3612 * type (drv_type). It will find the RSS policy table that has the rss_desc.
3615 * Pointer to Ethernet device.
3616 * @param[in, out] flow
3617 * Pointer to flow structure.
3619 * Pointer to meter policy table.
3620 * @param[in] rss_desc
3621 * Pointer to rss_desc
3623 static struct mlx5_flow_meter_sub_policy *
3624 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3625 struct rte_flow *flow,
3626 struct mlx5_flow_meter_policy *policy,
3627 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3629 const struct mlx5_flow_driver_ops *fops;
3630 enum mlx5_flow_drv_type type = flow->drv_type;
3632 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3633 fops = flow_get_drv_ops(type);
3634 return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3638 * Flow driver color tag rule API. This abstracts calling driver
3639 * specific functions. Parent flow (rte_flow) should have driver
3640 * type (drv_type). It will create the color tag rules in hierarchy meter.
3643 * Pointer to Ethernet device.
3644 * @param[in, out] flow
3645 * Pointer to flow structure.
3647 * Pointer to flow meter structure.
3648 * @param[in] src_port
3649 * The src port this extra rule should use.
3651 * The src port id match item.
3653 * Pointer to error structure.
3656 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev,
3657 struct rte_flow *flow,
3658 struct mlx5_flow_meter_info *fm,
3660 const struct rte_flow_item *item,
3661 struct rte_flow_error *error)
3663 const struct mlx5_flow_driver_ops *fops;
3664 enum mlx5_flow_drv_type type = flow->drv_type;
3666 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3667 fops = flow_get_drv_ops(type);
3668 return fops->meter_hierarchy_rule_create(dev, fm,
3669 src_port, item, error);
3673 * Get RSS action from the action list.
3676 * Pointer to Ethernet device.
3677 * @param[in] actions
3678 * Pointer to the list of actions.
3680 * Parent flow structure pointer.
3683 * Pointer to the RSS action if exist, else return NULL.
3685 static const struct rte_flow_action_rss*
3686 flow_get_rss_action(struct rte_eth_dev *dev,
3687 const struct rte_flow_action actions[])
3689 struct mlx5_priv *priv = dev->data->dev_private;
3690 const struct rte_flow_action_rss *rss = NULL;
3691 struct mlx5_meter_policy_action_container *acg;
3692 struct mlx5_meter_policy_action_container *acy;
3694 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3695 switch (actions->type) {
3696 case RTE_FLOW_ACTION_TYPE_RSS:
3697 rss = actions->conf;
3699 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3701 const struct rte_flow_action_sample *sample =
3703 const struct rte_flow_action *act = sample->actions;
3704 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3705 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3709 case RTE_FLOW_ACTION_TYPE_METER:
3712 struct mlx5_flow_meter_info *fm;
3713 struct mlx5_flow_meter_policy *policy;
3714 const struct rte_flow_action_meter *mtr = actions->conf;
3716 fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3717 if (fm && !fm->def_policy) {
3718 policy = mlx5_flow_meter_policy_find(dev,
3719 fm->policy_id, NULL);
3720 MLX5_ASSERT(policy);
3721 if (policy->is_hierarchy) {
3723 mlx5_flow_meter_hierarchy_get_final_policy(dev,
3728 if (policy->is_rss) {
3730 &policy->act_cnt[RTE_COLOR_GREEN];
3732 &policy->act_cnt[RTE_COLOR_YELLOW];
3733 if (acg->fate_action ==
3734 MLX5_FLOW_FATE_SHARED_RSS)
3735 rss = acg->rss->conf;
3736 else if (acy->fate_action ==
3737 MLX5_FLOW_FATE_SHARED_RSS)
3738 rss = acy->rss->conf;
3751 * Get ASO age action by index.
3754 * Pointer to the Ethernet device structure.
3755 * @param[in] age_idx
3756 * Index to the ASO age action.
3759 * The specified ASO age action.
3761 struct mlx5_aso_age_action*
3762 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3764 uint16_t pool_idx = age_idx & UINT16_MAX;
3765 uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3766 struct mlx5_priv *priv = dev->data->dev_private;
3767 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3768 struct mlx5_aso_age_pool *pool;
3770 rte_rwlock_read_lock(&mng->resize_rwl);
3771 pool = mng->pools[pool_idx];
3772 rte_rwlock_read_unlock(&mng->resize_rwl);
3773 return &pool->actions[offset - 1];
3776 /* maps indirect action to translated direct in some actions array */
3777 struct mlx5_translated_action_handle {
3778 struct rte_flow_action_handle *action; /**< Indirect action handle. */
3779 int index; /**< Index in related array of rte_flow_action. */
3783 * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
3784 * direct action if translation possible.
3785 * This functionality used to run same execution path for both direct and
3786 * indirect actions on flow create. All necessary preparations for indirect
3787 * action handling should be performed on *handle* actions list returned
3791 * Pointer to Ethernet device.
3792 * @param[in] actions
3793 * List of actions to translate.
3794 * @param[out] handle
3795 * List to store translated indirect action object handles.
3796 * @param[in, out] indir_n
3797 * Size of *handle* array. On return should be updated with number of
3798 * indirect actions retrieved from the *actions* list.
3799 * @param[out] translated_actions
3800 * List of actions where all indirect actions were translated to direct
3801 * if possible. NULL if no translation took place.
3803 * Pointer to the error structure.
3806 * 0 on success, a negative errno value otherwise and rte_errno is set.
3809 flow_action_handles_translate(struct rte_eth_dev *dev,
3810 const struct rte_flow_action actions[],
3811 struct mlx5_translated_action_handle *handle,
3813 struct rte_flow_action **translated_actions,
3814 struct rte_flow_error *error)
3816 struct mlx5_priv *priv = dev->data->dev_private;
3817 struct rte_flow_action *translated = NULL;
3818 size_t actions_size;
3821 struct mlx5_translated_action_handle *handle_end = NULL;
3823 for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3824 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
3826 if (copied_n == *indir_n) {
3827 return rte_flow_error_set
3828 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3829 NULL, "too many shared actions");
3831 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
3832 sizeof(actions[n].conf));
3833 handle[copied_n].index = n;
3837 *indir_n = copied_n;
3840 actions_size = sizeof(struct rte_flow_action) * n;
3841 translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3846 memcpy(translated, actions, actions_size);
3847 for (handle_end = handle + copied_n; handle < handle_end; handle++) {
3848 struct mlx5_shared_action_rss *shared_rss;
3849 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3850 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3851 uint32_t idx = act_idx &
3852 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3855 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3856 shared_rss = mlx5_ipool_get
3857 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3858 translated[handle->index].type =
3859 RTE_FLOW_ACTION_TYPE_RSS;
3860 translated[handle->index].conf =
3861 &shared_rss->origin;
3863 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
3864 translated[handle->index].type =
3865 (enum rte_flow_action_type)
3866 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
3867 translated[handle->index].conf = (void *)(uintptr_t)idx;
3869 case MLX5_INDIRECT_ACTION_TYPE_AGE:
3870 if (priv->sh->flow_hit_aso_en) {
3871 translated[handle->index].type =
3872 (enum rte_flow_action_type)
3873 MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3874 translated[handle->index].conf =
3875 (void *)(uintptr_t)idx;
3879 case MLX5_INDIRECT_ACTION_TYPE_CT:
3880 if (priv->sh->ct_aso_en) {
3881 translated[handle->index].type =
3882 RTE_FLOW_ACTION_TYPE_CONNTRACK;
3883 translated[handle->index].conf =
3884 (void *)(uintptr_t)idx;
3889 mlx5_free(translated);
3890 return rte_flow_error_set
3891 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3892 NULL, "invalid indirect action type");
3895 *translated_actions = translated;
3900 * Get Shared RSS action from the action list.
3903 * Pointer to Ethernet device.
3905 * Pointer to the list of actions.
3906 * @param[in] shared_n
3907 * Actions list length.
3910 * The MLX5 RSS action ID if exists, otherwise return 0.
3913 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3914 struct mlx5_translated_action_handle *handle,
3917 struct mlx5_translated_action_handle *handle_end;
3918 struct mlx5_priv *priv = dev->data->dev_private;
3919 struct mlx5_shared_action_rss *shared_rss;
3922 for (handle_end = handle + shared_n; handle < handle_end; handle++) {
3923 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3924 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3925 uint32_t idx = act_idx &
3926 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3928 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3929 shared_rss = mlx5_ipool_get
3930 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3932 __atomic_add_fetch(&shared_rss->refcnt, 1,
3943 find_graph_root(uint32_t rss_level)
3945 return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3946 MLX5_EXPANSION_ROOT_OUTER;
3950 * Get layer flags from the prefix flow.
3952 * Some flows may be split to several subflows, the prefix subflow gets the
3953 * match items and the suffix sub flow gets the actions.
3954 * Some actions need the user defined match item flags to get the detail for
3956 * This function helps the suffix flow to get the item layer flags from prefix
3959 * @param[in] dev_flow
3960 * Pointer the created preifx subflow.
3963 * The layers get from prefix subflow.
3965 static inline uint64_t
3966 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3968 uint64_t layers = 0;
3971 * Layers bits could be localization, but usually the compiler will
3972 * help to do the optimization work for source code.
3973 * If no decap actions, use the layers directly.
3975 if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3976 return dev_flow->handle->layers;
3977 /* Convert L3 layers with decap action. */
3978 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3979 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3980 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3981 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3982 /* Convert L4 layers with decap action. */
3983 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3984 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3985 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3986 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3991 * Get metadata split action information.
3993 * @param[in] actions
3994 * Pointer to the list of actions.
3996 * Pointer to the return pointer.
3997 * @param[out] qrss_type
3998 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3999 * if no QUEUE/RSS is found.
4000 * @param[out] encap_idx
4001 * Pointer to the index of the encap action if exists, otherwise the last
4005 * Total number of actions.
4008 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
4009 const struct rte_flow_action **qrss,
4012 const struct rte_flow_action_raw_encap *raw_encap;
4014 int raw_decap_idx = -1;
4017 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4018 switch (actions->type) {
4019 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4020 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4021 *encap_idx = actions_n;
4023 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4024 raw_decap_idx = actions_n;
4026 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4027 raw_encap = actions->conf;
4028 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4029 *encap_idx = raw_decap_idx != -1 ?
4030 raw_decap_idx : actions_n;
4032 case RTE_FLOW_ACTION_TYPE_QUEUE:
4033 case RTE_FLOW_ACTION_TYPE_RSS:
4041 if (*encap_idx == -1)
4042 *encap_idx = actions_n;
4043 /* Count RTE_FLOW_ACTION_TYPE_END. */
4044 return actions_n + 1;
4048 * Check if the action will change packet.
4051 * Pointer to Ethernet device.
4056 * true if action will change packet, false otherwise.
4058 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
4059 enum rte_flow_action_type type)
4061 struct mlx5_priv *priv = dev->data->dev_private;
4064 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4065 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4066 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4067 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4068 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4069 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4070 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4071 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4072 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4073 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4074 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4075 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4076 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4077 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4078 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4079 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
4080 case RTE_FLOW_ACTION_TYPE_SET_META:
4081 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4082 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4083 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4084 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4085 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4086 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4087 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4088 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4089 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4090 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4091 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4092 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
4094 case RTE_FLOW_ACTION_TYPE_FLAG:
4095 case RTE_FLOW_ACTION_TYPE_MARK:
4096 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
4106 * Check meter action from the action list.
4109 * Pointer to Ethernet device.
4110 * @param[in] actions
4111 * Pointer to the list of actions.
4112 * @param[out] has_mtr
4113 * Pointer to the meter exist flag.
4114 * @param[out] has_modify
4115 * Pointer to the flag showing there's packet change action.
4116 * @param[out] meter_id
4117 * Pointer to the meter id.
4120 * Total number of actions.
4123 flow_check_meter_action(struct rte_eth_dev *dev,
4124 const struct rte_flow_action actions[],
4125 bool *has_mtr, bool *has_modify, uint32_t *meter_id)
4127 const struct rte_flow_action_meter *mtr = NULL;
4130 MLX5_ASSERT(has_mtr);
4132 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4133 switch (actions->type) {
4134 case RTE_FLOW_ACTION_TYPE_METER:
4135 mtr = actions->conf;
4136 *meter_id = mtr->mtr_id;
4143 *has_modify |= flow_check_modify_action_type(dev,
4147 /* Count RTE_FLOW_ACTION_TYPE_END. */
4148 return actions_n + 1;
4152 * Check if the flow should be split due to hairpin.
4153 * The reason for the split is that in current HW we can't
4154 * support encap and push-vlan on Rx, so if a flow contains
4155 * these actions we move it to Tx.
4158 * Pointer to Ethernet device.
4160 * Flow rule attributes.
4161 * @param[in] actions
4162 * Associated actions (list terminated by the END action).
4165 * > 0 the number of actions and the flow should be split,
4166 * 0 when no split required.
4169 flow_check_hairpin_split(struct rte_eth_dev *dev,
4170 const struct rte_flow_attr *attr,
4171 const struct rte_flow_action actions[])
4173 int queue_action = 0;
4176 const struct rte_flow_action_queue *queue;
4177 const struct rte_flow_action_rss *rss;
4178 const struct rte_flow_action_raw_encap *raw_encap;
4179 const struct rte_eth_hairpin_conf *conf;
4183 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4184 switch (actions->type) {
4185 case RTE_FLOW_ACTION_TYPE_QUEUE:
4186 queue = actions->conf;
4189 conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
4190 if (conf == NULL || conf->tx_explicit != 0)
4195 case RTE_FLOW_ACTION_TYPE_RSS:
4196 rss = actions->conf;
4197 if (rss == NULL || rss->queue_num == 0)
4199 conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
4200 if (conf == NULL || conf->tx_explicit != 0)
4205 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4206 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4207 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4208 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4209 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4213 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4214 raw_encap = actions->conf;
4215 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4224 if (split && queue_action)
4229 /* Declare flow create/destroy prototype in advance. */
4231 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4232 const struct rte_flow_attr *attr,
4233 const struct rte_flow_item items[],
4234 const struct rte_flow_action actions[],
4235 bool external, struct rte_flow_error *error);
4238 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4242 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused,
4243 struct mlx5_list_entry *entry, void *cb_ctx)
4245 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4246 struct mlx5_flow_mreg_copy_resource *mcp_res =
4247 container_of(entry, typeof(*mcp_res), hlist_ent);
4249 return mcp_res->mark_id != *(uint32_t *)(ctx->data);
4252 struct mlx5_list_entry *
4253 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx)
4255 struct rte_eth_dev *dev = tool_ctx;
4256 struct mlx5_priv *priv = dev->data->dev_private;
4257 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4258 struct mlx5_flow_mreg_copy_resource *mcp_res;
4259 struct rte_flow_error *error = ctx->error;
4262 uint32_t mark_id = *(uint32_t *)(ctx->data);
4263 struct rte_flow_attr attr = {
4264 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4267 struct mlx5_rte_flow_item_tag tag_spec = {
4270 struct rte_flow_item items[] = {
4271 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
4273 struct rte_flow_action_mark ftag = {
4276 struct mlx5_flow_action_copy_mreg cp_mreg = {
4280 struct rte_flow_action_jump jump = {
4281 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4283 struct rte_flow_action actions[] = {
4284 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
4287 /* Fill the register fileds in the flow. */
4288 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
4292 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4296 /* Provide the full width of FLAG specific value. */
4297 if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
4298 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
4299 /* Build a new flow. */
4300 if (mark_id != MLX5_DEFAULT_COPY_ID) {
4301 items[0] = (struct rte_flow_item){
4302 .type = (enum rte_flow_item_type)
4303 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4306 items[1] = (struct rte_flow_item){
4307 .type = RTE_FLOW_ITEM_TYPE_END,
4309 actions[0] = (struct rte_flow_action){
4310 .type = (enum rte_flow_action_type)
4311 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4314 actions[1] = (struct rte_flow_action){
4315 .type = (enum rte_flow_action_type)
4316 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4319 actions[2] = (struct rte_flow_action){
4320 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4323 actions[3] = (struct rte_flow_action){
4324 .type = RTE_FLOW_ACTION_TYPE_END,
4327 /* Default rule, wildcard match. */
4328 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4329 items[0] = (struct rte_flow_item){
4330 .type = RTE_FLOW_ITEM_TYPE_END,
4332 actions[0] = (struct rte_flow_action){
4333 .type = (enum rte_flow_action_type)
4334 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4337 actions[1] = (struct rte_flow_action){
4338 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4341 actions[2] = (struct rte_flow_action){
4342 .type = RTE_FLOW_ACTION_TYPE_END,
4345 /* Build a new entry. */
4346 mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4352 mcp_res->mark_id = mark_id;
4354 * The copy Flows are not included in any list. There
4355 * ones are referenced from other Flows and can not
4356 * be applied, removed, deleted in ardbitrary order
4357 * by list traversing.
4359 mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP,
4360 &attr, items, actions, false, error);
4361 if (!mcp_res->rix_flow) {
4362 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4365 return &mcp_res->hlist_ent;
4368 struct mlx5_list_entry *
4369 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
4370 void *cb_ctx __rte_unused)
4372 struct rte_eth_dev *dev = tool_ctx;
4373 struct mlx5_priv *priv = dev->data->dev_private;
4374 struct mlx5_flow_mreg_copy_resource *mcp_res;
4377 mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4382 memcpy(mcp_res, oentry, sizeof(*mcp_res));
4384 return &mcp_res->hlist_ent;
4388 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4390 struct mlx5_flow_mreg_copy_resource *mcp_res =
4391 container_of(entry, typeof(*mcp_res), hlist_ent);
4392 struct rte_eth_dev *dev = tool_ctx;
4393 struct mlx5_priv *priv = dev->data->dev_private;
4395 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4399 * Add a flow of copying flow metadata registers in RX_CP_TBL.
4401 * As mark_id is unique, if there's already a registered flow for the mark_id,
4402 * return by increasing the reference counter of the resource. Otherwise, create
4403 * the resource (mcp_res) and flow.
4406 * - If ingress port is ANY and reg_c[1] is mark_id,
4407 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4409 * For default flow (zero mark_id), flow is like,
4410 * - If ingress port is ANY,
4411 * reg_b := reg_c[0] and jump to RX_ACT_TBL.
4414 * Pointer to Ethernet device.
4416 * ID of MARK action, zero means default flow for META.
4418 * Perform verbose error reporting if not NULL.
4421 * Associated resource on success, NULL otherwise and rte_errno is set.
4423 static struct mlx5_flow_mreg_copy_resource *
4424 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4425 struct rte_flow_error *error)
4427 struct mlx5_priv *priv = dev->data->dev_private;
4428 struct mlx5_list_entry *entry;
4429 struct mlx5_flow_cb_ctx ctx = {
4435 /* Check if already registered. */
4436 MLX5_ASSERT(priv->mreg_cp_tbl);
4437 entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4440 return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4445 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4447 struct mlx5_flow_mreg_copy_resource *mcp_res =
4448 container_of(entry, typeof(*mcp_res), hlist_ent);
4449 struct rte_eth_dev *dev = tool_ctx;
4450 struct mlx5_priv *priv = dev->data->dev_private;
4452 MLX5_ASSERT(mcp_res->rix_flow);
4453 flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow);
4454 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4458 * Release flow in RX_CP_TBL.
4461 * Pointer to Ethernet device.
4463 * Parent flow for wich copying is provided.
4466 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4467 struct rte_flow *flow)
4469 struct mlx5_flow_mreg_copy_resource *mcp_res;
4470 struct mlx5_priv *priv = dev->data->dev_private;
4472 if (!flow->rix_mreg_copy)
4474 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4475 flow->rix_mreg_copy);
4476 if (!mcp_res || !priv->mreg_cp_tbl)
4478 MLX5_ASSERT(mcp_res->rix_flow);
4479 mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4480 flow->rix_mreg_copy = 0;
4484 * Remove the default copy action from RX_CP_TBL.
4486 * This functions is called in the mlx5_dev_start(). No thread safe
4490 * Pointer to Ethernet device.
4493 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4495 struct mlx5_list_entry *entry;
4496 struct mlx5_priv *priv = dev->data->dev_private;
4497 struct mlx5_flow_cb_ctx ctx;
4500 /* Check if default flow is registered. */
4501 if (!priv->mreg_cp_tbl)
4503 mark_id = MLX5_DEFAULT_COPY_ID;
4504 ctx.data = &mark_id;
4505 entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx);
4508 mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4512 * Add the default copy action in in RX_CP_TBL.
4514 * This functions is called in the mlx5_dev_start(). No thread safe
4518 * Pointer to Ethernet device.
4520 * Perform verbose error reporting if not NULL.
4523 * 0 for success, negative value otherwise and rte_errno is set.
4526 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4527 struct rte_flow_error *error)
4529 struct mlx5_priv *priv = dev->data->dev_private;
4530 struct mlx5_flow_mreg_copy_resource *mcp_res;
4531 struct mlx5_flow_cb_ctx ctx;
4534 /* Check whether extensive metadata feature is engaged. */
4535 if (!priv->config.dv_flow_en ||
4536 priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4537 !mlx5_flow_ext_mreg_supported(dev) ||
4538 !priv->sh->dv_regc0_mask)
4541 * Add default mreg copy flow may be called multiple time, but
4542 * only be called once in stop. Avoid register it twice.
4544 mark_id = MLX5_DEFAULT_COPY_ID;
4545 ctx.data = &mark_id;
4546 if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx))
4548 mcp_res = flow_mreg_add_copy_action(dev, mark_id, error);
4555 * Add a flow of copying flow metadata registers in RX_CP_TBL.
4557 * All the flow having Q/RSS action should be split by
4558 * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4559 * performs the following,
4560 * - CQE->flow_tag := reg_c[1] (MARK)
4561 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4562 * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4563 * but there should be a flow per each MARK ID set by MARK action.
4565 * For the aforementioned reason, if there's a MARK action in flow's action
4566 * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4567 * the MARK ID to CQE's flow_tag like,
4568 * - If reg_c[1] is mark_id,
4569 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4571 * For SET_META action which stores value in reg_c[0], as the destination is
4572 * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4573 * MARK ID means the default flow. The default flow looks like,
4574 * - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4577 * Pointer to Ethernet device.
4579 * Pointer to flow structure.
4580 * @param[in] actions
4581 * Pointer to the list of actions.
4583 * Perform verbose error reporting if not NULL.
4586 * 0 on success, negative value otherwise and rte_errno is set.
4589 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4590 struct rte_flow *flow,
4591 const struct rte_flow_action *actions,
4592 struct rte_flow_error *error)
4594 struct mlx5_priv *priv = dev->data->dev_private;
4595 struct mlx5_dev_config *config = &priv->config;
4596 struct mlx5_flow_mreg_copy_resource *mcp_res;
4597 const struct rte_flow_action_mark *mark;
4599 /* Check whether extensive metadata feature is engaged. */
4600 if (!config->dv_flow_en ||
4601 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4602 !mlx5_flow_ext_mreg_supported(dev) ||
4603 !priv->sh->dv_regc0_mask)
4605 /* Find MARK action. */
4606 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4607 switch (actions->type) {
4608 case RTE_FLOW_ACTION_TYPE_FLAG:
4609 mcp_res = flow_mreg_add_copy_action
4610 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4613 flow->rix_mreg_copy = mcp_res->idx;
4615 case RTE_FLOW_ACTION_TYPE_MARK:
4616 mark = (const struct rte_flow_action_mark *)
4619 flow_mreg_add_copy_action(dev, mark->id, error);
4622 flow->rix_mreg_copy = mcp_res->idx;
4631 #define MLX5_MAX_SPLIT_ACTIONS 24
4632 #define MLX5_MAX_SPLIT_ITEMS 24
4635 * Split the hairpin flow.
4636 * Since HW can't support encap and push-vlan on Rx, we move these
4638 * If the count action is after the encap then we also
4639 * move the count action. in this case the count will also measure
4643 * Pointer to Ethernet device.
4644 * @param[in] actions
4645 * Associated actions (list terminated by the END action).
4646 * @param[out] actions_rx
4648 * @param[out] actions_tx
4650 * @param[out] pattern_tx
4651 * The pattern items for the Tx flow.
4652 * @param[out] flow_id
4653 * The flow ID connected to this flow.
4659 flow_hairpin_split(struct rte_eth_dev *dev,
4660 const struct rte_flow_action actions[],
4661 struct rte_flow_action actions_rx[],
4662 struct rte_flow_action actions_tx[],
4663 struct rte_flow_item pattern_tx[],
4666 const struct rte_flow_action_raw_encap *raw_encap;
4667 const struct rte_flow_action_raw_decap *raw_decap;
4668 struct mlx5_rte_flow_action_set_tag *set_tag;
4669 struct rte_flow_action *tag_action;
4670 struct mlx5_rte_flow_item_tag *tag_item;
4671 struct rte_flow_item *item;
4675 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4676 switch (actions->type) {
4677 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4678 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4679 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4680 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4681 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4682 rte_memcpy(actions_tx, actions,
4683 sizeof(struct rte_flow_action));
4686 case RTE_FLOW_ACTION_TYPE_COUNT:
4688 rte_memcpy(actions_tx, actions,
4689 sizeof(struct rte_flow_action));
4692 rte_memcpy(actions_rx, actions,
4693 sizeof(struct rte_flow_action));
4697 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4698 raw_encap = actions->conf;
4699 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4700 memcpy(actions_tx, actions,
4701 sizeof(struct rte_flow_action));
4705 rte_memcpy(actions_rx, actions,
4706 sizeof(struct rte_flow_action));
4710 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4711 raw_decap = actions->conf;
4712 if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4713 memcpy(actions_tx, actions,
4714 sizeof(struct rte_flow_action));
4717 rte_memcpy(actions_rx, actions,
4718 sizeof(struct rte_flow_action));
4723 rte_memcpy(actions_rx, actions,
4724 sizeof(struct rte_flow_action));
4729 /* Add set meta action and end action for the Rx flow. */
4730 tag_action = actions_rx;
4731 tag_action->type = (enum rte_flow_action_type)
4732 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4734 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4736 set_tag = (void *)actions_rx;
4737 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4738 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4741 MLX5_ASSERT(set_tag->id > REG_NON);
4742 tag_action->conf = set_tag;
4743 /* Create Tx item list. */
4744 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4745 addr = (void *)&pattern_tx[2];
4747 item->type = (enum rte_flow_item_type)
4748 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4749 tag_item = (void *)addr;
4750 tag_item->data = flow_id;
4751 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4752 MLX5_ASSERT(set_tag->id > REG_NON);
4753 item->spec = tag_item;
4754 addr += sizeof(struct mlx5_rte_flow_item_tag);
4755 tag_item = (void *)addr;
4756 tag_item->data = UINT32_MAX;
4757 tag_item->id = UINT16_MAX;
4758 item->mask = tag_item;
4761 item->type = RTE_FLOW_ITEM_TYPE_END;
4766 * The last stage of splitting chain, just creates the subflow
4767 * without any modification.
4770 * Pointer to Ethernet device.
4772 * Parent flow structure pointer.
4773 * @param[in, out] sub_flow
4774 * Pointer to return the created subflow, may be NULL.
4776 * Flow rule attributes.
4778 * Pattern specification (list terminated by the END pattern item).
4779 * @param[in] actions
4780 * Associated actions (list terminated by the END action).
4781 * @param[in] flow_split_info
4782 * Pointer to flow split info structure.
4784 * Perform verbose error reporting if not NULL.
4786 * 0 on success, negative value otherwise
4789 flow_create_split_inner(struct rte_eth_dev *dev,
4790 struct rte_flow *flow,
4791 struct mlx5_flow **sub_flow,
4792 const struct rte_flow_attr *attr,
4793 const struct rte_flow_item items[],
4794 const struct rte_flow_action actions[],
4795 struct mlx5_flow_split_info *flow_split_info,
4796 struct rte_flow_error *error)
4798 struct mlx5_flow *dev_flow;
4800 dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4801 flow_split_info->flow_idx, error);
4804 dev_flow->flow = flow;
4805 dev_flow->external = flow_split_info->external;
4806 dev_flow->skip_scale = flow_split_info->skip_scale;
4807 /* Subflow object was created, we must include one in the list. */
4808 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4809 dev_flow->handle, next);
4811 * If dev_flow is as one of the suffix flow, some actions in suffix
4812 * flow may need some user defined item layer flags, and pass the
4813 * Metadate rxq mark flag to suffix flow as well.
4815 if (flow_split_info->prefix_layers)
4816 dev_flow->handle->layers = flow_split_info->prefix_layers;
4817 if (flow_split_info->prefix_mark)
4818 dev_flow->handle->mark = 1;
4820 *sub_flow = dev_flow;
4821 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4822 dev_flow->dv.table_id = flow_split_info->table_id;
4824 return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4828 * Get the sub policy of a meter.
4831 * Pointer to Ethernet device.
4833 * Parent flow structure pointer.
4835 * Pointer to thread flow work space.
4837 * Flow rule attributes.
4839 * Pattern specification (list terminated by the END pattern item).
4841 * Perform verbose error reporting if not NULL.
4844 * Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
4846 static struct mlx5_flow_meter_sub_policy *
4847 get_meter_sub_policy(struct rte_eth_dev *dev,
4848 struct rte_flow *flow,
4849 struct mlx5_flow_workspace *wks,
4850 const struct rte_flow_attr *attr,
4851 const struct rte_flow_item items[],
4852 struct rte_flow_error *error)
4854 struct mlx5_flow_meter_policy *policy;
4855 struct mlx5_flow_meter_policy *final_policy;
4856 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
4858 policy = wks->policy;
4859 final_policy = policy->is_hierarchy ? wks->final_policy : policy;
4860 if (final_policy->is_rss || final_policy->is_queue) {
4861 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
4862 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
4866 * This is a tmp dev_flow,
4867 * no need to register any matcher for it in translate.
4869 wks->skip_matcher_reg = 1;
4870 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
4871 struct mlx5_flow dev_flow = {0};
4872 struct mlx5_flow_handle dev_handle = { {0} };
4873 uint8_t fate = final_policy->act_cnt[i].fate_action;
4875 if (fate == MLX5_FLOW_FATE_SHARED_RSS) {
4876 const struct rte_flow_action_rss *rss_act =
4877 final_policy->act_cnt[i].rss->conf;
4878 struct rte_flow_action rss_actions[2] = {
4880 .type = RTE_FLOW_ACTION_TYPE_RSS,
4884 .type = RTE_FLOW_ACTION_TYPE_END,
4889 dev_flow.handle = &dev_handle;
4890 dev_flow.ingress = attr->ingress;
4891 dev_flow.flow = flow;
4892 dev_flow.external = 0;
4893 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4894 dev_flow.dv.transfer = attr->transfer;
4897 * Translate RSS action to get rss hash fields.
4899 if (flow_drv_translate(dev, &dev_flow, attr,
4900 items, rss_actions, error))
4902 rss_desc_v[i] = wks->rss_desc;
4903 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
4904 rss_desc_v[i].hash_fields =
4905 dev_flow.hash_fields;
4906 rss_desc_v[i].queue_num =
4907 rss_desc_v[i].hash_fields ?
4908 rss_desc_v[i].queue_num : 1;
4909 rss_desc_v[i].tunnel =
4910 !!(dev_flow.handle->layers &
4911 MLX5_FLOW_LAYER_TUNNEL);
4912 /* Use the RSS queues in the containers. */
4913 rss_desc_v[i].queue =
4914 (uint16_t *)(uintptr_t)rss_act->queue;
4915 rss_desc[i] = &rss_desc_v[i];
4916 } else if (fate == MLX5_FLOW_FATE_QUEUE) {
4917 /* This is queue action. */
4918 rss_desc_v[i] = wks->rss_desc;
4919 rss_desc_v[i].key_len = 0;
4920 rss_desc_v[i].hash_fields = 0;
4921 rss_desc_v[i].queue =
4922 &final_policy->act_cnt[i].queue;
4923 rss_desc_v[i].queue_num = 1;
4924 rss_desc[i] = &rss_desc_v[i];
4929 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
4930 flow, policy, rss_desc);
4932 enum mlx5_meter_domain mtr_domain =
4933 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4934 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4935 MLX5_MTR_DOMAIN_INGRESS);
4936 sub_policy = policy->sub_policys[mtr_domain][0];
4939 rte_flow_error_set(error, EINVAL,
4940 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4941 "Failed to get meter sub-policy.");
4947 * Split the meter flow.
4949 * As meter flow will split to three sub flow, other than meter
4950 * action, the other actions make sense to only meter accepts
4951 * the packet. If it need to be dropped, no other additional
4952 * actions should be take.
4954 * One kind of special action which decapsulates the L3 tunnel
4955 * header will be in the prefix sub flow, as not to take the
4956 * L3 tunnel header into account.
4959 * Pointer to Ethernet device.
4961 * Parent flow structure pointer.
4963 * Pointer to thread flow work space.
4965 * Flow rule attributes.
4967 * Pattern specification (list terminated by the END pattern item).
4968 * @param[out] sfx_items
4969 * Suffix flow match items (list terminated by the END pattern item).
4970 * @param[in] actions
4971 * Associated actions (list terminated by the END action).
4972 * @param[out] actions_sfx
4973 * Suffix flow actions.
4974 * @param[out] actions_pre
4975 * Prefix flow actions.
4976 * @param[out] mtr_flow_id
4977 * Pointer to meter flow id.
4979 * Perform verbose error reporting if not NULL.
4982 * 0 on success, a negative errno value otherwise and rte_errno is set.
4985 flow_meter_split_prep(struct rte_eth_dev *dev,
4986 struct rte_flow *flow,
4987 struct mlx5_flow_workspace *wks,
4988 const struct rte_flow_attr *attr,
4989 const struct rte_flow_item items[],
4990 struct rte_flow_item sfx_items[],
4991 const struct rte_flow_action actions[],
4992 struct rte_flow_action actions_sfx[],
4993 struct rte_flow_action actions_pre[],
4994 uint32_t *mtr_flow_id,
4995 struct rte_flow_error *error)
4997 struct mlx5_priv *priv = dev->data->dev_private;
4998 struct mlx5_flow_meter_info *fm = wks->fm;
4999 struct rte_flow_action *tag_action = NULL;
5000 struct rte_flow_item *tag_item;
5001 struct mlx5_rte_flow_action_set_tag *set_tag;
5002 const struct rte_flow_action_raw_encap *raw_encap;
5003 const struct rte_flow_action_raw_decap *raw_decap;
5004 struct mlx5_rte_flow_item_tag *tag_item_spec;
5005 struct mlx5_rte_flow_item_tag *tag_item_mask;
5006 uint32_t tag_id = 0;
5007 struct rte_flow_item *vlan_item_dst = NULL;
5008 const struct rte_flow_item *vlan_item_src = NULL;
5009 struct rte_flow_action *hw_mtr_action;
5010 struct rte_flow_action *action_pre_head = NULL;
5011 int32_t flow_src_port = priv->representor_id;
5013 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
5014 uint8_t mtr_reg_bits = priv->mtr_reg_share ?
5015 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
5016 uint32_t flow_id = 0;
5017 uint32_t flow_id_reversed = 0;
5018 uint8_t flow_id_bits = 0;
5021 /* Prepare the suffix subflow items. */
5022 tag_item = sfx_items++;
5023 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
5024 struct mlx5_priv *port_priv;
5025 const struct rte_flow_item_port_id *pid_v;
5026 int item_type = items->type;
5028 switch (item_type) {
5029 case RTE_FLOW_ITEM_TYPE_PORT_ID:
5030 pid_v = items->spec;
5032 port_priv = mlx5_port_to_eswitch_info(pid_v->id, false);
5034 return rte_flow_error_set(error,
5036 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5038 "Failed to get port info.");
5039 flow_src_port = port_priv->representor_id;
5040 if (!fm->def_policy && wks->policy->is_hierarchy &&
5041 flow_src_port != priv->representor_id) {
5042 if (flow_drv_mtr_hierarchy_rule_create(dev,
5049 memcpy(sfx_items, items, sizeof(*sfx_items));
5052 case RTE_FLOW_ITEM_TYPE_VLAN:
5053 /* Determine if copy vlan item below. */
5054 vlan_item_src = items;
5055 vlan_item_dst = sfx_items++;
5056 vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID;
5062 sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
5064 mtr_first = priv->sh->meter_aso_en &&
5065 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX));
5066 /* For ASO meter, meter must be before tag in TX direction. */
5068 action_pre_head = actions_pre++;
5069 /* Leave space for tag action. */
5070 tag_action = actions_pre++;
5072 /* Prepare the actions for prefix and suffix flow. */
5073 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5074 struct rte_flow_action *action_cur = NULL;
5076 switch (actions->type) {
5077 case RTE_FLOW_ACTION_TYPE_METER:
5079 action_cur = action_pre_head;
5081 /* Leave space for tag action. */
5082 tag_action = actions_pre++;
5083 action_cur = actions_pre++;
5086 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5087 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5088 action_cur = actions_pre++;
5090 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5091 raw_encap = actions->conf;
5092 if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
5093 action_cur = actions_pre++;
5095 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5096 raw_decap = actions->conf;
5097 if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
5098 action_cur = actions_pre++;
5100 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5101 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5102 if (vlan_item_dst && vlan_item_src) {
5103 memcpy(vlan_item_dst, vlan_item_src,
5104 sizeof(*vlan_item_dst));
5106 * Convert to internal match item, it is used
5107 * for vlan push and set vid.
5109 vlan_item_dst->type = (enum rte_flow_item_type)
5110 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
5117 action_cur = (fm->def_policy) ?
5118 actions_sfx++ : actions_pre++;
5119 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
5121 /* Add end action to the actions. */
5122 actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
5123 if (priv->sh->meter_aso_en) {
5125 * For ASO meter, need to add an extra jump action explicitly,
5126 * to jump from meter to policer table.
5128 struct mlx5_flow_meter_sub_policy *sub_policy;
5129 struct mlx5_flow_tbl_data_entry *tbl_data;
5131 if (!fm->def_policy) {
5132 sub_policy = get_meter_sub_policy(dev, flow, wks,
5133 attr, items, error);
5137 enum mlx5_meter_domain mtr_domain =
5138 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
5139 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
5140 MLX5_MTR_DOMAIN_INGRESS);
5143 &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
5145 tbl_data = container_of(sub_policy->tbl_rsc,
5146 struct mlx5_flow_tbl_data_entry, tbl);
5147 hw_mtr_action = actions_pre++;
5148 hw_mtr_action->type = (enum rte_flow_action_type)
5149 MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
5150 hw_mtr_action->conf = tbl_data->jump.action;
5152 actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
5155 return rte_flow_error_set(error, ENOMEM,
5156 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5157 NULL, "No tag action space.");
5159 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
5162 /* Only default-policy Meter creates mtr flow id. */
5163 if (fm->def_policy) {
5164 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
5166 return rte_flow_error_set(error, ENOMEM,
5167 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5168 "Failed to allocate meter flow id.");
5169 flow_id = tag_id - 1;
5170 flow_id_bits = (!flow_id) ? 1 :
5171 (MLX5_REG_BITS - __builtin_clz(flow_id));
5172 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
5174 mlx5_ipool_free(fm->flow_ipool, tag_id);
5175 return rte_flow_error_set(error, EINVAL,
5176 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5177 "Meter flow id exceeds max limit.");
5179 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
5180 priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
5182 /* Build tag actions and items for meter_id/meter flow_id. */
5183 set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
5184 tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
5185 tag_item_mask = tag_item_spec + 1;
5186 /* Both flow_id and meter_id share the same register. */
5187 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5188 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
5190 .offset = mtr_id_offset,
5191 .length = mtr_reg_bits,
5192 .data = flow->meter,
5195 * The color Reg bits used by flow_id are growing from
5196 * msb to lsb, so must do bit reverse for flow_id val in RegC.
5198 for (shift = 0; shift < flow_id_bits; shift++)
5199 flow_id_reversed = (flow_id_reversed << 1) |
5200 ((flow_id >> shift) & 0x1);
5202 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
5203 tag_item_spec->id = set_tag->id;
5204 tag_item_spec->data = set_tag->data << mtr_id_offset;
5205 tag_item_mask->data = UINT32_MAX << mtr_id_offset;
5206 tag_action->type = (enum rte_flow_action_type)
5207 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5208 tag_action->conf = set_tag;
5209 tag_item->type = (enum rte_flow_item_type)
5210 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
5211 tag_item->spec = tag_item_spec;
5212 tag_item->last = NULL;
5213 tag_item->mask = tag_item_mask;
5216 *mtr_flow_id = tag_id;
5221 * Split action list having QUEUE/RSS for metadata register copy.
5223 * Once Q/RSS action is detected in user's action list, the flow action
5224 * should be split in order to copy metadata registers, which will happen in
5226 * - CQE->flow_tag := reg_c[1] (MARK)
5227 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
5228 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
5229 * This is because the last action of each flow must be a terminal action
5230 * (QUEUE, RSS or DROP).
5232 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
5233 * stored and kept in the mlx5_flow structure per each sub_flow.
5235 * The Q/RSS action is replaced with,
5236 * - SET_TAG, setting the allocated flow ID to reg_c[2].
5237 * And the following JUMP action is added at the end,
5238 * - JUMP, to RX_CP_TBL.
5240 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
5241 * flow_create_split_metadata() routine. The flow will look like,
5242 * - If flow ID matches (reg_c[2]), perform Q/RSS.
5245 * Pointer to Ethernet device.
5246 * @param[out] split_actions
5247 * Pointer to store split actions to jump to CP_TBL.
5248 * @param[in] actions
5249 * Pointer to the list of original flow actions.
5251 * Pointer to the Q/RSS action.
5252 * @param[in] actions_n
5253 * Number of original actions.
5254 * @param[in] mtr_sfx
5255 * Check if it is in meter suffix table.
5257 * Perform verbose error reporting if not NULL.
5260 * non-zero unique flow_id on success, otherwise 0 and
5261 * error/rte_error are set.
5264 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
5265 struct rte_flow_action *split_actions,
5266 const struct rte_flow_action *actions,
5267 const struct rte_flow_action *qrss,
5268 int actions_n, int mtr_sfx,
5269 struct rte_flow_error *error)
5271 struct mlx5_priv *priv = dev->data->dev_private;
5272 struct mlx5_rte_flow_action_set_tag *set_tag;
5273 struct rte_flow_action_jump *jump;
5274 const int qrss_idx = qrss - actions;
5275 uint32_t flow_id = 0;
5279 * Given actions will be split
5280 * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
5281 * - Add jump to mreg CP_TBL.
5282 * As a result, there will be one more action.
5284 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
5285 /* Count MLX5_RTE_FLOW_ACTION_TYPE_TAG. */
5287 set_tag = (void *)(split_actions + actions_n);
5289 * If we are not the meter suffix flow, add the tag action.
5290 * Since meter suffix flow already has the tag added.
5294 * Allocate the new subflow ID. This one is unique within
5295 * device and not shared with representors. Otherwise,
5296 * we would have to resolve multi-thread access synch
5297 * issue. Each flow on the shared device is appended
5298 * with source vport identifier, so the resulting
5299 * flows will be unique in the shared (by master and
5300 * representors) domain even if they have coinciding
5303 mlx5_ipool_malloc(priv->sh->ipool
5304 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
5306 return rte_flow_error_set(error, ENOMEM,
5307 RTE_FLOW_ERROR_TYPE_ACTION,
5308 NULL, "can't allocate id "
5309 "for split Q/RSS subflow");
5310 /* Internal SET_TAG action to set flow ID. */
5311 *set_tag = (struct mlx5_rte_flow_action_set_tag){
5314 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
5318 /* Construct new actions array. */
5319 /* Replace QUEUE/RSS action. */
5320 split_actions[qrss_idx] = (struct rte_flow_action){
5321 .type = (enum rte_flow_action_type)
5322 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5327 * If we are the suffix flow of meter, tag already exist.
5328 * Set the QUEUE/RSS action to void.
5330 split_actions[qrss_idx].type = RTE_FLOW_ACTION_TYPE_VOID;
5332 /* JUMP action to jump to mreg copy table (CP_TBL). */
5333 jump = (void *)(set_tag + 1);
5334 *jump = (struct rte_flow_action_jump){
5335 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5337 split_actions[actions_n - 2] = (struct rte_flow_action){
5338 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5341 split_actions[actions_n - 1] = (struct rte_flow_action){
5342 .type = RTE_FLOW_ACTION_TYPE_END,
5348 * Extend the given action list for Tx metadata copy.
5350 * Copy the given action list to the ext_actions and add flow metadata register
5351 * copy action in order to copy reg_a set by WQE to reg_c[0].
5353 * @param[out] ext_actions
5354 * Pointer to the extended action list.
5355 * @param[in] actions
5356 * Pointer to the list of actions.
5357 * @param[in] actions_n
5358 * Number of actions in the list.
5360 * Perform verbose error reporting if not NULL.
5361 * @param[in] encap_idx
5362 * The encap action inndex.
5365 * 0 on success, negative value otherwise
5368 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
5369 struct rte_flow_action *ext_actions,
5370 const struct rte_flow_action *actions,
5371 int actions_n, struct rte_flow_error *error,
5374 struct mlx5_flow_action_copy_mreg *cp_mreg =
5375 (struct mlx5_flow_action_copy_mreg *)
5376 (ext_actions + actions_n + 1);
5379 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
5383 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
5388 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
5389 if (encap_idx == actions_n - 1) {
5390 ext_actions[actions_n - 1] = (struct rte_flow_action){
5391 .type = (enum rte_flow_action_type)
5392 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5395 ext_actions[actions_n] = (struct rte_flow_action){
5396 .type = RTE_FLOW_ACTION_TYPE_END,
5399 ext_actions[encap_idx] = (struct rte_flow_action){
5400 .type = (enum rte_flow_action_type)
5401 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5404 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5405 sizeof(*ext_actions) * (actions_n - encap_idx));
5411 * Check the match action from the action list.
5413 * @param[in] actions
5414 * Pointer to the list of actions.
5416 * Flow rule attributes.
5418 * The action to be check if exist.
5419 * @param[out] match_action_pos
5420 * Pointer to the position of the matched action if exists, otherwise is -1.
5421 * @param[out] qrss_action_pos
5422 * Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5423 * @param[out] modify_after_mirror
5424 * Pointer to the flag of modify action after FDB mirroring.
5427 * > 0 the total number of actions.
5428 * 0 if not found match action in action list.
5431 flow_check_match_action(const struct rte_flow_action actions[],
5432 const struct rte_flow_attr *attr,
5433 enum rte_flow_action_type action,
5434 int *match_action_pos, int *qrss_action_pos,
5435 int *modify_after_mirror)
5437 const struct rte_flow_action_sample *sample;
5438 const struct rte_flow_action_raw_decap *decap;
5445 *match_action_pos = -1;
5446 *qrss_action_pos = -1;
5447 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5448 if (actions->type == action) {
5450 *match_action_pos = actions_n;
5452 switch (actions->type) {
5453 case RTE_FLOW_ACTION_TYPE_QUEUE:
5454 case RTE_FLOW_ACTION_TYPE_RSS:
5455 *qrss_action_pos = actions_n;
5457 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5458 sample = actions->conf;
5459 ratio = sample->ratio;
5460 sub_type = ((const struct rte_flow_action *)
5461 (sample->actions))->type;
5462 if (ratio == 1 && attr->transfer)
5465 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5466 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5467 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5468 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5469 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5470 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5471 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5472 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5473 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5474 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5475 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5476 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5477 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5478 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5479 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5480 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5481 case RTE_FLOW_ACTION_TYPE_FLAG:
5482 case RTE_FLOW_ACTION_TYPE_MARK:
5483 case RTE_FLOW_ACTION_TYPE_SET_META:
5484 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5485 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5486 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5487 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5488 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5489 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5490 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5491 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5492 case RTE_FLOW_ACTION_TYPE_METER:
5494 *modify_after_mirror = 1;
5496 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5497 decap = actions->conf;
5498 while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5501 if (actions->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5502 const struct rte_flow_action_raw_encap *encap =
5505 MLX5_ENCAPSULATION_DECISION_SIZE &&
5507 MLX5_ENCAPSULATION_DECISION_SIZE)
5512 *modify_after_mirror = 1;
5519 if (flag && fdb_mirror && !*modify_after_mirror) {
5520 /* FDB mirroring uses the destination array to implement
5521 * instead of FLOW_SAMPLER object.
5523 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5526 /* Count RTE_FLOW_ACTION_TYPE_END. */
5527 return flag ? actions_n + 1 : 0;
5530 #define SAMPLE_SUFFIX_ITEM 2
5533 * Split the sample flow.
5535 * As sample flow will split to two sub flow, sample flow with
5536 * sample action, the other actions will move to new suffix flow.
5538 * Also add unique tag id with tag action in the sample flow,
5539 * the same tag id will be as match in the suffix flow.
5542 * Pointer to Ethernet device.
5543 * @param[in] add_tag
5544 * Add extra tag action flag.
5545 * @param[out] sfx_items
5546 * Suffix flow match items (list terminated by the END pattern item).
5547 * @param[in] actions
5548 * Associated actions (list terminated by the END action).
5549 * @param[out] actions_sfx
5550 * Suffix flow actions.
5551 * @param[out] actions_pre
5552 * Prefix flow actions.
5553 * @param[in] actions_n
5554 * The total number of actions.
5555 * @param[in] sample_action_pos
5556 * The sample action position.
5557 * @param[in] qrss_action_pos
5558 * The Queue/RSS action position.
5559 * @param[in] jump_table
5560 * Add extra jump action flag.
5562 * Perform verbose error reporting if not NULL.
5565 * 0 on success, or unique flow_id, a negative errno value
5566 * otherwise and rte_errno is set.
5569 flow_sample_split_prep(struct rte_eth_dev *dev,
5571 struct rte_flow_item sfx_items[],
5572 const struct rte_flow_action actions[],
5573 struct rte_flow_action actions_sfx[],
5574 struct rte_flow_action actions_pre[],
5576 int sample_action_pos,
5577 int qrss_action_pos,
5579 struct rte_flow_error *error)
5581 struct mlx5_priv *priv = dev->data->dev_private;
5582 struct mlx5_rte_flow_action_set_tag *set_tag;
5583 struct mlx5_rte_flow_item_tag *tag_spec;
5584 struct mlx5_rte_flow_item_tag *tag_mask;
5585 struct rte_flow_action_jump *jump_action;
5586 uint32_t tag_id = 0;
5588 int append_index = 0;
5591 if (sample_action_pos < 0)
5592 return rte_flow_error_set(error, EINVAL,
5593 RTE_FLOW_ERROR_TYPE_ACTION,
5594 NULL, "invalid position of sample "
5596 /* Prepare the actions for prefix and suffix flow. */
5597 if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5598 index = qrss_action_pos;
5599 /* Put the preceding the Queue/RSS action into prefix flow. */
5601 memcpy(actions_pre, actions,
5602 sizeof(struct rte_flow_action) * index);
5603 /* Put others preceding the sample action into prefix flow. */
5604 if (sample_action_pos > index + 1)
5605 memcpy(actions_pre + index, actions + index + 1,
5606 sizeof(struct rte_flow_action) *
5607 (sample_action_pos - index - 1));
5608 index = sample_action_pos - 1;
5609 /* Put Queue/RSS action into Suffix flow. */
5610 memcpy(actions_sfx, actions + qrss_action_pos,
5611 sizeof(struct rte_flow_action));
5614 index = sample_action_pos;
5616 memcpy(actions_pre, actions,
5617 sizeof(struct rte_flow_action) * index);
5619 /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5620 * For CX6DX and above, metadata registers Cx preserve their value,
5621 * add an extra tag action for NIC-RX and E-Switch Domain.
5624 /* Prepare the prefix tag action. */
5626 set_tag = (void *)(actions_pre + actions_n + append_index);
5627 ret = mlx5_flow_get_reg_id(dev, MLX5_SAMPLE_ID, 0, error);
5630 mlx5_ipool_malloc(priv->sh->ipool
5631 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5632 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5636 /* Prepare the suffix subflow items. */
5637 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5638 tag_spec->data = tag_id;
5639 tag_spec->id = set_tag->id;
5640 tag_mask = tag_spec + 1;
5641 tag_mask->data = UINT32_MAX;
5642 sfx_items[0] = (struct rte_flow_item){
5643 .type = (enum rte_flow_item_type)
5644 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5649 sfx_items[1] = (struct rte_flow_item){
5650 .type = (enum rte_flow_item_type)
5651 RTE_FLOW_ITEM_TYPE_END,
5653 /* Prepare the tag action in prefix subflow. */
5654 actions_pre[index++] =
5655 (struct rte_flow_action){
5656 .type = (enum rte_flow_action_type)
5657 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5661 memcpy(actions_pre + index, actions + sample_action_pos,
5662 sizeof(struct rte_flow_action));
5664 /* For the modify action after the sample action in E-Switch mirroring,
5665 * Add the extra jump action in prefix subflow and jump into the next
5666 * table, then do the modify action in the new table.
5669 /* Prepare the prefix jump action. */
5671 jump_action = (void *)(actions_pre + actions_n + append_index);
5672 jump_action->group = jump_table;
5673 actions_pre[index++] =
5674 (struct rte_flow_action){
5675 .type = (enum rte_flow_action_type)
5676 RTE_FLOW_ACTION_TYPE_JUMP,
5677 .conf = jump_action,
5680 actions_pre[index] = (struct rte_flow_action){
5681 .type = (enum rte_flow_action_type)
5682 RTE_FLOW_ACTION_TYPE_END,
5684 /* Put the actions after sample into Suffix flow. */
5685 memcpy(actions_sfx, actions + sample_action_pos + 1,
5686 sizeof(struct rte_flow_action) *
5687 (actions_n - sample_action_pos - 1));
5692 * The splitting for metadata feature.
5694 * - Q/RSS action on NIC Rx should be split in order to pass by
5695 * the mreg copy table (RX_CP_TBL) and then it jumps to the
5696 * action table (RX_ACT_TBL) which has the split Q/RSS action.
5698 * - All the actions on NIC Tx should have a mreg copy action to
5699 * copy reg_a from WQE to reg_c[0].
5702 * Pointer to Ethernet device.
5704 * Parent flow structure pointer.
5706 * Flow rule attributes.
5708 * Pattern specification (list terminated by the END pattern item).
5709 * @param[in] actions
5710 * Associated actions (list terminated by the END action).
5711 * @param[in] flow_split_info
5712 * Pointer to flow split info structure.
5714 * Perform verbose error reporting if not NULL.
5716 * 0 on success, negative value otherwise
5719 flow_create_split_metadata(struct rte_eth_dev *dev,
5720 struct rte_flow *flow,
5721 const struct rte_flow_attr *attr,
5722 const struct rte_flow_item items[],
5723 const struct rte_flow_action actions[],
5724 struct mlx5_flow_split_info *flow_split_info,
5725 struct rte_flow_error *error)
5727 struct mlx5_priv *priv = dev->data->dev_private;
5728 struct mlx5_dev_config *config = &priv->config;
5729 const struct rte_flow_action *qrss = NULL;
5730 struct rte_flow_action *ext_actions = NULL;
5731 struct mlx5_flow *dev_flow = NULL;
5732 uint32_t qrss_id = 0;
5739 /* Check whether extensive metadata feature is engaged. */
5740 if (!config->dv_flow_en ||
5741 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5742 !mlx5_flow_ext_mreg_supported(dev))
5743 return flow_create_split_inner(dev, flow, NULL, attr, items,
5744 actions, flow_split_info, error);
5745 actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5748 /* Exclude hairpin flows from splitting. */
5749 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5750 const struct rte_flow_action_queue *queue;
5753 if (mlx5_rxq_get_type(dev, queue->index) ==
5754 MLX5_RXQ_TYPE_HAIRPIN)
5756 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5757 const struct rte_flow_action_rss *rss;
5760 if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5761 MLX5_RXQ_TYPE_HAIRPIN)
5766 /* Check if it is in meter suffix table. */
5767 mtr_sfx = attr->group == (attr->transfer ?
5768 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5769 MLX5_FLOW_TABLE_LEVEL_METER);
5771 * Q/RSS action on NIC Rx should be split in order to pass by
5772 * the mreg copy table (RX_CP_TBL) and then it jumps to the
5773 * action table (RX_ACT_TBL) which has the split Q/RSS action.
5775 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5776 sizeof(struct rte_flow_action_set_tag) +
5777 sizeof(struct rte_flow_action_jump);
5778 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5781 return rte_flow_error_set(error, ENOMEM,
5782 RTE_FLOW_ERROR_TYPE_ACTION,
5783 NULL, "no memory to split "
5786 * Create the new actions list with removed Q/RSS action
5787 * and appended set tag and jump to register copy table
5788 * (RX_CP_TBL). We should preallocate unique tag ID here
5789 * in advance, because it is needed for set tag action.
5791 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5794 if (!mtr_sfx && !qrss_id) {
5798 } else if (attr->egress && !attr->transfer) {
5800 * All the actions on NIC Tx should have a metadata register
5801 * copy action to copy reg_a from WQE to reg_c[meta]
5803 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5804 sizeof(struct mlx5_flow_action_copy_mreg);
5805 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5808 return rte_flow_error_set(error, ENOMEM,
5809 RTE_FLOW_ERROR_TYPE_ACTION,
5810 NULL, "no memory to split "
5812 /* Create the action list appended with copy register. */
5813 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5814 actions_n, error, encap_idx);
5818 /* Add the unmodified original or prefix subflow. */
5819 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5820 items, ext_actions ? ext_actions :
5821 actions, flow_split_info, error);
5824 MLX5_ASSERT(dev_flow);
5826 const struct rte_flow_attr q_attr = {
5827 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5830 /* Internal PMD action to set register. */
5831 struct mlx5_rte_flow_item_tag q_tag_spec = {
5835 struct rte_flow_item q_items[] = {
5837 .type = (enum rte_flow_item_type)
5838 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5839 .spec = &q_tag_spec,
5844 .type = RTE_FLOW_ITEM_TYPE_END,
5847 struct rte_flow_action q_actions[] = {
5853 .type = RTE_FLOW_ACTION_TYPE_END,
5856 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5859 * Configure the tag item only if there is no meter subflow.
5860 * Since tag is already marked in the meter suffix subflow
5861 * we can just use the meter suffix items as is.
5864 /* Not meter subflow. */
5865 MLX5_ASSERT(!mtr_sfx);
5867 * Put unique id in prefix flow due to it is destroyed
5868 * after suffix flow and id will be freed after there
5869 * is no actual flows with this id and identifier
5870 * reallocation becomes possible (for example, for
5871 * other flows in other threads).
5873 dev_flow->handle->split_flow_id = qrss_id;
5874 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5878 q_tag_spec.id = ret;
5881 /* Add suffix subflow to execute Q/RSS. */
5882 flow_split_info->prefix_layers = layers;
5883 flow_split_info->prefix_mark = 0;
5884 flow_split_info->table_id = 0;
5885 ret = flow_create_split_inner(dev, flow, &dev_flow,
5886 &q_attr, mtr_sfx ? items :
5888 flow_split_info, error);
5891 /* qrss ID should be freed if failed. */
5893 MLX5_ASSERT(dev_flow);
5898 * We do not destroy the partially created sub_flows in case of error.
5899 * These ones are included into parent flow list and will be destroyed
5900 * by flow_drv_destroy.
5902 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5904 mlx5_free(ext_actions);
5909 * Create meter internal drop flow with the original pattern.
5912 * Pointer to Ethernet device.
5914 * Parent flow structure pointer.
5916 * Flow rule attributes.
5918 * Pattern specification (list terminated by the END pattern item).
5919 * @param[in] flow_split_info
5920 * Pointer to flow split info structure.
5922 * Pointer to flow meter structure.
5924 * Perform verbose error reporting if not NULL.
5926 * 0 on success, negative value otherwise
5929 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
5930 struct rte_flow *flow,
5931 const struct rte_flow_attr *attr,
5932 const struct rte_flow_item items[],
5933 struct mlx5_flow_split_info *flow_split_info,
5934 struct mlx5_flow_meter_info *fm,
5935 struct rte_flow_error *error)
5937 struct mlx5_flow *dev_flow = NULL;
5938 struct rte_flow_attr drop_attr = *attr;
5939 struct rte_flow_action drop_actions[3];
5940 struct mlx5_flow_split_info drop_split_info = *flow_split_info;
5942 MLX5_ASSERT(fm->drop_cnt);
5943 drop_actions[0].type =
5944 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
5945 drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
5946 drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
5947 drop_actions[1].conf = NULL;
5948 drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
5949 drop_actions[2].conf = NULL;
5950 drop_split_info.external = false;
5951 drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5952 drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
5953 drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
5954 return flow_create_split_inner(dev, flow, &dev_flow,
5955 &drop_attr, items, drop_actions,
5956 &drop_split_info, error);
5960 * The splitting for meter feature.
5962 * - The meter flow will be split to two flows as prefix and
5963 * suffix flow. The packets make sense only it pass the prefix
5966 * - Reg_C_5 is used for the packet to match betweend prefix and
5970 * Pointer to Ethernet device.
5972 * Parent flow structure pointer.
5974 * Flow rule attributes.
5976 * Pattern specification (list terminated by the END pattern item).
5977 * @param[in] actions
5978 * Associated actions (list terminated by the END action).
5979 * @param[in] flow_split_info
5980 * Pointer to flow split info structure.
5982 * Perform verbose error reporting if not NULL.
5984 * 0 on success, negative value otherwise
5987 flow_create_split_meter(struct rte_eth_dev *dev,
5988 struct rte_flow *flow,
5989 const struct rte_flow_attr *attr,
5990 const struct rte_flow_item items[],
5991 const struct rte_flow_action actions[],
5992 struct mlx5_flow_split_info *flow_split_info,
5993 struct rte_flow_error *error)
5995 struct mlx5_priv *priv = dev->data->dev_private;
5996 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5997 struct rte_flow_action *sfx_actions = NULL;
5998 struct rte_flow_action *pre_actions = NULL;
5999 struct rte_flow_item *sfx_items = NULL;
6000 struct mlx5_flow *dev_flow = NULL;
6001 struct rte_flow_attr sfx_attr = *attr;
6002 struct mlx5_flow_meter_info *fm = NULL;
6003 uint8_t skip_scale_restore;
6004 bool has_mtr = false;
6005 bool has_modify = false;
6006 bool set_mtr_reg = true;
6007 bool is_mtr_hierarchy = false;
6008 uint32_t meter_id = 0;
6009 uint32_t mtr_idx = 0;
6010 uint32_t mtr_flow_id = 0;
6017 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
6018 &has_modify, &meter_id);
6021 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
6023 return rte_flow_error_set(error, EINVAL,
6024 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6025 NULL, "Meter not found.");
6027 fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
6029 return rte_flow_error_set(error, EINVAL,
6030 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6031 NULL, "Meter not found.");
6032 ret = mlx5_flow_meter_attach(priv, fm,
6036 flow->meter = mtr_idx;
6040 if (!fm->def_policy) {
6041 wks->policy = mlx5_flow_meter_policy_find(dev,
6044 MLX5_ASSERT(wks->policy);
6045 if (wks->policy->is_hierarchy) {
6047 mlx5_flow_meter_hierarchy_get_final_policy(dev,
6049 if (!wks->final_policy)
6050 return rte_flow_error_set(error,
6052 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6053 "Failed to find terminal policy of hierarchy.");
6054 is_mtr_hierarchy = true;
6058 * If it isn't default-policy Meter, and
6059 * 1. There's no action in flow to change
6060 * packet (modify/encap/decap etc.), OR
6061 * 2. No drop count needed for this meter.
6062 * 3. It's not meter hierarchy.
6063 * Then no need to use regC to save meter id anymore.
6065 if (!fm->def_policy && !is_mtr_hierarchy &&
6066 (!has_modify || !fm->drop_cnt))
6067 set_mtr_reg = false;
6068 /* Prefix actions: meter, decap, encap, tag, jump, end. */
6069 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
6070 sizeof(struct mlx5_rte_flow_action_set_tag);
6071 /* Suffix items: tag, vlan, port id, end. */
6072 #define METER_SUFFIX_ITEM 4
6073 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
6074 sizeof(struct mlx5_rte_flow_item_tag) * 2;
6075 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
6078 return rte_flow_error_set(error, ENOMEM,
6079 RTE_FLOW_ERROR_TYPE_ACTION,
6080 NULL, "no memory to split "
6082 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
6084 /* There's no suffix flow for meter of non-default policy. */
6085 if (!fm->def_policy)
6086 pre_actions = sfx_actions + 1;
6088 pre_actions = sfx_actions + actions_n;
6089 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr,
6090 items, sfx_items, actions,
6091 sfx_actions, pre_actions,
6092 (set_mtr_reg ? &mtr_flow_id : NULL),
6098 /* Add the prefix subflow. */
6099 skip_scale_restore = flow_split_info->skip_scale;
6100 flow_split_info->skip_scale |=
6101 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6102 ret = flow_create_split_inner(dev, flow, &dev_flow,
6103 attr, items, pre_actions,
6104 flow_split_info, error);
6105 flow_split_info->skip_scale = skip_scale_restore;
6108 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
6113 dev_flow->handle->split_flow_id = mtr_flow_id;
6114 dev_flow->handle->is_meter_flow_id = 1;
6116 if (!fm->def_policy) {
6117 if (!set_mtr_reg && fm->drop_cnt)
6119 flow_meter_create_drop_flow_with_org_pattern(dev, flow,
6125 /* Setting the sfx group atrr. */
6126 sfx_attr.group = sfx_attr.transfer ?
6127 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
6128 MLX5_FLOW_TABLE_LEVEL_METER;
6129 flow_split_info->prefix_layers =
6130 flow_get_prefix_layer_flags(dev_flow);
6131 flow_split_info->prefix_mark |= dev_flow->handle->mark;
6132 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
6134 /* Add the prefix subflow. */
6135 ret = flow_create_split_metadata(dev, flow,
6136 &sfx_attr, sfx_items ?
6138 sfx_actions ? sfx_actions : actions,
6139 flow_split_info, error);
6142 mlx5_free(sfx_actions);
6147 * The splitting for sample feature.
6149 * Once Sample action is detected in the action list, the flow actions should
6150 * be split into prefix sub flow and suffix sub flow.
6152 * The original items remain in the prefix sub flow, all actions preceding the
6153 * sample action and the sample action itself will be copied to the prefix
6154 * sub flow, the actions following the sample action will be copied to the
6155 * suffix sub flow, Queue action always be located in the suffix sub flow.
6157 * In order to make the packet from prefix sub flow matches with suffix sub
6158 * flow, an extra tag action be added into prefix sub flow, and the suffix sub
6159 * flow uses tag item with the unique flow id.
6162 * Pointer to Ethernet device.
6164 * Parent flow structure pointer.
6166 * Flow rule attributes.
6168 * Pattern specification (list terminated by the END pattern item).
6169 * @param[in] actions
6170 * Associated actions (list terminated by the END action).
6171 * @param[in] flow_split_info
6172 * Pointer to flow split info structure.
6174 * Perform verbose error reporting if not NULL.
6176 * 0 on success, negative value otherwise
6179 flow_create_split_sample(struct rte_eth_dev *dev,
6180 struct rte_flow *flow,
6181 const struct rte_flow_attr *attr,
6182 const struct rte_flow_item items[],
6183 const struct rte_flow_action actions[],
6184 struct mlx5_flow_split_info *flow_split_info,
6185 struct rte_flow_error *error)
6187 struct mlx5_priv *priv = dev->data->dev_private;
6188 struct rte_flow_action *sfx_actions = NULL;
6189 struct rte_flow_action *pre_actions = NULL;
6190 struct rte_flow_item *sfx_items = NULL;
6191 struct mlx5_flow *dev_flow = NULL;
6192 struct rte_flow_attr sfx_attr = *attr;
6193 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6194 struct mlx5_flow_dv_sample_resource *sample_res;
6195 struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
6196 struct mlx5_flow_tbl_resource *sfx_tbl;
6200 uint32_t fdb_tx = 0;
6203 int sample_action_pos;
6204 int qrss_action_pos;
6206 int modify_after_mirror = 0;
6207 uint16_t jump_table = 0;
6208 const uint32_t next_ft_step = 1;
6211 if (priv->sampler_en)
6212 actions_n = flow_check_match_action(actions, attr,
6213 RTE_FLOW_ACTION_TYPE_SAMPLE,
6214 &sample_action_pos, &qrss_action_pos,
6215 &modify_after_mirror);
6217 /* The prefix actions must includes sample, tag, end. */
6218 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
6219 + sizeof(struct mlx5_rte_flow_action_set_tag);
6220 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
6221 sizeof(struct mlx5_rte_flow_item_tag) * 2;
6222 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
6223 item_size), 0, SOCKET_ID_ANY);
6225 return rte_flow_error_set(error, ENOMEM,
6226 RTE_FLOW_ERROR_TYPE_ACTION,
6227 NULL, "no memory to split "
6229 /* The representor_id is UINT16_MAX for uplink. */
6230 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX);
6232 * When reg_c_preserve is set, metadata registers Cx preserve
6233 * their value even through packet duplication.
6235 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
6237 sfx_items = (struct rte_flow_item *)((char *)sfx_actions
6239 if (modify_after_mirror)
6240 jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
6242 pre_actions = sfx_actions + actions_n;
6243 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
6244 actions, sfx_actions,
6245 pre_actions, actions_n,
6247 qrss_action_pos, jump_table,
6249 if (tag_id < 0 || (add_tag && !tag_id)) {
6253 if (modify_after_mirror)
6254 flow_split_info->skip_scale =
6255 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6256 /* Add the prefix subflow. */
6257 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6259 flow_split_info, error);
6264 dev_flow->handle->split_flow_id = tag_id;
6265 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6266 if (!modify_after_mirror) {
6267 /* Set the sfx group attr. */
6268 sample_res = (struct mlx5_flow_dv_sample_resource *)
6269 dev_flow->dv.sample_res;
6270 sfx_tbl = (struct mlx5_flow_tbl_resource *)
6271 sample_res->normal_path_tbl;
6272 sfx_tbl_data = container_of(sfx_tbl,
6273 struct mlx5_flow_tbl_data_entry,
6275 sfx_attr.group = sfx_attr.transfer ?
6276 (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
6278 MLX5_ASSERT(attr->transfer);
6279 sfx_attr.group = jump_table;
6281 flow_split_info->prefix_layers =
6282 flow_get_prefix_layer_flags(dev_flow);
6283 flow_split_info->prefix_mark |= dev_flow->handle->mark;
6284 /* Suffix group level already be scaled with factor, set
6285 * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
6286 * again in translation.
6288 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6291 /* Add the suffix subflow. */
6292 ret = flow_create_split_meter(dev, flow, &sfx_attr,
6293 sfx_items ? sfx_items : items,
6294 sfx_actions ? sfx_actions : actions,
6295 flow_split_info, error);
6298 mlx5_free(sfx_actions);
6303 * Split the flow to subflow set. The splitters might be linked
6304 * in the chain, like this:
6305 * flow_create_split_outer() calls:
6306 * flow_create_split_meter() calls:
6307 * flow_create_split_metadata(meter_subflow_0) calls:
6308 * flow_create_split_inner(metadata_subflow_0)
6309 * flow_create_split_inner(metadata_subflow_1)
6310 * flow_create_split_inner(metadata_subflow_2)
6311 * flow_create_split_metadata(meter_subflow_1) calls:
6312 * flow_create_split_inner(metadata_subflow_0)
6313 * flow_create_split_inner(metadata_subflow_1)
6314 * flow_create_split_inner(metadata_subflow_2)
6316 * This provide flexible way to add new levels of flow splitting.
6317 * The all of successfully created subflows are included to the
6318 * parent flow dev_flow list.
6321 * Pointer to Ethernet device.
6323 * Parent flow structure pointer.
6325 * Flow rule attributes.
6327 * Pattern specification (list terminated by the END pattern item).
6328 * @param[in] actions
6329 * Associated actions (list terminated by the END action).
6330 * @param[in] flow_split_info
6331 * Pointer to flow split info structure.
6333 * Perform verbose error reporting if not NULL.
6335 * 0 on success, negative value otherwise
6338 flow_create_split_outer(struct rte_eth_dev *dev,
6339 struct rte_flow *flow,
6340 const struct rte_flow_attr *attr,
6341 const struct rte_flow_item items[],
6342 const struct rte_flow_action actions[],
6343 struct mlx5_flow_split_info *flow_split_info,
6344 struct rte_flow_error *error)
6348 ret = flow_create_split_sample(dev, flow, attr, items,
6349 actions, flow_split_info, error);
6350 MLX5_ASSERT(ret <= 0);
6354 static inline struct mlx5_flow_tunnel *
6355 flow_tunnel_from_rule(const struct mlx5_flow *flow)
6357 struct mlx5_flow_tunnel *tunnel;
6359 #pragma GCC diagnostic push
6360 #pragma GCC diagnostic ignored "-Wcast-qual"
6361 tunnel = (typeof(tunnel))flow->tunnel;
6362 #pragma GCC diagnostic pop
6368 * Adjust flow RSS workspace if needed.
6371 * Pointer to thread flow work space.
6373 * Pointer to RSS descriptor.
6374 * @param[in] nrssq_num
6375 * New RSS queue number.
6378 * 0 on success, -1 otherwise and rte_errno is set.
6381 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
6382 struct mlx5_flow_rss_desc *rss_desc,
6385 if (likely(nrssq_num <= wks->rssq_num))
6387 rss_desc->queue = realloc(rss_desc->queue,
6388 sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
6389 if (!rss_desc->queue) {
6393 wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
6398 * Create a flow and add it to @p list.
6401 * Pointer to Ethernet device.
6403 * Pointer to a TAILQ flow list. If this parameter NULL,
6404 * no list insertion occurred, flow is just created,
6405 * this is caller's responsibility to track the
6408 * Flow rule attributes.
6410 * Pattern specification (list terminated by the END pattern item).
6411 * @param[in] actions
6412 * Associated actions (list terminated by the END action).
6413 * @param[in] external
6414 * This flow rule is created by request external to PMD.
6416 * Perform verbose error reporting if not NULL.
6419 * A flow index on success, 0 otherwise and rte_errno is set.
6422 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6423 const struct rte_flow_attr *attr,
6424 const struct rte_flow_item items[],
6425 const struct rte_flow_action original_actions[],
6426 bool external, struct rte_flow_error *error)
6428 struct mlx5_priv *priv = dev->data->dev_private;
6429 struct rte_flow *flow = NULL;
6430 struct mlx5_flow *dev_flow;
6431 const struct rte_flow_action_rss *rss = NULL;
6432 struct mlx5_translated_action_handle
6433 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6434 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6436 struct mlx5_flow_expand_rss buf;
6437 uint8_t buffer[4096];
6440 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6441 uint8_t buffer[2048];
6444 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6445 uint8_t buffer[2048];
6446 } actions_hairpin_tx;
6448 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6449 uint8_t buffer[2048];
6451 struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6452 struct mlx5_flow_rss_desc *rss_desc;
6453 const struct rte_flow_action *p_actions_rx;
6457 struct rte_flow_attr attr_tx = { .priority = 0 };
6458 const struct rte_flow_action *actions;
6459 struct rte_flow_action *translated_actions = NULL;
6460 struct mlx5_flow_tunnel *tunnel;
6461 struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6462 struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6463 struct mlx5_flow_split_info flow_split_info = {
6464 .external = !!external,
6474 rss_desc = &wks->rss_desc;
6475 ret = flow_action_handles_translate(dev, original_actions,
6478 &translated_actions, error);
6480 MLX5_ASSERT(translated_actions == NULL);
6483 actions = translated_actions ? translated_actions : original_actions;
6484 p_actions_rx = actions;
6485 hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6486 ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6487 external, hairpin_flow, error);
6489 goto error_before_hairpin_split;
6490 flow = mlx5_ipool_zmalloc(priv->flows[type], &idx);
6493 goto error_before_hairpin_split;
6495 if (hairpin_flow > 0) {
6496 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6498 goto error_before_hairpin_split;
6500 flow_hairpin_split(dev, actions, actions_rx.actions,
6501 actions_hairpin_tx.actions, items_tx.items,
6503 p_actions_rx = actions_rx.actions;
6505 flow_split_info.flow_idx = idx;
6506 flow->drv_type = flow_get_drv_type(dev, attr);
6507 MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6508 flow->drv_type < MLX5_FLOW_TYPE_MAX);
6509 memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6510 /* RSS Action only works on NIC RX domain */
6511 if (attr->ingress && !attr->transfer)
6512 rss = flow_get_rss_action(dev, p_actions_rx);
6514 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6517 * The following information is required by
6518 * mlx5_flow_hashfields_adjust() in advance.
6520 rss_desc->level = rss->level;
6521 /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
6522 rss_desc->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
6524 flow->dev_handles = 0;
6525 if (rss && rss->types) {
6526 unsigned int graph_root;
6528 graph_root = find_graph_root(rss->level);
6529 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6531 mlx5_support_expansion, graph_root);
6532 MLX5_ASSERT(ret > 0 &&
6533 (unsigned int)ret < sizeof(expand_buffer.buffer));
6534 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) {
6535 for (i = 0; i < buf->entries; ++i)
6536 mlx5_dbg__print_pattern(buf->entry[i].pattern);
6540 buf->entry[0].pattern = (void *)(uintptr_t)items;
6542 rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6544 for (i = 0; i < buf->entries; ++i) {
6545 /* Initialize flow split data. */
6546 flow_split_info.prefix_layers = 0;
6547 flow_split_info.prefix_mark = 0;
6548 flow_split_info.skip_scale = 0;
6550 * The splitter may create multiple dev_flows,
6551 * depending on configuration. In the simplest
6552 * case it just creates unmodified original flow.
6554 ret = flow_create_split_outer(dev, flow, attr,
6555 buf->entry[i].pattern,
6556 p_actions_rx, &flow_split_info,
6560 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) {
6561 ret = flow_tunnel_add_default_miss(dev, flow, attr,
6564 wks->flows[0].tunnel,
6568 mlx5_free(default_miss_ctx.queue);
6573 /* Create the tx flow. */
6575 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6576 attr_tx.ingress = 0;
6578 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6579 actions_hairpin_tx.actions,
6583 dev_flow->flow = flow;
6584 dev_flow->external = 0;
6585 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6586 dev_flow->handle, next);
6587 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6589 actions_hairpin_tx.actions, error);
6594 * Update the metadata register copy table. If extensive
6595 * metadata feature is enabled and registers are supported
6596 * we might create the extra rte_flow for each unique
6597 * MARK/FLAG action ID.
6599 * The table is updated for ingress Flows only, because
6600 * the egress Flows belong to the different device and
6601 * copy table should be updated in peer NIC Rx domain.
6603 if (attr->ingress &&
6604 (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6605 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6610 * If the flow is external (from application) OR device is started,
6611 * OR mreg discover, then apply immediately.
6613 if (external || dev->data->dev_started ||
6614 (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6615 attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6616 ret = flow_drv_apply(dev, flow, error);
6621 flow_rxq_flags_set(dev, flow);
6622 rte_free(translated_actions);
6623 tunnel = flow_tunnel_from_rule(wks->flows);
6626 flow->tunnel_id = tunnel->tunnel_id;
6627 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6628 mlx5_free(default_miss_ctx.queue);
6630 mlx5_flow_pop_thread_workspace();
6634 ret = rte_errno; /* Save rte_errno before cleanup. */
6635 flow_mreg_del_copy_action(dev, flow);
6636 flow_drv_destroy(dev, flow);
6637 if (rss_desc->shared_rss)
6638 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6640 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6641 rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6642 mlx5_ipool_free(priv->flows[type], idx);
6643 rte_errno = ret; /* Restore rte_errno. */
6646 mlx5_flow_pop_thread_workspace();
6647 error_before_hairpin_split:
6648 rte_free(translated_actions);
6653 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6654 * incoming packets to table 1.
6656 * Other flow rules, requested for group n, will be created in
6657 * e-switch table n+1.
6658 * Jump action to e-switch group n will be created to group n+1.
6660 * Used when working in switchdev mode, to utilise advantages of table 1
6664 * Pointer to Ethernet device.
6667 * Pointer to flow on success, NULL otherwise and rte_errno is set.
6670 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6672 const struct rte_flow_attr attr = {
6679 const struct rte_flow_item pattern = {
6680 .type = RTE_FLOW_ITEM_TYPE_END,
6682 struct rte_flow_action_jump jump = {
6685 const struct rte_flow_action actions[] = {
6687 .type = RTE_FLOW_ACTION_TYPE_JUMP,
6691 .type = RTE_FLOW_ACTION_TYPE_END,
6694 struct rte_flow_error error;
6696 return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6698 actions, false, &error);
6702 * Create a dedicated flow rule on e-switch table 1, matches ESW manager
6703 * and sq number, directs all packets to peer vport.
6706 * Pointer to Ethernet device.
6711 * Flow ID on success, 0 otherwise and rte_errno is set.
6714 mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev, uint32_t txq)
6716 struct rte_flow_attr attr = {
6718 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6723 struct rte_flow_item_port_id port_spec = {
6724 .id = MLX5_PORT_ESW_MGR,
6726 struct mlx5_rte_flow_item_tx_queue txq_spec = {
6729 struct rte_flow_item pattern[] = {
6731 .type = RTE_FLOW_ITEM_TYPE_PORT_ID,
6735 .type = (enum rte_flow_item_type)
6736 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6740 .type = RTE_FLOW_ITEM_TYPE_END,
6743 struct rte_flow_action_jump jump = {
6746 struct rte_flow_action_port_id port = {
6747 .id = dev->data->port_id,
6749 struct rte_flow_action actions[] = {
6751 .type = RTE_FLOW_ACTION_TYPE_JUMP,
6755 .type = RTE_FLOW_ACTION_TYPE_END,
6758 struct rte_flow_error error;
6761 * Creates group 0, highest priority jump flow.
6762 * Matches txq to bypass kernel packets.
6764 if (flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern, actions,
6765 false, &error) == 0)
6767 /* Create group 1, lowest priority redirect flow for txq. */
6769 actions[0].conf = &port;
6770 actions[0].type = RTE_FLOW_ACTION_TYPE_PORT_ID;
6771 return flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern,
6772 actions, false, &error);
6776 * Validate a flow supported by the NIC.
6778 * @see rte_flow_validate()
6782 mlx5_flow_validate(struct rte_eth_dev *dev,
6783 const struct rte_flow_attr *attr,
6784 const struct rte_flow_item items[],
6785 const struct rte_flow_action original_actions[],
6786 struct rte_flow_error *error)
6789 struct mlx5_translated_action_handle
6790 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6791 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6792 const struct rte_flow_action *actions;
6793 struct rte_flow_action *translated_actions = NULL;
6794 int ret = flow_action_handles_translate(dev, original_actions,
6797 &translated_actions, error);
6801 actions = translated_actions ? translated_actions : original_actions;
6802 hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6803 ret = flow_drv_validate(dev, attr, items, actions,
6804 true, hairpin_flow, error);
6805 rte_free(translated_actions);
6812 * @see rte_flow_create()
6816 mlx5_flow_create(struct rte_eth_dev *dev,
6817 const struct rte_flow_attr *attr,
6818 const struct rte_flow_item items[],
6819 const struct rte_flow_action actions[],
6820 struct rte_flow_error *error)
6823 * If the device is not started yet, it is not allowed to created a
6824 * flow from application. PMD default flows and traffic control flows
6827 if (unlikely(!dev->data->dev_started)) {
6828 DRV_LOG(DEBUG, "port %u is not started when "
6829 "inserting a flow", dev->data->port_id);
6830 rte_flow_error_set(error, ENODEV,
6831 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6833 "port not started");
6837 return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN,
6838 attr, items, actions,
6843 * Destroy a flow in a list.
6846 * Pointer to Ethernet device.
6847 * @param[in] flow_idx
6848 * Index of flow to destroy.
6851 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6854 struct mlx5_priv *priv = dev->data->dev_private;
6855 struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx);
6859 MLX5_ASSERT(flow->type == type);
6861 * Update RX queue flags only if port is started, otherwise it is
6864 if (dev->data->dev_started)
6865 flow_rxq_flags_trim(dev, flow);
6866 flow_drv_destroy(dev, flow);
6868 struct mlx5_flow_tunnel *tunnel;
6870 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6872 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6873 mlx5_flow_tunnel_free(dev, tunnel);
6875 flow_mreg_del_copy_action(dev, flow);
6876 mlx5_ipool_free(priv->flows[type], flow_idx);
6880 * Destroy all flows.
6883 * Pointer to Ethernet device.
6885 * Flow type to be flushed.
6887 * If flushing is called avtively.
6890 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6893 struct mlx5_priv *priv = dev->data->dev_private;
6894 uint32_t num_flushed = 0, fidx = 1;
6895 struct rte_flow *flow;
6897 MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) {
6898 flow_list_destroy(dev, type, fidx);
6902 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
6903 dev->data->port_id, num_flushed);
6908 * Stop all default actions for flows.
6911 * Pointer to Ethernet device.
6914 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6916 flow_mreg_del_default_copy_action(dev);
6917 flow_rxq_flags_clear(dev);
6921 * Start all default actions for flows.
6924 * Pointer to Ethernet device.
6926 * 0 on success, a negative errno value otherwise and rte_errno is set.
6929 mlx5_flow_start_default(struct rte_eth_dev *dev)
6931 struct rte_flow_error error;
6933 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6934 return flow_mreg_add_default_copy_action(dev, &error);
6938 * Release key of thread specific flow workspace data.
6941 flow_release_workspace(void *data)
6943 struct mlx5_flow_workspace *wks = data;
6944 struct mlx5_flow_workspace *next;
6948 free(wks->rss_desc.queue);
6955 * Get thread specific current flow workspace.
6957 * @return pointer to thread specific flow workspace data, NULL on error.
6959 struct mlx5_flow_workspace*
6960 mlx5_flow_get_thread_workspace(void)
6962 struct mlx5_flow_workspace *data;
6964 data = mlx5_flow_os_get_specific_workspace();
6965 MLX5_ASSERT(data && data->inuse);
6966 if (!data || !data->inuse)
6967 DRV_LOG(ERR, "flow workspace not initialized.");
6972 * Allocate and init new flow workspace.
6974 * @return pointer to flow workspace data, NULL on error.
6976 static struct mlx5_flow_workspace*
6977 flow_alloc_thread_workspace(void)
6979 struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6982 DRV_LOG(ERR, "Failed to allocate flow workspace "
6986 data->rss_desc.queue = calloc(1,
6987 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6988 if (!data->rss_desc.queue)
6990 data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6993 if (data->rss_desc.queue)
6994 free(data->rss_desc.queue);
7000 * Get new thread specific flow workspace.
7002 * If current workspace inuse, create new one and set as current.
7004 * @return pointer to thread specific flow workspace data, NULL on error.
7006 static struct mlx5_flow_workspace*
7007 mlx5_flow_push_thread_workspace(void)
7009 struct mlx5_flow_workspace *curr;
7010 struct mlx5_flow_workspace *data;
7012 curr = mlx5_flow_os_get_specific_workspace();
7014 data = flow_alloc_thread_workspace();
7017 } else if (!curr->inuse) {
7019 } else if (curr->next) {
7022 data = flow_alloc_thread_workspace();
7030 /* Set as current workspace */
7031 if (mlx5_flow_os_set_specific_workspace(data))
7032 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
7037 * Close current thread specific flow workspace.
7039 * If previous workspace available, set it as current.
7041 * @return pointer to thread specific flow workspace data, NULL on error.
7044 mlx5_flow_pop_thread_workspace(void)
7046 struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
7051 DRV_LOG(ERR, "Failed to close unused flow workspace.");
7057 if (mlx5_flow_os_set_specific_workspace(data->prev))
7058 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
7062 * Verify the flow list is empty
7065 * Pointer to Ethernet device.
7067 * @return the number of flows not released.
7070 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused)
7072 struct mlx5_priv *priv = dev->data->dev_private;
7073 struct rte_flow *flow;
7077 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
7078 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) {
7079 DRV_LOG(DEBUG, "port %u flow %p still referenced",
7080 dev->data->port_id, (void *)flow);
7088 * Enable default hairpin egress flow.
7091 * Pointer to Ethernet device.
7096 * 0 on success, a negative errno value otherwise and rte_errno is set.
7099 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
7102 const struct rte_flow_attr attr = {
7106 struct mlx5_rte_flow_item_tx_queue queue_spec = {
7109 struct mlx5_rte_flow_item_tx_queue queue_mask = {
7110 .queue = UINT32_MAX,
7112 struct rte_flow_item items[] = {
7114 .type = (enum rte_flow_item_type)
7115 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
7116 .spec = &queue_spec,
7118 .mask = &queue_mask,
7121 .type = RTE_FLOW_ITEM_TYPE_END,
7124 struct rte_flow_action_jump jump = {
7125 .group = MLX5_HAIRPIN_TX_TABLE,
7127 struct rte_flow_action actions[2];
7129 struct rte_flow_error error;
7131 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
7132 actions[0].conf = &jump;
7133 actions[1].type = RTE_FLOW_ACTION_TYPE_END;
7134 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7135 &attr, items, actions, false, &error);
7138 "Failed to create ctrl flow: rte_errno(%d),"
7139 " type(%d), message(%s)",
7140 rte_errno, error.type,
7141 error.message ? error.message : " (no stated reason)");
7148 * Enable a control flow configured from the control plane.
7151 * Pointer to Ethernet device.
7153 * An Ethernet flow spec to apply.
7155 * An Ethernet flow mask to apply.
7157 * A VLAN flow spec to apply.
7159 * A VLAN flow mask to apply.
7162 * 0 on success, a negative errno value otherwise and rte_errno is set.
7165 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
7166 struct rte_flow_item_eth *eth_spec,
7167 struct rte_flow_item_eth *eth_mask,
7168 struct rte_flow_item_vlan *vlan_spec,
7169 struct rte_flow_item_vlan *vlan_mask)
7171 struct mlx5_priv *priv = dev->data->dev_private;
7172 const struct rte_flow_attr attr = {
7174 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7176 struct rte_flow_item items[] = {
7178 .type = RTE_FLOW_ITEM_TYPE_ETH,
7184 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
7185 RTE_FLOW_ITEM_TYPE_END,
7191 .type = RTE_FLOW_ITEM_TYPE_END,
7194 uint16_t queue[priv->reta_idx_n];
7195 struct rte_flow_action_rss action_rss = {
7196 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
7198 .types = priv->rss_conf.rss_hf,
7199 .key_len = priv->rss_conf.rss_key_len,
7200 .queue_num = priv->reta_idx_n,
7201 .key = priv->rss_conf.rss_key,
7204 struct rte_flow_action actions[] = {
7206 .type = RTE_FLOW_ACTION_TYPE_RSS,
7207 .conf = &action_rss,
7210 .type = RTE_FLOW_ACTION_TYPE_END,
7214 struct rte_flow_error error;
7217 if (!priv->reta_idx_n || !priv->rxqs_n) {
7220 if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG))
7221 action_rss.types = 0;
7222 for (i = 0; i != priv->reta_idx_n; ++i)
7223 queue[i] = (*priv->reta_idx)[i];
7224 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7225 &attr, items, actions, false, &error);
7232 * Enable a flow control configured from the control plane.
7235 * Pointer to Ethernet device.
7237 * An Ethernet flow spec to apply.
7239 * An Ethernet flow mask to apply.
7242 * 0 on success, a negative errno value otherwise and rte_errno is set.
7245 mlx5_ctrl_flow(struct rte_eth_dev *dev,
7246 struct rte_flow_item_eth *eth_spec,
7247 struct rte_flow_item_eth *eth_mask)
7249 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
7253 * Create default miss flow rule matching lacp traffic
7256 * Pointer to Ethernet device.
7258 * An Ethernet flow spec to apply.
7261 * 0 on success, a negative errno value otherwise and rte_errno is set.
7264 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
7267 * The LACP matching is done by only using ether type since using
7268 * a multicast dst mac causes kernel to give low priority to this flow.
7270 static const struct rte_flow_item_eth lacp_spec = {
7271 .type = RTE_BE16(0x8809),
7273 static const struct rte_flow_item_eth lacp_mask = {
7276 const struct rte_flow_attr attr = {
7279 struct rte_flow_item items[] = {
7281 .type = RTE_FLOW_ITEM_TYPE_ETH,
7286 .type = RTE_FLOW_ITEM_TYPE_END,
7289 struct rte_flow_action actions[] = {
7291 .type = (enum rte_flow_action_type)
7292 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
7295 .type = RTE_FLOW_ACTION_TYPE_END,
7298 struct rte_flow_error error;
7299 uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7300 &attr, items, actions,
7311 * @see rte_flow_destroy()
7315 mlx5_flow_destroy(struct rte_eth_dev *dev,
7316 struct rte_flow *flow,
7317 struct rte_flow_error *error __rte_unused)
7319 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN,
7320 (uintptr_t)(void *)flow);
7325 * Destroy all flows.
7327 * @see rte_flow_flush()
7331 mlx5_flow_flush(struct rte_eth_dev *dev,
7332 struct rte_flow_error *error __rte_unused)
7334 mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false);
7341 * @see rte_flow_isolate()
7345 mlx5_flow_isolate(struct rte_eth_dev *dev,
7347 struct rte_flow_error *error)
7349 struct mlx5_priv *priv = dev->data->dev_private;
7351 if (dev->data->dev_started) {
7352 rte_flow_error_set(error, EBUSY,
7353 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7355 "port must be stopped first");
7358 priv->isolated = !!enable;
7360 dev->dev_ops = &mlx5_dev_ops_isolate;
7362 dev->dev_ops = &mlx5_dev_ops;
7364 dev->rx_descriptor_status = mlx5_rx_descriptor_status;
7365 dev->tx_descriptor_status = mlx5_tx_descriptor_status;
7373 * @see rte_flow_query()
7377 flow_drv_query(struct rte_eth_dev *dev,
7379 const struct rte_flow_action *actions,
7381 struct rte_flow_error *error)
7383 struct mlx5_priv *priv = dev->data->dev_private;
7384 const struct mlx5_flow_driver_ops *fops;
7385 struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
7387 enum mlx5_flow_drv_type ftype;
7390 return rte_flow_error_set(error, ENOENT,
7391 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7393 "invalid flow handle");
7395 ftype = flow->drv_type;
7396 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
7397 fops = flow_get_drv_ops(ftype);
7399 return fops->query(dev, flow, actions, data, error);
7405 * @see rte_flow_query()
7409 mlx5_flow_query(struct rte_eth_dev *dev,
7410 struct rte_flow *flow,
7411 const struct rte_flow_action *actions,
7413 struct rte_flow_error *error)
7417 ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
7425 * Get rte_flow callbacks.
7428 * Pointer to Ethernet device structure.
7430 * Pointer to operation-specific structure.
7435 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
7436 const struct rte_flow_ops **ops)
7438 *ops = &mlx5_flow_ops;
7443 * Validate meter policy actions.
7444 * Dispatcher for action type specific validation.
7447 * Pointer to the Ethernet device structure.
7449 * The meter policy action object to validate.
7451 * Attributes of flow to determine steering domain.
7452 * @param[out] is_rss
7454 * @param[out] domain_bitmap
7456 * @param[out] is_def_policy
7457 * Is default policy or not.
7459 * Perform verbose error reporting if not NULL. Initialized in case of
7463 * 0 on success, otherwise negative errno value.
7466 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
7467 const struct rte_flow_action *actions[RTE_COLORS],
7468 struct rte_flow_attr *attr,
7470 uint8_t *domain_bitmap,
7471 uint8_t *policy_mode,
7472 struct rte_mtr_error *error)
7474 const struct mlx5_flow_driver_ops *fops;
7476 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7477 return fops->validate_mtr_acts(dev, actions, attr, is_rss,
7478 domain_bitmap, policy_mode, error);
7482 * Destroy the meter table set.
7485 * Pointer to Ethernet device.
7486 * @param[in] mtr_policy
7487 * Meter policy struct.
7490 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7491 struct mlx5_flow_meter_policy *mtr_policy)
7493 const struct mlx5_flow_driver_ops *fops;
7495 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7496 fops->destroy_mtr_acts(dev, mtr_policy);
7500 * Create policy action, lock free,
7501 * (mutex should be acquired by caller).
7502 * Dispatcher for action type specific call.
7505 * Pointer to the Ethernet device structure.
7506 * @param[in] mtr_policy
7507 * Meter policy struct.
7509 * Action specification used to create meter actions.
7511 * Perform verbose error reporting if not NULL. Initialized in case of
7515 * 0 on success, otherwise negative errno value.
7518 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7519 struct mlx5_flow_meter_policy *mtr_policy,
7520 const struct rte_flow_action *actions[RTE_COLORS],
7521 struct rte_mtr_error *error)
7523 const struct mlx5_flow_driver_ops *fops;
7525 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7526 return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7530 * Create policy rules, lock free,
7531 * (mutex should be acquired by caller).
7532 * Dispatcher for action type specific call.
7535 * Pointer to the Ethernet device structure.
7536 * @param[in] mtr_policy
7537 * Meter policy struct.
7540 * 0 on success, -1 otherwise.
7543 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7544 struct mlx5_flow_meter_policy *mtr_policy)
7546 const struct mlx5_flow_driver_ops *fops;
7548 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7549 return fops->create_policy_rules(dev, mtr_policy);
7553 * Destroy policy rules, lock free,
7554 * (mutex should be acquired by caller).
7555 * Dispatcher for action type specific call.
7558 * Pointer to the Ethernet device structure.
7559 * @param[in] mtr_policy
7560 * Meter policy struct.
7563 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7564 struct mlx5_flow_meter_policy *mtr_policy)
7566 const struct mlx5_flow_driver_ops *fops;
7568 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7569 fops->destroy_policy_rules(dev, mtr_policy);
7573 * Destroy the default policy table set.
7576 * Pointer to Ethernet device.
7579 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7581 const struct mlx5_flow_driver_ops *fops;
7583 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7584 fops->destroy_def_policy(dev);
7588 * Destroy the default policy table set.
7591 * Pointer to Ethernet device.
7594 * 0 on success, -1 otherwise.
7597 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7599 const struct mlx5_flow_driver_ops *fops;
7601 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7602 return fops->create_def_policy(dev);
7606 * Create the needed meter and suffix tables.
7609 * Pointer to Ethernet device.
7612 * 0 on success, -1 otherwise.
7615 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7616 struct mlx5_flow_meter_info *fm,
7618 uint8_t domain_bitmap)
7620 const struct mlx5_flow_driver_ops *fops;
7622 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7623 return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7627 * Destroy the meter table set.
7630 * Pointer to Ethernet device.
7632 * Pointer to the meter table set.
7635 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7636 struct mlx5_flow_meter_info *fm)
7638 const struct mlx5_flow_driver_ops *fops;
7640 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7641 fops->destroy_mtr_tbls(dev, fm);
7645 * Destroy the global meter drop table.
7648 * Pointer to Ethernet device.
7651 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7653 const struct mlx5_flow_driver_ops *fops;
7655 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7656 fops->destroy_mtr_drop_tbls(dev);
7660 * Destroy the sub policy table with RX queue.
7663 * Pointer to Ethernet device.
7664 * @param[in] mtr_policy
7665 * Pointer to meter policy table.
7668 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
7669 struct mlx5_flow_meter_policy *mtr_policy)
7671 const struct mlx5_flow_driver_ops *fops;
7673 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7674 fops->destroy_sub_policy_with_rxq(dev, mtr_policy);
7678 * Allocate the needed aso flow meter id.
7681 * Pointer to Ethernet device.
7684 * Index to aso flow meter on success, NULL otherwise.
7687 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7689 const struct mlx5_flow_driver_ops *fops;
7691 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7692 return fops->create_meter(dev);
7696 * Free the aso flow meter id.
7699 * Pointer to Ethernet device.
7700 * @param[in] mtr_idx
7701 * Index to aso flow meter to be free.
7707 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7709 const struct mlx5_flow_driver_ops *fops;
7711 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7712 fops->free_meter(dev, mtr_idx);
7716 * Allocate a counter.
7719 * Pointer to Ethernet device structure.
7722 * Index to allocated counter on success, 0 otherwise.
7725 mlx5_counter_alloc(struct rte_eth_dev *dev)
7727 const struct mlx5_flow_driver_ops *fops;
7728 struct rte_flow_attr attr = { .transfer = 0 };
7730 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7731 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7732 return fops->counter_alloc(dev);
7735 "port %u counter allocate is not supported.",
7736 dev->data->port_id);
7744 * Pointer to Ethernet device structure.
7746 * Index to counter to be free.
7749 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7751 const struct mlx5_flow_driver_ops *fops;
7752 struct rte_flow_attr attr = { .transfer = 0 };
7754 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7755 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7756 fops->counter_free(dev, cnt);
7760 "port %u counter free is not supported.",
7761 dev->data->port_id);
7765 * Query counter statistics.
7768 * Pointer to Ethernet device structure.
7770 * Index to counter to query.
7772 * Set to clear counter statistics.
7774 * The counter hits packets number to save.
7776 * The counter hits bytes number to save.
7779 * 0 on success, a negative errno value otherwise.
7782 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7783 bool clear, uint64_t *pkts, uint64_t *bytes)
7785 const struct mlx5_flow_driver_ops *fops;
7786 struct rte_flow_attr attr = { .transfer = 0 };
7788 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7789 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7790 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7793 "port %u counter query is not supported.",
7794 dev->data->port_id);
7799 * Allocate a new memory for the counter values wrapped by all the needed
7803 * Pointer to mlx5_dev_ctx_shared object.
7806 * 0 on success, a negative errno value otherwise.
7809 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7811 struct mlx5_counter_stats_mem_mng *mem_mng;
7812 volatile struct flow_counter_stats *raw_data;
7813 int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7814 int size = (sizeof(struct flow_counter_stats) *
7815 MLX5_COUNTERS_PER_POOL +
7816 sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7817 sizeof(struct mlx5_counter_stats_mem_mng);
7818 size_t pgsize = rte_mem_page_size();
7823 if (pgsize == (size_t)-1) {
7824 DRV_LOG(ERR, "Failed to get mem page size");
7828 mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7833 mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7834 size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7835 ret = mlx5_os_wrapped_mkey_create(sh->cdev->ctx, sh->cdev->pd,
7836 sh->cdev->pdn, mem, size,
7843 mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7844 raw_data = (volatile struct flow_counter_stats *)mem;
7845 for (i = 0; i < raws_n; ++i) {
7846 mem_mng->raws[i].mem_mng = mem_mng;
7847 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7849 for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7850 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7851 mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7853 LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7854 sh->cmng.mem_mng = mem_mng;
7859 * Set the statistic memory to the new counter pool.
7862 * Pointer to mlx5_dev_ctx_shared object.
7864 * Pointer to the pool to set the statistic memory.
7867 * 0 on success, a negative errno value otherwise.
7870 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7871 struct mlx5_flow_counter_pool *pool)
7873 struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7874 /* Resize statistic memory once used out. */
7875 if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7876 mlx5_flow_create_counter_stat_mem_mng(sh)) {
7877 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7880 rte_spinlock_lock(&pool->sl);
7881 pool->raw = cmng->mem_mng->raws + pool->index %
7882 MLX5_CNT_CONTAINER_RESIZE;
7883 rte_spinlock_unlock(&pool->sl);
7884 pool->raw_hw = NULL;
7888 #define MLX5_POOL_QUERY_FREQ_US 1000000
7891 * Set the periodic procedure for triggering asynchronous batch queries for all
7892 * the counter pools.
7895 * Pointer to mlx5_dev_ctx_shared object.
7898 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7900 uint32_t pools_n, us;
7902 pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7903 us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7904 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7905 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7906 sh->cmng.query_thread_on = 0;
7907 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7909 sh->cmng.query_thread_on = 1;
7914 * The periodic procedure for triggering asynchronous batch queries for all the
7915 * counter pools. This function is probably called by the host thread.
7918 * The parameter for the alarm process.
7921 mlx5_flow_query_alarm(void *arg)
7923 struct mlx5_dev_ctx_shared *sh = arg;
7925 uint16_t pool_index = sh->cmng.pool_index;
7926 struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7927 struct mlx5_flow_counter_pool *pool;
7930 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7932 rte_spinlock_lock(&cmng->pool_update_sl);
7933 pool = cmng->pools[pool_index];
7934 n_valid = cmng->n_valid;
7935 rte_spinlock_unlock(&cmng->pool_update_sl);
7936 /* Set the statistic memory to the new created pool. */
7937 if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7940 /* There is a pool query in progress. */
7943 LIST_FIRST(&sh->cmng.free_stat_raws);
7945 /* No free counter statistics raw memory. */
7948 * Identify the counters released between query trigger and query
7949 * handle more efficiently. The counter released in this gap period
7950 * should wait for a new round of query as the new arrived packets
7951 * will not be taken into account.
7954 ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7955 MLX5_COUNTERS_PER_POOL,
7957 pool->raw_hw->mem_mng->wm.lkey,
7961 (uint64_t)(uintptr_t)pool);
7963 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7964 " %d", pool->min_dcs->id);
7965 pool->raw_hw = NULL;
7968 LIST_REMOVE(pool->raw_hw, next);
7969 sh->cmng.pending_queries++;
7971 if (pool_index >= n_valid)
7974 sh->cmng.pool_index = pool_index;
7975 mlx5_set_query_alarm(sh);
7979 * Check and callback event for new aged flow in the counter pool
7982 * Pointer to mlx5_dev_ctx_shared object.
7984 * Pointer to Current counter pool.
7987 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7988 struct mlx5_flow_counter_pool *pool)
7990 struct mlx5_priv *priv;
7991 struct mlx5_flow_counter *cnt;
7992 struct mlx5_age_info *age_info;
7993 struct mlx5_age_param *age_param;
7994 struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7995 struct mlx5_counter_stats_raw *prev = pool->raw;
7996 const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7997 const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7998 uint16_t expected = AGE_CANDIDATE;
8001 pool->time_of_last_age_check = curr_time;
8002 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
8003 cnt = MLX5_POOL_GET_CNT(pool, i);
8004 age_param = MLX5_CNT_TO_AGE(cnt);
8005 if (__atomic_load_n(&age_param->state,
8006 __ATOMIC_RELAXED) != AGE_CANDIDATE)
8008 if (cur->data[i].hits != prev->data[i].hits) {
8009 __atomic_store_n(&age_param->sec_since_last_hit, 0,
8013 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
8015 __ATOMIC_RELAXED) <= age_param->timeout)
8018 * Hold the lock first, or if between the
8019 * state AGE_TMOUT and tailq operation the
8020 * release happened, the release procedure
8021 * may delete a non-existent tailq node.
8023 priv = rte_eth_devices[age_param->port_id].data->dev_private;
8024 age_info = GET_PORT_AGE_INFO(priv);
8025 rte_spinlock_lock(&age_info->aged_sl);
8026 if (__atomic_compare_exchange_n(&age_param->state, &expected,
8029 __ATOMIC_RELAXED)) {
8030 TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
8031 MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
8033 rte_spinlock_unlock(&age_info->aged_sl);
8035 mlx5_age_event_prepare(sh);
8039 * Handler for the HW respond about ready values from an asynchronous batch
8040 * query. This function is probably called by the host thread.
8043 * The pointer to the shared device context.
8044 * @param[in] async_id
8045 * The Devx async ID.
8047 * The status of the completion.
8050 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
8051 uint64_t async_id, int status)
8053 struct mlx5_flow_counter_pool *pool =
8054 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
8055 struct mlx5_counter_stats_raw *raw_to_free;
8056 uint8_t query_gen = pool->query_gen ^ 1;
8057 struct mlx5_flow_counter_mng *cmng = &sh->cmng;
8058 enum mlx5_counter_type cnt_type =
8059 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
8060 MLX5_COUNTER_TYPE_ORIGIN;
8062 if (unlikely(status)) {
8063 raw_to_free = pool->raw_hw;
8065 raw_to_free = pool->raw;
8067 mlx5_flow_aging_check(sh, pool);
8068 rte_spinlock_lock(&pool->sl);
8069 pool->raw = pool->raw_hw;
8070 rte_spinlock_unlock(&pool->sl);
8071 /* Be sure the new raw counters data is updated in memory. */
8073 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
8074 rte_spinlock_lock(&cmng->csl[cnt_type]);
8075 TAILQ_CONCAT(&cmng->counters[cnt_type],
8076 &pool->counters[query_gen], next);
8077 rte_spinlock_unlock(&cmng->csl[cnt_type]);
8080 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
8081 pool->raw_hw = NULL;
8082 sh->cmng.pending_queries--;
8086 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
8087 const struct flow_grp_info *grp_info,
8088 struct rte_flow_error *error)
8090 if (grp_info->transfer && grp_info->external &&
8091 grp_info->fdb_def_rule) {
8092 if (group == UINT32_MAX)
8093 return rte_flow_error_set
8095 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8097 "group index not supported");
8102 DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
8107 * Translate the rte_flow group index to HW table value.
8109 * If tunnel offload is disabled, all group ids converted to flow table
8110 * id using the standard method.
8111 * If tunnel offload is enabled, group id can be converted using the
8112 * standard or tunnel conversion method. Group conversion method
8113 * selection depends on flags in `grp_info` parameter:
8114 * - Internal (grp_info.external == 0) groups conversion uses the
8116 * - Group ids in JUMP action converted with the tunnel conversion.
8117 * - Group id in rule attribute conversion depends on a rule type and
8119 * ** non zero group attributes converted with the tunnel method
8120 * ** zero group attribute in non-tunnel rule is converted using the
8121 * standard method - there's only one root table
8122 * ** zero group attribute in steer tunnel rule is converted with the
8123 * standard method - single root table
8124 * ** zero group attribute in match tunnel rule is a special OvS
8125 * case: that value is used for portability reasons. That group
8126 * id is converted with the tunnel conversion method.
8131 * PMD tunnel offload object
8133 * rte_flow group index value.
8136 * @param[in] grp_info
8137 * flags used for conversion
8139 * Pointer to error structure.
8142 * 0 on success, a negative errno value otherwise and rte_errno is set.
8145 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
8146 const struct mlx5_flow_tunnel *tunnel,
8147 uint32_t group, uint32_t *table,
8148 const struct flow_grp_info *grp_info,
8149 struct rte_flow_error *error)
8152 bool standard_translation;
8154 if (!grp_info->skip_scale && grp_info->external &&
8155 group < MLX5_MAX_TABLES_EXTERNAL)
8156 group *= MLX5_FLOW_TABLE_FACTOR;
8157 if (is_tunnel_offload_active(dev)) {
8158 standard_translation = !grp_info->external ||
8159 grp_info->std_tbl_fix;
8161 standard_translation = true;
8164 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
8165 dev->data->port_id, group, grp_info->transfer,
8166 grp_info->external, grp_info->fdb_def_rule,
8167 standard_translation ? "STANDARD" : "TUNNEL");
8168 if (standard_translation)
8169 ret = flow_group_to_table(dev->data->port_id, group, table,
8172 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
8179 * Discover availability of metadata reg_c's.
8181 * Iteratively use test flows to check availability.
8184 * Pointer to the Ethernet device structure.
8187 * 0 on success, a negative errno value otherwise and rte_errno is set.
8190 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
8192 struct mlx5_priv *priv = dev->data->dev_private;
8193 enum modify_reg idx;
8196 /* reg_c[0] and reg_c[1] are reserved. */
8197 priv->sh->flow_mreg_c[n++] = REG_C_0;
8198 priv->sh->flow_mreg_c[n++] = REG_C_1;
8199 /* Discover availability of other reg_c's. */
8200 for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
8201 struct rte_flow_attr attr = {
8202 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
8203 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
8206 struct rte_flow_item items[] = {
8208 .type = RTE_FLOW_ITEM_TYPE_END,
8211 struct rte_flow_action actions[] = {
8213 .type = (enum rte_flow_action_type)
8214 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
8215 .conf = &(struct mlx5_flow_action_copy_mreg){
8221 .type = RTE_FLOW_ACTION_TYPE_JUMP,
8222 .conf = &(struct rte_flow_action_jump){
8223 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
8227 .type = RTE_FLOW_ACTION_TYPE_END,
8231 struct rte_flow *flow;
8232 struct rte_flow_error error;
8234 if (!priv->config.dv_flow_en)
8236 /* Create internal flow, validation skips copy action. */
8237 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr,
8238 items, actions, false, &error);
8239 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8243 priv->sh->flow_mreg_c[n++] = idx;
8244 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx);
8246 for (; n < MLX5_MREG_C_NUM; ++n)
8247 priv->sh->flow_mreg_c[n] = REG_NON;
8248 priv->sh->metadata_regc_check_flag = 1;
8253 save_dump_file(const uint8_t *data, uint32_t size,
8254 uint32_t type, uint64_t id, void *arg, FILE *file)
8256 char line[BUF_SIZE];
8259 uint32_t actions_num;
8260 struct rte_flow_query_count *count;
8262 memset(line, 0, BUF_SIZE);
8264 case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR:
8265 actions_num = *(uint32_t *)(arg);
8266 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",%d,",
8267 type, id, actions_num);
8269 case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT:
8270 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",",
8273 case DR_DUMP_REC_TYPE_PMD_COUNTER:
8274 count = (struct rte_flow_query_count *)arg;
8276 "%d,0x%" PRIx64 ",%" PRIu64 ",%" PRIu64 "\n",
8277 type, id, count->hits, count->bytes);
8283 for (k = 0; k < size; k++) {
8284 /* Make sure we do not overrun the line buffer length. */
8285 if (out >= BUF_SIZE - 4) {
8289 out += snprintf(line + out, BUF_SIZE - out, "%02x",
8292 fprintf(file, "%s\n", line);
8297 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow,
8298 struct rte_flow_query_count *count, struct rte_flow_error *error)
8300 struct rte_flow_action action[2];
8301 enum mlx5_flow_drv_type ftype;
8302 const struct mlx5_flow_driver_ops *fops;
8305 return rte_flow_error_set(error, ENOENT,
8306 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8308 "invalid flow handle");
8310 action[0].type = RTE_FLOW_ACTION_TYPE_COUNT;
8311 action[1].type = RTE_FLOW_ACTION_TYPE_END;
8312 if (flow->counter) {
8313 memset(count, 0, sizeof(struct rte_flow_query_count));
8314 ftype = (enum mlx5_flow_drv_type)(flow->drv_type);
8315 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN &&
8316 ftype < MLX5_FLOW_TYPE_MAX);
8317 fops = flow_get_drv_ops(ftype);
8318 return fops->query(dev, flow, action, count, error);
8323 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8325 * Dump flow ipool data to file
8328 * The pointer to Ethernet device.
8330 * A pointer to a file for output.
8332 * Perform verbose error reporting if not NULL. PMDs initialize this
8333 * structure in case of error only.
8335 * 0 on success, a negative value otherwise.
8338 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev,
8339 struct rte_flow *flow, FILE *file,
8340 struct rte_flow_error *error)
8342 struct mlx5_priv *priv = dev->data->dev_private;
8343 struct mlx5_flow_dv_modify_hdr_resource *modify_hdr;
8344 struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8345 uint32_t handle_idx;
8346 struct mlx5_flow_handle *dh;
8347 struct rte_flow_query_count count;
8348 uint32_t actions_num;
8349 const uint8_t *data;
8353 void *action = NULL;
8356 return rte_flow_error_set(error, ENOENT,
8357 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8359 "invalid flow handle");
8361 handle_idx = flow->dev_handles;
8362 while (handle_idx) {
8363 dh = mlx5_ipool_get(priv->sh->ipool
8364 [MLX5_IPOOL_MLX5_FLOW], handle_idx);
8367 handle_idx = dh->next.next;
8370 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8371 flow_dv_query_count_ptr(dev, flow->counter,
8374 id = (uint64_t)(uintptr_t)action;
8375 if (!mlx5_flow_query_counter(dev, flow, &count, error))
8376 save_dump_file(NULL, 0, type,
8377 id, (void *)&count, file);
8379 /* Get modify_hdr and encap_decap buf from ipools. */
8381 modify_hdr = dh->dvh.modify_hdr;
8383 if (dh->dvh.rix_encap_decap) {
8384 encap_decap = mlx5_ipool_get(priv->sh->ipool
8385 [MLX5_IPOOL_DECAP_ENCAP],
8386 dh->dvh.rix_encap_decap);
8389 data = (const uint8_t *)modify_hdr->actions;
8390 size = (size_t)(modify_hdr->actions_num) * 8;
8391 id = (uint64_t)(uintptr_t)modify_hdr->action;
8392 actions_num = modify_hdr->actions_num;
8393 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8394 save_dump_file(data, size, type, id,
8395 (void *)(&actions_num), file);
8398 data = encap_decap->buf;
8399 size = encap_decap->size;
8400 id = (uint64_t)(uintptr_t)encap_decap->action;
8401 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8402 save_dump_file(data, size, type,
8410 * Dump all flow's encap_decap/modify_hdr/counter data to file
8413 * The pointer to Ethernet device.
8415 * A pointer to a file for output.
8417 * Perform verbose error reporting if not NULL. PMDs initialize this
8418 * structure in case of error only.
8420 * 0 on success, a negative value otherwise.
8423 mlx5_flow_dev_dump_sh_all(struct rte_eth_dev *dev,
8424 FILE *file, struct rte_flow_error *error)
8426 struct mlx5_priv *priv = dev->data->dev_private;
8427 struct mlx5_dev_ctx_shared *sh = priv->sh;
8428 struct mlx5_hlist *h;
8429 struct mlx5_flow_dv_modify_hdr_resource *modify_hdr;
8430 struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8431 struct rte_flow_query_count count;
8432 uint32_t actions_num;
8433 const uint8_t *data;
8439 struct mlx5_list_inconst *l_inconst;
8440 struct mlx5_list_entry *e;
8442 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
8446 /* encap_decap hlist is lcore_share, get global core cache. */
8447 i = MLX5_LIST_GLOBAL;
8448 h = sh->encaps_decaps;
8450 for (j = 0; j <= h->mask; j++) {
8451 l_inconst = &h->buckets[j].l;
8452 if (!l_inconst || !l_inconst->cache[i])
8455 e = LIST_FIRST(&l_inconst->cache[i]->h);
8458 (struct mlx5_flow_dv_encap_decap_resource *)e;
8459 data = encap_decap->buf;
8460 size = encap_decap->size;
8461 id = (uint64_t)(uintptr_t)encap_decap->action;
8462 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8463 save_dump_file(data, size, type,
8465 e = LIST_NEXT(e, next);
8470 /* get modify_hdr */
8471 h = sh->modify_cmds;
8473 lcore_index = rte_lcore_index(rte_lcore_id());
8474 if (unlikely(lcore_index == -1)) {
8475 lcore_index = MLX5_LIST_NLCORE;
8476 rte_spinlock_lock(&h->l_const.lcore_lock);
8480 for (j = 0; j <= h->mask; j++) {
8481 l_inconst = &h->buckets[j].l;
8482 if (!l_inconst || !l_inconst->cache[i])
8485 e = LIST_FIRST(&l_inconst->cache[i]->h);
8488 (struct mlx5_flow_dv_modify_hdr_resource *)e;
8489 data = (const uint8_t *)modify_hdr->actions;
8490 size = (size_t)(modify_hdr->actions_num) * 8;
8491 actions_num = modify_hdr->actions_num;
8492 id = (uint64_t)(uintptr_t)modify_hdr->action;
8493 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8494 save_dump_file(data, size, type, id,
8495 (void *)(&actions_num), file);
8496 e = LIST_NEXT(e, next);
8500 if (unlikely(lcore_index == MLX5_LIST_NLCORE))
8501 rte_spinlock_unlock(&h->l_const.lcore_lock);
8505 MLX5_ASSERT(cmng->n_valid <= cmng->n);
8506 max = MLX5_COUNTERS_PER_POOL * cmng->n_valid;
8507 for (j = 1; j <= max; j++) {
8509 flow_dv_query_count_ptr(dev, j, &action, error);
8511 if (!flow_dv_query_count(dev, j, &count, error)) {
8512 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8513 id = (uint64_t)(uintptr_t)action;
8514 save_dump_file(NULL, 0, type,
8515 id, (void *)&count, file);
8524 * Dump flow raw hw data to file
8527 * The pointer to Ethernet device.
8529 * A pointer to a file for output.
8531 * Perform verbose error reporting if not NULL. PMDs initialize this
8532 * structure in case of error only.
8534 * 0 on success, a nagative value otherwise.
8537 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
8539 struct rte_flow_error *error __rte_unused)
8541 struct mlx5_priv *priv = dev->data->dev_private;
8542 struct mlx5_dev_ctx_shared *sh = priv->sh;
8543 uint32_t handle_idx;
8545 struct mlx5_flow_handle *dh;
8546 struct rte_flow *flow;
8548 if (!priv->config.dv_flow_en) {
8549 if (fputs("device dv flow disabled\n", file) <= 0)
8556 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8557 if (mlx5_flow_dev_dump_sh_all(dev, file, error))
8560 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
8562 sh->tx_domain, file);
8565 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8566 (uintptr_t)(void *)flow_idx);
8570 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8571 mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8573 handle_idx = flow->dev_handles;
8574 while (handle_idx) {
8575 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8580 ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
8585 handle_idx = dh->next.next;
8591 * Get aged-out flows.
8594 * Pointer to the Ethernet device structure.
8595 * @param[in] context
8596 * The address of an array of pointers to the aged-out flows contexts.
8597 * @param[in] nb_countexts
8598 * The length of context array pointers.
8600 * Perform verbose error reporting if not NULL. Initialized in case of
8604 * how many contexts get in success, otherwise negative errno value.
8605 * if nb_contexts is 0, return the amount of all aged contexts.
8606 * if nb_contexts is not 0 , return the amount of aged flows reported
8607 * in the context array.
8610 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
8611 uint32_t nb_contexts, struct rte_flow_error *error)
8613 const struct mlx5_flow_driver_ops *fops;
8614 struct rte_flow_attr attr = { .transfer = 0 };
8616 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8617 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8618 return fops->get_aged_flows(dev, contexts, nb_contexts,
8622 "port %u get aged flows is not supported.",
8623 dev->data->port_id);
8627 /* Wrapper for driver action_validate op callback */
8629 flow_drv_action_validate(struct rte_eth_dev *dev,
8630 const struct rte_flow_indir_action_conf *conf,
8631 const struct rte_flow_action *action,
8632 const struct mlx5_flow_driver_ops *fops,
8633 struct rte_flow_error *error)
8635 static const char err_msg[] = "indirect action validation unsupported";
8637 if (!fops->action_validate) {
8638 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8639 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8643 return fops->action_validate(dev, conf, action, error);
8647 * Destroys the shared action by handle.
8650 * Pointer to Ethernet device structure.
8652 * Handle for the indirect action object to be destroyed.
8654 * Perform verbose error reporting if not NULL. PMDs initialize this
8655 * structure in case of error only.
8658 * 0 on success, a negative errno value otherwise and rte_errno is set.
8660 * @note: wrapper for driver action_create op callback.
8663 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
8664 struct rte_flow_action_handle *handle,
8665 struct rte_flow_error *error)
8667 static const char err_msg[] = "indirect action destruction unsupported";
8668 struct rte_flow_attr attr = { .transfer = 0 };
8669 const struct mlx5_flow_driver_ops *fops =
8670 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8672 if (!fops->action_destroy) {
8673 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8674 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8678 return fops->action_destroy(dev, handle, error);
8681 /* Wrapper for driver action_destroy op callback */
8683 flow_drv_action_update(struct rte_eth_dev *dev,
8684 struct rte_flow_action_handle *handle,
8686 const struct mlx5_flow_driver_ops *fops,
8687 struct rte_flow_error *error)
8689 static const char err_msg[] = "indirect action update unsupported";
8691 if (!fops->action_update) {
8692 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8693 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8697 return fops->action_update(dev, handle, update, error);
8700 /* Wrapper for driver action_destroy op callback */
8702 flow_drv_action_query(struct rte_eth_dev *dev,
8703 const struct rte_flow_action_handle *handle,
8705 const struct mlx5_flow_driver_ops *fops,
8706 struct rte_flow_error *error)
8708 static const char err_msg[] = "indirect action query unsupported";
8710 if (!fops->action_query) {
8711 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8712 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8716 return fops->action_query(dev, handle, data, error);
8720 * Create indirect action for reuse in multiple flow rules.
8723 * Pointer to Ethernet device structure.
8725 * Pointer to indirect action object configuration.
8727 * Action configuration for indirect action object creation.
8729 * Perform verbose error reporting if not NULL. PMDs initialize this
8730 * structure in case of error only.
8732 * A valid handle in case of success, NULL otherwise and rte_errno is set.
8734 static struct rte_flow_action_handle *
8735 mlx5_action_handle_create(struct rte_eth_dev *dev,
8736 const struct rte_flow_indir_action_conf *conf,
8737 const struct rte_flow_action *action,
8738 struct rte_flow_error *error)
8740 static const char err_msg[] = "indirect action creation unsupported";
8741 struct rte_flow_attr attr = { .transfer = 0 };
8742 const struct mlx5_flow_driver_ops *fops =
8743 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8745 if (flow_drv_action_validate(dev, conf, action, fops, error))
8747 if (!fops->action_create) {
8748 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8749 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8753 return fops->action_create(dev, conf, action, error);
8757 * Updates inplace the indirect action configuration pointed by *handle*
8758 * with the configuration provided as *update* argument.
8759 * The update of the indirect action configuration effects all flow rules
8760 * reusing the action via handle.
8763 * Pointer to Ethernet device structure.
8765 * Handle for the indirect action to be updated.
8767 * Action specification used to modify the action pointed by handle.
8768 * *update* could be of same type with the action pointed by the *handle*
8769 * handle argument, or some other structures like a wrapper, depending on
8770 * the indirect action type.
8772 * Perform verbose error reporting if not NULL. PMDs initialize this
8773 * structure in case of error only.
8776 * 0 on success, a negative errno value otherwise and rte_errno is set.
8779 mlx5_action_handle_update(struct rte_eth_dev *dev,
8780 struct rte_flow_action_handle *handle,
8782 struct rte_flow_error *error)
8784 struct rte_flow_attr attr = { .transfer = 0 };
8785 const struct mlx5_flow_driver_ops *fops =
8786 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8789 ret = flow_drv_action_validate(dev, NULL,
8790 (const struct rte_flow_action *)update, fops, error);
8793 return flow_drv_action_update(dev, handle, update, fops,
8798 * Query the indirect action by handle.
8800 * This function allows retrieving action-specific data such as counters.
8801 * Data is gathered by special action which may be present/referenced in
8802 * more than one flow rule definition.
8804 * see @RTE_FLOW_ACTION_TYPE_COUNT
8807 * Pointer to Ethernet device structure.
8809 * Handle for the indirect action to query.
8810 * @param[in, out] data
8811 * Pointer to storage for the associated query data type.
8813 * Perform verbose error reporting if not NULL. PMDs initialize this
8814 * structure in case of error only.
8817 * 0 on success, a negative errno value otherwise and rte_errno is set.
8820 mlx5_action_handle_query(struct rte_eth_dev *dev,
8821 const struct rte_flow_action_handle *handle,
8823 struct rte_flow_error *error)
8825 struct rte_flow_attr attr = { .transfer = 0 };
8826 const struct mlx5_flow_driver_ops *fops =
8827 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8829 return flow_drv_action_query(dev, handle, data, fops, error);
8833 * Destroy all indirect actions (shared RSS).
8836 * Pointer to Ethernet device.
8839 * 0 on success, a negative errno value otherwise and rte_errno is set.
8842 mlx5_action_handle_flush(struct rte_eth_dev *dev)
8844 struct rte_flow_error error;
8845 struct mlx5_priv *priv = dev->data->dev_private;
8846 struct mlx5_shared_action_rss *shared_rss;
8850 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
8851 priv->rss_shared_actions, idx, shared_rss, next) {
8852 ret |= mlx5_action_handle_destroy(dev,
8853 (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
8859 * Validate existing indirect actions against current device configuration
8860 * and attach them to device resources.
8863 * Pointer to Ethernet device.
8866 * 0 on success, a negative errno value otherwise and rte_errno is set.
8869 mlx5_action_handle_attach(struct rte_eth_dev *dev)
8871 struct mlx5_priv *priv = dev->data->dev_private;
8872 struct mlx5_indexed_pool *ipool =
8873 priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS];
8874 struct mlx5_shared_action_rss *shared_rss, *shared_rss_last;
8878 ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8879 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8880 const char *message;
8883 ret = mlx5_validate_rss_queues(dev, ind_tbl->queues,
8885 &message, &queue_idx);
8887 DRV_LOG(ERR, "Port %u cannot use queue %u in RSS: %s",
8888 dev->data->port_id, ind_tbl->queues[queue_idx],
8895 ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8896 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8898 ret = mlx5_ind_table_obj_attach(dev, ind_tbl);
8900 DRV_LOG(ERR, "Port %u could not attach "
8901 "indirection table obj %p",
8902 dev->data->port_id, (void *)ind_tbl);
8908 shared_rss_last = shared_rss;
8909 ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8910 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8912 if (shared_rss == shared_rss_last)
8914 if (mlx5_ind_table_obj_detach(dev, ind_tbl) != 0)
8915 DRV_LOG(CRIT, "Port %u could not detach "
8916 "indirection table obj %p on rollback",
8917 dev->data->port_id, (void *)ind_tbl);
8923 * Detach indirect actions of the device from its resources.
8926 * Pointer to Ethernet device.
8929 * 0 on success, a negative errno value otherwise and rte_errno is set.
8932 mlx5_action_handle_detach(struct rte_eth_dev *dev)
8934 struct mlx5_priv *priv = dev->data->dev_private;
8935 struct mlx5_indexed_pool *ipool =
8936 priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS];
8937 struct mlx5_shared_action_rss *shared_rss, *shared_rss_last;
8941 ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8942 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8944 ret = mlx5_ind_table_obj_detach(dev, ind_tbl);
8946 DRV_LOG(ERR, "Port %u could not detach "
8947 "indirection table obj %p",
8948 dev->data->port_id, (void *)ind_tbl);
8954 shared_rss_last = shared_rss;
8955 ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8956 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8958 if (shared_rss == shared_rss_last)
8960 if (mlx5_ind_table_obj_attach(dev, ind_tbl) != 0)
8961 DRV_LOG(CRIT, "Port %u could not attach "
8962 "indirection table obj %p on rollback",
8963 dev->data->port_id, (void *)ind_tbl);
8968 #ifndef HAVE_MLX5DV_DR
8969 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
8971 #define MLX5_DOMAIN_SYNC_FLOW \
8972 (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
8975 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
8977 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
8978 const struct mlx5_flow_driver_ops *fops;
8980 struct rte_flow_attr attr = { .transfer = 0 };
8982 fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8983 ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
8989 const struct mlx5_flow_tunnel *
8990 mlx5_get_tof(const struct rte_flow_item *item,
8991 const struct rte_flow_action *action,
8992 enum mlx5_tof_rule_type *rule_type)
8994 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
8995 if (item->type == (typeof(item->type))
8996 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) {
8997 *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE;
8998 return flow_items_to_tunnel(item);
9001 for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) {
9002 if (action->type == (typeof(action->type))
9003 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) {
9004 *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE;
9005 return flow_actions_to_tunnel(action);
9012 * tunnel offload functionalilty is defined for DV environment only
9014 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
9016 union tunnel_offload_mark {
9019 uint32_t app_reserve:8;
9020 uint32_t table_id:15;
9021 uint32_t transfer:1;
9022 uint32_t _unused_:8;
9027 mlx5_access_tunnel_offload_db
9028 (struct rte_eth_dev *dev,
9029 bool (*match)(struct rte_eth_dev *,
9030 struct mlx5_flow_tunnel *, const void *),
9031 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
9032 void (*miss)(struct rte_eth_dev *, void *),
9033 void *ctx, bool lock_op);
9036 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
9037 struct rte_flow *flow,
9038 const struct rte_flow_attr *attr,
9039 const struct rte_flow_action *app_actions,
9041 const struct mlx5_flow_tunnel *tunnel,
9042 struct tunnel_default_miss_ctx *ctx,
9043 struct rte_flow_error *error)
9045 struct mlx5_priv *priv = dev->data->dev_private;
9046 struct mlx5_flow *dev_flow;
9047 struct rte_flow_attr miss_attr = *attr;
9048 const struct rte_flow_item miss_items[2] = {
9050 .type = RTE_FLOW_ITEM_TYPE_ETH,
9056 .type = RTE_FLOW_ITEM_TYPE_END,
9062 union tunnel_offload_mark mark_id;
9063 struct rte_flow_action_mark miss_mark;
9064 struct rte_flow_action miss_actions[3] = {
9065 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
9066 [2] = { .type = RTE_FLOW_ACTION_TYPE_END, .conf = NULL }
9068 const struct rte_flow_action_jump *jump_data;
9069 uint32_t i, flow_table = 0; /* prevent compilation warning */
9070 struct flow_grp_info grp_info = {
9072 .transfer = attr->transfer,
9073 .fdb_def_rule = !!priv->fdb_def_rule,
9078 if (!attr->transfer) {
9081 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
9082 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
9083 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
9086 return rte_flow_error_set
9088 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9089 NULL, "invalid default miss RSS");
9090 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
9091 ctx->action_rss.level = 0,
9092 ctx->action_rss.types = priv->rss_conf.rss_hf,
9093 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
9094 ctx->action_rss.queue_num = priv->reta_idx_n,
9095 ctx->action_rss.key = priv->rss_conf.rss_key,
9096 ctx->action_rss.queue = ctx->queue;
9097 if (!priv->reta_idx_n || !priv->rxqs_n)
9098 return rte_flow_error_set
9100 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9101 NULL, "invalid port configuration");
9102 if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG))
9103 ctx->action_rss.types = 0;
9104 for (i = 0; i != priv->reta_idx_n; ++i)
9105 ctx->queue[i] = (*priv->reta_idx)[i];
9107 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
9108 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
9110 miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
9111 for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
9112 jump_data = app_actions->conf;
9113 miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
9114 miss_attr.group = jump_data->group;
9115 ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
9116 &flow_table, &grp_info, error);
9118 return rte_flow_error_set(error, EINVAL,
9119 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9120 NULL, "invalid tunnel id");
9121 mark_id.app_reserve = 0;
9122 mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
9123 mark_id.transfer = !!attr->transfer;
9124 mark_id._unused_ = 0;
9125 miss_mark.id = mark_id.val;
9126 dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
9127 miss_items, miss_actions, flow_idx, error);
9130 dev_flow->flow = flow;
9131 dev_flow->external = true;
9132 dev_flow->tunnel = tunnel;
9133 dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE;
9134 /* Subflow object was created, we must include one in the list. */
9135 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
9136 dev_flow->handle, next);
9138 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
9139 dev->data->port_id, tunnel->app_tunnel.type,
9140 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
9141 ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
9142 miss_actions, error);
9144 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
9150 static const struct mlx5_flow_tbl_data_entry *
9151 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
9153 struct mlx5_priv *priv = dev->data->dev_private;
9154 struct mlx5_dev_ctx_shared *sh = priv->sh;
9155 struct mlx5_list_entry *he;
9156 union tunnel_offload_mark mbits = { .val = mark };
9157 union mlx5_flow_tbl_key table_key = {
9159 .level = tunnel_id_to_flow_tbl(mbits.table_id),
9163 .is_fdb = !!mbits.transfer,
9167 struct mlx5_flow_cb_ctx ctx = {
9168 .data = &table_key.v64,
9171 he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx);
9173 container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
9177 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx,
9178 struct mlx5_list_entry *entry)
9180 struct mlx5_dev_ctx_shared *sh = tool_ctx;
9181 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9183 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9184 tunnel_flow_tbl_to_id(tte->flow_table));
9189 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused,
9190 struct mlx5_list_entry *entry, void *cb_ctx)
9192 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9193 union tunnel_tbl_key tbl = {
9194 .val = *(uint64_t *)(ctx->data),
9196 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9198 return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
9201 static struct mlx5_list_entry *
9202 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx)
9204 struct mlx5_dev_ctx_shared *sh = tool_ctx;
9205 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9206 struct tunnel_tbl_entry *tte;
9207 union tunnel_tbl_key tbl = {
9208 .val = *(uint64_t *)(ctx->data),
9211 tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
9216 mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9218 if (tte->flow_table >= MLX5_MAX_TABLES) {
9219 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
9221 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9224 } else if (!tte->flow_table) {
9227 tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
9228 tte->tunnel_id = tbl.tunnel_id;
9229 tte->group = tbl.group;
9237 static struct mlx5_list_entry *
9238 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused,
9239 struct mlx5_list_entry *oentry,
9240 void *cb_ctx __rte_unused)
9242 struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte),
9247 memcpy(tte, oentry, sizeof(*tte));
9252 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused,
9253 struct mlx5_list_entry *entry)
9255 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9261 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
9262 const struct mlx5_flow_tunnel *tunnel,
9263 uint32_t group, uint32_t *table,
9264 struct rte_flow_error *error)
9266 struct mlx5_list_entry *he;
9267 struct tunnel_tbl_entry *tte;
9268 union tunnel_tbl_key key = {
9269 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
9272 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9273 struct mlx5_hlist *group_hash;
9274 struct mlx5_flow_cb_ctx ctx = {
9278 group_hash = tunnel ? tunnel->groups : thub->groups;
9279 he = mlx5_hlist_register(group_hash, key.val, &ctx);
9281 return rte_flow_error_set(error, EINVAL,
9282 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
9284 "tunnel group index not supported");
9285 tte = container_of(he, typeof(*tte), hash);
9286 *table = tte->flow_table;
9287 DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
9288 dev->data->port_id, key.tunnel_id, group, *table);
9293 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
9294 struct mlx5_flow_tunnel *tunnel)
9296 struct mlx5_priv *priv = dev->data->dev_private;
9297 struct mlx5_indexed_pool *ipool;
9299 DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
9300 dev->data->port_id, tunnel->tunnel_id);
9301 LIST_REMOVE(tunnel, chain);
9302 mlx5_hlist_destroy(tunnel->groups);
9303 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
9304 mlx5_ipool_free(ipool, tunnel->tunnel_id);
9308 mlx5_access_tunnel_offload_db
9309 (struct rte_eth_dev *dev,
9310 bool (*match)(struct rte_eth_dev *,
9311 struct mlx5_flow_tunnel *, const void *),
9312 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
9313 void (*miss)(struct rte_eth_dev *, void *),
9314 void *ctx, bool lock_op)
9316 bool verdict = false;
9317 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9318 struct mlx5_flow_tunnel *tunnel;
9320 rte_spinlock_lock(&thub->sl);
9321 LIST_FOREACH(tunnel, &thub->tunnels, chain) {
9322 verdict = match(dev, tunnel, (const void *)ctx);
9327 rte_spinlock_unlock(&thub->sl);
9329 hit(dev, tunnel, ctx);
9330 if (!verdict && miss)
9333 rte_spinlock_unlock(&thub->sl);
9338 struct tunnel_db_find_tunnel_id_ctx {
9340 struct mlx5_flow_tunnel *tunnel;
9344 find_tunnel_id_match(struct rte_eth_dev *dev,
9345 struct mlx5_flow_tunnel *tunnel, const void *x)
9347 const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
9350 return tunnel->tunnel_id == ctx->tunnel_id;
9354 find_tunnel_id_hit(struct rte_eth_dev *dev,
9355 struct mlx5_flow_tunnel *tunnel, void *x)
9357 struct tunnel_db_find_tunnel_id_ctx *ctx = x;
9359 ctx->tunnel = tunnel;
9362 static struct mlx5_flow_tunnel *
9363 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
9365 struct tunnel_db_find_tunnel_id_ctx ctx = {
9369 mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
9370 find_tunnel_id_hit, NULL, &ctx, true);
9375 static struct mlx5_flow_tunnel *
9376 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
9377 const struct rte_flow_tunnel *app_tunnel)
9379 struct mlx5_priv *priv = dev->data->dev_private;
9380 struct mlx5_indexed_pool *ipool;
9381 struct mlx5_flow_tunnel *tunnel;
9384 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
9385 tunnel = mlx5_ipool_zmalloc(ipool, &id);
9388 if (id >= MLX5_MAX_TUNNELS) {
9389 mlx5_ipool_free(ipool, id);
9390 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
9393 tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true,
9395 mlx5_flow_tunnel_grp2tbl_create_cb,
9396 mlx5_flow_tunnel_grp2tbl_match_cb,
9397 mlx5_flow_tunnel_grp2tbl_remove_cb,
9398 mlx5_flow_tunnel_grp2tbl_clone_cb,
9399 mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9400 if (!tunnel->groups) {
9401 mlx5_ipool_free(ipool, id);
9404 /* initiate new PMD tunnel */
9405 memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
9406 tunnel->tunnel_id = id;
9407 tunnel->action.type = (typeof(tunnel->action.type))
9408 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
9409 tunnel->action.conf = tunnel;
9410 tunnel->item.type = (typeof(tunnel->item.type))
9411 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
9412 tunnel->item.spec = tunnel;
9413 tunnel->item.last = NULL;
9414 tunnel->item.mask = NULL;
9416 DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
9417 dev->data->port_id, tunnel->tunnel_id);
9422 struct tunnel_db_get_tunnel_ctx {
9423 const struct rte_flow_tunnel *app_tunnel;
9424 struct mlx5_flow_tunnel *tunnel;
9427 static bool get_tunnel_match(struct rte_eth_dev *dev,
9428 struct mlx5_flow_tunnel *tunnel, const void *x)
9430 const struct tunnel_db_get_tunnel_ctx *ctx = x;
9433 return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
9434 sizeof(*ctx->app_tunnel));
9437 static void get_tunnel_hit(struct rte_eth_dev *dev,
9438 struct mlx5_flow_tunnel *tunnel, void *x)
9440 /* called under tunnel spinlock protection */
9441 struct tunnel_db_get_tunnel_ctx *ctx = x;
9445 ctx->tunnel = tunnel;
9448 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
9450 /* called under tunnel spinlock protection */
9451 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9452 struct tunnel_db_get_tunnel_ctx *ctx = x;
9454 rte_spinlock_unlock(&thub->sl);
9455 ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
9456 rte_spinlock_lock(&thub->sl);
9458 ctx->tunnel->refctn = 1;
9459 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
9465 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
9466 const struct rte_flow_tunnel *app_tunnel,
9467 struct mlx5_flow_tunnel **tunnel)
9469 struct tunnel_db_get_tunnel_ctx ctx = {
9470 .app_tunnel = app_tunnel,
9473 mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
9474 get_tunnel_miss, &ctx, true);
9475 *tunnel = ctx.tunnel;
9476 return ctx.tunnel ? 0 : -ENOMEM;
9479 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
9481 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
9485 if (!LIST_EMPTY(&thub->tunnels))
9486 DRV_LOG(WARNING, "port %u tunnels present", port_id);
9487 mlx5_hlist_destroy(thub->groups);
9491 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
9494 struct mlx5_flow_tunnel_hub *thub;
9496 thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
9500 LIST_INIT(&thub->tunnels);
9501 rte_spinlock_init(&thub->sl);
9502 thub->groups = mlx5_hlist_create("flow groups", 64,
9504 mlx5_flow_tunnel_grp2tbl_create_cb,
9505 mlx5_flow_tunnel_grp2tbl_match_cb,
9506 mlx5_flow_tunnel_grp2tbl_remove_cb,
9507 mlx5_flow_tunnel_grp2tbl_clone_cb,
9508 mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9509 if (!thub->groups) {
9513 sh->tunnel_hub = thub;
9519 mlx5_hlist_destroy(thub->groups);
9526 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
9527 struct rte_flow_tunnel *tunnel,
9528 struct rte_flow_error *error)
9530 struct mlx5_priv *priv = dev->data->dev_private;
9532 if (!priv->config.dv_flow_en)
9533 return rte_flow_error_set(error, ENOTSUP,
9534 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9535 "flow DV interface is off");
9536 if (!is_tunnel_offload_active(dev))
9537 return rte_flow_error_set(error, ENOTSUP,
9538 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9539 "tunnel offload was not activated");
9541 return rte_flow_error_set(error, EINVAL,
9542 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9543 "no application tunnel");
9544 switch (tunnel->type) {
9546 return rte_flow_error_set(error, EINVAL,
9547 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9548 "unsupported tunnel type");
9549 case RTE_FLOW_ITEM_TYPE_VXLAN:
9550 case RTE_FLOW_ITEM_TYPE_GRE:
9551 case RTE_FLOW_ITEM_TYPE_NVGRE:
9552 case RTE_FLOW_ITEM_TYPE_GENEVE:
9559 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
9560 struct rte_flow_tunnel *app_tunnel,
9561 struct rte_flow_action **actions,
9562 uint32_t *num_of_actions,
9563 struct rte_flow_error *error)
9565 struct mlx5_flow_tunnel *tunnel;
9566 int ret = mlx5_flow_tunnel_validate(dev, app_tunnel, error);
9570 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9572 return rte_flow_error_set(error, ret,
9573 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9574 "failed to initialize pmd tunnel");
9576 *actions = &tunnel->action;
9577 *num_of_actions = 1;
9582 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
9583 struct rte_flow_tunnel *app_tunnel,
9584 struct rte_flow_item **items,
9585 uint32_t *num_of_items,
9586 struct rte_flow_error *error)
9588 struct mlx5_flow_tunnel *tunnel;
9589 int ret = mlx5_flow_tunnel_validate(dev, app_tunnel, error);
9593 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9595 return rte_flow_error_set(error, ret,
9596 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9597 "failed to initialize pmd tunnel");
9599 *items = &tunnel->item;
9604 struct tunnel_db_element_release_ctx {
9605 struct rte_flow_item *items;
9606 struct rte_flow_action *actions;
9607 uint32_t num_elements;
9608 struct rte_flow_error *error;
9613 tunnel_element_release_match(struct rte_eth_dev *dev,
9614 struct mlx5_flow_tunnel *tunnel, const void *x)
9616 const struct tunnel_db_element_release_ctx *ctx = x;
9619 if (ctx->num_elements != 1)
9621 else if (ctx->items)
9622 return ctx->items == &tunnel->item;
9623 else if (ctx->actions)
9624 return ctx->actions == &tunnel->action;
9630 tunnel_element_release_hit(struct rte_eth_dev *dev,
9631 struct mlx5_flow_tunnel *tunnel, void *x)
9633 struct tunnel_db_element_release_ctx *ctx = x;
9635 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
9636 mlx5_flow_tunnel_free(dev, tunnel);
9640 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
9642 struct tunnel_db_element_release_ctx *ctx = x;
9644 ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
9645 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9646 "invalid argument");
9650 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
9651 struct rte_flow_item *pmd_items,
9652 uint32_t num_items, struct rte_flow_error *err)
9654 struct tunnel_db_element_release_ctx ctx = {
9657 .num_elements = num_items,
9661 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9662 tunnel_element_release_hit,
9663 tunnel_element_release_miss, &ctx, false);
9669 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
9670 struct rte_flow_action *pmd_actions,
9671 uint32_t num_actions, struct rte_flow_error *err)
9673 struct tunnel_db_element_release_ctx ctx = {
9675 .actions = pmd_actions,
9676 .num_elements = num_actions,
9680 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9681 tunnel_element_release_hit,
9682 tunnel_element_release_miss, &ctx, false);
9688 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
9690 struct rte_flow_restore_info *info,
9691 struct rte_flow_error *err)
9693 uint64_t ol_flags = m->ol_flags;
9694 const struct mlx5_flow_tbl_data_entry *tble;
9695 const uint64_t mask = RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID;
9697 if (!is_tunnel_offload_active(dev)) {
9702 if ((ol_flags & mask) != mask)
9704 tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
9706 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
9707 dev->data->port_id, m->hash.fdir.hi);
9710 MLX5_ASSERT(tble->tunnel);
9711 memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
9712 info->group_id = tble->group_id;
9713 info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
9714 RTE_FLOW_RESTORE_INFO_GROUP_ID |
9715 RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
9720 return rte_flow_error_set(err, EINVAL,
9721 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9722 "failed to get restore info");
9725 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
9727 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
9728 __rte_unused struct rte_flow_tunnel *app_tunnel,
9729 __rte_unused struct rte_flow_action **actions,
9730 __rte_unused uint32_t *num_of_actions,
9731 __rte_unused struct rte_flow_error *error)
9737 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
9738 __rte_unused struct rte_flow_tunnel *app_tunnel,
9739 __rte_unused struct rte_flow_item **items,
9740 __rte_unused uint32_t *num_of_items,
9741 __rte_unused struct rte_flow_error *error)
9747 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
9748 __rte_unused struct rte_flow_item *pmd_items,
9749 __rte_unused uint32_t num_items,
9750 __rte_unused struct rte_flow_error *err)
9756 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
9757 __rte_unused struct rte_flow_action *pmd_action,
9758 __rte_unused uint32_t num_actions,
9759 __rte_unused struct rte_flow_error *err)
9765 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
9766 __rte_unused struct rte_mbuf *m,
9767 __rte_unused struct rte_flow_restore_info *i,
9768 __rte_unused struct rte_flow_error *err)
9774 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
9775 __rte_unused struct rte_flow *flow,
9776 __rte_unused const struct rte_flow_attr *attr,
9777 __rte_unused const struct rte_flow_action *actions,
9778 __rte_unused uint32_t flow_idx,
9779 __rte_unused const struct mlx5_flow_tunnel *tunnel,
9780 __rte_unused struct tunnel_default_miss_ctx *ctx,
9781 __rte_unused struct rte_flow_error *error)
9786 static struct mlx5_flow_tunnel *
9787 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
9788 __rte_unused uint32_t id)
9794 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
9795 __rte_unused struct mlx5_flow_tunnel *tunnel)
9800 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
9801 __rte_unused const struct mlx5_flow_tunnel *t,
9802 __rte_unused uint32_t group,
9803 __rte_unused uint32_t *table,
9804 struct rte_flow_error *error)
9806 return rte_flow_error_set(error, ENOTSUP,
9807 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9808 "tunnel offload requires DV support");
9812 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
9813 __rte_unused uint16_t port_id)
9816 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
9818 /* Flex flow item API */
9819 static struct rte_flow_item_flex_handle *
9820 mlx5_flow_flex_item_create(struct rte_eth_dev *dev,
9821 const struct rte_flow_item_flex_conf *conf,
9822 struct rte_flow_error *error)
9824 static const char err_msg[] = "flex item creation unsupported";
9825 struct rte_flow_attr attr = { .transfer = 0 };
9826 const struct mlx5_flow_driver_ops *fops =
9827 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9829 if (!fops->item_create) {
9830 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9831 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9835 return fops->item_create(dev, conf, error);
9839 mlx5_flow_flex_item_release(struct rte_eth_dev *dev,
9840 const struct rte_flow_item_flex_handle *handle,
9841 struct rte_flow_error *error)
9843 static const char err_msg[] = "flex item release unsupported";
9844 struct rte_flow_attr attr = { .transfer = 0 };
9845 const struct mlx5_flow_driver_ops *fops =
9846 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9848 if (!fops->item_release) {
9849 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9850 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9854 return fops->item_release(dev, handle, error);
9858 mlx5_dbg__print_pattern(const struct rte_flow_item *item)
9861 struct rte_flow_error error;
9863 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
9865 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name,
9867 (void *)(uintptr_t)item->type, &error);
9869 printf("%s ", item_name);
9871 printf("%d\n", (int)item->type);
9877 mlx5_flow_is_std_vxlan_port(const struct rte_flow_item *udp_item)
9879 const struct rte_flow_item_udp *spec = udp_item->spec;
9880 const struct rte_flow_item_udp *mask = udp_item->mask;
9881 uint16_t udp_dport = 0;
9885 mask = &rte_flow_item_udp_mask;
9886 udp_dport = rte_be_to_cpu_16(spec->hdr.dst_port &
9887 mask->hdr.dst_port);
9889 return (!udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN);
9892 static const struct mlx5_flow_expand_node *
9893 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
9894 unsigned int item_idx,
9895 const struct mlx5_flow_expand_node graph[],
9896 const struct mlx5_flow_expand_node *node)
9898 const struct rte_flow_item *item = pattern + item_idx, *prev_item;
9900 if (item->type == RTE_FLOW_ITEM_TYPE_VXLAN &&
9902 node->type == RTE_FLOW_ITEM_TYPE_VXLAN) {
9904 * The expansion node is VXLAN and it is also the last
9905 * expandable item in the pattern, so need to continue
9906 * expansion of the inner tunnel.
9908 MLX5_ASSERT(item_idx > 0);
9909 prev_item = pattern + item_idx - 1;
9910 MLX5_ASSERT(prev_item->type == RTE_FLOW_ITEM_TYPE_UDP);
9911 if (mlx5_flow_is_std_vxlan_port(prev_item))
9912 return &graph[MLX5_EXPANSION_STD_VXLAN];
9913 return &graph[MLX5_EXPANSION_L3_VXLAN];
9918 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
9919 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
9920 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
9923 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
9924 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
9925 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
9926 { 9, 10, 11 }, { 12, 13, 14 },
9930 * Discover the number of available flow priorities.
9936 * On success, number of available flow priorities.
9937 * On failure, a negative errno-style code and rte_errno is set.
9940 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
9942 static const uint16_t vprio[] = {8, 16};
9943 const struct mlx5_priv *priv = dev->data->dev_private;
9944 const struct mlx5_flow_driver_ops *fops;
9945 enum mlx5_flow_drv_type type;
9948 type = mlx5_flow_os_get_type();
9949 if (type == MLX5_FLOW_TYPE_MAX) {
9950 type = MLX5_FLOW_TYPE_VERBS;
9951 if (priv->sh->devx && priv->config.dv_flow_en)
9952 type = MLX5_FLOW_TYPE_DV;
9954 fops = flow_get_drv_ops(type);
9955 if (fops->discover_priorities == NULL) {
9956 DRV_LOG(ERR, "Priority discovery not supported");
9957 rte_errno = ENOTSUP;
9960 ret = fops->discover_priorities(dev, vprio, RTE_DIM(vprio));
9965 ret = RTE_DIM(priority_map_3);
9968 ret = RTE_DIM(priority_map_5);
9971 rte_errno = ENOTSUP;
9973 "port %u maximum priority: %d expected 8/16",
9974 dev->data->port_id, ret);
9977 DRV_LOG(INFO, "port %u supported flow priorities:"
9978 " 0-%d for ingress or egress root table,"
9979 " 0-%d for non-root table or transfer root table.",
9980 dev->data->port_id, ret - 2,
9981 MLX5_NON_ROOT_FLOW_MAX_PRIO - 1);
9986 * Adjust flow priority based on the highest layer and the request priority.
9989 * Pointer to the Ethernet device structure.
9990 * @param[in] priority
9991 * The rule base priority.
9992 * @param[in] subpriority
9993 * The priority based on the items.
9999 mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
10000 uint32_t subpriority)
10003 struct mlx5_priv *priv = dev->data->dev_private;
10005 switch (priv->sh->flow_max_priority) {
10006 case RTE_DIM(priority_map_3):
10007 res = priority_map_3[priority][subpriority];
10009 case RTE_DIM(priority_map_5):
10010 res = priority_map_5[priority][subpriority];