drivers/net/mlx5/mlx5_flow.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2016 6WIND S.A.
   3  * Copyright 2016 Mellanox Technologies, Ltd
   4  */
   5
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <stdbool.h>
  10 #include <sys/queue.h>
  11
  12 #include <rte_common.h>
  13 #include <rte_ether.h>
  14 #include <ethdev_driver.h>
  15 #include <rte_eal_paging.h>
  16 #include <rte_flow.h>
  17 #include <rte_cycles.h>
  18 #include <rte_flow_driver.h>
  19 #include <rte_malloc.h>
  20 #include <rte_ip.h>
  21
  22 #include <mlx5_glue.h>
  23 #include <mlx5_devx_cmds.h>
  24 #include <mlx5_prm.h>
  25 #include <mlx5_malloc.h>
  26
  27 #include "mlx5_defs.h"
  28 #include "mlx5.h"
  29 #include "mlx5_flow.h"
  30 #include "mlx5_flow_os.h"
  31 #include "mlx5_rx.h"
  32 #include "mlx5_tx.h"
  33 #include "mlx5_common_os.h"
  34 #include "rte_pmd_mlx5.h"
  35
  36 struct tunnel_default_miss_ctx {
  37         uint16_t *queue;
  38         __extension__
  39         union {
  40                 struct rte_flow_action_rss action_rss;
  41                 struct rte_flow_action_queue miss_queue;
  42                 struct rte_flow_action_jump miss_jump;
  43                 uint8_t raw[0];
  44         };
  45 };
  46
  47 static int
  48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
  49                              struct rte_flow *flow,
  50                              const struct rte_flow_attr *attr,
  51                              const struct rte_flow_action *app_actions,
  52                              uint32_t flow_idx,
  53                              const struct mlx5_flow_tunnel *tunnel,
  54                              struct tunnel_default_miss_ctx *ctx,
  55                              struct rte_flow_error *error);
  56 static struct mlx5_flow_tunnel *
  57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
  58 static void
  59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
  60 static uint32_t
  61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
  62                                 const struct mlx5_flow_tunnel *tunnel,
  63                                 uint32_t group, uint32_t *table,
  64                                 struct rte_flow_error *error);
  65
  66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
  67 static void mlx5_flow_pop_thread_workspace(void);
  68
  69
  70 /** Device flow drivers. */
  71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
  72
  73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
  74
  75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
  76         [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
  77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  78         [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
  79 #endif
  80         [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
  81         [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
  82 };
  83
  84 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
  85 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
  86         (const int []){ \
  87                 __VA_ARGS__, 0, \
  88         }
  89
  90 /** Node object of input graph for mlx5_flow_expand_rss(). */
  91 struct mlx5_flow_expand_node {
  92         const int *const next;
  93         /**<
  94          * List of next node indexes. Index 0 is interpreted as a terminator.
  95          */
  96         const enum rte_flow_item_type type;
  97         /**< Pattern item type of current node. */
  98         uint64_t rss_types;
  99         /**<
 100          * RSS types bit-field associated with this node
 101          * (see RTE_ETH_RSS_* definitions).
 102          */
 103         uint64_t node_flags;
 104         /**<
 105          *  Bit-fields that define how the node is used in the expansion.
 106          * (see MLX5_EXPANSION_NODE_* definitions).
 107          */
 108 };
 109
 110 /* Optional expand field. The expansion alg will not go deeper. */
 111 #define MLX5_EXPANSION_NODE_OPTIONAL (UINT64_C(1) << 0)
 112
 113 /* The node is not added implicitly as expansion to the flow pattern.
 114  * If the node type does not match the flow pattern item type, the
 115  * expansion alg will go deeper to its next items.
 116  * In the current implementation, the list of next nodes indexes can
 117  * have up to one node with this flag set and it has to be the last
 118  * node index (before the list terminator).
 119  */
 120 #define MLX5_EXPANSION_NODE_EXPLICIT (UINT64_C(1) << 1)
 121
 122 /** Object returned by mlx5_flow_expand_rss(). */
 123 struct mlx5_flow_expand_rss {
 124         uint32_t entries;
 125         /**< Number of entries @p patterns and @p priorities. */
 126         struct {
 127                 struct rte_flow_item *pattern; /**< Expanded pattern array. */
 128                 uint32_t priority; /**< Priority offset for each expansion. */
 129         } entry[];
 130 };
 131
 132 static void
 133 mlx5_dbg__print_pattern(const struct rte_flow_item *item);
 134
 135 static const struct mlx5_flow_expand_node *
 136 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
 137                 unsigned int item_idx,
 138                 const struct mlx5_flow_expand_node graph[],
 139                 const struct mlx5_flow_expand_node *node);
 140
 141 static bool
 142 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item)
 143 {
 144         switch (item->type) {
 145         case RTE_FLOW_ITEM_TYPE_ETH:
 146         case RTE_FLOW_ITEM_TYPE_VLAN:
 147         case RTE_FLOW_ITEM_TYPE_IPV4:
 148         case RTE_FLOW_ITEM_TYPE_IPV6:
 149         case RTE_FLOW_ITEM_TYPE_UDP:
 150         case RTE_FLOW_ITEM_TYPE_TCP:
 151         case RTE_FLOW_ITEM_TYPE_VXLAN:
 152         case RTE_FLOW_ITEM_TYPE_NVGRE:
 153         case RTE_FLOW_ITEM_TYPE_GRE:
 154         case RTE_FLOW_ITEM_TYPE_GENEVE:
 155         case RTE_FLOW_ITEM_TYPE_MPLS:
 156         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 157         case RTE_FLOW_ITEM_TYPE_GRE_KEY:
 158         case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
 159         case RTE_FLOW_ITEM_TYPE_GTP:
 160                 return true;
 161         default:
 162                 break;
 163         }
 164         return false;
 165 }
 166
 167 static enum rte_flow_item_type
 168 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
 169 {
 170         enum rte_flow_item_type ret = RTE_FLOW_ITEM_TYPE_VOID;
 171         uint16_t ether_type = 0;
 172         uint16_t ether_type_m;
 173         uint8_t ip_next_proto = 0;
 174         uint8_t ip_next_proto_m;
 175
 176         if (item == NULL || item->spec == NULL)
 177                 return ret;
 178         switch (item->type) {
 179         case RTE_FLOW_ITEM_TYPE_ETH:
 180                 if (item->mask)
 181                         ether_type_m = ((const struct rte_flow_item_eth *)
 182                                                 (item->mask))->type;
 183                 else
 184                         ether_type_m = rte_flow_item_eth_mask.type;
 185                 if (ether_type_m != RTE_BE16(0xFFFF))
 186                         break;
 187                 ether_type = ((const struct rte_flow_item_eth *)
 188                                 (item->spec))->type;
 189                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 190                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 191                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 192                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 193                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 194                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 195                 else
 196                         ret = RTE_FLOW_ITEM_TYPE_END;
 197                 break;
 198         case RTE_FLOW_ITEM_TYPE_VLAN:
 199                 if (item->mask)
 200                         ether_type_m = ((const struct rte_flow_item_vlan *)
 201                                                 (item->mask))->inner_type;
 202                 else
 203                         ether_type_m = rte_flow_item_vlan_mask.inner_type;
 204                 if (ether_type_m != RTE_BE16(0xFFFF))
 205                         break;
 206                 ether_type = ((const struct rte_flow_item_vlan *)
 207                                 (item->spec))->inner_type;
 208                 if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV4)
 209                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 210                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_IPV6)
 211                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 212                 else if (rte_be_to_cpu_16(ether_type) == RTE_ETHER_TYPE_VLAN)
 213                         ret = RTE_FLOW_ITEM_TYPE_VLAN;
 214                 else
 215                         ret = RTE_FLOW_ITEM_TYPE_END;
 216                 break;
 217         case RTE_FLOW_ITEM_TYPE_IPV4:
 218                 if (item->mask)
 219                         ip_next_proto_m = ((const struct rte_flow_item_ipv4 *)
 220                                         (item->mask))->hdr.next_proto_id;
 221                 else
 222                         ip_next_proto_m =
 223                                 rte_flow_item_ipv4_mask.hdr.next_proto_id;
 224                 if (ip_next_proto_m != 0xFF)
 225                         break;
 226                 ip_next_proto = ((const struct rte_flow_item_ipv4 *)
 227                                 (item->spec))->hdr.next_proto_id;
 228                 if (ip_next_proto == IPPROTO_UDP)
 229                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 230                 else if (ip_next_proto == IPPROTO_TCP)
 231                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 232                 else if (ip_next_proto == IPPROTO_IP)
 233                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 234                 else if (ip_next_proto == IPPROTO_IPV6)
 235                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 236                 else
 237                         ret = RTE_FLOW_ITEM_TYPE_END;
 238                 break;
 239         case RTE_FLOW_ITEM_TYPE_IPV6:
 240                 if (item->mask)
 241                         ip_next_proto_m = ((const struct rte_flow_item_ipv6 *)
 242                                                 (item->mask))->hdr.proto;
 243                 else
 244                         ip_next_proto_m =
 245                                 rte_flow_item_ipv6_mask.hdr.proto;
 246                 if (ip_next_proto_m != 0xFF)
 247                         break;
 248                 ip_next_proto = ((const struct rte_flow_item_ipv6 *)
 249                                 (item->spec))->hdr.proto;
 250                 if (ip_next_proto == IPPROTO_UDP)
 251                         ret = RTE_FLOW_ITEM_TYPE_UDP;
 252                 else if (ip_next_proto == IPPROTO_TCP)
 253                         ret = RTE_FLOW_ITEM_TYPE_TCP;
 254                 else if (ip_next_proto == IPPROTO_IP)
 255                         ret = RTE_FLOW_ITEM_TYPE_IPV4;
 256                 else if (ip_next_proto == IPPROTO_IPV6)
 257                         ret = RTE_FLOW_ITEM_TYPE_IPV6;
 258                 else
 259                         ret = RTE_FLOW_ITEM_TYPE_END;
 260                 break;
 261         default:
 262                 ret = RTE_FLOW_ITEM_TYPE_VOID;
 263                 break;
 264         }
 265         return ret;
 266 }
 267
 268 static const int *
 269 mlx5_flow_expand_rss_skip_explicit(const struct mlx5_flow_expand_node graph[],
 270                 const int *next_node)
 271 {
 272         const struct mlx5_flow_expand_node *node = NULL;
 273         const int *next = next_node;
 274
 275         while (next && *next) {
 276                 /*
 277                  * Skip the nodes with the MLX5_EXPANSION_NODE_EXPLICIT
 278                  * flag set, because they were not found in the flow pattern.
 279                  */
 280                 node = &graph[*next];
 281                 if (!(node->node_flags & MLX5_EXPANSION_NODE_EXPLICIT))
 282                         break;
 283                 next = node->next;
 284         }
 285         return next;
 286 }
 287
 288 #define MLX5_RSS_EXP_ELT_N 16
 289
 290 /**
 291  * Expand RSS flows into several possible flows according to the RSS hash
 292  * fields requested and the driver capabilities.
 293  *
 294  * @param[out] buf
 295  *   Buffer to store the result expansion.
 296  * @param[in] size
 297  *   Buffer size in bytes. If 0, @p buf can be NULL.
 298  * @param[in] pattern
 299  *   User flow pattern.
 300  * @param[in] types
 301  *   RSS types to expand (see RTE_ETH_RSS_* definitions).
 302  * @param[in] graph
 303  *   Input graph to expand @p pattern according to @p types.
 304  * @param[in] graph_root_index
 305  *   Index of root node in @p graph, typically 0.
 306  *
 307  * @return
 308  *   A positive value representing the size of @p buf in bytes regardless of
 309  *   @p size on success, a negative errno value otherwise and rte_errno is
 310  *   set, the following errors are defined:
 311  *
 312  *   -E2BIG: graph-depth @p graph is too deep.
 313  *   -EINVAL: @p size has not enough space for expanded pattern.
 314  */
 315 static int
 316 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
 317                      const struct rte_flow_item *pattern, uint64_t types,
 318                      const struct mlx5_flow_expand_node graph[],
 319                      int graph_root_index)
 320 {
 321         const struct rte_flow_item *item;
 322         const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
 323         const int *next_node;
 324         const int *stack[MLX5_RSS_EXP_ELT_N];
 325         int stack_pos = 0;
 326         struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
 327         unsigned int i, item_idx, last_expand_item_idx = 0;
 328         size_t lsize;
 329         size_t user_pattern_size = 0;
 330         void *addr = NULL;
 331         const struct mlx5_flow_expand_node *next = NULL;
 332         struct rte_flow_item missed_item;
 333         int missed = 0;
 334         int elt = 0;
 335         const struct rte_flow_item *last_expand_item = NULL;
 336
 337         memset(&missed_item, 0, sizeof(missed_item));
 338         lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
 339                 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
 340         if (lsize > size)
 341                 return -EINVAL;
 342         buf->entry[0].priority = 0;
 343         buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
 344         buf->entries = 0;
 345         addr = buf->entry[0].pattern;
 346         for (item = pattern, item_idx = 0;
 347                         item->type != RTE_FLOW_ITEM_TYPE_END;
 348                         item++, item_idx++) {
 349                 if (!mlx5_flow_is_rss_expandable_item(item)) {
 350                         user_pattern_size += sizeof(*item);
 351                         continue;
 352                 }
 353                 last_expand_item = item;
 354                 last_expand_item_idx = item_idx;
 355                 i = 0;
 356                 while (node->next && node->next[i]) {
 357                         next = &graph[node->next[i]];
 358                         if (next->type == item->type)
 359                                 break;
 360                         if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
 361                                 node = next;
 362                                 i = 0;
 363                         } else {
 364                                 ++i;
 365                         }
 366                 }
 367                 if (next)
 368                         node = next;
 369                 user_pattern_size += sizeof(*item);
 370         }
 371         user_pattern_size += sizeof(*item); /* Handle END item. */
 372         lsize += user_pattern_size;
 373         if (lsize > size)
 374                 return -EINVAL;
 375         /* Copy the user pattern in the first entry of the buffer. */
 376         rte_memcpy(addr, pattern, user_pattern_size);
 377         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 378         buf->entries = 1;
 379         /* Start expanding. */
 380         memset(flow_items, 0, sizeof(flow_items));
 381         user_pattern_size -= sizeof(*item);
 382         /*
 383          * Check if the last valid item has spec set, need complete pattern,
 384          * and the pattern can be used for expansion.
 385          */
 386         missed_item.type = mlx5_flow_expand_rss_item_complete(last_expand_item);
 387         if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
 388                 /* Item type END indicates expansion is not required. */
 389                 return lsize;
 390         }
 391         if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
 392                 next = NULL;
 393                 missed = 1;
 394                 i = 0;
 395                 while (node->next && node->next[i]) {
 396                         next = &graph[node->next[i]];
 397                         if (next->type == missed_item.type) {
 398                                 flow_items[0].type = missed_item.type;
 399                                 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
 400                                 break;
 401                         }
 402                         if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
 403                                 node = next;
 404                                 i = 0;
 405                         } else {
 406                                 ++i;
 407                         }
 408                         next = NULL;
 409                 }
 410         }
 411         if (next && missed) {
 412                 elt = 2; /* missed item + item end. */
 413                 node = next;
 414                 lsize += elt * sizeof(*item) + user_pattern_size;
 415                 if (lsize > size)
 416                         return -EINVAL;
 417                 if (node->rss_types & types) {
 418                         buf->entry[buf->entries].priority = 1;
 419                         buf->entry[buf->entries].pattern = addr;
 420                         buf->entries++;
 421                         rte_memcpy(addr, buf->entry[0].pattern,
 422                                    user_pattern_size);
 423                         addr = (void *)(((uintptr_t)addr) + user_pattern_size);
 424                         rte_memcpy(addr, flow_items, elt * sizeof(*item));
 425                         addr = (void *)(((uintptr_t)addr) +
 426                                         elt * sizeof(*item));
 427                 }
 428         } else if (last_expand_item != NULL) {
 429                 node = mlx5_flow_expand_rss_adjust_node(pattern,
 430                                 last_expand_item_idx, graph, node);
 431         }
 432         memset(flow_items, 0, sizeof(flow_items));
 433         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 434                         node->next);
 435         stack[stack_pos] = next_node;
 436         node = next_node ? &graph[*next_node] : NULL;
 437         while (node) {
 438                 flow_items[stack_pos].type = node->type;
 439                 if (node->rss_types & types) {
 440                         size_t n;
 441                         /*
 442                          * compute the number of items to copy from the
 443                          * expansion and copy it.
 444                          * When the stack_pos is 0, there are 1 element in it,
 445                          * plus the addition END item.
 446                          */
 447                         elt = stack_pos + 2;
 448                         flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
 449                         lsize += elt * sizeof(*item) + user_pattern_size;
 450                         if (lsize > size)
 451                                 return -EINVAL;
 452                         n = elt * sizeof(*item);
 453                         buf->entry[buf->entries].priority =
 454                                 stack_pos + 1 + missed;
 455                         buf->entry[buf->entries].pattern = addr;
 456                         buf->entries++;
 457                         rte_memcpy(addr, buf->entry[0].pattern,
 458                                    user_pattern_size);
 459                         addr = (void *)(((uintptr_t)addr) +
 460                                         user_pattern_size);
 461                         rte_memcpy(addr, &missed_item,
 462                                    missed * sizeof(*item));
 463                         addr = (void *)(((uintptr_t)addr) +
 464                                 missed * sizeof(*item));
 465                         rte_memcpy(addr, flow_items, n);
 466                         addr = (void *)(((uintptr_t)addr) + n);
 467                 }
 468                 /* Go deeper. */
 469                 if (!(node->node_flags & MLX5_EXPANSION_NODE_OPTIONAL) &&
 470                                 node->next) {
 471                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 472                                         node->next);
 473                         if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
 474                                 rte_errno = E2BIG;
 475                                 return -rte_errno;
 476                         }
 477                         stack[stack_pos] = next_node;
 478                 } else if (*(next_node + 1)) {
 479                         /* Follow up with the next possibility. */
 480                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 481                                         ++next_node);
 482                 } else if (!stack_pos) {
 483                         /*
 484                          * Completing the traverse over the different paths.
 485                          * The next_node is advanced to the terminator.
 486                          */
 487                         ++next_node;
 488                 } else {
 489                         /* Move to the next path. */
 490                         while (stack_pos) {
 491                                 next_node = stack[--stack_pos];
 492                                 next_node++;
 493                                 if (*next_node)
 494                                         break;
 495                         }
 496                         next_node = mlx5_flow_expand_rss_skip_explicit(graph,
 497                                         next_node);
 498                         stack[stack_pos] = next_node;
 499                 }
 500                 node = next_node && *next_node ? &graph[*next_node] : NULL;
 501         };
 502         return lsize;
 503 }
 504
 505 enum mlx5_expansion {
 506         MLX5_EXPANSION_ROOT,
 507         MLX5_EXPANSION_ROOT_OUTER,
 508         MLX5_EXPANSION_OUTER_ETH,
 509         MLX5_EXPANSION_OUTER_VLAN,
 510         MLX5_EXPANSION_OUTER_IPV4,
 511         MLX5_EXPANSION_OUTER_IPV4_UDP,
 512         MLX5_EXPANSION_OUTER_IPV4_TCP,
 513         MLX5_EXPANSION_OUTER_IPV6,
 514         MLX5_EXPANSION_OUTER_IPV6_UDP,
 515         MLX5_EXPANSION_OUTER_IPV6_TCP,
 516         MLX5_EXPANSION_VXLAN,
 517         MLX5_EXPANSION_STD_VXLAN,
 518         MLX5_EXPANSION_L3_VXLAN,
 519         MLX5_EXPANSION_VXLAN_GPE,
 520         MLX5_EXPANSION_GRE,
 521         MLX5_EXPANSION_NVGRE,
 522         MLX5_EXPANSION_GRE_KEY,
 523         MLX5_EXPANSION_MPLS,
 524         MLX5_EXPANSION_ETH,
 525         MLX5_EXPANSION_VLAN,
 526         MLX5_EXPANSION_IPV4,
 527         MLX5_EXPANSION_IPV4_UDP,
 528         MLX5_EXPANSION_IPV4_TCP,
 529         MLX5_EXPANSION_IPV6,
 530         MLX5_EXPANSION_IPV6_UDP,
 531         MLX5_EXPANSION_IPV6_TCP,
 532         MLX5_EXPANSION_IPV6_FRAG_EXT,
 533         MLX5_EXPANSION_GTP
 534 };
 535
 536 /** Supported expansion of items. */
 537 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
 538         [MLX5_EXPANSION_ROOT] = {
 539                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 540                                                   MLX5_EXPANSION_IPV4,
 541                                                   MLX5_EXPANSION_IPV6),
 542                 .type = RTE_FLOW_ITEM_TYPE_END,
 543         },
 544         [MLX5_EXPANSION_ROOT_OUTER] = {
 545                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
 546                                                   MLX5_EXPANSION_OUTER_IPV4,
 547                                                   MLX5_EXPANSION_OUTER_IPV6),
 548                 .type = RTE_FLOW_ITEM_TYPE_END,
 549         },
 550         [MLX5_EXPANSION_OUTER_ETH] = {
 551                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
 552                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 553                 .rss_types = 0,
 554         },
 555         [MLX5_EXPANSION_OUTER_VLAN] = {
 556                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
 557                                                   MLX5_EXPANSION_OUTER_IPV6),
 558                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 559                 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
 560         },
 561         [MLX5_EXPANSION_OUTER_IPV4] = {
 562                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 563                         (MLX5_EXPANSION_OUTER_IPV4_UDP,
 564                          MLX5_EXPANSION_OUTER_IPV4_TCP,
 565                          MLX5_EXPANSION_GRE,
 566                          MLX5_EXPANSION_NVGRE,
 567                          MLX5_EXPANSION_IPV4,
 568                          MLX5_EXPANSION_IPV6),
 569                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 570                 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 |
 571                         RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
 572         },
 573         [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
 574                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 575                                                   MLX5_EXPANSION_VXLAN_GPE,
 576                                                   MLX5_EXPANSION_MPLS,
 577                                                   MLX5_EXPANSION_GTP),
 578                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 579                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP,
 580         },
 581         [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
 582                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 583                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP,
 584         },
 585         [MLX5_EXPANSION_OUTER_IPV6] = {
 586                 .next = MLX5_FLOW_EXPAND_RSS_NEXT
 587                         (MLX5_EXPANSION_OUTER_IPV6_UDP,
 588                          MLX5_EXPANSION_OUTER_IPV6_TCP,
 589                          MLX5_EXPANSION_IPV4,
 590                          MLX5_EXPANSION_IPV6,
 591                          MLX5_EXPANSION_GRE,
 592                          MLX5_EXPANSION_NVGRE),
 593                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 594                 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 |
 595                         RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
 596         },
 597         [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
 598                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
 599                                                   MLX5_EXPANSION_VXLAN_GPE,
 600                                                   MLX5_EXPANSION_MPLS,
 601                                                   MLX5_EXPANSION_GTP),
 602                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 603                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP,
 604         },
 605         [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
 606                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 607                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP,
 608         },
 609         [MLX5_EXPANSION_VXLAN] = {
 610                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 611                                                   MLX5_EXPANSION_IPV4,
 612                                                   MLX5_EXPANSION_IPV6),
 613                 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 614         },
 615         [MLX5_EXPANSION_STD_VXLAN] = {
 616                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 617                                         .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 618         },
 619         [MLX5_EXPANSION_L3_VXLAN] = {
 620                         .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 621                                         MLX5_EXPANSION_IPV6),
 622                                         .type = RTE_FLOW_ITEM_TYPE_VXLAN,
 623         },
 624         [MLX5_EXPANSION_VXLAN_GPE] = {
 625                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
 626                                                   MLX5_EXPANSION_IPV4,
 627                                                   MLX5_EXPANSION_IPV6),
 628                 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
 629         },
 630         [MLX5_EXPANSION_GRE] = {
 631                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 632                                                   MLX5_EXPANSION_IPV6,
 633                                                   MLX5_EXPANSION_GRE_KEY,
 634                                                   MLX5_EXPANSION_MPLS),
 635                 .type = RTE_FLOW_ITEM_TYPE_GRE,
 636         },
 637         [MLX5_EXPANSION_GRE_KEY] = {
 638                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 639                                                   MLX5_EXPANSION_IPV6,
 640                                                   MLX5_EXPANSION_MPLS),
 641                 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY,
 642                 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
 643         },
 644         [MLX5_EXPANSION_NVGRE] = {
 645                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
 646                 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
 647         },
 648         [MLX5_EXPANSION_MPLS] = {
 649                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 650                                                   MLX5_EXPANSION_IPV6,
 651                                                   MLX5_EXPANSION_ETH),
 652                 .type = RTE_FLOW_ITEM_TYPE_MPLS,
 653                 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
 654         },
 655         [MLX5_EXPANSION_ETH] = {
 656                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
 657                 .type = RTE_FLOW_ITEM_TYPE_ETH,
 658         },
 659         [MLX5_EXPANSION_VLAN] = {
 660                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 661                                                   MLX5_EXPANSION_IPV6),
 662                 .type = RTE_FLOW_ITEM_TYPE_VLAN,
 663                 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
 664         },
 665         [MLX5_EXPANSION_IPV4] = {
 666                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
 667                                                   MLX5_EXPANSION_IPV4_TCP),
 668                 .type = RTE_FLOW_ITEM_TYPE_IPV4,
 669                 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 |
 670                         RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
 671         },
 672         [MLX5_EXPANSION_IPV4_UDP] = {
 673                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 674                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP,
 675         },
 676         [MLX5_EXPANSION_IPV4_TCP] = {
 677                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 678                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP,
 679         },
 680         [MLX5_EXPANSION_IPV6] = {
 681                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
 682                                                   MLX5_EXPANSION_IPV6_TCP,
 683                                                   MLX5_EXPANSION_IPV6_FRAG_EXT),
 684                 .type = RTE_FLOW_ITEM_TYPE_IPV6,
 685                 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 |
 686                         RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
 687         },
 688         [MLX5_EXPANSION_IPV6_UDP] = {
 689                 .type = RTE_FLOW_ITEM_TYPE_UDP,
 690                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP,
 691         },
 692         [MLX5_EXPANSION_IPV6_TCP] = {
 693                 .type = RTE_FLOW_ITEM_TYPE_TCP,
 694                 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP,
 695         },
 696         [MLX5_EXPANSION_IPV6_FRAG_EXT] = {
 697                 .type = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT,
 698         },
 699         [MLX5_EXPANSION_GTP] = {
 700                 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
 701                                                   MLX5_EXPANSION_IPV6),
 702                 .type = RTE_FLOW_ITEM_TYPE_GTP,
 703         },
 704 };
 705
 706 static struct rte_flow_action_handle *
 707 mlx5_action_handle_create(struct rte_eth_dev *dev,
 708                           const struct rte_flow_indir_action_conf *conf,
 709                           const struct rte_flow_action *action,
 710                           struct rte_flow_error *error);
 711 static int mlx5_action_handle_destroy
 712                                 (struct rte_eth_dev *dev,
 713                                  struct rte_flow_action_handle *handle,
 714                                  struct rte_flow_error *error);
 715 static int mlx5_action_handle_update
 716                                 (struct rte_eth_dev *dev,
 717                                  struct rte_flow_action_handle *handle,
 718                                  const void *update,
 719                                  struct rte_flow_error *error);
 720 static int mlx5_action_handle_query
 721                                 (struct rte_eth_dev *dev,
 722                                  const struct rte_flow_action_handle *handle,
 723                                  void *data,
 724                                  struct rte_flow_error *error);
 725 static int
 726 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
 727                     struct rte_flow_tunnel *app_tunnel,
 728                     struct rte_flow_action **actions,
 729                     uint32_t *num_of_actions,
 730                     struct rte_flow_error *error);
 731 static int
 732 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
 733                        struct rte_flow_tunnel *app_tunnel,
 734                        struct rte_flow_item **items,
 735                        uint32_t *num_of_items,
 736                        struct rte_flow_error *error);
 737 static int
 738 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
 739                               struct rte_flow_item *pmd_items,
 740                               uint32_t num_items, struct rte_flow_error *err);
 741 static int
 742 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
 743                                 struct rte_flow_action *pmd_actions,
 744                                 uint32_t num_actions,
 745                                 struct rte_flow_error *err);
 746 static int
 747 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
 748                                   struct rte_mbuf *m,
 749                                   struct rte_flow_restore_info *info,
 750                                   struct rte_flow_error *err);
 751 static struct rte_flow_item_flex_handle *
 752 mlx5_flow_flex_item_create(struct rte_eth_dev *dev,
 753                            const struct rte_flow_item_flex_conf *conf,
 754                            struct rte_flow_error *error);
 755 static int
 756 mlx5_flow_flex_item_release(struct rte_eth_dev *dev,
 757                             const struct rte_flow_item_flex_handle *handle,
 758                             struct rte_flow_error *error);
 759
 760 static const struct rte_flow_ops mlx5_flow_ops = {
 761         .validate = mlx5_flow_validate,
 762         .create = mlx5_flow_create,
 763         .destroy = mlx5_flow_destroy,
 764         .flush = mlx5_flow_flush,
 765         .isolate = mlx5_flow_isolate,
 766         .query = mlx5_flow_query,
 767         .dev_dump = mlx5_flow_dev_dump,
 768         .get_aged_flows = mlx5_flow_get_aged_flows,
 769         .action_handle_create = mlx5_action_handle_create,
 770         .action_handle_destroy = mlx5_action_handle_destroy,
 771         .action_handle_update = mlx5_action_handle_update,
 772         .action_handle_query = mlx5_action_handle_query,
 773         .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
 774         .tunnel_match = mlx5_flow_tunnel_match,
 775         .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
 776         .tunnel_item_release = mlx5_flow_tunnel_item_release,
 777         .get_restore_info = mlx5_flow_tunnel_get_restore_info,
 778         .flex_item_create = mlx5_flow_flex_item_create,
 779         .flex_item_release = mlx5_flow_flex_item_release,
 780 };
 781
 782 /* Tunnel information. */
 783 struct mlx5_flow_tunnel_info {
 784         uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
 785         uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
 786 };
 787
 788 static struct mlx5_flow_tunnel_info tunnels_info[] = {
 789         {
 790                 .tunnel = MLX5_FLOW_LAYER_VXLAN,
 791                 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
 792         },
 793         {
 794                 .tunnel = MLX5_FLOW_LAYER_GENEVE,
 795                 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
 796         },
 797         {
 798                 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
 799                 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
 800         },
 801         {
 802                 .tunnel = MLX5_FLOW_LAYER_GRE,
 803                 .ptype = RTE_PTYPE_TUNNEL_GRE,
 804         },
 805         {
 806                 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
 807                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
 808         },
 809         {
 810                 .tunnel = MLX5_FLOW_LAYER_MPLS,
 811                 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
 812         },
 813         {
 814                 .tunnel = MLX5_FLOW_LAYER_NVGRE,
 815                 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
 816         },
 817         {
 818                 .tunnel = MLX5_FLOW_LAYER_IPIP,
 819                 .ptype = RTE_PTYPE_TUNNEL_IP,
 820         },
 821         {
 822                 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
 823                 .ptype = RTE_PTYPE_TUNNEL_IP,
 824         },
 825         {
 826                 .tunnel = MLX5_FLOW_LAYER_GTP,
 827                 .ptype = RTE_PTYPE_TUNNEL_GTPU,
 828         },
 829 };
 830
 831
 832
 833 /**
 834  * Translate tag ID to register.
 835  *
 836  * @param[in] dev
 837  *   Pointer to the Ethernet device structure.
 838  * @param[in] feature
 839  *   The feature that request the register.
 840  * @param[in] id
 841  *   The request register ID.
 842  * @param[out] error
 843  *   Error description in case of any.
 844  *
 845  * @return
 846  *   The request register on success, a negative errno
 847  *   value otherwise and rte_errno is set.
 848  */
 849 int
 850 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
 851                      enum mlx5_feature_name feature,
 852                      uint32_t id,
 853                      struct rte_flow_error *error)
 854 {
 855         struct mlx5_priv *priv = dev->data->dev_private;
 856         struct mlx5_dev_config *config = &priv->config;
 857         enum modify_reg start_reg;
 858         bool skip_mtr_reg = false;
 859
 860         switch (feature) {
 861         case MLX5_HAIRPIN_RX:
 862                 return REG_B;
 863         case MLX5_HAIRPIN_TX:
 864                 return REG_A;
 865         case MLX5_METADATA_RX:
 866                 switch (config->dv_xmeta_en) {
 867                 case MLX5_XMETA_MODE_LEGACY:
 868                         return REG_B;
 869                 case MLX5_XMETA_MODE_META16:
 870                         return REG_C_0;
 871                 case MLX5_XMETA_MODE_META32:
 872                         return REG_C_1;
 873                 }
 874                 break;
 875         case MLX5_METADATA_TX:
 876                 return REG_A;
 877         case MLX5_METADATA_FDB:
 878                 switch (config->dv_xmeta_en) {
 879                 case MLX5_XMETA_MODE_LEGACY:
 880                         return REG_NON;
 881                 case MLX5_XMETA_MODE_META16:
 882                         return REG_C_0;
 883                 case MLX5_XMETA_MODE_META32:
 884                         return REG_C_1;
 885                 }
 886                 break;
 887         case MLX5_FLOW_MARK:
 888                 switch (config->dv_xmeta_en) {
 889                 case MLX5_XMETA_MODE_LEGACY:
 890                         return REG_NON;
 891                 case MLX5_XMETA_MODE_META16:
 892                         return REG_C_1;
 893                 case MLX5_XMETA_MODE_META32:
 894                         return REG_C_0;
 895                 }
 896                 break;
 897         case MLX5_MTR_ID:
 898                 /*
 899                  * If meter color and meter id share one register, flow match
 900                  * should use the meter color register for match.
 901                  */
 902                 if (priv->mtr_reg_share)
 903                         return priv->mtr_color_reg;
 904                 else
 905                         return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 906                                REG_C_3;
 907         case MLX5_MTR_COLOR:
 908         case MLX5_ASO_FLOW_HIT:
 909         case MLX5_ASO_CONNTRACK:
 910         case MLX5_SAMPLE_ID:
 911                 /* All features use the same REG_C. */
 912                 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
 913                 return priv->mtr_color_reg;
 914         case MLX5_COPY_MARK:
 915                 /*
 916                  * Metadata COPY_MARK register using is in meter suffix sub
 917                  * flow while with meter. It's safe to share the same register.
 918                  */
 919                 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
 920         case MLX5_APP_TAG:
 921                 /*
 922                  * If meter is enable, it will engage the register for color
 923                  * match and flow match. If meter color match is not using the
 924                  * REG_C_2, need to skip the REG_C_x be used by meter color
 925                  * match.
 926                  * If meter is disable, free to use all available registers.
 927                  */
 928                 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
 929                             (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
 930                 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
 931                 if (id > (uint32_t)(REG_C_7 - start_reg))
 932                         return rte_flow_error_set(error, EINVAL,
 933                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 934                                                   NULL, "invalid tag id");
 935                 if (priv->sh->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
 936                         return rte_flow_error_set(error, ENOTSUP,
 937                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 938                                                   NULL, "unsupported tag id");
 939                 /*
 940                  * This case means meter is using the REG_C_x great than 2.
 941                  * Take care not to conflict with meter color REG_C_x.
 942                  * If the available index REG_C_y >= REG_C_x, skip the
 943                  * color register.
 944                  */
 945                 if (skip_mtr_reg && priv->sh->flow_mreg_c
 946                     [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
 947                         if (id >= (uint32_t)(REG_C_7 - start_reg))
 948                                 return rte_flow_error_set(error, EINVAL,
 949                                                        RTE_FLOW_ERROR_TYPE_ITEM,
 950                                                         NULL, "invalid tag id");
 951                         if (priv->sh->flow_mreg_c
 952                             [id + 1 + start_reg - REG_C_0] != REG_NON)
 953                                 return priv->sh->flow_mreg_c
 954                                                [id + 1 + start_reg - REG_C_0];
 955                         return rte_flow_error_set(error, ENOTSUP,
 956                                                   RTE_FLOW_ERROR_TYPE_ITEM,
 957                                                   NULL, "unsupported tag id");
 958                 }
 959                 return priv->sh->flow_mreg_c[id + start_reg - REG_C_0];
 960         }
 961         MLX5_ASSERT(false);
 962         return rte_flow_error_set(error, EINVAL,
 963                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
 964                                   NULL, "invalid feature name");
 965 }
 966
 967 /**
 968  * Check extensive flow metadata register support.
 969  *
 970  * @param dev
 971  *   Pointer to rte_eth_dev structure.
 972  *
 973  * @return
 974  *   True if device supports extensive flow metadata register, otherwise false.
 975  */
 976 bool
 977 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
 978 {
 979         struct mlx5_priv *priv = dev->data->dev_private;
 980
 981         /*
 982          * Having available reg_c can be regarded inclusively as supporting
 983          * extensive flow metadata register, which could mean,
 984          * - metadata register copy action by modify header.
 985          * - 16 modify header actions is supported.
 986          * - reg_c's are preserved across different domain (FDB and NIC) on
 987          *   packet loopback by flow lookup miss.
 988          */
 989         return priv->sh->flow_mreg_c[2] != REG_NON;
 990 }
 991
 992 /**
 993  * Get the lowest priority.
 994  *
 995  * @param[in] dev
 996  *   Pointer to the Ethernet device structure.
 997  * @param[in] attributes
 998  *   Pointer to device flow rule attributes.
 999  *
1000  * @return
1001  *   The value of lowest priority of flow.
1002  */
1003 uint32_t
1004 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
1005                           const struct rte_flow_attr *attr)
1006 {
1007         struct mlx5_priv *priv = dev->data->dev_private;
1008
1009         if (!attr->group && !attr->transfer)
1010                 return priv->sh->flow_max_priority - 2;
1011         return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
1012 }
1013
1014 /**
1015  * Calculate matcher priority of the flow.
1016  *
1017  * @param[in] dev
1018  *   Pointer to the Ethernet device structure.
1019  * @param[in] attr
1020  *   Pointer to device flow rule attributes.
1021  * @param[in] subpriority
1022  *   The priority based on the items.
1023  * @param[in] external
1024  *   Flow is user flow.
1025  * @return
1026  *   The matcher priority of the flow.
1027  */
1028 uint16_t
1029 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
1030                           const struct rte_flow_attr *attr,
1031                           uint32_t subpriority, bool external)
1032 {
1033         uint16_t priority = (uint16_t)attr->priority;
1034         struct mlx5_priv *priv = dev->data->dev_private;
1035
1036         if (!attr->group && !attr->transfer) {
1037                 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1038                         priority = priv->sh->flow_max_priority - 1;
1039                 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
1040         } else if (!external && attr->transfer && attr->group == 0 &&
1041                    attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) {
1042                 return (priv->sh->flow_max_priority - 1) * 3;
1043         }
1044         if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1045                 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
1046         return priority * 3 + subpriority;
1047 }
1048
1049 /**
1050  * Verify the @p item specifications (spec, last, mask) are compatible with the
1051  * NIC capabilities.
1052  *
1053  * @param[in] item
1054  *   Item specification.
1055  * @param[in] mask
1056  *   @p item->mask or flow default bit-masks.
1057  * @param[in] nic_mask
1058  *   Bit-masks covering supported fields by the NIC to compare with user mask.
1059  * @param[in] size
1060  *   Bit-masks size in bytes.
1061  * @param[in] range_accepted
1062  *   True if range of values is accepted for specific fields, false otherwise.
1063  * @param[out] error
1064  *   Pointer to error structure.
1065  *
1066  * @return
1067  *   0 on success, a negative errno value otherwise and rte_errno is set.
1068  */
1069 int
1070 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
1071                           const uint8_t *mask,
1072                           const uint8_t *nic_mask,
1073                           unsigned int size,
1074                           bool range_accepted,
1075                           struct rte_flow_error *error)
1076 {
1077         unsigned int i;
1078
1079         MLX5_ASSERT(nic_mask);
1080         for (i = 0; i < size; ++i)
1081                 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1082                         return rte_flow_error_set(error, ENOTSUP,
1083                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1084                                                   item,
1085                                                   "mask enables non supported"
1086                                                   " bits");
1087         if (!item->spec && (item->mask || item->last))
1088                 return rte_flow_error_set(error, EINVAL,
1089                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1090                                           "mask/last without a spec is not"
1091                                           " supported");
1092         if (item->spec && item->last && !range_accepted) {
1093                 uint8_t spec[size];
1094                 uint8_t last[size];
1095                 unsigned int i;
1096                 int ret;
1097
1098                 for (i = 0; i < size; ++i) {
1099                         spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1100                         last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1101                 }
1102                 ret = memcmp(spec, last, size);
1103                 if (ret != 0)
1104                         return rte_flow_error_set(error, EINVAL,
1105                                                   RTE_FLOW_ERROR_TYPE_ITEM,
1106                                                   item,
1107                                                   "range is not valid");
1108         }
1109         return 0;
1110 }
1111
1112 /**
1113  * Adjust the hash fields according to the @p flow information.
1114  *
1115  * @param[in] dev_flow.
1116  *   Pointer to the mlx5_flow.
1117  * @param[in] tunnel
1118  *   1 when the hash field is for a tunnel item.
1119  * @param[in] layer_types
1120  *   RTE_ETH_RSS_* types.
1121  * @param[in] hash_fields
1122  *   Item hash fields.
1123  *
1124  * @return
1125  *   The hash fields that should be used.
1126  */
1127 uint64_t
1128 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1129                             int tunnel __rte_unused, uint64_t layer_types,
1130                             uint64_t hash_fields)
1131 {
1132 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1133         int rss_request_inner = rss_desc->level >= 2;
1134
1135         /* Check RSS hash level for tunnel. */
1136         if (tunnel && rss_request_inner)
1137                 hash_fields |= IBV_RX_HASH_INNER;
1138         else if (tunnel || rss_request_inner)
1139                 return 0;
1140 #endif
1141         /* Check if requested layer matches RSS hash fields. */
1142         if (!(rss_desc->types & layer_types))
1143                 return 0;
1144         return hash_fields;
1145 }
1146
1147 /**
1148  * Lookup and set the ptype in the data Rx part.  A single Ptype can be used,
1149  * if several tunnel rules are used on this queue, the tunnel ptype will be
1150  * cleared.
1151  *
1152  * @param rxq_ctrl
1153  *   Rx queue to update.
1154  */
1155 static void
1156 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1157 {
1158         unsigned int i;
1159         uint32_t tunnel_ptype = 0;
1160
1161         /* Look up for the ptype to use. */
1162         for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1163                 if (!rxq_ctrl->flow_tunnels_n[i])
1164                         continue;
1165                 if (!tunnel_ptype) {
1166                         tunnel_ptype = tunnels_info[i].ptype;
1167                 } else {
1168                         tunnel_ptype = 0;
1169                         break;
1170                 }
1171         }
1172         rxq_ctrl->rxq.tunnel = tunnel_ptype;
1173 }
1174
1175 /**
1176  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
1177  * flow.
1178  *
1179  * @param[in] dev
1180  *   Pointer to the Ethernet device structure.
1181  * @param[in] dev_handle
1182  *   Pointer to device flow handle structure.
1183  */
1184 void
1185 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1186                        struct mlx5_flow_handle *dev_handle)
1187 {
1188         struct mlx5_priv *priv = dev->data->dev_private;
1189         const int mark = dev_handle->mark;
1190         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1191         struct mlx5_ind_table_obj *ind_tbl = NULL;
1192         unsigned int i;
1193
1194         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1195                 struct mlx5_hrxq *hrxq;
1196
1197                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1198                               dev_handle->rix_hrxq);
1199                 if (hrxq)
1200                         ind_tbl = hrxq->ind_table;
1201         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1202                 struct mlx5_shared_action_rss *shared_rss;
1203
1204                 shared_rss = mlx5_ipool_get
1205                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1206                          dev_handle->rix_srss);
1207                 if (shared_rss)
1208                         ind_tbl = shared_rss->ind_tbl;
1209         }
1210         if (!ind_tbl)
1211                 return;
1212         for (i = 0; i != ind_tbl->queues_n; ++i) {
1213                 int idx = ind_tbl->queues[i];
1214                 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx);
1215
1216                 MLX5_ASSERT(rxq_ctrl != NULL);
1217                 if (rxq_ctrl == NULL)
1218                         continue;
1219                 /*
1220                  * To support metadata register copy on Tx loopback,
1221                  * this must be always enabled (metadata may arive
1222                  * from other port - not from local flows only.
1223                  */
1224                 if (priv->config.dv_flow_en &&
1225                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1226                     mlx5_flow_ext_mreg_supported(dev)) {
1227                         rxq_ctrl->rxq.mark = 1;
1228                         rxq_ctrl->flow_mark_n = 1;
1229                 } else if (mark) {
1230                         rxq_ctrl->rxq.mark = 1;
1231                         rxq_ctrl->flow_mark_n++;
1232                 }
1233                 if (tunnel) {
1234                         unsigned int j;
1235
1236                         /* Increase the counter matching the flow. */
1237                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1238                                 if ((tunnels_info[j].tunnel &
1239                                      dev_handle->layers) ==
1240                                     tunnels_info[j].tunnel) {
1241                                         rxq_ctrl->flow_tunnels_n[j]++;
1242                                         break;
1243                                 }
1244                         }
1245                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1246                 }
1247         }
1248 }
1249
1250 /**
1251  * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1252  *
1253  * @param[in] dev
1254  *   Pointer to the Ethernet device structure.
1255  * @param[in] flow
1256  *   Pointer to flow structure.
1257  */
1258 static void
1259 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1260 {
1261         struct mlx5_priv *priv = dev->data->dev_private;
1262         uint32_t handle_idx;
1263         struct mlx5_flow_handle *dev_handle;
1264
1265         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1266                        handle_idx, dev_handle, next)
1267                 flow_drv_rxq_flags_set(dev, dev_handle);
1268 }
1269
1270 /**
1271  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1272  * device flow if no other flow uses it with the same kind of request.
1273  *
1274  * @param dev
1275  *   Pointer to Ethernet device.
1276  * @param[in] dev_handle
1277  *   Pointer to the device flow handle structure.
1278  */
1279 static void
1280 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1281                         struct mlx5_flow_handle *dev_handle)
1282 {
1283         struct mlx5_priv *priv = dev->data->dev_private;
1284         const int mark = dev_handle->mark;
1285         const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1286         struct mlx5_ind_table_obj *ind_tbl = NULL;
1287         unsigned int i;
1288
1289         if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1290                 struct mlx5_hrxq *hrxq;
1291
1292                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1293                               dev_handle->rix_hrxq);
1294                 if (hrxq)
1295                         ind_tbl = hrxq->ind_table;
1296         } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1297                 struct mlx5_shared_action_rss *shared_rss;
1298
1299                 shared_rss = mlx5_ipool_get
1300                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1301                          dev_handle->rix_srss);
1302                 if (shared_rss)
1303                         ind_tbl = shared_rss->ind_tbl;
1304         }
1305         if (!ind_tbl)
1306                 return;
1307         MLX5_ASSERT(dev->data->dev_started);
1308         for (i = 0; i != ind_tbl->queues_n; ++i) {
1309                 int idx = ind_tbl->queues[i];
1310                 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx);
1311
1312                 MLX5_ASSERT(rxq_ctrl != NULL);
1313                 if (rxq_ctrl == NULL)
1314                         continue;
1315                 if (priv->config.dv_flow_en &&
1316                     priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
1317                     mlx5_flow_ext_mreg_supported(dev)) {
1318                         rxq_ctrl->rxq.mark = 1;
1319                         rxq_ctrl->flow_mark_n = 1;
1320                 } else if (mark) {
1321                         rxq_ctrl->flow_mark_n--;
1322                         rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
1323                 }
1324                 if (tunnel) {
1325                         unsigned int j;
1326
1327                         /* Decrease the counter matching the flow. */
1328                         for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1329                                 if ((tunnels_info[j].tunnel &
1330                                      dev_handle->layers) ==
1331                                     tunnels_info[j].tunnel) {
1332                                         rxq_ctrl->flow_tunnels_n[j]--;
1333                                         break;
1334                                 }
1335                         }
1336                         flow_rxq_tunnel_ptype_update(rxq_ctrl);
1337                 }
1338         }
1339 }
1340
1341 /**
1342  * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1343  * @p flow if no other flow uses it with the same kind of request.
1344  *
1345  * @param dev
1346  *   Pointer to Ethernet device.
1347  * @param[in] flow
1348  *   Pointer to the flow.
1349  */
1350 static void
1351 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1352 {
1353         struct mlx5_priv *priv = dev->data->dev_private;
1354         uint32_t handle_idx;
1355         struct mlx5_flow_handle *dev_handle;
1356
1357         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1358                        handle_idx, dev_handle, next)
1359                 flow_drv_rxq_flags_trim(dev, dev_handle);
1360 }
1361
1362 /**
1363  * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1364  *
1365  * @param dev
1366  *   Pointer to Ethernet device.
1367  */
1368 static void
1369 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1370 {
1371         struct mlx5_priv *priv = dev->data->dev_private;
1372         unsigned int i;
1373
1374         for (i = 0; i != priv->rxqs_n; ++i) {
1375                 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
1376                 unsigned int j;
1377
1378                 if (rxq == NULL || rxq->ctrl == NULL)
1379                         continue;
1380                 rxq->ctrl->flow_mark_n = 0;
1381                 rxq->ctrl->rxq.mark = 0;
1382                 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1383                         rxq->ctrl->flow_tunnels_n[j] = 0;
1384                 rxq->ctrl->rxq.tunnel = 0;
1385         }
1386 }
1387
1388 /**
1389  * Set the Rx queue dynamic metadata (mask and offset) for a flow
1390  *
1391  * @param[in] dev
1392  *   Pointer to the Ethernet device structure.
1393  */
1394 void
1395 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1396 {
1397         struct mlx5_priv *priv = dev->data->dev_private;
1398         unsigned int i;
1399
1400         for (i = 0; i != priv->rxqs_n; ++i) {
1401                 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
1402                 struct mlx5_rxq_data *data;
1403
1404                 if (rxq == NULL || rxq->ctrl == NULL)
1405                         continue;
1406                 data = &rxq->ctrl->rxq;
1407                 if (!rte_flow_dynf_metadata_avail()) {
1408                         data->dynf_meta = 0;
1409                         data->flow_meta_mask = 0;
1410                         data->flow_meta_offset = -1;
1411                         data->flow_meta_port_mask = 0;
1412                 } else {
1413                         data->dynf_meta = 1;
1414                         data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1415                         data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1416                         data->flow_meta_port_mask = priv->sh->dv_meta_mask;
1417                 }
1418         }
1419 }
1420
1421 /*
1422  * return a pointer to the desired action in the list of actions.
1423  *
1424  * @param[in] actions
1425  *   The list of actions to search the action in.
1426  * @param[in] action
1427  *   The action to find.
1428  *
1429  * @return
1430  *   Pointer to the action in the list, if found. NULL otherwise.
1431  */
1432 const struct rte_flow_action *
1433 mlx5_flow_find_action(const struct rte_flow_action *actions,
1434                       enum rte_flow_action_type action)
1435 {
1436         if (actions == NULL)
1437                 return NULL;
1438         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1439                 if (actions->type == action)
1440                         return actions;
1441         return NULL;
1442 }
1443
1444 /*
1445  * Validate the flag action.
1446  *
1447  * @param[in] action_flags
1448  *   Bit-fields that holds the actions detected until now.
1449  * @param[in] attr
1450  *   Attributes of flow that includes this action.
1451  * @param[out] error
1452  *   Pointer to error structure.
1453  *
1454  * @return
1455  *   0 on success, a negative errno value otherwise and rte_errno is set.
1456  */
1457 int
1458 mlx5_flow_validate_action_flag(uint64_t action_flags,
1459                                const struct rte_flow_attr *attr,
1460                                struct rte_flow_error *error)
1461 {
1462         if (action_flags & MLX5_FLOW_ACTION_MARK)
1463                 return rte_flow_error_set(error, EINVAL,
1464                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1465                                           "can't mark and flag in same flow");
1466         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1467                 return rte_flow_error_set(error, EINVAL,
1468                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1469                                           "can't have 2 flag"
1470                                           " actions in same flow");
1471         if (attr->egress)
1472                 return rte_flow_error_set(error, ENOTSUP,
1473                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1474                                           "flag action not supported for "
1475                                           "egress");
1476         return 0;
1477 }
1478
1479 /*
1480  * Validate the mark action.
1481  *
1482  * @param[in] action
1483  *   Pointer to the queue action.
1484  * @param[in] action_flags
1485  *   Bit-fields that holds the actions detected until now.
1486  * @param[in] attr
1487  *   Attributes of flow that includes this action.
1488  * @param[out] error
1489  *   Pointer to error structure.
1490  *
1491  * @return
1492  *   0 on success, a negative errno value otherwise and rte_errno is set.
1493  */
1494 int
1495 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1496                                uint64_t action_flags,
1497                                const struct rte_flow_attr *attr,
1498                                struct rte_flow_error *error)
1499 {
1500         const struct rte_flow_action_mark *mark = action->conf;
1501
1502         if (!mark)
1503                 return rte_flow_error_set(error, EINVAL,
1504                                           RTE_FLOW_ERROR_TYPE_ACTION,
1505                                           action,
1506                                           "configuration cannot be null");
1507         if (mark->id >= MLX5_FLOW_MARK_MAX)
1508                 return rte_flow_error_set(error, EINVAL,
1509                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1510                                           &mark->id,
1511                                           "mark id must in 0 <= id < "
1512                                           RTE_STR(MLX5_FLOW_MARK_MAX));
1513         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1514                 return rte_flow_error_set(error, EINVAL,
1515                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1516                                           "can't flag and mark in same flow");
1517         if (action_flags & MLX5_FLOW_ACTION_MARK)
1518                 return rte_flow_error_set(error, EINVAL,
1519                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1520                                           "can't have 2 mark actions in same"
1521                                           " flow");
1522         if (attr->egress)
1523                 return rte_flow_error_set(error, ENOTSUP,
1524                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1525                                           "mark action not supported for "
1526                                           "egress");
1527         return 0;
1528 }
1529
1530 /*
1531  * Validate the drop action.
1532  *
1533  * @param[in] action_flags
1534  *   Bit-fields that holds the actions detected until now.
1535  * @param[in] attr
1536  *   Attributes of flow that includes this action.
1537  * @param[out] error
1538  *   Pointer to error structure.
1539  *
1540  * @return
1541  *   0 on success, a negative errno value otherwise and rte_errno is set.
1542  */
1543 int
1544 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1545                                const struct rte_flow_attr *attr,
1546                                struct rte_flow_error *error)
1547 {
1548         if (attr->egress)
1549                 return rte_flow_error_set(error, ENOTSUP,
1550                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1551                                           "drop action not supported for "
1552                                           "egress");
1553         return 0;
1554 }
1555
1556 /*
1557  * Validate the queue action.
1558  *
1559  * @param[in] action
1560  *   Pointer to the queue action.
1561  * @param[in] action_flags
1562  *   Bit-fields that holds the actions detected until now.
1563  * @param[in] dev
1564  *   Pointer to the Ethernet device structure.
1565  * @param[in] attr
1566  *   Attributes of flow that includes this action.
1567  * @param[out] error
1568  *   Pointer to error structure.
1569  *
1570  * @return
1571  *   0 on success, a negative errno value otherwise and rte_errno is set.
1572  */
1573 int
1574 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1575                                 uint64_t action_flags,
1576                                 struct rte_eth_dev *dev,
1577                                 const struct rte_flow_attr *attr,
1578                                 struct rte_flow_error *error)
1579 {
1580         struct mlx5_priv *priv = dev->data->dev_private;
1581         const struct rte_flow_action_queue *queue = action->conf;
1582
1583         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1584                 return rte_flow_error_set(error, EINVAL,
1585                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1586                                           "can't have 2 fate actions in"
1587                                           " same flow");
1588         if (!priv->rxqs_n)
1589                 return rte_flow_error_set(error, EINVAL,
1590                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1591                                           NULL, "No Rx queues configured");
1592         if (queue->index >= priv->rxqs_n)
1593                 return rte_flow_error_set(error, EINVAL,
1594                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1595                                           &queue->index,
1596                                           "queue index out of range");
1597         if (mlx5_rxq_get(dev, queue->index) == NULL)
1598                 return rte_flow_error_set(error, EINVAL,
1599                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1600                                           &queue->index,
1601                                           "queue is not configured");
1602         if (attr->egress)
1603                 return rte_flow_error_set(error, ENOTSUP,
1604                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1605                                           "queue action not supported for "
1606                                           "egress");
1607         return 0;
1608 }
1609
1610 /**
1611  * Validate queue numbers for device RSS.
1612  *
1613  * @param[in] dev
1614  *   Configured device.
1615  * @param[in] queues
1616  *   Array of queue numbers.
1617  * @param[in] queues_n
1618  *   Size of the @p queues array.
1619  * @param[out] error
1620  *   On error, filled with a textual error description.
1621  * @param[out] queue
1622  *   On error, filled with an offending queue index in @p queues array.
1623  *
1624  * @return
1625  *   0 on success, a negative errno code on error.
1626  */
1627 static int
1628 mlx5_validate_rss_queues(struct rte_eth_dev *dev,
1629                          const uint16_t *queues, uint32_t queues_n,
1630                          const char **error, uint32_t *queue_idx)
1631 {
1632         const struct mlx5_priv *priv = dev->data->dev_private;
1633         enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1634         uint32_t i;
1635
1636         for (i = 0; i != queues_n; ++i) {
1637                 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev,
1638                                                                    queues[i]);
1639
1640                 if (queues[i] >= priv->rxqs_n) {
1641                         *error = "queue index out of range";
1642                         *queue_idx = i;
1643                         return -EINVAL;
1644                 }
1645                 if (rxq_ctrl == NULL) {
1646                         *error =  "queue is not configured";
1647                         *queue_idx = i;
1648                         return -EINVAL;
1649                 }
1650                 if (i == 0)
1651                         rxq_type = rxq_ctrl->type;
1652                 if (rxq_type != rxq_ctrl->type) {
1653                         *error = "combining hairpin and regular RSS queues is not supported";
1654                         *queue_idx = i;
1655                         return -ENOTSUP;
1656                 }
1657         }
1658         return 0;
1659 }
1660
1661 /*
1662  * Validate the rss action.
1663  *
1664  * @param[in] dev
1665  *   Pointer to the Ethernet device structure.
1666  * @param[in] action
1667  *   Pointer to the queue action.
1668  * @param[out] error
1669  *   Pointer to error structure.
1670  *
1671  * @return
1672  *   0 on success, a negative errno value otherwise and rte_errno is set.
1673  */
1674 int
1675 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1676                          const struct rte_flow_action *action,
1677                          struct rte_flow_error *error)
1678 {
1679         struct mlx5_priv *priv = dev->data->dev_private;
1680         const struct rte_flow_action_rss *rss = action->conf;
1681         int ret;
1682         const char *message;
1683         uint32_t queue_idx;
1684
1685         if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1686             rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1687                 return rte_flow_error_set(error, ENOTSUP,
1688                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1689                                           &rss->func,
1690                                           "RSS hash function not supported");
1691 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1692         if (rss->level > 2)
1693 #else
1694         if (rss->level > 1)
1695 #endif
1696                 return rte_flow_error_set(error, ENOTSUP,
1697                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1698                                           &rss->level,
1699                                           "tunnel RSS is not supported");
1700         /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1701         if (rss->key_len == 0 && rss->key != NULL)
1702                 return rte_flow_error_set(error, ENOTSUP,
1703                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1704                                           &rss->key_len,
1705                                           "RSS hash key length 0");
1706         if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1707                 return rte_flow_error_set(error, ENOTSUP,
1708                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1709                                           &rss->key_len,
1710                                           "RSS hash key too small");
1711         if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1712                 return rte_flow_error_set(error, ENOTSUP,
1713                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1714                                           &rss->key_len,
1715                                           "RSS hash key too large");
1716         if (rss->queue_num > priv->config.ind_table_max_size)
1717                 return rte_flow_error_set(error, ENOTSUP,
1718                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1719                                           &rss->queue_num,
1720                                           "number of queues too large");
1721         if (rss->types & MLX5_RSS_HF_MASK)
1722                 return rte_flow_error_set(error, ENOTSUP,
1723                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1724                                           &rss->types,
1725                                           "some RSS protocols are not"
1726                                           " supported");
1727         if ((rss->types & (RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY)) &&
1728             !(rss->types & RTE_ETH_RSS_IP))
1729                 return rte_flow_error_set(error, EINVAL,
1730                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1731                                           "L3 partial RSS requested but L3 RSS"
1732                                           " type not specified");
1733         if ((rss->types & (RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY)) &&
1734             !(rss->types & (RTE_ETH_RSS_UDP | RTE_ETH_RSS_TCP)))
1735                 return rte_flow_error_set(error, EINVAL,
1736                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1737                                           "L4 partial RSS requested but L4 RSS"
1738                                           " type not specified");
1739         if (!priv->rxqs_n)
1740                 return rte_flow_error_set(error, EINVAL,
1741                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1742                                           NULL, "No Rx queues configured");
1743         if (!rss->queue_num)
1744                 return rte_flow_error_set(error, EINVAL,
1745                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1746                                           NULL, "No queues configured");
1747         ret = mlx5_validate_rss_queues(dev, rss->queue, rss->queue_num,
1748                                        &message, &queue_idx);
1749         if (ret != 0) {
1750                 return rte_flow_error_set(error, -ret,
1751                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1752                                           &rss->queue[queue_idx], message);
1753         }
1754         return 0;
1755 }
1756
1757 /*
1758  * Validate the rss action.
1759  *
1760  * @param[in] action
1761  *   Pointer to the queue action.
1762  * @param[in] action_flags
1763  *   Bit-fields that holds the actions detected until now.
1764  * @param[in] dev
1765  *   Pointer to the Ethernet device structure.
1766  * @param[in] attr
1767  *   Attributes of flow that includes this action.
1768  * @param[in] item_flags
1769  *   Items that were detected.
1770  * @param[out] error
1771  *   Pointer to error structure.
1772  *
1773  * @return
1774  *   0 on success, a negative errno value otherwise and rte_errno is set.
1775  */
1776 int
1777 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1778                               uint64_t action_flags,
1779                               struct rte_eth_dev *dev,
1780                               const struct rte_flow_attr *attr,
1781                               uint64_t item_flags,
1782                               struct rte_flow_error *error)
1783 {
1784         const struct rte_flow_action_rss *rss = action->conf;
1785         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1786         int ret;
1787
1788         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1789                 return rte_flow_error_set(error, EINVAL,
1790                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1791                                           "can't have 2 fate actions"
1792                                           " in same flow");
1793         ret = mlx5_validate_action_rss(dev, action, error);
1794         if (ret)
1795                 return ret;
1796         if (attr->egress)
1797                 return rte_flow_error_set(error, ENOTSUP,
1798                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1799                                           "rss action not supported for "
1800                                           "egress");
1801         if (rss->level > 1 && !tunnel)
1802                 return rte_flow_error_set(error, EINVAL,
1803                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1804                                           "inner RSS is not supported for "
1805                                           "non-tunnel flows");
1806         if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1807             !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1808                 return rte_flow_error_set(error, EINVAL,
1809                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1810                                           "RSS on eCPRI is not supported now");
1811         }
1812         if ((item_flags & MLX5_FLOW_LAYER_MPLS) &&
1813             !(item_flags &
1814               (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) &&
1815             rss->level > 1)
1816                 return rte_flow_error_set(error, EINVAL,
1817                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1818                                           "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern");
1819         return 0;
1820 }
1821
1822 /*
1823  * Validate the default miss action.
1824  *
1825  * @param[in] action_flags
1826  *   Bit-fields that holds the actions detected until now.
1827  * @param[out] error
1828  *   Pointer to error structure.
1829  *
1830  * @return
1831  *   0 on success, a negative errno value otherwise and rte_errno is set.
1832  */
1833 int
1834 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1835                                 const struct rte_flow_attr *attr,
1836                                 struct rte_flow_error *error)
1837 {
1838         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1839                 return rte_flow_error_set(error, EINVAL,
1840                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1841                                           "can't have 2 fate actions in"
1842                                           " same flow");
1843         if (attr->egress)
1844                 return rte_flow_error_set(error, ENOTSUP,
1845                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1846                                           "default miss action not supported "
1847                                           "for egress");
1848         if (attr->group)
1849                 return rte_flow_error_set(error, ENOTSUP,
1850                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1851                                           "only group 0 is supported");
1852         if (attr->transfer)
1853                 return rte_flow_error_set(error, ENOTSUP,
1854                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1855                                           NULL, "transfer is not supported");
1856         return 0;
1857 }
1858
1859 /*
1860  * Validate the count action.
1861  *
1862  * @param[in] dev
1863  *   Pointer to the Ethernet device structure.
1864  * @param[in] attr
1865  *   Attributes of flow that includes this action.
1866  * @param[out] error
1867  *   Pointer to error structure.
1868  *
1869  * @return
1870  *   0 on success, a negative errno value otherwise and rte_errno is set.
1871  */
1872 int
1873 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1874                                 const struct rte_flow_attr *attr,
1875                                 struct rte_flow_error *error)
1876 {
1877         if (attr->egress)
1878                 return rte_flow_error_set(error, ENOTSUP,
1879                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1880                                           "count action not supported for "
1881                                           "egress");
1882         return 0;
1883 }
1884
1885 /*
1886  * Validate the ASO CT action.
1887  *
1888  * @param[in] dev
1889  *   Pointer to the Ethernet device structure.
1890  * @param[in] conntrack
1891  *   Pointer to the CT action profile.
1892  * @param[out] error
1893  *   Pointer to error structure.
1894  *
1895  * @return
1896  *   0 on success, a negative errno value otherwise and rte_errno is set.
1897  */
1898 int
1899 mlx5_validate_action_ct(struct rte_eth_dev *dev,
1900                         const struct rte_flow_action_conntrack *conntrack,
1901                         struct rte_flow_error *error)
1902 {
1903         RTE_SET_USED(dev);
1904
1905         if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT)
1906                 return rte_flow_error_set(error, EINVAL,
1907                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1908                                           "Invalid CT state");
1909         if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST)
1910                 return rte_flow_error_set(error, EINVAL,
1911                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1912                                           "Invalid last TCP packet flag");
1913         return 0;
1914 }
1915
1916 /**
1917  * Verify the @p attributes will be correctly understood by the NIC and store
1918  * them in the @p flow if everything is correct.
1919  *
1920  * @param[in] dev
1921  *   Pointer to the Ethernet device structure.
1922  * @param[in] attributes
1923  *   Pointer to flow attributes
1924  * @param[out] error
1925  *   Pointer to error structure.
1926  *
1927  * @return
1928  *   0 on success, a negative errno value otherwise and rte_errno is set.
1929  */
1930 int
1931 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1932                               const struct rte_flow_attr *attributes,
1933                               struct rte_flow_error *error)
1934 {
1935         struct mlx5_priv *priv = dev->data->dev_private;
1936         uint32_t priority_max = priv->sh->flow_max_priority - 1;
1937
1938         if (attributes->group)
1939                 return rte_flow_error_set(error, ENOTSUP,
1940                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1941                                           NULL, "groups is not supported");
1942         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
1943             attributes->priority >= priority_max)
1944                 return rte_flow_error_set(error, ENOTSUP,
1945                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1946                                           NULL, "priority out of range");
1947         if (attributes->egress)
1948                 return rte_flow_error_set(error, ENOTSUP,
1949                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1950                                           "egress is not supported");
1951         if (attributes->transfer && !priv->config.dv_esw_en)
1952                 return rte_flow_error_set(error, ENOTSUP,
1953                                           RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1954                                           NULL, "transfer is not supported");
1955         if (!attributes->ingress)
1956                 return rte_flow_error_set(error, EINVAL,
1957                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1958                                           NULL,
1959                                           "ingress attribute is mandatory");
1960         return 0;
1961 }
1962
1963 /**
1964  * Validate ICMP6 item.
1965  *
1966  * @param[in] item
1967  *   Item specification.
1968  * @param[in] item_flags
1969  *   Bit-fields that holds the items detected until now.
1970  * @param[in] ext_vlan_sup
1971  *   Whether extended VLAN features are supported or not.
1972  * @param[out] error
1973  *   Pointer to error structure.
1974  *
1975  * @return
1976  *   0 on success, a negative errno value otherwise and rte_errno is set.
1977  */
1978 int
1979 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1980                                uint64_t item_flags,
1981                                uint8_t target_protocol,
1982                                struct rte_flow_error *error)
1983 {
1984         const struct rte_flow_item_icmp6 *mask = item->mask;
1985         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1986         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1987                                       MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1988         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1989                                       MLX5_FLOW_LAYER_OUTER_L4;
1990         int ret;
1991
1992         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1993                 return rte_flow_error_set(error, EINVAL,
1994                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1995                                           "protocol filtering not compatible"
1996                                           " with ICMP6 layer");
1997         if (!(item_flags & l3m))
1998                 return rte_flow_error_set(error, EINVAL,
1999                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2000                                           "IPv6 is mandatory to filter on"
2001                                           " ICMP6");
2002         if (item_flags & l4m)
2003                 return rte_flow_error_set(error, EINVAL,
2004                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2005                                           "multiple L4 layers not supported");
2006         if (!mask)
2007                 mask = &rte_flow_item_icmp6_mask;
2008         ret = mlx5_flow_item_acceptable
2009                 (item, (const uint8_t *)mask,
2010                  (const uint8_t *)&rte_flow_item_icmp6_mask,
2011                  sizeof(struct rte_flow_item_icmp6),
2012                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2013         if (ret < 0)
2014                 return ret;
2015         return 0;
2016 }
2017
2018 /**
2019  * Validate ICMP item.
2020  *
2021  * @param[in] item
2022  *   Item specification.
2023  * @param[in] item_flags
2024  *   Bit-fields that holds the items detected until now.
2025  * @param[out] error
2026  *   Pointer to error structure.
2027  *
2028  * @return
2029  *   0 on success, a negative errno value otherwise and rte_errno is set.
2030  */
2031 int
2032 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
2033                              uint64_t item_flags,
2034                              uint8_t target_protocol,
2035                              struct rte_flow_error *error)
2036 {
2037         const struct rte_flow_item_icmp *mask = item->mask;
2038         const struct rte_flow_item_icmp nic_mask = {
2039                 .hdr.icmp_type = 0xff,
2040                 .hdr.icmp_code = 0xff,
2041                 .hdr.icmp_ident = RTE_BE16(0xffff),
2042                 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
2043         };
2044         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2045         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
2046                                       MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2047         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2048                                       MLX5_FLOW_LAYER_OUTER_L4;
2049         int ret;
2050
2051         if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
2052                 return rte_flow_error_set(error, EINVAL,
2053                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2054                                           "protocol filtering not compatible"
2055                                           " with ICMP layer");
2056         if (!(item_flags & l3m))
2057                 return rte_flow_error_set(error, EINVAL,
2058                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2059                                           "IPv4 is mandatory to filter"
2060                                           " on ICMP");
2061         if (item_flags & l4m)
2062                 return rte_flow_error_set(error, EINVAL,
2063                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2064                                           "multiple L4 layers not supported");
2065         if (!mask)
2066                 mask = &nic_mask;
2067         ret = mlx5_flow_item_acceptable
2068                 (item, (const uint8_t *)mask,
2069                  (const uint8_t *)&nic_mask,
2070                  sizeof(struct rte_flow_item_icmp),
2071                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2072         if (ret < 0)
2073                 return ret;
2074         return 0;
2075 }
2076
2077 /**
2078  * Validate Ethernet item.
2079  *
2080  * @param[in] item
2081  *   Item specification.
2082  * @param[in] item_flags
2083  *   Bit-fields that holds the items detected until now.
2084  * @param[out] error
2085  *   Pointer to error structure.
2086  *
2087  * @return
2088  *   0 on success, a negative errno value otherwise and rte_errno is set.
2089  */
2090 int
2091 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
2092                             uint64_t item_flags, bool ext_vlan_sup,
2093                             struct rte_flow_error *error)
2094 {
2095         const struct rte_flow_item_eth *mask = item->mask;
2096         const struct rte_flow_item_eth nic_mask = {
2097                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2098                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2099                 .type = RTE_BE16(0xffff),
2100                 .has_vlan = ext_vlan_sup ? 1 : 0,
2101         };
2102         int ret;
2103         int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2104         const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
2105                                        MLX5_FLOW_LAYER_OUTER_L2;
2106
2107         if (item_flags & ethm)
2108                 return rte_flow_error_set(error, ENOTSUP,
2109                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2110                                           "multiple L2 layers not supported");
2111         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
2112             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
2113                 return rte_flow_error_set(error, EINVAL,
2114                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2115                                           "L2 layer should not follow "
2116                                           "L3 layers");
2117         if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
2118             (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
2119                 return rte_flow_error_set(error, EINVAL,
2120                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2121                                           "L2 layer should not follow VLAN");
2122         if (item_flags & MLX5_FLOW_LAYER_GTP)
2123                 return rte_flow_error_set(error, EINVAL,
2124                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2125                                           "L2 layer should not follow GTP");
2126         if (!mask)
2127                 mask = &rte_flow_item_eth_mask;
2128         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2129                                         (const uint8_t *)&nic_mask,
2130                                         sizeof(struct rte_flow_item_eth),
2131                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2132         return ret;
2133 }
2134
2135 /**
2136  * Validate VLAN item.
2137  *
2138  * @param[in] item
2139  *   Item specification.
2140  * @param[in] item_flags
2141  *   Bit-fields that holds the items detected until now.
2142  * @param[in] dev
2143  *   Ethernet device flow is being created on.
2144  * @param[out] error
2145  *   Pointer to error structure.
2146  *
2147  * @return
2148  *   0 on success, a negative errno value otherwise and rte_errno is set.
2149  */
2150 int
2151 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
2152                              uint64_t item_flags,
2153                              struct rte_eth_dev *dev,
2154                              struct rte_flow_error *error)
2155 {
2156         const struct rte_flow_item_vlan *spec = item->spec;
2157         const struct rte_flow_item_vlan *mask = item->mask;
2158         const struct rte_flow_item_vlan nic_mask = {
2159                 .tci = RTE_BE16(UINT16_MAX),
2160                 .inner_type = RTE_BE16(UINT16_MAX),
2161         };
2162         uint16_t vlan_tag = 0;
2163         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2164         int ret;
2165         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2166                                         MLX5_FLOW_LAYER_INNER_L4) :
2167                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2168                                         MLX5_FLOW_LAYER_OUTER_L4);
2169         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2170                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2171
2172         if (item_flags & vlanm)
2173                 return rte_flow_error_set(error, EINVAL,
2174                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2175                                           "multiple VLAN layers not supported");
2176         else if ((item_flags & l34m) != 0)
2177                 return rte_flow_error_set(error, EINVAL,
2178                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2179                                           "VLAN cannot follow L3/L4 layer");
2180         if (!mask)
2181                 mask = &rte_flow_item_vlan_mask;
2182         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2183                                         (const uint8_t *)&nic_mask,
2184                                         sizeof(struct rte_flow_item_vlan),
2185                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2186         if (ret)
2187                 return ret;
2188         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2189                 struct mlx5_priv *priv = dev->data->dev_private;
2190
2191                 if (priv->vmwa_context) {
2192                         /*
2193                          * Non-NULL context means we have a virtual machine
2194                          * and SR-IOV enabled, we have to create VLAN interface
2195                          * to make hypervisor to setup E-Switch vport
2196                          * context correctly. We avoid creating the multiple
2197                          * VLAN interfaces, so we cannot support VLAN tag mask.
2198                          */
2199                         return rte_flow_error_set(error, EINVAL,
2200                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2201                                                   item,
2202                                                   "VLAN tag mask is not"
2203                                                   " supported in virtual"
2204                                                   " environment");
2205                 }
2206         }
2207         if (spec) {
2208                 vlan_tag = spec->tci;
2209                 vlan_tag &= mask->tci;
2210         }
2211         /*
2212          * From verbs perspective an empty VLAN is equivalent
2213          * to a packet without VLAN layer.
2214          */
2215         if (!vlan_tag)
2216                 return rte_flow_error_set(error, EINVAL,
2217                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2218                                           item->spec,
2219                                           "VLAN cannot be empty");
2220         return 0;
2221 }
2222
2223 /**
2224  * Validate IPV4 item.
2225  *
2226  * @param[in] item
2227  *   Item specification.
2228  * @param[in] item_flags
2229  *   Bit-fields that holds the items detected until now.
2230  * @param[in] last_item
2231  *   Previous validated item in the pattern items.
2232  * @param[in] ether_type
2233  *   Type in the ethernet layer header (including dot1q).
2234  * @param[in] acc_mask
2235  *   Acceptable mask, if NULL default internal default mask
2236  *   will be used to check whether item fields are supported.
2237  * @param[in] range_accepted
2238  *   True if range of values is accepted for specific fields, false otherwise.
2239  * @param[out] error
2240  *   Pointer to error structure.
2241  *
2242  * @return
2243  *   0 on success, a negative errno value otherwise and rte_errno is set.
2244  */
2245 int
2246 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2247                              uint64_t item_flags,
2248                              uint64_t last_item,
2249                              uint16_t ether_type,
2250                              const struct rte_flow_item_ipv4 *acc_mask,
2251                              bool range_accepted,
2252                              struct rte_flow_error *error)
2253 {
2254         const struct rte_flow_item_ipv4 *mask = item->mask;
2255         const struct rte_flow_item_ipv4 *spec = item->spec;
2256         const struct rte_flow_item_ipv4 nic_mask = {
2257                 .hdr = {
2258                         .src_addr = RTE_BE32(0xffffffff),
2259                         .dst_addr = RTE_BE32(0xffffffff),
2260                         .type_of_service = 0xff,
2261                         .next_proto_id = 0xff,
2262                 },
2263         };
2264         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2265         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2266                                       MLX5_FLOW_LAYER_OUTER_L3;
2267         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2268                                       MLX5_FLOW_LAYER_OUTER_L4;
2269         int ret;
2270         uint8_t next_proto = 0xFF;
2271         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2272                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2273                                   MLX5_FLOW_LAYER_INNER_VLAN);
2274
2275         if ((last_item & l2_vlan) && ether_type &&
2276             ether_type != RTE_ETHER_TYPE_IPV4)
2277                 return rte_flow_error_set(error, EINVAL,
2278                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2279                                           "IPv4 cannot follow L2/VLAN layer "
2280                                           "which ether type is not IPv4");
2281         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2282                 if (mask && spec)
2283                         next_proto = mask->hdr.next_proto_id &
2284                                      spec->hdr.next_proto_id;
2285                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2286                         return rte_flow_error_set(error, EINVAL,
2287                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2288                                                   item,
2289                                                   "multiple tunnel "
2290                                                   "not supported");
2291         }
2292         if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2293                 return rte_flow_error_set(error, EINVAL,
2294                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2295                                           "wrong tunnel type - IPv6 specified "
2296                                           "but IPv4 item provided");
2297         if (item_flags & l3m)
2298                 return rte_flow_error_set(error, ENOTSUP,
2299                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2300                                           "multiple L3 layers not supported");
2301         else if (item_flags & l4m)
2302                 return rte_flow_error_set(error, EINVAL,
2303                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2304                                           "L3 cannot follow an L4 layer.");
2305         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2306                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2307                 return rte_flow_error_set(error, EINVAL,
2308                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2309                                           "L3 cannot follow an NVGRE layer.");
2310         if (!mask)
2311                 mask = &rte_flow_item_ipv4_mask;
2312         else if (mask->hdr.next_proto_id != 0 &&
2313                  mask->hdr.next_proto_id != 0xff)
2314                 return rte_flow_error_set(error, EINVAL,
2315                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2316                                           "partial mask is not supported"
2317                                           " for protocol");
2318         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2319                                         acc_mask ? (const uint8_t *)acc_mask
2320                                                  : (const uint8_t *)&nic_mask,
2321                                         sizeof(struct rte_flow_item_ipv4),
2322                                         range_accepted, error);
2323         if (ret < 0)
2324                 return ret;
2325         return 0;
2326 }
2327
2328 /**
2329  * Validate IPV6 item.
2330  *
2331  * @param[in] item
2332  *   Item specification.
2333  * @param[in] item_flags
2334  *   Bit-fields that holds the items detected until now.
2335  * @param[in] last_item
2336  *   Previous validated item in the pattern items.
2337  * @param[in] ether_type
2338  *   Type in the ethernet layer header (including dot1q).
2339  * @param[in] acc_mask
2340  *   Acceptable mask, if NULL default internal default mask
2341  *   will be used to check whether item fields are supported.
2342  * @param[out] error
2343  *   Pointer to error structure.
2344  *
2345  * @return
2346  *   0 on success, a negative errno value otherwise and rte_errno is set.
2347  */
2348 int
2349 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2350                              uint64_t item_flags,
2351                              uint64_t last_item,
2352                              uint16_t ether_type,
2353                              const struct rte_flow_item_ipv6 *acc_mask,
2354                              struct rte_flow_error *error)
2355 {
2356         const struct rte_flow_item_ipv6 *mask = item->mask;
2357         const struct rte_flow_item_ipv6 *spec = item->spec;
2358         const struct rte_flow_item_ipv6 nic_mask = {
2359                 .hdr = {
2360                         .src_addr =
2361                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2362                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2363                         .dst_addr =
2364                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
2365                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
2366                         .vtc_flow = RTE_BE32(0xffffffff),
2367                         .proto = 0xff,
2368                 },
2369         };
2370         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2371         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2372                                       MLX5_FLOW_LAYER_OUTER_L3;
2373         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2374                                       MLX5_FLOW_LAYER_OUTER_L4;
2375         int ret;
2376         uint8_t next_proto = 0xFF;
2377         const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2378                                   MLX5_FLOW_LAYER_OUTER_VLAN |
2379                                   MLX5_FLOW_LAYER_INNER_VLAN);
2380
2381         if ((last_item & l2_vlan) && ether_type &&
2382             ether_type != RTE_ETHER_TYPE_IPV6)
2383                 return rte_flow_error_set(error, EINVAL,
2384                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2385                                           "IPv6 cannot follow L2/VLAN layer "
2386                                           "which ether type is not IPv6");
2387         if (mask && mask->hdr.proto == UINT8_MAX && spec)
2388                 next_proto = spec->hdr.proto;
2389         if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2390                 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2391                         return rte_flow_error_set(error, EINVAL,
2392                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2393                                                   item,
2394                                                   "multiple tunnel "
2395                                                   "not supported");
2396         }
2397         if (next_proto == IPPROTO_HOPOPTS  ||
2398             next_proto == IPPROTO_ROUTING  ||
2399             next_proto == IPPROTO_FRAGMENT ||
2400             next_proto == IPPROTO_ESP      ||
2401             next_proto == IPPROTO_AH       ||
2402             next_proto == IPPROTO_DSTOPTS)
2403                 return rte_flow_error_set(error, EINVAL,
2404                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2405                                           "IPv6 proto (next header) should "
2406                                           "not be set as extension header");
2407         if (item_flags & MLX5_FLOW_LAYER_IPIP)
2408                 return rte_flow_error_set(error, EINVAL,
2409                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2410                                           "wrong tunnel type - IPv4 specified "
2411                                           "but IPv6 item provided");
2412         if (item_flags & l3m)
2413                 return rte_flow_error_set(error, ENOTSUP,
2414                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2415                                           "multiple L3 layers not supported");
2416         else if (item_flags & l4m)
2417                 return rte_flow_error_set(error, EINVAL,
2418                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2419                                           "L3 cannot follow an L4 layer.");
2420         else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2421                   !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2422                 return rte_flow_error_set(error, EINVAL,
2423                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2424                                           "L3 cannot follow an NVGRE layer.");
2425         if (!mask)
2426                 mask = &rte_flow_item_ipv6_mask;
2427         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2428                                         acc_mask ? (const uint8_t *)acc_mask
2429                                                  : (const uint8_t *)&nic_mask,
2430                                         sizeof(struct rte_flow_item_ipv6),
2431                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2432         if (ret < 0)
2433                 return ret;
2434         return 0;
2435 }
2436
2437 /**
2438  * Validate UDP item.
2439  *
2440  * @param[in] item
2441  *   Item specification.
2442  * @param[in] item_flags
2443  *   Bit-fields that holds the items detected until now.
2444  * @param[in] target_protocol
2445  *   The next protocol in the previous item.
2446  * @param[in] flow_mask
2447  *   mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2448  * @param[out] error
2449  *   Pointer to error structure.
2450  *
2451  * @return
2452  *   0 on success, a negative errno value otherwise and rte_errno is set.
2453  */
2454 int
2455 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2456                             uint64_t item_flags,
2457                             uint8_t target_protocol,
2458                             struct rte_flow_error *error)
2459 {
2460         const struct rte_flow_item_udp *mask = item->mask;
2461         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2462         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2463                                       MLX5_FLOW_LAYER_OUTER_L3;
2464         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2465                                       MLX5_FLOW_LAYER_OUTER_L4;
2466         int ret;
2467
2468         if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2469                 return rte_flow_error_set(error, EINVAL,
2470                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2471                                           "protocol filtering not compatible"
2472                                           " with UDP layer");
2473         if (!(item_flags & l3m))
2474                 return rte_flow_error_set(error, EINVAL,
2475                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2476                                           "L3 is mandatory to filter on L4");
2477         if (item_flags & l4m)
2478                 return rte_flow_error_set(error, EINVAL,
2479                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2480                                           "multiple L4 layers not supported");
2481         if (!mask)
2482                 mask = &rte_flow_item_udp_mask;
2483         ret = mlx5_flow_item_acceptable
2484                 (item, (const uint8_t *)mask,
2485                  (const uint8_t *)&rte_flow_item_udp_mask,
2486                  sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2487                  error);
2488         if (ret < 0)
2489                 return ret;
2490         return 0;
2491 }
2492
2493 /**
2494  * Validate TCP item.
2495  *
2496  * @param[in] item
2497  *   Item specification.
2498  * @param[in] item_flags
2499  *   Bit-fields that holds the items detected until now.
2500  * @param[in] target_protocol
2501  *   The next protocol in the previous item.
2502  * @param[out] error
2503  *   Pointer to error structure.
2504  *
2505  * @return
2506  *   0 on success, a negative errno value otherwise and rte_errno is set.
2507  */
2508 int
2509 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2510                             uint64_t item_flags,
2511                             uint8_t target_protocol,
2512                             const struct rte_flow_item_tcp *flow_mask,
2513                             struct rte_flow_error *error)
2514 {
2515         const struct rte_flow_item_tcp *mask = item->mask;
2516         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2517         const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2518                                       MLX5_FLOW_LAYER_OUTER_L3;
2519         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2520                                       MLX5_FLOW_LAYER_OUTER_L4;
2521         int ret;
2522
2523         MLX5_ASSERT(flow_mask);
2524         if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2525                 return rte_flow_error_set(error, EINVAL,
2526                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2527                                           "protocol filtering not compatible"
2528                                           " with TCP layer");
2529         if (!(item_flags & l3m))
2530                 return rte_flow_error_set(error, EINVAL,
2531                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2532                                           "L3 is mandatory to filter on L4");
2533         if (item_flags & l4m)
2534                 return rte_flow_error_set(error, EINVAL,
2535                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2536                                           "multiple L4 layers not supported");
2537         if (!mask)
2538                 mask = &rte_flow_item_tcp_mask;
2539         ret = mlx5_flow_item_acceptable
2540                 (item, (const uint8_t *)mask,
2541                  (const uint8_t *)flow_mask,
2542                  sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2543                  error);
2544         if (ret < 0)
2545                 return ret;
2546         return 0;
2547 }
2548
2549 /**
2550  * Validate VXLAN item.
2551  *
2552  * @param[in] dev
2553  *   Pointer to the Ethernet device structure.
2554  * @param[in] udp_dport
2555  *   UDP destination port
2556  * @param[in] item
2557  *   Item specification.
2558  * @param[in] item_flags
2559  *   Bit-fields that holds the items detected until now.
2560  * @param[in] attr
2561  *   Flow rule attributes.
2562  * @param[out] error
2563  *   Pointer to error structure.
2564  *
2565  * @return
2566  *   0 on success, a negative errno value otherwise and rte_errno is set.
2567  */
2568 int
2569 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev,
2570                               uint16_t udp_dport,
2571                               const struct rte_flow_item *item,
2572                               uint64_t item_flags,
2573                               const struct rte_flow_attr *attr,
2574                               struct rte_flow_error *error)
2575 {
2576         const struct rte_flow_item_vxlan *spec = item->spec;
2577         const struct rte_flow_item_vxlan *mask = item->mask;
2578         int ret;
2579         struct mlx5_priv *priv = dev->data->dev_private;
2580         union vni {
2581                 uint32_t vlan_id;
2582                 uint8_t vni[4];
2583         } id = { .vlan_id = 0, };
2584         const struct rte_flow_item_vxlan nic_mask = {
2585                 .vni = "\xff\xff\xff",
2586                 .rsvd1 = 0xff,
2587         };
2588         const struct rte_flow_item_vxlan *valid_mask;
2589
2590         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2591                 return rte_flow_error_set(error, ENOTSUP,
2592                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2593                                           "multiple tunnel layers not"
2594                                           " supported");
2595         valid_mask = &rte_flow_item_vxlan_mask;
2596         /*
2597          * Verify only UDPv4 is present as defined in
2598          * https://tools.ietf.org/html/rfc7348
2599          */
2600         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2601                 return rte_flow_error_set(error, EINVAL,
2602                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2603                                           "no outer UDP layer found");
2604         if (!mask)
2605                 mask = &rte_flow_item_vxlan_mask;
2606
2607         if (priv->sh->steering_format_version !=
2608             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 ||
2609             !udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN) {
2610                 /* FDB domain & NIC domain non-zero group */
2611                 if ((attr->transfer || attr->group) && priv->sh->misc5_cap)
2612                         valid_mask = &nic_mask;
2613                 /* Group zero in NIC domain */
2614                 if (!attr->group && !attr->transfer &&
2615                     priv->sh->tunnel_header_0_1)
2616                         valid_mask = &nic_mask;
2617         }
2618         ret = mlx5_flow_item_acceptable
2619                 (item, (const uint8_t *)mask,
2620                  (const uint8_t *)valid_mask,
2621                  sizeof(struct rte_flow_item_vxlan),
2622                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2623         if (ret < 0)
2624                 return ret;
2625         if (spec) {
2626                 memcpy(&id.vni[1], spec->vni, 3);
2627                 memcpy(&id.vni[1], mask->vni, 3);
2628         }
2629         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2630                 return rte_flow_error_set(error, ENOTSUP,
2631                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2632                                           "VXLAN tunnel must be fully defined");
2633         return 0;
2634 }
2635
2636 /**
2637  * Validate VXLAN_GPE item.
2638  *
2639  * @param[in] item
2640  *   Item specification.
2641  * @param[in] item_flags
2642  *   Bit-fields that holds the items detected until now.
2643  * @param[in] priv
2644  *   Pointer to the private data structure.
2645  * @param[in] target_protocol
2646  *   The next protocol in the previous item.
2647  * @param[out] error
2648  *   Pointer to error structure.
2649  *
2650  * @return
2651  *   0 on success, a negative errno value otherwise and rte_errno is set.
2652  */
2653 int
2654 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2655                                   uint64_t item_flags,
2656                                   struct rte_eth_dev *dev,
2657                                   struct rte_flow_error *error)
2658 {
2659         struct mlx5_priv *priv = dev->data->dev_private;
2660         const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2661         const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2662         int ret;
2663         union vni {
2664                 uint32_t vlan_id;
2665                 uint8_t vni[4];
2666         } id = { .vlan_id = 0, };
2667
2668         if (!priv->config.l3_vxlan_en)
2669                 return rte_flow_error_set(error, ENOTSUP,
2670                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2671                                           "L3 VXLAN is not enabled by device"
2672                                           " parameter and/or not configured in"
2673                                           " firmware");
2674         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2675                 return rte_flow_error_set(error, ENOTSUP,
2676                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2677                                           "multiple tunnel layers not"
2678                                           " supported");
2679         /*
2680          * Verify only UDPv4 is present as defined in
2681          * https://tools.ietf.org/html/rfc7348
2682          */
2683         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2684                 return rte_flow_error_set(error, EINVAL,
2685                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2686                                           "no outer UDP layer found");
2687         if (!mask)
2688                 mask = &rte_flow_item_vxlan_gpe_mask;
2689         ret = mlx5_flow_item_acceptable
2690                 (item, (const uint8_t *)mask,
2691                  (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2692                  sizeof(struct rte_flow_item_vxlan_gpe),
2693                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2694         if (ret < 0)
2695                 return ret;
2696         if (spec) {
2697                 if (spec->protocol)
2698                         return rte_flow_error_set(error, ENOTSUP,
2699                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2700                                                   item,
2701                                                   "VxLAN-GPE protocol"
2702                                                   " not supported");
2703                 memcpy(&id.vni[1], spec->vni, 3);
2704                 memcpy(&id.vni[1], mask->vni, 3);
2705         }
2706         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2707                 return rte_flow_error_set(error, ENOTSUP,
2708                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2709                                           "VXLAN-GPE tunnel must be fully"
2710                                           " defined");
2711         return 0;
2712 }
2713 /**
2714  * Validate GRE Key item.
2715  *
2716  * @param[in] item
2717  *   Item specification.
2718  * @param[in] item_flags
2719  *   Bit flags to mark detected items.
2720  * @param[in] gre_item
2721  *   Pointer to gre_item
2722  * @param[out] error
2723  *   Pointer to error structure.
2724  *
2725  * @return
2726  *   0 on success, a negative errno value otherwise and rte_errno is set.
2727  */
2728 int
2729 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2730                                 uint64_t item_flags,
2731                                 const struct rte_flow_item *gre_item,
2732                                 struct rte_flow_error *error)
2733 {
2734         const rte_be32_t *mask = item->mask;
2735         int ret = 0;
2736         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2737         const struct rte_flow_item_gre *gre_spec;
2738         const struct rte_flow_item_gre *gre_mask;
2739
2740         if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2741                 return rte_flow_error_set(error, ENOTSUP,
2742                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2743                                           "Multiple GRE key not support");
2744         if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2745                 return rte_flow_error_set(error, ENOTSUP,
2746                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2747                                           "No preceding GRE header");
2748         if (item_flags & MLX5_FLOW_LAYER_INNER)
2749                 return rte_flow_error_set(error, ENOTSUP,
2750                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2751                                           "GRE key following a wrong item");
2752         gre_mask = gre_item->mask;
2753         if (!gre_mask)
2754                 gre_mask = &rte_flow_item_gre_mask;
2755         gre_spec = gre_item->spec;
2756         if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2757                          !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2758                 return rte_flow_error_set(error, EINVAL,
2759                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2760                                           "Key bit must be on");
2761
2762         if (!mask)
2763                 mask = &gre_key_default_mask;
2764         ret = mlx5_flow_item_acceptable
2765                 (item, (const uint8_t *)mask,
2766                  (const uint8_t *)&gre_key_default_mask,
2767                  sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2768         return ret;
2769 }
2770
2771 /**
2772  * Validate GRE item.
2773  *
2774  * @param[in] item
2775  *   Item specification.
2776  * @param[in] item_flags
2777  *   Bit flags to mark detected items.
2778  * @param[in] target_protocol
2779  *   The next protocol in the previous item.
2780  * @param[out] error
2781  *   Pointer to error structure.
2782  *
2783  * @return
2784  *   0 on success, a negative errno value otherwise and rte_errno is set.
2785  */
2786 int
2787 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2788                             uint64_t item_flags,
2789                             uint8_t target_protocol,
2790                             struct rte_flow_error *error)
2791 {
2792         const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2793         const struct rte_flow_item_gre *mask = item->mask;
2794         int ret;
2795         const struct rte_flow_item_gre nic_mask = {
2796                 .c_rsvd0_ver = RTE_BE16(0xB000),
2797                 .protocol = RTE_BE16(UINT16_MAX),
2798         };
2799
2800         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2801                 return rte_flow_error_set(error, EINVAL,
2802                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2803                                           "protocol filtering not compatible"
2804                                           " with this GRE layer");
2805         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2806                 return rte_flow_error_set(error, ENOTSUP,
2807                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2808                                           "multiple tunnel layers not"
2809                                           " supported");
2810         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2811                 return rte_flow_error_set(error, ENOTSUP,
2812                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2813                                           "L3 Layer is missing");
2814         if (!mask)
2815                 mask = &rte_flow_item_gre_mask;
2816         ret = mlx5_flow_item_acceptable
2817                 (item, (const uint8_t *)mask,
2818                  (const uint8_t *)&nic_mask,
2819                  sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2820                  error);
2821         if (ret < 0)
2822                 return ret;
2823 #ifndef HAVE_MLX5DV_DR
2824 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2825         if (spec && (spec->protocol & mask->protocol))
2826                 return rte_flow_error_set(error, ENOTSUP,
2827                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2828                                           "without MPLS support the"
2829                                           " specification cannot be used for"
2830                                           " filtering");
2831 #endif
2832 #endif
2833         return 0;
2834 }
2835
2836 /**
2837  * Validate Geneve item.
2838  *
2839  * @param[in] item
2840  *   Item specification.
2841  * @param[in] itemFlags
2842  *   Bit-fields that holds the items detected until now.
2843  * @param[in] enPriv
2844  *   Pointer to the private data structure.
2845  * @param[out] error
2846  *   Pointer to error structure.
2847  *
2848  * @return
2849  *   0 on success, a negative errno value otherwise and rte_errno is set.
2850  */
2851
2852 int
2853 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2854                                uint64_t item_flags,
2855                                struct rte_eth_dev *dev,
2856                                struct rte_flow_error *error)
2857 {
2858         struct mlx5_priv *priv = dev->data->dev_private;
2859         const struct rte_flow_item_geneve *spec = item->spec;
2860         const struct rte_flow_item_geneve *mask = item->mask;
2861         int ret;
2862         uint16_t gbhdr;
2863         uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2864                           MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2865         const struct rte_flow_item_geneve nic_mask = {
2866                 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2867                 .vni = "\xff\xff\xff",
2868                 .protocol = RTE_BE16(UINT16_MAX),
2869         };
2870
2871         if (!priv->config.hca_attr.tunnel_stateless_geneve_rx)
2872                 return rte_flow_error_set(error, ENOTSUP,
2873                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2874                                           "L3 Geneve is not enabled by device"
2875                                           " parameter and/or not configured in"
2876                                           " firmware");
2877         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2878                 return rte_flow_error_set(error, ENOTSUP,
2879                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2880                                           "multiple tunnel layers not"
2881                                           " supported");
2882         /*
2883          * Verify only UDPv4 is present as defined in
2884          * https://tools.ietf.org/html/rfc7348
2885          */
2886         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2887                 return rte_flow_error_set(error, EINVAL,
2888                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2889                                           "no outer UDP layer found");
2890         if (!mask)
2891                 mask = &rte_flow_item_geneve_mask;
2892         ret = mlx5_flow_item_acceptable
2893                                   (item, (const uint8_t *)mask,
2894                                    (const uint8_t *)&nic_mask,
2895                                    sizeof(struct rte_flow_item_geneve),
2896                                    MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2897         if (ret)
2898                 return ret;
2899         if (spec) {
2900                 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2901                 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2902                      MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2903                      MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2904                         return rte_flow_error_set(error, ENOTSUP,
2905                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2906                                                   item,
2907                                                   "Geneve protocol unsupported"
2908                                                   " fields are being used");
2909                 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2910                         return rte_flow_error_set
2911                                         (error, ENOTSUP,
2912                                          RTE_FLOW_ERROR_TYPE_ITEM,
2913                                          item,
2914                                          "Unsupported Geneve options length");
2915         }
2916         if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2917                 return rte_flow_error_set
2918                                     (error, ENOTSUP,
2919                                      RTE_FLOW_ERROR_TYPE_ITEM, item,
2920                                      "Geneve tunnel must be fully defined");
2921         return 0;
2922 }
2923
2924 /**
2925  * Validate Geneve TLV option item.
2926  *
2927  * @param[in] item
2928  *   Item specification.
2929  * @param[in] last_item
2930  *   Previous validated item in the pattern items.
2931  * @param[in] geneve_item
2932  *   Previous GENEVE item specification.
2933  * @param[in] dev
2934  *   Pointer to the rte_eth_dev structure.
2935  * @param[out] error
2936  *   Pointer to error structure.
2937  *
2938  * @return
2939  *   0 on success, a negative errno value otherwise and rte_errno is set.
2940  */
2941 int
2942 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
2943                                    uint64_t last_item,
2944                                    const struct rte_flow_item *geneve_item,
2945                                    struct rte_eth_dev *dev,
2946                                    struct rte_flow_error *error)
2947 {
2948         struct mlx5_priv *priv = dev->data->dev_private;
2949         struct mlx5_dev_ctx_shared *sh = priv->sh;
2950         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
2951         struct mlx5_hca_attr *hca_attr = &priv->config.hca_attr;
2952         uint8_t data_max_supported =
2953                         hca_attr->max_geneve_tlv_option_data_len * 4;
2954         struct mlx5_dev_config *config = &priv->config;
2955         const struct rte_flow_item_geneve *geneve_spec;
2956         const struct rte_flow_item_geneve *geneve_mask;
2957         const struct rte_flow_item_geneve_opt *spec = item->spec;
2958         const struct rte_flow_item_geneve_opt *mask = item->mask;
2959         unsigned int i;
2960         unsigned int data_len;
2961         uint8_t tlv_option_len;
2962         uint16_t optlen_m, optlen_v;
2963         const struct rte_flow_item_geneve_opt full_mask = {
2964                 .option_class = RTE_BE16(0xffff),
2965                 .option_type = 0xff,
2966                 .option_len = 0x1f,
2967         };
2968
2969         if (!mask)
2970                 mask = &rte_flow_item_geneve_opt_mask;
2971         if (!spec)
2972                 return rte_flow_error_set
2973                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2974                         "Geneve TLV opt class/type/length must be specified");
2975         if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
2976                 return rte_flow_error_set
2977                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2978                         "Geneve TLV opt length exceeeds the limit (31)");
2979         /* Check if class type and length masks are full. */
2980         if (full_mask.option_class != mask->option_class ||
2981             full_mask.option_type != mask->option_type ||
2982             full_mask.option_len != (mask->option_len & full_mask.option_len))
2983                 return rte_flow_error_set
2984                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2985                         "Geneve TLV opt class/type/length masks must be full");
2986         /* Check if length is supported */
2987         if ((uint32_t)spec->option_len >
2988                         config->hca_attr.max_geneve_tlv_option_data_len)
2989                 return rte_flow_error_set
2990                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2991                         "Geneve TLV opt length not supported");
2992         if (config->hca_attr.max_geneve_tlv_options > 1)
2993                 DRV_LOG(DEBUG,
2994                         "max_geneve_tlv_options supports more than 1 option");
2995         /* Check GENEVE item preceding. */
2996         if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
2997                 return rte_flow_error_set
2998                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2999                         "Geneve opt item must be preceded with Geneve item");
3000         geneve_spec = geneve_item->spec;
3001         geneve_mask = geneve_item->mask ? geneve_item->mask :
3002                                           &rte_flow_item_geneve_mask;
3003         /* Check if GENEVE TLV option size doesn't exceed option length */
3004         if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
3005                             geneve_spec->ver_opt_len_o_c_rsvd0)) {
3006                 tlv_option_len = spec->option_len & mask->option_len;
3007                 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
3008                 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
3009                 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
3010                 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
3011                 if ((optlen_v & optlen_m) <= tlv_option_len)
3012                         return rte_flow_error_set
3013                                 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3014                                  "GENEVE TLV option length exceeds optlen");
3015         }
3016         /* Check if length is 0 or data is 0. */
3017         if (spec->data == NULL || spec->option_len == 0)
3018                 return rte_flow_error_set
3019                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3020                         "Geneve TLV opt with zero data/length not supported");
3021         /* Check not all data & mask are 0. */
3022         data_len = spec->option_len * 4;
3023         if (mask->data == NULL) {
3024                 for (i = 0; i < data_len; i++)
3025                         if (spec->data[i])
3026                                 break;
3027                 if (i == data_len)
3028                         return rte_flow_error_set(error, ENOTSUP,
3029                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3030                                 "Can't match on Geneve option data 0");
3031         } else {
3032                 for (i = 0; i < data_len; i++)
3033                         if (spec->data[i] & mask->data[i])
3034                                 break;
3035                 if (i == data_len)
3036                         return rte_flow_error_set(error, ENOTSUP,
3037                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3038                                 "Can't match on Geneve option data and mask 0");
3039                 /* Check data mask supported. */
3040                 for (i = data_max_supported; i < data_len ; i++)
3041                         if (mask->data[i])
3042                                 return rte_flow_error_set(error, ENOTSUP,
3043                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
3044                                         "Data mask is of unsupported size");
3045         }
3046         /* Check GENEVE option is supported in NIC. */
3047         if (!config->hca_attr.geneve_tlv_opt)
3048                 return rte_flow_error_set
3049                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3050                         "Geneve TLV opt not supported");
3051         /* Check if we already have geneve option with different type/class. */
3052         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
3053         geneve_opt_resource = sh->geneve_tlv_option_resource;
3054         if (geneve_opt_resource != NULL)
3055                 if (geneve_opt_resource->option_class != spec->option_class ||
3056                     geneve_opt_resource->option_type != spec->option_type ||
3057                     geneve_opt_resource->length != spec->option_len) {
3058                         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3059                         return rte_flow_error_set(error, ENOTSUP,
3060                                 RTE_FLOW_ERROR_TYPE_ITEM, item,
3061                                 "Only one Geneve TLV option supported");
3062                 }
3063         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3064         return 0;
3065 }
3066
3067 /**
3068  * Validate MPLS item.
3069  *
3070  * @param[in] dev
3071  *   Pointer to the rte_eth_dev structure.
3072  * @param[in] item
3073  *   Item specification.
3074  * @param[in] item_flags
3075  *   Bit-fields that holds the items detected until now.
3076  * @param[in] prev_layer
3077  *   The protocol layer indicated in previous item.
3078  * @param[out] error
3079  *   Pointer to error structure.
3080  *
3081  * @return
3082  *   0 on success, a negative errno value otherwise and rte_errno is set.
3083  */
3084 int
3085 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
3086                              const struct rte_flow_item *item __rte_unused,
3087                              uint64_t item_flags __rte_unused,
3088                              uint64_t prev_layer __rte_unused,
3089                              struct rte_flow_error *error)
3090 {
3091 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
3092         const struct rte_flow_item_mpls *mask = item->mask;
3093         struct mlx5_priv *priv = dev->data->dev_private;
3094         int ret;
3095
3096         if (!priv->config.mpls_en)
3097                 return rte_flow_error_set(error, ENOTSUP,
3098                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3099                                           "MPLS not supported or"
3100                                           " disabled in firmware"
3101                                           " configuration.");
3102         /* MPLS over UDP, GRE is allowed */
3103         if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |
3104                             MLX5_FLOW_LAYER_GRE |
3105                             MLX5_FLOW_LAYER_GRE_KEY)))
3106                 return rte_flow_error_set(error, EINVAL,
3107                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3108                                           "protocol filtering not compatible"
3109                                           " with MPLS layer");
3110         /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
3111         if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
3112             !(item_flags & MLX5_FLOW_LAYER_GRE))
3113                 return rte_flow_error_set(error, ENOTSUP,
3114                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3115                                           "multiple tunnel layers not"
3116                                           " supported");
3117         if (!mask)
3118                 mask = &rte_flow_item_mpls_mask;
3119         ret = mlx5_flow_item_acceptable
3120                 (item, (const uint8_t *)mask,
3121                  (const uint8_t *)&rte_flow_item_mpls_mask,
3122                  sizeof(struct rte_flow_item_mpls),
3123                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3124         if (ret < 0)
3125                 return ret;
3126         return 0;
3127 #else
3128         return rte_flow_error_set(error, ENOTSUP,
3129                                   RTE_FLOW_ERROR_TYPE_ITEM, item,
3130                                   "MPLS is not supported by Verbs, please"
3131                                   " update.");
3132 #endif
3133 }
3134
3135 /**
3136  * Validate NVGRE item.
3137  *
3138  * @param[in] item
3139  *   Item specification.
3140  * @param[in] item_flags
3141  *   Bit flags to mark detected items.
3142  * @param[in] target_protocol
3143  *   The next protocol in the previous item.
3144  * @param[out] error
3145  *   Pointer to error structure.
3146  *
3147  * @return
3148  *   0 on success, a negative errno value otherwise and rte_errno is set.
3149  */
3150 int
3151 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
3152                               uint64_t item_flags,
3153                               uint8_t target_protocol,
3154                               struct rte_flow_error *error)
3155 {
3156         const struct rte_flow_item_nvgre *mask = item->mask;
3157         int ret;
3158
3159         if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3160                 return rte_flow_error_set(error, EINVAL,
3161                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3162                                           "protocol filtering not compatible"
3163                                           " with this GRE layer");
3164         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3165                 return rte_flow_error_set(error, ENOTSUP,
3166                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3167                                           "multiple tunnel layers not"
3168                                           " supported");
3169         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3170                 return rte_flow_error_set(error, ENOTSUP,
3171                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3172                                           "L3 Layer is missing");
3173         if (!mask)
3174                 mask = &rte_flow_item_nvgre_mask;
3175         ret = mlx5_flow_item_acceptable
3176                 (item, (const uint8_t *)mask,
3177                  (const uint8_t *)&rte_flow_item_nvgre_mask,
3178                  sizeof(struct rte_flow_item_nvgre),
3179                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3180         if (ret < 0)
3181                 return ret;
3182         return 0;
3183 }
3184
3185 /**
3186  * Validate eCPRI item.
3187  *
3188  * @param[in] item
3189  *   Item specification.
3190  * @param[in] item_flags
3191  *   Bit-fields that holds the items detected until now.
3192  * @param[in] last_item
3193  *   Previous validated item in the pattern items.
3194  * @param[in] ether_type
3195  *   Type in the ethernet layer header (including dot1q).
3196  * @param[in] acc_mask
3197  *   Acceptable mask, if NULL default internal default mask
3198  *   will be used to check whether item fields are supported.
3199  * @param[out] error
3200  *   Pointer to error structure.
3201  *
3202  * @return
3203  *   0 on success, a negative errno value otherwise and rte_errno is set.
3204  */
3205 int
3206 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
3207                               uint64_t item_flags,
3208                               uint64_t last_item,
3209                               uint16_t ether_type,
3210                               const struct rte_flow_item_ecpri *acc_mask,
3211                               struct rte_flow_error *error)
3212 {
3213         const struct rte_flow_item_ecpri *mask = item->mask;
3214         const struct rte_flow_item_ecpri nic_mask = {
3215                 .hdr = {
3216                         .common = {
3217                                 .u32 =
3218                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
3219                                         .type = 0xFF,
3220                                         }).u32),
3221                         },
3222                         .dummy[0] = 0xFFFFFFFF,
3223                 },
3224         };
3225         const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
3226                                         MLX5_FLOW_LAYER_OUTER_VLAN);
3227         struct rte_flow_item_ecpri mask_lo;
3228
3229         if (!(last_item & outer_l2_vlan) &&
3230             last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
3231                 return rte_flow_error_set(error, EINVAL,
3232                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3233                                           "eCPRI can only follow L2/VLAN layer or UDP layer");
3234         if ((last_item & outer_l2_vlan) && ether_type &&
3235             ether_type != RTE_ETHER_TYPE_ECPRI)
3236                 return rte_flow_error_set(error, EINVAL,
3237                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3238                                           "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
3239         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3240                 return rte_flow_error_set(error, EINVAL,
3241                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3242                                           "eCPRI with tunnel is not supported right now");
3243         if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3244                 return rte_flow_error_set(error, ENOTSUP,
3245                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3246                                           "multiple L3 layers not supported");
3247         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3248                 return rte_flow_error_set(error, EINVAL,
3249                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3250                                           "eCPRI cannot coexist with a TCP layer");
3251         /* In specification, eCPRI could be over UDP layer. */
3252         else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3253                 return rte_flow_error_set(error, EINVAL,
3254                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
3255                                           "eCPRI over UDP layer is not yet supported right now");
3256         /* Mask for type field in common header could be zero. */
3257         if (!mask)
3258                 mask = &rte_flow_item_ecpri_mask;
3259         mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3260         /* Input mask is in big-endian format. */
3261         if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3262                 return rte_flow_error_set(error, EINVAL,
3263                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3264                                           "partial mask is not supported for protocol");
3265         else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3266                 return rte_flow_error_set(error, EINVAL,
3267                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3268                                           "message header mask must be after a type mask");
3269         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3270                                          acc_mask ? (const uint8_t *)acc_mask
3271                                                   : (const uint8_t *)&nic_mask,
3272                                          sizeof(struct rte_flow_item_ecpri),
3273                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3274 }
3275
3276 static int
3277 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3278                    const struct rte_flow_attr *attr __rte_unused,
3279                    const struct rte_flow_item items[] __rte_unused,
3280                    const struct rte_flow_action actions[] __rte_unused,
3281                    bool external __rte_unused,
3282                    int hairpin __rte_unused,
3283                    struct rte_flow_error *error)
3284 {
3285         return rte_flow_error_set(error, ENOTSUP,
3286                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3287 }
3288
3289 static struct mlx5_flow *
3290 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3291                   const struct rte_flow_attr *attr __rte_unused,
3292                   const struct rte_flow_item items[] __rte_unused,
3293                   const struct rte_flow_action actions[] __rte_unused,
3294                   struct rte_flow_error *error)
3295 {
3296         rte_flow_error_set(error, ENOTSUP,
3297                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3298         return NULL;
3299 }
3300
3301 static int
3302 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3303                     struct mlx5_flow *dev_flow __rte_unused,
3304                     const struct rte_flow_attr *attr __rte_unused,
3305                     const struct rte_flow_item items[] __rte_unused,
3306                     const struct rte_flow_action actions[] __rte_unused,
3307                     struct rte_flow_error *error)
3308 {
3309         return rte_flow_error_set(error, ENOTSUP,
3310                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3311 }
3312
3313 static int
3314 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3315                 struct rte_flow *flow __rte_unused,
3316                 struct rte_flow_error *error)
3317 {
3318         return rte_flow_error_set(error, ENOTSUP,
3319                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3320 }
3321
3322 static void
3323 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3324                  struct rte_flow *flow __rte_unused)
3325 {
3326 }
3327
3328 static void
3329 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3330                   struct rte_flow *flow __rte_unused)
3331 {
3332 }
3333
3334 static int
3335 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3336                 struct rte_flow *flow __rte_unused,
3337                 const struct rte_flow_action *actions __rte_unused,
3338                 void *data __rte_unused,
3339                 struct rte_flow_error *error)
3340 {
3341         return rte_flow_error_set(error, ENOTSUP,
3342                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3343 }
3344
3345 static int
3346 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3347                       uint32_t domains __rte_unused,
3348                       uint32_t flags __rte_unused)
3349 {
3350         return 0;
3351 }
3352
3353 /* Void driver to protect from null pointer reference. */
3354 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3355         .validate = flow_null_validate,
3356         .prepare = flow_null_prepare,
3357         .translate = flow_null_translate,
3358         .apply = flow_null_apply,
3359         .remove = flow_null_remove,
3360         .destroy = flow_null_destroy,
3361         .query = flow_null_query,
3362         .sync_domain = flow_null_sync_domain,
3363 };
3364
3365 /**
3366  * Select flow driver type according to flow attributes and device
3367  * configuration.
3368  *
3369  * @param[in] dev
3370  *   Pointer to the dev structure.
3371  * @param[in] attr
3372  *   Pointer to the flow attributes.
3373  *
3374  * @return
3375  *   flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3376  */
3377 static enum mlx5_flow_drv_type
3378 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3379 {
3380         struct mlx5_priv *priv = dev->data->dev_private;
3381         /* The OS can determine first a specific flow type (DV, VERBS) */
3382         enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3383
3384         if (type != MLX5_FLOW_TYPE_MAX)
3385                 return type;
3386         /* If no OS specific type - continue with DV/VERBS selection */
3387         if (attr->transfer && priv->config.dv_esw_en)
3388                 type = MLX5_FLOW_TYPE_DV;
3389         if (!attr->transfer)
3390                 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3391                                                  MLX5_FLOW_TYPE_VERBS;
3392         return type;
3393 }
3394
3395 #define flow_get_drv_ops(type) flow_drv_ops[type]
3396
3397 /**
3398  * Flow driver validation API. This abstracts calling driver specific functions.
3399  * The type of flow driver is determined according to flow attributes.
3400  *
3401  * @param[in] dev
3402  *   Pointer to the dev structure.
3403  * @param[in] attr
3404  *   Pointer to the flow attributes.
3405  * @param[in] items
3406  *   Pointer to the list of items.
3407  * @param[in] actions
3408  *   Pointer to the list of actions.
3409  * @param[in] external
3410  *   This flow rule is created by request external to PMD.
3411  * @param[in] hairpin
3412  *   Number of hairpin TX actions, 0 means classic flow.
3413  * @param[out] error
3414  *   Pointer to the error structure.
3415  *
3416  * @return
3417  *   0 on success, a negative errno value otherwise and rte_errno is set.
3418  */
3419 static inline int
3420 flow_drv_validate(struct rte_eth_dev *dev,
3421                   const struct rte_flow_attr *attr,
3422                   const struct rte_flow_item items[],
3423                   const struct rte_flow_action actions[],
3424                   bool external, int hairpin, struct rte_flow_error *error)
3425 {
3426         const struct mlx5_flow_driver_ops *fops;
3427         enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3428
3429         fops = flow_get_drv_ops(type);
3430         return fops->validate(dev, attr, items, actions, external,
3431                               hairpin, error);
3432 }
3433
3434 /**
3435  * Flow driver preparation API. This abstracts calling driver specific
3436  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3437  * calculates the size of memory required for device flow, allocates the memory,
3438  * initializes the device flow and returns the pointer.
3439  *
3440  * @note
3441  *   This function initializes device flow structure such as dv or verbs in
3442  *   struct mlx5_flow. However, it is caller's responsibility to initialize the
3443  *   rest. For example, adding returning device flow to flow->dev_flow list and
3444  *   setting backward reference to the flow should be done out of this function.
3445  *   layers field is not filled either.
3446  *
3447  * @param[in] dev
3448  *   Pointer to the dev structure.
3449  * @param[in] attr
3450  *   Pointer to the flow attributes.
3451  * @param[in] items
3452  *   Pointer to the list of items.
3453  * @param[in] actions
3454  *   Pointer to the list of actions.
3455  * @param[in] flow_idx
3456  *   This memory pool index to the flow.
3457  * @param[out] error
3458  *   Pointer to the error structure.
3459  *
3460  * @return
3461  *   Pointer to device flow on success, otherwise NULL and rte_errno is set.
3462  */
3463 static inline struct mlx5_flow *
3464 flow_drv_prepare(struct rte_eth_dev *dev,
3465                  const struct rte_flow *flow,
3466                  const struct rte_flow_attr *attr,
3467                  const struct rte_flow_item items[],
3468                  const struct rte_flow_action actions[],
3469                  uint32_t flow_idx,
3470                  struct rte_flow_error *error)
3471 {
3472         const struct mlx5_flow_driver_ops *fops;
3473         enum mlx5_flow_drv_type type = flow->drv_type;
3474         struct mlx5_flow *mlx5_flow = NULL;
3475
3476         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3477         fops = flow_get_drv_ops(type);
3478         mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3479         if (mlx5_flow)
3480                 mlx5_flow->flow_idx = flow_idx;
3481         return mlx5_flow;
3482 }
3483
3484 /**
3485  * Flow driver translation API. This abstracts calling driver specific
3486  * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3487  * translates a generic flow into a driver flow. flow_drv_prepare() must
3488  * precede.
3489  *
3490  * @note
3491  *   dev_flow->layers could be filled as a result of parsing during translation
3492  *   if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3493  *   if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3494  *   flow->actions could be overwritten even though all the expanded dev_flows
3495  *   have the same actions.
3496  *
3497  * @param[in] dev
3498  *   Pointer to the rte dev structure.
3499  * @param[in, out] dev_flow
3500  *   Pointer to the mlx5 flow.
3501  * @param[in] attr
3502  *   Pointer to the flow attributes.
3503  * @param[in] items
3504  *   Pointer to the list of items.
3505  * @param[in] actions
3506  *   Pointer to the list of actions.
3507  * @param[out] error
3508  *   Pointer to the error structure.
3509  *
3510  * @return
3511  *   0 on success, a negative errno value otherwise and rte_errno is set.
3512  */
3513 static inline int
3514 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3515                    const struct rte_flow_attr *attr,
3516                    const struct rte_flow_item items[],
3517                    const struct rte_flow_action actions[],
3518                    struct rte_flow_error *error)
3519 {
3520         const struct mlx5_flow_driver_ops *fops;
3521         enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3522
3523         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3524         fops = flow_get_drv_ops(type);
3525         return fops->translate(dev, dev_flow, attr, items, actions, error);
3526 }
3527
3528 /**
3529  * Flow driver apply API. This abstracts calling driver specific functions.
3530  * Parent flow (rte_flow) should have driver type (drv_type). It applies
3531  * translated driver flows on to device. flow_drv_translate() must precede.
3532  *
3533  * @param[in] dev
3534  *   Pointer to Ethernet device structure.
3535  * @param[in, out] flow
3536  *   Pointer to flow structure.
3537  * @param[out] error
3538  *   Pointer to error structure.
3539  *
3540  * @return
3541  *   0 on success, a negative errno value otherwise and rte_errno is set.
3542  */
3543 static inline int
3544 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3545                struct rte_flow_error *error)
3546 {
3547         const struct mlx5_flow_driver_ops *fops;
3548         enum mlx5_flow_drv_type type = flow->drv_type;
3549
3550         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3551         fops = flow_get_drv_ops(type);
3552         return fops->apply(dev, flow, error);
3553 }
3554
3555 /**
3556  * Flow driver destroy API. This abstracts calling driver specific functions.
3557  * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3558  * on device and releases resources of the flow.
3559  *
3560  * @param[in] dev
3561  *   Pointer to Ethernet device.
3562  * @param[in, out] flow
3563  *   Pointer to flow structure.
3564  */
3565 static inline void
3566 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3567 {
3568         const struct mlx5_flow_driver_ops *fops;
3569         enum mlx5_flow_drv_type type = flow->drv_type;
3570
3571         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3572         fops = flow_get_drv_ops(type);
3573         fops->destroy(dev, flow);
3574 }
3575
3576 /**
3577  * Flow driver find RSS policy tbl API. This abstracts calling driver
3578  * specific functions. Parent flow (rte_flow) should have driver
3579  * type (drv_type). It will find the RSS policy table that has the rss_desc.
3580  *
3581  * @param[in] dev
3582  *   Pointer to Ethernet device.
3583  * @param[in, out] flow
3584  *   Pointer to flow structure.
3585  * @param[in] policy
3586  *   Pointer to meter policy table.
3587  * @param[in] rss_desc
3588  *   Pointer to rss_desc
3589  */
3590 static struct mlx5_flow_meter_sub_policy *
3591 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3592                 struct rte_flow *flow,
3593                 struct mlx5_flow_meter_policy *policy,
3594                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3595 {
3596         const struct mlx5_flow_driver_ops *fops;
3597         enum mlx5_flow_drv_type type = flow->drv_type;
3598
3599         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3600         fops = flow_get_drv_ops(type);
3601         return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3602 }
3603
3604 /**
3605  * Flow driver color tag rule API. This abstracts calling driver
3606  * specific functions. Parent flow (rte_flow) should have driver
3607  * type (drv_type). It will create the color tag rules in hierarchy meter.
3608  *
3609  * @param[in] dev
3610  *   Pointer to Ethernet device.
3611  * @param[in, out] flow
3612  *   Pointer to flow structure.
3613  * @param[in] fm
3614  *   Pointer to flow meter structure.
3615  * @param[in] src_port
3616  *   The src port this extra rule should use.
3617  * @param[in] item
3618  *   The src port id match item.
3619  * @param[out] error
3620  *   Pointer to error structure.
3621  */
3622 static int
3623 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev,
3624                 struct rte_flow *flow,
3625                 struct mlx5_flow_meter_info *fm,
3626                 int32_t src_port,
3627                 const struct rte_flow_item *item,
3628                 struct rte_flow_error *error)
3629 {
3630         const struct mlx5_flow_driver_ops *fops;
3631         enum mlx5_flow_drv_type type = flow->drv_type;
3632
3633         MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3634         fops = flow_get_drv_ops(type);
3635         return fops->meter_hierarchy_rule_create(dev, fm,
3636                                                 src_port, item, error);
3637 }
3638
3639 /**
3640  * Get RSS action from the action list.
3641  *
3642  * @param[in] dev
3643  *   Pointer to Ethernet device.
3644  * @param[in] actions
3645  *   Pointer to the list of actions.
3646  * @param[in] flow
3647  *   Parent flow structure pointer.
3648  *
3649  * @return
3650  *   Pointer to the RSS action if exist, else return NULL.
3651  */
3652 static const struct rte_flow_action_rss*
3653 flow_get_rss_action(struct rte_eth_dev *dev,
3654                     const struct rte_flow_action actions[])
3655 {
3656         struct mlx5_priv *priv = dev->data->dev_private;
3657         const struct rte_flow_action_rss *rss = NULL;
3658         struct mlx5_meter_policy_action_container *acg;
3659         struct mlx5_meter_policy_action_container *acy;
3660
3661         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3662                 switch (actions->type) {
3663                 case RTE_FLOW_ACTION_TYPE_RSS:
3664                         rss = actions->conf;
3665                         break;
3666                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3667                 {
3668                         const struct rte_flow_action_sample *sample =
3669                                                                 actions->conf;
3670                         const struct rte_flow_action *act = sample->actions;
3671                         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3672                                 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3673                                         rss = act->conf;
3674                         break;
3675                 }
3676                 case RTE_FLOW_ACTION_TYPE_METER:
3677                 {
3678                         uint32_t mtr_idx;
3679                         struct mlx5_flow_meter_info *fm;
3680                         struct mlx5_flow_meter_policy *policy;
3681                         const struct rte_flow_action_meter *mtr = actions->conf;
3682
3683                         fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3684                         if (fm && !fm->def_policy) {
3685                                 policy = mlx5_flow_meter_policy_find(dev,
3686                                                 fm->policy_id, NULL);
3687                                 MLX5_ASSERT(policy);
3688                                 if (policy->is_hierarchy) {
3689                                         policy =
3690                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
3691                                                                         policy);
3692                                         if (!policy)
3693                                                 return NULL;
3694                                 }
3695                                 if (policy->is_rss) {
3696                                         acg =
3697                                         &policy->act_cnt[RTE_COLOR_GREEN];
3698                                         acy =
3699                                         &policy->act_cnt[RTE_COLOR_YELLOW];
3700                                         if (acg->fate_action ==
3701                                             MLX5_FLOW_FATE_SHARED_RSS)
3702                                                 rss = acg->rss->conf;
3703                                         else if (acy->fate_action ==
3704                                                  MLX5_FLOW_FATE_SHARED_RSS)
3705                                                 rss = acy->rss->conf;
3706                                 }
3707                         }
3708                         break;
3709                 }
3710                 default:
3711                         break;
3712                 }
3713         }
3714         return rss;
3715 }
3716
3717 /**
3718  * Get ASO age action by index.
3719  *
3720  * @param[in] dev
3721  *   Pointer to the Ethernet device structure.
3722  * @param[in] age_idx
3723  *   Index to the ASO age action.
3724  *
3725  * @return
3726  *   The specified ASO age action.
3727  */
3728 struct mlx5_aso_age_action*
3729 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3730 {
3731         uint16_t pool_idx = age_idx & UINT16_MAX;
3732         uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3733         struct mlx5_priv *priv = dev->data->dev_private;
3734         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3735         struct mlx5_aso_age_pool *pool;
3736
3737         rte_rwlock_read_lock(&mng->resize_rwl);
3738         pool = mng->pools[pool_idx];
3739         rte_rwlock_read_unlock(&mng->resize_rwl);
3740         return &pool->actions[offset - 1];
3741 }
3742
3743 /* maps indirect action to translated direct in some actions array */
3744 struct mlx5_translated_action_handle {
3745         struct rte_flow_action_handle *action; /**< Indirect action handle. */
3746         int index; /**< Index in related array of rte_flow_action. */
3747 };
3748
3749 /**
3750  * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
3751  * direct action if translation possible.
3752  * This functionality used to run same execution path for both direct and
3753  * indirect actions on flow create. All necessary preparations for indirect
3754  * action handling should be performed on *handle* actions list returned
3755  * from this call.
3756  *
3757  * @param[in] dev
3758  *   Pointer to Ethernet device.
3759  * @param[in] actions
3760  *   List of actions to translate.
3761  * @param[out] handle
3762  *   List to store translated indirect action object handles.
3763  * @param[in, out] indir_n
3764  *   Size of *handle* array. On return should be updated with number of
3765  *   indirect actions retrieved from the *actions* list.
3766  * @param[out] translated_actions
3767  *   List of actions where all indirect actions were translated to direct
3768  *   if possible. NULL if no translation took place.
3769  * @param[out] error
3770  *   Pointer to the error structure.
3771  *
3772  * @return
3773  *   0 on success, a negative errno value otherwise and rte_errno is set.
3774  */
3775 static int
3776 flow_action_handles_translate(struct rte_eth_dev *dev,
3777                               const struct rte_flow_action actions[],
3778                               struct mlx5_translated_action_handle *handle,
3779                               int *indir_n,
3780                               struct rte_flow_action **translated_actions,
3781                               struct rte_flow_error *error)
3782 {
3783         struct mlx5_priv *priv = dev->data->dev_private;
3784         struct rte_flow_action *translated = NULL;
3785         size_t actions_size;
3786         int n;
3787         int copied_n = 0;
3788         struct mlx5_translated_action_handle *handle_end = NULL;
3789
3790         for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3791                 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
3792                         continue;
3793                 if (copied_n == *indir_n) {
3794                         return rte_flow_error_set
3795                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3796                                  NULL, "too many shared actions");
3797                 }
3798                 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
3799                            sizeof(actions[n].conf));
3800                 handle[copied_n].index = n;
3801                 copied_n++;
3802         }
3803         n++;
3804         *indir_n = copied_n;
3805         if (!copied_n)
3806                 return 0;
3807         actions_size = sizeof(struct rte_flow_action) * n;
3808         translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3809         if (!translated) {
3810                 rte_errno = ENOMEM;
3811                 return -ENOMEM;
3812         }
3813         memcpy(translated, actions, actions_size);
3814         for (handle_end = handle + copied_n; handle < handle_end; handle++) {
3815                 struct mlx5_shared_action_rss *shared_rss;
3816                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3817                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3818                 uint32_t idx = act_idx &
3819                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3820
3821                 switch (type) {
3822                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3823                         shared_rss = mlx5_ipool_get
3824                           (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3825                         translated[handle->index].type =
3826                                 RTE_FLOW_ACTION_TYPE_RSS;
3827                         translated[handle->index].conf =
3828                                 &shared_rss->origin;
3829                         break;
3830                 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
3831                         translated[handle->index].type =
3832                                                 (enum rte_flow_action_type)
3833                                                 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
3834                         translated[handle->index].conf = (void *)(uintptr_t)idx;
3835                         break;
3836                 case MLX5_INDIRECT_ACTION_TYPE_AGE:
3837                         if (priv->sh->flow_hit_aso_en) {
3838                                 translated[handle->index].type =
3839                                         (enum rte_flow_action_type)
3840                                         MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3841                                 translated[handle->index].conf =
3842                                                          (void *)(uintptr_t)idx;
3843                                 break;
3844                         }
3845                         /* Fall-through */
3846                 case MLX5_INDIRECT_ACTION_TYPE_CT:
3847                         if (priv->sh->ct_aso_en) {
3848                                 translated[handle->index].type =
3849                                         RTE_FLOW_ACTION_TYPE_CONNTRACK;
3850                                 translated[handle->index].conf =
3851                                                          (void *)(uintptr_t)idx;
3852                                 break;
3853                         }
3854                         /* Fall-through */
3855                 default:
3856                         mlx5_free(translated);
3857                         return rte_flow_error_set
3858                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3859                                  NULL, "invalid indirect action type");
3860                 }
3861         }
3862         *translated_actions = translated;
3863         return 0;
3864 }
3865
3866 /**
3867  * Get Shared RSS action from the action list.
3868  *
3869  * @param[in] dev
3870  *   Pointer to Ethernet device.
3871  * @param[in] shared
3872  *   Pointer to the list of actions.
3873  * @param[in] shared_n
3874  *   Actions list length.
3875  *
3876  * @return
3877  *   The MLX5 RSS action ID if exists, otherwise return 0.
3878  */
3879 static uint32_t
3880 flow_get_shared_rss_action(struct rte_eth_dev *dev,
3881                            struct mlx5_translated_action_handle *handle,
3882                            int shared_n)
3883 {
3884         struct mlx5_translated_action_handle *handle_end;
3885         struct mlx5_priv *priv = dev->data->dev_private;
3886         struct mlx5_shared_action_rss *shared_rss;
3887
3888
3889         for (handle_end = handle + shared_n; handle < handle_end; handle++) {
3890                 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3891                 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3892                 uint32_t idx = act_idx &
3893                                ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3894                 switch (type) {
3895                 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3896                         shared_rss = mlx5_ipool_get
3897                                 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
3898                                                                            idx);
3899                         __atomic_add_fetch(&shared_rss->refcnt, 1,
3900                                            __ATOMIC_RELAXED);
3901                         return idx;
3902                 default:
3903                         break;
3904                 }
3905         }
3906         return 0;
3907 }
3908
3909 static unsigned int
3910 find_graph_root(uint32_t rss_level)
3911 {
3912         return rss_level < 2 ? MLX5_EXPANSION_ROOT :
3913                                MLX5_EXPANSION_ROOT_OUTER;
3914 }
3915
3916 /**
3917  *  Get layer flags from the prefix flow.
3918  *
3919  *  Some flows may be split to several subflows, the prefix subflow gets the
3920  *  match items and the suffix sub flow gets the actions.
3921  *  Some actions need the user defined match item flags to get the detail for
3922  *  the action.
3923  *  This function helps the suffix flow to get the item layer flags from prefix
3924  *  subflow.
3925  *
3926  * @param[in] dev_flow
3927  *   Pointer the created preifx subflow.
3928  *
3929  * @return
3930  *   The layers get from prefix subflow.
3931  */
3932 static inline uint64_t
3933 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
3934 {
3935         uint64_t layers = 0;
3936
3937         /*
3938          * Layers bits could be localization, but usually the compiler will
3939          * help to do the optimization work for source code.
3940          * If no decap actions, use the layers directly.
3941          */
3942         if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
3943                 return dev_flow->handle->layers;
3944         /* Convert L3 layers with decap action. */
3945         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
3946                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
3947         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
3948                 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
3949         /* Convert L4 layers with decap action.  */
3950         if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
3951                 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
3952         else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
3953                 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
3954         return layers;
3955 }
3956
3957 /**
3958  * Get metadata split action information.
3959  *
3960  * @param[in] actions
3961  *   Pointer to the list of actions.
3962  * @param[out] qrss
3963  *   Pointer to the return pointer.
3964  * @param[out] qrss_type
3965  *   Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
3966  *   if no QUEUE/RSS is found.
3967  * @param[out] encap_idx
3968  *   Pointer to the index of the encap action if exists, otherwise the last
3969  *   action index.
3970  *
3971  * @return
3972  *   Total number of actions.
3973  */
3974 static int
3975 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
3976                                        const struct rte_flow_action **qrss,
3977                                        int *encap_idx)
3978 {
3979         const struct rte_flow_action_raw_encap *raw_encap;
3980         int actions_n = 0;
3981         int raw_decap_idx = -1;
3982
3983         *encap_idx = -1;
3984         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3985                 switch (actions->type) {
3986                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
3987                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
3988                         *encap_idx = actions_n;
3989                         break;
3990                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
3991                         raw_decap_idx = actions_n;
3992                         break;
3993                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
3994                         raw_encap = actions->conf;
3995                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3996                                 *encap_idx = raw_decap_idx != -1 ?
3997                                                       raw_decap_idx : actions_n;
3998                         break;
3999                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4000                 case RTE_FLOW_ACTION_TYPE_RSS:
4001                         *qrss = actions;
4002                         break;
4003                 default:
4004                         break;
4005                 }
4006                 actions_n++;
4007         }
4008         if (*encap_idx == -1)
4009                 *encap_idx = actions_n;
4010         /* Count RTE_FLOW_ACTION_TYPE_END. */
4011         return actions_n + 1;
4012 }
4013
4014 /**
4015  * Check if the action will change packet.
4016  *
4017  * @param dev
4018  *   Pointer to Ethernet device.
4019  * @param[in] type
4020  *   action type.
4021  *
4022  * @return
4023  *   true if action will change packet, false otherwise.
4024  */
4025 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
4026                                           enum rte_flow_action_type type)
4027 {
4028         struct mlx5_priv *priv = dev->data->dev_private;
4029
4030         switch (type) {
4031         case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4032         case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4033         case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4034         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4035         case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4036         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4037         case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4038         case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4039         case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4040         case RTE_FLOW_ACTION_TYPE_SET_TTL:
4041         case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4042         case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4043         case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4044         case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4045         case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4046         case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
4047         case RTE_FLOW_ACTION_TYPE_SET_META:
4048         case RTE_FLOW_ACTION_TYPE_SET_TAG:
4049         case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4050         case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4051         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4052         case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4053         case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4054         case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4055         case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4056         case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4057         case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4058         case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4059         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
4060                 return true;
4061         case RTE_FLOW_ACTION_TYPE_FLAG:
4062         case RTE_FLOW_ACTION_TYPE_MARK:
4063                 if (priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
4064                         return true;
4065                 else
4066                         return false;
4067         default:
4068                 return false;
4069         }
4070 }
4071
4072 /**
4073  * Check meter action from the action list.
4074  *
4075  * @param dev
4076  *   Pointer to Ethernet device.
4077  * @param[in] actions
4078  *   Pointer to the list of actions.
4079  * @param[out] has_mtr
4080  *   Pointer to the meter exist flag.
4081  * @param[out] has_modify
4082  *   Pointer to the flag showing there's packet change action.
4083  * @param[out] meter_id
4084  *   Pointer to the meter id.
4085  *
4086  * @return
4087  *   Total number of actions.
4088  */
4089 static int
4090 flow_check_meter_action(struct rte_eth_dev *dev,
4091                         const struct rte_flow_action actions[],
4092                         bool *has_mtr, bool *has_modify, uint32_t *meter_id)
4093 {
4094         const struct rte_flow_action_meter *mtr = NULL;
4095         int actions_n = 0;
4096
4097         MLX5_ASSERT(has_mtr);
4098         *has_mtr = false;
4099         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4100                 switch (actions->type) {
4101                 case RTE_FLOW_ACTION_TYPE_METER:
4102                         mtr = actions->conf;
4103                         *meter_id = mtr->mtr_id;
4104                         *has_mtr = true;
4105                         break;
4106                 default:
4107                         break;
4108                 }
4109                 if (!*has_mtr)
4110                         *has_modify |= flow_check_modify_action_type(dev,
4111                                                                 actions->type);
4112                 actions_n++;
4113         }
4114         /* Count RTE_FLOW_ACTION_TYPE_END. */
4115         return actions_n + 1;
4116 }
4117
4118 /**
4119  * Check if the flow should be split due to hairpin.
4120  * The reason for the split is that in current HW we can't
4121  * support encap and push-vlan on Rx, so if a flow contains
4122  * these actions we move it to Tx.
4123  *
4124  * @param dev
4125  *   Pointer to Ethernet device.
4126  * @param[in] attr
4127  *   Flow rule attributes.
4128  * @param[in] actions
4129  *   Associated actions (list terminated by the END action).
4130  *
4131  * @return
4132  *   > 0 the number of actions and the flow should be split,
4133  *   0 when no split required.
4134  */
4135 static int
4136 flow_check_hairpin_split(struct rte_eth_dev *dev,
4137                          const struct rte_flow_attr *attr,
4138                          const struct rte_flow_action actions[])
4139 {
4140         int queue_action = 0;
4141         int action_n = 0;
4142         int split = 0;
4143         const struct rte_flow_action_queue *queue;
4144         const struct rte_flow_action_rss *rss;
4145         const struct rte_flow_action_raw_encap *raw_encap;
4146         const struct rte_eth_hairpin_conf *conf;
4147
4148         if (!attr->ingress)
4149                 return 0;
4150         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4151                 switch (actions->type) {
4152                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4153                         queue = actions->conf;
4154                         if (queue == NULL)
4155                                 return 0;
4156                         conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
4157                         if (conf == NULL || conf->tx_explicit != 0)
4158                                 return 0;
4159                         queue_action = 1;
4160                         action_n++;
4161                         break;
4162                 case RTE_FLOW_ACTION_TYPE_RSS:
4163                         rss = actions->conf;
4164                         if (rss == NULL || rss->queue_num == 0)
4165                                 return 0;
4166                         conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
4167                         if (conf == NULL || conf->tx_explicit != 0)
4168                                 return 0;
4169                         queue_action = 1;
4170                         action_n++;
4171                         break;
4172                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4173                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4174                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4175                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4176                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4177                         split++;
4178                         action_n++;
4179                         break;
4180                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4181                         raw_encap = actions->conf;
4182                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4183                                 split++;
4184                         action_n++;
4185                         break;
4186                 default:
4187                         action_n++;
4188                         break;
4189                 }
4190         }
4191         if (split && queue_action)
4192                 return action_n;
4193         return 0;
4194 }
4195
4196 /* Declare flow create/destroy prototype in advance. */
4197 static uint32_t
4198 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4199                  const struct rte_flow_attr *attr,
4200                  const struct rte_flow_item items[],
4201                  const struct rte_flow_action actions[],
4202                  bool external, struct rte_flow_error *error);
4203
4204 static void
4205 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4206                   uint32_t flow_idx);
4207
4208 int
4209 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused,
4210                       struct mlx5_list_entry *entry, void *cb_ctx)
4211 {
4212         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4213         struct mlx5_flow_mreg_copy_resource *mcp_res =
4214                                container_of(entry, typeof(*mcp_res), hlist_ent);
4215
4216         return mcp_res->mark_id != *(uint32_t *)(ctx->data);
4217 }
4218
4219 struct mlx5_list_entry *
4220 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx)
4221 {
4222         struct rte_eth_dev *dev = tool_ctx;
4223         struct mlx5_priv *priv = dev->data->dev_private;
4224         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4225         struct mlx5_flow_mreg_copy_resource *mcp_res;
4226         struct rte_flow_error *error = ctx->error;
4227         uint32_t idx = 0;
4228         int ret;
4229         uint32_t mark_id = *(uint32_t *)(ctx->data);
4230         struct rte_flow_attr attr = {
4231                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4232                 .ingress = 1,
4233         };
4234         struct mlx5_rte_flow_item_tag tag_spec = {
4235                 .data = mark_id,
4236         };
4237         struct rte_flow_item items[] = {
4238                 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
4239         };
4240         struct rte_flow_action_mark ftag = {
4241                 .id = mark_id,
4242         };
4243         struct mlx5_flow_action_copy_mreg cp_mreg = {
4244                 .dst = REG_B,
4245                 .src = REG_NON,
4246         };
4247         struct rte_flow_action_jump jump = {
4248                 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4249         };
4250         struct rte_flow_action actions[] = {
4251                 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
4252         };
4253
4254         /* Fill the register fileds in the flow. */
4255         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
4256         if (ret < 0)
4257                 return NULL;
4258         tag_spec.id = ret;
4259         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4260         if (ret < 0)
4261                 return NULL;
4262         cp_mreg.src = ret;
4263         /* Provide the full width of FLAG specific value. */
4264         if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
4265                 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
4266         /* Build a new flow. */
4267         if (mark_id != MLX5_DEFAULT_COPY_ID) {
4268                 items[0] = (struct rte_flow_item){
4269                         .type = (enum rte_flow_item_type)
4270                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4271                         .spec = &tag_spec,
4272                 };
4273                 items[1] = (struct rte_flow_item){
4274                         .type = RTE_FLOW_ITEM_TYPE_END,
4275                 };
4276                 actions[0] = (struct rte_flow_action){
4277                         .type = (enum rte_flow_action_type)
4278                                 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4279                         .conf = &ftag,
4280                 };
4281                 actions[1] = (struct rte_flow_action){
4282                         .type = (enum rte_flow_action_type)
4283                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4284                         .conf = &cp_mreg,
4285                 };
4286                 actions[2] = (struct rte_flow_action){
4287                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4288                         .conf = &jump,
4289                 };
4290                 actions[3] = (struct rte_flow_action){
4291                         .type = RTE_FLOW_ACTION_TYPE_END,
4292                 };
4293         } else {
4294                 /* Default rule, wildcard match. */
4295                 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4296                 items[0] = (struct rte_flow_item){
4297                         .type = RTE_FLOW_ITEM_TYPE_END,
4298                 };
4299                 actions[0] = (struct rte_flow_action){
4300                         .type = (enum rte_flow_action_type)
4301                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4302                         .conf = &cp_mreg,
4303                 };
4304                 actions[1] = (struct rte_flow_action){
4305                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
4306                         .conf = &jump,
4307                 };
4308                 actions[2] = (struct rte_flow_action){
4309                         .type = RTE_FLOW_ACTION_TYPE_END,
4310                 };
4311         }
4312         /* Build a new entry. */
4313         mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4314         if (!mcp_res) {
4315                 rte_errno = ENOMEM;
4316                 return NULL;
4317         }
4318         mcp_res->idx = idx;
4319         mcp_res->mark_id = mark_id;
4320         /*
4321          * The copy Flows are not included in any list. There
4322          * ones are referenced from other Flows and can not
4323          * be applied, removed, deleted in ardbitrary order
4324          * by list traversing.
4325          */
4326         mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP,
4327                                         &attr, items, actions, false, error);
4328         if (!mcp_res->rix_flow) {
4329                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4330                 return NULL;
4331         }
4332         return &mcp_res->hlist_ent;
4333 }
4334
4335 struct mlx5_list_entry *
4336 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
4337                       void *cb_ctx __rte_unused)
4338 {
4339         struct rte_eth_dev *dev = tool_ctx;
4340         struct mlx5_priv *priv = dev->data->dev_private;
4341         struct mlx5_flow_mreg_copy_resource *mcp_res;
4342         uint32_t idx = 0;
4343
4344         mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4345         if (!mcp_res) {
4346                 rte_errno = ENOMEM;
4347                 return NULL;
4348         }
4349         memcpy(mcp_res, oentry, sizeof(*mcp_res));
4350         mcp_res->idx = idx;
4351         return &mcp_res->hlist_ent;
4352 }
4353
4354 void
4355 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4356 {
4357         struct mlx5_flow_mreg_copy_resource *mcp_res =
4358                                container_of(entry, typeof(*mcp_res), hlist_ent);
4359         struct rte_eth_dev *dev = tool_ctx;
4360         struct mlx5_priv *priv = dev->data->dev_private;
4361
4362         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4363 }
4364
4365 /**
4366  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4367  *
4368  * As mark_id is unique, if there's already a registered flow for the mark_id,
4369  * return by increasing the reference counter of the resource. Otherwise, create
4370  * the resource (mcp_res) and flow.
4371  *
4372  * Flow looks like,
4373  *   - If ingress port is ANY and reg_c[1] is mark_id,
4374  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4375  *
4376  * For default flow (zero mark_id), flow is like,
4377  *   - If ingress port is ANY,
4378  *     reg_b := reg_c[0] and jump to RX_ACT_TBL.
4379  *
4380  * @param dev
4381  *   Pointer to Ethernet device.
4382  * @param mark_id
4383  *   ID of MARK action, zero means default flow for META.
4384  * @param[out] error
4385  *   Perform verbose error reporting if not NULL.
4386  *
4387  * @return
4388  *   Associated resource on success, NULL otherwise and rte_errno is set.
4389  */
4390 static struct mlx5_flow_mreg_copy_resource *
4391 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4392                           struct rte_flow_error *error)
4393 {
4394         struct mlx5_priv *priv = dev->data->dev_private;
4395         struct mlx5_list_entry *entry;
4396         struct mlx5_flow_cb_ctx ctx = {
4397                 .dev = dev,
4398                 .error = error,
4399                 .data = &mark_id,
4400         };
4401
4402         /* Check if already registered. */
4403         MLX5_ASSERT(priv->mreg_cp_tbl);
4404         entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4405         if (!entry)
4406                 return NULL;
4407         return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4408                             hlist_ent);
4409 }
4410
4411 void
4412 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4413 {
4414         struct mlx5_flow_mreg_copy_resource *mcp_res =
4415                                container_of(entry, typeof(*mcp_res), hlist_ent);
4416         struct rte_eth_dev *dev = tool_ctx;
4417         struct mlx5_priv *priv = dev->data->dev_private;
4418
4419         MLX5_ASSERT(mcp_res->rix_flow);
4420         flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow);
4421         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4422 }
4423
4424 /**
4425  * Release flow in RX_CP_TBL.
4426  *
4427  * @param dev
4428  *   Pointer to Ethernet device.
4429  * @flow
4430  *   Parent flow for wich copying is provided.
4431  */
4432 static void
4433 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4434                           struct rte_flow *flow)
4435 {
4436         struct mlx5_flow_mreg_copy_resource *mcp_res;
4437         struct mlx5_priv *priv = dev->data->dev_private;
4438
4439         if (!flow->rix_mreg_copy)
4440                 return;
4441         mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4442                                  flow->rix_mreg_copy);
4443         if (!mcp_res || !priv->mreg_cp_tbl)
4444                 return;
4445         MLX5_ASSERT(mcp_res->rix_flow);
4446         mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4447         flow->rix_mreg_copy = 0;
4448 }
4449
4450 /**
4451  * Remove the default copy action from RX_CP_TBL.
4452  *
4453  * This functions is called in the mlx5_dev_start(). No thread safe
4454  * is guaranteed.
4455  *
4456  * @param dev
4457  *   Pointer to Ethernet device.
4458  */
4459 static void
4460 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4461 {
4462         struct mlx5_list_entry *entry;
4463         struct mlx5_priv *priv = dev->data->dev_private;
4464         struct mlx5_flow_cb_ctx ctx;
4465         uint32_t mark_id;
4466
4467         /* Check if default flow is registered. */
4468         if (!priv->mreg_cp_tbl)
4469                 return;
4470         mark_id = MLX5_DEFAULT_COPY_ID;
4471         ctx.data = &mark_id;
4472         entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx);
4473         if (!entry)
4474                 return;
4475         mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4476 }
4477
4478 /**
4479  * Add the default copy action in in RX_CP_TBL.
4480  *
4481  * This functions is called in the mlx5_dev_start(). No thread safe
4482  * is guaranteed.
4483  *
4484  * @param dev
4485  *   Pointer to Ethernet device.
4486  * @param[out] error
4487  *   Perform verbose error reporting if not NULL.
4488  *
4489  * @return
4490  *   0 for success, negative value otherwise and rte_errno is set.
4491  */
4492 static int
4493 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4494                                   struct rte_flow_error *error)
4495 {
4496         struct mlx5_priv *priv = dev->data->dev_private;
4497         struct mlx5_flow_mreg_copy_resource *mcp_res;
4498         struct mlx5_flow_cb_ctx ctx;
4499         uint32_t mark_id;
4500
4501         /* Check whether extensive metadata feature is engaged. */
4502         if (!priv->config.dv_flow_en ||
4503             priv->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4504             !mlx5_flow_ext_mreg_supported(dev) ||
4505             !priv->sh->dv_regc0_mask)
4506                 return 0;
4507         /*
4508          * Add default mreg copy flow may be called multiple time, but
4509          * only be called once in stop. Avoid register it twice.
4510          */
4511         mark_id = MLX5_DEFAULT_COPY_ID;
4512         ctx.data = &mark_id;
4513         if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx))
4514                 return 0;
4515         mcp_res = flow_mreg_add_copy_action(dev, mark_id, error);
4516         if (!mcp_res)
4517                 return -rte_errno;
4518         return 0;
4519 }
4520
4521 /**
4522  * Add a flow of copying flow metadata registers in RX_CP_TBL.
4523  *
4524  * All the flow having Q/RSS action should be split by
4525  * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4526  * performs the following,
4527  *   - CQE->flow_tag := reg_c[1] (MARK)
4528  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4529  * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4530  * but there should be a flow per each MARK ID set by MARK action.
4531  *
4532  * For the aforementioned reason, if there's a MARK action in flow's action
4533  * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4534  * the MARK ID to CQE's flow_tag like,
4535  *   - If reg_c[1] is mark_id,
4536  *     flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4537  *
4538  * For SET_META action which stores value in reg_c[0], as the destination is
4539  * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4540  * MARK ID means the default flow. The default flow looks like,
4541  *   - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4542  *
4543  * @param dev
4544  *   Pointer to Ethernet device.
4545  * @param flow
4546  *   Pointer to flow structure.
4547  * @param[in] actions
4548  *   Pointer to the list of actions.
4549  * @param[out] error
4550  *   Perform verbose error reporting if not NULL.
4551  *
4552  * @return
4553  *   0 on success, negative value otherwise and rte_errno is set.
4554  */
4555 static int
4556 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4557                             struct rte_flow *flow,
4558                             const struct rte_flow_action *actions,
4559                             struct rte_flow_error *error)
4560 {
4561         struct mlx5_priv *priv = dev->data->dev_private;
4562         struct mlx5_dev_config *config = &priv->config;
4563         struct mlx5_flow_mreg_copy_resource *mcp_res;
4564         const struct rte_flow_action_mark *mark;
4565
4566         /* Check whether extensive metadata feature is engaged. */
4567         if (!config->dv_flow_en ||
4568             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4569             !mlx5_flow_ext_mreg_supported(dev) ||
4570             !priv->sh->dv_regc0_mask)
4571                 return 0;
4572         /* Find MARK action. */
4573         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4574                 switch (actions->type) {
4575                 case RTE_FLOW_ACTION_TYPE_FLAG:
4576                         mcp_res = flow_mreg_add_copy_action
4577                                 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4578                         if (!mcp_res)
4579                                 return -rte_errno;
4580                         flow->rix_mreg_copy = mcp_res->idx;
4581                         return 0;
4582                 case RTE_FLOW_ACTION_TYPE_MARK:
4583                         mark = (const struct rte_flow_action_mark *)
4584                                 actions->conf;
4585                         mcp_res =
4586                                 flow_mreg_add_copy_action(dev, mark->id, error);
4587                         if (!mcp_res)
4588                                 return -rte_errno;
4589                         flow->rix_mreg_copy = mcp_res->idx;
4590                         return 0;
4591                 default:
4592                         break;
4593                 }
4594         }
4595         return 0;
4596 }
4597
4598 #define MLX5_MAX_SPLIT_ACTIONS 24
4599 #define MLX5_MAX_SPLIT_ITEMS 24
4600
4601 /**
4602  * Split the hairpin flow.
4603  * Since HW can't support encap and push-vlan on Rx, we move these
4604  * actions to Tx.
4605  * If the count action is after the encap then we also
4606  * move the count action. in this case the count will also measure
4607  * the outer bytes.
4608  *
4609  * @param dev
4610  *   Pointer to Ethernet device.
4611  * @param[in] actions
4612  *   Associated actions (list terminated by the END action).
4613  * @param[out] actions_rx
4614  *   Rx flow actions.
4615  * @param[out] actions_tx
4616  *   Tx flow actions..
4617  * @param[out] pattern_tx
4618  *   The pattern items for the Tx flow.
4619  * @param[out] flow_id
4620  *   The flow ID connected to this flow.
4621  *
4622  * @return
4623  *   0 on success.
4624  */
4625 static int
4626 flow_hairpin_split(struct rte_eth_dev *dev,
4627                    const struct rte_flow_action actions[],
4628                    struct rte_flow_action actions_rx[],
4629                    struct rte_flow_action actions_tx[],
4630                    struct rte_flow_item pattern_tx[],
4631                    uint32_t flow_id)
4632 {
4633         const struct rte_flow_action_raw_encap *raw_encap;
4634         const struct rte_flow_action_raw_decap *raw_decap;
4635         struct mlx5_rte_flow_action_set_tag *set_tag;
4636         struct rte_flow_action *tag_action;
4637         struct mlx5_rte_flow_item_tag *tag_item;
4638         struct rte_flow_item *item;
4639         char *addr;
4640         int encap = 0;
4641
4642         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4643                 switch (actions->type) {
4644                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4645                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4646                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4647                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4648                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4649                         rte_memcpy(actions_tx, actions,
4650                                sizeof(struct rte_flow_action));
4651                         actions_tx++;
4652                         break;
4653                 case RTE_FLOW_ACTION_TYPE_COUNT:
4654                         if (encap) {
4655                                 rte_memcpy(actions_tx, actions,
4656                                            sizeof(struct rte_flow_action));
4657                                 actions_tx++;
4658                         } else {
4659                                 rte_memcpy(actions_rx, actions,
4660                                            sizeof(struct rte_flow_action));
4661                                 actions_rx++;
4662                         }
4663                         break;
4664                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4665                         raw_encap = actions->conf;
4666                         if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4667                                 memcpy(actions_tx, actions,
4668                                        sizeof(struct rte_flow_action));
4669                                 actions_tx++;
4670                                 encap = 1;
4671                         } else {
4672                                 rte_memcpy(actions_rx, actions,
4673                                            sizeof(struct rte_flow_action));
4674                                 actions_rx++;
4675                         }
4676                         break;
4677                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4678                         raw_decap = actions->conf;
4679                         if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4680                                 memcpy(actions_tx, actions,
4681                                        sizeof(struct rte_flow_action));
4682                                 actions_tx++;
4683                         } else {
4684                                 rte_memcpy(actions_rx, actions,
4685                                            sizeof(struct rte_flow_action));
4686                                 actions_rx++;
4687                         }
4688                         break;
4689                 default:
4690                         rte_memcpy(actions_rx, actions,
4691                                    sizeof(struct rte_flow_action));
4692                         actions_rx++;
4693                         break;
4694                 }
4695         }
4696         /* Add set meta action and end action for the Rx flow. */
4697         tag_action = actions_rx;
4698         tag_action->type = (enum rte_flow_action_type)
4699                            MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4700         actions_rx++;
4701         rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4702         actions_rx++;
4703         set_tag = (void *)actions_rx;
4704         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4705                 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4706                 .data = flow_id,
4707         };
4708         MLX5_ASSERT(set_tag->id > REG_NON);
4709         tag_action->conf = set_tag;
4710         /* Create Tx item list. */
4711         rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4712         addr = (void *)&pattern_tx[2];
4713         item = pattern_tx;
4714         item->type = (enum rte_flow_item_type)
4715                      MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4716         tag_item = (void *)addr;
4717         tag_item->data = flow_id;
4718         tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4719         MLX5_ASSERT(set_tag->id > REG_NON);
4720         item->spec = tag_item;
4721         addr += sizeof(struct mlx5_rte_flow_item_tag);
4722         tag_item = (void *)addr;
4723         tag_item->data = UINT32_MAX;
4724         tag_item->id = UINT16_MAX;
4725         item->mask = tag_item;
4726         item->last = NULL;
4727         item++;
4728         item->type = RTE_FLOW_ITEM_TYPE_END;
4729         return 0;
4730 }
4731
4732 /**
4733  * The last stage of splitting chain, just creates the subflow
4734  * without any modification.
4735  *
4736  * @param[in] dev
4737  *   Pointer to Ethernet device.
4738  * @param[in] flow
4739  *   Parent flow structure pointer.
4740  * @param[in, out] sub_flow
4741  *   Pointer to return the created subflow, may be NULL.
4742  * @param[in] attr
4743  *   Flow rule attributes.
4744  * @param[in] items
4745  *   Pattern specification (list terminated by the END pattern item).
4746  * @param[in] actions
4747  *   Associated actions (list terminated by the END action).
4748  * @param[in] flow_split_info
4749  *   Pointer to flow split info structure.
4750  * @param[out] error
4751  *   Perform verbose error reporting if not NULL.
4752  * @return
4753  *   0 on success, negative value otherwise
4754  */
4755 static int
4756 flow_create_split_inner(struct rte_eth_dev *dev,
4757                         struct rte_flow *flow,
4758                         struct mlx5_flow **sub_flow,
4759                         const struct rte_flow_attr *attr,
4760                         const struct rte_flow_item items[],
4761                         const struct rte_flow_action actions[],
4762                         struct mlx5_flow_split_info *flow_split_info,
4763                         struct rte_flow_error *error)
4764 {
4765         struct mlx5_flow *dev_flow;
4766
4767         dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4768                                     flow_split_info->flow_idx, error);
4769         if (!dev_flow)
4770                 return -rte_errno;
4771         dev_flow->flow = flow;
4772         dev_flow->external = flow_split_info->external;
4773         dev_flow->skip_scale = flow_split_info->skip_scale;
4774         /* Subflow object was created, we must include one in the list. */
4775         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4776                       dev_flow->handle, next);
4777         /*
4778          * If dev_flow is as one of the suffix flow, some actions in suffix
4779          * flow may need some user defined item layer flags, and pass the
4780          * Metadate rxq mark flag to suffix flow as well.
4781          */
4782         if (flow_split_info->prefix_layers)
4783                 dev_flow->handle->layers = flow_split_info->prefix_layers;
4784         if (flow_split_info->prefix_mark)
4785                 dev_flow->handle->mark = 1;
4786         if (sub_flow)
4787                 *sub_flow = dev_flow;
4788 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4789         dev_flow->dv.table_id = flow_split_info->table_id;
4790 #endif
4791         return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4792 }
4793
4794 /**
4795  * Get the sub policy of a meter.
4796  *
4797  * @param[in] dev
4798  *   Pointer to Ethernet device.
4799  * @param[in] flow
4800  *   Parent flow structure pointer.
4801  * @param wks
4802  *   Pointer to thread flow work space.
4803  * @param[in] attr
4804  *   Flow rule attributes.
4805  * @param[in] items
4806  *   Pattern specification (list terminated by the END pattern item).
4807  * @param[out] error
4808  *   Perform verbose error reporting if not NULL.
4809  *
4810  * @return
4811  *   Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
4812  */
4813 static struct mlx5_flow_meter_sub_policy *
4814 get_meter_sub_policy(struct rte_eth_dev *dev,
4815                      struct rte_flow *flow,
4816                      struct mlx5_flow_workspace *wks,
4817                      const struct rte_flow_attr *attr,
4818                      const struct rte_flow_item items[],
4819                      struct rte_flow_error *error)
4820 {
4821         struct mlx5_flow_meter_policy *policy;
4822         struct mlx5_flow_meter_policy *final_policy;
4823         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
4824
4825         policy = wks->policy;
4826         final_policy = policy->is_hierarchy ? wks->final_policy : policy;
4827         if (final_policy->is_rss || final_policy->is_queue) {
4828                 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
4829                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
4830                 uint32_t i;
4831
4832                 /*
4833                  * This is a tmp dev_flow,
4834                  * no need to register any matcher for it in translate.
4835                  */
4836                 wks->skip_matcher_reg = 1;
4837                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
4838                         struct mlx5_flow dev_flow = {0};
4839                         struct mlx5_flow_handle dev_handle = { {0} };
4840                         uint8_t fate = final_policy->act_cnt[i].fate_action;
4841
4842                         if (fate == MLX5_FLOW_FATE_SHARED_RSS) {
4843                                 const struct rte_flow_action_rss *rss_act =
4844                                         final_policy->act_cnt[i].rss->conf;
4845                                 struct rte_flow_action rss_actions[2] = {
4846                                         [0] = {
4847                                         .type = RTE_FLOW_ACTION_TYPE_RSS,
4848                                         .conf = rss_act,
4849                                         },
4850                                         [1] = {
4851                                         .type = RTE_FLOW_ACTION_TYPE_END,
4852                                         .conf = NULL,
4853                                         }
4854                                 };
4855
4856                                 dev_flow.handle = &dev_handle;
4857                                 dev_flow.ingress = attr->ingress;
4858                                 dev_flow.flow = flow;
4859                                 dev_flow.external = 0;
4860 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4861                                 dev_flow.dv.transfer = attr->transfer;
4862 #endif
4863                                 /**
4864                                  * Translate RSS action to get rss hash fields.
4865                                  */
4866                                 if (flow_drv_translate(dev, &dev_flow, attr,
4867                                                 items, rss_actions, error))
4868                                         goto exit;
4869                                 rss_desc_v[i] = wks->rss_desc;
4870                                 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
4871                                 rss_desc_v[i].hash_fields =
4872                                                 dev_flow.hash_fields;
4873                                 rss_desc_v[i].queue_num =
4874                                                 rss_desc_v[i].hash_fields ?
4875                                                 rss_desc_v[i].queue_num : 1;
4876                                 rss_desc_v[i].tunnel =
4877                                                 !!(dev_flow.handle->layers &
4878                                                    MLX5_FLOW_LAYER_TUNNEL);
4879                                 /* Use the RSS queues in the containers. */
4880                                 rss_desc_v[i].queue =
4881                                         (uint16_t *)(uintptr_t)rss_act->queue;
4882                                 rss_desc[i] = &rss_desc_v[i];
4883                         } else if (fate == MLX5_FLOW_FATE_QUEUE) {
4884                                 /* This is queue action. */
4885                                 rss_desc_v[i] = wks->rss_desc;
4886                                 rss_desc_v[i].key_len = 0;
4887                                 rss_desc_v[i].hash_fields = 0;
4888                                 rss_desc_v[i].queue =
4889                                         &final_policy->act_cnt[i].queue;
4890                                 rss_desc_v[i].queue_num = 1;
4891                                 rss_desc[i] = &rss_desc_v[i];
4892                         } else {
4893                                 rss_desc[i] = NULL;
4894                         }
4895                 }
4896                 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
4897                                                 flow, policy, rss_desc);
4898         } else {
4899                 enum mlx5_meter_domain mtr_domain =
4900                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
4901                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
4902                                                 MLX5_MTR_DOMAIN_INGRESS);
4903                 sub_policy = policy->sub_policys[mtr_domain][0];
4904         }
4905         if (!sub_policy)
4906                 rte_flow_error_set(error, EINVAL,
4907                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4908                                    "Failed to get meter sub-policy.");
4909 exit:
4910         return sub_policy;
4911 }
4912
4913 /**
4914  * Split the meter flow.
4915  *
4916  * As meter flow will split to three sub flow, other than meter
4917  * action, the other actions make sense to only meter accepts
4918  * the packet. If it need to be dropped, no other additional
4919  * actions should be take.
4920  *
4921  * One kind of special action which decapsulates the L3 tunnel
4922  * header will be in the prefix sub flow, as not to take the
4923  * L3 tunnel header into account.
4924  *
4925  * @param[in] dev
4926  *   Pointer to Ethernet device.
4927  * @param[in] flow
4928  *   Parent flow structure pointer.
4929  * @param wks
4930  *   Pointer to thread flow work space.
4931  * @param[in] attr
4932  *   Flow rule attributes.
4933  * @param[in] items
4934  *   Pattern specification (list terminated by the END pattern item).
4935  * @param[out] sfx_items
4936  *   Suffix flow match items (list terminated by the END pattern item).
4937  * @param[in] actions
4938  *   Associated actions (list terminated by the END action).
4939  * @param[out] actions_sfx
4940  *   Suffix flow actions.
4941  * @param[out] actions_pre
4942  *   Prefix flow actions.
4943  * @param[out] mtr_flow_id
4944  *   Pointer to meter flow id.
4945  * @param[out] error
4946  *   Perform verbose error reporting if not NULL.
4947  *
4948  * @return
4949  *   0 on success, a negative errno value otherwise and rte_errno is set.
4950  */
4951 static int
4952 flow_meter_split_prep(struct rte_eth_dev *dev,
4953                       struct rte_flow *flow,
4954                       struct mlx5_flow_workspace *wks,
4955                       const struct rte_flow_attr *attr,
4956                       const struct rte_flow_item items[],
4957                       struct rte_flow_item sfx_items[],
4958                       const struct rte_flow_action actions[],
4959                       struct rte_flow_action actions_sfx[],
4960                       struct rte_flow_action actions_pre[],
4961                       uint32_t *mtr_flow_id,
4962                       struct rte_flow_error *error)
4963 {
4964         struct mlx5_priv *priv = dev->data->dev_private;
4965         struct mlx5_flow_meter_info *fm = wks->fm;
4966         struct rte_flow_action *tag_action = NULL;
4967         struct rte_flow_item *tag_item;
4968         struct mlx5_rte_flow_action_set_tag *set_tag;
4969         const struct rte_flow_action_raw_encap *raw_encap;
4970         const struct rte_flow_action_raw_decap *raw_decap;
4971         struct mlx5_rte_flow_item_tag *tag_item_spec;
4972         struct mlx5_rte_flow_item_tag *tag_item_mask;
4973         uint32_t tag_id = 0;
4974         struct rte_flow_item *vlan_item_dst = NULL;
4975         const struct rte_flow_item *vlan_item_src = NULL;
4976         struct rte_flow_action *hw_mtr_action;
4977         struct rte_flow_action *action_pre_head = NULL;
4978         int32_t flow_src_port = priv->representor_id;
4979         bool mtr_first;
4980         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
4981         uint8_t mtr_reg_bits = priv->mtr_reg_share ?
4982                                 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
4983         uint32_t flow_id = 0;
4984         uint32_t flow_id_reversed = 0;
4985         uint8_t flow_id_bits = 0;
4986         int shift;
4987
4988         /* Prepare the suffix subflow items. */
4989         tag_item = sfx_items++;
4990         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4991                 struct mlx5_priv *port_priv;
4992                 const struct rte_flow_item_port_id *pid_v;
4993                 int item_type = items->type;
4994
4995                 switch (item_type) {
4996                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4997                         pid_v = items->spec;
4998                         MLX5_ASSERT(pid_v);
4999                         port_priv = mlx5_port_to_eswitch_info(pid_v->id, false);
5000                         if (!port_priv)
5001                                 return rte_flow_error_set(error,
5002                                                 rte_errno,
5003                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5004                                                 pid_v,
5005                                                 "Failed to get port info.");
5006                         flow_src_port = port_priv->representor_id;
5007                         if (!fm->def_policy && wks->policy->is_hierarchy &&
5008                             flow_src_port != priv->representor_id) {
5009                                 if (flow_drv_mtr_hierarchy_rule_create(dev,
5010                                                                 flow, fm,
5011                                                                 flow_src_port,
5012                                                                 items,
5013                                                                 error))
5014                                         return -rte_errno;
5015                         }
5016                         memcpy(sfx_items, items, sizeof(*sfx_items));
5017                         sfx_items++;
5018                         break;
5019                 case RTE_FLOW_ITEM_TYPE_VLAN:
5020                         /* Determine if copy vlan item below. */
5021                         vlan_item_src = items;
5022                         vlan_item_dst = sfx_items++;
5023                         vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID;
5024                         break;
5025                 default:
5026                         break;
5027                 }
5028         }
5029         sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
5030         sfx_items++;
5031         mtr_first = priv->sh->meter_aso_en &&
5032                 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX));
5033         /* For ASO meter, meter must be before tag in TX direction. */
5034         if (mtr_first) {
5035                 action_pre_head = actions_pre++;
5036                 /* Leave space for tag action. */
5037                 tag_action = actions_pre++;
5038         }
5039         /* Prepare the actions for prefix and suffix flow. */
5040         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5041                 struct rte_flow_action *action_cur = NULL;
5042
5043                 switch (actions->type) {
5044                 case RTE_FLOW_ACTION_TYPE_METER:
5045                         if (mtr_first) {
5046                                 action_cur = action_pre_head;
5047                         } else {
5048                                 /* Leave space for tag action. */
5049                                 tag_action = actions_pre++;
5050                                 action_cur = actions_pre++;
5051                         }
5052                         break;
5053                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5054                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5055                         action_cur = actions_pre++;
5056                         break;
5057                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5058                         raw_encap = actions->conf;
5059                         if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
5060                                 action_cur = actions_pre++;
5061                         break;
5062                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5063                         raw_decap = actions->conf;
5064                         if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
5065                                 action_cur = actions_pre++;
5066                         break;
5067                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5068                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5069                         if (vlan_item_dst && vlan_item_src) {
5070                                 memcpy(vlan_item_dst, vlan_item_src,
5071                                         sizeof(*vlan_item_dst));
5072                                 /*
5073                                  * Convert to internal match item, it is used
5074                                  * for vlan push and set vid.
5075                                  */
5076                                 vlan_item_dst->type = (enum rte_flow_item_type)
5077                                                 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
5078                         }
5079                         break;
5080                 default:
5081                         break;
5082                 }
5083                 if (!action_cur)
5084                         action_cur = (fm->def_policy) ?
5085                                         actions_sfx++ : actions_pre++;
5086                 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
5087         }
5088         /* Add end action to the actions. */
5089         actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
5090         if (priv->sh->meter_aso_en) {
5091                 /**
5092                  * For ASO meter, need to add an extra jump action explicitly,
5093                  * to jump from meter to policer table.
5094                  */
5095                 struct mlx5_flow_meter_sub_policy *sub_policy;
5096                 struct mlx5_flow_tbl_data_entry *tbl_data;
5097
5098                 if (!fm->def_policy) {
5099                         sub_policy = get_meter_sub_policy(dev, flow, wks,
5100                                                           attr, items, error);
5101                         if (!sub_policy)
5102                                 return -rte_errno;
5103                 } else {
5104                         enum mlx5_meter_domain mtr_domain =
5105                         attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
5106                                 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
5107                                                 MLX5_MTR_DOMAIN_INGRESS);
5108
5109                         sub_policy =
5110                         &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
5111                 }
5112                 tbl_data = container_of(sub_policy->tbl_rsc,
5113                                         struct mlx5_flow_tbl_data_entry, tbl);
5114                 hw_mtr_action = actions_pre++;
5115                 hw_mtr_action->type = (enum rte_flow_action_type)
5116                                       MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
5117                 hw_mtr_action->conf = tbl_data->jump.action;
5118         }
5119         actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
5120         actions_pre++;
5121         if (!tag_action)
5122                 return rte_flow_error_set(error, ENOMEM,
5123                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5124                                           NULL, "No tag action space.");
5125         if (!mtr_flow_id) {
5126                 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
5127                 goto exit;
5128         }
5129         /* Only default-policy Meter creates mtr flow id. */
5130         if (fm->def_policy) {
5131                 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
5132                 if (!tag_id)
5133                         return rte_flow_error_set(error, ENOMEM,
5134                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5135                                         "Failed to allocate meter flow id.");
5136                 flow_id = tag_id - 1;
5137                 flow_id_bits = (!flow_id) ? 1 :
5138                                 (MLX5_REG_BITS - __builtin_clz(flow_id));
5139                 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
5140                     mtr_reg_bits) {
5141                         mlx5_ipool_free(fm->flow_ipool, tag_id);
5142                         return rte_flow_error_set(error, EINVAL,
5143                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5144                                         "Meter flow id exceeds max limit.");
5145                 }
5146                 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
5147                         priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
5148         }
5149         /* Build tag actions and items for meter_id/meter flow_id. */
5150         set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
5151         tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
5152         tag_item_mask = tag_item_spec + 1;
5153         /* Both flow_id and meter_id share the same register. */
5154         *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5155                 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
5156                                                             0, error),
5157                 .offset = mtr_id_offset,
5158                 .length = mtr_reg_bits,
5159                 .data = flow->meter,
5160         };
5161         /*
5162          * The color Reg bits used by flow_id are growing from
5163          * msb to lsb, so must do bit reverse for flow_id val in RegC.
5164          */
5165         for (shift = 0; shift < flow_id_bits; shift++)
5166                 flow_id_reversed = (flow_id_reversed << 1) |
5167                                 ((flow_id >> shift) & 0x1);
5168         set_tag->data |=
5169                 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
5170         tag_item_spec->id = set_tag->id;
5171         tag_item_spec->data = set_tag->data << mtr_id_offset;
5172         tag_item_mask->data = UINT32_MAX << mtr_id_offset;
5173         tag_action->type = (enum rte_flow_action_type)
5174                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5175         tag_action->conf = set_tag;
5176         tag_item->type = (enum rte_flow_item_type)
5177                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
5178         tag_item->spec = tag_item_spec;
5179         tag_item->last = NULL;
5180         tag_item->mask = tag_item_mask;
5181 exit:
5182         if (mtr_flow_id)
5183                 *mtr_flow_id = tag_id;
5184         return 0;
5185 }
5186
5187 /**
5188  * Split action list having QUEUE/RSS for metadata register copy.
5189  *
5190  * Once Q/RSS action is detected in user's action list, the flow action
5191  * should be split in order to copy metadata registers, which will happen in
5192  * RX_CP_TBL like,
5193  *   - CQE->flow_tag := reg_c[1] (MARK)
5194  *   - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
5195  * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
5196  * This is because the last action of each flow must be a terminal action
5197  * (QUEUE, RSS or DROP).
5198  *
5199  * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
5200  * stored and kept in the mlx5_flow structure per each sub_flow.
5201  *
5202  * The Q/RSS action is replaced with,
5203  *   - SET_TAG, setting the allocated flow ID to reg_c[2].
5204  * And the following JUMP action is added at the end,
5205  *   - JUMP, to RX_CP_TBL.
5206  *
5207  * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
5208  * flow_create_split_metadata() routine. The flow will look like,
5209  *   - If flow ID matches (reg_c[2]), perform Q/RSS.
5210  *
5211  * @param dev
5212  *   Pointer to Ethernet device.
5213  * @param[out] split_actions
5214  *   Pointer to store split actions to jump to CP_TBL.
5215  * @param[in] actions
5216  *   Pointer to the list of original flow actions.
5217  * @param[in] qrss
5218  *   Pointer to the Q/RSS action.
5219  * @param[in] actions_n
5220  *   Number of original actions.
5221  * @param[out] error
5222  *   Perform verbose error reporting if not NULL.
5223  *
5224  * @return
5225  *   non-zero unique flow_id on success, otherwise 0 and
5226  *   error/rte_error are set.
5227  */
5228 static uint32_t
5229 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
5230                           struct rte_flow_action *split_actions,
5231                           const struct rte_flow_action *actions,
5232                           const struct rte_flow_action *qrss,
5233                           int actions_n, struct rte_flow_error *error)
5234 {
5235         struct mlx5_priv *priv = dev->data->dev_private;
5236         struct mlx5_rte_flow_action_set_tag *set_tag;
5237         struct rte_flow_action_jump *jump;
5238         const int qrss_idx = qrss - actions;
5239         uint32_t flow_id = 0;
5240         int ret = 0;
5241
5242         /*
5243          * Given actions will be split
5244          * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
5245          * - Add jump to mreg CP_TBL.
5246          * As a result, there will be one more action.
5247          */
5248         ++actions_n;
5249         memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
5250         set_tag = (void *)(split_actions + actions_n);
5251         /*
5252          * If tag action is not set to void(it means we are not the meter
5253          * suffix flow), add the tag action. Since meter suffix flow already
5254          * has the tag added.
5255          */
5256         if (split_actions[qrss_idx].type != RTE_FLOW_ACTION_TYPE_VOID) {
5257                 /*
5258                  * Allocate the new subflow ID. This one is unique within
5259                  * device and not shared with representors. Otherwise,
5260                  * we would have to resolve multi-thread access synch
5261                  * issue. Each flow on the shared device is appended
5262                  * with source vport identifier, so the resulting
5263                  * flows will be unique in the shared (by master and
5264                  * representors) domain even if they have coinciding
5265                  * IDs.
5266                  */
5267                 mlx5_ipool_malloc(priv->sh->ipool
5268                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
5269                 if (!flow_id)
5270                         return rte_flow_error_set(error, ENOMEM,
5271                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5272                                                   NULL, "can't allocate id "
5273                                                   "for split Q/RSS subflow");
5274                 /* Internal SET_TAG action to set flow ID. */
5275                 *set_tag = (struct mlx5_rte_flow_action_set_tag){
5276                         .data = flow_id,
5277                 };
5278                 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
5279                 if (ret < 0)
5280                         return ret;
5281                 set_tag->id = ret;
5282                 /* Construct new actions array. */
5283                 /* Replace QUEUE/RSS action. */
5284                 split_actions[qrss_idx] = (struct rte_flow_action){
5285                         .type = (enum rte_flow_action_type)
5286                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5287                         .conf = set_tag,
5288                 };
5289         }
5290         /* JUMP action to jump to mreg copy table (CP_TBL). */
5291         jump = (void *)(set_tag + 1);
5292         *jump = (struct rte_flow_action_jump){
5293                 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5294         };
5295         split_actions[actions_n - 2] = (struct rte_flow_action){
5296                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5297                 .conf = jump,
5298         };
5299         split_actions[actions_n - 1] = (struct rte_flow_action){
5300                 .type = RTE_FLOW_ACTION_TYPE_END,
5301         };
5302         return flow_id;
5303 }
5304
5305 /**
5306  * Extend the given action list for Tx metadata copy.
5307  *
5308  * Copy the given action list to the ext_actions and add flow metadata register
5309  * copy action in order to copy reg_a set by WQE to reg_c[0].
5310  *
5311  * @param[out] ext_actions
5312  *   Pointer to the extended action list.
5313  * @param[in] actions
5314  *   Pointer to the list of actions.
5315  * @param[in] actions_n
5316  *   Number of actions in the list.
5317  * @param[out] error
5318  *   Perform verbose error reporting if not NULL.
5319  * @param[in] encap_idx
5320  *   The encap action inndex.
5321  *
5322  * @return
5323  *   0 on success, negative value otherwise
5324  */
5325 static int
5326 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
5327                        struct rte_flow_action *ext_actions,
5328                        const struct rte_flow_action *actions,
5329                        int actions_n, struct rte_flow_error *error,
5330                        int encap_idx)
5331 {
5332         struct mlx5_flow_action_copy_mreg *cp_mreg =
5333                 (struct mlx5_flow_action_copy_mreg *)
5334                         (ext_actions + actions_n + 1);
5335         int ret;
5336
5337         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
5338         if (ret < 0)
5339                 return ret;
5340         cp_mreg->dst = ret;
5341         ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
5342         if (ret < 0)
5343                 return ret;
5344         cp_mreg->src = ret;
5345         if (encap_idx != 0)
5346                 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
5347         if (encap_idx == actions_n - 1) {
5348                 ext_actions[actions_n - 1] = (struct rte_flow_action){
5349                         .type = (enum rte_flow_action_type)
5350                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5351                         .conf = cp_mreg,
5352                 };
5353                 ext_actions[actions_n] = (struct rte_flow_action){
5354                         .type = RTE_FLOW_ACTION_TYPE_END,
5355                 };
5356         } else {
5357                 ext_actions[encap_idx] = (struct rte_flow_action){
5358                         .type = (enum rte_flow_action_type)
5359                                 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5360                         .conf = cp_mreg,
5361                 };
5362                 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5363                                 sizeof(*ext_actions) * (actions_n - encap_idx));
5364         }
5365         return 0;
5366 }
5367
5368 /**
5369  * Check the match action from the action list.
5370  *
5371  * @param[in] actions
5372  *   Pointer to the list of actions.
5373  * @param[in] attr
5374  *   Flow rule attributes.
5375  * @param[in] action
5376  *   The action to be check if exist.
5377  * @param[out] match_action_pos
5378  *   Pointer to the position of the matched action if exists, otherwise is -1.
5379  * @param[out] qrss_action_pos
5380  *   Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5381  * @param[out] modify_after_mirror
5382  *   Pointer to the flag of modify action after FDB mirroring.
5383  *
5384  * @return
5385  *   > 0 the total number of actions.
5386  *   0 if not found match action in action list.
5387  */
5388 static int
5389 flow_check_match_action(const struct rte_flow_action actions[],
5390                         const struct rte_flow_attr *attr,
5391                         enum rte_flow_action_type action,
5392                         int *match_action_pos, int *qrss_action_pos,
5393                         int *modify_after_mirror)
5394 {
5395         const struct rte_flow_action_sample *sample;
5396         const struct rte_flow_action_raw_decap *decap;
5397         int actions_n = 0;
5398         uint32_t ratio = 0;
5399         int sub_type = 0;
5400         int flag = 0;
5401         int fdb_mirror = 0;
5402
5403         *match_action_pos = -1;
5404         *qrss_action_pos = -1;
5405         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5406                 if (actions->type == action) {
5407                         flag = 1;
5408                         *match_action_pos = actions_n;
5409                 }
5410                 switch (actions->type) {
5411                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5412                 case RTE_FLOW_ACTION_TYPE_RSS:
5413                         *qrss_action_pos = actions_n;
5414                         break;
5415                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5416                         sample = actions->conf;
5417                         ratio = sample->ratio;
5418                         sub_type = ((const struct rte_flow_action *)
5419                                         (sample->actions))->type;
5420                         if (ratio == 1 && attr->transfer)
5421                                 fdb_mirror = 1;
5422                         break;
5423                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5424                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5425                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5426                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5427                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5428                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5429                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5430                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5431                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5432                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5433                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5434                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5435                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5436                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5437                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5438                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5439                 case RTE_FLOW_ACTION_TYPE_FLAG:
5440                 case RTE_FLOW_ACTION_TYPE_MARK:
5441                 case RTE_FLOW_ACTION_TYPE_SET_META:
5442                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5443                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5444                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5445                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5446                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5447                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5448                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5449                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5450                 case RTE_FLOW_ACTION_TYPE_METER:
5451                         if (fdb_mirror)
5452                                 *modify_after_mirror = 1;
5453                         break;
5454                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5455                         decap = actions->conf;
5456                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5457                                 ;
5458                         actions_n++;
5459                         if (actions->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5460                                 const struct rte_flow_action_raw_encap *encap =
5461                                                                 actions->conf;
5462                                 if (decap->size <=
5463                                         MLX5_ENCAPSULATION_DECISION_SIZE &&
5464                                     encap->size >
5465                                         MLX5_ENCAPSULATION_DECISION_SIZE)
5466                                         /* L3 encap. */
5467                                         break;
5468                         }
5469                         if (fdb_mirror)
5470                                 *modify_after_mirror = 1;
5471                         break;
5472                 default:
5473                         break;
5474                 }
5475                 actions_n++;
5476         }
5477         if (flag && fdb_mirror && !*modify_after_mirror) {
5478                 /* FDB mirroring uses the destination array to implement
5479                  * instead of FLOW_SAMPLER object.
5480                  */
5481                 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5482                         flag = 0;
5483         }
5484         /* Count RTE_FLOW_ACTION_TYPE_END. */
5485         return flag ? actions_n + 1 : 0;
5486 }
5487
5488 #define SAMPLE_SUFFIX_ITEM 2
5489
5490 /**
5491  * Split the sample flow.
5492  *
5493  * As sample flow will split to two sub flow, sample flow with
5494  * sample action, the other actions will move to new suffix flow.
5495  *
5496  * Also add unique tag id with tag action in the sample flow,
5497  * the same tag id will be as match in the suffix flow.
5498  *
5499  * @param dev
5500  *   Pointer to Ethernet device.
5501  * @param[in] add_tag
5502  *   Add extra tag action flag.
5503  * @param[out] sfx_items
5504  *   Suffix flow match items (list terminated by the END pattern item).
5505  * @param[in] actions
5506  *   Associated actions (list terminated by the END action).
5507  * @param[out] actions_sfx
5508  *   Suffix flow actions.
5509  * @param[out] actions_pre
5510  *   Prefix flow actions.
5511  * @param[in] actions_n
5512  *  The total number of actions.
5513  * @param[in] sample_action_pos
5514  *   The sample action position.
5515  * @param[in] qrss_action_pos
5516  *   The Queue/RSS action position.
5517  * @param[in] jump_table
5518  *   Add extra jump action flag.
5519  * @param[out] error
5520  *   Perform verbose error reporting if not NULL.
5521  *
5522  * @return
5523  *   0 on success, or unique flow_id, a negative errno value
5524  *   otherwise and rte_errno is set.
5525  */
5526 static int
5527 flow_sample_split_prep(struct rte_eth_dev *dev,
5528                        int add_tag,
5529                        struct rte_flow_item sfx_items[],
5530                        const struct rte_flow_action actions[],
5531                        struct rte_flow_action actions_sfx[],
5532                        struct rte_flow_action actions_pre[],
5533                        int actions_n,
5534                        int sample_action_pos,
5535                        int qrss_action_pos,
5536                        int jump_table,
5537                        struct rte_flow_error *error)
5538 {
5539         struct mlx5_priv *priv = dev->data->dev_private;
5540         struct mlx5_rte_flow_action_set_tag *set_tag;
5541         struct mlx5_rte_flow_item_tag *tag_spec;
5542         struct mlx5_rte_flow_item_tag *tag_mask;
5543         struct rte_flow_action_jump *jump_action;
5544         uint32_t tag_id = 0;
5545         int index;
5546         int append_index = 0;
5547         int ret;
5548
5549         if (sample_action_pos < 0)
5550                 return rte_flow_error_set(error, EINVAL,
5551                                           RTE_FLOW_ERROR_TYPE_ACTION,
5552                                           NULL, "invalid position of sample "
5553                                           "action in list");
5554         /* Prepare the actions for prefix and suffix flow. */
5555         if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5556                 index = qrss_action_pos;
5557                 /* Put the preceding the Queue/RSS action into prefix flow. */
5558                 if (index != 0)
5559                         memcpy(actions_pre, actions,
5560                                sizeof(struct rte_flow_action) * index);
5561                 /* Put others preceding the sample action into prefix flow. */
5562                 if (sample_action_pos > index + 1)
5563                         memcpy(actions_pre + index, actions + index + 1,
5564                                sizeof(struct rte_flow_action) *
5565                                (sample_action_pos - index - 1));
5566                 index = sample_action_pos - 1;
5567                 /* Put Queue/RSS action into Suffix flow. */
5568                 memcpy(actions_sfx, actions + qrss_action_pos,
5569                        sizeof(struct rte_flow_action));
5570                 actions_sfx++;
5571         } else {
5572                 index = sample_action_pos;
5573                 if (index != 0)
5574                         memcpy(actions_pre, actions,
5575                                sizeof(struct rte_flow_action) * index);
5576         }
5577         /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5578          * For CX6DX and above, metadata registers Cx preserve their value,
5579          * add an extra tag action for NIC-RX and E-Switch Domain.
5580          */
5581         if (add_tag) {
5582                 /* Prepare the prefix tag action. */
5583                 append_index++;
5584                 set_tag = (void *)(actions_pre + actions_n + append_index);
5585                 ret = mlx5_flow_get_reg_id(dev, MLX5_SAMPLE_ID, 0, error);
5586                 if (ret < 0)
5587                         return ret;
5588                 mlx5_ipool_malloc(priv->sh->ipool
5589                                   [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5590                 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5591                         .id = ret,
5592                         .data = tag_id,
5593                 };
5594                 /* Prepare the suffix subflow items. */
5595                 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5596                 tag_spec->data = tag_id;
5597                 tag_spec->id = set_tag->id;
5598                 tag_mask = tag_spec + 1;
5599                 tag_mask->data = UINT32_MAX;
5600                 sfx_items[0] = (struct rte_flow_item){
5601                         .type = (enum rte_flow_item_type)
5602                                 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5603                         .spec = tag_spec,
5604                         .last = NULL,
5605                         .mask = tag_mask,
5606                 };
5607                 sfx_items[1] = (struct rte_flow_item){
5608                         .type = (enum rte_flow_item_type)
5609                                 RTE_FLOW_ITEM_TYPE_END,
5610                 };
5611                 /* Prepare the tag action in prefix subflow. */
5612                 actions_pre[index++] =
5613                         (struct rte_flow_action){
5614                         .type = (enum rte_flow_action_type)
5615                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5616                         .conf = set_tag,
5617                 };
5618         }
5619         memcpy(actions_pre + index, actions + sample_action_pos,
5620                sizeof(struct rte_flow_action));
5621         index += 1;
5622         /* For the modify action after the sample action in E-Switch mirroring,
5623          * Add the extra jump action in prefix subflow and jump into the next
5624          * table, then do the modify action in the new table.
5625          */
5626         if (jump_table) {
5627                 /* Prepare the prefix jump action. */
5628                 append_index++;
5629                 jump_action = (void *)(actions_pre + actions_n + append_index);
5630                 jump_action->group = jump_table;
5631                 actions_pre[index++] =
5632                         (struct rte_flow_action){
5633                         .type = (enum rte_flow_action_type)
5634                                 RTE_FLOW_ACTION_TYPE_JUMP,
5635                         .conf = jump_action,
5636                 };
5637         }
5638         actions_pre[index] = (struct rte_flow_action){
5639                 .type = (enum rte_flow_action_type)
5640                         RTE_FLOW_ACTION_TYPE_END,
5641         };
5642         /* Put the actions after sample into Suffix flow. */
5643         memcpy(actions_sfx, actions + sample_action_pos + 1,
5644                sizeof(struct rte_flow_action) *
5645                (actions_n - sample_action_pos - 1));
5646         return tag_id;
5647 }
5648
5649 /**
5650  * The splitting for metadata feature.
5651  *
5652  * - Q/RSS action on NIC Rx should be split in order to pass by
5653  *   the mreg copy table (RX_CP_TBL) and then it jumps to the
5654  *   action table (RX_ACT_TBL) which has the split Q/RSS action.
5655  *
5656  * - All the actions on NIC Tx should have a mreg copy action to
5657  *   copy reg_a from WQE to reg_c[0].
5658  *
5659  * @param dev
5660  *   Pointer to Ethernet device.
5661  * @param[in] flow
5662  *   Parent flow structure pointer.
5663  * @param[in] attr
5664  *   Flow rule attributes.
5665  * @param[in] items
5666  *   Pattern specification (list terminated by the END pattern item).
5667  * @param[in] actions
5668  *   Associated actions (list terminated by the END action).
5669  * @param[in] flow_split_info
5670  *   Pointer to flow split info structure.
5671  * @param[out] error
5672  *   Perform verbose error reporting if not NULL.
5673  * @return
5674  *   0 on success, negative value otherwise
5675  */
5676 static int
5677 flow_create_split_metadata(struct rte_eth_dev *dev,
5678                            struct rte_flow *flow,
5679                            const struct rte_flow_attr *attr,
5680                            const struct rte_flow_item items[],
5681                            const struct rte_flow_action actions[],
5682                            struct mlx5_flow_split_info *flow_split_info,
5683                            struct rte_flow_error *error)
5684 {
5685         struct mlx5_priv *priv = dev->data->dev_private;
5686         struct mlx5_dev_config *config = &priv->config;
5687         const struct rte_flow_action *qrss = NULL;
5688         struct rte_flow_action *ext_actions = NULL;
5689         struct mlx5_flow *dev_flow = NULL;
5690         uint32_t qrss_id = 0;
5691         int mtr_sfx = 0;
5692         size_t act_size;
5693         int actions_n;
5694         int encap_idx;
5695         int ret;
5696
5697         /* Check whether extensive metadata feature is engaged. */
5698         if (!config->dv_flow_en ||
5699             config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5700             !mlx5_flow_ext_mreg_supported(dev))
5701                 return flow_create_split_inner(dev, flow, NULL, attr, items,
5702                                                actions, flow_split_info, error);
5703         actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5704                                                            &encap_idx);
5705         if (qrss) {
5706                 /* Exclude hairpin flows from splitting. */
5707                 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5708                         const struct rte_flow_action_queue *queue;
5709
5710                         queue = qrss->conf;
5711                         if (mlx5_rxq_get_type(dev, queue->index) ==
5712                             MLX5_RXQ_TYPE_HAIRPIN)
5713                                 qrss = NULL;
5714                 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5715                         const struct rte_flow_action_rss *rss;
5716
5717                         rss = qrss->conf;
5718                         if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5719                             MLX5_RXQ_TYPE_HAIRPIN)
5720                                 qrss = NULL;
5721                 }
5722         }
5723         if (qrss) {
5724                 /* Check if it is in meter suffix table. */
5725                 mtr_sfx = attr->group == (attr->transfer ?
5726                           (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5727                           MLX5_FLOW_TABLE_LEVEL_METER);
5728                 /*
5729                  * Q/RSS action on NIC Rx should be split in order to pass by
5730                  * the mreg copy table (RX_CP_TBL) and then it jumps to the
5731                  * action table (RX_ACT_TBL) which has the split Q/RSS action.
5732                  */
5733                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5734                            sizeof(struct rte_flow_action_set_tag) +
5735                            sizeof(struct rte_flow_action_jump);
5736                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5737                                           SOCKET_ID_ANY);
5738                 if (!ext_actions)
5739                         return rte_flow_error_set(error, ENOMEM,
5740                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5741                                                   NULL, "no memory to split "
5742                                                   "metadata flow");
5743                 /*
5744                  * If we are the suffix flow of meter, tag already exist.
5745                  * Set the tag action to void.
5746                  */
5747                 if (mtr_sfx)
5748                         ext_actions[qrss - actions].type =
5749                                                 RTE_FLOW_ACTION_TYPE_VOID;
5750                 else
5751                         ext_actions[qrss - actions].type =
5752                                                 (enum rte_flow_action_type)
5753                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5754                 /*
5755                  * Create the new actions list with removed Q/RSS action
5756                  * and appended set tag and jump to register copy table
5757                  * (RX_CP_TBL). We should preallocate unique tag ID here
5758                  * in advance, because it is needed for set tag action.
5759                  */
5760                 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5761                                                     qrss, actions_n, error);
5762                 if (!mtr_sfx && !qrss_id) {
5763                         ret = -rte_errno;
5764                         goto exit;
5765                 }
5766         } else if (attr->egress && !attr->transfer) {
5767                 /*
5768                  * All the actions on NIC Tx should have a metadata register
5769                  * copy action to copy reg_a from WQE to reg_c[meta]
5770                  */
5771                 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5772                            sizeof(struct mlx5_flow_action_copy_mreg);
5773                 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5774                                           SOCKET_ID_ANY);
5775                 if (!ext_actions)
5776                         return rte_flow_error_set(error, ENOMEM,
5777                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5778                                                   NULL, "no memory to split "
5779                                                   "metadata flow");
5780                 /* Create the action list appended with copy register. */
5781                 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5782                                              actions_n, error, encap_idx);
5783                 if (ret < 0)
5784                         goto exit;
5785         }
5786         /* Add the unmodified original or prefix subflow. */
5787         ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5788                                       items, ext_actions ? ext_actions :
5789                                       actions, flow_split_info, error);
5790         if (ret < 0)
5791                 goto exit;
5792         MLX5_ASSERT(dev_flow);
5793         if (qrss) {
5794                 const struct rte_flow_attr q_attr = {
5795                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5796                         .ingress = 1,
5797                 };
5798                 /* Internal PMD action to set register. */
5799                 struct mlx5_rte_flow_item_tag q_tag_spec = {
5800                         .data = qrss_id,
5801                         .id = REG_NON,
5802                 };
5803                 struct rte_flow_item q_items[] = {
5804                         {
5805                                 .type = (enum rte_flow_item_type)
5806                                         MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5807                                 .spec = &q_tag_spec,
5808                                 .last = NULL,
5809                                 .mask = NULL,
5810                         },
5811                         {
5812                                 .type = RTE_FLOW_ITEM_TYPE_END,
5813                         },
5814                 };
5815                 struct rte_flow_action q_actions[] = {
5816                         {
5817                                 .type = qrss->type,
5818                                 .conf = qrss->conf,
5819                         },
5820                         {
5821                                 .type = RTE_FLOW_ACTION_TYPE_END,
5822                         },
5823                 };
5824                 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5825
5826                 /*
5827                  * Configure the tag item only if there is no meter subflow.
5828                  * Since tag is already marked in the meter suffix subflow
5829                  * we can just use the meter suffix items as is.
5830                  */
5831                 if (qrss_id) {
5832                         /* Not meter subflow. */
5833                         MLX5_ASSERT(!mtr_sfx);
5834                         /*
5835                          * Put unique id in prefix flow due to it is destroyed
5836                          * after suffix flow and id will be freed after there
5837                          * is no actual flows with this id and identifier
5838                          * reallocation becomes possible (for example, for
5839                          * other flows in other threads).
5840                          */
5841                         dev_flow->handle->split_flow_id = qrss_id;
5842                         ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5843                                                    error);
5844                         if (ret < 0)
5845                                 goto exit;
5846                         q_tag_spec.id = ret;
5847                 }
5848                 dev_flow = NULL;
5849                 /* Add suffix subflow to execute Q/RSS. */
5850                 flow_split_info->prefix_layers = layers;
5851                 flow_split_info->prefix_mark = 0;
5852                 ret = flow_create_split_inner(dev, flow, &dev_flow,
5853                                               &q_attr, mtr_sfx ? items :
5854                                               q_items, q_actions,
5855                                               flow_split_info, error);
5856                 if (ret < 0)
5857                         goto exit;
5858                 /* qrss ID should be freed if failed. */
5859                 qrss_id = 0;
5860                 MLX5_ASSERT(dev_flow);
5861         }
5862
5863 exit:
5864         /*
5865          * We do not destroy the partially created sub_flows in case of error.
5866          * These ones are included into parent flow list and will be destroyed
5867          * by flow_drv_destroy.
5868          */
5869         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
5870                         qrss_id);
5871         mlx5_free(ext_actions);
5872         return ret;
5873 }
5874
5875 /**
5876  * Create meter internal drop flow with the original pattern.
5877  *
5878  * @param dev
5879  *   Pointer to Ethernet device.
5880  * @param[in] flow
5881  *   Parent flow structure pointer.
5882  * @param[in] attr
5883  *   Flow rule attributes.
5884  * @param[in] items
5885  *   Pattern specification (list terminated by the END pattern item).
5886  * @param[in] flow_split_info
5887  *   Pointer to flow split info structure.
5888  * @param[in] fm
5889  *   Pointer to flow meter structure.
5890  * @param[out] error
5891  *   Perform verbose error reporting if not NULL.
5892  * @return
5893  *   0 on success, negative value otherwise
5894  */
5895 static uint32_t
5896 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
5897                         struct rte_flow *flow,
5898                         const struct rte_flow_attr *attr,
5899                         const struct rte_flow_item items[],
5900                         struct mlx5_flow_split_info *flow_split_info,
5901                         struct mlx5_flow_meter_info *fm,
5902                         struct rte_flow_error *error)
5903 {
5904         struct mlx5_flow *dev_flow = NULL;
5905         struct rte_flow_attr drop_attr = *attr;
5906         struct rte_flow_action drop_actions[3];
5907         struct mlx5_flow_split_info drop_split_info = *flow_split_info;
5908
5909         MLX5_ASSERT(fm->drop_cnt);
5910         drop_actions[0].type =
5911                 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
5912         drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
5913         drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
5914         drop_actions[1].conf = NULL;
5915         drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
5916         drop_actions[2].conf = NULL;
5917         drop_split_info.external = false;
5918         drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
5919         drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
5920         drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
5921         return flow_create_split_inner(dev, flow, &dev_flow,
5922                                 &drop_attr, items, drop_actions,
5923                                 &drop_split_info, error);
5924 }
5925
5926 /**
5927  * The splitting for meter feature.
5928  *
5929  * - The meter flow will be split to two flows as prefix and
5930  *   suffix flow. The packets make sense only it pass the prefix
5931  *   meter action.
5932  *
5933  * - Reg_C_5 is used for the packet to match betweend prefix and
5934  *   suffix flow.
5935  *
5936  * @param dev
5937  *   Pointer to Ethernet device.
5938  * @param[in] flow
5939  *   Parent flow structure pointer.
5940  * @param[in] attr
5941  *   Flow rule attributes.
5942  * @param[in] items
5943  *   Pattern specification (list terminated by the END pattern item).
5944  * @param[in] actions
5945  *   Associated actions (list terminated by the END action).
5946  * @param[in] flow_split_info
5947  *   Pointer to flow split info structure.
5948  * @param[out] error
5949  *   Perform verbose error reporting if not NULL.
5950  * @return
5951  *   0 on success, negative value otherwise
5952  */
5953 static int
5954 flow_create_split_meter(struct rte_eth_dev *dev,
5955                         struct rte_flow *flow,
5956                         const struct rte_flow_attr *attr,
5957                         const struct rte_flow_item items[],
5958                         const struct rte_flow_action actions[],
5959                         struct mlx5_flow_split_info *flow_split_info,
5960                         struct rte_flow_error *error)
5961 {
5962         struct mlx5_priv *priv = dev->data->dev_private;
5963         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
5964         struct rte_flow_action *sfx_actions = NULL;
5965         struct rte_flow_action *pre_actions = NULL;
5966         struct rte_flow_item *sfx_items = NULL;
5967         struct mlx5_flow *dev_flow = NULL;
5968         struct rte_flow_attr sfx_attr = *attr;
5969         struct mlx5_flow_meter_info *fm = NULL;
5970         uint8_t skip_scale_restore;
5971         bool has_mtr = false;
5972         bool has_modify = false;
5973         bool set_mtr_reg = true;
5974         bool is_mtr_hierarchy = false;
5975         uint32_t meter_id = 0;
5976         uint32_t mtr_idx = 0;
5977         uint32_t mtr_flow_id = 0;
5978         size_t act_size;
5979         size_t item_size;
5980         int actions_n = 0;
5981         int ret = 0;
5982
5983         if (priv->mtr_en)
5984                 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
5985                                                     &has_modify, &meter_id);
5986         if (has_mtr) {
5987                 if (flow->meter) {
5988                         fm = flow_dv_meter_find_by_idx(priv, flow->meter);
5989                         if (!fm)
5990                                 return rte_flow_error_set(error, EINVAL,
5991                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5992                                                 NULL, "Meter not found.");
5993                 } else {
5994                         fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
5995                         if (!fm)
5996                                 return rte_flow_error_set(error, EINVAL,
5997                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5998                                                 NULL, "Meter not found.");
5999                         ret = mlx5_flow_meter_attach(priv, fm,
6000                                                      &sfx_attr, error);
6001                         if (ret)
6002                                 return -rte_errno;
6003                         flow->meter = mtr_idx;
6004                 }
6005                 MLX5_ASSERT(wks);
6006                 wks->fm = fm;
6007                 if (!fm->def_policy) {
6008                         wks->policy = mlx5_flow_meter_policy_find(dev,
6009                                                                   fm->policy_id,
6010                                                                   NULL);
6011                         MLX5_ASSERT(wks->policy);
6012                         if (wks->policy->is_hierarchy) {
6013                                 wks->final_policy =
6014                                 mlx5_flow_meter_hierarchy_get_final_policy(dev,
6015                                                                 wks->policy);
6016                                 if (!wks->final_policy)
6017                                         return rte_flow_error_set(error,
6018                                         EINVAL,
6019                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6020                                 "Failed to find terminal policy of hierarchy.");
6021                                 is_mtr_hierarchy = true;
6022                         }
6023                 }
6024                 /*
6025                  * If it isn't default-policy Meter, and
6026                  * 1. There's no action in flow to change
6027                  *    packet (modify/encap/decap etc.), OR
6028                  * 2. No drop count needed for this meter.
6029                  * 3. It's not meter hierarchy.
6030                  * Then no need to use regC to save meter id anymore.
6031                  */
6032                 if (!fm->def_policy && !is_mtr_hierarchy &&
6033                     (!has_modify || !fm->drop_cnt))
6034                         set_mtr_reg = false;
6035                 /* Prefix actions: meter, decap, encap, tag, jump, end. */
6036                 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
6037                            sizeof(struct mlx5_rte_flow_action_set_tag);
6038                 /* Suffix items: tag, vlan, port id, end. */
6039 #define METER_SUFFIX_ITEM 4
6040                 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
6041                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6042                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
6043                                           0, SOCKET_ID_ANY);
6044                 if (!sfx_actions)
6045                         return rte_flow_error_set(error, ENOMEM,
6046                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6047                                                   NULL, "no memory to split "
6048                                                   "meter flow");
6049                 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
6050                              act_size);
6051                 /* There's no suffix flow for meter of non-default policy. */
6052                 if (!fm->def_policy)
6053                         pre_actions = sfx_actions + 1;
6054                 else
6055                         pre_actions = sfx_actions + actions_n;
6056                 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr,
6057                                             items, sfx_items, actions,
6058                                             sfx_actions, pre_actions,
6059                                             (set_mtr_reg ? &mtr_flow_id : NULL),
6060                                             error);
6061                 if (ret) {
6062                         ret = -rte_errno;
6063                         goto exit;
6064                 }
6065                 /* Add the prefix subflow. */
6066                 flow_split_info->prefix_mark = 0;
6067                 skip_scale_restore = flow_split_info->skip_scale;
6068                 flow_split_info->skip_scale |=
6069                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6070                 ret = flow_create_split_inner(dev, flow, &dev_flow,
6071                                               attr, items, pre_actions,
6072                                               flow_split_info, error);
6073                 flow_split_info->skip_scale = skip_scale_restore;
6074                 if (ret) {
6075                         if (mtr_flow_id)
6076                                 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
6077                         ret = -rte_errno;
6078                         goto exit;
6079                 }
6080                 if (mtr_flow_id) {
6081                         dev_flow->handle->split_flow_id = mtr_flow_id;
6082                         dev_flow->handle->is_meter_flow_id = 1;
6083                 }
6084                 if (!fm->def_policy) {
6085                         if (!set_mtr_reg && fm->drop_cnt)
6086                                 ret =
6087                         flow_meter_create_drop_flow_with_org_pattern(dev, flow,
6088                                                         &sfx_attr, items,
6089                                                         flow_split_info,
6090                                                         fm, error);
6091                         goto exit;
6092                 }
6093                 /* Setting the sfx group atrr. */
6094                 sfx_attr.group = sfx_attr.transfer ?
6095                                 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
6096                                  MLX5_FLOW_TABLE_LEVEL_METER;
6097                 flow_split_info->prefix_layers =
6098                                 flow_get_prefix_layer_flags(dev_flow);
6099                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6100                 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
6101         }
6102         /* Add the prefix subflow. */
6103         ret = flow_create_split_metadata(dev, flow,
6104                                          &sfx_attr, sfx_items ?
6105                                          sfx_items : items,
6106                                          sfx_actions ? sfx_actions : actions,
6107                                          flow_split_info, error);
6108 exit:
6109         if (sfx_actions)
6110                 mlx5_free(sfx_actions);
6111         return ret;
6112 }
6113
6114 /**
6115  * The splitting for sample feature.
6116  *
6117  * Once Sample action is detected in the action list, the flow actions should
6118  * be split into prefix sub flow and suffix sub flow.
6119  *
6120  * The original items remain in the prefix sub flow, all actions preceding the
6121  * sample action and the sample action itself will be copied to the prefix
6122  * sub flow, the actions following the sample action will be copied to the
6123  * suffix sub flow, Queue action always be located in the suffix sub flow.
6124  *
6125  * In order to make the packet from prefix sub flow matches with suffix sub
6126  * flow, an extra tag action be added into prefix sub flow, and the suffix sub
6127  * flow uses tag item with the unique flow id.
6128  *
6129  * @param dev
6130  *   Pointer to Ethernet device.
6131  * @param[in] flow
6132  *   Parent flow structure pointer.
6133  * @param[in] attr
6134  *   Flow rule attributes.
6135  * @param[in] items
6136  *   Pattern specification (list terminated by the END pattern item).
6137  * @param[in] actions
6138  *   Associated actions (list terminated by the END action).
6139  * @param[in] flow_split_info
6140  *   Pointer to flow split info structure.
6141  * @param[out] error
6142  *   Perform verbose error reporting if not NULL.
6143  * @return
6144  *   0 on success, negative value otherwise
6145  */
6146 static int
6147 flow_create_split_sample(struct rte_eth_dev *dev,
6148                          struct rte_flow *flow,
6149                          const struct rte_flow_attr *attr,
6150                          const struct rte_flow_item items[],
6151                          const struct rte_flow_action actions[],
6152                          struct mlx5_flow_split_info *flow_split_info,
6153                          struct rte_flow_error *error)
6154 {
6155         struct mlx5_priv *priv = dev->data->dev_private;
6156         struct rte_flow_action *sfx_actions = NULL;
6157         struct rte_flow_action *pre_actions = NULL;
6158         struct rte_flow_item *sfx_items = NULL;
6159         struct mlx5_flow *dev_flow = NULL;
6160         struct rte_flow_attr sfx_attr = *attr;
6161 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6162         struct mlx5_flow_dv_sample_resource *sample_res;
6163         struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
6164         struct mlx5_flow_tbl_resource *sfx_tbl;
6165 #endif
6166         size_t act_size;
6167         size_t item_size;
6168         uint32_t fdb_tx = 0;
6169         int32_t tag_id = 0;
6170         int actions_n = 0;
6171         int sample_action_pos;
6172         int qrss_action_pos;
6173         int add_tag = 0;
6174         int modify_after_mirror = 0;
6175         uint16_t jump_table = 0;
6176         const uint32_t next_ft_step = 1;
6177         int ret = 0;
6178
6179         if (priv->sampler_en)
6180                 actions_n = flow_check_match_action(actions, attr,
6181                                         RTE_FLOW_ACTION_TYPE_SAMPLE,
6182                                         &sample_action_pos, &qrss_action_pos,
6183                                         &modify_after_mirror);
6184         if (actions_n) {
6185                 /* The prefix actions must includes sample, tag, end. */
6186                 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
6187                            + sizeof(struct mlx5_rte_flow_action_set_tag);
6188                 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
6189                             sizeof(struct mlx5_rte_flow_item_tag) * 2;
6190                 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
6191                                           item_size), 0, SOCKET_ID_ANY);
6192                 if (!sfx_actions)
6193                         return rte_flow_error_set(error, ENOMEM,
6194                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6195                                                   NULL, "no memory to split "
6196                                                   "sample flow");
6197                 /* The representor_id is UINT16_MAX for uplink. */
6198                 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX);
6199                 /*
6200                  * When reg_c_preserve is set, metadata registers Cx preserve
6201                  * their value even through packet duplication.
6202                  */
6203                 add_tag = (!fdb_tx || priv->config.hca_attr.reg_c_preserve);
6204                 if (add_tag)
6205                         sfx_items = (struct rte_flow_item *)((char *)sfx_actions
6206                                         + act_size);
6207                 if (modify_after_mirror)
6208                         jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
6209                                      next_ft_step;
6210                 pre_actions = sfx_actions + actions_n;
6211                 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
6212                                                 actions, sfx_actions,
6213                                                 pre_actions, actions_n,
6214                                                 sample_action_pos,
6215                                                 qrss_action_pos, jump_table,
6216                                                 error);
6217                 if (tag_id < 0 || (add_tag && !tag_id)) {
6218                         ret = -rte_errno;
6219                         goto exit;
6220                 }
6221                 if (modify_after_mirror)
6222                         flow_split_info->skip_scale =
6223                                         1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6224                 /* Add the prefix subflow. */
6225                 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6226                                               items, pre_actions,
6227                                               flow_split_info, error);
6228                 if (ret) {
6229                         ret = -rte_errno;
6230                         goto exit;
6231                 }
6232                 dev_flow->handle->split_flow_id = tag_id;
6233 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6234                 if (!modify_after_mirror) {
6235                         /* Set the sfx group attr. */
6236                         sample_res = (struct mlx5_flow_dv_sample_resource *)
6237                                                 dev_flow->dv.sample_res;
6238                         sfx_tbl = (struct mlx5_flow_tbl_resource *)
6239                                                 sample_res->normal_path_tbl;
6240                         sfx_tbl_data = container_of(sfx_tbl,
6241                                                 struct mlx5_flow_tbl_data_entry,
6242                                                 tbl);
6243                         sfx_attr.group = sfx_attr.transfer ?
6244                         (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
6245                 } else {
6246                         MLX5_ASSERT(attr->transfer);
6247                         sfx_attr.group = jump_table;
6248                 }
6249                 flow_split_info->prefix_layers =
6250                                 flow_get_prefix_layer_flags(dev_flow);
6251                 flow_split_info->prefix_mark = dev_flow->handle->mark;
6252                 /* Suffix group level already be scaled with factor, set
6253                  * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
6254                  * again in translation.
6255                  */
6256                 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6257 #endif
6258         }
6259         /* Add the suffix subflow. */
6260         ret = flow_create_split_meter(dev, flow, &sfx_attr,
6261                                       sfx_items ? sfx_items : items,
6262                                       sfx_actions ? sfx_actions : actions,
6263                                       flow_split_info, error);
6264 exit:
6265         if (sfx_actions)
6266                 mlx5_free(sfx_actions);
6267         return ret;
6268 }
6269
6270 /**
6271  * Split the flow to subflow set. The splitters might be linked
6272  * in the chain, like this:
6273  * flow_create_split_outer() calls:
6274  *   flow_create_split_meter() calls:
6275  *     flow_create_split_metadata(meter_subflow_0) calls:
6276  *       flow_create_split_inner(metadata_subflow_0)
6277  *       flow_create_split_inner(metadata_subflow_1)
6278  *       flow_create_split_inner(metadata_subflow_2)
6279  *     flow_create_split_metadata(meter_subflow_1) calls:
6280  *       flow_create_split_inner(metadata_subflow_0)
6281  *       flow_create_split_inner(metadata_subflow_1)
6282  *       flow_create_split_inner(metadata_subflow_2)
6283  *
6284  * This provide flexible way to add new levels of flow splitting.
6285  * The all of successfully created subflows are included to the
6286  * parent flow dev_flow list.
6287  *
6288  * @param dev
6289  *   Pointer to Ethernet device.
6290  * @param[in] flow
6291  *   Parent flow structure pointer.
6292  * @param[in] attr
6293  *   Flow rule attributes.
6294  * @param[in] items
6295  *   Pattern specification (list terminated by the END pattern item).
6296  * @param[in] actions
6297  *   Associated actions (list terminated by the END action).
6298  * @param[in] flow_split_info
6299  *   Pointer to flow split info structure.
6300  * @param[out] error
6301  *   Perform verbose error reporting if not NULL.
6302  * @return
6303  *   0 on success, negative value otherwise
6304  */
6305 static int
6306 flow_create_split_outer(struct rte_eth_dev *dev,
6307                         struct rte_flow *flow,
6308                         const struct rte_flow_attr *attr,
6309                         const struct rte_flow_item items[],
6310                         const struct rte_flow_action actions[],
6311                         struct mlx5_flow_split_info *flow_split_info,
6312                         struct rte_flow_error *error)
6313 {
6314         int ret;
6315
6316         ret = flow_create_split_sample(dev, flow, attr, items,
6317                                        actions, flow_split_info, error);
6318         MLX5_ASSERT(ret <= 0);
6319         return ret;
6320 }
6321
6322 static inline struct mlx5_flow_tunnel *
6323 flow_tunnel_from_rule(const struct mlx5_flow *flow)
6324 {
6325         struct mlx5_flow_tunnel *tunnel;
6326
6327 #pragma GCC diagnostic push
6328 #pragma GCC diagnostic ignored "-Wcast-qual"
6329         tunnel = (typeof(tunnel))flow->tunnel;
6330 #pragma GCC diagnostic pop
6331
6332         return tunnel;
6333 }
6334
6335 /**
6336  * Adjust flow RSS workspace if needed.
6337  *
6338  * @param wks
6339  *   Pointer to thread flow work space.
6340  * @param rss_desc
6341  *   Pointer to RSS descriptor.
6342  * @param[in] nrssq_num
6343  *   New RSS queue number.
6344  *
6345  * @return
6346  *   0 on success, -1 otherwise and rte_errno is set.
6347  */
6348 static int
6349 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
6350                           struct mlx5_flow_rss_desc *rss_desc,
6351                           uint32_t nrssq_num)
6352 {
6353         if (likely(nrssq_num <= wks->rssq_num))
6354                 return 0;
6355         rss_desc->queue = realloc(rss_desc->queue,
6356                           sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
6357         if (!rss_desc->queue) {
6358                 rte_errno = ENOMEM;
6359                 return -1;
6360         }
6361         wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
6362         return 0;
6363 }
6364
6365 /**
6366  * Create a flow and add it to @p list.
6367  *
6368  * @param dev
6369  *   Pointer to Ethernet device.
6370  * @param list
6371  *   Pointer to a TAILQ flow list. If this parameter NULL,
6372  *   no list insertion occurred, flow is just created,
6373  *   this is caller's responsibility to track the
6374  *   created flow.
6375  * @param[in] attr
6376  *   Flow rule attributes.
6377  * @param[in] items
6378  *   Pattern specification (list terminated by the END pattern item).
6379  * @param[in] actions
6380  *   Associated actions (list terminated by the END action).
6381  * @param[in] external
6382  *   This flow rule is created by request external to PMD.
6383  * @param[out] error
6384  *   Perform verbose error reporting if not NULL.
6385  *
6386  * @return
6387  *   A flow index on success, 0 otherwise and rte_errno is set.
6388  */
6389 static uint32_t
6390 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6391                  const struct rte_flow_attr *attr,
6392                  const struct rte_flow_item items[],
6393                  const struct rte_flow_action original_actions[],
6394                  bool external, struct rte_flow_error *error)
6395 {
6396         struct mlx5_priv *priv = dev->data->dev_private;
6397         struct rte_flow *flow = NULL;
6398         struct mlx5_flow *dev_flow;
6399         const struct rte_flow_action_rss *rss = NULL;
6400         struct mlx5_translated_action_handle
6401                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6402         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6403         union {
6404                 struct mlx5_flow_expand_rss buf;
6405                 uint8_t buffer[4096];
6406         } expand_buffer;
6407         union {
6408                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6409                 uint8_t buffer[2048];
6410         } actions_rx;
6411         union {
6412                 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6413                 uint8_t buffer[2048];
6414         } actions_hairpin_tx;
6415         union {
6416                 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6417                 uint8_t buffer[2048];
6418         } items_tx;
6419         struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6420         struct mlx5_flow_rss_desc *rss_desc;
6421         const struct rte_flow_action *p_actions_rx;
6422         uint32_t i;
6423         uint32_t idx = 0;
6424         int hairpin_flow;
6425         struct rte_flow_attr attr_tx = { .priority = 0 };
6426         const struct rte_flow_action *actions;
6427         struct rte_flow_action *translated_actions = NULL;
6428         struct mlx5_flow_tunnel *tunnel;
6429         struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6430         struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6431         struct mlx5_flow_split_info flow_split_info = {
6432                 .external = !!external,
6433                 .skip_scale = 0,
6434                 .flow_idx = 0,
6435                 .prefix_mark = 0,
6436                 .prefix_layers = 0,
6437                 .table_id = 0
6438         };
6439         int ret;
6440
6441         MLX5_ASSERT(wks);
6442         rss_desc = &wks->rss_desc;
6443         ret = flow_action_handles_translate(dev, original_actions,
6444                                             indir_actions,
6445                                             &indir_actions_n,
6446                                             &translated_actions, error);
6447         if (ret < 0) {
6448                 MLX5_ASSERT(translated_actions == NULL);
6449                 return 0;
6450         }
6451         actions = translated_actions ? translated_actions : original_actions;
6452         p_actions_rx = actions;
6453         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6454         ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6455                                 external, hairpin_flow, error);
6456         if (ret < 0)
6457                 goto error_before_hairpin_split;
6458         flow = mlx5_ipool_zmalloc(priv->flows[type], &idx);
6459         if (!flow) {
6460                 rte_errno = ENOMEM;
6461                 goto error_before_hairpin_split;
6462         }
6463         if (hairpin_flow > 0) {
6464                 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6465                         rte_errno = EINVAL;
6466                         goto error_before_hairpin_split;
6467                 }
6468                 flow_hairpin_split(dev, actions, actions_rx.actions,
6469                                    actions_hairpin_tx.actions, items_tx.items,
6470                                    idx);
6471                 p_actions_rx = actions_rx.actions;
6472         }
6473         flow_split_info.flow_idx = idx;
6474         flow->drv_type = flow_get_drv_type(dev, attr);
6475         MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6476                     flow->drv_type < MLX5_FLOW_TYPE_MAX);
6477         memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6478         /* RSS Action only works on NIC RX domain */
6479         if (attr->ingress && !attr->transfer)
6480                 rss = flow_get_rss_action(dev, p_actions_rx);
6481         if (rss) {
6482                 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6483                         return 0;
6484                 /*
6485                  * The following information is required by
6486                  * mlx5_flow_hashfields_adjust() in advance.
6487                  */
6488                 rss_desc->level = rss->level;
6489                 /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
6490                 rss_desc->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
6491         }
6492         flow->dev_handles = 0;
6493         if (rss && rss->types) {
6494                 unsigned int graph_root;
6495
6496                 graph_root = find_graph_root(rss->level);
6497                 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6498                                            items, rss->types,
6499                                            mlx5_support_expansion, graph_root);
6500                 MLX5_ASSERT(ret > 0 &&
6501                        (unsigned int)ret < sizeof(expand_buffer.buffer));
6502                 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) {
6503                         for (i = 0; i < buf->entries; ++i)
6504                                 mlx5_dbg__print_pattern(buf->entry[i].pattern);
6505                 }
6506         } else {
6507                 buf->entries = 1;
6508                 buf->entry[0].pattern = (void *)(uintptr_t)items;
6509         }
6510         rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6511                                                       indir_actions_n);
6512         for (i = 0; i < buf->entries; ++i) {
6513                 /* Initialize flow split data. */
6514                 flow_split_info.prefix_layers = 0;
6515                 flow_split_info.prefix_mark = 0;
6516                 flow_split_info.skip_scale = 0;
6517                 /*
6518                  * The splitter may create multiple dev_flows,
6519                  * depending on configuration. In the simplest
6520                  * case it just creates unmodified original flow.
6521                  */
6522                 ret = flow_create_split_outer(dev, flow, attr,
6523                                               buf->entry[i].pattern,
6524                                               p_actions_rx, &flow_split_info,
6525                                               error);
6526                 if (ret < 0)
6527                         goto error;
6528                 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) {
6529                         ret = flow_tunnel_add_default_miss(dev, flow, attr,
6530                                                            p_actions_rx,
6531                                                            idx,
6532                                                            wks->flows[0].tunnel,
6533                                                            &default_miss_ctx,
6534                                                            error);
6535                         if (ret < 0) {
6536                                 mlx5_free(default_miss_ctx.queue);
6537                                 goto error;
6538                         }
6539                 }
6540         }
6541         /* Create the tx flow. */
6542         if (hairpin_flow) {
6543                 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6544                 attr_tx.ingress = 0;
6545                 attr_tx.egress = 1;
6546                 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6547                                          actions_hairpin_tx.actions,
6548                                          idx, error);
6549                 if (!dev_flow)
6550                         goto error;
6551                 dev_flow->flow = flow;
6552                 dev_flow->external = 0;
6553                 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6554                               dev_flow->handle, next);
6555                 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6556                                          items_tx.items,
6557                                          actions_hairpin_tx.actions, error);
6558                 if (ret < 0)
6559                         goto error;
6560         }
6561         /*
6562          * Update the metadata register copy table. If extensive
6563          * metadata feature is enabled and registers are supported
6564          * we might create the extra rte_flow for each unique
6565          * MARK/FLAG action ID.
6566          *
6567          * The table is updated for ingress Flows only, because
6568          * the egress Flows belong to the different device and
6569          * copy table should be updated in peer NIC Rx domain.
6570          */
6571         if (attr->ingress &&
6572             (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6573                 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6574                 if (ret)
6575                         goto error;
6576         }
6577         /*
6578          * If the flow is external (from application) OR device is started,
6579          * OR mreg discover, then apply immediately.
6580          */
6581         if (external || dev->data->dev_started ||
6582             (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6583              attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6584                 ret = flow_drv_apply(dev, flow, error);
6585                 if (ret < 0)
6586                         goto error;
6587         }
6588         flow->type = type;
6589         flow_rxq_flags_set(dev, flow);
6590         rte_free(translated_actions);
6591         tunnel = flow_tunnel_from_rule(wks->flows);
6592         if (tunnel) {
6593                 flow->tunnel = 1;
6594                 flow->tunnel_id = tunnel->tunnel_id;
6595                 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6596                 mlx5_free(default_miss_ctx.queue);
6597         }
6598         mlx5_flow_pop_thread_workspace();
6599         return idx;
6600 error:
6601         MLX5_ASSERT(flow);
6602         ret = rte_errno; /* Save rte_errno before cleanup. */
6603         flow_mreg_del_copy_action(dev, flow);
6604         flow_drv_destroy(dev, flow);
6605         if (rss_desc->shared_rss)
6606                 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6607                         mlx5_ipool_get
6608                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6609                         rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6610         mlx5_ipool_free(priv->flows[type], idx);
6611         rte_errno = ret; /* Restore rte_errno. */
6612         ret = rte_errno;
6613         rte_errno = ret;
6614         mlx5_flow_pop_thread_workspace();
6615 error_before_hairpin_split:
6616         rte_free(translated_actions);
6617         return 0;
6618 }
6619
6620 /**
6621  * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6622  * incoming packets to table 1.
6623  *
6624  * Other flow rules, requested for group n, will be created in
6625  * e-switch table n+1.
6626  * Jump action to e-switch group n will be created to group n+1.
6627  *
6628  * Used when working in switchdev mode, to utilise advantages of table 1
6629  * and above.
6630  *
6631  * @param dev
6632  *   Pointer to Ethernet device.
6633  *
6634  * @return
6635  *   Pointer to flow on success, NULL otherwise and rte_errno is set.
6636  */
6637 struct rte_flow *
6638 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6639 {
6640         const struct rte_flow_attr attr = {
6641                 .group = 0,
6642                 .priority = 0,
6643                 .ingress = 1,
6644                 .egress = 0,
6645                 .transfer = 1,
6646         };
6647         const struct rte_flow_item pattern = {
6648                 .type = RTE_FLOW_ITEM_TYPE_END,
6649         };
6650         struct rte_flow_action_jump jump = {
6651                 .group = 1,
6652         };
6653         const struct rte_flow_action actions[] = {
6654                 {
6655                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6656                         .conf = &jump,
6657                 },
6658                 {
6659                         .type = RTE_FLOW_ACTION_TYPE_END,
6660                 },
6661         };
6662         struct rte_flow_error error;
6663
6664         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6665                                                    &attr, &pattern,
6666                                                    actions, false, &error);
6667 }
6668
6669 /**
6670  * Create a dedicated flow rule on e-switch table 1, matches ESW manager
6671  * and sq number, directs all packets to peer vport.
6672  *
6673  * @param dev
6674  *   Pointer to Ethernet device.
6675  * @param txq
6676  *   Txq index.
6677  *
6678  * @return
6679  *   Flow ID on success, 0 otherwise and rte_errno is set.
6680  */
6681 uint32_t
6682 mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev, uint32_t txq)
6683 {
6684         struct rte_flow_attr attr = {
6685                 .group = 0,
6686                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6687                 .ingress = 1,
6688                 .egress = 0,
6689                 .transfer = 1,
6690         };
6691         struct rte_flow_item_port_id port_spec = {
6692                 .id = MLX5_PORT_ESW_MGR,
6693         };
6694         struct mlx5_rte_flow_item_tx_queue txq_spec = {
6695                 .queue = txq,
6696         };
6697         struct rte_flow_item pattern[] = {
6698                 {
6699                         .type = RTE_FLOW_ITEM_TYPE_PORT_ID,
6700                         .spec = &port_spec,
6701                 },
6702                 {
6703                         .type = (enum rte_flow_item_type)
6704                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6705                         .spec = &txq_spec,
6706                 },
6707                 {
6708                         .type = RTE_FLOW_ITEM_TYPE_END,
6709                 },
6710         };
6711         struct rte_flow_action_jump jump = {
6712                 .group = 1,
6713         };
6714         struct rte_flow_action_port_id port = {
6715                 .id = dev->data->port_id,
6716         };
6717         struct rte_flow_action actions[] = {
6718                 {
6719                         .type = RTE_FLOW_ACTION_TYPE_JUMP,
6720                         .conf = &jump,
6721                 },
6722                 {
6723                         .type = RTE_FLOW_ACTION_TYPE_END,
6724                 },
6725         };
6726         struct rte_flow_error error;
6727
6728         /*
6729          * Creates group 0, highest priority jump flow.
6730          * Matches txq to bypass kernel packets.
6731          */
6732         if (flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern, actions,
6733                              false, &error) == 0)
6734                 return 0;
6735         /* Create group 1, lowest priority redirect flow for txq. */
6736         attr.group = 1;
6737         actions[0].conf = &port;
6738         actions[0].type = RTE_FLOW_ACTION_TYPE_PORT_ID;
6739         return flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern,
6740                                 actions, false, &error);
6741 }
6742
6743 /**
6744  * Validate a flow supported by the NIC.
6745  *
6746  * @see rte_flow_validate()
6747  * @see rte_flow_ops
6748  */
6749 int
6750 mlx5_flow_validate(struct rte_eth_dev *dev,
6751                    const struct rte_flow_attr *attr,
6752                    const struct rte_flow_item items[],
6753                    const struct rte_flow_action original_actions[],
6754                    struct rte_flow_error *error)
6755 {
6756         int hairpin_flow;
6757         struct mlx5_translated_action_handle
6758                 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6759         int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6760         const struct rte_flow_action *actions;
6761         struct rte_flow_action *translated_actions = NULL;
6762         int ret = flow_action_handles_translate(dev, original_actions,
6763                                                 indir_actions,
6764                                                 &indir_actions_n,
6765                                                 &translated_actions, error);
6766
6767         if (ret)
6768                 return ret;
6769         actions = translated_actions ? translated_actions : original_actions;
6770         hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6771         ret = flow_drv_validate(dev, attr, items, actions,
6772                                 true, hairpin_flow, error);
6773         rte_free(translated_actions);
6774         return ret;
6775 }
6776
6777 /**
6778  * Create a flow.
6779  *
6780  * @see rte_flow_create()
6781  * @see rte_flow_ops
6782  */
6783 struct rte_flow *
6784 mlx5_flow_create(struct rte_eth_dev *dev,
6785                  const struct rte_flow_attr *attr,
6786                  const struct rte_flow_item items[],
6787                  const struct rte_flow_action actions[],
6788                  struct rte_flow_error *error)
6789 {
6790         /*
6791          * If the device is not started yet, it is not allowed to created a
6792          * flow from application. PMD default flows and traffic control flows
6793          * are not affected.
6794          */
6795         if (unlikely(!dev->data->dev_started)) {
6796                 DRV_LOG(DEBUG, "port %u is not started when "
6797                         "inserting a flow", dev->data->port_id);
6798                 rte_flow_error_set(error, ENODEV,
6799                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6800                                    NULL,
6801                                    "port not started");
6802                 return NULL;
6803         }
6804
6805         return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN,
6806                                                    attr, items, actions,
6807                                                    true, error);
6808 }
6809
6810 /**
6811  * Destroy a flow in a list.
6812  *
6813  * @param dev
6814  *   Pointer to Ethernet device.
6815  * @param[in] flow_idx
6816  *   Index of flow to destroy.
6817  */
6818 static void
6819 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6820                   uint32_t flow_idx)
6821 {
6822         struct mlx5_priv *priv = dev->data->dev_private;
6823         struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx);
6824
6825         if (!flow)
6826                 return;
6827         MLX5_ASSERT(flow->type == type);
6828         /*
6829          * Update RX queue flags only if port is started, otherwise it is
6830          * already clean.
6831          */
6832         if (dev->data->dev_started)
6833                 flow_rxq_flags_trim(dev, flow);
6834         flow_drv_destroy(dev, flow);
6835         if (flow->tunnel) {
6836                 struct mlx5_flow_tunnel *tunnel;
6837
6838                 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6839                 RTE_VERIFY(tunnel);
6840                 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6841                         mlx5_flow_tunnel_free(dev, tunnel);
6842         }
6843         flow_mreg_del_copy_action(dev, flow);
6844         mlx5_ipool_free(priv->flows[type], flow_idx);
6845 }
6846
6847 /**
6848  * Destroy all flows.
6849  *
6850  * @param dev
6851  *   Pointer to Ethernet device.
6852  * @param type
6853  *   Flow type to be flushed.
6854  * @param active
6855  *   If flushing is called avtively.
6856  */
6857 void
6858 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6859                      bool active)
6860 {
6861         struct mlx5_priv *priv = dev->data->dev_private;
6862         uint32_t num_flushed = 0, fidx = 1;
6863         struct rte_flow *flow;
6864
6865         MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) {
6866                 flow_list_destroy(dev, type, fidx);
6867                 num_flushed++;
6868         }
6869         if (active) {
6870                 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
6871                         dev->data->port_id, num_flushed);
6872         }
6873 }
6874
6875 /**
6876  * Stop all default actions for flows.
6877  *
6878  * @param dev
6879  *   Pointer to Ethernet device.
6880  */
6881 void
6882 mlx5_flow_stop_default(struct rte_eth_dev *dev)
6883 {
6884         flow_mreg_del_default_copy_action(dev);
6885         flow_rxq_flags_clear(dev);
6886 }
6887
6888 /**
6889  * Start all default actions for flows.
6890  *
6891  * @param dev
6892  *   Pointer to Ethernet device.
6893  * @return
6894  *   0 on success, a negative errno value otherwise and rte_errno is set.
6895  */
6896 int
6897 mlx5_flow_start_default(struct rte_eth_dev *dev)
6898 {
6899         struct rte_flow_error error;
6900
6901         /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
6902         return flow_mreg_add_default_copy_action(dev, &error);
6903 }
6904
6905 /**
6906  * Release key of thread specific flow workspace data.
6907  */
6908 void
6909 flow_release_workspace(void *data)
6910 {
6911         struct mlx5_flow_workspace *wks = data;
6912         struct mlx5_flow_workspace *next;
6913
6914         while (wks) {
6915                 next = wks->next;
6916                 free(wks->rss_desc.queue);
6917                 free(wks);
6918                 wks = next;
6919         }
6920 }
6921
6922 /**
6923  * Get thread specific current flow workspace.
6924  *
6925  * @return pointer to thread specific flow workspace data, NULL on error.
6926  */
6927 struct mlx5_flow_workspace*
6928 mlx5_flow_get_thread_workspace(void)
6929 {
6930         struct mlx5_flow_workspace *data;
6931
6932         data = mlx5_flow_os_get_specific_workspace();
6933         MLX5_ASSERT(data && data->inuse);
6934         if (!data || !data->inuse)
6935                 DRV_LOG(ERR, "flow workspace not initialized.");
6936         return data;
6937 }
6938
6939 /**
6940  * Allocate and init new flow workspace.
6941  *
6942  * @return pointer to flow workspace data, NULL on error.
6943  */
6944 static struct mlx5_flow_workspace*
6945 flow_alloc_thread_workspace(void)
6946 {
6947         struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
6948
6949         if (!data) {
6950                 DRV_LOG(ERR, "Failed to allocate flow workspace "
6951                         "memory.");
6952                 return NULL;
6953         }
6954         data->rss_desc.queue = calloc(1,
6955                         sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
6956         if (!data->rss_desc.queue)
6957                 goto err;
6958         data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
6959         return data;
6960 err:
6961         if (data->rss_desc.queue)
6962                 free(data->rss_desc.queue);
6963         free(data);
6964         return NULL;
6965 }
6966
6967 /**
6968  * Get new thread specific flow workspace.
6969  *
6970  * If current workspace inuse, create new one and set as current.
6971  *
6972  * @return pointer to thread specific flow workspace data, NULL on error.
6973  */
6974 static struct mlx5_flow_workspace*
6975 mlx5_flow_push_thread_workspace(void)
6976 {
6977         struct mlx5_flow_workspace *curr;
6978         struct mlx5_flow_workspace *data;
6979
6980         curr = mlx5_flow_os_get_specific_workspace();
6981         if (!curr) {
6982                 data = flow_alloc_thread_workspace();
6983                 if (!data)
6984                         return NULL;
6985         } else if (!curr->inuse) {
6986                 data = curr;
6987         } else if (curr->next) {
6988                 data = curr->next;
6989         } else {
6990                 data = flow_alloc_thread_workspace();
6991                 if (!data)
6992                         return NULL;
6993                 curr->next = data;
6994                 data->prev = curr;
6995         }
6996         data->inuse = 1;
6997         data->flow_idx = 0;
6998         /* Set as current workspace */
6999         if (mlx5_flow_os_set_specific_workspace(data))
7000                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
7001         return data;
7002 }
7003
7004 /**
7005  * Close current thread specific flow workspace.
7006  *
7007  * If previous workspace available, set it as current.
7008  *
7009  * @return pointer to thread specific flow workspace data, NULL on error.
7010  */
7011 static void
7012 mlx5_flow_pop_thread_workspace(void)
7013 {
7014         struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
7015
7016         if (!data)
7017                 return;
7018         if (!data->inuse) {
7019                 DRV_LOG(ERR, "Failed to close unused flow workspace.");
7020                 return;
7021         }
7022         data->inuse = 0;
7023         if (!data->prev)
7024                 return;
7025         if (mlx5_flow_os_set_specific_workspace(data->prev))
7026                 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
7027 }
7028
7029 /**
7030  * Verify the flow list is empty
7031  *
7032  * @param dev
7033  *  Pointer to Ethernet device.
7034  *
7035  * @return the number of flows not released.
7036  */
7037 int
7038 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused)
7039 {
7040         struct mlx5_priv *priv = dev->data->dev_private;
7041         struct rte_flow *flow;
7042         uint32_t idx = 0;
7043         int ret = 0, i;
7044
7045         for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
7046                 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) {
7047                         DRV_LOG(DEBUG, "port %u flow %p still referenced",
7048                                 dev->data->port_id, (void *)flow);
7049                         ret++;
7050                 }
7051         }
7052         return ret;
7053 }
7054
7055 /**
7056  * Enable default hairpin egress flow.
7057  *
7058  * @param dev
7059  *   Pointer to Ethernet device.
7060  * @param queue
7061  *   The queue index.
7062  *
7063  * @return
7064  *   0 on success, a negative errno value otherwise and rte_errno is set.
7065  */
7066 int
7067 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
7068                             uint32_t queue)
7069 {
7070         const struct rte_flow_attr attr = {
7071                 .egress = 1,
7072                 .priority = 0,
7073         };
7074         struct mlx5_rte_flow_item_tx_queue queue_spec = {
7075                 .queue = queue,
7076         };
7077         struct mlx5_rte_flow_item_tx_queue queue_mask = {
7078                 .queue = UINT32_MAX,
7079         };
7080         struct rte_flow_item items[] = {
7081                 {
7082                         .type = (enum rte_flow_item_type)
7083                                 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
7084                         .spec = &queue_spec,
7085                         .last = NULL,
7086                         .mask = &queue_mask,
7087                 },
7088                 {
7089                         .type = RTE_FLOW_ITEM_TYPE_END,
7090                 },
7091         };
7092         struct rte_flow_action_jump jump = {
7093                 .group = MLX5_HAIRPIN_TX_TABLE,
7094         };
7095         struct rte_flow_action actions[2];
7096         uint32_t flow_idx;
7097         struct rte_flow_error error;
7098
7099         actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
7100         actions[0].conf = &jump;
7101         actions[1].type = RTE_FLOW_ACTION_TYPE_END;
7102         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7103                                     &attr, items, actions, false, &error);
7104         if (!flow_idx) {
7105                 DRV_LOG(DEBUG,
7106                         "Failed to create ctrl flow: rte_errno(%d),"
7107                         " type(%d), message(%s)",
7108                         rte_errno, error.type,
7109                         error.message ? error.message : " (no stated reason)");
7110                 return -rte_errno;
7111         }
7112         return 0;
7113 }
7114
7115 /**
7116  * Enable a control flow configured from the control plane.
7117  *
7118  * @param dev
7119  *   Pointer to Ethernet device.
7120  * @param eth_spec
7121  *   An Ethernet flow spec to apply.
7122  * @param eth_mask
7123  *   An Ethernet flow mask to apply.
7124  * @param vlan_spec
7125  *   A VLAN flow spec to apply.
7126  * @param vlan_mask
7127  *   A VLAN flow mask to apply.
7128  *
7129  * @return
7130  *   0 on success, a negative errno value otherwise and rte_errno is set.
7131  */
7132 int
7133 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
7134                     struct rte_flow_item_eth *eth_spec,
7135                     struct rte_flow_item_eth *eth_mask,
7136                     struct rte_flow_item_vlan *vlan_spec,
7137                     struct rte_flow_item_vlan *vlan_mask)
7138 {
7139         struct mlx5_priv *priv = dev->data->dev_private;
7140         const struct rte_flow_attr attr = {
7141                 .ingress = 1,
7142                 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7143         };
7144         struct rte_flow_item items[] = {
7145                 {
7146                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7147                         .spec = eth_spec,
7148                         .last = NULL,
7149                         .mask = eth_mask,
7150                 },
7151                 {
7152                         .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
7153                                               RTE_FLOW_ITEM_TYPE_END,
7154                         .spec = vlan_spec,
7155                         .last = NULL,
7156                         .mask = vlan_mask,
7157                 },
7158                 {
7159                         .type = RTE_FLOW_ITEM_TYPE_END,
7160                 },
7161         };
7162         uint16_t queue[priv->reta_idx_n];
7163         struct rte_flow_action_rss action_rss = {
7164                 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
7165                 .level = 0,
7166                 .types = priv->rss_conf.rss_hf,
7167                 .key_len = priv->rss_conf.rss_key_len,
7168                 .queue_num = priv->reta_idx_n,
7169                 .key = priv->rss_conf.rss_key,
7170                 .queue = queue,
7171         };
7172         struct rte_flow_action actions[] = {
7173                 {
7174                         .type = RTE_FLOW_ACTION_TYPE_RSS,
7175                         .conf = &action_rss,
7176                 },
7177                 {
7178                         .type = RTE_FLOW_ACTION_TYPE_END,
7179                 },
7180         };
7181         uint32_t flow_idx;
7182         struct rte_flow_error error;
7183         unsigned int i;
7184
7185         if (!priv->reta_idx_n || !priv->rxqs_n) {
7186                 return 0;
7187         }
7188         if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG))
7189                 action_rss.types = 0;
7190         for (i = 0; i != priv->reta_idx_n; ++i)
7191                 queue[i] = (*priv->reta_idx)[i];
7192         flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7193                                     &attr, items, actions, false, &error);
7194         if (!flow_idx)
7195                 return -rte_errno;
7196         return 0;
7197 }
7198
7199 /**
7200  * Enable a flow control configured from the control plane.
7201  *
7202  * @param dev
7203  *   Pointer to Ethernet device.
7204  * @param eth_spec
7205  *   An Ethernet flow spec to apply.
7206  * @param eth_mask
7207  *   An Ethernet flow mask to apply.
7208  *
7209  * @return
7210  *   0 on success, a negative errno value otherwise and rte_errno is set.
7211  */
7212 int
7213 mlx5_ctrl_flow(struct rte_eth_dev *dev,
7214                struct rte_flow_item_eth *eth_spec,
7215                struct rte_flow_item_eth *eth_mask)
7216 {
7217         return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
7218 }
7219
7220 /**
7221  * Create default miss flow rule matching lacp traffic
7222  *
7223  * @param dev
7224  *   Pointer to Ethernet device.
7225  * @param eth_spec
7226  *   An Ethernet flow spec to apply.
7227  *
7228  * @return
7229  *   0 on success, a negative errno value otherwise and rte_errno is set.
7230  */
7231 int
7232 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
7233 {
7234         /*
7235          * The LACP matching is done by only using ether type since using
7236          * a multicast dst mac causes kernel to give low priority to this flow.
7237          */
7238         static const struct rte_flow_item_eth lacp_spec = {
7239                 .type = RTE_BE16(0x8809),
7240         };
7241         static const struct rte_flow_item_eth lacp_mask = {
7242                 .type = 0xffff,
7243         };
7244         const struct rte_flow_attr attr = {
7245                 .ingress = 1,
7246         };
7247         struct rte_flow_item items[] = {
7248                 {
7249                         .type = RTE_FLOW_ITEM_TYPE_ETH,
7250                         .spec = &lacp_spec,
7251                         .mask = &lacp_mask,
7252                 },
7253                 {
7254                         .type = RTE_FLOW_ITEM_TYPE_END,
7255                 },
7256         };
7257         struct rte_flow_action actions[] = {
7258                 {
7259                         .type = (enum rte_flow_action_type)
7260                                 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
7261                 },
7262                 {
7263                         .type = RTE_FLOW_ACTION_TYPE_END,
7264                 },
7265         };
7266         struct rte_flow_error error;
7267         uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7268                                         &attr, items, actions,
7269                                         false, &error);
7270
7271         if (!flow_idx)
7272                 return -rte_errno;
7273         return 0;
7274 }
7275
7276 /**
7277  * Destroy a flow.
7278  *
7279  * @see rte_flow_destroy()
7280  * @see rte_flow_ops
7281  */
7282 int
7283 mlx5_flow_destroy(struct rte_eth_dev *dev,
7284                   struct rte_flow *flow,
7285                   struct rte_flow_error *error __rte_unused)
7286 {
7287         flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN,
7288                                 (uintptr_t)(void *)flow);
7289         return 0;
7290 }
7291
7292 /**
7293  * Destroy all flows.
7294  *
7295  * @see rte_flow_flush()
7296  * @see rte_flow_ops
7297  */
7298 int
7299 mlx5_flow_flush(struct rte_eth_dev *dev,
7300                 struct rte_flow_error *error __rte_unused)
7301 {
7302         mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false);
7303         return 0;
7304 }
7305
7306 /**
7307  * Isolated mode.
7308  *
7309  * @see rte_flow_isolate()
7310  * @see rte_flow_ops
7311  */
7312 int
7313 mlx5_flow_isolate(struct rte_eth_dev *dev,
7314                   int enable,
7315                   struct rte_flow_error *error)
7316 {
7317         struct mlx5_priv *priv = dev->data->dev_private;
7318
7319         if (dev->data->dev_started) {
7320                 rte_flow_error_set(error, EBUSY,
7321                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7322                                    NULL,
7323                                    "port must be stopped first");
7324                 return -rte_errno;
7325         }
7326         priv->isolated = !!enable;
7327         if (enable)
7328                 dev->dev_ops = &mlx5_dev_ops_isolate;
7329         else
7330                 dev->dev_ops = &mlx5_dev_ops;
7331
7332         dev->rx_descriptor_status = mlx5_rx_descriptor_status;
7333         dev->tx_descriptor_status = mlx5_tx_descriptor_status;
7334
7335         return 0;
7336 }
7337
7338 /**
7339  * Query a flow.
7340  *
7341  * @see rte_flow_query()
7342  * @see rte_flow_ops
7343  */
7344 static int
7345 flow_drv_query(struct rte_eth_dev *dev,
7346                uint32_t flow_idx,
7347                const struct rte_flow_action *actions,
7348                void *data,
7349                struct rte_flow_error *error)
7350 {
7351         struct mlx5_priv *priv = dev->data->dev_private;
7352         const struct mlx5_flow_driver_ops *fops;
7353         struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
7354                                                flow_idx);
7355         enum mlx5_flow_drv_type ftype;
7356
7357         if (!flow) {
7358                 return rte_flow_error_set(error, ENOENT,
7359                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7360                           NULL,
7361                           "invalid flow handle");
7362         }
7363         ftype = flow->drv_type;
7364         MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
7365         fops = flow_get_drv_ops(ftype);
7366
7367         return fops->query(dev, flow, actions, data, error);
7368 }
7369
7370 /**
7371  * Query a flow.
7372  *
7373  * @see rte_flow_query()
7374  * @see rte_flow_ops
7375  */
7376 int
7377 mlx5_flow_query(struct rte_eth_dev *dev,
7378                 struct rte_flow *flow,
7379                 const struct rte_flow_action *actions,
7380                 void *data,
7381                 struct rte_flow_error *error)
7382 {
7383         int ret;
7384
7385         ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
7386                              error);
7387         if (ret < 0)
7388                 return ret;
7389         return 0;
7390 }
7391
7392 /**
7393  * Get rte_flow callbacks.
7394  *
7395  * @param dev
7396  *   Pointer to Ethernet device structure.
7397  * @param ops
7398  *   Pointer to operation-specific structure.
7399  *
7400  * @return 0
7401  */
7402 int
7403 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
7404                   const struct rte_flow_ops **ops)
7405 {
7406         *ops = &mlx5_flow_ops;
7407         return 0;
7408 }
7409
7410 /**
7411  * Validate meter policy actions.
7412  * Dispatcher for action type specific validation.
7413  *
7414  * @param[in] dev
7415  *   Pointer to the Ethernet device structure.
7416  * @param[in] action
7417  *   The meter policy action object to validate.
7418  * @param[in] attr
7419  *   Attributes of flow to determine steering domain.
7420  * @param[out] is_rss
7421  *   Is RSS or not.
7422  * @param[out] domain_bitmap
7423  *   Domain bitmap.
7424  * @param[out] is_def_policy
7425  *   Is default policy or not.
7426  * @param[out] error
7427  *   Perform verbose error reporting if not NULL. Initialized in case of
7428  *   error only.
7429  *
7430  * @return
7431  *   0 on success, otherwise negative errno value.
7432  */
7433 int
7434 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
7435                         const struct rte_flow_action *actions[RTE_COLORS],
7436                         struct rte_flow_attr *attr,
7437                         bool *is_rss,
7438                         uint8_t *domain_bitmap,
7439                         uint8_t *policy_mode,
7440                         struct rte_mtr_error *error)
7441 {
7442         const struct mlx5_flow_driver_ops *fops;
7443
7444         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7445         return fops->validate_mtr_acts(dev, actions, attr, is_rss,
7446                                        domain_bitmap, policy_mode, error);
7447 }
7448
7449 /**
7450  * Destroy the meter table set.
7451  *
7452  * @param[in] dev
7453  *   Pointer to Ethernet device.
7454  * @param[in] mtr_policy
7455  *   Meter policy struct.
7456  */
7457 void
7458 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7459                       struct mlx5_flow_meter_policy *mtr_policy)
7460 {
7461         const struct mlx5_flow_driver_ops *fops;
7462
7463         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7464         fops->destroy_mtr_acts(dev, mtr_policy);
7465 }
7466
7467 /**
7468  * Create policy action, lock free,
7469  * (mutex should be acquired by caller).
7470  * Dispatcher for action type specific call.
7471  *
7472  * @param[in] dev
7473  *   Pointer to the Ethernet device structure.
7474  * @param[in] mtr_policy
7475  *   Meter policy struct.
7476  * @param[in] action
7477  *   Action specification used to create meter actions.
7478  * @param[out] error
7479  *   Perform verbose error reporting if not NULL. Initialized in case of
7480  *   error only.
7481  *
7482  * @return
7483  *   0 on success, otherwise negative errno value.
7484  */
7485 int
7486 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7487                       struct mlx5_flow_meter_policy *mtr_policy,
7488                       const struct rte_flow_action *actions[RTE_COLORS],
7489                       struct rte_mtr_error *error)
7490 {
7491         const struct mlx5_flow_driver_ops *fops;
7492
7493         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7494         return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7495 }
7496
7497 /**
7498  * Create policy rules, lock free,
7499  * (mutex should be acquired by caller).
7500  * Dispatcher for action type specific call.
7501  *
7502  * @param[in] dev
7503  *   Pointer to the Ethernet device structure.
7504  * @param[in] mtr_policy
7505  *   Meter policy struct.
7506  *
7507  * @return
7508  *   0 on success, -1 otherwise.
7509  */
7510 int
7511 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7512                              struct mlx5_flow_meter_policy *mtr_policy)
7513 {
7514         const struct mlx5_flow_driver_ops *fops;
7515
7516         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7517         return fops->create_policy_rules(dev, mtr_policy);
7518 }
7519
7520 /**
7521  * Destroy policy rules, lock free,
7522  * (mutex should be acquired by caller).
7523  * Dispatcher for action type specific call.
7524  *
7525  * @param[in] dev
7526  *   Pointer to the Ethernet device structure.
7527  * @param[in] mtr_policy
7528  *   Meter policy struct.
7529  */
7530 void
7531 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7532                              struct mlx5_flow_meter_policy *mtr_policy)
7533 {
7534         const struct mlx5_flow_driver_ops *fops;
7535
7536         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7537         fops->destroy_policy_rules(dev, mtr_policy);
7538 }
7539
7540 /**
7541  * Destroy the default policy table set.
7542  *
7543  * @param[in] dev
7544  *   Pointer to Ethernet device.
7545  */
7546 void
7547 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7548 {
7549         const struct mlx5_flow_driver_ops *fops;
7550
7551         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7552         fops->destroy_def_policy(dev);
7553 }
7554
7555 /**
7556  * Destroy the default policy table set.
7557  *
7558  * @param[in] dev
7559  *   Pointer to Ethernet device.
7560  *
7561  * @return
7562  *   0 on success, -1 otherwise.
7563  */
7564 int
7565 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7566 {
7567         const struct mlx5_flow_driver_ops *fops;
7568
7569         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7570         return fops->create_def_policy(dev);
7571 }
7572
7573 /**
7574  * Create the needed meter and suffix tables.
7575  *
7576  * @param[in] dev
7577  *   Pointer to Ethernet device.
7578  *
7579  * @return
7580  *   0 on success, -1 otherwise.
7581  */
7582 int
7583 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7584                         struct mlx5_flow_meter_info *fm,
7585                         uint32_t mtr_idx,
7586                         uint8_t domain_bitmap)
7587 {
7588         const struct mlx5_flow_driver_ops *fops;
7589
7590         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7591         return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7592 }
7593
7594 /**
7595  * Destroy the meter table set.
7596  *
7597  * @param[in] dev
7598  *   Pointer to Ethernet device.
7599  * @param[in] tbl
7600  *   Pointer to the meter table set.
7601  */
7602 void
7603 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7604                            struct mlx5_flow_meter_info *fm)
7605 {
7606         const struct mlx5_flow_driver_ops *fops;
7607
7608         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7609         fops->destroy_mtr_tbls(dev, fm);
7610 }
7611
7612 /**
7613  * Destroy the global meter drop table.
7614  *
7615  * @param[in] dev
7616  *   Pointer to Ethernet device.
7617  */
7618 void
7619 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7620 {
7621         const struct mlx5_flow_driver_ops *fops;
7622
7623         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7624         fops->destroy_mtr_drop_tbls(dev);
7625 }
7626
7627 /**
7628  * Destroy the sub policy table with RX queue.
7629  *
7630  * @param[in] dev
7631  *   Pointer to Ethernet device.
7632  * @param[in] mtr_policy
7633  *   Pointer to meter policy table.
7634  */
7635 void
7636 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
7637                 struct mlx5_flow_meter_policy *mtr_policy)
7638 {
7639         const struct mlx5_flow_driver_ops *fops;
7640
7641         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7642         fops->destroy_sub_policy_with_rxq(dev, mtr_policy);
7643 }
7644
7645 /**
7646  * Allocate the needed aso flow meter id.
7647  *
7648  * @param[in] dev
7649  *   Pointer to Ethernet device.
7650  *
7651  * @return
7652  *   Index to aso flow meter on success, NULL otherwise.
7653  */
7654 uint32_t
7655 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7656 {
7657         const struct mlx5_flow_driver_ops *fops;
7658
7659         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7660         return fops->create_meter(dev);
7661 }
7662
7663 /**
7664  * Free the aso flow meter id.
7665  *
7666  * @param[in] dev
7667  *   Pointer to Ethernet device.
7668  * @param[in] mtr_idx
7669  *  Index to aso flow meter to be free.
7670  *
7671  * @return
7672  *   0 on success.
7673  */
7674 void
7675 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7676 {
7677         const struct mlx5_flow_driver_ops *fops;
7678
7679         fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7680         fops->free_meter(dev, mtr_idx);
7681 }
7682
7683 /**
7684  * Allocate a counter.
7685  *
7686  * @param[in] dev
7687  *   Pointer to Ethernet device structure.
7688  *
7689  * @return
7690  *   Index to allocated counter  on success, 0 otherwise.
7691  */
7692 uint32_t
7693 mlx5_counter_alloc(struct rte_eth_dev *dev)
7694 {
7695         const struct mlx5_flow_driver_ops *fops;
7696         struct rte_flow_attr attr = { .transfer = 0 };
7697
7698         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7699                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7700                 return fops->counter_alloc(dev);
7701         }
7702         DRV_LOG(ERR,
7703                 "port %u counter allocate is not supported.",
7704                  dev->data->port_id);
7705         return 0;
7706 }
7707
7708 /**
7709  * Free a counter.
7710  *
7711  * @param[in] dev
7712  *   Pointer to Ethernet device structure.
7713  * @param[in] cnt
7714  *   Index to counter to be free.
7715  */
7716 void
7717 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7718 {
7719         const struct mlx5_flow_driver_ops *fops;
7720         struct rte_flow_attr attr = { .transfer = 0 };
7721
7722         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7723                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7724                 fops->counter_free(dev, cnt);
7725                 return;
7726         }
7727         DRV_LOG(ERR,
7728                 "port %u counter free is not supported.",
7729                  dev->data->port_id);
7730 }
7731
7732 /**
7733  * Query counter statistics.
7734  *
7735  * @param[in] dev
7736  *   Pointer to Ethernet device structure.
7737  * @param[in] cnt
7738  *   Index to counter to query.
7739  * @param[in] clear
7740  *   Set to clear counter statistics.
7741  * @param[out] pkts
7742  *   The counter hits packets number to save.
7743  * @param[out] bytes
7744  *   The counter hits bytes number to save.
7745  *
7746  * @return
7747  *   0 on success, a negative errno value otherwise.
7748  */
7749 int
7750 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7751                    bool clear, uint64_t *pkts, uint64_t *bytes)
7752 {
7753         const struct mlx5_flow_driver_ops *fops;
7754         struct rte_flow_attr attr = { .transfer = 0 };
7755
7756         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7757                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7758                 return fops->counter_query(dev, cnt, clear, pkts, bytes);
7759         }
7760         DRV_LOG(ERR,
7761                 "port %u counter query is not supported.",
7762                  dev->data->port_id);
7763         return -ENOTSUP;
7764 }
7765
7766 /**
7767  * Allocate a new memory for the counter values wrapped by all the needed
7768  * management.
7769  *
7770  * @param[in] sh
7771  *   Pointer to mlx5_dev_ctx_shared object.
7772  *
7773  * @return
7774  *   0 on success, a negative errno value otherwise.
7775  */
7776 static int
7777 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
7778 {
7779         struct mlx5_counter_stats_mem_mng *mem_mng;
7780         volatile struct flow_counter_stats *raw_data;
7781         int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
7782         int size = (sizeof(struct flow_counter_stats) *
7783                         MLX5_COUNTERS_PER_POOL +
7784                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
7785                         sizeof(struct mlx5_counter_stats_mem_mng);
7786         size_t pgsize = rte_mem_page_size();
7787         uint8_t *mem;
7788         int ret;
7789         int i;
7790
7791         if (pgsize == (size_t)-1) {
7792                 DRV_LOG(ERR, "Failed to get mem page size");
7793                 rte_errno = ENOMEM;
7794                 return -ENOMEM;
7795         }
7796         mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
7797         if (!mem) {
7798                 rte_errno = ENOMEM;
7799                 return -ENOMEM;
7800         }
7801         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
7802         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
7803         ret = mlx5_os_wrapped_mkey_create(sh->cdev->ctx, sh->cdev->pd,
7804                                           sh->cdev->pdn, mem, size,
7805                                           &mem_mng->wm);
7806         if (ret) {
7807                 rte_errno = errno;
7808                 mlx5_free(mem);
7809                 return -rte_errno;
7810         }
7811         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
7812         raw_data = (volatile struct flow_counter_stats *)mem;
7813         for (i = 0; i < raws_n; ++i) {
7814                 mem_mng->raws[i].mem_mng = mem_mng;
7815                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
7816         }
7817         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
7818                 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
7819                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
7820                                  next);
7821         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
7822         sh->cmng.mem_mng = mem_mng;
7823         return 0;
7824 }
7825
7826 /**
7827  * Set the statistic memory to the new counter pool.
7828  *
7829  * @param[in] sh
7830  *   Pointer to mlx5_dev_ctx_shared object.
7831  * @param[in] pool
7832  *   Pointer to the pool to set the statistic memory.
7833  *
7834  * @return
7835  *   0 on success, a negative errno value otherwise.
7836  */
7837 static int
7838 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
7839                                struct mlx5_flow_counter_pool *pool)
7840 {
7841         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7842         /* Resize statistic memory once used out. */
7843         if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
7844             mlx5_flow_create_counter_stat_mem_mng(sh)) {
7845                 DRV_LOG(ERR, "Cannot resize counter stat mem.");
7846                 return -1;
7847         }
7848         rte_spinlock_lock(&pool->sl);
7849         pool->raw = cmng->mem_mng->raws + pool->index %
7850                     MLX5_CNT_CONTAINER_RESIZE;
7851         rte_spinlock_unlock(&pool->sl);
7852         pool->raw_hw = NULL;
7853         return 0;
7854 }
7855
7856 #define MLX5_POOL_QUERY_FREQ_US 1000000
7857
7858 /**
7859  * Set the periodic procedure for triggering asynchronous batch queries for all
7860  * the counter pools.
7861  *
7862  * @param[in] sh
7863  *   Pointer to mlx5_dev_ctx_shared object.
7864  */
7865 void
7866 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
7867 {
7868         uint32_t pools_n, us;
7869
7870         pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
7871         us = MLX5_POOL_QUERY_FREQ_US / pools_n;
7872         DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
7873         if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
7874                 sh->cmng.query_thread_on = 0;
7875                 DRV_LOG(ERR, "Cannot reinitialize query alarm");
7876         } else {
7877                 sh->cmng.query_thread_on = 1;
7878         }
7879 }
7880
7881 /**
7882  * The periodic procedure for triggering asynchronous batch queries for all the
7883  * counter pools. This function is probably called by the host thread.
7884  *
7885  * @param[in] arg
7886  *   The parameter for the alarm process.
7887  */
7888 void
7889 mlx5_flow_query_alarm(void *arg)
7890 {
7891         struct mlx5_dev_ctx_shared *sh = arg;
7892         int ret;
7893         uint16_t pool_index = sh->cmng.pool_index;
7894         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
7895         struct mlx5_flow_counter_pool *pool;
7896         uint16_t n_valid;
7897
7898         if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
7899                 goto set_alarm;
7900         rte_spinlock_lock(&cmng->pool_update_sl);
7901         pool = cmng->pools[pool_index];
7902         n_valid = cmng->n_valid;
7903         rte_spinlock_unlock(&cmng->pool_update_sl);
7904         /* Set the statistic memory to the new created pool. */
7905         if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
7906                 goto set_alarm;
7907         if (pool->raw_hw)
7908                 /* There is a pool query in progress. */
7909                 goto set_alarm;
7910         pool->raw_hw =
7911                 LIST_FIRST(&sh->cmng.free_stat_raws);
7912         if (!pool->raw_hw)
7913                 /* No free counter statistics raw memory. */
7914                 goto set_alarm;
7915         /*
7916          * Identify the counters released between query trigger and query
7917          * handle more efficiently. The counter released in this gap period
7918          * should wait for a new round of query as the new arrived packets
7919          * will not be taken into account.
7920          */
7921         pool->query_gen++;
7922         ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
7923                                                MLX5_COUNTERS_PER_POOL,
7924                                                NULL, NULL,
7925                                                pool->raw_hw->mem_mng->wm.lkey,
7926                                                (void *)(uintptr_t)
7927                                                pool->raw_hw->data,
7928                                                sh->devx_comp,
7929                                                (uint64_t)(uintptr_t)pool);
7930         if (ret) {
7931                 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
7932                         " %d", pool->min_dcs->id);
7933                 pool->raw_hw = NULL;
7934                 goto set_alarm;
7935         }
7936         LIST_REMOVE(pool->raw_hw, next);
7937         sh->cmng.pending_queries++;
7938         pool_index++;
7939         if (pool_index >= n_valid)
7940                 pool_index = 0;
7941 set_alarm:
7942         sh->cmng.pool_index = pool_index;
7943         mlx5_set_query_alarm(sh);
7944 }
7945
7946 /**
7947  * Check and callback event for new aged flow in the counter pool
7948  *
7949  * @param[in] sh
7950  *   Pointer to mlx5_dev_ctx_shared object.
7951  * @param[in] pool
7952  *   Pointer to Current counter pool.
7953  */
7954 static void
7955 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
7956                    struct mlx5_flow_counter_pool *pool)
7957 {
7958         struct mlx5_priv *priv;
7959         struct mlx5_flow_counter *cnt;
7960         struct mlx5_age_info *age_info;
7961         struct mlx5_age_param *age_param;
7962         struct mlx5_counter_stats_raw *cur = pool->raw_hw;
7963         struct mlx5_counter_stats_raw *prev = pool->raw;
7964         const uint64_t curr_time = MLX5_CURR_TIME_SEC;
7965         const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
7966         uint16_t expected = AGE_CANDIDATE;
7967         uint32_t i;
7968
7969         pool->time_of_last_age_check = curr_time;
7970         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
7971                 cnt = MLX5_POOL_GET_CNT(pool, i);
7972                 age_param = MLX5_CNT_TO_AGE(cnt);
7973                 if (__atomic_load_n(&age_param->state,
7974                                     __ATOMIC_RELAXED) != AGE_CANDIDATE)
7975                         continue;
7976                 if (cur->data[i].hits != prev->data[i].hits) {
7977                         __atomic_store_n(&age_param->sec_since_last_hit, 0,
7978                                          __ATOMIC_RELAXED);
7979                         continue;
7980                 }
7981                 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
7982                                        time_delta,
7983                                        __ATOMIC_RELAXED) <= age_param->timeout)
7984                         continue;
7985                 /**
7986                  * Hold the lock first, or if between the
7987                  * state AGE_TMOUT and tailq operation the
7988                  * release happened, the release procedure
7989                  * may delete a non-existent tailq node.
7990                  */
7991                 priv = rte_eth_devices[age_param->port_id].data->dev_private;
7992                 age_info = GET_PORT_AGE_INFO(priv);
7993                 rte_spinlock_lock(&age_info->aged_sl);
7994                 if (__atomic_compare_exchange_n(&age_param->state, &expected,
7995                                                 AGE_TMOUT, false,
7996                                                 __ATOMIC_RELAXED,
7997                                                 __ATOMIC_RELAXED)) {
7998                         TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
7999                         MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
8000                 }
8001                 rte_spinlock_unlock(&age_info->aged_sl);
8002         }
8003         mlx5_age_event_prepare(sh);
8004 }
8005
8006 /**
8007  * Handler for the HW respond about ready values from an asynchronous batch
8008  * query. This function is probably called by the host thread.
8009  *
8010  * @param[in] sh
8011  *   The pointer to the shared device context.
8012  * @param[in] async_id
8013  *   The Devx async ID.
8014  * @param[in] status
8015  *   The status of the completion.
8016  */
8017 void
8018 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
8019                                   uint64_t async_id, int status)
8020 {
8021         struct mlx5_flow_counter_pool *pool =
8022                 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
8023         struct mlx5_counter_stats_raw *raw_to_free;
8024         uint8_t query_gen = pool->query_gen ^ 1;
8025         struct mlx5_flow_counter_mng *cmng = &sh->cmng;
8026         enum mlx5_counter_type cnt_type =
8027                 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
8028                                 MLX5_COUNTER_TYPE_ORIGIN;
8029
8030         if (unlikely(status)) {
8031                 raw_to_free = pool->raw_hw;
8032         } else {
8033                 raw_to_free = pool->raw;
8034                 if (pool->is_aged)
8035                         mlx5_flow_aging_check(sh, pool);
8036                 rte_spinlock_lock(&pool->sl);
8037                 pool->raw = pool->raw_hw;
8038                 rte_spinlock_unlock(&pool->sl);
8039                 /* Be sure the new raw counters data is updated in memory. */
8040                 rte_io_wmb();
8041                 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
8042                         rte_spinlock_lock(&cmng->csl[cnt_type]);
8043                         TAILQ_CONCAT(&cmng->counters[cnt_type],
8044                                      &pool->counters[query_gen], next);
8045                         rte_spinlock_unlock(&cmng->csl[cnt_type]);
8046                 }
8047         }
8048         LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
8049         pool->raw_hw = NULL;
8050         sh->cmng.pending_queries--;
8051 }
8052
8053 static int
8054 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
8055                     const struct flow_grp_info *grp_info,
8056                     struct rte_flow_error *error)
8057 {
8058         if (grp_info->transfer && grp_info->external &&
8059             grp_info->fdb_def_rule) {
8060                 if (group == UINT32_MAX)
8061                         return rte_flow_error_set
8062                                                 (error, EINVAL,
8063                                                  RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8064                                                  NULL,
8065                                                  "group index not supported");
8066                 *table = group + 1;
8067         } else {
8068                 *table = group;
8069         }
8070         DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
8071         return 0;
8072 }
8073
8074 /**
8075  * Translate the rte_flow group index to HW table value.
8076  *
8077  * If tunnel offload is disabled, all group ids converted to flow table
8078  * id using the standard method.
8079  * If tunnel offload is enabled, group id can be converted using the
8080  * standard or tunnel conversion method. Group conversion method
8081  * selection depends on flags in `grp_info` parameter:
8082  * - Internal (grp_info.external == 0) groups conversion uses the
8083  *   standard method.
8084  * - Group ids in JUMP action converted with the tunnel conversion.
8085  * - Group id in rule attribute conversion depends on a rule type and
8086  *   group id value:
8087  *   ** non zero group attributes converted with the tunnel method
8088  *   ** zero group attribute in non-tunnel rule is converted using the
8089  *      standard method - there's only one root table
8090  *   ** zero group attribute in steer tunnel rule is converted with the
8091  *      standard method - single root table
8092  *   ** zero group attribute in match tunnel rule is a special OvS
8093  *      case: that value is used for portability reasons. That group
8094  *      id is converted with the tunnel conversion method.
8095  *
8096  * @param[in] dev
8097  *   Port device
8098  * @param[in] tunnel
8099  *   PMD tunnel offload object
8100  * @param[in] group
8101  *   rte_flow group index value.
8102  * @param[out] table
8103  *   HW table value.
8104  * @param[in] grp_info
8105  *   flags used for conversion
8106  * @param[out] error
8107  *   Pointer to error structure.
8108  *
8109  * @return
8110  *   0 on success, a negative errno value otherwise and rte_errno is set.
8111  */
8112 int
8113 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
8114                          const struct mlx5_flow_tunnel *tunnel,
8115                          uint32_t group, uint32_t *table,
8116                          const struct flow_grp_info *grp_info,
8117                          struct rte_flow_error *error)
8118 {
8119         int ret;
8120         bool standard_translation;
8121
8122         if (!grp_info->skip_scale && grp_info->external &&
8123             group < MLX5_MAX_TABLES_EXTERNAL)
8124                 group *= MLX5_FLOW_TABLE_FACTOR;
8125         if (is_tunnel_offload_active(dev)) {
8126                 standard_translation = !grp_info->external ||
8127                                         grp_info->std_tbl_fix;
8128         } else {
8129                 standard_translation = true;
8130         }
8131         DRV_LOG(DEBUG,
8132                 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
8133                 dev->data->port_id, group, grp_info->transfer,
8134                 grp_info->external, grp_info->fdb_def_rule,
8135                 standard_translation ? "STANDARD" : "TUNNEL");
8136         if (standard_translation)
8137                 ret = flow_group_to_table(dev->data->port_id, group, table,
8138                                           grp_info, error);
8139         else
8140                 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
8141                                                       table, error);
8142
8143         return ret;
8144 }
8145
8146 /**
8147  * Discover availability of metadata reg_c's.
8148  *
8149  * Iteratively use test flows to check availability.
8150  *
8151  * @param[in] dev
8152  *   Pointer to the Ethernet device structure.
8153  *
8154  * @return
8155  *   0 on success, a negative errno value otherwise and rte_errno is set.
8156  */
8157 int
8158 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
8159 {
8160         struct mlx5_priv *priv = dev->data->dev_private;
8161         enum modify_reg idx;
8162         int n = 0;
8163
8164         /* reg_c[0] and reg_c[1] are reserved. */
8165         priv->sh->flow_mreg_c[n++] = REG_C_0;
8166         priv->sh->flow_mreg_c[n++] = REG_C_1;
8167         /* Discover availability of other reg_c's. */
8168         for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
8169                 struct rte_flow_attr attr = {
8170                         .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
8171                         .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
8172                         .ingress = 1,
8173                 };
8174                 struct rte_flow_item items[] = {
8175                         [0] = {
8176                                 .type = RTE_FLOW_ITEM_TYPE_END,
8177                         },
8178                 };
8179                 struct rte_flow_action actions[] = {
8180                         [0] = {
8181                                 .type = (enum rte_flow_action_type)
8182                                         MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
8183                                 .conf = &(struct mlx5_flow_action_copy_mreg){
8184                                         .src = REG_C_1,
8185                                         .dst = idx,
8186                                 },
8187                         },
8188                         [1] = {
8189                                 .type = RTE_FLOW_ACTION_TYPE_JUMP,
8190                                 .conf = &(struct rte_flow_action_jump){
8191                                         .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
8192                                 },
8193                         },
8194                         [2] = {
8195                                 .type = RTE_FLOW_ACTION_TYPE_END,
8196                         },
8197                 };
8198                 uint32_t flow_idx;
8199                 struct rte_flow *flow;
8200                 struct rte_flow_error error;
8201
8202                 if (!priv->config.dv_flow_en)
8203                         break;
8204                 /* Create internal flow, validation skips copy action. */
8205                 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr,
8206                                         items, actions, false, &error);
8207                 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8208                                       flow_idx);
8209                 if (!flow)
8210                         continue;
8211                 priv->sh->flow_mreg_c[n++] = idx;
8212                 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx);
8213         }
8214         for (; n < MLX5_MREG_C_NUM; ++n)
8215                 priv->sh->flow_mreg_c[n] = REG_NON;
8216         priv->sh->metadata_regc_check_flag = 1;
8217         return 0;
8218 }
8219
8220 int
8221 save_dump_file(const uint8_t *data, uint32_t size,
8222         uint32_t type, uint64_t id, void *arg, FILE *file)
8223 {
8224         char line[BUF_SIZE];
8225         uint32_t out = 0;
8226         uint32_t k;
8227         uint32_t actions_num;
8228         struct rte_flow_query_count *count;
8229
8230         memset(line, 0, BUF_SIZE);
8231         switch (type) {
8232         case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR:
8233                 actions_num = *(uint32_t *)(arg);
8234                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",%d,",
8235                                 type, id, actions_num);
8236                 break;
8237         case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT:
8238                 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",",
8239                                 type, id);
8240                 break;
8241         case DR_DUMP_REC_TYPE_PMD_COUNTER:
8242                 count = (struct rte_flow_query_count *)arg;
8243                 fprintf(file,
8244                         "%d,0x%" PRIx64 ",%" PRIu64 ",%" PRIu64 "\n",
8245                         type, id, count->hits, count->bytes);
8246                 return 0;
8247         default:
8248                 return -1;
8249         }
8250
8251         for (k = 0; k < size; k++) {
8252                 /* Make sure we do not overrun the line buffer length. */
8253                 if (out >= BUF_SIZE - 4) {
8254                         line[out] = '\0';
8255                         break;
8256                 }
8257                 out += snprintf(line + out, BUF_SIZE - out, "%02x",
8258                                 (data[k]) & 0xff);
8259         }
8260         fprintf(file, "%s\n", line);
8261         return 0;
8262 }
8263
8264 int
8265 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow,
8266         struct rte_flow_query_count *count, struct rte_flow_error *error)
8267 {
8268         struct rte_flow_action action[2];
8269         enum mlx5_flow_drv_type ftype;
8270         const struct mlx5_flow_driver_ops *fops;
8271
8272         if (!flow) {
8273                 return rte_flow_error_set(error, ENOENT,
8274                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8275                                 NULL,
8276                                 "invalid flow handle");
8277         }
8278         action[0].type = RTE_FLOW_ACTION_TYPE_COUNT;
8279         action[1].type = RTE_FLOW_ACTION_TYPE_END;
8280         if (flow->counter) {
8281                 memset(count, 0, sizeof(struct rte_flow_query_count));
8282                 ftype = (enum mlx5_flow_drv_type)(flow->drv_type);
8283                 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN &&
8284                                                 ftype < MLX5_FLOW_TYPE_MAX);
8285                 fops = flow_get_drv_ops(ftype);
8286                 return fops->query(dev, flow, action, count, error);
8287         }
8288         return -1;
8289 }
8290
8291 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8292 /**
8293  * Dump flow ipool data to file
8294  *
8295  * @param[in] dev
8296  *   The pointer to Ethernet device.
8297  * @param[in] file
8298  *   A pointer to a file for output.
8299  * @param[out] error
8300  *   Perform verbose error reporting if not NULL. PMDs initialize this
8301  *   structure in case of error only.
8302  * @return
8303  *   0 on success, a negative value otherwise.
8304  */
8305 int
8306 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev,
8307         struct rte_flow *flow, FILE *file,
8308         struct rte_flow_error *error)
8309 {
8310         struct mlx5_priv *priv = dev->data->dev_private;
8311         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
8312         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8313         uint32_t handle_idx;
8314         struct mlx5_flow_handle *dh;
8315         struct rte_flow_query_count count;
8316         uint32_t actions_num;
8317         const uint8_t *data;
8318         size_t size;
8319         uint64_t id;
8320         uint32_t type;
8321         void *action = NULL;
8322
8323         if (!flow) {
8324                 return rte_flow_error_set(error, ENOENT,
8325                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8326                                 NULL,
8327                                 "invalid flow handle");
8328         }
8329         handle_idx = flow->dev_handles;
8330         while (handle_idx) {
8331                 dh = mlx5_ipool_get(priv->sh->ipool
8332                                 [MLX5_IPOOL_MLX5_FLOW], handle_idx);
8333                 if (!dh)
8334                         continue;
8335                 handle_idx = dh->next.next;
8336
8337                 /* query counter */
8338                 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8339                 flow_dv_query_count_ptr(dev, flow->counter,
8340                                                 &action, error);
8341                 if (action) {
8342                         id = (uint64_t)(uintptr_t)action;
8343                         if (!mlx5_flow_query_counter(dev, flow, &count, error))
8344                                 save_dump_file(NULL, 0, type,
8345                                                 id, (void *)&count, file);
8346                 }
8347                 /* Get modify_hdr and encap_decap buf from ipools. */
8348                 encap_decap = NULL;
8349                 modify_hdr = dh->dvh.modify_hdr;
8350
8351                 if (dh->dvh.rix_encap_decap) {
8352                         encap_decap = mlx5_ipool_get(priv->sh->ipool
8353                                                 [MLX5_IPOOL_DECAP_ENCAP],
8354                                                 dh->dvh.rix_encap_decap);
8355                 }
8356                 if (modify_hdr) {
8357                         data = (const uint8_t *)modify_hdr->actions;
8358                         size = (size_t)(modify_hdr->actions_num) * 8;
8359                         id = (uint64_t)(uintptr_t)modify_hdr->action;
8360                         actions_num = modify_hdr->actions_num;
8361                         type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8362                         save_dump_file(data, size, type, id,
8363                                                 (void *)(&actions_num), file);
8364                 }
8365                 if (encap_decap) {
8366                         data = encap_decap->buf;
8367                         size = encap_decap->size;
8368                         id = (uint64_t)(uintptr_t)encap_decap->action;
8369                         type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8370                         save_dump_file(data, size, type,
8371                                                 id, NULL, file);
8372                 }
8373         }
8374         return 0;
8375 }
8376
8377 /**
8378  * Dump all flow's encap_decap/modify_hdr/counter data to file
8379  *
8380  * @param[in] dev
8381  *   The pointer to Ethernet device.
8382  * @param[in] file
8383  *   A pointer to a file for output.
8384  * @param[out] error
8385  *   Perform verbose error reporting if not NULL. PMDs initialize this
8386  *   structure in case of error only.
8387  * @return
8388  *   0 on success, a negative value otherwise.
8389  */
8390 static int
8391 mlx5_flow_dev_dump_sh_all(struct rte_eth_dev *dev,
8392         FILE *file, struct rte_flow_error *error)
8393 {
8394         struct mlx5_priv *priv = dev->data->dev_private;
8395         struct mlx5_dev_ctx_shared *sh = priv->sh;
8396         struct mlx5_hlist *h;
8397         struct mlx5_flow_dv_modify_hdr_resource  *modify_hdr;
8398         struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8399         struct rte_flow_query_count count;
8400         uint32_t actions_num;
8401         const uint8_t *data;
8402         size_t size;
8403         uint64_t id;
8404         uint32_t type;
8405         uint32_t i;
8406         uint32_t j;
8407         struct mlx5_list_inconst *l_inconst;
8408         struct mlx5_list_entry *e;
8409         int lcore_index;
8410         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
8411         uint32_t max;
8412         void *action;
8413
8414         /* encap_decap hlist is lcore_share, get global core cache. */
8415         i = MLX5_LIST_GLOBAL;
8416         h = sh->encaps_decaps;
8417         if (h) {
8418                 for (j = 0; j <= h->mask; j++) {
8419                         l_inconst = &h->buckets[j].l;
8420                         if (!l_inconst || !l_inconst->cache[i])
8421                                 continue;
8422
8423                         e = LIST_FIRST(&l_inconst->cache[i]->h);
8424                         while (e) {
8425                                 encap_decap =
8426                                 (struct mlx5_flow_dv_encap_decap_resource *)e;
8427                                 data = encap_decap->buf;
8428                                 size = encap_decap->size;
8429                                 id = (uint64_t)(uintptr_t)encap_decap->action;
8430                                 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8431                                 save_dump_file(data, size, type,
8432                                         id, NULL, file);
8433                                 e = LIST_NEXT(e, next);
8434                         }
8435                 }
8436         }
8437
8438         /* get modify_hdr */
8439         h = sh->modify_cmds;
8440         if (h) {
8441                 lcore_index = rte_lcore_index(rte_lcore_id());
8442                 if (unlikely(lcore_index == -1)) {
8443                         lcore_index = MLX5_LIST_NLCORE;
8444                         rte_spinlock_lock(&h->l_const.lcore_lock);
8445                 }
8446                 i = lcore_index;
8447
8448                 for (j = 0; j <= h->mask; j++) {
8449                         l_inconst = &h->buckets[j].l;
8450                         if (!l_inconst || !l_inconst->cache[i])
8451                                 continue;
8452
8453                         e = LIST_FIRST(&l_inconst->cache[i]->h);
8454                         while (e) {
8455                                 modify_hdr =
8456                                 (struct mlx5_flow_dv_modify_hdr_resource *)e;
8457                                 data = (const uint8_t *)modify_hdr->actions;
8458                                 size = (size_t)(modify_hdr->actions_num) * 8;
8459                                 actions_num = modify_hdr->actions_num;
8460                                 id = (uint64_t)(uintptr_t)modify_hdr->action;
8461                                 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8462                                 save_dump_file(data, size, type, id,
8463                                                 (void *)(&actions_num), file);
8464                                 e = LIST_NEXT(e, next);
8465                         }
8466                 }
8467
8468                 if (unlikely(lcore_index == MLX5_LIST_NLCORE))
8469                         rte_spinlock_unlock(&h->l_const.lcore_lock);
8470         }
8471
8472         /* get counter */
8473         MLX5_ASSERT(cmng->n_valid <= cmng->n);
8474         max = MLX5_COUNTERS_PER_POOL * cmng->n_valid;
8475         for (j = 1; j <= max; j++) {
8476                 action = NULL;
8477                 flow_dv_query_count_ptr(dev, j, &action, error);
8478                 if (action) {
8479                         if (!flow_dv_query_count(dev, j, &count, error)) {
8480                                 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8481                                 id = (uint64_t)(uintptr_t)action;
8482                                 save_dump_file(NULL, 0, type,
8483                                                 id, (void *)&count, file);
8484                         }
8485                 }
8486         }
8487         return 0;
8488 }
8489 #endif
8490
8491 /**
8492  * Dump flow raw hw data to file
8493  *
8494  * @param[in] dev
8495  *    The pointer to Ethernet device.
8496  * @param[in] file
8497  *   A pointer to a file for output.
8498  * @param[out] error
8499  *   Perform verbose error reporting if not NULL. PMDs initialize this
8500  *   structure in case of error only.
8501  * @return
8502  *   0 on success, a nagative value otherwise.
8503  */
8504 int
8505 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
8506                    FILE *file,
8507                    struct rte_flow_error *error __rte_unused)
8508 {
8509         struct mlx5_priv *priv = dev->data->dev_private;
8510         struct mlx5_dev_ctx_shared *sh = priv->sh;
8511         uint32_t handle_idx;
8512         int ret;
8513         struct mlx5_flow_handle *dh;
8514         struct rte_flow *flow;
8515
8516         if (!priv->config.dv_flow_en) {
8517                 if (fputs("device dv flow disabled\n", file) <= 0)
8518                         return -errno;
8519                 return -ENOTSUP;
8520         }
8521
8522         /* dump all */
8523         if (!flow_idx) {
8524 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8525                 if (mlx5_flow_dev_dump_sh_all(dev, file, error))
8526                         return -EINVAL;
8527 #endif
8528                 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
8529                                         sh->rx_domain,
8530                                         sh->tx_domain, file);
8531         }
8532         /* dump one */
8533         flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8534                         (uintptr_t)(void *)flow_idx);
8535         if (!flow)
8536                 return -EINVAL;
8537
8538 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8539         mlx5_flow_dev_dump_ipool(dev, flow, file, error);
8540 #endif
8541         handle_idx = flow->dev_handles;
8542         while (handle_idx) {
8543                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8544                                 handle_idx);
8545                 if (!dh)
8546                         return -ENOENT;
8547                 if (dh->drv_flow) {
8548                         ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
8549                                         file);
8550                         if (ret)
8551                                 return -ENOENT;
8552                 }
8553                 handle_idx = dh->next.next;
8554         }
8555         return 0;
8556 }
8557
8558 /**
8559  * Get aged-out flows.
8560  *
8561  * @param[in] dev
8562  *   Pointer to the Ethernet device structure.
8563  * @param[in] context
8564  *   The address of an array of pointers to the aged-out flows contexts.
8565  * @param[in] nb_countexts
8566  *   The length of context array pointers.
8567  * @param[out] error
8568  *   Perform verbose error reporting if not NULL. Initialized in case of
8569  *   error only.
8570  *
8571  * @return
8572  *   how many contexts get in success, otherwise negative errno value.
8573  *   if nb_contexts is 0, return the amount of all aged contexts.
8574  *   if nb_contexts is not 0 , return the amount of aged flows reported
8575  *   in the context array.
8576  */
8577 int
8578 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
8579                         uint32_t nb_contexts, struct rte_flow_error *error)
8580 {
8581         const struct mlx5_flow_driver_ops *fops;
8582         struct rte_flow_attr attr = { .transfer = 0 };
8583
8584         if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
8585                 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
8586                 return fops->get_aged_flows(dev, contexts, nb_contexts,
8587                                                     error);
8588         }
8589         DRV_LOG(ERR,
8590                 "port %u get aged flows is not supported.",
8591                  dev->data->port_id);
8592         return -ENOTSUP;
8593 }
8594
8595 /* Wrapper for driver action_validate op callback */
8596 static int
8597 flow_drv_action_validate(struct rte_eth_dev *dev,
8598                          const struct rte_flow_indir_action_conf *conf,
8599                          const struct rte_flow_action *action,
8600                          const struct mlx5_flow_driver_ops *fops,
8601                          struct rte_flow_error *error)
8602 {
8603         static const char err_msg[] = "indirect action validation unsupported";
8604
8605         if (!fops->action_validate) {
8606                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8607                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8608                                    NULL, err_msg);
8609                 return -rte_errno;
8610         }
8611         return fops->action_validate(dev, conf, action, error);
8612 }
8613
8614 /**
8615  * Destroys the shared action by handle.
8616  *
8617  * @param dev
8618  *   Pointer to Ethernet device structure.
8619  * @param[in] handle
8620  *   Handle for the indirect action object to be destroyed.
8621  * @param[out] error
8622  *   Perform verbose error reporting if not NULL. PMDs initialize this
8623  *   structure in case of error only.
8624  *
8625  * @return
8626  *   0 on success, a negative errno value otherwise and rte_errno is set.
8627  *
8628  * @note: wrapper for driver action_create op callback.
8629  */
8630 static int
8631 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
8632                            struct rte_flow_action_handle *handle,
8633                            struct rte_flow_error *error)
8634 {
8635         static const char err_msg[] = "indirect action destruction unsupported";
8636         struct rte_flow_attr attr = { .transfer = 0 };
8637         const struct mlx5_flow_driver_ops *fops =
8638                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8639
8640         if (!fops->action_destroy) {
8641                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8642                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8643                                    NULL, err_msg);
8644                 return -rte_errno;
8645         }
8646         return fops->action_destroy(dev, handle, error);
8647 }
8648
8649 /* Wrapper for driver action_destroy op callback */
8650 static int
8651 flow_drv_action_update(struct rte_eth_dev *dev,
8652                        struct rte_flow_action_handle *handle,
8653                        const void *update,
8654                        const struct mlx5_flow_driver_ops *fops,
8655                        struct rte_flow_error *error)
8656 {
8657         static const char err_msg[] = "indirect action update unsupported";
8658
8659         if (!fops->action_update) {
8660                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8661                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8662                                    NULL, err_msg);
8663                 return -rte_errno;
8664         }
8665         return fops->action_update(dev, handle, update, error);
8666 }
8667
8668 /* Wrapper for driver action_destroy op callback */
8669 static int
8670 flow_drv_action_query(struct rte_eth_dev *dev,
8671                       const struct rte_flow_action_handle *handle,
8672                       void *data,
8673                       const struct mlx5_flow_driver_ops *fops,
8674                       struct rte_flow_error *error)
8675 {
8676         static const char err_msg[] = "indirect action query unsupported";
8677
8678         if (!fops->action_query) {
8679                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8680                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8681                                    NULL, err_msg);
8682                 return -rte_errno;
8683         }
8684         return fops->action_query(dev, handle, data, error);
8685 }
8686
8687 /**
8688  * Create indirect action for reuse in multiple flow rules.
8689  *
8690  * @param dev
8691  *   Pointer to Ethernet device structure.
8692  * @param conf
8693  *   Pointer to indirect action object configuration.
8694  * @param[in] action
8695  *   Action configuration for indirect action object creation.
8696  * @param[out] error
8697  *   Perform verbose error reporting if not NULL. PMDs initialize this
8698  *   structure in case of error only.
8699  * @return
8700  *   A valid handle in case of success, NULL otherwise and rte_errno is set.
8701  */
8702 static struct rte_flow_action_handle *
8703 mlx5_action_handle_create(struct rte_eth_dev *dev,
8704                           const struct rte_flow_indir_action_conf *conf,
8705                           const struct rte_flow_action *action,
8706                           struct rte_flow_error *error)
8707 {
8708         static const char err_msg[] = "indirect action creation unsupported";
8709         struct rte_flow_attr attr = { .transfer = 0 };
8710         const struct mlx5_flow_driver_ops *fops =
8711                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8712
8713         if (flow_drv_action_validate(dev, conf, action, fops, error))
8714                 return NULL;
8715         if (!fops->action_create) {
8716                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
8717                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8718                                    NULL, err_msg);
8719                 return NULL;
8720         }
8721         return fops->action_create(dev, conf, action, error);
8722 }
8723
8724 /**
8725  * Updates inplace the indirect action configuration pointed by *handle*
8726  * with the configuration provided as *update* argument.
8727  * The update of the indirect action configuration effects all flow rules
8728  * reusing the action via handle.
8729  *
8730  * @param dev
8731  *   Pointer to Ethernet device structure.
8732  * @param[in] handle
8733  *   Handle for the indirect action to be updated.
8734  * @param[in] update
8735  *   Action specification used to modify the action pointed by handle.
8736  *   *update* could be of same type with the action pointed by the *handle*
8737  *   handle argument, or some other structures like a wrapper, depending on
8738  *   the indirect action type.
8739  * @param[out] error
8740  *   Perform verbose error reporting if not NULL. PMDs initialize this
8741  *   structure in case of error only.
8742  *
8743  * @return
8744  *   0 on success, a negative errno value otherwise and rte_errno is set.
8745  */
8746 static int
8747 mlx5_action_handle_update(struct rte_eth_dev *dev,
8748                 struct rte_flow_action_handle *handle,
8749                 const void *update,
8750                 struct rte_flow_error *error)
8751 {
8752         struct rte_flow_attr attr = { .transfer = 0 };
8753         const struct mlx5_flow_driver_ops *fops =
8754                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8755         int ret;
8756
8757         ret = flow_drv_action_validate(dev, NULL,
8758                         (const struct rte_flow_action *)update, fops, error);
8759         if (ret)
8760                 return ret;
8761         return flow_drv_action_update(dev, handle, update, fops,
8762                                       error);
8763 }
8764
8765 /**
8766  * Query the indirect action by handle.
8767  *
8768  * This function allows retrieving action-specific data such as counters.
8769  * Data is gathered by special action which may be present/referenced in
8770  * more than one flow rule definition.
8771  *
8772  * see @RTE_FLOW_ACTION_TYPE_COUNT
8773  *
8774  * @param dev
8775  *   Pointer to Ethernet device structure.
8776  * @param[in] handle
8777  *   Handle for the indirect action to query.
8778  * @param[in, out] data
8779  *   Pointer to storage for the associated query data type.
8780  * @param[out] error
8781  *   Perform verbose error reporting if not NULL. PMDs initialize this
8782  *   structure in case of error only.
8783  *
8784  * @return
8785  *   0 on success, a negative errno value otherwise and rte_errno is set.
8786  */
8787 static int
8788 mlx5_action_handle_query(struct rte_eth_dev *dev,
8789                          const struct rte_flow_action_handle *handle,
8790                          void *data,
8791                          struct rte_flow_error *error)
8792 {
8793         struct rte_flow_attr attr = { .transfer = 0 };
8794         const struct mlx5_flow_driver_ops *fops =
8795                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8796
8797         return flow_drv_action_query(dev, handle, data, fops, error);
8798 }
8799
8800 /**
8801  * Destroy all indirect actions (shared RSS).
8802  *
8803  * @param dev
8804  *   Pointer to Ethernet device.
8805  *
8806  * @return
8807  *   0 on success, a negative errno value otherwise and rte_errno is set.
8808  */
8809 int
8810 mlx5_action_handle_flush(struct rte_eth_dev *dev)
8811 {
8812         struct rte_flow_error error;
8813         struct mlx5_priv *priv = dev->data->dev_private;
8814         struct mlx5_shared_action_rss *shared_rss;
8815         int ret = 0;
8816         uint32_t idx;
8817
8818         ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
8819                       priv->rss_shared_actions, idx, shared_rss, next) {
8820                 ret |= mlx5_action_handle_destroy(dev,
8821                        (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
8822         }
8823         return ret;
8824 }
8825
8826 /**
8827  * Validate existing indirect actions against current device configuration
8828  * and attach them to device resources.
8829  *
8830  * @param dev
8831  *   Pointer to Ethernet device.
8832  *
8833  * @return
8834  *   0 on success, a negative errno value otherwise and rte_errno is set.
8835  */
8836 int
8837 mlx5_action_handle_attach(struct rte_eth_dev *dev)
8838 {
8839         struct mlx5_priv *priv = dev->data->dev_private;
8840         struct mlx5_indexed_pool *ipool =
8841                         priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS];
8842         struct mlx5_shared_action_rss *shared_rss, *shared_rss_last;
8843         int ret = 0;
8844         uint32_t idx;
8845
8846         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8847                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8848                 const char *message;
8849                 uint32_t queue_idx;
8850
8851                 ret = mlx5_validate_rss_queues(dev, ind_tbl->queues,
8852                                                ind_tbl->queues_n,
8853                                                &message, &queue_idx);
8854                 if (ret != 0) {
8855                         DRV_LOG(ERR, "Port %u cannot use queue %u in RSS: %s",
8856                                 dev->data->port_id, ind_tbl->queues[queue_idx],
8857                                 message);
8858                         break;
8859                 }
8860         }
8861         if (ret != 0)
8862                 return ret;
8863         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8864                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8865
8866                 ret = mlx5_ind_table_obj_attach(dev, ind_tbl);
8867                 if (ret != 0) {
8868                         DRV_LOG(ERR, "Port %u could not attach "
8869                                 "indirection table obj %p",
8870                                 dev->data->port_id, (void *)ind_tbl);
8871                         goto error;
8872                 }
8873         }
8874         return 0;
8875 error:
8876         shared_rss_last = shared_rss;
8877         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8878                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8879
8880                 if (shared_rss == shared_rss_last)
8881                         break;
8882                 if (mlx5_ind_table_obj_detach(dev, ind_tbl) != 0)
8883                         DRV_LOG(CRIT, "Port %u could not detach "
8884                                 "indirection table obj %p on rollback",
8885                                 dev->data->port_id, (void *)ind_tbl);
8886         }
8887         return ret;
8888 }
8889
8890 /**
8891  * Detach indirect actions of the device from its resources.
8892  *
8893  * @param dev
8894  *   Pointer to Ethernet device.
8895  *
8896  * @return
8897  *   0 on success, a negative errno value otherwise and rte_errno is set.
8898  */
8899 int
8900 mlx5_action_handle_detach(struct rte_eth_dev *dev)
8901 {
8902         struct mlx5_priv *priv = dev->data->dev_private;
8903         struct mlx5_indexed_pool *ipool =
8904                         priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS];
8905         struct mlx5_shared_action_rss *shared_rss, *shared_rss_last;
8906         int ret = 0;
8907         uint32_t idx;
8908
8909         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8910                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8911
8912                 ret = mlx5_ind_table_obj_detach(dev, ind_tbl);
8913                 if (ret != 0) {
8914                         DRV_LOG(ERR, "Port %u could not detach "
8915                                 "indirection table obj %p",
8916                                 dev->data->port_id, (void *)ind_tbl);
8917                         goto error;
8918                 }
8919         }
8920         return 0;
8921 error:
8922         shared_rss_last = shared_rss;
8923         ILIST_FOREACH(ipool, priv->rss_shared_actions, idx, shared_rss, next) {
8924                 struct mlx5_ind_table_obj *ind_tbl = shared_rss->ind_tbl;
8925
8926                 if (shared_rss == shared_rss_last)
8927                         break;
8928                 if (mlx5_ind_table_obj_attach(dev, ind_tbl) != 0)
8929                         DRV_LOG(CRIT, "Port %u could not attach "
8930                                 "indirection table obj %p on rollback",
8931                                 dev->data->port_id, (void *)ind_tbl);
8932         }
8933         return ret;
8934 }
8935
8936 #ifndef HAVE_MLX5DV_DR
8937 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
8938 #else
8939 #define MLX5_DOMAIN_SYNC_FLOW \
8940         (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
8941 #endif
8942
8943 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
8944 {
8945         struct rte_eth_dev *dev = &rte_eth_devices[port_id];
8946         const struct mlx5_flow_driver_ops *fops;
8947         int ret;
8948         struct rte_flow_attr attr = { .transfer = 0 };
8949
8950         fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
8951         ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
8952         if (ret > 0)
8953                 ret = -ret;
8954         return ret;
8955 }
8956
8957 const struct mlx5_flow_tunnel *
8958 mlx5_get_tof(const struct rte_flow_item *item,
8959              const struct rte_flow_action *action,
8960              enum mlx5_tof_rule_type *rule_type)
8961 {
8962         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
8963                 if (item->type == (typeof(item->type))
8964                                   MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) {
8965                         *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE;
8966                         return flow_items_to_tunnel(item);
8967                 }
8968         }
8969         for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) {
8970                 if (action->type == (typeof(action->type))
8971                                     MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) {
8972                         *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE;
8973                         return flow_actions_to_tunnel(action);
8974                 }
8975         }
8976         return NULL;
8977 }
8978
8979 /**
8980  * tunnel offload functionalilty is defined for DV environment only
8981  */
8982 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8983 __extension__
8984 union tunnel_offload_mark {
8985         uint32_t val;
8986         struct {
8987                 uint32_t app_reserve:8;
8988                 uint32_t table_id:15;
8989                 uint32_t transfer:1;
8990                 uint32_t _unused_:8;
8991         };
8992 };
8993
8994 static bool
8995 mlx5_access_tunnel_offload_db
8996         (struct rte_eth_dev *dev,
8997          bool (*match)(struct rte_eth_dev *,
8998                        struct mlx5_flow_tunnel *, const void *),
8999          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
9000          void (*miss)(struct rte_eth_dev *, void *),
9001          void *ctx, bool lock_op);
9002
9003 static int
9004 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
9005                              struct rte_flow *flow,
9006                              const struct rte_flow_attr *attr,
9007                              const struct rte_flow_action *app_actions,
9008                              uint32_t flow_idx,
9009                              const struct mlx5_flow_tunnel *tunnel,
9010                              struct tunnel_default_miss_ctx *ctx,
9011                              struct rte_flow_error *error)
9012 {
9013         struct mlx5_priv *priv = dev->data->dev_private;
9014         struct mlx5_flow *dev_flow;
9015         struct rte_flow_attr miss_attr = *attr;
9016         const struct rte_flow_item miss_items[2] = {
9017                 {
9018                         .type = RTE_FLOW_ITEM_TYPE_ETH,
9019                         .spec = NULL,
9020                         .last = NULL,
9021                         .mask = NULL
9022                 },
9023                 {
9024                         .type = RTE_FLOW_ITEM_TYPE_END,
9025                         .spec = NULL,
9026                         .last = NULL,
9027                         .mask = NULL
9028                 }
9029         };
9030         union tunnel_offload_mark mark_id;
9031         struct rte_flow_action_mark miss_mark;
9032         struct rte_flow_action miss_actions[3] = {
9033                 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
9034                 [2] = { .type = RTE_FLOW_ACTION_TYPE_END,  .conf = NULL }
9035         };
9036         const struct rte_flow_action_jump *jump_data;
9037         uint32_t i, flow_table = 0; /* prevent compilation warning */
9038         struct flow_grp_info grp_info = {
9039                 .external = 1,
9040                 .transfer = attr->transfer,
9041                 .fdb_def_rule = !!priv->fdb_def_rule,
9042                 .std_tbl_fix = 0,
9043         };
9044         int ret;
9045
9046         if (!attr->transfer) {
9047                 uint32_t q_size;
9048
9049                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
9050                 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
9051                 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
9052                                          0, SOCKET_ID_ANY);
9053                 if (!ctx->queue)
9054                         return rte_flow_error_set
9055                                 (error, ENOMEM,
9056                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9057                                 NULL, "invalid default miss RSS");
9058                 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
9059                 ctx->action_rss.level = 0,
9060                 ctx->action_rss.types = priv->rss_conf.rss_hf,
9061                 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
9062                 ctx->action_rss.queue_num = priv->reta_idx_n,
9063                 ctx->action_rss.key = priv->rss_conf.rss_key,
9064                 ctx->action_rss.queue = ctx->queue;
9065                 if (!priv->reta_idx_n || !priv->rxqs_n)
9066                         return rte_flow_error_set
9067                                 (error, EINVAL,
9068                                 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9069                                 NULL, "invalid port configuration");
9070                 if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG))
9071                         ctx->action_rss.types = 0;
9072                 for (i = 0; i != priv->reta_idx_n; ++i)
9073                         ctx->queue[i] = (*priv->reta_idx)[i];
9074         } else {
9075                 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
9076                 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
9077         }
9078         miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
9079         for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
9080         jump_data = app_actions->conf;
9081         miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
9082         miss_attr.group = jump_data->group;
9083         ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
9084                                        &flow_table, &grp_info, error);
9085         if (ret)
9086                 return rte_flow_error_set(error, EINVAL,
9087                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9088                                           NULL, "invalid tunnel id");
9089         mark_id.app_reserve = 0;
9090         mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
9091         mark_id.transfer = !!attr->transfer;
9092         mark_id._unused_ = 0;
9093         miss_mark.id = mark_id.val;
9094         dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
9095                                     miss_items, miss_actions, flow_idx, error);
9096         if (!dev_flow)
9097                 return -rte_errno;
9098         dev_flow->flow = flow;
9099         dev_flow->external = true;
9100         dev_flow->tunnel = tunnel;
9101         dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE;
9102         /* Subflow object was created, we must include one in the list. */
9103         SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
9104                       dev_flow->handle, next);
9105         DRV_LOG(DEBUG,
9106                 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
9107                 dev->data->port_id, tunnel->app_tunnel.type,
9108                 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
9109         ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
9110                                   miss_actions, error);
9111         if (!ret)
9112                 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
9113                                                   error);
9114
9115         return ret;
9116 }
9117
9118 static const struct mlx5_flow_tbl_data_entry  *
9119 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
9120 {
9121         struct mlx5_priv *priv = dev->data->dev_private;
9122         struct mlx5_dev_ctx_shared *sh = priv->sh;
9123         struct mlx5_list_entry *he;
9124         union tunnel_offload_mark mbits = { .val = mark };
9125         union mlx5_flow_tbl_key table_key = {
9126                 {
9127                         .level = tunnel_id_to_flow_tbl(mbits.table_id),
9128                         .id = 0,
9129                         .reserved = 0,
9130                         .dummy = 0,
9131                         .is_fdb = !!mbits.transfer,
9132                         .is_egress = 0,
9133                 }
9134         };
9135         struct mlx5_flow_cb_ctx ctx = {
9136                 .data = &table_key.v64,
9137         };
9138
9139         he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx);
9140         return he ?
9141                container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
9142 }
9143
9144 static void
9145 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx,
9146                                    struct mlx5_list_entry *entry)
9147 {
9148         struct mlx5_dev_ctx_shared *sh = tool_ctx;
9149         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9150
9151         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9152                         tunnel_flow_tbl_to_id(tte->flow_table));
9153         mlx5_free(tte);
9154 }
9155
9156 static int
9157 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused,
9158                                   struct mlx5_list_entry *entry, void *cb_ctx)
9159 {
9160         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9161         union tunnel_tbl_key tbl = {
9162                 .val = *(uint64_t *)(ctx->data),
9163         };
9164         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9165
9166         return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
9167 }
9168
9169 static struct mlx5_list_entry *
9170 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx)
9171 {
9172         struct mlx5_dev_ctx_shared *sh = tool_ctx;
9173         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9174         struct tunnel_tbl_entry *tte;
9175         union tunnel_tbl_key tbl = {
9176                 .val = *(uint64_t *)(ctx->data),
9177         };
9178
9179         tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
9180                           sizeof(*tte), 0,
9181                           SOCKET_ID_ANY);
9182         if (!tte)
9183                 goto err;
9184         mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9185                           &tte->flow_table);
9186         if (tte->flow_table >= MLX5_MAX_TABLES) {
9187                 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
9188                         tte->flow_table);
9189                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9190                                 tte->flow_table);
9191                 goto err;
9192         } else if (!tte->flow_table) {
9193                 goto err;
9194         }
9195         tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
9196         tte->tunnel_id = tbl.tunnel_id;
9197         tte->group = tbl.group;
9198         return &tte->hash;
9199 err:
9200         if (tte)
9201                 mlx5_free(tte);
9202         return NULL;
9203 }
9204
9205 static struct mlx5_list_entry *
9206 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused,
9207                                   struct mlx5_list_entry *oentry,
9208                                   void *cb_ctx __rte_unused)
9209 {
9210         struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte),
9211                                                    0, SOCKET_ID_ANY);
9212
9213         if (!tte)
9214                 return NULL;
9215         memcpy(tte, oentry, sizeof(*tte));
9216         return &tte->hash;
9217 }
9218
9219 static void
9220 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused,
9221                                        struct mlx5_list_entry *entry)
9222 {
9223         struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9224
9225         mlx5_free(tte);
9226 }
9227
9228 static uint32_t
9229 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
9230                                 const struct mlx5_flow_tunnel *tunnel,
9231                                 uint32_t group, uint32_t *table,
9232                                 struct rte_flow_error *error)
9233 {
9234         struct mlx5_list_entry *he;
9235         struct tunnel_tbl_entry *tte;
9236         union tunnel_tbl_key key = {
9237                 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
9238                 .group = group
9239         };
9240         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9241         struct mlx5_hlist *group_hash;
9242         struct mlx5_flow_cb_ctx ctx = {
9243                 .data = &key.val,
9244         };
9245
9246         group_hash = tunnel ? tunnel->groups : thub->groups;
9247         he = mlx5_hlist_register(group_hash, key.val, &ctx);
9248         if (!he)
9249                 return rte_flow_error_set(error, EINVAL,
9250                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
9251                                           NULL,
9252                                           "tunnel group index not supported");
9253         tte = container_of(he, typeof(*tte), hash);
9254         *table = tte->flow_table;
9255         DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
9256                 dev->data->port_id, key.tunnel_id, group, *table);
9257         return 0;
9258 }
9259
9260 static void
9261 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
9262                       struct mlx5_flow_tunnel *tunnel)
9263 {
9264         struct mlx5_priv *priv = dev->data->dev_private;
9265         struct mlx5_indexed_pool *ipool;
9266
9267         DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
9268                 dev->data->port_id, tunnel->tunnel_id);
9269         LIST_REMOVE(tunnel, chain);
9270         mlx5_hlist_destroy(tunnel->groups);
9271         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
9272         mlx5_ipool_free(ipool, tunnel->tunnel_id);
9273 }
9274
9275 static bool
9276 mlx5_access_tunnel_offload_db
9277         (struct rte_eth_dev *dev,
9278          bool (*match)(struct rte_eth_dev *,
9279                        struct mlx5_flow_tunnel *, const void *),
9280          void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
9281          void (*miss)(struct rte_eth_dev *, void *),
9282          void *ctx, bool lock_op)
9283 {
9284         bool verdict = false;
9285         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9286         struct mlx5_flow_tunnel *tunnel;
9287
9288         rte_spinlock_lock(&thub->sl);
9289         LIST_FOREACH(tunnel, &thub->tunnels, chain) {
9290                 verdict = match(dev, tunnel, (const void *)ctx);
9291                 if (verdict)
9292                         break;
9293         }
9294         if (!lock_op)
9295                 rte_spinlock_unlock(&thub->sl);
9296         if (verdict && hit)
9297                 hit(dev, tunnel, ctx);
9298         if (!verdict && miss)
9299                 miss(dev, ctx);
9300         if (lock_op)
9301                 rte_spinlock_unlock(&thub->sl);
9302
9303         return verdict;
9304 }
9305
9306 struct tunnel_db_find_tunnel_id_ctx {
9307         uint32_t tunnel_id;
9308         struct mlx5_flow_tunnel *tunnel;
9309 };
9310
9311 static bool
9312 find_tunnel_id_match(struct rte_eth_dev *dev,
9313                      struct mlx5_flow_tunnel *tunnel, const void *x)
9314 {
9315         const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
9316
9317         RTE_SET_USED(dev);
9318         return tunnel->tunnel_id == ctx->tunnel_id;
9319 }
9320
9321 static void
9322 find_tunnel_id_hit(struct rte_eth_dev *dev,
9323                    struct mlx5_flow_tunnel *tunnel, void *x)
9324 {
9325         struct tunnel_db_find_tunnel_id_ctx *ctx = x;
9326         RTE_SET_USED(dev);
9327         ctx->tunnel = tunnel;
9328 }
9329
9330 static struct mlx5_flow_tunnel *
9331 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
9332 {
9333         struct tunnel_db_find_tunnel_id_ctx ctx = {
9334                 .tunnel_id = id,
9335         };
9336
9337         mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
9338                                       find_tunnel_id_hit, NULL, &ctx, true);
9339
9340         return ctx.tunnel;
9341 }
9342
9343 static struct mlx5_flow_tunnel *
9344 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
9345                           const struct rte_flow_tunnel *app_tunnel)
9346 {
9347         struct mlx5_priv *priv = dev->data->dev_private;
9348         struct mlx5_indexed_pool *ipool;
9349         struct mlx5_flow_tunnel *tunnel;
9350         uint32_t id;
9351
9352         ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
9353         tunnel = mlx5_ipool_zmalloc(ipool, &id);
9354         if (!tunnel)
9355                 return NULL;
9356         if (id >= MLX5_MAX_TUNNELS) {
9357                 mlx5_ipool_free(ipool, id);
9358                 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
9359                 return NULL;
9360         }
9361         tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true,
9362                                            priv->sh,
9363                                            mlx5_flow_tunnel_grp2tbl_create_cb,
9364                                            mlx5_flow_tunnel_grp2tbl_match_cb,
9365                                            mlx5_flow_tunnel_grp2tbl_remove_cb,
9366                                            mlx5_flow_tunnel_grp2tbl_clone_cb,
9367                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9368         if (!tunnel->groups) {
9369                 mlx5_ipool_free(ipool, id);
9370                 return NULL;
9371         }
9372         /* initiate new PMD tunnel */
9373         memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
9374         tunnel->tunnel_id = id;
9375         tunnel->action.type = (typeof(tunnel->action.type))
9376                               MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
9377         tunnel->action.conf = tunnel;
9378         tunnel->item.type = (typeof(tunnel->item.type))
9379                             MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
9380         tunnel->item.spec = tunnel;
9381         tunnel->item.last = NULL;
9382         tunnel->item.mask = NULL;
9383
9384         DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
9385                 dev->data->port_id, tunnel->tunnel_id);
9386
9387         return tunnel;
9388 }
9389
9390 struct tunnel_db_get_tunnel_ctx {
9391         const struct rte_flow_tunnel *app_tunnel;
9392         struct mlx5_flow_tunnel *tunnel;
9393 };
9394
9395 static bool get_tunnel_match(struct rte_eth_dev *dev,
9396                              struct mlx5_flow_tunnel *tunnel, const void *x)
9397 {
9398         const struct tunnel_db_get_tunnel_ctx *ctx = x;
9399
9400         RTE_SET_USED(dev);
9401         return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
9402                        sizeof(*ctx->app_tunnel));
9403 }
9404
9405 static void get_tunnel_hit(struct rte_eth_dev *dev,
9406                            struct mlx5_flow_tunnel *tunnel, void *x)
9407 {
9408         /* called under tunnel spinlock protection */
9409         struct tunnel_db_get_tunnel_ctx *ctx = x;
9410
9411         RTE_SET_USED(dev);
9412         tunnel->refctn++;
9413         ctx->tunnel = tunnel;
9414 }
9415
9416 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
9417 {
9418         /* called under tunnel spinlock protection */
9419         struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9420         struct tunnel_db_get_tunnel_ctx *ctx = x;
9421
9422         rte_spinlock_unlock(&thub->sl);
9423         ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
9424         rte_spinlock_lock(&thub->sl);
9425         if (ctx->tunnel) {
9426                 ctx->tunnel->refctn = 1;
9427                 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
9428         }
9429 }
9430
9431
9432 static int
9433 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
9434                      const struct rte_flow_tunnel *app_tunnel,
9435                      struct mlx5_flow_tunnel **tunnel)
9436 {
9437         struct tunnel_db_get_tunnel_ctx ctx = {
9438                 .app_tunnel = app_tunnel,
9439         };
9440
9441         mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
9442                                       get_tunnel_miss, &ctx, true);
9443         *tunnel = ctx.tunnel;
9444         return ctx.tunnel ? 0 : -ENOMEM;
9445 }
9446
9447 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
9448 {
9449         struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
9450
9451         if (!thub)
9452                 return;
9453         if (!LIST_EMPTY(&thub->tunnels))
9454                 DRV_LOG(WARNING, "port %u tunnels present", port_id);
9455         mlx5_hlist_destroy(thub->groups);
9456         mlx5_free(thub);
9457 }
9458
9459 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
9460 {
9461         int err;
9462         struct mlx5_flow_tunnel_hub *thub;
9463
9464         thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
9465                            0, SOCKET_ID_ANY);
9466         if (!thub)
9467                 return -ENOMEM;
9468         LIST_INIT(&thub->tunnels);
9469         rte_spinlock_init(&thub->sl);
9470         thub->groups = mlx5_hlist_create("flow groups", 64,
9471                                          false, true, sh,
9472                                          mlx5_flow_tunnel_grp2tbl_create_cb,
9473                                          mlx5_flow_tunnel_grp2tbl_match_cb,
9474                                          mlx5_flow_tunnel_grp2tbl_remove_cb,
9475                                          mlx5_flow_tunnel_grp2tbl_clone_cb,
9476                                         mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9477         if (!thub->groups) {
9478                 err = -rte_errno;
9479                 goto err;
9480         }
9481         sh->tunnel_hub = thub;
9482
9483         return 0;
9484
9485 err:
9486         if (thub->groups)
9487                 mlx5_hlist_destroy(thub->groups);
9488         if (thub)
9489                 mlx5_free(thub);
9490         return err;
9491 }
9492
9493 static inline int
9494 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
9495                           struct rte_flow_tunnel *tunnel,
9496                           struct rte_flow_error *error)
9497 {
9498         struct mlx5_priv *priv = dev->data->dev_private;
9499
9500         if (!priv->config.dv_flow_en)
9501                 return rte_flow_error_set(error, ENOTSUP,
9502                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9503                                           "flow DV interface is off");
9504         if (!is_tunnel_offload_active(dev))
9505                 return rte_flow_error_set(error, ENOTSUP,
9506                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9507                                           "tunnel offload was not activated");
9508         if (!tunnel)
9509                 return rte_flow_error_set(error, EINVAL,
9510                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9511                                           "no application tunnel");
9512         switch (tunnel->type) {
9513         default:
9514                 return rte_flow_error_set(error, EINVAL,
9515                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9516                                           "unsupported tunnel type");
9517         case RTE_FLOW_ITEM_TYPE_VXLAN:
9518         case RTE_FLOW_ITEM_TYPE_GRE:
9519         case RTE_FLOW_ITEM_TYPE_NVGRE:
9520         case RTE_FLOW_ITEM_TYPE_GENEVE:
9521                 break;
9522         }
9523         return 0;
9524 }
9525
9526 static int
9527 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
9528                     struct rte_flow_tunnel *app_tunnel,
9529                     struct rte_flow_action **actions,
9530                     uint32_t *num_of_actions,
9531                     struct rte_flow_error *error)
9532 {
9533         struct mlx5_flow_tunnel *tunnel;
9534         int ret = mlx5_flow_tunnel_validate(dev, app_tunnel, error);
9535
9536         if (ret)
9537                 return ret;
9538         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9539         if (ret < 0) {
9540                 return rte_flow_error_set(error, ret,
9541                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
9542                                           "failed to initialize pmd tunnel");
9543         }
9544         *actions = &tunnel->action;
9545         *num_of_actions = 1;
9546         return 0;
9547 }
9548
9549 static int
9550 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
9551                        struct rte_flow_tunnel *app_tunnel,
9552                        struct rte_flow_item **items,
9553                        uint32_t *num_of_items,
9554                        struct rte_flow_error *error)
9555 {
9556         struct mlx5_flow_tunnel *tunnel;
9557         int ret = mlx5_flow_tunnel_validate(dev, app_tunnel, error);
9558
9559         if (ret)
9560                 return ret;
9561         ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
9562         if (ret < 0) {
9563                 return rte_flow_error_set(error, ret,
9564                                           RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9565                                           "failed to initialize pmd tunnel");
9566         }
9567         *items = &tunnel->item;
9568         *num_of_items = 1;
9569         return 0;
9570 }
9571
9572 struct tunnel_db_element_release_ctx {
9573         struct rte_flow_item *items;
9574         struct rte_flow_action *actions;
9575         uint32_t num_elements;
9576         struct rte_flow_error *error;
9577         int ret;
9578 };
9579
9580 static bool
9581 tunnel_element_release_match(struct rte_eth_dev *dev,
9582                              struct mlx5_flow_tunnel *tunnel, const void *x)
9583 {
9584         const struct tunnel_db_element_release_ctx *ctx = x;
9585
9586         RTE_SET_USED(dev);
9587         if (ctx->num_elements != 1)
9588                 return false;
9589         else if (ctx->items)
9590                 return ctx->items == &tunnel->item;
9591         else if (ctx->actions)
9592                 return ctx->actions == &tunnel->action;
9593
9594         return false;
9595 }
9596
9597 static void
9598 tunnel_element_release_hit(struct rte_eth_dev *dev,
9599                            struct mlx5_flow_tunnel *tunnel, void *x)
9600 {
9601         struct tunnel_db_element_release_ctx *ctx = x;
9602         ctx->ret = 0;
9603         if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
9604                 mlx5_flow_tunnel_free(dev, tunnel);
9605 }
9606
9607 static void
9608 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
9609 {
9610         struct tunnel_db_element_release_ctx *ctx = x;
9611         RTE_SET_USED(dev);
9612         ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
9613                                       RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
9614                                       "invalid argument");
9615 }
9616
9617 static int
9618 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
9619                        struct rte_flow_item *pmd_items,
9620                        uint32_t num_items, struct rte_flow_error *err)
9621 {
9622         struct tunnel_db_element_release_ctx ctx = {
9623                 .items = pmd_items,
9624                 .actions = NULL,
9625                 .num_elements = num_items,
9626                 .error = err,
9627         };
9628
9629         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9630                                       tunnel_element_release_hit,
9631                                       tunnel_element_release_miss, &ctx, false);
9632
9633         return ctx.ret;
9634 }
9635
9636 static int
9637 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
9638                          struct rte_flow_action *pmd_actions,
9639                          uint32_t num_actions, struct rte_flow_error *err)
9640 {
9641         struct tunnel_db_element_release_ctx ctx = {
9642                 .items = NULL,
9643                 .actions = pmd_actions,
9644                 .num_elements = num_actions,
9645                 .error = err,
9646         };
9647
9648         mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
9649                                       tunnel_element_release_hit,
9650                                       tunnel_element_release_miss, &ctx, false);
9651
9652         return ctx.ret;
9653 }
9654
9655 static int
9656 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
9657                                   struct rte_mbuf *m,
9658                                   struct rte_flow_restore_info *info,
9659                                   struct rte_flow_error *err)
9660 {
9661         uint64_t ol_flags = m->ol_flags;
9662         const struct mlx5_flow_tbl_data_entry *tble;
9663         const uint64_t mask = RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID;
9664
9665         if (!is_tunnel_offload_active(dev)) {
9666                 info->flags = 0;
9667                 return 0;
9668         }
9669
9670         if ((ol_flags & mask) != mask)
9671                 goto err;
9672         tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
9673         if (!tble) {
9674                 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
9675                         dev->data->port_id, m->hash.fdir.hi);
9676                 goto err;
9677         }
9678         MLX5_ASSERT(tble->tunnel);
9679         memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
9680         info->group_id = tble->group_id;
9681         info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
9682                       RTE_FLOW_RESTORE_INFO_GROUP_ID |
9683                       RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
9684
9685         return 0;
9686
9687 err:
9688         return rte_flow_error_set(err, EINVAL,
9689                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9690                                   "failed to get restore info");
9691 }
9692
9693 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
9694 static int
9695 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
9696                            __rte_unused struct rte_flow_tunnel *app_tunnel,
9697                            __rte_unused struct rte_flow_action **actions,
9698                            __rte_unused uint32_t *num_of_actions,
9699                            __rte_unused struct rte_flow_error *error)
9700 {
9701         return -ENOTSUP;
9702 }
9703
9704 static int
9705 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
9706                        __rte_unused struct rte_flow_tunnel *app_tunnel,
9707                        __rte_unused struct rte_flow_item **items,
9708                        __rte_unused uint32_t *num_of_items,
9709                        __rte_unused struct rte_flow_error *error)
9710 {
9711         return -ENOTSUP;
9712 }
9713
9714 static int
9715 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
9716                               __rte_unused struct rte_flow_item *pmd_items,
9717                               __rte_unused uint32_t num_items,
9718                               __rte_unused struct rte_flow_error *err)
9719 {
9720         return -ENOTSUP;
9721 }
9722
9723 static int
9724 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
9725                                 __rte_unused struct rte_flow_action *pmd_action,
9726                                 __rte_unused uint32_t num_actions,
9727                                 __rte_unused struct rte_flow_error *err)
9728 {
9729         return -ENOTSUP;
9730 }
9731
9732 static int
9733 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
9734                                   __rte_unused struct rte_mbuf *m,
9735                                   __rte_unused struct rte_flow_restore_info *i,
9736                                   __rte_unused struct rte_flow_error *err)
9737 {
9738         return -ENOTSUP;
9739 }
9740
9741 static int
9742 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
9743                              __rte_unused struct rte_flow *flow,
9744                              __rte_unused const struct rte_flow_attr *attr,
9745                              __rte_unused const struct rte_flow_action *actions,
9746                              __rte_unused uint32_t flow_idx,
9747                              __rte_unused const struct mlx5_flow_tunnel *tunnel,
9748                              __rte_unused struct tunnel_default_miss_ctx *ctx,
9749                              __rte_unused struct rte_flow_error *error)
9750 {
9751         return -ENOTSUP;
9752 }
9753
9754 static struct mlx5_flow_tunnel *
9755 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
9756                     __rte_unused uint32_t id)
9757 {
9758         return NULL;
9759 }
9760
9761 static void
9762 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
9763                       __rte_unused struct mlx5_flow_tunnel *tunnel)
9764 {
9765 }
9766
9767 static uint32_t
9768 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
9769                                 __rte_unused const struct mlx5_flow_tunnel *t,
9770                                 __rte_unused uint32_t group,
9771                                 __rte_unused uint32_t *table,
9772                                 struct rte_flow_error *error)
9773 {
9774         return rte_flow_error_set(error, ENOTSUP,
9775                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9776                                   "tunnel offload requires DV support");
9777 }
9778
9779 void
9780 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
9781                         __rte_unused  uint16_t port_id)
9782 {
9783 }
9784 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
9785
9786 /* Flex flow item API */
9787 static struct rte_flow_item_flex_handle *
9788 mlx5_flow_flex_item_create(struct rte_eth_dev *dev,
9789                            const struct rte_flow_item_flex_conf *conf,
9790                            struct rte_flow_error *error)
9791 {
9792         static const char err_msg[] = "flex item creation unsupported";
9793         struct rte_flow_attr attr = { .transfer = 0 };
9794         const struct mlx5_flow_driver_ops *fops =
9795                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9796
9797         if (!fops->item_create) {
9798                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9799                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9800                                    NULL, err_msg);
9801                 return NULL;
9802         }
9803         return fops->item_create(dev, conf, error);
9804 }
9805
9806 static int
9807 mlx5_flow_flex_item_release(struct rte_eth_dev *dev,
9808                             const struct rte_flow_item_flex_handle *handle,
9809                             struct rte_flow_error *error)
9810 {
9811         static const char err_msg[] = "flex item release unsupported";
9812         struct rte_flow_attr attr = { .transfer = 0 };
9813         const struct mlx5_flow_driver_ops *fops =
9814                         flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9815
9816         if (!fops->item_release) {
9817                 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9818                 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9819                                    NULL, err_msg);
9820                 return -rte_errno;
9821         }
9822         return fops->item_release(dev, handle, error);
9823 }
9824
9825 static void
9826 mlx5_dbg__print_pattern(const struct rte_flow_item *item)
9827 {
9828         int ret;
9829         struct rte_flow_error error;
9830
9831         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
9832                 char *item_name;
9833                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name,
9834                                     sizeof(item_name),
9835                                     (void *)(uintptr_t)item->type, &error);
9836                 if (ret > 0)
9837                         printf("%s ", item_name);
9838                 else
9839                         printf("%d\n", (int)item->type);
9840         }
9841         printf("END\n");
9842 }
9843
9844 static int
9845 mlx5_flow_is_std_vxlan_port(const struct rte_flow_item *udp_item)
9846 {
9847         const struct rte_flow_item_udp *spec = udp_item->spec;
9848         const struct rte_flow_item_udp *mask = udp_item->mask;
9849         uint16_t udp_dport = 0;
9850
9851         if (spec != NULL) {
9852                 if (!mask)
9853                         mask = &rte_flow_item_udp_mask;
9854                 udp_dport = rte_be_to_cpu_16(spec->hdr.dst_port &
9855                                 mask->hdr.dst_port);
9856         }
9857         return (!udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN);
9858 }
9859
9860 static const struct mlx5_flow_expand_node *
9861 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
9862                 unsigned int item_idx,
9863                 const struct mlx5_flow_expand_node graph[],
9864                 const struct mlx5_flow_expand_node *node)
9865 {
9866         const struct rte_flow_item *item = pattern + item_idx, *prev_item;
9867
9868         if (item->type == RTE_FLOW_ITEM_TYPE_VXLAN &&
9869                         node != NULL &&
9870                         node->type == RTE_FLOW_ITEM_TYPE_VXLAN) {
9871                 /*
9872                  * The expansion node is VXLAN and it is also the last
9873                  * expandable item in the pattern, so need to continue
9874                  * expansion of the inner tunnel.
9875                  */
9876                 MLX5_ASSERT(item_idx > 0);
9877                 prev_item = pattern + item_idx - 1;
9878                 MLX5_ASSERT(prev_item->type == RTE_FLOW_ITEM_TYPE_UDP);
9879                 if (mlx5_flow_is_std_vxlan_port(prev_item))
9880                         return &graph[MLX5_EXPANSION_STD_VXLAN];
9881                 return &graph[MLX5_EXPANSION_L3_VXLAN];
9882         }
9883         return node;
9884 }
9885
9886 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
9887 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
9888         { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
9889 };
9890
9891 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
9892 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
9893         { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
9894         { 9, 10, 11 }, { 12, 13, 14 },
9895 };
9896
9897 /**
9898  * Discover the number of available flow priorities.
9899  *
9900  * @param dev
9901  *   Ethernet device.
9902  *
9903  * @return
9904  *   On success, number of available flow priorities.
9905  *   On failure, a negative errno-style code and rte_errno is set.
9906  */
9907 int
9908 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
9909 {
9910         static const uint16_t vprio[] = {8, 16};
9911         const struct mlx5_priv *priv = dev->data->dev_private;
9912         const struct mlx5_flow_driver_ops *fops;
9913         enum mlx5_flow_drv_type type;
9914         int ret;
9915
9916         type = mlx5_flow_os_get_type();
9917         if (type == MLX5_FLOW_TYPE_MAX) {
9918                 type = MLX5_FLOW_TYPE_VERBS;
9919                 if (priv->sh->devx && priv->config.dv_flow_en)
9920                         type = MLX5_FLOW_TYPE_DV;
9921         }
9922         fops = flow_get_drv_ops(type);
9923         if (fops->discover_priorities == NULL) {
9924                 DRV_LOG(ERR, "Priority discovery not supported");
9925                 rte_errno = ENOTSUP;
9926                 return -rte_errno;
9927         }
9928         ret = fops->discover_priorities(dev, vprio, RTE_DIM(vprio));
9929         if (ret < 0)
9930                 return ret;
9931         switch (ret) {
9932         case 8:
9933                 ret = RTE_DIM(priority_map_3);
9934                 break;
9935         case 16:
9936                 ret = RTE_DIM(priority_map_5);
9937                 break;
9938         default:
9939                 rte_errno = ENOTSUP;
9940                 DRV_LOG(ERR,
9941                         "port %u maximum priority: %d expected 8/16",
9942                         dev->data->port_id, ret);
9943                 return -rte_errno;
9944         }
9945         DRV_LOG(INFO, "port %u supported flow priorities:"
9946                 " 0-%d for ingress or egress root table,"
9947                 " 0-%d for non-root table or transfer root table.",
9948                 dev->data->port_id, ret - 2,
9949                 MLX5_NON_ROOT_FLOW_MAX_PRIO - 1);
9950         return ret;
9951 }
9952
9953 /**
9954  * Adjust flow priority based on the highest layer and the request priority.
9955  *
9956  * @param[in] dev
9957  *   Pointer to the Ethernet device structure.
9958  * @param[in] priority
9959  *   The rule base priority.
9960  * @param[in] subpriority
9961  *   The priority based on the items.
9962  *
9963  * @return
9964  *   The new priority.
9965  */
9966 uint32_t
9967 mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
9968                           uint32_t subpriority)
9969 {
9970         uint32_t res = 0;
9971         struct mlx5_priv *priv = dev->data->dev_private;
9972
9973         switch (priv->sh->flow_max_priority) {
9974         case RTE_DIM(priority_map_3):
9975                 res = priority_map_3[priority][subpriority];
9976                 break;
9977         case RTE_DIM(priority_map_5):
9978                 res = priority_map_5[priority][subpriority];
9979                 break;
9980         }
9981         return  res;
9982 }