1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2016 6WIND S.A.
3 * Copyright 2016 Mellanox Technologies, Ltd
10 #include <sys/queue.h>
12 #include <rte_common.h>
13 #include <rte_ether.h>
14 #include <ethdev_driver.h>
15 #include <rte_eal_paging.h>
17 #include <rte_cycles.h>
18 #include <rte_flow_driver.h>
19 #include <rte_malloc.h>
22 #include <mlx5_glue.h>
23 #include <mlx5_devx_cmds.h>
25 #include <mlx5_malloc.h>
27 #include "mlx5_defs.h"
29 #include "mlx5_flow.h"
30 #include "mlx5_flow_os.h"
33 #include "mlx5_common_os.h"
34 #include "rte_pmd_mlx5.h"
36 struct tunnel_default_miss_ctx {
40 struct rte_flow_action_rss action_rss;
41 struct rte_flow_action_queue miss_queue;
42 struct rte_flow_action_jump miss_jump;
48 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
49 struct rte_flow *flow,
50 const struct rte_flow_attr *attr,
51 const struct rte_flow_action *app_actions,
53 const struct mlx5_flow_tunnel *tunnel,
54 struct tunnel_default_miss_ctx *ctx,
55 struct rte_flow_error *error);
56 static struct mlx5_flow_tunnel *
57 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id);
59 mlx5_flow_tunnel_free(struct rte_eth_dev *dev, struct mlx5_flow_tunnel *tunnel);
61 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
62 const struct mlx5_flow_tunnel *tunnel,
63 uint32_t group, uint32_t *table,
64 struct rte_flow_error *error);
66 static struct mlx5_flow_workspace *mlx5_flow_push_thread_workspace(void);
67 static void mlx5_flow_pop_thread_workspace(void);
70 /** Device flow drivers. */
71 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
73 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
75 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
76 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
77 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
78 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
79 [MLX5_FLOW_TYPE_HW] = &mlx5_flow_hw_drv_ops,
81 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
82 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
85 /** Helper macro to build input graph for mlx5_flow_expand_rss(). */
86 #define MLX5_FLOW_EXPAND_RSS_NEXT(...) \
91 /** Node object of input graph for mlx5_flow_expand_rss(). */
92 struct mlx5_flow_expand_node {
93 const int *const next;
95 * List of next node indexes. Index 0 is interpreted as a terminator.
97 const enum rte_flow_item_type type;
98 /**< Pattern item type of current node. */
101 * RSS types bit-field associated with this node
102 * (see RTE_ETH_RSS_* definitions).
106 * Bit-fields that define how the node is used in the expansion.
107 * (see MLX5_EXPANSION_NODE_* definitions).
111 /* Optional expand field. The expansion alg will not go deeper. */
112 #define MLX5_EXPANSION_NODE_OPTIONAL (UINT64_C(1) << 0)
114 /* The node is not added implicitly as expansion to the flow pattern.
115 * If the node type does not match the flow pattern item type, the
116 * expansion alg will go deeper to its next items.
117 * In the current implementation, the list of next nodes indexes can
118 * have up to one node with this flag set and it has to be the last
119 * node index (before the list terminator).
121 #define MLX5_EXPANSION_NODE_EXPLICIT (UINT64_C(1) << 1)
123 /** Object returned by mlx5_flow_expand_rss(). */
124 struct mlx5_flow_expand_rss {
126 /**< Number of entries @p patterns and @p priorities. */
128 struct rte_flow_item *pattern; /**< Expanded pattern array. */
129 uint32_t priority; /**< Priority offset for each expansion. */
134 mlx5_dbg__print_pattern(const struct rte_flow_item *item);
136 static const struct mlx5_flow_expand_node *
137 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
138 unsigned int item_idx,
139 const struct mlx5_flow_expand_node graph[],
140 const struct mlx5_flow_expand_node *node);
143 mlx5_flow_is_rss_expandable_item(const struct rte_flow_item *item)
145 switch (item->type) {
146 case RTE_FLOW_ITEM_TYPE_ETH:
147 case RTE_FLOW_ITEM_TYPE_VLAN:
148 case RTE_FLOW_ITEM_TYPE_IPV4:
149 case RTE_FLOW_ITEM_TYPE_IPV6:
150 case RTE_FLOW_ITEM_TYPE_UDP:
151 case RTE_FLOW_ITEM_TYPE_TCP:
152 case RTE_FLOW_ITEM_TYPE_VXLAN:
153 case RTE_FLOW_ITEM_TYPE_NVGRE:
154 case RTE_FLOW_ITEM_TYPE_GRE:
155 case RTE_FLOW_ITEM_TYPE_GENEVE:
156 case RTE_FLOW_ITEM_TYPE_MPLS:
157 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
158 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
159 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
160 case RTE_FLOW_ITEM_TYPE_GTP:
169 * Network Service Header (NSH) and its next protocol values
170 * are described in RFC-8393.
172 static enum rte_flow_item_type
173 mlx5_nsh_proto_to_item_type(uint8_t proto_spec, uint8_t proto_mask)
175 enum rte_flow_item_type type;
177 switch (proto_mask & proto_spec) {
178 case RTE_VXLAN_GPE_TYPE_IPV4:
179 type = RTE_FLOW_ITEM_TYPE_IPV4;
181 case RTE_VXLAN_GPE_TYPE_IPV6:
182 type = RTE_VXLAN_GPE_TYPE_IPV6;
184 case RTE_VXLAN_GPE_TYPE_ETH:
185 type = RTE_FLOW_ITEM_TYPE_ETH;
188 type = RTE_FLOW_ITEM_TYPE_END;
193 static enum rte_flow_item_type
194 mlx5_inet_proto_to_item_type(uint8_t proto_spec, uint8_t proto_mask)
196 enum rte_flow_item_type type;
198 switch (proto_mask & proto_spec) {
200 type = RTE_FLOW_ITEM_TYPE_UDP;
203 type = RTE_FLOW_ITEM_TYPE_TCP;
206 type = RTE_FLOW_ITEM_TYPE_IPV4;
209 type = RTE_FLOW_ITEM_TYPE_IPV6;
212 type = RTE_FLOW_ITEM_TYPE_END;
217 static enum rte_flow_item_type
218 mlx5_ethertype_to_item_type(rte_be16_t type_spec,
219 rte_be16_t type_mask, bool is_tunnel)
221 enum rte_flow_item_type type;
223 switch (rte_be_to_cpu_16(type_spec & type_mask)) {
224 case RTE_ETHER_TYPE_TEB:
226 RTE_FLOW_ITEM_TYPE_ETH : RTE_FLOW_ITEM_TYPE_END;
228 case RTE_ETHER_TYPE_VLAN:
230 RTE_FLOW_ITEM_TYPE_VLAN : RTE_FLOW_ITEM_TYPE_END;
232 case RTE_ETHER_TYPE_IPV4:
233 type = RTE_FLOW_ITEM_TYPE_IPV4;
235 case RTE_ETHER_TYPE_IPV6:
236 type = RTE_FLOW_ITEM_TYPE_IPV6;
239 type = RTE_FLOW_ITEM_TYPE_END;
244 static enum rte_flow_item_type
245 mlx5_flow_expand_rss_item_complete(const struct rte_flow_item *item)
247 #define MLX5_XSET_ITEM_MASK_SPEC(type, fld) \
249 const void *m = item->mask; \
250 const void *s = item->spec; \
252 ((const struct rte_flow_item_##type *)m)->fld : \
253 rte_flow_item_##type##_mask.fld; \
254 spec = ((const struct rte_flow_item_##type *)s)->fld; \
257 enum rte_flow_item_type ret;
260 if (item == NULL || item->spec == NULL)
261 return RTE_FLOW_ITEM_TYPE_VOID;
262 switch (item->type) {
263 case RTE_FLOW_ITEM_TYPE_ETH:
264 MLX5_XSET_ITEM_MASK_SPEC(eth, type);
266 return RTE_FLOW_ITEM_TYPE_VOID;
267 ret = mlx5_ethertype_to_item_type(spec, mask, false);
269 case RTE_FLOW_ITEM_TYPE_VLAN:
270 MLX5_XSET_ITEM_MASK_SPEC(vlan, inner_type);
272 return RTE_FLOW_ITEM_TYPE_VOID;
273 ret = mlx5_ethertype_to_item_type(spec, mask, false);
275 case RTE_FLOW_ITEM_TYPE_IPV4:
276 MLX5_XSET_ITEM_MASK_SPEC(ipv4, hdr.next_proto_id);
278 return RTE_FLOW_ITEM_TYPE_VOID;
279 ret = mlx5_inet_proto_to_item_type(spec, mask);
281 case RTE_FLOW_ITEM_TYPE_IPV6:
282 MLX5_XSET_ITEM_MASK_SPEC(ipv6, hdr.proto);
284 return RTE_FLOW_ITEM_TYPE_VOID;
285 ret = mlx5_inet_proto_to_item_type(spec, mask);
287 case RTE_FLOW_ITEM_TYPE_GENEVE:
288 MLX5_XSET_ITEM_MASK_SPEC(geneve, protocol);
289 ret = mlx5_ethertype_to_item_type(spec, mask, true);
291 case RTE_FLOW_ITEM_TYPE_GRE:
292 MLX5_XSET_ITEM_MASK_SPEC(gre, protocol);
293 ret = mlx5_ethertype_to_item_type(spec, mask, true);
295 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
296 MLX5_XSET_ITEM_MASK_SPEC(vxlan_gpe, protocol);
297 ret = mlx5_nsh_proto_to_item_type(spec, mask);
300 ret = RTE_FLOW_ITEM_TYPE_VOID;
304 #undef MLX5_XSET_ITEM_MASK_SPEC
308 mlx5_flow_expand_rss_skip_explicit(const struct mlx5_flow_expand_node graph[],
309 const int *next_node)
311 const struct mlx5_flow_expand_node *node = NULL;
312 const int *next = next_node;
314 while (next && *next) {
316 * Skip the nodes with the MLX5_EXPANSION_NODE_EXPLICIT
317 * flag set, because they were not found in the flow pattern.
319 node = &graph[*next];
320 if (!(node->node_flags & MLX5_EXPANSION_NODE_EXPLICIT))
327 #define MLX5_RSS_EXP_ELT_N 16
330 * Expand RSS flows into several possible flows according to the RSS hash
331 * fields requested and the driver capabilities.
334 * Buffer to store the result expansion.
336 * Buffer size in bytes. If 0, @p buf can be NULL.
340 * RSS types to expand (see RTE_ETH_RSS_* definitions).
342 * Input graph to expand @p pattern according to @p types.
343 * @param[in] graph_root_index
344 * Index of root node in @p graph, typically 0.
347 * A positive value representing the size of @p buf in bytes regardless of
348 * @p size on success, a negative errno value otherwise and rte_errno is
349 * set, the following errors are defined:
351 * -E2BIG: graph-depth @p graph is too deep.
352 * -EINVAL: @p size has not enough space for expanded pattern.
355 mlx5_flow_expand_rss(struct mlx5_flow_expand_rss *buf, size_t size,
356 const struct rte_flow_item *pattern, uint64_t types,
357 const struct mlx5_flow_expand_node graph[],
358 int graph_root_index)
360 const struct rte_flow_item *item;
361 const struct mlx5_flow_expand_node *node = &graph[graph_root_index];
362 const int *next_node;
363 const int *stack[MLX5_RSS_EXP_ELT_N];
365 struct rte_flow_item flow_items[MLX5_RSS_EXP_ELT_N];
366 unsigned int i, item_idx, last_expand_item_idx = 0;
368 size_t user_pattern_size = 0;
370 const struct mlx5_flow_expand_node *next = NULL;
371 struct rte_flow_item missed_item;
374 const struct rte_flow_item *last_expand_item = NULL;
376 memset(&missed_item, 0, sizeof(missed_item));
377 lsize = offsetof(struct mlx5_flow_expand_rss, entry) +
378 MLX5_RSS_EXP_ELT_N * sizeof(buf->entry[0]);
381 buf->entry[0].priority = 0;
382 buf->entry[0].pattern = (void *)&buf->entry[MLX5_RSS_EXP_ELT_N];
384 addr = buf->entry[0].pattern;
385 for (item = pattern, item_idx = 0;
386 item->type != RTE_FLOW_ITEM_TYPE_END;
387 item++, item_idx++) {
388 if (!mlx5_flow_is_rss_expandable_item(item)) {
389 user_pattern_size += sizeof(*item);
392 last_expand_item = item;
393 last_expand_item_idx = item_idx;
395 while (node->next && node->next[i]) {
396 next = &graph[node->next[i]];
397 if (next->type == item->type)
399 if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
408 user_pattern_size += sizeof(*item);
410 user_pattern_size += sizeof(*item); /* Handle END item. */
411 lsize += user_pattern_size;
414 /* Copy the user pattern in the first entry of the buffer. */
415 rte_memcpy(addr, pattern, user_pattern_size);
416 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
418 /* Start expanding. */
419 memset(flow_items, 0, sizeof(flow_items));
420 user_pattern_size -= sizeof(*item);
422 * Check if the last valid item has spec set, need complete pattern,
423 * and the pattern can be used for expansion.
425 missed_item.type = mlx5_flow_expand_rss_item_complete(last_expand_item);
426 if (missed_item.type == RTE_FLOW_ITEM_TYPE_END) {
427 /* Item type END indicates expansion is not required. */
430 if (missed_item.type != RTE_FLOW_ITEM_TYPE_VOID) {
434 while (node->next && node->next[i]) {
435 next = &graph[node->next[i]];
436 if (next->type == missed_item.type) {
437 flow_items[0].type = missed_item.type;
438 flow_items[1].type = RTE_FLOW_ITEM_TYPE_END;
441 if (next->node_flags & MLX5_EXPANSION_NODE_EXPLICIT) {
450 if (next && missed) {
451 elt = 2; /* missed item + item end. */
453 lsize += elt * sizeof(*item) + user_pattern_size;
456 if (node->rss_types & types) {
457 buf->entry[buf->entries].priority = 1;
458 buf->entry[buf->entries].pattern = addr;
460 rte_memcpy(addr, buf->entry[0].pattern,
462 addr = (void *)(((uintptr_t)addr) + user_pattern_size);
463 rte_memcpy(addr, flow_items, elt * sizeof(*item));
464 addr = (void *)(((uintptr_t)addr) +
465 elt * sizeof(*item));
467 } else if (last_expand_item != NULL) {
468 node = mlx5_flow_expand_rss_adjust_node(pattern,
469 last_expand_item_idx, graph, node);
471 memset(flow_items, 0, sizeof(flow_items));
472 next_node = mlx5_flow_expand_rss_skip_explicit(graph,
474 stack[stack_pos] = next_node;
475 node = next_node ? &graph[*next_node] : NULL;
477 flow_items[stack_pos].type = node->type;
478 if (node->rss_types & types) {
481 * compute the number of items to copy from the
482 * expansion and copy it.
483 * When the stack_pos is 0, there are 1 element in it,
484 * plus the addition END item.
487 flow_items[stack_pos + 1].type = RTE_FLOW_ITEM_TYPE_END;
488 lsize += elt * sizeof(*item) + user_pattern_size;
491 n = elt * sizeof(*item);
492 buf->entry[buf->entries].priority =
493 stack_pos + 1 + missed;
494 buf->entry[buf->entries].pattern = addr;
496 rte_memcpy(addr, buf->entry[0].pattern,
498 addr = (void *)(((uintptr_t)addr) +
500 rte_memcpy(addr, &missed_item,
501 missed * sizeof(*item));
502 addr = (void *)(((uintptr_t)addr) +
503 missed * sizeof(*item));
504 rte_memcpy(addr, flow_items, n);
505 addr = (void *)(((uintptr_t)addr) + n);
508 if (!(node->node_flags & MLX5_EXPANSION_NODE_OPTIONAL) &&
510 next_node = mlx5_flow_expand_rss_skip_explicit(graph,
512 if (stack_pos++ == MLX5_RSS_EXP_ELT_N) {
516 stack[stack_pos] = next_node;
517 } else if (*(next_node + 1)) {
518 /* Follow up with the next possibility. */
519 next_node = mlx5_flow_expand_rss_skip_explicit(graph,
521 } else if (!stack_pos) {
523 * Completing the traverse over the different paths.
524 * The next_node is advanced to the terminator.
528 /* Move to the next path. */
530 next_node = stack[--stack_pos];
535 next_node = mlx5_flow_expand_rss_skip_explicit(graph,
537 stack[stack_pos] = next_node;
539 node = next_node && *next_node ? &graph[*next_node] : NULL;
544 enum mlx5_expansion {
546 MLX5_EXPANSION_ROOT_OUTER,
547 MLX5_EXPANSION_OUTER_ETH,
548 MLX5_EXPANSION_OUTER_VLAN,
549 MLX5_EXPANSION_OUTER_IPV4,
550 MLX5_EXPANSION_OUTER_IPV4_UDP,
551 MLX5_EXPANSION_OUTER_IPV4_TCP,
552 MLX5_EXPANSION_OUTER_IPV6,
553 MLX5_EXPANSION_OUTER_IPV6_UDP,
554 MLX5_EXPANSION_OUTER_IPV6_TCP,
555 MLX5_EXPANSION_VXLAN,
556 MLX5_EXPANSION_STD_VXLAN,
557 MLX5_EXPANSION_L3_VXLAN,
558 MLX5_EXPANSION_VXLAN_GPE,
560 MLX5_EXPANSION_NVGRE,
561 MLX5_EXPANSION_GRE_KEY,
566 MLX5_EXPANSION_IPV4_UDP,
567 MLX5_EXPANSION_IPV4_TCP,
569 MLX5_EXPANSION_IPV6_UDP,
570 MLX5_EXPANSION_IPV6_TCP,
571 MLX5_EXPANSION_IPV6_FRAG_EXT,
573 MLX5_EXPANSION_GENEVE,
576 /** Supported expansion of items. */
577 static const struct mlx5_flow_expand_node mlx5_support_expansion[] = {
578 [MLX5_EXPANSION_ROOT] = {
579 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
581 MLX5_EXPANSION_IPV6),
582 .type = RTE_FLOW_ITEM_TYPE_END,
584 [MLX5_EXPANSION_ROOT_OUTER] = {
585 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
586 MLX5_EXPANSION_OUTER_IPV4,
587 MLX5_EXPANSION_OUTER_IPV6),
588 .type = RTE_FLOW_ITEM_TYPE_END,
590 [MLX5_EXPANSION_OUTER_ETH] = {
591 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
592 .type = RTE_FLOW_ITEM_TYPE_ETH,
595 [MLX5_EXPANSION_OUTER_VLAN] = {
596 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
597 MLX5_EXPANSION_OUTER_IPV6),
598 .type = RTE_FLOW_ITEM_TYPE_VLAN,
599 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
601 [MLX5_EXPANSION_OUTER_IPV4] = {
602 .next = MLX5_FLOW_EXPAND_RSS_NEXT
603 (MLX5_EXPANSION_OUTER_IPV4_UDP,
604 MLX5_EXPANSION_OUTER_IPV4_TCP,
606 MLX5_EXPANSION_NVGRE,
608 MLX5_EXPANSION_IPV6),
609 .type = RTE_FLOW_ITEM_TYPE_IPV4,
610 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 |
611 RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
613 [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
614 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
615 MLX5_EXPANSION_VXLAN_GPE,
617 MLX5_EXPANSION_GENEVE,
619 .type = RTE_FLOW_ITEM_TYPE_UDP,
620 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP,
622 [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
623 .type = RTE_FLOW_ITEM_TYPE_TCP,
624 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP,
626 [MLX5_EXPANSION_OUTER_IPV6] = {
627 .next = MLX5_FLOW_EXPAND_RSS_NEXT
628 (MLX5_EXPANSION_OUTER_IPV6_UDP,
629 MLX5_EXPANSION_OUTER_IPV6_TCP,
633 MLX5_EXPANSION_NVGRE),
634 .type = RTE_FLOW_ITEM_TYPE_IPV6,
635 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 |
636 RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
638 [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
639 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
640 MLX5_EXPANSION_VXLAN_GPE,
642 MLX5_EXPANSION_GENEVE,
644 .type = RTE_FLOW_ITEM_TYPE_UDP,
645 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP,
647 [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
648 .type = RTE_FLOW_ITEM_TYPE_TCP,
649 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP,
651 [MLX5_EXPANSION_VXLAN] = {
652 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
654 MLX5_EXPANSION_IPV6),
655 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
657 [MLX5_EXPANSION_STD_VXLAN] = {
658 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
659 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
661 [MLX5_EXPANSION_L3_VXLAN] = {
662 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
663 MLX5_EXPANSION_IPV6),
664 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
666 [MLX5_EXPANSION_VXLAN_GPE] = {
667 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
669 MLX5_EXPANSION_IPV6),
670 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
672 [MLX5_EXPANSION_GRE] = {
673 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
676 MLX5_EXPANSION_GRE_KEY,
677 MLX5_EXPANSION_MPLS),
678 .type = RTE_FLOW_ITEM_TYPE_GRE,
680 [MLX5_EXPANSION_GRE_KEY] = {
681 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
683 MLX5_EXPANSION_MPLS),
684 .type = RTE_FLOW_ITEM_TYPE_GRE_KEY,
685 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
687 [MLX5_EXPANSION_NVGRE] = {
688 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
689 .type = RTE_FLOW_ITEM_TYPE_NVGRE,
691 [MLX5_EXPANSION_MPLS] = {
692 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
695 .type = RTE_FLOW_ITEM_TYPE_MPLS,
696 .node_flags = MLX5_EXPANSION_NODE_OPTIONAL,
698 [MLX5_EXPANSION_ETH] = {
699 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
700 .type = RTE_FLOW_ITEM_TYPE_ETH,
702 [MLX5_EXPANSION_VLAN] = {
703 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
704 MLX5_EXPANSION_IPV6),
705 .type = RTE_FLOW_ITEM_TYPE_VLAN,
706 .node_flags = MLX5_EXPANSION_NODE_EXPLICIT,
708 [MLX5_EXPANSION_IPV4] = {
709 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
710 MLX5_EXPANSION_IPV4_TCP),
711 .type = RTE_FLOW_ITEM_TYPE_IPV4,
712 .rss_types = RTE_ETH_RSS_IPV4 | RTE_ETH_RSS_FRAG_IPV4 |
713 RTE_ETH_RSS_NONFRAG_IPV4_OTHER,
715 [MLX5_EXPANSION_IPV4_UDP] = {
716 .type = RTE_FLOW_ITEM_TYPE_UDP,
717 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_UDP,
719 [MLX5_EXPANSION_IPV4_TCP] = {
720 .type = RTE_FLOW_ITEM_TYPE_TCP,
721 .rss_types = RTE_ETH_RSS_NONFRAG_IPV4_TCP,
723 [MLX5_EXPANSION_IPV6] = {
724 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
725 MLX5_EXPANSION_IPV6_TCP,
726 MLX5_EXPANSION_IPV6_FRAG_EXT),
727 .type = RTE_FLOW_ITEM_TYPE_IPV6,
728 .rss_types = RTE_ETH_RSS_IPV6 | RTE_ETH_RSS_FRAG_IPV6 |
729 RTE_ETH_RSS_NONFRAG_IPV6_OTHER,
731 [MLX5_EXPANSION_IPV6_UDP] = {
732 .type = RTE_FLOW_ITEM_TYPE_UDP,
733 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_UDP,
735 [MLX5_EXPANSION_IPV6_TCP] = {
736 .type = RTE_FLOW_ITEM_TYPE_TCP,
737 .rss_types = RTE_ETH_RSS_NONFRAG_IPV6_TCP,
739 [MLX5_EXPANSION_IPV6_FRAG_EXT] = {
740 .type = RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT,
742 [MLX5_EXPANSION_GTP] = {
743 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
744 MLX5_EXPANSION_IPV6),
745 .type = RTE_FLOW_ITEM_TYPE_GTP,
747 [MLX5_EXPANSION_GENEVE] = {
748 .next = MLX5_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
750 MLX5_EXPANSION_IPV6),
751 .type = RTE_FLOW_ITEM_TYPE_GENEVE,
755 static struct rte_flow_action_handle *
756 mlx5_action_handle_create(struct rte_eth_dev *dev,
757 const struct rte_flow_indir_action_conf *conf,
758 const struct rte_flow_action *action,
759 struct rte_flow_error *error);
760 static int mlx5_action_handle_destroy
761 (struct rte_eth_dev *dev,
762 struct rte_flow_action_handle *handle,
763 struct rte_flow_error *error);
764 static int mlx5_action_handle_update
765 (struct rte_eth_dev *dev,
766 struct rte_flow_action_handle *handle,
768 struct rte_flow_error *error);
769 static int mlx5_action_handle_query
770 (struct rte_eth_dev *dev,
771 const struct rte_flow_action_handle *handle,
773 struct rte_flow_error *error);
775 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
776 struct rte_flow_tunnel *app_tunnel,
777 struct rte_flow_action **actions,
778 uint32_t *num_of_actions,
779 struct rte_flow_error *error);
781 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
782 struct rte_flow_tunnel *app_tunnel,
783 struct rte_flow_item **items,
784 uint32_t *num_of_items,
785 struct rte_flow_error *error);
787 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
788 struct rte_flow_item *pmd_items,
789 uint32_t num_items, struct rte_flow_error *err);
791 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
792 struct rte_flow_action *pmd_actions,
793 uint32_t num_actions,
794 struct rte_flow_error *err);
796 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
798 struct rte_flow_restore_info *info,
799 struct rte_flow_error *err);
800 static struct rte_flow_item_flex_handle *
801 mlx5_flow_flex_item_create(struct rte_eth_dev *dev,
802 const struct rte_flow_item_flex_conf *conf,
803 struct rte_flow_error *error);
805 mlx5_flow_flex_item_release(struct rte_eth_dev *dev,
806 const struct rte_flow_item_flex_handle *handle,
807 struct rte_flow_error *error);
809 mlx5_flow_info_get(struct rte_eth_dev *dev,
810 struct rte_flow_port_info *port_info,
811 struct rte_flow_queue_info *queue_info,
812 struct rte_flow_error *error);
814 mlx5_flow_port_configure(struct rte_eth_dev *dev,
815 const struct rte_flow_port_attr *port_attr,
817 const struct rte_flow_queue_attr *queue_attr[],
818 struct rte_flow_error *err);
820 static struct rte_flow_pattern_template *
821 mlx5_flow_pattern_template_create(struct rte_eth_dev *dev,
822 const struct rte_flow_pattern_template_attr *attr,
823 const struct rte_flow_item items[],
824 struct rte_flow_error *error);
827 mlx5_flow_pattern_template_destroy(struct rte_eth_dev *dev,
828 struct rte_flow_pattern_template *template,
829 struct rte_flow_error *error);
830 static struct rte_flow_actions_template *
831 mlx5_flow_actions_template_create(struct rte_eth_dev *dev,
832 const struct rte_flow_actions_template_attr *attr,
833 const struct rte_flow_action actions[],
834 const struct rte_flow_action masks[],
835 struct rte_flow_error *error);
837 mlx5_flow_actions_template_destroy(struct rte_eth_dev *dev,
838 struct rte_flow_actions_template *template,
839 struct rte_flow_error *error);
841 static struct rte_flow_template_table *
842 mlx5_flow_table_create(struct rte_eth_dev *dev,
843 const struct rte_flow_template_table_attr *attr,
844 struct rte_flow_pattern_template *item_templates[],
845 uint8_t nb_item_templates,
846 struct rte_flow_actions_template *action_templates[],
847 uint8_t nb_action_templates,
848 struct rte_flow_error *error);
850 mlx5_flow_table_destroy(struct rte_eth_dev *dev,
851 struct rte_flow_template_table *table,
852 struct rte_flow_error *error);
853 static struct rte_flow *
854 mlx5_flow_async_flow_create(struct rte_eth_dev *dev,
856 const struct rte_flow_op_attr *attr,
857 struct rte_flow_template_table *table,
858 const struct rte_flow_item items[],
859 uint8_t pattern_template_index,
860 const struct rte_flow_action actions[],
861 uint8_t action_template_index,
863 struct rte_flow_error *error);
865 mlx5_flow_async_flow_destroy(struct rte_eth_dev *dev,
867 const struct rte_flow_op_attr *attr,
868 struct rte_flow *flow,
870 struct rte_flow_error *error);
872 mlx5_flow_pull(struct rte_eth_dev *dev,
874 struct rte_flow_op_result res[],
876 struct rte_flow_error *error);
878 mlx5_flow_push(struct rte_eth_dev *dev,
880 struct rte_flow_error *error);
882 static const struct rte_flow_ops mlx5_flow_ops = {
883 .validate = mlx5_flow_validate,
884 .create = mlx5_flow_create,
885 .destroy = mlx5_flow_destroy,
886 .flush = mlx5_flow_flush,
887 .isolate = mlx5_flow_isolate,
888 .query = mlx5_flow_query,
889 .dev_dump = mlx5_flow_dev_dump,
890 .get_aged_flows = mlx5_flow_get_aged_flows,
891 .action_handle_create = mlx5_action_handle_create,
892 .action_handle_destroy = mlx5_action_handle_destroy,
893 .action_handle_update = mlx5_action_handle_update,
894 .action_handle_query = mlx5_action_handle_query,
895 .tunnel_decap_set = mlx5_flow_tunnel_decap_set,
896 .tunnel_match = mlx5_flow_tunnel_match,
897 .tunnel_action_decap_release = mlx5_flow_tunnel_action_release,
898 .tunnel_item_release = mlx5_flow_tunnel_item_release,
899 .get_restore_info = mlx5_flow_tunnel_get_restore_info,
900 .flex_item_create = mlx5_flow_flex_item_create,
901 .flex_item_release = mlx5_flow_flex_item_release,
902 .info_get = mlx5_flow_info_get,
903 .configure = mlx5_flow_port_configure,
904 .pattern_template_create = mlx5_flow_pattern_template_create,
905 .pattern_template_destroy = mlx5_flow_pattern_template_destroy,
906 .actions_template_create = mlx5_flow_actions_template_create,
907 .actions_template_destroy = mlx5_flow_actions_template_destroy,
908 .template_table_create = mlx5_flow_table_create,
909 .template_table_destroy = mlx5_flow_table_destroy,
910 .async_create = mlx5_flow_async_flow_create,
911 .async_destroy = mlx5_flow_async_flow_destroy,
912 .pull = mlx5_flow_pull,
913 .push = mlx5_flow_push,
916 /* Tunnel information. */
917 struct mlx5_flow_tunnel_info {
918 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
919 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
922 static struct mlx5_flow_tunnel_info tunnels_info[] = {
924 .tunnel = MLX5_FLOW_LAYER_VXLAN,
925 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
928 .tunnel = MLX5_FLOW_LAYER_GENEVE,
929 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
932 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
933 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
936 .tunnel = MLX5_FLOW_LAYER_GRE,
937 .ptype = RTE_PTYPE_TUNNEL_GRE,
940 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
941 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
944 .tunnel = MLX5_FLOW_LAYER_MPLS,
945 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
948 .tunnel = MLX5_FLOW_LAYER_NVGRE,
949 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
952 .tunnel = MLX5_FLOW_LAYER_IPIP,
953 .ptype = RTE_PTYPE_TUNNEL_IP,
956 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
957 .ptype = RTE_PTYPE_TUNNEL_IP,
960 .tunnel = MLX5_FLOW_LAYER_GTP,
961 .ptype = RTE_PTYPE_TUNNEL_GTPU,
968 * Translate tag ID to register.
971 * Pointer to the Ethernet device structure.
973 * The feature that request the register.
975 * The request register ID.
977 * Error description in case of any.
980 * The request register on success, a negative errno
981 * value otherwise and rte_errno is set.
984 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
985 enum mlx5_feature_name feature,
987 struct rte_flow_error *error)
989 struct mlx5_priv *priv = dev->data->dev_private;
990 struct mlx5_sh_config *config = &priv->sh->config;
991 enum modify_reg start_reg;
992 bool skip_mtr_reg = false;
995 case MLX5_HAIRPIN_RX:
997 case MLX5_HAIRPIN_TX:
999 case MLX5_METADATA_RX:
1000 switch (config->dv_xmeta_en) {
1001 case MLX5_XMETA_MODE_LEGACY:
1003 case MLX5_XMETA_MODE_META16:
1005 case MLX5_XMETA_MODE_META32:
1009 case MLX5_METADATA_TX:
1011 case MLX5_METADATA_FDB:
1012 switch (config->dv_xmeta_en) {
1013 case MLX5_XMETA_MODE_LEGACY:
1015 case MLX5_XMETA_MODE_META16:
1017 case MLX5_XMETA_MODE_META32:
1021 case MLX5_FLOW_MARK:
1022 switch (config->dv_xmeta_en) {
1023 case MLX5_XMETA_MODE_LEGACY:
1025 case MLX5_XMETA_MODE_META16:
1027 case MLX5_XMETA_MODE_META32:
1033 * If meter color and meter id share one register, flow match
1034 * should use the meter color register for match.
1036 if (priv->mtr_reg_share)
1037 return priv->mtr_color_reg;
1039 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
1041 case MLX5_MTR_COLOR:
1042 case MLX5_ASO_FLOW_HIT:
1043 case MLX5_ASO_CONNTRACK:
1044 case MLX5_SAMPLE_ID:
1045 /* All features use the same REG_C. */
1046 MLX5_ASSERT(priv->mtr_color_reg != REG_NON);
1047 return priv->mtr_color_reg;
1048 case MLX5_COPY_MARK:
1050 * Metadata COPY_MARK register using is in meter suffix sub
1051 * flow while with meter. It's safe to share the same register.
1053 return priv->mtr_color_reg != REG_C_2 ? REG_C_2 : REG_C_3;
1056 * If meter is enable, it will engage the register for color
1057 * match and flow match. If meter color match is not using the
1058 * REG_C_2, need to skip the REG_C_x be used by meter color
1060 * If meter is disable, free to use all available registers.
1062 start_reg = priv->mtr_color_reg != REG_C_2 ? REG_C_2 :
1063 (priv->mtr_reg_share ? REG_C_3 : REG_C_4);
1064 skip_mtr_reg = !!(priv->mtr_en && start_reg == REG_C_2);
1065 if (id > (uint32_t)(REG_C_7 - start_reg))
1066 return rte_flow_error_set(error, EINVAL,
1067 RTE_FLOW_ERROR_TYPE_ITEM,
1068 NULL, "invalid tag id");
1069 if (priv->sh->flow_mreg_c[id + start_reg - REG_C_0] == REG_NON)
1070 return rte_flow_error_set(error, ENOTSUP,
1071 RTE_FLOW_ERROR_TYPE_ITEM,
1072 NULL, "unsupported tag id");
1074 * This case means meter is using the REG_C_x great than 2.
1075 * Take care not to conflict with meter color REG_C_x.
1076 * If the available index REG_C_y >= REG_C_x, skip the
1079 if (skip_mtr_reg && priv->sh->flow_mreg_c
1080 [id + start_reg - REG_C_0] >= priv->mtr_color_reg) {
1081 if (id >= (uint32_t)(REG_C_7 - start_reg))
1082 return rte_flow_error_set(error, EINVAL,
1083 RTE_FLOW_ERROR_TYPE_ITEM,
1084 NULL, "invalid tag id");
1085 if (priv->sh->flow_mreg_c
1086 [id + 1 + start_reg - REG_C_0] != REG_NON)
1087 return priv->sh->flow_mreg_c
1088 [id + 1 + start_reg - REG_C_0];
1089 return rte_flow_error_set(error, ENOTSUP,
1090 RTE_FLOW_ERROR_TYPE_ITEM,
1091 NULL, "unsupported tag id");
1093 return priv->sh->flow_mreg_c[id + start_reg - REG_C_0];
1096 return rte_flow_error_set(error, EINVAL,
1097 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1098 NULL, "invalid feature name");
1102 * Check extensive flow metadata register support.
1105 * Pointer to rte_eth_dev structure.
1108 * True if device supports extensive flow metadata register, otherwise false.
1111 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
1113 struct mlx5_priv *priv = dev->data->dev_private;
1116 * Having available reg_c can be regarded inclusively as supporting
1117 * extensive flow metadata register, which could mean,
1118 * - metadata register copy action by modify header.
1119 * - 16 modify header actions is supported.
1120 * - reg_c's are preserved across different domain (FDB and NIC) on
1121 * packet loopback by flow lookup miss.
1123 return priv->sh->flow_mreg_c[2] != REG_NON;
1127 * Get the lowest priority.
1130 * Pointer to the Ethernet device structure.
1131 * @param[in] attributes
1132 * Pointer to device flow rule attributes.
1135 * The value of lowest priority of flow.
1138 mlx5_get_lowest_priority(struct rte_eth_dev *dev,
1139 const struct rte_flow_attr *attr)
1141 struct mlx5_priv *priv = dev->data->dev_private;
1143 if (!attr->group && !attr->transfer)
1144 return priv->sh->flow_max_priority - 2;
1145 return MLX5_NON_ROOT_FLOW_MAX_PRIO - 1;
1149 * Calculate matcher priority of the flow.
1152 * Pointer to the Ethernet device structure.
1154 * Pointer to device flow rule attributes.
1155 * @param[in] subpriority
1156 * The priority based on the items.
1157 * @param[in] external
1158 * Flow is user flow.
1160 * The matcher priority of the flow.
1163 mlx5_get_matcher_priority(struct rte_eth_dev *dev,
1164 const struct rte_flow_attr *attr,
1165 uint32_t subpriority, bool external)
1167 uint16_t priority = (uint16_t)attr->priority;
1168 struct mlx5_priv *priv = dev->data->dev_private;
1170 if (!attr->group && !attr->transfer) {
1171 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1172 priority = priv->sh->flow_max_priority - 1;
1173 return mlx5_os_flow_adjust_priority(dev, priority, subpriority);
1174 } else if (!external && attr->transfer && attr->group == 0 &&
1175 attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR) {
1176 return (priv->sh->flow_max_priority - 1) * 3;
1178 if (attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)
1179 priority = MLX5_NON_ROOT_FLOW_MAX_PRIO;
1180 return priority * 3 + subpriority;
1184 * Verify the @p item specifications (spec, last, mask) are compatible with the
1188 * Item specification.
1190 * @p item->mask or flow default bit-masks.
1191 * @param[in] nic_mask
1192 * Bit-masks covering supported fields by the NIC to compare with user mask.
1194 * Bit-masks size in bytes.
1195 * @param[in] range_accepted
1196 * True if range of values is accepted for specific fields, false otherwise.
1198 * Pointer to error structure.
1201 * 0 on success, a negative errno value otherwise and rte_errno is set.
1204 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
1205 const uint8_t *mask,
1206 const uint8_t *nic_mask,
1208 bool range_accepted,
1209 struct rte_flow_error *error)
1213 MLX5_ASSERT(nic_mask);
1214 for (i = 0; i < size; ++i)
1215 if ((nic_mask[i] | mask[i]) != nic_mask[i])
1216 return rte_flow_error_set(error, ENOTSUP,
1217 RTE_FLOW_ERROR_TYPE_ITEM,
1219 "mask enables non supported"
1221 if (!item->spec && (item->mask || item->last))
1222 return rte_flow_error_set(error, EINVAL,
1223 RTE_FLOW_ERROR_TYPE_ITEM, item,
1224 "mask/last without a spec is not"
1226 if (item->spec && item->last && !range_accepted) {
1232 for (i = 0; i < size; ++i) {
1233 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
1234 last[i] = ((const uint8_t *)item->last)[i] & mask[i];
1236 ret = memcmp(spec, last, size);
1238 return rte_flow_error_set(error, EINVAL,
1239 RTE_FLOW_ERROR_TYPE_ITEM,
1241 "range is not valid");
1247 * Adjust the hash fields according to the @p flow information.
1249 * @param[in] dev_flow.
1250 * Pointer to the mlx5_flow.
1252 * 1 when the hash field is for a tunnel item.
1253 * @param[in] layer_types
1254 * RTE_ETH_RSS_* types.
1255 * @param[in] hash_fields
1259 * The hash fields that should be used.
1262 mlx5_flow_hashfields_adjust(struct mlx5_flow_rss_desc *rss_desc,
1263 int tunnel __rte_unused, uint64_t layer_types,
1264 uint64_t hash_fields)
1266 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1267 int rss_request_inner = rss_desc->level >= 2;
1269 /* Check RSS hash level for tunnel. */
1270 if (tunnel && rss_request_inner)
1271 hash_fields |= IBV_RX_HASH_INNER;
1272 else if (tunnel || rss_request_inner)
1275 /* Check if requested layer matches RSS hash fields. */
1276 if (!(rss_desc->types & layer_types))
1282 * Lookup and set the ptype in the data Rx part. A single Ptype can be used,
1283 * if several tunnel rules are used on this queue, the tunnel ptype will be
1287 * Rx queue to update.
1290 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
1293 uint32_t tunnel_ptype = 0;
1295 /* Look up for the ptype to use. */
1296 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
1297 if (!rxq_ctrl->flow_tunnels_n[i])
1299 if (!tunnel_ptype) {
1300 tunnel_ptype = tunnels_info[i].ptype;
1306 rxq_ctrl->rxq.tunnel = tunnel_ptype;
1310 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the device
1314 * Pointer to the Ethernet device structure.
1315 * @param[in] dev_handle
1316 * Pointer to device flow handle structure.
1319 flow_drv_rxq_flags_set(struct rte_eth_dev *dev,
1320 struct mlx5_flow_handle *dev_handle)
1322 struct mlx5_priv *priv = dev->data->dev_private;
1323 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1324 struct mlx5_ind_table_obj *ind_tbl = NULL;
1327 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1328 struct mlx5_hrxq *hrxq;
1330 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1331 dev_handle->rix_hrxq);
1333 ind_tbl = hrxq->ind_table;
1334 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1335 struct mlx5_shared_action_rss *shared_rss;
1337 shared_rss = mlx5_ipool_get
1338 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1339 dev_handle->rix_srss);
1341 ind_tbl = shared_rss->ind_tbl;
1345 for (i = 0; i != ind_tbl->queues_n; ++i) {
1346 int idx = ind_tbl->queues[i];
1347 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx);
1349 MLX5_ASSERT(rxq_ctrl != NULL);
1350 if (rxq_ctrl == NULL)
1353 * To support metadata register copy on Tx loopback,
1354 * this must be always enabled (metadata may arive
1355 * from other port - not from local flows only.
1360 /* Increase the counter matching the flow. */
1361 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1362 if ((tunnels_info[j].tunnel &
1363 dev_handle->layers) ==
1364 tunnels_info[j].tunnel) {
1365 rxq_ctrl->flow_tunnels_n[j]++;
1369 flow_rxq_tunnel_ptype_update(rxq_ctrl);
1375 flow_rxq_mark_flag_set(struct rte_eth_dev *dev)
1377 struct mlx5_priv *priv = dev->data->dev_private;
1378 struct mlx5_rxq_ctrl *rxq_ctrl;
1380 if (priv->mark_enabled)
1382 LIST_FOREACH(rxq_ctrl, &priv->rxqsctrl, next) {
1383 rxq_ctrl->rxq.mark = 1;
1385 priv->mark_enabled = 1;
1389 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
1392 * Pointer to the Ethernet device structure.
1394 * Pointer to flow structure.
1397 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
1399 struct mlx5_priv *priv = dev->data->dev_private;
1400 uint32_t handle_idx;
1401 struct mlx5_flow_handle *dev_handle;
1402 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
1406 flow_rxq_mark_flag_set(dev);
1407 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1408 handle_idx, dev_handle, next)
1409 flow_drv_rxq_flags_set(dev, dev_handle);
1413 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1414 * device flow if no other flow uses it with the same kind of request.
1417 * Pointer to Ethernet device.
1418 * @param[in] dev_handle
1419 * Pointer to the device flow handle structure.
1422 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev,
1423 struct mlx5_flow_handle *dev_handle)
1425 struct mlx5_priv *priv = dev->data->dev_private;
1426 const int tunnel = !!(dev_handle->layers & MLX5_FLOW_LAYER_TUNNEL);
1427 struct mlx5_ind_table_obj *ind_tbl = NULL;
1430 if (dev_handle->fate_action == MLX5_FLOW_FATE_QUEUE) {
1431 struct mlx5_hrxq *hrxq;
1433 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
1434 dev_handle->rix_hrxq);
1436 ind_tbl = hrxq->ind_table;
1437 } else if (dev_handle->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
1438 struct mlx5_shared_action_rss *shared_rss;
1440 shared_rss = mlx5_ipool_get
1441 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
1442 dev_handle->rix_srss);
1444 ind_tbl = shared_rss->ind_tbl;
1448 MLX5_ASSERT(dev->data->dev_started);
1449 for (i = 0; i != ind_tbl->queues_n; ++i) {
1450 int idx = ind_tbl->queues[i];
1451 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev, idx);
1453 MLX5_ASSERT(rxq_ctrl != NULL);
1454 if (rxq_ctrl == NULL)
1459 /* Decrease the counter matching the flow. */
1460 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
1461 if ((tunnels_info[j].tunnel &
1462 dev_handle->layers) ==
1463 tunnels_info[j].tunnel) {
1464 rxq_ctrl->flow_tunnels_n[j]--;
1468 flow_rxq_tunnel_ptype_update(rxq_ctrl);
1474 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
1475 * @p flow if no other flow uses it with the same kind of request.
1478 * Pointer to Ethernet device.
1480 * Pointer to the flow.
1483 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
1485 struct mlx5_priv *priv = dev->data->dev_private;
1486 uint32_t handle_idx;
1487 struct mlx5_flow_handle *dev_handle;
1489 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
1490 handle_idx, dev_handle, next)
1491 flow_drv_rxq_flags_trim(dev, dev_handle);
1495 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
1498 * Pointer to Ethernet device.
1501 flow_rxq_flags_clear(struct rte_eth_dev *dev)
1503 struct mlx5_priv *priv = dev->data->dev_private;
1506 for (i = 0; i != priv->rxqs_n; ++i) {
1507 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
1510 if (rxq == NULL || rxq->ctrl == NULL)
1512 rxq->ctrl->rxq.mark = 0;
1513 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
1514 rxq->ctrl->flow_tunnels_n[j] = 0;
1515 rxq->ctrl->rxq.tunnel = 0;
1517 priv->mark_enabled = 0;
1521 * Set the Rx queue dynamic metadata (mask and offset) for a flow
1524 * Pointer to the Ethernet device structure.
1527 mlx5_flow_rxq_dynf_metadata_set(struct rte_eth_dev *dev)
1529 struct mlx5_priv *priv = dev->data->dev_private;
1532 for (i = 0; i != priv->rxqs_n; ++i) {
1533 struct mlx5_rxq_priv *rxq = mlx5_rxq_get(dev, i);
1534 struct mlx5_rxq_data *data;
1536 if (rxq == NULL || rxq->ctrl == NULL)
1538 data = &rxq->ctrl->rxq;
1539 if (!rte_flow_dynf_metadata_avail()) {
1540 data->dynf_meta = 0;
1541 data->flow_meta_mask = 0;
1542 data->flow_meta_offset = -1;
1543 data->flow_meta_port_mask = 0;
1545 data->dynf_meta = 1;
1546 data->flow_meta_mask = rte_flow_dynf_metadata_mask;
1547 data->flow_meta_offset = rte_flow_dynf_metadata_offs;
1548 data->flow_meta_port_mask = priv->sh->dv_meta_mask;
1554 * return a pointer to the desired action in the list of actions.
1556 * @param[in] actions
1557 * The list of actions to search the action in.
1559 * The action to find.
1562 * Pointer to the action in the list, if found. NULL otherwise.
1564 const struct rte_flow_action *
1565 mlx5_flow_find_action(const struct rte_flow_action *actions,
1566 enum rte_flow_action_type action)
1568 if (actions == NULL)
1570 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
1571 if (actions->type == action)
1577 * Validate the flag action.
1579 * @param[in] action_flags
1580 * Bit-fields that holds the actions detected until now.
1582 * Attributes of flow that includes this action.
1584 * Pointer to error structure.
1587 * 0 on success, a negative errno value otherwise and rte_errno is set.
1590 mlx5_flow_validate_action_flag(uint64_t action_flags,
1591 const struct rte_flow_attr *attr,
1592 struct rte_flow_error *error)
1594 if (action_flags & MLX5_FLOW_ACTION_MARK)
1595 return rte_flow_error_set(error, EINVAL,
1596 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1597 "can't mark and flag in same flow");
1598 if (action_flags & MLX5_FLOW_ACTION_FLAG)
1599 return rte_flow_error_set(error, EINVAL,
1600 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1602 " actions in same flow");
1604 return rte_flow_error_set(error, ENOTSUP,
1605 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1606 "flag action not supported for "
1612 * Validate the mark action.
1615 * Pointer to the queue action.
1616 * @param[in] action_flags
1617 * Bit-fields that holds the actions detected until now.
1619 * Attributes of flow that includes this action.
1621 * Pointer to error structure.
1624 * 0 on success, a negative errno value otherwise and rte_errno is set.
1627 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
1628 uint64_t action_flags,
1629 const struct rte_flow_attr *attr,
1630 struct rte_flow_error *error)
1632 const struct rte_flow_action_mark *mark = action->conf;
1635 return rte_flow_error_set(error, EINVAL,
1636 RTE_FLOW_ERROR_TYPE_ACTION,
1638 "configuration cannot be null");
1639 if (mark->id >= MLX5_FLOW_MARK_MAX)
1640 return rte_flow_error_set(error, EINVAL,
1641 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1643 "mark id must in 0 <= id < "
1644 RTE_STR(MLX5_FLOW_MARK_MAX));
1645 if (action_flags & MLX5_FLOW_ACTION_FLAG)
1646 return rte_flow_error_set(error, EINVAL,
1647 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1648 "can't flag and mark in same flow");
1649 if (action_flags & MLX5_FLOW_ACTION_MARK)
1650 return rte_flow_error_set(error, EINVAL,
1651 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1652 "can't have 2 mark actions in same"
1655 return rte_flow_error_set(error, ENOTSUP,
1656 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1657 "mark action not supported for "
1663 * Validate the drop action.
1665 * @param[in] action_flags
1666 * Bit-fields that holds the actions detected until now.
1668 * Attributes of flow that includes this action.
1670 * Pointer to error structure.
1673 * 0 on success, a negative errno value otherwise and rte_errno is set.
1676 mlx5_flow_validate_action_drop(uint64_t action_flags __rte_unused,
1677 const struct rte_flow_attr *attr,
1678 struct rte_flow_error *error)
1681 return rte_flow_error_set(error, ENOTSUP,
1682 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1683 "drop action not supported for "
1689 * Validate the queue action.
1692 * Pointer to the queue action.
1693 * @param[in] action_flags
1694 * Bit-fields that holds the actions detected until now.
1696 * Pointer to the Ethernet device structure.
1698 * Attributes of flow that includes this action.
1700 * Pointer to error structure.
1703 * 0 on success, a negative errno value otherwise and rte_errno is set.
1706 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
1707 uint64_t action_flags,
1708 struct rte_eth_dev *dev,
1709 const struct rte_flow_attr *attr,
1710 struct rte_flow_error *error)
1712 struct mlx5_priv *priv = dev->data->dev_private;
1713 const struct rte_flow_action_queue *queue = action->conf;
1715 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1716 return rte_flow_error_set(error, EINVAL,
1717 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1718 "can't have 2 fate actions in"
1721 return rte_flow_error_set(error, EINVAL,
1722 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1723 NULL, "No Rx queues configured");
1724 if (queue->index >= priv->rxqs_n)
1725 return rte_flow_error_set(error, EINVAL,
1726 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1728 "queue index out of range");
1729 if (mlx5_rxq_get(dev, queue->index) == NULL)
1730 return rte_flow_error_set(error, EINVAL,
1731 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1733 "queue is not configured");
1735 return rte_flow_error_set(error, ENOTSUP,
1736 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1737 "queue action not supported for "
1743 * Validate queue numbers for device RSS.
1746 * Configured device.
1748 * Array of queue numbers.
1749 * @param[in] queues_n
1750 * Size of the @p queues array.
1752 * On error, filled with a textual error description.
1754 * On error, filled with an offending queue index in @p queues array.
1757 * 0 on success, a negative errno code on error.
1760 mlx5_validate_rss_queues(struct rte_eth_dev *dev,
1761 const uint16_t *queues, uint32_t queues_n,
1762 const char **error, uint32_t *queue_idx)
1764 const struct mlx5_priv *priv = dev->data->dev_private;
1765 enum mlx5_rxq_type rxq_type = MLX5_RXQ_TYPE_UNDEFINED;
1768 for (i = 0; i != queues_n; ++i) {
1769 struct mlx5_rxq_ctrl *rxq_ctrl = mlx5_rxq_ctrl_get(dev,
1772 if (queues[i] >= priv->rxqs_n) {
1773 *error = "queue index out of range";
1777 if (rxq_ctrl == NULL) {
1778 *error = "queue is not configured";
1783 rxq_type = rxq_ctrl->type;
1784 if (rxq_type != rxq_ctrl->type) {
1785 *error = "combining hairpin and regular RSS queues is not supported";
1794 * Validate the rss action.
1797 * Pointer to the Ethernet device structure.
1799 * Pointer to the queue action.
1801 * Pointer to error structure.
1804 * 0 on success, a negative errno value otherwise and rte_errno is set.
1807 mlx5_validate_action_rss(struct rte_eth_dev *dev,
1808 const struct rte_flow_action *action,
1809 struct rte_flow_error *error)
1811 struct mlx5_priv *priv = dev->data->dev_private;
1812 const struct rte_flow_action_rss *rss = action->conf;
1814 const char *message;
1817 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1818 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1819 return rte_flow_error_set(error, ENOTSUP,
1820 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1822 "RSS hash function not supported");
1823 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1828 return rte_flow_error_set(error, ENOTSUP,
1829 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1831 "tunnel RSS is not supported");
1832 /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1833 if (rss->key_len == 0 && rss->key != NULL)
1834 return rte_flow_error_set(error, ENOTSUP,
1835 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1837 "RSS hash key length 0");
1838 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1839 return rte_flow_error_set(error, ENOTSUP,
1840 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1842 "RSS hash key too small");
1843 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1844 return rte_flow_error_set(error, ENOTSUP,
1845 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1847 "RSS hash key too large");
1848 if (rss->queue_num > priv->sh->dev_cap.ind_table_max_size)
1849 return rte_flow_error_set(error, ENOTSUP,
1850 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1852 "number of queues too large");
1853 if (rss->types & MLX5_RSS_HF_MASK)
1854 return rte_flow_error_set(error, ENOTSUP,
1855 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1857 "some RSS protocols are not"
1859 if ((rss->types & (RTE_ETH_RSS_L3_SRC_ONLY | RTE_ETH_RSS_L3_DST_ONLY)) &&
1860 !(rss->types & RTE_ETH_RSS_IP))
1861 return rte_flow_error_set(error, EINVAL,
1862 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1863 "L3 partial RSS requested but L3 RSS"
1864 " type not specified");
1865 if ((rss->types & (RTE_ETH_RSS_L4_SRC_ONLY | RTE_ETH_RSS_L4_DST_ONLY)) &&
1866 !(rss->types & (RTE_ETH_RSS_UDP | RTE_ETH_RSS_TCP)))
1867 return rte_flow_error_set(error, EINVAL,
1868 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1869 "L4 partial RSS requested but L4 RSS"
1870 " type not specified");
1872 return rte_flow_error_set(error, EINVAL,
1873 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1874 NULL, "No Rx queues configured");
1875 if (!rss->queue_num)
1876 return rte_flow_error_set(error, EINVAL,
1877 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1878 NULL, "No queues configured");
1879 ret = mlx5_validate_rss_queues(dev, rss->queue, rss->queue_num,
1880 &message, &queue_idx);
1882 return rte_flow_error_set(error, -ret,
1883 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1884 &rss->queue[queue_idx], message);
1890 * Validate the rss action.
1893 * Pointer to the queue action.
1894 * @param[in] action_flags
1895 * Bit-fields that holds the actions detected until now.
1897 * Pointer to the Ethernet device structure.
1899 * Attributes of flow that includes this action.
1900 * @param[in] item_flags
1901 * Items that were detected.
1903 * Pointer to error structure.
1906 * 0 on success, a negative errno value otherwise and rte_errno is set.
1909 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1910 uint64_t action_flags,
1911 struct rte_eth_dev *dev,
1912 const struct rte_flow_attr *attr,
1913 uint64_t item_flags,
1914 struct rte_flow_error *error)
1916 const struct rte_flow_action_rss *rss = action->conf;
1917 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1920 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1921 return rte_flow_error_set(error, EINVAL,
1922 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1923 "can't have 2 fate actions"
1925 ret = mlx5_validate_action_rss(dev, action, error);
1929 return rte_flow_error_set(error, ENOTSUP,
1930 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1931 "rss action not supported for "
1933 if (rss->level > 1 && !tunnel)
1934 return rte_flow_error_set(error, EINVAL,
1935 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1936 "inner RSS is not supported for "
1937 "non-tunnel flows");
1938 if ((item_flags & MLX5_FLOW_LAYER_ECPRI) &&
1939 !(item_flags & MLX5_FLOW_LAYER_INNER_L4_UDP)) {
1940 return rte_flow_error_set(error, EINVAL,
1941 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1942 "RSS on eCPRI is not supported now");
1944 if ((item_flags & MLX5_FLOW_LAYER_MPLS) &&
1946 (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3)) &&
1948 return rte_flow_error_set(error, EINVAL,
1949 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
1950 "MPLS inner RSS needs to specify inner L2/L3 items after MPLS in pattern");
1955 * Validate the default miss action.
1957 * @param[in] action_flags
1958 * Bit-fields that holds the actions detected until now.
1960 * Pointer to error structure.
1963 * 0 on success, a negative errno value otherwise and rte_errno is set.
1966 mlx5_flow_validate_action_default_miss(uint64_t action_flags,
1967 const struct rte_flow_attr *attr,
1968 struct rte_flow_error *error)
1970 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1971 return rte_flow_error_set(error, EINVAL,
1972 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1973 "can't have 2 fate actions in"
1976 return rte_flow_error_set(error, ENOTSUP,
1977 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1978 "default miss action not supported "
1981 return rte_flow_error_set(error, ENOTSUP,
1982 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
1983 "only group 0 is supported");
1985 return rte_flow_error_set(error, ENOTSUP,
1986 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1987 NULL, "transfer is not supported");
1992 * Validate the count action.
1995 * Pointer to the Ethernet device structure.
1997 * Attributes of flow that includes this action.
1999 * Pointer to error structure.
2002 * 0 on success, a negative errno value otherwise and rte_errno is set.
2005 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
2006 const struct rte_flow_attr *attr,
2007 struct rte_flow_error *error)
2010 return rte_flow_error_set(error, ENOTSUP,
2011 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
2012 "count action not supported for "
2018 * Validate the ASO CT action.
2021 * Pointer to the Ethernet device structure.
2022 * @param[in] conntrack
2023 * Pointer to the CT action profile.
2025 * Pointer to error structure.
2028 * 0 on success, a negative errno value otherwise and rte_errno is set.
2031 mlx5_validate_action_ct(struct rte_eth_dev *dev,
2032 const struct rte_flow_action_conntrack *conntrack,
2033 struct rte_flow_error *error)
2037 if (conntrack->state > RTE_FLOW_CONNTRACK_STATE_TIME_WAIT)
2038 return rte_flow_error_set(error, EINVAL,
2039 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2040 "Invalid CT state");
2041 if (conntrack->last_index > RTE_FLOW_CONNTRACK_FLAG_RST)
2042 return rte_flow_error_set(error, EINVAL,
2043 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2044 "Invalid last TCP packet flag");
2049 * Verify the @p attributes will be correctly understood by the NIC and store
2050 * them in the @p flow if everything is correct.
2053 * Pointer to the Ethernet device structure.
2054 * @param[in] attributes
2055 * Pointer to flow attributes
2057 * Pointer to error structure.
2060 * 0 on success, a negative errno value otherwise and rte_errno is set.
2063 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
2064 const struct rte_flow_attr *attributes,
2065 struct rte_flow_error *error)
2067 struct mlx5_priv *priv = dev->data->dev_private;
2068 uint32_t priority_max = priv->sh->flow_max_priority - 1;
2070 if (attributes->group)
2071 return rte_flow_error_set(error, ENOTSUP,
2072 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
2073 NULL, "groups is not supported");
2074 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
2075 attributes->priority >= priority_max)
2076 return rte_flow_error_set(error, ENOTSUP,
2077 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
2078 NULL, "priority out of range");
2079 if (attributes->egress)
2080 return rte_flow_error_set(error, ENOTSUP,
2081 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
2082 "egress is not supported");
2083 if (attributes->transfer && !priv->sh->config.dv_esw_en)
2084 return rte_flow_error_set(error, ENOTSUP,
2085 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
2086 NULL, "transfer is not supported");
2087 if (!attributes->ingress)
2088 return rte_flow_error_set(error, EINVAL,
2089 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2091 "ingress attribute is mandatory");
2096 * Validate ICMP6 item.
2099 * Item specification.
2100 * @param[in] item_flags
2101 * Bit-fields that holds the items detected until now.
2102 * @param[in] ext_vlan_sup
2103 * Whether extended VLAN features are supported or not.
2105 * Pointer to error structure.
2108 * 0 on success, a negative errno value otherwise and rte_errno is set.
2111 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
2112 uint64_t item_flags,
2113 uint8_t target_protocol,
2114 struct rte_flow_error *error)
2116 const struct rte_flow_item_icmp6 *mask = item->mask;
2117 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2118 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
2119 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
2120 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2121 MLX5_FLOW_LAYER_OUTER_L4;
2124 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
2125 return rte_flow_error_set(error, EINVAL,
2126 RTE_FLOW_ERROR_TYPE_ITEM, item,
2127 "protocol filtering not compatible"
2128 " with ICMP6 layer");
2129 if (!(item_flags & l3m))
2130 return rte_flow_error_set(error, EINVAL,
2131 RTE_FLOW_ERROR_TYPE_ITEM, item,
2132 "IPv6 is mandatory to filter on"
2134 if (item_flags & l4m)
2135 return rte_flow_error_set(error, EINVAL,
2136 RTE_FLOW_ERROR_TYPE_ITEM, item,
2137 "multiple L4 layers not supported");
2139 mask = &rte_flow_item_icmp6_mask;
2140 ret = mlx5_flow_item_acceptable
2141 (item, (const uint8_t *)mask,
2142 (const uint8_t *)&rte_flow_item_icmp6_mask,
2143 sizeof(struct rte_flow_item_icmp6),
2144 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2151 * Validate ICMP item.
2154 * Item specification.
2155 * @param[in] item_flags
2156 * Bit-fields that holds the items detected until now.
2158 * Pointer to error structure.
2161 * 0 on success, a negative errno value otherwise and rte_errno is set.
2164 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
2165 uint64_t item_flags,
2166 uint8_t target_protocol,
2167 struct rte_flow_error *error)
2169 const struct rte_flow_item_icmp *mask = item->mask;
2170 const struct rte_flow_item_icmp nic_mask = {
2171 .hdr.icmp_type = 0xff,
2172 .hdr.icmp_code = 0xff,
2173 .hdr.icmp_ident = RTE_BE16(0xffff),
2174 .hdr.icmp_seq_nb = RTE_BE16(0xffff),
2176 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2177 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
2178 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
2179 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2180 MLX5_FLOW_LAYER_OUTER_L4;
2183 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
2184 return rte_flow_error_set(error, EINVAL,
2185 RTE_FLOW_ERROR_TYPE_ITEM, item,
2186 "protocol filtering not compatible"
2187 " with ICMP layer");
2188 if (!(item_flags & l3m))
2189 return rte_flow_error_set(error, EINVAL,
2190 RTE_FLOW_ERROR_TYPE_ITEM, item,
2191 "IPv4 is mandatory to filter"
2193 if (item_flags & l4m)
2194 return rte_flow_error_set(error, EINVAL,
2195 RTE_FLOW_ERROR_TYPE_ITEM, item,
2196 "multiple L4 layers not supported");
2199 ret = mlx5_flow_item_acceptable
2200 (item, (const uint8_t *)mask,
2201 (const uint8_t *)&nic_mask,
2202 sizeof(struct rte_flow_item_icmp),
2203 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2210 * Validate Ethernet item.
2213 * Item specification.
2214 * @param[in] item_flags
2215 * Bit-fields that holds the items detected until now.
2217 * Pointer to error structure.
2220 * 0 on success, a negative errno value otherwise and rte_errno is set.
2223 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
2224 uint64_t item_flags, bool ext_vlan_sup,
2225 struct rte_flow_error *error)
2227 const struct rte_flow_item_eth *mask = item->mask;
2228 const struct rte_flow_item_eth nic_mask = {
2229 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2230 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
2231 .type = RTE_BE16(0xffff),
2232 .has_vlan = ext_vlan_sup ? 1 : 0,
2235 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2236 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
2237 MLX5_FLOW_LAYER_OUTER_L2;
2239 if (item_flags & ethm)
2240 return rte_flow_error_set(error, ENOTSUP,
2241 RTE_FLOW_ERROR_TYPE_ITEM, item,
2242 "multiple L2 layers not supported");
2243 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
2244 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
2245 return rte_flow_error_set(error, EINVAL,
2246 RTE_FLOW_ERROR_TYPE_ITEM, item,
2247 "L2 layer should not follow "
2249 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
2250 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
2251 return rte_flow_error_set(error, EINVAL,
2252 RTE_FLOW_ERROR_TYPE_ITEM, item,
2253 "L2 layer should not follow VLAN");
2254 if (item_flags & MLX5_FLOW_LAYER_GTP)
2255 return rte_flow_error_set(error, EINVAL,
2256 RTE_FLOW_ERROR_TYPE_ITEM, item,
2257 "L2 layer should not follow GTP");
2259 mask = &rte_flow_item_eth_mask;
2260 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2261 (const uint8_t *)&nic_mask,
2262 sizeof(struct rte_flow_item_eth),
2263 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2268 * Validate VLAN item.
2271 * Item specification.
2272 * @param[in] item_flags
2273 * Bit-fields that holds the items detected until now.
2275 * Ethernet device flow is being created on.
2277 * Pointer to error structure.
2280 * 0 on success, a negative errno value otherwise and rte_errno is set.
2283 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
2284 uint64_t item_flags,
2285 struct rte_eth_dev *dev,
2286 struct rte_flow_error *error)
2288 const struct rte_flow_item_vlan *spec = item->spec;
2289 const struct rte_flow_item_vlan *mask = item->mask;
2290 const struct rte_flow_item_vlan nic_mask = {
2291 .tci = RTE_BE16(UINT16_MAX),
2292 .inner_type = RTE_BE16(UINT16_MAX),
2294 uint16_t vlan_tag = 0;
2295 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2297 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2298 MLX5_FLOW_LAYER_INNER_L4) :
2299 (MLX5_FLOW_LAYER_OUTER_L3 |
2300 MLX5_FLOW_LAYER_OUTER_L4);
2301 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2302 MLX5_FLOW_LAYER_OUTER_VLAN;
2304 if (item_flags & vlanm)
2305 return rte_flow_error_set(error, EINVAL,
2306 RTE_FLOW_ERROR_TYPE_ITEM, item,
2307 "multiple VLAN layers not supported");
2308 else if ((item_flags & l34m) != 0)
2309 return rte_flow_error_set(error, EINVAL,
2310 RTE_FLOW_ERROR_TYPE_ITEM, item,
2311 "VLAN cannot follow L3/L4 layer");
2313 mask = &rte_flow_item_vlan_mask;
2314 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2315 (const uint8_t *)&nic_mask,
2316 sizeof(struct rte_flow_item_vlan),
2317 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2320 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2321 struct mlx5_priv *priv = dev->data->dev_private;
2323 if (priv->vmwa_context) {
2325 * Non-NULL context means we have a virtual machine
2326 * and SR-IOV enabled, we have to create VLAN interface
2327 * to make hypervisor to setup E-Switch vport
2328 * context correctly. We avoid creating the multiple
2329 * VLAN interfaces, so we cannot support VLAN tag mask.
2331 return rte_flow_error_set(error, EINVAL,
2332 RTE_FLOW_ERROR_TYPE_ITEM,
2334 "VLAN tag mask is not"
2335 " supported in virtual"
2340 vlan_tag = spec->tci;
2341 vlan_tag &= mask->tci;
2344 * From verbs perspective an empty VLAN is equivalent
2345 * to a packet without VLAN layer.
2348 return rte_flow_error_set(error, EINVAL,
2349 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2351 "VLAN cannot be empty");
2356 * Validate IPV4 item.
2359 * Item specification.
2360 * @param[in] item_flags
2361 * Bit-fields that holds the items detected until now.
2362 * @param[in] last_item
2363 * Previous validated item in the pattern items.
2364 * @param[in] ether_type
2365 * Type in the ethernet layer header (including dot1q).
2366 * @param[in] acc_mask
2367 * Acceptable mask, if NULL default internal default mask
2368 * will be used to check whether item fields are supported.
2369 * @param[in] range_accepted
2370 * True if range of values is accepted for specific fields, false otherwise.
2372 * Pointer to error structure.
2375 * 0 on success, a negative errno value otherwise and rte_errno is set.
2378 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
2379 uint64_t item_flags,
2381 uint16_t ether_type,
2382 const struct rte_flow_item_ipv4 *acc_mask,
2383 bool range_accepted,
2384 struct rte_flow_error *error)
2386 const struct rte_flow_item_ipv4 *mask = item->mask;
2387 const struct rte_flow_item_ipv4 *spec = item->spec;
2388 const struct rte_flow_item_ipv4 nic_mask = {
2390 .src_addr = RTE_BE32(0xffffffff),
2391 .dst_addr = RTE_BE32(0xffffffff),
2392 .type_of_service = 0xff,
2393 .next_proto_id = 0xff,
2396 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2397 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2398 MLX5_FLOW_LAYER_OUTER_L3;
2399 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2400 MLX5_FLOW_LAYER_OUTER_L4;
2402 uint8_t next_proto = 0xFF;
2403 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2404 MLX5_FLOW_LAYER_OUTER_VLAN |
2405 MLX5_FLOW_LAYER_INNER_VLAN);
2407 if ((last_item & l2_vlan) && ether_type &&
2408 ether_type != RTE_ETHER_TYPE_IPV4)
2409 return rte_flow_error_set(error, EINVAL,
2410 RTE_FLOW_ERROR_TYPE_ITEM, item,
2411 "IPv4 cannot follow L2/VLAN layer "
2412 "which ether type is not IPv4");
2413 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2415 next_proto = mask->hdr.next_proto_id &
2416 spec->hdr.next_proto_id;
2417 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2418 return rte_flow_error_set(error, EINVAL,
2419 RTE_FLOW_ERROR_TYPE_ITEM,
2424 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
2425 return rte_flow_error_set(error, EINVAL,
2426 RTE_FLOW_ERROR_TYPE_ITEM, item,
2427 "wrong tunnel type - IPv6 specified "
2428 "but IPv4 item provided");
2429 if (item_flags & l3m)
2430 return rte_flow_error_set(error, ENOTSUP,
2431 RTE_FLOW_ERROR_TYPE_ITEM, item,
2432 "multiple L3 layers not supported");
2433 else if (item_flags & l4m)
2434 return rte_flow_error_set(error, EINVAL,
2435 RTE_FLOW_ERROR_TYPE_ITEM, item,
2436 "L3 cannot follow an L4 layer.");
2437 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2438 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2439 return rte_flow_error_set(error, EINVAL,
2440 RTE_FLOW_ERROR_TYPE_ITEM, item,
2441 "L3 cannot follow an NVGRE layer.");
2443 mask = &rte_flow_item_ipv4_mask;
2444 else if (mask->hdr.next_proto_id != 0 &&
2445 mask->hdr.next_proto_id != 0xff)
2446 return rte_flow_error_set(error, EINVAL,
2447 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2448 "partial mask is not supported"
2450 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2451 acc_mask ? (const uint8_t *)acc_mask
2452 : (const uint8_t *)&nic_mask,
2453 sizeof(struct rte_flow_item_ipv4),
2454 range_accepted, error);
2461 * Validate IPV6 item.
2464 * Item specification.
2465 * @param[in] item_flags
2466 * Bit-fields that holds the items detected until now.
2467 * @param[in] last_item
2468 * Previous validated item in the pattern items.
2469 * @param[in] ether_type
2470 * Type in the ethernet layer header (including dot1q).
2471 * @param[in] acc_mask
2472 * Acceptable mask, if NULL default internal default mask
2473 * will be used to check whether item fields are supported.
2475 * Pointer to error structure.
2478 * 0 on success, a negative errno value otherwise and rte_errno is set.
2481 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
2482 uint64_t item_flags,
2484 uint16_t ether_type,
2485 const struct rte_flow_item_ipv6 *acc_mask,
2486 struct rte_flow_error *error)
2488 const struct rte_flow_item_ipv6 *mask = item->mask;
2489 const struct rte_flow_item_ipv6 *spec = item->spec;
2490 const struct rte_flow_item_ipv6 nic_mask = {
2493 "\xff\xff\xff\xff\xff\xff\xff\xff"
2494 "\xff\xff\xff\xff\xff\xff\xff\xff",
2496 "\xff\xff\xff\xff\xff\xff\xff\xff"
2497 "\xff\xff\xff\xff\xff\xff\xff\xff",
2498 .vtc_flow = RTE_BE32(0xffffffff),
2502 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2503 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2504 MLX5_FLOW_LAYER_OUTER_L3;
2505 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2506 MLX5_FLOW_LAYER_OUTER_L4;
2508 uint8_t next_proto = 0xFF;
2509 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
2510 MLX5_FLOW_LAYER_OUTER_VLAN |
2511 MLX5_FLOW_LAYER_INNER_VLAN);
2513 if ((last_item & l2_vlan) && ether_type &&
2514 ether_type != RTE_ETHER_TYPE_IPV6)
2515 return rte_flow_error_set(error, EINVAL,
2516 RTE_FLOW_ERROR_TYPE_ITEM, item,
2517 "IPv6 cannot follow L2/VLAN layer "
2518 "which ether type is not IPv6");
2519 if (mask && mask->hdr.proto == UINT8_MAX && spec)
2520 next_proto = spec->hdr.proto;
2521 if (item_flags & MLX5_FLOW_LAYER_TUNNEL) {
2522 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
2523 return rte_flow_error_set(error, EINVAL,
2524 RTE_FLOW_ERROR_TYPE_ITEM,
2529 if (next_proto == IPPROTO_HOPOPTS ||
2530 next_proto == IPPROTO_ROUTING ||
2531 next_proto == IPPROTO_FRAGMENT ||
2532 next_proto == IPPROTO_ESP ||
2533 next_proto == IPPROTO_AH ||
2534 next_proto == IPPROTO_DSTOPTS)
2535 return rte_flow_error_set(error, EINVAL,
2536 RTE_FLOW_ERROR_TYPE_ITEM, item,
2537 "IPv6 proto (next header) should "
2538 "not be set as extension header");
2539 if (item_flags & MLX5_FLOW_LAYER_IPIP)
2540 return rte_flow_error_set(error, EINVAL,
2541 RTE_FLOW_ERROR_TYPE_ITEM, item,
2542 "wrong tunnel type - IPv4 specified "
2543 "but IPv6 item provided");
2544 if (item_flags & l3m)
2545 return rte_flow_error_set(error, ENOTSUP,
2546 RTE_FLOW_ERROR_TYPE_ITEM, item,
2547 "multiple L3 layers not supported");
2548 else if (item_flags & l4m)
2549 return rte_flow_error_set(error, EINVAL,
2550 RTE_FLOW_ERROR_TYPE_ITEM, item,
2551 "L3 cannot follow an L4 layer.");
2552 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
2553 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
2554 return rte_flow_error_set(error, EINVAL,
2555 RTE_FLOW_ERROR_TYPE_ITEM, item,
2556 "L3 cannot follow an NVGRE layer.");
2558 mask = &rte_flow_item_ipv6_mask;
2559 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2560 acc_mask ? (const uint8_t *)acc_mask
2561 : (const uint8_t *)&nic_mask,
2562 sizeof(struct rte_flow_item_ipv6),
2563 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2570 * Validate UDP item.
2573 * Item specification.
2574 * @param[in] item_flags
2575 * Bit-fields that holds the items detected until now.
2576 * @param[in] target_protocol
2577 * The next protocol in the previous item.
2578 * @param[in] flow_mask
2579 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
2581 * Pointer to error structure.
2584 * 0 on success, a negative errno value otherwise and rte_errno is set.
2587 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
2588 uint64_t item_flags,
2589 uint8_t target_protocol,
2590 struct rte_flow_error *error)
2592 const struct rte_flow_item_udp *mask = item->mask;
2593 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2594 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2595 MLX5_FLOW_LAYER_OUTER_L3;
2596 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2597 MLX5_FLOW_LAYER_OUTER_L4;
2600 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
2601 return rte_flow_error_set(error, EINVAL,
2602 RTE_FLOW_ERROR_TYPE_ITEM, item,
2603 "protocol filtering not compatible"
2605 if (!(item_flags & l3m))
2606 return rte_flow_error_set(error, EINVAL,
2607 RTE_FLOW_ERROR_TYPE_ITEM, item,
2608 "L3 is mandatory to filter on L4");
2609 if (item_flags & l4m)
2610 return rte_flow_error_set(error, EINVAL,
2611 RTE_FLOW_ERROR_TYPE_ITEM, item,
2612 "multiple L4 layers not supported");
2614 mask = &rte_flow_item_udp_mask;
2615 ret = mlx5_flow_item_acceptable
2616 (item, (const uint8_t *)mask,
2617 (const uint8_t *)&rte_flow_item_udp_mask,
2618 sizeof(struct rte_flow_item_udp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2626 * Validate TCP item.
2629 * Item specification.
2630 * @param[in] item_flags
2631 * Bit-fields that holds the items detected until now.
2632 * @param[in] target_protocol
2633 * The next protocol in the previous item.
2635 * Pointer to error structure.
2638 * 0 on success, a negative errno value otherwise and rte_errno is set.
2641 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
2642 uint64_t item_flags,
2643 uint8_t target_protocol,
2644 const struct rte_flow_item_tcp *flow_mask,
2645 struct rte_flow_error *error)
2647 const struct rte_flow_item_tcp *mask = item->mask;
2648 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2649 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
2650 MLX5_FLOW_LAYER_OUTER_L3;
2651 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2652 MLX5_FLOW_LAYER_OUTER_L4;
2655 MLX5_ASSERT(flow_mask);
2656 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
2657 return rte_flow_error_set(error, EINVAL,
2658 RTE_FLOW_ERROR_TYPE_ITEM, item,
2659 "protocol filtering not compatible"
2661 if (!(item_flags & l3m))
2662 return rte_flow_error_set(error, EINVAL,
2663 RTE_FLOW_ERROR_TYPE_ITEM, item,
2664 "L3 is mandatory to filter on L4");
2665 if (item_flags & l4m)
2666 return rte_flow_error_set(error, EINVAL,
2667 RTE_FLOW_ERROR_TYPE_ITEM, item,
2668 "multiple L4 layers not supported");
2670 mask = &rte_flow_item_tcp_mask;
2671 ret = mlx5_flow_item_acceptable
2672 (item, (const uint8_t *)mask,
2673 (const uint8_t *)flow_mask,
2674 sizeof(struct rte_flow_item_tcp), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2682 * Validate VXLAN item.
2685 * Pointer to the Ethernet device structure.
2686 * @param[in] udp_dport
2687 * UDP destination port
2689 * Item specification.
2690 * @param[in] item_flags
2691 * Bit-fields that holds the items detected until now.
2693 * Flow rule attributes.
2695 * Pointer to error structure.
2698 * 0 on success, a negative errno value otherwise and rte_errno is set.
2701 mlx5_flow_validate_item_vxlan(struct rte_eth_dev *dev,
2703 const struct rte_flow_item *item,
2704 uint64_t item_flags,
2705 const struct rte_flow_attr *attr,
2706 struct rte_flow_error *error)
2708 const struct rte_flow_item_vxlan *spec = item->spec;
2709 const struct rte_flow_item_vxlan *mask = item->mask;
2711 struct mlx5_priv *priv = dev->data->dev_private;
2715 } id = { .vlan_id = 0, };
2716 const struct rte_flow_item_vxlan nic_mask = {
2717 .vni = "\xff\xff\xff",
2720 const struct rte_flow_item_vxlan *valid_mask;
2722 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2723 return rte_flow_error_set(error, ENOTSUP,
2724 RTE_FLOW_ERROR_TYPE_ITEM, item,
2725 "multiple tunnel layers not"
2727 valid_mask = &rte_flow_item_vxlan_mask;
2729 * Verify only UDPv4 is present as defined in
2730 * https://tools.ietf.org/html/rfc7348
2732 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2733 return rte_flow_error_set(error, EINVAL,
2734 RTE_FLOW_ERROR_TYPE_ITEM, item,
2735 "no outer UDP layer found");
2737 mask = &rte_flow_item_vxlan_mask;
2739 if (priv->sh->steering_format_version !=
2740 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 ||
2741 !udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN) {
2742 /* FDB domain & NIC domain non-zero group */
2743 if ((attr->transfer || attr->group) && priv->sh->misc5_cap)
2744 valid_mask = &nic_mask;
2745 /* Group zero in NIC domain */
2746 if (!attr->group && !attr->transfer &&
2747 priv->sh->tunnel_header_0_1)
2748 valid_mask = &nic_mask;
2750 ret = mlx5_flow_item_acceptable
2751 (item, (const uint8_t *)mask,
2752 (const uint8_t *)valid_mask,
2753 sizeof(struct rte_flow_item_vxlan),
2754 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2758 memcpy(&id.vni[1], spec->vni, 3);
2759 memcpy(&id.vni[1], mask->vni, 3);
2761 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2762 return rte_flow_error_set(error, ENOTSUP,
2763 RTE_FLOW_ERROR_TYPE_ITEM, item,
2764 "VXLAN tunnel must be fully defined");
2769 * Validate VXLAN_GPE item.
2772 * Item specification.
2773 * @param[in] item_flags
2774 * Bit-fields that holds the items detected until now.
2776 * Pointer to the private data structure.
2777 * @param[in] target_protocol
2778 * The next protocol in the previous item.
2780 * Pointer to error structure.
2783 * 0 on success, a negative errno value otherwise and rte_errno is set.
2786 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
2787 uint64_t item_flags,
2788 struct rte_eth_dev *dev,
2789 struct rte_flow_error *error)
2791 struct mlx5_priv *priv = dev->data->dev_private;
2792 const struct rte_flow_item_vxlan_gpe *spec = item->spec;
2793 const struct rte_flow_item_vxlan_gpe *mask = item->mask;
2798 } id = { .vlan_id = 0, };
2800 if (!priv->sh->config.l3_vxlan_en)
2801 return rte_flow_error_set(error, ENOTSUP,
2802 RTE_FLOW_ERROR_TYPE_ITEM, item,
2803 "L3 VXLAN is not enabled by device"
2804 " parameter and/or not configured in"
2806 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2807 return rte_flow_error_set(error, ENOTSUP,
2808 RTE_FLOW_ERROR_TYPE_ITEM, item,
2809 "multiple tunnel layers not"
2812 * Verify only UDPv4 is present as defined in
2813 * https://tools.ietf.org/html/rfc7348
2815 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2816 return rte_flow_error_set(error, EINVAL,
2817 RTE_FLOW_ERROR_TYPE_ITEM, item,
2818 "no outer UDP layer found");
2820 mask = &rte_flow_item_vxlan_gpe_mask;
2821 ret = mlx5_flow_item_acceptable
2822 (item, (const uint8_t *)mask,
2823 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
2824 sizeof(struct rte_flow_item_vxlan_gpe),
2825 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2830 return rte_flow_error_set(error, ENOTSUP,
2831 RTE_FLOW_ERROR_TYPE_ITEM,
2833 "VxLAN-GPE protocol"
2835 memcpy(&id.vni[1], spec->vni, 3);
2836 memcpy(&id.vni[1], mask->vni, 3);
2838 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2839 return rte_flow_error_set(error, ENOTSUP,
2840 RTE_FLOW_ERROR_TYPE_ITEM, item,
2841 "VXLAN-GPE tunnel must be fully"
2846 * Validate GRE Key item.
2849 * Item specification.
2850 * @param[in] item_flags
2851 * Bit flags to mark detected items.
2852 * @param[in] gre_item
2853 * Pointer to gre_item
2855 * Pointer to error structure.
2858 * 0 on success, a negative errno value otherwise and rte_errno is set.
2861 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
2862 uint64_t item_flags,
2863 const struct rte_flow_item *gre_item,
2864 struct rte_flow_error *error)
2866 const rte_be32_t *mask = item->mask;
2868 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
2869 const struct rte_flow_item_gre *gre_spec;
2870 const struct rte_flow_item_gre *gre_mask;
2872 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
2873 return rte_flow_error_set(error, ENOTSUP,
2874 RTE_FLOW_ERROR_TYPE_ITEM, item,
2875 "Multiple GRE key not support");
2876 if (!(item_flags & MLX5_FLOW_LAYER_GRE))
2877 return rte_flow_error_set(error, ENOTSUP,
2878 RTE_FLOW_ERROR_TYPE_ITEM, item,
2879 "No preceding GRE header");
2880 if (item_flags & MLX5_FLOW_LAYER_INNER)
2881 return rte_flow_error_set(error, ENOTSUP,
2882 RTE_FLOW_ERROR_TYPE_ITEM, item,
2883 "GRE key following a wrong item");
2884 gre_mask = gre_item->mask;
2886 gre_mask = &rte_flow_item_gre_mask;
2887 gre_spec = gre_item->spec;
2888 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
2889 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
2890 return rte_flow_error_set(error, EINVAL,
2891 RTE_FLOW_ERROR_TYPE_ITEM, item,
2892 "Key bit must be on");
2895 mask = &gre_key_default_mask;
2896 ret = mlx5_flow_item_acceptable
2897 (item, (const uint8_t *)mask,
2898 (const uint8_t *)&gre_key_default_mask,
2899 sizeof(rte_be32_t), MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2904 * Validate GRE item.
2907 * Item specification.
2908 * @param[in] item_flags
2909 * Bit flags to mark detected items.
2910 * @param[in] target_protocol
2911 * The next protocol in the previous item.
2913 * Pointer to error structure.
2916 * 0 on success, a negative errno value otherwise and rte_errno is set.
2919 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
2920 uint64_t item_flags,
2921 uint8_t target_protocol,
2922 struct rte_flow_error *error)
2924 const struct rte_flow_item_gre *spec __rte_unused = item->spec;
2925 const struct rte_flow_item_gre *mask = item->mask;
2927 const struct rte_flow_item_gre nic_mask = {
2928 .c_rsvd0_ver = RTE_BE16(0xB000),
2929 .protocol = RTE_BE16(UINT16_MAX),
2932 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2933 return rte_flow_error_set(error, EINVAL,
2934 RTE_FLOW_ERROR_TYPE_ITEM, item,
2935 "protocol filtering not compatible"
2936 " with this GRE layer");
2937 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2938 return rte_flow_error_set(error, ENOTSUP,
2939 RTE_FLOW_ERROR_TYPE_ITEM, item,
2940 "multiple tunnel layers not"
2942 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2943 return rte_flow_error_set(error, ENOTSUP,
2944 RTE_FLOW_ERROR_TYPE_ITEM, item,
2945 "L3 Layer is missing");
2947 mask = &rte_flow_item_gre_mask;
2948 ret = mlx5_flow_item_acceptable
2949 (item, (const uint8_t *)mask,
2950 (const uint8_t *)&nic_mask,
2951 sizeof(struct rte_flow_item_gre), MLX5_ITEM_RANGE_NOT_ACCEPTED,
2955 #ifndef HAVE_MLX5DV_DR
2956 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2957 if (spec && (spec->protocol & mask->protocol))
2958 return rte_flow_error_set(error, ENOTSUP,
2959 RTE_FLOW_ERROR_TYPE_ITEM, item,
2960 "without MPLS support the"
2961 " specification cannot be used for"
2969 * Validate Geneve item.
2972 * Item specification.
2973 * @param[in] itemFlags
2974 * Bit-fields that holds the items detected until now.
2976 * Pointer to the private data structure.
2978 * Pointer to error structure.
2981 * 0 on success, a negative errno value otherwise and rte_errno is set.
2985 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2986 uint64_t item_flags,
2987 struct rte_eth_dev *dev,
2988 struct rte_flow_error *error)
2990 struct mlx5_priv *priv = dev->data->dev_private;
2991 const struct rte_flow_item_geneve *spec = item->spec;
2992 const struct rte_flow_item_geneve *mask = item->mask;
2995 uint8_t opt_len = priv->sh->cdev->config.hca_attr.geneve_max_opt_len ?
2996 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2997 const struct rte_flow_item_geneve nic_mask = {
2998 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2999 .vni = "\xff\xff\xff",
3000 .protocol = RTE_BE16(UINT16_MAX),
3003 if (!priv->sh->cdev->config.hca_attr.tunnel_stateless_geneve_rx)
3004 return rte_flow_error_set(error, ENOTSUP,
3005 RTE_FLOW_ERROR_TYPE_ITEM, item,
3006 "L3 Geneve is not enabled by device"
3007 " parameter and/or not configured in"
3009 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3010 return rte_flow_error_set(error, ENOTSUP,
3011 RTE_FLOW_ERROR_TYPE_ITEM, item,
3012 "multiple tunnel layers not"
3015 * Verify only UDPv4 is present as defined in
3016 * https://tools.ietf.org/html/rfc7348
3018 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
3019 return rte_flow_error_set(error, EINVAL,
3020 RTE_FLOW_ERROR_TYPE_ITEM, item,
3021 "no outer UDP layer found");
3023 mask = &rte_flow_item_geneve_mask;
3024 ret = mlx5_flow_item_acceptable
3025 (item, (const uint8_t *)mask,
3026 (const uint8_t *)&nic_mask,
3027 sizeof(struct rte_flow_item_geneve),
3028 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3032 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
3033 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
3034 MLX5_GENEVE_CRITO_VAL(gbhdr) ||
3035 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
3036 return rte_flow_error_set(error, ENOTSUP,
3037 RTE_FLOW_ERROR_TYPE_ITEM,
3039 "Geneve protocol unsupported"
3040 " fields are being used");
3041 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
3042 return rte_flow_error_set
3044 RTE_FLOW_ERROR_TYPE_ITEM,
3046 "Unsupported Geneve options length");
3048 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
3049 return rte_flow_error_set
3051 RTE_FLOW_ERROR_TYPE_ITEM, item,
3052 "Geneve tunnel must be fully defined");
3057 * Validate Geneve TLV option item.
3060 * Item specification.
3061 * @param[in] last_item
3062 * Previous validated item in the pattern items.
3063 * @param[in] geneve_item
3064 * Previous GENEVE item specification.
3066 * Pointer to the rte_eth_dev structure.
3068 * Pointer to error structure.
3071 * 0 on success, a negative errno value otherwise and rte_errno is set.
3074 mlx5_flow_validate_item_geneve_opt(const struct rte_flow_item *item,
3076 const struct rte_flow_item *geneve_item,
3077 struct rte_eth_dev *dev,
3078 struct rte_flow_error *error)
3080 struct mlx5_priv *priv = dev->data->dev_private;
3081 struct mlx5_dev_ctx_shared *sh = priv->sh;
3082 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource;
3083 struct mlx5_hca_attr *hca_attr = &sh->cdev->config.hca_attr;
3084 uint8_t data_max_supported =
3085 hca_attr->max_geneve_tlv_option_data_len * 4;
3086 const struct rte_flow_item_geneve *geneve_spec;
3087 const struct rte_flow_item_geneve *geneve_mask;
3088 const struct rte_flow_item_geneve_opt *spec = item->spec;
3089 const struct rte_flow_item_geneve_opt *mask = item->mask;
3091 unsigned int data_len;
3092 uint8_t tlv_option_len;
3093 uint16_t optlen_m, optlen_v;
3094 const struct rte_flow_item_geneve_opt full_mask = {
3095 .option_class = RTE_BE16(0xffff),
3096 .option_type = 0xff,
3101 mask = &rte_flow_item_geneve_opt_mask;
3103 return rte_flow_error_set
3104 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3105 "Geneve TLV opt class/type/length must be specified");
3106 if ((uint32_t)spec->option_len > MLX5_GENEVE_OPTLEN_MASK)
3107 return rte_flow_error_set
3108 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3109 "Geneve TLV opt length exceeds the limit (31)");
3110 /* Check if class type and length masks are full. */
3111 if (full_mask.option_class != mask->option_class ||
3112 full_mask.option_type != mask->option_type ||
3113 full_mask.option_len != (mask->option_len & full_mask.option_len))
3114 return rte_flow_error_set
3115 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3116 "Geneve TLV opt class/type/length masks must be full");
3117 /* Check if length is supported */
3118 if ((uint32_t)spec->option_len >
3119 hca_attr->max_geneve_tlv_option_data_len)
3120 return rte_flow_error_set
3121 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3122 "Geneve TLV opt length not supported");
3123 if (hca_attr->max_geneve_tlv_options > 1)
3125 "max_geneve_tlv_options supports more than 1 option");
3126 /* Check GENEVE item preceding. */
3127 if (!geneve_item || !(last_item & MLX5_FLOW_LAYER_GENEVE))
3128 return rte_flow_error_set
3129 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3130 "Geneve opt item must be preceded with Geneve item");
3131 geneve_spec = geneve_item->spec;
3132 geneve_mask = geneve_item->mask ? geneve_item->mask :
3133 &rte_flow_item_geneve_mask;
3134 /* Check if GENEVE TLV option size doesn't exceed option length */
3135 if (geneve_spec && (geneve_mask->ver_opt_len_o_c_rsvd0 ||
3136 geneve_spec->ver_opt_len_o_c_rsvd0)) {
3137 tlv_option_len = spec->option_len & mask->option_len;
3138 optlen_v = rte_be_to_cpu_16(geneve_spec->ver_opt_len_o_c_rsvd0);
3139 optlen_v = MLX5_GENEVE_OPTLEN_VAL(optlen_v);
3140 optlen_m = rte_be_to_cpu_16(geneve_mask->ver_opt_len_o_c_rsvd0);
3141 optlen_m = MLX5_GENEVE_OPTLEN_VAL(optlen_m);
3142 if ((optlen_v & optlen_m) <= tlv_option_len)
3143 return rte_flow_error_set
3144 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3145 "GENEVE TLV option length exceeds optlen");
3147 /* Check if length is 0 or data is 0. */
3148 if (spec->data == NULL || spec->option_len == 0)
3149 return rte_flow_error_set
3150 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3151 "Geneve TLV opt with zero data/length not supported");
3152 /* Check not all data & mask are 0. */
3153 data_len = spec->option_len * 4;
3154 if (mask->data == NULL) {
3155 for (i = 0; i < data_len; i++)
3159 return rte_flow_error_set(error, ENOTSUP,
3160 RTE_FLOW_ERROR_TYPE_ITEM, item,
3161 "Can't match on Geneve option data 0");
3163 for (i = 0; i < data_len; i++)
3164 if (spec->data[i] & mask->data[i])
3167 return rte_flow_error_set(error, ENOTSUP,
3168 RTE_FLOW_ERROR_TYPE_ITEM, item,
3169 "Can't match on Geneve option data and mask 0");
3170 /* Check data mask supported. */
3171 for (i = data_max_supported; i < data_len ; i++)
3173 return rte_flow_error_set(error, ENOTSUP,
3174 RTE_FLOW_ERROR_TYPE_ITEM, item,
3175 "Data mask is of unsupported size");
3177 /* Check GENEVE option is supported in NIC. */
3178 if (!hca_attr->geneve_tlv_opt)
3179 return rte_flow_error_set
3180 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
3181 "Geneve TLV opt not supported");
3182 /* Check if we already have geneve option with different type/class. */
3183 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
3184 geneve_opt_resource = sh->geneve_tlv_option_resource;
3185 if (geneve_opt_resource != NULL)
3186 if (geneve_opt_resource->option_class != spec->option_class ||
3187 geneve_opt_resource->option_type != spec->option_type ||
3188 geneve_opt_resource->length != spec->option_len) {
3189 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3190 return rte_flow_error_set(error, ENOTSUP,
3191 RTE_FLOW_ERROR_TYPE_ITEM, item,
3192 "Only one Geneve TLV option supported");
3194 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
3199 * Validate MPLS item.
3202 * Pointer to the rte_eth_dev structure.
3204 * Item specification.
3205 * @param[in] item_flags
3206 * Bit-fields that holds the items detected until now.
3207 * @param[in] prev_layer
3208 * The protocol layer indicated in previous item.
3210 * Pointer to error structure.
3213 * 0 on success, a negative errno value otherwise and rte_errno is set.
3216 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
3217 const struct rte_flow_item *item __rte_unused,
3218 uint64_t item_flags __rte_unused,
3219 uint64_t prev_layer __rte_unused,
3220 struct rte_flow_error *error)
3222 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
3223 const struct rte_flow_item_mpls *mask = item->mask;
3224 struct mlx5_priv *priv = dev->data->dev_private;
3227 if (!priv->sh->dev_cap.mpls_en)
3228 return rte_flow_error_set(error, ENOTSUP,
3229 RTE_FLOW_ERROR_TYPE_ITEM, item,
3230 "MPLS not supported or"
3231 " disabled in firmware"
3233 /* MPLS over UDP, GRE is allowed */
3234 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L4_UDP |
3235 MLX5_FLOW_LAYER_GRE |
3236 MLX5_FLOW_LAYER_GRE_KEY)))
3237 return rte_flow_error_set(error, EINVAL,
3238 RTE_FLOW_ERROR_TYPE_ITEM, item,
3239 "protocol filtering not compatible"
3240 " with MPLS layer");
3241 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
3242 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
3243 !(item_flags & MLX5_FLOW_LAYER_GRE))
3244 return rte_flow_error_set(error, ENOTSUP,
3245 RTE_FLOW_ERROR_TYPE_ITEM, item,
3246 "multiple tunnel layers not"
3249 mask = &rte_flow_item_mpls_mask;
3250 ret = mlx5_flow_item_acceptable
3251 (item, (const uint8_t *)mask,
3252 (const uint8_t *)&rte_flow_item_mpls_mask,
3253 sizeof(struct rte_flow_item_mpls),
3254 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3259 return rte_flow_error_set(error, ENOTSUP,
3260 RTE_FLOW_ERROR_TYPE_ITEM, item,
3261 "MPLS is not supported by Verbs, please"
3267 * Validate NVGRE item.
3270 * Item specification.
3271 * @param[in] item_flags
3272 * Bit flags to mark detected items.
3273 * @param[in] target_protocol
3274 * The next protocol in the previous item.
3276 * Pointer to error structure.
3279 * 0 on success, a negative errno value otherwise and rte_errno is set.
3282 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
3283 uint64_t item_flags,
3284 uint8_t target_protocol,
3285 struct rte_flow_error *error)
3287 const struct rte_flow_item_nvgre *mask = item->mask;
3290 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
3291 return rte_flow_error_set(error, EINVAL,
3292 RTE_FLOW_ERROR_TYPE_ITEM, item,
3293 "protocol filtering not compatible"
3294 " with this GRE layer");
3295 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3296 return rte_flow_error_set(error, ENOTSUP,
3297 RTE_FLOW_ERROR_TYPE_ITEM, item,
3298 "multiple tunnel layers not"
3300 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
3301 return rte_flow_error_set(error, ENOTSUP,
3302 RTE_FLOW_ERROR_TYPE_ITEM, item,
3303 "L3 Layer is missing");
3305 mask = &rte_flow_item_nvgre_mask;
3306 ret = mlx5_flow_item_acceptable
3307 (item, (const uint8_t *)mask,
3308 (const uint8_t *)&rte_flow_item_nvgre_mask,
3309 sizeof(struct rte_flow_item_nvgre),
3310 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3317 * Validate eCPRI item.
3320 * Item specification.
3321 * @param[in] item_flags
3322 * Bit-fields that holds the items detected until now.
3323 * @param[in] last_item
3324 * Previous validated item in the pattern items.
3325 * @param[in] ether_type
3326 * Type in the ethernet layer header (including dot1q).
3327 * @param[in] acc_mask
3328 * Acceptable mask, if NULL default internal default mask
3329 * will be used to check whether item fields are supported.
3331 * Pointer to error structure.
3334 * 0 on success, a negative errno value otherwise and rte_errno is set.
3337 mlx5_flow_validate_item_ecpri(const struct rte_flow_item *item,
3338 uint64_t item_flags,
3340 uint16_t ether_type,
3341 const struct rte_flow_item_ecpri *acc_mask,
3342 struct rte_flow_error *error)
3344 const struct rte_flow_item_ecpri *mask = item->mask;
3345 const struct rte_flow_item_ecpri nic_mask = {
3349 RTE_BE32(((const struct rte_ecpri_common_hdr) {
3353 .dummy[0] = 0xFFFFFFFF,
3356 const uint64_t outer_l2_vlan = (MLX5_FLOW_LAYER_OUTER_L2 |
3357 MLX5_FLOW_LAYER_OUTER_VLAN);
3358 struct rte_flow_item_ecpri mask_lo;
3360 if (!(last_item & outer_l2_vlan) &&
3361 last_item != MLX5_FLOW_LAYER_OUTER_L4_UDP)
3362 return rte_flow_error_set(error, EINVAL,
3363 RTE_FLOW_ERROR_TYPE_ITEM, item,
3364 "eCPRI can only follow L2/VLAN layer or UDP layer");
3365 if ((last_item & outer_l2_vlan) && ether_type &&
3366 ether_type != RTE_ETHER_TYPE_ECPRI)
3367 return rte_flow_error_set(error, EINVAL,
3368 RTE_FLOW_ERROR_TYPE_ITEM, item,
3369 "eCPRI cannot follow L2/VLAN layer which ether type is not 0xAEFE");
3370 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
3371 return rte_flow_error_set(error, EINVAL,
3372 RTE_FLOW_ERROR_TYPE_ITEM, item,
3373 "eCPRI with tunnel is not supported right now");
3374 if (item_flags & MLX5_FLOW_LAYER_OUTER_L3)
3375 return rte_flow_error_set(error, ENOTSUP,
3376 RTE_FLOW_ERROR_TYPE_ITEM, item,
3377 "multiple L3 layers not supported");
3378 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP)
3379 return rte_flow_error_set(error, EINVAL,
3380 RTE_FLOW_ERROR_TYPE_ITEM, item,
3381 "eCPRI cannot coexist with a TCP layer");
3382 /* In specification, eCPRI could be over UDP layer. */
3383 else if (item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP)
3384 return rte_flow_error_set(error, EINVAL,
3385 RTE_FLOW_ERROR_TYPE_ITEM, item,
3386 "eCPRI over UDP layer is not yet supported right now");
3387 /* Mask for type field in common header could be zero. */
3389 mask = &rte_flow_item_ecpri_mask;
3390 mask_lo.hdr.common.u32 = rte_be_to_cpu_32(mask->hdr.common.u32);
3391 /* Input mask is in big-endian format. */
3392 if (mask_lo.hdr.common.type != 0 && mask_lo.hdr.common.type != 0xff)
3393 return rte_flow_error_set(error, EINVAL,
3394 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3395 "partial mask is not supported for protocol");
3396 else if (mask_lo.hdr.common.type == 0 && mask->hdr.dummy[0] != 0)
3397 return rte_flow_error_set(error, EINVAL,
3398 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
3399 "message header mask must be after a type mask");
3400 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
3401 acc_mask ? (const uint8_t *)acc_mask
3402 : (const uint8_t *)&nic_mask,
3403 sizeof(struct rte_flow_item_ecpri),
3404 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
3408 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
3409 const struct rte_flow_attr *attr __rte_unused,
3410 const struct rte_flow_item items[] __rte_unused,
3411 const struct rte_flow_action actions[] __rte_unused,
3412 bool external __rte_unused,
3413 int hairpin __rte_unused,
3414 struct rte_flow_error *error)
3416 return rte_flow_error_set(error, ENOTSUP,
3417 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3420 static struct mlx5_flow *
3421 flow_null_prepare(struct rte_eth_dev *dev __rte_unused,
3422 const struct rte_flow_attr *attr __rte_unused,
3423 const struct rte_flow_item items[] __rte_unused,
3424 const struct rte_flow_action actions[] __rte_unused,
3425 struct rte_flow_error *error)
3427 rte_flow_error_set(error, ENOTSUP,
3428 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3433 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
3434 struct mlx5_flow *dev_flow __rte_unused,
3435 const struct rte_flow_attr *attr __rte_unused,
3436 const struct rte_flow_item items[] __rte_unused,
3437 const struct rte_flow_action actions[] __rte_unused,
3438 struct rte_flow_error *error)
3440 return rte_flow_error_set(error, ENOTSUP,
3441 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3445 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
3446 struct rte_flow *flow __rte_unused,
3447 struct rte_flow_error *error)
3449 return rte_flow_error_set(error, ENOTSUP,
3450 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3454 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
3455 struct rte_flow *flow __rte_unused)
3460 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
3461 struct rte_flow *flow __rte_unused)
3466 flow_null_query(struct rte_eth_dev *dev __rte_unused,
3467 struct rte_flow *flow __rte_unused,
3468 const struct rte_flow_action *actions __rte_unused,
3469 void *data __rte_unused,
3470 struct rte_flow_error *error)
3472 return rte_flow_error_set(error, ENOTSUP,
3473 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
3477 flow_null_sync_domain(struct rte_eth_dev *dev __rte_unused,
3478 uint32_t domains __rte_unused,
3479 uint32_t flags __rte_unused)
3484 /* Void driver to protect from null pointer reference. */
3485 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
3486 .validate = flow_null_validate,
3487 .prepare = flow_null_prepare,
3488 .translate = flow_null_translate,
3489 .apply = flow_null_apply,
3490 .remove = flow_null_remove,
3491 .destroy = flow_null_destroy,
3492 .query = flow_null_query,
3493 .sync_domain = flow_null_sync_domain,
3497 * Select flow driver type according to flow attributes and device
3501 * Pointer to the dev structure.
3503 * Pointer to the flow attributes.
3506 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
3508 static enum mlx5_flow_drv_type
3509 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
3511 struct mlx5_priv *priv = dev->data->dev_private;
3512 /* The OS can determine first a specific flow type (DV, VERBS) */
3513 enum mlx5_flow_drv_type type = mlx5_flow_os_get_type();
3515 if (type != MLX5_FLOW_TYPE_MAX)
3518 * Currently when dv_flow_en == 2, only HW steering engine is
3519 * supported. New engines can also be chosen here if ready.
3521 if (priv->sh->config.dv_flow_en == 2)
3522 return MLX5_FLOW_TYPE_HW;
3523 /* If no OS specific type - continue with DV/VERBS selection */
3524 if (attr->transfer && priv->sh->config.dv_esw_en)
3525 type = MLX5_FLOW_TYPE_DV;
3526 if (!attr->transfer)
3527 type = priv->sh->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
3528 MLX5_FLOW_TYPE_VERBS;
3532 #define flow_get_drv_ops(type) flow_drv_ops[type]
3535 * Flow driver validation API. This abstracts calling driver specific functions.
3536 * The type of flow driver is determined according to flow attributes.
3539 * Pointer to the dev structure.
3541 * Pointer to the flow attributes.
3543 * Pointer to the list of items.
3544 * @param[in] actions
3545 * Pointer to the list of actions.
3546 * @param[in] external
3547 * This flow rule is created by request external to PMD.
3548 * @param[in] hairpin
3549 * Number of hairpin TX actions, 0 means classic flow.
3551 * Pointer to the error structure.
3554 * 0 on success, a negative errno value otherwise and rte_errno is set.
3557 flow_drv_validate(struct rte_eth_dev *dev,
3558 const struct rte_flow_attr *attr,
3559 const struct rte_flow_item items[],
3560 const struct rte_flow_action actions[],
3561 bool external, int hairpin, struct rte_flow_error *error)
3563 const struct mlx5_flow_driver_ops *fops;
3564 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
3566 fops = flow_get_drv_ops(type);
3567 return fops->validate(dev, attr, items, actions, external,
3572 * Flow driver preparation API. This abstracts calling driver specific
3573 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3574 * calculates the size of memory required for device flow, allocates the memory,
3575 * initializes the device flow and returns the pointer.
3578 * This function initializes device flow structure such as dv or verbs in
3579 * struct mlx5_flow. However, it is caller's responsibility to initialize the
3580 * rest. For example, adding returning device flow to flow->dev_flow list and
3581 * setting backward reference to the flow should be done out of this function.
3582 * layers field is not filled either.
3585 * Pointer to the dev structure.
3587 * Pointer to the flow attributes.
3589 * Pointer to the list of items.
3590 * @param[in] actions
3591 * Pointer to the list of actions.
3592 * @param[in] flow_idx
3593 * This memory pool index to the flow.
3595 * Pointer to the error structure.
3598 * Pointer to device flow on success, otherwise NULL and rte_errno is set.
3600 static inline struct mlx5_flow *
3601 flow_drv_prepare(struct rte_eth_dev *dev,
3602 const struct rte_flow *flow,
3603 const struct rte_flow_attr *attr,
3604 const struct rte_flow_item items[],
3605 const struct rte_flow_action actions[],
3607 struct rte_flow_error *error)
3609 const struct mlx5_flow_driver_ops *fops;
3610 enum mlx5_flow_drv_type type = flow->drv_type;
3611 struct mlx5_flow *mlx5_flow = NULL;
3613 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3614 fops = flow_get_drv_ops(type);
3615 mlx5_flow = fops->prepare(dev, attr, items, actions, error);
3617 mlx5_flow->flow_idx = flow_idx;
3622 * Flow driver translation API. This abstracts calling driver specific
3623 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
3624 * translates a generic flow into a driver flow. flow_drv_prepare() must
3628 * dev_flow->layers could be filled as a result of parsing during translation
3629 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
3630 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
3631 * flow->actions could be overwritten even though all the expanded dev_flows
3632 * have the same actions.
3635 * Pointer to the rte dev structure.
3636 * @param[in, out] dev_flow
3637 * Pointer to the mlx5 flow.
3639 * Pointer to the flow attributes.
3641 * Pointer to the list of items.
3642 * @param[in] actions
3643 * Pointer to the list of actions.
3645 * Pointer to the error structure.
3648 * 0 on success, a negative errno value otherwise and rte_errno is set.
3651 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
3652 const struct rte_flow_attr *attr,
3653 const struct rte_flow_item items[],
3654 const struct rte_flow_action actions[],
3655 struct rte_flow_error *error)
3657 const struct mlx5_flow_driver_ops *fops;
3658 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
3660 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3661 fops = flow_get_drv_ops(type);
3662 return fops->translate(dev, dev_flow, attr, items, actions, error);
3666 * Flow driver apply API. This abstracts calling driver specific functions.
3667 * Parent flow (rte_flow) should have driver type (drv_type). It applies
3668 * translated driver flows on to device. flow_drv_translate() must precede.
3671 * Pointer to Ethernet device structure.
3672 * @param[in, out] flow
3673 * Pointer to flow structure.
3675 * Pointer to error structure.
3678 * 0 on success, a negative errno value otherwise and rte_errno is set.
3681 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
3682 struct rte_flow_error *error)
3684 const struct mlx5_flow_driver_ops *fops;
3685 enum mlx5_flow_drv_type type = flow->drv_type;
3687 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3688 fops = flow_get_drv_ops(type);
3689 return fops->apply(dev, flow, error);
3693 * Flow driver destroy API. This abstracts calling driver specific functions.
3694 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
3695 * on device and releases resources of the flow.
3698 * Pointer to Ethernet device.
3699 * @param[in, out] flow
3700 * Pointer to flow structure.
3703 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
3705 const struct mlx5_flow_driver_ops *fops;
3706 enum mlx5_flow_drv_type type = flow->drv_type;
3708 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3709 fops = flow_get_drv_ops(type);
3710 fops->destroy(dev, flow);
3714 * Flow driver find RSS policy tbl API. This abstracts calling driver
3715 * specific functions. Parent flow (rte_flow) should have driver
3716 * type (drv_type). It will find the RSS policy table that has the rss_desc.
3719 * Pointer to Ethernet device.
3720 * @param[in, out] flow
3721 * Pointer to flow structure.
3723 * Pointer to meter policy table.
3724 * @param[in] rss_desc
3725 * Pointer to rss_desc
3727 static struct mlx5_flow_meter_sub_policy *
3728 flow_drv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
3729 struct rte_flow *flow,
3730 struct mlx5_flow_meter_policy *policy,
3731 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
3733 const struct mlx5_flow_driver_ops *fops;
3734 enum mlx5_flow_drv_type type = flow->drv_type;
3736 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3737 fops = flow_get_drv_ops(type);
3738 return fops->meter_sub_policy_rss_prepare(dev, policy, rss_desc);
3742 * Flow driver color tag rule API. This abstracts calling driver
3743 * specific functions. Parent flow (rte_flow) should have driver
3744 * type (drv_type). It will create the color tag rules in hierarchy meter.
3747 * Pointer to Ethernet device.
3748 * @param[in, out] flow
3749 * Pointer to flow structure.
3751 * Pointer to flow meter structure.
3752 * @param[in] src_port
3753 * The src port this extra rule should use.
3755 * The src port id match item.
3757 * Pointer to error structure.
3760 flow_drv_mtr_hierarchy_rule_create(struct rte_eth_dev *dev,
3761 struct rte_flow *flow,
3762 struct mlx5_flow_meter_info *fm,
3764 const struct rte_flow_item *item,
3765 struct rte_flow_error *error)
3767 const struct mlx5_flow_driver_ops *fops;
3768 enum mlx5_flow_drv_type type = flow->drv_type;
3770 MLX5_ASSERT(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
3771 fops = flow_get_drv_ops(type);
3772 return fops->meter_hierarchy_rule_create(dev, fm,
3773 src_port, item, error);
3777 * Get RSS action from the action list.
3780 * Pointer to Ethernet device.
3781 * @param[in] actions
3782 * Pointer to the list of actions.
3784 * Parent flow structure pointer.
3787 * Pointer to the RSS action if exist, else return NULL.
3789 static const struct rte_flow_action_rss*
3790 flow_get_rss_action(struct rte_eth_dev *dev,
3791 const struct rte_flow_action actions[])
3793 struct mlx5_priv *priv = dev->data->dev_private;
3794 const struct rte_flow_action_rss *rss = NULL;
3795 struct mlx5_meter_policy_action_container *acg;
3796 struct mlx5_meter_policy_action_container *acy;
3798 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
3799 switch (actions->type) {
3800 case RTE_FLOW_ACTION_TYPE_RSS:
3801 rss = actions->conf;
3803 case RTE_FLOW_ACTION_TYPE_SAMPLE:
3805 const struct rte_flow_action_sample *sample =
3807 const struct rte_flow_action *act = sample->actions;
3808 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++)
3809 if (act->type == RTE_FLOW_ACTION_TYPE_RSS)
3813 case RTE_FLOW_ACTION_TYPE_METER:
3816 struct mlx5_flow_meter_info *fm;
3817 struct mlx5_flow_meter_policy *policy;
3818 const struct rte_flow_action_meter *mtr = actions->conf;
3820 fm = mlx5_flow_meter_find(priv, mtr->mtr_id, &mtr_idx);
3821 if (fm && !fm->def_policy) {
3822 policy = mlx5_flow_meter_policy_find(dev,
3823 fm->policy_id, NULL);
3824 MLX5_ASSERT(policy);
3825 if (policy->is_hierarchy) {
3827 mlx5_flow_meter_hierarchy_get_final_policy(dev,
3832 if (policy->is_rss) {
3834 &policy->act_cnt[RTE_COLOR_GREEN];
3836 &policy->act_cnt[RTE_COLOR_YELLOW];
3837 if (acg->fate_action ==
3838 MLX5_FLOW_FATE_SHARED_RSS)
3839 rss = acg->rss->conf;
3840 else if (acy->fate_action ==
3841 MLX5_FLOW_FATE_SHARED_RSS)
3842 rss = acy->rss->conf;
3855 * Get ASO age action by index.
3858 * Pointer to the Ethernet device structure.
3859 * @param[in] age_idx
3860 * Index to the ASO age action.
3863 * The specified ASO age action.
3865 struct mlx5_aso_age_action*
3866 flow_aso_age_get_by_idx(struct rte_eth_dev *dev, uint32_t age_idx)
3868 uint16_t pool_idx = age_idx & UINT16_MAX;
3869 uint16_t offset = (age_idx >> 16) & UINT16_MAX;
3870 struct mlx5_priv *priv = dev->data->dev_private;
3871 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
3872 struct mlx5_aso_age_pool *pool;
3874 rte_rwlock_read_lock(&mng->resize_rwl);
3875 pool = mng->pools[pool_idx];
3876 rte_rwlock_read_unlock(&mng->resize_rwl);
3877 return &pool->actions[offset - 1];
3880 /* maps indirect action to translated direct in some actions array */
3881 struct mlx5_translated_action_handle {
3882 struct rte_flow_action_handle *action; /**< Indirect action handle. */
3883 int index; /**< Index in related array of rte_flow_action. */
3887 * Translates actions of type RTE_FLOW_ACTION_TYPE_INDIRECT to related
3888 * direct action if translation possible.
3889 * This functionality used to run same execution path for both direct and
3890 * indirect actions on flow create. All necessary preparations for indirect
3891 * action handling should be performed on *handle* actions list returned
3895 * Pointer to Ethernet device.
3896 * @param[in] actions
3897 * List of actions to translate.
3898 * @param[out] handle
3899 * List to store translated indirect action object handles.
3900 * @param[in, out] indir_n
3901 * Size of *handle* array. On return should be updated with number of
3902 * indirect actions retrieved from the *actions* list.
3903 * @param[out] translated_actions
3904 * List of actions where all indirect actions were translated to direct
3905 * if possible. NULL if no translation took place.
3907 * Pointer to the error structure.
3910 * 0 on success, a negative errno value otherwise and rte_errno is set.
3913 flow_action_handles_translate(struct rte_eth_dev *dev,
3914 const struct rte_flow_action actions[],
3915 struct mlx5_translated_action_handle *handle,
3917 struct rte_flow_action **translated_actions,
3918 struct rte_flow_error *error)
3920 struct mlx5_priv *priv = dev->data->dev_private;
3921 struct rte_flow_action *translated = NULL;
3922 size_t actions_size;
3925 struct mlx5_translated_action_handle *handle_end = NULL;
3927 for (n = 0; actions[n].type != RTE_FLOW_ACTION_TYPE_END; n++) {
3928 if (actions[n].type != RTE_FLOW_ACTION_TYPE_INDIRECT)
3930 if (copied_n == *indir_n) {
3931 return rte_flow_error_set
3932 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_NUM,
3933 NULL, "too many shared actions");
3935 rte_memcpy(&handle[copied_n].action, &actions[n].conf,
3936 sizeof(actions[n].conf));
3937 handle[copied_n].index = n;
3941 *indir_n = copied_n;
3944 actions_size = sizeof(struct rte_flow_action) * n;
3945 translated = mlx5_malloc(MLX5_MEM_ZERO, actions_size, 0, SOCKET_ID_ANY);
3950 memcpy(translated, actions, actions_size);
3951 for (handle_end = handle + copied_n; handle < handle_end; handle++) {
3952 struct mlx5_shared_action_rss *shared_rss;
3953 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
3954 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
3955 uint32_t idx = act_idx &
3956 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
3959 case MLX5_INDIRECT_ACTION_TYPE_RSS:
3960 shared_rss = mlx5_ipool_get
3961 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
3962 translated[handle->index].type =
3963 RTE_FLOW_ACTION_TYPE_RSS;
3964 translated[handle->index].conf =
3965 &shared_rss->origin;
3967 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
3968 translated[handle->index].type =
3969 (enum rte_flow_action_type)
3970 MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
3971 translated[handle->index].conf = (void *)(uintptr_t)idx;
3973 case MLX5_INDIRECT_ACTION_TYPE_AGE:
3974 if (priv->sh->flow_hit_aso_en) {
3975 translated[handle->index].type =
3976 (enum rte_flow_action_type)
3977 MLX5_RTE_FLOW_ACTION_TYPE_AGE;
3978 translated[handle->index].conf =
3979 (void *)(uintptr_t)idx;
3983 case MLX5_INDIRECT_ACTION_TYPE_CT:
3984 if (priv->sh->ct_aso_en) {
3985 translated[handle->index].type =
3986 RTE_FLOW_ACTION_TYPE_CONNTRACK;
3987 translated[handle->index].conf =
3988 (void *)(uintptr_t)idx;
3993 mlx5_free(translated);
3994 return rte_flow_error_set
3995 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
3996 NULL, "invalid indirect action type");
3999 *translated_actions = translated;
4004 * Get Shared RSS action from the action list.
4007 * Pointer to Ethernet device.
4009 * Pointer to the list of actions.
4010 * @param[in] shared_n
4011 * Actions list length.
4014 * The MLX5 RSS action ID if exists, otherwise return 0.
4017 flow_get_shared_rss_action(struct rte_eth_dev *dev,
4018 struct mlx5_translated_action_handle *handle,
4021 struct mlx5_translated_action_handle *handle_end;
4022 struct mlx5_priv *priv = dev->data->dev_private;
4023 struct mlx5_shared_action_rss *shared_rss;
4026 for (handle_end = handle + shared_n; handle < handle_end; handle++) {
4027 uint32_t act_idx = (uint32_t)(uintptr_t)handle->action;
4028 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
4029 uint32_t idx = act_idx &
4030 ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
4032 case MLX5_INDIRECT_ACTION_TYPE_RSS:
4033 shared_rss = mlx5_ipool_get
4034 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
4036 __atomic_add_fetch(&shared_rss->refcnt, 1,
4047 find_graph_root(uint32_t rss_level)
4049 return rss_level < 2 ? MLX5_EXPANSION_ROOT :
4050 MLX5_EXPANSION_ROOT_OUTER;
4054 * Get layer flags from the prefix flow.
4056 * Some flows may be split to several subflows, the prefix subflow gets the
4057 * match items and the suffix sub flow gets the actions.
4058 * Some actions need the user defined match item flags to get the detail for
4060 * This function helps the suffix flow to get the item layer flags from prefix
4063 * @param[in] dev_flow
4064 * Pointer the created prefix subflow.
4067 * The layers get from prefix subflow.
4069 static inline uint64_t
4070 flow_get_prefix_layer_flags(struct mlx5_flow *dev_flow)
4072 uint64_t layers = 0;
4075 * Layers bits could be localization, but usually the compiler will
4076 * help to do the optimization work for source code.
4077 * If no decap actions, use the layers directly.
4079 if (!(dev_flow->act_flags & MLX5_FLOW_ACTION_DECAP))
4080 return dev_flow->handle->layers;
4081 /* Convert L3 layers with decap action. */
4082 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV4)
4083 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4084 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L3_IPV6)
4085 layers |= MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4086 /* Convert L4 layers with decap action. */
4087 if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_TCP)
4088 layers |= MLX5_FLOW_LAYER_OUTER_L4_TCP;
4089 else if (dev_flow->handle->layers & MLX5_FLOW_LAYER_INNER_L4_UDP)
4090 layers |= MLX5_FLOW_LAYER_OUTER_L4_UDP;
4095 * Get metadata split action information.
4097 * @param[in] actions
4098 * Pointer to the list of actions.
4100 * Pointer to the return pointer.
4101 * @param[out] qrss_type
4102 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
4103 * if no QUEUE/RSS is found.
4104 * @param[out] encap_idx
4105 * Pointer to the index of the encap action if exists, otherwise the last
4109 * Total number of actions.
4112 flow_parse_metadata_split_actions_info(const struct rte_flow_action actions[],
4113 const struct rte_flow_action **qrss,
4116 const struct rte_flow_action_raw_encap *raw_encap;
4118 int raw_decap_idx = -1;
4121 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4122 switch (actions->type) {
4123 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4124 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4125 *encap_idx = actions_n;
4127 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4128 raw_decap_idx = actions_n;
4130 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4131 raw_encap = actions->conf;
4132 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4133 *encap_idx = raw_decap_idx != -1 ?
4134 raw_decap_idx : actions_n;
4136 case RTE_FLOW_ACTION_TYPE_QUEUE:
4137 case RTE_FLOW_ACTION_TYPE_RSS:
4145 if (*encap_idx == -1)
4146 *encap_idx = actions_n;
4147 /* Count RTE_FLOW_ACTION_TYPE_END. */
4148 return actions_n + 1;
4152 * Check if the action will change packet.
4155 * Pointer to Ethernet device.
4160 * true if action will change packet, false otherwise.
4162 static bool flow_check_modify_action_type(struct rte_eth_dev *dev,
4163 enum rte_flow_action_type type)
4165 struct mlx5_priv *priv = dev->data->dev_private;
4168 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4169 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4170 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4171 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4172 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4173 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4174 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4175 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4176 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4177 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4178 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4179 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4180 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4181 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4182 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
4183 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
4184 case RTE_FLOW_ACTION_TYPE_SET_META:
4185 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4186 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4187 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4188 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4189 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4190 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4191 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4192 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4193 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4194 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4195 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4196 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
4198 case RTE_FLOW_ACTION_TYPE_FLAG:
4199 case RTE_FLOW_ACTION_TYPE_MARK:
4200 if (priv->sh->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
4210 * Check meter action from the action list.
4213 * Pointer to Ethernet device.
4214 * @param[in] actions
4215 * Pointer to the list of actions.
4216 * @param[out] has_mtr
4217 * Pointer to the meter exist flag.
4218 * @param[out] has_modify
4219 * Pointer to the flag showing there's packet change action.
4220 * @param[out] meter_id
4221 * Pointer to the meter id.
4224 * Total number of actions.
4227 flow_check_meter_action(struct rte_eth_dev *dev,
4228 const struct rte_flow_action actions[],
4229 bool *has_mtr, bool *has_modify, uint32_t *meter_id)
4231 const struct rte_flow_action_meter *mtr = NULL;
4234 MLX5_ASSERT(has_mtr);
4236 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4237 switch (actions->type) {
4238 case RTE_FLOW_ACTION_TYPE_METER:
4239 mtr = actions->conf;
4240 *meter_id = mtr->mtr_id;
4247 *has_modify |= flow_check_modify_action_type(dev,
4251 /* Count RTE_FLOW_ACTION_TYPE_END. */
4252 return actions_n + 1;
4256 * Check if the flow should be split due to hairpin.
4257 * The reason for the split is that in current HW we can't
4258 * support encap and push-vlan on Rx, so if a flow contains
4259 * these actions we move it to Tx.
4262 * Pointer to Ethernet device.
4264 * Flow rule attributes.
4265 * @param[in] actions
4266 * Associated actions (list terminated by the END action).
4269 * > 0 the number of actions and the flow should be split,
4270 * 0 when no split required.
4273 flow_check_hairpin_split(struct rte_eth_dev *dev,
4274 const struct rte_flow_attr *attr,
4275 const struct rte_flow_action actions[])
4277 int queue_action = 0;
4280 const struct rte_flow_action_queue *queue;
4281 const struct rte_flow_action_rss *rss;
4282 const struct rte_flow_action_raw_encap *raw_encap;
4283 const struct rte_eth_hairpin_conf *conf;
4287 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4288 switch (actions->type) {
4289 case RTE_FLOW_ACTION_TYPE_QUEUE:
4290 queue = actions->conf;
4293 conf = mlx5_rxq_get_hairpin_conf(dev, queue->index);
4294 if (conf == NULL || conf->tx_explicit != 0)
4299 case RTE_FLOW_ACTION_TYPE_RSS:
4300 rss = actions->conf;
4301 if (rss == NULL || rss->queue_num == 0)
4303 conf = mlx5_rxq_get_hairpin_conf(dev, rss->queue[0]);
4304 if (conf == NULL || conf->tx_explicit != 0)
4309 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4310 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4311 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4312 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4313 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4317 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4318 raw_encap = actions->conf;
4319 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
4328 if (split && queue_action)
4333 /* Declare flow create/destroy prototype in advance. */
4335 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4336 const struct rte_flow_attr *attr,
4337 const struct rte_flow_item items[],
4338 const struct rte_flow_action actions[],
4339 bool external, struct rte_flow_error *error);
4342 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
4346 flow_dv_mreg_match_cb(void *tool_ctx __rte_unused,
4347 struct mlx5_list_entry *entry, void *cb_ctx)
4349 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4350 struct mlx5_flow_mreg_copy_resource *mcp_res =
4351 container_of(entry, typeof(*mcp_res), hlist_ent);
4353 return mcp_res->mark_id != *(uint32_t *)(ctx->data);
4356 struct mlx5_list_entry *
4357 flow_dv_mreg_create_cb(void *tool_ctx, void *cb_ctx)
4359 struct rte_eth_dev *dev = tool_ctx;
4360 struct mlx5_priv *priv = dev->data->dev_private;
4361 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4362 struct mlx5_flow_mreg_copy_resource *mcp_res;
4363 struct rte_flow_error *error = ctx->error;
4366 uint32_t mark_id = *(uint32_t *)(ctx->data);
4367 struct rte_flow_attr attr = {
4368 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4371 struct mlx5_rte_flow_item_tag tag_spec = {
4374 struct rte_flow_item items[] = {
4375 [1] = { .type = RTE_FLOW_ITEM_TYPE_END, },
4377 struct rte_flow_action_mark ftag = {
4380 struct mlx5_flow_action_copy_mreg cp_mreg = {
4384 struct rte_flow_action_jump jump = {
4385 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4387 struct rte_flow_action actions[] = {
4388 [3] = { .type = RTE_FLOW_ACTION_TYPE_END, },
4391 /* Fill the register fields in the flow. */
4392 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
4396 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
4400 /* Provide the full width of FLAG specific value. */
4401 if (mark_id == (priv->sh->dv_regc0_mask & MLX5_FLOW_MARK_DEFAULT))
4402 tag_spec.data = MLX5_FLOW_MARK_DEFAULT;
4403 /* Build a new flow. */
4404 if (mark_id != MLX5_DEFAULT_COPY_ID) {
4405 items[0] = (struct rte_flow_item){
4406 .type = (enum rte_flow_item_type)
4407 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
4410 items[1] = (struct rte_flow_item){
4411 .type = RTE_FLOW_ITEM_TYPE_END,
4413 actions[0] = (struct rte_flow_action){
4414 .type = (enum rte_flow_action_type)
4415 MLX5_RTE_FLOW_ACTION_TYPE_MARK,
4418 actions[1] = (struct rte_flow_action){
4419 .type = (enum rte_flow_action_type)
4420 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4423 actions[2] = (struct rte_flow_action){
4424 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4427 actions[3] = (struct rte_flow_action){
4428 .type = RTE_FLOW_ACTION_TYPE_END,
4431 /* Default rule, wildcard match. */
4432 attr.priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR;
4433 items[0] = (struct rte_flow_item){
4434 .type = RTE_FLOW_ITEM_TYPE_END,
4436 actions[0] = (struct rte_flow_action){
4437 .type = (enum rte_flow_action_type)
4438 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4441 actions[1] = (struct rte_flow_action){
4442 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4445 actions[2] = (struct rte_flow_action){
4446 .type = RTE_FLOW_ACTION_TYPE_END,
4449 /* Build a new entry. */
4450 mcp_res = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4456 mcp_res->mark_id = mark_id;
4458 * The copy Flows are not included in any list. There
4459 * ones are referenced from other Flows and can not
4460 * be applied, removed, deleted in arbitrary order
4461 * by list traversing.
4463 mcp_res->rix_flow = flow_list_create(dev, MLX5_FLOW_TYPE_MCP,
4464 &attr, items, actions, false, error);
4465 if (!mcp_res->rix_flow) {
4466 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], idx);
4469 return &mcp_res->hlist_ent;
4472 struct mlx5_list_entry *
4473 flow_dv_mreg_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
4474 void *cb_ctx __rte_unused)
4476 struct rte_eth_dev *dev = tool_ctx;
4477 struct mlx5_priv *priv = dev->data->dev_private;
4478 struct mlx5_flow_mreg_copy_resource *mcp_res;
4481 mcp_res = mlx5_ipool_malloc(priv->sh->ipool[MLX5_IPOOL_MCP], &idx);
4486 memcpy(mcp_res, oentry, sizeof(*mcp_res));
4488 return &mcp_res->hlist_ent;
4492 flow_dv_mreg_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4494 struct mlx5_flow_mreg_copy_resource *mcp_res =
4495 container_of(entry, typeof(*mcp_res), hlist_ent);
4496 struct rte_eth_dev *dev = tool_ctx;
4497 struct mlx5_priv *priv = dev->data->dev_private;
4499 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4503 * Add a flow of copying flow metadata registers in RX_CP_TBL.
4505 * As mark_id is unique, if there's already a registered flow for the mark_id,
4506 * return by increasing the reference counter of the resource. Otherwise, create
4507 * the resource (mcp_res) and flow.
4510 * - If ingress port is ANY and reg_c[1] is mark_id,
4511 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4513 * For default flow (zero mark_id), flow is like,
4514 * - If ingress port is ANY,
4515 * reg_b := reg_c[0] and jump to RX_ACT_TBL.
4518 * Pointer to Ethernet device.
4520 * ID of MARK action, zero means default flow for META.
4522 * Perform verbose error reporting if not NULL.
4525 * Associated resource on success, NULL otherwise and rte_errno is set.
4527 static struct mlx5_flow_mreg_copy_resource *
4528 flow_mreg_add_copy_action(struct rte_eth_dev *dev, uint32_t mark_id,
4529 struct rte_flow_error *error)
4531 struct mlx5_priv *priv = dev->data->dev_private;
4532 struct mlx5_list_entry *entry;
4533 struct mlx5_flow_cb_ctx ctx = {
4539 /* Check if already registered. */
4540 MLX5_ASSERT(priv->mreg_cp_tbl);
4541 entry = mlx5_hlist_register(priv->mreg_cp_tbl, mark_id, &ctx);
4544 return container_of(entry, struct mlx5_flow_mreg_copy_resource,
4549 flow_dv_mreg_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4551 struct mlx5_flow_mreg_copy_resource *mcp_res =
4552 container_of(entry, typeof(*mcp_res), hlist_ent);
4553 struct rte_eth_dev *dev = tool_ctx;
4554 struct mlx5_priv *priv = dev->data->dev_private;
4556 MLX5_ASSERT(mcp_res->rix_flow);
4557 flow_list_destroy(dev, MLX5_FLOW_TYPE_MCP, mcp_res->rix_flow);
4558 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MCP], mcp_res->idx);
4562 * Release flow in RX_CP_TBL.
4565 * Pointer to Ethernet device.
4567 * Parent flow for wich copying is provided.
4570 flow_mreg_del_copy_action(struct rte_eth_dev *dev,
4571 struct rte_flow *flow)
4573 struct mlx5_flow_mreg_copy_resource *mcp_res;
4574 struct mlx5_priv *priv = dev->data->dev_private;
4576 if (!flow->rix_mreg_copy)
4578 mcp_res = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MCP],
4579 flow->rix_mreg_copy);
4580 if (!mcp_res || !priv->mreg_cp_tbl)
4582 MLX5_ASSERT(mcp_res->rix_flow);
4583 mlx5_hlist_unregister(priv->mreg_cp_tbl, &mcp_res->hlist_ent);
4584 flow->rix_mreg_copy = 0;
4588 * Remove the default copy action from RX_CP_TBL.
4590 * This functions is called in the mlx5_dev_start(). No thread safe
4594 * Pointer to Ethernet device.
4597 flow_mreg_del_default_copy_action(struct rte_eth_dev *dev)
4599 struct mlx5_list_entry *entry;
4600 struct mlx5_priv *priv = dev->data->dev_private;
4601 struct mlx5_flow_cb_ctx ctx;
4604 /* Check if default flow is registered. */
4605 if (!priv->mreg_cp_tbl)
4607 mark_id = MLX5_DEFAULT_COPY_ID;
4608 ctx.data = &mark_id;
4609 entry = mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx);
4612 mlx5_hlist_unregister(priv->mreg_cp_tbl, entry);
4616 * Add the default copy action in in RX_CP_TBL.
4618 * This functions is called in the mlx5_dev_start(). No thread safe
4622 * Pointer to Ethernet device.
4624 * Perform verbose error reporting if not NULL.
4627 * 0 for success, negative value otherwise and rte_errno is set.
4630 flow_mreg_add_default_copy_action(struct rte_eth_dev *dev,
4631 struct rte_flow_error *error)
4633 struct mlx5_priv *priv = dev->data->dev_private;
4634 struct mlx5_flow_mreg_copy_resource *mcp_res;
4635 struct mlx5_flow_cb_ctx ctx;
4638 /* Check whether extensive metadata feature is engaged. */
4639 if (!priv->sh->config.dv_flow_en ||
4640 priv->sh->config.dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4641 !mlx5_flow_ext_mreg_supported(dev) ||
4642 !priv->sh->dv_regc0_mask)
4645 * Add default mreg copy flow may be called multiple time, but
4646 * only be called once in stop. Avoid register it twice.
4648 mark_id = MLX5_DEFAULT_COPY_ID;
4649 ctx.data = &mark_id;
4650 if (mlx5_hlist_lookup(priv->mreg_cp_tbl, mark_id, &ctx))
4652 mcp_res = flow_mreg_add_copy_action(dev, mark_id, error);
4659 * Add a flow of copying flow metadata registers in RX_CP_TBL.
4661 * All the flow having Q/RSS action should be split by
4662 * flow_mreg_split_qrss_prep() to pass by RX_CP_TBL. A flow in the RX_CP_TBL
4663 * performs the following,
4664 * - CQE->flow_tag := reg_c[1] (MARK)
4665 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
4666 * As CQE's flow_tag is not a register, it can't be simply copied from reg_c[1]
4667 * but there should be a flow per each MARK ID set by MARK action.
4669 * For the aforementioned reason, if there's a MARK action in flow's action
4670 * list, a corresponding flow should be added to the RX_CP_TBL in order to copy
4671 * the MARK ID to CQE's flow_tag like,
4672 * - If reg_c[1] is mark_id,
4673 * flow_tag := mark_id, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4675 * For SET_META action which stores value in reg_c[0], as the destination is
4676 * also a flow metadata register (reg_b), adding a default flow is enough. Zero
4677 * MARK ID means the default flow. The default flow looks like,
4678 * - For all flow, reg_b := reg_c[0] and jump to RX_ACT_TBL.
4681 * Pointer to Ethernet device.
4683 * Pointer to flow structure.
4684 * @param[in] actions
4685 * Pointer to the list of actions.
4687 * Perform verbose error reporting if not NULL.
4690 * 0 on success, negative value otherwise and rte_errno is set.
4693 flow_mreg_update_copy_table(struct rte_eth_dev *dev,
4694 struct rte_flow *flow,
4695 const struct rte_flow_action *actions,
4696 struct rte_flow_error *error)
4698 struct mlx5_priv *priv = dev->data->dev_private;
4699 struct mlx5_sh_config *config = &priv->sh->config;
4700 struct mlx5_flow_mreg_copy_resource *mcp_res;
4701 const struct rte_flow_action_mark *mark;
4703 /* Check whether extensive metadata feature is engaged. */
4704 if (!config->dv_flow_en ||
4705 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4706 !mlx5_flow_ext_mreg_supported(dev) ||
4707 !priv->sh->dv_regc0_mask)
4709 /* Find MARK action. */
4710 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4711 switch (actions->type) {
4712 case RTE_FLOW_ACTION_TYPE_FLAG:
4713 mcp_res = flow_mreg_add_copy_action
4714 (dev, MLX5_FLOW_MARK_DEFAULT, error);
4717 flow->rix_mreg_copy = mcp_res->idx;
4719 case RTE_FLOW_ACTION_TYPE_MARK:
4720 mark = (const struct rte_flow_action_mark *)
4723 flow_mreg_add_copy_action(dev, mark->id, error);
4726 flow->rix_mreg_copy = mcp_res->idx;
4735 #define MLX5_MAX_SPLIT_ACTIONS 24
4736 #define MLX5_MAX_SPLIT_ITEMS 24
4739 * Split the hairpin flow.
4740 * Since HW can't support encap and push-vlan on Rx, we move these
4742 * If the count action is after the encap then we also
4743 * move the count action. in this case the count will also measure
4747 * Pointer to Ethernet device.
4748 * @param[in] actions
4749 * Associated actions (list terminated by the END action).
4750 * @param[out] actions_rx
4752 * @param[out] actions_tx
4754 * @param[out] pattern_tx
4755 * The pattern items for the Tx flow.
4756 * @param[out] flow_id
4757 * The flow ID connected to this flow.
4763 flow_hairpin_split(struct rte_eth_dev *dev,
4764 const struct rte_flow_action actions[],
4765 struct rte_flow_action actions_rx[],
4766 struct rte_flow_action actions_tx[],
4767 struct rte_flow_item pattern_tx[],
4770 const struct rte_flow_action_raw_encap *raw_encap;
4771 const struct rte_flow_action_raw_decap *raw_decap;
4772 struct mlx5_rte_flow_action_set_tag *set_tag;
4773 struct rte_flow_action *tag_action;
4774 struct mlx5_rte_flow_item_tag *tag_item;
4775 struct rte_flow_item *item;
4779 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4780 switch (actions->type) {
4781 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4782 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4783 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4784 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4785 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4786 rte_memcpy(actions_tx, actions,
4787 sizeof(struct rte_flow_action));
4790 case RTE_FLOW_ACTION_TYPE_COUNT:
4792 rte_memcpy(actions_tx, actions,
4793 sizeof(struct rte_flow_action));
4796 rte_memcpy(actions_rx, actions,
4797 sizeof(struct rte_flow_action));
4801 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4802 raw_encap = actions->conf;
4803 if (raw_encap->size > MLX5_ENCAPSULATION_DECISION_SIZE) {
4804 memcpy(actions_tx, actions,
4805 sizeof(struct rte_flow_action));
4809 rte_memcpy(actions_rx, actions,
4810 sizeof(struct rte_flow_action));
4814 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4815 raw_decap = actions->conf;
4816 if (raw_decap->size < MLX5_ENCAPSULATION_DECISION_SIZE) {
4817 memcpy(actions_tx, actions,
4818 sizeof(struct rte_flow_action));
4821 rte_memcpy(actions_rx, actions,
4822 sizeof(struct rte_flow_action));
4827 rte_memcpy(actions_rx, actions,
4828 sizeof(struct rte_flow_action));
4833 /* Add set meta action and end action for the Rx flow. */
4834 tag_action = actions_rx;
4835 tag_action->type = (enum rte_flow_action_type)
4836 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
4838 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
4840 set_tag = (void *)actions_rx;
4841 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
4842 .id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL),
4845 MLX5_ASSERT(set_tag->id > REG_NON);
4846 tag_action->conf = set_tag;
4847 /* Create Tx item list. */
4848 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
4849 addr = (void *)&pattern_tx[2];
4851 item->type = (enum rte_flow_item_type)
4852 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
4853 tag_item = (void *)addr;
4854 tag_item->data = flow_id;
4855 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
4856 MLX5_ASSERT(set_tag->id > REG_NON);
4857 item->spec = tag_item;
4858 addr += sizeof(struct mlx5_rte_flow_item_tag);
4859 tag_item = (void *)addr;
4860 tag_item->data = UINT32_MAX;
4861 tag_item->id = UINT16_MAX;
4862 item->mask = tag_item;
4865 item->type = RTE_FLOW_ITEM_TYPE_END;
4870 * The last stage of splitting chain, just creates the subflow
4871 * without any modification.
4874 * Pointer to Ethernet device.
4876 * Parent flow structure pointer.
4877 * @param[in, out] sub_flow
4878 * Pointer to return the created subflow, may be NULL.
4880 * Flow rule attributes.
4882 * Pattern specification (list terminated by the END pattern item).
4883 * @param[in] actions
4884 * Associated actions (list terminated by the END action).
4885 * @param[in] flow_split_info
4886 * Pointer to flow split info structure.
4888 * Perform verbose error reporting if not NULL.
4890 * 0 on success, negative value otherwise
4893 flow_create_split_inner(struct rte_eth_dev *dev,
4894 struct rte_flow *flow,
4895 struct mlx5_flow **sub_flow,
4896 const struct rte_flow_attr *attr,
4897 const struct rte_flow_item items[],
4898 const struct rte_flow_action actions[],
4899 struct mlx5_flow_split_info *flow_split_info,
4900 struct rte_flow_error *error)
4902 struct mlx5_flow *dev_flow;
4903 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
4905 dev_flow = flow_drv_prepare(dev, flow, attr, items, actions,
4906 flow_split_info->flow_idx, error);
4909 dev_flow->flow = flow;
4910 dev_flow->external = flow_split_info->external;
4911 dev_flow->skip_scale = flow_split_info->skip_scale;
4912 /* Subflow object was created, we must include one in the list. */
4913 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
4914 dev_flow->handle, next);
4916 * If dev_flow is as one of the suffix flow, some actions in suffix
4917 * flow may need some user defined item layer flags, and pass the
4918 * Metadata rxq mark flag to suffix flow as well.
4920 if (flow_split_info->prefix_layers)
4921 dev_flow->handle->layers = flow_split_info->prefix_layers;
4922 if (flow_split_info->prefix_mark) {
4927 *sub_flow = dev_flow;
4928 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
4929 dev_flow->dv.table_id = flow_split_info->table_id;
4931 return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
4935 * Get the sub policy of a meter.
4938 * Pointer to Ethernet device.
4940 * Parent flow structure pointer.
4942 * Pointer to thread flow work space.
4944 * Flow rule attributes.
4946 * Pattern specification (list terminated by the END pattern item).
4948 * Perform verbose error reporting if not NULL.
4951 * Pointer to the meter sub policy, NULL otherwise and rte_errno is set.
4953 static struct mlx5_flow_meter_sub_policy *
4954 get_meter_sub_policy(struct rte_eth_dev *dev,
4955 struct rte_flow *flow,
4956 struct mlx5_flow_workspace *wks,
4957 const struct rte_flow_attr *attr,
4958 const struct rte_flow_item items[],
4959 struct rte_flow_error *error)
4961 struct mlx5_flow_meter_policy *policy;
4962 struct mlx5_flow_meter_policy *final_policy;
4963 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
4965 policy = wks->policy;
4966 final_policy = policy->is_hierarchy ? wks->final_policy : policy;
4967 if (final_policy->is_rss || final_policy->is_queue) {
4968 struct mlx5_flow_rss_desc rss_desc_v[MLX5_MTR_RTE_COLORS];
4969 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS] = {0};
4973 * This is a tmp dev_flow,
4974 * no need to register any matcher for it in translate.
4976 wks->skip_matcher_reg = 1;
4977 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
4978 struct mlx5_flow dev_flow = {0};
4979 struct mlx5_flow_handle dev_handle = { {0} };
4980 uint8_t fate = final_policy->act_cnt[i].fate_action;
4982 if (fate == MLX5_FLOW_FATE_SHARED_RSS) {
4983 const struct rte_flow_action_rss *rss_act =
4984 final_policy->act_cnt[i].rss->conf;
4985 struct rte_flow_action rss_actions[2] = {
4987 .type = RTE_FLOW_ACTION_TYPE_RSS,
4991 .type = RTE_FLOW_ACTION_TYPE_END,
4996 dev_flow.handle = &dev_handle;
4997 dev_flow.ingress = attr->ingress;
4998 dev_flow.flow = flow;
4999 dev_flow.external = 0;
5000 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
5001 dev_flow.dv.transfer = attr->transfer;
5004 * Translate RSS action to get rss hash fields.
5006 if (flow_drv_translate(dev, &dev_flow, attr,
5007 items, rss_actions, error))
5009 rss_desc_v[i] = wks->rss_desc;
5010 rss_desc_v[i].key_len = MLX5_RSS_HASH_KEY_LEN;
5011 rss_desc_v[i].hash_fields =
5012 dev_flow.hash_fields;
5013 rss_desc_v[i].queue_num =
5014 rss_desc_v[i].hash_fields ?
5015 rss_desc_v[i].queue_num : 1;
5016 rss_desc_v[i].tunnel =
5017 !!(dev_flow.handle->layers &
5018 MLX5_FLOW_LAYER_TUNNEL);
5019 /* Use the RSS queues in the containers. */
5020 rss_desc_v[i].queue =
5021 (uint16_t *)(uintptr_t)rss_act->queue;
5022 rss_desc[i] = &rss_desc_v[i];
5023 } else if (fate == MLX5_FLOW_FATE_QUEUE) {
5024 /* This is queue action. */
5025 rss_desc_v[i] = wks->rss_desc;
5026 rss_desc_v[i].key_len = 0;
5027 rss_desc_v[i].hash_fields = 0;
5028 rss_desc_v[i].queue =
5029 &final_policy->act_cnt[i].queue;
5030 rss_desc_v[i].queue_num = 1;
5031 rss_desc[i] = &rss_desc_v[i];
5036 sub_policy = flow_drv_meter_sub_policy_rss_prepare(dev,
5037 flow, policy, rss_desc);
5039 enum mlx5_meter_domain mtr_domain =
5040 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
5041 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
5042 MLX5_MTR_DOMAIN_INGRESS);
5043 sub_policy = policy->sub_policys[mtr_domain][0];
5046 rte_flow_error_set(error, EINVAL,
5047 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5048 "Failed to get meter sub-policy.");
5054 * Split the meter flow.
5056 * As meter flow will split to three sub flow, other than meter
5057 * action, the other actions make sense to only meter accepts
5058 * the packet. If it need to be dropped, no other additional
5059 * actions should be take.
5061 * One kind of special action which decapsulates the L3 tunnel
5062 * header will be in the prefix sub flow, as not to take the
5063 * L3 tunnel header into account.
5066 * Pointer to Ethernet device.
5068 * Parent flow structure pointer.
5070 * Pointer to thread flow work space.
5072 * Flow rule attributes.
5074 * Pattern specification (list terminated by the END pattern item).
5075 * @param[out] sfx_items
5076 * Suffix flow match items (list terminated by the END pattern item).
5077 * @param[in] actions
5078 * Associated actions (list terminated by the END action).
5079 * @param[out] actions_sfx
5080 * Suffix flow actions.
5081 * @param[out] actions_pre
5082 * Prefix flow actions.
5083 * @param[out] mtr_flow_id
5084 * Pointer to meter flow id.
5086 * Perform verbose error reporting if not NULL.
5089 * 0 on success, a negative errno value otherwise and rte_errno is set.
5092 flow_meter_split_prep(struct rte_eth_dev *dev,
5093 struct rte_flow *flow,
5094 struct mlx5_flow_workspace *wks,
5095 const struct rte_flow_attr *attr,
5096 const struct rte_flow_item items[],
5097 struct rte_flow_item sfx_items[],
5098 const struct rte_flow_action actions[],
5099 struct rte_flow_action actions_sfx[],
5100 struct rte_flow_action actions_pre[],
5101 uint32_t *mtr_flow_id,
5102 struct rte_flow_error *error)
5104 struct mlx5_priv *priv = dev->data->dev_private;
5105 struct mlx5_flow_meter_info *fm = wks->fm;
5106 struct rte_flow_action *tag_action = NULL;
5107 struct rte_flow_item *tag_item;
5108 struct mlx5_rte_flow_action_set_tag *set_tag;
5109 const struct rte_flow_action_raw_encap *raw_encap;
5110 const struct rte_flow_action_raw_decap *raw_decap;
5111 struct mlx5_rte_flow_item_tag *tag_item_spec;
5112 struct mlx5_rte_flow_item_tag *tag_item_mask;
5113 uint32_t tag_id = 0;
5114 struct rte_flow_item *vlan_item_dst = NULL;
5115 const struct rte_flow_item *vlan_item_src = NULL;
5116 const struct rte_flow_item *orig_items = items;
5117 struct rte_flow_action *hw_mtr_action;
5118 struct rte_flow_action *action_pre_head = NULL;
5119 int32_t flow_src_port = priv->representor_id;
5121 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
5122 uint8_t mtr_reg_bits = priv->mtr_reg_share ?
5123 MLX5_MTR_IDLE_BITS_IN_COLOR_REG : MLX5_REG_BITS;
5124 uint32_t flow_id = 0;
5125 uint32_t flow_id_reversed = 0;
5126 uint8_t flow_id_bits = 0;
5129 /* Prepare the suffix subflow items. */
5130 tag_item = sfx_items++;
5131 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
5132 struct mlx5_priv *port_priv;
5133 const struct rte_flow_item_port_id *pid_v;
5134 int item_type = items->type;
5136 switch (item_type) {
5137 case RTE_FLOW_ITEM_TYPE_PORT_ID:
5138 pid_v = items->spec;
5140 port_priv = mlx5_port_to_eswitch_info(pid_v->id, false);
5142 return rte_flow_error_set(error,
5144 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5146 "Failed to get port info.");
5147 flow_src_port = port_priv->representor_id;
5148 if (!fm->def_policy && wks->policy->is_hierarchy &&
5149 flow_src_port != priv->representor_id) {
5150 if (flow_drv_mtr_hierarchy_rule_create(dev,
5157 memcpy(sfx_items, items, sizeof(*sfx_items));
5160 case RTE_FLOW_ITEM_TYPE_VLAN:
5161 /* Determine if copy vlan item below. */
5162 vlan_item_src = items;
5163 vlan_item_dst = sfx_items++;
5164 vlan_item_dst->type = RTE_FLOW_ITEM_TYPE_VOID;
5170 sfx_items->type = RTE_FLOW_ITEM_TYPE_END;
5172 mtr_first = priv->sh->meter_aso_en &&
5173 (attr->egress || (attr->transfer && flow_src_port != UINT16_MAX));
5174 /* For ASO meter, meter must be before tag in TX direction. */
5176 action_pre_head = actions_pre++;
5177 /* Leave space for tag action. */
5178 tag_action = actions_pre++;
5180 /* Prepare the actions for prefix and suffix flow. */
5181 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5182 struct rte_flow_action *action_cur = NULL;
5184 switch (actions->type) {
5185 case RTE_FLOW_ACTION_TYPE_METER:
5187 action_cur = action_pre_head;
5189 /* Leave space for tag action. */
5190 tag_action = actions_pre++;
5191 action_cur = actions_pre++;
5194 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5195 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5196 action_cur = actions_pre++;
5198 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5199 raw_encap = actions->conf;
5200 if (raw_encap->size < MLX5_ENCAPSULATION_DECISION_SIZE)
5201 action_cur = actions_pre++;
5203 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5204 raw_decap = actions->conf;
5205 if (raw_decap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
5206 action_cur = actions_pre++;
5208 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5209 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5210 if (vlan_item_dst && vlan_item_src) {
5211 memcpy(vlan_item_dst, vlan_item_src,
5212 sizeof(*vlan_item_dst));
5214 * Convert to internal match item, it is used
5215 * for vlan push and set vid.
5217 vlan_item_dst->type = (enum rte_flow_item_type)
5218 MLX5_RTE_FLOW_ITEM_TYPE_VLAN;
5225 action_cur = (fm->def_policy) ?
5226 actions_sfx++ : actions_pre++;
5227 memcpy(action_cur, actions, sizeof(struct rte_flow_action));
5229 /* Add end action to the actions. */
5230 actions_sfx->type = RTE_FLOW_ACTION_TYPE_END;
5231 if (priv->sh->meter_aso_en) {
5233 * For ASO meter, need to add an extra jump action explicitly,
5234 * to jump from meter to policer table.
5236 struct mlx5_flow_meter_sub_policy *sub_policy;
5237 struct mlx5_flow_tbl_data_entry *tbl_data;
5239 if (!fm->def_policy) {
5240 sub_policy = get_meter_sub_policy(dev, flow, wks,
5246 enum mlx5_meter_domain mtr_domain =
5247 attr->transfer ? MLX5_MTR_DOMAIN_TRANSFER :
5248 (attr->egress ? MLX5_MTR_DOMAIN_EGRESS :
5249 MLX5_MTR_DOMAIN_INGRESS);
5252 &priv->sh->mtrmng->def_policy[mtr_domain]->sub_policy;
5254 tbl_data = container_of(sub_policy->tbl_rsc,
5255 struct mlx5_flow_tbl_data_entry, tbl);
5256 hw_mtr_action = actions_pre++;
5257 hw_mtr_action->type = (enum rte_flow_action_type)
5258 MLX5_RTE_FLOW_ACTION_TYPE_JUMP;
5259 hw_mtr_action->conf = tbl_data->jump.action;
5261 actions_pre->type = RTE_FLOW_ACTION_TYPE_END;
5264 return rte_flow_error_set(error, ENOMEM,
5265 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5266 NULL, "No tag action space.");
5268 tag_action->type = RTE_FLOW_ACTION_TYPE_VOID;
5271 /* Only default-policy Meter creates mtr flow id. */
5272 if (fm->def_policy) {
5273 mlx5_ipool_malloc(fm->flow_ipool, &tag_id);
5275 return rte_flow_error_set(error, ENOMEM,
5276 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5277 "Failed to allocate meter flow id.");
5278 flow_id = tag_id - 1;
5279 flow_id_bits = (!flow_id) ? 1 :
5280 (MLX5_REG_BITS - __builtin_clz(flow_id));
5281 if ((flow_id_bits + priv->sh->mtrmng->max_mtr_bits) >
5283 mlx5_ipool_free(fm->flow_ipool, tag_id);
5284 return rte_flow_error_set(error, EINVAL,
5285 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5286 "Meter flow id exceeds max limit.");
5288 if (flow_id_bits > priv->sh->mtrmng->max_mtr_flow_bits)
5289 priv->sh->mtrmng->max_mtr_flow_bits = flow_id_bits;
5291 /* Build tag actions and items for meter_id/meter flow_id. */
5292 set_tag = (struct mlx5_rte_flow_action_set_tag *)actions_pre;
5293 tag_item_spec = (struct mlx5_rte_flow_item_tag *)sfx_items;
5294 tag_item_mask = tag_item_spec + 1;
5295 /* Both flow_id and meter_id share the same register. */
5296 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5297 .id = (enum modify_reg)mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
5299 .offset = mtr_id_offset,
5300 .length = mtr_reg_bits,
5301 .data = flow->meter,
5304 * The color Reg bits used by flow_id are growing from
5305 * msb to lsb, so must do bit reverse for flow_id val in RegC.
5307 for (shift = 0; shift < flow_id_bits; shift++)
5308 flow_id_reversed = (flow_id_reversed << 1) |
5309 ((flow_id >> shift) & 0x1);
5311 flow_id_reversed << (mtr_reg_bits - flow_id_bits);
5312 tag_item_spec->id = set_tag->id;
5313 tag_item_spec->data = set_tag->data << mtr_id_offset;
5314 tag_item_mask->data = UINT32_MAX << mtr_id_offset;
5315 tag_action->type = (enum rte_flow_action_type)
5316 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
5317 tag_action->conf = set_tag;
5318 tag_item->type = (enum rte_flow_item_type)
5319 MLX5_RTE_FLOW_ITEM_TYPE_TAG;
5320 tag_item->spec = tag_item_spec;
5321 tag_item->last = NULL;
5322 tag_item->mask = tag_item_mask;
5325 *mtr_flow_id = tag_id;
5330 * Split action list having QUEUE/RSS for metadata register copy.
5332 * Once Q/RSS action is detected in user's action list, the flow action
5333 * should be split in order to copy metadata registers, which will happen in
5335 * - CQE->flow_tag := reg_c[1] (MARK)
5336 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
5337 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
5338 * This is because the last action of each flow must be a terminal action
5339 * (QUEUE, RSS or DROP).
5341 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
5342 * stored and kept in the mlx5_flow structure per each sub_flow.
5344 * The Q/RSS action is replaced with,
5345 * - SET_TAG, setting the allocated flow ID to reg_c[2].
5346 * And the following JUMP action is added at the end,
5347 * - JUMP, to RX_CP_TBL.
5349 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
5350 * flow_create_split_metadata() routine. The flow will look like,
5351 * - If flow ID matches (reg_c[2]), perform Q/RSS.
5354 * Pointer to Ethernet device.
5355 * @param[out] split_actions
5356 * Pointer to store split actions to jump to CP_TBL.
5357 * @param[in] actions
5358 * Pointer to the list of original flow actions.
5360 * Pointer to the Q/RSS action.
5361 * @param[in] actions_n
5362 * Number of original actions.
5363 * @param[in] mtr_sfx
5364 * Check if it is in meter suffix table.
5366 * Perform verbose error reporting if not NULL.
5369 * non-zero unique flow_id on success, otherwise 0 and
5370 * error/rte_error are set.
5373 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
5374 struct rte_flow_action *split_actions,
5375 const struct rte_flow_action *actions,
5376 const struct rte_flow_action *qrss,
5377 int actions_n, int mtr_sfx,
5378 struct rte_flow_error *error)
5380 struct mlx5_priv *priv = dev->data->dev_private;
5381 struct mlx5_rte_flow_action_set_tag *set_tag;
5382 struct rte_flow_action_jump *jump;
5383 const int qrss_idx = qrss - actions;
5384 uint32_t flow_id = 0;
5388 * Given actions will be split
5389 * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
5390 * - Add jump to mreg CP_TBL.
5391 * As a result, there will be one more action.
5393 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
5394 /* Count MLX5_RTE_FLOW_ACTION_TYPE_TAG. */
5396 set_tag = (void *)(split_actions + actions_n);
5398 * If we are not the meter suffix flow, add the tag action.
5399 * Since meter suffix flow already has the tag added.
5403 * Allocate the new subflow ID. This one is unique within
5404 * device and not shared with representors. Otherwise,
5405 * we would have to resolve multi-thread access synch
5406 * issue. Each flow on the shared device is appended
5407 * with source vport identifier, so the resulting
5408 * flows will be unique in the shared (by master and
5409 * representors) domain even if they have coinciding
5412 mlx5_ipool_malloc(priv->sh->ipool
5413 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &flow_id);
5415 return rte_flow_error_set(error, ENOMEM,
5416 RTE_FLOW_ERROR_TYPE_ACTION,
5417 NULL, "can't allocate id "
5418 "for split Q/RSS subflow");
5419 /* Internal SET_TAG action to set flow ID. */
5420 *set_tag = (struct mlx5_rte_flow_action_set_tag){
5423 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
5427 /* Construct new actions array. */
5428 /* Replace QUEUE/RSS action. */
5429 split_actions[qrss_idx] = (struct rte_flow_action){
5430 .type = (enum rte_flow_action_type)
5431 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5436 * If we are the suffix flow of meter, tag already exist.
5437 * Set the QUEUE/RSS action to void.
5439 split_actions[qrss_idx].type = RTE_FLOW_ACTION_TYPE_VOID;
5441 /* JUMP action to jump to mreg copy table (CP_TBL). */
5442 jump = (void *)(set_tag + 1);
5443 *jump = (struct rte_flow_action_jump){
5444 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
5446 split_actions[actions_n - 2] = (struct rte_flow_action){
5447 .type = RTE_FLOW_ACTION_TYPE_JUMP,
5450 split_actions[actions_n - 1] = (struct rte_flow_action){
5451 .type = RTE_FLOW_ACTION_TYPE_END,
5457 * Extend the given action list for Tx metadata copy.
5459 * Copy the given action list to the ext_actions and add flow metadata register
5460 * copy action in order to copy reg_a set by WQE to reg_c[0].
5462 * @param[out] ext_actions
5463 * Pointer to the extended action list.
5464 * @param[in] actions
5465 * Pointer to the list of actions.
5466 * @param[in] actions_n
5467 * Number of actions in the list.
5469 * Perform verbose error reporting if not NULL.
5470 * @param[in] encap_idx
5471 * The encap action index.
5474 * 0 on success, negative value otherwise
5477 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
5478 struct rte_flow_action *ext_actions,
5479 const struct rte_flow_action *actions,
5480 int actions_n, struct rte_flow_error *error,
5483 struct mlx5_flow_action_copy_mreg *cp_mreg =
5484 (struct mlx5_flow_action_copy_mreg *)
5485 (ext_actions + actions_n + 1);
5488 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
5492 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
5497 memcpy(ext_actions, actions, sizeof(*ext_actions) * encap_idx);
5498 if (encap_idx == actions_n - 1) {
5499 ext_actions[actions_n - 1] = (struct rte_flow_action){
5500 .type = (enum rte_flow_action_type)
5501 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5504 ext_actions[actions_n] = (struct rte_flow_action){
5505 .type = RTE_FLOW_ACTION_TYPE_END,
5508 ext_actions[encap_idx] = (struct rte_flow_action){
5509 .type = (enum rte_flow_action_type)
5510 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
5513 memcpy(ext_actions + encap_idx + 1, actions + encap_idx,
5514 sizeof(*ext_actions) * (actions_n - encap_idx));
5520 * Check the match action from the action list.
5522 * @param[in] actions
5523 * Pointer to the list of actions.
5525 * Flow rule attributes.
5527 * The action to be check if exist.
5528 * @param[out] match_action_pos
5529 * Pointer to the position of the matched action if exists, otherwise is -1.
5530 * @param[out] qrss_action_pos
5531 * Pointer to the position of the Queue/RSS action if exists, otherwise is -1.
5532 * @param[out] modify_after_mirror
5533 * Pointer to the flag of modify action after FDB mirroring.
5536 * > 0 the total number of actions.
5537 * 0 if not found match action in action list.
5540 flow_check_match_action(const struct rte_flow_action actions[],
5541 const struct rte_flow_attr *attr,
5542 enum rte_flow_action_type action,
5543 int *match_action_pos, int *qrss_action_pos,
5544 int *modify_after_mirror)
5546 const struct rte_flow_action_sample *sample;
5547 const struct rte_flow_action_raw_decap *decap;
5554 *match_action_pos = -1;
5555 *qrss_action_pos = -1;
5556 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
5557 if (actions->type == action) {
5559 *match_action_pos = actions_n;
5561 switch (actions->type) {
5562 case RTE_FLOW_ACTION_TYPE_QUEUE:
5563 case RTE_FLOW_ACTION_TYPE_RSS:
5564 *qrss_action_pos = actions_n;
5566 case RTE_FLOW_ACTION_TYPE_SAMPLE:
5567 sample = actions->conf;
5568 ratio = sample->ratio;
5569 sub_type = ((const struct rte_flow_action *)
5570 (sample->actions))->type;
5571 if (ratio == 1 && attr->transfer)
5574 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
5575 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
5576 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
5577 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
5578 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
5579 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
5580 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
5581 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
5582 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
5583 case RTE_FLOW_ACTION_TYPE_SET_TTL:
5584 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
5585 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
5586 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
5587 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
5588 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
5589 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
5590 case RTE_FLOW_ACTION_TYPE_FLAG:
5591 case RTE_FLOW_ACTION_TYPE_MARK:
5592 case RTE_FLOW_ACTION_TYPE_SET_META:
5593 case RTE_FLOW_ACTION_TYPE_SET_TAG:
5594 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
5595 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
5596 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
5597 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
5598 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
5599 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
5600 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
5601 case RTE_FLOW_ACTION_TYPE_METER:
5603 *modify_after_mirror = 1;
5605 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
5606 decap = actions->conf;
5607 while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
5610 if (actions->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
5611 const struct rte_flow_action_raw_encap *encap =
5614 MLX5_ENCAPSULATION_DECISION_SIZE &&
5616 MLX5_ENCAPSULATION_DECISION_SIZE)
5621 *modify_after_mirror = 1;
5628 if (flag && fdb_mirror && !*modify_after_mirror) {
5629 /* FDB mirroring uses the destination array to implement
5630 * instead of FLOW_SAMPLER object.
5632 if (sub_type != RTE_FLOW_ACTION_TYPE_END)
5635 /* Count RTE_FLOW_ACTION_TYPE_END. */
5636 return flag ? actions_n + 1 : 0;
5639 #define SAMPLE_SUFFIX_ITEM 2
5642 * Split the sample flow.
5644 * As sample flow will split to two sub flow, sample flow with
5645 * sample action, the other actions will move to new suffix flow.
5647 * Also add unique tag id with tag action in the sample flow,
5648 * the same tag id will be as match in the suffix flow.
5651 * Pointer to Ethernet device.
5652 * @param[in] add_tag
5653 * Add extra tag action flag.
5654 * @param[out] sfx_items
5655 * Suffix flow match items (list terminated by the END pattern item).
5656 * @param[in] actions
5657 * Associated actions (list terminated by the END action).
5658 * @param[out] actions_sfx
5659 * Suffix flow actions.
5660 * @param[out] actions_pre
5661 * Prefix flow actions.
5662 * @param[in] actions_n
5663 * The total number of actions.
5664 * @param[in] sample_action_pos
5665 * The sample action position.
5666 * @param[in] qrss_action_pos
5667 * The Queue/RSS action position.
5668 * @param[in] jump_table
5669 * Add extra jump action flag.
5671 * Perform verbose error reporting if not NULL.
5674 * 0 on success, or unique flow_id, a negative errno value
5675 * otherwise and rte_errno is set.
5678 flow_sample_split_prep(struct rte_eth_dev *dev,
5680 struct rte_flow_item sfx_items[],
5681 const struct rte_flow_action actions[],
5682 struct rte_flow_action actions_sfx[],
5683 struct rte_flow_action actions_pre[],
5685 int sample_action_pos,
5686 int qrss_action_pos,
5688 struct rte_flow_error *error)
5690 struct mlx5_priv *priv = dev->data->dev_private;
5691 struct mlx5_rte_flow_action_set_tag *set_tag;
5692 struct mlx5_rte_flow_item_tag *tag_spec;
5693 struct mlx5_rte_flow_item_tag *tag_mask;
5694 struct rte_flow_action_jump *jump_action;
5695 uint32_t tag_id = 0;
5697 int append_index = 0;
5700 if (sample_action_pos < 0)
5701 return rte_flow_error_set(error, EINVAL,
5702 RTE_FLOW_ERROR_TYPE_ACTION,
5703 NULL, "invalid position of sample "
5705 /* Prepare the actions for prefix and suffix flow. */
5706 if (qrss_action_pos >= 0 && qrss_action_pos < sample_action_pos) {
5707 index = qrss_action_pos;
5708 /* Put the preceding the Queue/RSS action into prefix flow. */
5710 memcpy(actions_pre, actions,
5711 sizeof(struct rte_flow_action) * index);
5712 /* Put others preceding the sample action into prefix flow. */
5713 if (sample_action_pos > index + 1)
5714 memcpy(actions_pre + index, actions + index + 1,
5715 sizeof(struct rte_flow_action) *
5716 (sample_action_pos - index - 1));
5717 index = sample_action_pos - 1;
5718 /* Put Queue/RSS action into Suffix flow. */
5719 memcpy(actions_sfx, actions + qrss_action_pos,
5720 sizeof(struct rte_flow_action));
5723 index = sample_action_pos;
5725 memcpy(actions_pre, actions,
5726 sizeof(struct rte_flow_action) * index);
5728 /* For CX5, add an extra tag action for NIC-RX and E-Switch ingress.
5729 * For CX6DX and above, metadata registers Cx preserve their value,
5730 * add an extra tag action for NIC-RX and E-Switch Domain.
5733 /* Prepare the prefix tag action. */
5735 set_tag = (void *)(actions_pre + actions_n + append_index);
5736 ret = mlx5_flow_get_reg_id(dev, MLX5_SAMPLE_ID, 0, error);
5739 mlx5_ipool_malloc(priv->sh->ipool
5740 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID], &tag_id);
5741 *set_tag = (struct mlx5_rte_flow_action_set_tag) {
5745 /* Prepare the suffix subflow items. */
5746 tag_spec = (void *)(sfx_items + SAMPLE_SUFFIX_ITEM);
5747 tag_spec->data = tag_id;
5748 tag_spec->id = set_tag->id;
5749 tag_mask = tag_spec + 1;
5750 tag_mask->data = UINT32_MAX;
5751 sfx_items[0] = (struct rte_flow_item){
5752 .type = (enum rte_flow_item_type)
5753 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5758 sfx_items[1] = (struct rte_flow_item){
5759 .type = (enum rte_flow_item_type)
5760 RTE_FLOW_ITEM_TYPE_END,
5762 /* Prepare the tag action in prefix subflow. */
5763 actions_pre[index++] =
5764 (struct rte_flow_action){
5765 .type = (enum rte_flow_action_type)
5766 MLX5_RTE_FLOW_ACTION_TYPE_TAG,
5770 memcpy(actions_pre + index, actions + sample_action_pos,
5771 sizeof(struct rte_flow_action));
5773 /* For the modify action after the sample action in E-Switch mirroring,
5774 * Add the extra jump action in prefix subflow and jump into the next
5775 * table, then do the modify action in the new table.
5778 /* Prepare the prefix jump action. */
5780 jump_action = (void *)(actions_pre + actions_n + append_index);
5781 jump_action->group = jump_table;
5782 actions_pre[index++] =
5783 (struct rte_flow_action){
5784 .type = (enum rte_flow_action_type)
5785 RTE_FLOW_ACTION_TYPE_JUMP,
5786 .conf = jump_action,
5789 actions_pre[index] = (struct rte_flow_action){
5790 .type = (enum rte_flow_action_type)
5791 RTE_FLOW_ACTION_TYPE_END,
5793 /* Put the actions after sample into Suffix flow. */
5794 memcpy(actions_sfx, actions + sample_action_pos + 1,
5795 sizeof(struct rte_flow_action) *
5796 (actions_n - sample_action_pos - 1));
5801 * The splitting for metadata feature.
5803 * - Q/RSS action on NIC Rx should be split in order to pass by
5804 * the mreg copy table (RX_CP_TBL) and then it jumps to the
5805 * action table (RX_ACT_TBL) which has the split Q/RSS action.
5807 * - All the actions on NIC Tx should have a mreg copy action to
5808 * copy reg_a from WQE to reg_c[0].
5811 * Pointer to Ethernet device.
5813 * Parent flow structure pointer.
5815 * Flow rule attributes.
5817 * Pattern specification (list terminated by the END pattern item).
5818 * @param[in] actions
5819 * Associated actions (list terminated by the END action).
5820 * @param[in] flow_split_info
5821 * Pointer to flow split info structure.
5823 * Perform verbose error reporting if not NULL.
5825 * 0 on success, negative value otherwise
5828 flow_create_split_metadata(struct rte_eth_dev *dev,
5829 struct rte_flow *flow,
5830 const struct rte_flow_attr *attr,
5831 const struct rte_flow_item items[],
5832 const struct rte_flow_action actions[],
5833 struct mlx5_flow_split_info *flow_split_info,
5834 struct rte_flow_error *error)
5836 struct mlx5_priv *priv = dev->data->dev_private;
5837 struct mlx5_sh_config *config = &priv->sh->config;
5838 const struct rte_flow_action *qrss = NULL;
5839 struct rte_flow_action *ext_actions = NULL;
5840 struct mlx5_flow *dev_flow = NULL;
5841 uint32_t qrss_id = 0;
5848 /* Check whether extensive metadata feature is engaged. */
5849 if (!config->dv_flow_en ||
5850 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5851 !mlx5_flow_ext_mreg_supported(dev))
5852 return flow_create_split_inner(dev, flow, NULL, attr, items,
5853 actions, flow_split_info, error);
5854 actions_n = flow_parse_metadata_split_actions_info(actions, &qrss,
5857 /* Exclude hairpin flows from splitting. */
5858 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
5859 const struct rte_flow_action_queue *queue;
5862 if (mlx5_rxq_get_type(dev, queue->index) ==
5863 MLX5_RXQ_TYPE_HAIRPIN)
5865 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
5866 const struct rte_flow_action_rss *rss;
5869 if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
5870 MLX5_RXQ_TYPE_HAIRPIN)
5875 /* Check if it is in meter suffix table. */
5876 mtr_sfx = attr->group == (attr->transfer ?
5877 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
5878 MLX5_FLOW_TABLE_LEVEL_METER);
5880 * Q/RSS action on NIC Rx should be split in order to pass by
5881 * the mreg copy table (RX_CP_TBL) and then it jumps to the
5882 * action table (RX_ACT_TBL) which has the split Q/RSS action.
5884 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5885 sizeof(struct rte_flow_action_set_tag) +
5886 sizeof(struct rte_flow_action_jump);
5887 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5890 return rte_flow_error_set(error, ENOMEM,
5891 RTE_FLOW_ERROR_TYPE_ACTION,
5892 NULL, "no memory to split "
5895 * Create the new actions list with removed Q/RSS action
5896 * and appended set tag and jump to register copy table
5897 * (RX_CP_TBL). We should preallocate unique tag ID here
5898 * in advance, because it is needed for set tag action.
5900 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
5903 if (!mtr_sfx && !qrss_id) {
5907 } else if (attr->egress && !attr->transfer) {
5909 * All the actions on NIC Tx should have a metadata register
5910 * copy action to copy reg_a from WQE to reg_c[meta]
5912 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
5913 sizeof(struct mlx5_flow_action_copy_mreg);
5914 ext_actions = mlx5_malloc(MLX5_MEM_ZERO, act_size, 0,
5917 return rte_flow_error_set(error, ENOMEM,
5918 RTE_FLOW_ERROR_TYPE_ACTION,
5919 NULL, "no memory to split "
5921 /* Create the action list appended with copy register. */
5922 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
5923 actions_n, error, encap_idx);
5927 /* Add the unmodified original or prefix subflow. */
5928 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
5929 items, ext_actions ? ext_actions :
5930 actions, flow_split_info, error);
5933 MLX5_ASSERT(dev_flow);
5935 const struct rte_flow_attr q_attr = {
5936 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
5939 /* Internal PMD action to set register. */
5940 struct mlx5_rte_flow_item_tag q_tag_spec = {
5944 struct rte_flow_item q_items[] = {
5946 .type = (enum rte_flow_item_type)
5947 MLX5_RTE_FLOW_ITEM_TYPE_TAG,
5948 .spec = &q_tag_spec,
5953 .type = RTE_FLOW_ITEM_TYPE_END,
5956 struct rte_flow_action q_actions[] = {
5962 .type = RTE_FLOW_ACTION_TYPE_END,
5965 uint64_t layers = flow_get_prefix_layer_flags(dev_flow);
5968 * Configure the tag item only if there is no meter subflow.
5969 * Since tag is already marked in the meter suffix subflow
5970 * we can just use the meter suffix items as is.
5973 /* Not meter subflow. */
5974 MLX5_ASSERT(!mtr_sfx);
5976 * Put unique id in prefix flow due to it is destroyed
5977 * after suffix flow and id will be freed after there
5978 * is no actual flows with this id and identifier
5979 * reallocation becomes possible (for example, for
5980 * other flows in other threads).
5982 dev_flow->handle->split_flow_id = qrss_id;
5983 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0,
5987 q_tag_spec.id = ret;
5990 /* Add suffix subflow to execute Q/RSS. */
5991 flow_split_info->prefix_layers = layers;
5992 flow_split_info->prefix_mark = 0;
5993 flow_split_info->table_id = 0;
5994 ret = flow_create_split_inner(dev, flow, &dev_flow,
5995 &q_attr, mtr_sfx ? items :
5997 flow_split_info, error);
6000 /* qrss ID should be freed if failed. */
6002 MLX5_ASSERT(dev_flow);
6007 * We do not destroy the partially created sub_flows in case of error.
6008 * These ones are included into parent flow list and will be destroyed
6009 * by flow_drv_destroy.
6011 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
6013 mlx5_free(ext_actions);
6018 * Create meter internal drop flow with the original pattern.
6021 * Pointer to Ethernet device.
6023 * Parent flow structure pointer.
6025 * Flow rule attributes.
6027 * Pattern specification (list terminated by the END pattern item).
6028 * @param[in] flow_split_info
6029 * Pointer to flow split info structure.
6031 * Pointer to flow meter structure.
6033 * Perform verbose error reporting if not NULL.
6035 * 0 on success, negative value otherwise
6038 flow_meter_create_drop_flow_with_org_pattern(struct rte_eth_dev *dev,
6039 struct rte_flow *flow,
6040 const struct rte_flow_attr *attr,
6041 const struct rte_flow_item items[],
6042 struct mlx5_flow_split_info *flow_split_info,
6043 struct mlx5_flow_meter_info *fm,
6044 struct rte_flow_error *error)
6046 struct mlx5_flow *dev_flow = NULL;
6047 struct rte_flow_attr drop_attr = *attr;
6048 struct rte_flow_action drop_actions[3];
6049 struct mlx5_flow_split_info drop_split_info = *flow_split_info;
6051 MLX5_ASSERT(fm->drop_cnt);
6052 drop_actions[0].type =
6053 (enum rte_flow_action_type)MLX5_RTE_FLOW_ACTION_TYPE_COUNT;
6054 drop_actions[0].conf = (void *)(uintptr_t)fm->drop_cnt;
6055 drop_actions[1].type = RTE_FLOW_ACTION_TYPE_DROP;
6056 drop_actions[1].conf = NULL;
6057 drop_actions[2].type = RTE_FLOW_ACTION_TYPE_END;
6058 drop_actions[2].conf = NULL;
6059 drop_split_info.external = false;
6060 drop_split_info.skip_scale |= 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6061 drop_split_info.table_id = MLX5_MTR_TABLE_ID_DROP;
6062 drop_attr.group = MLX5_FLOW_TABLE_LEVEL_METER;
6063 return flow_create_split_inner(dev, flow, &dev_flow,
6064 &drop_attr, items, drop_actions,
6065 &drop_split_info, error);
6069 * The splitting for meter feature.
6071 * - The meter flow will be split to two flows as prefix and
6072 * suffix flow. The packets make sense only it pass the prefix
6075 * - Reg_C_5 is used for the packet to match betweend prefix and
6079 * Pointer to Ethernet device.
6081 * Parent flow structure pointer.
6083 * Flow rule attributes.
6085 * Pattern specification (list terminated by the END pattern item).
6086 * @param[in] actions
6087 * Associated actions (list terminated by the END action).
6088 * @param[in] flow_split_info
6089 * Pointer to flow split info structure.
6091 * Perform verbose error reporting if not NULL.
6093 * 0 on success, negative value otherwise
6096 flow_create_split_meter(struct rte_eth_dev *dev,
6097 struct rte_flow *flow,
6098 const struct rte_flow_attr *attr,
6099 const struct rte_flow_item items[],
6100 const struct rte_flow_action actions[],
6101 struct mlx5_flow_split_info *flow_split_info,
6102 struct rte_flow_error *error)
6104 struct mlx5_priv *priv = dev->data->dev_private;
6105 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
6106 struct rte_flow_action *sfx_actions = NULL;
6107 struct rte_flow_action *pre_actions = NULL;
6108 struct rte_flow_item *sfx_items = NULL;
6109 struct mlx5_flow *dev_flow = NULL;
6110 struct rte_flow_attr sfx_attr = *attr;
6111 struct mlx5_flow_meter_info *fm = NULL;
6112 uint8_t skip_scale_restore;
6113 bool has_mtr = false;
6114 bool has_modify = false;
6115 bool set_mtr_reg = true;
6116 bool is_mtr_hierarchy = false;
6117 uint32_t meter_id = 0;
6118 uint32_t mtr_idx = 0;
6119 uint32_t mtr_flow_id = 0;
6126 actions_n = flow_check_meter_action(dev, actions, &has_mtr,
6127 &has_modify, &meter_id);
6130 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
6132 return rte_flow_error_set(error, EINVAL,
6133 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6134 NULL, "Meter not found.");
6136 fm = mlx5_flow_meter_find(priv, meter_id, &mtr_idx);
6138 return rte_flow_error_set(error, EINVAL,
6139 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6140 NULL, "Meter not found.");
6141 ret = mlx5_flow_meter_attach(priv, fm,
6145 flow->meter = mtr_idx;
6149 if (!fm->def_policy) {
6150 wks->policy = mlx5_flow_meter_policy_find(dev,
6153 MLX5_ASSERT(wks->policy);
6154 if (wks->policy->is_hierarchy) {
6156 mlx5_flow_meter_hierarchy_get_final_policy(dev,
6158 if (!wks->final_policy)
6159 return rte_flow_error_set(error,
6161 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
6162 "Failed to find terminal policy of hierarchy.");
6163 is_mtr_hierarchy = true;
6167 * If it isn't default-policy Meter, and
6168 * 1. There's no action in flow to change
6169 * packet (modify/encap/decap etc.), OR
6170 * 2. No drop count needed for this meter.
6171 * 3. It's not meter hierarchy.
6172 * Then no need to use regC to save meter id anymore.
6174 if (!fm->def_policy && !is_mtr_hierarchy &&
6175 (!has_modify || !fm->drop_cnt))
6176 set_mtr_reg = false;
6177 /* Prefix actions: meter, decap, encap, tag, jump, end. */
6178 act_size = sizeof(struct rte_flow_action) * (actions_n + 6) +
6179 sizeof(struct mlx5_rte_flow_action_set_tag);
6180 /* Suffix items: tag, vlan, port id, end. */
6181 #define METER_SUFFIX_ITEM 4
6182 item_size = sizeof(struct rte_flow_item) * METER_SUFFIX_ITEM +
6183 sizeof(struct mlx5_rte_flow_item_tag) * 2;
6184 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size + item_size),
6187 return rte_flow_error_set(error, ENOMEM,
6188 RTE_FLOW_ERROR_TYPE_ACTION,
6189 NULL, "no memory to split "
6191 sfx_items = (struct rte_flow_item *)((char *)sfx_actions +
6193 /* There's no suffix flow for meter of non-default policy. */
6194 if (!fm->def_policy)
6195 pre_actions = sfx_actions + 1;
6197 pre_actions = sfx_actions + actions_n;
6198 ret = flow_meter_split_prep(dev, flow, wks, &sfx_attr,
6199 items, sfx_items, actions,
6200 sfx_actions, pre_actions,
6201 (set_mtr_reg ? &mtr_flow_id : NULL),
6207 /* Add the prefix subflow. */
6208 skip_scale_restore = flow_split_info->skip_scale;
6209 flow_split_info->skip_scale |=
6210 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6211 ret = flow_create_split_inner(dev, flow, &dev_flow,
6212 attr, items, pre_actions,
6213 flow_split_info, error);
6214 flow_split_info->skip_scale = skip_scale_restore;
6217 mlx5_ipool_free(fm->flow_ipool, mtr_flow_id);
6222 dev_flow->handle->split_flow_id = mtr_flow_id;
6223 dev_flow->handle->is_meter_flow_id = 1;
6225 if (!fm->def_policy) {
6226 if (!set_mtr_reg && fm->drop_cnt)
6228 flow_meter_create_drop_flow_with_org_pattern(dev, flow,
6234 /* Setting the sfx group atrr. */
6235 sfx_attr.group = sfx_attr.transfer ?
6236 (MLX5_FLOW_TABLE_LEVEL_METER - 1) :
6237 MLX5_FLOW_TABLE_LEVEL_METER;
6238 flow_split_info->prefix_layers =
6239 flow_get_prefix_layer_flags(dev_flow);
6240 flow_split_info->prefix_mark |= wks->mark;
6241 flow_split_info->table_id = MLX5_MTR_TABLE_ID_SUFFIX;
6243 /* Add the prefix subflow. */
6244 ret = flow_create_split_metadata(dev, flow,
6245 &sfx_attr, sfx_items ?
6247 sfx_actions ? sfx_actions : actions,
6248 flow_split_info, error);
6251 mlx5_free(sfx_actions);
6256 * The splitting for sample feature.
6258 * Once Sample action is detected in the action list, the flow actions should
6259 * be split into prefix sub flow and suffix sub flow.
6261 * The original items remain in the prefix sub flow, all actions preceding the
6262 * sample action and the sample action itself will be copied to the prefix
6263 * sub flow, the actions following the sample action will be copied to the
6264 * suffix sub flow, Queue action always be located in the suffix sub flow.
6266 * In order to make the packet from prefix sub flow matches with suffix sub
6267 * flow, an extra tag action be added into prefix sub flow, and the suffix sub
6268 * flow uses tag item with the unique flow id.
6271 * Pointer to Ethernet device.
6273 * Parent flow structure pointer.
6275 * Flow rule attributes.
6277 * Pattern specification (list terminated by the END pattern item).
6278 * @param[in] actions
6279 * Associated actions (list terminated by the END action).
6280 * @param[in] flow_split_info
6281 * Pointer to flow split info structure.
6283 * Perform verbose error reporting if not NULL.
6285 * 0 on success, negative value otherwise
6288 flow_create_split_sample(struct rte_eth_dev *dev,
6289 struct rte_flow *flow,
6290 const struct rte_flow_attr *attr,
6291 const struct rte_flow_item items[],
6292 const struct rte_flow_action actions[],
6293 struct mlx5_flow_split_info *flow_split_info,
6294 struct rte_flow_error *error)
6296 struct mlx5_priv *priv = dev->data->dev_private;
6297 struct rte_flow_action *sfx_actions = NULL;
6298 struct rte_flow_action *pre_actions = NULL;
6299 struct rte_flow_item *sfx_items = NULL;
6300 struct mlx5_flow *dev_flow = NULL;
6301 struct rte_flow_attr sfx_attr = *attr;
6302 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6303 struct mlx5_flow_dv_sample_resource *sample_res;
6304 struct mlx5_flow_tbl_data_entry *sfx_tbl_data;
6305 struct mlx5_flow_tbl_resource *sfx_tbl;
6306 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
6310 uint32_t fdb_tx = 0;
6313 int sample_action_pos;
6314 int qrss_action_pos;
6316 int modify_after_mirror = 0;
6317 uint16_t jump_table = 0;
6318 const uint32_t next_ft_step = 1;
6321 if (priv->sampler_en)
6322 actions_n = flow_check_match_action(actions, attr,
6323 RTE_FLOW_ACTION_TYPE_SAMPLE,
6324 &sample_action_pos, &qrss_action_pos,
6325 &modify_after_mirror);
6327 /* The prefix actions must includes sample, tag, end. */
6328 act_size = sizeof(struct rte_flow_action) * (actions_n * 2 + 1)
6329 + sizeof(struct mlx5_rte_flow_action_set_tag);
6330 item_size = sizeof(struct rte_flow_item) * SAMPLE_SUFFIX_ITEM +
6331 sizeof(struct mlx5_rte_flow_item_tag) * 2;
6332 sfx_actions = mlx5_malloc(MLX5_MEM_ZERO, (act_size +
6333 item_size), 0, SOCKET_ID_ANY);
6335 return rte_flow_error_set(error, ENOMEM,
6336 RTE_FLOW_ERROR_TYPE_ACTION,
6337 NULL, "no memory to split "
6339 /* The representor_id is UINT16_MAX for uplink. */
6340 fdb_tx = (attr->transfer && priv->representor_id != UINT16_MAX);
6342 * When reg_c_preserve is set, metadata registers Cx preserve
6343 * their value even through packet duplication.
6345 add_tag = (!fdb_tx ||
6346 priv->sh->cdev->config.hca_attr.reg_c_preserve);
6348 sfx_items = (struct rte_flow_item *)((char *)sfx_actions
6350 if (modify_after_mirror)
6351 jump_table = attr->group * MLX5_FLOW_TABLE_FACTOR +
6353 pre_actions = sfx_actions + actions_n;
6354 tag_id = flow_sample_split_prep(dev, add_tag, sfx_items,
6355 actions, sfx_actions,
6356 pre_actions, actions_n,
6358 qrss_action_pos, jump_table,
6360 if (tag_id < 0 || (add_tag && !tag_id)) {
6364 if (modify_after_mirror)
6365 flow_split_info->skip_scale =
6366 1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT;
6367 /* Add the prefix subflow. */
6368 ret = flow_create_split_inner(dev, flow, &dev_flow, attr,
6370 flow_split_info, error);
6375 dev_flow->handle->split_flow_id = tag_id;
6376 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
6377 if (!modify_after_mirror) {
6378 /* Set the sfx group attr. */
6379 sample_res = (struct mlx5_flow_dv_sample_resource *)
6380 dev_flow->dv.sample_res;
6381 sfx_tbl = (struct mlx5_flow_tbl_resource *)
6382 sample_res->normal_path_tbl;
6383 sfx_tbl_data = container_of(sfx_tbl,
6384 struct mlx5_flow_tbl_data_entry,
6386 sfx_attr.group = sfx_attr.transfer ?
6387 (sfx_tbl_data->level - 1) : sfx_tbl_data->level;
6389 MLX5_ASSERT(attr->transfer);
6390 sfx_attr.group = jump_table;
6392 flow_split_info->prefix_layers =
6393 flow_get_prefix_layer_flags(dev_flow);
6395 flow_split_info->prefix_mark |= wks->mark;
6396 /* Suffix group level already be scaled with factor, set
6397 * MLX5_SCALE_FLOW_GROUP_BIT of skip_scale to 1 to avoid scale
6398 * again in translation.
6400 flow_split_info->skip_scale = 1 << MLX5_SCALE_FLOW_GROUP_BIT;
6403 /* Add the suffix subflow. */
6404 ret = flow_create_split_meter(dev, flow, &sfx_attr,
6405 sfx_items ? sfx_items : items,
6406 sfx_actions ? sfx_actions : actions,
6407 flow_split_info, error);
6410 mlx5_free(sfx_actions);
6415 * Split the flow to subflow set. The splitters might be linked
6416 * in the chain, like this:
6417 * flow_create_split_outer() calls:
6418 * flow_create_split_meter() calls:
6419 * flow_create_split_metadata(meter_subflow_0) calls:
6420 * flow_create_split_inner(metadata_subflow_0)
6421 * flow_create_split_inner(metadata_subflow_1)
6422 * flow_create_split_inner(metadata_subflow_2)
6423 * flow_create_split_metadata(meter_subflow_1) calls:
6424 * flow_create_split_inner(metadata_subflow_0)
6425 * flow_create_split_inner(metadata_subflow_1)
6426 * flow_create_split_inner(metadata_subflow_2)
6428 * This provide flexible way to add new levels of flow splitting.
6429 * The all of successfully created subflows are included to the
6430 * parent flow dev_flow list.
6433 * Pointer to Ethernet device.
6435 * Parent flow structure pointer.
6437 * Flow rule attributes.
6439 * Pattern specification (list terminated by the END pattern item).
6440 * @param[in] actions
6441 * Associated actions (list terminated by the END action).
6442 * @param[in] flow_split_info
6443 * Pointer to flow split info structure.
6445 * Perform verbose error reporting if not NULL.
6447 * 0 on success, negative value otherwise
6450 flow_create_split_outer(struct rte_eth_dev *dev,
6451 struct rte_flow *flow,
6452 const struct rte_flow_attr *attr,
6453 const struct rte_flow_item items[],
6454 const struct rte_flow_action actions[],
6455 struct mlx5_flow_split_info *flow_split_info,
6456 struct rte_flow_error *error)
6460 ret = flow_create_split_sample(dev, flow, attr, items,
6461 actions, flow_split_info, error);
6462 MLX5_ASSERT(ret <= 0);
6466 static inline struct mlx5_flow_tunnel *
6467 flow_tunnel_from_rule(const struct mlx5_flow *flow)
6469 struct mlx5_flow_tunnel *tunnel;
6471 #pragma GCC diagnostic push
6472 #pragma GCC diagnostic ignored "-Wcast-qual"
6473 tunnel = (typeof(tunnel))flow->tunnel;
6474 #pragma GCC diagnostic pop
6480 * Adjust flow RSS workspace if needed.
6483 * Pointer to thread flow work space.
6485 * Pointer to RSS descriptor.
6486 * @param[in] nrssq_num
6487 * New RSS queue number.
6490 * 0 on success, -1 otherwise and rte_errno is set.
6493 flow_rss_workspace_adjust(struct mlx5_flow_workspace *wks,
6494 struct mlx5_flow_rss_desc *rss_desc,
6497 if (likely(nrssq_num <= wks->rssq_num))
6499 rss_desc->queue = realloc(rss_desc->queue,
6500 sizeof(*rss_desc->queue) * RTE_ALIGN(nrssq_num, 2));
6501 if (!rss_desc->queue) {
6505 wks->rssq_num = RTE_ALIGN(nrssq_num, 2);
6510 * Create a flow and add it to @p list.
6513 * Pointer to Ethernet device.
6515 * Pointer to a TAILQ flow list. If this parameter NULL,
6516 * no list insertion occurred, flow is just created,
6517 * this is caller's responsibility to track the
6520 * Flow rule attributes.
6522 * Pattern specification (list terminated by the END pattern item).
6523 * @param[in] actions
6524 * Associated actions (list terminated by the END action).
6525 * @param[in] external
6526 * This flow rule is created by request external to PMD.
6528 * Perform verbose error reporting if not NULL.
6531 * A flow index on success, 0 otherwise and rte_errno is set.
6534 flow_list_create(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6535 const struct rte_flow_attr *attr,
6536 const struct rte_flow_item items[],
6537 const struct rte_flow_action original_actions[],
6538 bool external, struct rte_flow_error *error)
6540 struct mlx5_priv *priv = dev->data->dev_private;
6541 struct rte_flow *flow = NULL;
6542 struct mlx5_flow *dev_flow;
6543 const struct rte_flow_action_rss *rss = NULL;
6544 struct mlx5_translated_action_handle
6545 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6546 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6548 struct mlx5_flow_expand_rss buf;
6549 uint8_t buffer[4096];
6552 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6553 uint8_t buffer[2048];
6556 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
6557 uint8_t buffer[2048];
6558 } actions_hairpin_tx;
6560 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
6561 uint8_t buffer[2048];
6563 struct mlx5_flow_expand_rss *buf = &expand_buffer.buf;
6564 struct mlx5_flow_rss_desc *rss_desc;
6565 const struct rte_flow_action *p_actions_rx;
6569 struct rte_flow_attr attr_tx = { .priority = 0 };
6570 const struct rte_flow_action *actions;
6571 struct rte_flow_action *translated_actions = NULL;
6572 struct mlx5_flow_tunnel *tunnel;
6573 struct tunnel_default_miss_ctx default_miss_ctx = { 0, };
6574 struct mlx5_flow_workspace *wks = mlx5_flow_push_thread_workspace();
6575 struct mlx5_flow_split_info flow_split_info = {
6576 .external = !!external,
6586 rss_desc = &wks->rss_desc;
6587 ret = flow_action_handles_translate(dev, original_actions,
6590 &translated_actions, error);
6592 MLX5_ASSERT(translated_actions == NULL);
6595 actions = translated_actions ? translated_actions : original_actions;
6596 p_actions_rx = actions;
6597 hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6598 ret = flow_drv_validate(dev, attr, items, p_actions_rx,
6599 external, hairpin_flow, error);
6601 goto error_before_hairpin_split;
6602 flow = mlx5_ipool_zmalloc(priv->flows[type], &idx);
6605 goto error_before_hairpin_split;
6607 if (hairpin_flow > 0) {
6608 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
6610 goto error_before_hairpin_split;
6612 flow_hairpin_split(dev, actions, actions_rx.actions,
6613 actions_hairpin_tx.actions, items_tx.items,
6615 p_actions_rx = actions_rx.actions;
6617 flow_split_info.flow_idx = idx;
6618 flow->drv_type = flow_get_drv_type(dev, attr);
6619 MLX5_ASSERT(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
6620 flow->drv_type < MLX5_FLOW_TYPE_MAX);
6621 memset(rss_desc, 0, offsetof(struct mlx5_flow_rss_desc, queue));
6622 /* RSS Action only works on NIC RX domain */
6623 if (attr->ingress && !attr->transfer)
6624 rss = flow_get_rss_action(dev, p_actions_rx);
6626 if (flow_rss_workspace_adjust(wks, rss_desc, rss->queue_num))
6629 * The following information is required by
6630 * mlx5_flow_hashfields_adjust() in advance.
6632 rss_desc->level = rss->level;
6633 /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
6634 rss_desc->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
6636 flow->dev_handles = 0;
6637 if (rss && rss->types) {
6638 unsigned int graph_root;
6640 graph_root = find_graph_root(rss->level);
6641 ret = mlx5_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
6643 mlx5_support_expansion, graph_root);
6644 MLX5_ASSERT(ret > 0 &&
6645 (unsigned int)ret < sizeof(expand_buffer.buffer));
6646 if (rte_log_can_log(mlx5_logtype, RTE_LOG_DEBUG)) {
6647 for (i = 0; i < buf->entries; ++i)
6648 mlx5_dbg__print_pattern(buf->entry[i].pattern);
6652 buf->entry[0].pattern = (void *)(uintptr_t)items;
6654 rss_desc->shared_rss = flow_get_shared_rss_action(dev, indir_actions,
6656 for (i = 0; i < buf->entries; ++i) {
6657 /* Initialize flow split data. */
6658 flow_split_info.prefix_layers = 0;
6659 flow_split_info.prefix_mark = 0;
6660 flow_split_info.skip_scale = 0;
6662 * The splitter may create multiple dev_flows,
6663 * depending on configuration. In the simplest
6664 * case it just creates unmodified original flow.
6666 ret = flow_create_split_outer(dev, flow, attr,
6667 buf->entry[i].pattern,
6668 p_actions_rx, &flow_split_info,
6672 if (is_flow_tunnel_steer_rule(wks->flows[0].tof_type)) {
6673 ret = flow_tunnel_add_default_miss(dev, flow, attr,
6676 wks->flows[0].tunnel,
6680 mlx5_free(default_miss_ctx.queue);
6685 /* Create the tx flow. */
6687 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
6688 attr_tx.ingress = 0;
6690 dev_flow = flow_drv_prepare(dev, flow, &attr_tx, items_tx.items,
6691 actions_hairpin_tx.actions,
6695 dev_flow->flow = flow;
6696 dev_flow->external = 0;
6697 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
6698 dev_flow->handle, next);
6699 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
6701 actions_hairpin_tx.actions, error);
6706 * Update the metadata register copy table. If extensive
6707 * metadata feature is enabled and registers are supported
6708 * we might create the extra rte_flow for each unique
6709 * MARK/FLAG action ID.
6711 * The table is updated for ingress Flows only, because
6712 * the egress Flows belong to the different device and
6713 * copy table should be updated in peer NIC Rx domain.
6715 if (attr->ingress &&
6716 (external || attr->group != MLX5_FLOW_MREG_CP_TABLE_GROUP)) {
6717 ret = flow_mreg_update_copy_table(dev, flow, actions, error);
6722 * If the flow is external (from application) OR device is started,
6723 * OR mreg discover, then apply immediately.
6725 if (external || dev->data->dev_started ||
6726 (attr->group == MLX5_FLOW_MREG_CP_TABLE_GROUP &&
6727 attr->priority == MLX5_FLOW_LOWEST_PRIO_INDICATOR)) {
6728 ret = flow_drv_apply(dev, flow, error);
6733 flow_rxq_flags_set(dev, flow);
6734 rte_free(translated_actions);
6735 tunnel = flow_tunnel_from_rule(wks->flows);
6738 flow->tunnel_id = tunnel->tunnel_id;
6739 __atomic_add_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED);
6740 mlx5_free(default_miss_ctx.queue);
6742 mlx5_flow_pop_thread_workspace();
6746 ret = rte_errno; /* Save rte_errno before cleanup. */
6747 flow_mreg_del_copy_action(dev, flow);
6748 flow_drv_destroy(dev, flow);
6749 if (rss_desc->shared_rss)
6750 __atomic_sub_fetch(&((struct mlx5_shared_action_rss *)
6752 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
6753 rss_desc->shared_rss))->refcnt, 1, __ATOMIC_RELAXED);
6754 mlx5_ipool_free(priv->flows[type], idx);
6755 rte_errno = ret; /* Restore rte_errno. */
6758 mlx5_flow_pop_thread_workspace();
6759 error_before_hairpin_split:
6760 rte_free(translated_actions);
6765 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
6766 * incoming packets to table 1.
6768 * Other flow rules, requested for group n, will be created in
6769 * e-switch table n+1.
6770 * Jump action to e-switch group n will be created to group n+1.
6772 * Used when working in switchdev mode, to utilise advantages of table 1
6776 * Pointer to Ethernet device.
6779 * Pointer to flow on success, NULL otherwise and rte_errno is set.
6782 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
6784 const struct rte_flow_attr attr = {
6791 const struct rte_flow_item pattern = {
6792 .type = RTE_FLOW_ITEM_TYPE_END,
6794 struct rte_flow_action_jump jump = {
6797 const struct rte_flow_action actions[] = {
6799 .type = RTE_FLOW_ACTION_TYPE_JUMP,
6803 .type = RTE_FLOW_ACTION_TYPE_END,
6806 struct rte_flow_error error;
6808 return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
6810 actions, false, &error);
6814 * Create a dedicated flow rule on e-switch table 1, matches ESW manager
6815 * and sq number, directs all packets to peer vport.
6818 * Pointer to Ethernet device.
6823 * Flow ID on success, 0 otherwise and rte_errno is set.
6826 mlx5_flow_create_devx_sq_miss_flow(struct rte_eth_dev *dev, uint32_t txq)
6828 struct rte_flow_attr attr = {
6830 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
6835 struct rte_flow_item_port_id port_spec = {
6836 .id = MLX5_PORT_ESW_MGR,
6838 struct mlx5_rte_flow_item_tx_queue txq_spec = {
6841 struct rte_flow_item pattern[] = {
6843 .type = RTE_FLOW_ITEM_TYPE_PORT_ID,
6847 .type = (enum rte_flow_item_type)
6848 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
6852 .type = RTE_FLOW_ITEM_TYPE_END,
6855 struct rte_flow_action_jump jump = {
6858 struct rte_flow_action_port_id port = {
6859 .id = dev->data->port_id,
6861 struct rte_flow_action actions[] = {
6863 .type = RTE_FLOW_ACTION_TYPE_JUMP,
6867 .type = RTE_FLOW_ACTION_TYPE_END,
6870 struct rte_flow_error error;
6873 * Creates group 0, highest priority jump flow.
6874 * Matches txq to bypass kernel packets.
6876 if (flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern, actions,
6877 false, &error) == 0)
6879 /* Create group 1, lowest priority redirect flow for txq. */
6881 actions[0].conf = &port;
6882 actions[0].type = RTE_FLOW_ACTION_TYPE_PORT_ID;
6883 return flow_list_create(dev, MLX5_FLOW_TYPE_CTL, &attr, pattern,
6884 actions, false, &error);
6888 * Validate a flow supported by the NIC.
6890 * @see rte_flow_validate()
6894 mlx5_flow_validate(struct rte_eth_dev *dev,
6895 const struct rte_flow_attr *attr,
6896 const struct rte_flow_item items[],
6897 const struct rte_flow_action original_actions[],
6898 struct rte_flow_error *error)
6901 struct mlx5_translated_action_handle
6902 indir_actions[MLX5_MAX_INDIRECT_ACTIONS];
6903 int indir_actions_n = MLX5_MAX_INDIRECT_ACTIONS;
6904 const struct rte_flow_action *actions;
6905 struct rte_flow_action *translated_actions = NULL;
6906 int ret = flow_action_handles_translate(dev, original_actions,
6909 &translated_actions, error);
6913 actions = translated_actions ? translated_actions : original_actions;
6914 hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
6915 ret = flow_drv_validate(dev, attr, items, actions,
6916 true, hairpin_flow, error);
6917 rte_free(translated_actions);
6924 * @see rte_flow_create()
6928 mlx5_flow_create(struct rte_eth_dev *dev,
6929 const struct rte_flow_attr *attr,
6930 const struct rte_flow_item items[],
6931 const struct rte_flow_action actions[],
6932 struct rte_flow_error *error)
6934 struct mlx5_priv *priv = dev->data->dev_private;
6936 if (priv->sh->config.dv_flow_en == 2) {
6937 rte_flow_error_set(error, ENOTSUP,
6938 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6940 "Flow non-Q creation not supported");
6944 * If the device is not started yet, it is not allowed to created a
6945 * flow from application. PMD default flows and traffic control flows
6948 if (unlikely(!dev->data->dev_started)) {
6949 DRV_LOG(DEBUG, "port %u is not started when "
6950 "inserting a flow", dev->data->port_id);
6951 rte_flow_error_set(error, ENODEV,
6952 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6954 "port not started");
6958 return (void *)(uintptr_t)flow_list_create(dev, MLX5_FLOW_TYPE_GEN,
6959 attr, items, actions,
6964 * Destroy a flow in a list.
6967 * Pointer to Ethernet device.
6968 * @param[in] flow_idx
6969 * Index of flow to destroy.
6972 flow_list_destroy(struct rte_eth_dev *dev, enum mlx5_flow_type type,
6975 struct mlx5_priv *priv = dev->data->dev_private;
6976 struct rte_flow *flow = mlx5_ipool_get(priv->flows[type], flow_idx);
6980 MLX5_ASSERT(flow->type == type);
6982 * Update RX queue flags only if port is started, otherwise it is
6985 if (dev->data->dev_started)
6986 flow_rxq_flags_trim(dev, flow);
6987 flow_drv_destroy(dev, flow);
6989 struct mlx5_flow_tunnel *tunnel;
6991 tunnel = mlx5_find_tunnel_id(dev, flow->tunnel_id);
6993 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
6994 mlx5_flow_tunnel_free(dev, tunnel);
6996 flow_mreg_del_copy_action(dev, flow);
6997 mlx5_ipool_free(priv->flows[type], flow_idx);
7001 * Destroy all flows.
7004 * Pointer to Ethernet device.
7006 * Flow type to be flushed.
7008 * If flushing is called actively.
7011 mlx5_flow_list_flush(struct rte_eth_dev *dev, enum mlx5_flow_type type,
7014 struct mlx5_priv *priv = dev->data->dev_private;
7015 uint32_t num_flushed = 0, fidx = 1;
7016 struct rte_flow *flow;
7018 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
7019 if (priv->sh->config.dv_flow_en == 2 &&
7020 type == MLX5_FLOW_TYPE_GEN) {
7021 flow_hw_q_flow_flush(dev, NULL);
7026 MLX5_IPOOL_FOREACH(priv->flows[type], fidx, flow) {
7027 flow_list_destroy(dev, type, fidx);
7031 DRV_LOG(INFO, "port %u: %u flows flushed before stopping",
7032 dev->data->port_id, num_flushed);
7037 * Stop all default actions for flows.
7040 * Pointer to Ethernet device.
7043 mlx5_flow_stop_default(struct rte_eth_dev *dev)
7045 flow_mreg_del_default_copy_action(dev);
7046 flow_rxq_flags_clear(dev);
7050 * Start all default actions for flows.
7053 * Pointer to Ethernet device.
7055 * 0 on success, a negative errno value otherwise and rte_errno is set.
7058 mlx5_flow_start_default(struct rte_eth_dev *dev)
7060 struct rte_flow_error error;
7062 /* Make sure default copy action (reg_c[0] -> reg_b) is created. */
7063 return flow_mreg_add_default_copy_action(dev, &error);
7067 * Release key of thread specific flow workspace data.
7070 flow_release_workspace(void *data)
7072 struct mlx5_flow_workspace *wks = data;
7073 struct mlx5_flow_workspace *next;
7077 free(wks->rss_desc.queue);
7084 * Get thread specific current flow workspace.
7086 * @return pointer to thread specific flow workspace data, NULL on error.
7088 struct mlx5_flow_workspace*
7089 mlx5_flow_get_thread_workspace(void)
7091 struct mlx5_flow_workspace *data;
7093 data = mlx5_flow_os_get_specific_workspace();
7094 MLX5_ASSERT(data && data->inuse);
7095 if (!data || !data->inuse)
7096 DRV_LOG(ERR, "flow workspace not initialized.");
7101 * Allocate and init new flow workspace.
7103 * @return pointer to flow workspace data, NULL on error.
7105 static struct mlx5_flow_workspace*
7106 flow_alloc_thread_workspace(void)
7108 struct mlx5_flow_workspace *data = calloc(1, sizeof(*data));
7111 DRV_LOG(ERR, "Failed to allocate flow workspace "
7115 data->rss_desc.queue = calloc(1,
7116 sizeof(uint16_t) * MLX5_RSSQ_DEFAULT_NUM);
7117 if (!data->rss_desc.queue)
7119 data->rssq_num = MLX5_RSSQ_DEFAULT_NUM;
7122 free(data->rss_desc.queue);
7128 * Get new thread specific flow workspace.
7130 * If current workspace inuse, create new one and set as current.
7132 * @return pointer to thread specific flow workspace data, NULL on error.
7134 static struct mlx5_flow_workspace*
7135 mlx5_flow_push_thread_workspace(void)
7137 struct mlx5_flow_workspace *curr;
7138 struct mlx5_flow_workspace *data;
7140 curr = mlx5_flow_os_get_specific_workspace();
7142 data = flow_alloc_thread_workspace();
7145 } else if (!curr->inuse) {
7147 } else if (curr->next) {
7150 data = flow_alloc_thread_workspace();
7158 /* Set as current workspace */
7159 if (mlx5_flow_os_set_specific_workspace(data))
7160 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
7165 * Close current thread specific flow workspace.
7167 * If previous workspace available, set it as current.
7169 * @return pointer to thread specific flow workspace data, NULL on error.
7172 mlx5_flow_pop_thread_workspace(void)
7174 struct mlx5_flow_workspace *data = mlx5_flow_get_thread_workspace();
7179 DRV_LOG(ERR, "Failed to close unused flow workspace.");
7185 if (mlx5_flow_os_set_specific_workspace(data->prev))
7186 DRV_LOG(ERR, "Failed to set flow workspace to thread.");
7190 * Verify the flow list is empty
7193 * Pointer to Ethernet device.
7195 * @return the number of flows not released.
7198 mlx5_flow_verify(struct rte_eth_dev *dev __rte_unused)
7200 struct mlx5_priv *priv = dev->data->dev_private;
7201 struct rte_flow *flow;
7205 for (i = 0; i < MLX5_FLOW_TYPE_MAXI; i++) {
7206 MLX5_IPOOL_FOREACH(priv->flows[i], idx, flow) {
7207 DRV_LOG(DEBUG, "port %u flow %p still referenced",
7208 dev->data->port_id, (void *)flow);
7216 * Enable default hairpin egress flow.
7219 * Pointer to Ethernet device.
7224 * 0 on success, a negative errno value otherwise and rte_errno is set.
7227 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
7230 const struct rte_flow_attr attr = {
7234 struct mlx5_rte_flow_item_tx_queue queue_spec = {
7237 struct mlx5_rte_flow_item_tx_queue queue_mask = {
7238 .queue = UINT32_MAX,
7240 struct rte_flow_item items[] = {
7242 .type = (enum rte_flow_item_type)
7243 MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
7244 .spec = &queue_spec,
7246 .mask = &queue_mask,
7249 .type = RTE_FLOW_ITEM_TYPE_END,
7252 struct rte_flow_action_jump jump = {
7253 .group = MLX5_HAIRPIN_TX_TABLE,
7255 struct rte_flow_action actions[2];
7257 struct rte_flow_error error;
7259 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
7260 actions[0].conf = &jump;
7261 actions[1].type = RTE_FLOW_ACTION_TYPE_END;
7262 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7263 &attr, items, actions, false, &error);
7266 "Failed to create ctrl flow: rte_errno(%d),"
7267 " type(%d), message(%s)",
7268 rte_errno, error.type,
7269 error.message ? error.message : " (no stated reason)");
7276 * Enable a control flow configured from the control plane.
7279 * Pointer to Ethernet device.
7281 * An Ethernet flow spec to apply.
7283 * An Ethernet flow mask to apply.
7285 * A VLAN flow spec to apply.
7287 * A VLAN flow mask to apply.
7290 * 0 on success, a negative errno value otherwise and rte_errno is set.
7293 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
7294 struct rte_flow_item_eth *eth_spec,
7295 struct rte_flow_item_eth *eth_mask,
7296 struct rte_flow_item_vlan *vlan_spec,
7297 struct rte_flow_item_vlan *vlan_mask)
7299 struct mlx5_priv *priv = dev->data->dev_private;
7300 const struct rte_flow_attr attr = {
7302 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
7304 struct rte_flow_item items[] = {
7306 .type = RTE_FLOW_ITEM_TYPE_ETH,
7312 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
7313 RTE_FLOW_ITEM_TYPE_END,
7319 .type = RTE_FLOW_ITEM_TYPE_END,
7322 uint16_t queue[priv->reta_idx_n];
7323 struct rte_flow_action_rss action_rss = {
7324 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
7326 .types = priv->rss_conf.rss_hf,
7327 .key_len = priv->rss_conf.rss_key_len,
7328 .queue_num = priv->reta_idx_n,
7329 .key = priv->rss_conf.rss_key,
7332 struct rte_flow_action actions[] = {
7334 .type = RTE_FLOW_ACTION_TYPE_RSS,
7335 .conf = &action_rss,
7338 .type = RTE_FLOW_ACTION_TYPE_END,
7342 struct rte_flow_error error;
7345 if (!priv->reta_idx_n || !priv->rxqs_n) {
7348 if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG))
7349 action_rss.types = 0;
7350 for (i = 0; i != priv->reta_idx_n; ++i)
7351 queue[i] = (*priv->reta_idx)[i];
7352 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7353 &attr, items, actions, false, &error);
7360 * Enable a flow control configured from the control plane.
7363 * Pointer to Ethernet device.
7365 * An Ethernet flow spec to apply.
7367 * An Ethernet flow mask to apply.
7370 * 0 on success, a negative errno value otherwise and rte_errno is set.
7373 mlx5_ctrl_flow(struct rte_eth_dev *dev,
7374 struct rte_flow_item_eth *eth_spec,
7375 struct rte_flow_item_eth *eth_mask)
7377 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
7381 * Create default miss flow rule matching lacp traffic
7384 * Pointer to Ethernet device.
7386 * An Ethernet flow spec to apply.
7389 * 0 on success, a negative errno value otherwise and rte_errno is set.
7392 mlx5_flow_lacp_miss(struct rte_eth_dev *dev)
7395 * The LACP matching is done by only using ether type since using
7396 * a multicast dst mac causes kernel to give low priority to this flow.
7398 static const struct rte_flow_item_eth lacp_spec = {
7399 .type = RTE_BE16(0x8809),
7401 static const struct rte_flow_item_eth lacp_mask = {
7404 const struct rte_flow_attr attr = {
7407 struct rte_flow_item items[] = {
7409 .type = RTE_FLOW_ITEM_TYPE_ETH,
7414 .type = RTE_FLOW_ITEM_TYPE_END,
7417 struct rte_flow_action actions[] = {
7419 .type = (enum rte_flow_action_type)
7420 MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS,
7423 .type = RTE_FLOW_ACTION_TYPE_END,
7426 struct rte_flow_error error;
7427 uint32_t flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_CTL,
7428 &attr, items, actions,
7439 * @see rte_flow_destroy()
7443 mlx5_flow_destroy(struct rte_eth_dev *dev,
7444 struct rte_flow *flow,
7445 struct rte_flow_error *error __rte_unused)
7447 struct mlx5_priv *priv = dev->data->dev_private;
7449 if (priv->sh->config.dv_flow_en == 2)
7450 return rte_flow_error_set(error, ENOTSUP,
7451 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7453 "Flow non-Q destruction not supported");
7454 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN,
7455 (uintptr_t)(void *)flow);
7460 * Destroy all flows.
7462 * @see rte_flow_flush()
7466 mlx5_flow_flush(struct rte_eth_dev *dev,
7467 struct rte_flow_error *error __rte_unused)
7469 mlx5_flow_list_flush(dev, MLX5_FLOW_TYPE_GEN, false);
7476 * @see rte_flow_isolate()
7480 mlx5_flow_isolate(struct rte_eth_dev *dev,
7482 struct rte_flow_error *error)
7484 struct mlx5_priv *priv = dev->data->dev_private;
7486 if (dev->data->dev_started) {
7487 rte_flow_error_set(error, EBUSY,
7488 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7490 "port must be stopped first");
7493 priv->isolated = !!enable;
7495 dev->dev_ops = &mlx5_dev_ops_isolate;
7497 dev->dev_ops = &mlx5_dev_ops;
7499 dev->rx_descriptor_status = mlx5_rx_descriptor_status;
7500 dev->tx_descriptor_status = mlx5_tx_descriptor_status;
7508 * @see rte_flow_query()
7512 flow_drv_query(struct rte_eth_dev *dev,
7514 const struct rte_flow_action *actions,
7516 struct rte_flow_error *error)
7518 struct mlx5_priv *priv = dev->data->dev_private;
7519 const struct mlx5_flow_driver_ops *fops;
7520 struct rte_flow *flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
7522 enum mlx5_flow_drv_type ftype;
7525 return rte_flow_error_set(error, ENOENT,
7526 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7528 "invalid flow handle");
7530 ftype = flow->drv_type;
7531 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
7532 fops = flow_get_drv_ops(ftype);
7534 return fops->query(dev, flow, actions, data, error);
7540 * @see rte_flow_query()
7544 mlx5_flow_query(struct rte_eth_dev *dev,
7545 struct rte_flow *flow,
7546 const struct rte_flow_action *actions,
7548 struct rte_flow_error *error)
7551 struct mlx5_priv *priv = dev->data->dev_private;
7553 if (priv->sh->config.dv_flow_en == 2)
7554 return rte_flow_error_set(error, ENOTSUP,
7555 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7557 "Flow non-Q query not supported");
7558 ret = flow_drv_query(dev, (uintptr_t)(void *)flow, actions, data,
7566 * Get rte_flow callbacks.
7569 * Pointer to Ethernet device structure.
7571 * Pointer to operation-specific structure.
7576 mlx5_flow_ops_get(struct rte_eth_dev *dev __rte_unused,
7577 const struct rte_flow_ops **ops)
7579 *ops = &mlx5_flow_ops;
7584 * Validate meter policy actions.
7585 * Dispatcher for action type specific validation.
7588 * Pointer to the Ethernet device structure.
7590 * The meter policy action object to validate.
7592 * Attributes of flow to determine steering domain.
7593 * @param[out] is_rss
7595 * @param[out] domain_bitmap
7597 * @param[out] is_def_policy
7598 * Is default policy or not.
7600 * Perform verbose error reporting if not NULL. Initialized in case of
7604 * 0 on success, otherwise negative errno value.
7607 mlx5_flow_validate_mtr_acts(struct rte_eth_dev *dev,
7608 const struct rte_flow_action *actions[RTE_COLORS],
7609 struct rte_flow_attr *attr,
7611 uint8_t *domain_bitmap,
7612 uint8_t *policy_mode,
7613 struct rte_mtr_error *error)
7615 const struct mlx5_flow_driver_ops *fops;
7617 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7618 return fops->validate_mtr_acts(dev, actions, attr, is_rss,
7619 domain_bitmap, policy_mode, error);
7623 * Destroy the meter table set.
7626 * Pointer to Ethernet device.
7627 * @param[in] mtr_policy
7628 * Meter policy struct.
7631 mlx5_flow_destroy_mtr_acts(struct rte_eth_dev *dev,
7632 struct mlx5_flow_meter_policy *mtr_policy)
7634 const struct mlx5_flow_driver_ops *fops;
7636 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7637 fops->destroy_mtr_acts(dev, mtr_policy);
7641 * Create policy action, lock free,
7642 * (mutex should be acquired by caller).
7643 * Dispatcher for action type specific call.
7646 * Pointer to the Ethernet device structure.
7647 * @param[in] mtr_policy
7648 * Meter policy struct.
7650 * Action specification used to create meter actions.
7652 * Perform verbose error reporting if not NULL. Initialized in case of
7656 * 0 on success, otherwise negative errno value.
7659 mlx5_flow_create_mtr_acts(struct rte_eth_dev *dev,
7660 struct mlx5_flow_meter_policy *mtr_policy,
7661 const struct rte_flow_action *actions[RTE_COLORS],
7662 struct rte_mtr_error *error)
7664 const struct mlx5_flow_driver_ops *fops;
7666 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7667 return fops->create_mtr_acts(dev, mtr_policy, actions, error);
7671 * Create policy rules, lock free,
7672 * (mutex should be acquired by caller).
7673 * Dispatcher for action type specific call.
7676 * Pointer to the Ethernet device structure.
7677 * @param[in] mtr_policy
7678 * Meter policy struct.
7681 * 0 on success, -1 otherwise.
7684 mlx5_flow_create_policy_rules(struct rte_eth_dev *dev,
7685 struct mlx5_flow_meter_policy *mtr_policy)
7687 const struct mlx5_flow_driver_ops *fops;
7689 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7690 return fops->create_policy_rules(dev, mtr_policy);
7694 * Destroy policy rules, lock free,
7695 * (mutex should be acquired by caller).
7696 * Dispatcher for action type specific call.
7699 * Pointer to the Ethernet device structure.
7700 * @param[in] mtr_policy
7701 * Meter policy struct.
7704 mlx5_flow_destroy_policy_rules(struct rte_eth_dev *dev,
7705 struct mlx5_flow_meter_policy *mtr_policy)
7707 const struct mlx5_flow_driver_ops *fops;
7709 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7710 fops->destroy_policy_rules(dev, mtr_policy);
7714 * Destroy the default policy table set.
7717 * Pointer to Ethernet device.
7720 mlx5_flow_destroy_def_policy(struct rte_eth_dev *dev)
7722 const struct mlx5_flow_driver_ops *fops;
7724 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7725 fops->destroy_def_policy(dev);
7729 * Destroy the default policy table set.
7732 * Pointer to Ethernet device.
7735 * 0 on success, -1 otherwise.
7738 mlx5_flow_create_def_policy(struct rte_eth_dev *dev)
7740 const struct mlx5_flow_driver_ops *fops;
7742 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7743 return fops->create_def_policy(dev);
7747 * Create the needed meter and suffix tables.
7750 * Pointer to Ethernet device.
7753 * 0 on success, -1 otherwise.
7756 mlx5_flow_create_mtr_tbls(struct rte_eth_dev *dev,
7757 struct mlx5_flow_meter_info *fm,
7759 uint8_t domain_bitmap)
7761 const struct mlx5_flow_driver_ops *fops;
7763 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7764 return fops->create_mtr_tbls(dev, fm, mtr_idx, domain_bitmap);
7768 * Destroy the meter table set.
7771 * Pointer to Ethernet device.
7773 * Pointer to the meter table set.
7776 mlx5_flow_destroy_mtr_tbls(struct rte_eth_dev *dev,
7777 struct mlx5_flow_meter_info *fm)
7779 const struct mlx5_flow_driver_ops *fops;
7781 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7782 fops->destroy_mtr_tbls(dev, fm);
7786 * Destroy the global meter drop table.
7789 * Pointer to Ethernet device.
7792 mlx5_flow_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
7794 const struct mlx5_flow_driver_ops *fops;
7796 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7797 fops->destroy_mtr_drop_tbls(dev);
7801 * Destroy the sub policy table with RX queue.
7804 * Pointer to Ethernet device.
7805 * @param[in] mtr_policy
7806 * Pointer to meter policy table.
7809 mlx5_flow_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
7810 struct mlx5_flow_meter_policy *mtr_policy)
7812 const struct mlx5_flow_driver_ops *fops;
7814 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7815 fops->destroy_sub_policy_with_rxq(dev, mtr_policy);
7819 * Allocate the needed aso flow meter id.
7822 * Pointer to Ethernet device.
7825 * Index to aso flow meter on success, NULL otherwise.
7828 mlx5_flow_mtr_alloc(struct rte_eth_dev *dev)
7830 const struct mlx5_flow_driver_ops *fops;
7832 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7833 return fops->create_meter(dev);
7837 * Free the aso flow meter id.
7840 * Pointer to Ethernet device.
7841 * @param[in] mtr_idx
7842 * Index to aso flow meter to be free.
7848 mlx5_flow_mtr_free(struct rte_eth_dev *dev, uint32_t mtr_idx)
7850 const struct mlx5_flow_driver_ops *fops;
7852 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7853 fops->free_meter(dev, mtr_idx);
7857 * Allocate a counter.
7860 * Pointer to Ethernet device structure.
7863 * Index to allocated counter on success, 0 otherwise.
7866 mlx5_counter_alloc(struct rte_eth_dev *dev)
7868 const struct mlx5_flow_driver_ops *fops;
7869 struct rte_flow_attr attr = { .transfer = 0 };
7871 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7872 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7873 return fops->counter_alloc(dev);
7876 "port %u counter allocate is not supported.",
7877 dev->data->port_id);
7885 * Pointer to Ethernet device structure.
7887 * Index to counter to be free.
7890 mlx5_counter_free(struct rte_eth_dev *dev, uint32_t cnt)
7892 const struct mlx5_flow_driver_ops *fops;
7893 struct rte_flow_attr attr = { .transfer = 0 };
7895 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7896 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7897 fops->counter_free(dev, cnt);
7901 "port %u counter free is not supported.",
7902 dev->data->port_id);
7906 * Query counter statistics.
7909 * Pointer to Ethernet device structure.
7911 * Index to counter to query.
7913 * Set to clear counter statistics.
7915 * The counter hits packets number to save.
7917 * The counter hits bytes number to save.
7920 * 0 on success, a negative errno value otherwise.
7923 mlx5_counter_query(struct rte_eth_dev *dev, uint32_t cnt,
7924 bool clear, uint64_t *pkts, uint64_t *bytes, void **action)
7926 const struct mlx5_flow_driver_ops *fops;
7927 struct rte_flow_attr attr = { .transfer = 0 };
7929 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
7930 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
7931 return fops->counter_query(dev, cnt, clear, pkts,
7935 "port %u counter query is not supported.",
7936 dev->data->port_id);
7941 * Get information about HWS pre-configurable resources.
7944 * Pointer to the rte_eth_dev structure.
7945 * @param[out] port_info
7946 * Pointer to port information.
7947 * @param[out] queue_info
7948 * Pointer to queue information.
7950 * Pointer to error structure.
7953 * 0 on success, a negative errno value otherwise and rte_errno is set.
7956 mlx5_flow_info_get(struct rte_eth_dev *dev,
7957 struct rte_flow_port_info *port_info,
7958 struct rte_flow_queue_info *queue_info,
7959 struct rte_flow_error *error)
7961 const struct mlx5_flow_driver_ops *fops;
7963 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
7964 return rte_flow_error_set(error, ENOTSUP,
7965 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7967 "info get with incorrect steering mode");
7968 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
7969 return fops->info_get(dev, port_info, queue_info, error);
7973 * Configure port HWS resources.
7976 * Pointer to the rte_eth_dev structure.
7977 * @param[in] port_attr
7978 * Port configuration attributes.
7979 * @param[in] nb_queue
7981 * @param[in] queue_attr
7982 * Array that holds attributes for each flow queue.
7984 * Pointer to error structure.
7987 * 0 on success, a negative errno value otherwise and rte_errno is set.
7990 mlx5_flow_port_configure(struct rte_eth_dev *dev,
7991 const struct rte_flow_port_attr *port_attr,
7993 const struct rte_flow_queue_attr *queue_attr[],
7994 struct rte_flow_error *error)
7996 const struct mlx5_flow_driver_ops *fops;
7998 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
7999 return rte_flow_error_set(error, ENOTSUP,
8000 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8002 "port configure with incorrect steering mode");
8003 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8004 return fops->configure(dev, port_attr, nb_queue, queue_attr, error);
8008 * Create flow item template.
8011 * Pointer to the rte_eth_dev structure.
8013 * Pointer to the item template attributes.
8015 * The template item pattern.
8017 * Pointer to error structure.
8020 * 0 on success, a negative errno value otherwise and rte_errno is set.
8022 static struct rte_flow_pattern_template *
8023 mlx5_flow_pattern_template_create(struct rte_eth_dev *dev,
8024 const struct rte_flow_pattern_template_attr *attr,
8025 const struct rte_flow_item items[],
8026 struct rte_flow_error *error)
8028 const struct mlx5_flow_driver_ops *fops;
8030 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW) {
8031 rte_flow_error_set(error, ENOTSUP,
8032 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8034 "pattern create with incorrect steering mode");
8037 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8038 return fops->pattern_template_create(dev, attr, items, error);
8042 * Destroy flow item template.
8045 * Pointer to the rte_eth_dev structure.
8046 * @param[in] template
8047 * Pointer to the item template to be destroyed.
8049 * Pointer to error structure.
8052 * 0 on success, a negative errno value otherwise and rte_errno is set.
8055 mlx5_flow_pattern_template_destroy(struct rte_eth_dev *dev,
8056 struct rte_flow_pattern_template *template,
8057 struct rte_flow_error *error)
8059 const struct mlx5_flow_driver_ops *fops;
8061 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8062 return rte_flow_error_set(error, ENOTSUP,
8063 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8065 "pattern destroy with incorrect steering mode");
8066 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8067 return fops->pattern_template_destroy(dev, template, error);
8071 * Create flow item template.
8074 * Pointer to the rte_eth_dev structure.
8076 * Pointer to the action template attributes.
8077 * @param[in] actions
8078 * Associated actions (list terminated by the END action).
8080 * List of actions that marks which of the action's member is constant.
8082 * Pointer to error structure.
8085 * 0 on success, a negative errno value otherwise and rte_errno is set.
8087 static struct rte_flow_actions_template *
8088 mlx5_flow_actions_template_create(struct rte_eth_dev *dev,
8089 const struct rte_flow_actions_template_attr *attr,
8090 const struct rte_flow_action actions[],
8091 const struct rte_flow_action masks[],
8092 struct rte_flow_error *error)
8094 const struct mlx5_flow_driver_ops *fops;
8096 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW) {
8097 rte_flow_error_set(error, ENOTSUP,
8098 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8100 "action create with incorrect steering mode");
8103 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8104 return fops->actions_template_create(dev, attr, actions, masks, error);
8108 * Destroy flow action template.
8111 * Pointer to the rte_eth_dev structure.
8112 * @param[in] template
8113 * Pointer to the action template to be destroyed.
8115 * Pointer to error structure.
8118 * 0 on success, a negative errno value otherwise and rte_errno is set.
8121 mlx5_flow_actions_template_destroy(struct rte_eth_dev *dev,
8122 struct rte_flow_actions_template *template,
8123 struct rte_flow_error *error)
8125 const struct mlx5_flow_driver_ops *fops;
8127 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8128 return rte_flow_error_set(error, ENOTSUP,
8129 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8131 "action destroy with incorrect steering mode");
8132 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8133 return fops->actions_template_destroy(dev, template, error);
8137 * Create flow table.
8140 * Pointer to the rte_eth_dev structure.
8142 * Pointer to the table attributes.
8143 * @param[in] item_templates
8144 * Item template array to be binded to the table.
8145 * @param[in] nb_item_templates
8146 * Number of item template.
8147 * @param[in] action_templates
8148 * Action template array to be binded to the table.
8149 * @param[in] nb_action_templates
8150 * Number of action template.
8152 * Pointer to error structure.
8155 * Table on success, NULL otherwise and rte_errno is set.
8157 static struct rte_flow_template_table *
8158 mlx5_flow_table_create(struct rte_eth_dev *dev,
8159 const struct rte_flow_template_table_attr *attr,
8160 struct rte_flow_pattern_template *item_templates[],
8161 uint8_t nb_item_templates,
8162 struct rte_flow_actions_template *action_templates[],
8163 uint8_t nb_action_templates,
8164 struct rte_flow_error *error)
8166 const struct mlx5_flow_driver_ops *fops;
8168 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW) {
8169 rte_flow_error_set(error, ENOTSUP,
8170 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8172 "table create with incorrect steering mode");
8175 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8176 return fops->template_table_create(dev,
8181 nb_action_templates,
8186 * PMD destroy flow table.
8189 * Pointer to the rte_eth_dev structure.
8191 * Pointer to the table to be destroyed.
8193 * Pointer to error structure.
8196 * 0 on success, a negative errno value otherwise and rte_errno is set.
8199 mlx5_flow_table_destroy(struct rte_eth_dev *dev,
8200 struct rte_flow_template_table *table,
8201 struct rte_flow_error *error)
8203 const struct mlx5_flow_driver_ops *fops;
8205 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8206 return rte_flow_error_set(error, ENOTSUP,
8207 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8209 "table destroy with incorrect steering mode");
8210 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8211 return fops->template_table_destroy(dev, table, error);
8215 * Enqueue flow creation.
8218 * Pointer to the rte_eth_dev structure.
8219 * @param[in] queue_id
8220 * The queue to create the flow.
8222 * Pointer to the flow operation attributes.
8224 * Items with flow spec value.
8225 * @param[in] pattern_template_index
8226 * The item pattern flow follows from the table.
8227 * @param[in] actions
8228 * Action with flow spec value.
8229 * @param[in] action_template_index
8230 * The action pattern flow follows from the table.
8231 * @param[in] user_data
8232 * Pointer to the user_data.
8234 * Pointer to error structure.
8237 * Flow pointer on success, NULL otherwise and rte_errno is set.
8239 static struct rte_flow *
8240 mlx5_flow_async_flow_create(struct rte_eth_dev *dev,
8242 const struct rte_flow_op_attr *attr,
8243 struct rte_flow_template_table *table,
8244 const struct rte_flow_item items[],
8245 uint8_t pattern_template_index,
8246 const struct rte_flow_action actions[],
8247 uint8_t action_template_index,
8249 struct rte_flow_error *error)
8251 const struct mlx5_flow_driver_ops *fops;
8253 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW) {
8254 rte_flow_error_set(error, ENOTSUP,
8255 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8257 "flow_q create with incorrect steering mode");
8260 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8261 return fops->async_flow_create(dev, queue_id, attr, table,
8262 items, pattern_template_index,
8263 actions, action_template_index,
8268 * Enqueue flow destruction.
8271 * Pointer to the rte_eth_dev structure.
8273 * The queue to destroy the flow.
8275 * Pointer to the flow operation attributes.
8277 * Pointer to the flow to be destroyed.
8278 * @param[in] user_data
8279 * Pointer to the user_data.
8281 * Pointer to error structure.
8284 * 0 on success, negative value otherwise and rte_errno is set.
8287 mlx5_flow_async_flow_destroy(struct rte_eth_dev *dev,
8289 const struct rte_flow_op_attr *attr,
8290 struct rte_flow *flow,
8292 struct rte_flow_error *error)
8294 const struct mlx5_flow_driver_ops *fops;
8296 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8297 return rte_flow_error_set(error, ENOTSUP,
8298 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8300 "flow_q destroy with incorrect steering mode");
8301 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8302 return fops->async_flow_destroy(dev, queue, attr, flow,
8307 * Pull the enqueued flows.
8310 * Pointer to the rte_eth_dev structure.
8312 * The queue to pull the result.
8313 * @param[in/out] res
8314 * Array to save the results.
8316 * Available result with the array.
8318 * Pointer to error structure.
8321 * Result number on success, negative value otherwise and rte_errno is set.
8324 mlx5_flow_pull(struct rte_eth_dev *dev,
8326 struct rte_flow_op_result res[],
8328 struct rte_flow_error *error)
8330 const struct mlx5_flow_driver_ops *fops;
8332 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8333 return rte_flow_error_set(error, ENOTSUP,
8334 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8336 "flow_q pull with incorrect steering mode");
8337 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8338 return fops->pull(dev, queue, res, n_res, error);
8342 * Push the enqueued flows.
8345 * Pointer to the rte_eth_dev structure.
8347 * The queue to push the flows.
8349 * Pointer to error structure.
8352 * 0 on success, negative value otherwise and rte_errno is set.
8355 mlx5_flow_push(struct rte_eth_dev *dev,
8357 struct rte_flow_error *error)
8359 const struct mlx5_flow_driver_ops *fops;
8361 if (flow_get_drv_type(dev, NULL) != MLX5_FLOW_TYPE_HW)
8362 return rte_flow_error_set(error, ENOTSUP,
8363 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8365 "flow_q push with incorrect steering mode");
8366 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_HW);
8367 return fops->push(dev, queue, error);
8371 * Allocate a new memory for the counter values wrapped by all the needed
8375 * Pointer to mlx5_dev_ctx_shared object.
8378 * 0 on success, a negative errno value otherwise.
8381 mlx5_flow_create_counter_stat_mem_mng(struct mlx5_dev_ctx_shared *sh)
8383 struct mlx5_counter_stats_mem_mng *mem_mng;
8384 volatile struct flow_counter_stats *raw_data;
8385 int raws_n = MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES;
8386 int size = (sizeof(struct flow_counter_stats) *
8387 MLX5_COUNTERS_PER_POOL +
8388 sizeof(struct mlx5_counter_stats_raw)) * raws_n +
8389 sizeof(struct mlx5_counter_stats_mem_mng);
8390 size_t pgsize = rte_mem_page_size();
8395 if (pgsize == (size_t)-1) {
8396 DRV_LOG(ERR, "Failed to get mem page size");
8400 mem = mlx5_malloc(MLX5_MEM_ZERO, size, pgsize, SOCKET_ID_ANY);
8405 mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
8406 size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
8407 ret = mlx5_os_wrapped_mkey_create(sh->cdev->ctx, sh->cdev->pd,
8408 sh->cdev->pdn, mem, size,
8415 mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
8416 raw_data = (volatile struct flow_counter_stats *)mem;
8417 for (i = 0; i < raws_n; ++i) {
8418 mem_mng->raws[i].mem_mng = mem_mng;
8419 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
8421 for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
8422 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws,
8423 mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE + i,
8425 LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
8426 sh->cmng.mem_mng = mem_mng;
8431 * Set the statistic memory to the new counter pool.
8434 * Pointer to mlx5_dev_ctx_shared object.
8436 * Pointer to the pool to set the statistic memory.
8439 * 0 on success, a negative errno value otherwise.
8442 mlx5_flow_set_counter_stat_mem(struct mlx5_dev_ctx_shared *sh,
8443 struct mlx5_flow_counter_pool *pool)
8445 struct mlx5_flow_counter_mng *cmng = &sh->cmng;
8446 /* Resize statistic memory once used out. */
8447 if (!(pool->index % MLX5_CNT_CONTAINER_RESIZE) &&
8448 mlx5_flow_create_counter_stat_mem_mng(sh)) {
8449 DRV_LOG(ERR, "Cannot resize counter stat mem.");
8452 rte_spinlock_lock(&pool->sl);
8453 pool->raw = cmng->mem_mng->raws + pool->index %
8454 MLX5_CNT_CONTAINER_RESIZE;
8455 rte_spinlock_unlock(&pool->sl);
8456 pool->raw_hw = NULL;
8460 #define MLX5_POOL_QUERY_FREQ_US 1000000
8463 * Set the periodic procedure for triggering asynchronous batch queries for all
8464 * the counter pools.
8467 * Pointer to mlx5_dev_ctx_shared object.
8470 mlx5_set_query_alarm(struct mlx5_dev_ctx_shared *sh)
8472 uint32_t pools_n, us;
8474 pools_n = __atomic_load_n(&sh->cmng.n_valid, __ATOMIC_RELAXED);
8475 us = MLX5_POOL_QUERY_FREQ_US / pools_n;
8476 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
8477 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
8478 sh->cmng.query_thread_on = 0;
8479 DRV_LOG(ERR, "Cannot reinitialize query alarm");
8481 sh->cmng.query_thread_on = 1;
8486 * The periodic procedure for triggering asynchronous batch queries for all the
8487 * counter pools. This function is probably called by the host thread.
8490 * The parameter for the alarm process.
8493 mlx5_flow_query_alarm(void *arg)
8495 struct mlx5_dev_ctx_shared *sh = arg;
8497 uint16_t pool_index = sh->cmng.pool_index;
8498 struct mlx5_flow_counter_mng *cmng = &sh->cmng;
8499 struct mlx5_flow_counter_pool *pool;
8502 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
8504 rte_spinlock_lock(&cmng->pool_update_sl);
8505 pool = cmng->pools[pool_index];
8506 n_valid = cmng->n_valid;
8507 rte_spinlock_unlock(&cmng->pool_update_sl);
8508 /* Set the statistic memory to the new created pool. */
8509 if ((!pool->raw && mlx5_flow_set_counter_stat_mem(sh, pool)))
8512 /* There is a pool query in progress. */
8515 LIST_FIRST(&sh->cmng.free_stat_raws);
8517 /* No free counter statistics raw memory. */
8520 * Identify the counters released between query trigger and query
8521 * handle more efficiently. The counter released in this gap period
8522 * should wait for a new round of query as the new arrived packets
8523 * will not be taken into account.
8526 ret = mlx5_devx_cmd_flow_counter_query(pool->min_dcs, 0,
8527 MLX5_COUNTERS_PER_POOL,
8529 pool->raw_hw->mem_mng->wm.lkey,
8533 (uint64_t)(uintptr_t)pool);
8535 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
8536 " %d", pool->min_dcs->id);
8537 pool->raw_hw = NULL;
8540 LIST_REMOVE(pool->raw_hw, next);
8541 sh->cmng.pending_queries++;
8543 if (pool_index >= n_valid)
8546 sh->cmng.pool_index = pool_index;
8547 mlx5_set_query_alarm(sh);
8551 * Check and callback event for new aged flow in the counter pool
8554 * Pointer to mlx5_dev_ctx_shared object.
8556 * Pointer to Current counter pool.
8559 mlx5_flow_aging_check(struct mlx5_dev_ctx_shared *sh,
8560 struct mlx5_flow_counter_pool *pool)
8562 struct mlx5_priv *priv;
8563 struct mlx5_flow_counter *cnt;
8564 struct mlx5_age_info *age_info;
8565 struct mlx5_age_param *age_param;
8566 struct mlx5_counter_stats_raw *cur = pool->raw_hw;
8567 struct mlx5_counter_stats_raw *prev = pool->raw;
8568 const uint64_t curr_time = MLX5_CURR_TIME_SEC;
8569 const uint32_t time_delta = curr_time - pool->time_of_last_age_check;
8570 uint16_t expected = AGE_CANDIDATE;
8573 pool->time_of_last_age_check = curr_time;
8574 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
8575 cnt = MLX5_POOL_GET_CNT(pool, i);
8576 age_param = MLX5_CNT_TO_AGE(cnt);
8577 if (__atomic_load_n(&age_param->state,
8578 __ATOMIC_RELAXED) != AGE_CANDIDATE)
8580 if (cur->data[i].hits != prev->data[i].hits) {
8581 __atomic_store_n(&age_param->sec_since_last_hit, 0,
8585 if (__atomic_add_fetch(&age_param->sec_since_last_hit,
8587 __ATOMIC_RELAXED) <= age_param->timeout)
8590 * Hold the lock first, or if between the
8591 * state AGE_TMOUT and tailq operation the
8592 * release happened, the release procedure
8593 * may delete a non-existent tailq node.
8595 priv = rte_eth_devices[age_param->port_id].data->dev_private;
8596 age_info = GET_PORT_AGE_INFO(priv);
8597 rte_spinlock_lock(&age_info->aged_sl);
8598 if (__atomic_compare_exchange_n(&age_param->state, &expected,
8601 __ATOMIC_RELAXED)) {
8602 TAILQ_INSERT_TAIL(&age_info->aged_counters, cnt, next);
8603 MLX5_AGE_SET(age_info, MLX5_AGE_EVENT_NEW);
8605 rte_spinlock_unlock(&age_info->aged_sl);
8607 mlx5_age_event_prepare(sh);
8611 * Handler for the HW respond about ready values from an asynchronous batch
8612 * query. This function is probably called by the host thread.
8615 * The pointer to the shared device context.
8616 * @param[in] async_id
8617 * The Devx async ID.
8619 * The status of the completion.
8622 mlx5_flow_async_pool_query_handle(struct mlx5_dev_ctx_shared *sh,
8623 uint64_t async_id, int status)
8625 struct mlx5_flow_counter_pool *pool =
8626 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
8627 struct mlx5_counter_stats_raw *raw_to_free;
8628 uint8_t query_gen = pool->query_gen ^ 1;
8629 struct mlx5_flow_counter_mng *cmng = &sh->cmng;
8630 enum mlx5_counter_type cnt_type =
8631 pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
8632 MLX5_COUNTER_TYPE_ORIGIN;
8634 if (unlikely(status)) {
8635 raw_to_free = pool->raw_hw;
8637 raw_to_free = pool->raw;
8639 mlx5_flow_aging_check(sh, pool);
8640 rte_spinlock_lock(&pool->sl);
8641 pool->raw = pool->raw_hw;
8642 rte_spinlock_unlock(&pool->sl);
8643 /* Be sure the new raw counters data is updated in memory. */
8645 if (!TAILQ_EMPTY(&pool->counters[query_gen])) {
8646 rte_spinlock_lock(&cmng->csl[cnt_type]);
8647 TAILQ_CONCAT(&cmng->counters[cnt_type],
8648 &pool->counters[query_gen], next);
8649 rte_spinlock_unlock(&cmng->csl[cnt_type]);
8652 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
8653 pool->raw_hw = NULL;
8654 sh->cmng.pending_queries--;
8658 flow_group_to_table(uint32_t port_id, uint32_t group, uint32_t *table,
8659 const struct flow_grp_info *grp_info,
8660 struct rte_flow_error *error)
8662 if (grp_info->transfer && grp_info->external &&
8663 grp_info->fdb_def_rule) {
8664 if (group == UINT32_MAX)
8665 return rte_flow_error_set
8667 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
8669 "group index not supported");
8674 DRV_LOG(DEBUG, "port %u group=%#x table=%#x", port_id, group, *table);
8679 * Translate the rte_flow group index to HW table value.
8681 * If tunnel offload is disabled, all group ids converted to flow table
8682 * id using the standard method.
8683 * If tunnel offload is enabled, group id can be converted using the
8684 * standard or tunnel conversion method. Group conversion method
8685 * selection depends on flags in `grp_info` parameter:
8686 * - Internal (grp_info.external == 0) groups conversion uses the
8688 * - Group ids in JUMP action converted with the tunnel conversion.
8689 * - Group id in rule attribute conversion depends on a rule type and
8691 * ** non zero group attributes converted with the tunnel method
8692 * ** zero group attribute in non-tunnel rule is converted using the
8693 * standard method - there's only one root table
8694 * ** zero group attribute in steer tunnel rule is converted with the
8695 * standard method - single root table
8696 * ** zero group attribute in match tunnel rule is a special OvS
8697 * case: that value is used for portability reasons. That group
8698 * id is converted with the tunnel conversion method.
8703 * PMD tunnel offload object
8705 * rte_flow group index value.
8708 * @param[in] grp_info
8709 * flags used for conversion
8711 * Pointer to error structure.
8714 * 0 on success, a negative errno value otherwise and rte_errno is set.
8717 mlx5_flow_group_to_table(struct rte_eth_dev *dev,
8718 const struct mlx5_flow_tunnel *tunnel,
8719 uint32_t group, uint32_t *table,
8720 const struct flow_grp_info *grp_info,
8721 struct rte_flow_error *error)
8724 bool standard_translation;
8726 if (!grp_info->skip_scale && grp_info->external &&
8727 group < MLX5_MAX_TABLES_EXTERNAL)
8728 group *= MLX5_FLOW_TABLE_FACTOR;
8729 if (is_tunnel_offload_active(dev)) {
8730 standard_translation = !grp_info->external ||
8731 grp_info->std_tbl_fix;
8733 standard_translation = true;
8736 "port %u group=%u transfer=%d external=%d fdb_def_rule=%d translate=%s",
8737 dev->data->port_id, group, grp_info->transfer,
8738 grp_info->external, grp_info->fdb_def_rule,
8739 standard_translation ? "STANDARD" : "TUNNEL");
8740 if (standard_translation)
8741 ret = flow_group_to_table(dev->data->port_id, group, table,
8744 ret = tunnel_flow_group_to_flow_table(dev, tunnel, group,
8751 * Discover availability of metadata reg_c's.
8753 * Iteratively use test flows to check availability.
8756 * Pointer to the Ethernet device structure.
8759 * 0 on success, a negative errno value otherwise and rte_errno is set.
8762 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
8764 struct mlx5_priv *priv = dev->data->dev_private;
8765 enum modify_reg idx;
8768 /* reg_c[0] and reg_c[1] are reserved. */
8769 priv->sh->flow_mreg_c[n++] = REG_C_0;
8770 priv->sh->flow_mreg_c[n++] = REG_C_1;
8771 /* Discover availability of other reg_c's. */
8772 for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
8773 struct rte_flow_attr attr = {
8774 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
8775 .priority = MLX5_FLOW_LOWEST_PRIO_INDICATOR,
8778 struct rte_flow_item items[] = {
8780 .type = RTE_FLOW_ITEM_TYPE_END,
8783 struct rte_flow_action actions[] = {
8785 .type = (enum rte_flow_action_type)
8786 MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
8787 .conf = &(struct mlx5_flow_action_copy_mreg){
8793 .type = RTE_FLOW_ACTION_TYPE_JUMP,
8794 .conf = &(struct rte_flow_action_jump){
8795 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
8799 .type = RTE_FLOW_ACTION_TYPE_END,
8803 struct rte_flow *flow;
8804 struct rte_flow_error error;
8806 if (!priv->sh->config.dv_flow_en)
8808 /* Create internal flow, validation skips copy action. */
8809 flow_idx = flow_list_create(dev, MLX5_FLOW_TYPE_GEN, &attr,
8810 items, actions, false, &error);
8811 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
8815 priv->sh->flow_mreg_c[n++] = idx;
8816 flow_list_destroy(dev, MLX5_FLOW_TYPE_GEN, flow_idx);
8818 for (; n < MLX5_MREG_C_NUM; ++n)
8819 priv->sh->flow_mreg_c[n] = REG_NON;
8820 priv->sh->metadata_regc_check_flag = 1;
8825 save_dump_file(const uint8_t *data, uint32_t size,
8826 uint32_t type, uint64_t id, void *arg, FILE *file)
8828 char line[BUF_SIZE];
8831 uint32_t actions_num;
8832 struct rte_flow_query_count *count;
8834 memset(line, 0, BUF_SIZE);
8836 case DR_DUMP_REC_TYPE_PMD_MODIFY_HDR:
8837 actions_num = *(uint32_t *)(arg);
8838 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",%d,",
8839 type, id, actions_num);
8841 case DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT:
8842 out += snprintf(line + out, BUF_SIZE - out, "%d,0x%" PRIx64 ",",
8845 case DR_DUMP_REC_TYPE_PMD_COUNTER:
8846 count = (struct rte_flow_query_count *)arg;
8848 "%d,0x%" PRIx64 ",%" PRIu64 ",%" PRIu64 "\n",
8849 type, id, count->hits, count->bytes);
8855 for (k = 0; k < size; k++) {
8856 /* Make sure we do not overrun the line buffer length. */
8857 if (out >= BUF_SIZE - 4) {
8861 out += snprintf(line + out, BUF_SIZE - out, "%02x",
8864 fprintf(file, "%s\n", line);
8869 mlx5_flow_query_counter(struct rte_eth_dev *dev, struct rte_flow *flow,
8870 struct rte_flow_query_count *count, struct rte_flow_error *error)
8872 struct rte_flow_action action[2];
8873 enum mlx5_flow_drv_type ftype;
8874 const struct mlx5_flow_driver_ops *fops;
8877 return rte_flow_error_set(error, ENOENT,
8878 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8880 "invalid flow handle");
8882 action[0].type = RTE_FLOW_ACTION_TYPE_COUNT;
8883 action[1].type = RTE_FLOW_ACTION_TYPE_END;
8884 if (flow->counter) {
8885 memset(count, 0, sizeof(struct rte_flow_query_count));
8886 ftype = (enum mlx5_flow_drv_type)(flow->drv_type);
8887 MLX5_ASSERT(ftype > MLX5_FLOW_TYPE_MIN &&
8888 ftype < MLX5_FLOW_TYPE_MAX);
8889 fops = flow_get_drv_ops(ftype);
8890 return fops->query(dev, flow, action, count, error);
8895 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
8897 * Dump flow ipool data to file
8900 * The pointer to Ethernet device.
8902 * A pointer to a file for output.
8904 * Perform verbose error reporting if not NULL. PMDs initialize this
8905 * structure in case of error only.
8907 * 0 on success, a negative value otherwise.
8910 mlx5_flow_dev_dump_ipool(struct rte_eth_dev *dev,
8911 struct rte_flow *flow, FILE *file,
8912 struct rte_flow_error *error)
8914 struct mlx5_priv *priv = dev->data->dev_private;
8915 struct mlx5_flow_dv_modify_hdr_resource *modify_hdr;
8916 struct mlx5_flow_dv_encap_decap_resource *encap_decap;
8917 uint32_t handle_idx;
8918 struct mlx5_flow_handle *dh;
8919 struct rte_flow_query_count count;
8920 uint32_t actions_num;
8921 const uint8_t *data;
8925 void *action = NULL;
8928 return rte_flow_error_set(error, ENOENT,
8929 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
8931 "invalid flow handle");
8933 handle_idx = flow->dev_handles;
8935 if (flow->counter &&
8936 (!mlx5_counter_query(dev, flow->counter, false,
8937 &count.hits, &count.bytes, &action)) && action) {
8938 id = (uint64_t)(uintptr_t)action;
8939 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
8940 save_dump_file(NULL, 0, type,
8941 id, (void *)&count, file);
8944 while (handle_idx) {
8945 dh = mlx5_ipool_get(priv->sh->ipool
8946 [MLX5_IPOOL_MLX5_FLOW], handle_idx);
8949 handle_idx = dh->next.next;
8951 /* Get modify_hdr and encap_decap buf from ipools. */
8953 modify_hdr = dh->dvh.modify_hdr;
8955 if (dh->dvh.rix_encap_decap) {
8956 encap_decap = mlx5_ipool_get(priv->sh->ipool
8957 [MLX5_IPOOL_DECAP_ENCAP],
8958 dh->dvh.rix_encap_decap);
8961 data = (const uint8_t *)modify_hdr->actions;
8962 size = (size_t)(modify_hdr->actions_num) * 8;
8963 id = (uint64_t)(uintptr_t)modify_hdr->action;
8964 actions_num = modify_hdr->actions_num;
8965 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
8966 save_dump_file(data, size, type, id,
8967 (void *)(&actions_num), file);
8970 data = encap_decap->buf;
8971 size = encap_decap->size;
8972 id = (uint64_t)(uintptr_t)encap_decap->action;
8973 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
8974 save_dump_file(data, size, type,
8982 * Dump all flow's encap_decap/modify_hdr/counter data to file
8985 * The pointer to Ethernet device.
8987 * A pointer to a file for output.
8989 * Perform verbose error reporting if not NULL. PMDs initialize this
8990 * structure in case of error only.
8992 * 0 on success, a negative value otherwise.
8995 mlx5_flow_dev_dump_sh_all(struct rte_eth_dev *dev,
8996 FILE *file, struct rte_flow_error *error __rte_unused)
8998 struct mlx5_priv *priv = dev->data->dev_private;
8999 struct mlx5_dev_ctx_shared *sh = priv->sh;
9000 struct mlx5_hlist *h;
9001 struct mlx5_flow_dv_modify_hdr_resource *modify_hdr;
9002 struct mlx5_flow_dv_encap_decap_resource *encap_decap;
9003 struct rte_flow_query_count count;
9004 uint32_t actions_num;
9005 const uint8_t *data;
9011 struct mlx5_list_inconst *l_inconst;
9012 struct mlx5_list_entry *e;
9014 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
9018 /* encap_decap hlist is lcore_share, get global core cache. */
9019 i = MLX5_LIST_GLOBAL;
9020 h = sh->encaps_decaps;
9022 for (j = 0; j <= h->mask; j++) {
9023 l_inconst = &h->buckets[j].l;
9024 if (!l_inconst || !l_inconst->cache[i])
9027 e = LIST_FIRST(&l_inconst->cache[i]->h);
9030 (struct mlx5_flow_dv_encap_decap_resource *)e;
9031 data = encap_decap->buf;
9032 size = encap_decap->size;
9033 id = (uint64_t)(uintptr_t)encap_decap->action;
9034 type = DR_DUMP_REC_TYPE_PMD_PKT_REFORMAT;
9035 save_dump_file(data, size, type,
9037 e = LIST_NEXT(e, next);
9042 /* get modify_hdr */
9043 h = sh->modify_cmds;
9045 lcore_index = rte_lcore_index(rte_lcore_id());
9046 if (unlikely(lcore_index == -1)) {
9047 lcore_index = MLX5_LIST_NLCORE;
9048 rte_spinlock_lock(&h->l_const.lcore_lock);
9052 for (j = 0; j <= h->mask; j++) {
9053 l_inconst = &h->buckets[j].l;
9054 if (!l_inconst || !l_inconst->cache[i])
9057 e = LIST_FIRST(&l_inconst->cache[i]->h);
9060 (struct mlx5_flow_dv_modify_hdr_resource *)e;
9061 data = (const uint8_t *)modify_hdr->actions;
9062 size = (size_t)(modify_hdr->actions_num) * 8;
9063 actions_num = modify_hdr->actions_num;
9064 id = (uint64_t)(uintptr_t)modify_hdr->action;
9065 type = DR_DUMP_REC_TYPE_PMD_MODIFY_HDR;
9066 save_dump_file(data, size, type, id,
9067 (void *)(&actions_num), file);
9068 e = LIST_NEXT(e, next);
9072 if (unlikely(lcore_index == MLX5_LIST_NLCORE))
9073 rte_spinlock_unlock(&h->l_const.lcore_lock);
9077 MLX5_ASSERT(cmng->n_valid <= cmng->n);
9078 max = MLX5_COUNTERS_PER_POOL * cmng->n_valid;
9079 for (j = 1; j <= max; j++) {
9081 if ((!mlx5_counter_query(dev, j, false, &count.hits,
9082 &count.bytes, &action)) && action) {
9083 id = (uint64_t)(uintptr_t)action;
9084 type = DR_DUMP_REC_TYPE_PMD_COUNTER;
9085 save_dump_file(NULL, 0, type,
9086 id, (void *)&count, file);
9094 * Dump flow raw hw data to file
9097 * The pointer to Ethernet device.
9099 * A pointer to a file for output.
9101 * Perform verbose error reporting if not NULL. PMDs initialize this
9102 * structure in case of error only.
9104 * 0 on success, a negative value otherwise.
9107 mlx5_flow_dev_dump(struct rte_eth_dev *dev, struct rte_flow *flow_idx,
9109 struct rte_flow_error *error __rte_unused)
9111 struct mlx5_priv *priv = dev->data->dev_private;
9112 struct mlx5_dev_ctx_shared *sh = priv->sh;
9113 uint32_t handle_idx;
9115 struct mlx5_flow_handle *dh;
9116 struct rte_flow *flow;
9118 if (!sh->config.dv_flow_en) {
9119 if (fputs("device dv flow disabled\n", file) <= 0)
9126 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
9127 if (mlx5_flow_dev_dump_sh_all(dev, file, error))
9130 return mlx5_devx_cmd_flow_dump(sh->fdb_domain,
9132 sh->tx_domain, file);
9135 flow = mlx5_ipool_get(priv->flows[MLX5_FLOW_TYPE_GEN],
9136 (uintptr_t)(void *)flow_idx);
9140 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
9141 mlx5_flow_dev_dump_ipool(dev, flow, file, error);
9143 handle_idx = flow->dev_handles;
9144 while (handle_idx) {
9145 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
9150 ret = mlx5_devx_cmd_flow_single_dump(dh->drv_flow,
9155 handle_idx = dh->next.next;
9161 * Get aged-out flows.
9164 * Pointer to the Ethernet device structure.
9165 * @param[in] context
9166 * The address of an array of pointers to the aged-out flows contexts.
9167 * @param[in] nb_countexts
9168 * The length of context array pointers.
9170 * Perform verbose error reporting if not NULL. Initialized in case of
9174 * how many contexts get in success, otherwise negative errno value.
9175 * if nb_contexts is 0, return the amount of all aged contexts.
9176 * if nb_contexts is not 0 , return the amount of aged flows reported
9177 * in the context array.
9180 mlx5_flow_get_aged_flows(struct rte_eth_dev *dev, void **contexts,
9181 uint32_t nb_contexts, struct rte_flow_error *error)
9183 const struct mlx5_flow_driver_ops *fops;
9184 struct rte_flow_attr attr = { .transfer = 0 };
9186 if (flow_get_drv_type(dev, &attr) == MLX5_FLOW_TYPE_DV) {
9187 fops = flow_get_drv_ops(MLX5_FLOW_TYPE_DV);
9188 return fops->get_aged_flows(dev, contexts, nb_contexts,
9192 "port %u get aged flows is not supported.",
9193 dev->data->port_id);
9197 /* Wrapper for driver action_validate op callback */
9199 flow_drv_action_validate(struct rte_eth_dev *dev,
9200 const struct rte_flow_indir_action_conf *conf,
9201 const struct rte_flow_action *action,
9202 const struct mlx5_flow_driver_ops *fops,
9203 struct rte_flow_error *error)
9205 static const char err_msg[] = "indirect action validation unsupported";
9207 if (!fops->action_validate) {
9208 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9209 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9213 return fops->action_validate(dev, conf, action, error);
9217 * Destroys the shared action by handle.
9220 * Pointer to Ethernet device structure.
9222 * Handle for the indirect action object to be destroyed.
9224 * Perform verbose error reporting if not NULL. PMDs initialize this
9225 * structure in case of error only.
9228 * 0 on success, a negative errno value otherwise and rte_errno is set.
9230 * @note: wrapper for driver action_create op callback.
9233 mlx5_action_handle_destroy(struct rte_eth_dev *dev,
9234 struct rte_flow_action_handle *handle,
9235 struct rte_flow_error *error)
9237 static const char err_msg[] = "indirect action destruction unsupported";
9238 struct rte_flow_attr attr = { .transfer = 0 };
9239 const struct mlx5_flow_driver_ops *fops =
9240 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9242 if (!fops->action_destroy) {
9243 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9244 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9248 return fops->action_destroy(dev, handle, error);
9251 /* Wrapper for driver action_destroy op callback */
9253 flow_drv_action_update(struct rte_eth_dev *dev,
9254 struct rte_flow_action_handle *handle,
9256 const struct mlx5_flow_driver_ops *fops,
9257 struct rte_flow_error *error)
9259 static const char err_msg[] = "indirect action update unsupported";
9261 if (!fops->action_update) {
9262 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9263 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9267 return fops->action_update(dev, handle, update, error);
9270 /* Wrapper for driver action_destroy op callback */
9272 flow_drv_action_query(struct rte_eth_dev *dev,
9273 const struct rte_flow_action_handle *handle,
9275 const struct mlx5_flow_driver_ops *fops,
9276 struct rte_flow_error *error)
9278 static const char err_msg[] = "indirect action query unsupported";
9280 if (!fops->action_query) {
9281 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9282 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9286 return fops->action_query(dev, handle, data, error);
9290 * Create indirect action for reuse in multiple flow rules.
9293 * Pointer to Ethernet device structure.
9295 * Pointer to indirect action object configuration.
9297 * Action configuration for indirect action object creation.
9299 * Perform verbose error reporting if not NULL. PMDs initialize this
9300 * structure in case of error only.
9302 * A valid handle in case of success, NULL otherwise and rte_errno is set.
9304 static struct rte_flow_action_handle *
9305 mlx5_action_handle_create(struct rte_eth_dev *dev,
9306 const struct rte_flow_indir_action_conf *conf,
9307 const struct rte_flow_action *action,
9308 struct rte_flow_error *error)
9310 static const char err_msg[] = "indirect action creation unsupported";
9311 struct rte_flow_attr attr = { .transfer = 0 };
9312 const struct mlx5_flow_driver_ops *fops =
9313 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9315 if (flow_drv_action_validate(dev, conf, action, fops, error))
9317 if (!fops->action_create) {
9318 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
9319 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
9323 return fops->action_create(dev, conf, action, error);
9327 * Updates inplace the indirect action configuration pointed by *handle*
9328 * with the configuration provided as *update* argument.
9329 * The update of the indirect action configuration effects all flow rules
9330 * reusing the action via handle.
9333 * Pointer to Ethernet device structure.
9335 * Handle for the indirect action to be updated.
9337 * Action specification used to modify the action pointed by handle.
9338 * *update* could be of same type with the action pointed by the *handle*
9339 * handle argument, or some other structures like a wrapper, depending on
9340 * the indirect action type.
9342 * Perform verbose error reporting if not NULL. PMDs initialize this
9343 * structure in case of error only.
9346 * 0 on success, a negative errno value otherwise and rte_errno is set.
9349 mlx5_action_handle_update(struct rte_eth_dev *dev,
9350 struct rte_flow_action_handle *handle,
9352 struct rte_flow_error *error)
9354 struct rte_flow_attr attr = { .transfer = 0 };
9355 const struct mlx5_flow_driver_ops *fops =
9356 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9359 ret = flow_drv_action_validate(dev, NULL,
9360 (const struct rte_flow_action *)update, fops, error);
9363 return flow_drv_action_update(dev, handle, update, fops,
9368 * Query the indirect action by handle.
9370 * This function allows retrieving action-specific data such as counters.
9371 * Data is gathered by special action which may be present/referenced in
9372 * more than one flow rule definition.
9374 * see @RTE_FLOW_ACTION_TYPE_COUNT
9377 * Pointer to Ethernet device structure.
9379 * Handle for the indirect action to query.
9380 * @param[in, out] data
9381 * Pointer to storage for the associated query data type.
9383 * Perform verbose error reporting if not NULL. PMDs initialize this
9384 * structure in case of error only.
9387 * 0 on success, a negative errno value otherwise and rte_errno is set.
9390 mlx5_action_handle_query(struct rte_eth_dev *dev,
9391 const struct rte_flow_action_handle *handle,
9393 struct rte_flow_error *error)
9395 struct rte_flow_attr attr = { .transfer = 0 };
9396 const struct mlx5_flow_driver_ops *fops =
9397 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9399 return flow_drv_action_query(dev, handle, data, fops, error);
9403 * Destroy all indirect actions (shared RSS).
9406 * Pointer to Ethernet device.
9409 * 0 on success, a negative errno value otherwise and rte_errno is set.
9412 mlx5_action_handle_flush(struct rte_eth_dev *dev)
9414 struct rte_flow_error error;
9415 struct mlx5_priv *priv = dev->data->dev_private;
9416 struct mlx5_shared_action_rss *shared_rss;
9420 ILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
9421 priv->rss_shared_actions, idx, shared_rss, next) {
9422 ret |= mlx5_action_handle_destroy(dev,
9423 (struct rte_flow_action_handle *)(uintptr_t)idx, &error);
9429 * Validate existing indirect actions against current device configuration
9430 * and attach them to device resources.
9433 * Pointer to Ethernet device.
9436 * 0 on success, a negative errno value otherwise and rte_errno is set.
9439 mlx5_action_handle_attach(struct rte_eth_dev *dev)
9441 struct mlx5_priv *priv = dev->data->dev_private;
9443 struct mlx5_ind_table_obj *ind_tbl, *ind_tbl_last;
9445 LIST_FOREACH(ind_tbl, &priv->standalone_ind_tbls, next) {
9446 const char *message;
9449 ret = mlx5_validate_rss_queues(dev, ind_tbl->queues,
9451 &message, &queue_idx);
9453 DRV_LOG(ERR, "Port %u cannot use queue %u in RSS: %s",
9454 dev->data->port_id, ind_tbl->queues[queue_idx],
9461 LIST_FOREACH(ind_tbl, &priv->standalone_ind_tbls, next) {
9462 ret = mlx5_ind_table_obj_attach(dev, ind_tbl);
9464 DRV_LOG(ERR, "Port %u could not attach "
9465 "indirection table obj %p",
9466 dev->data->port_id, (void *)ind_tbl);
9473 ind_tbl_last = ind_tbl;
9474 LIST_FOREACH(ind_tbl, &priv->standalone_ind_tbls, next) {
9475 if (ind_tbl == ind_tbl_last)
9477 if (mlx5_ind_table_obj_detach(dev, ind_tbl) != 0)
9478 DRV_LOG(CRIT, "Port %u could not detach "
9479 "indirection table obj %p on rollback",
9480 dev->data->port_id, (void *)ind_tbl);
9486 * Detach indirect actions of the device from its resources.
9489 * Pointer to Ethernet device.
9492 * 0 on success, a negative errno value otherwise and rte_errno is set.
9495 mlx5_action_handle_detach(struct rte_eth_dev *dev)
9497 struct mlx5_priv *priv = dev->data->dev_private;
9499 struct mlx5_ind_table_obj *ind_tbl, *ind_tbl_last;
9501 LIST_FOREACH(ind_tbl, &priv->standalone_ind_tbls, next) {
9502 ret = mlx5_ind_table_obj_detach(dev, ind_tbl);
9504 DRV_LOG(ERR, "Port %u could not detach "
9505 "indirection table obj %p",
9506 dev->data->port_id, (void *)ind_tbl);
9512 ind_tbl_last = ind_tbl;
9513 LIST_FOREACH(ind_tbl, &priv->standalone_ind_tbls, next) {
9514 if (ind_tbl == ind_tbl_last)
9516 if (mlx5_ind_table_obj_attach(dev, ind_tbl) != 0)
9517 DRV_LOG(CRIT, "Port %u could not attach "
9518 "indirection table obj %p on rollback",
9519 dev->data->port_id, (void *)ind_tbl);
9524 #ifndef HAVE_MLX5DV_DR
9525 #define MLX5_DOMAIN_SYNC_FLOW ((1 << 0) | (1 << 1))
9527 #define MLX5_DOMAIN_SYNC_FLOW \
9528 (MLX5DV_DR_DOMAIN_SYNC_FLAGS_SW | MLX5DV_DR_DOMAIN_SYNC_FLAGS_HW)
9531 int rte_pmd_mlx5_sync_flow(uint16_t port_id, uint32_t domains)
9533 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
9534 const struct mlx5_flow_driver_ops *fops;
9536 struct rte_flow_attr attr = { .transfer = 0 };
9538 fops = flow_get_drv_ops(flow_get_drv_type(dev, &attr));
9539 ret = fops->sync_domain(dev, domains, MLX5_DOMAIN_SYNC_FLOW);
9545 const struct mlx5_flow_tunnel *
9546 mlx5_get_tof(const struct rte_flow_item *item,
9547 const struct rte_flow_action *action,
9548 enum mlx5_tof_rule_type *rule_type)
9550 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
9551 if (item->type == (typeof(item->type))
9552 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL) {
9553 *rule_type = MLX5_TUNNEL_OFFLOAD_MATCH_RULE;
9554 return flow_items_to_tunnel(item);
9557 for (; action->conf != RTE_FLOW_ACTION_TYPE_END; action++) {
9558 if (action->type == (typeof(action->type))
9559 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET) {
9560 *rule_type = MLX5_TUNNEL_OFFLOAD_SET_RULE;
9561 return flow_actions_to_tunnel(action);
9568 * tunnel offload functionality is defined for DV environment only
9570 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
9572 union tunnel_offload_mark {
9575 uint32_t app_reserve:8;
9576 uint32_t table_id:15;
9577 uint32_t transfer:1;
9578 uint32_t _unused_:8;
9583 mlx5_access_tunnel_offload_db
9584 (struct rte_eth_dev *dev,
9585 bool (*match)(struct rte_eth_dev *,
9586 struct mlx5_flow_tunnel *, const void *),
9587 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
9588 void (*miss)(struct rte_eth_dev *, void *),
9589 void *ctx, bool lock_op);
9592 flow_tunnel_add_default_miss(struct rte_eth_dev *dev,
9593 struct rte_flow *flow,
9594 const struct rte_flow_attr *attr,
9595 const struct rte_flow_action *app_actions,
9597 const struct mlx5_flow_tunnel *tunnel,
9598 struct tunnel_default_miss_ctx *ctx,
9599 struct rte_flow_error *error)
9601 struct mlx5_priv *priv = dev->data->dev_private;
9602 struct mlx5_flow *dev_flow;
9603 struct rte_flow_attr miss_attr = *attr;
9604 const struct rte_flow_item miss_items[2] = {
9606 .type = RTE_FLOW_ITEM_TYPE_ETH,
9612 .type = RTE_FLOW_ITEM_TYPE_END,
9618 union tunnel_offload_mark mark_id;
9619 struct rte_flow_action_mark miss_mark;
9620 struct rte_flow_action miss_actions[3] = {
9621 [0] = { .type = RTE_FLOW_ACTION_TYPE_MARK, .conf = &miss_mark },
9622 [2] = { .type = RTE_FLOW_ACTION_TYPE_END, .conf = NULL }
9624 const struct rte_flow_action_jump *jump_data;
9625 uint32_t i, flow_table = 0; /* prevent compilation warning */
9626 struct flow_grp_info grp_info = {
9628 .transfer = attr->transfer,
9629 .fdb_def_rule = !!priv->fdb_def_rule,
9634 if (!attr->transfer) {
9637 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_RSS;
9638 q_size = priv->reta_idx_n * sizeof(ctx->queue[0]);
9639 ctx->queue = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, q_size,
9642 return rte_flow_error_set
9644 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9645 NULL, "invalid default miss RSS");
9646 ctx->action_rss.func = RTE_ETH_HASH_FUNCTION_DEFAULT,
9647 ctx->action_rss.level = 0,
9648 ctx->action_rss.types = priv->rss_conf.rss_hf,
9649 ctx->action_rss.key_len = priv->rss_conf.rss_key_len,
9650 ctx->action_rss.queue_num = priv->reta_idx_n,
9651 ctx->action_rss.key = priv->rss_conf.rss_key,
9652 ctx->action_rss.queue = ctx->queue;
9653 if (!priv->reta_idx_n || !priv->rxqs_n)
9654 return rte_flow_error_set
9656 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9657 NULL, "invalid port configuration");
9658 if (!(dev->data->dev_conf.rxmode.mq_mode & RTE_ETH_MQ_RX_RSS_FLAG))
9659 ctx->action_rss.types = 0;
9660 for (i = 0; i != priv->reta_idx_n; ++i)
9661 ctx->queue[i] = (*priv->reta_idx)[i];
9663 miss_actions[1].type = RTE_FLOW_ACTION_TYPE_JUMP;
9664 ctx->miss_jump.group = MLX5_TNL_MISS_FDB_JUMP_GRP;
9666 miss_actions[1].conf = (typeof(miss_actions[1].conf))ctx->raw;
9667 for (; app_actions->type != RTE_FLOW_ACTION_TYPE_JUMP; app_actions++);
9668 jump_data = app_actions->conf;
9669 miss_attr.priority = MLX5_TNL_MISS_RULE_PRIORITY;
9670 miss_attr.group = jump_data->group;
9671 ret = mlx5_flow_group_to_table(dev, tunnel, jump_data->group,
9672 &flow_table, &grp_info, error);
9674 return rte_flow_error_set(error, EINVAL,
9675 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
9676 NULL, "invalid tunnel id");
9677 mark_id.app_reserve = 0;
9678 mark_id.table_id = tunnel_flow_tbl_to_id(flow_table);
9679 mark_id.transfer = !!attr->transfer;
9680 mark_id._unused_ = 0;
9681 miss_mark.id = mark_id.val;
9682 dev_flow = flow_drv_prepare(dev, flow, &miss_attr,
9683 miss_items, miss_actions, flow_idx, error);
9686 dev_flow->flow = flow;
9687 dev_flow->external = true;
9688 dev_flow->tunnel = tunnel;
9689 dev_flow->tof_type = MLX5_TUNNEL_OFFLOAD_MISS_RULE;
9690 /* Subflow object was created, we must include one in the list. */
9691 SILIST_INSERT(&flow->dev_handles, dev_flow->handle_idx,
9692 dev_flow->handle, next);
9694 "port %u tunnel type=%d id=%u miss rule priority=%u group=%u",
9695 dev->data->port_id, tunnel->app_tunnel.type,
9696 tunnel->tunnel_id, miss_attr.priority, miss_attr.group);
9697 ret = flow_drv_translate(dev, dev_flow, &miss_attr, miss_items,
9698 miss_actions, error);
9700 ret = flow_mreg_update_copy_table(dev, flow, miss_actions,
9706 static const struct mlx5_flow_tbl_data_entry *
9707 tunnel_mark_decode(struct rte_eth_dev *dev, uint32_t mark)
9709 struct mlx5_priv *priv = dev->data->dev_private;
9710 struct mlx5_dev_ctx_shared *sh = priv->sh;
9711 struct mlx5_list_entry *he;
9712 union tunnel_offload_mark mbits = { .val = mark };
9713 union mlx5_flow_tbl_key table_key = {
9715 .level = tunnel_id_to_flow_tbl(mbits.table_id),
9719 .is_fdb = !!mbits.transfer,
9723 struct mlx5_flow_cb_ctx ctx = {
9724 .data = &table_key.v64,
9727 he = mlx5_hlist_lookup(sh->flow_tbls, table_key.v64, &ctx);
9729 container_of(he, struct mlx5_flow_tbl_data_entry, entry) : NULL;
9733 mlx5_flow_tunnel_grp2tbl_remove_cb(void *tool_ctx,
9734 struct mlx5_list_entry *entry)
9736 struct mlx5_dev_ctx_shared *sh = tool_ctx;
9737 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9739 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9740 tunnel_flow_tbl_to_id(tte->flow_table));
9745 mlx5_flow_tunnel_grp2tbl_match_cb(void *tool_ctx __rte_unused,
9746 struct mlx5_list_entry *entry, void *cb_ctx)
9748 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9749 union tunnel_tbl_key tbl = {
9750 .val = *(uint64_t *)(ctx->data),
9752 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9754 return tbl.tunnel_id != tte->tunnel_id || tbl.group != tte->group;
9757 static struct mlx5_list_entry *
9758 mlx5_flow_tunnel_grp2tbl_create_cb(void *tool_ctx, void *cb_ctx)
9760 struct mlx5_dev_ctx_shared *sh = tool_ctx;
9761 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9762 struct tunnel_tbl_entry *tte;
9763 union tunnel_tbl_key tbl = {
9764 .val = *(uint64_t *)(ctx->data),
9767 tte = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO,
9772 mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9774 if (tte->flow_table >= MLX5_MAX_TABLES) {
9775 DRV_LOG(ERR, "Tunnel TBL ID %d exceed max limit.",
9777 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TNL_TBL_ID],
9780 } else if (!tte->flow_table) {
9783 tte->flow_table = tunnel_id_to_flow_tbl(tte->flow_table);
9784 tte->tunnel_id = tbl.tunnel_id;
9785 tte->group = tbl.group;
9793 static struct mlx5_list_entry *
9794 mlx5_flow_tunnel_grp2tbl_clone_cb(void *tool_ctx __rte_unused,
9795 struct mlx5_list_entry *oentry,
9796 void *cb_ctx __rte_unused)
9798 struct tunnel_tbl_entry *tte = mlx5_malloc(MLX5_MEM_SYS, sizeof(*tte),
9803 memcpy(tte, oentry, sizeof(*tte));
9808 mlx5_flow_tunnel_grp2tbl_clone_free_cb(void *tool_ctx __rte_unused,
9809 struct mlx5_list_entry *entry)
9811 struct tunnel_tbl_entry *tte = container_of(entry, typeof(*tte), hash);
9817 tunnel_flow_group_to_flow_table(struct rte_eth_dev *dev,
9818 const struct mlx5_flow_tunnel *tunnel,
9819 uint32_t group, uint32_t *table,
9820 struct rte_flow_error *error)
9822 struct mlx5_list_entry *he;
9823 struct tunnel_tbl_entry *tte;
9824 union tunnel_tbl_key key = {
9825 .tunnel_id = tunnel ? tunnel->tunnel_id : 0,
9828 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9829 struct mlx5_hlist *group_hash;
9830 struct mlx5_flow_cb_ctx ctx = {
9834 group_hash = tunnel ? tunnel->groups : thub->groups;
9835 he = mlx5_hlist_register(group_hash, key.val, &ctx);
9837 return rte_flow_error_set(error, EINVAL,
9838 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
9840 "tunnel group index not supported");
9841 tte = container_of(he, typeof(*tte), hash);
9842 *table = tte->flow_table;
9843 DRV_LOG(DEBUG, "port %u tunnel %u group=%#x table=%#x",
9844 dev->data->port_id, key.tunnel_id, group, *table);
9849 mlx5_flow_tunnel_free(struct rte_eth_dev *dev,
9850 struct mlx5_flow_tunnel *tunnel)
9852 struct mlx5_priv *priv = dev->data->dev_private;
9853 struct mlx5_indexed_pool *ipool;
9855 DRV_LOG(DEBUG, "port %u release pmd tunnel id=0x%x",
9856 dev->data->port_id, tunnel->tunnel_id);
9857 LIST_REMOVE(tunnel, chain);
9858 mlx5_hlist_destroy(tunnel->groups);
9859 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
9860 mlx5_ipool_free(ipool, tunnel->tunnel_id);
9864 mlx5_access_tunnel_offload_db
9865 (struct rte_eth_dev *dev,
9866 bool (*match)(struct rte_eth_dev *,
9867 struct mlx5_flow_tunnel *, const void *),
9868 void (*hit)(struct rte_eth_dev *, struct mlx5_flow_tunnel *, void *),
9869 void (*miss)(struct rte_eth_dev *, void *),
9870 void *ctx, bool lock_op)
9872 bool verdict = false;
9873 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
9874 struct mlx5_flow_tunnel *tunnel;
9876 rte_spinlock_lock(&thub->sl);
9877 LIST_FOREACH(tunnel, &thub->tunnels, chain) {
9878 verdict = match(dev, tunnel, (const void *)ctx);
9883 rte_spinlock_unlock(&thub->sl);
9885 hit(dev, tunnel, ctx);
9886 if (!verdict && miss)
9889 rte_spinlock_unlock(&thub->sl);
9894 struct tunnel_db_find_tunnel_id_ctx {
9896 struct mlx5_flow_tunnel *tunnel;
9900 find_tunnel_id_match(struct rte_eth_dev *dev,
9901 struct mlx5_flow_tunnel *tunnel, const void *x)
9903 const struct tunnel_db_find_tunnel_id_ctx *ctx = x;
9906 return tunnel->tunnel_id == ctx->tunnel_id;
9910 find_tunnel_id_hit(struct rte_eth_dev *dev,
9911 struct mlx5_flow_tunnel *tunnel, void *x)
9913 struct tunnel_db_find_tunnel_id_ctx *ctx = x;
9915 ctx->tunnel = tunnel;
9918 static struct mlx5_flow_tunnel *
9919 mlx5_find_tunnel_id(struct rte_eth_dev *dev, uint32_t id)
9921 struct tunnel_db_find_tunnel_id_ctx ctx = {
9925 mlx5_access_tunnel_offload_db(dev, find_tunnel_id_match,
9926 find_tunnel_id_hit, NULL, &ctx, true);
9931 static struct mlx5_flow_tunnel *
9932 mlx5_flow_tunnel_allocate(struct rte_eth_dev *dev,
9933 const struct rte_flow_tunnel *app_tunnel)
9935 struct mlx5_priv *priv = dev->data->dev_private;
9936 struct mlx5_indexed_pool *ipool;
9937 struct mlx5_flow_tunnel *tunnel;
9940 ipool = priv->sh->ipool[MLX5_IPOOL_TUNNEL_ID];
9941 tunnel = mlx5_ipool_zmalloc(ipool, &id);
9944 if (id >= MLX5_MAX_TUNNELS) {
9945 mlx5_ipool_free(ipool, id);
9946 DRV_LOG(ERR, "Tunnel ID %d exceed max limit.", id);
9949 tunnel->groups = mlx5_hlist_create("tunnel groups", 64, false, true,
9951 mlx5_flow_tunnel_grp2tbl_create_cb,
9952 mlx5_flow_tunnel_grp2tbl_match_cb,
9953 mlx5_flow_tunnel_grp2tbl_remove_cb,
9954 mlx5_flow_tunnel_grp2tbl_clone_cb,
9955 mlx5_flow_tunnel_grp2tbl_clone_free_cb);
9956 if (!tunnel->groups) {
9957 mlx5_ipool_free(ipool, id);
9960 /* initiate new PMD tunnel */
9961 memcpy(&tunnel->app_tunnel, app_tunnel, sizeof(*app_tunnel));
9962 tunnel->tunnel_id = id;
9963 tunnel->action.type = (typeof(tunnel->action.type))
9964 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET;
9965 tunnel->action.conf = tunnel;
9966 tunnel->item.type = (typeof(tunnel->item.type))
9967 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL;
9968 tunnel->item.spec = tunnel;
9969 tunnel->item.last = NULL;
9970 tunnel->item.mask = NULL;
9972 DRV_LOG(DEBUG, "port %u new pmd tunnel id=0x%x",
9973 dev->data->port_id, tunnel->tunnel_id);
9978 struct tunnel_db_get_tunnel_ctx {
9979 const struct rte_flow_tunnel *app_tunnel;
9980 struct mlx5_flow_tunnel *tunnel;
9983 static bool get_tunnel_match(struct rte_eth_dev *dev,
9984 struct mlx5_flow_tunnel *tunnel, const void *x)
9986 const struct tunnel_db_get_tunnel_ctx *ctx = x;
9989 return !memcmp(ctx->app_tunnel, &tunnel->app_tunnel,
9990 sizeof(*ctx->app_tunnel));
9993 static void get_tunnel_hit(struct rte_eth_dev *dev,
9994 struct mlx5_flow_tunnel *tunnel, void *x)
9996 /* called under tunnel spinlock protection */
9997 struct tunnel_db_get_tunnel_ctx *ctx = x;
10001 ctx->tunnel = tunnel;
10004 static void get_tunnel_miss(struct rte_eth_dev *dev, void *x)
10006 /* called under tunnel spinlock protection */
10007 struct mlx5_flow_tunnel_hub *thub = mlx5_tunnel_hub(dev);
10008 struct tunnel_db_get_tunnel_ctx *ctx = x;
10010 rte_spinlock_unlock(&thub->sl);
10011 ctx->tunnel = mlx5_flow_tunnel_allocate(dev, ctx->app_tunnel);
10012 rte_spinlock_lock(&thub->sl);
10014 ctx->tunnel->refctn = 1;
10015 LIST_INSERT_HEAD(&thub->tunnels, ctx->tunnel, chain);
10021 mlx5_get_flow_tunnel(struct rte_eth_dev *dev,
10022 const struct rte_flow_tunnel *app_tunnel,
10023 struct mlx5_flow_tunnel **tunnel)
10025 struct tunnel_db_get_tunnel_ctx ctx = {
10026 .app_tunnel = app_tunnel,
10029 mlx5_access_tunnel_offload_db(dev, get_tunnel_match, get_tunnel_hit,
10030 get_tunnel_miss, &ctx, true);
10031 *tunnel = ctx.tunnel;
10032 return ctx.tunnel ? 0 : -ENOMEM;
10035 void mlx5_release_tunnel_hub(struct mlx5_dev_ctx_shared *sh, uint16_t port_id)
10037 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10041 if (!LIST_EMPTY(&thub->tunnels))
10042 DRV_LOG(WARNING, "port %u tunnels present", port_id);
10043 mlx5_hlist_destroy(thub->groups);
10047 int mlx5_alloc_tunnel_hub(struct mlx5_dev_ctx_shared *sh)
10050 struct mlx5_flow_tunnel_hub *thub;
10052 thub = mlx5_malloc(MLX5_MEM_SYS | MLX5_MEM_ZERO, sizeof(*thub),
10056 LIST_INIT(&thub->tunnels);
10057 rte_spinlock_init(&thub->sl);
10058 thub->groups = mlx5_hlist_create("flow groups", 64,
10060 mlx5_flow_tunnel_grp2tbl_create_cb,
10061 mlx5_flow_tunnel_grp2tbl_match_cb,
10062 mlx5_flow_tunnel_grp2tbl_remove_cb,
10063 mlx5_flow_tunnel_grp2tbl_clone_cb,
10064 mlx5_flow_tunnel_grp2tbl_clone_free_cb);
10065 if (!thub->groups) {
10069 sh->tunnel_hub = thub;
10075 mlx5_hlist_destroy(thub->groups);
10082 mlx5_flow_tunnel_validate(struct rte_eth_dev *dev,
10083 struct rte_flow_tunnel *tunnel,
10084 struct rte_flow_error *error)
10086 struct mlx5_priv *priv = dev->data->dev_private;
10088 if (!priv->sh->config.dv_flow_en)
10089 return rte_flow_error_set(error, ENOTSUP,
10090 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
10091 "flow DV interface is off");
10092 if (!is_tunnel_offload_active(dev))
10093 return rte_flow_error_set(error, ENOTSUP,
10094 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
10095 "tunnel offload was not activated");
10097 return rte_flow_error_set(error, EINVAL,
10098 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
10099 "no application tunnel");
10100 switch (tunnel->type) {
10102 return rte_flow_error_set(error, EINVAL,
10103 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
10104 "unsupported tunnel type");
10105 case RTE_FLOW_ITEM_TYPE_VXLAN:
10106 case RTE_FLOW_ITEM_TYPE_GRE:
10107 case RTE_FLOW_ITEM_TYPE_NVGRE:
10108 case RTE_FLOW_ITEM_TYPE_GENEVE:
10115 mlx5_flow_tunnel_decap_set(struct rte_eth_dev *dev,
10116 struct rte_flow_tunnel *app_tunnel,
10117 struct rte_flow_action **actions,
10118 uint32_t *num_of_actions,
10119 struct rte_flow_error *error)
10121 struct mlx5_flow_tunnel *tunnel;
10122 int ret = mlx5_flow_tunnel_validate(dev, app_tunnel, error);
10126 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
10128 return rte_flow_error_set(error, ret,
10129 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
10130 "failed to initialize pmd tunnel");
10132 *actions = &tunnel->action;
10133 *num_of_actions = 1;
10138 mlx5_flow_tunnel_match(struct rte_eth_dev *dev,
10139 struct rte_flow_tunnel *app_tunnel,
10140 struct rte_flow_item **items,
10141 uint32_t *num_of_items,
10142 struct rte_flow_error *error)
10144 struct mlx5_flow_tunnel *tunnel;
10145 int ret = mlx5_flow_tunnel_validate(dev, app_tunnel, error);
10149 ret = mlx5_get_flow_tunnel(dev, app_tunnel, &tunnel);
10151 return rte_flow_error_set(error, ret,
10152 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
10153 "failed to initialize pmd tunnel");
10155 *items = &tunnel->item;
10160 struct tunnel_db_element_release_ctx {
10161 struct rte_flow_item *items;
10162 struct rte_flow_action *actions;
10163 uint32_t num_elements;
10164 struct rte_flow_error *error;
10169 tunnel_element_release_match(struct rte_eth_dev *dev,
10170 struct mlx5_flow_tunnel *tunnel, const void *x)
10172 const struct tunnel_db_element_release_ctx *ctx = x;
10175 if (ctx->num_elements != 1)
10177 else if (ctx->items)
10178 return ctx->items == &tunnel->item;
10179 else if (ctx->actions)
10180 return ctx->actions == &tunnel->action;
10186 tunnel_element_release_hit(struct rte_eth_dev *dev,
10187 struct mlx5_flow_tunnel *tunnel, void *x)
10189 struct tunnel_db_element_release_ctx *ctx = x;
10191 if (!__atomic_sub_fetch(&tunnel->refctn, 1, __ATOMIC_RELAXED))
10192 mlx5_flow_tunnel_free(dev, tunnel);
10196 tunnel_element_release_miss(struct rte_eth_dev *dev, void *x)
10198 struct tunnel_db_element_release_ctx *ctx = x;
10200 ctx->ret = rte_flow_error_set(ctx->error, EINVAL,
10201 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
10202 "invalid argument");
10206 mlx5_flow_tunnel_item_release(struct rte_eth_dev *dev,
10207 struct rte_flow_item *pmd_items,
10208 uint32_t num_items, struct rte_flow_error *err)
10210 struct tunnel_db_element_release_ctx ctx = {
10211 .items = pmd_items,
10213 .num_elements = num_items,
10217 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
10218 tunnel_element_release_hit,
10219 tunnel_element_release_miss, &ctx, false);
10225 mlx5_flow_tunnel_action_release(struct rte_eth_dev *dev,
10226 struct rte_flow_action *pmd_actions,
10227 uint32_t num_actions, struct rte_flow_error *err)
10229 struct tunnel_db_element_release_ctx ctx = {
10231 .actions = pmd_actions,
10232 .num_elements = num_actions,
10236 mlx5_access_tunnel_offload_db(dev, tunnel_element_release_match,
10237 tunnel_element_release_hit,
10238 tunnel_element_release_miss, &ctx, false);
10244 mlx5_flow_tunnel_get_restore_info(struct rte_eth_dev *dev,
10245 struct rte_mbuf *m,
10246 struct rte_flow_restore_info *info,
10247 struct rte_flow_error *err)
10249 uint64_t ol_flags = m->ol_flags;
10250 const struct mlx5_flow_tbl_data_entry *tble;
10251 const uint64_t mask = RTE_MBUF_F_RX_FDIR | RTE_MBUF_F_RX_FDIR_ID;
10253 if (!is_tunnel_offload_active(dev)) {
10258 if ((ol_flags & mask) != mask)
10260 tble = tunnel_mark_decode(dev, m->hash.fdir.hi);
10262 DRV_LOG(DEBUG, "port %u invalid miss tunnel mark %#x",
10263 dev->data->port_id, m->hash.fdir.hi);
10266 MLX5_ASSERT(tble->tunnel);
10267 memcpy(&info->tunnel, &tble->tunnel->app_tunnel, sizeof(info->tunnel));
10268 info->group_id = tble->group_id;
10269 info->flags = RTE_FLOW_RESTORE_INFO_TUNNEL |
10270 RTE_FLOW_RESTORE_INFO_GROUP_ID |
10271 RTE_FLOW_RESTORE_INFO_ENCAPSULATED;
10276 return rte_flow_error_set(err, EINVAL,
10277 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10278 "failed to get restore info");
10281 #else /* HAVE_IBV_FLOW_DV_SUPPORT */
10283 mlx5_flow_tunnel_decap_set(__rte_unused struct rte_eth_dev *dev,
10284 __rte_unused struct rte_flow_tunnel *app_tunnel,
10285 __rte_unused struct rte_flow_action **actions,
10286 __rte_unused uint32_t *num_of_actions,
10287 __rte_unused struct rte_flow_error *error)
10293 mlx5_flow_tunnel_match(__rte_unused struct rte_eth_dev *dev,
10294 __rte_unused struct rte_flow_tunnel *app_tunnel,
10295 __rte_unused struct rte_flow_item **items,
10296 __rte_unused uint32_t *num_of_items,
10297 __rte_unused struct rte_flow_error *error)
10303 mlx5_flow_tunnel_item_release(__rte_unused struct rte_eth_dev *dev,
10304 __rte_unused struct rte_flow_item *pmd_items,
10305 __rte_unused uint32_t num_items,
10306 __rte_unused struct rte_flow_error *err)
10312 mlx5_flow_tunnel_action_release(__rte_unused struct rte_eth_dev *dev,
10313 __rte_unused struct rte_flow_action *pmd_action,
10314 __rte_unused uint32_t num_actions,
10315 __rte_unused struct rte_flow_error *err)
10321 mlx5_flow_tunnel_get_restore_info(__rte_unused struct rte_eth_dev *dev,
10322 __rte_unused struct rte_mbuf *m,
10323 __rte_unused struct rte_flow_restore_info *i,
10324 __rte_unused struct rte_flow_error *err)
10330 flow_tunnel_add_default_miss(__rte_unused struct rte_eth_dev *dev,
10331 __rte_unused struct rte_flow *flow,
10332 __rte_unused const struct rte_flow_attr *attr,
10333 __rte_unused const struct rte_flow_action *actions,
10334 __rte_unused uint32_t flow_idx,
10335 __rte_unused const struct mlx5_flow_tunnel *tunnel,
10336 __rte_unused struct tunnel_default_miss_ctx *ctx,
10337 __rte_unused struct rte_flow_error *error)
10342 static struct mlx5_flow_tunnel *
10343 mlx5_find_tunnel_id(__rte_unused struct rte_eth_dev *dev,
10344 __rte_unused uint32_t id)
10350 mlx5_flow_tunnel_free(__rte_unused struct rte_eth_dev *dev,
10351 __rte_unused struct mlx5_flow_tunnel *tunnel)
10356 tunnel_flow_group_to_flow_table(__rte_unused struct rte_eth_dev *dev,
10357 __rte_unused const struct mlx5_flow_tunnel *t,
10358 __rte_unused uint32_t group,
10359 __rte_unused uint32_t *table,
10360 struct rte_flow_error *error)
10362 return rte_flow_error_set(error, ENOTSUP,
10363 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10364 "tunnel offload requires DV support");
10368 mlx5_release_tunnel_hub(__rte_unused struct mlx5_dev_ctx_shared *sh,
10369 __rte_unused uint16_t port_id)
10372 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
10374 /* Flex flow item API */
10375 static struct rte_flow_item_flex_handle *
10376 mlx5_flow_flex_item_create(struct rte_eth_dev *dev,
10377 const struct rte_flow_item_flex_conf *conf,
10378 struct rte_flow_error *error)
10380 static const char err_msg[] = "flex item creation unsupported";
10381 struct rte_flow_attr attr = { .transfer = 0 };
10382 const struct mlx5_flow_driver_ops *fops =
10383 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
10385 if (!fops->item_create) {
10386 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
10387 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
10391 return fops->item_create(dev, conf, error);
10395 mlx5_flow_flex_item_release(struct rte_eth_dev *dev,
10396 const struct rte_flow_item_flex_handle *handle,
10397 struct rte_flow_error *error)
10399 static const char err_msg[] = "flex item release unsupported";
10400 struct rte_flow_attr attr = { .transfer = 0 };
10401 const struct mlx5_flow_driver_ops *fops =
10402 flow_get_drv_ops(flow_get_drv_type(dev, &attr));
10404 if (!fops->item_release) {
10405 DRV_LOG(ERR, "port %u %s.", dev->data->port_id, err_msg);
10406 rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
10410 return fops->item_release(dev, handle, error);
10414 mlx5_dbg__print_pattern(const struct rte_flow_item *item)
10417 struct rte_flow_error error;
10419 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
10421 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ITEM_NAME_PTR, &item_name,
10423 (void *)(uintptr_t)item->type, &error);
10425 printf("%s ", item_name);
10427 printf("%d\n", (int)item->type);
10433 mlx5_flow_is_std_vxlan_port(const struct rte_flow_item *udp_item)
10435 const struct rte_flow_item_udp *spec = udp_item->spec;
10436 const struct rte_flow_item_udp *mask = udp_item->mask;
10437 uint16_t udp_dport = 0;
10439 if (spec != NULL) {
10441 mask = &rte_flow_item_udp_mask;
10442 udp_dport = rte_be_to_cpu_16(spec->hdr.dst_port &
10443 mask->hdr.dst_port);
10445 return (!udp_dport || udp_dport == MLX5_UDP_PORT_VXLAN);
10448 static const struct mlx5_flow_expand_node *
10449 mlx5_flow_expand_rss_adjust_node(const struct rte_flow_item *pattern,
10450 unsigned int item_idx,
10451 const struct mlx5_flow_expand_node graph[],
10452 const struct mlx5_flow_expand_node *node)
10454 const struct rte_flow_item *item = pattern + item_idx, *prev_item;
10456 if (item->type == RTE_FLOW_ITEM_TYPE_VXLAN &&
10458 node->type == RTE_FLOW_ITEM_TYPE_VXLAN) {
10460 * The expansion node is VXLAN and it is also the last
10461 * expandable item in the pattern, so need to continue
10462 * expansion of the inner tunnel.
10464 MLX5_ASSERT(item_idx > 0);
10465 prev_item = pattern + item_idx - 1;
10466 MLX5_ASSERT(prev_item->type == RTE_FLOW_ITEM_TYPE_UDP);
10467 if (mlx5_flow_is_std_vxlan_port(prev_item))
10468 return &graph[MLX5_EXPANSION_STD_VXLAN];
10469 return &graph[MLX5_EXPANSION_L3_VXLAN];
10474 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
10475 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
10476 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
10479 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
10480 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
10481 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
10482 { 9, 10, 11 }, { 12, 13, 14 },
10486 * Discover the number of available flow priorities.
10492 * On success, number of available flow priorities.
10493 * On failure, a negative errno-style code and rte_errno is set.
10496 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
10498 static const uint16_t vprio[] = {8, 16};
10499 const struct mlx5_priv *priv = dev->data->dev_private;
10500 const struct mlx5_flow_driver_ops *fops;
10501 enum mlx5_flow_drv_type type;
10504 type = mlx5_flow_os_get_type();
10505 if (type == MLX5_FLOW_TYPE_MAX) {
10506 type = MLX5_FLOW_TYPE_VERBS;
10507 if (priv->sh->cdev->config.devx && priv->sh->config.dv_flow_en)
10508 type = MLX5_FLOW_TYPE_DV;
10510 fops = flow_get_drv_ops(type);
10511 if (fops->discover_priorities == NULL) {
10512 DRV_LOG(ERR, "Priority discovery not supported");
10513 rte_errno = ENOTSUP;
10516 ret = fops->discover_priorities(dev, vprio, RTE_DIM(vprio));
10521 ret = RTE_DIM(priority_map_3);
10524 ret = RTE_DIM(priority_map_5);
10527 rte_errno = ENOTSUP;
10529 "port %u maximum priority: %d expected 8/16",
10530 dev->data->port_id, ret);
10533 DRV_LOG(INFO, "port %u supported flow priorities:"
10534 " 0-%d for ingress or egress root table,"
10535 " 0-%d for non-root table or transfer root table.",
10536 dev->data->port_id, ret - 2,
10537 MLX5_NON_ROOT_FLOW_MAX_PRIO - 1);
10542 * Adjust flow priority based on the highest layer and the request priority.
10545 * Pointer to the Ethernet device structure.
10546 * @param[in] priority
10547 * The rule base priority.
10548 * @param[in] subpriority
10549 * The priority based on the items.
10552 * The new priority.
10555 mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
10556 uint32_t subpriority)
10559 struct mlx5_priv *priv = dev->data->dev_private;
10561 switch (priv->sh->flow_max_priority) {
10562 case RTE_DIM(priority_map_3):
10563 res = priority_map_3[priority][subpriority];
10565 case RTE_DIM(priority_map_5):
10566 res = priority_map_5[priority][subpriority];