1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2016 6WIND S.A.
3 * Copyright 2016 Mellanox Technologies, Ltd
6 #include <netinet/in.h>
13 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
15 #pragma GCC diagnostic ignored "-Wpedantic"
17 #include <infiniband/verbs.h>
19 #pragma GCC diagnostic error "-Wpedantic"
22 #include <rte_common.h>
23 #include <rte_ether.h>
24 #include <rte_ethdev_driver.h>
26 #include <rte_flow_driver.h>
27 #include <rte_malloc.h>
31 #include "mlx5_defs.h"
32 #include "mlx5_flow.h"
33 #include "mlx5_glue.h"
35 #include "mlx5_rxtx.h"
37 /* Dev ops structure defined in mlx5.c */
38 extern const struct eth_dev_ops mlx5_dev_ops;
39 extern const struct eth_dev_ops mlx5_dev_ops_isolate;
41 /** Device flow drivers. */
42 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
43 extern const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops;
45 extern const struct mlx5_flow_driver_ops mlx5_flow_verbs_drv_ops;
47 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops;
49 const struct mlx5_flow_driver_ops *flow_drv_ops[] = {
50 [MLX5_FLOW_TYPE_MIN] = &mlx5_flow_null_drv_ops,
51 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
52 [MLX5_FLOW_TYPE_DV] = &mlx5_flow_dv_drv_ops,
54 [MLX5_FLOW_TYPE_VERBS] = &mlx5_flow_verbs_drv_ops,
55 [MLX5_FLOW_TYPE_MAX] = &mlx5_flow_null_drv_ops
60 MLX5_EXPANSION_ROOT_OUTER,
61 MLX5_EXPANSION_ROOT_ETH_VLAN,
62 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN,
63 MLX5_EXPANSION_OUTER_ETH,
64 MLX5_EXPANSION_OUTER_ETH_VLAN,
65 MLX5_EXPANSION_OUTER_VLAN,
66 MLX5_EXPANSION_OUTER_IPV4,
67 MLX5_EXPANSION_OUTER_IPV4_UDP,
68 MLX5_EXPANSION_OUTER_IPV4_TCP,
69 MLX5_EXPANSION_OUTER_IPV6,
70 MLX5_EXPANSION_OUTER_IPV6_UDP,
71 MLX5_EXPANSION_OUTER_IPV6_TCP,
73 MLX5_EXPANSION_VXLAN_GPE,
77 MLX5_EXPANSION_ETH_VLAN,
80 MLX5_EXPANSION_IPV4_UDP,
81 MLX5_EXPANSION_IPV4_TCP,
83 MLX5_EXPANSION_IPV6_UDP,
84 MLX5_EXPANSION_IPV6_TCP,
87 /** Supported expansion of items. */
88 static const struct rte_flow_expand_node mlx5_support_expansion[] = {
89 [MLX5_EXPANSION_ROOT] = {
90 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
93 .type = RTE_FLOW_ITEM_TYPE_END,
95 [MLX5_EXPANSION_ROOT_OUTER] = {
96 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH,
97 MLX5_EXPANSION_OUTER_IPV4,
98 MLX5_EXPANSION_OUTER_IPV6),
99 .type = RTE_FLOW_ITEM_TYPE_END,
101 [MLX5_EXPANSION_ROOT_ETH_VLAN] = {
102 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH_VLAN),
103 .type = RTE_FLOW_ITEM_TYPE_END,
105 [MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN] = {
106 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_ETH_VLAN),
107 .type = RTE_FLOW_ITEM_TYPE_END,
109 [MLX5_EXPANSION_OUTER_ETH] = {
110 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
111 MLX5_EXPANSION_OUTER_IPV6,
112 MLX5_EXPANSION_MPLS),
113 .type = RTE_FLOW_ITEM_TYPE_ETH,
116 [MLX5_EXPANSION_OUTER_ETH_VLAN] = {
117 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_VLAN),
118 .type = RTE_FLOW_ITEM_TYPE_ETH,
121 [MLX5_EXPANSION_OUTER_VLAN] = {
122 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_OUTER_IPV4,
123 MLX5_EXPANSION_OUTER_IPV6),
124 .type = RTE_FLOW_ITEM_TYPE_VLAN,
126 [MLX5_EXPANSION_OUTER_IPV4] = {
127 .next = RTE_FLOW_EXPAND_RSS_NEXT
128 (MLX5_EXPANSION_OUTER_IPV4_UDP,
129 MLX5_EXPANSION_OUTER_IPV4_TCP,
132 MLX5_EXPANSION_IPV6),
133 .type = RTE_FLOW_ITEM_TYPE_IPV4,
134 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
135 ETH_RSS_NONFRAG_IPV4_OTHER,
137 [MLX5_EXPANSION_OUTER_IPV4_UDP] = {
138 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
139 MLX5_EXPANSION_VXLAN_GPE),
140 .type = RTE_FLOW_ITEM_TYPE_UDP,
141 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
143 [MLX5_EXPANSION_OUTER_IPV4_TCP] = {
144 .type = RTE_FLOW_ITEM_TYPE_TCP,
145 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
147 [MLX5_EXPANSION_OUTER_IPV6] = {
148 .next = RTE_FLOW_EXPAND_RSS_NEXT
149 (MLX5_EXPANSION_OUTER_IPV6_UDP,
150 MLX5_EXPANSION_OUTER_IPV6_TCP,
152 MLX5_EXPANSION_IPV6),
153 .type = RTE_FLOW_ITEM_TYPE_IPV6,
154 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
155 ETH_RSS_NONFRAG_IPV6_OTHER,
157 [MLX5_EXPANSION_OUTER_IPV6_UDP] = {
158 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VXLAN,
159 MLX5_EXPANSION_VXLAN_GPE),
160 .type = RTE_FLOW_ITEM_TYPE_UDP,
161 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
163 [MLX5_EXPANSION_OUTER_IPV6_TCP] = {
164 .type = RTE_FLOW_ITEM_TYPE_TCP,
165 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
167 [MLX5_EXPANSION_VXLAN] = {
168 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH),
169 .type = RTE_FLOW_ITEM_TYPE_VXLAN,
171 [MLX5_EXPANSION_VXLAN_GPE] = {
172 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_ETH,
174 MLX5_EXPANSION_IPV6),
175 .type = RTE_FLOW_ITEM_TYPE_VXLAN_GPE,
177 [MLX5_EXPANSION_GRE] = {
178 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4),
179 .type = RTE_FLOW_ITEM_TYPE_GRE,
181 [MLX5_EXPANSION_MPLS] = {
182 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
183 MLX5_EXPANSION_IPV6),
184 .type = RTE_FLOW_ITEM_TYPE_MPLS,
186 [MLX5_EXPANSION_ETH] = {
187 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
188 MLX5_EXPANSION_IPV6),
189 .type = RTE_FLOW_ITEM_TYPE_ETH,
191 [MLX5_EXPANSION_ETH_VLAN] = {
192 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_VLAN),
193 .type = RTE_FLOW_ITEM_TYPE_ETH,
195 [MLX5_EXPANSION_VLAN] = {
196 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4,
197 MLX5_EXPANSION_IPV6),
198 .type = RTE_FLOW_ITEM_TYPE_VLAN,
200 [MLX5_EXPANSION_IPV4] = {
201 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV4_UDP,
202 MLX5_EXPANSION_IPV4_TCP),
203 .type = RTE_FLOW_ITEM_TYPE_IPV4,
204 .rss_types = ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 |
205 ETH_RSS_NONFRAG_IPV4_OTHER,
207 [MLX5_EXPANSION_IPV4_UDP] = {
208 .type = RTE_FLOW_ITEM_TYPE_UDP,
209 .rss_types = ETH_RSS_NONFRAG_IPV4_UDP,
211 [MLX5_EXPANSION_IPV4_TCP] = {
212 .type = RTE_FLOW_ITEM_TYPE_TCP,
213 .rss_types = ETH_RSS_NONFRAG_IPV4_TCP,
215 [MLX5_EXPANSION_IPV6] = {
216 .next = RTE_FLOW_EXPAND_RSS_NEXT(MLX5_EXPANSION_IPV6_UDP,
217 MLX5_EXPANSION_IPV6_TCP),
218 .type = RTE_FLOW_ITEM_TYPE_IPV6,
219 .rss_types = ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 |
220 ETH_RSS_NONFRAG_IPV6_OTHER,
222 [MLX5_EXPANSION_IPV6_UDP] = {
223 .type = RTE_FLOW_ITEM_TYPE_UDP,
224 .rss_types = ETH_RSS_NONFRAG_IPV6_UDP,
226 [MLX5_EXPANSION_IPV6_TCP] = {
227 .type = RTE_FLOW_ITEM_TYPE_TCP,
228 .rss_types = ETH_RSS_NONFRAG_IPV6_TCP,
232 static const struct rte_flow_ops mlx5_flow_ops = {
233 .validate = mlx5_flow_validate,
234 .create = mlx5_flow_create,
235 .destroy = mlx5_flow_destroy,
236 .flush = mlx5_flow_flush,
237 .isolate = mlx5_flow_isolate,
238 .query = mlx5_flow_query,
241 /* Convert FDIR request to Generic flow. */
243 struct rte_flow_attr attr;
244 struct rte_flow_item items[4];
245 struct rte_flow_item_eth l2;
246 struct rte_flow_item_eth l2_mask;
248 struct rte_flow_item_ipv4 ipv4;
249 struct rte_flow_item_ipv6 ipv6;
252 struct rte_flow_item_ipv4 ipv4;
253 struct rte_flow_item_ipv6 ipv6;
256 struct rte_flow_item_udp udp;
257 struct rte_flow_item_tcp tcp;
260 struct rte_flow_item_udp udp;
261 struct rte_flow_item_tcp tcp;
263 struct rte_flow_action actions[2];
264 struct rte_flow_action_queue queue;
267 /* Map of Verbs to Flow priority with 8 Verbs priorities. */
268 static const uint32_t priority_map_3[][MLX5_PRIORITY_MAP_MAX] = {
269 { 0, 1, 2 }, { 2, 3, 4 }, { 5, 6, 7 },
272 /* Map of Verbs to Flow priority with 16 Verbs priorities. */
273 static const uint32_t priority_map_5[][MLX5_PRIORITY_MAP_MAX] = {
274 { 0, 1, 2 }, { 3, 4, 5 }, { 6, 7, 8 },
275 { 9, 10, 11 }, { 12, 13, 14 },
278 /* Tunnel information. */
279 struct mlx5_flow_tunnel_info {
280 uint64_t tunnel; /**< Tunnel bit (see MLX5_FLOW_*). */
281 uint32_t ptype; /**< Tunnel Ptype (see RTE_PTYPE_*). */
284 static struct mlx5_flow_tunnel_info tunnels_info[] = {
286 .tunnel = MLX5_FLOW_LAYER_VXLAN,
287 .ptype = RTE_PTYPE_TUNNEL_VXLAN | RTE_PTYPE_L4_UDP,
290 .tunnel = MLX5_FLOW_LAYER_GENEVE,
291 .ptype = RTE_PTYPE_TUNNEL_GENEVE | RTE_PTYPE_L4_UDP,
294 .tunnel = MLX5_FLOW_LAYER_VXLAN_GPE,
295 .ptype = RTE_PTYPE_TUNNEL_VXLAN_GPE | RTE_PTYPE_L4_UDP,
298 .tunnel = MLX5_FLOW_LAYER_GRE,
299 .ptype = RTE_PTYPE_TUNNEL_GRE,
302 .tunnel = MLX5_FLOW_LAYER_MPLS | MLX5_FLOW_LAYER_OUTER_L4_UDP,
303 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_UDP | RTE_PTYPE_L4_UDP,
306 .tunnel = MLX5_FLOW_LAYER_MPLS,
307 .ptype = RTE_PTYPE_TUNNEL_MPLS_IN_GRE,
310 .tunnel = MLX5_FLOW_LAYER_NVGRE,
311 .ptype = RTE_PTYPE_TUNNEL_NVGRE,
314 .tunnel = MLX5_FLOW_LAYER_IPIP,
315 .ptype = RTE_PTYPE_TUNNEL_IP,
318 .tunnel = MLX5_FLOW_LAYER_IPV6_ENCAP,
319 .ptype = RTE_PTYPE_TUNNEL_IP,
324 * Translate tag ID to register.
327 * Pointer to the Ethernet device structure.
329 * The feature that request the register.
331 * The request register ID.
333 * Error description in case of any.
336 * The request register on success, a negative errno
337 * value otherwise and rte_errno is set.
340 mlx5_flow_get_reg_id(struct rte_eth_dev *dev,
341 enum mlx5_feature_name feature,
343 struct rte_flow_error *error)
345 struct mlx5_priv *priv = dev->data->dev_private;
346 struct mlx5_dev_config *config = &priv->config;
349 case MLX5_HAIRPIN_RX:
351 case MLX5_HAIRPIN_TX:
353 case MLX5_METADATA_RX:
354 switch (config->dv_xmeta_en) {
355 case MLX5_XMETA_MODE_LEGACY:
357 case MLX5_XMETA_MODE_META16:
359 case MLX5_XMETA_MODE_META32:
363 case MLX5_METADATA_TX:
365 case MLX5_METADATA_FDB:
368 switch (config->dv_xmeta_en) {
369 case MLX5_XMETA_MODE_LEGACY:
371 case MLX5_XMETA_MODE_META16:
373 case MLX5_XMETA_MODE_META32:
381 * Suppose engaging reg_c_2 .. reg_c_7 registers.
382 * reg_c_2 is reserved for coloring by meters.
383 * reg_c_3 is reserved for split flows TAG.
385 if (id > (REG_C_7 - REG_C_4))
386 return rte_flow_error_set
388 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
389 NULL, "invalid tag id");
390 if (config->flow_mreg_c[id + REG_C_4 - REG_C_0] == REG_NONE)
391 return rte_flow_error_set
393 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
394 NULL, "unsupported tag id");
395 return config->flow_mreg_c[id + REG_C_4 - REG_C_0];
398 return rte_flow_error_set(error, EINVAL,
399 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
400 NULL, "invalid feature name");
404 * Check extensive flow metadata register support.
407 * Pointer to rte_eth_dev structure.
410 * True if device supports extensive flow metadata register, otherwise false.
413 mlx5_flow_ext_mreg_supported(struct rte_eth_dev *dev)
415 struct mlx5_priv *priv = dev->data->dev_private;
416 struct mlx5_dev_config *config = &priv->config;
419 * Having available reg_c can be regarded inclusively as supporting
420 * extensive flow metadata register, which could mean,
421 * - metadata register copy action by modify header.
422 * - 16 modify header actions is supported.
423 * - reg_c's are preserved across different domain (FDB and NIC) on
424 * packet loopback by flow lookup miss.
426 return config->flow_mreg_c[2] != REG_NONE;
430 * Discover the maximum number of priority available.
433 * Pointer to the Ethernet device structure.
436 * number of supported flow priority on success, a negative errno
437 * value otherwise and rte_errno is set.
440 mlx5_flow_discover_priorities(struct rte_eth_dev *dev)
442 struct mlx5_priv *priv = dev->data->dev_private;
444 struct ibv_flow_attr attr;
445 struct ibv_flow_spec_eth eth;
446 struct ibv_flow_spec_action_drop drop;
450 .port = (uint8_t)priv->ibv_port,
453 .type = IBV_FLOW_SPEC_ETH,
454 .size = sizeof(struct ibv_flow_spec_eth),
457 .size = sizeof(struct ibv_flow_spec_action_drop),
458 .type = IBV_FLOW_SPEC_ACTION_DROP,
461 struct ibv_flow *flow;
462 struct mlx5_hrxq *drop = mlx5_hrxq_drop_new(dev);
463 uint16_t vprio[] = { 8, 16 };
471 for (i = 0; i != RTE_DIM(vprio); i++) {
472 flow_attr.attr.priority = vprio[i] - 1;
473 flow = mlx5_glue->create_flow(drop->qp, &flow_attr.attr);
476 claim_zero(mlx5_glue->destroy_flow(flow));
479 mlx5_hrxq_drop_release(dev);
482 priority = RTE_DIM(priority_map_3);
485 priority = RTE_DIM(priority_map_5);
490 "port %u verbs maximum priority: %d expected 8/16",
491 dev->data->port_id, priority);
494 DRV_LOG(INFO, "port %u flow maximum priority: %d",
495 dev->data->port_id, priority);
500 * Adjust flow priority based on the highest layer and the request priority.
503 * Pointer to the Ethernet device structure.
504 * @param[in] priority
505 * The rule base priority.
506 * @param[in] subpriority
507 * The priority based on the items.
512 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
513 uint32_t subpriority)
516 struct mlx5_priv *priv = dev->data->dev_private;
518 switch (priv->config.flow_prio) {
519 case RTE_DIM(priority_map_3):
520 res = priority_map_3[priority][subpriority];
522 case RTE_DIM(priority_map_5):
523 res = priority_map_5[priority][subpriority];
530 * Verify the @p item specifications (spec, last, mask) are compatible with the
534 * Item specification.
536 * @p item->mask or flow default bit-masks.
537 * @param[in] nic_mask
538 * Bit-masks covering supported fields by the NIC to compare with user mask.
540 * Bit-masks size in bytes.
542 * Pointer to error structure.
545 * 0 on success, a negative errno value otherwise and rte_errno is set.
548 mlx5_flow_item_acceptable(const struct rte_flow_item *item,
550 const uint8_t *nic_mask,
552 struct rte_flow_error *error)
557 for (i = 0; i < size; ++i)
558 if ((nic_mask[i] | mask[i]) != nic_mask[i])
559 return rte_flow_error_set(error, ENOTSUP,
560 RTE_FLOW_ERROR_TYPE_ITEM,
562 "mask enables non supported"
564 if (!item->spec && (item->mask || item->last))
565 return rte_flow_error_set(error, EINVAL,
566 RTE_FLOW_ERROR_TYPE_ITEM, item,
567 "mask/last without a spec is not"
569 if (item->spec && item->last) {
575 for (i = 0; i < size; ++i) {
576 spec[i] = ((const uint8_t *)item->spec)[i] & mask[i];
577 last[i] = ((const uint8_t *)item->last)[i] & mask[i];
579 ret = memcmp(spec, last, size);
581 return rte_flow_error_set(error, EINVAL,
582 RTE_FLOW_ERROR_TYPE_ITEM,
584 "range is not valid");
590 * Adjust the hash fields according to the @p flow information.
592 * @param[in] dev_flow.
593 * Pointer to the mlx5_flow.
595 * 1 when the hash field is for a tunnel item.
596 * @param[in] layer_types
598 * @param[in] hash_fields
602 * The hash fields that should be used.
605 mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow,
606 int tunnel __rte_unused, uint64_t layer_types,
607 uint64_t hash_fields)
609 struct rte_flow *flow = dev_flow->flow;
610 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
611 int rss_request_inner = flow->rss.level >= 2;
613 /* Check RSS hash level for tunnel. */
614 if (tunnel && rss_request_inner)
615 hash_fields |= IBV_RX_HASH_INNER;
616 else if (tunnel || rss_request_inner)
619 /* Check if requested layer matches RSS hash fields. */
620 if (!(flow->rss.types & layer_types))
626 * Lookup and set the ptype in the data Rx part. A single Ptype can be used,
627 * if several tunnel rules are used on this queue, the tunnel ptype will be
631 * Rx queue to update.
634 flow_rxq_tunnel_ptype_update(struct mlx5_rxq_ctrl *rxq_ctrl)
637 uint32_t tunnel_ptype = 0;
639 /* Look up for the ptype to use. */
640 for (i = 0; i != MLX5_FLOW_TUNNEL; ++i) {
641 if (!rxq_ctrl->flow_tunnels_n[i])
644 tunnel_ptype = tunnels_info[i].ptype;
650 rxq_ctrl->rxq.tunnel = tunnel_ptype;
654 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) according to the devive
658 * Pointer to the Ethernet device structure.
659 * @param[in] dev_flow
660 * Pointer to device flow structure.
663 flow_drv_rxq_flags_set(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
665 struct mlx5_priv *priv = dev->data->dev_private;
666 struct rte_flow *flow = dev_flow->flow;
667 const int mark = !!(dev_flow->actions &
668 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
669 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
672 for (i = 0; i != flow->rss.queue_num; ++i) {
673 int idx = (*flow->rss.queue)[i];
674 struct mlx5_rxq_ctrl *rxq_ctrl =
675 container_of((*priv->rxqs)[idx],
676 struct mlx5_rxq_ctrl, rxq);
679 rxq_ctrl->rxq.mark = 1;
680 rxq_ctrl->flow_mark_n++;
685 /* Increase the counter matching the flow. */
686 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
687 if ((tunnels_info[j].tunnel &
689 tunnels_info[j].tunnel) {
690 rxq_ctrl->flow_tunnels_n[j]++;
694 flow_rxq_tunnel_ptype_update(rxq_ctrl);
700 * Set the Rx queue flags (Mark/Flag and Tunnel Ptypes) for a flow
703 * Pointer to the Ethernet device structure.
705 * Pointer to flow structure.
708 flow_rxq_flags_set(struct rte_eth_dev *dev, struct rte_flow *flow)
710 struct mlx5_flow *dev_flow;
712 LIST_FOREACH(dev_flow, &flow->dev_flows, next)
713 flow_drv_rxq_flags_set(dev, dev_flow);
717 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
718 * device flow if no other flow uses it with the same kind of request.
721 * Pointer to Ethernet device.
722 * @param[in] dev_flow
723 * Pointer to the device flow.
726 flow_drv_rxq_flags_trim(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow)
728 struct mlx5_priv *priv = dev->data->dev_private;
729 struct rte_flow *flow = dev_flow->flow;
730 const int mark = !!(dev_flow->actions &
731 (MLX5_FLOW_ACTION_FLAG | MLX5_FLOW_ACTION_MARK));
732 const int tunnel = !!(dev_flow->layers & MLX5_FLOW_LAYER_TUNNEL);
735 assert(dev->data->dev_started);
736 for (i = 0; i != flow->rss.queue_num; ++i) {
737 int idx = (*flow->rss.queue)[i];
738 struct mlx5_rxq_ctrl *rxq_ctrl =
739 container_of((*priv->rxqs)[idx],
740 struct mlx5_rxq_ctrl, rxq);
743 rxq_ctrl->flow_mark_n--;
744 rxq_ctrl->rxq.mark = !!rxq_ctrl->flow_mark_n;
749 /* Decrease the counter matching the flow. */
750 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j) {
751 if ((tunnels_info[j].tunnel &
753 tunnels_info[j].tunnel) {
754 rxq_ctrl->flow_tunnels_n[j]--;
758 flow_rxq_tunnel_ptype_update(rxq_ctrl);
764 * Clear the Rx queue flags (Mark/Flag and Tunnel Ptype) associated with the
765 * @p flow if no other flow uses it with the same kind of request.
768 * Pointer to Ethernet device.
770 * Pointer to the flow.
773 flow_rxq_flags_trim(struct rte_eth_dev *dev, struct rte_flow *flow)
775 struct mlx5_flow *dev_flow;
777 LIST_FOREACH(dev_flow, &flow->dev_flows, next)
778 flow_drv_rxq_flags_trim(dev, dev_flow);
782 * Clear the Mark/Flag and Tunnel ptype information in all Rx queues.
785 * Pointer to Ethernet device.
788 flow_rxq_flags_clear(struct rte_eth_dev *dev)
790 struct mlx5_priv *priv = dev->data->dev_private;
793 for (i = 0; i != priv->rxqs_n; ++i) {
794 struct mlx5_rxq_ctrl *rxq_ctrl;
797 if (!(*priv->rxqs)[i])
799 rxq_ctrl = container_of((*priv->rxqs)[i],
800 struct mlx5_rxq_ctrl, rxq);
801 rxq_ctrl->flow_mark_n = 0;
802 rxq_ctrl->rxq.mark = 0;
803 for (j = 0; j != MLX5_FLOW_TUNNEL; ++j)
804 rxq_ctrl->flow_tunnels_n[j] = 0;
805 rxq_ctrl->rxq.tunnel = 0;
810 * return a pointer to the desired action in the list of actions.
813 * The list of actions to search the action in.
815 * The action to find.
818 * Pointer to the action in the list, if found. NULL otherwise.
820 const struct rte_flow_action *
821 mlx5_flow_find_action(const struct rte_flow_action *actions,
822 enum rte_flow_action_type action)
826 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++)
827 if (actions->type == action)
833 * Validate the flag action.
835 * @param[in] action_flags
836 * Bit-fields that holds the actions detected until now.
838 * Attributes of flow that includes this action.
840 * Pointer to error structure.
843 * 0 on success, a negative errno value otherwise and rte_errno is set.
846 mlx5_flow_validate_action_flag(uint64_t action_flags,
847 const struct rte_flow_attr *attr,
848 struct rte_flow_error *error)
851 if (action_flags & MLX5_FLOW_ACTION_DROP)
852 return rte_flow_error_set(error, EINVAL,
853 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
854 "can't drop and flag in same flow");
855 if (action_flags & MLX5_FLOW_ACTION_MARK)
856 return rte_flow_error_set(error, EINVAL,
857 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
858 "can't mark and flag in same flow");
859 if (action_flags & MLX5_FLOW_ACTION_FLAG)
860 return rte_flow_error_set(error, EINVAL,
861 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
863 " actions in same flow");
865 return rte_flow_error_set(error, ENOTSUP,
866 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
867 "flag action not supported for "
873 * Validate the mark action.
876 * Pointer to the queue action.
877 * @param[in] action_flags
878 * Bit-fields that holds the actions detected until now.
880 * Attributes of flow that includes this action.
882 * Pointer to error structure.
885 * 0 on success, a negative errno value otherwise and rte_errno is set.
888 mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
889 uint64_t action_flags,
890 const struct rte_flow_attr *attr,
891 struct rte_flow_error *error)
893 const struct rte_flow_action_mark *mark = action->conf;
896 return rte_flow_error_set(error, EINVAL,
897 RTE_FLOW_ERROR_TYPE_ACTION,
899 "configuration cannot be null");
900 if (mark->id >= MLX5_FLOW_MARK_MAX)
901 return rte_flow_error_set(error, EINVAL,
902 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
904 "mark id must in 0 <= id < "
905 RTE_STR(MLX5_FLOW_MARK_MAX));
906 if (action_flags & MLX5_FLOW_ACTION_DROP)
907 return rte_flow_error_set(error, EINVAL,
908 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
909 "can't drop and mark in same flow");
910 if (action_flags & MLX5_FLOW_ACTION_FLAG)
911 return rte_flow_error_set(error, EINVAL,
912 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
913 "can't flag and mark in same flow");
914 if (action_flags & MLX5_FLOW_ACTION_MARK)
915 return rte_flow_error_set(error, EINVAL,
916 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
917 "can't have 2 mark actions in same"
920 return rte_flow_error_set(error, ENOTSUP,
921 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
922 "mark action not supported for "
928 * Validate the drop action.
930 * @param[in] action_flags
931 * Bit-fields that holds the actions detected until now.
933 * Attributes of flow that includes this action.
935 * Pointer to error structure.
938 * 0 on success, a negative errno value otherwise and rte_errno is set.
941 mlx5_flow_validate_action_drop(uint64_t action_flags,
942 const struct rte_flow_attr *attr,
943 struct rte_flow_error *error)
945 if (action_flags & MLX5_FLOW_ACTION_FLAG)
946 return rte_flow_error_set(error, EINVAL,
947 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
948 "can't drop and flag in same flow");
949 if (action_flags & MLX5_FLOW_ACTION_MARK)
950 return rte_flow_error_set(error, EINVAL,
951 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
952 "can't drop and mark in same flow");
953 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
954 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
955 return rte_flow_error_set(error, EINVAL,
956 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
957 "can't have 2 fate actions in"
960 return rte_flow_error_set(error, ENOTSUP,
961 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
962 "drop action not supported for "
968 * Validate the queue action.
971 * Pointer to the queue action.
972 * @param[in] action_flags
973 * Bit-fields that holds the actions detected until now.
975 * Pointer to the Ethernet device structure.
977 * Attributes of flow that includes this action.
979 * Pointer to error structure.
982 * 0 on success, a negative errno value otherwise and rte_errno is set.
985 mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
986 uint64_t action_flags,
987 struct rte_eth_dev *dev,
988 const struct rte_flow_attr *attr,
989 struct rte_flow_error *error)
991 struct mlx5_priv *priv = dev->data->dev_private;
992 const struct rte_flow_action_queue *queue = action->conf;
994 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
995 return rte_flow_error_set(error, EINVAL,
996 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
997 "can't have 2 fate actions in"
1000 return rte_flow_error_set(error, EINVAL,
1001 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1002 NULL, "No Rx queues configured");
1003 if (queue->index >= priv->rxqs_n)
1004 return rte_flow_error_set(error, EINVAL,
1005 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1007 "queue index out of range");
1008 if (!(*priv->rxqs)[queue->index])
1009 return rte_flow_error_set(error, EINVAL,
1010 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1012 "queue is not configured");
1014 return rte_flow_error_set(error, ENOTSUP,
1015 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1016 "queue action not supported for "
1022 * Validate the rss action.
1025 * Pointer to the queue action.
1026 * @param[in] action_flags
1027 * Bit-fields that holds the actions detected until now.
1029 * Pointer to the Ethernet device structure.
1031 * Attributes of flow that includes this action.
1032 * @param[in] item_flags
1033 * Items that were detected.
1035 * Pointer to error structure.
1038 * 0 on success, a negative errno value otherwise and rte_errno is set.
1041 mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
1042 uint64_t action_flags,
1043 struct rte_eth_dev *dev,
1044 const struct rte_flow_attr *attr,
1045 uint64_t item_flags,
1046 struct rte_flow_error *error)
1048 struct mlx5_priv *priv = dev->data->dev_private;
1049 const struct rte_flow_action_rss *rss = action->conf;
1050 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1053 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
1054 return rte_flow_error_set(error, EINVAL,
1055 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1056 "can't have 2 fate actions"
1058 if (rss->func != RTE_ETH_HASH_FUNCTION_DEFAULT &&
1059 rss->func != RTE_ETH_HASH_FUNCTION_TOEPLITZ)
1060 return rte_flow_error_set(error, ENOTSUP,
1061 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1063 "RSS hash function not supported");
1064 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
1069 return rte_flow_error_set(error, ENOTSUP,
1070 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1072 "tunnel RSS is not supported");
1073 /* allow RSS key_len 0 in case of NULL (default) RSS key. */
1074 if (rss->key_len == 0 && rss->key != NULL)
1075 return rte_flow_error_set(error, ENOTSUP,
1076 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1078 "RSS hash key length 0");
1079 if (rss->key_len > 0 && rss->key_len < MLX5_RSS_HASH_KEY_LEN)
1080 return rte_flow_error_set(error, ENOTSUP,
1081 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1083 "RSS hash key too small");
1084 if (rss->key_len > MLX5_RSS_HASH_KEY_LEN)
1085 return rte_flow_error_set(error, ENOTSUP,
1086 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1088 "RSS hash key too large");
1089 if (rss->queue_num > priv->config.ind_table_max_size)
1090 return rte_flow_error_set(error, ENOTSUP,
1091 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1093 "number of queues too large");
1094 if (rss->types & MLX5_RSS_HF_MASK)
1095 return rte_flow_error_set(error, ENOTSUP,
1096 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1098 "some RSS protocols are not"
1101 return rte_flow_error_set(error, EINVAL,
1102 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1103 NULL, "No Rx queues configured");
1104 if (!rss->queue_num)
1105 return rte_flow_error_set(error, EINVAL,
1106 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1107 NULL, "No queues configured");
1108 for (i = 0; i != rss->queue_num; ++i) {
1109 if (!(*priv->rxqs)[rss->queue[i]])
1110 return rte_flow_error_set
1111 (error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1112 &rss->queue[i], "queue is not configured");
1115 return rte_flow_error_set(error, ENOTSUP,
1116 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1117 "rss action not supported for "
1119 if (rss->level > 1 && !tunnel)
1120 return rte_flow_error_set(error, EINVAL,
1121 RTE_FLOW_ERROR_TYPE_ACTION_CONF, NULL,
1122 "inner RSS is not supported for "
1123 "non-tunnel flows");
1128 * Validate the count action.
1131 * Pointer to the Ethernet device structure.
1133 * Attributes of flow that includes this action.
1135 * Pointer to error structure.
1138 * 0 on success, a negative errno value otherwise and rte_errno is set.
1141 mlx5_flow_validate_action_count(struct rte_eth_dev *dev __rte_unused,
1142 const struct rte_flow_attr *attr,
1143 struct rte_flow_error *error)
1146 return rte_flow_error_set(error, ENOTSUP,
1147 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1148 "count action not supported for "
1154 * Verify the @p attributes will be correctly understood by the NIC and store
1155 * them in the @p flow if everything is correct.
1158 * Pointer to the Ethernet device structure.
1159 * @param[in] attributes
1160 * Pointer to flow attributes
1162 * Pointer to error structure.
1165 * 0 on success, a negative errno value otherwise and rte_errno is set.
1168 mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
1169 const struct rte_flow_attr *attributes,
1170 struct rte_flow_error *error)
1172 struct mlx5_priv *priv = dev->data->dev_private;
1173 uint32_t priority_max = priv->config.flow_prio - 1;
1175 if (attributes->group)
1176 return rte_flow_error_set(error, ENOTSUP,
1177 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
1178 NULL, "groups is not supported");
1179 if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
1180 attributes->priority >= priority_max)
1181 return rte_flow_error_set(error, ENOTSUP,
1182 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
1183 NULL, "priority out of range");
1184 if (attributes->egress)
1185 return rte_flow_error_set(error, ENOTSUP,
1186 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, NULL,
1187 "egress is not supported");
1188 if (attributes->transfer && !priv->config.dv_esw_en)
1189 return rte_flow_error_set(error, ENOTSUP,
1190 RTE_FLOW_ERROR_TYPE_ATTR_TRANSFER,
1191 NULL, "transfer is not supported");
1192 if (!attributes->ingress)
1193 return rte_flow_error_set(error, EINVAL,
1194 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
1196 "ingress attribute is mandatory");
1201 * Validate ICMP6 item.
1204 * Item specification.
1205 * @param[in] item_flags
1206 * Bit-fields that holds the items detected until now.
1208 * Pointer to error structure.
1211 * 0 on success, a negative errno value otherwise and rte_errno is set.
1214 mlx5_flow_validate_item_icmp6(const struct rte_flow_item *item,
1215 uint64_t item_flags,
1216 uint8_t target_protocol,
1217 struct rte_flow_error *error)
1219 const struct rte_flow_item_icmp6 *mask = item->mask;
1220 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1221 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
1222 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
1223 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1224 MLX5_FLOW_LAYER_OUTER_L4;
1227 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMPV6)
1228 return rte_flow_error_set(error, EINVAL,
1229 RTE_FLOW_ERROR_TYPE_ITEM, item,
1230 "protocol filtering not compatible"
1231 " with ICMP6 layer");
1232 if (!(item_flags & l3m))
1233 return rte_flow_error_set(error, EINVAL,
1234 RTE_FLOW_ERROR_TYPE_ITEM, item,
1235 "IPv6 is mandatory to filter on"
1237 if (item_flags & l4m)
1238 return rte_flow_error_set(error, EINVAL,
1239 RTE_FLOW_ERROR_TYPE_ITEM, item,
1240 "multiple L4 layers not supported");
1242 mask = &rte_flow_item_icmp6_mask;
1243 ret = mlx5_flow_item_acceptable
1244 (item, (const uint8_t *)mask,
1245 (const uint8_t *)&rte_flow_item_icmp6_mask,
1246 sizeof(struct rte_flow_item_icmp6), error);
1253 * Validate ICMP item.
1256 * Item specification.
1257 * @param[in] item_flags
1258 * Bit-fields that holds the items detected until now.
1260 * Pointer to error structure.
1263 * 0 on success, a negative errno value otherwise and rte_errno is set.
1266 mlx5_flow_validate_item_icmp(const struct rte_flow_item *item,
1267 uint64_t item_flags,
1268 uint8_t target_protocol,
1269 struct rte_flow_error *error)
1271 const struct rte_flow_item_icmp *mask = item->mask;
1272 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1273 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
1274 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
1275 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1276 MLX5_FLOW_LAYER_OUTER_L4;
1279 if (target_protocol != 0xFF && target_protocol != IPPROTO_ICMP)
1280 return rte_flow_error_set(error, EINVAL,
1281 RTE_FLOW_ERROR_TYPE_ITEM, item,
1282 "protocol filtering not compatible"
1283 " with ICMP layer");
1284 if (!(item_flags & l3m))
1285 return rte_flow_error_set(error, EINVAL,
1286 RTE_FLOW_ERROR_TYPE_ITEM, item,
1287 "IPv4 is mandatory to filter"
1289 if (item_flags & l4m)
1290 return rte_flow_error_set(error, EINVAL,
1291 RTE_FLOW_ERROR_TYPE_ITEM, item,
1292 "multiple L4 layers not supported");
1294 mask = &rte_flow_item_icmp_mask;
1295 ret = mlx5_flow_item_acceptable
1296 (item, (const uint8_t *)mask,
1297 (const uint8_t *)&rte_flow_item_icmp_mask,
1298 sizeof(struct rte_flow_item_icmp), error);
1305 * Validate Ethernet item.
1308 * Item specification.
1309 * @param[in] item_flags
1310 * Bit-fields that holds the items detected until now.
1312 * Pointer to error structure.
1315 * 0 on success, a negative errno value otherwise and rte_errno is set.
1318 mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
1319 uint64_t item_flags,
1320 struct rte_flow_error *error)
1322 const struct rte_flow_item_eth *mask = item->mask;
1323 const struct rte_flow_item_eth nic_mask = {
1324 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1325 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
1326 .type = RTE_BE16(0xffff),
1329 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1330 const uint64_t ethm = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
1331 MLX5_FLOW_LAYER_OUTER_L2;
1333 if (item_flags & ethm)
1334 return rte_flow_error_set(error, ENOTSUP,
1335 RTE_FLOW_ERROR_TYPE_ITEM, item,
1336 "multiple L2 layers not supported");
1337 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_L3)) ||
1338 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_L3)))
1339 return rte_flow_error_set(error, EINVAL,
1340 RTE_FLOW_ERROR_TYPE_ITEM, item,
1341 "L2 layer should not follow "
1343 if ((!tunnel && (item_flags & MLX5_FLOW_LAYER_OUTER_VLAN)) ||
1344 (tunnel && (item_flags & MLX5_FLOW_LAYER_INNER_VLAN)))
1345 return rte_flow_error_set(error, EINVAL,
1346 RTE_FLOW_ERROR_TYPE_ITEM, item,
1347 "L2 layer should not follow VLAN");
1349 mask = &rte_flow_item_eth_mask;
1350 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1351 (const uint8_t *)&nic_mask,
1352 sizeof(struct rte_flow_item_eth),
1358 * Validate VLAN item.
1361 * Item specification.
1362 * @param[in] item_flags
1363 * Bit-fields that holds the items detected until now.
1365 * Ethernet device flow is being created on.
1367 * Pointer to error structure.
1370 * 0 on success, a negative errno value otherwise and rte_errno is set.
1373 mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
1374 uint64_t item_flags,
1375 struct rte_eth_dev *dev,
1376 struct rte_flow_error *error)
1378 const struct rte_flow_item_vlan *spec = item->spec;
1379 const struct rte_flow_item_vlan *mask = item->mask;
1380 const struct rte_flow_item_vlan nic_mask = {
1381 .tci = RTE_BE16(UINT16_MAX),
1382 .inner_type = RTE_BE16(UINT16_MAX),
1384 uint16_t vlan_tag = 0;
1385 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1387 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
1388 MLX5_FLOW_LAYER_INNER_L4) :
1389 (MLX5_FLOW_LAYER_OUTER_L3 |
1390 MLX5_FLOW_LAYER_OUTER_L4);
1391 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
1392 MLX5_FLOW_LAYER_OUTER_VLAN;
1394 if (item_flags & vlanm)
1395 return rte_flow_error_set(error, EINVAL,
1396 RTE_FLOW_ERROR_TYPE_ITEM, item,
1397 "multiple VLAN layers not supported");
1398 else if ((item_flags & l34m) != 0)
1399 return rte_flow_error_set(error, EINVAL,
1400 RTE_FLOW_ERROR_TYPE_ITEM, item,
1401 "VLAN cannot follow L3/L4 layer");
1403 mask = &rte_flow_item_vlan_mask;
1404 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1405 (const uint8_t *)&nic_mask,
1406 sizeof(struct rte_flow_item_vlan),
1410 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
1411 struct mlx5_priv *priv = dev->data->dev_private;
1413 if (priv->vmwa_context) {
1415 * Non-NULL context means we have a virtual machine
1416 * and SR-IOV enabled, we have to create VLAN interface
1417 * to make hypervisor to setup E-Switch vport
1418 * context correctly. We avoid creating the multiple
1419 * VLAN interfaces, so we cannot support VLAN tag mask.
1421 return rte_flow_error_set(error, EINVAL,
1422 RTE_FLOW_ERROR_TYPE_ITEM,
1424 "VLAN tag mask is not"
1425 " supported in virtual"
1430 vlan_tag = spec->tci;
1431 vlan_tag &= mask->tci;
1434 * From verbs perspective an empty VLAN is equivalent
1435 * to a packet without VLAN layer.
1438 return rte_flow_error_set(error, EINVAL,
1439 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1441 "VLAN cannot be empty");
1446 * Validate IPV4 item.
1449 * Item specification.
1450 * @param[in] item_flags
1451 * Bit-fields that holds the items detected until now.
1452 * @param[in] acc_mask
1453 * Acceptable mask, if NULL default internal default mask
1454 * will be used to check whether item fields are supported.
1456 * Pointer to error structure.
1459 * 0 on success, a negative errno value otherwise and rte_errno is set.
1462 mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
1463 uint64_t item_flags,
1465 uint16_t ether_type,
1466 const struct rte_flow_item_ipv4 *acc_mask,
1467 struct rte_flow_error *error)
1469 const struct rte_flow_item_ipv4 *mask = item->mask;
1470 const struct rte_flow_item_ipv4 *spec = item->spec;
1471 const struct rte_flow_item_ipv4 nic_mask = {
1473 .src_addr = RTE_BE32(0xffffffff),
1474 .dst_addr = RTE_BE32(0xffffffff),
1475 .type_of_service = 0xff,
1476 .next_proto_id = 0xff,
1479 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1480 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1481 MLX5_FLOW_LAYER_OUTER_L3;
1482 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1483 MLX5_FLOW_LAYER_OUTER_L4;
1485 uint8_t next_proto = 0xFF;
1486 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1487 MLX5_FLOW_LAYER_OUTER_VLAN |
1488 MLX5_FLOW_LAYER_INNER_VLAN);
1490 if ((last_item & l2_vlan) && ether_type &&
1491 ether_type != RTE_ETHER_TYPE_IPV4)
1492 return rte_flow_error_set(error, EINVAL,
1493 RTE_FLOW_ERROR_TYPE_ITEM, item,
1494 "IPv4 cannot follow L2/VLAN layer "
1495 "which ether type is not IPv4");
1496 if (item_flags & MLX5_FLOW_LAYER_IPIP) {
1498 next_proto = mask->hdr.next_proto_id &
1499 spec->hdr.next_proto_id;
1500 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1501 return rte_flow_error_set(error, EINVAL,
1502 RTE_FLOW_ERROR_TYPE_ITEM,
1507 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP)
1508 return rte_flow_error_set(error, EINVAL,
1509 RTE_FLOW_ERROR_TYPE_ITEM, item,
1510 "wrong tunnel type - IPv6 specified "
1511 "but IPv4 item provided");
1512 if (item_flags & l3m)
1513 return rte_flow_error_set(error, ENOTSUP,
1514 RTE_FLOW_ERROR_TYPE_ITEM, item,
1515 "multiple L3 layers not supported");
1516 else if (item_flags & l4m)
1517 return rte_flow_error_set(error, EINVAL,
1518 RTE_FLOW_ERROR_TYPE_ITEM, item,
1519 "L3 cannot follow an L4 layer.");
1520 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1521 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1522 return rte_flow_error_set(error, EINVAL,
1523 RTE_FLOW_ERROR_TYPE_ITEM, item,
1524 "L3 cannot follow an NVGRE layer.");
1526 mask = &rte_flow_item_ipv4_mask;
1527 else if (mask->hdr.next_proto_id != 0 &&
1528 mask->hdr.next_proto_id != 0xff)
1529 return rte_flow_error_set(error, EINVAL,
1530 RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
1531 "partial mask is not supported"
1533 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1534 acc_mask ? (const uint8_t *)acc_mask
1535 : (const uint8_t *)&nic_mask,
1536 sizeof(struct rte_flow_item_ipv4),
1544 * Validate IPV6 item.
1547 * Item specification.
1548 * @param[in] item_flags
1549 * Bit-fields that holds the items detected until now.
1550 * @param[in] acc_mask
1551 * Acceptable mask, if NULL default internal default mask
1552 * will be used to check whether item fields are supported.
1554 * Pointer to error structure.
1557 * 0 on success, a negative errno value otherwise and rte_errno is set.
1560 mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
1561 uint64_t item_flags,
1563 uint16_t ether_type,
1564 const struct rte_flow_item_ipv6 *acc_mask,
1565 struct rte_flow_error *error)
1567 const struct rte_flow_item_ipv6 *mask = item->mask;
1568 const struct rte_flow_item_ipv6 *spec = item->spec;
1569 const struct rte_flow_item_ipv6 nic_mask = {
1572 "\xff\xff\xff\xff\xff\xff\xff\xff"
1573 "\xff\xff\xff\xff\xff\xff\xff\xff",
1575 "\xff\xff\xff\xff\xff\xff\xff\xff"
1576 "\xff\xff\xff\xff\xff\xff\xff\xff",
1577 .vtc_flow = RTE_BE32(0xffffffff),
1582 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1583 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1584 MLX5_FLOW_LAYER_OUTER_L3;
1585 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1586 MLX5_FLOW_LAYER_OUTER_L4;
1588 uint8_t next_proto = 0xFF;
1589 const uint64_t l2_vlan = (MLX5_FLOW_LAYER_L2 |
1590 MLX5_FLOW_LAYER_OUTER_VLAN |
1591 MLX5_FLOW_LAYER_INNER_VLAN);
1593 if ((last_item & l2_vlan) && ether_type &&
1594 ether_type != RTE_ETHER_TYPE_IPV6)
1595 return rte_flow_error_set(error, EINVAL,
1596 RTE_FLOW_ERROR_TYPE_ITEM, item,
1597 "IPv6 cannot follow L2/VLAN layer "
1598 "which ether type is not IPv6");
1599 if (item_flags & MLX5_FLOW_LAYER_IPV6_ENCAP) {
1601 next_proto = mask->hdr.proto & spec->hdr.proto;
1602 if (next_proto == IPPROTO_IPIP || next_proto == IPPROTO_IPV6)
1603 return rte_flow_error_set(error, EINVAL,
1604 RTE_FLOW_ERROR_TYPE_ITEM,
1609 if (item_flags & MLX5_FLOW_LAYER_IPIP)
1610 return rte_flow_error_set(error, EINVAL,
1611 RTE_FLOW_ERROR_TYPE_ITEM, item,
1612 "wrong tunnel type - IPv4 specified "
1613 "but IPv6 item provided");
1614 if (item_flags & l3m)
1615 return rte_flow_error_set(error, ENOTSUP,
1616 RTE_FLOW_ERROR_TYPE_ITEM, item,
1617 "multiple L3 layers not supported");
1618 else if (item_flags & l4m)
1619 return rte_flow_error_set(error, EINVAL,
1620 RTE_FLOW_ERROR_TYPE_ITEM, item,
1621 "L3 cannot follow an L4 layer.");
1622 else if ((item_flags & MLX5_FLOW_LAYER_NVGRE) &&
1623 !(item_flags & MLX5_FLOW_LAYER_INNER_L2))
1624 return rte_flow_error_set(error, EINVAL,
1625 RTE_FLOW_ERROR_TYPE_ITEM, item,
1626 "L3 cannot follow an NVGRE layer.");
1628 mask = &rte_flow_item_ipv6_mask;
1629 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1630 acc_mask ? (const uint8_t *)acc_mask
1631 : (const uint8_t *)&nic_mask,
1632 sizeof(struct rte_flow_item_ipv6),
1640 * Validate UDP item.
1643 * Item specification.
1644 * @param[in] item_flags
1645 * Bit-fields that holds the items detected until now.
1646 * @param[in] target_protocol
1647 * The next protocol in the previous item.
1648 * @param[in] flow_mask
1649 * mlx5 flow-specific (DV, verbs, etc.) supported header fields mask.
1651 * Pointer to error structure.
1654 * 0 on success, a negative errno value otherwise and rte_errno is set.
1657 mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
1658 uint64_t item_flags,
1659 uint8_t target_protocol,
1660 struct rte_flow_error *error)
1662 const struct rte_flow_item_udp *mask = item->mask;
1663 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1664 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1665 MLX5_FLOW_LAYER_OUTER_L3;
1666 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1667 MLX5_FLOW_LAYER_OUTER_L4;
1670 if (target_protocol != 0xff && target_protocol != IPPROTO_UDP)
1671 return rte_flow_error_set(error, EINVAL,
1672 RTE_FLOW_ERROR_TYPE_ITEM, item,
1673 "protocol filtering not compatible"
1675 if (!(item_flags & l3m))
1676 return rte_flow_error_set(error, EINVAL,
1677 RTE_FLOW_ERROR_TYPE_ITEM, item,
1678 "L3 is mandatory to filter on L4");
1679 if (item_flags & l4m)
1680 return rte_flow_error_set(error, EINVAL,
1681 RTE_FLOW_ERROR_TYPE_ITEM, item,
1682 "multiple L4 layers not supported");
1684 mask = &rte_flow_item_udp_mask;
1685 ret = mlx5_flow_item_acceptable
1686 (item, (const uint8_t *)mask,
1687 (const uint8_t *)&rte_flow_item_udp_mask,
1688 sizeof(struct rte_flow_item_udp), error);
1695 * Validate TCP item.
1698 * Item specification.
1699 * @param[in] item_flags
1700 * Bit-fields that holds the items detected until now.
1701 * @param[in] target_protocol
1702 * The next protocol in the previous item.
1704 * Pointer to error structure.
1707 * 0 on success, a negative errno value otherwise and rte_errno is set.
1710 mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
1711 uint64_t item_flags,
1712 uint8_t target_protocol,
1713 const struct rte_flow_item_tcp *flow_mask,
1714 struct rte_flow_error *error)
1716 const struct rte_flow_item_tcp *mask = item->mask;
1717 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
1718 const uint64_t l3m = tunnel ? MLX5_FLOW_LAYER_INNER_L3 :
1719 MLX5_FLOW_LAYER_OUTER_L3;
1720 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
1721 MLX5_FLOW_LAYER_OUTER_L4;
1725 if (target_protocol != 0xff && target_protocol != IPPROTO_TCP)
1726 return rte_flow_error_set(error, EINVAL,
1727 RTE_FLOW_ERROR_TYPE_ITEM, item,
1728 "protocol filtering not compatible"
1730 if (!(item_flags & l3m))
1731 return rte_flow_error_set(error, EINVAL,
1732 RTE_FLOW_ERROR_TYPE_ITEM, item,
1733 "L3 is mandatory to filter on L4");
1734 if (item_flags & l4m)
1735 return rte_flow_error_set(error, EINVAL,
1736 RTE_FLOW_ERROR_TYPE_ITEM, item,
1737 "multiple L4 layers not supported");
1739 mask = &rte_flow_item_tcp_mask;
1740 ret = mlx5_flow_item_acceptable
1741 (item, (const uint8_t *)mask,
1742 (const uint8_t *)flow_mask,
1743 sizeof(struct rte_flow_item_tcp), error);
1750 * Validate VXLAN item.
1753 * Item specification.
1754 * @param[in] item_flags
1755 * Bit-fields that holds the items detected until now.
1756 * @param[in] target_protocol
1757 * The next protocol in the previous item.
1759 * Pointer to error structure.
1762 * 0 on success, a negative errno value otherwise and rte_errno is set.
1765 mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
1766 uint64_t item_flags,
1767 struct rte_flow_error *error)
1769 const struct rte_flow_item_vxlan *spec = item->spec;
1770 const struct rte_flow_item_vxlan *mask = item->mask;
1775 } id = { .vlan_id = 0, };
1776 uint32_t vlan_id = 0;
1779 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1780 return rte_flow_error_set(error, ENOTSUP,
1781 RTE_FLOW_ERROR_TYPE_ITEM, item,
1782 "multiple tunnel layers not"
1785 * Verify only UDPv4 is present as defined in
1786 * https://tools.ietf.org/html/rfc7348
1788 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1789 return rte_flow_error_set(error, EINVAL,
1790 RTE_FLOW_ERROR_TYPE_ITEM, item,
1791 "no outer UDP layer found");
1793 mask = &rte_flow_item_vxlan_mask;
1794 ret = mlx5_flow_item_acceptable
1795 (item, (const uint8_t *)mask,
1796 (const uint8_t *)&rte_flow_item_vxlan_mask,
1797 sizeof(struct rte_flow_item_vxlan),
1802 memcpy(&id.vni[1], spec->vni, 3);
1803 vlan_id = id.vlan_id;
1804 memcpy(&id.vni[1], mask->vni, 3);
1805 vlan_id &= id.vlan_id;
1808 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if
1809 * only this layer is defined in the Verbs specification it is
1810 * interpreted as wildcard and all packets will match this
1811 * rule, if it follows a full stack layer (ex: eth / ipv4 /
1812 * udp), all packets matching the layers before will also
1813 * match this rule. To avoid such situation, VNI 0 is
1814 * currently refused.
1817 return rte_flow_error_set(error, ENOTSUP,
1818 RTE_FLOW_ERROR_TYPE_ITEM, item,
1819 "VXLAN vni cannot be 0");
1820 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1821 return rte_flow_error_set(error, ENOTSUP,
1822 RTE_FLOW_ERROR_TYPE_ITEM, item,
1823 "VXLAN tunnel must be fully defined");
1828 * Validate VXLAN_GPE item.
1831 * Item specification.
1832 * @param[in] item_flags
1833 * Bit-fields that holds the items detected until now.
1835 * Pointer to the private data structure.
1836 * @param[in] target_protocol
1837 * The next protocol in the previous item.
1839 * Pointer to error structure.
1842 * 0 on success, a negative errno value otherwise and rte_errno is set.
1845 mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
1846 uint64_t item_flags,
1847 struct rte_eth_dev *dev,
1848 struct rte_flow_error *error)
1850 struct mlx5_priv *priv = dev->data->dev_private;
1851 const struct rte_flow_item_vxlan_gpe *spec = item->spec;
1852 const struct rte_flow_item_vxlan_gpe *mask = item->mask;
1857 } id = { .vlan_id = 0, };
1858 uint32_t vlan_id = 0;
1860 if (!priv->config.l3_vxlan_en)
1861 return rte_flow_error_set(error, ENOTSUP,
1862 RTE_FLOW_ERROR_TYPE_ITEM, item,
1863 "L3 VXLAN is not enabled by device"
1864 " parameter and/or not configured in"
1866 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
1867 return rte_flow_error_set(error, ENOTSUP,
1868 RTE_FLOW_ERROR_TYPE_ITEM, item,
1869 "multiple tunnel layers not"
1872 * Verify only UDPv4 is present as defined in
1873 * https://tools.ietf.org/html/rfc7348
1875 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
1876 return rte_flow_error_set(error, EINVAL,
1877 RTE_FLOW_ERROR_TYPE_ITEM, item,
1878 "no outer UDP layer found");
1880 mask = &rte_flow_item_vxlan_gpe_mask;
1881 ret = mlx5_flow_item_acceptable
1882 (item, (const uint8_t *)mask,
1883 (const uint8_t *)&rte_flow_item_vxlan_gpe_mask,
1884 sizeof(struct rte_flow_item_vxlan_gpe),
1890 return rte_flow_error_set(error, ENOTSUP,
1891 RTE_FLOW_ERROR_TYPE_ITEM,
1893 "VxLAN-GPE protocol"
1895 memcpy(&id.vni[1], spec->vni, 3);
1896 vlan_id = id.vlan_id;
1897 memcpy(&id.vni[1], mask->vni, 3);
1898 vlan_id &= id.vlan_id;
1901 * Tunnel id 0 is equivalent as not adding a VXLAN layer, if only this
1902 * layer is defined in the Verbs specification it is interpreted as
1903 * wildcard and all packets will match this rule, if it follows a full
1904 * stack layer (ex: eth / ipv4 / udp), all packets matching the layers
1905 * before will also match this rule. To avoid such situation, VNI 0
1906 * is currently refused.
1909 return rte_flow_error_set(error, ENOTSUP,
1910 RTE_FLOW_ERROR_TYPE_ITEM, item,
1911 "VXLAN-GPE vni cannot be 0");
1912 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
1913 return rte_flow_error_set(error, ENOTSUP,
1914 RTE_FLOW_ERROR_TYPE_ITEM, item,
1915 "VXLAN-GPE tunnel must be fully"
1920 * Validate GRE Key item.
1923 * Item specification.
1924 * @param[in] item_flags
1925 * Bit flags to mark detected items.
1926 * @param[in] gre_item
1927 * Pointer to gre_item
1929 * Pointer to error structure.
1932 * 0 on success, a negative errno value otherwise and rte_errno is set.
1935 mlx5_flow_validate_item_gre_key(const struct rte_flow_item *item,
1936 uint64_t item_flags,
1937 const struct rte_flow_item *gre_item,
1938 struct rte_flow_error *error)
1940 const rte_be32_t *mask = item->mask;
1942 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
1943 const struct rte_flow_item_gre *gre_spec = gre_item->spec;
1944 const struct rte_flow_item_gre *gre_mask = gre_item->mask;
1946 if (item_flags & MLX5_FLOW_LAYER_GRE_KEY)
1947 return rte_flow_error_set(error, ENOTSUP,
1948 RTE_FLOW_ERROR_TYPE_ITEM, item,
1949 "Multiple GRE key not support");
1950 if (!(item_flags & MLX5_FLOW_LAYER_GRE))
1951 return rte_flow_error_set(error, ENOTSUP,
1952 RTE_FLOW_ERROR_TYPE_ITEM, item,
1953 "No preceding GRE header");
1954 if (item_flags & MLX5_FLOW_LAYER_INNER)
1955 return rte_flow_error_set(error, ENOTSUP,
1956 RTE_FLOW_ERROR_TYPE_ITEM, item,
1957 "GRE key following a wrong item");
1959 gre_mask = &rte_flow_item_gre_mask;
1960 if (gre_spec && (gre_mask->c_rsvd0_ver & RTE_BE16(0x2000)) &&
1961 !(gre_spec->c_rsvd0_ver & RTE_BE16(0x2000)))
1962 return rte_flow_error_set(error, EINVAL,
1963 RTE_FLOW_ERROR_TYPE_ITEM, item,
1964 "Key bit must be on");
1967 mask = &gre_key_default_mask;
1968 ret = mlx5_flow_item_acceptable
1969 (item, (const uint8_t *)mask,
1970 (const uint8_t *)&gre_key_default_mask,
1971 sizeof(rte_be32_t), error);
1976 * Validate GRE item.
1979 * Item specification.
1980 * @param[in] item_flags
1981 * Bit flags to mark detected items.
1982 * @param[in] target_protocol
1983 * The next protocol in the previous item.
1985 * Pointer to error structure.
1988 * 0 on success, a negative errno value otherwise and rte_errno is set.
1991 mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
1992 uint64_t item_flags,
1993 uint8_t target_protocol,
1994 struct rte_flow_error *error)
1996 const struct rte_flow_item_gre *spec __rte_unused = item->spec;
1997 const struct rte_flow_item_gre *mask = item->mask;
1999 const struct rte_flow_item_gre nic_mask = {
2000 .c_rsvd0_ver = RTE_BE16(0xB000),
2001 .protocol = RTE_BE16(UINT16_MAX),
2004 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2005 return rte_flow_error_set(error, EINVAL,
2006 RTE_FLOW_ERROR_TYPE_ITEM, item,
2007 "protocol filtering not compatible"
2008 " with this GRE layer");
2009 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2010 return rte_flow_error_set(error, ENOTSUP,
2011 RTE_FLOW_ERROR_TYPE_ITEM, item,
2012 "multiple tunnel layers not"
2014 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2015 return rte_flow_error_set(error, ENOTSUP,
2016 RTE_FLOW_ERROR_TYPE_ITEM, item,
2017 "L3 Layer is missing");
2019 mask = &rte_flow_item_gre_mask;
2020 ret = mlx5_flow_item_acceptable
2021 (item, (const uint8_t *)mask,
2022 (const uint8_t *)&nic_mask,
2023 sizeof(struct rte_flow_item_gre), error);
2026 #ifndef HAVE_MLX5DV_DR
2027 #ifndef HAVE_IBV_DEVICE_MPLS_SUPPORT
2028 if (spec && (spec->protocol & mask->protocol))
2029 return rte_flow_error_set(error, ENOTSUP,
2030 RTE_FLOW_ERROR_TYPE_ITEM, item,
2031 "without MPLS support the"
2032 " specification cannot be used for"
2040 * Validate Geneve item.
2043 * Item specification.
2044 * @param[in] itemFlags
2045 * Bit-fields that holds the items detected until now.
2047 * Pointer to the private data structure.
2049 * Pointer to error structure.
2052 * 0 on success, a negative errno value otherwise and rte_errno is set.
2056 mlx5_flow_validate_item_geneve(const struct rte_flow_item *item,
2057 uint64_t item_flags,
2058 struct rte_eth_dev *dev,
2059 struct rte_flow_error *error)
2061 struct mlx5_priv *priv = dev->data->dev_private;
2062 const struct rte_flow_item_geneve *spec = item->spec;
2063 const struct rte_flow_item_geneve *mask = item->mask;
2066 uint8_t opt_len = priv->config.hca_attr.geneve_max_opt_len ?
2067 MLX5_GENEVE_OPT_LEN_1 : MLX5_GENEVE_OPT_LEN_0;
2068 const struct rte_flow_item_geneve nic_mask = {
2069 .ver_opt_len_o_c_rsvd0 = RTE_BE16(0x3f80),
2070 .vni = "\xff\xff\xff",
2071 .protocol = RTE_BE16(UINT16_MAX),
2074 if (!(priv->config.hca_attr.flex_parser_protocols &
2075 MLX5_HCA_FLEX_GENEVE_ENABLED) ||
2076 !priv->config.hca_attr.tunnel_stateless_geneve_rx)
2077 return rte_flow_error_set(error, ENOTSUP,
2078 RTE_FLOW_ERROR_TYPE_ITEM, item,
2079 "L3 Geneve is not enabled by device"
2080 " parameter and/or not configured in"
2082 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2083 return rte_flow_error_set(error, ENOTSUP,
2084 RTE_FLOW_ERROR_TYPE_ITEM, item,
2085 "multiple tunnel layers not"
2088 * Verify only UDPv4 is present as defined in
2089 * https://tools.ietf.org/html/rfc7348
2091 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2092 return rte_flow_error_set(error, EINVAL,
2093 RTE_FLOW_ERROR_TYPE_ITEM, item,
2094 "no outer UDP layer found");
2096 mask = &rte_flow_item_geneve_mask;
2097 ret = mlx5_flow_item_acceptable
2098 (item, (const uint8_t *)mask,
2099 (const uint8_t *)&nic_mask,
2100 sizeof(struct rte_flow_item_geneve), error);
2104 gbhdr = rte_be_to_cpu_16(spec->ver_opt_len_o_c_rsvd0);
2105 if (MLX5_GENEVE_VER_VAL(gbhdr) ||
2106 MLX5_GENEVE_CRITO_VAL(gbhdr) ||
2107 MLX5_GENEVE_RSVD_VAL(gbhdr) || spec->rsvd1)
2108 return rte_flow_error_set(error, ENOTSUP,
2109 RTE_FLOW_ERROR_TYPE_ITEM,
2111 "Geneve protocol unsupported"
2112 " fields are being used");
2113 if (MLX5_GENEVE_OPTLEN_VAL(gbhdr) > opt_len)
2114 return rte_flow_error_set
2116 RTE_FLOW_ERROR_TYPE_ITEM,
2118 "Unsupported Geneve options length");
2120 if (!(item_flags & MLX5_FLOW_LAYER_OUTER))
2121 return rte_flow_error_set
2123 RTE_FLOW_ERROR_TYPE_ITEM, item,
2124 "Geneve tunnel must be fully defined");
2129 * Validate MPLS item.
2132 * Pointer to the rte_eth_dev structure.
2134 * Item specification.
2135 * @param[in] item_flags
2136 * Bit-fields that holds the items detected until now.
2137 * @param[in] prev_layer
2138 * The protocol layer indicated in previous item.
2140 * Pointer to error structure.
2143 * 0 on success, a negative errno value otherwise and rte_errno is set.
2146 mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev __rte_unused,
2147 const struct rte_flow_item *item __rte_unused,
2148 uint64_t item_flags __rte_unused,
2149 uint64_t prev_layer __rte_unused,
2150 struct rte_flow_error *error)
2152 #ifdef HAVE_IBV_DEVICE_MPLS_SUPPORT
2153 const struct rte_flow_item_mpls *mask = item->mask;
2154 struct mlx5_priv *priv = dev->data->dev_private;
2157 if (!priv->config.mpls_en)
2158 return rte_flow_error_set(error, ENOTSUP,
2159 RTE_FLOW_ERROR_TYPE_ITEM, item,
2160 "MPLS not supported or"
2161 " disabled in firmware"
2163 /* MPLS over IP, UDP, GRE is allowed */
2164 if (!(prev_layer & (MLX5_FLOW_LAYER_OUTER_L3 |
2165 MLX5_FLOW_LAYER_OUTER_L4_UDP |
2166 MLX5_FLOW_LAYER_GRE)))
2167 return rte_flow_error_set(error, EINVAL,
2168 RTE_FLOW_ERROR_TYPE_ITEM, item,
2169 "protocol filtering not compatible"
2170 " with MPLS layer");
2171 /* Multi-tunnel isn't allowed but MPLS over GRE is an exception. */
2172 if ((item_flags & MLX5_FLOW_LAYER_TUNNEL) &&
2173 !(item_flags & MLX5_FLOW_LAYER_GRE))
2174 return rte_flow_error_set(error, ENOTSUP,
2175 RTE_FLOW_ERROR_TYPE_ITEM, item,
2176 "multiple tunnel layers not"
2179 mask = &rte_flow_item_mpls_mask;
2180 ret = mlx5_flow_item_acceptable
2181 (item, (const uint8_t *)mask,
2182 (const uint8_t *)&rte_flow_item_mpls_mask,
2183 sizeof(struct rte_flow_item_mpls), error);
2188 return rte_flow_error_set(error, ENOTSUP,
2189 RTE_FLOW_ERROR_TYPE_ITEM, item,
2190 "MPLS is not supported by Verbs, please"
2195 * Validate NVGRE item.
2198 * Item specification.
2199 * @param[in] item_flags
2200 * Bit flags to mark detected items.
2201 * @param[in] target_protocol
2202 * The next protocol in the previous item.
2204 * Pointer to error structure.
2207 * 0 on success, a negative errno value otherwise and rte_errno is set.
2210 mlx5_flow_validate_item_nvgre(const struct rte_flow_item *item,
2211 uint64_t item_flags,
2212 uint8_t target_protocol,
2213 struct rte_flow_error *error)
2215 const struct rte_flow_item_nvgre *mask = item->mask;
2218 if (target_protocol != 0xff && target_protocol != IPPROTO_GRE)
2219 return rte_flow_error_set(error, EINVAL,
2220 RTE_FLOW_ERROR_TYPE_ITEM, item,
2221 "protocol filtering not compatible"
2222 " with this GRE layer");
2223 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2224 return rte_flow_error_set(error, ENOTSUP,
2225 RTE_FLOW_ERROR_TYPE_ITEM, item,
2226 "multiple tunnel layers not"
2228 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L3))
2229 return rte_flow_error_set(error, ENOTSUP,
2230 RTE_FLOW_ERROR_TYPE_ITEM, item,
2231 "L3 Layer is missing");
2233 mask = &rte_flow_item_nvgre_mask;
2234 ret = mlx5_flow_item_acceptable
2235 (item, (const uint8_t *)mask,
2236 (const uint8_t *)&rte_flow_item_nvgre_mask,
2237 sizeof(struct rte_flow_item_nvgre), error);
2243 /* Allocate unique ID for the split Q/RSS subflows. */
2245 flow_qrss_get_id(struct rte_eth_dev *dev)
2247 struct mlx5_priv *priv = dev->data->dev_private;
2248 uint32_t qrss_id, ret;
2250 ret = mlx5_flow_id_get(priv->qrss_id_pool, &qrss_id);
2257 /* Free unique ID for the split Q/RSS subflows. */
2259 flow_qrss_free_id(struct rte_eth_dev *dev, uint32_t qrss_id)
2261 struct mlx5_priv *priv = dev->data->dev_private;
2264 mlx5_flow_id_release(priv->qrss_id_pool, qrss_id);
2268 * Release resource related QUEUE/RSS action split.
2271 * Pointer to Ethernet device.
2273 * Flow to release id's from.
2276 flow_mreg_split_qrss_release(struct rte_eth_dev *dev,
2277 struct rte_flow *flow)
2279 struct mlx5_flow *dev_flow;
2281 LIST_FOREACH(dev_flow, &flow->dev_flows, next)
2282 if (dev_flow->qrss_id)
2283 flow_qrss_free_id(dev, dev_flow->qrss_id);
2287 flow_null_validate(struct rte_eth_dev *dev __rte_unused,
2288 const struct rte_flow_attr *attr __rte_unused,
2289 const struct rte_flow_item items[] __rte_unused,
2290 const struct rte_flow_action actions[] __rte_unused,
2291 bool external __rte_unused,
2292 struct rte_flow_error *error)
2294 return rte_flow_error_set(error, ENOTSUP,
2295 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2298 static struct mlx5_flow *
2299 flow_null_prepare(const struct rte_flow_attr *attr __rte_unused,
2300 const struct rte_flow_item items[] __rte_unused,
2301 const struct rte_flow_action actions[] __rte_unused,
2302 struct rte_flow_error *error)
2304 rte_flow_error_set(error, ENOTSUP,
2305 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2310 flow_null_translate(struct rte_eth_dev *dev __rte_unused,
2311 struct mlx5_flow *dev_flow __rte_unused,
2312 const struct rte_flow_attr *attr __rte_unused,
2313 const struct rte_flow_item items[] __rte_unused,
2314 const struct rte_flow_action actions[] __rte_unused,
2315 struct rte_flow_error *error)
2317 return rte_flow_error_set(error, ENOTSUP,
2318 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2322 flow_null_apply(struct rte_eth_dev *dev __rte_unused,
2323 struct rte_flow *flow __rte_unused,
2324 struct rte_flow_error *error)
2326 return rte_flow_error_set(error, ENOTSUP,
2327 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2331 flow_null_remove(struct rte_eth_dev *dev __rte_unused,
2332 struct rte_flow *flow __rte_unused)
2337 flow_null_destroy(struct rte_eth_dev *dev __rte_unused,
2338 struct rte_flow *flow __rte_unused)
2343 flow_null_query(struct rte_eth_dev *dev __rte_unused,
2344 struct rte_flow *flow __rte_unused,
2345 const struct rte_flow_action *actions __rte_unused,
2346 void *data __rte_unused,
2347 struct rte_flow_error *error)
2349 return rte_flow_error_set(error, ENOTSUP,
2350 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL, NULL);
2353 /* Void driver to protect from null pointer reference. */
2354 const struct mlx5_flow_driver_ops mlx5_flow_null_drv_ops = {
2355 .validate = flow_null_validate,
2356 .prepare = flow_null_prepare,
2357 .translate = flow_null_translate,
2358 .apply = flow_null_apply,
2359 .remove = flow_null_remove,
2360 .destroy = flow_null_destroy,
2361 .query = flow_null_query,
2365 * Select flow driver type according to flow attributes and device
2369 * Pointer to the dev structure.
2371 * Pointer to the flow attributes.
2374 * flow driver type, MLX5_FLOW_TYPE_MAX otherwise.
2376 static enum mlx5_flow_drv_type
2377 flow_get_drv_type(struct rte_eth_dev *dev, const struct rte_flow_attr *attr)
2379 struct mlx5_priv *priv = dev->data->dev_private;
2380 enum mlx5_flow_drv_type type = MLX5_FLOW_TYPE_MAX;
2382 if (attr->transfer && priv->config.dv_esw_en)
2383 type = MLX5_FLOW_TYPE_DV;
2384 if (!attr->transfer)
2385 type = priv->config.dv_flow_en ? MLX5_FLOW_TYPE_DV :
2386 MLX5_FLOW_TYPE_VERBS;
2390 #define flow_get_drv_ops(type) flow_drv_ops[type]
2393 * Flow driver validation API. This abstracts calling driver specific functions.
2394 * The type of flow driver is determined according to flow attributes.
2397 * Pointer to the dev structure.
2399 * Pointer to the flow attributes.
2401 * Pointer to the list of items.
2402 * @param[in] actions
2403 * Pointer to the list of actions.
2404 * @param[in] external
2405 * This flow rule is created by request external to PMD.
2407 * Pointer to the error structure.
2410 * 0 on success, a negative errno value otherwise and rte_errno is set.
2413 flow_drv_validate(struct rte_eth_dev *dev,
2414 const struct rte_flow_attr *attr,
2415 const struct rte_flow_item items[],
2416 const struct rte_flow_action actions[],
2417 bool external, struct rte_flow_error *error)
2419 const struct mlx5_flow_driver_ops *fops;
2420 enum mlx5_flow_drv_type type = flow_get_drv_type(dev, attr);
2422 fops = flow_get_drv_ops(type);
2423 return fops->validate(dev, attr, items, actions, external, error);
2427 * Flow driver preparation API. This abstracts calling driver specific
2428 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2429 * calculates the size of memory required for device flow, allocates the memory,
2430 * initializes the device flow and returns the pointer.
2433 * This function initializes device flow structure such as dv or verbs in
2434 * struct mlx5_flow. However, it is caller's responsibility to initialize the
2435 * rest. For example, adding returning device flow to flow->dev_flow list and
2436 * setting backward reference to the flow should be done out of this function.
2437 * layers field is not filled either.
2440 * Pointer to the flow attributes.
2442 * Pointer to the list of items.
2443 * @param[in] actions
2444 * Pointer to the list of actions.
2446 * Pointer to the error structure.
2449 * Pointer to device flow on success, otherwise NULL and rte_errno is set.
2451 static inline struct mlx5_flow *
2452 flow_drv_prepare(const struct rte_flow *flow,
2453 const struct rte_flow_attr *attr,
2454 const struct rte_flow_item items[],
2455 const struct rte_flow_action actions[],
2456 struct rte_flow_error *error)
2458 const struct mlx5_flow_driver_ops *fops;
2459 enum mlx5_flow_drv_type type = flow->drv_type;
2461 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2462 fops = flow_get_drv_ops(type);
2463 return fops->prepare(attr, items, actions, error);
2467 * Flow driver translation API. This abstracts calling driver specific
2468 * functions. Parent flow (rte_flow) should have driver type (drv_type). It
2469 * translates a generic flow into a driver flow. flow_drv_prepare() must
2473 * dev_flow->layers could be filled as a result of parsing during translation
2474 * if needed by flow_drv_apply(). dev_flow->flow->actions can also be filled
2475 * if necessary. As a flow can have multiple dev_flows by RSS flow expansion,
2476 * flow->actions could be overwritten even though all the expanded dev_flows
2477 * have the same actions.
2480 * Pointer to the rte dev structure.
2481 * @param[in, out] dev_flow
2482 * Pointer to the mlx5 flow.
2484 * Pointer to the flow attributes.
2486 * Pointer to the list of items.
2487 * @param[in] actions
2488 * Pointer to the list of actions.
2490 * Pointer to the error structure.
2493 * 0 on success, a negative errno value otherwise and rte_errno is set.
2496 flow_drv_translate(struct rte_eth_dev *dev, struct mlx5_flow *dev_flow,
2497 const struct rte_flow_attr *attr,
2498 const struct rte_flow_item items[],
2499 const struct rte_flow_action actions[],
2500 struct rte_flow_error *error)
2502 const struct mlx5_flow_driver_ops *fops;
2503 enum mlx5_flow_drv_type type = dev_flow->flow->drv_type;
2505 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2506 fops = flow_get_drv_ops(type);
2507 return fops->translate(dev, dev_flow, attr, items, actions, error);
2511 * Flow driver apply API. This abstracts calling driver specific functions.
2512 * Parent flow (rte_flow) should have driver type (drv_type). It applies
2513 * translated driver flows on to device. flow_drv_translate() must precede.
2516 * Pointer to Ethernet device structure.
2517 * @param[in, out] flow
2518 * Pointer to flow structure.
2520 * Pointer to error structure.
2523 * 0 on success, a negative errno value otherwise and rte_errno is set.
2526 flow_drv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
2527 struct rte_flow_error *error)
2529 const struct mlx5_flow_driver_ops *fops;
2530 enum mlx5_flow_drv_type type = flow->drv_type;
2532 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2533 fops = flow_get_drv_ops(type);
2534 return fops->apply(dev, flow, error);
2538 * Flow driver remove API. This abstracts calling driver specific functions.
2539 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2540 * on device. All the resources of the flow should be freed by calling
2541 * flow_drv_destroy().
2544 * Pointer to Ethernet device.
2545 * @param[in, out] flow
2546 * Pointer to flow structure.
2549 flow_drv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
2551 const struct mlx5_flow_driver_ops *fops;
2552 enum mlx5_flow_drv_type type = flow->drv_type;
2554 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2555 fops = flow_get_drv_ops(type);
2556 fops->remove(dev, flow);
2560 * Flow driver destroy API. This abstracts calling driver specific functions.
2561 * Parent flow (rte_flow) should have driver type (drv_type). It removes a flow
2562 * on device and releases resources of the flow.
2565 * Pointer to Ethernet device.
2566 * @param[in, out] flow
2567 * Pointer to flow structure.
2570 flow_drv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
2572 const struct mlx5_flow_driver_ops *fops;
2573 enum mlx5_flow_drv_type type = flow->drv_type;
2575 flow_mreg_split_qrss_release(dev, flow);
2576 assert(type > MLX5_FLOW_TYPE_MIN && type < MLX5_FLOW_TYPE_MAX);
2577 fops = flow_get_drv_ops(type);
2578 fops->destroy(dev, flow);
2582 * Validate a flow supported by the NIC.
2584 * @see rte_flow_validate()
2588 mlx5_flow_validate(struct rte_eth_dev *dev,
2589 const struct rte_flow_attr *attr,
2590 const struct rte_flow_item items[],
2591 const struct rte_flow_action actions[],
2592 struct rte_flow_error *error)
2596 ret = flow_drv_validate(dev, attr, items, actions, true, error);
2603 * Get RSS action from the action list.
2605 * @param[in] actions
2606 * Pointer to the list of actions.
2609 * Pointer to the RSS action if exist, else return NULL.
2611 static const struct rte_flow_action_rss*
2612 flow_get_rss_action(const struct rte_flow_action actions[])
2614 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2615 switch (actions->type) {
2616 case RTE_FLOW_ACTION_TYPE_RSS:
2617 return (const struct rte_flow_action_rss *)
2627 find_graph_root(const struct rte_flow_item pattern[], uint32_t rss_level)
2629 const struct rte_flow_item *item;
2630 unsigned int has_vlan = 0;
2632 for (item = pattern; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
2633 if (item->type == RTE_FLOW_ITEM_TYPE_VLAN) {
2639 return rss_level < 2 ? MLX5_EXPANSION_ROOT_ETH_VLAN :
2640 MLX5_EXPANSION_ROOT_OUTER_ETH_VLAN;
2641 return rss_level < 2 ? MLX5_EXPANSION_ROOT :
2642 MLX5_EXPANSION_ROOT_OUTER;
2646 * Get QUEUE/RSS action from the action list.
2648 * @param[in] actions
2649 * Pointer to the list of actions.
2651 * Pointer to the return pointer.
2652 * @param[out] qrss_type
2653 * Pointer to the action type to return. RTE_FLOW_ACTION_TYPE_END is returned
2654 * if no QUEUE/RSS is found.
2657 * Total number of actions.
2660 flow_parse_qrss_action(const struct rte_flow_action actions[],
2661 const struct rte_flow_action **qrss)
2665 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2666 switch (actions->type) {
2667 case RTE_FLOW_ACTION_TYPE_QUEUE:
2668 case RTE_FLOW_ACTION_TYPE_RSS:
2676 /* Count RTE_FLOW_ACTION_TYPE_END. */
2677 return actions_n + 1;
2681 * Check if the flow should be splited due to hairpin.
2682 * The reason for the split is that in current HW we can't
2683 * support encap on Rx, so if a flow have encap we move it
2687 * Pointer to Ethernet device.
2689 * Flow rule attributes.
2690 * @param[in] actions
2691 * Associated actions (list terminated by the END action).
2694 * > 0 the number of actions and the flow should be split,
2695 * 0 when no split required.
2698 flow_check_hairpin_split(struct rte_eth_dev *dev,
2699 const struct rte_flow_attr *attr,
2700 const struct rte_flow_action actions[])
2702 int queue_action = 0;
2705 const struct rte_flow_action_queue *queue;
2706 const struct rte_flow_action_rss *rss;
2707 const struct rte_flow_action_raw_encap *raw_encap;
2711 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2712 switch (actions->type) {
2713 case RTE_FLOW_ACTION_TYPE_QUEUE:
2714 queue = actions->conf;
2715 if (mlx5_rxq_get_type(dev, queue->index) !=
2716 MLX5_RXQ_TYPE_HAIRPIN)
2721 case RTE_FLOW_ACTION_TYPE_RSS:
2722 rss = actions->conf;
2723 if (mlx5_rxq_get_type(dev, rss->queue[0]) !=
2724 MLX5_RXQ_TYPE_HAIRPIN)
2729 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2730 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2734 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2735 raw_encap = actions->conf;
2736 if (raw_encap->size >
2737 (sizeof(struct rte_flow_item_eth) +
2738 sizeof(struct rte_flow_item_ipv4)))
2747 if (encap == 1 && queue_action)
2752 #define MLX5_MAX_SPLIT_ACTIONS 24
2753 #define MLX5_MAX_SPLIT_ITEMS 24
2756 * Split the hairpin flow.
2757 * Since HW can't support encap on Rx we move the encap to Tx.
2758 * If the count action is after the encap then we also
2759 * move the count action. in this case the count will also measure
2763 * Pointer to Ethernet device.
2764 * @param[in] actions
2765 * Associated actions (list terminated by the END action).
2766 * @param[out] actions_rx
2768 * @param[out] actions_tx
2770 * @param[out] pattern_tx
2771 * The pattern items for the Tx flow.
2772 * @param[out] flow_id
2773 * The flow ID connected to this flow.
2779 flow_hairpin_split(struct rte_eth_dev *dev,
2780 const struct rte_flow_action actions[],
2781 struct rte_flow_action actions_rx[],
2782 struct rte_flow_action actions_tx[],
2783 struct rte_flow_item pattern_tx[],
2786 struct mlx5_priv *priv = dev->data->dev_private;
2787 const struct rte_flow_action_raw_encap *raw_encap;
2788 const struct rte_flow_action_raw_decap *raw_decap;
2789 struct mlx5_rte_flow_action_set_tag *set_tag;
2790 struct rte_flow_action *tag_action;
2791 struct mlx5_rte_flow_item_tag *tag_item;
2792 struct rte_flow_item *item;
2796 mlx5_flow_id_get(priv->sh->flow_id_pool, flow_id);
2797 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
2798 switch (actions->type) {
2799 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
2800 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
2801 rte_memcpy(actions_tx, actions,
2802 sizeof(struct rte_flow_action));
2805 case RTE_FLOW_ACTION_TYPE_COUNT:
2807 rte_memcpy(actions_tx, actions,
2808 sizeof(struct rte_flow_action));
2811 rte_memcpy(actions_rx, actions,
2812 sizeof(struct rte_flow_action));
2816 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
2817 raw_encap = actions->conf;
2818 if (raw_encap->size >
2819 (sizeof(struct rte_flow_item_eth) +
2820 sizeof(struct rte_flow_item_ipv4))) {
2821 memcpy(actions_tx, actions,
2822 sizeof(struct rte_flow_action));
2826 rte_memcpy(actions_rx, actions,
2827 sizeof(struct rte_flow_action));
2831 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
2832 raw_decap = actions->conf;
2833 if (raw_decap->size <
2834 (sizeof(struct rte_flow_item_eth) +
2835 sizeof(struct rte_flow_item_ipv4))) {
2836 memcpy(actions_tx, actions,
2837 sizeof(struct rte_flow_action));
2840 rte_memcpy(actions_rx, actions,
2841 sizeof(struct rte_flow_action));
2846 rte_memcpy(actions_rx, actions,
2847 sizeof(struct rte_flow_action));
2852 /* Add set meta action and end action for the Rx flow. */
2853 tag_action = actions_rx;
2854 tag_action->type = MLX5_RTE_FLOW_ACTION_TYPE_TAG;
2856 rte_memcpy(actions_rx, actions, sizeof(struct rte_flow_action));
2858 set_tag = (void *)actions_rx;
2859 set_tag->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_RX, 0, NULL);
2860 assert(set_tag->id > REG_NONE);
2861 set_tag->data = *flow_id;
2862 tag_action->conf = set_tag;
2863 /* Create Tx item list. */
2864 rte_memcpy(actions_tx, actions, sizeof(struct rte_flow_action));
2865 addr = (void *)&pattern_tx[2];
2867 item->type = MLX5_RTE_FLOW_ITEM_TYPE_TAG;
2868 tag_item = (void *)addr;
2869 tag_item->data = *flow_id;
2870 tag_item->id = mlx5_flow_get_reg_id(dev, MLX5_HAIRPIN_TX, 0, NULL);
2871 assert(set_tag->id > REG_NONE);
2872 item->spec = tag_item;
2873 addr += sizeof(struct mlx5_rte_flow_item_tag);
2874 tag_item = (void *)addr;
2875 tag_item->data = UINT32_MAX;
2876 tag_item->id = UINT16_MAX;
2877 item->mask = tag_item;
2878 addr += sizeof(struct mlx5_rte_flow_item_tag);
2881 item->type = RTE_FLOW_ITEM_TYPE_END;
2886 * The last stage of splitting chain, just creates the subflow
2887 * without any modification.
2890 * Pointer to Ethernet device.
2892 * Parent flow structure pointer.
2893 * @param[in, out] sub_flow
2894 * Pointer to return the created subflow, may be NULL.
2896 * Flow rule attributes.
2898 * Pattern specification (list terminated by the END pattern item).
2899 * @param[in] actions
2900 * Associated actions (list terminated by the END action).
2901 * @param[in] external
2902 * This flow rule is created by request external to PMD.
2904 * Perform verbose error reporting if not NULL.
2906 * 0 on success, negative value otherwise
2909 flow_create_split_inner(struct rte_eth_dev *dev,
2910 struct rte_flow *flow,
2911 struct mlx5_flow **sub_flow,
2912 const struct rte_flow_attr *attr,
2913 const struct rte_flow_item items[],
2914 const struct rte_flow_action actions[],
2915 bool external, struct rte_flow_error *error)
2917 struct mlx5_flow *dev_flow;
2919 dev_flow = flow_drv_prepare(flow, attr, items, actions, error);
2922 dev_flow->flow = flow;
2923 dev_flow->external = external;
2924 /* Subflow object was created, we must include one in the list. */
2925 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
2927 *sub_flow = dev_flow;
2928 return flow_drv_translate(dev, dev_flow, attr, items, actions, error);
2932 * Split action list having QUEUE/RSS for metadata register copy.
2934 * Once Q/RSS action is detected in user's action list, the flow action
2935 * should be split in order to copy metadata registers, which will happen in
2937 * - CQE->flow_tag := reg_c[1] (MARK)
2938 * - CQE->flow_table_metadata (reg_b) := reg_c[0] (META)
2939 * The Q/RSS action will be performed on RX_ACT_TBL after passing by RX_CP_TBL.
2940 * This is because the last action of each flow must be a terminal action
2941 * (QUEUE, RSS or DROP).
2943 * Flow ID must be allocated to identify actions in the RX_ACT_TBL and it is
2944 * stored and kept in the mlx5_flow structure per each sub_flow.
2946 * The Q/RSS action is replaced with,
2947 * - SET_TAG, setting the allocated flow ID to reg_c[2].
2948 * And the following JUMP action is added at the end,
2949 * - JUMP, to RX_CP_TBL.
2951 * A flow to perform remained Q/RSS action will be created in RX_ACT_TBL by
2952 * flow_create_split_metadata() routine. The flow will look like,
2953 * - If flow ID matches (reg_c[2]), perform Q/RSS.
2956 * Pointer to Ethernet device.
2957 * @param[out] split_actions
2958 * Pointer to store split actions to jump to CP_TBL.
2959 * @param[in] actions
2960 * Pointer to the list of original flow actions.
2962 * Pointer to the Q/RSS action.
2963 * @param[in] actions_n
2964 * Number of original actions.
2966 * Perform verbose error reporting if not NULL.
2969 * non-zero unique flow_id on success, otherwise 0 and
2970 * error/rte_error are set.
2973 flow_mreg_split_qrss_prep(struct rte_eth_dev *dev,
2974 struct rte_flow_action *split_actions,
2975 const struct rte_flow_action *actions,
2976 const struct rte_flow_action *qrss,
2977 int actions_n, struct rte_flow_error *error)
2979 struct mlx5_rte_flow_action_set_tag *set_tag;
2980 struct rte_flow_action_jump *jump;
2981 const int qrss_idx = qrss - actions;
2986 * Given actions will be split
2987 * - Replace QUEUE/RSS action with SET_TAG to set flow ID.
2988 * - Add jump to mreg CP_TBL.
2989 * As a result, there will be one more action.
2993 * Allocate the new subflow ID. This one is unique within
2994 * device and not shared with representors. Otherwise,
2995 * we would have to resolve multi-thread access synch
2996 * issue. Each flow on the shared device is appended
2997 * with source vport identifier, so the resulting
2998 * flows will be unique in the shared (by master and
2999 * representors) domain even if they have coinciding
3002 flow_id = flow_qrss_get_id(dev);
3004 return rte_flow_error_set(error, ENOMEM,
3005 RTE_FLOW_ERROR_TYPE_ACTION,
3006 NULL, "can't allocate id "
3007 "for split Q/RSS subflow");
3008 /* Internal SET_TAG action to set flow ID. */
3009 set_tag = (void *)(split_actions + actions_n);
3010 *set_tag = (struct mlx5_rte_flow_action_set_tag){
3013 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
3017 /* JUMP action to jump to mreg copy table (CP_TBL). */
3018 jump = (void *)(set_tag + 1);
3019 *jump = (struct rte_flow_action_jump){
3020 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
3022 /* Construct new actions array. */
3023 memcpy(split_actions, actions, sizeof(*split_actions) * actions_n);
3024 /* Replace QUEUE/RSS action. */
3025 split_actions[qrss_idx] = (struct rte_flow_action){
3026 .type = MLX5_RTE_FLOW_ACTION_TYPE_TAG,
3029 split_actions[actions_n - 2] = (struct rte_flow_action){
3030 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3033 split_actions[actions_n - 1] = (struct rte_flow_action){
3034 .type = RTE_FLOW_ACTION_TYPE_END,
3040 * Extend the given action list for Tx metadata copy.
3042 * Copy the given action list to the ext_actions and add flow metadata register
3043 * copy action in order to copy reg_a set by WQE to reg_c[0].
3045 * @param[out] ext_actions
3046 * Pointer to the extended action list.
3047 * @param[in] actions
3048 * Pointer to the list of actions.
3049 * @param[in] actions_n
3050 * Number of actions in the list.
3052 * Perform verbose error reporting if not NULL.
3055 * 0 on success, negative value otherwise
3058 flow_mreg_tx_copy_prep(struct rte_eth_dev *dev,
3059 struct rte_flow_action *ext_actions,
3060 const struct rte_flow_action *actions,
3061 int actions_n, struct rte_flow_error *error)
3063 struct mlx5_flow_action_copy_mreg *cp_mreg =
3064 (struct mlx5_flow_action_copy_mreg *)
3065 (ext_actions + actions_n + 1);
3068 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_RX, 0, error);
3072 ret = mlx5_flow_get_reg_id(dev, MLX5_METADATA_TX, 0, error);
3076 memcpy(ext_actions, actions,
3077 sizeof(*ext_actions) * actions_n);
3078 ext_actions[actions_n - 1] = (struct rte_flow_action){
3079 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
3082 ext_actions[actions_n] = (struct rte_flow_action){
3083 .type = RTE_FLOW_ACTION_TYPE_END,
3089 * The splitting for metadata feature.
3091 * - Q/RSS action on NIC Rx should be split in order to pass by
3092 * the mreg copy table (RX_CP_TBL) and then it jumps to the
3093 * action table (RX_ACT_TBL) which has the split Q/RSS action.
3095 * - All the actions on NIC Tx should have a mreg copy action to
3096 * copy reg_a from WQE to reg_c[0].
3099 * Pointer to Ethernet device.
3101 * Parent flow structure pointer.
3103 * Flow rule attributes.
3105 * Pattern specification (list terminated by the END pattern item).
3106 * @param[in] actions
3107 * Associated actions (list terminated by the END action).
3108 * @param[in] external
3109 * This flow rule is created by request external to PMD.
3111 * Perform verbose error reporting if not NULL.
3113 * 0 on success, negative value otherwise
3116 flow_create_split_metadata(struct rte_eth_dev *dev,
3117 struct rte_flow *flow,
3118 const struct rte_flow_attr *attr,
3119 const struct rte_flow_item items[],
3120 const struct rte_flow_action actions[],
3121 bool external, struct rte_flow_error *error)
3123 struct mlx5_priv *priv = dev->data->dev_private;
3124 struct mlx5_dev_config *config = &priv->config;
3125 const struct rte_flow_action *qrss = NULL;
3126 struct rte_flow_action *ext_actions = NULL;
3127 struct mlx5_flow *dev_flow = NULL;
3128 uint32_t qrss_id = 0;
3133 /* Check whether extensive metadata feature is engaged. */
3134 if (!config->dv_flow_en ||
3135 config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
3136 !mlx5_flow_ext_mreg_supported(dev))
3137 return flow_create_split_inner(dev, flow, NULL, attr, items,
3138 actions, external, error);
3139 actions_n = flow_parse_qrss_action(actions, &qrss);
3141 /* Exclude hairpin flows from splitting. */
3142 if (qrss->type == RTE_FLOW_ACTION_TYPE_QUEUE) {
3143 const struct rte_flow_action_queue *queue;
3146 if (mlx5_rxq_get_type(dev, queue->index) ==
3147 MLX5_RXQ_TYPE_HAIRPIN)
3149 } else if (qrss->type == RTE_FLOW_ACTION_TYPE_RSS) {
3150 const struct rte_flow_action_rss *rss;
3153 if (mlx5_rxq_get_type(dev, rss->queue[0]) ==
3154 MLX5_RXQ_TYPE_HAIRPIN)
3160 * Q/RSS action on NIC Rx should be split in order to pass by
3161 * the mreg copy table (RX_CP_TBL) and then it jumps to the
3162 * action table (RX_ACT_TBL) which has the split Q/RSS action.
3164 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3165 sizeof(struct rte_flow_action_set_tag) +
3166 sizeof(struct rte_flow_action_jump);
3167 ext_actions = rte_zmalloc(__func__, act_size, 0);
3169 return rte_flow_error_set(error, ENOMEM,
3170 RTE_FLOW_ERROR_TYPE_ACTION,
3171 NULL, "no memory to split "
3174 * Create the new actions list with removed Q/RSS action
3175 * and appended set tag and jump to register copy table
3176 * (RX_CP_TBL). We should preallocate unique tag ID here
3177 * in advance, because it is needed for set tag action.
3179 qrss_id = flow_mreg_split_qrss_prep(dev, ext_actions, actions,
3180 qrss, actions_n, error);
3185 } else if (attr->egress && !attr->transfer) {
3187 * All the actions on NIC Tx should have a metadata register
3188 * copy action to copy reg_a from WQE to reg_c[meta]
3190 act_size = sizeof(struct rte_flow_action) * (actions_n + 1) +
3191 sizeof(struct mlx5_flow_action_copy_mreg);
3192 ext_actions = rte_zmalloc(__func__, act_size, 0);
3194 return rte_flow_error_set(error, ENOMEM,
3195 RTE_FLOW_ERROR_TYPE_ACTION,
3196 NULL, "no memory to split "
3198 /* Create the action list appended with copy register. */
3199 ret = flow_mreg_tx_copy_prep(dev, ext_actions, actions,
3204 /* Add the unmodified original or prefix subflow. */
3205 ret = flow_create_split_inner(dev, flow, &dev_flow, attr, items,
3206 ext_actions ? ext_actions : actions,
3212 const struct rte_flow_attr q_attr = {
3213 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
3216 /* Internal PMD action to set register. */
3217 struct mlx5_rte_flow_item_tag q_tag_spec = {
3221 struct rte_flow_item q_items[] = {
3223 .type = MLX5_RTE_FLOW_ITEM_TYPE_TAG,
3224 .spec = &q_tag_spec,
3229 .type = RTE_FLOW_ITEM_TYPE_END,
3232 struct rte_flow_action q_actions[] = {
3238 .type = RTE_FLOW_ACTION_TYPE_END,
3241 uint64_t hash_fields = dev_flow->hash_fields;
3243 * Put unique id in prefix flow due to it is destroyed after
3244 * prefix flow and id will be freed after there is no actual
3245 * flows with this id and identifier reallocation becomes
3246 * possible (for example, for other flows in other threads).
3248 dev_flow->qrss_id = qrss_id;
3251 ret = mlx5_flow_get_reg_id(dev, MLX5_COPY_MARK, 0, error);
3254 q_tag_spec.id = ret;
3255 /* Add suffix subflow to execute Q/RSS. */
3256 ret = flow_create_split_inner(dev, flow, &dev_flow,
3257 &q_attr, q_items, q_actions,
3262 dev_flow->hash_fields = hash_fields;
3267 * We do not destroy the partially created sub_flows in case of error.
3268 * These ones are included into parent flow list and will be destroyed
3269 * by flow_drv_destroy.
3271 flow_qrss_free_id(dev, qrss_id);
3272 rte_free(ext_actions);
3277 * Split the flow to subflow set. The splitters might be linked
3278 * in the chain, like this:
3279 * flow_create_split_outer() calls:
3280 * flow_create_split_meter() calls:
3281 * flow_create_split_metadata(meter_subflow_0) calls:
3282 * flow_create_split_inner(metadata_subflow_0)
3283 * flow_create_split_inner(metadata_subflow_1)
3284 * flow_create_split_inner(metadata_subflow_2)
3285 * flow_create_split_metadata(meter_subflow_1) calls:
3286 * flow_create_split_inner(metadata_subflow_0)
3287 * flow_create_split_inner(metadata_subflow_1)
3288 * flow_create_split_inner(metadata_subflow_2)
3290 * This provide flexible way to add new levels of flow splitting.
3291 * The all of successfully created subflows are included to the
3292 * parent flow dev_flow list.
3295 * Pointer to Ethernet device.
3297 * Parent flow structure pointer.
3299 * Flow rule attributes.
3301 * Pattern specification (list terminated by the END pattern item).
3302 * @param[in] actions
3303 * Associated actions (list terminated by the END action).
3304 * @param[in] external
3305 * This flow rule is created by request external to PMD.
3307 * Perform verbose error reporting if not NULL.
3309 * 0 on success, negative value otherwise
3312 flow_create_split_outer(struct rte_eth_dev *dev,
3313 struct rte_flow *flow,
3314 const struct rte_flow_attr *attr,
3315 const struct rte_flow_item items[],
3316 const struct rte_flow_action actions[],
3317 bool external, struct rte_flow_error *error)
3321 ret = flow_create_split_metadata(dev, flow, attr, items,
3322 actions, external, error);
3328 * Create a flow and add it to @p list.
3331 * Pointer to Ethernet device.
3333 * Pointer to a TAILQ flow list. If this parameter NULL,
3334 * no list insertion occurred, flow is just created,
3335 * this is caller's responsibility to track the
3338 * Flow rule attributes.
3340 * Pattern specification (list terminated by the END pattern item).
3341 * @param[in] actions
3342 * Associated actions (list terminated by the END action).
3343 * @param[in] external
3344 * This flow rule is created by request external to PMD.
3346 * Perform verbose error reporting if not NULL.
3349 * A flow on success, NULL otherwise and rte_errno is set.
3351 static struct rte_flow *
3352 flow_list_create(struct rte_eth_dev *dev, struct mlx5_flows *list,
3353 const struct rte_flow_attr *attr,
3354 const struct rte_flow_item items[],
3355 const struct rte_flow_action actions[],
3356 bool external, struct rte_flow_error *error)
3358 struct mlx5_priv *priv = dev->data->dev_private;
3359 struct rte_flow *flow = NULL;
3360 struct mlx5_flow *dev_flow;
3361 const struct rte_flow_action_rss *rss;
3363 struct rte_flow_expand_rss buf;
3364 uint8_t buffer[2048];
3367 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
3368 uint8_t buffer[2048];
3371 struct rte_flow_action actions[MLX5_MAX_SPLIT_ACTIONS];
3372 uint8_t buffer[2048];
3373 } actions_hairpin_tx;
3375 struct rte_flow_item items[MLX5_MAX_SPLIT_ITEMS];
3376 uint8_t buffer[2048];
3378 struct rte_flow_expand_rss *buf = &expand_buffer.buf;
3379 const struct rte_flow_action *p_actions_rx = actions;
3383 int hairpin_flow = 0;
3384 uint32_t hairpin_id = 0;
3385 struct rte_flow_attr attr_tx = { .priority = 0 };
3387 hairpin_flow = flow_check_hairpin_split(dev, attr, actions);
3388 if (hairpin_flow > 0) {
3389 if (hairpin_flow > MLX5_MAX_SPLIT_ACTIONS) {
3393 flow_hairpin_split(dev, actions, actions_rx.actions,
3394 actions_hairpin_tx.actions, items_tx.items,
3396 p_actions_rx = actions_rx.actions;
3398 ret = flow_drv_validate(dev, attr, items, p_actions_rx, external,
3401 goto error_before_flow;
3402 flow_size = sizeof(struct rte_flow);
3403 rss = flow_get_rss_action(p_actions_rx);
3405 flow_size += RTE_ALIGN_CEIL(rss->queue_num * sizeof(uint16_t),
3408 flow_size += RTE_ALIGN_CEIL(sizeof(uint16_t), sizeof(void *));
3409 flow = rte_calloc(__func__, 1, flow_size, 0);
3412 goto error_before_flow;
3414 flow->drv_type = flow_get_drv_type(dev, attr);
3415 if (hairpin_id != 0)
3416 flow->hairpin_flow_id = hairpin_id;
3417 assert(flow->drv_type > MLX5_FLOW_TYPE_MIN &&
3418 flow->drv_type < MLX5_FLOW_TYPE_MAX);
3419 flow->rss.queue = (void *)(flow + 1);
3422 * The following information is required by
3423 * mlx5_flow_hashfields_adjust() in advance.
3425 flow->rss.level = rss->level;
3426 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
3427 flow->rss.types = !rss->types ? ETH_RSS_IP : rss->types;
3429 LIST_INIT(&flow->dev_flows);
3430 if (rss && rss->types) {
3431 unsigned int graph_root;
3433 graph_root = find_graph_root(items, rss->level);
3434 ret = rte_flow_expand_rss(buf, sizeof(expand_buffer.buffer),
3436 mlx5_support_expansion,
3439 (unsigned int)ret < sizeof(expand_buffer.buffer));
3442 buf->entry[0].pattern = (void *)(uintptr_t)items;
3444 for (i = 0; i < buf->entries; ++i) {
3446 * The splitter may create multiple dev_flows,
3447 * depending on configuration. In the simplest
3448 * case it just creates unmodified original flow.
3450 ret = flow_create_split_outer(dev, flow, attr,
3451 buf->entry[i].pattern,
3452 p_actions_rx, external,
3457 /* Create the tx flow. */
3459 attr_tx.group = MLX5_HAIRPIN_TX_TABLE;
3460 attr_tx.ingress = 0;
3462 dev_flow = flow_drv_prepare(flow, &attr_tx, items_tx.items,
3463 actions_hairpin_tx.actions, error);
3466 dev_flow->flow = flow;
3467 dev_flow->external = 0;
3468 LIST_INSERT_HEAD(&flow->dev_flows, dev_flow, next);
3469 ret = flow_drv_translate(dev, dev_flow, &attr_tx,
3471 actions_hairpin_tx.actions, error);
3475 if (dev->data->dev_started) {
3476 ret = flow_drv_apply(dev, flow, error);
3481 TAILQ_INSERT_TAIL(list, flow, next);
3482 flow_rxq_flags_set(dev, flow);
3486 mlx5_flow_id_release(priv->sh->flow_id_pool,
3490 ret = rte_errno; /* Save rte_errno before cleanup. */
3491 if (flow->hairpin_flow_id)
3492 mlx5_flow_id_release(priv->sh->flow_id_pool,
3493 flow->hairpin_flow_id);
3495 flow_drv_destroy(dev, flow);
3497 rte_errno = ret; /* Restore rte_errno. */
3502 * Create a dedicated flow rule on e-switch table 0 (root table), to direct all
3503 * incoming packets to table 1.
3505 * Other flow rules, requested for group n, will be created in
3506 * e-switch table n+1.
3507 * Jump action to e-switch group n will be created to group n+1.
3509 * Used when working in switchdev mode, to utilise advantages of table 1
3513 * Pointer to Ethernet device.
3516 * Pointer to flow on success, NULL otherwise and rte_errno is set.
3519 mlx5_flow_create_esw_table_zero_flow(struct rte_eth_dev *dev)
3521 const struct rte_flow_attr attr = {
3528 const struct rte_flow_item pattern = {
3529 .type = RTE_FLOW_ITEM_TYPE_END,
3531 struct rte_flow_action_jump jump = {
3534 const struct rte_flow_action actions[] = {
3536 .type = RTE_FLOW_ACTION_TYPE_JUMP,
3540 .type = RTE_FLOW_ACTION_TYPE_END,
3543 struct mlx5_priv *priv = dev->data->dev_private;
3544 struct rte_flow_error error;
3546 return flow_list_create(dev, &priv->ctrl_flows, &attr, &pattern,
3547 actions, false, &error);
3553 * @see rte_flow_create()
3557 mlx5_flow_create(struct rte_eth_dev *dev,
3558 const struct rte_flow_attr *attr,
3559 const struct rte_flow_item items[],
3560 const struct rte_flow_action actions[],
3561 struct rte_flow_error *error)
3563 struct mlx5_priv *priv = dev->data->dev_private;
3565 return flow_list_create(dev, &priv->flows,
3566 attr, items, actions, true, error);
3570 * Destroy a flow in a list.
3573 * Pointer to Ethernet device.
3575 * Pointer to a TAILQ flow list. If this parameter NULL,
3576 * there is no flow removal from the list.
3581 flow_list_destroy(struct rte_eth_dev *dev, struct mlx5_flows *list,
3582 struct rte_flow *flow)
3584 struct mlx5_priv *priv = dev->data->dev_private;
3587 * Update RX queue flags only if port is started, otherwise it is
3590 if (dev->data->dev_started)
3591 flow_rxq_flags_trim(dev, flow);
3592 if (flow->hairpin_flow_id)
3593 mlx5_flow_id_release(priv->sh->flow_id_pool,
3594 flow->hairpin_flow_id);
3595 flow_drv_destroy(dev, flow);
3597 TAILQ_REMOVE(list, flow, next);
3598 rte_free(flow->fdir);
3603 * Destroy all flows.
3606 * Pointer to Ethernet device.
3608 * Pointer to a TAILQ flow list.
3611 mlx5_flow_list_flush(struct rte_eth_dev *dev, struct mlx5_flows *list)
3613 while (!TAILQ_EMPTY(list)) {
3614 struct rte_flow *flow;
3616 flow = TAILQ_FIRST(list);
3617 flow_list_destroy(dev, list, flow);
3625 * Pointer to Ethernet device.
3627 * Pointer to a TAILQ flow list.
3630 mlx5_flow_stop(struct rte_eth_dev *dev, struct mlx5_flows *list)
3632 struct rte_flow *flow;
3634 TAILQ_FOREACH_REVERSE(flow, list, mlx5_flows, next)
3635 flow_drv_remove(dev, flow);
3636 flow_rxq_flags_clear(dev);
3643 * Pointer to Ethernet device.
3645 * Pointer to a TAILQ flow list.
3648 * 0 on success, a negative errno value otherwise and rte_errno is set.
3651 mlx5_flow_start(struct rte_eth_dev *dev, struct mlx5_flows *list)
3653 struct rte_flow *flow;
3654 struct rte_flow_error error;
3657 TAILQ_FOREACH(flow, list, next) {
3658 ret = flow_drv_apply(dev, flow, &error);
3661 flow_rxq_flags_set(dev, flow);
3665 ret = rte_errno; /* Save rte_errno before cleanup. */
3666 mlx5_flow_stop(dev, list);
3667 rte_errno = ret; /* Restore rte_errno. */
3672 * Verify the flow list is empty
3675 * Pointer to Ethernet device.
3677 * @return the number of flows not released.
3680 mlx5_flow_verify(struct rte_eth_dev *dev)
3682 struct mlx5_priv *priv = dev->data->dev_private;
3683 struct rte_flow *flow;
3686 TAILQ_FOREACH(flow, &priv->flows, next) {
3687 DRV_LOG(DEBUG, "port %u flow %p still referenced",
3688 dev->data->port_id, (void *)flow);
3695 * Enable default hairpin egress flow.
3698 * Pointer to Ethernet device.
3703 * 0 on success, a negative errno value otherwise and rte_errno is set.
3706 mlx5_ctrl_flow_source_queue(struct rte_eth_dev *dev,
3709 struct mlx5_priv *priv = dev->data->dev_private;
3710 const struct rte_flow_attr attr = {
3714 struct mlx5_rte_flow_item_tx_queue queue_spec = {
3717 struct mlx5_rte_flow_item_tx_queue queue_mask = {
3718 .queue = UINT32_MAX,
3720 struct rte_flow_item items[] = {
3722 .type = MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE,
3723 .spec = &queue_spec,
3725 .mask = &queue_mask,
3728 .type = RTE_FLOW_ITEM_TYPE_END,
3731 struct rte_flow_action_jump jump = {
3732 .group = MLX5_HAIRPIN_TX_TABLE,
3734 struct rte_flow_action actions[2];
3735 struct rte_flow *flow;
3736 struct rte_flow_error error;
3738 actions[0].type = RTE_FLOW_ACTION_TYPE_JUMP;
3739 actions[0].conf = &jump;
3740 actions[1].type = RTE_FLOW_ACTION_TYPE_END;
3741 flow = flow_list_create(dev, &priv->ctrl_flows,
3742 &attr, items, actions, false, &error);
3745 "Failed to create ctrl flow: rte_errno(%d),"
3746 " type(%d), message(%s)",
3747 rte_errno, error.type,
3748 error.message ? error.message : " (no stated reason)");
3755 * Enable a control flow configured from the control plane.
3758 * Pointer to Ethernet device.
3760 * An Ethernet flow spec to apply.
3762 * An Ethernet flow mask to apply.
3764 * A VLAN flow spec to apply.
3766 * A VLAN flow mask to apply.
3769 * 0 on success, a negative errno value otherwise and rte_errno is set.
3772 mlx5_ctrl_flow_vlan(struct rte_eth_dev *dev,
3773 struct rte_flow_item_eth *eth_spec,
3774 struct rte_flow_item_eth *eth_mask,
3775 struct rte_flow_item_vlan *vlan_spec,
3776 struct rte_flow_item_vlan *vlan_mask)
3778 struct mlx5_priv *priv = dev->data->dev_private;
3779 const struct rte_flow_attr attr = {
3781 .priority = MLX5_FLOW_PRIO_RSVD,
3783 struct rte_flow_item items[] = {
3785 .type = RTE_FLOW_ITEM_TYPE_ETH,
3791 .type = (vlan_spec) ? RTE_FLOW_ITEM_TYPE_VLAN :
3792 RTE_FLOW_ITEM_TYPE_END,
3798 .type = RTE_FLOW_ITEM_TYPE_END,
3801 uint16_t queue[priv->reta_idx_n];
3802 struct rte_flow_action_rss action_rss = {
3803 .func = RTE_ETH_HASH_FUNCTION_DEFAULT,
3805 .types = priv->rss_conf.rss_hf,
3806 .key_len = priv->rss_conf.rss_key_len,
3807 .queue_num = priv->reta_idx_n,
3808 .key = priv->rss_conf.rss_key,
3811 struct rte_flow_action actions[] = {
3813 .type = RTE_FLOW_ACTION_TYPE_RSS,
3814 .conf = &action_rss,
3817 .type = RTE_FLOW_ACTION_TYPE_END,
3820 struct rte_flow *flow;
3821 struct rte_flow_error error;
3824 if (!priv->reta_idx_n || !priv->rxqs_n) {
3827 for (i = 0; i != priv->reta_idx_n; ++i)
3828 queue[i] = (*priv->reta_idx)[i];
3829 flow = flow_list_create(dev, &priv->ctrl_flows,
3830 &attr, items, actions, false, &error);
3837 * Enable a flow control configured from the control plane.
3840 * Pointer to Ethernet device.
3842 * An Ethernet flow spec to apply.
3844 * An Ethernet flow mask to apply.
3847 * 0 on success, a negative errno value otherwise and rte_errno is set.
3850 mlx5_ctrl_flow(struct rte_eth_dev *dev,
3851 struct rte_flow_item_eth *eth_spec,
3852 struct rte_flow_item_eth *eth_mask)
3854 return mlx5_ctrl_flow_vlan(dev, eth_spec, eth_mask, NULL, NULL);
3860 * @see rte_flow_destroy()
3864 mlx5_flow_destroy(struct rte_eth_dev *dev,
3865 struct rte_flow *flow,
3866 struct rte_flow_error *error __rte_unused)
3868 struct mlx5_priv *priv = dev->data->dev_private;
3870 flow_list_destroy(dev, &priv->flows, flow);
3875 * Destroy all flows.
3877 * @see rte_flow_flush()
3881 mlx5_flow_flush(struct rte_eth_dev *dev,
3882 struct rte_flow_error *error __rte_unused)
3884 struct mlx5_priv *priv = dev->data->dev_private;
3886 mlx5_flow_list_flush(dev, &priv->flows);
3893 * @see rte_flow_isolate()
3897 mlx5_flow_isolate(struct rte_eth_dev *dev,
3899 struct rte_flow_error *error)
3901 struct mlx5_priv *priv = dev->data->dev_private;
3903 if (dev->data->dev_started) {
3904 rte_flow_error_set(error, EBUSY,
3905 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3907 "port must be stopped first");
3910 priv->isolated = !!enable;
3912 dev->dev_ops = &mlx5_dev_ops_isolate;
3914 dev->dev_ops = &mlx5_dev_ops;
3921 * @see rte_flow_query()
3925 flow_drv_query(struct rte_eth_dev *dev,
3926 struct rte_flow *flow,
3927 const struct rte_flow_action *actions,
3929 struct rte_flow_error *error)
3931 const struct mlx5_flow_driver_ops *fops;
3932 enum mlx5_flow_drv_type ftype = flow->drv_type;
3934 assert(ftype > MLX5_FLOW_TYPE_MIN && ftype < MLX5_FLOW_TYPE_MAX);
3935 fops = flow_get_drv_ops(ftype);
3937 return fops->query(dev, flow, actions, data, error);
3943 * @see rte_flow_query()
3947 mlx5_flow_query(struct rte_eth_dev *dev,
3948 struct rte_flow *flow,
3949 const struct rte_flow_action *actions,
3951 struct rte_flow_error *error)
3955 ret = flow_drv_query(dev, flow, actions, data, error);
3962 * Convert a flow director filter to a generic flow.
3965 * Pointer to Ethernet device.
3966 * @param fdir_filter
3967 * Flow director filter to add.
3969 * Generic flow parameters structure.
3972 * 0 on success, a negative errno value otherwise and rte_errno is set.
3975 flow_fdir_filter_convert(struct rte_eth_dev *dev,
3976 const struct rte_eth_fdir_filter *fdir_filter,
3977 struct mlx5_fdir *attributes)
3979 struct mlx5_priv *priv = dev->data->dev_private;
3980 const struct rte_eth_fdir_input *input = &fdir_filter->input;
3981 const struct rte_eth_fdir_masks *mask =
3982 &dev->data->dev_conf.fdir_conf.mask;
3984 /* Validate queue number. */
3985 if (fdir_filter->action.rx_queue >= priv->rxqs_n) {
3986 DRV_LOG(ERR, "port %u invalid queue number %d",
3987 dev->data->port_id, fdir_filter->action.rx_queue);
3991 attributes->attr.ingress = 1;
3992 attributes->items[0] = (struct rte_flow_item) {
3993 .type = RTE_FLOW_ITEM_TYPE_ETH,
3994 .spec = &attributes->l2,
3995 .mask = &attributes->l2_mask,
3997 switch (fdir_filter->action.behavior) {
3998 case RTE_ETH_FDIR_ACCEPT:
3999 attributes->actions[0] = (struct rte_flow_action){
4000 .type = RTE_FLOW_ACTION_TYPE_QUEUE,
4001 .conf = &attributes->queue,
4004 case RTE_ETH_FDIR_REJECT:
4005 attributes->actions[0] = (struct rte_flow_action){
4006 .type = RTE_FLOW_ACTION_TYPE_DROP,
4010 DRV_LOG(ERR, "port %u invalid behavior %d",
4012 fdir_filter->action.behavior);
4013 rte_errno = ENOTSUP;
4016 attributes->queue.index = fdir_filter->action.rx_queue;
4018 switch (fdir_filter->input.flow_type) {
4019 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4020 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4021 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
4022 attributes->l3.ipv4.hdr = (struct rte_ipv4_hdr){
4023 .src_addr = input->flow.ip4_flow.src_ip,
4024 .dst_addr = input->flow.ip4_flow.dst_ip,
4025 .time_to_live = input->flow.ip4_flow.ttl,
4026 .type_of_service = input->flow.ip4_flow.tos,
4028 attributes->l3_mask.ipv4.hdr = (struct rte_ipv4_hdr){
4029 .src_addr = mask->ipv4_mask.src_ip,
4030 .dst_addr = mask->ipv4_mask.dst_ip,
4031 .time_to_live = mask->ipv4_mask.ttl,
4032 .type_of_service = mask->ipv4_mask.tos,
4033 .next_proto_id = mask->ipv4_mask.proto,
4035 attributes->items[1] = (struct rte_flow_item){
4036 .type = RTE_FLOW_ITEM_TYPE_IPV4,
4037 .spec = &attributes->l3,
4038 .mask = &attributes->l3_mask,
4041 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
4042 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
4043 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
4044 attributes->l3.ipv6.hdr = (struct rte_ipv6_hdr){
4045 .hop_limits = input->flow.ipv6_flow.hop_limits,
4046 .proto = input->flow.ipv6_flow.proto,
4049 memcpy(attributes->l3.ipv6.hdr.src_addr,
4050 input->flow.ipv6_flow.src_ip,
4051 RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
4052 memcpy(attributes->l3.ipv6.hdr.dst_addr,
4053 input->flow.ipv6_flow.dst_ip,
4054 RTE_DIM(attributes->l3.ipv6.hdr.src_addr));
4055 memcpy(attributes->l3_mask.ipv6.hdr.src_addr,
4056 mask->ipv6_mask.src_ip,
4057 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
4058 memcpy(attributes->l3_mask.ipv6.hdr.dst_addr,
4059 mask->ipv6_mask.dst_ip,
4060 RTE_DIM(attributes->l3_mask.ipv6.hdr.src_addr));
4061 attributes->items[1] = (struct rte_flow_item){
4062 .type = RTE_FLOW_ITEM_TYPE_IPV6,
4063 .spec = &attributes->l3,
4064 .mask = &attributes->l3_mask,
4068 DRV_LOG(ERR, "port %u invalid flow type%d",
4069 dev->data->port_id, fdir_filter->input.flow_type);
4070 rte_errno = ENOTSUP;
4074 switch (fdir_filter->input.flow_type) {
4075 case RTE_ETH_FLOW_NONFRAG_IPV4_UDP:
4076 attributes->l4.udp.hdr = (struct rte_udp_hdr){
4077 .src_port = input->flow.udp4_flow.src_port,
4078 .dst_port = input->flow.udp4_flow.dst_port,
4080 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
4081 .src_port = mask->src_port_mask,
4082 .dst_port = mask->dst_port_mask,
4084 attributes->items[2] = (struct rte_flow_item){
4085 .type = RTE_FLOW_ITEM_TYPE_UDP,
4086 .spec = &attributes->l4,
4087 .mask = &attributes->l4_mask,
4090 case RTE_ETH_FLOW_NONFRAG_IPV4_TCP:
4091 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
4092 .src_port = input->flow.tcp4_flow.src_port,
4093 .dst_port = input->flow.tcp4_flow.dst_port,
4095 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
4096 .src_port = mask->src_port_mask,
4097 .dst_port = mask->dst_port_mask,
4099 attributes->items[2] = (struct rte_flow_item){
4100 .type = RTE_FLOW_ITEM_TYPE_TCP,
4101 .spec = &attributes->l4,
4102 .mask = &attributes->l4_mask,
4105 case RTE_ETH_FLOW_NONFRAG_IPV6_UDP:
4106 attributes->l4.udp.hdr = (struct rte_udp_hdr){
4107 .src_port = input->flow.udp6_flow.src_port,
4108 .dst_port = input->flow.udp6_flow.dst_port,
4110 attributes->l4_mask.udp.hdr = (struct rte_udp_hdr){
4111 .src_port = mask->src_port_mask,
4112 .dst_port = mask->dst_port_mask,
4114 attributes->items[2] = (struct rte_flow_item){
4115 .type = RTE_FLOW_ITEM_TYPE_UDP,
4116 .spec = &attributes->l4,
4117 .mask = &attributes->l4_mask,
4120 case RTE_ETH_FLOW_NONFRAG_IPV6_TCP:
4121 attributes->l4.tcp.hdr = (struct rte_tcp_hdr){
4122 .src_port = input->flow.tcp6_flow.src_port,
4123 .dst_port = input->flow.tcp6_flow.dst_port,
4125 attributes->l4_mask.tcp.hdr = (struct rte_tcp_hdr){
4126 .src_port = mask->src_port_mask,
4127 .dst_port = mask->dst_port_mask,
4129 attributes->items[2] = (struct rte_flow_item){
4130 .type = RTE_FLOW_ITEM_TYPE_TCP,
4131 .spec = &attributes->l4,
4132 .mask = &attributes->l4_mask,
4135 case RTE_ETH_FLOW_NONFRAG_IPV4_OTHER:
4136 case RTE_ETH_FLOW_NONFRAG_IPV6_OTHER:
4139 DRV_LOG(ERR, "port %u invalid flow type%d",
4140 dev->data->port_id, fdir_filter->input.flow_type);
4141 rte_errno = ENOTSUP;
4147 #define FLOW_FDIR_CMP(f1, f2, fld) \
4148 memcmp(&(f1)->fld, &(f2)->fld, sizeof(f1->fld))
4151 * Compare two FDIR flows. If items and actions are identical, the two flows are
4155 * Pointer to Ethernet device.
4157 * FDIR flow to compare.
4159 * FDIR flow to compare.
4162 * Zero on match, 1 otherwise.
4165 flow_fdir_cmp(const struct mlx5_fdir *f1, const struct mlx5_fdir *f2)
4167 if (FLOW_FDIR_CMP(f1, f2, attr) ||
4168 FLOW_FDIR_CMP(f1, f2, l2) ||
4169 FLOW_FDIR_CMP(f1, f2, l2_mask) ||
4170 FLOW_FDIR_CMP(f1, f2, l3) ||
4171 FLOW_FDIR_CMP(f1, f2, l3_mask) ||
4172 FLOW_FDIR_CMP(f1, f2, l4) ||
4173 FLOW_FDIR_CMP(f1, f2, l4_mask) ||
4174 FLOW_FDIR_CMP(f1, f2, actions[0].type))
4176 if (f1->actions[0].type == RTE_FLOW_ACTION_TYPE_QUEUE &&
4177 FLOW_FDIR_CMP(f1, f2, queue))
4183 * Search device flow list to find out a matched FDIR flow.
4186 * Pointer to Ethernet device.
4188 * FDIR flow to lookup.
4191 * Pointer of flow if found, NULL otherwise.
4193 static struct rte_flow *
4194 flow_fdir_filter_lookup(struct rte_eth_dev *dev, struct mlx5_fdir *fdir_flow)
4196 struct mlx5_priv *priv = dev->data->dev_private;
4197 struct rte_flow *flow = NULL;
4200 TAILQ_FOREACH(flow, &priv->flows, next) {
4201 if (flow->fdir && !flow_fdir_cmp(flow->fdir, fdir_flow)) {
4202 DRV_LOG(DEBUG, "port %u found FDIR flow %p",
4203 dev->data->port_id, (void *)flow);
4211 * Add new flow director filter and store it in list.
4214 * Pointer to Ethernet device.
4215 * @param fdir_filter
4216 * Flow director filter to add.
4219 * 0 on success, a negative errno value otherwise and rte_errno is set.
4222 flow_fdir_filter_add(struct rte_eth_dev *dev,
4223 const struct rte_eth_fdir_filter *fdir_filter)
4225 struct mlx5_priv *priv = dev->data->dev_private;
4226 struct mlx5_fdir *fdir_flow;
4227 struct rte_flow *flow;
4230 fdir_flow = rte_zmalloc(__func__, sizeof(*fdir_flow), 0);
4235 ret = flow_fdir_filter_convert(dev, fdir_filter, fdir_flow);
4238 flow = flow_fdir_filter_lookup(dev, fdir_flow);
4243 flow = flow_list_create(dev, &priv->flows, &fdir_flow->attr,
4244 fdir_flow->items, fdir_flow->actions, true,
4248 assert(!flow->fdir);
4249 flow->fdir = fdir_flow;
4250 DRV_LOG(DEBUG, "port %u created FDIR flow %p",
4251 dev->data->port_id, (void *)flow);
4254 rte_free(fdir_flow);
4259 * Delete specific filter.
4262 * Pointer to Ethernet device.
4263 * @param fdir_filter
4264 * Filter to be deleted.
4267 * 0 on success, a negative errno value otherwise and rte_errno is set.
4270 flow_fdir_filter_delete(struct rte_eth_dev *dev,
4271 const struct rte_eth_fdir_filter *fdir_filter)
4273 struct mlx5_priv *priv = dev->data->dev_private;
4274 struct rte_flow *flow;
4275 struct mlx5_fdir fdir_flow = {
4280 ret = flow_fdir_filter_convert(dev, fdir_filter, &fdir_flow);
4283 flow = flow_fdir_filter_lookup(dev, &fdir_flow);
4288 flow_list_destroy(dev, &priv->flows, flow);
4289 DRV_LOG(DEBUG, "port %u deleted FDIR flow %p",
4290 dev->data->port_id, (void *)flow);
4295 * Update queue for specific filter.
4298 * Pointer to Ethernet device.
4299 * @param fdir_filter
4300 * Filter to be updated.
4303 * 0 on success, a negative errno value otherwise and rte_errno is set.
4306 flow_fdir_filter_update(struct rte_eth_dev *dev,
4307 const struct rte_eth_fdir_filter *fdir_filter)
4311 ret = flow_fdir_filter_delete(dev, fdir_filter);
4314 return flow_fdir_filter_add(dev, fdir_filter);
4318 * Flush all filters.
4321 * Pointer to Ethernet device.
4324 flow_fdir_filter_flush(struct rte_eth_dev *dev)
4326 struct mlx5_priv *priv = dev->data->dev_private;
4328 mlx5_flow_list_flush(dev, &priv->flows);
4332 * Get flow director information.
4335 * Pointer to Ethernet device.
4336 * @param[out] fdir_info
4337 * Resulting flow director information.
4340 flow_fdir_info_get(struct rte_eth_dev *dev, struct rte_eth_fdir_info *fdir_info)
4342 struct rte_eth_fdir_masks *mask =
4343 &dev->data->dev_conf.fdir_conf.mask;
4345 fdir_info->mode = dev->data->dev_conf.fdir_conf.mode;
4346 fdir_info->guarant_spc = 0;
4347 rte_memcpy(&fdir_info->mask, mask, sizeof(fdir_info->mask));
4348 fdir_info->max_flexpayload = 0;
4349 fdir_info->flow_types_mask[0] = 0;
4350 fdir_info->flex_payload_unit = 0;
4351 fdir_info->max_flex_payload_segment_num = 0;
4352 fdir_info->flex_payload_limit = 0;
4353 memset(&fdir_info->flex_conf, 0, sizeof(fdir_info->flex_conf));
4357 * Deal with flow director operations.
4360 * Pointer to Ethernet device.
4362 * Operation to perform.
4364 * Pointer to operation-specific structure.
4367 * 0 on success, a negative errno value otherwise and rte_errno is set.
4370 flow_fdir_ctrl_func(struct rte_eth_dev *dev, enum rte_filter_op filter_op,
4373 enum rte_fdir_mode fdir_mode =
4374 dev->data->dev_conf.fdir_conf.mode;
4376 if (filter_op == RTE_ETH_FILTER_NOP)
4378 if (fdir_mode != RTE_FDIR_MODE_PERFECT &&
4379 fdir_mode != RTE_FDIR_MODE_PERFECT_MAC_VLAN) {
4380 DRV_LOG(ERR, "port %u flow director mode %d not supported",
4381 dev->data->port_id, fdir_mode);
4385 switch (filter_op) {
4386 case RTE_ETH_FILTER_ADD:
4387 return flow_fdir_filter_add(dev, arg);
4388 case RTE_ETH_FILTER_UPDATE:
4389 return flow_fdir_filter_update(dev, arg);
4390 case RTE_ETH_FILTER_DELETE:
4391 return flow_fdir_filter_delete(dev, arg);
4392 case RTE_ETH_FILTER_FLUSH:
4393 flow_fdir_filter_flush(dev);
4395 case RTE_ETH_FILTER_INFO:
4396 flow_fdir_info_get(dev, arg);
4399 DRV_LOG(DEBUG, "port %u unknown operation %u",
4400 dev->data->port_id, filter_op);
4408 * Manage filter operations.
4411 * Pointer to Ethernet device structure.
4412 * @param filter_type
4415 * Operation to perform.
4417 * Pointer to operation-specific structure.
4420 * 0 on success, a negative errno value otherwise and rte_errno is set.
4423 mlx5_dev_filter_ctrl(struct rte_eth_dev *dev,
4424 enum rte_filter_type filter_type,
4425 enum rte_filter_op filter_op,
4428 switch (filter_type) {
4429 case RTE_ETH_FILTER_GENERIC:
4430 if (filter_op != RTE_ETH_FILTER_GET) {
4434 *(const void **)arg = &mlx5_flow_ops;
4436 case RTE_ETH_FILTER_FDIR:
4437 return flow_fdir_ctrl_func(dev, filter_op, arg);
4439 DRV_LOG(ERR, "port %u filter type (%d) not supported",
4440 dev->data->port_id, filter_type);
4441 rte_errno = ENOTSUP;
4447 #define MLX5_POOL_QUERY_FREQ_US 1000000
4450 * Set the periodic procedure for triggering asynchronous batch queries for all
4451 * the counter pools.
4454 * Pointer to mlx5_ibv_shared object.
4457 mlx5_set_query_alarm(struct mlx5_ibv_shared *sh)
4459 struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(sh, 0, 0);
4460 uint32_t pools_n = rte_atomic16_read(&cont->n_valid);
4463 cont = MLX5_CNT_CONTAINER(sh, 1, 0);
4464 pools_n += rte_atomic16_read(&cont->n_valid);
4465 us = MLX5_POOL_QUERY_FREQ_US / pools_n;
4466 DRV_LOG(DEBUG, "Set alarm for %u pools each %u us", pools_n, us);
4467 if (rte_eal_alarm_set(us, mlx5_flow_query_alarm, sh)) {
4468 sh->cmng.query_thread_on = 0;
4469 DRV_LOG(ERR, "Cannot reinitialize query alarm");
4471 sh->cmng.query_thread_on = 1;
4476 * The periodic procedure for triggering asynchronous batch queries for all the
4477 * counter pools. This function is probably called by the host thread.
4480 * The parameter for the alarm process.
4483 mlx5_flow_query_alarm(void *arg)
4485 struct mlx5_ibv_shared *sh = arg;
4486 struct mlx5_devx_obj *dcs;
4489 uint8_t batch = sh->cmng.batch;
4490 uint16_t pool_index = sh->cmng.pool_index;
4491 struct mlx5_pools_container *cont;
4492 struct mlx5_pools_container *mcont;
4493 struct mlx5_flow_counter_pool *pool;
4495 if (sh->cmng.pending_queries >= MLX5_MAX_PENDING_QUERIES)
4498 cont = MLX5_CNT_CONTAINER(sh, batch, 1);
4499 mcont = MLX5_CNT_CONTAINER(sh, batch, 0);
4500 /* Check if resize was done and need to flip a container. */
4501 if (cont != mcont) {
4503 /* Clean the old container. */
4504 rte_free(cont->pools);
4505 memset(cont, 0, sizeof(*cont));
4508 /* Flip the host container. */
4509 sh->cmng.mhi[batch] ^= (uint8_t)2;
4513 /* 2 empty containers case is unexpected. */
4514 if (unlikely(batch != sh->cmng.batch))
4518 goto next_container;
4520 pool = cont->pools[pool_index];
4522 /* There is a pool query in progress. */
4525 LIST_FIRST(&sh->cmng.free_stat_raws);
4527 /* No free counter statistics raw memory. */
4529 dcs = (struct mlx5_devx_obj *)(uintptr_t)rte_atomic64_read
4531 offset = batch ? 0 : dcs->id % MLX5_COUNTERS_PER_POOL;
4532 ret = mlx5_devx_cmd_flow_counter_query(dcs, 0, MLX5_COUNTERS_PER_POOL -
4534 pool->raw_hw->mem_mng->dm->id,
4536 (pool->raw_hw->data + offset),
4538 (uint64_t)(uintptr_t)pool);
4540 DRV_LOG(ERR, "Failed to trigger asynchronous query for dcs ID"
4541 " %d", pool->min_dcs->id);
4542 pool->raw_hw = NULL;
4545 pool->raw_hw->min_dcs_id = dcs->id;
4546 LIST_REMOVE(pool->raw_hw, next);
4547 sh->cmng.pending_queries++;
4549 if (pool_index >= rte_atomic16_read(&cont->n_valid)) {
4554 sh->cmng.batch = batch;
4555 sh->cmng.pool_index = pool_index;
4556 mlx5_set_query_alarm(sh);
4560 * Handler for the HW respond about ready values from an asynchronous batch
4561 * query. This function is probably called by the host thread.
4564 * The pointer to the shared IB device context.
4565 * @param[in] async_id
4566 * The Devx async ID.
4568 * The status of the completion.
4571 mlx5_flow_async_pool_query_handle(struct mlx5_ibv_shared *sh,
4572 uint64_t async_id, int status)
4574 struct mlx5_flow_counter_pool *pool =
4575 (struct mlx5_flow_counter_pool *)(uintptr_t)async_id;
4576 struct mlx5_counter_stats_raw *raw_to_free;
4578 if (unlikely(status)) {
4579 raw_to_free = pool->raw_hw;
4581 raw_to_free = pool->raw;
4582 rte_spinlock_lock(&pool->sl);
4583 pool->raw = pool->raw_hw;
4584 rte_spinlock_unlock(&pool->sl);
4585 rte_atomic64_add(&pool->query_gen, 1);
4586 /* Be sure the new raw counters data is updated in memory. */
4589 LIST_INSERT_HEAD(&sh->cmng.free_stat_raws, raw_to_free, next);
4590 pool->raw_hw = NULL;
4591 sh->cmng.pending_queries--;
4595 * Translate the rte_flow group index to HW table value.
4597 * @param[in] attributes
4598 * Pointer to flow attributes
4599 * @param[in] external
4600 * Value is part of flow rule created by request external to PMD.
4602 * rte_flow group index value.
4606 * Pointer to error structure.
4609 * 0 on success, a negative errno value otherwise and rte_errno is set.
4612 mlx5_flow_group_to_table(const struct rte_flow_attr *attributes, bool external,
4613 uint32_t group, uint32_t *table,
4614 struct rte_flow_error *error)
4616 if (attributes->transfer && external) {
4617 if (group == UINT32_MAX)
4618 return rte_flow_error_set
4620 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4622 "group index not supported");
4631 * Discover availability of metadata reg_c's.
4633 * Iteratively use test flows to check availability.
4636 * Pointer to the Ethernet device structure.
4639 * 0 on success, a negative errno value otherwise and rte_errno is set.
4642 mlx5_flow_discover_mreg_c(struct rte_eth_dev *dev)
4644 struct mlx5_priv *priv = dev->data->dev_private;
4645 struct mlx5_dev_config *config = &priv->config;
4646 enum modify_reg idx;
4649 /* reg_c[0] and reg_c[1] are reserved. */
4650 config->flow_mreg_c[n++] = REG_C_0;
4651 config->flow_mreg_c[n++] = REG_C_1;
4652 /* Discover availability of other reg_c's. */
4653 for (idx = REG_C_2; idx <= REG_C_7; ++idx) {
4654 struct rte_flow_attr attr = {
4655 .group = MLX5_FLOW_MREG_CP_TABLE_GROUP,
4656 .priority = MLX5_FLOW_PRIO_RSVD,
4659 struct rte_flow_item items[] = {
4661 .type = RTE_FLOW_ITEM_TYPE_END,
4664 struct rte_flow_action actions[] = {
4666 .type = MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG,
4667 .conf = &(struct mlx5_flow_action_copy_mreg){
4673 .type = RTE_FLOW_ACTION_TYPE_JUMP,
4674 .conf = &(struct rte_flow_action_jump){
4675 .group = MLX5_FLOW_MREG_ACT_TABLE_GROUP,
4679 .type = RTE_FLOW_ACTION_TYPE_END,
4682 struct rte_flow *flow;
4683 struct rte_flow_error error;
4685 if (!config->dv_flow_en)
4687 /* Create internal flow, validation skips copy action. */
4688 flow = flow_list_create(dev, NULL, &attr, items,
4689 actions, false, &error);
4692 if (dev->data->dev_started || !flow_drv_apply(dev, flow, NULL))
4693 config->flow_mreg_c[n++] = idx;
4694 flow_list_destroy(dev, NULL, flow);
4696 for (; n < MLX5_MREG_C_NUM; ++n)
4697 config->flow_mreg_c[n] = REG_NONE;