1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018 Mellanox Technologies, Ltd
5 #ifndef RTE_PMD_MLX5_FLOW_H_
6 #define RTE_PMD_MLX5_FLOW_H_
8 #include <netinet/in.h>
15 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
17 #pragma GCC diagnostic ignored "-Wpedantic"
19 #include <infiniband/verbs.h>
21 #pragma GCC diagnostic error "-Wpedantic"
24 /* Pattern outer Layer bits. */
25 #define MLX5_FLOW_LAYER_OUTER_L2 (1u << 0)
26 #define MLX5_FLOW_LAYER_OUTER_L3_IPV4 (1u << 1)
27 #define MLX5_FLOW_LAYER_OUTER_L3_IPV6 (1u << 2)
28 #define MLX5_FLOW_LAYER_OUTER_L4_UDP (1u << 3)
29 #define MLX5_FLOW_LAYER_OUTER_L4_TCP (1u << 4)
30 #define MLX5_FLOW_LAYER_OUTER_VLAN (1u << 5)
32 /* Pattern inner Layer bits. */
33 #define MLX5_FLOW_LAYER_INNER_L2 (1u << 6)
34 #define MLX5_FLOW_LAYER_INNER_L3_IPV4 (1u << 7)
35 #define MLX5_FLOW_LAYER_INNER_L3_IPV6 (1u << 8)
36 #define MLX5_FLOW_LAYER_INNER_L4_UDP (1u << 9)
37 #define MLX5_FLOW_LAYER_INNER_L4_TCP (1u << 10)
38 #define MLX5_FLOW_LAYER_INNER_VLAN (1u << 11)
40 /* Pattern tunnel Layer bits. */
41 #define MLX5_FLOW_LAYER_VXLAN (1u << 12)
42 #define MLX5_FLOW_LAYER_VXLAN_GPE (1u << 13)
43 #define MLX5_FLOW_LAYER_GRE (1u << 14)
44 #define MLX5_FLOW_LAYER_MPLS (1u << 15)
47 #define MLX5_FLOW_LAYER_OUTER_L3 \
48 (MLX5_FLOW_LAYER_OUTER_L3_IPV4 | MLX5_FLOW_LAYER_OUTER_L3_IPV6)
49 #define MLX5_FLOW_LAYER_OUTER_L4 \
50 (MLX5_FLOW_LAYER_OUTER_L4_UDP | MLX5_FLOW_LAYER_OUTER_L4_TCP)
51 #define MLX5_FLOW_LAYER_OUTER \
52 (MLX5_FLOW_LAYER_OUTER_L2 | MLX5_FLOW_LAYER_OUTER_L3 | \
53 MLX5_FLOW_LAYER_OUTER_L4)
56 #define MLX5_FLOW_LAYER_TUNNEL \
57 (MLX5_FLOW_LAYER_VXLAN | MLX5_FLOW_LAYER_VXLAN_GPE | \
58 MLX5_FLOW_LAYER_GRE | MLX5_FLOW_LAYER_MPLS)
61 #define MLX5_FLOW_LAYER_INNER_L3 \
62 (MLX5_FLOW_LAYER_INNER_L3_IPV4 | MLX5_FLOW_LAYER_INNER_L3_IPV6)
63 #define MLX5_FLOW_LAYER_INNER_L4 \
64 (MLX5_FLOW_LAYER_INNER_L4_UDP | MLX5_FLOW_LAYER_INNER_L4_TCP)
65 #define MLX5_FLOW_LAYER_INNER \
66 (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3 | \
67 MLX5_FLOW_LAYER_INNER_L4)
69 /* Actions that modify the fate of matching traffic. */
70 #define MLX5_FLOW_FATE_DROP (1u << 0)
71 #define MLX5_FLOW_FATE_QUEUE (1u << 1)
72 #define MLX5_FLOW_FATE_RSS (1u << 2)
74 /* Modify a packet. */
75 #define MLX5_FLOW_MOD_FLAG (1u << 0)
76 #define MLX5_FLOW_MOD_MARK (1u << 1)
77 #define MLX5_FLOW_MOD_COUNT (1u << 2)
80 #define MLX5_FLOW_ACTION_DROP (1u << 0)
81 #define MLX5_FLOW_ACTION_QUEUE (1u << 1)
82 #define MLX5_FLOW_ACTION_RSS (1u << 2)
83 #define MLX5_FLOW_ACTION_FLAG (1u << 3)
84 #define MLX5_FLOW_ACTION_MARK (1u << 4)
85 #define MLX5_FLOW_ACTION_COUNT (1u << 5)
87 #define MLX5_FLOW_FATE_ACTIONS \
88 (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)
91 #define IPPROTO_MPLS 137
94 /* Priority reserved for default flows. */
95 #define MLX5_FLOW_PRIO_RSVD ((uint32_t)-1)
98 * Number of sub priorities.
99 * For each kind of pattern matching i.e. L2, L3, L4 to have a correct
100 * matching on the NIC (firmware dependent) L4 most have the higher priority
101 * followed by L3 and ending with L2.
103 #define MLX5_PRIORITY_MAP_L2 2
104 #define MLX5_PRIORITY_MAP_L3 1
105 #define MLX5_PRIORITY_MAP_L4 0
106 #define MLX5_PRIORITY_MAP_MAX 3
108 /* Max number of actions per DV flow. */
109 #define MLX5_DV_MAX_NUMBER_OF_ACTIONS 8
111 /* Matcher PRM representation */
112 struct mlx5_flow_dv_match_params {
114 /**< Size of match value. Do NOT split size and key! */
115 uint32_t buf[MLX5_ST_SZ_DW(fte_match_param)];
116 /**< Matcher value. This value is used as the mask or as a key. */
119 /* Matcher structure. */
120 struct mlx5_flow_dv_matcher {
121 LIST_ENTRY(mlx5_flow_dv_matcher) next;
122 /* Pointer to the next element. */
123 rte_atomic32_t refcnt; /**< Reference counter. */
124 void *matcher_object; /**< Pointer to DV matcher */
125 uint16_t crc; /**< CRC of key. */
126 uint16_t priority; /**< Priority of matcher. */
127 uint8_t egress; /**< Egress matcher. */
128 struct mlx5_flow_dv_match_params mask; /**< Matcher mask. */
131 /* DV flows structure. */
132 struct mlx5_flow_dv {
133 uint64_t hash_fields; /**< Fields that participate in the hash. */
134 struct mlx5_hrxq *hrxq; /**< Hash Rx queues. */
136 struct mlx5_flow_dv_matcher *matcher; /**< Cache to matcher. */
137 struct mlx5_flow_dv_match_params value;
138 /**< Holds the value that the packet is compared to. */
139 struct ibv_flow *flow; /**< Installed flow. */
142 /* Verbs specification header. */
143 struct ibv_spec_header {
144 enum ibv_flow_spec_type type;
148 /** Handles information leading to a drop fate. */
149 struct mlx5_flow_verbs {
150 LIST_ENTRY(mlx5_flow_verbs) next;
151 unsigned int size; /**< Size of the attribute. */
153 struct ibv_flow_attr *attr;
154 /**< Pointer to the Specification buffer. */
155 uint8_t *specs; /**< Pointer to the specifications. */
157 struct ibv_flow *flow; /**< Verbs flow pointer. */
158 struct mlx5_hrxq *hrxq; /**< Hash Rx queue object. */
159 uint64_t hash_fields; /**< Verbs hash Rx queue hash fields. */
162 /** Device flow structure. */
164 LIST_ENTRY(mlx5_flow) next;
165 struct rte_flow *flow; /**< Pointer to the main flow. */
166 uint32_t layers; /**< Bit-fields that holds the detected layers. */
168 struct mlx5_flow_dv dv;
169 struct mlx5_flow_verbs verbs;
173 /* Counters information. */
174 struct mlx5_flow_counter {
175 LIST_ENTRY(mlx5_flow_counter) next; /**< Pointer to the next counter. */
176 uint32_t shared:1; /**< Share counter ID with other flow rules. */
177 uint32_t ref_cnt:31; /**< Reference counter. */
178 uint32_t id; /**< Counter ID. */
179 struct ibv_counter_set *cs; /**< Holds the counters for the rule. */
180 uint64_t hits; /**< Number of packets matched by the rule. */
181 uint64_t bytes; /**< Number of bytes matched by the rule. */
184 /* Flow structure. */
186 TAILQ_ENTRY(rte_flow) next; /**< Pointer to the next flow structure. */
187 struct rte_flow_attr attributes; /**< User flow attribute. */
189 /**< Bit-fields of present layers see MLX5_FLOW_LAYER_*. */
190 struct mlx5_flow_counter *counter; /**< Holds flow counter. */
191 struct rte_flow_action_rss rss;/**< RSS context. */
192 uint8_t key[MLX5_RSS_HASH_KEY_LEN]; /**< RSS hash key. */
193 uint16_t (*queue)[]; /**< Destination queues to redirect traffic to. */
194 void *nl_flow; /**< Netlink flow buffer if relevant. */
195 LIST_HEAD(dev_flows, mlx5_flow) dev_flows;
196 /**< Device flows that are part of the flow. */
197 uint32_t actions; /**< Bit-fields which mark all detected actions. */
199 typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev,
200 const struct rte_flow_attr *attr,
201 const struct rte_flow_item items[],
202 const struct rte_flow_action actions[],
203 struct rte_flow_error *error);
204 typedef struct mlx5_flow *(*mlx5_flow_prepare_t)
205 (const struct rte_flow_attr *attr, const struct rte_flow_item items[],
206 const struct rte_flow_action actions[], uint64_t *item_flags,
207 uint64_t *action_flags, struct rte_flow_error *error);
208 typedef int (*mlx5_flow_translate_t)(struct rte_eth_dev *dev,
209 struct mlx5_flow *dev_flow,
210 const struct rte_flow_attr *attr,
211 const struct rte_flow_item items[],
212 const struct rte_flow_action actions[],
213 struct rte_flow_error *error);
214 typedef int (*mlx5_flow_apply_t)(struct rte_eth_dev *dev, struct rte_flow *flow,
215 struct rte_flow_error *error);
216 typedef void (*mlx5_flow_remove_t)(struct rte_eth_dev *dev,
217 struct rte_flow *flow);
218 typedef void (*mlx5_flow_destroy_t)(struct rte_eth_dev *dev,
219 struct rte_flow *flow);
220 struct mlx5_flow_driver_ops {
221 mlx5_flow_validate_t validate;
222 mlx5_flow_prepare_t prepare;
223 mlx5_flow_translate_t translate;
224 mlx5_flow_apply_t apply;
225 mlx5_flow_remove_t remove;
226 mlx5_flow_destroy_t destroy;
231 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
232 uint32_t subpriority);
233 int mlx5_flow_validate_action_count(struct rte_eth_dev *dev,
234 struct rte_flow_error *error);
235 int mlx5_flow_validate_action_drop(uint64_t action_flags,
236 struct rte_flow_error *error);
237 int mlx5_flow_validate_action_flag(uint64_t action_flags,
238 struct rte_flow_error *error);
239 int mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
240 uint64_t action_flags,
241 struct rte_flow_error *error);
242 int mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
243 uint64_t action_flags,
244 struct rte_eth_dev *dev,
245 struct rte_flow_error *error);
246 int mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
247 uint64_t action_flags,
248 struct rte_eth_dev *dev,
249 struct rte_flow_error *error);
250 int mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
251 const struct rte_flow_attr *attributes,
252 struct rte_flow_error *error);
253 int mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
255 struct rte_flow_error *error);
256 int mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
258 uint8_t target_protocol,
259 struct rte_flow_error *error);
260 int mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
262 struct rte_flow_error *error);
263 int mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
265 struct rte_flow_error *error);
266 int mlx5_flow_validate_item_mpls(const struct rte_flow_item *item,
268 uint8_t target_protocol,
269 struct rte_flow_error *error);
270 int mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
272 uint8_t target_protocol,
273 struct rte_flow_error *error);
274 int mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
276 uint8_t target_protocol,
277 struct rte_flow_error *error);
278 int mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
280 struct rte_flow_error *error);
281 int mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
283 struct rte_flow_error *error);
284 int mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
286 struct rte_eth_dev *dev,
287 struct rte_flow_error *error);
288 void mlx5_flow_init_driver_ops(struct rte_eth_dev *dev);
291 void mlx5_flow_dv_get_driver_ops(struct mlx5_flow_driver_ops *flow_ops);
293 /* mlx5_flow_verbs.c */
295 void mlx5_flow_verbs_get_driver_ops(struct mlx5_flow_driver_ops *flow_ops);
297 #endif /* RTE_PMD_MLX5_FLOW_H_ */