1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018 Mellanox Technologies, Ltd
5 #ifndef RTE_PMD_MLX5_FLOW_H_
6 #define RTE_PMD_MLX5_FLOW_H_
8 #include <netinet/in.h>
15 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
17 #pragma GCC diagnostic ignored "-Wpedantic"
19 #include <infiniband/verbs.h>
21 #pragma GCC diagnostic error "-Wpedantic"
27 /* Pattern outer Layer bits. */
28 #define MLX5_FLOW_LAYER_OUTER_L2 (1u << 0)
29 #define MLX5_FLOW_LAYER_OUTER_L3_IPV4 (1u << 1)
30 #define MLX5_FLOW_LAYER_OUTER_L3_IPV6 (1u << 2)
31 #define MLX5_FLOW_LAYER_OUTER_L4_UDP (1u << 3)
32 #define MLX5_FLOW_LAYER_OUTER_L4_TCP (1u << 4)
33 #define MLX5_FLOW_LAYER_OUTER_VLAN (1u << 5)
35 /* Pattern inner Layer bits. */
36 #define MLX5_FLOW_LAYER_INNER_L2 (1u << 6)
37 #define MLX5_FLOW_LAYER_INNER_L3_IPV4 (1u << 7)
38 #define MLX5_FLOW_LAYER_INNER_L3_IPV6 (1u << 8)
39 #define MLX5_FLOW_LAYER_INNER_L4_UDP (1u << 9)
40 #define MLX5_FLOW_LAYER_INNER_L4_TCP (1u << 10)
41 #define MLX5_FLOW_LAYER_INNER_VLAN (1u << 11)
43 /* Pattern tunnel Layer bits. */
44 #define MLX5_FLOW_LAYER_VXLAN (1u << 12)
45 #define MLX5_FLOW_LAYER_VXLAN_GPE (1u << 13)
46 #define MLX5_FLOW_LAYER_GRE (1u << 14)
47 #define MLX5_FLOW_LAYER_MPLS (1u << 15)
49 /* General pattern items bits. */
50 #define MLX5_FLOW_ITEM_METADATA (1u << 16)
51 #define MLX5_FLOW_ITEM_PORT_ID (1u << 17)
54 #define MLX5_FLOW_LAYER_OUTER_L3 \
55 (MLX5_FLOW_LAYER_OUTER_L3_IPV4 | MLX5_FLOW_LAYER_OUTER_L3_IPV6)
56 #define MLX5_FLOW_LAYER_OUTER_L4 \
57 (MLX5_FLOW_LAYER_OUTER_L4_UDP | MLX5_FLOW_LAYER_OUTER_L4_TCP)
58 #define MLX5_FLOW_LAYER_OUTER \
59 (MLX5_FLOW_LAYER_OUTER_L2 | MLX5_FLOW_LAYER_OUTER_L3 | \
60 MLX5_FLOW_LAYER_OUTER_L4)
63 #define MLX5_FLOW_LAYER_TUNNEL \
64 (MLX5_FLOW_LAYER_VXLAN | MLX5_FLOW_LAYER_VXLAN_GPE | \
65 MLX5_FLOW_LAYER_GRE | MLX5_FLOW_LAYER_MPLS)
68 #define MLX5_FLOW_LAYER_INNER_L3 \
69 (MLX5_FLOW_LAYER_INNER_L3_IPV4 | MLX5_FLOW_LAYER_INNER_L3_IPV6)
70 #define MLX5_FLOW_LAYER_INNER_L4 \
71 (MLX5_FLOW_LAYER_INNER_L4_UDP | MLX5_FLOW_LAYER_INNER_L4_TCP)
72 #define MLX5_FLOW_LAYER_INNER \
73 (MLX5_FLOW_LAYER_INNER_L2 | MLX5_FLOW_LAYER_INNER_L3 | \
74 MLX5_FLOW_LAYER_INNER_L4)
77 #define MLX5_FLOW_LAYER_L2 \
78 (MLX5_FLOW_LAYER_OUTER_L2 | MLX5_FLOW_LAYER_INNER_L2)
79 #define MLX5_FLOW_LAYER_L3_IPV4 \
80 (MLX5_FLOW_LAYER_OUTER_L3_IPV4 | MLX5_FLOW_LAYER_INNER_L3_IPV4)
81 #define MLX5_FLOW_LAYER_L3_IPV6 \
82 (MLX5_FLOW_LAYER_OUTER_L3_IPV6 | MLX5_FLOW_LAYER_INNER_L3_IPV6)
83 #define MLX5_FLOW_LAYER_L3 \
84 (MLX5_FLOW_LAYER_L3_IPV4 | MLX5_FLOW_LAYER_L3_IPV6)
85 #define MLX5_FLOW_LAYER_L4 \
86 (MLX5_FLOW_LAYER_OUTER_L4 | MLX5_FLOW_LAYER_INNER_L4)
89 #define MLX5_FLOW_ACTION_DROP (1u << 0)
90 #define MLX5_FLOW_ACTION_QUEUE (1u << 1)
91 #define MLX5_FLOW_ACTION_RSS (1u << 2)
92 #define MLX5_FLOW_ACTION_FLAG (1u << 3)
93 #define MLX5_FLOW_ACTION_MARK (1u << 4)
94 #define MLX5_FLOW_ACTION_COUNT (1u << 5)
95 #define MLX5_FLOW_ACTION_PORT_ID (1u << 6)
96 #define MLX5_FLOW_ACTION_OF_POP_VLAN (1u << 7)
97 #define MLX5_FLOW_ACTION_OF_PUSH_VLAN (1u << 8)
98 #define MLX5_FLOW_ACTION_OF_SET_VLAN_VID (1u << 9)
99 #define MLX5_FLOW_ACTION_OF_SET_VLAN_PCP (1u << 10)
100 #define MLX5_FLOW_ACTION_SET_IPV4_SRC (1u << 11)
101 #define MLX5_FLOW_ACTION_SET_IPV4_DST (1u << 12)
102 #define MLX5_FLOW_ACTION_SET_IPV6_SRC (1u << 13)
103 #define MLX5_FLOW_ACTION_SET_IPV6_DST (1u << 14)
104 #define MLX5_FLOW_ACTION_SET_TP_SRC (1u << 15)
105 #define MLX5_FLOW_ACTION_SET_TP_DST (1u << 16)
106 #define MLX5_FLOW_ACTION_JUMP (1u << 17)
107 #define MLX5_FLOW_ACTION_SET_TTL (1u << 18)
108 #define MLX5_FLOW_ACTION_DEC_TTL (1u << 19)
109 #define MLX5_FLOW_ACTION_SET_MAC_SRC (1u << 20)
110 #define MLX5_FLOW_ACTION_SET_MAC_DST (1u << 21)
111 #define MLX5_FLOW_ACTION_VXLAN_ENCAP (1u << 22)
112 #define MLX5_FLOW_ACTION_VXLAN_DECAP (1u << 23)
113 #define MLX5_FLOW_ACTION_NVGRE_ENCAP (1u << 24)
114 #define MLX5_FLOW_ACTION_NVGRE_DECAP (1u << 25)
115 #define MLX5_FLOW_ACTION_RAW_ENCAP (1u << 26)
116 #define MLX5_FLOW_ACTION_RAW_DECAP (1u << 27)
118 #define MLX5_FLOW_FATE_ACTIONS \
119 (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE | \
120 MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_JUMP)
122 #define MLX5_FLOW_FATE_ESWITCH_ACTIONS \
123 (MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_PORT_ID | \
124 MLX5_FLOW_ACTION_JUMP)
126 #define MLX5_FLOW_ENCAP_ACTIONS (MLX5_FLOW_ACTION_VXLAN_ENCAP | \
127 MLX5_FLOW_ACTION_NVGRE_ENCAP | \
128 MLX5_FLOW_ACTION_RAW_ENCAP)
130 #define MLX5_FLOW_DECAP_ACTIONS (MLX5_FLOW_ACTION_VXLAN_DECAP | \
131 MLX5_FLOW_ACTION_NVGRE_DECAP | \
132 MLX5_FLOW_ACTION_RAW_DECAP)
134 #define MLX5_FLOW_MODIFY_HDR_ACTIONS (MLX5_FLOW_ACTION_SET_IPV4_SRC | \
135 MLX5_FLOW_ACTION_SET_IPV4_DST | \
136 MLX5_FLOW_ACTION_SET_IPV6_SRC | \
137 MLX5_FLOW_ACTION_SET_IPV6_DST | \
138 MLX5_FLOW_ACTION_SET_TP_SRC | \
139 MLX5_FLOW_ACTION_SET_TP_DST | \
140 MLX5_FLOW_ACTION_SET_TTL | \
141 MLX5_FLOW_ACTION_DEC_TTL | \
142 MLX5_FLOW_ACTION_SET_MAC_SRC | \
143 MLX5_FLOW_ACTION_SET_MAC_DST)
146 #define IPPROTO_MPLS 137
149 /* UDP port number for MPLS */
150 #define MLX5_UDP_PORT_MPLS 6635
152 /* UDP port numbers for VxLAN. */
153 #define MLX5_UDP_PORT_VXLAN 4789
154 #define MLX5_UDP_PORT_VXLAN_GPE 4790
156 /* Priority reserved for default flows. */
157 #define MLX5_FLOW_PRIO_RSVD ((uint32_t)-1)
160 * Number of sub priorities.
161 * For each kind of pattern matching i.e. L2, L3, L4 to have a correct
162 * matching on the NIC (firmware dependent) L4 most have the higher priority
163 * followed by L3 and ending with L2.
165 #define MLX5_PRIORITY_MAP_L2 2
166 #define MLX5_PRIORITY_MAP_L3 1
167 #define MLX5_PRIORITY_MAP_L4 0
168 #define MLX5_PRIORITY_MAP_MAX 3
170 /* Valid layer type for IPV4 RSS. */
171 #define MLX5_IPV4_LAYER_TYPES \
172 (ETH_RSS_IPV4 | ETH_RSS_FRAG_IPV4 | \
173 ETH_RSS_NONFRAG_IPV4_TCP | ETH_RSS_NONFRAG_IPV4_UDP | \
174 ETH_RSS_NONFRAG_IPV4_OTHER)
176 /* IBV hash source bits for IPV4. */
177 #define MLX5_IPV4_IBV_RX_HASH (IBV_RX_HASH_SRC_IPV4 | IBV_RX_HASH_DST_IPV4)
179 /* Valid layer type for IPV6 RSS. */
180 #define MLX5_IPV6_LAYER_TYPES \
181 (ETH_RSS_IPV6 | ETH_RSS_FRAG_IPV6 | ETH_RSS_NONFRAG_IPV6_TCP | \
182 ETH_RSS_NONFRAG_IPV6_UDP | ETH_RSS_IPV6_EX | ETH_RSS_IPV6_TCP_EX | \
183 ETH_RSS_IPV6_UDP_EX | ETH_RSS_NONFRAG_IPV6_OTHER)
185 /* IBV hash source bits for IPV6. */
186 #define MLX5_IPV6_IBV_RX_HASH (IBV_RX_HASH_SRC_IPV6 | IBV_RX_HASH_DST_IPV6)
188 enum mlx5_flow_drv_type {
192 MLX5_FLOW_TYPE_VERBS,
196 /* Matcher PRM representation */
197 struct mlx5_flow_dv_match_params {
199 /**< Size of match value. Do NOT split size and key! */
200 uint32_t buf[MLX5_ST_SZ_DW(fte_match_param)];
201 /**< Matcher value. This value is used as the mask or as a key. */
204 /* Matcher structure. */
205 struct mlx5_flow_dv_matcher {
206 LIST_ENTRY(mlx5_flow_dv_matcher) next;
207 /* Pointer to the next element. */
208 rte_atomic32_t refcnt; /**< Reference counter. */
209 void *matcher_object; /**< Pointer to DV matcher */
210 uint16_t crc; /**< CRC of key. */
211 uint16_t priority; /**< Priority of matcher. */
212 uint8_t egress; /**< Egress matcher. */
213 uint8_t transfer; /**< 1 if the flow is E-Switch flow. */
214 uint32_t group; /**< The matcher group. */
215 struct mlx5_flow_dv_match_params mask; /**< Matcher mask. */
218 #define MLX5_ENCAP_MAX_LEN 132
220 /* Encap/decap resource structure. */
221 struct mlx5_flow_dv_encap_decap_resource {
222 LIST_ENTRY(mlx5_flow_dv_encap_decap_resource) next;
223 /* Pointer to next element. */
224 rte_atomic32_t refcnt; /**< Reference counter. */
226 /**< Verbs encap/decap action object. */
227 uint8_t buf[MLX5_ENCAP_MAX_LEN];
229 uint8_t reformat_type;
231 uint64_t flags; /**< Flags for RDMA API. */
234 /* Tag resource structure. */
235 struct mlx5_flow_dv_tag_resource {
236 LIST_ENTRY(mlx5_flow_dv_tag_resource) next;
237 /* Pointer to next element. */
238 rte_atomic32_t refcnt; /**< Reference counter. */
240 /**< Verbs tag action object. */
241 uint32_t tag; /**< the tag value. */
244 /* Number of modification commands. */
245 #define MLX5_MODIFY_NUM 8
247 /* Modify resource structure */
248 struct mlx5_flow_dv_modify_hdr_resource {
249 LIST_ENTRY(mlx5_flow_dv_modify_hdr_resource) next;
250 /* Pointer to next element. */
251 rte_atomic32_t refcnt; /**< Reference counter. */
252 struct ibv_flow_action *verbs_action;
253 /**< Verbs modify header action object. */
254 uint8_t ft_type; /**< Flow table type, Rx or Tx. */
255 uint32_t actions_num; /**< Number of modification actions. */
256 struct mlx5_modification_cmd actions[MLX5_MODIFY_NUM];
257 /**< Modification actions. */
260 /* Jump action resource structure. */
261 struct mlx5_flow_dv_jump_tbl_resource {
262 LIST_ENTRY(mlx5_flow_dv_jump_tbl_resource) next;
263 /* Pointer to next element. */
264 rte_atomic32_t refcnt; /**< Reference counter. */
265 void *action; /**< Pointer to the rdma core action. */
266 uint8_t ft_type; /**< Flow table type, Rx or Tx. */
267 struct mlx5_flow_tbl_resource *tbl; /**< The target table. */
271 * Max number of actions per DV flow.
272 * See CREATE_FLOW_MAX_FLOW_ACTIONS_SUPPORTED
273 * In rdma-core file providers/mlx5/verbs.c
275 #define MLX5_DV_MAX_NUMBER_OF_ACTIONS 8
277 /* DV flows structure. */
278 struct mlx5_flow_dv {
279 uint64_t hash_fields; /**< Fields that participate in the hash. */
280 struct mlx5_hrxq *hrxq; /**< Hash Rx queues. */
282 struct mlx5_flow_dv_matcher *matcher; /**< Cache to matcher. */
283 struct mlx5_flow_dv_match_params value;
284 /**< Holds the value that the packet is compared to. */
285 struct mlx5_flow_dv_encap_decap_resource *encap_decap;
286 /**< Pointer to encap/decap resource in cache. */
287 struct mlx5_flow_dv_modify_hdr_resource *modify_hdr;
288 /**< Pointer to modify header resource in cache. */
289 struct ibv_flow *flow; /**< Installed flow. */
290 struct mlx5_flow_dv_jump_tbl_resource *jump;
291 /**< Pointer to the jump action resource. */
292 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
293 void *actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS];
296 int actions_n; /**< number of actions. */
299 /** Linux TC flower driver for E-Switch flow. */
300 struct mlx5_flow_tcf {
301 struct nlmsghdr *nlh;
303 uint32_t *ptc_flags; /**< tc rule applied flags. */
304 union { /**< Tunnel encap/decap descriptor. */
305 struct flow_tcf_tunnel_hdr *tunnel;
306 struct flow_tcf_vxlan_decap *vxlan_decap;
307 struct flow_tcf_vxlan_encap *vxlan_encap;
309 uint32_t applied:1; /**< Whether rule is currently applied. */
311 uint32_t nlsize; /**< Size of NL message buffer for debug check. */
315 /* Verbs specification header. */
316 struct ibv_spec_header {
317 enum ibv_flow_spec_type type;
321 /** Handles information leading to a drop fate. */
322 struct mlx5_flow_verbs {
323 LIST_ENTRY(mlx5_flow_verbs) next;
324 unsigned int size; /**< Size of the attribute. */
326 struct ibv_flow_attr *attr;
327 /**< Pointer to the Specification buffer. */
328 uint8_t *specs; /**< Pointer to the specifications. */
330 struct ibv_flow *flow; /**< Verbs flow pointer. */
331 struct mlx5_hrxq *hrxq; /**< Hash Rx queue object. */
332 uint64_t hash_fields; /**< Verbs hash Rx queue hash fields. */
335 /** Device flow structure. */
337 LIST_ENTRY(mlx5_flow) next;
338 struct rte_flow *flow; /**< Pointer to the main flow. */
340 /**< Bit-fields of present layers, see MLX5_FLOW_LAYER_*. */
342 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
343 struct mlx5_flow_dv dv;
345 struct mlx5_flow_tcf tcf;
346 struct mlx5_flow_verbs verbs;
350 /* Counters information. */
351 struct mlx5_flow_counter {
352 LIST_ENTRY(mlx5_flow_counter) next; /**< Pointer to the next counter. */
353 uint32_t shared:1; /**< Share counter ID with other flow rules. */
354 uint32_t ref_cnt:31; /**< Reference counter. */
355 uint32_t id; /**< Counter ID. */
356 union { /**< Holds the counters for the rule. */
357 #if defined(HAVE_IBV_DEVICE_COUNTERS_SET_V42)
358 struct ibv_counter_set *cs;
359 #elif defined(HAVE_IBV_DEVICE_COUNTERS_SET_V45)
360 struct ibv_counters *cs;
362 struct mlx5_devx_counter_set *dcs;
364 uint64_t hits; /**< Number of packets matched by the rule. */
365 uint64_t bytes; /**< Number of bytes matched by the rule. */
366 void *action; /**< Pointer to the dv action. */
369 /* Flow structure. */
371 TAILQ_ENTRY(rte_flow) next; /**< Pointer to the next flow structure. */
372 enum mlx5_flow_drv_type drv_type; /**< Driver type. */
373 struct mlx5_flow_counter *counter; /**< Holds flow counter. */
374 struct mlx5_flow_dv_tag_resource *tag_resource;
375 /**< pointer to the tag action. */
376 struct rte_flow_action_rss rss;/**< RSS context. */
377 uint8_t key[MLX5_RSS_HASH_KEY_LEN]; /**< RSS hash key. */
378 uint16_t (*queue)[]; /**< Destination queues to redirect traffic to. */
379 LIST_HEAD(dev_flows, mlx5_flow) dev_flows;
380 /**< Device flows that are part of the flow. */
382 /**< Bit-fields of detected actions, see MLX5_FLOW_ACTION_*. */
383 struct mlx5_fdir *fdir; /**< Pointer to associated FDIR if any. */
384 uint8_t ingress; /**< 1 if the flow is ingress. */
385 uint32_t group; /**< The group index. */
386 uint8_t transfer; /**< 1 if the flow is E-Switch flow. */
389 typedef int (*mlx5_flow_validate_t)(struct rte_eth_dev *dev,
390 const struct rte_flow_attr *attr,
391 const struct rte_flow_item items[],
392 const struct rte_flow_action actions[],
393 struct rte_flow_error *error);
394 typedef struct mlx5_flow *(*mlx5_flow_prepare_t)
395 (const struct rte_flow_attr *attr, const struct rte_flow_item items[],
396 const struct rte_flow_action actions[], struct rte_flow_error *error);
397 typedef int (*mlx5_flow_translate_t)(struct rte_eth_dev *dev,
398 struct mlx5_flow *dev_flow,
399 const struct rte_flow_attr *attr,
400 const struct rte_flow_item items[],
401 const struct rte_flow_action actions[],
402 struct rte_flow_error *error);
403 typedef int (*mlx5_flow_apply_t)(struct rte_eth_dev *dev, struct rte_flow *flow,
404 struct rte_flow_error *error);
405 typedef void (*mlx5_flow_remove_t)(struct rte_eth_dev *dev,
406 struct rte_flow *flow);
407 typedef void (*mlx5_flow_destroy_t)(struct rte_eth_dev *dev,
408 struct rte_flow *flow);
409 typedef int (*mlx5_flow_query_t)(struct rte_eth_dev *dev,
410 struct rte_flow *flow,
411 const struct rte_flow_action *actions,
413 struct rte_flow_error *error);
414 struct mlx5_flow_driver_ops {
415 mlx5_flow_validate_t validate;
416 mlx5_flow_prepare_t prepare;
417 mlx5_flow_translate_t translate;
418 mlx5_flow_apply_t apply;
419 mlx5_flow_remove_t remove;
420 mlx5_flow_destroy_t destroy;
421 mlx5_flow_query_t query;
426 uint64_t mlx5_flow_hashfields_adjust(struct mlx5_flow *dev_flow, int tunnel,
427 uint64_t layer_types,
428 uint64_t hash_fields);
429 uint32_t mlx5_flow_adjust_priority(struct rte_eth_dev *dev, int32_t priority,
430 uint32_t subpriority);
431 int mlx5_flow_validate_action_count(struct rte_eth_dev *dev,
432 const struct rte_flow_attr *attr,
433 struct rte_flow_error *error);
434 int mlx5_flow_validate_action_drop(uint64_t action_flags,
435 const struct rte_flow_attr *attr,
436 struct rte_flow_error *error);
437 int mlx5_flow_validate_action_flag(uint64_t action_flags,
438 const struct rte_flow_attr *attr,
439 struct rte_flow_error *error);
440 int mlx5_flow_validate_action_mark(const struct rte_flow_action *action,
441 uint64_t action_flags,
442 const struct rte_flow_attr *attr,
443 struct rte_flow_error *error);
444 int mlx5_flow_validate_action_queue(const struct rte_flow_action *action,
445 uint64_t action_flags,
446 struct rte_eth_dev *dev,
447 const struct rte_flow_attr *attr,
448 struct rte_flow_error *error);
449 int mlx5_flow_validate_action_rss(const struct rte_flow_action *action,
450 uint64_t action_flags,
451 struct rte_eth_dev *dev,
452 const struct rte_flow_attr *attr,
454 struct rte_flow_error *error);
455 int mlx5_flow_validate_attributes(struct rte_eth_dev *dev,
456 const struct rte_flow_attr *attributes,
457 struct rte_flow_error *error);
458 int mlx5_flow_item_acceptable(const struct rte_flow_item *item,
460 const uint8_t *nic_mask,
462 struct rte_flow_error *error);
463 int mlx5_flow_validate_item_eth(const struct rte_flow_item *item,
465 struct rte_flow_error *error);
466 int mlx5_flow_validate_item_gre(const struct rte_flow_item *item,
468 uint8_t target_protocol,
469 struct rte_flow_error *error);
470 int mlx5_flow_validate_item_ipv4(const struct rte_flow_item *item,
472 const struct rte_flow_item_ipv4 *acc_mask,
473 struct rte_flow_error *error);
474 int mlx5_flow_validate_item_ipv6(const struct rte_flow_item *item,
476 const struct rte_flow_item_ipv6 *acc_mask,
477 struct rte_flow_error *error);
478 int mlx5_flow_validate_item_mpls(struct rte_eth_dev *dev,
479 const struct rte_flow_item *item,
482 struct rte_flow_error *error);
483 int mlx5_flow_validate_item_tcp(const struct rte_flow_item *item,
485 uint8_t target_protocol,
486 const struct rte_flow_item_tcp *flow_mask,
487 struct rte_flow_error *error);
488 int mlx5_flow_validate_item_udp(const struct rte_flow_item *item,
490 uint8_t target_protocol,
491 struct rte_flow_error *error);
492 int mlx5_flow_validate_item_vlan(const struct rte_flow_item *item,
494 struct rte_flow_error *error);
495 int mlx5_flow_validate_item_vxlan(const struct rte_flow_item *item,
497 struct rte_flow_error *error);
498 int mlx5_flow_validate_item_vxlan_gpe(const struct rte_flow_item *item,
500 struct rte_eth_dev *dev,
501 struct rte_flow_error *error);
503 /* mlx5_flow_tcf.c */
505 int mlx5_flow_tcf_init(struct mlx5_flow_tcf_context *ctx,
506 unsigned int ifindex, struct rte_flow_error *error);
507 struct mlx5_flow_tcf_context *mlx5_flow_tcf_context_create(void);
508 void mlx5_flow_tcf_context_destroy(struct mlx5_flow_tcf_context *ctx);
510 #endif /* RTE_PMD_MLX5_FLOW_H_ */