1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018 Mellanox Technologies, Ltd
11 #include <rte_common.h>
12 #include <rte_ether.h>
13 #include <ethdev_driver.h>
15 #include <rte_flow_driver.h>
16 #include <rte_malloc.h>
17 #include <rte_cycles.h>
20 #include <rte_vxlan.h>
22 #include <rte_eal_paging.h>
25 #include <rte_mtr_driver.h>
26 #include <rte_tailq.h>
28 #include <mlx5_glue.h>
29 #include <mlx5_devx_cmds.h>
31 #include <mlx5_malloc.h>
33 #include "mlx5_defs.h"
35 #include "mlx5_common_os.h"
36 #include "mlx5_flow.h"
37 #include "mlx5_flow_os.h"
40 #include "rte_pmd_mlx5.h"
42 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
44 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
45 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
48 #ifndef HAVE_MLX5DV_DR_ESWITCH
49 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
50 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
54 #ifndef HAVE_MLX5DV_DR
55 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
58 /* VLAN header definitions */
59 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
60 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
61 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
62 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
63 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
78 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
79 struct mlx5_flow_tbl_resource *tbl);
82 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
83 uint32_t encap_decap_idx);
86 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
89 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
92 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
96 * Initialize flow attributes structure according to flow items' types.
98 * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
99 * mode. For tunnel mode, the items to be modified are the outermost ones.
102 * Pointer to item specification.
104 * Pointer to flow attributes structure.
105 * @param[in] dev_flow
106 * Pointer to the sub flow.
107 * @param[in] tunnel_decap
108 * Whether action is after tunnel decapsulation.
111 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
112 struct mlx5_flow *dev_flow, bool tunnel_decap)
114 uint64_t layers = dev_flow->handle->layers;
117 * If layers is already initialized, it means this dev_flow is the
118 * suffix flow, the layers flags is set by the prefix flow. Need to
119 * use the layer flags from prefix flow as the suffix flow may not
120 * have the user defined items as the flow is split.
123 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
125 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
127 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
129 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
134 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
135 uint8_t next_protocol = 0xff;
136 switch (item->type) {
137 case RTE_FLOW_ITEM_TYPE_GRE:
138 case RTE_FLOW_ITEM_TYPE_NVGRE:
139 case RTE_FLOW_ITEM_TYPE_VXLAN:
140 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
141 case RTE_FLOW_ITEM_TYPE_GENEVE:
142 case RTE_FLOW_ITEM_TYPE_MPLS:
146 case RTE_FLOW_ITEM_TYPE_IPV4:
149 if (item->mask != NULL &&
150 ((const struct rte_flow_item_ipv4 *)
151 item->mask)->hdr.next_proto_id)
153 ((const struct rte_flow_item_ipv4 *)
154 (item->spec))->hdr.next_proto_id &
155 ((const struct rte_flow_item_ipv4 *)
156 (item->mask))->hdr.next_proto_id;
157 if ((next_protocol == IPPROTO_IPIP ||
158 next_protocol == IPPROTO_IPV6) && tunnel_decap)
161 case RTE_FLOW_ITEM_TYPE_IPV6:
164 if (item->mask != NULL &&
165 ((const struct rte_flow_item_ipv6 *)
166 item->mask)->hdr.proto)
168 ((const struct rte_flow_item_ipv6 *)
169 (item->spec))->hdr.proto &
170 ((const struct rte_flow_item_ipv6 *)
171 (item->mask))->hdr.proto;
172 if ((next_protocol == IPPROTO_IPIP ||
173 next_protocol == IPPROTO_IPV6) && tunnel_decap)
176 case RTE_FLOW_ITEM_TYPE_UDP:
180 case RTE_FLOW_ITEM_TYPE_TCP:
192 * Convert rte_mtr_color to mlx5 color.
201 rte_col_2_mlx5_col(enum rte_color rcol)
204 case RTE_COLOR_GREEN:
205 return MLX5_FLOW_COLOR_GREEN;
206 case RTE_COLOR_YELLOW:
207 return MLX5_FLOW_COLOR_YELLOW;
209 return MLX5_FLOW_COLOR_RED;
213 return MLX5_FLOW_COLOR_UNDEFINED;
216 struct field_modify_info {
217 uint32_t size; /* Size of field in protocol header, in bytes. */
218 uint32_t offset; /* Offset of field in protocol header, in bytes. */
219 enum mlx5_modification_field id;
222 struct field_modify_info modify_eth[] = {
223 {4, 0, MLX5_MODI_OUT_DMAC_47_16},
224 {2, 4, MLX5_MODI_OUT_DMAC_15_0},
225 {4, 6, MLX5_MODI_OUT_SMAC_47_16},
226 {2, 10, MLX5_MODI_OUT_SMAC_15_0},
230 struct field_modify_info modify_vlan_out_first_vid[] = {
231 /* Size in bits !!! */
232 {12, 0, MLX5_MODI_OUT_FIRST_VID},
236 struct field_modify_info modify_ipv4[] = {
237 {1, 1, MLX5_MODI_OUT_IP_DSCP},
238 {1, 8, MLX5_MODI_OUT_IPV4_TTL},
239 {4, 12, MLX5_MODI_OUT_SIPV4},
240 {4, 16, MLX5_MODI_OUT_DIPV4},
244 struct field_modify_info modify_ipv6[] = {
245 {1, 0, MLX5_MODI_OUT_IP_DSCP},
246 {1, 7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
247 {4, 8, MLX5_MODI_OUT_SIPV6_127_96},
248 {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
249 {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
250 {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
251 {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
252 {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
253 {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
254 {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
258 struct field_modify_info modify_udp[] = {
259 {2, 0, MLX5_MODI_OUT_UDP_SPORT},
260 {2, 2, MLX5_MODI_OUT_UDP_DPORT},
264 struct field_modify_info modify_tcp[] = {
265 {2, 0, MLX5_MODI_OUT_TCP_SPORT},
266 {2, 2, MLX5_MODI_OUT_TCP_DPORT},
267 {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
268 {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
272 static const struct rte_flow_item *
273 mlx5_flow_find_tunnel_item(const struct rte_flow_item *item)
275 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
276 switch (item->type) {
279 case RTE_FLOW_ITEM_TYPE_VXLAN:
280 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
281 case RTE_FLOW_ITEM_TYPE_GRE:
282 case RTE_FLOW_ITEM_TYPE_MPLS:
283 case RTE_FLOW_ITEM_TYPE_NVGRE:
284 case RTE_FLOW_ITEM_TYPE_GENEVE:
286 case RTE_FLOW_ITEM_TYPE_IPV4:
287 case RTE_FLOW_ITEM_TYPE_IPV6:
288 if (item[1].type == RTE_FLOW_ITEM_TYPE_IPV4 ||
289 item[1].type == RTE_FLOW_ITEM_TYPE_IPV6)
298 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
299 uint8_t next_protocol, uint64_t *item_flags,
302 MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
303 item->type == RTE_FLOW_ITEM_TYPE_IPV6);
304 if (next_protocol == IPPROTO_IPIP) {
305 *item_flags |= MLX5_FLOW_LAYER_IPIP;
308 if (next_protocol == IPPROTO_IPV6) {
309 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
314 static inline struct mlx5_hlist *
315 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
316 const char *name, uint32_t size, bool direct_key,
317 bool lcores_share, void *ctx,
318 mlx5_list_create_cb cb_create,
319 mlx5_list_match_cb cb_match,
320 mlx5_list_remove_cb cb_remove,
321 mlx5_list_clone_cb cb_clone,
322 mlx5_list_clone_free_cb cb_clone_free)
324 struct mlx5_hlist *hl;
325 struct mlx5_hlist *expected = NULL;
326 char s[MLX5_NAME_SIZE];
328 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
331 snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
332 hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
333 ctx, cb_create, cb_match, cb_remove, cb_clone,
336 DRV_LOG(ERR, "%s hash creation failed", name);
340 if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
343 mlx5_hlist_destroy(hl);
344 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
349 /* Update VLAN's VID/PCP based on input rte_flow_action.
352 * Pointer to struct rte_flow_action.
354 * Pointer to struct rte_vlan_hdr.
357 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
358 struct rte_vlan_hdr *vlan)
361 if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
363 ((const struct rte_flow_action_of_set_vlan_pcp *)
364 action->conf)->vlan_pcp;
365 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
366 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
367 vlan->vlan_tci |= vlan_tci;
368 } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
369 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
370 vlan->vlan_tci |= rte_be_to_cpu_16
371 (((const struct rte_flow_action_of_set_vlan_vid *)
372 action->conf)->vlan_vid);
377 * Fetch 1, 2, 3 or 4 byte field from the byte array
378 * and return as unsigned integer in host-endian format.
381 * Pointer to data array.
383 * Size of field to extract.
386 * converted field in host endian format.
388 static inline uint32_t
389 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
398 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
401 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
402 ret = (ret << 8) | *(data + sizeof(uint16_t));
405 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
416 * Convert modify-header action to DV specification.
418 * Data length of each action is determined by provided field description
419 * and the item mask. Data bit offset and width of each action is determined
420 * by provided item mask.
423 * Pointer to item specification.
425 * Pointer to field modification information.
426 * For MLX5_MODIFICATION_TYPE_SET specifies destination field.
427 * For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
428 * For MLX5_MODIFICATION_TYPE_COPY specifies source field.
430 * Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
431 * Negative offset value sets the same offset as source offset.
432 * size field is ignored, value is taken from source field.
433 * @param[in,out] resource
434 * Pointer to the modify-header resource.
436 * Type of modification.
438 * Pointer to the error structure.
441 * 0 on success, a negative errno value otherwise and rte_errno is set.
444 flow_dv_convert_modify_action(struct rte_flow_item *item,
445 struct field_modify_info *field,
446 struct field_modify_info *dcopy,
447 struct mlx5_flow_dv_modify_hdr_resource *resource,
448 uint32_t type, struct rte_flow_error *error)
450 uint32_t i = resource->actions_num;
451 struct mlx5_modification_cmd *actions = resource->actions;
452 uint32_t carry_b = 0;
455 * The item and mask are provided in big-endian format.
456 * The fields should be presented as in big-endian format either.
457 * Mask must be always present, it defines the actual field width.
459 MLX5_ASSERT(item->mask);
460 MLX5_ASSERT(field->size);
466 bool next_field = true;
467 bool next_dcopy = true;
469 if (i >= MLX5_MAX_MODIFY_NUM)
470 return rte_flow_error_set(error, EINVAL,
471 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
472 "too many items to modify");
473 /* Fetch variable byte size mask from the array. */
474 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
475 field->offset, field->size);
480 /* Deduce actual data width in bits from mask value. */
481 off_b = rte_bsf32(mask) + carry_b;
482 size_b = sizeof(uint32_t) * CHAR_BIT -
483 off_b - __builtin_clz(mask);
485 actions[i] = (struct mlx5_modification_cmd) {
489 .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
492 if (type == MLX5_MODIFICATION_TYPE_COPY) {
494 actions[i].dst_field = dcopy->id;
495 actions[i].dst_offset =
496 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
497 /* Convert entire record to big-endian format. */
498 actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
500 * Destination field overflow. Copy leftovers of
501 * a source field to the next destination field.
504 if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
507 dcopy->size * CHAR_BIT - dcopy->offset;
508 carry_b = actions[i].length;
512 * Not enough bits in a source filed to fill a
513 * destination field. Switch to the next source.
515 if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
516 (size_b == field->size * CHAR_BIT - off_b)) {
518 field->size * CHAR_BIT - off_b;
519 dcopy->offset += actions[i].length;
525 MLX5_ASSERT(item->spec);
526 data = flow_dv_fetch_field((const uint8_t *)item->spec +
527 field->offset, field->size);
528 /* Shift out the trailing masked bits from data. */
529 data = (data & mask) >> off_b;
530 actions[i].data1 = rte_cpu_to_be_32(data);
532 /* Convert entire record to expected big-endian format. */
533 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
537 } while (field->size);
538 if (resource->actions_num == i)
539 return rte_flow_error_set(error, EINVAL,
540 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
541 "invalid modification flow item");
542 resource->actions_num = i;
547 * Convert modify-header set IPv4 address action to DV specification.
549 * @param[in,out] resource
550 * Pointer to the modify-header resource.
552 * Pointer to action specification.
554 * Pointer to the error structure.
557 * 0 on success, a negative errno value otherwise and rte_errno is set.
560 flow_dv_convert_action_modify_ipv4
561 (struct mlx5_flow_dv_modify_hdr_resource *resource,
562 const struct rte_flow_action *action,
563 struct rte_flow_error *error)
565 const struct rte_flow_action_set_ipv4 *conf =
566 (const struct rte_flow_action_set_ipv4 *)(action->conf);
567 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
568 struct rte_flow_item_ipv4 ipv4;
569 struct rte_flow_item_ipv4 ipv4_mask;
571 memset(&ipv4, 0, sizeof(ipv4));
572 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
573 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
574 ipv4.hdr.src_addr = conf->ipv4_addr;
575 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
577 ipv4.hdr.dst_addr = conf->ipv4_addr;
578 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
581 item.mask = &ipv4_mask;
582 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
583 MLX5_MODIFICATION_TYPE_SET, error);
587 * Convert modify-header set IPv6 address action to DV specification.
589 * @param[in,out] resource
590 * Pointer to the modify-header resource.
592 * Pointer to action specification.
594 * Pointer to the error structure.
597 * 0 on success, a negative errno value otherwise and rte_errno is set.
600 flow_dv_convert_action_modify_ipv6
601 (struct mlx5_flow_dv_modify_hdr_resource *resource,
602 const struct rte_flow_action *action,
603 struct rte_flow_error *error)
605 const struct rte_flow_action_set_ipv6 *conf =
606 (const struct rte_flow_action_set_ipv6 *)(action->conf);
607 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
608 struct rte_flow_item_ipv6 ipv6;
609 struct rte_flow_item_ipv6 ipv6_mask;
611 memset(&ipv6, 0, sizeof(ipv6));
612 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
613 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
614 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
615 sizeof(ipv6.hdr.src_addr));
616 memcpy(&ipv6_mask.hdr.src_addr,
617 &rte_flow_item_ipv6_mask.hdr.src_addr,
618 sizeof(ipv6.hdr.src_addr));
620 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
621 sizeof(ipv6.hdr.dst_addr));
622 memcpy(&ipv6_mask.hdr.dst_addr,
623 &rte_flow_item_ipv6_mask.hdr.dst_addr,
624 sizeof(ipv6.hdr.dst_addr));
627 item.mask = &ipv6_mask;
628 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
629 MLX5_MODIFICATION_TYPE_SET, error);
633 * Convert modify-header set MAC address action to DV specification.
635 * @param[in,out] resource
636 * Pointer to the modify-header resource.
638 * Pointer to action specification.
640 * Pointer to the error structure.
643 * 0 on success, a negative errno value otherwise and rte_errno is set.
646 flow_dv_convert_action_modify_mac
647 (struct mlx5_flow_dv_modify_hdr_resource *resource,
648 const struct rte_flow_action *action,
649 struct rte_flow_error *error)
651 const struct rte_flow_action_set_mac *conf =
652 (const struct rte_flow_action_set_mac *)(action->conf);
653 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
654 struct rte_flow_item_eth eth;
655 struct rte_flow_item_eth eth_mask;
657 memset(ð, 0, sizeof(eth));
658 memset(ð_mask, 0, sizeof(eth_mask));
659 if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
660 memcpy(ð.src.addr_bytes, &conf->mac_addr,
661 sizeof(eth.src.addr_bytes));
662 memcpy(ð_mask.src.addr_bytes,
663 &rte_flow_item_eth_mask.src.addr_bytes,
664 sizeof(eth_mask.src.addr_bytes));
666 memcpy(ð.dst.addr_bytes, &conf->mac_addr,
667 sizeof(eth.dst.addr_bytes));
668 memcpy(ð_mask.dst.addr_bytes,
669 &rte_flow_item_eth_mask.dst.addr_bytes,
670 sizeof(eth_mask.dst.addr_bytes));
673 item.mask = ð_mask;
674 return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
675 MLX5_MODIFICATION_TYPE_SET, error);
679 * Convert modify-header set VLAN VID action to DV specification.
681 * @param[in,out] resource
682 * Pointer to the modify-header resource.
684 * Pointer to action specification.
686 * Pointer to the error structure.
689 * 0 on success, a negative errno value otherwise and rte_errno is set.
692 flow_dv_convert_action_modify_vlan_vid
693 (struct mlx5_flow_dv_modify_hdr_resource *resource,
694 const struct rte_flow_action *action,
695 struct rte_flow_error *error)
697 const struct rte_flow_action_of_set_vlan_vid *conf =
698 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
699 int i = resource->actions_num;
700 struct mlx5_modification_cmd *actions = resource->actions;
701 struct field_modify_info *field = modify_vlan_out_first_vid;
703 if (i >= MLX5_MAX_MODIFY_NUM)
704 return rte_flow_error_set(error, EINVAL,
705 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
706 "too many items to modify");
707 actions[i] = (struct mlx5_modification_cmd) {
708 .action_type = MLX5_MODIFICATION_TYPE_SET,
710 .length = field->size,
711 .offset = field->offset,
713 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
714 actions[i].data1 = conf->vlan_vid;
715 actions[i].data1 = actions[i].data1 << 16;
716 resource->actions_num = ++i;
721 * Convert modify-header set TP action to DV specification.
723 * @param[in,out] resource
724 * Pointer to the modify-header resource.
726 * Pointer to action specification.
728 * Pointer to rte_flow_item objects list.
730 * Pointer to flow attributes structure.
731 * @param[in] dev_flow
732 * Pointer to the sub flow.
733 * @param[in] tunnel_decap
734 * Whether action is after tunnel decapsulation.
736 * Pointer to the error structure.
739 * 0 on success, a negative errno value otherwise and rte_errno is set.
742 flow_dv_convert_action_modify_tp
743 (struct mlx5_flow_dv_modify_hdr_resource *resource,
744 const struct rte_flow_action *action,
745 const struct rte_flow_item *items,
746 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
747 bool tunnel_decap, struct rte_flow_error *error)
749 const struct rte_flow_action_set_tp *conf =
750 (const struct rte_flow_action_set_tp *)(action->conf);
751 struct rte_flow_item item;
752 struct rte_flow_item_udp udp;
753 struct rte_flow_item_udp udp_mask;
754 struct rte_flow_item_tcp tcp;
755 struct rte_flow_item_tcp tcp_mask;
756 struct field_modify_info *field;
759 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
761 memset(&udp, 0, sizeof(udp));
762 memset(&udp_mask, 0, sizeof(udp_mask));
763 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
764 udp.hdr.src_port = conf->port;
765 udp_mask.hdr.src_port =
766 rte_flow_item_udp_mask.hdr.src_port;
768 udp.hdr.dst_port = conf->port;
769 udp_mask.hdr.dst_port =
770 rte_flow_item_udp_mask.hdr.dst_port;
772 item.type = RTE_FLOW_ITEM_TYPE_UDP;
774 item.mask = &udp_mask;
777 MLX5_ASSERT(attr->tcp);
778 memset(&tcp, 0, sizeof(tcp));
779 memset(&tcp_mask, 0, sizeof(tcp_mask));
780 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
781 tcp.hdr.src_port = conf->port;
782 tcp_mask.hdr.src_port =
783 rte_flow_item_tcp_mask.hdr.src_port;
785 tcp.hdr.dst_port = conf->port;
786 tcp_mask.hdr.dst_port =
787 rte_flow_item_tcp_mask.hdr.dst_port;
789 item.type = RTE_FLOW_ITEM_TYPE_TCP;
791 item.mask = &tcp_mask;
794 return flow_dv_convert_modify_action(&item, field, NULL, resource,
795 MLX5_MODIFICATION_TYPE_SET, error);
799 * Convert modify-header set TTL action to DV specification.
801 * @param[in,out] resource
802 * Pointer to the modify-header resource.
804 * Pointer to action specification.
806 * Pointer to rte_flow_item objects list.
808 * Pointer to flow attributes structure.
809 * @param[in] dev_flow
810 * Pointer to the sub flow.
811 * @param[in] tunnel_decap
812 * Whether action is after tunnel decapsulation.
814 * Pointer to the error structure.
817 * 0 on success, a negative errno value otherwise and rte_errno is set.
820 flow_dv_convert_action_modify_ttl
821 (struct mlx5_flow_dv_modify_hdr_resource *resource,
822 const struct rte_flow_action *action,
823 const struct rte_flow_item *items,
824 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
825 bool tunnel_decap, struct rte_flow_error *error)
827 const struct rte_flow_action_set_ttl *conf =
828 (const struct rte_flow_action_set_ttl *)(action->conf);
829 struct rte_flow_item item;
830 struct rte_flow_item_ipv4 ipv4;
831 struct rte_flow_item_ipv4 ipv4_mask;
832 struct rte_flow_item_ipv6 ipv6;
833 struct rte_flow_item_ipv6 ipv6_mask;
834 struct field_modify_info *field;
837 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
839 memset(&ipv4, 0, sizeof(ipv4));
840 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
841 ipv4.hdr.time_to_live = conf->ttl_value;
842 ipv4_mask.hdr.time_to_live = 0xFF;
843 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
845 item.mask = &ipv4_mask;
848 MLX5_ASSERT(attr->ipv6);
849 memset(&ipv6, 0, sizeof(ipv6));
850 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
851 ipv6.hdr.hop_limits = conf->ttl_value;
852 ipv6_mask.hdr.hop_limits = 0xFF;
853 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
855 item.mask = &ipv6_mask;
858 return flow_dv_convert_modify_action(&item, field, NULL, resource,
859 MLX5_MODIFICATION_TYPE_SET, error);
863 * Convert modify-header decrement TTL action to DV specification.
865 * @param[in,out] resource
866 * Pointer to the modify-header resource.
868 * Pointer to action specification.
870 * Pointer to rte_flow_item objects list.
872 * Pointer to flow attributes structure.
873 * @param[in] dev_flow
874 * Pointer to the sub flow.
875 * @param[in] tunnel_decap
876 * Whether action is after tunnel decapsulation.
878 * Pointer to the error structure.
881 * 0 on success, a negative errno value otherwise and rte_errno is set.
884 flow_dv_convert_action_modify_dec_ttl
885 (struct mlx5_flow_dv_modify_hdr_resource *resource,
886 const struct rte_flow_item *items,
887 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
888 bool tunnel_decap, struct rte_flow_error *error)
890 struct rte_flow_item item;
891 struct rte_flow_item_ipv4 ipv4;
892 struct rte_flow_item_ipv4 ipv4_mask;
893 struct rte_flow_item_ipv6 ipv6;
894 struct rte_flow_item_ipv6 ipv6_mask;
895 struct field_modify_info *field;
898 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
900 memset(&ipv4, 0, sizeof(ipv4));
901 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
902 ipv4.hdr.time_to_live = 0xFF;
903 ipv4_mask.hdr.time_to_live = 0xFF;
904 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
906 item.mask = &ipv4_mask;
909 MLX5_ASSERT(attr->ipv6);
910 memset(&ipv6, 0, sizeof(ipv6));
911 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
912 ipv6.hdr.hop_limits = 0xFF;
913 ipv6_mask.hdr.hop_limits = 0xFF;
914 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
916 item.mask = &ipv6_mask;
919 return flow_dv_convert_modify_action(&item, field, NULL, resource,
920 MLX5_MODIFICATION_TYPE_ADD, error);
924 * Convert modify-header increment/decrement TCP Sequence number
925 * to DV specification.
927 * @param[in,out] resource
928 * Pointer to the modify-header resource.
930 * Pointer to action specification.
932 * Pointer to the error structure.
935 * 0 on success, a negative errno value otherwise and rte_errno is set.
938 flow_dv_convert_action_modify_tcp_seq
939 (struct mlx5_flow_dv_modify_hdr_resource *resource,
940 const struct rte_flow_action *action,
941 struct rte_flow_error *error)
943 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
944 uint64_t value = rte_be_to_cpu_32(*conf);
945 struct rte_flow_item item;
946 struct rte_flow_item_tcp tcp;
947 struct rte_flow_item_tcp tcp_mask;
949 memset(&tcp, 0, sizeof(tcp));
950 memset(&tcp_mask, 0, sizeof(tcp_mask));
951 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
953 * The HW has no decrement operation, only increment operation.
954 * To simulate decrement X from Y using increment operation
955 * we need to add UINT32_MAX X times to Y.
956 * Each adding of UINT32_MAX decrements Y by 1.
959 tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
960 tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
961 item.type = RTE_FLOW_ITEM_TYPE_TCP;
963 item.mask = &tcp_mask;
964 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
965 MLX5_MODIFICATION_TYPE_ADD, error);
969 * Convert modify-header increment/decrement TCP Acknowledgment number
970 * to DV specification.
972 * @param[in,out] resource
973 * Pointer to the modify-header resource.
975 * Pointer to action specification.
977 * Pointer to the error structure.
980 * 0 on success, a negative errno value otherwise and rte_errno is set.
983 flow_dv_convert_action_modify_tcp_ack
984 (struct mlx5_flow_dv_modify_hdr_resource *resource,
985 const struct rte_flow_action *action,
986 struct rte_flow_error *error)
988 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
989 uint64_t value = rte_be_to_cpu_32(*conf);
990 struct rte_flow_item item;
991 struct rte_flow_item_tcp tcp;
992 struct rte_flow_item_tcp tcp_mask;
994 memset(&tcp, 0, sizeof(tcp));
995 memset(&tcp_mask, 0, sizeof(tcp_mask));
996 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
998 * The HW has no decrement operation, only increment operation.
999 * To simulate decrement X from Y using increment operation
1000 * we need to add UINT32_MAX X times to Y.
1001 * Each adding of UINT32_MAX decrements Y by 1.
1003 value *= UINT32_MAX;
1004 tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
1005 tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
1006 item.type = RTE_FLOW_ITEM_TYPE_TCP;
1008 item.mask = &tcp_mask;
1009 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1010 MLX5_MODIFICATION_TYPE_ADD, error);
1013 static enum mlx5_modification_field reg_to_field[] = {
1014 [REG_NON] = MLX5_MODI_OUT_NONE,
1015 [REG_A] = MLX5_MODI_META_DATA_REG_A,
1016 [REG_B] = MLX5_MODI_META_DATA_REG_B,
1017 [REG_C_0] = MLX5_MODI_META_REG_C_0,
1018 [REG_C_1] = MLX5_MODI_META_REG_C_1,
1019 [REG_C_2] = MLX5_MODI_META_REG_C_2,
1020 [REG_C_3] = MLX5_MODI_META_REG_C_3,
1021 [REG_C_4] = MLX5_MODI_META_REG_C_4,
1022 [REG_C_5] = MLX5_MODI_META_REG_C_5,
1023 [REG_C_6] = MLX5_MODI_META_REG_C_6,
1024 [REG_C_7] = MLX5_MODI_META_REG_C_7,
1028 * Convert register set to DV specification.
1030 * @param[in,out] resource
1031 * Pointer to the modify-header resource.
1033 * Pointer to action specification.
1035 * Pointer to the error structure.
1038 * 0 on success, a negative errno value otherwise and rte_errno is set.
1041 flow_dv_convert_action_set_reg
1042 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1043 const struct rte_flow_action *action,
1044 struct rte_flow_error *error)
1046 const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1047 struct mlx5_modification_cmd *actions = resource->actions;
1048 uint32_t i = resource->actions_num;
1050 if (i >= MLX5_MAX_MODIFY_NUM)
1051 return rte_flow_error_set(error, EINVAL,
1052 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1053 "too many items to modify");
1054 MLX5_ASSERT(conf->id != REG_NON);
1055 MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1056 actions[i] = (struct mlx5_modification_cmd) {
1057 .action_type = MLX5_MODIFICATION_TYPE_SET,
1058 .field = reg_to_field[conf->id],
1059 .offset = conf->offset,
1060 .length = conf->length,
1062 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1063 actions[i].data1 = rte_cpu_to_be_32(conf->data);
1065 resource->actions_num = i;
1070 * Convert SET_TAG action to DV specification.
1073 * Pointer to the rte_eth_dev structure.
1074 * @param[in,out] resource
1075 * Pointer to the modify-header resource.
1077 * Pointer to action specification.
1079 * Pointer to the error structure.
1082 * 0 on success, a negative errno value otherwise and rte_errno is set.
1085 flow_dv_convert_action_set_tag
1086 (struct rte_eth_dev *dev,
1087 struct mlx5_flow_dv_modify_hdr_resource *resource,
1088 const struct rte_flow_action_set_tag *conf,
1089 struct rte_flow_error *error)
1091 rte_be32_t data = rte_cpu_to_be_32(conf->data);
1092 rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1093 struct rte_flow_item item = {
1097 struct field_modify_info reg_c_x[] = {
1100 enum mlx5_modification_field reg_type;
1103 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1106 MLX5_ASSERT(ret != REG_NON);
1107 MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1108 reg_type = reg_to_field[ret];
1109 MLX5_ASSERT(reg_type > 0);
1110 reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1111 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1112 MLX5_MODIFICATION_TYPE_SET, error);
1116 * Convert internal COPY_REG action to DV specification.
1119 * Pointer to the rte_eth_dev structure.
1120 * @param[in,out] res
1121 * Pointer to the modify-header resource.
1123 * Pointer to action specification.
1125 * Pointer to the error structure.
1128 * 0 on success, a negative errno value otherwise and rte_errno is set.
1131 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1132 struct mlx5_flow_dv_modify_hdr_resource *res,
1133 const struct rte_flow_action *action,
1134 struct rte_flow_error *error)
1136 const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1137 rte_be32_t mask = RTE_BE32(UINT32_MAX);
1138 struct rte_flow_item item = {
1142 struct field_modify_info reg_src[] = {
1143 {4, 0, reg_to_field[conf->src]},
1146 struct field_modify_info reg_dst = {
1148 .id = reg_to_field[conf->dst],
1150 /* Adjust reg_c[0] usage according to reported mask. */
1151 if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1152 struct mlx5_priv *priv = dev->data->dev_private;
1153 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1155 MLX5_ASSERT(reg_c0);
1156 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1157 if (conf->dst == REG_C_0) {
1158 /* Copy to reg_c[0], within mask only. */
1159 reg_dst.offset = rte_bsf32(reg_c0);
1160 mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1163 mask = rte_cpu_to_be_32(reg_c0);
1166 return flow_dv_convert_modify_action(&item,
1167 reg_src, ®_dst, res,
1168 MLX5_MODIFICATION_TYPE_COPY,
1173 * Convert MARK action to DV specification. This routine is used
1174 * in extensive metadata only and requires metadata register to be
1175 * handled. In legacy mode hardware tag resource is engaged.
1178 * Pointer to the rte_eth_dev structure.
1180 * Pointer to MARK action specification.
1181 * @param[in,out] resource
1182 * Pointer to the modify-header resource.
1184 * Pointer to the error structure.
1187 * 0 on success, a negative errno value otherwise and rte_errno is set.
1190 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1191 const struct rte_flow_action_mark *conf,
1192 struct mlx5_flow_dv_modify_hdr_resource *resource,
1193 struct rte_flow_error *error)
1195 struct mlx5_priv *priv = dev->data->dev_private;
1196 rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1197 priv->sh->dv_mark_mask);
1198 rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1199 struct rte_flow_item item = {
1203 struct field_modify_info reg_c_x[] = {
1209 return rte_flow_error_set(error, EINVAL,
1210 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1211 NULL, "zero mark action mask");
1212 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1215 MLX5_ASSERT(reg > 0);
1216 if (reg == REG_C_0) {
1217 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1218 uint32_t shl_c0 = rte_bsf32(msk_c0);
1220 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1221 mask = rte_cpu_to_be_32(mask) & msk_c0;
1222 mask = rte_cpu_to_be_32(mask << shl_c0);
1224 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1225 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1226 MLX5_MODIFICATION_TYPE_SET, error);
1230 * Get metadata register index for specified steering domain.
1233 * Pointer to the rte_eth_dev structure.
1235 * Attributes of flow to determine steering domain.
1237 * Pointer to the error structure.
1240 * positive index on success, a negative errno value otherwise
1241 * and rte_errno is set.
1243 static enum modify_reg
1244 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1245 const struct rte_flow_attr *attr,
1246 struct rte_flow_error *error)
1249 mlx5_flow_get_reg_id(dev, attr->transfer ?
1253 MLX5_METADATA_RX, 0, error);
1255 return rte_flow_error_set(error,
1256 ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1257 NULL, "unavailable "
1258 "metadata register");
1263 * Convert SET_META action to DV specification.
1266 * Pointer to the rte_eth_dev structure.
1267 * @param[in,out] resource
1268 * Pointer to the modify-header resource.
1270 * Attributes of flow that includes this item.
1272 * Pointer to action specification.
1274 * Pointer to the error structure.
1277 * 0 on success, a negative errno value otherwise and rte_errno is set.
1280 flow_dv_convert_action_set_meta
1281 (struct rte_eth_dev *dev,
1282 struct mlx5_flow_dv_modify_hdr_resource *resource,
1283 const struct rte_flow_attr *attr,
1284 const struct rte_flow_action_set_meta *conf,
1285 struct rte_flow_error *error)
1287 uint32_t mask = rte_cpu_to_be_32(conf->mask);
1288 uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1289 struct rte_flow_item item = {
1293 struct field_modify_info reg_c_x[] = {
1296 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1300 MLX5_ASSERT(reg != REG_NON);
1301 if (reg == REG_C_0) {
1302 struct mlx5_priv *priv = dev->data->dev_private;
1303 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1304 uint32_t shl_c0 = rte_bsf32(msk_c0);
1306 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1307 mask = rte_cpu_to_be_32(mask) & msk_c0;
1308 mask = rte_cpu_to_be_32(mask << shl_c0);
1310 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1311 /* The routine expects parameters in memory as big-endian ones. */
1312 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1313 MLX5_MODIFICATION_TYPE_SET, error);
1317 * Convert modify-header set IPv4 DSCP action to DV specification.
1319 * @param[in,out] resource
1320 * Pointer to the modify-header resource.
1322 * Pointer to action specification.
1324 * Pointer to the error structure.
1327 * 0 on success, a negative errno value otherwise and rte_errno is set.
1330 flow_dv_convert_action_modify_ipv4_dscp
1331 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1332 const struct rte_flow_action *action,
1333 struct rte_flow_error *error)
1335 const struct rte_flow_action_set_dscp *conf =
1336 (const struct rte_flow_action_set_dscp *)(action->conf);
1337 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1338 struct rte_flow_item_ipv4 ipv4;
1339 struct rte_flow_item_ipv4 ipv4_mask;
1341 memset(&ipv4, 0, sizeof(ipv4));
1342 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1343 ipv4.hdr.type_of_service = conf->dscp;
1344 ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1346 item.mask = &ipv4_mask;
1347 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1348 MLX5_MODIFICATION_TYPE_SET, error);
1352 * Convert modify-header set IPv6 DSCP action to DV specification.
1354 * @param[in,out] resource
1355 * Pointer to the modify-header resource.
1357 * Pointer to action specification.
1359 * Pointer to the error structure.
1362 * 0 on success, a negative errno value otherwise and rte_errno is set.
1365 flow_dv_convert_action_modify_ipv6_dscp
1366 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1367 const struct rte_flow_action *action,
1368 struct rte_flow_error *error)
1370 const struct rte_flow_action_set_dscp *conf =
1371 (const struct rte_flow_action_set_dscp *)(action->conf);
1372 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1373 struct rte_flow_item_ipv6 ipv6;
1374 struct rte_flow_item_ipv6 ipv6_mask;
1376 memset(&ipv6, 0, sizeof(ipv6));
1377 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1379 * Even though the DSCP bits offset of IPv6 is not byte aligned,
1380 * rdma-core only accept the DSCP bits byte aligned start from
1381 * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1382 * bits in IPv6 case as rdma-core requires byte aligned value.
1384 ipv6.hdr.vtc_flow = conf->dscp;
1385 ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1387 item.mask = &ipv6_mask;
1388 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1389 MLX5_MODIFICATION_TYPE_SET, error);
1393 mlx5_flow_item_field_width(struct mlx5_priv *priv,
1394 enum rte_flow_field_id field)
1397 case RTE_FLOW_FIELD_START:
1399 case RTE_FLOW_FIELD_MAC_DST:
1400 case RTE_FLOW_FIELD_MAC_SRC:
1402 case RTE_FLOW_FIELD_VLAN_TYPE:
1404 case RTE_FLOW_FIELD_VLAN_ID:
1406 case RTE_FLOW_FIELD_MAC_TYPE:
1408 case RTE_FLOW_FIELD_IPV4_DSCP:
1410 case RTE_FLOW_FIELD_IPV4_TTL:
1412 case RTE_FLOW_FIELD_IPV4_SRC:
1413 case RTE_FLOW_FIELD_IPV4_DST:
1415 case RTE_FLOW_FIELD_IPV6_DSCP:
1417 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1419 case RTE_FLOW_FIELD_IPV6_SRC:
1420 case RTE_FLOW_FIELD_IPV6_DST:
1422 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1423 case RTE_FLOW_FIELD_TCP_PORT_DST:
1425 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1426 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1428 case RTE_FLOW_FIELD_TCP_FLAGS:
1430 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1431 case RTE_FLOW_FIELD_UDP_PORT_DST:
1433 case RTE_FLOW_FIELD_VXLAN_VNI:
1434 case RTE_FLOW_FIELD_GENEVE_VNI:
1436 case RTE_FLOW_FIELD_GTP_TEID:
1437 case RTE_FLOW_FIELD_TAG:
1439 case RTE_FLOW_FIELD_MARK:
1440 return __builtin_popcount(priv->sh->dv_mark_mask);
1441 case RTE_FLOW_FIELD_META:
1442 return __builtin_popcount(priv->sh->dv_meta_mask);
1443 case RTE_FLOW_FIELD_POINTER:
1444 case RTE_FLOW_FIELD_VALUE:
1453 mlx5_flow_field_id_to_modify_info
1454 (const struct rte_flow_action_modify_data *data,
1455 struct field_modify_info *info,
1456 uint32_t *mask, uint32_t *value,
1457 uint32_t width, uint32_t dst_width,
1458 uint32_t *shift, struct rte_eth_dev *dev,
1459 const struct rte_flow_attr *attr,
1460 struct rte_flow_error *error)
1462 struct mlx5_priv *priv = dev->data->dev_private;
1466 switch (data->field) {
1467 case RTE_FLOW_FIELD_START:
1468 /* not supported yet */
1471 case RTE_FLOW_FIELD_MAC_DST:
1472 off = data->offset > 16 ? data->offset - 16 : 0;
1474 if (data->offset < 16) {
1475 info[idx] = (struct field_modify_info){2, 0,
1476 MLX5_MODI_OUT_DMAC_15_0};
1478 mask[idx] = rte_cpu_to_be_16(0xffff >>
1482 mask[idx] = RTE_BE16(0xffff);
1489 info[idx] = (struct field_modify_info){4, 4 * idx,
1490 MLX5_MODI_OUT_DMAC_47_16};
1491 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1492 (32 - width)) << off);
1494 if (data->offset < 16)
1495 info[idx++] = (struct field_modify_info){2, 0,
1496 MLX5_MODI_OUT_DMAC_15_0};
1497 info[idx] = (struct field_modify_info){4, off,
1498 MLX5_MODI_OUT_DMAC_47_16};
1501 case RTE_FLOW_FIELD_MAC_SRC:
1502 off = data->offset > 16 ? data->offset - 16 : 0;
1504 if (data->offset < 16) {
1505 info[idx] = (struct field_modify_info){2, 0,
1506 MLX5_MODI_OUT_SMAC_15_0};
1508 mask[idx] = rte_cpu_to_be_16(0xffff >>
1512 mask[idx] = RTE_BE16(0xffff);
1519 info[idx] = (struct field_modify_info){4, 4 * idx,
1520 MLX5_MODI_OUT_SMAC_47_16};
1521 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1522 (32 - width)) << off);
1524 if (data->offset < 16)
1525 info[idx++] = (struct field_modify_info){2, 0,
1526 MLX5_MODI_OUT_SMAC_15_0};
1527 info[idx] = (struct field_modify_info){4, off,
1528 MLX5_MODI_OUT_SMAC_47_16};
1531 case RTE_FLOW_FIELD_VLAN_TYPE:
1532 /* not supported yet */
1534 case RTE_FLOW_FIELD_VLAN_ID:
1535 info[idx] = (struct field_modify_info){2, 0,
1536 MLX5_MODI_OUT_FIRST_VID};
1538 mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1540 case RTE_FLOW_FIELD_MAC_TYPE:
1541 info[idx] = (struct field_modify_info){2, 0,
1542 MLX5_MODI_OUT_ETHERTYPE};
1544 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1546 case RTE_FLOW_FIELD_IPV4_DSCP:
1547 info[idx] = (struct field_modify_info){1, 0,
1548 MLX5_MODI_OUT_IP_DSCP};
1550 mask[idx] = 0x3f >> (6 - width);
1552 case RTE_FLOW_FIELD_IPV4_TTL:
1553 info[idx] = (struct field_modify_info){1, 0,
1554 MLX5_MODI_OUT_IPV4_TTL};
1556 mask[idx] = 0xff >> (8 - width);
1558 case RTE_FLOW_FIELD_IPV4_SRC:
1559 info[idx] = (struct field_modify_info){4, 0,
1560 MLX5_MODI_OUT_SIPV4};
1562 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1565 case RTE_FLOW_FIELD_IPV4_DST:
1566 info[idx] = (struct field_modify_info){4, 0,
1567 MLX5_MODI_OUT_DIPV4};
1569 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1572 case RTE_FLOW_FIELD_IPV6_DSCP:
1573 info[idx] = (struct field_modify_info){1, 0,
1574 MLX5_MODI_OUT_IP_DSCP};
1576 mask[idx] = 0x3f >> (6 - width);
1578 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1579 info[idx] = (struct field_modify_info){1, 0,
1580 MLX5_MODI_OUT_IPV6_HOPLIMIT};
1582 mask[idx] = 0xff >> (8 - width);
1584 case RTE_FLOW_FIELD_IPV6_SRC:
1586 if (data->offset < 32) {
1587 info[idx] = (struct field_modify_info){4,
1589 MLX5_MODI_OUT_SIPV6_31_0};
1592 rte_cpu_to_be_32(0xffffffff >>
1596 mask[idx] = RTE_BE32(0xffffffff);
1603 if (data->offset < 64) {
1604 info[idx] = (struct field_modify_info){4,
1606 MLX5_MODI_OUT_SIPV6_63_32};
1609 rte_cpu_to_be_32(0xffffffff >>
1613 mask[idx] = RTE_BE32(0xffffffff);
1620 if (data->offset < 96) {
1621 info[idx] = (struct field_modify_info){4,
1623 MLX5_MODI_OUT_SIPV6_95_64};
1626 rte_cpu_to_be_32(0xffffffff >>
1630 mask[idx] = RTE_BE32(0xffffffff);
1637 info[idx] = (struct field_modify_info){4, 4 * idx,
1638 MLX5_MODI_OUT_SIPV6_127_96};
1639 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1642 if (data->offset < 32)
1643 info[idx++] = (struct field_modify_info){4, 0,
1644 MLX5_MODI_OUT_SIPV6_31_0};
1645 if (data->offset < 64)
1646 info[idx++] = (struct field_modify_info){4, 0,
1647 MLX5_MODI_OUT_SIPV6_63_32};
1648 if (data->offset < 96)
1649 info[idx++] = (struct field_modify_info){4, 0,
1650 MLX5_MODI_OUT_SIPV6_95_64};
1651 if (data->offset < 128)
1652 info[idx++] = (struct field_modify_info){4, 0,
1653 MLX5_MODI_OUT_SIPV6_127_96};
1656 case RTE_FLOW_FIELD_IPV6_DST:
1658 if (data->offset < 32) {
1659 info[idx] = (struct field_modify_info){4,
1661 MLX5_MODI_OUT_DIPV6_31_0};
1664 rte_cpu_to_be_32(0xffffffff >>
1668 mask[idx] = RTE_BE32(0xffffffff);
1675 if (data->offset < 64) {
1676 info[idx] = (struct field_modify_info){4,
1678 MLX5_MODI_OUT_DIPV6_63_32};
1681 rte_cpu_to_be_32(0xffffffff >>
1685 mask[idx] = RTE_BE32(0xffffffff);
1692 if (data->offset < 96) {
1693 info[idx] = (struct field_modify_info){4,
1695 MLX5_MODI_OUT_DIPV6_95_64};
1698 rte_cpu_to_be_32(0xffffffff >>
1702 mask[idx] = RTE_BE32(0xffffffff);
1709 info[idx] = (struct field_modify_info){4, 4 * idx,
1710 MLX5_MODI_OUT_DIPV6_127_96};
1711 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1714 if (data->offset < 32)
1715 info[idx++] = (struct field_modify_info){4, 0,
1716 MLX5_MODI_OUT_DIPV6_31_0};
1717 if (data->offset < 64)
1718 info[idx++] = (struct field_modify_info){4, 0,
1719 MLX5_MODI_OUT_DIPV6_63_32};
1720 if (data->offset < 96)
1721 info[idx++] = (struct field_modify_info){4, 0,
1722 MLX5_MODI_OUT_DIPV6_95_64};
1723 if (data->offset < 128)
1724 info[idx++] = (struct field_modify_info){4, 0,
1725 MLX5_MODI_OUT_DIPV6_127_96};
1728 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1729 info[idx] = (struct field_modify_info){2, 0,
1730 MLX5_MODI_OUT_TCP_SPORT};
1732 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1734 case RTE_FLOW_FIELD_TCP_PORT_DST:
1735 info[idx] = (struct field_modify_info){2, 0,
1736 MLX5_MODI_OUT_TCP_DPORT};
1738 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1740 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1741 info[idx] = (struct field_modify_info){4, 0,
1742 MLX5_MODI_OUT_TCP_SEQ_NUM};
1744 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1747 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1748 info[idx] = (struct field_modify_info){4, 0,
1749 MLX5_MODI_OUT_TCP_ACK_NUM};
1751 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1754 case RTE_FLOW_FIELD_TCP_FLAGS:
1755 info[idx] = (struct field_modify_info){2, 0,
1756 MLX5_MODI_OUT_TCP_FLAGS};
1758 mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1760 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1761 info[idx] = (struct field_modify_info){2, 0,
1762 MLX5_MODI_OUT_UDP_SPORT};
1764 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1766 case RTE_FLOW_FIELD_UDP_PORT_DST:
1767 info[idx] = (struct field_modify_info){2, 0,
1768 MLX5_MODI_OUT_UDP_DPORT};
1770 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1772 case RTE_FLOW_FIELD_VXLAN_VNI:
1773 /* not supported yet */
1775 case RTE_FLOW_FIELD_GENEVE_VNI:
1776 /* not supported yet*/
1778 case RTE_FLOW_FIELD_GTP_TEID:
1779 info[idx] = (struct field_modify_info){4, 0,
1780 MLX5_MODI_GTP_TEID};
1782 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1785 case RTE_FLOW_FIELD_TAG:
1787 int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1788 data->level, error);
1791 MLX5_ASSERT(reg != REG_NON);
1792 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1793 info[idx] = (struct field_modify_info){4, 0,
1797 rte_cpu_to_be_32(0xffffffff >>
1801 case RTE_FLOW_FIELD_MARK:
1803 uint32_t mark_mask = priv->sh->dv_mark_mask;
1804 uint32_t mark_count = __builtin_popcount(mark_mask);
1805 int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1809 MLX5_ASSERT(reg != REG_NON);
1810 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1811 info[idx] = (struct field_modify_info){4, 0,
1814 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1815 (mark_count - width)) & mark_mask);
1818 case RTE_FLOW_FIELD_META:
1820 uint32_t meta_mask = priv->sh->dv_meta_mask;
1821 uint32_t meta_count = __builtin_popcount(meta_mask);
1823 rte_cpu_to_be_32(priv->sh->dv_regc0_mask);
1824 uint32_t shl_c0 = rte_bsf32(msk_c0);
1825 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1828 MLX5_ASSERT(reg != REG_NON);
1829 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1832 info[idx] = (struct field_modify_info){4, 0,
1835 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1836 (meta_count - width)) & meta_mask);
1839 case RTE_FLOW_FIELD_POINTER:
1840 case RTE_FLOW_FIELD_VALUE:
1841 if (data->field == RTE_FLOW_FIELD_POINTER)
1842 memcpy(&val, (void *)(uintptr_t)data->value,
1846 for (idx = 0; idx < MLX5_ACT_MAX_MOD_FIELDS; idx++) {
1848 if (dst_width == 48) {
1849 /*special case for MAC addresses */
1850 value[idx] = rte_cpu_to_be_16(val);
1853 } else if (dst_width > 16) {
1854 value[idx] = rte_cpu_to_be_32(val);
1856 } else if (dst_width > 8) {
1857 value[idx] = rte_cpu_to_be_16(val);
1860 value[idx] = (uint8_t)val;
1864 value[idx] <<= *shift;
1877 * Convert modify_field action to DV specification.
1880 * Pointer to the rte_eth_dev structure.
1881 * @param[in,out] resource
1882 * Pointer to the modify-header resource.
1884 * Pointer to action specification.
1886 * Attributes of flow that includes this item.
1888 * Pointer to the error structure.
1891 * 0 on success, a negative errno value otherwise and rte_errno is set.
1894 flow_dv_convert_action_modify_field
1895 (struct rte_eth_dev *dev,
1896 struct mlx5_flow_dv_modify_hdr_resource *resource,
1897 const struct rte_flow_action *action,
1898 const struct rte_flow_attr *attr,
1899 struct rte_flow_error *error)
1901 struct mlx5_priv *priv = dev->data->dev_private;
1902 const struct rte_flow_action_modify_field *conf =
1903 (const struct rte_flow_action_modify_field *)(action->conf);
1904 struct rte_flow_item item;
1905 struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1907 struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1909 uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1910 uint32_t value[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1913 uint32_t dst_width = mlx5_flow_item_field_width(priv, conf->dst.field);
1915 if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1916 conf->src.field == RTE_FLOW_FIELD_VALUE) {
1917 type = MLX5_MODIFICATION_TYPE_SET;
1918 /** For SET fill the destination field (field) first. */
1919 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1920 value, conf->width, dst_width,
1921 &shift, dev, attr, error);
1922 /** Then copy immediate value from source as per mask. */
1923 mlx5_flow_field_id_to_modify_info(&conf->src, dcopy, mask,
1924 value, conf->width, dst_width,
1925 &shift, dev, attr, error);
1928 type = MLX5_MODIFICATION_TYPE_COPY;
1929 /** For COPY fill the destination field (dcopy) without mask. */
1930 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1931 value, conf->width, dst_width,
1932 &shift, dev, attr, error);
1933 /** Then construct the source field (field) with mask. */
1934 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1935 value, conf->width, dst_width,
1936 &shift, dev, attr, error);
1939 return flow_dv_convert_modify_action(&item,
1940 field, dcopy, resource, type, error);
1944 * Validate MARK item.
1947 * Pointer to the rte_eth_dev structure.
1949 * Item specification.
1951 * Attributes of flow that includes this item.
1953 * Pointer to error structure.
1956 * 0 on success, a negative errno value otherwise and rte_errno is set.
1959 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1960 const struct rte_flow_item *item,
1961 const struct rte_flow_attr *attr __rte_unused,
1962 struct rte_flow_error *error)
1964 struct mlx5_priv *priv = dev->data->dev_private;
1965 struct mlx5_dev_config *config = &priv->config;
1966 const struct rte_flow_item_mark *spec = item->spec;
1967 const struct rte_flow_item_mark *mask = item->mask;
1968 const struct rte_flow_item_mark nic_mask = {
1969 .id = priv->sh->dv_mark_mask,
1973 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1974 return rte_flow_error_set(error, ENOTSUP,
1975 RTE_FLOW_ERROR_TYPE_ITEM, item,
1976 "extended metadata feature"
1978 if (!mlx5_flow_ext_mreg_supported(dev))
1979 return rte_flow_error_set(error, ENOTSUP,
1980 RTE_FLOW_ERROR_TYPE_ITEM, item,
1981 "extended metadata register"
1982 " isn't supported");
1984 return rte_flow_error_set(error, ENOTSUP,
1985 RTE_FLOW_ERROR_TYPE_ITEM, item,
1986 "extended metadata register"
1987 " isn't available");
1988 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1992 return rte_flow_error_set(error, EINVAL,
1993 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1995 "data cannot be empty");
1996 if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1997 return rte_flow_error_set(error, EINVAL,
1998 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2000 "mark id exceeds the limit");
2004 return rte_flow_error_set(error, EINVAL,
2005 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2006 "mask cannot be zero");
2008 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2009 (const uint8_t *)&nic_mask,
2010 sizeof(struct rte_flow_item_mark),
2011 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2018 * Validate META item.
2021 * Pointer to the rte_eth_dev structure.
2023 * Item specification.
2025 * Attributes of flow that includes this item.
2027 * Pointer to error structure.
2030 * 0 on success, a negative errno value otherwise and rte_errno is set.
2033 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
2034 const struct rte_flow_item *item,
2035 const struct rte_flow_attr *attr,
2036 struct rte_flow_error *error)
2038 struct mlx5_priv *priv = dev->data->dev_private;
2039 struct mlx5_dev_config *config = &priv->config;
2040 const struct rte_flow_item_meta *spec = item->spec;
2041 const struct rte_flow_item_meta *mask = item->mask;
2042 struct rte_flow_item_meta nic_mask = {
2049 return rte_flow_error_set(error, EINVAL,
2050 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2052 "data cannot be empty");
2053 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2054 if (!mlx5_flow_ext_mreg_supported(dev))
2055 return rte_flow_error_set(error, ENOTSUP,
2056 RTE_FLOW_ERROR_TYPE_ITEM, item,
2057 "extended metadata register"
2058 " isn't supported");
2059 reg = flow_dv_get_metadata_reg(dev, attr, error);
2063 return rte_flow_error_set(error, ENOTSUP,
2064 RTE_FLOW_ERROR_TYPE_ITEM, item,
2065 "unavalable extended metadata register");
2067 return rte_flow_error_set(error, ENOTSUP,
2068 RTE_FLOW_ERROR_TYPE_ITEM, item,
2072 nic_mask.data = priv->sh->dv_meta_mask;
2075 return rte_flow_error_set(error, ENOTSUP,
2076 RTE_FLOW_ERROR_TYPE_ITEM, item,
2077 "extended metadata feature "
2078 "should be enabled when "
2079 "meta item is requested "
2080 "with e-switch mode ");
2082 return rte_flow_error_set(error, ENOTSUP,
2083 RTE_FLOW_ERROR_TYPE_ITEM, item,
2084 "match on metadata for ingress "
2085 "is not supported in legacy "
2089 mask = &rte_flow_item_meta_mask;
2091 return rte_flow_error_set(error, EINVAL,
2092 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2093 "mask cannot be zero");
2095 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2096 (const uint8_t *)&nic_mask,
2097 sizeof(struct rte_flow_item_meta),
2098 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2103 * Validate TAG item.
2106 * Pointer to the rte_eth_dev structure.
2108 * Item specification.
2110 * Attributes of flow that includes this item.
2112 * Pointer to error structure.
2115 * 0 on success, a negative errno value otherwise and rte_errno is set.
2118 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2119 const struct rte_flow_item *item,
2120 const struct rte_flow_attr *attr __rte_unused,
2121 struct rte_flow_error *error)
2123 const struct rte_flow_item_tag *spec = item->spec;
2124 const struct rte_flow_item_tag *mask = item->mask;
2125 const struct rte_flow_item_tag nic_mask = {
2126 .data = RTE_BE32(UINT32_MAX),
2131 if (!mlx5_flow_ext_mreg_supported(dev))
2132 return rte_flow_error_set(error, ENOTSUP,
2133 RTE_FLOW_ERROR_TYPE_ITEM, item,
2134 "extensive metadata register"
2135 " isn't supported");
2137 return rte_flow_error_set(error, EINVAL,
2138 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2140 "data cannot be empty");
2142 mask = &rte_flow_item_tag_mask;
2144 return rte_flow_error_set(error, EINVAL,
2145 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2146 "mask cannot be zero");
2148 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2149 (const uint8_t *)&nic_mask,
2150 sizeof(struct rte_flow_item_tag),
2151 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2154 if (mask->index != 0xff)
2155 return rte_flow_error_set(error, EINVAL,
2156 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2157 "partial mask for tag index"
2158 " is not supported");
2159 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2162 MLX5_ASSERT(ret != REG_NON);
2167 * Validate vport item.
2170 * Pointer to the rte_eth_dev structure.
2172 * Item specification.
2174 * Attributes of flow that includes this item.
2175 * @param[in] item_flags
2176 * Bit-fields that holds the items detected until now.
2178 * Pointer to error structure.
2181 * 0 on success, a negative errno value otherwise and rte_errno is set.
2184 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2185 const struct rte_flow_item *item,
2186 const struct rte_flow_attr *attr,
2187 uint64_t item_flags,
2188 struct rte_flow_error *error)
2190 const struct rte_flow_item_port_id *spec = item->spec;
2191 const struct rte_flow_item_port_id *mask = item->mask;
2192 const struct rte_flow_item_port_id switch_mask = {
2195 struct mlx5_priv *esw_priv;
2196 struct mlx5_priv *dev_priv;
2199 if (!attr->transfer)
2200 return rte_flow_error_set(error, EINVAL,
2201 RTE_FLOW_ERROR_TYPE_ITEM,
2203 "match on port id is valid only"
2204 " when transfer flag is enabled");
2205 if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2206 return rte_flow_error_set(error, ENOTSUP,
2207 RTE_FLOW_ERROR_TYPE_ITEM, item,
2208 "multiple source ports are not"
2211 mask = &switch_mask;
2212 if (mask->id != 0xffffffff)
2213 return rte_flow_error_set(error, ENOTSUP,
2214 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2216 "no support for partial mask on"
2218 ret = mlx5_flow_item_acceptable
2219 (item, (const uint8_t *)mask,
2220 (const uint8_t *)&rte_flow_item_port_id_mask,
2221 sizeof(struct rte_flow_item_port_id),
2222 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2227 esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2229 return rte_flow_error_set(error, rte_errno,
2230 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2231 "failed to obtain E-Switch info for"
2233 dev_priv = mlx5_dev_to_eswitch_info(dev);
2235 return rte_flow_error_set(error, rte_errno,
2236 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2238 "failed to obtain E-Switch info");
2239 if (esw_priv->domain_id != dev_priv->domain_id)
2240 return rte_flow_error_set(error, EINVAL,
2241 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2242 "cannot match on a port from a"
2243 " different E-Switch");
2248 * Validate VLAN item.
2251 * Item specification.
2252 * @param[in] item_flags
2253 * Bit-fields that holds the items detected until now.
2255 * Ethernet device flow is being created on.
2257 * Pointer to error structure.
2260 * 0 on success, a negative errno value otherwise and rte_errno is set.
2263 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2264 uint64_t item_flags,
2265 struct rte_eth_dev *dev,
2266 struct rte_flow_error *error)
2268 const struct rte_flow_item_vlan *mask = item->mask;
2269 const struct rte_flow_item_vlan nic_mask = {
2270 .tci = RTE_BE16(UINT16_MAX),
2271 .inner_type = RTE_BE16(UINT16_MAX),
2274 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2276 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2277 MLX5_FLOW_LAYER_INNER_L4) :
2278 (MLX5_FLOW_LAYER_OUTER_L3 |
2279 MLX5_FLOW_LAYER_OUTER_L4);
2280 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2281 MLX5_FLOW_LAYER_OUTER_VLAN;
2283 if (item_flags & vlanm)
2284 return rte_flow_error_set(error, EINVAL,
2285 RTE_FLOW_ERROR_TYPE_ITEM, item,
2286 "multiple VLAN layers not supported");
2287 else if ((item_flags & l34m) != 0)
2288 return rte_flow_error_set(error, EINVAL,
2289 RTE_FLOW_ERROR_TYPE_ITEM, item,
2290 "VLAN cannot follow L3/L4 layer");
2292 mask = &rte_flow_item_vlan_mask;
2293 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2294 (const uint8_t *)&nic_mask,
2295 sizeof(struct rte_flow_item_vlan),
2296 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2299 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2300 struct mlx5_priv *priv = dev->data->dev_private;
2302 if (priv->vmwa_context) {
2304 * Non-NULL context means we have a virtual machine
2305 * and SR-IOV enabled, we have to create VLAN interface
2306 * to make hypervisor to setup E-Switch vport
2307 * context correctly. We avoid creating the multiple
2308 * VLAN interfaces, so we cannot support VLAN tag mask.
2310 return rte_flow_error_set(error, EINVAL,
2311 RTE_FLOW_ERROR_TYPE_ITEM,
2313 "VLAN tag mask is not"
2314 " supported in virtual"
2322 * GTP flags are contained in 1 byte of the format:
2323 * -------------------------------------------
2324 * | bit | 0 - 2 | 3 | 4 | 5 | 6 | 7 |
2325 * |-----------------------------------------|
2326 * | value | Version | PT | Res | E | S | PN |
2327 * -------------------------------------------
2329 * Matching is supported only for GTP flags E, S, PN.
2331 #define MLX5_GTP_FLAGS_MASK 0x07
2334 * Validate GTP item.
2337 * Pointer to the rte_eth_dev structure.
2339 * Item specification.
2340 * @param[in] item_flags
2341 * Bit-fields that holds the items detected until now.
2343 * Pointer to error structure.
2346 * 0 on success, a negative errno value otherwise and rte_errno is set.
2349 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2350 const struct rte_flow_item *item,
2351 uint64_t item_flags,
2352 struct rte_flow_error *error)
2354 struct mlx5_priv *priv = dev->data->dev_private;
2355 const struct rte_flow_item_gtp *spec = item->spec;
2356 const struct rte_flow_item_gtp *mask = item->mask;
2357 const struct rte_flow_item_gtp nic_mask = {
2358 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2360 .teid = RTE_BE32(0xffffffff),
2363 if (!priv->config.hca_attr.tunnel_stateless_gtp)
2364 return rte_flow_error_set(error, ENOTSUP,
2365 RTE_FLOW_ERROR_TYPE_ITEM, item,
2366 "GTP support is not enabled");
2367 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2368 return rte_flow_error_set(error, ENOTSUP,
2369 RTE_FLOW_ERROR_TYPE_ITEM, item,
2370 "multiple tunnel layers not"
2372 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2373 return rte_flow_error_set(error, EINVAL,
2374 RTE_FLOW_ERROR_TYPE_ITEM, item,
2375 "no outer UDP layer found");
2377 mask = &rte_flow_item_gtp_mask;
2378 if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2379 return rte_flow_error_set(error, ENOTSUP,
2380 RTE_FLOW_ERROR_TYPE_ITEM, item,
2381 "Match is supported for GTP"
2383 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2384 (const uint8_t *)&nic_mask,
2385 sizeof(struct rte_flow_item_gtp),
2386 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2390 * Validate GTP PSC item.
2393 * Item specification.
2394 * @param[in] last_item
2395 * Previous validated item in the pattern items.
2396 * @param[in] gtp_item
2397 * Previous GTP item specification.
2399 * Pointer to flow attributes.
2401 * Pointer to error structure.
2404 * 0 on success, a negative errno value otherwise and rte_errno is set.
2407 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2409 const struct rte_flow_item *gtp_item,
2410 const struct rte_flow_attr *attr,
2411 struct rte_flow_error *error)
2413 const struct rte_flow_item_gtp *gtp_spec;
2414 const struct rte_flow_item_gtp *gtp_mask;
2415 const struct rte_flow_item_gtp_psc *spec;
2416 const struct rte_flow_item_gtp_psc *mask;
2417 const struct rte_flow_item_gtp_psc nic_mask = {
2422 if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2423 return rte_flow_error_set
2424 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2425 "GTP PSC item must be preceded with GTP item");
2426 gtp_spec = gtp_item->spec;
2427 gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2428 /* GTP spec and E flag is requested to match zero. */
2430 (gtp_mask->v_pt_rsv_flags &
2431 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2432 return rte_flow_error_set
2433 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2434 "GTP E flag must be 1 to match GTP PSC");
2435 /* Check the flow is not created in group zero. */
2436 if (!attr->transfer && !attr->group)
2437 return rte_flow_error_set
2438 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2439 "GTP PSC is not supported for group 0");
2440 /* GTP spec is here and E flag is requested to match zero. */
2444 mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2445 if (spec->pdu_type > MLX5_GTP_EXT_MAX_PDU_TYPE)
2446 return rte_flow_error_set
2447 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2448 "PDU type should be smaller than 16");
2449 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2450 (const uint8_t *)&nic_mask,
2451 sizeof(struct rte_flow_item_gtp_psc),
2452 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2456 * Validate IPV4 item.
2457 * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2458 * add specific validation of fragment_offset field,
2461 * Item specification.
2462 * @param[in] item_flags
2463 * Bit-fields that holds the items detected until now.
2465 * Pointer to error structure.
2468 * 0 on success, a negative errno value otherwise and rte_errno is set.
2471 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2472 const struct rte_flow_item *item,
2473 uint64_t item_flags, uint64_t last_item,
2474 uint16_t ether_type, struct rte_flow_error *error)
2477 struct mlx5_priv *priv = dev->data->dev_private;
2478 const struct rte_flow_item_ipv4 *spec = item->spec;
2479 const struct rte_flow_item_ipv4 *last = item->last;
2480 const struct rte_flow_item_ipv4 *mask = item->mask;
2481 rte_be16_t fragment_offset_spec = 0;
2482 rte_be16_t fragment_offset_last = 0;
2483 struct rte_flow_item_ipv4 nic_ipv4_mask = {
2485 .src_addr = RTE_BE32(0xffffffff),
2486 .dst_addr = RTE_BE32(0xffffffff),
2487 .type_of_service = 0xff,
2488 .fragment_offset = RTE_BE16(0xffff),
2489 .next_proto_id = 0xff,
2490 .time_to_live = 0xff,
2494 if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2495 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2496 bool ihl_cap = !tunnel ? priv->config.hca_attr.outer_ipv4_ihl :
2497 priv->config.hca_attr.inner_ipv4_ihl;
2499 return rte_flow_error_set(error, ENOTSUP,
2500 RTE_FLOW_ERROR_TYPE_ITEM,
2502 "IPV4 ihl offload not supported");
2503 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2505 ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2506 ether_type, &nic_ipv4_mask,
2507 MLX5_ITEM_RANGE_ACCEPTED, error);
2511 fragment_offset_spec = spec->hdr.fragment_offset &
2512 mask->hdr.fragment_offset;
2513 if (!fragment_offset_spec)
2516 * spec and mask are valid, enforce using full mask to make sure the
2517 * complete value is used correctly.
2519 if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2520 != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2521 return rte_flow_error_set(error, EINVAL,
2522 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2523 item, "must use full mask for"
2524 " fragment_offset");
2526 * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2527 * indicating this is 1st fragment of fragmented packet.
2528 * This is not yet supported in MLX5, return appropriate error message.
2530 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2531 return rte_flow_error_set(error, ENOTSUP,
2532 RTE_FLOW_ERROR_TYPE_ITEM, item,
2533 "match on first fragment not "
2535 if (fragment_offset_spec && !last)
2536 return rte_flow_error_set(error, ENOTSUP,
2537 RTE_FLOW_ERROR_TYPE_ITEM, item,
2538 "specified value not supported");
2539 /* spec and last are valid, validate the specified range. */
2540 fragment_offset_last = last->hdr.fragment_offset &
2541 mask->hdr.fragment_offset;
2543 * Match on fragment_offset spec 0x2001 and last 0x3fff
2544 * means MF is 1 and frag-offset is > 0.
2545 * This packet is fragment 2nd and onward, excluding last.
2546 * This is not yet supported in MLX5, return appropriate
2549 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2550 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2551 return rte_flow_error_set(error, ENOTSUP,
2552 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2553 last, "match on following "
2554 "fragments not supported");
2556 * Match on fragment_offset spec 0x0001 and last 0x1fff
2557 * means MF is 0 and frag-offset is > 0.
2558 * This packet is last fragment of fragmented packet.
2559 * This is not yet supported in MLX5, return appropriate
2562 if (fragment_offset_spec == RTE_BE16(1) &&
2563 fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2564 return rte_flow_error_set(error, ENOTSUP,
2565 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2566 last, "match on last "
2567 "fragment not supported");
2569 * Match on fragment_offset spec 0x0001 and last 0x3fff
2570 * means MF and/or frag-offset is not 0.
2571 * This is a fragmented packet.
2572 * Other range values are invalid and rejected.
2574 if (!(fragment_offset_spec == RTE_BE16(1) &&
2575 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2576 return rte_flow_error_set(error, ENOTSUP,
2577 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2578 "specified range not supported");
2583 * Validate IPV6 fragment extension item.
2586 * Item specification.
2587 * @param[in] item_flags
2588 * Bit-fields that holds the items detected until now.
2590 * Pointer to error structure.
2593 * 0 on success, a negative errno value otherwise and rte_errno is set.
2596 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2597 uint64_t item_flags,
2598 struct rte_flow_error *error)
2600 const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2601 const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2602 const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2603 rte_be16_t frag_data_spec = 0;
2604 rte_be16_t frag_data_last = 0;
2605 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2606 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2607 MLX5_FLOW_LAYER_OUTER_L4;
2609 struct rte_flow_item_ipv6_frag_ext nic_mask = {
2611 .next_header = 0xff,
2612 .frag_data = RTE_BE16(0xffff),
2616 if (item_flags & l4m)
2617 return rte_flow_error_set(error, EINVAL,
2618 RTE_FLOW_ERROR_TYPE_ITEM, item,
2619 "ipv6 fragment extension item cannot "
2621 if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2622 (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2623 return rte_flow_error_set(error, EINVAL,
2624 RTE_FLOW_ERROR_TYPE_ITEM, item,
2625 "ipv6 fragment extension item must "
2626 "follow ipv6 item");
2628 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2629 if (!frag_data_spec)
2632 * spec and mask are valid, enforce using full mask to make sure the
2633 * complete value is used correctly.
2635 if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2636 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2637 return rte_flow_error_set(error, EINVAL,
2638 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2639 item, "must use full mask for"
2642 * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2643 * This is 1st fragment of fragmented packet.
2645 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2646 return rte_flow_error_set(error, ENOTSUP,
2647 RTE_FLOW_ERROR_TYPE_ITEM, item,
2648 "match on first fragment not "
2650 if (frag_data_spec && !last)
2651 return rte_flow_error_set(error, EINVAL,
2652 RTE_FLOW_ERROR_TYPE_ITEM, item,
2653 "specified value not supported");
2654 ret = mlx5_flow_item_acceptable
2655 (item, (const uint8_t *)mask,
2656 (const uint8_t *)&nic_mask,
2657 sizeof(struct rte_flow_item_ipv6_frag_ext),
2658 MLX5_ITEM_RANGE_ACCEPTED, error);
2661 /* spec and last are valid, validate the specified range. */
2662 frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2664 * Match on frag_data spec 0x0009 and last 0xfff9
2665 * means M is 1 and frag-offset is > 0.
2666 * This packet is fragment 2nd and onward, excluding last.
2667 * This is not yet supported in MLX5, return appropriate
2670 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2671 RTE_IPV6_EHDR_MF_MASK) &&
2672 frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2673 return rte_flow_error_set(error, ENOTSUP,
2674 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2675 last, "match on following "
2676 "fragments not supported");
2678 * Match on frag_data spec 0x0008 and last 0xfff8
2679 * means M is 0 and frag-offset is > 0.
2680 * This packet is last fragment of fragmented packet.
2681 * This is not yet supported in MLX5, return appropriate
2684 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2685 frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2686 return rte_flow_error_set(error, ENOTSUP,
2687 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2688 last, "match on last "
2689 "fragment not supported");
2690 /* Other range values are invalid and rejected. */
2691 return rte_flow_error_set(error, EINVAL,
2692 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2693 "specified range not supported");
2697 * Validate ASO CT item.
2700 * Pointer to the rte_eth_dev structure.
2702 * Item specification.
2703 * @param[in] item_flags
2704 * Pointer to bit-fields that holds the items detected until now.
2706 * Pointer to error structure.
2709 * 0 on success, a negative errno value otherwise and rte_errno is set.
2712 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2713 const struct rte_flow_item *item,
2714 uint64_t *item_flags,
2715 struct rte_flow_error *error)
2717 const struct rte_flow_item_conntrack *spec = item->spec;
2718 const struct rte_flow_item_conntrack *mask = item->mask;
2722 if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2723 return rte_flow_error_set(error, EINVAL,
2724 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2725 "Only one CT is supported");
2727 mask = &rte_flow_item_conntrack_mask;
2728 flags = spec->flags & mask->flags;
2729 if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2730 ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2731 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2732 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2733 return rte_flow_error_set(error, EINVAL,
2734 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2735 "Conflict status bits");
2736 /* State change also needs to be considered. */
2737 *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2742 * Validate the pop VLAN action.
2745 * Pointer to the rte_eth_dev structure.
2746 * @param[in] action_flags
2747 * Holds the actions detected until now.
2749 * Pointer to the pop vlan action.
2750 * @param[in] item_flags
2751 * The items found in this flow rule.
2753 * Pointer to flow attributes.
2755 * Pointer to error structure.
2758 * 0 on success, a negative errno value otherwise and rte_errno is set.
2761 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2762 uint64_t action_flags,
2763 const struct rte_flow_action *action,
2764 uint64_t item_flags,
2765 const struct rte_flow_attr *attr,
2766 struct rte_flow_error *error)
2768 const struct mlx5_priv *priv = dev->data->dev_private;
2769 struct mlx5_dev_ctx_shared *sh = priv->sh;
2770 bool direction_error = false;
2772 if (!priv->sh->pop_vlan_action)
2773 return rte_flow_error_set(error, ENOTSUP,
2774 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2776 "pop vlan action is not supported");
2777 /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2778 if (attr->transfer) {
2779 bool fdb_tx = priv->representor_id != UINT16_MAX;
2780 bool is_cx5 = sh->steering_format_version ==
2781 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2783 if (fdb_tx && is_cx5)
2784 direction_error = true;
2785 } else if (attr->egress) {
2786 direction_error = true;
2788 if (direction_error)
2789 return rte_flow_error_set(error, ENOTSUP,
2790 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2792 "pop vlan action not supported for egress");
2793 if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2794 return rte_flow_error_set(error, ENOTSUP,
2795 RTE_FLOW_ERROR_TYPE_ACTION, action,
2796 "no support for multiple VLAN "
2798 /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2799 if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2800 !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2801 return rte_flow_error_set(error, ENOTSUP,
2802 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2804 "cannot pop vlan after decap without "
2805 "match on inner vlan in the flow");
2806 /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2807 if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2808 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2809 return rte_flow_error_set(error, ENOTSUP,
2810 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2812 "cannot pop vlan without a "
2813 "match on (outer) vlan in the flow");
2814 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2815 return rte_flow_error_set(error, EINVAL,
2816 RTE_FLOW_ERROR_TYPE_ACTION, action,
2817 "wrong action order, port_id should "
2818 "be after pop VLAN action");
2819 if (!attr->transfer && priv->representor)
2820 return rte_flow_error_set(error, ENOTSUP,
2821 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2822 "pop vlan action for VF representor "
2823 "not supported on NIC table");
2828 * Get VLAN default info from vlan match info.
2831 * the list of item specifications.
2833 * pointer VLAN info to fill to.
2836 * 0 on success, a negative errno value otherwise and rte_errno is set.
2839 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2840 struct rte_vlan_hdr *vlan)
2842 const struct rte_flow_item_vlan nic_mask = {
2843 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2844 MLX5DV_FLOW_VLAN_VID_MASK),
2845 .inner_type = RTE_BE16(0xffff),
2850 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2851 int type = items->type;
2853 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2854 type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2857 if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2858 const struct rte_flow_item_vlan *vlan_m = items->mask;
2859 const struct rte_flow_item_vlan *vlan_v = items->spec;
2861 /* If VLAN item in pattern doesn't contain data, return here. */
2866 /* Only full match values are accepted */
2867 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2868 MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2869 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2871 rte_be_to_cpu_16(vlan_v->tci &
2872 MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2874 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2875 MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2876 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2878 rte_be_to_cpu_16(vlan_v->tci &
2879 MLX5DV_FLOW_VLAN_VID_MASK_BE);
2881 if (vlan_m->inner_type == nic_mask.inner_type)
2882 vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2883 vlan_m->inner_type);
2888 * Validate the push VLAN action.
2891 * Pointer to the rte_eth_dev structure.
2892 * @param[in] action_flags
2893 * Holds the actions detected until now.
2894 * @param[in] item_flags
2895 * The items found in this flow rule.
2897 * Pointer to the action structure.
2899 * Pointer to flow attributes
2901 * Pointer to error structure.
2904 * 0 on success, a negative errno value otherwise and rte_errno is set.
2907 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2908 uint64_t action_flags,
2909 const struct rte_flow_item_vlan *vlan_m,
2910 const struct rte_flow_action *action,
2911 const struct rte_flow_attr *attr,
2912 struct rte_flow_error *error)
2914 const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2915 const struct mlx5_priv *priv = dev->data->dev_private;
2916 struct mlx5_dev_ctx_shared *sh = priv->sh;
2917 bool direction_error = false;
2919 if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2920 push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2921 return rte_flow_error_set(error, EINVAL,
2922 RTE_FLOW_ERROR_TYPE_ACTION, action,
2923 "invalid vlan ethertype");
2924 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2925 return rte_flow_error_set(error, EINVAL,
2926 RTE_FLOW_ERROR_TYPE_ACTION, action,
2927 "wrong action order, port_id should "
2928 "be after push VLAN");
2929 /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2930 if (attr->transfer) {
2931 bool fdb_tx = priv->representor_id != UINT16_MAX;
2932 bool is_cx5 = sh->steering_format_version ==
2933 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2935 if (!fdb_tx && is_cx5)
2936 direction_error = true;
2937 } else if (attr->ingress) {
2938 direction_error = true;
2940 if (direction_error)
2941 return rte_flow_error_set(error, ENOTSUP,
2942 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2944 "push vlan action not supported for ingress");
2945 if (!attr->transfer && priv->representor)
2946 return rte_flow_error_set(error, ENOTSUP,
2947 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2948 "push vlan action for VF representor "
2949 "not supported on NIC table");
2951 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2952 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2953 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2954 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2955 !(mlx5_flow_find_action
2956 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2957 return rte_flow_error_set(error, EINVAL,
2958 RTE_FLOW_ERROR_TYPE_ACTION, action,
2959 "not full match mask on VLAN PCP and "
2960 "there is no of_set_vlan_pcp action, "
2961 "push VLAN action cannot figure out "
2964 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2965 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2966 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2967 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2968 !(mlx5_flow_find_action
2969 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2970 return rte_flow_error_set(error, EINVAL,
2971 RTE_FLOW_ERROR_TYPE_ACTION, action,
2972 "not full match mask on VLAN VID and "
2973 "there is no of_set_vlan_vid action, "
2974 "push VLAN action cannot figure out "
2981 * Validate the set VLAN PCP.
2983 * @param[in] action_flags
2984 * Holds the actions detected until now.
2985 * @param[in] actions
2986 * Pointer to the list of actions remaining in the flow rule.
2988 * Pointer to error structure.
2991 * 0 on success, a negative errno value otherwise and rte_errno is set.
2994 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2995 const struct rte_flow_action actions[],
2996 struct rte_flow_error *error)
2998 const struct rte_flow_action *action = actions;
2999 const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
3001 if (conf->vlan_pcp > 7)
3002 return rte_flow_error_set(error, EINVAL,
3003 RTE_FLOW_ERROR_TYPE_ACTION, action,
3004 "VLAN PCP value is too big");
3005 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
3006 return rte_flow_error_set(error, ENOTSUP,
3007 RTE_FLOW_ERROR_TYPE_ACTION, action,
3008 "set VLAN PCP action must follow "
3009 "the push VLAN action");
3010 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
3011 return rte_flow_error_set(error, ENOTSUP,
3012 RTE_FLOW_ERROR_TYPE_ACTION, action,
3013 "Multiple VLAN PCP modification are "
3015 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3016 return rte_flow_error_set(error, EINVAL,
3017 RTE_FLOW_ERROR_TYPE_ACTION, action,
3018 "wrong action order, port_id should "
3019 "be after set VLAN PCP");
3024 * Validate the set VLAN VID.
3026 * @param[in] item_flags
3027 * Holds the items detected in this rule.
3028 * @param[in] action_flags
3029 * Holds the actions detected until now.
3030 * @param[in] actions
3031 * Pointer to the list of actions remaining in the flow rule.
3033 * Pointer to error structure.
3036 * 0 on success, a negative errno value otherwise and rte_errno is set.
3039 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
3040 uint64_t action_flags,
3041 const struct rte_flow_action actions[],
3042 struct rte_flow_error *error)
3044 const struct rte_flow_action *action = actions;
3045 const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3047 if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3048 return rte_flow_error_set(error, EINVAL,
3049 RTE_FLOW_ERROR_TYPE_ACTION, action,
3050 "VLAN VID value is too big");
3051 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3052 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3053 return rte_flow_error_set(error, ENOTSUP,
3054 RTE_FLOW_ERROR_TYPE_ACTION, action,
3055 "set VLAN VID action must follow push"
3056 " VLAN action or match on VLAN item");
3057 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3058 return rte_flow_error_set(error, ENOTSUP,
3059 RTE_FLOW_ERROR_TYPE_ACTION, action,
3060 "Multiple VLAN VID modifications are "
3062 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3063 return rte_flow_error_set(error, EINVAL,
3064 RTE_FLOW_ERROR_TYPE_ACTION, action,
3065 "wrong action order, port_id should "
3066 "be after set VLAN VID");
3071 * Validate the FLAG action.
3074 * Pointer to the rte_eth_dev structure.
3075 * @param[in] action_flags
3076 * Holds the actions detected until now.
3078 * Pointer to flow attributes
3080 * Pointer to error structure.
3083 * 0 on success, a negative errno value otherwise and rte_errno is set.
3086 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3087 uint64_t action_flags,
3088 const struct rte_flow_attr *attr,
3089 struct rte_flow_error *error)
3091 struct mlx5_priv *priv = dev->data->dev_private;
3092 struct mlx5_dev_config *config = &priv->config;
3095 /* Fall back if no extended metadata register support. */
3096 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3097 return mlx5_flow_validate_action_flag(action_flags, attr,
3099 /* Extensive metadata mode requires registers. */
3100 if (!mlx5_flow_ext_mreg_supported(dev))
3101 return rte_flow_error_set(error, ENOTSUP,
3102 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3103 "no metadata registers "
3104 "to support flag action");
3105 if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3106 return rte_flow_error_set(error, ENOTSUP,
3107 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3108 "extended metadata register"
3109 " isn't available");
3110 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3113 MLX5_ASSERT(ret > 0);
3114 if (action_flags & MLX5_FLOW_ACTION_MARK)
3115 return rte_flow_error_set(error, EINVAL,
3116 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3117 "can't mark and flag in same flow");
3118 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3119 return rte_flow_error_set(error, EINVAL,
3120 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3122 " actions in same flow");
3127 * Validate MARK action.
3130 * Pointer to the rte_eth_dev structure.
3132 * Pointer to action.
3133 * @param[in] action_flags
3134 * Holds the actions detected until now.
3136 * Pointer to flow attributes
3138 * Pointer to error structure.
3141 * 0 on success, a negative errno value otherwise and rte_errno is set.
3144 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3145 const struct rte_flow_action *action,
3146 uint64_t action_flags,
3147 const struct rte_flow_attr *attr,
3148 struct rte_flow_error *error)
3150 struct mlx5_priv *priv = dev->data->dev_private;
3151 struct mlx5_dev_config *config = &priv->config;
3152 const struct rte_flow_action_mark *mark = action->conf;
3155 if (is_tunnel_offload_active(dev))
3156 return rte_flow_error_set(error, ENOTSUP,
3157 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3159 "if tunnel offload active");
3160 /* Fall back if no extended metadata register support. */
3161 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3162 return mlx5_flow_validate_action_mark(action, action_flags,
3164 /* Extensive metadata mode requires registers. */
3165 if (!mlx5_flow_ext_mreg_supported(dev))
3166 return rte_flow_error_set(error, ENOTSUP,
3167 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3168 "no metadata registers "
3169 "to support mark action");
3170 if (!priv->sh->dv_mark_mask)
3171 return rte_flow_error_set(error, ENOTSUP,
3172 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3173 "extended metadata register"
3174 " isn't available");
3175 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3178 MLX5_ASSERT(ret > 0);
3180 return rte_flow_error_set(error, EINVAL,
3181 RTE_FLOW_ERROR_TYPE_ACTION, action,
3182 "configuration cannot be null");
3183 if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3184 return rte_flow_error_set(error, EINVAL,
3185 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3187 "mark id exceeds the limit");
3188 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3189 return rte_flow_error_set(error, EINVAL,
3190 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3191 "can't flag and mark in same flow");
3192 if (action_flags & MLX5_FLOW_ACTION_MARK)
3193 return rte_flow_error_set(error, EINVAL,
3194 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3195 "can't have 2 mark actions in same"
3201 * Validate SET_META action.
3204 * Pointer to the rte_eth_dev structure.
3206 * Pointer to the action structure.
3207 * @param[in] action_flags
3208 * Holds the actions detected until now.
3210 * Pointer to flow attributes
3212 * Pointer to error structure.
3215 * 0 on success, a negative errno value otherwise and rte_errno is set.
3218 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3219 const struct rte_flow_action *action,
3220 uint64_t action_flags __rte_unused,
3221 const struct rte_flow_attr *attr,
3222 struct rte_flow_error *error)
3224 const struct rte_flow_action_set_meta *conf;
3225 uint32_t nic_mask = UINT32_MAX;
3228 if (!mlx5_flow_ext_mreg_supported(dev))
3229 return rte_flow_error_set(error, ENOTSUP,
3230 RTE_FLOW_ERROR_TYPE_ACTION, action,
3231 "extended metadata register"
3232 " isn't supported");
3233 reg = flow_dv_get_metadata_reg(dev, attr, error);
3237 return rte_flow_error_set(error, ENOTSUP,
3238 RTE_FLOW_ERROR_TYPE_ACTION, action,
3239 "unavalable extended metadata register");
3240 if (reg != REG_A && reg != REG_B) {
3241 struct mlx5_priv *priv = dev->data->dev_private;
3243 nic_mask = priv->sh->dv_meta_mask;
3245 if (!(action->conf))
3246 return rte_flow_error_set(error, EINVAL,
3247 RTE_FLOW_ERROR_TYPE_ACTION, action,
3248 "configuration cannot be null");
3249 conf = (const struct rte_flow_action_set_meta *)action->conf;
3251 return rte_flow_error_set(error, EINVAL,
3252 RTE_FLOW_ERROR_TYPE_ACTION, action,
3253 "zero mask doesn't have any effect");
3254 if (conf->mask & ~nic_mask)
3255 return rte_flow_error_set(error, EINVAL,
3256 RTE_FLOW_ERROR_TYPE_ACTION, action,
3257 "meta data must be within reg C0");
3262 * Validate SET_TAG action.
3265 * Pointer to the rte_eth_dev structure.
3267 * Pointer to the action structure.
3268 * @param[in] action_flags
3269 * Holds the actions detected until now.
3271 * Pointer to flow attributes
3273 * Pointer to error structure.
3276 * 0 on success, a negative errno value otherwise and rte_errno is set.
3279 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3280 const struct rte_flow_action *action,
3281 uint64_t action_flags,
3282 const struct rte_flow_attr *attr,
3283 struct rte_flow_error *error)
3285 const struct rte_flow_action_set_tag *conf;
3286 const uint64_t terminal_action_flags =
3287 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3288 MLX5_FLOW_ACTION_RSS;
3291 if (!mlx5_flow_ext_mreg_supported(dev))
3292 return rte_flow_error_set(error, ENOTSUP,
3293 RTE_FLOW_ERROR_TYPE_ACTION, action,
3294 "extensive metadata register"
3295 " isn't supported");
3296 if (!(action->conf))
3297 return rte_flow_error_set(error, EINVAL,
3298 RTE_FLOW_ERROR_TYPE_ACTION, action,
3299 "configuration cannot be null");
3300 conf = (const struct rte_flow_action_set_tag *)action->conf;
3302 return rte_flow_error_set(error, EINVAL,
3303 RTE_FLOW_ERROR_TYPE_ACTION, action,
3304 "zero mask doesn't have any effect");
3305 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3308 if (!attr->transfer && attr->ingress &&
3309 (action_flags & terminal_action_flags))
3310 return rte_flow_error_set(error, EINVAL,
3311 RTE_FLOW_ERROR_TYPE_ACTION, action,
3312 "set_tag has no effect"
3313 " with terminal actions");
3318 * Check if action counter is shared by either old or new mechanism.
3321 * Pointer to the action structure.
3324 * True when counter is shared, false otherwise.
3327 is_shared_action_count(const struct rte_flow_action *action)
3329 const struct rte_flow_action_count *count =
3330 (const struct rte_flow_action_count *)action->conf;
3332 if ((int)action->type == MLX5_RTE_FLOW_ACTION_TYPE_COUNT)
3334 return !!(count && count->shared);
3338 * Validate count action.
3341 * Pointer to rte_eth_dev structure.
3343 * Indicator if action is shared.
3344 * @param[in] action_flags
3345 * Holds the actions detected until now.
3347 * Pointer to error structure.
3350 * 0 on success, a negative errno value otherwise and rte_errno is set.
3353 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3354 uint64_t action_flags,
3355 struct rte_flow_error *error)
3357 struct mlx5_priv *priv = dev->data->dev_private;
3359 if (!priv->config.devx)
3361 if (action_flags & MLX5_FLOW_ACTION_COUNT)
3362 return rte_flow_error_set(error, EINVAL,
3363 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3364 "duplicate count actions set");
3365 if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3366 !priv->sh->flow_hit_aso_en)
3367 return rte_flow_error_set(error, EINVAL,
3368 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3369 "old age and shared count combination is not supported");
3370 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3374 return rte_flow_error_set
3376 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3378 "count action not supported");
3382 * Validate the L2 encap action.
3385 * Pointer to the rte_eth_dev structure.
3386 * @param[in] action_flags
3387 * Holds the actions detected until now.
3389 * Pointer to the action structure.
3391 * Pointer to flow attributes.
3393 * Pointer to error structure.
3396 * 0 on success, a negative errno value otherwise and rte_errno is set.
3399 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3400 uint64_t action_flags,
3401 const struct rte_flow_action *action,
3402 const struct rte_flow_attr *attr,
3403 struct rte_flow_error *error)
3405 const struct mlx5_priv *priv = dev->data->dev_private;
3407 if (!(action->conf))
3408 return rte_flow_error_set(error, EINVAL,
3409 RTE_FLOW_ERROR_TYPE_ACTION, action,
3410 "configuration cannot be null");
3411 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3412 return rte_flow_error_set(error, EINVAL,
3413 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3414 "can only have a single encap action "
3416 if (!attr->transfer && priv->representor)
3417 return rte_flow_error_set(error, ENOTSUP,
3418 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3419 "encap action for VF representor "
3420 "not supported on NIC table");
3425 * Validate a decap action.
3428 * Pointer to the rte_eth_dev structure.
3429 * @param[in] action_flags
3430 * Holds the actions detected until now.
3432 * Pointer to the action structure.
3433 * @param[in] item_flags
3434 * Holds the items detected.
3436 * Pointer to flow attributes
3438 * Pointer to error structure.
3441 * 0 on success, a negative errno value otherwise and rte_errno is set.
3444 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3445 uint64_t action_flags,
3446 const struct rte_flow_action *action,
3447 const uint64_t item_flags,
3448 const struct rte_flow_attr *attr,
3449 struct rte_flow_error *error)
3451 const struct mlx5_priv *priv = dev->data->dev_private;
3453 if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3454 !priv->config.decap_en)
3455 return rte_flow_error_set(error, ENOTSUP,
3456 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3457 "decap is not enabled");
3458 if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3459 return rte_flow_error_set(error, ENOTSUP,
3460 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3462 MLX5_FLOW_ACTION_DECAP ? "can only "
3463 "have a single decap action" : "decap "
3464 "after encap is not supported");
3465 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3466 return rte_flow_error_set(error, EINVAL,
3467 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3468 "can't have decap action after"
3471 return rte_flow_error_set(error, ENOTSUP,
3472 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3474 "decap action not supported for "
3476 if (!attr->transfer && priv->representor)
3477 return rte_flow_error_set(error, ENOTSUP,
3478 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3479 "decap action for VF representor "
3480 "not supported on NIC table");
3481 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3482 !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3483 return rte_flow_error_set(error, ENOTSUP,
3484 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3485 "VXLAN item should be present for VXLAN decap");
3489 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3492 * Validate the raw encap and decap actions.
3495 * Pointer to the rte_eth_dev structure.
3497 * Pointer to the decap action.
3499 * Pointer to the encap action.
3501 * Pointer to flow attributes
3502 * @param[in/out] action_flags
3503 * Holds the actions detected until now.
3504 * @param[out] actions_n
3505 * pointer to the number of actions counter.
3507 * Pointer to the action structure.
3508 * @param[in] item_flags
3509 * Holds the items detected.
3511 * Pointer to error structure.
3514 * 0 on success, a negative errno value otherwise and rte_errno is set.
3517 flow_dv_validate_action_raw_encap_decap
3518 (struct rte_eth_dev *dev,
3519 const struct rte_flow_action_raw_decap *decap,
3520 const struct rte_flow_action_raw_encap *encap,
3521 const struct rte_flow_attr *attr, uint64_t *action_flags,
3522 int *actions_n, const struct rte_flow_action *action,
3523 uint64_t item_flags, struct rte_flow_error *error)
3525 const struct mlx5_priv *priv = dev->data->dev_private;
3528 if (encap && (!encap->size || !encap->data))
3529 return rte_flow_error_set(error, EINVAL,
3530 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3531 "raw encap data cannot be empty");
3532 if (decap && encap) {
3533 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3534 encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3537 else if (encap->size <=
3538 MLX5_ENCAPSULATION_DECISION_SIZE &&
3540 MLX5_ENCAPSULATION_DECISION_SIZE)
3543 else if (encap->size >
3544 MLX5_ENCAPSULATION_DECISION_SIZE &&
3546 MLX5_ENCAPSULATION_DECISION_SIZE)
3547 /* 2 L2 actions: encap and decap. */
3550 return rte_flow_error_set(error,
3552 RTE_FLOW_ERROR_TYPE_ACTION,
3553 NULL, "unsupported too small "
3554 "raw decap and too small raw "
3555 "encap combination");
3558 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3559 item_flags, attr, error);
3562 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3566 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3567 return rte_flow_error_set(error, ENOTSUP,
3568 RTE_FLOW_ERROR_TYPE_ACTION,
3570 "small raw encap size");
3571 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3572 return rte_flow_error_set(error, EINVAL,
3573 RTE_FLOW_ERROR_TYPE_ACTION,
3575 "more than one encap action");
3576 if (!attr->transfer && priv->representor)
3577 return rte_flow_error_set
3579 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3580 "encap action for VF representor "
3581 "not supported on NIC table");
3582 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3589 * Validate the ASO CT action.
3592 * Pointer to the rte_eth_dev structure.
3593 * @param[in] action_flags
3594 * Holds the actions detected until now.
3595 * @param[in] item_flags
3596 * The items found in this flow rule.
3598 * Pointer to flow attributes.
3600 * Pointer to error structure.
3603 * 0 on success, a negative errno value otherwise and rte_errno is set.
3606 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3607 uint64_t action_flags,
3608 uint64_t item_flags,
3609 const struct rte_flow_attr *attr,
3610 struct rte_flow_error *error)
3614 if (attr->group == 0 && !attr->transfer)
3615 return rte_flow_error_set(error, ENOTSUP,
3616 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3618 "Only support non-root table");
3619 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3620 return rte_flow_error_set(error, ENOTSUP,
3621 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3622 "CT cannot follow a fate action");
3623 if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3624 (action_flags & MLX5_FLOW_ACTION_AGE))
3625 return rte_flow_error_set(error, EINVAL,
3626 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3627 "Only one ASO action is supported");
3628 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3629 return rte_flow_error_set(error, EINVAL,
3630 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3631 "Encap cannot exist before CT");
3632 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3633 return rte_flow_error_set(error, EINVAL,
3634 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3635 "Not a outer TCP packet");
3640 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3641 struct mlx5_list_entry *entry, void *cb_ctx)
3643 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3644 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3645 struct mlx5_flow_dv_encap_decap_resource *resource;
3647 resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3649 if (resource->reformat_type == ctx_resource->reformat_type &&
3650 resource->ft_type == ctx_resource->ft_type &&
3651 resource->flags == ctx_resource->flags &&
3652 resource->size == ctx_resource->size &&
3653 !memcmp((const void *)resource->buf,
3654 (const void *)ctx_resource->buf,
3660 struct mlx5_list_entry *
3661 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3663 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3664 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3665 struct mlx5dv_dr_domain *domain;
3666 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3667 struct mlx5_flow_dv_encap_decap_resource *resource;
3671 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3672 domain = sh->fdb_domain;
3673 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3674 domain = sh->rx_domain;
3676 domain = sh->tx_domain;
3677 /* Register new encap/decap resource. */
3678 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3680 rte_flow_error_set(ctx->error, ENOMEM,
3681 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3682 "cannot allocate resource memory");
3685 *resource = *ctx_resource;
3686 resource->idx = idx;
3687 ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->ctx, domain,
3691 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3692 rte_flow_error_set(ctx->error, ENOMEM,
3693 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3694 NULL, "cannot create action");
3698 return &resource->entry;
3701 struct mlx5_list_entry *
3702 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3705 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3706 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3707 struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3710 cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3712 if (!cache_resource) {
3713 rte_flow_error_set(ctx->error, ENOMEM,
3714 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3715 "cannot allocate resource memory");
3718 memcpy(cache_resource, oentry, sizeof(*cache_resource));
3719 cache_resource->idx = idx;
3720 return &cache_resource->entry;
3724 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3726 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3727 struct mlx5_flow_dv_encap_decap_resource *res =
3728 container_of(entry, typeof(*res), entry);
3730 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3734 * Find existing encap/decap resource or create and register a new one.
3736 * @param[in, out] dev
3737 * Pointer to rte_eth_dev structure.
3738 * @param[in, out] resource
3739 * Pointer to encap/decap resource.
3740 * @parm[in, out] dev_flow
3741 * Pointer to the dev_flow.
3743 * pointer to error structure.
3746 * 0 on success otherwise -errno and errno is set.
3749 flow_dv_encap_decap_resource_register
3750 (struct rte_eth_dev *dev,
3751 struct mlx5_flow_dv_encap_decap_resource *resource,
3752 struct mlx5_flow *dev_flow,
3753 struct rte_flow_error *error)
3755 struct mlx5_priv *priv = dev->data->dev_private;
3756 struct mlx5_dev_ctx_shared *sh = priv->sh;
3757 struct mlx5_list_entry *entry;
3761 uint32_t refmt_type:8;
3763 * Header reformat actions can be shared between
3764 * non-root tables. One bit to indicate non-root
3768 uint32_t reserve:15;
3771 } encap_decap_key = {
3773 .ft_type = resource->ft_type,
3774 .refmt_type = resource->reformat_type,
3775 .is_root = !!dev_flow->dv.group,
3779 struct mlx5_flow_cb_ctx ctx = {
3783 struct mlx5_hlist *encaps_decaps;
3786 encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3788 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3790 flow_dv_encap_decap_create_cb,
3791 flow_dv_encap_decap_match_cb,
3792 flow_dv_encap_decap_remove_cb,
3793 flow_dv_encap_decap_clone_cb,
3794 flow_dv_encap_decap_clone_free_cb);
3795 if (unlikely(!encaps_decaps))
3797 resource->flags = dev_flow->dv.group ? 0 : 1;
3798 key64 = __rte_raw_cksum(&encap_decap_key.v32,
3799 sizeof(encap_decap_key.v32), 0);
3800 if (resource->reformat_type !=
3801 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3803 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3804 entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3807 resource = container_of(entry, typeof(*resource), entry);
3808 dev_flow->dv.encap_decap = resource;
3809 dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3814 * Find existing table jump resource or create and register a new one.
3816 * @param[in, out] dev
3817 * Pointer to rte_eth_dev structure.
3818 * @param[in, out] tbl
3819 * Pointer to flow table resource.
3820 * @parm[in, out] dev_flow
3821 * Pointer to the dev_flow.
3823 * pointer to error structure.
3826 * 0 on success otherwise -errno and errno is set.
3829 flow_dv_jump_tbl_resource_register
3830 (struct rte_eth_dev *dev __rte_unused,
3831 struct mlx5_flow_tbl_resource *tbl,
3832 struct mlx5_flow *dev_flow,
3833 struct rte_flow_error *error __rte_unused)
3835 struct mlx5_flow_tbl_data_entry *tbl_data =
3836 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3839 MLX5_ASSERT(tbl_data->jump.action);
3840 dev_flow->handle->rix_jump = tbl_data->idx;
3841 dev_flow->dv.jump = &tbl_data->jump;
3846 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3847 struct mlx5_list_entry *entry, void *cb_ctx)
3849 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3850 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3851 struct mlx5_flow_dv_port_id_action_resource *res =
3852 container_of(entry, typeof(*res), entry);
3854 return ref->port_id != res->port_id;
3857 struct mlx5_list_entry *
3858 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3860 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3861 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3862 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3863 struct mlx5_flow_dv_port_id_action_resource *resource;
3867 /* Register new port id action resource. */
3868 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3870 rte_flow_error_set(ctx->error, ENOMEM,
3871 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3872 "cannot allocate port_id action memory");
3876 ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3880 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3881 rte_flow_error_set(ctx->error, ENOMEM,
3882 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3883 "cannot create action");
3886 resource->idx = idx;
3887 return &resource->entry;
3890 struct mlx5_list_entry *
3891 flow_dv_port_id_clone_cb(void *tool_ctx,
3892 struct mlx5_list_entry *entry __rte_unused,
3895 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3896 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3897 struct mlx5_flow_dv_port_id_action_resource *resource;
3900 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3902 rte_flow_error_set(ctx->error, ENOMEM,
3903 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3904 "cannot allocate port_id action memory");
3907 memcpy(resource, entry, sizeof(*resource));
3908 resource->idx = idx;
3909 return &resource->entry;
3913 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3915 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3916 struct mlx5_flow_dv_port_id_action_resource *resource =
3917 container_of(entry, typeof(*resource), entry);
3919 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3923 * Find existing table port ID resource or create and register a new one.
3925 * @param[in, out] dev
3926 * Pointer to rte_eth_dev structure.
3927 * @param[in, out] ref
3928 * Pointer to port ID action resource reference.
3929 * @parm[in, out] dev_flow
3930 * Pointer to the dev_flow.
3932 * pointer to error structure.
3935 * 0 on success otherwise -errno and errno is set.
3938 flow_dv_port_id_action_resource_register
3939 (struct rte_eth_dev *dev,
3940 struct mlx5_flow_dv_port_id_action_resource *ref,
3941 struct mlx5_flow *dev_flow,
3942 struct rte_flow_error *error)
3944 struct mlx5_priv *priv = dev->data->dev_private;
3945 struct mlx5_list_entry *entry;
3946 struct mlx5_flow_dv_port_id_action_resource *resource;
3947 struct mlx5_flow_cb_ctx ctx = {
3952 entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3955 resource = container_of(entry, typeof(*resource), entry);
3956 dev_flow->dv.port_id_action = resource;
3957 dev_flow->handle->rix_port_id_action = resource->idx;
3962 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3963 struct mlx5_list_entry *entry, void *cb_ctx)
3965 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3966 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3967 struct mlx5_flow_dv_push_vlan_action_resource *res =
3968 container_of(entry, typeof(*res), entry);
3970 return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3973 struct mlx5_list_entry *
3974 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3976 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3977 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3978 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3979 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3980 struct mlx5dv_dr_domain *domain;
3984 /* Register new port id action resource. */
3985 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3987 rte_flow_error_set(ctx->error, ENOMEM,
3988 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3989 "cannot allocate push_vlan action memory");
3993 if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3994 domain = sh->fdb_domain;
3995 else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3996 domain = sh->rx_domain;
3998 domain = sh->tx_domain;
3999 ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
4002 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
4003 rte_flow_error_set(ctx->error, ENOMEM,
4004 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4005 "cannot create push vlan action");
4008 resource->idx = idx;
4009 return &resource->entry;
4012 struct mlx5_list_entry *
4013 flow_dv_push_vlan_clone_cb(void *tool_ctx,
4014 struct mlx5_list_entry *entry __rte_unused,
4017 struct mlx5_dev_ctx_shared *sh = tool_ctx;
4018 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4019 struct mlx5_flow_dv_push_vlan_action_resource *resource;
4022 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
4024 rte_flow_error_set(ctx->error, ENOMEM,
4025 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4026 "cannot allocate push_vlan action memory");
4029 memcpy(resource, entry, sizeof(*resource));
4030 resource->idx = idx;
4031 return &resource->entry;
4035 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4037 struct mlx5_dev_ctx_shared *sh = tool_ctx;
4038 struct mlx5_flow_dv_push_vlan_action_resource *resource =
4039 container_of(entry, typeof(*resource), entry);
4041 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
4045 * Find existing push vlan resource or create and register a new one.
4047 * @param [in, out] dev
4048 * Pointer to rte_eth_dev structure.
4049 * @param[in, out] ref
4050 * Pointer to port ID action resource reference.
4051 * @parm[in, out] dev_flow
4052 * Pointer to the dev_flow.
4054 * pointer to error structure.
4057 * 0 on success otherwise -errno and errno is set.
4060 flow_dv_push_vlan_action_resource_register
4061 (struct rte_eth_dev *dev,
4062 struct mlx5_flow_dv_push_vlan_action_resource *ref,
4063 struct mlx5_flow *dev_flow,
4064 struct rte_flow_error *error)
4066 struct mlx5_priv *priv = dev->data->dev_private;
4067 struct mlx5_flow_dv_push_vlan_action_resource *resource;
4068 struct mlx5_list_entry *entry;
4069 struct mlx5_flow_cb_ctx ctx = {
4074 entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4077 resource = container_of(entry, typeof(*resource), entry);
4079 dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4080 dev_flow->dv.push_vlan_res = resource;
4085 * Get the size of specific rte_flow_item_type hdr size
4087 * @param[in] item_type
4088 * Tested rte_flow_item_type.
4091 * sizeof struct item_type, 0 if void or irrelevant.
4094 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4098 switch (item_type) {
4099 case RTE_FLOW_ITEM_TYPE_ETH:
4100 retval = sizeof(struct rte_ether_hdr);
4102 case RTE_FLOW_ITEM_TYPE_VLAN:
4103 retval = sizeof(struct rte_vlan_hdr);
4105 case RTE_FLOW_ITEM_TYPE_IPV4:
4106 retval = sizeof(struct rte_ipv4_hdr);
4108 case RTE_FLOW_ITEM_TYPE_IPV6:
4109 retval = sizeof(struct rte_ipv6_hdr);
4111 case RTE_FLOW_ITEM_TYPE_UDP:
4112 retval = sizeof(struct rte_udp_hdr);
4114 case RTE_FLOW_ITEM_TYPE_TCP:
4115 retval = sizeof(struct rte_tcp_hdr);
4117 case RTE_FLOW_ITEM_TYPE_VXLAN:
4118 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4119 retval = sizeof(struct rte_vxlan_hdr);
4121 case RTE_FLOW_ITEM_TYPE_GRE:
4122 case RTE_FLOW_ITEM_TYPE_NVGRE:
4123 retval = sizeof(struct rte_gre_hdr);
4125 case RTE_FLOW_ITEM_TYPE_MPLS:
4126 retval = sizeof(struct rte_mpls_hdr);
4128 case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4136 #define MLX5_ENCAP_IPV4_VERSION 0x40
4137 #define MLX5_ENCAP_IPV4_IHL_MIN 0x05
4138 #define MLX5_ENCAP_IPV4_TTL_DEF 0x40
4139 #define MLX5_ENCAP_IPV6_VTC_FLOW 0x60000000
4140 #define MLX5_ENCAP_IPV6_HOP_LIMIT 0xff
4141 #define MLX5_ENCAP_VXLAN_FLAGS 0x08000000
4142 #define MLX5_ENCAP_VXLAN_GPE_FLAGS 0x04
4145 * Convert the encap action data from list of rte_flow_item to raw buffer
4148 * Pointer to rte_flow_item objects list.
4150 * Pointer to the output buffer.
4152 * Pointer to the output buffer size.
4154 * Pointer to the error structure.
4157 * 0 on success, a negative errno value otherwise and rte_errno is set.
4160 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4161 size_t *size, struct rte_flow_error *error)
4163 struct rte_ether_hdr *eth = NULL;
4164 struct rte_vlan_hdr *vlan = NULL;
4165 struct rte_ipv4_hdr *ipv4 = NULL;
4166 struct rte_ipv6_hdr *ipv6 = NULL;
4167 struct rte_udp_hdr *udp = NULL;
4168 struct rte_vxlan_hdr *vxlan = NULL;
4169 struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4170 struct rte_gre_hdr *gre = NULL;
4172 size_t temp_size = 0;
4175 return rte_flow_error_set(error, EINVAL,
4176 RTE_FLOW_ERROR_TYPE_ACTION,
4177 NULL, "invalid empty data");
4178 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4179 len = flow_dv_get_item_hdr_len(items->type);
4180 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4181 return rte_flow_error_set(error, EINVAL,
4182 RTE_FLOW_ERROR_TYPE_ACTION,
4183 (void *)items->type,
4184 "items total size is too big"
4185 " for encap action");
4186 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4187 switch (items->type) {
4188 case RTE_FLOW_ITEM_TYPE_ETH:
4189 eth = (struct rte_ether_hdr *)&buf[temp_size];
4191 case RTE_FLOW_ITEM_TYPE_VLAN:
4192 vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4194 return rte_flow_error_set(error, EINVAL,
4195 RTE_FLOW_ERROR_TYPE_ACTION,
4196 (void *)items->type,
4197 "eth header not found");
4198 if (!eth->ether_type)
4199 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4201 case RTE_FLOW_ITEM_TYPE_IPV4:
4202 ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4204 return rte_flow_error_set(error, EINVAL,
4205 RTE_FLOW_ERROR_TYPE_ACTION,
4206 (void *)items->type,
4207 "neither eth nor vlan"
4209 if (vlan && !vlan->eth_proto)
4210 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4211 else if (eth && !eth->ether_type)
4212 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4213 if (!ipv4->version_ihl)
4214 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4215 MLX5_ENCAP_IPV4_IHL_MIN;
4216 if (!ipv4->time_to_live)
4217 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4219 case RTE_FLOW_ITEM_TYPE_IPV6:
4220 ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4222 return rte_flow_error_set(error, EINVAL,
4223 RTE_FLOW_ERROR_TYPE_ACTION,
4224 (void *)items->type,
4225 "neither eth nor vlan"
4227 if (vlan && !vlan->eth_proto)
4228 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4229 else if (eth && !eth->ether_type)
4230 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4231 if (!ipv6->vtc_flow)
4233 RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4234 if (!ipv6->hop_limits)
4235 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4237 case RTE_FLOW_ITEM_TYPE_UDP:
4238 udp = (struct rte_udp_hdr *)&buf[temp_size];
4240 return rte_flow_error_set(error, EINVAL,
4241 RTE_FLOW_ERROR_TYPE_ACTION,
4242 (void *)items->type,
4243 "ip header not found");
4244 if (ipv4 && !ipv4->next_proto_id)
4245 ipv4->next_proto_id = IPPROTO_UDP;
4246 else if (ipv6 && !ipv6->proto)
4247 ipv6->proto = IPPROTO_UDP;
4249 case RTE_FLOW_ITEM_TYPE_VXLAN:
4250 vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4252 return rte_flow_error_set(error, EINVAL,
4253 RTE_FLOW_ERROR_TYPE_ACTION,
4254 (void *)items->type,
4255 "udp header not found");
4257 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4258 if (!vxlan->vx_flags)
4260 RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4262 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4263 vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4265 return rte_flow_error_set(error, EINVAL,
4266 RTE_FLOW_ERROR_TYPE_ACTION,
4267 (void *)items->type,
4268 "udp header not found");
4269 if (!vxlan_gpe->proto)
4270 return rte_flow_error_set(error, EINVAL,
4271 RTE_FLOW_ERROR_TYPE_ACTION,
4272 (void *)items->type,
4273 "next protocol not found");
4276 RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4277 if (!vxlan_gpe->vx_flags)
4278 vxlan_gpe->vx_flags =
4279 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4281 case RTE_FLOW_ITEM_TYPE_GRE:
4282 case RTE_FLOW_ITEM_TYPE_NVGRE:
4283 gre = (struct rte_gre_hdr *)&buf[temp_size];
4285 return rte_flow_error_set(error, EINVAL,
4286 RTE_FLOW_ERROR_TYPE_ACTION,
4287 (void *)items->type,
4288 "next protocol not found");
4290 return rte_flow_error_set(error, EINVAL,
4291 RTE_FLOW_ERROR_TYPE_ACTION,
4292 (void *)items->type,
4293 "ip header not found");
4294 if (ipv4 && !ipv4->next_proto_id)
4295 ipv4->next_proto_id = IPPROTO_GRE;
4296 else if (ipv6 && !ipv6->proto)
4297 ipv6->proto = IPPROTO_GRE;
4299 case RTE_FLOW_ITEM_TYPE_VOID:
4302 return rte_flow_error_set(error, EINVAL,
4303 RTE_FLOW_ERROR_TYPE_ACTION,
4304 (void *)items->type,
4305 "unsupported item type");
4315 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4317 struct rte_ether_hdr *eth = NULL;
4318 struct rte_vlan_hdr *vlan = NULL;
4319 struct rte_ipv6_hdr *ipv6 = NULL;
4320 struct rte_udp_hdr *udp = NULL;
4324 eth = (struct rte_ether_hdr *)data;
4325 next_hdr = (char *)(eth + 1);
4326 proto = RTE_BE16(eth->ether_type);
4329 while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4330 vlan = (struct rte_vlan_hdr *)next_hdr;
4331 proto = RTE_BE16(vlan->eth_proto);
4332 next_hdr += sizeof(struct rte_vlan_hdr);
4335 /* HW calculates IPv4 csum. no need to proceed */
4336 if (proto == RTE_ETHER_TYPE_IPV4)
4339 /* non IPv4/IPv6 header. not supported */
4340 if (proto != RTE_ETHER_TYPE_IPV6) {
4341 return rte_flow_error_set(error, ENOTSUP,
4342 RTE_FLOW_ERROR_TYPE_ACTION,
4343 NULL, "Cannot offload non IPv4/IPv6");
4346 ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4348 /* ignore non UDP */
4349 if (ipv6->proto != IPPROTO_UDP)
4352 udp = (struct rte_udp_hdr *)(ipv6 + 1);
4353 udp->dgram_cksum = 0;
4359 * Convert L2 encap action to DV specification.
4362 * Pointer to rte_eth_dev structure.
4364 * Pointer to action structure.
4365 * @param[in, out] dev_flow
4366 * Pointer to the mlx5_flow.
4367 * @param[in] transfer
4368 * Mark if the flow is E-Switch flow.
4370 * Pointer to the error structure.
4373 * 0 on success, a negative errno value otherwise and rte_errno is set.
4376 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4377 const struct rte_flow_action *action,
4378 struct mlx5_flow *dev_flow,
4380 struct rte_flow_error *error)
4382 const struct rte_flow_item *encap_data;
4383 const struct rte_flow_action_raw_encap *raw_encap_data;
4384 struct mlx5_flow_dv_encap_decap_resource res = {
4386 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4387 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4388 MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4391 if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4393 (const struct rte_flow_action_raw_encap *)action->conf;
4394 res.size = raw_encap_data->size;
4395 memcpy(res.buf, raw_encap_data->data, res.size);
4397 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4399 ((const struct rte_flow_action_vxlan_encap *)
4400 action->conf)->definition;
4403 ((const struct rte_flow_action_nvgre_encap *)
4404 action->conf)->definition;
4405 if (flow_dv_convert_encap_data(encap_data, res.buf,
4409 if (flow_dv_zero_encap_udp_csum(res.buf, error))
4411 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4412 return rte_flow_error_set(error, EINVAL,
4413 RTE_FLOW_ERROR_TYPE_ACTION,
4414 NULL, "can't create L2 encap action");
4419 * Convert L2 decap action to DV specification.
4422 * Pointer to rte_eth_dev structure.
4423 * @param[in, out] dev_flow
4424 * Pointer to the mlx5_flow.
4425 * @param[in] transfer
4426 * Mark if the flow is E-Switch flow.
4428 * Pointer to the error structure.
4431 * 0 on success, a negative errno value otherwise and rte_errno is set.
4434 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4435 struct mlx5_flow *dev_flow,
4437 struct rte_flow_error *error)
4439 struct mlx5_flow_dv_encap_decap_resource res = {
4442 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4443 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4444 MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4447 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4448 return rte_flow_error_set(error, EINVAL,
4449 RTE_FLOW_ERROR_TYPE_ACTION,
4450 NULL, "can't create L2 decap action");
4455 * Convert raw decap/encap (L3 tunnel) action to DV specification.
4458 * Pointer to rte_eth_dev structure.
4460 * Pointer to action structure.
4461 * @param[in, out] dev_flow
4462 * Pointer to the mlx5_flow.
4464 * Pointer to the flow attributes.
4466 * Pointer to the error structure.
4469 * 0 on success, a negative errno value otherwise and rte_errno is set.
4472 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4473 const struct rte_flow_action *action,
4474 struct mlx5_flow *dev_flow,
4475 const struct rte_flow_attr *attr,
4476 struct rte_flow_error *error)
4478 const struct rte_flow_action_raw_encap *encap_data;
4479 struct mlx5_flow_dv_encap_decap_resource res;
4481 memset(&res, 0, sizeof(res));
4482 encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4483 res.size = encap_data->size;
4484 memcpy(res.buf, encap_data->data, res.size);
4485 res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4486 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4487 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4489 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4491 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4492 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4493 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4494 return rte_flow_error_set(error, EINVAL,
4495 RTE_FLOW_ERROR_TYPE_ACTION,
4496 NULL, "can't create encap action");
4501 * Create action push VLAN.
4504 * Pointer to rte_eth_dev structure.
4506 * Pointer to the flow attributes.
4508 * Pointer to the vlan to push to the Ethernet header.
4509 * @param[in, out] dev_flow
4510 * Pointer to the mlx5_flow.
4512 * Pointer to the error structure.
4515 * 0 on success, a negative errno value otherwise and rte_errno is set.
4518 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4519 const struct rte_flow_attr *attr,
4520 const struct rte_vlan_hdr *vlan,
4521 struct mlx5_flow *dev_flow,
4522 struct rte_flow_error *error)
4524 struct mlx5_flow_dv_push_vlan_action_resource res;
4526 memset(&res, 0, sizeof(res));
4528 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4531 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4533 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4534 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4535 return flow_dv_push_vlan_action_resource_register
4536 (dev, &res, dev_flow, error);
4540 * Validate the modify-header actions.
4542 * @param[in] action_flags
4543 * Holds the actions detected until now.
4545 * Pointer to the modify action.
4547 * Pointer to error structure.
4550 * 0 on success, a negative errno value otherwise and rte_errno is set.
4553 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4554 const struct rte_flow_action *action,
4555 struct rte_flow_error *error)
4557 if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4558 return rte_flow_error_set(error, EINVAL,
4559 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4560 NULL, "action configuration not set");
4561 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4562 return rte_flow_error_set(error, EINVAL,
4563 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4564 "can't have encap action before"
4570 * Validate the modify-header MAC address actions.
4572 * @param[in] action_flags
4573 * Holds the actions detected until now.
4575 * Pointer to the modify action.
4576 * @param[in] item_flags
4577 * Holds the items detected.
4579 * Pointer to error structure.
4582 * 0 on success, a negative errno value otherwise and rte_errno is set.
4585 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4586 const struct rte_flow_action *action,
4587 const uint64_t item_flags,
4588 struct rte_flow_error *error)
4592 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4594 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4595 return rte_flow_error_set(error, EINVAL,
4596 RTE_FLOW_ERROR_TYPE_ACTION,
4598 "no L2 item in pattern");
4604 * Validate the modify-header IPv4 address actions.
4606 * @param[in] action_flags
4607 * Holds the actions detected until now.
4609 * Pointer to the modify action.
4610 * @param[in] item_flags
4611 * Holds the items detected.
4613 * Pointer to error structure.
4616 * 0 on success, a negative errno value otherwise and rte_errno is set.
4619 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4620 const struct rte_flow_action *action,
4621 const uint64_t item_flags,
4622 struct rte_flow_error *error)
4627 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4629 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4630 MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4631 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4632 if (!(item_flags & layer))
4633 return rte_flow_error_set(error, EINVAL,
4634 RTE_FLOW_ERROR_TYPE_ACTION,
4636 "no ipv4 item in pattern");
4642 * Validate the modify-header IPv6 address actions.
4644 * @param[in] action_flags
4645 * Holds the actions detected until now.
4647 * Pointer to the modify action.
4648 * @param[in] item_flags
4649 * Holds the items detected.
4651 * Pointer to error structure.
4654 * 0 on success, a negative errno value otherwise and rte_errno is set.
4657 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4658 const struct rte_flow_action *action,
4659 const uint64_t item_flags,
4660 struct rte_flow_error *error)
4665 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4667 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4668 MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4669 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4670 if (!(item_flags & layer))
4671 return rte_flow_error_set(error, EINVAL,
4672 RTE_FLOW_ERROR_TYPE_ACTION,
4674 "no ipv6 item in pattern");
4680 * Validate the modify-header TP actions.
4682 * @param[in] action_flags
4683 * Holds the actions detected until now.
4685 * Pointer to the modify action.
4686 * @param[in] item_flags
4687 * Holds the items detected.
4689 * Pointer to error structure.
4692 * 0 on success, a negative errno value otherwise and rte_errno is set.
4695 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4696 const struct rte_flow_action *action,
4697 const uint64_t item_flags,
4698 struct rte_flow_error *error)
4703 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4705 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4706 MLX5_FLOW_LAYER_INNER_L4 :
4707 MLX5_FLOW_LAYER_OUTER_L4;
4708 if (!(item_flags & layer))
4709 return rte_flow_error_set(error, EINVAL,
4710 RTE_FLOW_ERROR_TYPE_ACTION,
4711 NULL, "no transport layer "
4718 * Validate the modify-header actions of increment/decrement
4719 * TCP Sequence-number.
4721 * @param[in] action_flags
4722 * Holds the actions detected until now.
4724 * Pointer to the modify action.
4725 * @param[in] item_flags
4726 * Holds the items detected.
4728 * Pointer to error structure.
4731 * 0 on success, a negative errno value otherwise and rte_errno is set.
4734 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4735 const struct rte_flow_action *action,
4736 const uint64_t item_flags,
4737 struct rte_flow_error *error)
4742 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4744 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4745 MLX5_FLOW_LAYER_INNER_L4_TCP :
4746 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4747 if (!(item_flags & layer))
4748 return rte_flow_error_set(error, EINVAL,
4749 RTE_FLOW_ERROR_TYPE_ACTION,
4750 NULL, "no TCP item in"
4752 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4753 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4754 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4755 (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4756 return rte_flow_error_set(error, EINVAL,
4757 RTE_FLOW_ERROR_TYPE_ACTION,
4759 "cannot decrease and increase"
4760 " TCP sequence number"
4761 " at the same time");
4767 * Validate the modify-header actions of increment/decrement
4768 * TCP Acknowledgment number.
4770 * @param[in] action_flags
4771 * Holds the actions detected until now.
4773 * Pointer to the modify action.
4774 * @param[in] item_flags
4775 * Holds the items detected.
4777 * Pointer to error structure.
4780 * 0 on success, a negative errno value otherwise and rte_errno is set.
4783 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4784 const struct rte_flow_action *action,
4785 const uint64_t item_flags,
4786 struct rte_flow_error *error)
4791 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4793 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4794 MLX5_FLOW_LAYER_INNER_L4_TCP :
4795 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4796 if (!(item_flags & layer))
4797 return rte_flow_error_set(error, EINVAL,
4798 RTE_FLOW_ERROR_TYPE_ACTION,
4799 NULL, "no TCP item in"
4801 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4802 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4803 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4804 (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4805 return rte_flow_error_set(error, EINVAL,
4806 RTE_FLOW_ERROR_TYPE_ACTION,
4808 "cannot decrease and increase"
4809 " TCP acknowledgment number"
4810 " at the same time");
4816 * Validate the modify-header TTL actions.
4818 * @param[in] action_flags
4819 * Holds the actions detected until now.
4821 * Pointer to the modify action.
4822 * @param[in] item_flags
4823 * Holds the items detected.
4825 * Pointer to error structure.
4828 * 0 on success, a negative errno value otherwise and rte_errno is set.
4831 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4832 const struct rte_flow_action *action,
4833 const uint64_t item_flags,
4834 struct rte_flow_error *error)
4839 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4841 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4842 MLX5_FLOW_LAYER_INNER_L3 :
4843 MLX5_FLOW_LAYER_OUTER_L3;
4844 if (!(item_flags & layer))
4845 return rte_flow_error_set(error, EINVAL,
4846 RTE_FLOW_ERROR_TYPE_ACTION,
4848 "no IP protocol in pattern");
4854 * Validate the generic modify field actions.
4856 * Pointer to the rte_eth_dev structure.
4857 * @param[in] action_flags
4858 * Holds the actions detected until now.
4860 * Pointer to the modify action.
4862 * Pointer to the flow attributes.
4864 * Pointer to error structure.
4867 * Number of header fields to modify (0 or more) on success,
4868 * a negative errno value otherwise and rte_errno is set.
4871 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4872 const uint64_t action_flags,
4873 const struct rte_flow_action *action,
4874 const struct rte_flow_attr *attr,
4875 struct rte_flow_error *error)
4878 struct mlx5_priv *priv = dev->data->dev_private;
4879 struct mlx5_dev_config *config = &priv->config;
4880 const struct rte_flow_action_modify_field *action_modify_field =
4882 uint32_t dst_width = mlx5_flow_item_field_width(priv,
4883 action_modify_field->dst.field);
4884 uint32_t src_width = mlx5_flow_item_field_width(priv,
4885 action_modify_field->src.field);
4887 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4891 if (action_modify_field->width == 0)
4892 return rte_flow_error_set(error, EINVAL,
4893 RTE_FLOW_ERROR_TYPE_ACTION, action,
4894 "no bits are requested to be modified");
4895 else if (action_modify_field->width > dst_width ||
4896 action_modify_field->width > src_width)
4897 return rte_flow_error_set(error, EINVAL,
4898 RTE_FLOW_ERROR_TYPE_ACTION, action,
4899 "cannot modify more bits than"
4900 " the width of a field");
4901 if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4902 action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4903 if ((action_modify_field->dst.offset +
4904 action_modify_field->width > dst_width) ||
4905 (action_modify_field->dst.offset % 32))
4906 return rte_flow_error_set(error, EINVAL,
4907 RTE_FLOW_ERROR_TYPE_ACTION, action,
4908 "destination offset is too big"
4909 " or not aligned to 4 bytes");
4910 if (action_modify_field->dst.level &&
4911 action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4912 return rte_flow_error_set(error, ENOTSUP,
4913 RTE_FLOW_ERROR_TYPE_ACTION, action,
4914 "inner header fields modification"
4915 " is not supported");
4917 if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4918 action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4919 if (!attr->transfer && !attr->group)
4920 return rte_flow_error_set(error, ENOTSUP,
4921 RTE_FLOW_ERROR_TYPE_ACTION, action,
4922 "modify field action is not"
4923 " supported for group 0");
4924 if ((action_modify_field->src.offset +
4925 action_modify_field->width > src_width) ||
4926 (action_modify_field->src.offset % 32))
4927 return rte_flow_error_set(error, EINVAL,
4928 RTE_FLOW_ERROR_TYPE_ACTION, action,
4929 "source offset is too big"
4930 " or not aligned to 4 bytes");
4931 if (action_modify_field->src.level &&
4932 action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4933 return rte_flow_error_set(error, ENOTSUP,
4934 RTE_FLOW_ERROR_TYPE_ACTION, action,
4935 "inner header fields modification"
4936 " is not supported");
4938 if ((action_modify_field->dst.field ==
4939 action_modify_field->src.field) &&
4940 (action_modify_field->dst.level ==
4941 action_modify_field->src.level))
4942 return rte_flow_error_set(error, EINVAL,
4943 RTE_FLOW_ERROR_TYPE_ACTION, action,
4944 "source and destination fields"
4945 " cannot be the same");
4946 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4947 action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4948 action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4949 return rte_flow_error_set(error, EINVAL,
4950 RTE_FLOW_ERROR_TYPE_ACTION, action,
4951 "mark, immediate value or a pointer to it"
4952 " cannot be used as a destination");
4953 if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4954 action_modify_field->src.field == RTE_FLOW_FIELD_START)
4955 return rte_flow_error_set(error, ENOTSUP,
4956 RTE_FLOW_ERROR_TYPE_ACTION, action,
4957 "modifications of an arbitrary"
4958 " place in a packet is not supported");
4959 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4960 action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4961 return rte_flow_error_set(error, ENOTSUP,
4962 RTE_FLOW_ERROR_TYPE_ACTION, action,
4963 "modifications of the 802.1Q Tag"
4964 " Identifier is not supported");
4965 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4966 action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4967 return rte_flow_error_set(error, ENOTSUP,
4968 RTE_FLOW_ERROR_TYPE_ACTION, action,
4969 "modifications of the VXLAN Network"
4970 " Identifier is not supported");
4971 if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4972 action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4973 return rte_flow_error_set(error, ENOTSUP,
4974 RTE_FLOW_ERROR_TYPE_ACTION, action,
4975 "modifications of the GENEVE Network"
4976 " Identifier is not supported");
4977 if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4978 action_modify_field->src.field == RTE_FLOW_FIELD_MARK ||
4979 action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4980 action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4981 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4982 !mlx5_flow_ext_mreg_supported(dev))
4983 return rte_flow_error_set(error, ENOTSUP,
4984 RTE_FLOW_ERROR_TYPE_ACTION, action,
4985 "cannot modify mark or metadata without"
4986 " extended metadata register support");
4988 if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4989 return rte_flow_error_set(error, ENOTSUP,
4990 RTE_FLOW_ERROR_TYPE_ACTION, action,
4991 "add and sub operations"
4992 " are not supported");
4993 return (action_modify_field->width / 32) +
4994 !!(action_modify_field->width % 32);
4998 * Validate jump action.
5001 * Pointer to the jump action.
5002 * @param[in] action_flags
5003 * Holds the actions detected until now.
5004 * @param[in] attributes
5005 * Pointer to flow attributes
5006 * @param[in] external
5007 * Action belongs to flow rule created by request external to PMD.
5009 * Pointer to error structure.
5012 * 0 on success, a negative errno value otherwise and rte_errno is set.
5015 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
5016 const struct mlx5_flow_tunnel *tunnel,
5017 const struct rte_flow_action *action,
5018 uint64_t action_flags,
5019 const struct rte_flow_attr *attributes,
5020 bool external, struct rte_flow_error *error)
5022 uint32_t target_group, table;
5024 struct flow_grp_info grp_info = {
5025 .external = !!external,
5026 .transfer = !!attributes->transfer,
5030 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5031 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5032 return rte_flow_error_set(error, EINVAL,
5033 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5034 "can't have 2 fate actions in"
5037 return rte_flow_error_set(error, EINVAL,
5038 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5039 NULL, "action configuration not set");
5041 ((const struct rte_flow_action_jump *)action->conf)->group;
5042 ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
5046 if (attributes->group == target_group &&
5047 !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
5048 MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5049 return rte_flow_error_set(error, EINVAL,
5050 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5051 "target group must be other than"
5052 " the current flow group");
5057 * Validate the port_id action.
5060 * Pointer to rte_eth_dev structure.
5061 * @param[in] action_flags
5062 * Bit-fields that holds the actions detected until now.
5064 * Port_id RTE action structure.
5066 * Attributes of flow that includes this action.
5068 * Pointer to error structure.
5071 * 0 on success, a negative errno value otherwise and rte_errno is set.
5074 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5075 uint64_t action_flags,
5076 const struct rte_flow_action *action,
5077 const struct rte_flow_attr *attr,
5078 struct rte_flow_error *error)
5080 const struct rte_flow_action_port_id *port_id;
5081 struct mlx5_priv *act_priv;
5082 struct mlx5_priv *dev_priv;
5085 if (!attr->transfer)
5086 return rte_flow_error_set(error, ENOTSUP,
5087 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5089 "port id action is valid in transfer"
5091 if (!action || !action->conf)
5092 return rte_flow_error_set(error, ENOTSUP,
5093 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5095 "port id action parameters must be"
5097 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5098 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5099 return rte_flow_error_set(error, EINVAL,
5100 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5101 "can have only one fate actions in"
5103 dev_priv = mlx5_dev_to_eswitch_info(dev);
5105 return rte_flow_error_set(error, rte_errno,
5106 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5108 "failed to obtain E-Switch info");
5109 port_id = action->conf;
5110 port = port_id->original ? dev->data->port_id : port_id->id;
5111 act_priv = mlx5_port_to_eswitch_info(port, false);
5113 return rte_flow_error_set
5115 RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
5116 "failed to obtain E-Switch port id for port");
5117 if (act_priv->domain_id != dev_priv->domain_id)
5118 return rte_flow_error_set
5120 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5121 "port does not belong to"
5122 " E-Switch being configured");
5127 * Get the maximum number of modify header actions.
5130 * Pointer to rte_eth_dev structure.
5132 * Whether action is on root table.
5135 * Max number of modify header actions device can support.
5137 static inline unsigned int
5138 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5142 * There's no way to directly query the max capacity from FW.
5143 * The maximal value on root table should be assumed to be supported.
5146 return MLX5_MAX_MODIFY_NUM;
5148 return MLX5_ROOT_TBL_MODIFY_NUM;
5152 * Validate the meter action.
5155 * Pointer to rte_eth_dev structure.
5156 * @param[in] action_flags
5157 * Bit-fields that holds the actions detected until now.
5159 * Pointer to the meter action.
5161 * Attributes of flow that includes this action.
5162 * @param[in] port_id_item
5163 * Pointer to item indicating port id.
5165 * Pointer to error structure.
5168 * 0 on success, a negative errno value otherwise and rte_ernno is set.
5171 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5172 uint64_t action_flags,
5173 const struct rte_flow_action *action,
5174 const struct rte_flow_attr *attr,
5175 const struct rte_flow_item *port_id_item,
5177 struct rte_flow_error *error)
5179 struct mlx5_priv *priv = dev->data->dev_private;
5180 const struct rte_flow_action_meter *am = action->conf;
5181 struct mlx5_flow_meter_info *fm;
5182 struct mlx5_flow_meter_policy *mtr_policy;
5183 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5186 return rte_flow_error_set(error, EINVAL,
5187 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5188 "meter action conf is NULL");
5190 if (action_flags & MLX5_FLOW_ACTION_METER)
5191 return rte_flow_error_set(error, ENOTSUP,
5192 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5193 "meter chaining not support");
5194 if (action_flags & MLX5_FLOW_ACTION_JUMP)
5195 return rte_flow_error_set(error, ENOTSUP,
5196 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5197 "meter with jump not support");
5199 return rte_flow_error_set(error, ENOTSUP,
5200 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5202 "meter action not supported");
5203 fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5205 return rte_flow_error_set(error, EINVAL,
5206 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5208 /* aso meter can always be shared by different domains */
5209 if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5210 !(fm->transfer == attr->transfer ||
5211 (!fm->ingress && !attr->ingress && attr->egress) ||
5212 (!fm->egress && !attr->egress && attr->ingress)))
5213 return rte_flow_error_set(error, EINVAL,
5214 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5215 "Flow attributes domain are either invalid "
5216 "or have a domain conflict with current "
5217 "meter attributes");
5218 if (fm->def_policy) {
5219 if (!((attr->transfer &&
5220 mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5222 mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5224 mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5225 return rte_flow_error_set(error, EINVAL,
5226 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5227 "Flow attributes domain "
5228 "have a conflict with current "
5229 "meter domain attributes");
5232 mtr_policy = mlx5_flow_meter_policy_find(dev,
5233 fm->policy_id, NULL);
5235 return rte_flow_error_set(error, EINVAL,
5236 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5237 "Invalid policy id for meter ");
5238 if (!((attr->transfer && mtr_policy->transfer) ||
5239 (attr->egress && mtr_policy->egress) ||
5240 (attr->ingress && mtr_policy->ingress)))
5241 return rte_flow_error_set(error, EINVAL,
5242 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5243 "Flow attributes domain "
5244 "have a conflict with current "
5245 "meter domain attributes");
5246 if (attr->transfer && mtr_policy->dev) {
5248 * When policy has fate action of port_id,
5249 * the flow should have the same src port as policy.
5251 struct mlx5_priv *policy_port_priv =
5252 mtr_policy->dev->data->dev_private;
5253 int32_t flow_src_port = priv->representor_id;
5256 const struct rte_flow_item_port_id *spec =
5258 struct mlx5_priv *port_priv =
5259 mlx5_port_to_eswitch_info(spec->id,
5262 return rte_flow_error_set(error,
5264 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5266 "Failed to get port info.");
5267 flow_src_port = port_priv->representor_id;
5269 if (flow_src_port != policy_port_priv->representor_id)
5270 return rte_flow_error_set(error,
5272 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5274 "Flow and meter policy "
5275 "have different src port.");
5277 *def_policy = false;
5283 * Validate the age action.
5285 * @param[in] action_flags
5286 * Holds the actions detected until now.
5288 * Pointer to the age action.
5290 * Pointer to the Ethernet device structure.
5292 * Pointer to error structure.
5295 * 0 on success, a negative errno value otherwise and rte_errno is set.
5298 flow_dv_validate_action_age(uint64_t action_flags,
5299 const struct rte_flow_action *action,
5300 struct rte_eth_dev *dev,
5301 struct rte_flow_error *error)
5303 struct mlx5_priv *priv = dev->data->dev_private;
5304 const struct rte_flow_action_age *age = action->conf;
5306 if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
5307 !priv->sh->aso_age_mng))
5308 return rte_flow_error_set(error, ENOTSUP,
5309 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5311 "age action not supported");
5312 if (!(action->conf))
5313 return rte_flow_error_set(error, EINVAL,
5314 RTE_FLOW_ERROR_TYPE_ACTION, action,
5315 "configuration cannot be null");
5316 if (!(age->timeout))
5317 return rte_flow_error_set(error, EINVAL,
5318 RTE_FLOW_ERROR_TYPE_ACTION, action,
5319 "invalid timeout value 0");
5320 if (action_flags & MLX5_FLOW_ACTION_AGE)
5321 return rte_flow_error_set(error, EINVAL,
5322 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5323 "duplicate age actions set");
5328 * Validate the modify-header IPv4 DSCP actions.
5330 * @param[in] action_flags
5331 * Holds the actions detected until now.
5333 * Pointer to the modify action.
5334 * @param[in] item_flags
5335 * Holds the items detected.
5337 * Pointer to error structure.
5340 * 0 on success, a negative errno value otherwise and rte_errno is set.
5343 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5344 const struct rte_flow_action *action,
5345 const uint64_t item_flags,
5346 struct rte_flow_error *error)
5350 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5352 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5353 return rte_flow_error_set(error, EINVAL,
5354 RTE_FLOW_ERROR_TYPE_ACTION,
5356 "no ipv4 item in pattern");
5362 * Validate the modify-header IPv6 DSCP actions.
5364 * @param[in] action_flags
5365 * Holds the actions detected until now.
5367 * Pointer to the modify action.
5368 * @param[in] item_flags
5369 * Holds the items detected.
5371 * Pointer to error structure.
5374 * 0 on success, a negative errno value otherwise and rte_errno is set.
5377 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5378 const struct rte_flow_action *action,
5379 const uint64_t item_flags,
5380 struct rte_flow_error *error)
5384 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5386 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5387 return rte_flow_error_set(error, EINVAL,
5388 RTE_FLOW_ERROR_TYPE_ACTION,
5390 "no ipv6 item in pattern");
5396 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5397 struct mlx5_list_entry *entry, void *cb_ctx)
5399 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5400 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5401 struct mlx5_flow_dv_modify_hdr_resource *resource =
5402 container_of(entry, typeof(*resource), entry);
5403 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5405 key_len += ref->actions_num * sizeof(ref->actions[0]);
5406 return ref->actions_num != resource->actions_num ||
5407 memcmp(&ref->ft_type, &resource->ft_type, key_len);
5410 static struct mlx5_indexed_pool *
5411 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5413 struct mlx5_indexed_pool *ipool = __atomic_load_n
5414 (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5417 struct mlx5_indexed_pool *expected = NULL;
5418 struct mlx5_indexed_pool_config cfg =
5419 (struct mlx5_indexed_pool_config) {
5420 .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5422 sizeof(struct mlx5_modification_cmd),
5427 .release_mem_en = !!sh->reclaim_mode,
5428 .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),
5429 .malloc = mlx5_malloc,
5431 .type = "mlx5_modify_action_resource",
5434 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5435 ipool = mlx5_ipool_create(&cfg);
5438 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5439 &expected, ipool, false,
5441 __ATOMIC_SEQ_CST)) {
5442 mlx5_ipool_destroy(ipool);
5443 ipool = __atomic_load_n(&sh->mdh_ipools[index],
5450 struct mlx5_list_entry *
5451 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5453 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5454 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5455 struct mlx5dv_dr_domain *ns;
5456 struct mlx5_flow_dv_modify_hdr_resource *entry;
5457 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5458 struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5459 ref->actions_num - 1);
5461 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5462 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5465 if (unlikely(!ipool)) {
5466 rte_flow_error_set(ctx->error, ENOMEM,
5467 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5468 NULL, "cannot allocate modify ipool");
5471 entry = mlx5_ipool_zmalloc(ipool, &idx);
5473 rte_flow_error_set(ctx->error, ENOMEM,
5474 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5475 "cannot allocate resource memory");
5478 rte_memcpy(&entry->ft_type,
5479 RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5480 key_len + data_len);
5481 if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5482 ns = sh->fdb_domain;
5483 else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5487 ret = mlx5_flow_os_create_flow_action_modify_header
5488 (sh->ctx, ns, entry,
5489 data_len, &entry->action);
5491 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5492 rte_flow_error_set(ctx->error, ENOMEM,
5493 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5494 NULL, "cannot create modification action");
5498 return &entry->entry;
5501 struct mlx5_list_entry *
5502 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5505 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5506 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5507 struct mlx5_flow_dv_modify_hdr_resource *entry;
5508 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5509 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5512 entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5515 rte_flow_error_set(ctx->error, ENOMEM,
5516 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5517 "cannot allocate resource memory");
5520 memcpy(entry, oentry, sizeof(*entry) + data_len);
5522 return &entry->entry;
5526 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5528 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5529 struct mlx5_flow_dv_modify_hdr_resource *res =
5530 container_of(entry, typeof(*res), entry);
5532 mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5536 * Validate the sample action.
5538 * @param[in, out] action_flags
5539 * Holds the actions detected until now.
5541 * Pointer to the sample action.
5543 * Pointer to the Ethernet device structure.
5545 * Attributes of flow that includes this action.
5546 * @param[in] item_flags
5547 * Holds the items detected.
5549 * Pointer to the RSS action.
5550 * @param[out] sample_rss
5551 * Pointer to the RSS action in sample action list.
5553 * Pointer to the COUNT action in sample action list.
5554 * @param[out] fdb_mirror_limit
5555 * Pointer to the FDB mirror limitation flag.
5557 * Pointer to error structure.
5560 * 0 on success, a negative errno value otherwise and rte_errno is set.
5563 flow_dv_validate_action_sample(uint64_t *action_flags,
5564 const struct rte_flow_action *action,
5565 struct rte_eth_dev *dev,
5566 const struct rte_flow_attr *attr,
5567 uint64_t item_flags,
5568 const struct rte_flow_action_rss *rss,
5569 const struct rte_flow_action_rss **sample_rss,
5570 const struct rte_flow_action_count **count,
5571 int *fdb_mirror_limit,
5572 struct rte_flow_error *error)
5574 struct mlx5_priv *priv = dev->data->dev_private;
5575 struct mlx5_dev_config *dev_conf = &priv->config;
5576 const struct rte_flow_action_sample *sample = action->conf;
5577 const struct rte_flow_action *act;
5578 uint64_t sub_action_flags = 0;
5579 uint16_t queue_index = 0xFFFF;
5584 return rte_flow_error_set(error, EINVAL,
5585 RTE_FLOW_ERROR_TYPE_ACTION, action,
5586 "configuration cannot be NULL");
5587 if (sample->ratio == 0)
5588 return rte_flow_error_set(error, EINVAL,
5589 RTE_FLOW_ERROR_TYPE_ACTION, action,
5590 "ratio value starts from 1");
5591 if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
5592 return rte_flow_error_set(error, ENOTSUP,
5593 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5595 "sample action not supported");
5596 if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5597 return rte_flow_error_set(error, EINVAL,
5598 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5599 "Multiple sample actions not "
5601 if (*action_flags & MLX5_FLOW_ACTION_METER)
5602 return rte_flow_error_set(error, EINVAL,
5603 RTE_FLOW_ERROR_TYPE_ACTION, action,
5604 "wrong action order, meter should "
5605 "be after sample action");
5606 if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5607 return rte_flow_error_set(error, EINVAL,
5608 RTE_FLOW_ERROR_TYPE_ACTION, action,
5609 "wrong action order, jump should "
5610 "be after sample action");
5611 act = sample->actions;
5612 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5613 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5614 return rte_flow_error_set(error, ENOTSUP,
5615 RTE_FLOW_ERROR_TYPE_ACTION,
5616 act, "too many actions");
5617 switch (act->type) {
5618 case RTE_FLOW_ACTION_TYPE_QUEUE:
5619 ret = mlx5_flow_validate_action_queue(act,
5625 queue_index = ((const struct rte_flow_action_queue *)
5626 (act->conf))->index;
5627 sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5630 case RTE_FLOW_ACTION_TYPE_RSS:
5631 *sample_rss = act->conf;
5632 ret = mlx5_flow_validate_action_rss(act,
5639 if (rss && *sample_rss &&
5640 ((*sample_rss)->level != rss->level ||
5641 (*sample_rss)->types != rss->types))
5642 return rte_flow_error_set(error, ENOTSUP,
5643 RTE_FLOW_ERROR_TYPE_ACTION,
5645 "Can't use the different RSS types "
5646 "or level in the same flow");
5647 if (*sample_rss != NULL && (*sample_rss)->queue_num)
5648 queue_index = (*sample_rss)->queue[0];
5649 sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5652 case RTE_FLOW_ACTION_TYPE_MARK:
5653 ret = flow_dv_validate_action_mark(dev, act,
5658 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5659 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5660 MLX5_FLOW_ACTION_MARK_EXT;
5662 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5665 case RTE_FLOW_ACTION_TYPE_COUNT:
5666 ret = flow_dv_validate_action_count
5667 (dev, is_shared_action_count(act),
5668 *action_flags | sub_action_flags,
5673 sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5674 *action_flags |= MLX5_FLOW_ACTION_COUNT;
5677 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5678 ret = flow_dv_validate_action_port_id(dev,
5685 sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5688 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5689 ret = flow_dv_validate_action_raw_encap_decap
5690 (dev, NULL, act->conf, attr, &sub_action_flags,
5691 &actions_n, action, item_flags, error);
5696 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5697 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5698 ret = flow_dv_validate_action_l2_encap(dev,
5704 sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5708 return rte_flow_error_set(error, ENOTSUP,
5709 RTE_FLOW_ERROR_TYPE_ACTION,
5711 "Doesn't support optional "
5715 if (attr->ingress && !attr->transfer) {
5716 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5717 MLX5_FLOW_ACTION_RSS)))
5718 return rte_flow_error_set(error, EINVAL,
5719 RTE_FLOW_ERROR_TYPE_ACTION,
5721 "Ingress must has a dest "
5722 "QUEUE for Sample");
5723 } else if (attr->egress && !attr->transfer) {
5724 return rte_flow_error_set(error, ENOTSUP,
5725 RTE_FLOW_ERROR_TYPE_ACTION,
5727 "Sample Only support Ingress "
5729 } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5730 MLX5_ASSERT(attr->transfer);
5731 if (sample->ratio > 1)
5732 return rte_flow_error_set(error, ENOTSUP,
5733 RTE_FLOW_ERROR_TYPE_ACTION,
5735 "E-Switch doesn't support "
5736 "any optional action "
5738 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5739 return rte_flow_error_set(error, ENOTSUP,
5740 RTE_FLOW_ERROR_TYPE_ACTION,
5742 "unsupported action QUEUE");
5743 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5744 return rte_flow_error_set(error, ENOTSUP,
5745 RTE_FLOW_ERROR_TYPE_ACTION,
5747 "unsupported action QUEUE");
5748 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5749 return rte_flow_error_set(error, EINVAL,
5750 RTE_FLOW_ERROR_TYPE_ACTION,
5752 "E-Switch must has a dest "
5753 "port for mirroring");
5754 if (!priv->config.hca_attr.reg_c_preserve &&
5755 priv->representor_id != UINT16_MAX)
5756 *fdb_mirror_limit = 1;
5758 /* Continue validation for Xcap actions.*/
5759 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5760 (queue_index == 0xFFFF ||
5761 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5762 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5763 MLX5_FLOW_XCAP_ACTIONS)
5764 return rte_flow_error_set(error, ENOTSUP,
5765 RTE_FLOW_ERROR_TYPE_ACTION,
5766 NULL, "encap and decap "
5767 "combination aren't "
5769 if (!attr->transfer && attr->ingress && (sub_action_flags &
5770 MLX5_FLOW_ACTION_ENCAP))
5771 return rte_flow_error_set(error, ENOTSUP,
5772 RTE_FLOW_ERROR_TYPE_ACTION,
5773 NULL, "encap is not supported"
5774 " for ingress traffic");
5780 * Find existing modify-header resource or create and register a new one.
5782 * @param dev[in, out]
5783 * Pointer to rte_eth_dev structure.
5784 * @param[in, out] resource
5785 * Pointer to modify-header resource.
5786 * @parm[in, out] dev_flow
5787 * Pointer to the dev_flow.
5789 * pointer to error structure.
5792 * 0 on success otherwise -errno and errno is set.
5795 flow_dv_modify_hdr_resource_register
5796 (struct rte_eth_dev *dev,
5797 struct mlx5_flow_dv_modify_hdr_resource *resource,
5798 struct mlx5_flow *dev_flow,
5799 struct rte_flow_error *error)
5801 struct mlx5_priv *priv = dev->data->dev_private;
5802 struct mlx5_dev_ctx_shared *sh = priv->sh;
5803 uint32_t key_len = sizeof(*resource) -
5804 offsetof(typeof(*resource), ft_type) +
5805 resource->actions_num * sizeof(resource->actions[0]);
5806 struct mlx5_list_entry *entry;
5807 struct mlx5_flow_cb_ctx ctx = {
5811 struct mlx5_hlist *modify_cmds;
5814 modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5816 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5818 flow_dv_modify_create_cb,
5819 flow_dv_modify_match_cb,
5820 flow_dv_modify_remove_cb,
5821 flow_dv_modify_clone_cb,
5822 flow_dv_modify_clone_free_cb);
5823 if (unlikely(!modify_cmds))
5825 resource->root = !dev_flow->dv.group;
5826 if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5828 return rte_flow_error_set(error, EOVERFLOW,
5829 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5830 "too many modify header items");
5831 key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5832 entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5835 resource = container_of(entry, typeof(*resource), entry);
5836 dev_flow->handle->dvh.modify_hdr = resource;
5841 * Get DV flow counter by index.
5844 * Pointer to the Ethernet device structure.
5846 * mlx5 flow counter index in the container.
5848 * mlx5 flow counter pool in the container.
5851 * Pointer to the counter, NULL otherwise.
5853 static struct mlx5_flow_counter *
5854 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5856 struct mlx5_flow_counter_pool **ppool)
5858 struct mlx5_priv *priv = dev->data->dev_private;
5859 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5860 struct mlx5_flow_counter_pool *pool;
5862 /* Decrease to original index and clear shared bit. */
5863 idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5864 MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5865 pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5869 return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5873 * Check the devx counter belongs to the pool.
5876 * Pointer to the counter pool.
5878 * The counter devx ID.
5881 * True if counter belongs to the pool, false otherwise.
5884 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5886 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5887 MLX5_COUNTERS_PER_POOL;
5889 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5895 * Get a pool by devx counter ID.
5898 * Pointer to the counter management.
5900 * The counter devx ID.
5903 * The counter pool pointer if exists, NULL otherwise,
5905 static struct mlx5_flow_counter_pool *
5906 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5909 struct mlx5_flow_counter_pool *pool = NULL;
5911 rte_spinlock_lock(&cmng->pool_update_sl);
5912 /* Check last used pool. */
5913 if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5914 flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5915 pool = cmng->pools[cmng->last_pool_idx];
5918 /* ID out of range means no suitable pool in the container. */
5919 if (id > cmng->max_id || id < cmng->min_id)
5922 * Find the pool from the end of the container, since mostly counter
5923 * ID is sequence increasing, and the last pool should be the needed
5928 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5930 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5936 rte_spinlock_unlock(&cmng->pool_update_sl);
5941 * Resize a counter container.
5944 * Pointer to the Ethernet device structure.
5947 * 0 on success, otherwise negative errno value and rte_errno is set.
5950 flow_dv_container_resize(struct rte_eth_dev *dev)
5952 struct mlx5_priv *priv = dev->data->dev_private;
5953 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5954 void *old_pools = cmng->pools;
5955 uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5956 uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5957 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5964 memcpy(pools, old_pools, cmng->n *
5965 sizeof(struct mlx5_flow_counter_pool *));
5967 cmng->pools = pools;
5969 mlx5_free(old_pools);
5974 * Query a devx flow counter.
5977 * Pointer to the Ethernet device structure.
5978 * @param[in] counter
5979 * Index to the flow counter.
5981 * The statistics value of packets.
5983 * The statistics value of bytes.
5986 * 0 on success, otherwise a negative errno value and rte_errno is set.
5989 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5992 struct mlx5_priv *priv = dev->data->dev_private;
5993 struct mlx5_flow_counter_pool *pool = NULL;
5994 struct mlx5_flow_counter *cnt;
5997 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5999 if (priv->sh->cmng.counter_fallback)
6000 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
6001 0, pkts, bytes, 0, NULL, NULL, 0);
6002 rte_spinlock_lock(&pool->sl);
6007 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
6008 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
6009 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
6011 rte_spinlock_unlock(&pool->sl);
6016 * Create and initialize a new counter pool.
6019 * Pointer to the Ethernet device structure.
6021 * The devX counter handle.
6023 * Whether the pool is for counter that was allocated for aging.
6024 * @param[in/out] cont_cur
6025 * Pointer to the container pointer, it will be update in pool resize.
6028 * The pool container pointer on success, NULL otherwise and rte_errno is set.
6030 static struct mlx5_flow_counter_pool *
6031 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6034 struct mlx5_priv *priv = dev->data->dev_private;
6035 struct mlx5_flow_counter_pool *pool;
6036 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6037 bool fallback = priv->sh->cmng.counter_fallback;
6038 uint32_t size = sizeof(*pool);
6040 size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6041 size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6042 pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6048 pool->is_aged = !!age;
6049 pool->query_gen = 0;
6050 pool->min_dcs = dcs;
6051 rte_spinlock_init(&pool->sl);
6052 rte_spinlock_init(&pool->csl);
6053 TAILQ_INIT(&pool->counters[0]);
6054 TAILQ_INIT(&pool->counters[1]);
6055 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6056 rte_spinlock_lock(&cmng->pool_update_sl);
6057 pool->index = cmng->n_valid;
6058 if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6060 rte_spinlock_unlock(&cmng->pool_update_sl);
6063 cmng->pools[pool->index] = pool;
6065 if (unlikely(fallback)) {
6066 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6068 if (base < cmng->min_id)
6069 cmng->min_id = base;
6070 if (base > cmng->max_id)
6071 cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6072 cmng->last_pool_idx = pool->index;
6074 rte_spinlock_unlock(&cmng->pool_update_sl);
6079 * Prepare a new counter and/or a new counter pool.
6082 * Pointer to the Ethernet device structure.
6083 * @param[out] cnt_free
6084 * Where to put the pointer of a new counter.
6086 * Whether the pool is for counter that was allocated for aging.
6089 * The counter pool pointer and @p cnt_free is set on success,
6090 * NULL otherwise and rte_errno is set.
6092 static struct mlx5_flow_counter_pool *
6093 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6094 struct mlx5_flow_counter **cnt_free,
6097 struct mlx5_priv *priv = dev->data->dev_private;
6098 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6099 struct mlx5_flow_counter_pool *pool;
6100 struct mlx5_counters tmp_tq;
6101 struct mlx5_devx_obj *dcs = NULL;
6102 struct mlx5_flow_counter *cnt;
6103 enum mlx5_counter_type cnt_type =
6104 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6105 bool fallback = priv->sh->cmng.counter_fallback;
6109 /* bulk_bitmap must be 0 for single counter allocation. */
6110 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
6113 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6115 pool = flow_dv_pool_create(dev, dcs, age);
6117 mlx5_devx_cmd_destroy(dcs);
6121 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6122 cnt = MLX5_POOL_GET_CNT(pool, i);
6124 cnt->dcs_when_free = dcs;
6128 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
6130 rte_errno = ENODATA;
6133 pool = flow_dv_pool_create(dev, dcs, age);
6135 mlx5_devx_cmd_destroy(dcs);
6138 TAILQ_INIT(&tmp_tq);
6139 for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6140 cnt = MLX5_POOL_GET_CNT(pool, i);
6142 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6144 rte_spinlock_lock(&cmng->csl[cnt_type]);
6145 TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6146 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6147 *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6148 (*cnt_free)->pool = pool;
6153 * Allocate a flow counter.
6156 * Pointer to the Ethernet device structure.
6158 * Whether the counter was allocated for aging.
6161 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6164 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6166 struct mlx5_priv *priv = dev->data->dev_private;
6167 struct mlx5_flow_counter_pool *pool = NULL;
6168 struct mlx5_flow_counter *cnt_free = NULL;
6169 bool fallback = priv->sh->cmng.counter_fallback;
6170 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6171 enum mlx5_counter_type cnt_type =
6172 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6175 if (!priv->config.devx) {
6176 rte_errno = ENOTSUP;
6179 /* Get free counters from container. */
6180 rte_spinlock_lock(&cmng->csl[cnt_type]);
6181 cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6183 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6184 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6185 if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6187 pool = cnt_free->pool;
6189 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6190 /* Create a DV counter action only in the first time usage. */
6191 if (!cnt_free->action) {
6193 struct mlx5_devx_obj *dcs;
6197 offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6198 dcs = pool->min_dcs;
6201 dcs = cnt_free->dcs_when_free;
6203 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6210 cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6211 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6212 /* Update the counter reset values. */
6213 if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6216 if (!fallback && !priv->sh->cmng.query_thread_on)
6217 /* Start the asynchronous batch query by the host thread. */
6218 mlx5_set_query_alarm(priv->sh);
6220 * When the count action isn't shared (by ID), shared_info field is
6221 * used for indirect action API's refcnt.
6222 * When the counter action is not shared neither by ID nor by indirect
6223 * action API, shared info must be 1.
6225 cnt_free->shared_info.refcnt = 1;
6229 cnt_free->pool = pool;
6231 cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6232 rte_spinlock_lock(&cmng->csl[cnt_type]);
6233 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6234 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6240 * Allocate a shared flow counter.
6243 * Pointer to the shared counter configuration.
6245 * Pointer to save the allocated counter index.
6248 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6252 flow_dv_counter_alloc_shared_cb(void *ctx, union mlx5_l3t_data *data)
6254 struct mlx5_shared_counter_conf *conf = ctx;
6255 struct rte_eth_dev *dev = conf->dev;
6256 struct mlx5_flow_counter *cnt;
6258 data->dword = flow_dv_counter_alloc(dev, 0);
6259 data->dword |= MLX5_CNT_SHARED_OFFSET;
6260 cnt = flow_dv_counter_get_by_idx(dev, data->dword, NULL);
6261 cnt->shared_info.id = conf->id;
6266 * Get a shared flow counter.
6269 * Pointer to the Ethernet device structure.
6271 * Counter identifier.
6274 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6277 flow_dv_counter_get_shared(struct rte_eth_dev *dev, uint32_t id)
6279 struct mlx5_priv *priv = dev->data->dev_private;
6280 struct mlx5_shared_counter_conf conf = {
6284 union mlx5_l3t_data data = {
6288 mlx5_l3t_prepare_entry(priv->sh->cnt_id_tbl, id, &data,
6289 flow_dv_counter_alloc_shared_cb, &conf);
6294 * Get age param from counter index.
6297 * Pointer to the Ethernet device structure.
6298 * @param[in] counter
6299 * Index to the counter handler.
6302 * The aging parameter specified for the counter index.
6304 static struct mlx5_age_param*
6305 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6308 struct mlx5_flow_counter *cnt;
6309 struct mlx5_flow_counter_pool *pool = NULL;
6311 flow_dv_counter_get_by_idx(dev, counter, &pool);
6312 counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6313 cnt = MLX5_POOL_GET_CNT(pool, counter);
6314 return MLX5_CNT_TO_AGE(cnt);
6318 * Remove a flow counter from aged counter list.
6321 * Pointer to the Ethernet device structure.
6322 * @param[in] counter
6323 * Index to the counter handler.
6325 * Pointer to the counter handler.
6328 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6329 uint32_t counter, struct mlx5_flow_counter *cnt)
6331 struct mlx5_age_info *age_info;
6332 struct mlx5_age_param *age_param;
6333 struct mlx5_priv *priv = dev->data->dev_private;
6334 uint16_t expected = AGE_CANDIDATE;
6336 age_info = GET_PORT_AGE_INFO(priv);
6337 age_param = flow_dv_counter_idx_get_age(dev, counter);
6338 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6339 AGE_FREE, false, __ATOMIC_RELAXED,
6340 __ATOMIC_RELAXED)) {
6342 * We need the lock even it is age timeout,
6343 * since counter may still in process.
6345 rte_spinlock_lock(&age_info->aged_sl);
6346 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6347 rte_spinlock_unlock(&age_info->aged_sl);
6348 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6353 * Release a flow counter.
6356 * Pointer to the Ethernet device structure.
6357 * @param[in] counter
6358 * Index to the counter handler.
6361 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6363 struct mlx5_priv *priv = dev->data->dev_private;
6364 struct mlx5_flow_counter_pool *pool = NULL;
6365 struct mlx5_flow_counter *cnt;
6366 enum mlx5_counter_type cnt_type;
6370 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6372 if (pool->is_aged) {
6373 flow_dv_counter_remove_from_age(dev, counter, cnt);
6376 * If the counter action is shared by ID, the l3t_clear_entry
6377 * function reduces its references counter. If after the
6378 * reduction the action is still referenced, the function
6379 * returns here and does not release it.
6381 if (IS_LEGACY_SHARED_CNT(counter) &&
6382 mlx5_l3t_clear_entry(priv->sh->cnt_id_tbl,
6383 cnt->shared_info.id))
6386 * If the counter action is shared by indirect action API,
6387 * the atomic function reduces its references counter.
6388 * If after the reduction the action is still referenced, the
6389 * function returns here and does not release it.
6390 * When the counter action is not shared neither by ID nor by
6391 * indirect action API, shared info is 1 before the reduction,
6392 * so this condition is failed and function doesn't return here.
6394 if (!IS_LEGACY_SHARED_CNT(counter) &&
6395 __atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6401 * Put the counter back to list to be updated in none fallback mode.
6402 * Currently, we are using two list alternately, while one is in query,
6403 * add the freed counter to the other list based on the pool query_gen
6404 * value. After query finishes, add counter the list to the global
6405 * container counter list. The list changes while query starts. In
6406 * this case, lock will not be needed as query callback and release
6407 * function both operate with the different list.
6409 if (!priv->sh->cmng.counter_fallback) {
6410 rte_spinlock_lock(&pool->csl);
6411 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6412 rte_spinlock_unlock(&pool->csl);
6414 cnt->dcs_when_free = cnt->dcs_when_active;
6415 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6416 MLX5_COUNTER_TYPE_ORIGIN;
6417 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6418 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6420 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6425 * Resize a meter id container.
6428 * Pointer to the Ethernet device structure.
6431 * 0 on success, otherwise negative errno value and rte_errno is set.
6434 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6436 struct mlx5_priv *priv = dev->data->dev_private;
6437 struct mlx5_aso_mtr_pools_mng *pools_mng =
6438 &priv->sh->mtrmng->pools_mng;
6439 void *old_pools = pools_mng->pools;
6440 uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6441 uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6442 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6449 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6454 memcpy(pools, old_pools, pools_mng->n *
6455 sizeof(struct mlx5_aso_mtr_pool *));
6456 pools_mng->n = resize;
6457 pools_mng->pools = pools;
6459 mlx5_free(old_pools);
6464 * Prepare a new meter and/or a new meter pool.
6467 * Pointer to the Ethernet device structure.
6468 * @param[out] mtr_free
6469 * Where to put the pointer of a new meter.g.
6472 * The meter pool pointer and @mtr_free is set on success,
6473 * NULL otherwise and rte_errno is set.
6475 static struct mlx5_aso_mtr_pool *
6476 flow_dv_mtr_pool_create(struct rte_eth_dev *dev,
6477 struct mlx5_aso_mtr **mtr_free)
6479 struct mlx5_priv *priv = dev->data->dev_private;
6480 struct mlx5_aso_mtr_pools_mng *pools_mng =
6481 &priv->sh->mtrmng->pools_mng;
6482 struct mlx5_aso_mtr_pool *pool = NULL;
6483 struct mlx5_devx_obj *dcs = NULL;
6485 uint32_t log_obj_size;
6487 log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6488 dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->ctx,
6489 priv->sh->pdn, log_obj_size);
6491 rte_errno = ENODATA;
6494 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6497 claim_zero(mlx5_devx_cmd_destroy(dcs));
6500 pool->devx_obj = dcs;
6501 pool->index = pools_mng->n_valid;
6502 if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6504 claim_zero(mlx5_devx_cmd_destroy(dcs));
6507 pools_mng->pools[pool->index] = pool;
6508 pools_mng->n_valid++;
6509 for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6510 pool->mtrs[i].offset = i;
6511 LIST_INSERT_HEAD(&pools_mng->meters,
6512 &pool->mtrs[i], next);
6514 pool->mtrs[0].offset = 0;
6515 *mtr_free = &pool->mtrs[0];
6520 * Release a flow meter into pool.
6523 * Pointer to the Ethernet device structure.
6524 * @param[in] mtr_idx
6525 * Index to aso flow meter.
6528 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6530 struct mlx5_priv *priv = dev->data->dev_private;
6531 struct mlx5_aso_mtr_pools_mng *pools_mng =
6532 &priv->sh->mtrmng->pools_mng;
6533 struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6535 MLX5_ASSERT(aso_mtr);
6536 rte_spinlock_lock(&pools_mng->mtrsl);
6537 memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6538 aso_mtr->state = ASO_METER_FREE;
6539 LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6540 rte_spinlock_unlock(&pools_mng->mtrsl);
6544 * Allocate a aso flow meter.
6547 * Pointer to the Ethernet device structure.
6550 * Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6553 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6555 struct mlx5_priv *priv = dev->data->dev_private;
6556 struct mlx5_aso_mtr *mtr_free = NULL;
6557 struct mlx5_aso_mtr_pools_mng *pools_mng =
6558 &priv->sh->mtrmng->pools_mng;
6559 struct mlx5_aso_mtr_pool *pool;
6560 uint32_t mtr_idx = 0;
6562 if (!priv->config.devx) {
6563 rte_errno = ENOTSUP;
6566 /* Allocate the flow meter memory. */
6567 /* Get free meters from management. */
6568 rte_spinlock_lock(&pools_mng->mtrsl);
6569 mtr_free = LIST_FIRST(&pools_mng->meters);
6571 LIST_REMOVE(mtr_free, next);
6572 if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6573 rte_spinlock_unlock(&pools_mng->mtrsl);
6576 mtr_free->state = ASO_METER_WAIT;
6577 rte_spinlock_unlock(&pools_mng->mtrsl);
6578 pool = container_of(mtr_free,
6579 struct mlx5_aso_mtr_pool,
6580 mtrs[mtr_free->offset]);
6581 mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6582 if (!mtr_free->fm.meter_action) {
6583 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6584 struct rte_flow_error error;
6587 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6588 mtr_free->fm.meter_action =
6589 mlx5_glue->dv_create_flow_action_aso
6590 (priv->sh->rx_domain,
6591 pool->devx_obj->obj,
6593 (1 << MLX5_FLOW_COLOR_GREEN),
6595 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6596 if (!mtr_free->fm.meter_action) {
6597 flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6605 * Verify the @p attributes will be correctly understood by the NIC and store
6606 * them in the @p flow if everything is correct.
6609 * Pointer to dev struct.
6610 * @param[in] attributes
6611 * Pointer to flow attributes
6612 * @param[in] external
6613 * This flow rule is created by request external to PMD.
6615 * Pointer to error structure.
6618 * - 0 on success and non root table.
6619 * - 1 on success and root table.
6620 * - a negative errno value otherwise and rte_errno is set.
6623 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6624 const struct mlx5_flow_tunnel *tunnel,
6625 const struct rte_flow_attr *attributes,
6626 const struct flow_grp_info *grp_info,
6627 struct rte_flow_error *error)
6629 struct mlx5_priv *priv = dev->data->dev_private;
6630 uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6633 #ifndef HAVE_MLX5DV_DR
6634 RTE_SET_USED(tunnel);
6635 RTE_SET_USED(grp_info);
6636 if (attributes->group)
6637 return rte_flow_error_set(error, ENOTSUP,
6638 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6640 "groups are not supported");
6644 ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6649 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6651 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6652 attributes->priority > lowest_priority)
6653 return rte_flow_error_set(error, ENOTSUP,
6654 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6656 "priority out of range");
6657 if (attributes->transfer) {
6658 if (!priv->config.dv_esw_en)
6659 return rte_flow_error_set
6661 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6662 "E-Switch dr is not supported");
6663 if (!(priv->representor || priv->master))
6664 return rte_flow_error_set
6665 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6666 NULL, "E-Switch configuration can only be"
6667 " done by a master or a representor device");
6668 if (attributes->egress)
6669 return rte_flow_error_set
6671 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6672 "egress is not supported");
6674 if (!(attributes->egress ^ attributes->ingress))
6675 return rte_flow_error_set(error, ENOTSUP,
6676 RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6677 "must specify exactly one of "
6678 "ingress or egress");
6683 mlx5_flow_locate_proto_l3(const struct rte_flow_item **head,
6684 const struct rte_flow_item *end)
6686 const struct rte_flow_item *item = *head;
6687 uint16_t l3_protocol;
6689 for (; item != end; item++) {
6690 switch (item->type) {
6693 case RTE_FLOW_ITEM_TYPE_IPV4:
6694 l3_protocol = RTE_ETHER_TYPE_IPV4;
6696 case RTE_FLOW_ITEM_TYPE_IPV6:
6697 l3_protocol = RTE_ETHER_TYPE_IPV6;
6699 case RTE_FLOW_ITEM_TYPE_ETH:
6700 if (item->mask && item->spec) {
6701 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_eth,
6704 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6705 l3_protocol == RTE_ETHER_TYPE_IPV6)
6709 case RTE_FLOW_ITEM_TYPE_VLAN:
6710 if (item->mask && item->spec) {
6711 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_vlan,
6714 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6715 l3_protocol == RTE_ETHER_TYPE_IPV6)
6728 mlx5_flow_locate_proto_l4(const struct rte_flow_item **head,
6729 const struct rte_flow_item *end)
6731 const struct rte_flow_item *item = *head;
6732 uint8_t l4_protocol;
6734 for (; item != end; item++) {
6735 switch (item->type) {
6738 case RTE_FLOW_ITEM_TYPE_TCP:
6739 l4_protocol = IPPROTO_TCP;
6741 case RTE_FLOW_ITEM_TYPE_UDP:
6742 l4_protocol = IPPROTO_UDP;
6744 case RTE_FLOW_ITEM_TYPE_IPV4:
6745 if (item->mask && item->spec) {
6746 const struct rte_flow_item_ipv4 *mask, *spec;
6748 mask = (typeof(mask))item->mask;
6749 spec = (typeof(spec))item->spec;
6750 l4_protocol = mask->hdr.next_proto_id &
6751 spec->hdr.next_proto_id;
6752 if (l4_protocol == IPPROTO_TCP ||
6753 l4_protocol == IPPROTO_UDP)
6757 case RTE_FLOW_ITEM_TYPE_IPV6:
6758 if (item->mask && item->spec) {
6759 const struct rte_flow_item_ipv6 *mask, *spec;
6760 mask = (typeof(mask))item->mask;
6761 spec = (typeof(spec))item->spec;
6762 l4_protocol = mask->hdr.proto & spec->hdr.proto;
6763 if (l4_protocol == IPPROTO_TCP ||
6764 l4_protocol == IPPROTO_UDP)
6777 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6778 const struct rte_flow_item *rule_items,
6779 const struct rte_flow_item *integrity_item,
6780 struct rte_flow_error *error)
6782 struct mlx5_priv *priv = dev->data->dev_private;
6783 const struct rte_flow_item *tunnel_item, *end_item, *item = rule_items;
6784 const struct rte_flow_item_integrity *mask = (typeof(mask))
6785 integrity_item->mask;
6786 const struct rte_flow_item_integrity *spec = (typeof(spec))
6787 integrity_item->spec;
6790 if (!priv->config.hca_attr.pkt_integrity_match)
6791 return rte_flow_error_set(error, ENOTSUP,
6792 RTE_FLOW_ERROR_TYPE_ITEM,
6794 "packet integrity integrity_item not supported");
6796 mask = &rte_flow_item_integrity_mask;
6797 if (!mlx5_validate_integrity_item(mask))
6798 return rte_flow_error_set(error, ENOTSUP,
6799 RTE_FLOW_ERROR_TYPE_ITEM,
6801 "unsupported integrity filter");
6802 tunnel_item = mlx5_flow_find_tunnel_item(rule_items);
6803 if (spec->level > 1) {
6805 return rte_flow_error_set(error, ENOTSUP,
6806 RTE_FLOW_ERROR_TYPE_ITEM,
6808 "missing tunnel item");
6810 end_item = mlx5_find_end_item(tunnel_item);
6812 end_item = tunnel_item ? tunnel_item :
6813 mlx5_find_end_item(integrity_item);
6815 if (mask->l3_ok || mask->ipv4_csum_ok) {
6816 protocol = mlx5_flow_locate_proto_l3(&item, end_item);
6818 return rte_flow_error_set(error, EINVAL,
6819 RTE_FLOW_ERROR_TYPE_ITEM,
6821 "missing L3 protocol");
6823 if (mask->l4_ok || mask->l4_csum_ok) {
6824 protocol = mlx5_flow_locate_proto_l4(&item, end_item);
6826 return rte_flow_error_set(error, EINVAL,
6827 RTE_FLOW_ERROR_TYPE_ITEM,
6829 "missing L4 protocol");
6835 * Internal validation function. For validating both actions and items.
6838 * Pointer to the rte_eth_dev structure.
6840 * Pointer to the flow attributes.
6842 * Pointer to the list of items.
6843 * @param[in] actions
6844 * Pointer to the list of actions.
6845 * @param[in] external
6846 * This flow rule is created by request external to PMD.
6847 * @param[in] hairpin
6848 * Number of hairpin TX actions, 0 means classic flow.
6850 * Pointer to the error structure.
6853 * 0 on success, a negative errno value otherwise and rte_errno is set.
6856 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6857 const struct rte_flow_item items[],
6858 const struct rte_flow_action actions[],
6859 bool external, int hairpin, struct rte_flow_error *error)
6862 uint64_t action_flags = 0;
6863 uint64_t item_flags = 0;
6864 uint64_t last_item = 0;
6865 uint8_t next_protocol = 0xff;
6866 uint16_t ether_type = 0;
6868 uint8_t item_ipv6_proto = 0;
6869 int fdb_mirror_limit = 0;
6870 int modify_after_mirror = 0;
6871 const struct rte_flow_item *geneve_item = NULL;
6872 const struct rte_flow_item *gre_item = NULL;
6873 const struct rte_flow_item *gtp_item = NULL;
6874 const struct rte_flow_action_raw_decap *decap;
6875 const struct rte_flow_action_raw_encap *encap;
6876 const struct rte_flow_action_rss *rss = NULL;
6877 const struct rte_flow_action_rss *sample_rss = NULL;
6878 const struct rte_flow_action_count *sample_count = NULL;
6879 const struct rte_flow_item_tcp nic_tcp_mask = {
6882 .src_port = RTE_BE16(UINT16_MAX),
6883 .dst_port = RTE_BE16(UINT16_MAX),
6886 const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6889 "\xff\xff\xff\xff\xff\xff\xff\xff"
6890 "\xff\xff\xff\xff\xff\xff\xff\xff",
6892 "\xff\xff\xff\xff\xff\xff\xff\xff"
6893 "\xff\xff\xff\xff\xff\xff\xff\xff",
6894 .vtc_flow = RTE_BE32(0xffffffff),
6900 const struct rte_flow_item_ecpri nic_ecpri_mask = {
6904 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6908 .dummy[0] = 0xffffffff,
6911 struct mlx5_priv *priv = dev->data->dev_private;
6912 struct mlx5_dev_config *dev_conf = &priv->config;
6913 uint16_t queue_index = 0xFFFF;
6914 const struct rte_flow_item_vlan *vlan_m = NULL;
6915 uint32_t rw_act_num = 0;
6917 const struct mlx5_flow_tunnel *tunnel;
6918 enum mlx5_tof_rule_type tof_rule_type;
6919 struct flow_grp_info grp_info = {
6920 .external = !!external,
6921 .transfer = !!attr->transfer,
6922 .fdb_def_rule = !!priv->fdb_def_rule,
6923 .std_tbl_fix = true,
6925 const struct rte_eth_hairpin_conf *conf;
6926 const struct rte_flow_item *rule_items = items;
6927 const struct rte_flow_item *port_id_item = NULL;
6928 bool def_policy = false;
6932 tunnel = is_tunnel_offload_active(dev) ?
6933 mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6935 if (priv->representor)
6936 return rte_flow_error_set
6938 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6939 NULL, "decap not supported for VF representor");
6940 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6941 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6942 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6943 action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6944 MLX5_FLOW_ACTION_DECAP;
6945 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6946 (dev, attr, tunnel, tof_rule_type);
6948 ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6951 is_root = (uint64_t)ret;
6952 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6953 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6954 int type = items->type;
6956 if (!mlx5_flow_os_item_supported(type))
6957 return rte_flow_error_set(error, ENOTSUP,
6958 RTE_FLOW_ERROR_TYPE_ITEM,
6959 NULL, "item not supported");
6961 case RTE_FLOW_ITEM_TYPE_VOID:
6963 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6964 ret = flow_dv_validate_item_port_id
6965 (dev, items, attr, item_flags, error);
6968 last_item = MLX5_FLOW_ITEM_PORT_ID;
6969 port_id_item = items;
6971 case RTE_FLOW_ITEM_TYPE_ETH:
6972 ret = mlx5_flow_validate_item_eth(items, item_flags,
6976 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6977 MLX5_FLOW_LAYER_OUTER_L2;
6978 if (items->mask != NULL && items->spec != NULL) {
6980 ((const struct rte_flow_item_eth *)
6983 ((const struct rte_flow_item_eth *)
6985 ether_type = rte_be_to_cpu_16(ether_type);
6990 case RTE_FLOW_ITEM_TYPE_VLAN:
6991 ret = flow_dv_validate_item_vlan(items, item_flags,
6995 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6996 MLX5_FLOW_LAYER_OUTER_VLAN;
6997 if (items->mask != NULL && items->spec != NULL) {
6999 ((const struct rte_flow_item_vlan *)
7000 items->spec)->inner_type;
7002 ((const struct rte_flow_item_vlan *)
7003 items->mask)->inner_type;
7004 ether_type = rte_be_to_cpu_16(ether_type);
7008 /* Store outer VLAN mask for of_push_vlan action. */
7010 vlan_m = items->mask;
7012 case RTE_FLOW_ITEM_TYPE_IPV4:
7013 mlx5_flow_tunnel_ip_check(items, next_protocol,
7014 &item_flags, &tunnel);
7015 ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
7016 last_item, ether_type,
7020 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7021 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7022 if (items->mask != NULL &&
7023 ((const struct rte_flow_item_ipv4 *)
7024 items->mask)->hdr.next_proto_id) {
7026 ((const struct rte_flow_item_ipv4 *)
7027 (items->spec))->hdr.next_proto_id;
7029 ((const struct rte_flow_item_ipv4 *)
7030 (items->mask))->hdr.next_proto_id;
7032 /* Reset for inner layer. */
7033 next_protocol = 0xff;
7036 case RTE_FLOW_ITEM_TYPE_IPV6:
7037 mlx5_flow_tunnel_ip_check(items, next_protocol,
7038 &item_flags, &tunnel);
7039 ret = mlx5_flow_validate_item_ipv6(items, item_flags,
7046 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7047 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7048 if (items->mask != NULL &&
7049 ((const struct rte_flow_item_ipv6 *)
7050 items->mask)->hdr.proto) {
7052 ((const struct rte_flow_item_ipv6 *)
7053 items->spec)->hdr.proto;
7055 ((const struct rte_flow_item_ipv6 *)
7056 items->spec)->hdr.proto;
7058 ((const struct rte_flow_item_ipv6 *)
7059 items->mask)->hdr.proto;
7061 /* Reset for inner layer. */
7062 next_protocol = 0xff;
7065 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
7066 ret = flow_dv_validate_item_ipv6_frag_ext(items,
7071 last_item = tunnel ?
7072 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
7073 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
7074 if (items->mask != NULL &&
7075 ((const struct rte_flow_item_ipv6_frag_ext *)
7076 items->mask)->hdr.next_header) {
7078 ((const struct rte_flow_item_ipv6_frag_ext *)
7079 items->spec)->hdr.next_header;
7081 ((const struct rte_flow_item_ipv6_frag_ext *)
7082 items->mask)->hdr.next_header;
7084 /* Reset for inner layer. */
7085 next_protocol = 0xff;
7088 case RTE_FLOW_ITEM_TYPE_TCP:
7089 ret = mlx5_flow_validate_item_tcp
7096 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7097 MLX5_FLOW_LAYER_OUTER_L4_TCP;
7099 case RTE_FLOW_ITEM_TYPE_UDP:
7100 ret = mlx5_flow_validate_item_udp(items, item_flags,
7105 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7106 MLX5_FLOW_LAYER_OUTER_L4_UDP;
7108 case RTE_FLOW_ITEM_TYPE_GRE:
7109 ret = mlx5_flow_validate_item_gre(items, item_flags,
7110 next_protocol, error);
7114 last_item = MLX5_FLOW_LAYER_GRE;
7116 case RTE_FLOW_ITEM_TYPE_NVGRE:
7117 ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7122 last_item = MLX5_FLOW_LAYER_NVGRE;
7124 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7125 ret = mlx5_flow_validate_item_gre_key
7126 (items, item_flags, gre_item, error);
7129 last_item = MLX5_FLOW_LAYER_GRE_KEY;
7131 case RTE_FLOW_ITEM_TYPE_VXLAN:
7132 ret = mlx5_flow_validate_item_vxlan(dev, items,
7137 last_item = MLX5_FLOW_LAYER_VXLAN;
7139 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7140 ret = mlx5_flow_validate_item_vxlan_gpe(items,
7145 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7147 case RTE_FLOW_ITEM_TYPE_GENEVE:
7148 ret = mlx5_flow_validate_item_geneve(items,
7153 geneve_item = items;
7154 last_item = MLX5_FLOW_LAYER_GENEVE;
7156 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7157 ret = mlx5_flow_validate_item_geneve_opt(items,
7164 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7166 case RTE_FLOW_ITEM_TYPE_MPLS:
7167 ret = mlx5_flow_validate_item_mpls(dev, items,
7172 last_item = MLX5_FLOW_LAYER_MPLS;
7175 case RTE_FLOW_ITEM_TYPE_MARK:
7176 ret = flow_dv_validate_item_mark(dev, items, attr,
7180 last_item = MLX5_FLOW_ITEM_MARK;
7182 case RTE_FLOW_ITEM_TYPE_META:
7183 ret = flow_dv_validate_item_meta(dev, items, attr,
7187 last_item = MLX5_FLOW_ITEM_METADATA;
7189 case RTE_FLOW_ITEM_TYPE_ICMP:
7190 ret = mlx5_flow_validate_item_icmp(items, item_flags,
7195 last_item = MLX5_FLOW_LAYER_ICMP;
7197 case RTE_FLOW_ITEM_TYPE_ICMP6:
7198 ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7203 item_ipv6_proto = IPPROTO_ICMPV6;
7204 last_item = MLX5_FLOW_LAYER_ICMP6;
7206 case RTE_FLOW_ITEM_TYPE_TAG:
7207 ret = flow_dv_validate_item_tag(dev, items,
7211 last_item = MLX5_FLOW_ITEM_TAG;
7213 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7214 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7216 case RTE_FLOW_ITEM_TYPE_GTP:
7217 ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7222 last_item = MLX5_FLOW_LAYER_GTP;
7224 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7225 ret = flow_dv_validate_item_gtp_psc(items, last_item,
7230 last_item = MLX5_FLOW_LAYER_GTP_PSC;
7232 case RTE_FLOW_ITEM_TYPE_ECPRI:
7233 /* Capacity will be checked in the translate stage. */
7234 ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7241 last_item = MLX5_FLOW_LAYER_ECPRI;
7243 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7244 if (item_flags & MLX5_FLOW_ITEM_INTEGRITY)
7245 return rte_flow_error_set
7247 RTE_FLOW_ERROR_TYPE_ITEM,
7248 NULL, "multiple integrity items not supported");
7249 ret = flow_dv_validate_item_integrity(dev, rule_items,
7253 last_item = MLX5_FLOW_ITEM_INTEGRITY;
7255 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7256 ret = flow_dv_validate_item_aso_ct(dev, items,
7257 &item_flags, error);
7261 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7262 /* tunnel offload item was processed before
7263 * list it here as a supported type
7267 return rte_flow_error_set(error, ENOTSUP,
7268 RTE_FLOW_ERROR_TYPE_ITEM,
7269 NULL, "item not supported");
7271 item_flags |= last_item;
7273 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7274 int type = actions->type;
7275 bool shared_count = false;
7277 if (!mlx5_flow_os_action_supported(type))
7278 return rte_flow_error_set(error, ENOTSUP,
7279 RTE_FLOW_ERROR_TYPE_ACTION,
7281 "action not supported");
7282 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7283 return rte_flow_error_set(error, ENOTSUP,
7284 RTE_FLOW_ERROR_TYPE_ACTION,
7285 actions, "too many actions");
7287 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7288 return rte_flow_error_set(error, ENOTSUP,
7289 RTE_FLOW_ERROR_TYPE_ACTION,
7290 NULL, "meter action with policy "
7291 "must be the last action");
7293 case RTE_FLOW_ACTION_TYPE_VOID:
7295 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7296 ret = flow_dv_validate_action_port_id(dev,
7303 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7306 case RTE_FLOW_ACTION_TYPE_FLAG:
7307 ret = flow_dv_validate_action_flag(dev, action_flags,
7311 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7312 /* Count all modify-header actions as one. */
7313 if (!(action_flags &
7314 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7316 action_flags |= MLX5_FLOW_ACTION_FLAG |
7317 MLX5_FLOW_ACTION_MARK_EXT;
7318 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7319 modify_after_mirror = 1;
7322 action_flags |= MLX5_FLOW_ACTION_FLAG;
7325 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7327 case RTE_FLOW_ACTION_TYPE_MARK:
7328 ret = flow_dv_validate_action_mark(dev, actions,
7333 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7334 /* Count all modify-header actions as one. */
7335 if (!(action_flags &
7336 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7338 action_flags |= MLX5_FLOW_ACTION_MARK |
7339 MLX5_FLOW_ACTION_MARK_EXT;
7340 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7341 modify_after_mirror = 1;
7343 action_flags |= MLX5_FLOW_ACTION_MARK;
7346 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7348 case RTE_FLOW_ACTION_TYPE_SET_META:
7349 ret = flow_dv_validate_action_set_meta(dev, actions,
7354 /* Count all modify-header actions as one action. */
7355 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7357 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7358 modify_after_mirror = 1;
7359 action_flags |= MLX5_FLOW_ACTION_SET_META;
7360 rw_act_num += MLX5_ACT_NUM_SET_META;
7362 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7363 ret = flow_dv_validate_action_set_tag(dev, actions,
7368 /* Count all modify-header actions as one action. */
7369 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7371 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7372 modify_after_mirror = 1;
7373 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7374 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7376 case RTE_FLOW_ACTION_TYPE_DROP:
7377 ret = mlx5_flow_validate_action_drop(action_flags,
7381 action_flags |= MLX5_FLOW_ACTION_DROP;
7384 case RTE_FLOW_ACTION_TYPE_QUEUE:
7385 ret = mlx5_flow_validate_action_queue(actions,
7390 queue_index = ((const struct rte_flow_action_queue *)
7391 (actions->conf))->index;
7392 action_flags |= MLX5_FLOW_ACTION_QUEUE;
7395 case RTE_FLOW_ACTION_TYPE_RSS:
7396 rss = actions->conf;
7397 ret = mlx5_flow_validate_action_rss(actions,
7403 if (rss && sample_rss &&
7404 (sample_rss->level != rss->level ||
7405 sample_rss->types != rss->types))
7406 return rte_flow_error_set(error, ENOTSUP,
7407 RTE_FLOW_ERROR_TYPE_ACTION,
7409 "Can't use the different RSS types "
7410 "or level in the same flow");
7411 if (rss != NULL && rss->queue_num)
7412 queue_index = rss->queue[0];
7413 action_flags |= MLX5_FLOW_ACTION_RSS;
7416 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7418 mlx5_flow_validate_action_default_miss(action_flags,
7422 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7425 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7426 case RTE_FLOW_ACTION_TYPE_COUNT:
7427 shared_count = is_shared_action_count(actions);
7428 ret = flow_dv_validate_action_count(dev, shared_count,
7433 action_flags |= MLX5_FLOW_ACTION_COUNT;
7436 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7437 if (flow_dv_validate_action_pop_vlan(dev,
7443 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7444 modify_after_mirror = 1;
7445 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7448 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7449 ret = flow_dv_validate_action_push_vlan(dev,
7456 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7457 modify_after_mirror = 1;
7458 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7461 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7462 ret = flow_dv_validate_action_set_vlan_pcp
7463 (action_flags, actions, error);
7466 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7467 modify_after_mirror = 1;
7468 /* Count PCP with push_vlan command. */
7469 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7471 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7472 ret = flow_dv_validate_action_set_vlan_vid
7473 (item_flags, action_flags,
7477 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7478 modify_after_mirror = 1;
7479 /* Count VID with push_vlan command. */
7480 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7481 rw_act_num += MLX5_ACT_NUM_MDF_VID;
7483 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7484 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7485 ret = flow_dv_validate_action_l2_encap(dev,
7491 action_flags |= MLX5_FLOW_ACTION_ENCAP;
7494 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7495 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7496 ret = flow_dv_validate_action_decap(dev, action_flags,
7497 actions, item_flags,
7501 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7502 modify_after_mirror = 1;
7503 action_flags |= MLX5_FLOW_ACTION_DECAP;
7506 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7507 ret = flow_dv_validate_action_raw_encap_decap
7508 (dev, NULL, actions->conf, attr, &action_flags,
7509 &actions_n, actions, item_flags, error);
7513 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7514 decap = actions->conf;
7515 while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7517 if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7521 encap = actions->conf;
7523 ret = flow_dv_validate_action_raw_encap_decap
7525 decap ? decap : &empty_decap, encap,
7526 attr, &action_flags, &actions_n,
7527 actions, item_flags, error);
7530 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7531 (action_flags & MLX5_FLOW_ACTION_DECAP))
7532 modify_after_mirror = 1;
7534 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7535 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7536 ret = flow_dv_validate_action_modify_mac(action_flags,
7542 /* Count all modify-header actions as one action. */
7543 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7545 action_flags |= actions->type ==
7546 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7547 MLX5_FLOW_ACTION_SET_MAC_SRC :
7548 MLX5_FLOW_ACTION_SET_MAC_DST;
7549 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7550 modify_after_mirror = 1;
7552 * Even if the source and destination MAC addresses have
7553 * overlap in the header with 4B alignment, the convert
7554 * function will handle them separately and 4 SW actions
7555 * will be created. And 2 actions will be added each
7556 * time no matter how many bytes of address will be set.
7558 rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7560 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7561 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7562 ret = flow_dv_validate_action_modify_ipv4(action_flags,
7568 /* Count all modify-header actions as one action. */
7569 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7571 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7572 modify_after_mirror = 1;
7573 action_flags |= actions->type ==
7574 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7575 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7576 MLX5_FLOW_ACTION_SET_IPV4_DST;
7577 rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7579 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7580 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7581 ret = flow_dv_validate_action_modify_ipv6(action_flags,
7587 if (item_ipv6_proto == IPPROTO_ICMPV6)
7588 return rte_flow_error_set(error, ENOTSUP,
7589 RTE_FLOW_ERROR_TYPE_ACTION,
7591 "Can't change header "
7592 "with ICMPv6 proto");
7593 /* Count all modify-header actions as one action. */
7594 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7596 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7597 modify_after_mirror = 1;
7598 action_flags |= actions->type ==
7599 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7600 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7601 MLX5_FLOW_ACTION_SET_IPV6_DST;
7602 rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7604 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7605 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7606 ret = flow_dv_validate_action_modify_tp(action_flags,
7612 /* Count all modify-header actions as one action. */
7613 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7615 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7616 modify_after_mirror = 1;
7617 action_flags |= actions->type ==
7618 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7619 MLX5_FLOW_ACTION_SET_TP_SRC :
7620 MLX5_FLOW_ACTION_SET_TP_DST;
7621 rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7623 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7624 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7625 ret = flow_dv_validate_action_modify_ttl(action_flags,
7631 /* Count all modify-header actions as one action. */
7632 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7634 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7635 modify_after_mirror = 1;
7636 action_flags |= actions->type ==
7637 RTE_FLOW_ACTION_TYPE_SET_TTL ?
7638 MLX5_FLOW_ACTION_SET_TTL :
7639 MLX5_FLOW_ACTION_DEC_TTL;
7640 rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7642 case RTE_FLOW_ACTION_TYPE_JUMP:
7643 ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7649 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7651 return rte_flow_error_set(error, EINVAL,
7652 RTE_FLOW_ERROR_TYPE_ACTION,
7654 "sample and jump action combination is not supported");
7656 action_flags |= MLX5_FLOW_ACTION_JUMP;
7658 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7659 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7660 ret = flow_dv_validate_action_modify_tcp_seq
7667 /* Count all modify-header actions as one action. */
7668 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7670 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7671 modify_after_mirror = 1;
7672 action_flags |= actions->type ==
7673 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7674 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7675 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7676 rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7678 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7679 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7680 ret = flow_dv_validate_action_modify_tcp_ack
7687 /* Count all modify-header actions as one action. */
7688 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7690 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7691 modify_after_mirror = 1;
7692 action_flags |= actions->type ==
7693 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7694 MLX5_FLOW_ACTION_INC_TCP_ACK :
7695 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7696 rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7698 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7700 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7701 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7702 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7704 case RTE_FLOW_ACTION_TYPE_METER:
7705 ret = mlx5_flow_validate_action_meter(dev,
7713 action_flags |= MLX5_FLOW_ACTION_METER;
7716 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7718 /* Meter action will add one more TAG action. */
7719 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7721 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7722 if (!attr->transfer && !attr->group)
7723 return rte_flow_error_set(error, ENOTSUP,
7724 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7726 "Shared ASO age action is not supported for group 0");
7727 if (action_flags & MLX5_FLOW_ACTION_AGE)
7728 return rte_flow_error_set
7730 RTE_FLOW_ERROR_TYPE_ACTION,
7732 "duplicate age actions set");
7733 action_flags |= MLX5_FLOW_ACTION_AGE;
7736 case RTE_FLOW_ACTION_TYPE_AGE:
7737 ret = flow_dv_validate_action_age(action_flags,
7743 * Validate the regular AGE action (using counter)
7744 * mutual exclusion with share counter actions.
7746 if (!priv->sh->flow_hit_aso_en) {
7748 return rte_flow_error_set
7750 RTE_FLOW_ERROR_TYPE_ACTION,
7752 "old age and shared count combination is not supported");
7754 return rte_flow_error_set
7756 RTE_FLOW_ERROR_TYPE_ACTION,
7758 "old age action and count must be in the same sub flow");
7760 action_flags |= MLX5_FLOW_ACTION_AGE;
7763 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7764 ret = flow_dv_validate_action_modify_ipv4_dscp
7771 /* Count all modify-header actions as one action. */
7772 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7774 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7775 modify_after_mirror = 1;
7776 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7777 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7779 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7780 ret = flow_dv_validate_action_modify_ipv6_dscp
7787 /* Count all modify-header actions as one action. */
7788 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7790 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7791 modify_after_mirror = 1;
7792 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7793 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7795 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7796 ret = flow_dv_validate_action_sample(&action_flags,
7805 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7808 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7809 ret = flow_dv_validate_action_modify_field(dev,
7816 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7817 modify_after_mirror = 1;
7818 /* Count all modify-header actions as one action. */
7819 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7821 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7824 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7825 ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7830 action_flags |= MLX5_FLOW_ACTION_CT;
7832 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7833 /* tunnel offload action was processed before
7834 * list it here as a supported type
7838 return rte_flow_error_set(error, ENOTSUP,
7839 RTE_FLOW_ERROR_TYPE_ACTION,
7841 "action not supported");
7845 * Validate actions in flow rules
7846 * - Explicit decap action is prohibited by the tunnel offload API.
7847 * - Drop action in tunnel steer rule is prohibited by the API.
7848 * - Application cannot use MARK action because it's value can mask
7849 * tunnel default miss nitification.
7850 * - JUMP in tunnel match rule has no support in current PMD
7852 * - TAG & META are reserved for future uses.
7854 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7855 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP |
7856 MLX5_FLOW_ACTION_MARK |
7857 MLX5_FLOW_ACTION_SET_TAG |
7858 MLX5_FLOW_ACTION_SET_META |
7859 MLX5_FLOW_ACTION_DROP;
7861 if (action_flags & bad_actions_mask)
7862 return rte_flow_error_set
7864 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7865 "Invalid RTE action in tunnel "
7867 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7868 return rte_flow_error_set
7870 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7871 "tunnel set decap rule must terminate "
7874 return rte_flow_error_set
7876 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7877 "tunnel flows for ingress traffic only");
7879 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7880 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP |
7881 MLX5_FLOW_ACTION_MARK |
7882 MLX5_FLOW_ACTION_SET_TAG |
7883 MLX5_FLOW_ACTION_SET_META;
7885 if (action_flags & bad_actions_mask)
7886 return rte_flow_error_set
7888 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7889 "Invalid RTE action in tunnel "
7893 * Validate the drop action mutual exclusion with other actions.
7894 * Drop action is mutually-exclusive with any other action, except for
7896 * Drop action compatibility with tunnel offload was already validated.
7898 if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7899 MLX5_FLOW_ACTION_TUNNEL_MATCH));
7900 else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7901 (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7902 return rte_flow_error_set(error, EINVAL,
7903 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7904 "Drop action is mutually-exclusive "
7905 "with any other action, except for "
7907 /* Eswitch has few restrictions on using items and actions */
7908 if (attr->transfer) {
7909 if (!mlx5_flow_ext_mreg_supported(dev) &&
7910 action_flags & MLX5_FLOW_ACTION_FLAG)
7911 return rte_flow_error_set(error, ENOTSUP,
7912 RTE_FLOW_ERROR_TYPE_ACTION,
7914 "unsupported action FLAG");
7915 if (!mlx5_flow_ext_mreg_supported(dev) &&
7916 action_flags & MLX5_FLOW_ACTION_MARK)
7917 return rte_flow_error_set(error, ENOTSUP,
7918 RTE_FLOW_ERROR_TYPE_ACTION,
7920 "unsupported action MARK");
7921 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7922 return rte_flow_error_set(error, ENOTSUP,
7923 RTE_FLOW_ERROR_TYPE_ACTION,
7925 "unsupported action QUEUE");
7926 if (action_flags & MLX5_FLOW_ACTION_RSS)
7927 return rte_flow_error_set(error, ENOTSUP,
7928 RTE_FLOW_ERROR_TYPE_ACTION,
7930 "unsupported action RSS");
7931 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7932 return rte_flow_error_set(error, EINVAL,
7933 RTE_FLOW_ERROR_TYPE_ACTION,
7935 "no fate action is found");
7937 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7938 return rte_flow_error_set(error, EINVAL,
7939 RTE_FLOW_ERROR_TYPE_ACTION,
7941 "no fate action is found");
7944 * Continue validation for Xcap and VLAN actions.
7945 * If hairpin is working in explicit TX rule mode, there is no actions
7946 * splitting and the validation of hairpin ingress flow should be the
7947 * same as other standard flows.
7949 if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7950 MLX5_FLOW_VLAN_ACTIONS)) &&
7951 (queue_index == 0xFFFF ||
7952 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7953 ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7954 conf->tx_explicit != 0))) {
7955 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7956 MLX5_FLOW_XCAP_ACTIONS)
7957 return rte_flow_error_set(error, ENOTSUP,
7958 RTE_FLOW_ERROR_TYPE_ACTION,
7959 NULL, "encap and decap "
7960 "combination aren't supported");
7961 if (!attr->transfer && attr->ingress) {
7962 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7963 return rte_flow_error_set
7965 RTE_FLOW_ERROR_TYPE_ACTION,
7966 NULL, "encap is not supported"
7967 " for ingress traffic");
7968 else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7969 return rte_flow_error_set
7971 RTE_FLOW_ERROR_TYPE_ACTION,
7972 NULL, "push VLAN action not "
7973 "supported for ingress");
7974 else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7975 MLX5_FLOW_VLAN_ACTIONS)
7976 return rte_flow_error_set
7978 RTE_FLOW_ERROR_TYPE_ACTION,
7979 NULL, "no support for "
7980 "multiple VLAN actions");
7983 if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7984 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7985 ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7987 return rte_flow_error_set
7989 RTE_FLOW_ERROR_TYPE_ACTION,
7990 NULL, "fate action not supported for "
7991 "meter with policy");
7993 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7994 return rte_flow_error_set
7996 RTE_FLOW_ERROR_TYPE_ACTION,
7997 NULL, "modify header action in egress "
7998 "cannot be done before meter action");
7999 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
8000 return rte_flow_error_set
8002 RTE_FLOW_ERROR_TYPE_ACTION,
8003 NULL, "encap action in egress "
8004 "cannot be done before meter action");
8005 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
8006 return rte_flow_error_set
8008 RTE_FLOW_ERROR_TYPE_ACTION,
8009 NULL, "push vlan action in egress "
8010 "cannot be done before meter action");
8014 * Hairpin flow will add one more TAG action in TX implicit mode.
8015 * In TX explicit mode, there will be no hairpin flow ID.
8018 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8019 /* extra metadata enabled: one more TAG action will be add. */
8020 if (dev_conf->dv_flow_en &&
8021 dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
8022 mlx5_flow_ext_mreg_supported(dev))
8023 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8025 flow_dv_modify_hdr_action_max(dev, is_root)) {
8026 return rte_flow_error_set(error, ENOTSUP,
8027 RTE_FLOW_ERROR_TYPE_ACTION,
8028 NULL, "too many header modify"
8029 " actions to support");
8031 /* Eswitch egress mirror and modify flow has limitation on CX5 */
8032 if (fdb_mirror_limit && modify_after_mirror)
8033 return rte_flow_error_set(error, EINVAL,
8034 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8035 "sample before modify action is not supported");
8040 * Internal preparation function. Allocates the DV flow size,
8041 * this size is constant.
8044 * Pointer to the rte_eth_dev structure.
8046 * Pointer to the flow attributes.
8048 * Pointer to the list of items.
8049 * @param[in] actions
8050 * Pointer to the list of actions.
8052 * Pointer to the error structure.
8055 * Pointer to mlx5_flow object on success,
8056 * otherwise NULL and rte_errno is set.
8058 static struct mlx5_flow *
8059 flow_dv_prepare(struct rte_eth_dev *dev,
8060 const struct rte_flow_attr *attr __rte_unused,
8061 const struct rte_flow_item items[] __rte_unused,
8062 const struct rte_flow_action actions[] __rte_unused,
8063 struct rte_flow_error *error)
8065 uint32_t handle_idx = 0;
8066 struct mlx5_flow *dev_flow;
8067 struct mlx5_flow_handle *dev_handle;
8068 struct mlx5_priv *priv = dev->data->dev_private;
8069 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8072 wks->skip_matcher_reg = 0;
8074 wks->final_policy = NULL;
8075 /* In case of corrupting the memory. */
8076 if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8077 rte_flow_error_set(error, ENOSPC,
8078 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8079 "not free temporary device flow");
8082 dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8085 rte_flow_error_set(error, ENOMEM,
8086 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8087 "not enough memory to create flow handle");
8090 MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8091 dev_flow = &wks->flows[wks->flow_idx++];
8092 memset(dev_flow, 0, sizeof(*dev_flow));
8093 dev_flow->handle = dev_handle;
8094 dev_flow->handle_idx = handle_idx;
8095 dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8096 dev_flow->ingress = attr->ingress;
8097 dev_flow->dv.transfer = attr->transfer;
8101 #ifdef RTE_LIBRTE_MLX5_DEBUG
8103 * Sanity check for match mask and value. Similar to check_valid_spec() in
8104 * kernel driver. If unmasked bit is present in value, it returns failure.
8107 * pointer to match mask buffer.
8108 * @param match_value
8109 * pointer to match value buffer.
8112 * 0 if valid, -EINVAL otherwise.
8115 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8117 uint8_t *m = match_mask;
8118 uint8_t *v = match_value;
8121 for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8124 "match_value differs from match_criteria"
8125 " %p[%u] != %p[%u]",
8126 match_value, i, match_mask, i);
8135 * Add match of ip_version.
8139 * @param[in] headers_v
8140 * Values header pointer.
8141 * @param[in] headers_m
8142 * Masks header pointer.
8143 * @param[in] ip_version
8144 * The IP version to set.
8147 flow_dv_set_match_ip_version(uint32_t group,
8153 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8155 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8157 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8158 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8159 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8163 * Add Ethernet item to matcher and to the value.
8165 * @param[in, out] matcher
8167 * @param[in, out] key
8168 * Flow matcher value.
8170 * Flow pattern to translate.
8172 * Item is inner pattern.
8175 flow_dv_translate_item_eth(void *matcher, void *key,
8176 const struct rte_flow_item *item, int inner,
8179 const struct rte_flow_item_eth *eth_m = item->mask;
8180 const struct rte_flow_item_eth *eth_v = item->spec;
8181 const struct rte_flow_item_eth nic_mask = {
8182 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8183 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8184 .type = RTE_BE16(0xffff),
8197 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8199 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8201 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8203 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8205 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8206 ð_m->dst, sizeof(eth_m->dst));
8207 /* The value must be in the range of the mask. */
8208 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8209 for (i = 0; i < sizeof(eth_m->dst); ++i)
8210 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8211 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8212 ð_m->src, sizeof(eth_m->src));
8213 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8214 /* The value must be in the range of the mask. */
8215 for (i = 0; i < sizeof(eth_m->dst); ++i)
8216 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8218 * HW supports match on one Ethertype, the Ethertype following the last
8219 * VLAN tag of the packet (see PRM).
8220 * Set match on ethertype only if ETH header is not followed by VLAN.
8221 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8222 * ethertype, and use ip_version field instead.
8223 * eCPRI over Ether layer will use type value 0xAEFE.
8225 if (eth_m->type == 0xFFFF) {
8226 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8227 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8228 switch (eth_v->type) {
8229 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8230 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8232 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8233 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8234 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8236 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8237 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8239 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8240 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8246 if (eth_m->has_vlan) {
8247 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8248 if (eth_v->has_vlan) {
8250 * Here, when also has_more_vlan field in VLAN item is
8251 * not set, only single-tagged packets will be matched.
8253 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8257 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8258 rte_be_to_cpu_16(eth_m->type));
8259 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8260 *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8264 * Add VLAN item to matcher and to the value.
8266 * @param[in, out] dev_flow
8268 * @param[in, out] matcher
8270 * @param[in, out] key
8271 * Flow matcher value.
8273 * Flow pattern to translate.
8275 * Item is inner pattern.
8278 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8279 void *matcher, void *key,
8280 const struct rte_flow_item *item,
8281 int inner, uint32_t group)
8283 const struct rte_flow_item_vlan *vlan_m = item->mask;
8284 const struct rte_flow_item_vlan *vlan_v = item->spec;
8291 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8293 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8295 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8297 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8299 * This is workaround, masks are not supported,
8300 * and pre-validated.
8303 dev_flow->handle->vf_vlan.tag =
8304 rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8307 * When VLAN item exists in flow, mark packet as tagged,
8308 * even if TCI is not specified.
8310 if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8311 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8312 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8317 vlan_m = &rte_flow_item_vlan_mask;
8318 tci_m = rte_be_to_cpu_16(vlan_m->tci);
8319 tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8320 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8321 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8322 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8323 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8324 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8325 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8327 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8328 * ethertype, and use ip_version field instead.
8330 if (vlan_m->inner_type == 0xFFFF) {
8331 switch (vlan_v->inner_type) {
8332 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8333 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8334 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8335 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8337 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8338 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8340 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8341 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8347 if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8348 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8349 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8350 /* Only one vlan_tag bit can be set. */
8351 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8354 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8355 rte_be_to_cpu_16(vlan_m->inner_type));
8356 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8357 rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8361 * Add IPV4 item to matcher and to the value.
8363 * @param[in, out] matcher
8365 * @param[in, out] key
8366 * Flow matcher value.
8368 * Flow pattern to translate.
8370 * Item is inner pattern.
8372 * The group to insert the rule.
8375 flow_dv_translate_item_ipv4(void *matcher, void *key,
8376 const struct rte_flow_item *item,
8377 int inner, uint32_t group)
8379 const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8380 const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8381 const struct rte_flow_item_ipv4 nic_mask = {
8383 .src_addr = RTE_BE32(0xffffffff),
8384 .dst_addr = RTE_BE32(0xffffffff),
8385 .type_of_service = 0xff,
8386 .next_proto_id = 0xff,
8387 .time_to_live = 0xff,
8394 uint8_t tos, ihl_m, ihl_v;
8397 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8399 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8401 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8403 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8405 flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8410 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8411 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8412 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8413 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8414 *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8415 *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8416 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8417 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8418 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8419 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8420 *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8421 *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8422 tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8423 ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8424 ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8425 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8426 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8427 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8428 ipv4_m->hdr.type_of_service);
8429 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8430 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8431 ipv4_m->hdr.type_of_service >> 2);
8432 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8433 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8434 ipv4_m->hdr.next_proto_id);
8435 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8436 ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8437 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8438 ipv4_m->hdr.time_to_live);
8439 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8440 ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8441 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8442 !!(ipv4_m->hdr.fragment_offset));
8443 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8444 !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8448 * Add IPV6 item to matcher and to the value.
8450 * @param[in, out] matcher
8452 * @param[in, out] key
8453 * Flow matcher value.
8455 * Flow pattern to translate.
8457 * Item is inner pattern.
8459 * The group to insert the rule.
8462 flow_dv_translate_item_ipv6(void *matcher, void *key,
8463 const struct rte_flow_item *item,
8464 int inner, uint32_t group)
8466 const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8467 const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8468 const struct rte_flow_item_ipv6 nic_mask = {
8471 "\xff\xff\xff\xff\xff\xff\xff\xff"
8472 "\xff\xff\xff\xff\xff\xff\xff\xff",
8474 "\xff\xff\xff\xff\xff\xff\xff\xff"
8475 "\xff\xff\xff\xff\xff\xff\xff\xff",
8476 .vtc_flow = RTE_BE32(0xffffffff),
8483 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8484 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8493 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8495 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8497 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8499 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8501 flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8506 size = sizeof(ipv6_m->hdr.dst_addr);
8507 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8508 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8509 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8510 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8511 memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8512 for (i = 0; i < size; ++i)
8513 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8514 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8515 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8516 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8517 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8518 memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8519 for (i = 0; i < size; ++i)
8520 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8522 vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8523 vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8524 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8525 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8526 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8527 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8530 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8532 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8535 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8537 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8541 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8543 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8544 ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8546 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8547 ipv6_m->hdr.hop_limits);
8548 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8549 ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8550 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8551 !!(ipv6_m->has_frag_ext));
8552 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8553 !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8557 * Add IPV6 fragment extension item to matcher and to the value.
8559 * @param[in, out] matcher
8561 * @param[in, out] key
8562 * Flow matcher value.
8564 * Flow pattern to translate.
8566 * Item is inner pattern.
8569 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8570 const struct rte_flow_item *item,
8573 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8574 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8575 const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8577 .next_header = 0xff,
8578 .frag_data = RTE_BE16(0xffff),
8585 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8587 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8589 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8591 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8593 /* IPv6 fragment extension item exists, so packet is IP fragment. */
8594 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8595 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8596 if (!ipv6_frag_ext_v)
8598 if (!ipv6_frag_ext_m)
8599 ipv6_frag_ext_m = &nic_mask;
8600 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8601 ipv6_frag_ext_m->hdr.next_header);
8602 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8603 ipv6_frag_ext_v->hdr.next_header &
8604 ipv6_frag_ext_m->hdr.next_header);
8608 * Add TCP item to matcher and to the value.
8610 * @param[in, out] matcher
8612 * @param[in, out] key
8613 * Flow matcher value.
8615 * Flow pattern to translate.
8617 * Item is inner pattern.
8620 flow_dv_translate_item_tcp(void *matcher, void *key,
8621 const struct rte_flow_item *item,
8624 const struct rte_flow_item_tcp *tcp_m = item->mask;
8625 const struct rte_flow_item_tcp *tcp_v = item->spec;
8630 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8632 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8634 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8636 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8638 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8639 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8643 tcp_m = &rte_flow_item_tcp_mask;
8644 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8645 rte_be_to_cpu_16(tcp_m->hdr.src_port));
8646 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8647 rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8648 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8649 rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8650 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8651 rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8652 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8653 tcp_m->hdr.tcp_flags);
8654 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8655 (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8659 * Add UDP item to matcher and to the value.
8661 * @param[in, out] matcher
8663 * @param[in, out] key
8664 * Flow matcher value.
8666 * Flow pattern to translate.
8668 * Item is inner pattern.
8671 flow_dv_translate_item_udp(void *matcher, void *key,
8672 const struct rte_flow_item *item,
8675 const struct rte_flow_item_udp *udp_m = item->mask;
8676 const struct rte_flow_item_udp *udp_v = item->spec;
8681 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8683 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8685 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8687 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8689 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8690 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8694 udp_m = &rte_flow_item_udp_mask;
8695 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8696 rte_be_to_cpu_16(udp_m->hdr.src_port));
8697 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8698 rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8699 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8700 rte_be_to_cpu_16(udp_m->hdr.dst_port));
8701 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8702 rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8706 * Add GRE optional Key item to matcher and to the value.
8708 * @param[in, out] matcher
8710 * @param[in, out] key
8711 * Flow matcher value.
8713 * Flow pattern to translate.
8715 * Item is inner pattern.
8718 flow_dv_translate_item_gre_key(void *matcher, void *key,
8719 const struct rte_flow_item *item)
8721 const rte_be32_t *key_m = item->mask;
8722 const rte_be32_t *key_v = item->spec;
8723 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8724 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8725 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8727 /* GRE K bit must be on and should already be validated */
8728 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8729 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8733 key_m = &gre_key_default_mask;
8734 MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8735 rte_be_to_cpu_32(*key_m) >> 8);
8736 MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8737 rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8738 MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8739 rte_be_to_cpu_32(*key_m) & 0xFF);
8740 MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8741 rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8745 * Add GRE item to matcher and to the value.
8747 * @param[in, out] matcher
8749 * @param[in, out] key
8750 * Flow matcher value.
8752 * Flow pattern to translate.
8754 * Item is inner pattern.
8757 flow_dv_translate_item_gre(void *matcher, void *key,
8758 const struct rte_flow_item *item,
8761 const struct rte_flow_item_gre *gre_m = item->mask;
8762 const struct rte_flow_item_gre *gre_v = item->spec;
8765 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8766 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8773 uint16_t s_present:1;
8774 uint16_t k_present:1;
8775 uint16_t rsvd_bit1:1;
8776 uint16_t c_present:1;
8780 } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8783 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8785 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8787 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8789 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8791 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8792 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8796 gre_m = &rte_flow_item_gre_mask;
8797 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8798 rte_be_to_cpu_16(gre_m->protocol));
8799 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8800 rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8801 gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8802 gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8803 MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8804 gre_crks_rsvd0_ver_m.c_present);
8805 MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8806 gre_crks_rsvd0_ver_v.c_present &
8807 gre_crks_rsvd0_ver_m.c_present);
8808 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8809 gre_crks_rsvd0_ver_m.k_present);
8810 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8811 gre_crks_rsvd0_ver_v.k_present &
8812 gre_crks_rsvd0_ver_m.k_present);
8813 MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8814 gre_crks_rsvd0_ver_m.s_present);
8815 MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8816 gre_crks_rsvd0_ver_v.s_present &
8817 gre_crks_rsvd0_ver_m.s_present);
8821 * Add NVGRE item to matcher and to the value.
8823 * @param[in, out] matcher
8825 * @param[in, out] key
8826 * Flow matcher value.
8828 * Flow pattern to translate.
8830 * Item is inner pattern.
8833 flow_dv_translate_item_nvgre(void *matcher, void *key,
8834 const struct rte_flow_item *item,
8837 const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8838 const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8839 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8840 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8841 const char *tni_flow_id_m;
8842 const char *tni_flow_id_v;
8848 /* For NVGRE, GRE header fields must be set with defined values. */
8849 const struct rte_flow_item_gre gre_spec = {
8850 .c_rsvd0_ver = RTE_BE16(0x2000),
8851 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8853 const struct rte_flow_item_gre gre_mask = {
8854 .c_rsvd0_ver = RTE_BE16(0xB000),
8855 .protocol = RTE_BE16(UINT16_MAX),
8857 const struct rte_flow_item gre_item = {
8862 flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8866 nvgre_m = &rte_flow_item_nvgre_mask;
8867 tni_flow_id_m = (const char *)nvgre_m->tni;
8868 tni_flow_id_v = (const char *)nvgre_v->tni;
8869 size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8870 gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8871 gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8872 memcpy(gre_key_m, tni_flow_id_m, size);
8873 for (i = 0; i < size; ++i)
8874 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8878 * Add VXLAN item to matcher and to the value.
8881 * Pointer to the Ethernet device structure.
8883 * Flow rule attributes.
8884 * @param[in, out] matcher
8886 * @param[in, out] key
8887 * Flow matcher value.
8889 * Flow pattern to translate.
8891 * Item is inner pattern.
8894 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8895 const struct rte_flow_attr *attr,
8896 void *matcher, void *key,
8897 const struct rte_flow_item *item,
8900 const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8901 const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8906 uint32_t *tunnel_header_v;
8907 uint32_t *tunnel_header_m;
8909 struct mlx5_priv *priv = dev->data->dev_private;
8910 const struct rte_flow_item_vxlan nic_mask = {
8911 .vni = "\xff\xff\xff",
8916 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8918 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8920 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8922 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8924 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8925 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8926 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8927 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8928 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8933 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8934 (attr->group && !priv->sh->misc5_cap))
8935 vxlan_m = &rte_flow_item_vxlan_mask;
8937 vxlan_m = &nic_mask;
8939 if ((!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8940 ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8947 misc_m = MLX5_ADDR_OF(fte_match_param,
8948 matcher, misc_parameters);
8949 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8950 size = sizeof(vxlan_m->vni);
8951 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8952 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8953 memcpy(vni_m, vxlan_m->vni, size);
8954 for (i = 0; i < size; ++i)
8955 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8958 misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8959 misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8960 tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8963 tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8966 *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8967 (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8968 (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8969 if (*tunnel_header_v)
8970 *tunnel_header_m = vxlan_m->vni[0] |
8971 vxlan_m->vni[1] << 8 |
8972 vxlan_m->vni[2] << 16;
8974 *tunnel_header_m = 0x0;
8975 *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8976 if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8977 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8981 * Add VXLAN-GPE item to matcher and to the value.
8983 * @param[in, out] matcher
8985 * @param[in, out] key
8986 * Flow matcher value.
8988 * Flow pattern to translate.
8990 * Item is inner pattern.
8994 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
8995 const struct rte_flow_item *item, int inner)
8997 const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
8998 const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
9002 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
9004 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9010 uint8_t flags_m = 0xff;
9011 uint8_t flags_v = 0xc;
9014 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9016 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9018 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9020 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9022 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
9023 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
9024 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9025 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9026 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9031 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
9032 size = sizeof(vxlan_m->vni);
9033 vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
9034 vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
9035 memcpy(vni_m, vxlan_m->vni, size);
9036 for (i = 0; i < size; ++i)
9037 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9038 if (vxlan_m->flags) {
9039 flags_m = vxlan_m->flags;
9040 flags_v = vxlan_v->flags;
9042 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
9043 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
9044 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
9046 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
9051 * Add Geneve item to matcher and to the value.
9053 * @param[in, out] matcher
9055 * @param[in, out] key
9056 * Flow matcher value.
9058 * Flow pattern to translate.
9060 * Item is inner pattern.
9064 flow_dv_translate_item_geneve(void *matcher, void *key,
9065 const struct rte_flow_item *item, int inner)
9067 const struct rte_flow_item_geneve *geneve_m = item->mask;
9068 const struct rte_flow_item_geneve *geneve_v = item->spec;
9071 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9072 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9081 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9083 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9085 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9087 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9089 dport = MLX5_UDP_PORT_GENEVE;
9090 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9091 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9092 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9097 geneve_m = &rte_flow_item_geneve_mask;
9098 size = sizeof(geneve_m->vni);
9099 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9100 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9101 memcpy(vni_m, geneve_m->vni, size);
9102 for (i = 0; i < size; ++i)
9103 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9104 MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
9105 rte_be_to_cpu_16(geneve_m->protocol));
9106 MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9107 rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
9108 gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9109 gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9110 MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9111 MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9112 MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9113 MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9114 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9115 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9116 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9117 MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9118 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9122 * Create Geneve TLV option resource.
9124 * @param dev[in, out]
9125 * Pointer to rte_eth_dev structure.
9126 * @param[in, out] tag_be24
9127 * Tag value in big endian then R-shift 8.
9128 * @parm[in, out] dev_flow
9129 * Pointer to the dev_flow.
9131 * pointer to error structure.
9134 * 0 on success otherwise -errno and errno is set.
9138 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9139 const struct rte_flow_item *item,
9140 struct rte_flow_error *error)
9142 struct mlx5_priv *priv = dev->data->dev_private;
9143 struct mlx5_dev_ctx_shared *sh = priv->sh;
9144 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9145 sh->geneve_tlv_option_resource;
9146 struct mlx5_devx_obj *obj;
9147 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9152 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9153 if (geneve_opt_resource != NULL) {
9154 if (geneve_opt_resource->option_class ==
9155 geneve_opt_v->option_class &&
9156 geneve_opt_resource->option_type ==
9157 geneve_opt_v->option_type &&
9158 geneve_opt_resource->length ==
9159 geneve_opt_v->option_len) {
9160 /* We already have GENVE TLV option obj allocated. */
9161 __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9164 ret = rte_flow_error_set(error, ENOMEM,
9165 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9166 "Only one GENEVE TLV option supported");
9170 /* Create a GENEVE TLV object and resource. */
9171 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->ctx,
9172 geneve_opt_v->option_class,
9173 geneve_opt_v->option_type,
9174 geneve_opt_v->option_len);
9176 ret = rte_flow_error_set(error, ENODATA,
9177 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9178 "Failed to create GENEVE TLV Devx object");
9181 sh->geneve_tlv_option_resource =
9182 mlx5_malloc(MLX5_MEM_ZERO,
9183 sizeof(*geneve_opt_resource),
9185 if (!sh->geneve_tlv_option_resource) {
9186 claim_zero(mlx5_devx_cmd_destroy(obj));
9187 ret = rte_flow_error_set(error, ENOMEM,
9188 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9189 "GENEVE TLV object memory allocation failed");
9192 geneve_opt_resource = sh->geneve_tlv_option_resource;
9193 geneve_opt_resource->obj = obj;
9194 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9195 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9196 geneve_opt_resource->length = geneve_opt_v->option_len;
9197 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9201 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9206 * Add Geneve TLV option item to matcher.
9208 * @param[in, out] dev
9209 * Pointer to rte_eth_dev structure.
9210 * @param[in, out] matcher
9212 * @param[in, out] key
9213 * Flow matcher value.
9215 * Flow pattern to translate.
9217 * Pointer to error structure.
9220 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9221 void *key, const struct rte_flow_item *item,
9222 struct rte_flow_error *error)
9224 const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9225 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9226 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9227 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9228 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9230 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9231 rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9237 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9238 ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9241 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9245 * Set the option length in GENEVE header if not requested.
9246 * The GENEVE TLV option length is expressed by the option length field
9247 * in the GENEVE header.
9248 * If the option length was not requested but the GENEVE TLV option item
9249 * is present we set the option length field implicitly.
9251 if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9252 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9253 MLX5_GENEVE_OPTLEN_MASK);
9254 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9255 geneve_opt_v->option_len + 1);
9258 if (geneve_opt_v->data) {
9259 memcpy(&opt_data_key, geneve_opt_v->data,
9260 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9261 sizeof(opt_data_key)));
9262 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9263 sizeof(opt_data_key));
9264 memcpy(&opt_data_mask, geneve_opt_m->data,
9265 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9266 sizeof(opt_data_mask)));
9267 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9268 sizeof(opt_data_mask));
9269 MLX5_SET(fte_match_set_misc3, misc3_m,
9270 geneve_tlv_option_0_data,
9271 rte_be_to_cpu_32(opt_data_mask));
9272 MLX5_SET(fte_match_set_misc3, misc3_v,
9273 geneve_tlv_option_0_data,
9274 rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9280 * Add MPLS item to matcher and to the value.
9282 * @param[in, out] matcher
9284 * @param[in, out] key
9285 * Flow matcher value.
9287 * Flow pattern to translate.
9288 * @param[in] prev_layer
9289 * The protocol layer indicated in previous item.
9291 * Item is inner pattern.
9294 flow_dv_translate_item_mpls(void *matcher, void *key,
9295 const struct rte_flow_item *item,
9296 uint64_t prev_layer,
9299 const uint32_t *in_mpls_m = item->mask;
9300 const uint32_t *in_mpls_v = item->spec;
9301 uint32_t *out_mpls_m = 0;
9302 uint32_t *out_mpls_v = 0;
9303 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9304 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9305 void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9307 void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9308 void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9309 void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9311 switch (prev_layer) {
9312 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9313 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
9314 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9315 MLX5_UDP_PORT_MPLS);
9317 case MLX5_FLOW_LAYER_GRE:
9319 case MLX5_FLOW_LAYER_GRE_KEY:
9320 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
9321 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9322 RTE_ETHER_TYPE_MPLS);
9330 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9331 switch (prev_layer) {
9332 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9334 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9335 outer_first_mpls_over_udp);
9337 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9338 outer_first_mpls_over_udp);
9340 case MLX5_FLOW_LAYER_GRE:
9342 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9343 outer_first_mpls_over_gre);
9345 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9346 outer_first_mpls_over_gre);
9349 /* Inner MPLS not over GRE is not supported. */
9352 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9356 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9362 if (out_mpls_m && out_mpls_v) {
9363 *out_mpls_m = *in_mpls_m;
9364 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9369 * Add metadata register item to matcher
9371 * @param[in, out] matcher
9373 * @param[in, out] key
9374 * Flow matcher value.
9375 * @param[in] reg_type
9376 * Type of device metadata register
9383 flow_dv_match_meta_reg(void *matcher, void *key,
9384 enum modify_reg reg_type,
9385 uint32_t data, uint32_t mask)
9388 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9390 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9396 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9397 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9400 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9401 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9405 * The metadata register C0 field might be divided into
9406 * source vport index and META item value, we should set
9407 * this field according to specified mask, not as whole one.
9409 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9411 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9412 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9415 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9418 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9419 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9422 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9423 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9426 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9427 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9430 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9431 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9434 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9435 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9438 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9439 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9442 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9443 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9452 * Add MARK item to matcher
9455 * The device to configure through.
9456 * @param[in, out] matcher
9458 * @param[in, out] key
9459 * Flow matcher value.
9461 * Flow pattern to translate.
9464 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9465 void *matcher, void *key,
9466 const struct rte_flow_item *item)
9468 struct mlx5_priv *priv = dev->data->dev_private;
9469 const struct rte_flow_item_mark *mark;
9473 mark = item->mask ? (const void *)item->mask :
9474 &rte_flow_item_mark_mask;
9475 mask = mark->id & priv->sh->dv_mark_mask;
9476 mark = (const void *)item->spec;
9478 value = mark->id & priv->sh->dv_mark_mask & mask;
9480 enum modify_reg reg;
9482 /* Get the metadata register index for the mark. */
9483 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9484 MLX5_ASSERT(reg > 0);
9485 if (reg == REG_C_0) {
9486 struct mlx5_priv *priv = dev->data->dev_private;
9487 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9488 uint32_t shl_c0 = rte_bsf32(msk_c0);
9494 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9499 * Add META item to matcher
9502 * The devich to configure through.
9503 * @param[in, out] matcher
9505 * @param[in, out] key
9506 * Flow matcher value.
9508 * Attributes of flow that includes this item.
9510 * Flow pattern to translate.
9513 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9514 void *matcher, void *key,
9515 const struct rte_flow_attr *attr,
9516 const struct rte_flow_item *item)
9518 const struct rte_flow_item_meta *meta_m;
9519 const struct rte_flow_item_meta *meta_v;
9521 meta_m = (const void *)item->mask;
9523 meta_m = &rte_flow_item_meta_mask;
9524 meta_v = (const void *)item->spec;
9527 uint32_t value = meta_v->data;
9528 uint32_t mask = meta_m->data;
9530 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9533 MLX5_ASSERT(reg != REG_NON);
9534 if (reg == REG_C_0) {
9535 struct mlx5_priv *priv = dev->data->dev_private;
9536 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9537 uint32_t shl_c0 = rte_bsf32(msk_c0);
9543 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9548 * Add vport metadata Reg C0 item to matcher
9550 * @param[in, out] matcher
9552 * @param[in, out] key
9553 * Flow matcher value.
9555 * Flow pattern to translate.
9558 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9559 uint32_t value, uint32_t mask)
9561 flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9565 * Add tag item to matcher
9568 * The devich to configure through.
9569 * @param[in, out] matcher
9571 * @param[in, out] key
9572 * Flow matcher value.
9574 * Flow pattern to translate.
9577 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9578 void *matcher, void *key,
9579 const struct rte_flow_item *item)
9581 const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9582 const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9583 uint32_t mask, value;
9586 value = tag_v->data;
9587 mask = tag_m ? tag_m->data : UINT32_MAX;
9588 if (tag_v->id == REG_C_0) {
9589 struct mlx5_priv *priv = dev->data->dev_private;
9590 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9591 uint32_t shl_c0 = rte_bsf32(msk_c0);
9597 flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9601 * Add TAG item to matcher
9604 * The devich to configure through.
9605 * @param[in, out] matcher
9607 * @param[in, out] key
9608 * Flow matcher value.
9610 * Flow pattern to translate.
9613 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9614 void *matcher, void *key,
9615 const struct rte_flow_item *item)
9617 const struct rte_flow_item_tag *tag_v = item->spec;
9618 const struct rte_flow_item_tag *tag_m = item->mask;
9619 enum modify_reg reg;
9622 tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9623 /* Get the metadata register index for the tag. */
9624 reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9625 MLX5_ASSERT(reg > 0);
9626 flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9630 * Add source vport match to the specified matcher.
9632 * @param[in, out] matcher
9634 * @param[in, out] key
9635 * Flow matcher value.
9637 * Source vport value to match
9642 flow_dv_translate_item_source_vport(void *matcher, void *key,
9643 int16_t port, uint16_t mask)
9645 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9646 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9648 MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9649 MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9653 * Translate port-id item to eswitch match on port-id.
9656 * The devich to configure through.
9657 * @param[in, out] matcher
9659 * @param[in, out] key
9660 * Flow matcher value.
9662 * Flow pattern to translate.
9667 * 0 on success, a negative errno value otherwise.
9670 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9671 void *key, const struct rte_flow_item *item,
9672 const struct rte_flow_attr *attr)
9674 const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9675 const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9676 struct mlx5_priv *priv;
9679 mask = pid_m ? pid_m->id : 0xffff;
9680 id = pid_v ? pid_v->id : dev->data->port_id;
9681 priv = mlx5_port_to_eswitch_info(id, item == NULL);
9685 * Translate to vport field or to metadata, depending on mode.
9686 * Kernel can use either misc.source_port or half of C0 metadata
9689 if (priv->vport_meta_mask) {
9691 * Provide the hint for SW steering library
9692 * to insert the flow into ingress domain and
9693 * save the extra vport match.
9695 if (mask == 0xffff && priv->vport_id == 0xffff &&
9696 priv->pf_bond < 0 && attr->transfer)
9697 flow_dv_translate_item_source_vport
9698 (matcher, key, priv->vport_id, mask);
9700 * We should always set the vport metadata register,
9701 * otherwise the SW steering library can drop
9702 * the rule if wire vport metadata value is not zero,
9703 * it depends on kernel configuration.
9705 flow_dv_translate_item_meta_vport(matcher, key,
9706 priv->vport_meta_tag,
9707 priv->vport_meta_mask);
9709 flow_dv_translate_item_source_vport(matcher, key,
9710 priv->vport_id, mask);
9716 * Add ICMP6 item to matcher and to the value.
9718 * @param[in, out] matcher
9720 * @param[in, out] key
9721 * Flow matcher value.
9723 * Flow pattern to translate.
9725 * Item is inner pattern.
9728 flow_dv_translate_item_icmp6(void *matcher, void *key,
9729 const struct rte_flow_item *item,
9732 const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9733 const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9736 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9738 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9740 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9742 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9744 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9746 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9748 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9749 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9753 icmp6_m = &rte_flow_item_icmp6_mask;
9754 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9755 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9756 icmp6_v->type & icmp6_m->type);
9757 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9758 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9759 icmp6_v->code & icmp6_m->code);
9763 * Add ICMP item to matcher and to the value.
9765 * @param[in, out] matcher
9767 * @param[in, out] key
9768 * Flow matcher value.
9770 * Flow pattern to translate.
9772 * Item is inner pattern.
9775 flow_dv_translate_item_icmp(void *matcher, void *key,
9776 const struct rte_flow_item *item,
9779 const struct rte_flow_item_icmp *icmp_m = item->mask;
9780 const struct rte_flow_item_icmp *icmp_v = item->spec;
9781 uint32_t icmp_header_data_m = 0;
9782 uint32_t icmp_header_data_v = 0;
9785 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9787 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9789 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9791 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9793 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9795 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9797 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9798 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9802 icmp_m = &rte_flow_item_icmp_mask;
9803 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9804 icmp_m->hdr.icmp_type);
9805 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9806 icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9807 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9808 icmp_m->hdr.icmp_code);
9809 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9810 icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9811 icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9812 icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9813 if (icmp_header_data_m) {
9814 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9815 icmp_header_data_v |=
9816 rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9817 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9818 icmp_header_data_m);
9819 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9820 icmp_header_data_v & icmp_header_data_m);
9825 * Add GTP item to matcher and to the value.
9827 * @param[in, out] matcher
9829 * @param[in, out] key
9830 * Flow matcher value.
9832 * Flow pattern to translate.
9834 * Item is inner pattern.
9837 flow_dv_translate_item_gtp(void *matcher, void *key,
9838 const struct rte_flow_item *item, int inner)
9840 const struct rte_flow_item_gtp *gtp_m = item->mask;
9841 const struct rte_flow_item_gtp *gtp_v = item->spec;
9844 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9846 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9847 uint16_t dport = RTE_GTPU_UDP_PORT;
9850 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9852 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9854 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9856 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9858 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9859 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9860 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9865 gtp_m = &rte_flow_item_gtp_mask;
9866 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9867 gtp_m->v_pt_rsv_flags);
9868 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9869 gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9870 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9871 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9872 gtp_v->msg_type & gtp_m->msg_type);
9873 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9874 rte_be_to_cpu_32(gtp_m->teid));
9875 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9876 rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9880 * Add GTP PSC item to matcher.
9882 * @param[in, out] matcher
9884 * @param[in, out] key
9885 * Flow matcher value.
9887 * Flow pattern to translate.
9890 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9891 const struct rte_flow_item *item)
9893 const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9894 const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9895 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9897 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9903 uint8_t next_ext_header_type;
9908 /* Always set E-flag match on one, regardless of GTP item settings. */
9909 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9910 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9911 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9912 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9913 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9914 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9915 /*Set next extension header type. */
9918 dw_2.next_ext_header_type = 0xff;
9919 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9920 rte_cpu_to_be_32(dw_2.w32));
9923 dw_2.next_ext_header_type = 0x85;
9924 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9925 rte_cpu_to_be_32(dw_2.w32));
9937 /*Set extension header PDU type and Qos. */
9939 gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9941 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->pdu_type);
9942 dw_0.qfi = gtp_psc_m->qfi;
9943 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9944 rte_cpu_to_be_32(dw_0.w32));
9946 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->pdu_type &
9947 gtp_psc_m->pdu_type);
9948 dw_0.qfi = gtp_psc_v->qfi & gtp_psc_m->qfi;
9949 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9950 rte_cpu_to_be_32(dw_0.w32));
9956 * Add eCPRI item to matcher and to the value.
9959 * The devich to configure through.
9960 * @param[in, out] matcher
9962 * @param[in, out] key
9963 * Flow matcher value.
9965 * Flow pattern to translate.
9966 * @param[in] samples
9967 * Sample IDs to be used in the matching.
9970 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9971 void *key, const struct rte_flow_item *item)
9973 struct mlx5_priv *priv = dev->data->dev_private;
9974 const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9975 const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9976 struct rte_ecpri_common_hdr common;
9977 void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9979 void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9987 ecpri_m = &rte_flow_item_ecpri_mask;
9989 * Maximal four DW samples are supported in a single matching now.
9990 * Two are used now for a eCPRI matching:
9991 * 1. Type: one byte, mask should be 0x00ff0000 in network order
9992 * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
9995 if (!ecpri_m->hdr.common.u32)
9997 samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
9998 /* Need to take the whole DW as the mask to fill the entry. */
9999 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10000 prog_sample_field_value_0);
10001 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10002 prog_sample_field_value_0);
10003 /* Already big endian (network order) in the header. */
10004 *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
10005 *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
10006 /* Sample#0, used for matching type, offset 0. */
10007 MLX5_SET(fte_match_set_misc4, misc4_m,
10008 prog_sample_field_id_0, samples[0]);
10009 /* It makes no sense to set the sample ID in the mask field. */
10010 MLX5_SET(fte_match_set_misc4, misc4_v,
10011 prog_sample_field_id_0, samples[0]);
10013 * Checking if message body part needs to be matched.
10014 * Some wildcard rules only matching type field should be supported.
10016 if (ecpri_m->hdr.dummy[0]) {
10017 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
10018 switch (common.type) {
10019 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
10020 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
10021 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
10022 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10023 prog_sample_field_value_1);
10024 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10025 prog_sample_field_value_1);
10026 *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
10027 *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
10028 ecpri_m->hdr.dummy[0];
10029 /* Sample#1, to match message body, offset 4. */
10030 MLX5_SET(fte_match_set_misc4, misc4_m,
10031 prog_sample_field_id_1, samples[1]);
10032 MLX5_SET(fte_match_set_misc4, misc4_v,
10033 prog_sample_field_id_1, samples[1]);
10036 /* Others, do not match any sample ID. */
10043 * Add connection tracking status item to matcher
10046 * The devich to configure through.
10047 * @param[in, out] matcher
10049 * @param[in, out] key
10050 * Flow matcher value.
10052 * Flow pattern to translate.
10055 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
10056 void *matcher, void *key,
10057 const struct rte_flow_item *item)
10059 uint32_t reg_value = 0;
10061 /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10062 uint32_t reg_mask = 0;
10063 const struct rte_flow_item_conntrack *spec = item->spec;
10064 const struct rte_flow_item_conntrack *mask = item->mask;
10066 struct rte_flow_error error;
10069 mask = &rte_flow_item_conntrack_mask;
10070 if (!spec || !mask->flags)
10072 flags = spec->flags & mask->flags;
10073 /* The conflict should be checked in the validation. */
10074 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10075 reg_value |= MLX5_CT_SYNDROME_VALID;
10076 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10077 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10078 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10079 reg_value |= MLX5_CT_SYNDROME_INVALID;
10080 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10081 reg_value |= MLX5_CT_SYNDROME_TRAP;
10082 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10083 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10084 if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10085 RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10086 RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10088 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10089 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10090 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10091 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10092 /* The REG_C_x value could be saved during startup. */
10093 reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10094 if (reg_id == REG_NON)
10096 flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10097 reg_value, reg_mask);
10100 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10102 #define HEADER_IS_ZERO(match_criteria, headers) \
10103 !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers), \
10104 matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10107 * Calculate flow matcher enable bitmap.
10109 * @param match_criteria
10110 * Pointer to flow matcher criteria.
10113 * Bitmap of enabled fields.
10116 flow_dv_matcher_enable(uint32_t *match_criteria)
10118 uint8_t match_criteria_enable;
10120 match_criteria_enable =
10121 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10122 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10123 match_criteria_enable |=
10124 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10125 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10126 match_criteria_enable |=
10127 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10128 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10129 match_criteria_enable |=
10130 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10131 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10132 match_criteria_enable |=
10133 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10134 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10135 match_criteria_enable |=
10136 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10137 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10138 match_criteria_enable |=
10139 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10140 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10141 return match_criteria_enable;
10145 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10148 * Check flow matching criteria first, subtract misc5/4 length if flow
10149 * doesn't own misc5/4 parameters. In some old rdma-core releases,
10150 * misc5/4 are not supported, and matcher creation failure is expected
10151 * w/o subtration. If misc5 is provided, misc4 must be counted in since
10152 * misc5 is right after misc4.
10154 if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10155 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10156 MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10157 if (!(match_criteria & (1 <<
10158 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10159 *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10164 static struct mlx5_list_entry *
10165 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10166 struct mlx5_list_entry *entry, void *cb_ctx)
10168 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10169 struct mlx5_flow_dv_matcher *ref = ctx->data;
10170 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10171 typeof(*tbl), tbl);
10172 struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10177 rte_flow_error_set(ctx->error, ENOMEM,
10178 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10179 "cannot create matcher");
10182 memcpy(resource, entry, sizeof(*resource));
10183 resource->tbl = &tbl->tbl;
10184 return &resource->entry;
10188 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10189 struct mlx5_list_entry *entry)
10194 struct mlx5_list_entry *
10195 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10197 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10198 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10199 struct rte_eth_dev *dev = ctx->dev;
10200 struct mlx5_flow_tbl_data_entry *tbl_data;
10201 struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10202 struct rte_flow_error *error = ctx->error;
10203 union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10204 struct mlx5_flow_tbl_resource *tbl;
10209 tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10211 rte_flow_error_set(error, ENOMEM,
10212 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10214 "cannot allocate flow table data entry");
10217 tbl_data->idx = idx;
10218 tbl_data->tunnel = tt_prm->tunnel;
10219 tbl_data->group_id = tt_prm->group_id;
10220 tbl_data->external = !!tt_prm->external;
10221 tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10222 tbl_data->is_egress = !!key.is_egress;
10223 tbl_data->is_transfer = !!key.is_fdb;
10224 tbl_data->dummy = !!key.dummy;
10225 tbl_data->level = key.level;
10226 tbl_data->id = key.id;
10227 tbl = &tbl_data->tbl;
10229 return &tbl_data->entry;
10231 domain = sh->fdb_domain;
10232 else if (key.is_egress)
10233 domain = sh->tx_domain;
10235 domain = sh->rx_domain;
10236 ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10238 rte_flow_error_set(error, ENOMEM,
10239 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10240 NULL, "cannot create flow table object");
10241 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10244 if (key.level != 0) {
10245 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10246 (tbl->obj, &tbl_data->jump.action);
10248 rte_flow_error_set(error, ENOMEM,
10249 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10251 "cannot create flow jump action");
10252 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10253 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10257 MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10258 key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10259 key.level, key.id);
10260 tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10261 flow_dv_matcher_create_cb,
10262 flow_dv_matcher_match_cb,
10263 flow_dv_matcher_remove_cb,
10264 flow_dv_matcher_clone_cb,
10265 flow_dv_matcher_clone_free_cb);
10266 if (!tbl_data->matchers) {
10267 rte_flow_error_set(error, ENOMEM,
10268 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10270 "cannot create tbl matcher list");
10271 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10272 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10273 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10276 return &tbl_data->entry;
10280 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10283 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10284 struct mlx5_flow_tbl_data_entry *tbl_data =
10285 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10286 union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10288 return tbl_data->level != key.level ||
10289 tbl_data->id != key.id ||
10290 tbl_data->dummy != key.dummy ||
10291 tbl_data->is_transfer != !!key.is_fdb ||
10292 tbl_data->is_egress != !!key.is_egress;
10295 struct mlx5_list_entry *
10296 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10299 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10300 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10301 struct mlx5_flow_tbl_data_entry *tbl_data;
10302 struct rte_flow_error *error = ctx->error;
10305 tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10307 rte_flow_error_set(error, ENOMEM,
10308 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10310 "cannot allocate flow table data entry");
10313 memcpy(tbl_data, oentry, sizeof(*tbl_data));
10314 tbl_data->idx = idx;
10315 return &tbl_data->entry;
10319 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10321 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10322 struct mlx5_flow_tbl_data_entry *tbl_data =
10323 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10325 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10329 * Get a flow table.
10331 * @param[in, out] dev
10332 * Pointer to rte_eth_dev structure.
10333 * @param[in] table_level
10334 * Table level to use.
10335 * @param[in] egress
10336 * Direction of the table.
10337 * @param[in] transfer
10338 * E-Switch or NIC flow.
10340 * Dummy entry for dv API.
10341 * @param[in] table_id
10343 * @param[out] error
10344 * pointer to error structure.
10347 * Returns tables resource based on the index, NULL in case of failed.
10349 struct mlx5_flow_tbl_resource *
10350 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10351 uint32_t table_level, uint8_t egress,
10354 const struct mlx5_flow_tunnel *tunnel,
10355 uint32_t group_id, uint8_t dummy,
10357 struct rte_flow_error *error)
10359 struct mlx5_priv *priv = dev->data->dev_private;
10360 union mlx5_flow_tbl_key table_key = {
10362 .level = table_level,
10366 .is_fdb = !!transfer,
10367 .is_egress = !!egress,
10370 struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10372 .group_id = group_id,
10373 .external = external,
10375 struct mlx5_flow_cb_ctx ctx = {
10378 .data = &table_key.v64,
10381 struct mlx5_list_entry *entry;
10382 struct mlx5_flow_tbl_data_entry *tbl_data;
10384 entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10386 rte_flow_error_set(error, ENOMEM,
10387 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10388 "cannot get table");
10391 DRV_LOG(DEBUG, "table_level %u table_id %u "
10392 "tunnel %u group %u registered.",
10393 table_level, table_id,
10394 tunnel ? tunnel->tunnel_id : 0, group_id);
10395 tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10396 return &tbl_data->tbl;
10400 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10402 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10403 struct mlx5_flow_tbl_data_entry *tbl_data =
10404 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10406 MLX5_ASSERT(entry && sh);
10407 if (tbl_data->jump.action)
10408 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10409 if (tbl_data->tbl.obj)
10410 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10411 if (tbl_data->tunnel_offload && tbl_data->external) {
10412 struct mlx5_list_entry *he;
10413 struct mlx5_hlist *tunnel_grp_hash;
10414 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10415 union tunnel_tbl_key tunnel_key = {
10416 .tunnel_id = tbl_data->tunnel ?
10417 tbl_data->tunnel->tunnel_id : 0,
10418 .group = tbl_data->group_id
10420 uint32_t table_level = tbl_data->level;
10421 struct mlx5_flow_cb_ctx ctx = {
10422 .data = (void *)&tunnel_key.val,
10425 tunnel_grp_hash = tbl_data->tunnel ?
10426 tbl_data->tunnel->groups :
10428 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10430 mlx5_hlist_unregister(tunnel_grp_hash, he);
10432 "table_level %u id %u tunnel %u group %u released.",
10436 tbl_data->tunnel->tunnel_id : 0,
10437 tbl_data->group_id);
10439 mlx5_list_destroy(tbl_data->matchers);
10440 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10444 * Release a flow table.
10447 * Pointer to device shared structure.
10449 * Table resource to be released.
10452 * Returns 0 if table was released, else return 1;
10455 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10456 struct mlx5_flow_tbl_resource *tbl)
10458 struct mlx5_flow_tbl_data_entry *tbl_data =
10459 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10463 return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10467 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10468 struct mlx5_list_entry *entry, void *cb_ctx)
10470 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10471 struct mlx5_flow_dv_matcher *ref = ctx->data;
10472 struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10475 return cur->crc != ref->crc ||
10476 cur->priority != ref->priority ||
10477 memcmp((const void *)cur->mask.buf,
10478 (const void *)ref->mask.buf, ref->mask.size);
10481 struct mlx5_list_entry *
10482 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10484 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10485 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10486 struct mlx5_flow_dv_matcher *ref = ctx->data;
10487 struct mlx5_flow_dv_matcher *resource;
10488 struct mlx5dv_flow_matcher_attr dv_attr = {
10489 .type = IBV_FLOW_ATTR_NORMAL,
10490 .match_mask = (void *)&ref->mask,
10492 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10493 typeof(*tbl), tbl);
10496 resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10499 rte_flow_error_set(ctx->error, ENOMEM,
10500 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10501 "cannot create matcher");
10505 dv_attr.match_criteria_enable =
10506 flow_dv_matcher_enable(resource->mask.buf);
10507 __flow_dv_adjust_buf_size(&ref->mask.size,
10508 dv_attr.match_criteria_enable);
10509 dv_attr.priority = ref->priority;
10510 if (tbl->is_egress)
10511 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10512 ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
10513 &resource->matcher_object);
10515 mlx5_free(resource);
10516 rte_flow_error_set(ctx->error, ENOMEM,
10517 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10518 "cannot create matcher");
10521 return &resource->entry;
10525 * Register the flow matcher.
10527 * @param[in, out] dev
10528 * Pointer to rte_eth_dev structure.
10529 * @param[in, out] matcher
10530 * Pointer to flow matcher.
10531 * @param[in, out] key
10532 * Pointer to flow table key.
10533 * @parm[in, out] dev_flow
10534 * Pointer to the dev_flow.
10535 * @param[out] error
10536 * pointer to error structure.
10539 * 0 on success otherwise -errno and errno is set.
10542 flow_dv_matcher_register(struct rte_eth_dev *dev,
10543 struct mlx5_flow_dv_matcher *ref,
10544 union mlx5_flow_tbl_key *key,
10545 struct mlx5_flow *dev_flow,
10546 const struct mlx5_flow_tunnel *tunnel,
10548 struct rte_flow_error *error)
10550 struct mlx5_list_entry *entry;
10551 struct mlx5_flow_dv_matcher *resource;
10552 struct mlx5_flow_tbl_resource *tbl;
10553 struct mlx5_flow_tbl_data_entry *tbl_data;
10554 struct mlx5_flow_cb_ctx ctx = {
10559 * tunnel offload API requires this registration for cases when
10560 * tunnel match rule was inserted before tunnel set rule.
10562 tbl = flow_dv_tbl_resource_get(dev, key->level,
10563 key->is_egress, key->is_fdb,
10564 dev_flow->external, tunnel,
10565 group_id, 0, key->id, error);
10567 return -rte_errno; /* No need to refill the error info */
10568 tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10570 entry = mlx5_list_register(tbl_data->matchers, &ctx);
10572 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10573 return rte_flow_error_set(error, ENOMEM,
10574 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10575 "cannot allocate ref memory");
10577 resource = container_of(entry, typeof(*resource), entry);
10578 dev_flow->handle->dvh.matcher = resource;
10582 struct mlx5_list_entry *
10583 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10585 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10586 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10587 struct mlx5_flow_dv_tag_resource *entry;
10591 entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10593 rte_flow_error_set(ctx->error, ENOMEM,
10594 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10595 "cannot allocate resource memory");
10599 entry->tag_id = *(uint32_t *)(ctx->data);
10600 ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10603 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10604 rte_flow_error_set(ctx->error, ENOMEM,
10605 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10606 NULL, "cannot create action");
10609 return &entry->entry;
10613 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10616 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10617 struct mlx5_flow_dv_tag_resource *tag =
10618 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10620 return *(uint32_t *)(ctx->data) != tag->tag_id;
10623 struct mlx5_list_entry *
10624 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10627 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10628 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10629 struct mlx5_flow_dv_tag_resource *entry;
10632 entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10634 rte_flow_error_set(ctx->error, ENOMEM,
10635 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10636 "cannot allocate tag resource memory");
10639 memcpy(entry, oentry, sizeof(*entry));
10641 return &entry->entry;
10645 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10647 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10648 struct mlx5_flow_dv_tag_resource *tag =
10649 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10651 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10655 * Find existing tag resource or create and register a new one.
10657 * @param dev[in, out]
10658 * Pointer to rte_eth_dev structure.
10659 * @param[in, out] tag_be24
10660 * Tag value in big endian then R-shift 8.
10661 * @parm[in, out] dev_flow
10662 * Pointer to the dev_flow.
10663 * @param[out] error
10664 * pointer to error structure.
10667 * 0 on success otherwise -errno and errno is set.
10670 flow_dv_tag_resource_register
10671 (struct rte_eth_dev *dev,
10673 struct mlx5_flow *dev_flow,
10674 struct rte_flow_error *error)
10676 struct mlx5_priv *priv = dev->data->dev_private;
10677 struct mlx5_flow_dv_tag_resource *resource;
10678 struct mlx5_list_entry *entry;
10679 struct mlx5_flow_cb_ctx ctx = {
10683 struct mlx5_hlist *tag_table;
10685 tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10687 MLX5_TAGS_HLIST_ARRAY_SIZE,
10688 false, false, priv->sh,
10689 flow_dv_tag_create_cb,
10690 flow_dv_tag_match_cb,
10691 flow_dv_tag_remove_cb,
10692 flow_dv_tag_clone_cb,
10693 flow_dv_tag_clone_free_cb);
10694 if (unlikely(!tag_table))
10696 entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10698 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10700 dev_flow->handle->dvh.rix_tag = resource->idx;
10701 dev_flow->dv.tag_resource = resource;
10708 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10710 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10711 struct mlx5_flow_dv_tag_resource *tag =
10712 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10714 MLX5_ASSERT(tag && sh && tag->action);
10715 claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10716 DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10717 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10724 * Pointer to Ethernet device.
10729 * 1 while a reference on it exists, 0 when freed.
10732 flow_dv_tag_release(struct rte_eth_dev *dev,
10735 struct mlx5_priv *priv = dev->data->dev_private;
10736 struct mlx5_flow_dv_tag_resource *tag;
10738 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10741 DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10742 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10743 return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10747 * Translate port ID action to vport.
10750 * Pointer to rte_eth_dev structure.
10751 * @param[in] action
10752 * Pointer to the port ID action.
10753 * @param[out] dst_port_id
10754 * The target port ID.
10755 * @param[out] error
10756 * Pointer to the error structure.
10759 * 0 on success, a negative errno value otherwise and rte_errno is set.
10762 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10763 const struct rte_flow_action *action,
10764 uint32_t *dst_port_id,
10765 struct rte_flow_error *error)
10768 struct mlx5_priv *priv;
10769 const struct rte_flow_action_port_id *conf =
10770 (const struct rte_flow_action_port_id *)action->conf;
10772 port = conf->original ? dev->data->port_id : conf->id;
10773 priv = mlx5_port_to_eswitch_info(port, false);
10775 return rte_flow_error_set(error, -rte_errno,
10776 RTE_FLOW_ERROR_TYPE_ACTION,
10778 "No eswitch info was found for port");
10779 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10781 * This parameter is transferred to
10782 * mlx5dv_dr_action_create_dest_ib_port().
10784 *dst_port_id = priv->dev_port;
10787 * Legacy mode, no LAG configurations is supported.
10788 * This parameter is transferred to
10789 * mlx5dv_dr_action_create_dest_vport().
10791 *dst_port_id = priv->vport_id;
10797 * Create a counter with aging configuration.
10800 * Pointer to rte_eth_dev structure.
10801 * @param[in] dev_flow
10802 * Pointer to the mlx5_flow.
10803 * @param[out] count
10804 * Pointer to the counter action configuration.
10806 * Pointer to the aging action configuration.
10809 * Index to flow counter on success, 0 otherwise.
10812 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10813 struct mlx5_flow *dev_flow,
10814 const struct rte_flow_action_count *count,
10815 const struct rte_flow_action_age *age)
10818 struct mlx5_age_param *age_param;
10820 if (count && count->shared)
10821 counter = flow_dv_counter_get_shared(dev, count->id);
10823 counter = flow_dv_counter_alloc(dev, !!age);
10824 if (!counter || age == NULL)
10826 age_param = flow_dv_counter_idx_get_age(dev, counter);
10827 age_param->context = age->context ? age->context :
10828 (void *)(uintptr_t)(dev_flow->flow_idx);
10829 age_param->timeout = age->timeout;
10830 age_param->port_id = dev->data->port_id;
10831 __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10832 __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10837 * Add Tx queue matcher
10840 * Pointer to the dev struct.
10841 * @param[in, out] matcher
10843 * @param[in, out] key
10844 * Flow matcher value.
10846 * Flow pattern to translate.
10848 * Item is inner pattern.
10851 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10852 void *matcher, void *key,
10853 const struct rte_flow_item *item)
10855 const struct mlx5_rte_flow_item_tx_queue *queue_m;
10856 const struct mlx5_rte_flow_item_tx_queue *queue_v;
10858 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10860 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10861 struct mlx5_txq_ctrl *txq;
10865 queue_m = (const void *)item->mask;
10868 queue_v = (const void *)item->spec;
10871 txq = mlx5_txq_get(dev, queue_v->queue);
10874 queue = txq->obj->sq->id;
10875 MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
10876 MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
10877 queue & queue_m->queue);
10878 mlx5_txq_release(dev, queue_v->queue);
10882 * Set the hash fields according to the @p flow information.
10884 * @param[in] dev_flow
10885 * Pointer to the mlx5_flow.
10886 * @param[in] rss_desc
10887 * Pointer to the mlx5_flow_rss_desc.
10890 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10891 struct mlx5_flow_rss_desc *rss_desc)
10893 uint64_t items = dev_flow->handle->layers;
10895 uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10897 dev_flow->hash_fields = 0;
10898 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10899 if (rss_desc->level >= 2)
10902 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10903 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10904 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10905 if (rss_types & ETH_RSS_L3_SRC_ONLY)
10906 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10907 else if (rss_types & ETH_RSS_L3_DST_ONLY)
10908 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10910 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10912 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10913 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10914 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10915 if (rss_types & ETH_RSS_L3_SRC_ONLY)
10916 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10917 else if (rss_types & ETH_RSS_L3_DST_ONLY)
10918 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10920 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10923 if (dev_flow->hash_fields == 0)
10925 * There is no match between the RSS types and the
10926 * L3 protocol (IPv4/IPv6) defined in the flow rule.
10929 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10930 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10931 if (rss_types & ETH_RSS_UDP) {
10932 if (rss_types & ETH_RSS_L4_SRC_ONLY)
10933 dev_flow->hash_fields |=
10934 IBV_RX_HASH_SRC_PORT_UDP;
10935 else if (rss_types & ETH_RSS_L4_DST_ONLY)
10936 dev_flow->hash_fields |=
10937 IBV_RX_HASH_DST_PORT_UDP;
10939 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10941 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10942 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10943 if (rss_types & ETH_RSS_TCP) {
10944 if (rss_types & ETH_RSS_L4_SRC_ONLY)
10945 dev_flow->hash_fields |=
10946 IBV_RX_HASH_SRC_PORT_TCP;
10947 else if (rss_types & ETH_RSS_L4_DST_ONLY)
10948 dev_flow->hash_fields |=
10949 IBV_RX_HASH_DST_PORT_TCP;
10951 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10955 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10959 * Prepare an Rx Hash queue.
10962 * Pointer to Ethernet device.
10963 * @param[in] dev_flow
10964 * Pointer to the mlx5_flow.
10965 * @param[in] rss_desc
10966 * Pointer to the mlx5_flow_rss_desc.
10967 * @param[out] hrxq_idx
10968 * Hash Rx queue index.
10971 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10973 static struct mlx5_hrxq *
10974 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
10975 struct mlx5_flow *dev_flow,
10976 struct mlx5_flow_rss_desc *rss_desc,
10977 uint32_t *hrxq_idx)
10979 struct mlx5_priv *priv = dev->data->dev_private;
10980 struct mlx5_flow_handle *dh = dev_flow->handle;
10981 struct mlx5_hrxq *hrxq;
10983 MLX5_ASSERT(rss_desc->queue_num);
10984 rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
10985 rss_desc->hash_fields = dev_flow->hash_fields;
10986 rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
10987 rss_desc->shared_rss = 0;
10988 if (rss_desc->hash_fields == 0)
10989 rss_desc->queue_num = 1;
10990 *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
10993 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10999 * Release sample sub action resource.
11001 * @param[in, out] dev
11002 * Pointer to rte_eth_dev structure.
11003 * @param[in] act_res
11004 * Pointer to sample sub action resource.
11007 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
11008 struct mlx5_flow_sub_actions_idx *act_res)
11010 if (act_res->rix_hrxq) {
11011 mlx5_hrxq_release(dev, act_res->rix_hrxq);
11012 act_res->rix_hrxq = 0;
11014 if (act_res->rix_encap_decap) {
11015 flow_dv_encap_decap_resource_release(dev,
11016 act_res->rix_encap_decap);
11017 act_res->rix_encap_decap = 0;
11019 if (act_res->rix_port_id_action) {
11020 flow_dv_port_id_action_resource_release(dev,
11021 act_res->rix_port_id_action);
11022 act_res->rix_port_id_action = 0;
11024 if (act_res->rix_tag) {
11025 flow_dv_tag_release(dev, act_res->rix_tag);
11026 act_res->rix_tag = 0;
11028 if (act_res->rix_jump) {
11029 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
11030 act_res->rix_jump = 0;
11035 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
11036 struct mlx5_list_entry *entry, void *cb_ctx)
11038 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11039 struct rte_eth_dev *dev = ctx->dev;
11040 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11041 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11045 if (ctx_resource->ratio == resource->ratio &&
11046 ctx_resource->ft_type == resource->ft_type &&
11047 ctx_resource->ft_id == resource->ft_id &&
11048 ctx_resource->set_action == resource->set_action &&
11049 !memcmp((void *)&ctx_resource->sample_act,
11050 (void *)&resource->sample_act,
11051 sizeof(struct mlx5_flow_sub_actions_list))) {
11053 * Existing sample action should release the prepared
11054 * sub-actions reference counter.
11056 flow_dv_sample_sub_actions_release(dev,
11057 &ctx_resource->sample_idx);
11063 struct mlx5_list_entry *
11064 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11066 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11067 struct rte_eth_dev *dev = ctx->dev;
11068 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11069 void **sample_dv_actions = ctx_resource->sub_actions;
11070 struct mlx5_flow_dv_sample_resource *resource;
11071 struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11072 struct mlx5_priv *priv = dev->data->dev_private;
11073 struct mlx5_dev_ctx_shared *sh = priv->sh;
11074 struct mlx5_flow_tbl_resource *tbl;
11076 const uint32_t next_ft_step = 1;
11077 uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11078 uint8_t is_egress = 0;
11079 uint8_t is_transfer = 0;
11080 struct rte_flow_error *error = ctx->error;
11082 /* Register new sample resource. */
11083 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11085 rte_flow_error_set(error, ENOMEM,
11086 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11088 "cannot allocate resource memory");
11091 *resource = *ctx_resource;
11092 /* Create normal path table level */
11093 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11095 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11097 tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11098 is_egress, is_transfer,
11099 true, NULL, 0, 0, 0, error);
11101 rte_flow_error_set(error, ENOMEM,
11102 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11104 "fail to create normal path table "
11108 resource->normal_path_tbl = tbl;
11109 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11110 if (!sh->default_miss_action) {
11111 rte_flow_error_set(error, ENOMEM,
11112 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11114 "default miss action was not "
11118 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11119 sh->default_miss_action;
11121 /* Create a DR sample action */
11122 sampler_attr.sample_ratio = resource->ratio;
11123 sampler_attr.default_next_table = tbl->obj;
11124 sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11125 sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11126 &sample_dv_actions[0];
11127 sampler_attr.action = resource->set_action;
11128 if (mlx5_os_flow_dr_create_flow_action_sampler
11129 (&sampler_attr, &resource->verbs_action)) {
11130 rte_flow_error_set(error, ENOMEM,
11131 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11132 NULL, "cannot create sample action");
11135 resource->idx = idx;
11136 resource->dev = dev;
11137 return &resource->entry;
11139 if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11140 flow_dv_sample_sub_actions_release(dev,
11141 &resource->sample_idx);
11142 if (resource->normal_path_tbl)
11143 flow_dv_tbl_resource_release(MLX5_SH(dev),
11144 resource->normal_path_tbl);
11145 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11150 struct mlx5_list_entry *
11151 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11152 struct mlx5_list_entry *entry __rte_unused,
11155 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11156 struct rte_eth_dev *dev = ctx->dev;
11157 struct mlx5_flow_dv_sample_resource *resource;
11158 struct mlx5_priv *priv = dev->data->dev_private;
11159 struct mlx5_dev_ctx_shared *sh = priv->sh;
11162 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11164 rte_flow_error_set(ctx->error, ENOMEM,
11165 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11167 "cannot allocate resource memory");
11170 memcpy(resource, entry, sizeof(*resource));
11171 resource->idx = idx;
11172 resource->dev = dev;
11173 return &resource->entry;
11177 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11178 struct mlx5_list_entry *entry)
11180 struct mlx5_flow_dv_sample_resource *resource =
11181 container_of(entry, typeof(*resource), entry);
11182 struct rte_eth_dev *dev = resource->dev;
11183 struct mlx5_priv *priv = dev->data->dev_private;
11185 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11189 * Find existing sample resource or create and register a new one.
11191 * @param[in, out] dev
11192 * Pointer to rte_eth_dev structure.
11194 * Pointer to sample resource reference.
11195 * @parm[in, out] dev_flow
11196 * Pointer to the dev_flow.
11197 * @param[out] error
11198 * pointer to error structure.
11201 * 0 on success otherwise -errno and errno is set.
11204 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11205 struct mlx5_flow_dv_sample_resource *ref,
11206 struct mlx5_flow *dev_flow,
11207 struct rte_flow_error *error)
11209 struct mlx5_flow_dv_sample_resource *resource;
11210 struct mlx5_list_entry *entry;
11211 struct mlx5_priv *priv = dev->data->dev_private;
11212 struct mlx5_flow_cb_ctx ctx = {
11218 entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11221 resource = container_of(entry, typeof(*resource), entry);
11222 dev_flow->handle->dvh.rix_sample = resource->idx;
11223 dev_flow->dv.sample_res = resource;
11228 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11229 struct mlx5_list_entry *entry, void *cb_ctx)
11231 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11232 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11233 struct rte_eth_dev *dev = ctx->dev;
11234 struct mlx5_flow_dv_dest_array_resource *resource =
11235 container_of(entry, typeof(*resource), entry);
11238 if (ctx_resource->num_of_dest == resource->num_of_dest &&
11239 ctx_resource->ft_type == resource->ft_type &&
11240 !memcmp((void *)resource->sample_act,
11241 (void *)ctx_resource->sample_act,
11242 (ctx_resource->num_of_dest *
11243 sizeof(struct mlx5_flow_sub_actions_list)))) {
11245 * Existing sample action should release the prepared
11246 * sub-actions reference counter.
11248 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11249 flow_dv_sample_sub_actions_release(dev,
11250 &ctx_resource->sample_idx[idx]);
11256 struct mlx5_list_entry *
11257 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11259 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11260 struct rte_eth_dev *dev = ctx->dev;
11261 struct mlx5_flow_dv_dest_array_resource *resource;
11262 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11263 struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11264 struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11265 struct mlx5_priv *priv = dev->data->dev_private;
11266 struct mlx5_dev_ctx_shared *sh = priv->sh;
11267 struct mlx5_flow_sub_actions_list *sample_act;
11268 struct mlx5dv_dr_domain *domain;
11269 uint32_t idx = 0, res_idx = 0;
11270 struct rte_flow_error *error = ctx->error;
11271 uint64_t action_flags;
11274 /* Register new destination array resource. */
11275 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11278 rte_flow_error_set(error, ENOMEM,
11279 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11281 "cannot allocate resource memory");
11284 *resource = *ctx_resource;
11285 if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11286 domain = sh->fdb_domain;
11287 else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11288 domain = sh->rx_domain;
11290 domain = sh->tx_domain;
11291 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11292 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11293 mlx5_malloc(MLX5_MEM_ZERO,
11294 sizeof(struct mlx5dv_dr_action_dest_attr),
11296 if (!dest_attr[idx]) {
11297 rte_flow_error_set(error, ENOMEM,
11298 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11300 "cannot allocate resource memory");
11303 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11304 sample_act = &ctx_resource->sample_act[idx];
11305 action_flags = sample_act->action_flags;
11306 switch (action_flags) {
11307 case MLX5_FLOW_ACTION_QUEUE:
11308 dest_attr[idx]->dest = sample_act->dr_queue_action;
11310 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11311 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11312 dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11313 dest_attr[idx]->dest_reformat->reformat =
11314 sample_act->dr_encap_action;
11315 dest_attr[idx]->dest_reformat->dest =
11316 sample_act->dr_port_id_action;
11318 case MLX5_FLOW_ACTION_PORT_ID:
11319 dest_attr[idx]->dest = sample_act->dr_port_id_action;
11321 case MLX5_FLOW_ACTION_JUMP:
11322 dest_attr[idx]->dest = sample_act->dr_jump_action;
11325 rte_flow_error_set(error, EINVAL,
11326 RTE_FLOW_ERROR_TYPE_ACTION,
11328 "unsupported actions type");
11332 /* create a dest array actioin */
11333 ret = mlx5_os_flow_dr_create_flow_action_dest_array
11335 resource->num_of_dest,
11337 &resource->action);
11339 rte_flow_error_set(error, ENOMEM,
11340 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11342 "cannot create destination array action");
11345 resource->idx = res_idx;
11346 resource->dev = dev;
11347 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11348 mlx5_free(dest_attr[idx]);
11349 return &resource->entry;
11351 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11352 flow_dv_sample_sub_actions_release(dev,
11353 &resource->sample_idx[idx]);
11354 if (dest_attr[idx])
11355 mlx5_free(dest_attr[idx]);
11357 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11361 struct mlx5_list_entry *
11362 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11363 struct mlx5_list_entry *entry __rte_unused,
11366 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11367 struct rte_eth_dev *dev = ctx->dev;
11368 struct mlx5_flow_dv_dest_array_resource *resource;
11369 struct mlx5_priv *priv = dev->data->dev_private;
11370 struct mlx5_dev_ctx_shared *sh = priv->sh;
11371 uint32_t res_idx = 0;
11372 struct rte_flow_error *error = ctx->error;
11374 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11377 rte_flow_error_set(error, ENOMEM,
11378 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11380 "cannot allocate dest-array memory");
11383 memcpy(resource, entry, sizeof(*resource));
11384 resource->idx = res_idx;
11385 resource->dev = dev;
11386 return &resource->entry;
11390 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11391 struct mlx5_list_entry *entry)
11393 struct mlx5_flow_dv_dest_array_resource *resource =
11394 container_of(entry, typeof(*resource), entry);
11395 struct rte_eth_dev *dev = resource->dev;
11396 struct mlx5_priv *priv = dev->data->dev_private;
11398 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11402 * Find existing destination array resource or create and register a new one.
11404 * @param[in, out] dev
11405 * Pointer to rte_eth_dev structure.
11407 * Pointer to destination array resource reference.
11408 * @parm[in, out] dev_flow
11409 * Pointer to the dev_flow.
11410 * @param[out] error
11411 * pointer to error structure.
11414 * 0 on success otherwise -errno and errno is set.
11417 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11418 struct mlx5_flow_dv_dest_array_resource *ref,
11419 struct mlx5_flow *dev_flow,
11420 struct rte_flow_error *error)
11422 struct mlx5_flow_dv_dest_array_resource *resource;
11423 struct mlx5_priv *priv = dev->data->dev_private;
11424 struct mlx5_list_entry *entry;
11425 struct mlx5_flow_cb_ctx ctx = {
11431 entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11434 resource = container_of(entry, typeof(*resource), entry);
11435 dev_flow->handle->dvh.rix_dest_array = resource->idx;
11436 dev_flow->dv.dest_array_res = resource;
11441 * Convert Sample action to DV specification.
11444 * Pointer to rte_eth_dev structure.
11445 * @param[in] action
11446 * Pointer to sample action structure.
11447 * @param[in, out] dev_flow
11448 * Pointer to the mlx5_flow.
11450 * Pointer to the flow attributes.
11451 * @param[in, out] num_of_dest
11452 * Pointer to the num of destination.
11453 * @param[in, out] sample_actions
11454 * Pointer to sample actions list.
11455 * @param[in, out] res
11456 * Pointer to sample resource.
11457 * @param[out] error
11458 * Pointer to the error structure.
11461 * 0 on success, a negative errno value otherwise and rte_errno is set.
11464 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11465 const struct rte_flow_action_sample *action,
11466 struct mlx5_flow *dev_flow,
11467 const struct rte_flow_attr *attr,
11468 uint32_t *num_of_dest,
11469 void **sample_actions,
11470 struct mlx5_flow_dv_sample_resource *res,
11471 struct rte_flow_error *error)
11473 struct mlx5_priv *priv = dev->data->dev_private;
11474 const struct rte_flow_action *sub_actions;
11475 struct mlx5_flow_sub_actions_list *sample_act;
11476 struct mlx5_flow_sub_actions_idx *sample_idx;
11477 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11478 struct rte_flow *flow = dev_flow->flow;
11479 struct mlx5_flow_rss_desc *rss_desc;
11480 uint64_t action_flags = 0;
11483 rss_desc = &wks->rss_desc;
11484 sample_act = &res->sample_act;
11485 sample_idx = &res->sample_idx;
11486 res->ratio = action->ratio;
11487 sub_actions = action->actions;
11488 for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11489 int type = sub_actions->type;
11490 uint32_t pre_rix = 0;
11493 case RTE_FLOW_ACTION_TYPE_QUEUE:
11495 const struct rte_flow_action_queue *queue;
11496 struct mlx5_hrxq *hrxq;
11499 queue = sub_actions->conf;
11500 rss_desc->queue_num = 1;
11501 rss_desc->queue[0] = queue->index;
11502 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11503 rss_desc, &hrxq_idx);
11505 return rte_flow_error_set
11507 RTE_FLOW_ERROR_TYPE_ACTION,
11509 "cannot create fate queue");
11510 sample_act->dr_queue_action = hrxq->action;
11511 sample_idx->rix_hrxq = hrxq_idx;
11512 sample_actions[sample_act->actions_num++] =
11515 action_flags |= MLX5_FLOW_ACTION_QUEUE;
11516 if (action_flags & MLX5_FLOW_ACTION_MARK)
11517 dev_flow->handle->rix_hrxq = hrxq_idx;
11518 dev_flow->handle->fate_action =
11519 MLX5_FLOW_FATE_QUEUE;
11522 case RTE_FLOW_ACTION_TYPE_RSS:
11524 struct mlx5_hrxq *hrxq;
11526 const struct rte_flow_action_rss *rss;
11527 const uint8_t *rss_key;
11529 rss = sub_actions->conf;
11530 memcpy(rss_desc->queue, rss->queue,
11531 rss->queue_num * sizeof(uint16_t));
11532 rss_desc->queue_num = rss->queue_num;
11533 /* NULL RSS key indicates default RSS key. */
11534 rss_key = !rss->key ? rss_hash_default_key : rss->key;
11535 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11537 * rss->level and rss.types should be set in advance
11538 * when expanding items for RSS.
11540 flow_dv_hashfields_set(dev_flow, rss_desc);
11541 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11542 rss_desc, &hrxq_idx);
11544 return rte_flow_error_set
11546 RTE_FLOW_ERROR_TYPE_ACTION,
11548 "cannot create fate queue");
11549 sample_act->dr_queue_action = hrxq->action;
11550 sample_idx->rix_hrxq = hrxq_idx;
11551 sample_actions[sample_act->actions_num++] =
11554 action_flags |= MLX5_FLOW_ACTION_RSS;
11555 if (action_flags & MLX5_FLOW_ACTION_MARK)
11556 dev_flow->handle->rix_hrxq = hrxq_idx;
11557 dev_flow->handle->fate_action =
11558 MLX5_FLOW_FATE_QUEUE;
11561 case RTE_FLOW_ACTION_TYPE_MARK:
11563 uint32_t tag_be = mlx5_flow_mark_set
11564 (((const struct rte_flow_action_mark *)
11565 (sub_actions->conf))->id);
11567 dev_flow->handle->mark = 1;
11568 pre_rix = dev_flow->handle->dvh.rix_tag;
11569 /* Save the mark resource before sample */
11570 pre_r = dev_flow->dv.tag_resource;
11571 if (flow_dv_tag_resource_register(dev, tag_be,
11574 MLX5_ASSERT(dev_flow->dv.tag_resource);
11575 sample_act->dr_tag_action =
11576 dev_flow->dv.tag_resource->action;
11577 sample_idx->rix_tag =
11578 dev_flow->handle->dvh.rix_tag;
11579 sample_actions[sample_act->actions_num++] =
11580 sample_act->dr_tag_action;
11581 /* Recover the mark resource after sample */
11582 dev_flow->dv.tag_resource = pre_r;
11583 dev_flow->handle->dvh.rix_tag = pre_rix;
11584 action_flags |= MLX5_FLOW_ACTION_MARK;
11587 case RTE_FLOW_ACTION_TYPE_COUNT:
11589 if (!flow->counter) {
11591 flow_dv_translate_create_counter(dev,
11592 dev_flow, sub_actions->conf,
11594 if (!flow->counter)
11595 return rte_flow_error_set
11597 RTE_FLOW_ERROR_TYPE_ACTION,
11599 "cannot create counter"
11602 sample_act->dr_cnt_action =
11603 (flow_dv_counter_get_by_idx(dev,
11604 flow->counter, NULL))->action;
11605 sample_actions[sample_act->actions_num++] =
11606 sample_act->dr_cnt_action;
11607 action_flags |= MLX5_FLOW_ACTION_COUNT;
11610 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11612 struct mlx5_flow_dv_port_id_action_resource
11614 uint32_t port_id = 0;
11616 memset(&port_id_resource, 0, sizeof(port_id_resource));
11617 /* Save the port id resource before sample */
11618 pre_rix = dev_flow->handle->rix_port_id_action;
11619 pre_r = dev_flow->dv.port_id_action;
11620 if (flow_dv_translate_action_port_id(dev, sub_actions,
11623 port_id_resource.port_id = port_id;
11624 if (flow_dv_port_id_action_resource_register
11625 (dev, &port_id_resource, dev_flow, error))
11627 sample_act->dr_port_id_action =
11628 dev_flow->dv.port_id_action->action;
11629 sample_idx->rix_port_id_action =
11630 dev_flow->handle->rix_port_id_action;
11631 sample_actions[sample_act->actions_num++] =
11632 sample_act->dr_port_id_action;
11633 /* Recover the port id resource after sample */
11634 dev_flow->dv.port_id_action = pre_r;
11635 dev_flow->handle->rix_port_id_action = pre_rix;
11637 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11640 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11641 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11642 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11643 /* Save the encap resource before sample */
11644 pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11645 pre_r = dev_flow->dv.encap_decap;
11646 if (flow_dv_create_action_l2_encap(dev, sub_actions,
11651 sample_act->dr_encap_action =
11652 dev_flow->dv.encap_decap->action;
11653 sample_idx->rix_encap_decap =
11654 dev_flow->handle->dvh.rix_encap_decap;
11655 sample_actions[sample_act->actions_num++] =
11656 sample_act->dr_encap_action;
11657 /* Recover the encap resource after sample */
11658 dev_flow->dv.encap_decap = pre_r;
11659 dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11660 action_flags |= MLX5_FLOW_ACTION_ENCAP;
11663 return rte_flow_error_set(error, EINVAL,
11664 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11666 "Not support for sampler action");
11669 sample_act->action_flags = action_flags;
11670 res->ft_id = dev_flow->dv.group;
11671 if (attr->transfer) {
11673 uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11674 uint64_t set_action;
11675 } action_ctx = { .set_action = 0 };
11677 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11678 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11679 MLX5_MODIFICATION_TYPE_SET);
11680 MLX5_SET(set_action_in, action_ctx.action_in, field,
11681 MLX5_MODI_META_REG_C_0);
11682 MLX5_SET(set_action_in, action_ctx.action_in, data,
11683 priv->vport_meta_tag);
11684 res->set_action = action_ctx.set_action;
11685 } else if (attr->ingress) {
11686 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11688 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11694 * Convert Sample action to DV specification.
11697 * Pointer to rte_eth_dev structure.
11698 * @param[in, out] dev_flow
11699 * Pointer to the mlx5_flow.
11700 * @param[in] num_of_dest
11701 * The num of destination.
11702 * @param[in, out] res
11703 * Pointer to sample resource.
11704 * @param[in, out] mdest_res
11705 * Pointer to destination array resource.
11706 * @param[in] sample_actions
11707 * Pointer to sample path actions list.
11708 * @param[in] action_flags
11709 * Holds the actions detected until now.
11710 * @param[out] error
11711 * Pointer to the error structure.
11714 * 0 on success, a negative errno value otherwise and rte_errno is set.
11717 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11718 struct mlx5_flow *dev_flow,
11719 uint32_t num_of_dest,
11720 struct mlx5_flow_dv_sample_resource *res,
11721 struct mlx5_flow_dv_dest_array_resource *mdest_res,
11722 void **sample_actions,
11723 uint64_t action_flags,
11724 struct rte_flow_error *error)
11726 /* update normal path action resource into last index of array */
11727 uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11728 struct mlx5_flow_sub_actions_list *sample_act =
11729 &mdest_res->sample_act[dest_index];
11730 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11731 struct mlx5_flow_rss_desc *rss_desc;
11732 uint32_t normal_idx = 0;
11733 struct mlx5_hrxq *hrxq;
11737 rss_desc = &wks->rss_desc;
11738 if (num_of_dest > 1) {
11739 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11740 /* Handle QP action for mirroring */
11741 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11742 rss_desc, &hrxq_idx);
11744 return rte_flow_error_set
11746 RTE_FLOW_ERROR_TYPE_ACTION,
11748 "cannot create rx queue");
11750 mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11751 sample_act->dr_queue_action = hrxq->action;
11752 if (action_flags & MLX5_FLOW_ACTION_MARK)
11753 dev_flow->handle->rix_hrxq = hrxq_idx;
11754 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11756 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11758 mdest_res->sample_idx[dest_index].rix_encap_decap =
11759 dev_flow->handle->dvh.rix_encap_decap;
11760 sample_act->dr_encap_action =
11761 dev_flow->dv.encap_decap->action;
11762 dev_flow->handle->dvh.rix_encap_decap = 0;
11764 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11766 mdest_res->sample_idx[dest_index].rix_port_id_action =
11767 dev_flow->handle->rix_port_id_action;
11768 sample_act->dr_port_id_action =
11769 dev_flow->dv.port_id_action->action;
11770 dev_flow->handle->rix_port_id_action = 0;
11772 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11774 mdest_res->sample_idx[dest_index].rix_jump =
11775 dev_flow->handle->rix_jump;
11776 sample_act->dr_jump_action =
11777 dev_flow->dv.jump->action;
11778 dev_flow->handle->rix_jump = 0;
11780 sample_act->actions_num = normal_idx;
11781 /* update sample action resource into first index of array */
11782 mdest_res->ft_type = res->ft_type;
11783 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11784 sizeof(struct mlx5_flow_sub_actions_idx));
11785 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11786 sizeof(struct mlx5_flow_sub_actions_list));
11787 mdest_res->num_of_dest = num_of_dest;
11788 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11790 return rte_flow_error_set(error, EINVAL,
11791 RTE_FLOW_ERROR_TYPE_ACTION,
11792 NULL, "can't create sample "
11795 res->sub_actions = sample_actions;
11796 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11797 return rte_flow_error_set(error, EINVAL,
11798 RTE_FLOW_ERROR_TYPE_ACTION,
11800 "can't create sample action");
11806 * Remove an ASO age action from age actions list.
11809 * Pointer to the Ethernet device structure.
11811 * Pointer to the aso age action handler.
11814 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11815 struct mlx5_aso_age_action *age)
11817 struct mlx5_age_info *age_info;
11818 struct mlx5_age_param *age_param = &age->age_params;
11819 struct mlx5_priv *priv = dev->data->dev_private;
11820 uint16_t expected = AGE_CANDIDATE;
11822 age_info = GET_PORT_AGE_INFO(priv);
11823 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11824 AGE_FREE, false, __ATOMIC_RELAXED,
11825 __ATOMIC_RELAXED)) {
11827 * We need the lock even it is age timeout,
11828 * since age action may still in process.
11830 rte_spinlock_lock(&age_info->aged_sl);
11831 LIST_REMOVE(age, next);
11832 rte_spinlock_unlock(&age_info->aged_sl);
11833 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11838 * Release an ASO age action.
11841 * Pointer to the Ethernet device structure.
11842 * @param[in] age_idx
11843 * Index of ASO age action to release.
11845 * True if the release operation is during flow destroy operation.
11846 * False if the release operation is during action destroy operation.
11849 * 0 when age action was removed, otherwise the number of references.
11852 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11854 struct mlx5_priv *priv = dev->data->dev_private;
11855 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11856 struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11857 uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11860 flow_dv_aso_age_remove_from_age(dev, age);
11861 rte_spinlock_lock(&mng->free_sl);
11862 LIST_INSERT_HEAD(&mng->free, age, next);
11863 rte_spinlock_unlock(&mng->free_sl);
11869 * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11872 * Pointer to the Ethernet device structure.
11875 * 0 on success, otherwise negative errno value and rte_errno is set.
11878 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11880 struct mlx5_priv *priv = dev->data->dev_private;
11881 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11882 void *old_pools = mng->pools;
11883 uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11884 uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11885 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11888 rte_errno = ENOMEM;
11892 memcpy(pools, old_pools,
11893 mng->n * sizeof(struct mlx5_flow_counter_pool *));
11894 mlx5_free(old_pools);
11896 /* First ASO flow hit allocation - starting ASO data-path. */
11897 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11905 mng->pools = pools;
11910 * Create and initialize a new ASO aging pool.
11913 * Pointer to the Ethernet device structure.
11914 * @param[out] age_free
11915 * Where to put the pointer of a new age action.
11918 * The age actions pool pointer and @p age_free is set on success,
11919 * NULL otherwise and rte_errno is set.
11921 static struct mlx5_aso_age_pool *
11922 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11923 struct mlx5_aso_age_action **age_free)
11925 struct mlx5_priv *priv = dev->data->dev_private;
11926 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11927 struct mlx5_aso_age_pool *pool = NULL;
11928 struct mlx5_devx_obj *obj = NULL;
11931 obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->ctx,
11934 rte_errno = ENODATA;
11935 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11938 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11940 claim_zero(mlx5_devx_cmd_destroy(obj));
11941 rte_errno = ENOMEM;
11944 pool->flow_hit_aso_obj = obj;
11945 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11946 rte_spinlock_lock(&mng->resize_sl);
11947 pool->index = mng->next;
11948 /* Resize pools array if there is no room for the new pool in it. */
11949 if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11950 claim_zero(mlx5_devx_cmd_destroy(obj));
11952 rte_spinlock_unlock(&mng->resize_sl);
11955 mng->pools[pool->index] = pool;
11957 rte_spinlock_unlock(&mng->resize_sl);
11958 /* Assign the first action in the new pool, the rest go to free list. */
11959 *age_free = &pool->actions[0];
11960 for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11961 pool->actions[i].offset = i;
11962 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11968 * Allocate a ASO aging bit.
11971 * Pointer to the Ethernet device structure.
11972 * @param[out] error
11973 * Pointer to the error structure.
11976 * Index to ASO age action on success, 0 otherwise and rte_errno is set.
11979 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11981 struct mlx5_priv *priv = dev->data->dev_private;
11982 const struct mlx5_aso_age_pool *pool;
11983 struct mlx5_aso_age_action *age_free = NULL;
11984 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11987 /* Try to get the next free age action bit. */
11988 rte_spinlock_lock(&mng->free_sl);
11989 age_free = LIST_FIRST(&mng->free);
11991 LIST_REMOVE(age_free, next);
11992 } else if (!flow_dv_age_pool_create(dev, &age_free)) {
11993 rte_spinlock_unlock(&mng->free_sl);
11994 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11995 NULL, "failed to create ASO age pool");
11996 return 0; /* 0 is an error. */
11998 rte_spinlock_unlock(&mng->free_sl);
11999 pool = container_of
12000 ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
12001 (age_free - age_free->offset), const struct mlx5_aso_age_pool,
12003 if (!age_free->dr_action) {
12004 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
12008 rte_flow_error_set(error, rte_errno,
12009 RTE_FLOW_ERROR_TYPE_ACTION,
12010 NULL, "failed to get reg_c "
12011 "for ASO flow hit");
12012 return 0; /* 0 is an error. */
12014 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
12015 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
12016 (priv->sh->rx_domain,
12017 pool->flow_hit_aso_obj->obj, age_free->offset,
12018 MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
12019 (reg_c - REG_C_0));
12020 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
12021 if (!age_free->dr_action) {
12023 rte_spinlock_lock(&mng->free_sl);
12024 LIST_INSERT_HEAD(&mng->free, age_free, next);
12025 rte_spinlock_unlock(&mng->free_sl);
12026 rte_flow_error_set(error, rte_errno,
12027 RTE_FLOW_ERROR_TYPE_ACTION,
12028 NULL, "failed to create ASO "
12029 "flow hit action");
12030 return 0; /* 0 is an error. */
12033 __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
12034 return pool->index | ((age_free->offset + 1) << 16);
12038 * Initialize flow ASO age parameters.
12041 * Pointer to rte_eth_dev structure.
12042 * @param[in] age_idx
12043 * Index of ASO age action.
12044 * @param[in] context
12045 * Pointer to flow counter age context.
12046 * @param[in] timeout
12047 * Aging timeout in seconds.
12051 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12056 struct mlx5_aso_age_action *aso_age;
12058 aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12059 MLX5_ASSERT(aso_age);
12060 aso_age->age_params.context = context;
12061 aso_age->age_params.timeout = timeout;
12062 aso_age->age_params.port_id = dev->data->port_id;
12063 __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12065 __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12070 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12071 const struct rte_flow_item_integrity *value,
12072 void *headers_m, void *headers_v)
12075 /* application l4_ok filter aggregates all hardware l4 filters
12076 * therefore hw l4_checksum_ok must be implicitly added here.
12078 struct rte_flow_item_integrity local_item;
12080 local_item.l4_csum_ok = 1;
12081 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12082 local_item.l4_csum_ok);
12083 if (value->l4_ok) {
12084 /* application l4_ok = 1 matches sets both hw flags
12085 * l4_ok and l4_checksum_ok flags to 1.
12087 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12088 l4_checksum_ok, local_item.l4_csum_ok);
12089 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
12091 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
12094 /* application l4_ok = 0 matches on hw flag
12095 * l4_checksum_ok = 0 only.
12097 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12098 l4_checksum_ok, 0);
12100 } else if (mask->l4_csum_ok) {
12101 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12103 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12104 value->l4_csum_ok);
12109 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12110 const struct rte_flow_item_integrity *value,
12111 void *headers_m, void *headers_v,
12115 /* application l3_ok filter aggregates all hardware l3 filters
12116 * therefore hw ipv4_checksum_ok must be implicitly added here.
12118 struct rte_flow_item_integrity local_item;
12120 local_item.ipv4_csum_ok = !!is_ipv4;
12121 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12122 local_item.ipv4_csum_ok);
12123 if (value->l3_ok) {
12124 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12125 ipv4_checksum_ok, local_item.ipv4_csum_ok);
12126 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
12128 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12131 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12132 ipv4_checksum_ok, 0);
12134 } else if (mask->ipv4_csum_ok) {
12135 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12136 mask->ipv4_csum_ok);
12137 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12138 value->ipv4_csum_ok);
12143 flow_dv_translate_item_integrity(void *matcher, void *key,
12144 const struct rte_flow_item *head_item,
12145 const struct rte_flow_item *integrity_item)
12147 const struct rte_flow_item_integrity *mask = integrity_item->mask;
12148 const struct rte_flow_item_integrity *value = integrity_item->spec;
12149 const struct rte_flow_item *tunnel_item, *end_item, *item;
12152 uint32_t l3_protocol;
12157 mask = &rte_flow_item_integrity_mask;
12158 if (value->level > 1) {
12159 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12161 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12163 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12165 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12167 tunnel_item = mlx5_flow_find_tunnel_item(head_item);
12168 if (value->level > 1) {
12169 /* tunnel item was verified during the item validation */
12170 item = tunnel_item;
12171 end_item = mlx5_find_end_item(tunnel_item);
12174 end_item = tunnel_item ? tunnel_item :
12175 mlx5_find_end_item(integrity_item);
12177 l3_protocol = mask->l3_ok ?
12178 mlx5_flow_locate_proto_l3(&item, end_item) : 0;
12179 flow_dv_translate_integrity_l3(mask, value, headers_m, headers_v,
12180 l3_protocol == RTE_ETHER_TYPE_IPV4);
12181 flow_dv_translate_integrity_l4(mask, value, headers_m, headers_v);
12185 * Prepares DV flow counter with aging configuration.
12186 * Gets it by index when exists, creates a new one when doesn't.
12189 * Pointer to rte_eth_dev structure.
12190 * @param[in] dev_flow
12191 * Pointer to the mlx5_flow.
12192 * @param[in, out] flow
12193 * Pointer to the sub flow.
12195 * Pointer to the counter action configuration.
12197 * Pointer to the aging action configuration.
12198 * @param[out] error
12199 * Pointer to the error structure.
12202 * Pointer to the counter, NULL otherwise.
12204 static struct mlx5_flow_counter *
12205 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12206 struct mlx5_flow *dev_flow,
12207 struct rte_flow *flow,
12208 const struct rte_flow_action_count *count,
12209 const struct rte_flow_action_age *age,
12210 struct rte_flow_error *error)
12212 if (!flow->counter) {
12213 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12215 if (!flow->counter) {
12216 rte_flow_error_set(error, rte_errno,
12217 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12218 "cannot create counter object.");
12222 return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12226 * Release an ASO CT action by its own device.
12229 * Pointer to the Ethernet device structure.
12231 * Index of ASO CT action to release.
12234 * 0 when CT action was removed, otherwise the number of references.
12237 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12239 struct mlx5_priv *priv = dev->data->dev_private;
12240 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12242 struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12243 enum mlx5_aso_ct_state state =
12244 __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12246 /* Cannot release when CT is in the ASO SQ. */
12247 if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12249 ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12251 if (ct->dr_action_orig) {
12252 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12253 claim_zero(mlx5_glue->destroy_flow_action
12254 (ct->dr_action_orig));
12256 ct->dr_action_orig = NULL;
12258 if (ct->dr_action_rply) {
12259 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12260 claim_zero(mlx5_glue->destroy_flow_action
12261 (ct->dr_action_rply));
12263 ct->dr_action_rply = NULL;
12265 /* Clear the state to free, no need in 1st allocation. */
12266 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12267 rte_spinlock_lock(&mng->ct_sl);
12268 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12269 rte_spinlock_unlock(&mng->ct_sl);
12275 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx)
12277 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12278 uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12279 struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12282 MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12283 if (dev->data->dev_started != 1)
12285 return flow_dv_aso_ct_dev_release(owndev, idx);
12289 * Resize the ASO CT pools array by 64 pools.
12292 * Pointer to the Ethernet device structure.
12295 * 0 on success, otherwise negative errno value and rte_errno is set.
12298 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12300 struct mlx5_priv *priv = dev->data->dev_private;
12301 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12302 void *old_pools = mng->pools;
12303 /* Magic number now, need a macro. */
12304 uint32_t resize = mng->n + 64;
12305 uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12306 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12309 rte_errno = ENOMEM;
12312 rte_rwlock_write_lock(&mng->resize_rwl);
12313 /* ASO SQ/QP was already initialized in the startup. */
12315 /* Realloc could be an alternative choice. */
12316 rte_memcpy(pools, old_pools,
12317 mng->n * sizeof(struct mlx5_aso_ct_pool *));
12318 mlx5_free(old_pools);
12321 mng->pools = pools;
12322 rte_rwlock_write_unlock(&mng->resize_rwl);
12327 * Create and initialize a new ASO CT pool.
12330 * Pointer to the Ethernet device structure.
12331 * @param[out] ct_free
12332 * Where to put the pointer of a new CT action.
12335 * The CT actions pool pointer and @p ct_free is set on success,
12336 * NULL otherwise and rte_errno is set.
12338 static struct mlx5_aso_ct_pool *
12339 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12340 struct mlx5_aso_ct_action **ct_free)
12342 struct mlx5_priv *priv = dev->data->dev_private;
12343 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12344 struct mlx5_aso_ct_pool *pool = NULL;
12345 struct mlx5_devx_obj *obj = NULL;
12347 uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12349 obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->ctx,
12350 priv->sh->pdn, log_obj_size);
12352 rte_errno = ENODATA;
12353 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12356 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12358 rte_errno = ENOMEM;
12359 claim_zero(mlx5_devx_cmd_destroy(obj));
12362 pool->devx_obj = obj;
12363 pool->index = mng->next;
12364 /* Resize pools array if there is no room for the new pool in it. */
12365 if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12366 claim_zero(mlx5_devx_cmd_destroy(obj));
12370 mng->pools[pool->index] = pool;
12372 /* Assign the first action in the new pool, the rest go to free list. */
12373 *ct_free = &pool->actions[0];
12374 /* Lock outside, the list operation is safe here. */
12375 for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12376 /* refcnt is 0 when allocating the memory. */
12377 pool->actions[i].offset = i;
12378 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12384 * Allocate a ASO CT action from free list.
12387 * Pointer to the Ethernet device structure.
12388 * @param[out] error
12389 * Pointer to the error structure.
12392 * Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12395 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12397 struct mlx5_priv *priv = dev->data->dev_private;
12398 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12399 struct mlx5_aso_ct_action *ct = NULL;
12400 struct mlx5_aso_ct_pool *pool;
12405 if (!priv->config.devx) {
12406 rte_errno = ENOTSUP;
12409 /* Get a free CT action, if no, a new pool will be created. */
12410 rte_spinlock_lock(&mng->ct_sl);
12411 ct = LIST_FIRST(&mng->free_cts);
12413 LIST_REMOVE(ct, next);
12414 } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12415 rte_spinlock_unlock(&mng->ct_sl);
12416 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12417 NULL, "failed to create ASO CT pool");
12420 rte_spinlock_unlock(&mng->ct_sl);
12421 pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12422 ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12423 /* 0: inactive, 1: created, 2+: used by flows. */
12424 __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12425 reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12426 if (!ct->dr_action_orig) {
12427 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12428 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12429 (priv->sh->rx_domain, pool->devx_obj->obj,
12431 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12434 RTE_SET_USED(reg_c);
12436 if (!ct->dr_action_orig) {
12437 flow_dv_aso_ct_dev_release(dev, ct_idx);
12438 rte_flow_error_set(error, rte_errno,
12439 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12440 "failed to create ASO CT action");
12444 if (!ct->dr_action_rply) {
12445 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12446 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12447 (priv->sh->rx_domain, pool->devx_obj->obj,
12449 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12452 if (!ct->dr_action_rply) {
12453 flow_dv_aso_ct_dev_release(dev, ct_idx);
12454 rte_flow_error_set(error, rte_errno,
12455 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12456 "failed to create ASO CT action");
12464 * Create a conntrack object with context and actions by using ASO mechanism.
12467 * Pointer to rte_eth_dev structure.
12469 * Pointer to conntrack information profile.
12470 * @param[out] error
12471 * Pointer to the error structure.
12474 * Index to conntrack object on success, 0 otherwise.
12477 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12478 const struct rte_flow_action_conntrack *pro,
12479 struct rte_flow_error *error)
12481 struct mlx5_priv *priv = dev->data->dev_private;
12482 struct mlx5_dev_ctx_shared *sh = priv->sh;
12483 struct mlx5_aso_ct_action *ct;
12486 if (!sh->ct_aso_en)
12487 return rte_flow_error_set(error, ENOTSUP,
12488 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12489 "Connection is not supported");
12490 idx = flow_dv_aso_ct_alloc(dev, error);
12492 return rte_flow_error_set(error, rte_errno,
12493 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12494 "Failed to allocate CT object");
12495 ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12496 if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12497 return rte_flow_error_set(error, EBUSY,
12498 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12499 "Failed to update CT");
12500 ct->is_original = !!pro->is_original_dir;
12501 ct->peer = pro->peer_port;
12506 * Fill the flow with DV spec, lock free
12507 * (mutex should be acquired by caller).
12510 * Pointer to rte_eth_dev structure.
12511 * @param[in, out] dev_flow
12512 * Pointer to the sub flow.
12514 * Pointer to the flow attributes.
12516 * Pointer to the list of items.
12517 * @param[in] actions
12518 * Pointer to the list of actions.
12519 * @param[out] error
12520 * Pointer to the error structure.
12523 * 0 on success, a negative errno value otherwise and rte_errno is set.
12526 flow_dv_translate(struct rte_eth_dev *dev,
12527 struct mlx5_flow *dev_flow,
12528 const struct rte_flow_attr *attr,
12529 const struct rte_flow_item items[],
12530 const struct rte_flow_action actions[],
12531 struct rte_flow_error *error)
12533 struct mlx5_priv *priv = dev->data->dev_private;
12534 struct mlx5_dev_config *dev_conf = &priv->config;
12535 struct rte_flow *flow = dev_flow->flow;
12536 struct mlx5_flow_handle *handle = dev_flow->handle;
12537 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12538 struct mlx5_flow_rss_desc *rss_desc;
12539 uint64_t item_flags = 0;
12540 uint64_t last_item = 0;
12541 uint64_t action_flags = 0;
12542 struct mlx5_flow_dv_matcher matcher = {
12544 .size = sizeof(matcher.mask.buf),
12548 bool actions_end = false;
12550 struct mlx5_flow_dv_modify_hdr_resource res;
12551 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12552 sizeof(struct mlx5_modification_cmd) *
12553 (MLX5_MAX_MODIFY_NUM + 1)];
12555 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12556 const struct rte_flow_action_count *count = NULL;
12557 const struct rte_flow_action_age *non_shared_age = NULL;
12558 union flow_dv_attr flow_attr = { .attr = 0 };
12560 union mlx5_flow_tbl_key tbl_key;
12561 uint32_t modify_action_position = UINT32_MAX;
12562 void *match_mask = matcher.mask.buf;
12563 void *match_value = dev_flow->dv.value.buf;
12564 uint8_t next_protocol = 0xff;
12565 struct rte_vlan_hdr vlan = { 0 };
12566 struct mlx5_flow_dv_dest_array_resource mdest_res;
12567 struct mlx5_flow_dv_sample_resource sample_res;
12568 void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12569 const struct rte_flow_action_sample *sample = NULL;
12570 struct mlx5_flow_sub_actions_list *sample_act;
12571 uint32_t sample_act_pos = UINT32_MAX;
12572 uint32_t age_act_pos = UINT32_MAX;
12573 uint32_t num_of_dest = 0;
12574 int tmp_actions_n = 0;
12577 const struct mlx5_flow_tunnel *tunnel = NULL;
12578 struct flow_grp_info grp_info = {
12579 .external = !!dev_flow->external,
12580 .transfer = !!attr->transfer,
12581 .fdb_def_rule = !!priv->fdb_def_rule,
12582 .skip_scale = dev_flow->skip_scale &
12583 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12584 .std_tbl_fix = true,
12586 const struct rte_flow_item *head_item = items;
12589 return rte_flow_error_set(error, ENOMEM,
12590 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12592 "failed to push flow workspace");
12593 rss_desc = &wks->rss_desc;
12594 memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12595 memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12596 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12597 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12598 /* update normal path action resource into last index of array */
12599 sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12600 if (is_tunnel_offload_active(dev)) {
12601 if (dev_flow->tunnel) {
12602 RTE_VERIFY(dev_flow->tof_type ==
12603 MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12604 tunnel = dev_flow->tunnel;
12606 tunnel = mlx5_get_tof(items, actions,
12607 &dev_flow->tof_type);
12608 dev_flow->tunnel = tunnel;
12610 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12611 (dev, attr, tunnel, dev_flow->tof_type);
12613 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12614 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12615 ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12619 dev_flow->dv.group = table;
12620 if (attr->transfer)
12621 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12622 /* number of actions must be set to 0 in case of dirty stack. */
12623 mhdr_res->actions_num = 0;
12624 if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12626 * do not add decap action if match rule drops packet
12627 * HW rejects rules with decap & drop
12629 * if tunnel match rule was inserted before matching tunnel set
12630 * rule flow table used in the match rule must be registered.
12631 * current implementation handles that in the
12632 * flow_dv_match_register() at the function end.
12634 bool add_decap = true;
12635 const struct rte_flow_action *ptr = actions;
12637 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12638 if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12644 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12648 dev_flow->dv.actions[actions_n++] =
12649 dev_flow->dv.encap_decap->action;
12650 action_flags |= MLX5_FLOW_ACTION_DECAP;
12653 for (; !actions_end ; actions++) {
12654 const struct rte_flow_action_queue *queue;
12655 const struct rte_flow_action_rss *rss;
12656 const struct rte_flow_action *action = actions;
12657 const uint8_t *rss_key;
12658 struct mlx5_flow_tbl_resource *tbl;
12659 struct mlx5_aso_age_action *age_act;
12660 struct mlx5_flow_counter *cnt_act;
12661 uint32_t port_id = 0;
12662 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12663 int action_type = actions->type;
12664 const struct rte_flow_action *found_action = NULL;
12665 uint32_t jump_group = 0;
12666 uint32_t owner_idx;
12667 struct mlx5_aso_ct_action *ct;
12669 if (!mlx5_flow_os_action_supported(action_type))
12670 return rte_flow_error_set(error, ENOTSUP,
12671 RTE_FLOW_ERROR_TYPE_ACTION,
12673 "action not supported");
12674 switch (action_type) {
12675 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12676 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12678 case RTE_FLOW_ACTION_TYPE_VOID:
12680 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12681 if (flow_dv_translate_action_port_id(dev, action,
12684 port_id_resource.port_id = port_id;
12685 MLX5_ASSERT(!handle->rix_port_id_action);
12686 if (flow_dv_port_id_action_resource_register
12687 (dev, &port_id_resource, dev_flow, error))
12689 dev_flow->dv.actions[actions_n++] =
12690 dev_flow->dv.port_id_action->action;
12691 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12692 dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12693 sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12696 case RTE_FLOW_ACTION_TYPE_FLAG:
12697 action_flags |= MLX5_FLOW_ACTION_FLAG;
12698 dev_flow->handle->mark = 1;
12699 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12700 struct rte_flow_action_mark mark = {
12701 .id = MLX5_FLOW_MARK_DEFAULT,
12704 if (flow_dv_convert_action_mark(dev, &mark,
12708 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12711 tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12713 * Only one FLAG or MARK is supported per device flow
12714 * right now. So the pointer to the tag resource must be
12715 * zero before the register process.
12717 MLX5_ASSERT(!handle->dvh.rix_tag);
12718 if (flow_dv_tag_resource_register(dev, tag_be,
12721 MLX5_ASSERT(dev_flow->dv.tag_resource);
12722 dev_flow->dv.actions[actions_n++] =
12723 dev_flow->dv.tag_resource->action;
12725 case RTE_FLOW_ACTION_TYPE_MARK:
12726 action_flags |= MLX5_FLOW_ACTION_MARK;
12727 dev_flow->handle->mark = 1;
12728 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12729 const struct rte_flow_action_mark *mark =
12730 (const struct rte_flow_action_mark *)
12733 if (flow_dv_convert_action_mark(dev, mark,
12737 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12741 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12742 /* Legacy (non-extensive) MARK action. */
12743 tag_be = mlx5_flow_mark_set
12744 (((const struct rte_flow_action_mark *)
12745 (actions->conf))->id);
12746 MLX5_ASSERT(!handle->dvh.rix_tag);
12747 if (flow_dv_tag_resource_register(dev, tag_be,
12750 MLX5_ASSERT(dev_flow->dv.tag_resource);
12751 dev_flow->dv.actions[actions_n++] =
12752 dev_flow->dv.tag_resource->action;
12754 case RTE_FLOW_ACTION_TYPE_SET_META:
12755 if (flow_dv_convert_action_set_meta
12756 (dev, mhdr_res, attr,
12757 (const struct rte_flow_action_set_meta *)
12758 actions->conf, error))
12760 action_flags |= MLX5_FLOW_ACTION_SET_META;
12762 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12763 if (flow_dv_convert_action_set_tag
12765 (const struct rte_flow_action_set_tag *)
12766 actions->conf, error))
12768 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12770 case RTE_FLOW_ACTION_TYPE_DROP:
12771 action_flags |= MLX5_FLOW_ACTION_DROP;
12772 dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12774 case RTE_FLOW_ACTION_TYPE_QUEUE:
12775 queue = actions->conf;
12776 rss_desc->queue_num = 1;
12777 rss_desc->queue[0] = queue->index;
12778 action_flags |= MLX5_FLOW_ACTION_QUEUE;
12779 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12780 sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12783 case RTE_FLOW_ACTION_TYPE_RSS:
12784 rss = actions->conf;
12785 memcpy(rss_desc->queue, rss->queue,
12786 rss->queue_num * sizeof(uint16_t));
12787 rss_desc->queue_num = rss->queue_num;
12788 /* NULL RSS key indicates default RSS key. */
12789 rss_key = !rss->key ? rss_hash_default_key : rss->key;
12790 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12792 * rss->level and rss.types should be set in advance
12793 * when expanding items for RSS.
12795 action_flags |= MLX5_FLOW_ACTION_RSS;
12796 dev_flow->handle->fate_action = rss_desc->shared_rss ?
12797 MLX5_FLOW_FATE_SHARED_RSS :
12798 MLX5_FLOW_FATE_QUEUE;
12800 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12801 flow->age = (uint32_t)(uintptr_t)(action->conf);
12802 age_act = flow_aso_age_get_by_idx(dev, flow->age);
12803 __atomic_fetch_add(&age_act->refcnt, 1,
12805 age_act_pos = actions_n++;
12806 action_flags |= MLX5_FLOW_ACTION_AGE;
12808 case RTE_FLOW_ACTION_TYPE_AGE:
12809 non_shared_age = action->conf;
12810 age_act_pos = actions_n++;
12811 action_flags |= MLX5_FLOW_ACTION_AGE;
12813 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12814 flow->counter = (uint32_t)(uintptr_t)(action->conf);
12815 cnt_act = flow_dv_counter_get_by_idx(dev, flow->counter,
12817 __atomic_fetch_add(&cnt_act->shared_info.refcnt, 1,
12819 /* Save information first, will apply later. */
12820 action_flags |= MLX5_FLOW_ACTION_COUNT;
12822 case RTE_FLOW_ACTION_TYPE_COUNT:
12823 if (!dev_conf->devx) {
12824 return rte_flow_error_set
12826 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12828 "count action not supported");
12830 /* Save information first, will apply later. */
12831 count = action->conf;
12832 action_flags |= MLX5_FLOW_ACTION_COUNT;
12834 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12835 dev_flow->dv.actions[actions_n++] =
12836 priv->sh->pop_vlan_action;
12837 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12839 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12840 if (!(action_flags &
12841 MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12842 flow_dev_get_vlan_info_from_items(items, &vlan);
12843 vlan.eth_proto = rte_be_to_cpu_16
12844 ((((const struct rte_flow_action_of_push_vlan *)
12845 actions->conf)->ethertype));
12846 found_action = mlx5_flow_find_action
12848 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12850 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12851 found_action = mlx5_flow_find_action
12853 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12855 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12856 if (flow_dv_create_action_push_vlan
12857 (dev, attr, &vlan, dev_flow, error))
12859 dev_flow->dv.actions[actions_n++] =
12860 dev_flow->dv.push_vlan_res->action;
12861 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12863 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12864 /* of_vlan_push action handled this action */
12865 MLX5_ASSERT(action_flags &
12866 MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12868 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12869 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12871 flow_dev_get_vlan_info_from_items(items, &vlan);
12872 mlx5_update_vlan_vid_pcp(actions, &vlan);
12873 /* If no VLAN push - this is a modify header action */
12874 if (flow_dv_convert_action_modify_vlan_vid
12875 (mhdr_res, actions, error))
12877 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12879 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12880 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12881 if (flow_dv_create_action_l2_encap(dev, actions,
12886 dev_flow->dv.actions[actions_n++] =
12887 dev_flow->dv.encap_decap->action;
12888 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12889 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12890 sample_act->action_flags |=
12891 MLX5_FLOW_ACTION_ENCAP;
12893 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12894 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12895 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12899 dev_flow->dv.actions[actions_n++] =
12900 dev_flow->dv.encap_decap->action;
12901 action_flags |= MLX5_FLOW_ACTION_DECAP;
12903 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12904 /* Handle encap with preceding decap. */
12905 if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12906 if (flow_dv_create_action_raw_encap
12907 (dev, actions, dev_flow, attr, error))
12909 dev_flow->dv.actions[actions_n++] =
12910 dev_flow->dv.encap_decap->action;
12912 /* Handle encap without preceding decap. */
12913 if (flow_dv_create_action_l2_encap
12914 (dev, actions, dev_flow, attr->transfer,
12917 dev_flow->dv.actions[actions_n++] =
12918 dev_flow->dv.encap_decap->action;
12920 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12921 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12922 sample_act->action_flags |=
12923 MLX5_FLOW_ACTION_ENCAP;
12925 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
12926 while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
12928 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
12929 if (flow_dv_create_action_l2_decap
12930 (dev, dev_flow, attr->transfer, error))
12932 dev_flow->dv.actions[actions_n++] =
12933 dev_flow->dv.encap_decap->action;
12935 /* If decap is followed by encap, handle it at encap. */
12936 action_flags |= MLX5_FLOW_ACTION_DECAP;
12938 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
12939 dev_flow->dv.actions[actions_n++] =
12940 (void *)(uintptr_t)action->conf;
12941 action_flags |= MLX5_FLOW_ACTION_JUMP;
12943 case RTE_FLOW_ACTION_TYPE_JUMP:
12944 jump_group = ((const struct rte_flow_action_jump *)
12945 action->conf)->group;
12946 grp_info.std_tbl_fix = 0;
12947 if (dev_flow->skip_scale &
12948 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
12949 grp_info.skip_scale = 1;
12951 grp_info.skip_scale = 0;
12952 ret = mlx5_flow_group_to_table(dev, tunnel,
12958 tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
12960 !!dev_flow->external,
12961 tunnel, jump_group, 0,
12964 return rte_flow_error_set
12966 RTE_FLOW_ERROR_TYPE_ACTION,
12968 "cannot create jump action.");
12969 if (flow_dv_jump_tbl_resource_register
12970 (dev, tbl, dev_flow, error)) {
12971 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12972 return rte_flow_error_set
12974 RTE_FLOW_ERROR_TYPE_ACTION,
12976 "cannot create jump action.");
12978 dev_flow->dv.actions[actions_n++] =
12979 dev_flow->dv.jump->action;
12980 action_flags |= MLX5_FLOW_ACTION_JUMP;
12981 dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
12982 sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
12985 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
12986 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
12987 if (flow_dv_convert_action_modify_mac
12988 (mhdr_res, actions, error))
12990 action_flags |= actions->type ==
12991 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
12992 MLX5_FLOW_ACTION_SET_MAC_SRC :
12993 MLX5_FLOW_ACTION_SET_MAC_DST;
12995 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
12996 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
12997 if (flow_dv_convert_action_modify_ipv4
12998 (mhdr_res, actions, error))
13000 action_flags |= actions->type ==
13001 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
13002 MLX5_FLOW_ACTION_SET_IPV4_SRC :
13003 MLX5_FLOW_ACTION_SET_IPV4_DST;
13005 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
13006 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
13007 if (flow_dv_convert_action_modify_ipv6
13008 (mhdr_res, actions, error))
13010 action_flags |= actions->type ==
13011 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13012 MLX5_FLOW_ACTION_SET_IPV6_SRC :
13013 MLX5_FLOW_ACTION_SET_IPV6_DST;
13015 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13016 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13017 if (flow_dv_convert_action_modify_tp
13018 (mhdr_res, actions, items,
13019 &flow_attr, dev_flow, !!(action_flags &
13020 MLX5_FLOW_ACTION_DECAP), error))
13022 action_flags |= actions->type ==
13023 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13024 MLX5_FLOW_ACTION_SET_TP_SRC :
13025 MLX5_FLOW_ACTION_SET_TP_DST;
13027 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13028 if (flow_dv_convert_action_modify_dec_ttl
13029 (mhdr_res, items, &flow_attr, dev_flow,
13031 MLX5_FLOW_ACTION_DECAP), error))
13033 action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13035 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13036 if (flow_dv_convert_action_modify_ttl
13037 (mhdr_res, actions, items, &flow_attr,
13038 dev_flow, !!(action_flags &
13039 MLX5_FLOW_ACTION_DECAP), error))
13041 action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13043 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13044 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13045 if (flow_dv_convert_action_modify_tcp_seq
13046 (mhdr_res, actions, error))
13048 action_flags |= actions->type ==
13049 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13050 MLX5_FLOW_ACTION_INC_TCP_SEQ :
13051 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13054 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13055 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13056 if (flow_dv_convert_action_modify_tcp_ack
13057 (mhdr_res, actions, error))
13059 action_flags |= actions->type ==
13060 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13061 MLX5_FLOW_ACTION_INC_TCP_ACK :
13062 MLX5_FLOW_ACTION_DEC_TCP_ACK;
13064 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13065 if (flow_dv_convert_action_set_reg
13066 (mhdr_res, actions, error))
13068 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13070 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13071 if (flow_dv_convert_action_copy_mreg
13072 (dev, mhdr_res, actions, error))
13074 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13076 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13077 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13078 dev_flow->handle->fate_action =
13079 MLX5_FLOW_FATE_DEFAULT_MISS;
13081 case RTE_FLOW_ACTION_TYPE_METER:
13083 return rte_flow_error_set(error, rte_errno,
13084 RTE_FLOW_ERROR_TYPE_ACTION,
13085 NULL, "Failed to get meter in flow.");
13086 /* Set the meter action. */
13087 dev_flow->dv.actions[actions_n++] =
13088 wks->fm->meter_action;
13089 action_flags |= MLX5_FLOW_ACTION_METER;
13091 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13092 if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13095 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13097 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13098 if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13101 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13103 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13104 sample_act_pos = actions_n;
13105 sample = (const struct rte_flow_action_sample *)
13108 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13109 /* put encap action into group if work with port id */
13110 if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13111 (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13112 sample_act->action_flags |=
13113 MLX5_FLOW_ACTION_ENCAP;
13115 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13116 if (flow_dv_convert_action_modify_field
13117 (dev, mhdr_res, actions, attr, error))
13119 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13121 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13122 owner_idx = (uint32_t)(uintptr_t)action->conf;
13123 ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13125 return rte_flow_error_set(error, EINVAL,
13126 RTE_FLOW_ERROR_TYPE_ACTION,
13128 "Failed to get CT object.");
13129 if (mlx5_aso_ct_available(priv->sh, ct))
13130 return rte_flow_error_set(error, rte_errno,
13131 RTE_FLOW_ERROR_TYPE_ACTION,
13133 "CT is unavailable.");
13134 if (ct->is_original)
13135 dev_flow->dv.actions[actions_n] =
13136 ct->dr_action_orig;
13138 dev_flow->dv.actions[actions_n] =
13139 ct->dr_action_rply;
13140 flow->indirect_type = MLX5_INDIRECT_ACTION_TYPE_CT;
13141 flow->ct = owner_idx;
13142 __atomic_fetch_add(&ct->refcnt, 1, __ATOMIC_RELAXED);
13144 action_flags |= MLX5_FLOW_ACTION_CT;
13146 case RTE_FLOW_ACTION_TYPE_END:
13147 actions_end = true;
13148 if (mhdr_res->actions_num) {
13149 /* create modify action if needed. */
13150 if (flow_dv_modify_hdr_resource_register
13151 (dev, mhdr_res, dev_flow, error))
13153 dev_flow->dv.actions[modify_action_position] =
13154 handle->dvh.modify_hdr->action;
13157 * Handle AGE and COUNT action by single HW counter
13158 * when they are not shared.
13160 if (action_flags & MLX5_FLOW_ACTION_AGE) {
13161 if ((non_shared_age &&
13162 count && !count->shared) ||
13163 !(priv->sh->flow_hit_aso_en &&
13164 (attr->group || attr->transfer))) {
13165 /* Creates age by counters. */
13166 cnt_act = flow_dv_prepare_counter
13173 dev_flow->dv.actions[age_act_pos] =
13177 if (!flow->age && non_shared_age) {
13178 flow->age = flow_dv_aso_age_alloc
13182 flow_dv_aso_age_params_init
13184 non_shared_age->context ?
13185 non_shared_age->context :
13186 (void *)(uintptr_t)
13187 (dev_flow->flow_idx),
13188 non_shared_age->timeout);
13190 age_act = flow_aso_age_get_by_idx(dev,
13192 dev_flow->dv.actions[age_act_pos] =
13193 age_act->dr_action;
13195 if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13197 * Create one count action, to be used
13198 * by all sub-flows.
13200 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13205 dev_flow->dv.actions[actions_n++] =
13211 if (mhdr_res->actions_num &&
13212 modify_action_position == UINT32_MAX)
13213 modify_action_position = actions_n++;
13215 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13216 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13217 int item_type = items->type;
13219 if (!mlx5_flow_os_item_supported(item_type))
13220 return rte_flow_error_set(error, ENOTSUP,
13221 RTE_FLOW_ERROR_TYPE_ITEM,
13222 NULL, "item not supported");
13223 switch (item_type) {
13224 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13225 flow_dv_translate_item_port_id
13226 (dev, match_mask, match_value, items, attr);
13227 last_item = MLX5_FLOW_ITEM_PORT_ID;
13229 case RTE_FLOW_ITEM_TYPE_ETH:
13230 flow_dv_translate_item_eth(match_mask, match_value,
13232 dev_flow->dv.group);
13233 matcher.priority = action_flags &
13234 MLX5_FLOW_ACTION_DEFAULT_MISS &&
13235 !dev_flow->external ?
13236 MLX5_PRIORITY_MAP_L3 :
13237 MLX5_PRIORITY_MAP_L2;
13238 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13239 MLX5_FLOW_LAYER_OUTER_L2;
13241 case RTE_FLOW_ITEM_TYPE_VLAN:
13242 flow_dv_translate_item_vlan(dev_flow,
13243 match_mask, match_value,
13245 dev_flow->dv.group);
13246 matcher.priority = MLX5_PRIORITY_MAP_L2;
13247 last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13248 MLX5_FLOW_LAYER_INNER_VLAN) :
13249 (MLX5_FLOW_LAYER_OUTER_L2 |
13250 MLX5_FLOW_LAYER_OUTER_VLAN);
13252 case RTE_FLOW_ITEM_TYPE_IPV4:
13253 mlx5_flow_tunnel_ip_check(items, next_protocol,
13254 &item_flags, &tunnel);
13255 flow_dv_translate_item_ipv4(match_mask, match_value,
13257 dev_flow->dv.group);
13258 matcher.priority = MLX5_PRIORITY_MAP_L3;
13259 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13260 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13261 if (items->mask != NULL &&
13262 ((const struct rte_flow_item_ipv4 *)
13263 items->mask)->hdr.next_proto_id) {
13265 ((const struct rte_flow_item_ipv4 *)
13266 (items->spec))->hdr.next_proto_id;
13268 ((const struct rte_flow_item_ipv4 *)
13269 (items->mask))->hdr.next_proto_id;
13271 /* Reset for inner layer. */
13272 next_protocol = 0xff;
13275 case RTE_FLOW_ITEM_TYPE_IPV6:
13276 mlx5_flow_tunnel_ip_check(items, next_protocol,
13277 &item_flags, &tunnel);
13278 flow_dv_translate_item_ipv6(match_mask, match_value,
13280 dev_flow->dv.group);
13281 matcher.priority = MLX5_PRIORITY_MAP_L3;
13282 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13283 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13284 if (items->mask != NULL &&
13285 ((const struct rte_flow_item_ipv6 *)
13286 items->mask)->hdr.proto) {
13288 ((const struct rte_flow_item_ipv6 *)
13289 items->spec)->hdr.proto;
13291 ((const struct rte_flow_item_ipv6 *)
13292 items->mask)->hdr.proto;
13294 /* Reset for inner layer. */
13295 next_protocol = 0xff;
13298 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13299 flow_dv_translate_item_ipv6_frag_ext(match_mask,
13302 last_item = tunnel ?
13303 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13304 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13305 if (items->mask != NULL &&
13306 ((const struct rte_flow_item_ipv6_frag_ext *)
13307 items->mask)->hdr.next_header) {
13309 ((const struct rte_flow_item_ipv6_frag_ext *)
13310 items->spec)->hdr.next_header;
13312 ((const struct rte_flow_item_ipv6_frag_ext *)
13313 items->mask)->hdr.next_header;
13315 /* Reset for inner layer. */
13316 next_protocol = 0xff;
13319 case RTE_FLOW_ITEM_TYPE_TCP:
13320 flow_dv_translate_item_tcp(match_mask, match_value,
13322 matcher.priority = MLX5_PRIORITY_MAP_L4;
13323 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13324 MLX5_FLOW_LAYER_OUTER_L4_TCP;
13326 case RTE_FLOW_ITEM_TYPE_UDP:
13327 flow_dv_translate_item_udp(match_mask, match_value,
13329 matcher.priority = MLX5_PRIORITY_MAP_L4;
13330 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13331 MLX5_FLOW_LAYER_OUTER_L4_UDP;
13333 case RTE_FLOW_ITEM_TYPE_GRE:
13334 flow_dv_translate_item_gre(match_mask, match_value,
13336 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13337 last_item = MLX5_FLOW_LAYER_GRE;
13339 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13340 flow_dv_translate_item_gre_key(match_mask,
13341 match_value, items);
13342 last_item = MLX5_FLOW_LAYER_GRE_KEY;
13344 case RTE_FLOW_ITEM_TYPE_NVGRE:
13345 flow_dv_translate_item_nvgre(match_mask, match_value,
13347 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13348 last_item = MLX5_FLOW_LAYER_GRE;
13350 case RTE_FLOW_ITEM_TYPE_VXLAN:
13351 flow_dv_translate_item_vxlan(dev, attr,
13352 match_mask, match_value,
13354 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13355 last_item = MLX5_FLOW_LAYER_VXLAN;
13357 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13358 flow_dv_translate_item_vxlan_gpe(match_mask,
13359 match_value, items,
13361 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13362 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13364 case RTE_FLOW_ITEM_TYPE_GENEVE:
13365 flow_dv_translate_item_geneve(match_mask, match_value,
13367 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13368 last_item = MLX5_FLOW_LAYER_GENEVE;
13370 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13371 ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13375 return rte_flow_error_set(error, -ret,
13376 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13377 "cannot create GENEVE TLV option");
13378 flow->geneve_tlv_option = 1;
13379 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13381 case RTE_FLOW_ITEM_TYPE_MPLS:
13382 flow_dv_translate_item_mpls(match_mask, match_value,
13383 items, last_item, tunnel);
13384 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13385 last_item = MLX5_FLOW_LAYER_MPLS;
13387 case RTE_FLOW_ITEM_TYPE_MARK:
13388 flow_dv_translate_item_mark(dev, match_mask,
13389 match_value, items);
13390 last_item = MLX5_FLOW_ITEM_MARK;
13392 case RTE_FLOW_ITEM_TYPE_META:
13393 flow_dv_translate_item_meta(dev, match_mask,
13394 match_value, attr, items);
13395 last_item = MLX5_FLOW_ITEM_METADATA;
13397 case RTE_FLOW_ITEM_TYPE_ICMP:
13398 flow_dv_translate_item_icmp(match_mask, match_value,
13400 last_item = MLX5_FLOW_LAYER_ICMP;
13402 case RTE_FLOW_ITEM_TYPE_ICMP6:
13403 flow_dv_translate_item_icmp6(match_mask, match_value,
13405 last_item = MLX5_FLOW_LAYER_ICMP6;
13407 case RTE_FLOW_ITEM_TYPE_TAG:
13408 flow_dv_translate_item_tag(dev, match_mask,
13409 match_value, items);
13410 last_item = MLX5_FLOW_ITEM_TAG;
13412 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13413 flow_dv_translate_mlx5_item_tag(dev, match_mask,
13414 match_value, items);
13415 last_item = MLX5_FLOW_ITEM_TAG;
13417 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13418 flow_dv_translate_item_tx_queue(dev, match_mask,
13421 last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13423 case RTE_FLOW_ITEM_TYPE_GTP:
13424 flow_dv_translate_item_gtp(match_mask, match_value,
13426 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13427 last_item = MLX5_FLOW_LAYER_GTP;
13429 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13430 ret = flow_dv_translate_item_gtp_psc(match_mask,
13434 return rte_flow_error_set(error, -ret,
13435 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13436 "cannot create GTP PSC item");
13437 last_item = MLX5_FLOW_LAYER_GTP_PSC;
13439 case RTE_FLOW_ITEM_TYPE_ECPRI:
13440 if (!mlx5_flex_parser_ecpri_exist(dev)) {
13441 /* Create it only the first time to be used. */
13442 ret = mlx5_flex_parser_ecpri_alloc(dev);
13444 return rte_flow_error_set
13446 RTE_FLOW_ERROR_TYPE_ITEM,
13448 "cannot create eCPRI parser");
13450 flow_dv_translate_item_ecpri(dev, match_mask,
13451 match_value, items);
13452 /* No other protocol should follow eCPRI layer. */
13453 last_item = MLX5_FLOW_LAYER_ECPRI;
13455 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13456 flow_dv_translate_item_integrity(match_mask,
13460 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13461 flow_dv_translate_item_aso_ct(dev, match_mask,
13462 match_value, items);
13467 item_flags |= last_item;
13470 * When E-Switch mode is enabled, we have two cases where we need to
13471 * set the source port manually.
13472 * The first one, is in case of Nic steering rule, and the second is
13473 * E-Switch rule where no port_id item was found. In both cases
13474 * the source port is set according the current port in use.
13476 if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13477 (priv->representor || priv->master)) {
13478 if (flow_dv_translate_item_port_id(dev, match_mask,
13479 match_value, NULL, attr))
13482 #ifdef RTE_LIBRTE_MLX5_DEBUG
13483 MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13484 dev_flow->dv.value.buf));
13487 * Layers may be already initialized from prefix flow if this dev_flow
13488 * is the suffix flow.
13490 handle->layers |= item_flags;
13491 if (action_flags & MLX5_FLOW_ACTION_RSS)
13492 flow_dv_hashfields_set(dev_flow, rss_desc);
13493 /* If has RSS action in the sample action, the Sample/Mirror resource
13494 * should be registered after the hash filed be update.
13496 if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13497 ret = flow_dv_translate_action_sample(dev,
13506 ret = flow_dv_create_action_sample(dev,
13515 return rte_flow_error_set
13517 RTE_FLOW_ERROR_TYPE_ACTION,
13519 "cannot create sample action");
13520 if (num_of_dest > 1) {
13521 dev_flow->dv.actions[sample_act_pos] =
13522 dev_flow->dv.dest_array_res->action;
13524 dev_flow->dv.actions[sample_act_pos] =
13525 dev_flow->dv.sample_res->verbs_action;
13529 * For multiple destination (sample action with ratio=1), the encap
13530 * action and port id action will be combined into group action.
13531 * So need remove the original these actions in the flow and only
13532 * use the sample action instead of.
13534 if (num_of_dest > 1 &&
13535 (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13537 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13539 for (i = 0; i < actions_n; i++) {
13540 if ((sample_act->dr_encap_action &&
13541 sample_act->dr_encap_action ==
13542 dev_flow->dv.actions[i]) ||
13543 (sample_act->dr_port_id_action &&
13544 sample_act->dr_port_id_action ==
13545 dev_flow->dv.actions[i]) ||
13546 (sample_act->dr_jump_action &&
13547 sample_act->dr_jump_action ==
13548 dev_flow->dv.actions[i]))
13550 temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13552 memcpy((void *)dev_flow->dv.actions,
13553 (void *)temp_actions,
13554 tmp_actions_n * sizeof(void *));
13555 actions_n = tmp_actions_n;
13557 dev_flow->dv.actions_n = actions_n;
13558 dev_flow->act_flags = action_flags;
13559 if (wks->skip_matcher_reg)
13561 /* Register matcher. */
13562 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13563 matcher.mask.size);
13564 matcher.priority = mlx5_get_matcher_priority(dev, attr,
13567 * When creating meter drop flow in drop table, using original
13568 * 5-tuple match, the matcher priority should be lower than
13571 if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13572 dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13573 matcher.priority <= MLX5_REG_BITS)
13574 matcher.priority += MLX5_REG_BITS;
13575 /* reserved field no needs to be set to 0 here. */
13576 tbl_key.is_fdb = attr->transfer;
13577 tbl_key.is_egress = attr->egress;
13578 tbl_key.level = dev_flow->dv.group;
13579 tbl_key.id = dev_flow->dv.table_id;
13580 if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13581 tunnel, attr->group, error))
13587 * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13590 * @param[in, out] action
13591 * Shred RSS action holding hash RX queue objects.
13592 * @param[in] hash_fields
13593 * Defines combination of packet fields to participate in RX hash.
13594 * @param[in] tunnel
13596 * @param[in] hrxq_idx
13597 * Hash RX queue index to set.
13600 * 0 on success, otherwise negative errno value.
13603 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13604 const uint64_t hash_fields,
13607 uint32_t *hrxqs = action->hrxq;
13609 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13610 case MLX5_RSS_HASH_IPV4:
13611 /* fall-through. */
13612 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13613 /* fall-through. */
13614 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13615 hrxqs[0] = hrxq_idx;
13617 case MLX5_RSS_HASH_IPV4_TCP:
13618 /* fall-through. */
13619 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13620 /* fall-through. */
13621 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13622 hrxqs[1] = hrxq_idx;
13624 case MLX5_RSS_HASH_IPV4_UDP:
13625 /* fall-through. */
13626 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13627 /* fall-through. */
13628 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13629 hrxqs[2] = hrxq_idx;
13631 case MLX5_RSS_HASH_IPV6:
13632 /* fall-through. */
13633 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13634 /* fall-through. */
13635 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13636 hrxqs[3] = hrxq_idx;
13638 case MLX5_RSS_HASH_IPV6_TCP:
13639 /* fall-through. */
13640 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13641 /* fall-through. */
13642 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13643 hrxqs[4] = hrxq_idx;
13645 case MLX5_RSS_HASH_IPV6_UDP:
13646 /* fall-through. */
13647 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13648 /* fall-through. */
13649 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13650 hrxqs[5] = hrxq_idx;
13652 case MLX5_RSS_HASH_NONE:
13653 hrxqs[6] = hrxq_idx;
13661 * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13665 * Pointer to the Ethernet device structure.
13667 * Shared RSS action ID holding hash RX queue objects.
13668 * @param[in] hash_fields
13669 * Defines combination of packet fields to participate in RX hash.
13670 * @param[in] tunnel
13674 * Valid hash RX queue index, otherwise 0.
13677 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13678 const uint64_t hash_fields)
13680 struct mlx5_priv *priv = dev->data->dev_private;
13681 struct mlx5_shared_action_rss *shared_rss =
13682 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13683 const uint32_t *hrxqs = shared_rss->hrxq;
13685 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13686 case MLX5_RSS_HASH_IPV4:
13687 /* fall-through. */
13688 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13689 /* fall-through. */
13690 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13692 case MLX5_RSS_HASH_IPV4_TCP:
13693 /* fall-through. */
13694 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13695 /* fall-through. */
13696 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13698 case MLX5_RSS_HASH_IPV4_UDP:
13699 /* fall-through. */
13700 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13701 /* fall-through. */
13702 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13704 case MLX5_RSS_HASH_IPV6:
13705 /* fall-through. */
13706 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13707 /* fall-through. */
13708 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13710 case MLX5_RSS_HASH_IPV6_TCP:
13711 /* fall-through. */
13712 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13713 /* fall-through. */
13714 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13716 case MLX5_RSS_HASH_IPV6_UDP:
13717 /* fall-through. */
13718 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13719 /* fall-through. */
13720 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13722 case MLX5_RSS_HASH_NONE:
13731 * Apply the flow to the NIC, lock free,
13732 * (mutex should be acquired by caller).
13735 * Pointer to the Ethernet device structure.
13736 * @param[in, out] flow
13737 * Pointer to flow structure.
13738 * @param[out] error
13739 * Pointer to error structure.
13742 * 0 on success, a negative errno value otherwise and rte_errno is set.
13745 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13746 struct rte_flow_error *error)
13748 struct mlx5_flow_dv_workspace *dv;
13749 struct mlx5_flow_handle *dh;
13750 struct mlx5_flow_handle_dv *dv_h;
13751 struct mlx5_flow *dev_flow;
13752 struct mlx5_priv *priv = dev->data->dev_private;
13753 uint32_t handle_idx;
13757 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13758 struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13762 for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13763 dev_flow = &wks->flows[idx];
13764 dv = &dev_flow->dv;
13765 dh = dev_flow->handle;
13768 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13769 if (dv->transfer) {
13770 MLX5_ASSERT(priv->sh->dr_drop_action);
13771 dv->actions[n++] = priv->sh->dr_drop_action;
13773 #ifdef HAVE_MLX5DV_DR
13774 /* DR supports drop action placeholder. */
13775 MLX5_ASSERT(priv->sh->dr_drop_action);
13776 dv->actions[n++] = priv->sh->dr_drop_action;
13778 /* For DV we use the explicit drop queue. */
13779 MLX5_ASSERT(priv->drop_queue.hrxq);
13781 priv->drop_queue.hrxq->action;
13784 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13785 !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13786 struct mlx5_hrxq *hrxq;
13789 hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13794 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13795 "cannot get hash queue");
13798 dh->rix_hrxq = hrxq_idx;
13799 dv->actions[n++] = hrxq->action;
13800 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13801 struct mlx5_hrxq *hrxq = NULL;
13804 hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13805 rss_desc->shared_rss,
13806 dev_flow->hash_fields);
13808 hrxq = mlx5_ipool_get
13809 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13814 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13815 "cannot get hash queue");
13818 dh->rix_srss = rss_desc->shared_rss;
13819 dv->actions[n++] = hrxq->action;
13820 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13821 if (!priv->sh->default_miss_action) {
13824 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13825 "default miss action not be created.");
13828 dv->actions[n++] = priv->sh->default_miss_action;
13830 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13831 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13832 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13833 (void *)&dv->value, n,
13834 dv->actions, &dh->drv_flow);
13838 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13840 (!priv->config.allow_duplicate_pattern &&
13842 "duplicating pattern is not allowed" :
13843 "hardware refuses to create flow");
13846 if (priv->vmwa_context &&
13847 dh->vf_vlan.tag && !dh->vf_vlan.created) {
13849 * The rule contains the VLAN pattern.
13850 * For VF we are going to create VLAN
13851 * interface to make hypervisor set correct
13852 * e-Switch vport context.
13854 mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13859 err = rte_errno; /* Save rte_errno before cleanup. */
13860 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13861 handle_idx, dh, next) {
13862 /* hrxq is union, don't clear it if the flag is not set. */
13863 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13864 mlx5_hrxq_release(dev, dh->rix_hrxq);
13866 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13869 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13870 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13872 rte_errno = err; /* Restore rte_errno. */
13877 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
13878 struct mlx5_list_entry *entry)
13880 struct mlx5_flow_dv_matcher *resource = container_of(entry,
13884 claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
13885 mlx5_free(resource);
13889 * Release the flow matcher.
13892 * Pointer to Ethernet device.
13894 * Index to port ID action resource.
13897 * 1 while a reference on it exists, 0 when freed.
13900 flow_dv_matcher_release(struct rte_eth_dev *dev,
13901 struct mlx5_flow_handle *handle)
13903 struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13904 struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
13905 typeof(*tbl), tbl);
13908 MLX5_ASSERT(matcher->matcher_object);
13909 ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
13910 flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
13915 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13917 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13918 struct mlx5_flow_dv_encap_decap_resource *res =
13919 container_of(entry, typeof(*res), entry);
13921 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13922 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
13926 * Release an encap/decap resource.
13929 * Pointer to Ethernet device.
13930 * @param encap_decap_idx
13931 * Index of encap decap resource.
13934 * 1 while a reference on it exists, 0 when freed.
13937 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
13938 uint32_t encap_decap_idx)
13940 struct mlx5_priv *priv = dev->data->dev_private;
13941 struct mlx5_flow_dv_encap_decap_resource *resource;
13943 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
13947 MLX5_ASSERT(resource->action);
13948 return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
13952 * Release an jump to table action resource.
13955 * Pointer to Ethernet device.
13957 * Index to the jump action resource.
13960 * 1 while a reference on it exists, 0 when freed.
13963 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
13966 struct mlx5_priv *priv = dev->data->dev_private;
13967 struct mlx5_flow_tbl_data_entry *tbl_data;
13969 tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
13973 return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
13977 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13979 struct mlx5_flow_dv_modify_hdr_resource *res =
13980 container_of(entry, typeof(*res), entry);
13981 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13983 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13984 mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
13988 * Release a modify-header resource.
13991 * Pointer to Ethernet device.
13993 * Pointer to mlx5_flow_handle.
13996 * 1 while a reference on it exists, 0 when freed.
13999 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
14000 struct mlx5_flow_handle *handle)
14002 struct mlx5_priv *priv = dev->data->dev_private;
14003 struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
14005 MLX5_ASSERT(entry->action);
14006 return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14010 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14012 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14013 struct mlx5_flow_dv_port_id_action_resource *resource =
14014 container_of(entry, typeof(*resource), entry);
14016 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14017 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14021 * Release port ID action resource.
14024 * Pointer to Ethernet device.
14026 * Pointer to mlx5_flow_handle.
14029 * 1 while a reference on it exists, 0 when freed.
14032 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14035 struct mlx5_priv *priv = dev->data->dev_private;
14036 struct mlx5_flow_dv_port_id_action_resource *resource;
14038 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14041 MLX5_ASSERT(resource->action);
14042 return mlx5_list_unregister(priv->sh->port_id_action_list,
14047 * Release shared RSS action resource.
14050 * Pointer to Ethernet device.
14052 * Shared RSS action index.
14055 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14057 struct mlx5_priv *priv = dev->data->dev_private;
14058 struct mlx5_shared_action_rss *shared_rss;
14060 shared_rss = mlx5_ipool_get
14061 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14062 __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14066 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14068 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14069 struct mlx5_flow_dv_push_vlan_action_resource *resource =
14070 container_of(entry, typeof(*resource), entry);
14072 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14073 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14077 * Release push vlan action resource.
14080 * Pointer to Ethernet device.
14082 * Pointer to mlx5_flow_handle.
14085 * 1 while a reference on it exists, 0 when freed.
14088 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14089 struct mlx5_flow_handle *handle)
14091 struct mlx5_priv *priv = dev->data->dev_private;
14092 struct mlx5_flow_dv_push_vlan_action_resource *resource;
14093 uint32_t idx = handle->dvh.rix_push_vlan;
14095 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14098 MLX5_ASSERT(resource->action);
14099 return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14104 * Release the fate resource.
14107 * Pointer to Ethernet device.
14109 * Pointer to mlx5_flow_handle.
14112 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14113 struct mlx5_flow_handle *handle)
14115 if (!handle->rix_fate)
14117 switch (handle->fate_action) {
14118 case MLX5_FLOW_FATE_QUEUE:
14119 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14120 mlx5_hrxq_release(dev, handle->rix_hrxq);
14122 case MLX5_FLOW_FATE_JUMP:
14123 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14125 case MLX5_FLOW_FATE_PORT_ID:
14126 flow_dv_port_id_action_resource_release(dev,
14127 handle->rix_port_id_action);
14130 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14133 handle->rix_fate = 0;
14137 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14138 struct mlx5_list_entry *entry)
14140 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14143 struct rte_eth_dev *dev = resource->dev;
14144 struct mlx5_priv *priv = dev->data->dev_private;
14146 if (resource->verbs_action)
14147 claim_zero(mlx5_flow_os_destroy_flow_action
14148 (resource->verbs_action));
14149 if (resource->normal_path_tbl)
14150 flow_dv_tbl_resource_release(MLX5_SH(dev),
14151 resource->normal_path_tbl);
14152 flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14153 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14154 DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14158 * Release an sample resource.
14161 * Pointer to Ethernet device.
14163 * Pointer to mlx5_flow_handle.
14166 * 1 while a reference on it exists, 0 when freed.
14169 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14170 struct mlx5_flow_handle *handle)
14172 struct mlx5_priv *priv = dev->data->dev_private;
14173 struct mlx5_flow_dv_sample_resource *resource;
14175 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14176 handle->dvh.rix_sample);
14179 MLX5_ASSERT(resource->verbs_action);
14180 return mlx5_list_unregister(priv->sh->sample_action_list,
14185 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14186 struct mlx5_list_entry *entry)
14188 struct mlx5_flow_dv_dest_array_resource *resource =
14189 container_of(entry, typeof(*resource), entry);
14190 struct rte_eth_dev *dev = resource->dev;
14191 struct mlx5_priv *priv = dev->data->dev_private;
14194 MLX5_ASSERT(resource->action);
14195 if (resource->action)
14196 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14197 for (; i < resource->num_of_dest; i++)
14198 flow_dv_sample_sub_actions_release(dev,
14199 &resource->sample_idx[i]);
14200 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14201 DRV_LOG(DEBUG, "destination array resource %p: removed",
14206 * Release an destination array resource.
14209 * Pointer to Ethernet device.
14211 * Pointer to mlx5_flow_handle.
14214 * 1 while a reference on it exists, 0 when freed.
14217 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14218 struct mlx5_flow_handle *handle)
14220 struct mlx5_priv *priv = dev->data->dev_private;
14221 struct mlx5_flow_dv_dest_array_resource *resource;
14223 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14224 handle->dvh.rix_dest_array);
14227 MLX5_ASSERT(resource->action);
14228 return mlx5_list_unregister(priv->sh->dest_array_list,
14233 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14235 struct mlx5_priv *priv = dev->data->dev_private;
14236 struct mlx5_dev_ctx_shared *sh = priv->sh;
14237 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14238 sh->geneve_tlv_option_resource;
14239 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14240 if (geneve_opt_resource) {
14241 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14242 __ATOMIC_RELAXED))) {
14243 claim_zero(mlx5_devx_cmd_destroy
14244 (geneve_opt_resource->obj));
14245 mlx5_free(sh->geneve_tlv_option_resource);
14246 sh->geneve_tlv_option_resource = NULL;
14249 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14253 * Remove the flow from the NIC but keeps it in memory.
14254 * Lock free, (mutex should be acquired by caller).
14257 * Pointer to Ethernet device.
14258 * @param[in, out] flow
14259 * Pointer to flow structure.
14262 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14264 struct mlx5_flow_handle *dh;
14265 uint32_t handle_idx;
14266 struct mlx5_priv *priv = dev->data->dev_private;
14270 handle_idx = flow->dev_handles;
14271 while (handle_idx) {
14272 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14276 if (dh->drv_flow) {
14277 claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14278 dh->drv_flow = NULL;
14280 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14281 flow_dv_fate_resource_release(dev, dh);
14282 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14283 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14284 handle_idx = dh->next.next;
14289 * Remove the flow from the NIC and the memory.
14290 * Lock free, (mutex should be acquired by caller).
14293 * Pointer to the Ethernet device structure.
14294 * @param[in, out] flow
14295 * Pointer to flow structure.
14298 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14300 struct mlx5_flow_handle *dev_handle;
14301 struct mlx5_priv *priv = dev->data->dev_private;
14302 struct mlx5_flow_meter_info *fm = NULL;
14307 flow_dv_remove(dev, flow);
14308 if (flow->counter) {
14309 flow_dv_counter_free(dev, flow->counter);
14313 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14315 mlx5_flow_meter_detach(priv, fm);
14318 /* Keep the current age handling by default. */
14319 if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14320 flow_dv_aso_ct_release(dev, flow->ct);
14321 else if (flow->age)
14322 flow_dv_aso_age_release(dev, flow->age);
14323 if (flow->geneve_tlv_option) {
14324 flow_dv_geneve_tlv_option_resource_release(dev);
14325 flow->geneve_tlv_option = 0;
14327 while (flow->dev_handles) {
14328 uint32_t tmp_idx = flow->dev_handles;
14330 dev_handle = mlx5_ipool_get(priv->sh->ipool
14331 [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14334 flow->dev_handles = dev_handle->next.next;
14335 if (dev_handle->dvh.matcher)
14336 flow_dv_matcher_release(dev, dev_handle);
14337 if (dev_handle->dvh.rix_sample)
14338 flow_dv_sample_resource_release(dev, dev_handle);
14339 if (dev_handle->dvh.rix_dest_array)
14340 flow_dv_dest_array_resource_release(dev, dev_handle);
14341 if (dev_handle->dvh.rix_encap_decap)
14342 flow_dv_encap_decap_resource_release(dev,
14343 dev_handle->dvh.rix_encap_decap);
14344 if (dev_handle->dvh.modify_hdr)
14345 flow_dv_modify_hdr_resource_release(dev, dev_handle);
14346 if (dev_handle->dvh.rix_push_vlan)
14347 flow_dv_push_vlan_action_resource_release(dev,
14349 if (dev_handle->dvh.rix_tag)
14350 flow_dv_tag_release(dev,
14351 dev_handle->dvh.rix_tag);
14352 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14353 flow_dv_fate_resource_release(dev, dev_handle);
14355 srss = dev_handle->rix_srss;
14356 if (fm && dev_handle->is_meter_flow_id &&
14357 dev_handle->split_flow_id)
14358 mlx5_ipool_free(fm->flow_ipool,
14359 dev_handle->split_flow_id);
14360 else if (dev_handle->split_flow_id &&
14361 !dev_handle->is_meter_flow_id)
14362 mlx5_ipool_free(priv->sh->ipool
14363 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14364 dev_handle->split_flow_id);
14365 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14369 flow_dv_shared_rss_action_release(dev, srss);
14373 * Release array of hash RX queue objects.
14377 * Pointer to the Ethernet device structure.
14378 * @param[in, out] hrxqs
14379 * Array of hash RX queue objects.
14382 * Total number of references to hash RX queue objects in *hrxqs* array
14383 * after this operation.
14386 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14387 uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14392 for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14393 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14403 * Release all hash RX queue objects representing shared RSS action.
14406 * Pointer to the Ethernet device structure.
14407 * @param[in, out] action
14408 * Shared RSS action to remove hash RX queue objects from.
14411 * Total number of references to hash RX queue objects stored in *action*
14412 * after this operation.
14413 * Expected to be 0 if no external references held.
14416 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14417 struct mlx5_shared_action_rss *shared_rss)
14419 return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14423 * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14426 * Only one hash value is available for one L3+L4 combination:
14428 * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14429 * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14430 * same slot in mlx5_rss_hash_fields.
14433 * Pointer to the shared action RSS conf.
14434 * @param[in, out] hash_field
14435 * hash_field variable needed to be adjusted.
14441 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14442 uint64_t *hash_field)
14444 uint64_t rss_types = rss->origin.types;
14446 switch (*hash_field & ~IBV_RX_HASH_INNER) {
14447 case MLX5_RSS_HASH_IPV4:
14448 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14449 *hash_field &= ~MLX5_RSS_HASH_IPV4;
14450 if (rss_types & ETH_RSS_L3_DST_ONLY)
14451 *hash_field |= IBV_RX_HASH_DST_IPV4;
14452 else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14453 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14455 *hash_field |= MLX5_RSS_HASH_IPV4;
14458 case MLX5_RSS_HASH_IPV6:
14459 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14460 *hash_field &= ~MLX5_RSS_HASH_IPV6;
14461 if (rss_types & ETH_RSS_L3_DST_ONLY)
14462 *hash_field |= IBV_RX_HASH_DST_IPV6;
14463 else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14464 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14466 *hash_field |= MLX5_RSS_HASH_IPV6;
14469 case MLX5_RSS_HASH_IPV4_UDP:
14470 /* fall-through. */
14471 case MLX5_RSS_HASH_IPV6_UDP:
14472 if (rss_types & ETH_RSS_UDP) {
14473 *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14474 if (rss_types & ETH_RSS_L4_DST_ONLY)
14475 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14476 else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14477 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14479 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14482 case MLX5_RSS_HASH_IPV4_TCP:
14483 /* fall-through. */
14484 case MLX5_RSS_HASH_IPV6_TCP:
14485 if (rss_types & ETH_RSS_TCP) {
14486 *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14487 if (rss_types & ETH_RSS_L4_DST_ONLY)
14488 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14489 else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14490 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14492 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14501 * Setup shared RSS action.
14502 * Prepare set of hash RX queue objects sufficient to handle all valid
14503 * hash_fields combinations (see enum ibv_rx_hash_fields).
14506 * Pointer to the Ethernet device structure.
14507 * @param[in] action_idx
14508 * Shared RSS action ipool index.
14509 * @param[in, out] action
14510 * Partially initialized shared RSS action.
14511 * @param[out] error
14512 * Perform verbose error reporting if not NULL. Initialized in case of
14516 * 0 on success, otherwise negative errno value.
14519 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14520 uint32_t action_idx,
14521 struct mlx5_shared_action_rss *shared_rss,
14522 struct rte_flow_error *error)
14524 struct mlx5_flow_rss_desc rss_desc = { 0 };
14528 if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
14529 return rte_flow_error_set(error, rte_errno,
14530 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14531 "cannot setup indirection table");
14533 memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14534 rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14535 rss_desc.const_q = shared_rss->origin.queue;
14536 rss_desc.queue_num = shared_rss->origin.queue_num;
14537 /* Set non-zero value to indicate a shared RSS. */
14538 rss_desc.shared_rss = action_idx;
14539 rss_desc.ind_tbl = shared_rss->ind_tbl;
14540 for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14542 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14545 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14546 if (shared_rss->origin.level > 1) {
14547 hash_fields |= IBV_RX_HASH_INNER;
14550 rss_desc.tunnel = tunnel;
14551 rss_desc.hash_fields = hash_fields;
14552 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14556 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14557 "cannot get hash queue");
14558 goto error_hrxq_new;
14560 err = __flow_dv_action_rss_hrxq_set
14561 (shared_rss, hash_fields, hrxq_idx);
14567 __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14568 if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14569 shared_rss->ind_tbl = NULL;
14575 * Create shared RSS action.
14578 * Pointer to the Ethernet device structure.
14580 * Shared action configuration.
14582 * RSS action specification used to create shared action.
14583 * @param[out] error
14584 * Perform verbose error reporting if not NULL. Initialized in case of
14588 * A valid shared action ID in case of success, 0 otherwise and
14589 * rte_errno is set.
14592 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14593 const struct rte_flow_indir_action_conf *conf,
14594 const struct rte_flow_action_rss *rss,
14595 struct rte_flow_error *error)
14597 struct mlx5_priv *priv = dev->data->dev_private;
14598 struct mlx5_shared_action_rss *shared_rss = NULL;
14599 void *queue = NULL;
14600 struct rte_flow_action_rss *origin;
14601 const uint8_t *rss_key;
14602 uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14605 RTE_SET_USED(conf);
14606 queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14608 shared_rss = mlx5_ipool_zmalloc
14609 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14610 if (!shared_rss || !queue) {
14611 rte_flow_error_set(error, ENOMEM,
14612 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14613 "cannot allocate resource memory");
14614 goto error_rss_init;
14616 if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14617 rte_flow_error_set(error, E2BIG,
14618 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14619 "rss action number out of range");
14620 goto error_rss_init;
14622 shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14623 sizeof(*shared_rss->ind_tbl),
14625 if (!shared_rss->ind_tbl) {
14626 rte_flow_error_set(error, ENOMEM,
14627 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14628 "cannot allocate resource memory");
14629 goto error_rss_init;
14631 memcpy(queue, rss->queue, queue_size);
14632 shared_rss->ind_tbl->queues = queue;
14633 shared_rss->ind_tbl->queues_n = rss->queue_num;
14634 origin = &shared_rss->origin;
14635 origin->func = rss->func;
14636 origin->level = rss->level;
14637 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
14638 origin->types = !rss->types ? ETH_RSS_IP : rss->types;
14639 /* NULL RSS key indicates default RSS key. */
14640 rss_key = !rss->key ? rss_hash_default_key : rss->key;
14641 memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14642 origin->key = &shared_rss->key[0];
14643 origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14644 origin->queue = queue;
14645 origin->queue_num = rss->queue_num;
14646 if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14647 goto error_rss_init;
14648 rte_spinlock_init(&shared_rss->action_rss_sl);
14649 __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14650 rte_spinlock_lock(&priv->shared_act_sl);
14651 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14652 &priv->rss_shared_actions, idx, shared_rss, next);
14653 rte_spinlock_unlock(&priv->shared_act_sl);
14657 if (shared_rss->ind_tbl)
14658 mlx5_free(shared_rss->ind_tbl);
14659 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14668 * Destroy the shared RSS action.
14669 * Release related hash RX queue objects.
14672 * Pointer to the Ethernet device structure.
14674 * The shared RSS action object ID to be removed.
14675 * @param[out] error
14676 * Perform verbose error reporting if not NULL. Initialized in case of
14680 * 0 on success, otherwise negative errno value.
14683 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14684 struct rte_flow_error *error)
14686 struct mlx5_priv *priv = dev->data->dev_private;
14687 struct mlx5_shared_action_rss *shared_rss =
14688 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14689 uint32_t old_refcnt = 1;
14691 uint16_t *queue = NULL;
14694 return rte_flow_error_set(error, EINVAL,
14695 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14696 "invalid shared action");
14697 remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14699 return rte_flow_error_set(error, EBUSY,
14700 RTE_FLOW_ERROR_TYPE_ACTION,
14702 "shared rss hrxq has references");
14703 if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14704 0, 0, __ATOMIC_ACQUIRE,
14706 return rte_flow_error_set(error, EBUSY,
14707 RTE_FLOW_ERROR_TYPE_ACTION,
14709 "shared rss has references");
14710 queue = shared_rss->ind_tbl->queues;
14711 remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14713 return rte_flow_error_set(error, EBUSY,
14714 RTE_FLOW_ERROR_TYPE_ACTION,
14716 "shared rss indirection table has"
14719 rte_spinlock_lock(&priv->shared_act_sl);
14720 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14721 &priv->rss_shared_actions, idx, shared_rss, next);
14722 rte_spinlock_unlock(&priv->shared_act_sl);
14723 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14729 * Create indirect action, lock free,
14730 * (mutex should be acquired by caller).
14731 * Dispatcher for action type specific call.
14734 * Pointer to the Ethernet device structure.
14736 * Shared action configuration.
14737 * @param[in] action
14738 * Action specification used to create indirect action.
14739 * @param[out] error
14740 * Perform verbose error reporting if not NULL. Initialized in case of
14744 * A valid shared action handle in case of success, NULL otherwise and
14745 * rte_errno is set.
14747 static struct rte_flow_action_handle *
14748 flow_dv_action_create(struct rte_eth_dev *dev,
14749 const struct rte_flow_indir_action_conf *conf,
14750 const struct rte_flow_action *action,
14751 struct rte_flow_error *err)
14753 struct mlx5_priv *priv = dev->data->dev_private;
14754 uint32_t age_idx = 0;
14758 switch (action->type) {
14759 case RTE_FLOW_ACTION_TYPE_RSS:
14760 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14761 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14762 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14764 case RTE_FLOW_ACTION_TYPE_AGE:
14765 age_idx = flow_dv_aso_age_alloc(dev, err);
14770 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14771 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14772 flow_dv_aso_age_params_init(dev, age_idx,
14773 ((const struct rte_flow_action_age *)
14774 action->conf)->context ?
14775 ((const struct rte_flow_action_age *)
14776 action->conf)->context :
14777 (void *)(uintptr_t)idx,
14778 ((const struct rte_flow_action_age *)
14779 action->conf)->timeout);
14782 case RTE_FLOW_ACTION_TYPE_COUNT:
14783 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14784 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14785 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14787 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14788 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14790 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14793 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14794 NULL, "action type not supported");
14797 return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14801 * Destroy the indirect action.
14802 * Release action related resources on the NIC and the memory.
14803 * Lock free, (mutex should be acquired by caller).
14804 * Dispatcher for action type specific call.
14807 * Pointer to the Ethernet device structure.
14808 * @param[in] handle
14809 * The indirect action object handle to be removed.
14810 * @param[out] error
14811 * Perform verbose error reporting if not NULL. Initialized in case of
14815 * 0 on success, otherwise negative errno value.
14818 flow_dv_action_destroy(struct rte_eth_dev *dev,
14819 struct rte_flow_action_handle *handle,
14820 struct rte_flow_error *error)
14822 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14823 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14824 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14825 struct mlx5_flow_counter *cnt;
14826 uint32_t no_flow_refcnt = 1;
14830 case MLX5_INDIRECT_ACTION_TYPE_RSS:
14831 return __flow_dv_action_rss_release(dev, idx, error);
14832 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14833 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14834 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14835 &no_flow_refcnt, 1, false,
14838 return rte_flow_error_set(error, EBUSY,
14839 RTE_FLOW_ERROR_TYPE_ACTION,
14841 "Indirect count action has references");
14842 flow_dv_counter_free(dev, idx);
14844 case MLX5_INDIRECT_ACTION_TYPE_AGE:
14845 ret = flow_dv_aso_age_release(dev, idx);
14848 * In this case, the last flow has a reference will
14849 * actually release the age action.
14851 DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14852 " released with references %d.", idx, ret);
14854 case MLX5_INDIRECT_ACTION_TYPE_CT:
14855 ret = flow_dv_aso_ct_release(dev, idx);
14859 DRV_LOG(DEBUG, "Connection tracking object %u still "
14860 "has references %d.", idx, ret);
14863 return rte_flow_error_set(error, ENOTSUP,
14864 RTE_FLOW_ERROR_TYPE_ACTION,
14866 "action type not supported");
14871 * Updates in place shared RSS action configuration.
14874 * Pointer to the Ethernet device structure.
14876 * The shared RSS action object ID to be updated.
14877 * @param[in] action_conf
14878 * RSS action specification used to modify *shared_rss*.
14879 * @param[out] error
14880 * Perform verbose error reporting if not NULL. Initialized in case of
14884 * 0 on success, otherwise negative errno value.
14885 * @note: currently only support update of RSS queues.
14888 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14889 const struct rte_flow_action_rss *action_conf,
14890 struct rte_flow_error *error)
14892 struct mlx5_priv *priv = dev->data->dev_private;
14893 struct mlx5_shared_action_rss *shared_rss =
14894 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14896 void *queue = NULL;
14897 uint16_t *queue_old = NULL;
14898 uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
14901 return rte_flow_error_set(error, EINVAL,
14902 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14903 "invalid shared action to update");
14904 if (priv->obj_ops.ind_table_modify == NULL)
14905 return rte_flow_error_set(error, ENOTSUP,
14906 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14907 "cannot modify indirection table");
14908 queue = mlx5_malloc(MLX5_MEM_ZERO,
14909 RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14912 return rte_flow_error_set(error, ENOMEM,
14913 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14915 "cannot allocate resource memory");
14916 memcpy(queue, action_conf->queue, queue_size);
14917 MLX5_ASSERT(shared_rss->ind_tbl);
14918 rte_spinlock_lock(&shared_rss->action_rss_sl);
14919 queue_old = shared_rss->ind_tbl->queues;
14920 ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
14921 queue, action_conf->queue_num, true);
14924 ret = rte_flow_error_set(error, rte_errno,
14925 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14926 "cannot update indirection table");
14928 mlx5_free(queue_old);
14929 shared_rss->origin.queue = queue;
14930 shared_rss->origin.queue_num = action_conf->queue_num;
14932 rte_spinlock_unlock(&shared_rss->action_rss_sl);
14937 * Updates in place conntrack context or direction.
14938 * Context update should be synchronized.
14941 * Pointer to the Ethernet device structure.
14943 * The conntrack object ID to be updated.
14944 * @param[in] update
14945 * Pointer to the structure of information to update.
14946 * @param[out] error
14947 * Perform verbose error reporting if not NULL. Initialized in case of
14951 * 0 on success, otherwise negative errno value.
14954 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
14955 const struct rte_flow_modify_conntrack *update,
14956 struct rte_flow_error *error)
14958 struct mlx5_priv *priv = dev->data->dev_private;
14959 struct mlx5_aso_ct_action *ct;
14960 const struct rte_flow_action_conntrack *new_prf;
14962 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
14965 if (PORT_ID(priv) != owner)
14966 return rte_flow_error_set(error, EACCES,
14967 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14969 "CT object owned by another port");
14970 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
14971 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
14973 return rte_flow_error_set(error, ENOMEM,
14974 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14976 "CT object is inactive");
14977 new_prf = &update->new_ct;
14978 if (update->direction)
14979 ct->is_original = !!new_prf->is_original_dir;
14980 if (update->state) {
14981 /* Only validate the profile when it needs to be updated. */
14982 ret = mlx5_validate_action_ct(dev, new_prf, error);
14985 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
14987 return rte_flow_error_set(error, EIO,
14988 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14990 "Failed to send CT context update WQE");
14991 /* Block until ready or a failure. */
14992 ret = mlx5_aso_ct_available(priv->sh, ct);
14994 rte_flow_error_set(error, rte_errno,
14995 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14997 "Timeout to get the CT update");
15003 * Updates in place shared action configuration, lock free,
15004 * (mutex should be acquired by caller).
15007 * Pointer to the Ethernet device structure.
15008 * @param[in] handle
15009 * The indirect action object handle to be updated.
15010 * @param[in] update
15011 * Action specification used to modify the action pointed by *handle*.
15012 * *update* could be of same type with the action pointed by the *handle*
15013 * handle argument, or some other structures like a wrapper, depending on
15014 * the indirect action type.
15015 * @param[out] error
15016 * Perform verbose error reporting if not NULL. Initialized in case of
15020 * 0 on success, otherwise negative errno value.
15023 flow_dv_action_update(struct rte_eth_dev *dev,
15024 struct rte_flow_action_handle *handle,
15025 const void *update,
15026 struct rte_flow_error *err)
15028 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15029 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15030 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15031 const void *action_conf;
15034 case MLX5_INDIRECT_ACTION_TYPE_RSS:
15035 action_conf = ((const struct rte_flow_action *)update)->conf;
15036 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15037 case MLX5_INDIRECT_ACTION_TYPE_CT:
15038 return __flow_dv_action_ct_update(dev, idx, update, err);
15040 return rte_flow_error_set(err, ENOTSUP,
15041 RTE_FLOW_ERROR_TYPE_ACTION,
15043 "action type update not supported");
15048 * Destroy the meter sub policy table rules.
15049 * Lock free, (mutex should be acquired by caller).
15052 * Pointer to Ethernet device.
15053 * @param[in] sub_policy
15054 * Pointer to meter sub policy table.
15057 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15058 struct mlx5_flow_meter_sub_policy *sub_policy)
15060 struct mlx5_priv *priv = dev->data->dev_private;
15061 struct mlx5_flow_tbl_data_entry *tbl;
15062 struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15063 struct mlx5_flow_meter_info *next_fm;
15064 struct mlx5_sub_policy_color_rule *color_rule;
15068 for (i = 0; i < RTE_COLORS; i++) {
15070 if (i == RTE_COLOR_GREEN && policy &&
15071 policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15072 next_fm = mlx5_flow_meter_find(priv,
15073 policy->act_cnt[i].next_mtr_id, NULL);
15074 TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15076 claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15077 tbl = container_of(color_rule->matcher->tbl,
15078 typeof(*tbl), tbl);
15079 mlx5_list_unregister(tbl->matchers,
15080 &color_rule->matcher->entry);
15081 TAILQ_REMOVE(&sub_policy->color_rules[i],
15082 color_rule, next_port);
15083 mlx5_free(color_rule);
15085 mlx5_flow_meter_detach(priv, next_fm);
15088 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15089 if (sub_policy->rix_hrxq[i]) {
15090 if (policy && !policy->is_hierarchy)
15091 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15092 sub_policy->rix_hrxq[i] = 0;
15094 if (sub_policy->jump_tbl[i]) {
15095 flow_dv_tbl_resource_release(MLX5_SH(dev),
15096 sub_policy->jump_tbl[i]);
15097 sub_policy->jump_tbl[i] = NULL;
15100 if (sub_policy->tbl_rsc) {
15101 flow_dv_tbl_resource_release(MLX5_SH(dev),
15102 sub_policy->tbl_rsc);
15103 sub_policy->tbl_rsc = NULL;
15108 * Destroy policy rules, lock free,
15109 * (mutex should be acquired by caller).
15110 * Dispatcher for action type specific call.
15113 * Pointer to the Ethernet device structure.
15114 * @param[in] mtr_policy
15115 * Meter policy struct.
15118 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15119 struct mlx5_flow_meter_policy *mtr_policy)
15122 struct mlx5_flow_meter_sub_policy *sub_policy;
15123 uint16_t sub_policy_num;
15125 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15126 sub_policy_num = (mtr_policy->sub_policy_num >>
15127 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15128 MLX5_MTR_SUB_POLICY_NUM_MASK;
15129 for (j = 0; j < sub_policy_num; j++) {
15130 sub_policy = mtr_policy->sub_policys[i][j];
15132 __flow_dv_destroy_sub_policy_rules(dev,
15139 * Destroy policy action, lock free,
15140 * (mutex should be acquired by caller).
15141 * Dispatcher for action type specific call.
15144 * Pointer to the Ethernet device structure.
15145 * @param[in] mtr_policy
15146 * Meter policy struct.
15149 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15150 struct mlx5_flow_meter_policy *mtr_policy)
15152 struct rte_flow_action *rss_action;
15153 struct mlx5_flow_handle dev_handle;
15156 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15157 if (mtr_policy->act_cnt[i].rix_mark) {
15158 flow_dv_tag_release(dev,
15159 mtr_policy->act_cnt[i].rix_mark);
15160 mtr_policy->act_cnt[i].rix_mark = 0;
15162 if (mtr_policy->act_cnt[i].modify_hdr) {
15163 dev_handle.dvh.modify_hdr =
15164 mtr_policy->act_cnt[i].modify_hdr;
15165 flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15167 switch (mtr_policy->act_cnt[i].fate_action) {
15168 case MLX5_FLOW_FATE_SHARED_RSS:
15169 rss_action = mtr_policy->act_cnt[i].rss;
15170 mlx5_free(rss_action);
15172 case MLX5_FLOW_FATE_PORT_ID:
15173 if (mtr_policy->act_cnt[i].rix_port_id_action) {
15174 flow_dv_port_id_action_resource_release(dev,
15175 mtr_policy->act_cnt[i].rix_port_id_action);
15176 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15179 case MLX5_FLOW_FATE_DROP:
15180 case MLX5_FLOW_FATE_JUMP:
15181 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15182 mtr_policy->act_cnt[i].dr_jump_action[j] =
15186 /*Queue action do nothing*/
15190 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15191 mtr_policy->dr_drop_action[j] = NULL;
15195 * Create policy action per domain, lock free,
15196 * (mutex should be acquired by caller).
15197 * Dispatcher for action type specific call.
15200 * Pointer to the Ethernet device structure.
15201 * @param[in] mtr_policy
15202 * Meter policy struct.
15203 * @param[in] action
15204 * Action specification used to create meter actions.
15205 * @param[out] error
15206 * Perform verbose error reporting if not NULL. Initialized in case of
15210 * 0 on success, otherwise negative errno value.
15213 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15214 struct mlx5_flow_meter_policy *mtr_policy,
15215 const struct rte_flow_action *actions[RTE_COLORS],
15216 enum mlx5_meter_domain domain,
15217 struct rte_mtr_error *error)
15219 struct mlx5_priv *priv = dev->data->dev_private;
15220 struct rte_flow_error flow_err;
15221 const struct rte_flow_action *act;
15222 uint64_t action_flags;
15223 struct mlx5_flow_handle dh;
15224 struct mlx5_flow dev_flow;
15225 struct mlx5_flow_dv_port_id_action_resource port_id_action;
15227 uint8_t egress, transfer;
15228 struct mlx5_meter_policy_action_container *act_cnt = NULL;
15230 struct mlx5_flow_dv_modify_hdr_resource res;
15231 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15232 sizeof(struct mlx5_modification_cmd) *
15233 (MLX5_MAX_MODIFY_NUM + 1)];
15235 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15237 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15238 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15239 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15240 memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15241 memset(&port_id_action, 0,
15242 sizeof(struct mlx5_flow_dv_port_id_action_resource));
15243 memset(mhdr_res, 0, sizeof(*mhdr_res));
15244 mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15245 (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15246 MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15247 dev_flow.handle = &dh;
15248 dev_flow.dv.port_id_action = &port_id_action;
15249 dev_flow.external = true;
15250 for (i = 0; i < RTE_COLORS; i++) {
15251 if (i < MLX5_MTR_RTE_COLORS)
15252 act_cnt = &mtr_policy->act_cnt[i];
15253 /* Skip the color policy actions creation. */
15254 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15255 (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15258 for (act = actions[i];
15259 act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15260 switch (act->type) {
15261 case RTE_FLOW_ACTION_TYPE_MARK:
15263 uint32_t tag_be = mlx5_flow_mark_set
15264 (((const struct rte_flow_action_mark *)
15267 if (i >= MLX5_MTR_RTE_COLORS)
15268 return -rte_mtr_error_set(error,
15270 RTE_MTR_ERROR_TYPE_METER_POLICY,
15272 "cannot create policy "
15273 "mark action for this color");
15274 dev_flow.handle->mark = 1;
15275 if (flow_dv_tag_resource_register(dev, tag_be,
15276 &dev_flow, &flow_err))
15277 return -rte_mtr_error_set(error,
15279 RTE_MTR_ERROR_TYPE_METER_POLICY,
15281 "cannot setup policy mark action");
15282 MLX5_ASSERT(dev_flow.dv.tag_resource);
15283 act_cnt->rix_mark =
15284 dev_flow.handle->dvh.rix_tag;
15285 action_flags |= MLX5_FLOW_ACTION_MARK;
15288 case RTE_FLOW_ACTION_TYPE_SET_TAG:
15289 if (i >= MLX5_MTR_RTE_COLORS)
15290 return -rte_mtr_error_set(error,
15292 RTE_MTR_ERROR_TYPE_METER_POLICY,
15294 "cannot create policy "
15295 "set tag action for this color");
15296 if (flow_dv_convert_action_set_tag
15298 (const struct rte_flow_action_set_tag *)
15299 act->conf, &flow_err))
15300 return -rte_mtr_error_set(error,
15302 RTE_MTR_ERROR_TYPE_METER_POLICY,
15303 NULL, "cannot convert policy "
15305 if (!mhdr_res->actions_num)
15306 return -rte_mtr_error_set(error,
15308 RTE_MTR_ERROR_TYPE_METER_POLICY,
15309 NULL, "cannot find policy "
15311 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15313 case RTE_FLOW_ACTION_TYPE_DROP:
15315 struct mlx5_flow_mtr_mng *mtrmng =
15317 struct mlx5_flow_tbl_data_entry *tbl_data;
15320 * Create the drop table with
15321 * METER DROP level.
15323 if (!mtrmng->drop_tbl[domain]) {
15324 mtrmng->drop_tbl[domain] =
15325 flow_dv_tbl_resource_get(dev,
15326 MLX5_FLOW_TABLE_LEVEL_METER,
15327 egress, transfer, false, NULL, 0,
15328 0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15329 if (!mtrmng->drop_tbl[domain])
15330 return -rte_mtr_error_set
15332 RTE_MTR_ERROR_TYPE_METER_POLICY,
15334 "Failed to create meter drop table");
15336 tbl_data = container_of
15337 (mtrmng->drop_tbl[domain],
15338 struct mlx5_flow_tbl_data_entry, tbl);
15339 if (i < MLX5_MTR_RTE_COLORS) {
15340 act_cnt->dr_jump_action[domain] =
15341 tbl_data->jump.action;
15342 act_cnt->fate_action =
15343 MLX5_FLOW_FATE_DROP;
15345 if (i == RTE_COLOR_RED)
15346 mtr_policy->dr_drop_action[domain] =
15347 tbl_data->jump.action;
15348 action_flags |= MLX5_FLOW_ACTION_DROP;
15351 case RTE_FLOW_ACTION_TYPE_QUEUE:
15353 if (i >= MLX5_MTR_RTE_COLORS)
15354 return -rte_mtr_error_set(error,
15356 RTE_MTR_ERROR_TYPE_METER_POLICY,
15357 NULL, "cannot create policy "
15358 "fate queue for this color");
15360 ((const struct rte_flow_action_queue *)
15361 (act->conf))->index;
15362 act_cnt->fate_action =
15363 MLX5_FLOW_FATE_QUEUE;
15364 dev_flow.handle->fate_action =
15365 MLX5_FLOW_FATE_QUEUE;
15366 mtr_policy->is_queue = 1;
15367 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15370 case RTE_FLOW_ACTION_TYPE_RSS:
15374 if (i >= MLX5_MTR_RTE_COLORS)
15375 return -rte_mtr_error_set(error,
15377 RTE_MTR_ERROR_TYPE_METER_POLICY,
15379 "cannot create policy "
15380 "rss action for this color");
15382 * Save RSS conf into policy struct
15383 * for translate stage.
15385 rss_size = (int)rte_flow_conv
15386 (RTE_FLOW_CONV_OP_ACTION,
15387 NULL, 0, act, &flow_err);
15389 return -rte_mtr_error_set(error,
15391 RTE_MTR_ERROR_TYPE_METER_POLICY,
15392 NULL, "Get the wrong "
15393 "rss action struct size");
15394 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15395 rss_size, 0, SOCKET_ID_ANY);
15397 return -rte_mtr_error_set(error,
15399 RTE_MTR_ERROR_TYPE_METER_POLICY,
15401 "Fail to malloc rss action memory");
15402 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15403 act_cnt->rss, rss_size,
15406 return -rte_mtr_error_set(error,
15408 RTE_MTR_ERROR_TYPE_METER_POLICY,
15409 NULL, "Fail to save "
15410 "rss action into policy struct");
15411 act_cnt->fate_action =
15412 MLX5_FLOW_FATE_SHARED_RSS;
15413 action_flags |= MLX5_FLOW_ACTION_RSS;
15416 case RTE_FLOW_ACTION_TYPE_PORT_ID:
15418 struct mlx5_flow_dv_port_id_action_resource
15420 uint32_t port_id = 0;
15422 if (i >= MLX5_MTR_RTE_COLORS)
15423 return -rte_mtr_error_set(error,
15425 RTE_MTR_ERROR_TYPE_METER_POLICY,
15426 NULL, "cannot create policy "
15427 "port action for this color");
15428 memset(&port_id_resource, 0,
15429 sizeof(port_id_resource));
15430 if (flow_dv_translate_action_port_id(dev, act,
15431 &port_id, &flow_err))
15432 return -rte_mtr_error_set(error,
15434 RTE_MTR_ERROR_TYPE_METER_POLICY,
15435 NULL, "cannot translate "
15436 "policy port action");
15437 port_id_resource.port_id = port_id;
15438 if (flow_dv_port_id_action_resource_register
15439 (dev, &port_id_resource,
15440 &dev_flow, &flow_err))
15441 return -rte_mtr_error_set(error,
15443 RTE_MTR_ERROR_TYPE_METER_POLICY,
15444 NULL, "cannot setup "
15445 "policy port action");
15446 act_cnt->rix_port_id_action =
15447 dev_flow.handle->rix_port_id_action;
15448 act_cnt->fate_action =
15449 MLX5_FLOW_FATE_PORT_ID;
15450 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15453 case RTE_FLOW_ACTION_TYPE_JUMP:
15455 uint32_t jump_group = 0;
15456 uint32_t table = 0;
15457 struct mlx5_flow_tbl_data_entry *tbl_data;
15458 struct flow_grp_info grp_info = {
15459 .external = !!dev_flow.external,
15460 .transfer = !!transfer,
15461 .fdb_def_rule = !!priv->fdb_def_rule,
15463 .skip_scale = dev_flow.skip_scale &
15464 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15466 struct mlx5_flow_meter_sub_policy *sub_policy =
15467 mtr_policy->sub_policys[domain][0];
15469 if (i >= MLX5_MTR_RTE_COLORS)
15470 return -rte_mtr_error_set(error,
15472 RTE_MTR_ERROR_TYPE_METER_POLICY,
15474 "cannot create policy "
15475 "jump action for this color");
15477 ((const struct rte_flow_action_jump *)
15479 if (mlx5_flow_group_to_table(dev, NULL,
15482 &grp_info, &flow_err))
15483 return -rte_mtr_error_set(error,
15485 RTE_MTR_ERROR_TYPE_METER_POLICY,
15486 NULL, "cannot setup "
15487 "policy jump action");
15488 sub_policy->jump_tbl[i] =
15489 flow_dv_tbl_resource_get(dev,
15492 !!dev_flow.external,
15493 NULL, jump_group, 0,
15496 (!sub_policy->jump_tbl[i])
15497 return -rte_mtr_error_set(error,
15499 RTE_MTR_ERROR_TYPE_METER_POLICY,
15500 NULL, "cannot create jump action.");
15501 tbl_data = container_of
15502 (sub_policy->jump_tbl[i],
15503 struct mlx5_flow_tbl_data_entry, tbl);
15504 act_cnt->dr_jump_action[domain] =
15505 tbl_data->jump.action;
15506 act_cnt->fate_action =
15507 MLX5_FLOW_FATE_JUMP;
15508 action_flags |= MLX5_FLOW_ACTION_JUMP;
15512 * No need to check meter hierarchy for Y or R colors
15513 * here since it is done in the validation stage.
15515 case RTE_FLOW_ACTION_TYPE_METER:
15517 const struct rte_flow_action_meter *mtr;
15518 struct mlx5_flow_meter_info *next_fm;
15519 struct mlx5_flow_meter_policy *next_policy;
15520 struct rte_flow_action tag_action;
15521 struct mlx5_rte_flow_action_set_tag set_tag;
15522 uint32_t next_mtr_idx = 0;
15525 next_fm = mlx5_flow_meter_find(priv,
15529 return -rte_mtr_error_set(error, EINVAL,
15530 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15531 "Fail to find next meter.");
15532 if (next_fm->def_policy)
15533 return -rte_mtr_error_set(error, EINVAL,
15534 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15535 "Hierarchy only supports termination meter.");
15536 next_policy = mlx5_flow_meter_policy_find(dev,
15537 next_fm->policy_id, NULL);
15538 MLX5_ASSERT(next_policy);
15539 if (next_fm->drop_cnt) {
15542 mlx5_flow_get_reg_id(dev,
15545 (struct rte_flow_error *)error);
15546 set_tag.offset = (priv->mtr_reg_share ?
15547 MLX5_MTR_COLOR_BITS : 0);
15548 set_tag.length = (priv->mtr_reg_share ?
15549 MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15551 set_tag.data = next_mtr_idx;
15553 (enum rte_flow_action_type)
15554 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15555 tag_action.conf = &set_tag;
15556 if (flow_dv_convert_action_set_reg
15557 (mhdr_res, &tag_action,
15558 (struct rte_flow_error *)error))
15561 MLX5_FLOW_ACTION_SET_TAG;
15563 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15564 act_cnt->next_mtr_id = next_fm->meter_id;
15565 act_cnt->next_sub_policy = NULL;
15566 mtr_policy->is_hierarchy = 1;
15567 mtr_policy->dev = next_policy->dev;
15569 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15573 return -rte_mtr_error_set(error, ENOTSUP,
15574 RTE_MTR_ERROR_TYPE_METER_POLICY,
15575 NULL, "action type not supported");
15577 if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15578 /* create modify action if needed. */
15579 dev_flow.dv.group = 1;
15580 if (flow_dv_modify_hdr_resource_register
15581 (dev, mhdr_res, &dev_flow, &flow_err))
15582 return -rte_mtr_error_set(error,
15584 RTE_MTR_ERROR_TYPE_METER_POLICY,
15585 NULL, "cannot register policy "
15587 act_cnt->modify_hdr =
15588 dev_flow.handle->dvh.modify_hdr;
15596 * Create policy action per domain, lock free,
15597 * (mutex should be acquired by caller).
15598 * Dispatcher for action type specific call.
15601 * Pointer to the Ethernet device structure.
15602 * @param[in] mtr_policy
15603 * Meter policy struct.
15604 * @param[in] action
15605 * Action specification used to create meter actions.
15606 * @param[out] error
15607 * Perform verbose error reporting if not NULL. Initialized in case of
15611 * 0 on success, otherwise negative errno value.
15614 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15615 struct mlx5_flow_meter_policy *mtr_policy,
15616 const struct rte_flow_action *actions[RTE_COLORS],
15617 struct rte_mtr_error *error)
15620 uint16_t sub_policy_num;
15622 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15623 sub_policy_num = (mtr_policy->sub_policy_num >>
15624 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15625 MLX5_MTR_SUB_POLICY_NUM_MASK;
15626 if (sub_policy_num) {
15627 ret = __flow_dv_create_domain_policy_acts(dev,
15628 mtr_policy, actions,
15629 (enum mlx5_meter_domain)i, error);
15630 /* Cleaning resource is done in the caller level. */
15639 * Query a DV flow rule for its statistics via DevX.
15642 * Pointer to Ethernet device.
15643 * @param[in] cnt_idx
15644 * Index to the flow counter.
15646 * Data retrieved by the query.
15647 * @param[out] error
15648 * Perform verbose error reporting if not NULL.
15651 * 0 on success, a negative errno value otherwise and rte_errno is set.
15654 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15655 struct rte_flow_error *error)
15657 struct mlx5_priv *priv = dev->data->dev_private;
15658 struct rte_flow_query_count *qc = data;
15660 if (!priv->config.devx)
15661 return rte_flow_error_set(error, ENOTSUP,
15662 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15664 "counters are not supported");
15666 uint64_t pkts, bytes;
15667 struct mlx5_flow_counter *cnt;
15668 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15671 return rte_flow_error_set(error, -err,
15672 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15673 NULL, "cannot read counters");
15674 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15677 qc->hits = pkts - cnt->hits;
15678 qc->bytes = bytes - cnt->bytes;
15681 cnt->bytes = bytes;
15685 return rte_flow_error_set(error, EINVAL,
15686 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15688 "counters are not available");
15692 flow_dv_action_query(struct rte_eth_dev *dev,
15693 const struct rte_flow_action_handle *handle, void *data,
15694 struct rte_flow_error *error)
15696 struct mlx5_age_param *age_param;
15697 struct rte_flow_query_age *resp;
15698 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15699 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15700 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15701 struct mlx5_priv *priv = dev->data->dev_private;
15702 struct mlx5_aso_ct_action *ct;
15707 case MLX5_INDIRECT_ACTION_TYPE_AGE:
15708 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15710 resp->aged = __atomic_load_n(&age_param->state,
15711 __ATOMIC_RELAXED) == AGE_TMOUT ?
15713 resp->sec_since_last_hit_valid = !resp->aged;
15714 if (resp->sec_since_last_hit_valid)
15715 resp->sec_since_last_hit = __atomic_load_n
15716 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15718 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15719 return flow_dv_query_count(dev, idx, data, error);
15720 case MLX5_INDIRECT_ACTION_TYPE_CT:
15721 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15722 if (owner != PORT_ID(priv))
15723 return rte_flow_error_set(error, EACCES,
15724 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15726 "CT object owned by another port");
15727 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15728 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15731 return rte_flow_error_set(error, EFAULT,
15732 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15734 "CT object is inactive");
15735 ((struct rte_flow_action_conntrack *)data)->peer_port =
15737 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15739 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15740 return rte_flow_error_set(error, EIO,
15741 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15743 "Failed to query CT context");
15746 return rte_flow_error_set(error, ENOTSUP,
15747 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15748 "action type query not supported");
15753 * Query a flow rule AGE action for aging information.
15756 * Pointer to Ethernet device.
15758 * Pointer to the sub flow.
15760 * data retrieved by the query.
15761 * @param[out] error
15762 * Perform verbose error reporting if not NULL.
15765 * 0 on success, a negative errno value otherwise and rte_errno is set.
15768 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15769 void *data, struct rte_flow_error *error)
15771 struct rte_flow_query_age *resp = data;
15772 struct mlx5_age_param *age_param;
15775 struct mlx5_aso_age_action *act =
15776 flow_aso_age_get_by_idx(dev, flow->age);
15778 age_param = &act->age_params;
15779 } else if (flow->counter) {
15780 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15782 if (!age_param || !age_param->timeout)
15783 return rte_flow_error_set
15785 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15786 NULL, "cannot read age data");
15788 return rte_flow_error_set(error, EINVAL,
15789 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15790 NULL, "age data not available");
15792 resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15794 resp->sec_since_last_hit_valid = !resp->aged;
15795 if (resp->sec_since_last_hit_valid)
15796 resp->sec_since_last_hit = __atomic_load_n
15797 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15804 * @see rte_flow_query()
15805 * @see rte_flow_ops
15808 flow_dv_query(struct rte_eth_dev *dev,
15809 struct rte_flow *flow __rte_unused,
15810 const struct rte_flow_action *actions __rte_unused,
15811 void *data __rte_unused,
15812 struct rte_flow_error *error __rte_unused)
15816 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15817 switch (actions->type) {
15818 case RTE_FLOW_ACTION_TYPE_VOID:
15820 case RTE_FLOW_ACTION_TYPE_COUNT:
15821 ret = flow_dv_query_count(dev, flow->counter, data,
15824 case RTE_FLOW_ACTION_TYPE_AGE:
15825 ret = flow_dv_query_age(dev, flow, data, error);
15828 return rte_flow_error_set(error, ENOTSUP,
15829 RTE_FLOW_ERROR_TYPE_ACTION,
15831 "action not supported");
15838 * Destroy the meter table set.
15839 * Lock free, (mutex should be acquired by caller).
15842 * Pointer to Ethernet device.
15844 * Meter information table.
15847 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
15848 struct mlx5_flow_meter_info *fm)
15850 struct mlx5_priv *priv = dev->data->dev_private;
15853 if (!fm || !priv->config.dv_flow_en)
15855 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15856 if (fm->drop_rule[i]) {
15857 claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
15858 fm->drop_rule[i] = NULL;
15864 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
15866 struct mlx5_priv *priv = dev->data->dev_private;
15867 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15868 struct mlx5_flow_tbl_data_entry *tbl;
15871 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15872 if (mtrmng->def_rule[i]) {
15873 claim_zero(mlx5_flow_os_destroy_flow
15874 (mtrmng->def_rule[i]));
15875 mtrmng->def_rule[i] = NULL;
15877 if (mtrmng->def_matcher[i]) {
15878 tbl = container_of(mtrmng->def_matcher[i]->tbl,
15879 struct mlx5_flow_tbl_data_entry, tbl);
15880 mlx5_list_unregister(tbl->matchers,
15881 &mtrmng->def_matcher[i]->entry);
15882 mtrmng->def_matcher[i] = NULL;
15884 for (j = 0; j < MLX5_REG_BITS; j++) {
15885 if (mtrmng->drop_matcher[i][j]) {
15887 container_of(mtrmng->drop_matcher[i][j]->tbl,
15888 struct mlx5_flow_tbl_data_entry,
15890 mlx5_list_unregister(tbl->matchers,
15891 &mtrmng->drop_matcher[i][j]->entry);
15892 mtrmng->drop_matcher[i][j] = NULL;
15895 if (mtrmng->drop_tbl[i]) {
15896 flow_dv_tbl_resource_release(MLX5_SH(dev),
15897 mtrmng->drop_tbl[i]);
15898 mtrmng->drop_tbl[i] = NULL;
15903 /* Number of meter flow actions, count and jump or count and drop. */
15904 #define METER_ACTIONS 2
15907 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
15908 enum mlx5_meter_domain domain)
15910 struct mlx5_priv *priv = dev->data->dev_private;
15911 struct mlx5_flow_meter_def_policy *def_policy =
15912 priv->sh->mtrmng->def_policy[domain];
15914 __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
15915 mlx5_free(def_policy);
15916 priv->sh->mtrmng->def_policy[domain] = NULL;
15920 * Destroy the default policy table set.
15923 * Pointer to Ethernet device.
15926 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
15928 struct mlx5_priv *priv = dev->data->dev_private;
15931 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
15932 if (priv->sh->mtrmng->def_policy[i])
15933 __flow_dv_destroy_domain_def_policy(dev,
15934 (enum mlx5_meter_domain)i);
15935 priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
15939 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
15940 uint32_t color_reg_c_idx,
15941 enum rte_color color, void *matcher_object,
15942 int actions_n, void *actions,
15943 bool match_src_port, const struct rte_flow_item *item,
15944 void **rule, const struct rte_flow_attr *attr)
15947 struct mlx5_flow_dv_match_params value = {
15948 .size = sizeof(value.buf),
15950 struct mlx5_flow_dv_match_params matcher = {
15951 .size = sizeof(matcher.buf),
15953 struct mlx5_priv *priv = dev->data->dev_private;
15956 if (match_src_port && (priv->representor || priv->master)) {
15957 if (flow_dv_translate_item_port_id(dev, matcher.buf,
15958 value.buf, item, attr)) {
15959 DRV_LOG(ERR, "Failed to create meter policy%d flow's"
15960 " value with port.", color);
15964 flow_dv_match_meta_reg(matcher.buf, value.buf,
15965 (enum modify_reg)color_reg_c_idx,
15966 rte_col_2_mlx5_col(color), UINT32_MAX);
15967 misc_mask = flow_dv_matcher_enable(value.buf);
15968 __flow_dv_adjust_buf_size(&value.size, misc_mask);
15969 ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
15970 actions_n, actions, rule);
15972 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
15979 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
15980 uint32_t color_reg_c_idx,
15982 struct mlx5_flow_meter_sub_policy *sub_policy,
15983 const struct rte_flow_attr *attr,
15984 bool match_src_port,
15985 const struct rte_flow_item *item,
15986 struct mlx5_flow_dv_matcher **policy_matcher,
15987 struct rte_flow_error *error)
15989 struct mlx5_list_entry *entry;
15990 struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
15991 struct mlx5_flow_dv_matcher matcher = {
15993 .size = sizeof(matcher.mask.buf),
15997 struct mlx5_flow_dv_match_params value = {
15998 .size = sizeof(value.buf),
16000 struct mlx5_flow_cb_ctx ctx = {
16004 struct mlx5_flow_tbl_data_entry *tbl_data;
16005 struct mlx5_priv *priv = dev->data->dev_private;
16006 const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16008 if (match_src_port && (priv->representor || priv->master)) {
16009 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16010 value.buf, item, attr)) {
16011 DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16012 " with port.", priority);
16016 tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16017 if (priority < RTE_COLOR_RED)
16018 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16019 (enum modify_reg)color_reg_c_idx, 0, color_mask);
16020 matcher.priority = priority;
16021 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16022 matcher.mask.size);
16023 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16025 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16029 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16034 * Create the policy rules per domain.
16037 * Pointer to Ethernet device.
16038 * @param[in] sub_policy
16039 * Pointer to sub policy table..
16040 * @param[in] egress
16041 * Direction of the table.
16042 * @param[in] transfer
16043 * E-Switch or NIC flow.
16045 * Pointer to policy action list per color.
16048 * 0 on success, -1 otherwise.
16051 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16052 struct mlx5_flow_meter_sub_policy *sub_policy,
16053 uint8_t egress, uint8_t transfer, bool match_src_port,
16054 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16056 struct mlx5_priv *priv = dev->data->dev_private;
16057 struct rte_flow_error flow_err;
16058 uint32_t color_reg_c_idx;
16059 struct rte_flow_attr attr = {
16060 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16063 .egress = !!egress,
16064 .transfer = !!transfer,
16068 int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16069 struct mlx5_sub_policy_color_rule *color_rule;
16071 struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16075 /* Create policy table with POLICY level. */
16076 if (!sub_policy->tbl_rsc)
16077 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16078 MLX5_FLOW_TABLE_LEVEL_POLICY,
16079 egress, transfer, false, NULL, 0, 0,
16080 sub_policy->idx, &flow_err);
16081 if (!sub_policy->tbl_rsc) {
16083 "Failed to create meter sub policy table.");
16086 /* Prepare matchers. */
16087 color_reg_c_idx = ret;
16088 for (i = 0; i < RTE_COLORS; i++) {
16089 TAILQ_INIT(&sub_policy->color_rules[i]);
16090 if (!acts[i].actions_n)
16092 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16093 sizeof(struct mlx5_sub_policy_color_rule),
16096 DRV_LOG(ERR, "No memory to create color rule.");
16099 tmp_rules[i] = color_rule;
16100 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16101 color_rule, next_port);
16102 color_rule->src_port = priv->representor_id;
16105 /* Create matchers for colors. */
16106 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16107 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16108 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16109 &attr, svport_match, NULL,
16110 &color_rule->matcher, &flow_err)) {
16111 DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16114 /* Create flow, matching color. */
16115 if (__flow_dv_create_policy_flow(dev,
16116 color_reg_c_idx, (enum rte_color)i,
16117 color_rule->matcher->matcher_object,
16118 acts[i].actions_n, acts[i].dv_actions,
16119 svport_match, NULL, &color_rule->rule,
16121 DRV_LOG(ERR, "Failed to create color%u rule.", i);
16127 /* All the policy rules will be cleared. */
16129 color_rule = tmp_rules[i];
16131 if (color_rule->rule)
16132 mlx5_flow_os_destroy_flow(color_rule->rule);
16133 if (color_rule->matcher) {
16134 struct mlx5_flow_tbl_data_entry *tbl =
16135 container_of(color_rule->matcher->tbl,
16136 typeof(*tbl), tbl);
16137 mlx5_list_unregister(tbl->matchers,
16138 &color_rule->matcher->entry);
16140 TAILQ_REMOVE(&sub_policy->color_rules[i],
16141 color_rule, next_port);
16142 mlx5_free(color_rule);
16149 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16150 struct mlx5_flow_meter_policy *mtr_policy,
16151 struct mlx5_flow_meter_sub_policy *sub_policy,
16154 struct mlx5_priv *priv = dev->data->dev_private;
16155 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16156 struct mlx5_flow_dv_tag_resource *tag;
16157 struct mlx5_flow_dv_port_id_action_resource *port_action;
16158 struct mlx5_hrxq *hrxq;
16159 struct mlx5_flow_meter_info *next_fm = NULL;
16160 struct mlx5_flow_meter_policy *next_policy;
16161 struct mlx5_flow_meter_sub_policy *next_sub_policy;
16162 struct mlx5_flow_tbl_data_entry *tbl_data;
16163 struct rte_flow_error error;
16164 uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16165 uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16166 bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16167 bool match_src_port = false;
16170 /* If RSS or Queue, no previous actions / rules is created. */
16171 for (i = 0; i < RTE_COLORS; i++) {
16172 acts[i].actions_n = 0;
16173 if (i == RTE_COLOR_RED) {
16174 /* Only support drop on red. */
16175 acts[i].dv_actions[0] =
16176 mtr_policy->dr_drop_action[domain];
16177 acts[i].actions_n = 1;
16180 if (i == RTE_COLOR_GREEN &&
16181 mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16182 struct rte_flow_attr attr = {
16183 .transfer = transfer
16186 next_fm = mlx5_flow_meter_find(priv,
16187 mtr_policy->act_cnt[i].next_mtr_id,
16191 "Failed to get next hierarchy meter.");
16194 if (mlx5_flow_meter_attach(priv, next_fm,
16196 DRV_LOG(ERR, "%s", error.message);
16200 /* Meter action must be the first for TX. */
16202 acts[i].dv_actions[acts[i].actions_n] =
16203 next_fm->meter_action;
16204 acts[i].actions_n++;
16207 if (mtr_policy->act_cnt[i].rix_mark) {
16208 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16209 mtr_policy->act_cnt[i].rix_mark);
16211 DRV_LOG(ERR, "Failed to find "
16212 "mark action for policy.");
16215 acts[i].dv_actions[acts[i].actions_n] = tag->action;
16216 acts[i].actions_n++;
16218 if (mtr_policy->act_cnt[i].modify_hdr) {
16219 acts[i].dv_actions[acts[i].actions_n] =
16220 mtr_policy->act_cnt[i].modify_hdr->action;
16221 acts[i].actions_n++;
16223 if (mtr_policy->act_cnt[i].fate_action) {
16224 switch (mtr_policy->act_cnt[i].fate_action) {
16225 case MLX5_FLOW_FATE_PORT_ID:
16226 port_action = mlx5_ipool_get
16227 (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16228 mtr_policy->act_cnt[i].rix_port_id_action);
16229 if (!port_action) {
16230 DRV_LOG(ERR, "Failed to find "
16231 "port action for policy.");
16234 acts[i].dv_actions[acts[i].actions_n] =
16235 port_action->action;
16236 acts[i].actions_n++;
16237 mtr_policy->dev = dev;
16238 match_src_port = true;
16240 case MLX5_FLOW_FATE_DROP:
16241 case MLX5_FLOW_FATE_JUMP:
16242 acts[i].dv_actions[acts[i].actions_n] =
16243 mtr_policy->act_cnt[i].dr_jump_action[domain];
16244 acts[i].actions_n++;
16246 case MLX5_FLOW_FATE_SHARED_RSS:
16247 case MLX5_FLOW_FATE_QUEUE:
16248 hrxq = mlx5_ipool_get
16249 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16250 sub_policy->rix_hrxq[i]);
16252 DRV_LOG(ERR, "Failed to find "
16253 "queue action for policy.");
16256 acts[i].dv_actions[acts[i].actions_n] =
16258 acts[i].actions_n++;
16260 case MLX5_FLOW_FATE_MTR:
16263 "No next hierarchy meter.");
16267 acts[i].dv_actions[acts[i].actions_n] =
16268 next_fm->meter_action;
16269 acts[i].actions_n++;
16271 if (mtr_policy->act_cnt[i].next_sub_policy) {
16273 mtr_policy->act_cnt[i].next_sub_policy;
16276 mlx5_flow_meter_policy_find(dev,
16277 next_fm->policy_id, NULL);
16278 MLX5_ASSERT(next_policy);
16280 next_policy->sub_policys[domain][0];
16283 container_of(next_sub_policy->tbl_rsc,
16284 struct mlx5_flow_tbl_data_entry, tbl);
16285 acts[i].dv_actions[acts[i].actions_n++] =
16286 tbl_data->jump.action;
16287 if (mtr_policy->act_cnt[i].modify_hdr)
16288 match_src_port = !!transfer;
16291 /*Queue action do nothing*/
16296 if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16297 egress, transfer, match_src_port, acts)) {
16299 "Failed to create policy rules per domain.");
16305 mlx5_flow_meter_detach(priv, next_fm);
16310 * Create the policy rules.
16313 * Pointer to Ethernet device.
16314 * @param[in,out] mtr_policy
16315 * Pointer to meter policy table.
16318 * 0 on success, -1 otherwise.
16321 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16322 struct mlx5_flow_meter_policy *mtr_policy)
16325 uint16_t sub_policy_num;
16327 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16328 sub_policy_num = (mtr_policy->sub_policy_num >>
16329 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16330 MLX5_MTR_SUB_POLICY_NUM_MASK;
16331 if (!sub_policy_num)
16333 /* Prepare actions list and create policy rules. */
16334 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16335 mtr_policy->sub_policys[i][0], i)) {
16336 DRV_LOG(ERR, "Failed to create policy action "
16337 "list per domain.");
16345 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16347 struct mlx5_priv *priv = dev->data->dev_private;
16348 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16349 struct mlx5_flow_meter_def_policy *def_policy;
16350 struct mlx5_flow_tbl_resource *jump_tbl;
16351 struct mlx5_flow_tbl_data_entry *tbl_data;
16352 uint8_t egress, transfer;
16353 struct rte_flow_error error;
16354 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16357 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16358 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16359 def_policy = mtrmng->def_policy[domain];
16361 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16362 sizeof(struct mlx5_flow_meter_def_policy),
16363 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16365 DRV_LOG(ERR, "Failed to alloc default policy table.");
16366 goto def_policy_error;
16368 mtrmng->def_policy[domain] = def_policy;
16369 /* Create the meter suffix table with SUFFIX level. */
16370 jump_tbl = flow_dv_tbl_resource_get(dev,
16371 MLX5_FLOW_TABLE_LEVEL_METER,
16372 egress, transfer, false, NULL, 0,
16373 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16376 "Failed to create meter suffix table.");
16377 goto def_policy_error;
16379 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16380 tbl_data = container_of(jump_tbl,
16381 struct mlx5_flow_tbl_data_entry, tbl);
16382 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16383 tbl_data->jump.action;
16384 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16385 acts[RTE_COLOR_GREEN].actions_n = 1;
16387 * YELLOW has the same default policy as GREEN does.
16388 * G & Y share the same table and action. The 2nd time of table
16389 * resource getting is just to update the reference count for
16390 * the releasing stage.
16392 jump_tbl = flow_dv_tbl_resource_get(dev,
16393 MLX5_FLOW_TABLE_LEVEL_METER,
16394 egress, transfer, false, NULL, 0,
16395 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16398 "Failed to get meter suffix table.");
16399 goto def_policy_error;
16401 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16402 tbl_data = container_of(jump_tbl,
16403 struct mlx5_flow_tbl_data_entry, tbl);
16404 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16405 tbl_data->jump.action;
16406 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16407 acts[RTE_COLOR_YELLOW].actions_n = 1;
16408 /* Create jump action to the drop table. */
16409 if (!mtrmng->drop_tbl[domain]) {
16410 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16411 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16412 egress, transfer, false, NULL, 0,
16413 0, MLX5_MTR_TABLE_ID_DROP, &error);
16414 if (!mtrmng->drop_tbl[domain]) {
16415 DRV_LOG(ERR, "Failed to create meter "
16416 "drop table for default policy.");
16417 goto def_policy_error;
16420 /* all RED: unique Drop table for jump action. */
16421 tbl_data = container_of(mtrmng->drop_tbl[domain],
16422 struct mlx5_flow_tbl_data_entry, tbl);
16423 def_policy->dr_jump_action[RTE_COLOR_RED] =
16424 tbl_data->jump.action;
16425 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16426 acts[RTE_COLOR_RED].actions_n = 1;
16427 /* Create default policy rules. */
16428 ret = __flow_dv_create_domain_policy_rules(dev,
16429 &def_policy->sub_policy,
16430 egress, transfer, false, acts);
16432 DRV_LOG(ERR, "Failed to create default policy rules.");
16433 goto def_policy_error;
16438 __flow_dv_destroy_domain_def_policy(dev,
16439 (enum mlx5_meter_domain)domain);
16444 * Create the default policy table set.
16447 * Pointer to Ethernet device.
16449 * 0 on success, -1 otherwise.
16452 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16454 struct mlx5_priv *priv = dev->data->dev_private;
16457 /* Non-termination policy table. */
16458 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16459 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16461 if (__flow_dv_create_domain_def_policy(dev, i)) {
16462 DRV_LOG(ERR, "Failed to create default policy");
16463 /* Rollback the created default policies for others. */
16464 flow_dv_destroy_def_policy(dev);
16472 * Create the needed meter tables.
16473 * Lock free, (mutex should be acquired by caller).
16476 * Pointer to Ethernet device.
16478 * Meter information table.
16479 * @param[in] mtr_idx
16481 * @param[in] domain_bitmap
16484 * 0 on success, -1 otherwise.
16487 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16488 struct mlx5_flow_meter_info *fm,
16490 uint8_t domain_bitmap)
16492 struct mlx5_priv *priv = dev->data->dev_private;
16493 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16494 struct rte_flow_error error;
16495 struct mlx5_flow_tbl_data_entry *tbl_data;
16496 uint8_t egress, transfer;
16497 void *actions[METER_ACTIONS];
16498 int domain, ret, i;
16499 struct mlx5_flow_counter *cnt;
16500 struct mlx5_flow_dv_match_params value = {
16501 .size = sizeof(value.buf),
16503 struct mlx5_flow_dv_match_params matcher_para = {
16504 .size = sizeof(matcher_para.buf),
16506 int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16508 uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16509 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16510 struct mlx5_list_entry *entry;
16511 struct mlx5_flow_dv_matcher matcher = {
16513 .size = sizeof(matcher.mask.buf),
16516 struct mlx5_flow_dv_matcher *drop_matcher;
16517 struct mlx5_flow_cb_ctx ctx = {
16523 if (!priv->mtr_en || mtr_id_reg_c < 0) {
16524 rte_errno = ENOTSUP;
16527 for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16528 if (!(domain_bitmap & (1 << domain)) ||
16529 (mtrmng->def_rule[domain] && !fm->drop_cnt))
16531 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16532 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16533 /* Create the drop table with METER DROP level. */
16534 if (!mtrmng->drop_tbl[domain]) {
16535 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16536 MLX5_FLOW_TABLE_LEVEL_METER,
16537 egress, transfer, false, NULL, 0,
16538 0, MLX5_MTR_TABLE_ID_DROP, &error);
16539 if (!mtrmng->drop_tbl[domain]) {
16540 DRV_LOG(ERR, "Failed to create meter drop table.");
16544 /* Create default matcher in drop table. */
16545 matcher.tbl = mtrmng->drop_tbl[domain],
16546 tbl_data = container_of(mtrmng->drop_tbl[domain],
16547 struct mlx5_flow_tbl_data_entry, tbl);
16548 if (!mtrmng->def_matcher[domain]) {
16549 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16550 (enum modify_reg)mtr_id_reg_c,
16552 matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16553 matcher.crc = rte_raw_cksum
16554 ((const void *)matcher.mask.buf,
16555 matcher.mask.size);
16556 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16558 DRV_LOG(ERR, "Failed to register meter "
16559 "drop default matcher.");
16562 mtrmng->def_matcher[domain] = container_of(entry,
16563 struct mlx5_flow_dv_matcher, entry);
16565 /* Create default rule in drop table. */
16566 if (!mtrmng->def_rule[domain]) {
16568 actions[i++] = priv->sh->dr_drop_action;
16569 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16570 (enum modify_reg)mtr_id_reg_c, 0, 0);
16571 misc_mask = flow_dv_matcher_enable(value.buf);
16572 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16573 ret = mlx5_flow_os_create_flow
16574 (mtrmng->def_matcher[domain]->matcher_object,
16575 (void *)&value, i, actions,
16576 &mtrmng->def_rule[domain]);
16578 DRV_LOG(ERR, "Failed to create meter "
16579 "default drop rule for drop table.");
16585 MLX5_ASSERT(mtrmng->max_mtr_bits);
16586 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16587 /* Create matchers for Drop. */
16588 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16589 (enum modify_reg)mtr_id_reg_c, 0,
16590 (mtr_id_mask << mtr_id_offset));
16591 matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16592 matcher.crc = rte_raw_cksum
16593 ((const void *)matcher.mask.buf,
16594 matcher.mask.size);
16595 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16598 "Failed to register meter drop matcher.");
16601 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16602 container_of(entry, struct mlx5_flow_dv_matcher,
16606 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16607 /* Create drop rule, matching meter_id only. */
16608 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16609 (enum modify_reg)mtr_id_reg_c,
16610 (mtr_idx << mtr_id_offset), UINT32_MAX);
16612 cnt = flow_dv_counter_get_by_idx(dev,
16613 fm->drop_cnt, NULL);
16614 actions[i++] = cnt->action;
16615 actions[i++] = priv->sh->dr_drop_action;
16616 misc_mask = flow_dv_matcher_enable(value.buf);
16617 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16618 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16619 (void *)&value, i, actions,
16620 &fm->drop_rule[domain]);
16622 DRV_LOG(ERR, "Failed to create meter "
16623 "drop rule for drop table.");
16629 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16630 if (fm->drop_rule[i]) {
16631 claim_zero(mlx5_flow_os_destroy_flow
16632 (fm->drop_rule[i]));
16633 fm->drop_rule[i] = NULL;
16639 static struct mlx5_flow_meter_sub_policy *
16640 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16641 struct mlx5_flow_meter_policy *mtr_policy,
16642 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16643 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16646 struct mlx5_priv *priv = dev->data->dev_private;
16647 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16648 uint32_t sub_policy_idx = 0;
16649 uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16651 struct mlx5_hrxq *hrxq;
16652 struct mlx5_flow_handle dh;
16653 struct mlx5_meter_policy_action_container *act_cnt;
16654 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16655 uint16_t sub_policy_num;
16657 rte_spinlock_lock(&mtr_policy->sl);
16658 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16661 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16662 if (!hrxq_idx[i]) {
16663 rte_spinlock_unlock(&mtr_policy->sl);
16667 sub_policy_num = (mtr_policy->sub_policy_num >>
16668 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16669 MLX5_MTR_SUB_POLICY_NUM_MASK;
16670 for (j = 0; j < sub_policy_num; j++) {
16671 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16674 mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16677 if (i >= MLX5_MTR_RTE_COLORS) {
16679 * Found the sub policy table with
16680 * the same queue per color.
16682 rte_spinlock_unlock(&mtr_policy->sl);
16683 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16684 mlx5_hrxq_release(dev, hrxq_idx[i]);
16686 return mtr_policy->sub_policys[domain][j];
16689 /* Create sub policy. */
16690 if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16691 /* Reuse the first pre-allocated sub_policy. */
16692 sub_policy = mtr_policy->sub_policys[domain][0];
16693 sub_policy_idx = sub_policy->idx;
16695 sub_policy = mlx5_ipool_zmalloc
16696 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16699 sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16700 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16701 mlx5_hrxq_release(dev, hrxq_idx[i]);
16702 goto rss_sub_policy_error;
16704 sub_policy->idx = sub_policy_idx;
16705 sub_policy->main_policy = mtr_policy;
16707 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16710 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16711 if (mtr_policy->is_hierarchy) {
16712 act_cnt = &mtr_policy->act_cnt[i];
16713 act_cnt->next_sub_policy = next_sub_policy;
16714 mlx5_hrxq_release(dev, hrxq_idx[i]);
16717 * Overwrite the last action from
16718 * RSS action to Queue action.
16720 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16723 DRV_LOG(ERR, "Failed to get policy hrxq");
16724 goto rss_sub_policy_error;
16726 act_cnt = &mtr_policy->act_cnt[i];
16727 if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16728 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16729 if (act_cnt->rix_mark)
16731 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16732 dh.rix_hrxq = hrxq_idx[i];
16733 flow_drv_rxq_flags_set(dev, &dh);
16737 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16738 sub_policy, domain)) {
16739 DRV_LOG(ERR, "Failed to create policy "
16740 "rules for ingress domain.");
16741 goto rss_sub_policy_error;
16743 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16744 i = (mtr_policy->sub_policy_num >>
16745 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16746 MLX5_MTR_SUB_POLICY_NUM_MASK;
16747 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
16748 DRV_LOG(ERR, "No free sub-policy slot.");
16749 goto rss_sub_policy_error;
16751 mtr_policy->sub_policys[domain][i] = sub_policy;
16753 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16754 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16755 mtr_policy->sub_policy_num |=
16756 (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16757 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16759 rte_spinlock_unlock(&mtr_policy->sl);
16762 rss_sub_policy_error:
16764 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16765 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16766 i = (mtr_policy->sub_policy_num >>
16767 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16768 MLX5_MTR_SUB_POLICY_NUM_MASK;
16769 mtr_policy->sub_policys[domain][i] = NULL;
16770 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16774 rte_spinlock_unlock(&mtr_policy->sl);
16779 * Find the policy table for prefix table with RSS.
16782 * Pointer to Ethernet device.
16783 * @param[in] mtr_policy
16784 * Pointer to meter policy table.
16785 * @param[in] rss_desc
16786 * Pointer to rss_desc
16788 * Pointer to table set on success, NULL otherwise and rte_errno is set.
16790 static struct mlx5_flow_meter_sub_policy *
16791 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
16792 struct mlx5_flow_meter_policy *mtr_policy,
16793 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
16795 struct mlx5_priv *priv = dev->data->dev_private;
16796 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16797 struct mlx5_flow_meter_info *next_fm;
16798 struct mlx5_flow_meter_policy *next_policy;
16799 struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
16800 struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
16801 struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
16802 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16803 bool reuse_sub_policy;
16808 /* Iterate hierarchy to get all policies in this hierarchy. */
16809 policies[i++] = mtr_policy;
16810 if (!mtr_policy->is_hierarchy)
16812 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
16813 DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
16816 next_fm = mlx5_flow_meter_find(priv,
16817 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16819 DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
16823 mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
16825 MLX5_ASSERT(next_policy);
16826 mtr_policy = next_policy;
16830 * From last policy to the first one in hierarchy,
16831 * create / get the sub policy for each of them.
16833 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
16837 &reuse_sub_policy);
16839 DRV_LOG(ERR, "Failed to get the sub policy.");
16842 if (!reuse_sub_policy)
16843 sub_policies[j++] = sub_policy;
16844 next_sub_policy = sub_policy;
16849 uint16_t sub_policy_num;
16851 sub_policy = sub_policies[--j];
16852 mtr_policy = sub_policy->main_policy;
16853 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16854 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16855 sub_policy_num = (mtr_policy->sub_policy_num >>
16856 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16857 MLX5_MTR_SUB_POLICY_NUM_MASK;
16858 mtr_policy->sub_policys[domain][sub_policy_num - 1] =
16861 mtr_policy->sub_policy_num &=
16862 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16863 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
16864 mtr_policy->sub_policy_num |=
16865 (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16866 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
16867 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16875 * Create the sub policy tag rule for all meters in hierarchy.
16878 * Pointer to Ethernet device.
16880 * Meter information table.
16881 * @param[in] src_port
16882 * The src port this extra rule should use.
16884 * The src port match item.
16885 * @param[out] error
16886 * Perform verbose error reporting if not NULL.
16888 * 0 on success, a negative errno value otherwise and rte_errno is set.
16891 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
16892 struct mlx5_flow_meter_info *fm,
16894 const struct rte_flow_item *item,
16895 struct rte_flow_error *error)
16897 struct mlx5_priv *priv = dev->data->dev_private;
16898 struct mlx5_flow_meter_policy *mtr_policy;
16899 struct mlx5_flow_meter_sub_policy *sub_policy;
16900 struct mlx5_flow_meter_info *next_fm = NULL;
16901 struct mlx5_flow_meter_policy *next_policy;
16902 struct mlx5_flow_meter_sub_policy *next_sub_policy;
16903 struct mlx5_flow_tbl_data_entry *tbl_data;
16904 struct mlx5_sub_policy_color_rule *color_rule;
16905 struct mlx5_meter_policy_acts acts;
16906 uint32_t color_reg_c_idx;
16907 bool mtr_first = (src_port != UINT16_MAX) ? true : false;
16908 struct rte_flow_attr attr = {
16909 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16916 uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
16919 mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
16920 MLX5_ASSERT(mtr_policy);
16921 if (!mtr_policy->is_hierarchy)
16923 next_fm = mlx5_flow_meter_find(priv,
16924 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16926 return rte_flow_error_set(error, EINVAL,
16927 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16928 "Failed to find next meter in hierarchy.");
16930 if (!next_fm->drop_cnt)
16932 color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
16933 sub_policy = mtr_policy->sub_policys[domain][0];
16934 for (i = 0; i < RTE_COLORS; i++) {
16935 bool rule_exist = false;
16936 struct mlx5_meter_policy_action_container *act_cnt;
16938 if (i >= RTE_COLOR_YELLOW)
16940 TAILQ_FOREACH(color_rule,
16941 &sub_policy->color_rules[i], next_port)
16942 if (color_rule->src_port == src_port) {
16948 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16949 sizeof(struct mlx5_sub_policy_color_rule),
16952 return rte_flow_error_set(error, ENOMEM,
16953 RTE_FLOW_ERROR_TYPE_ACTION,
16954 NULL, "No memory to create tag color rule.");
16955 color_rule->src_port = src_port;
16957 next_policy = mlx5_flow_meter_policy_find(dev,
16958 next_fm->policy_id, NULL);
16959 MLX5_ASSERT(next_policy);
16960 next_sub_policy = next_policy->sub_policys[domain][0];
16961 tbl_data = container_of(next_sub_policy->tbl_rsc,
16962 struct mlx5_flow_tbl_data_entry, tbl);
16963 act_cnt = &mtr_policy->act_cnt[i];
16965 acts.dv_actions[0] = next_fm->meter_action;
16966 acts.dv_actions[1] = act_cnt->modify_hdr->action;
16968 acts.dv_actions[0] = act_cnt->modify_hdr->action;
16969 acts.dv_actions[1] = next_fm->meter_action;
16971 acts.dv_actions[2] = tbl_data->jump.action;
16972 acts.actions_n = 3;
16973 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
16977 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16978 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16980 &color_rule->matcher, error)) {
16981 rte_flow_error_set(error, errno,
16982 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16983 "Failed to create hierarchy meter matcher.");
16986 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
16988 color_rule->matcher->matcher_object,
16989 acts.actions_n, acts.dv_actions,
16991 &color_rule->rule, &attr)) {
16992 rte_flow_error_set(error, errno,
16993 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16994 "Failed to create hierarchy meter rule.");
16997 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16998 color_rule, next_port);
17002 * Recursive call to iterate all meters in hierarchy and
17003 * create needed rules.
17005 return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17006 src_port, item, error);
17009 if (color_rule->rule)
17010 mlx5_flow_os_destroy_flow(color_rule->rule);
17011 if (color_rule->matcher) {
17012 struct mlx5_flow_tbl_data_entry *tbl =
17013 container_of(color_rule->matcher->tbl,
17014 typeof(*tbl), tbl);
17015 mlx5_list_unregister(tbl->matchers,
17016 &color_rule->matcher->entry);
17018 mlx5_free(color_rule);
17021 mlx5_flow_meter_detach(priv, next_fm);
17026 * Destroy the sub policy table with RX queue.
17029 * Pointer to Ethernet device.
17030 * @param[in] mtr_policy
17031 * Pointer to meter policy table.
17034 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17035 struct mlx5_flow_meter_policy *mtr_policy)
17037 struct mlx5_priv *priv = dev->data->dev_private;
17038 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17039 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17041 uint16_t sub_policy_num, new_policy_num;
17043 rte_spinlock_lock(&mtr_policy->sl);
17044 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17045 switch (mtr_policy->act_cnt[i].fate_action) {
17046 case MLX5_FLOW_FATE_SHARED_RSS:
17047 sub_policy_num = (mtr_policy->sub_policy_num >>
17048 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17049 MLX5_MTR_SUB_POLICY_NUM_MASK;
17050 new_policy_num = sub_policy_num;
17051 for (j = 0; j < sub_policy_num; j++) {
17053 mtr_policy->sub_policys[domain][j];
17055 __flow_dv_destroy_sub_policy_rules(dev,
17058 mtr_policy->sub_policys[domain][0]) {
17059 mtr_policy->sub_policys[domain][j] =
17062 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17068 if (new_policy_num != sub_policy_num) {
17069 mtr_policy->sub_policy_num &=
17070 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17071 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17072 mtr_policy->sub_policy_num |=
17074 MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17075 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17078 case MLX5_FLOW_FATE_QUEUE:
17079 sub_policy = mtr_policy->sub_policys[domain][0];
17080 __flow_dv_destroy_sub_policy_rules(dev,
17084 /*Other actions without queue and do nothing*/
17088 rte_spinlock_unlock(&mtr_policy->sl);
17092 * Validate the batch counter support in root table.
17094 * Create a simple flow with invalid counter and drop action on root table to
17095 * validate if batch counter with offset on root table is supported or not.
17098 * Pointer to rte_eth_dev structure.
17101 * 0 on success, a negative errno value otherwise and rte_errno is set.
17104 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17106 struct mlx5_priv *priv = dev->data->dev_private;
17107 struct mlx5_dev_ctx_shared *sh = priv->sh;
17108 struct mlx5_flow_dv_match_params mask = {
17109 .size = sizeof(mask.buf),
17111 struct mlx5_flow_dv_match_params value = {
17112 .size = sizeof(value.buf),
17114 struct mlx5dv_flow_matcher_attr dv_attr = {
17115 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17117 .match_criteria_enable = 0,
17118 .match_mask = (void *)&mask,
17120 void *actions[2] = { 0 };
17121 struct mlx5_flow_tbl_resource *tbl = NULL;
17122 struct mlx5_devx_obj *dcs = NULL;
17123 void *matcher = NULL;
17127 tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17131 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
17134 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17138 dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17139 __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17140 ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
17144 __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17145 ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17149 * If batch counter with offset is not supported, the driver will not
17150 * validate the invalid offset value, flow create should success.
17151 * In this case, it means batch counter is not supported in root table.
17153 * Otherwise, if flow create is failed, counter offset is supported.
17156 DRV_LOG(INFO, "Batch counter is not supported in root "
17157 "table. Switch to fallback mode.");
17158 rte_errno = ENOTSUP;
17160 claim_zero(mlx5_flow_os_destroy_flow(flow));
17162 /* Check matcher to make sure validate fail at flow create. */
17163 if (!matcher || (matcher && errno != EINVAL))
17164 DRV_LOG(ERR, "Unexpected error in counter offset "
17165 "support detection");
17169 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17171 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17173 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17175 claim_zero(mlx5_devx_cmd_destroy(dcs));
17180 * Query a devx counter.
17183 * Pointer to the Ethernet device structure.
17185 * Index to the flow counter.
17187 * Set to clear the counter statistics.
17189 * The statistics value of packets.
17190 * @param[out] bytes
17191 * The statistics value of bytes.
17194 * 0 on success, otherwise return -1.
17197 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17198 uint64_t *pkts, uint64_t *bytes)
17200 struct mlx5_priv *priv = dev->data->dev_private;
17201 struct mlx5_flow_counter *cnt;
17202 uint64_t inn_pkts, inn_bytes;
17205 if (!priv->config.devx)
17208 ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17211 cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17212 *pkts = inn_pkts - cnt->hits;
17213 *bytes = inn_bytes - cnt->bytes;
17215 cnt->hits = inn_pkts;
17216 cnt->bytes = inn_bytes;
17222 * Get aged-out flows.
17225 * Pointer to the Ethernet device structure.
17226 * @param[in] context
17227 * The address of an array of pointers to the aged-out flows contexts.
17228 * @param[in] nb_contexts
17229 * The length of context array pointers.
17230 * @param[out] error
17231 * Perform verbose error reporting if not NULL. Initialized in case of
17235 * how many contexts get in success, otherwise negative errno value.
17236 * if nb_contexts is 0, return the amount of all aged contexts.
17237 * if nb_contexts is not 0 , return the amount of aged flows reported
17238 * in the context array.
17239 * @note: only stub for now
17242 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17244 uint32_t nb_contexts,
17245 struct rte_flow_error *error)
17247 struct mlx5_priv *priv = dev->data->dev_private;
17248 struct mlx5_age_info *age_info;
17249 struct mlx5_age_param *age_param;
17250 struct mlx5_flow_counter *counter;
17251 struct mlx5_aso_age_action *act;
17254 if (nb_contexts && !context)
17255 return rte_flow_error_set(error, EINVAL,
17256 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17257 NULL, "empty context");
17258 age_info = GET_PORT_AGE_INFO(priv);
17259 rte_spinlock_lock(&age_info->aged_sl);
17260 LIST_FOREACH(act, &age_info->aged_aso, next) {
17263 context[nb_flows - 1] =
17264 act->age_params.context;
17265 if (!(--nb_contexts))
17269 TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17272 age_param = MLX5_CNT_TO_AGE(counter);
17273 context[nb_flows - 1] = age_param->context;
17274 if (!(--nb_contexts))
17278 rte_spinlock_unlock(&age_info->aged_sl);
17279 MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17284 * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17287 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17289 return flow_dv_counter_alloc(dev, 0);
17293 * Validate indirect action.
17294 * Dispatcher for action type specific validation.
17297 * Pointer to the Ethernet device structure.
17299 * Indirect action configuration.
17300 * @param[in] action
17301 * The indirect action object to validate.
17302 * @param[out] error
17303 * Perform verbose error reporting if not NULL. Initialized in case of
17307 * 0 on success, otherwise negative errno value.
17310 flow_dv_action_validate(struct rte_eth_dev *dev,
17311 const struct rte_flow_indir_action_conf *conf,
17312 const struct rte_flow_action *action,
17313 struct rte_flow_error *err)
17315 struct mlx5_priv *priv = dev->data->dev_private;
17317 RTE_SET_USED(conf);
17318 switch (action->type) {
17319 case RTE_FLOW_ACTION_TYPE_RSS:
17321 * priv->obj_ops is set according to driver capabilities.
17322 * When DevX capabilities are
17323 * sufficient, it is set to devx_obj_ops.
17324 * Otherwise, it is set to ibv_obj_ops.
17325 * ibv_obj_ops doesn't support ind_table_modify operation.
17326 * In this case the indirect RSS action can't be used.
17328 if (priv->obj_ops.ind_table_modify == NULL)
17329 return rte_flow_error_set
17331 RTE_FLOW_ERROR_TYPE_ACTION,
17333 "Indirect RSS action not supported");
17334 return mlx5_validate_action_rss(dev, action, err);
17335 case RTE_FLOW_ACTION_TYPE_AGE:
17336 if (!priv->sh->aso_age_mng)
17337 return rte_flow_error_set(err, ENOTSUP,
17338 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17340 "Indirect age action not supported");
17341 return flow_dv_validate_action_age(0, action, dev, err);
17342 case RTE_FLOW_ACTION_TYPE_COUNT:
17344 * There are two mechanisms to share the action count.
17345 * The old mechanism uses the shared field to share, while the
17346 * new mechanism uses the indirect action API.
17347 * This validation comes to make sure that the two mechanisms
17348 * are not combined.
17350 if (is_shared_action_count(action))
17351 return rte_flow_error_set(err, ENOTSUP,
17352 RTE_FLOW_ERROR_TYPE_ACTION,
17354 "Mix shared and indirect counter is not supported");
17355 return flow_dv_validate_action_count(dev, true, 0, err);
17356 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17357 if (!priv->sh->ct_aso_en)
17358 return rte_flow_error_set(err, ENOTSUP,
17359 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17360 "ASO CT is not supported");
17361 return mlx5_validate_action_ct(dev, action->conf, err);
17363 return rte_flow_error_set(err, ENOTSUP,
17364 RTE_FLOW_ERROR_TYPE_ACTION,
17366 "action type not supported");
17371 * Check if the RSS configurations for colors of a meter policy match
17372 * each other, except the queues.
17375 * Pointer to the first RSS flow action.
17377 * Pointer to the second RSS flow action.
17380 * 0 on match, 1 on conflict.
17383 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17384 const struct rte_flow_action_rss *r2)
17388 if (r1->func != r2->func || r1->level != r2->level ||
17389 r1->types != r2->types || r1->key_len != r2->key_len ||
17390 memcmp(r1->key, r2->key, r1->key_len))
17396 * Validate the meter hierarchy chain for meter policy.
17399 * Pointer to the Ethernet device structure.
17400 * @param[in] meter_id
17402 * @param[in] action_flags
17403 * Holds the actions detected until now.
17404 * @param[out] is_rss
17406 * @param[out] hierarchy_domain
17407 * The domain bitmap for hierarchy policy.
17408 * @param[out] error
17409 * Perform verbose error reporting if not NULL. Initialized in case of
17413 * 0 on success, otherwise negative errno value with error set.
17416 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17418 uint64_t action_flags,
17420 uint8_t *hierarchy_domain,
17421 struct rte_mtr_error *error)
17423 struct mlx5_priv *priv = dev->data->dev_private;
17424 struct mlx5_flow_meter_info *fm;
17425 struct mlx5_flow_meter_policy *policy;
17428 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17429 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17430 return -rte_mtr_error_set(error, EINVAL,
17431 RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17433 "Multiple fate actions not supported.");
17435 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17437 return -rte_mtr_error_set(error, EINVAL,
17438 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17439 "Meter not found in meter hierarchy.");
17440 if (fm->def_policy)
17441 return -rte_mtr_error_set(error, EINVAL,
17442 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17443 "Non termination meter not supported in hierarchy.");
17444 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17445 MLX5_ASSERT(policy);
17446 if (!policy->is_hierarchy) {
17447 if (policy->transfer)
17448 *hierarchy_domain |=
17449 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17450 if (policy->ingress)
17451 *hierarchy_domain |=
17452 MLX5_MTR_DOMAIN_INGRESS_BIT;
17453 if (policy->egress)
17454 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17455 *is_rss = policy->is_rss;
17458 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17459 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17460 return -rte_mtr_error_set(error, EINVAL,
17461 RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17462 "Exceed max hierarchy meter number.");
17468 * Validate meter policy actions.
17469 * Dispatcher for action type specific validation.
17472 * Pointer to the Ethernet device structure.
17473 * @param[in] action
17474 * The meter policy action object to validate.
17476 * Attributes of flow to determine steering domain.
17477 * @param[out] error
17478 * Perform verbose error reporting if not NULL. Initialized in case of
17482 * 0 on success, otherwise negative errno value.
17485 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17486 const struct rte_flow_action *actions[RTE_COLORS],
17487 struct rte_flow_attr *attr,
17489 uint8_t *domain_bitmap,
17490 uint8_t *policy_mode,
17491 struct rte_mtr_error *error)
17493 struct mlx5_priv *priv = dev->data->dev_private;
17494 struct mlx5_dev_config *dev_conf = &priv->config;
17495 const struct rte_flow_action *act;
17496 uint64_t action_flags[RTE_COLORS] = {0};
17499 struct rte_flow_error flow_err;
17500 uint8_t domain_color[RTE_COLORS] = {0};
17501 uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17502 uint8_t hierarchy_domain = 0;
17503 const struct rte_flow_action_meter *mtr;
17504 bool def_green = false;
17505 bool def_yellow = false;
17506 const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17508 if (!priv->config.dv_esw_en)
17509 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17510 *domain_bitmap = def_domain;
17511 /* Red color could only support DROP action. */
17512 if (!actions[RTE_COLOR_RED] ||
17513 actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17514 return -rte_mtr_error_set(error, ENOTSUP,
17515 RTE_MTR_ERROR_TYPE_METER_POLICY,
17516 NULL, "Red color only supports drop action.");
17518 * Check default policy actions:
17519 * Green / Yellow: no action, Red: drop action
17520 * Either G or Y will trigger default policy actions to be created.
17522 if (!actions[RTE_COLOR_GREEN] ||
17523 actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17525 if (!actions[RTE_COLOR_YELLOW] ||
17526 actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17528 if (def_green && def_yellow) {
17529 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17531 } else if (!def_green && def_yellow) {
17532 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17533 } else if (def_green && !def_yellow) {
17534 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17536 /* Set to empty string in case of NULL pointer access by user. */
17537 flow_err.message = "";
17538 for (i = 0; i < RTE_COLORS; i++) {
17540 for (action_flags[i] = 0, actions_n = 0;
17541 act && act->type != RTE_FLOW_ACTION_TYPE_END;
17543 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17544 return -rte_mtr_error_set(error, ENOTSUP,
17545 RTE_MTR_ERROR_TYPE_METER_POLICY,
17546 NULL, "too many actions");
17547 switch (act->type) {
17548 case RTE_FLOW_ACTION_TYPE_PORT_ID:
17549 if (!priv->config.dv_esw_en)
17550 return -rte_mtr_error_set(error,
17552 RTE_MTR_ERROR_TYPE_METER_POLICY,
17553 NULL, "PORT action validate check"
17554 " fail for ESW disable");
17555 ret = flow_dv_validate_action_port_id(dev,
17557 act, attr, &flow_err);
17559 return -rte_mtr_error_set(error,
17561 RTE_MTR_ERROR_TYPE_METER_POLICY,
17562 NULL, flow_err.message ?
17564 "PORT action validate check fail");
17566 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17568 case RTE_FLOW_ACTION_TYPE_MARK:
17569 ret = flow_dv_validate_action_mark(dev, act,
17573 return -rte_mtr_error_set(error,
17575 RTE_MTR_ERROR_TYPE_METER_POLICY,
17576 NULL, flow_err.message ?
17578 "Mark action validate check fail");
17579 if (dev_conf->dv_xmeta_en !=
17580 MLX5_XMETA_MODE_LEGACY)
17581 return -rte_mtr_error_set(error,
17583 RTE_MTR_ERROR_TYPE_METER_POLICY,
17584 NULL, "Extend MARK action is "
17585 "not supported. Please try use "
17586 "default policy for meter.");
17587 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17590 case RTE_FLOW_ACTION_TYPE_SET_TAG:
17591 ret = flow_dv_validate_action_set_tag(dev,
17592 act, action_flags[i],
17595 return -rte_mtr_error_set(error,
17597 RTE_MTR_ERROR_TYPE_METER_POLICY,
17598 NULL, flow_err.message ?
17600 "Set tag action validate check fail");
17601 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17604 case RTE_FLOW_ACTION_TYPE_DROP:
17605 ret = mlx5_flow_validate_action_drop
17606 (action_flags[i], attr, &flow_err);
17608 return -rte_mtr_error_set(error,
17610 RTE_MTR_ERROR_TYPE_METER_POLICY,
17611 NULL, flow_err.message ?
17613 "Drop action validate check fail");
17614 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17617 case RTE_FLOW_ACTION_TYPE_QUEUE:
17619 * Check whether extensive
17620 * metadata feature is engaged.
17622 if (dev_conf->dv_flow_en &&
17623 (dev_conf->dv_xmeta_en !=
17624 MLX5_XMETA_MODE_LEGACY) &&
17625 mlx5_flow_ext_mreg_supported(dev))
17626 return -rte_mtr_error_set(error,
17628 RTE_MTR_ERROR_TYPE_METER_POLICY,
17629 NULL, "Queue action with meta "
17630 "is not supported. Please try use "
17631 "default policy for meter.");
17632 ret = mlx5_flow_validate_action_queue(act,
17633 action_flags[i], dev,
17636 return -rte_mtr_error_set(error,
17638 RTE_MTR_ERROR_TYPE_METER_POLICY,
17639 NULL, flow_err.message ?
17641 "Queue action validate check fail");
17642 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
17645 case RTE_FLOW_ACTION_TYPE_RSS:
17646 if (dev_conf->dv_flow_en &&
17647 (dev_conf->dv_xmeta_en !=
17648 MLX5_XMETA_MODE_LEGACY) &&
17649 mlx5_flow_ext_mreg_supported(dev))
17650 return -rte_mtr_error_set(error,
17652 RTE_MTR_ERROR_TYPE_METER_POLICY,
17653 NULL, "RSS action with meta "
17654 "is not supported. Please try use "
17655 "default policy for meter.");
17656 ret = mlx5_validate_action_rss(dev, act,
17659 return -rte_mtr_error_set(error,
17661 RTE_MTR_ERROR_TYPE_METER_POLICY,
17662 NULL, flow_err.message ?
17664 "RSS action validate check fail");
17665 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
17667 /* Either G or Y will set the RSS. */
17668 rss_color[i] = act->conf;
17670 case RTE_FLOW_ACTION_TYPE_JUMP:
17671 ret = flow_dv_validate_action_jump(dev,
17672 NULL, act, action_flags[i],
17673 attr, true, &flow_err);
17675 return -rte_mtr_error_set(error,
17677 RTE_MTR_ERROR_TYPE_METER_POLICY,
17678 NULL, flow_err.message ?
17680 "Jump action validate check fail");
17682 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
17685 * Only the last meter in the hierarchy will support
17686 * the YELLOW color steering. Then in the meter policy
17687 * actions list, there should be no other meter inside.
17689 case RTE_FLOW_ACTION_TYPE_METER:
17690 if (i != RTE_COLOR_GREEN)
17691 return -rte_mtr_error_set(error,
17693 RTE_MTR_ERROR_TYPE_METER_POLICY,
17695 "Meter hierarchy only supports GREEN color.");
17696 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
17697 return -rte_mtr_error_set(error,
17699 RTE_MTR_ERROR_TYPE_METER_POLICY,
17701 "No yellow policy should be provided in meter hierarchy.");
17703 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17713 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
17716 return -rte_mtr_error_set(error, ENOTSUP,
17717 RTE_MTR_ERROR_TYPE_METER_POLICY,
17719 "Doesn't support optional action");
17722 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID)
17723 domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
17724 else if ((action_flags[i] &
17725 (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
17726 (action_flags[i] & MLX5_FLOW_ACTION_MARK))
17728 * Only support MLX5_XMETA_MODE_LEGACY
17729 * so MARK action is only in ingress domain.
17731 domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
17732 else if (action_flags[i] &
17733 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
17734 domain_color[i] = hierarchy_domain;
17736 domain_color[i] = def_domain;
17738 * Non-termination actions only support NIC Tx domain.
17739 * The adjustion should be skipped when there is no
17740 * action or only END is provided. The default domains
17741 * bit-mask is set to find the MIN intersection.
17742 * The action flags checking should also be skipped.
17744 if ((def_green && i == RTE_COLOR_GREEN) ||
17745 (def_yellow && i == RTE_COLOR_YELLOW))
17748 * Validate the drop action mutual exclusion
17749 * with other actions. Drop action is mutually-exclusive
17750 * with any other action, except for Count action.
17752 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
17753 (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
17754 return -rte_mtr_error_set(error, ENOTSUP,
17755 RTE_MTR_ERROR_TYPE_METER_POLICY,
17756 NULL, "Drop action is mutually-exclusive "
17757 "with any other action");
17759 /* Eswitch has few restrictions on using items and actions */
17760 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
17761 if (!mlx5_flow_ext_mreg_supported(dev) &&
17762 action_flags[i] & MLX5_FLOW_ACTION_MARK)
17763 return -rte_mtr_error_set(error, ENOTSUP,
17764 RTE_MTR_ERROR_TYPE_METER_POLICY,
17765 NULL, "unsupported action MARK");
17766 if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
17767 return -rte_mtr_error_set(error, ENOTSUP,
17768 RTE_MTR_ERROR_TYPE_METER_POLICY,
17769 NULL, "unsupported action QUEUE");
17770 if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
17771 return -rte_mtr_error_set(error, ENOTSUP,
17772 RTE_MTR_ERROR_TYPE_METER_POLICY,
17773 NULL, "unsupported action RSS");
17774 if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17775 return -rte_mtr_error_set(error, ENOTSUP,
17776 RTE_MTR_ERROR_TYPE_METER_POLICY,
17777 NULL, "no fate action is found");
17779 if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
17780 (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
17781 if ((domain_color[i] &
17782 MLX5_MTR_DOMAIN_EGRESS_BIT))
17784 MLX5_MTR_DOMAIN_EGRESS_BIT;
17786 return -rte_mtr_error_set(error,
17788 RTE_MTR_ERROR_TYPE_METER_POLICY,
17790 "no fate action is found");
17794 /* If both colors have RSS, the attributes should be the same. */
17795 if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
17796 rss_color[RTE_COLOR_YELLOW]))
17797 return -rte_mtr_error_set(error, EINVAL,
17798 RTE_MTR_ERROR_TYPE_METER_POLICY,
17799 NULL, "policy RSS attr conflict");
17800 if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
17802 /* "domain_color[C]" is non-zero for each color, default is ALL. */
17803 if (!def_green && !def_yellow &&
17804 domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
17805 !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
17806 !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
17807 return -rte_mtr_error_set(error, EINVAL,
17808 RTE_MTR_ERROR_TYPE_METER_POLICY,
17809 NULL, "policy domains conflict");
17811 * At least one color policy is listed in the actions, the domains
17812 * to be supported should be the intersection.
17814 *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
17815 domain_color[RTE_COLOR_YELLOW];
17820 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
17822 struct mlx5_priv *priv = dev->data->dev_private;
17825 if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
17826 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
17831 if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
17832 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
17836 if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
17837 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
17844 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
17845 .validate = flow_dv_validate,
17846 .prepare = flow_dv_prepare,
17847 .translate = flow_dv_translate,
17848 .apply = flow_dv_apply,
17849 .remove = flow_dv_remove,
17850 .destroy = flow_dv_destroy,
17851 .query = flow_dv_query,
17852 .create_mtr_tbls = flow_dv_create_mtr_tbls,
17853 .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
17854 .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
17855 .create_meter = flow_dv_mtr_alloc,
17856 .free_meter = flow_dv_aso_mtr_release_to_pool,
17857 .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
17858 .create_mtr_acts = flow_dv_create_mtr_policy_acts,
17859 .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
17860 .create_policy_rules = flow_dv_create_policy_rules,
17861 .destroy_policy_rules = flow_dv_destroy_policy_rules,
17862 .create_def_policy = flow_dv_create_def_policy,
17863 .destroy_def_policy = flow_dv_destroy_def_policy,
17864 .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
17865 .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
17866 .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
17867 .counter_alloc = flow_dv_counter_allocate,
17868 .counter_free = flow_dv_counter_free,
17869 .counter_query = flow_dv_counter_query,
17870 .get_aged_flows = flow_dv_get_aged_flows,
17871 .action_validate = flow_dv_action_validate,
17872 .action_create = flow_dv_action_create,
17873 .action_destroy = flow_dv_action_destroy,
17874 .action_update = flow_dv_action_update,
17875 .action_query = flow_dv_action_query,
17876 .sync_domain = flow_dv_sync_domain,
17879 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */