1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018 Mellanox Technologies, Ltd
11 #include <rte_common.h>
12 #include <rte_ether.h>
13 #include <ethdev_driver.h>
15 #include <rte_flow_driver.h>
16 #include <rte_malloc.h>
17 #include <rte_cycles.h>
18 #include <rte_bus_pci.h>
21 #include <rte_vxlan.h>
23 #include <rte_eal_paging.h>
26 #include <rte_mtr_driver.h>
27 #include <rte_tailq.h>
29 #include <mlx5_glue.h>
30 #include <mlx5_devx_cmds.h>
32 #include <mlx5_malloc.h>
34 #include "mlx5_defs.h"
36 #include "mlx5_common_os.h"
37 #include "mlx5_flow.h"
38 #include "mlx5_flow_os.h"
41 #include "rte_pmd_mlx5.h"
43 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
45 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
46 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
49 #ifndef HAVE_MLX5DV_DR_ESWITCH
50 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
51 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
55 #ifndef HAVE_MLX5DV_DR
56 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
59 /* VLAN header definitions */
60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
79 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
80 struct mlx5_flow_tbl_resource *tbl);
83 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
84 uint32_t encap_decap_idx);
87 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
90 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
93 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
97 flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
99 struct mlx5_priv *priv = dev->data->dev_private;
101 if (priv->pci_dev == NULL)
103 switch (priv->pci_dev->id.device_id) {
104 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
105 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
106 case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
107 return (int16_t)0xfffe;
114 * Initialize flow attributes structure according to flow items' types.
116 * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
117 * mode. For tunnel mode, the items to be modified are the outermost ones.
120 * Pointer to item specification.
122 * Pointer to flow attributes structure.
123 * @param[in] dev_flow
124 * Pointer to the sub flow.
125 * @param[in] tunnel_decap
126 * Whether action is after tunnel decapsulation.
129 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
130 struct mlx5_flow *dev_flow, bool tunnel_decap)
132 uint64_t layers = dev_flow->handle->layers;
135 * If layers is already initialized, it means this dev_flow is the
136 * suffix flow, the layers flags is set by the prefix flow. Need to
137 * use the layer flags from prefix flow as the suffix flow may not
138 * have the user defined items as the flow is split.
141 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
143 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
145 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
147 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
152 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
153 uint8_t next_protocol = 0xff;
154 switch (item->type) {
155 case RTE_FLOW_ITEM_TYPE_GRE:
156 case RTE_FLOW_ITEM_TYPE_NVGRE:
157 case RTE_FLOW_ITEM_TYPE_VXLAN:
158 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
159 case RTE_FLOW_ITEM_TYPE_GENEVE:
160 case RTE_FLOW_ITEM_TYPE_MPLS:
164 case RTE_FLOW_ITEM_TYPE_IPV4:
167 if (item->mask != NULL &&
168 ((const struct rte_flow_item_ipv4 *)
169 item->mask)->hdr.next_proto_id)
171 ((const struct rte_flow_item_ipv4 *)
172 (item->spec))->hdr.next_proto_id &
173 ((const struct rte_flow_item_ipv4 *)
174 (item->mask))->hdr.next_proto_id;
175 if ((next_protocol == IPPROTO_IPIP ||
176 next_protocol == IPPROTO_IPV6) && tunnel_decap)
179 case RTE_FLOW_ITEM_TYPE_IPV6:
182 if (item->mask != NULL &&
183 ((const struct rte_flow_item_ipv6 *)
184 item->mask)->hdr.proto)
186 ((const struct rte_flow_item_ipv6 *)
187 (item->spec))->hdr.proto &
188 ((const struct rte_flow_item_ipv6 *)
189 (item->mask))->hdr.proto;
190 if ((next_protocol == IPPROTO_IPIP ||
191 next_protocol == IPPROTO_IPV6) && tunnel_decap)
194 case RTE_FLOW_ITEM_TYPE_UDP:
198 case RTE_FLOW_ITEM_TYPE_TCP:
210 * Convert rte_mtr_color to mlx5 color.
219 rte_col_2_mlx5_col(enum rte_color rcol)
222 case RTE_COLOR_GREEN:
223 return MLX5_FLOW_COLOR_GREEN;
224 case RTE_COLOR_YELLOW:
225 return MLX5_FLOW_COLOR_YELLOW;
227 return MLX5_FLOW_COLOR_RED;
231 return MLX5_FLOW_COLOR_UNDEFINED;
234 struct field_modify_info {
235 uint32_t size; /* Size of field in protocol header, in bytes. */
236 uint32_t offset; /* Offset of field in protocol header, in bytes. */
237 enum mlx5_modification_field id;
240 struct field_modify_info modify_eth[] = {
241 {4, 0, MLX5_MODI_OUT_DMAC_47_16},
242 {2, 4, MLX5_MODI_OUT_DMAC_15_0},
243 {4, 6, MLX5_MODI_OUT_SMAC_47_16},
244 {2, 10, MLX5_MODI_OUT_SMAC_15_0},
248 struct field_modify_info modify_vlan_out_first_vid[] = {
249 /* Size in bits !!! */
250 {12, 0, MLX5_MODI_OUT_FIRST_VID},
254 struct field_modify_info modify_ipv4[] = {
255 {1, 1, MLX5_MODI_OUT_IP_DSCP},
256 {1, 8, MLX5_MODI_OUT_IPV4_TTL},
257 {4, 12, MLX5_MODI_OUT_SIPV4},
258 {4, 16, MLX5_MODI_OUT_DIPV4},
262 struct field_modify_info modify_ipv6[] = {
263 {1, 0, MLX5_MODI_OUT_IP_DSCP},
264 {1, 7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
265 {4, 8, MLX5_MODI_OUT_SIPV6_127_96},
266 {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
267 {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
268 {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
269 {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
270 {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
271 {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
272 {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
276 struct field_modify_info modify_udp[] = {
277 {2, 0, MLX5_MODI_OUT_UDP_SPORT},
278 {2, 2, MLX5_MODI_OUT_UDP_DPORT},
282 struct field_modify_info modify_tcp[] = {
283 {2, 0, MLX5_MODI_OUT_TCP_SPORT},
284 {2, 2, MLX5_MODI_OUT_TCP_DPORT},
285 {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
286 {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
291 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
292 uint8_t next_protocol, uint64_t *item_flags,
295 MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
296 item->type == RTE_FLOW_ITEM_TYPE_IPV6);
297 if (next_protocol == IPPROTO_IPIP) {
298 *item_flags |= MLX5_FLOW_LAYER_IPIP;
301 if (next_protocol == IPPROTO_IPV6) {
302 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
307 static inline struct mlx5_hlist *
308 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
309 const char *name, uint32_t size, bool direct_key,
310 bool lcores_share, void *ctx,
311 mlx5_list_create_cb cb_create,
312 mlx5_list_match_cb cb_match,
313 mlx5_list_remove_cb cb_remove,
314 mlx5_list_clone_cb cb_clone,
315 mlx5_list_clone_free_cb cb_clone_free)
317 struct mlx5_hlist *hl;
318 struct mlx5_hlist *expected = NULL;
319 char s[MLX5_NAME_SIZE];
321 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
324 snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
325 hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
326 ctx, cb_create, cb_match, cb_remove, cb_clone,
329 DRV_LOG(ERR, "%s hash creation failed", name);
333 if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
336 mlx5_hlist_destroy(hl);
337 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
342 /* Update VLAN's VID/PCP based on input rte_flow_action.
345 * Pointer to struct rte_flow_action.
347 * Pointer to struct rte_vlan_hdr.
350 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
351 struct rte_vlan_hdr *vlan)
354 if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
356 ((const struct rte_flow_action_of_set_vlan_pcp *)
357 action->conf)->vlan_pcp;
358 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
359 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
360 vlan->vlan_tci |= vlan_tci;
361 } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
362 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
363 vlan->vlan_tci |= rte_be_to_cpu_16
364 (((const struct rte_flow_action_of_set_vlan_vid *)
365 action->conf)->vlan_vid);
370 * Fetch 1, 2, 3 or 4 byte field from the byte array
371 * and return as unsigned integer in host-endian format.
374 * Pointer to data array.
376 * Size of field to extract.
379 * converted field in host endian format.
381 static inline uint32_t
382 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
391 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
394 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
395 ret = (ret << 8) | *(data + sizeof(uint16_t));
398 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
409 * Convert modify-header action to DV specification.
411 * Data length of each action is determined by provided field description
412 * and the item mask. Data bit offset and width of each action is determined
413 * by provided item mask.
416 * Pointer to item specification.
418 * Pointer to field modification information.
419 * For MLX5_MODIFICATION_TYPE_SET specifies destination field.
420 * For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
421 * For MLX5_MODIFICATION_TYPE_COPY specifies source field.
423 * Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
424 * Negative offset value sets the same offset as source offset.
425 * size field is ignored, value is taken from source field.
426 * @param[in,out] resource
427 * Pointer to the modify-header resource.
429 * Type of modification.
431 * Pointer to the error structure.
434 * 0 on success, a negative errno value otherwise and rte_errno is set.
437 flow_dv_convert_modify_action(struct rte_flow_item *item,
438 struct field_modify_info *field,
439 struct field_modify_info *dcopy,
440 struct mlx5_flow_dv_modify_hdr_resource *resource,
441 uint32_t type, struct rte_flow_error *error)
443 uint32_t i = resource->actions_num;
444 struct mlx5_modification_cmd *actions = resource->actions;
445 uint32_t carry_b = 0;
448 * The item and mask are provided in big-endian format.
449 * The fields should be presented as in big-endian format either.
450 * Mask must be always present, it defines the actual field width.
452 MLX5_ASSERT(item->mask);
453 MLX5_ASSERT(field->size);
459 bool next_field = true;
460 bool next_dcopy = true;
462 if (i >= MLX5_MAX_MODIFY_NUM)
463 return rte_flow_error_set(error, EINVAL,
464 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
465 "too many items to modify");
466 /* Fetch variable byte size mask from the array. */
467 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
468 field->offset, field->size);
473 /* Deduce actual data width in bits from mask value. */
474 off_b = rte_bsf32(mask) + carry_b;
475 size_b = sizeof(uint32_t) * CHAR_BIT -
476 off_b - __builtin_clz(mask);
478 actions[i] = (struct mlx5_modification_cmd) {
482 .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
485 if (type == MLX5_MODIFICATION_TYPE_COPY) {
487 actions[i].dst_field = dcopy->id;
488 actions[i].dst_offset =
489 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
490 /* Convert entire record to big-endian format. */
491 actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
493 * Destination field overflow. Copy leftovers of
494 * a source field to the next destination field.
497 if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
500 dcopy->size * CHAR_BIT - dcopy->offset;
501 carry_b = actions[i].length;
505 * Not enough bits in a source filed to fill a
506 * destination field. Switch to the next source.
508 if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
509 (size_b == field->size * CHAR_BIT - off_b)) {
511 field->size * CHAR_BIT - off_b;
512 dcopy->offset += actions[i].length;
518 MLX5_ASSERT(item->spec);
519 data = flow_dv_fetch_field((const uint8_t *)item->spec +
520 field->offset, field->size);
521 /* Shift out the trailing masked bits from data. */
522 data = (data & mask) >> off_b;
523 actions[i].data1 = rte_cpu_to_be_32(data);
525 /* Convert entire record to expected big-endian format. */
526 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
530 } while (field->size);
531 if (resource->actions_num == i)
532 return rte_flow_error_set(error, EINVAL,
533 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
534 "invalid modification flow item");
535 resource->actions_num = i;
540 * Convert modify-header set IPv4 address action to DV specification.
542 * @param[in,out] resource
543 * Pointer to the modify-header resource.
545 * Pointer to action specification.
547 * Pointer to the error structure.
550 * 0 on success, a negative errno value otherwise and rte_errno is set.
553 flow_dv_convert_action_modify_ipv4
554 (struct mlx5_flow_dv_modify_hdr_resource *resource,
555 const struct rte_flow_action *action,
556 struct rte_flow_error *error)
558 const struct rte_flow_action_set_ipv4 *conf =
559 (const struct rte_flow_action_set_ipv4 *)(action->conf);
560 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
561 struct rte_flow_item_ipv4 ipv4;
562 struct rte_flow_item_ipv4 ipv4_mask;
564 memset(&ipv4, 0, sizeof(ipv4));
565 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
566 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
567 ipv4.hdr.src_addr = conf->ipv4_addr;
568 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
570 ipv4.hdr.dst_addr = conf->ipv4_addr;
571 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
574 item.mask = &ipv4_mask;
575 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
576 MLX5_MODIFICATION_TYPE_SET, error);
580 * Convert modify-header set IPv6 address action to DV specification.
582 * @param[in,out] resource
583 * Pointer to the modify-header resource.
585 * Pointer to action specification.
587 * Pointer to the error structure.
590 * 0 on success, a negative errno value otherwise and rte_errno is set.
593 flow_dv_convert_action_modify_ipv6
594 (struct mlx5_flow_dv_modify_hdr_resource *resource,
595 const struct rte_flow_action *action,
596 struct rte_flow_error *error)
598 const struct rte_flow_action_set_ipv6 *conf =
599 (const struct rte_flow_action_set_ipv6 *)(action->conf);
600 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
601 struct rte_flow_item_ipv6 ipv6;
602 struct rte_flow_item_ipv6 ipv6_mask;
604 memset(&ipv6, 0, sizeof(ipv6));
605 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
606 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
607 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
608 sizeof(ipv6.hdr.src_addr));
609 memcpy(&ipv6_mask.hdr.src_addr,
610 &rte_flow_item_ipv6_mask.hdr.src_addr,
611 sizeof(ipv6.hdr.src_addr));
613 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
614 sizeof(ipv6.hdr.dst_addr));
615 memcpy(&ipv6_mask.hdr.dst_addr,
616 &rte_flow_item_ipv6_mask.hdr.dst_addr,
617 sizeof(ipv6.hdr.dst_addr));
620 item.mask = &ipv6_mask;
621 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
622 MLX5_MODIFICATION_TYPE_SET, error);
626 * Convert modify-header set MAC address action to DV specification.
628 * @param[in,out] resource
629 * Pointer to the modify-header resource.
631 * Pointer to action specification.
633 * Pointer to the error structure.
636 * 0 on success, a negative errno value otherwise and rte_errno is set.
639 flow_dv_convert_action_modify_mac
640 (struct mlx5_flow_dv_modify_hdr_resource *resource,
641 const struct rte_flow_action *action,
642 struct rte_flow_error *error)
644 const struct rte_flow_action_set_mac *conf =
645 (const struct rte_flow_action_set_mac *)(action->conf);
646 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
647 struct rte_flow_item_eth eth;
648 struct rte_flow_item_eth eth_mask;
650 memset(ð, 0, sizeof(eth));
651 memset(ð_mask, 0, sizeof(eth_mask));
652 if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
653 memcpy(ð.src.addr_bytes, &conf->mac_addr,
654 sizeof(eth.src.addr_bytes));
655 memcpy(ð_mask.src.addr_bytes,
656 &rte_flow_item_eth_mask.src.addr_bytes,
657 sizeof(eth_mask.src.addr_bytes));
659 memcpy(ð.dst.addr_bytes, &conf->mac_addr,
660 sizeof(eth.dst.addr_bytes));
661 memcpy(ð_mask.dst.addr_bytes,
662 &rte_flow_item_eth_mask.dst.addr_bytes,
663 sizeof(eth_mask.dst.addr_bytes));
666 item.mask = ð_mask;
667 return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
668 MLX5_MODIFICATION_TYPE_SET, error);
672 * Convert modify-header set VLAN VID action to DV specification.
674 * @param[in,out] resource
675 * Pointer to the modify-header resource.
677 * Pointer to action specification.
679 * Pointer to the error structure.
682 * 0 on success, a negative errno value otherwise and rte_errno is set.
685 flow_dv_convert_action_modify_vlan_vid
686 (struct mlx5_flow_dv_modify_hdr_resource *resource,
687 const struct rte_flow_action *action,
688 struct rte_flow_error *error)
690 const struct rte_flow_action_of_set_vlan_vid *conf =
691 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
692 int i = resource->actions_num;
693 struct mlx5_modification_cmd *actions = resource->actions;
694 struct field_modify_info *field = modify_vlan_out_first_vid;
696 if (i >= MLX5_MAX_MODIFY_NUM)
697 return rte_flow_error_set(error, EINVAL,
698 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
699 "too many items to modify");
700 actions[i] = (struct mlx5_modification_cmd) {
701 .action_type = MLX5_MODIFICATION_TYPE_SET,
703 .length = field->size,
704 .offset = field->offset,
706 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
707 actions[i].data1 = conf->vlan_vid;
708 actions[i].data1 = actions[i].data1 << 16;
709 resource->actions_num = ++i;
714 * Convert modify-header set TP action to DV specification.
716 * @param[in,out] resource
717 * Pointer to the modify-header resource.
719 * Pointer to action specification.
721 * Pointer to rte_flow_item objects list.
723 * Pointer to flow attributes structure.
724 * @param[in] dev_flow
725 * Pointer to the sub flow.
726 * @param[in] tunnel_decap
727 * Whether action is after tunnel decapsulation.
729 * Pointer to the error structure.
732 * 0 on success, a negative errno value otherwise and rte_errno is set.
735 flow_dv_convert_action_modify_tp
736 (struct mlx5_flow_dv_modify_hdr_resource *resource,
737 const struct rte_flow_action *action,
738 const struct rte_flow_item *items,
739 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
740 bool tunnel_decap, struct rte_flow_error *error)
742 const struct rte_flow_action_set_tp *conf =
743 (const struct rte_flow_action_set_tp *)(action->conf);
744 struct rte_flow_item item;
745 struct rte_flow_item_udp udp;
746 struct rte_flow_item_udp udp_mask;
747 struct rte_flow_item_tcp tcp;
748 struct rte_flow_item_tcp tcp_mask;
749 struct field_modify_info *field;
752 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
754 memset(&udp, 0, sizeof(udp));
755 memset(&udp_mask, 0, sizeof(udp_mask));
756 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
757 udp.hdr.src_port = conf->port;
758 udp_mask.hdr.src_port =
759 rte_flow_item_udp_mask.hdr.src_port;
761 udp.hdr.dst_port = conf->port;
762 udp_mask.hdr.dst_port =
763 rte_flow_item_udp_mask.hdr.dst_port;
765 item.type = RTE_FLOW_ITEM_TYPE_UDP;
767 item.mask = &udp_mask;
770 MLX5_ASSERT(attr->tcp);
771 memset(&tcp, 0, sizeof(tcp));
772 memset(&tcp_mask, 0, sizeof(tcp_mask));
773 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
774 tcp.hdr.src_port = conf->port;
775 tcp_mask.hdr.src_port =
776 rte_flow_item_tcp_mask.hdr.src_port;
778 tcp.hdr.dst_port = conf->port;
779 tcp_mask.hdr.dst_port =
780 rte_flow_item_tcp_mask.hdr.dst_port;
782 item.type = RTE_FLOW_ITEM_TYPE_TCP;
784 item.mask = &tcp_mask;
787 return flow_dv_convert_modify_action(&item, field, NULL, resource,
788 MLX5_MODIFICATION_TYPE_SET, error);
792 * Convert modify-header set TTL action to DV specification.
794 * @param[in,out] resource
795 * Pointer to the modify-header resource.
797 * Pointer to action specification.
799 * Pointer to rte_flow_item objects list.
801 * Pointer to flow attributes structure.
802 * @param[in] dev_flow
803 * Pointer to the sub flow.
804 * @param[in] tunnel_decap
805 * Whether action is after tunnel decapsulation.
807 * Pointer to the error structure.
810 * 0 on success, a negative errno value otherwise and rte_errno is set.
813 flow_dv_convert_action_modify_ttl
814 (struct mlx5_flow_dv_modify_hdr_resource *resource,
815 const struct rte_flow_action *action,
816 const struct rte_flow_item *items,
817 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
818 bool tunnel_decap, struct rte_flow_error *error)
820 const struct rte_flow_action_set_ttl *conf =
821 (const struct rte_flow_action_set_ttl *)(action->conf);
822 struct rte_flow_item item;
823 struct rte_flow_item_ipv4 ipv4;
824 struct rte_flow_item_ipv4 ipv4_mask;
825 struct rte_flow_item_ipv6 ipv6;
826 struct rte_flow_item_ipv6 ipv6_mask;
827 struct field_modify_info *field;
830 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
832 memset(&ipv4, 0, sizeof(ipv4));
833 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
834 ipv4.hdr.time_to_live = conf->ttl_value;
835 ipv4_mask.hdr.time_to_live = 0xFF;
836 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
838 item.mask = &ipv4_mask;
841 MLX5_ASSERT(attr->ipv6);
842 memset(&ipv6, 0, sizeof(ipv6));
843 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
844 ipv6.hdr.hop_limits = conf->ttl_value;
845 ipv6_mask.hdr.hop_limits = 0xFF;
846 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
848 item.mask = &ipv6_mask;
851 return flow_dv_convert_modify_action(&item, field, NULL, resource,
852 MLX5_MODIFICATION_TYPE_SET, error);
856 * Convert modify-header decrement TTL action to DV specification.
858 * @param[in,out] resource
859 * Pointer to the modify-header resource.
861 * Pointer to action specification.
863 * Pointer to rte_flow_item objects list.
865 * Pointer to flow attributes structure.
866 * @param[in] dev_flow
867 * Pointer to the sub flow.
868 * @param[in] tunnel_decap
869 * Whether action is after tunnel decapsulation.
871 * Pointer to the error structure.
874 * 0 on success, a negative errno value otherwise and rte_errno is set.
877 flow_dv_convert_action_modify_dec_ttl
878 (struct mlx5_flow_dv_modify_hdr_resource *resource,
879 const struct rte_flow_item *items,
880 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
881 bool tunnel_decap, struct rte_flow_error *error)
883 struct rte_flow_item item;
884 struct rte_flow_item_ipv4 ipv4;
885 struct rte_flow_item_ipv4 ipv4_mask;
886 struct rte_flow_item_ipv6 ipv6;
887 struct rte_flow_item_ipv6 ipv6_mask;
888 struct field_modify_info *field;
891 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
893 memset(&ipv4, 0, sizeof(ipv4));
894 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
895 ipv4.hdr.time_to_live = 0xFF;
896 ipv4_mask.hdr.time_to_live = 0xFF;
897 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
899 item.mask = &ipv4_mask;
902 MLX5_ASSERT(attr->ipv6);
903 memset(&ipv6, 0, sizeof(ipv6));
904 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
905 ipv6.hdr.hop_limits = 0xFF;
906 ipv6_mask.hdr.hop_limits = 0xFF;
907 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
909 item.mask = &ipv6_mask;
912 return flow_dv_convert_modify_action(&item, field, NULL, resource,
913 MLX5_MODIFICATION_TYPE_ADD, error);
917 * Convert modify-header increment/decrement TCP Sequence number
918 * to DV specification.
920 * @param[in,out] resource
921 * Pointer to the modify-header resource.
923 * Pointer to action specification.
925 * Pointer to the error structure.
928 * 0 on success, a negative errno value otherwise and rte_errno is set.
931 flow_dv_convert_action_modify_tcp_seq
932 (struct mlx5_flow_dv_modify_hdr_resource *resource,
933 const struct rte_flow_action *action,
934 struct rte_flow_error *error)
936 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
937 uint64_t value = rte_be_to_cpu_32(*conf);
938 struct rte_flow_item item;
939 struct rte_flow_item_tcp tcp;
940 struct rte_flow_item_tcp tcp_mask;
942 memset(&tcp, 0, sizeof(tcp));
943 memset(&tcp_mask, 0, sizeof(tcp_mask));
944 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
946 * The HW has no decrement operation, only increment operation.
947 * To simulate decrement X from Y using increment operation
948 * we need to add UINT32_MAX X times to Y.
949 * Each adding of UINT32_MAX decrements Y by 1.
952 tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
953 tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
954 item.type = RTE_FLOW_ITEM_TYPE_TCP;
956 item.mask = &tcp_mask;
957 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
958 MLX5_MODIFICATION_TYPE_ADD, error);
962 * Convert modify-header increment/decrement TCP Acknowledgment number
963 * to DV specification.
965 * @param[in,out] resource
966 * Pointer to the modify-header resource.
968 * Pointer to action specification.
970 * Pointer to the error structure.
973 * 0 on success, a negative errno value otherwise and rte_errno is set.
976 flow_dv_convert_action_modify_tcp_ack
977 (struct mlx5_flow_dv_modify_hdr_resource *resource,
978 const struct rte_flow_action *action,
979 struct rte_flow_error *error)
981 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
982 uint64_t value = rte_be_to_cpu_32(*conf);
983 struct rte_flow_item item;
984 struct rte_flow_item_tcp tcp;
985 struct rte_flow_item_tcp tcp_mask;
987 memset(&tcp, 0, sizeof(tcp));
988 memset(&tcp_mask, 0, sizeof(tcp_mask));
989 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
991 * The HW has no decrement operation, only increment operation.
992 * To simulate decrement X from Y using increment operation
993 * we need to add UINT32_MAX X times to Y.
994 * Each adding of UINT32_MAX decrements Y by 1.
997 tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
998 tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
999 item.type = RTE_FLOW_ITEM_TYPE_TCP;
1001 item.mask = &tcp_mask;
1002 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1003 MLX5_MODIFICATION_TYPE_ADD, error);
1006 static enum mlx5_modification_field reg_to_field[] = {
1007 [REG_NON] = MLX5_MODI_OUT_NONE,
1008 [REG_A] = MLX5_MODI_META_DATA_REG_A,
1009 [REG_B] = MLX5_MODI_META_DATA_REG_B,
1010 [REG_C_0] = MLX5_MODI_META_REG_C_0,
1011 [REG_C_1] = MLX5_MODI_META_REG_C_1,
1012 [REG_C_2] = MLX5_MODI_META_REG_C_2,
1013 [REG_C_3] = MLX5_MODI_META_REG_C_3,
1014 [REG_C_4] = MLX5_MODI_META_REG_C_4,
1015 [REG_C_5] = MLX5_MODI_META_REG_C_5,
1016 [REG_C_6] = MLX5_MODI_META_REG_C_6,
1017 [REG_C_7] = MLX5_MODI_META_REG_C_7,
1021 * Convert register set to DV specification.
1023 * @param[in,out] resource
1024 * Pointer to the modify-header resource.
1026 * Pointer to action specification.
1028 * Pointer to the error structure.
1031 * 0 on success, a negative errno value otherwise and rte_errno is set.
1034 flow_dv_convert_action_set_reg
1035 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1036 const struct rte_flow_action *action,
1037 struct rte_flow_error *error)
1039 const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1040 struct mlx5_modification_cmd *actions = resource->actions;
1041 uint32_t i = resource->actions_num;
1043 if (i >= MLX5_MAX_MODIFY_NUM)
1044 return rte_flow_error_set(error, EINVAL,
1045 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1046 "too many items to modify");
1047 MLX5_ASSERT(conf->id != REG_NON);
1048 MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1049 actions[i] = (struct mlx5_modification_cmd) {
1050 .action_type = MLX5_MODIFICATION_TYPE_SET,
1051 .field = reg_to_field[conf->id],
1052 .offset = conf->offset,
1053 .length = conf->length,
1055 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1056 actions[i].data1 = rte_cpu_to_be_32(conf->data);
1058 resource->actions_num = i;
1063 * Convert SET_TAG action to DV specification.
1066 * Pointer to the rte_eth_dev structure.
1067 * @param[in,out] resource
1068 * Pointer to the modify-header resource.
1070 * Pointer to action specification.
1072 * Pointer to the error structure.
1075 * 0 on success, a negative errno value otherwise and rte_errno is set.
1078 flow_dv_convert_action_set_tag
1079 (struct rte_eth_dev *dev,
1080 struct mlx5_flow_dv_modify_hdr_resource *resource,
1081 const struct rte_flow_action_set_tag *conf,
1082 struct rte_flow_error *error)
1084 rte_be32_t data = rte_cpu_to_be_32(conf->data);
1085 rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1086 struct rte_flow_item item = {
1090 struct field_modify_info reg_c_x[] = {
1093 enum mlx5_modification_field reg_type;
1096 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1099 MLX5_ASSERT(ret != REG_NON);
1100 MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1101 reg_type = reg_to_field[ret];
1102 MLX5_ASSERT(reg_type > 0);
1103 reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1104 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1105 MLX5_MODIFICATION_TYPE_SET, error);
1109 * Convert internal COPY_REG action to DV specification.
1112 * Pointer to the rte_eth_dev structure.
1113 * @param[in,out] res
1114 * Pointer to the modify-header resource.
1116 * Pointer to action specification.
1118 * Pointer to the error structure.
1121 * 0 on success, a negative errno value otherwise and rte_errno is set.
1124 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1125 struct mlx5_flow_dv_modify_hdr_resource *res,
1126 const struct rte_flow_action *action,
1127 struct rte_flow_error *error)
1129 const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1130 rte_be32_t mask = RTE_BE32(UINT32_MAX);
1131 struct rte_flow_item item = {
1135 struct field_modify_info reg_src[] = {
1136 {4, 0, reg_to_field[conf->src]},
1139 struct field_modify_info reg_dst = {
1141 .id = reg_to_field[conf->dst],
1143 /* Adjust reg_c[0] usage according to reported mask. */
1144 if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1145 struct mlx5_priv *priv = dev->data->dev_private;
1146 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1148 MLX5_ASSERT(reg_c0);
1149 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1150 if (conf->dst == REG_C_0) {
1151 /* Copy to reg_c[0], within mask only. */
1152 reg_dst.offset = rte_bsf32(reg_c0);
1153 mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1156 mask = rte_cpu_to_be_32(reg_c0);
1159 return flow_dv_convert_modify_action(&item,
1160 reg_src, ®_dst, res,
1161 MLX5_MODIFICATION_TYPE_COPY,
1166 * Convert MARK action to DV specification. This routine is used
1167 * in extensive metadata only and requires metadata register to be
1168 * handled. In legacy mode hardware tag resource is engaged.
1171 * Pointer to the rte_eth_dev structure.
1173 * Pointer to MARK action specification.
1174 * @param[in,out] resource
1175 * Pointer to the modify-header resource.
1177 * Pointer to the error structure.
1180 * 0 on success, a negative errno value otherwise and rte_errno is set.
1183 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1184 const struct rte_flow_action_mark *conf,
1185 struct mlx5_flow_dv_modify_hdr_resource *resource,
1186 struct rte_flow_error *error)
1188 struct mlx5_priv *priv = dev->data->dev_private;
1189 rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1190 priv->sh->dv_mark_mask);
1191 rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1192 struct rte_flow_item item = {
1196 struct field_modify_info reg_c_x[] = {
1202 return rte_flow_error_set(error, EINVAL,
1203 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1204 NULL, "zero mark action mask");
1205 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1208 MLX5_ASSERT(reg > 0);
1209 if (reg == REG_C_0) {
1210 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1211 uint32_t shl_c0 = rte_bsf32(msk_c0);
1213 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1214 mask = rte_cpu_to_be_32(mask) & msk_c0;
1215 mask = rte_cpu_to_be_32(mask << shl_c0);
1217 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1218 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1219 MLX5_MODIFICATION_TYPE_SET, error);
1223 * Get metadata register index for specified steering domain.
1226 * Pointer to the rte_eth_dev structure.
1228 * Attributes of flow to determine steering domain.
1230 * Pointer to the error structure.
1233 * positive index on success, a negative errno value otherwise
1234 * and rte_errno is set.
1236 static enum modify_reg
1237 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1238 const struct rte_flow_attr *attr,
1239 struct rte_flow_error *error)
1242 mlx5_flow_get_reg_id(dev, attr->transfer ?
1246 MLX5_METADATA_RX, 0, error);
1248 return rte_flow_error_set(error,
1249 ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1250 NULL, "unavailable "
1251 "metadata register");
1256 * Convert SET_META action to DV specification.
1259 * Pointer to the rte_eth_dev structure.
1260 * @param[in,out] resource
1261 * Pointer to the modify-header resource.
1263 * Attributes of flow that includes this item.
1265 * Pointer to action specification.
1267 * Pointer to the error structure.
1270 * 0 on success, a negative errno value otherwise and rte_errno is set.
1273 flow_dv_convert_action_set_meta
1274 (struct rte_eth_dev *dev,
1275 struct mlx5_flow_dv_modify_hdr_resource *resource,
1276 const struct rte_flow_attr *attr,
1277 const struct rte_flow_action_set_meta *conf,
1278 struct rte_flow_error *error)
1280 uint32_t mask = rte_cpu_to_be_32(conf->mask);
1281 uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1282 struct rte_flow_item item = {
1286 struct field_modify_info reg_c_x[] = {
1289 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1293 MLX5_ASSERT(reg != REG_NON);
1294 if (reg == REG_C_0) {
1295 struct mlx5_priv *priv = dev->data->dev_private;
1296 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1297 uint32_t shl_c0 = rte_bsf32(msk_c0);
1299 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1300 mask = rte_cpu_to_be_32(mask) & msk_c0;
1301 mask = rte_cpu_to_be_32(mask << shl_c0);
1303 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1304 /* The routine expects parameters in memory as big-endian ones. */
1305 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1306 MLX5_MODIFICATION_TYPE_SET, error);
1310 * Convert modify-header set IPv4 DSCP action to DV specification.
1312 * @param[in,out] resource
1313 * Pointer to the modify-header resource.
1315 * Pointer to action specification.
1317 * Pointer to the error structure.
1320 * 0 on success, a negative errno value otherwise and rte_errno is set.
1323 flow_dv_convert_action_modify_ipv4_dscp
1324 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1325 const struct rte_flow_action *action,
1326 struct rte_flow_error *error)
1328 const struct rte_flow_action_set_dscp *conf =
1329 (const struct rte_flow_action_set_dscp *)(action->conf);
1330 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1331 struct rte_flow_item_ipv4 ipv4;
1332 struct rte_flow_item_ipv4 ipv4_mask;
1334 memset(&ipv4, 0, sizeof(ipv4));
1335 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1336 ipv4.hdr.type_of_service = conf->dscp;
1337 ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1339 item.mask = &ipv4_mask;
1340 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1341 MLX5_MODIFICATION_TYPE_SET, error);
1345 * Convert modify-header set IPv6 DSCP action to DV specification.
1347 * @param[in,out] resource
1348 * Pointer to the modify-header resource.
1350 * Pointer to action specification.
1352 * Pointer to the error structure.
1355 * 0 on success, a negative errno value otherwise and rte_errno is set.
1358 flow_dv_convert_action_modify_ipv6_dscp
1359 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1360 const struct rte_flow_action *action,
1361 struct rte_flow_error *error)
1363 const struct rte_flow_action_set_dscp *conf =
1364 (const struct rte_flow_action_set_dscp *)(action->conf);
1365 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1366 struct rte_flow_item_ipv6 ipv6;
1367 struct rte_flow_item_ipv6 ipv6_mask;
1369 memset(&ipv6, 0, sizeof(ipv6));
1370 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1372 * Even though the DSCP bits offset of IPv6 is not byte aligned,
1373 * rdma-core only accept the DSCP bits byte aligned start from
1374 * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1375 * bits in IPv6 case as rdma-core requires byte aligned value.
1377 ipv6.hdr.vtc_flow = conf->dscp;
1378 ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1380 item.mask = &ipv6_mask;
1381 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1382 MLX5_MODIFICATION_TYPE_SET, error);
1386 mlx5_flow_item_field_width(struct rte_eth_dev *dev,
1387 enum rte_flow_field_id field, int inherit,
1388 const struct rte_flow_attr *attr,
1389 struct rte_flow_error *error)
1391 struct mlx5_priv *priv = dev->data->dev_private;
1394 case RTE_FLOW_FIELD_START:
1396 case RTE_FLOW_FIELD_MAC_DST:
1397 case RTE_FLOW_FIELD_MAC_SRC:
1399 case RTE_FLOW_FIELD_VLAN_TYPE:
1401 case RTE_FLOW_FIELD_VLAN_ID:
1403 case RTE_FLOW_FIELD_MAC_TYPE:
1405 case RTE_FLOW_FIELD_IPV4_DSCP:
1407 case RTE_FLOW_FIELD_IPV4_TTL:
1409 case RTE_FLOW_FIELD_IPV4_SRC:
1410 case RTE_FLOW_FIELD_IPV4_DST:
1412 case RTE_FLOW_FIELD_IPV6_DSCP:
1414 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1416 case RTE_FLOW_FIELD_IPV6_SRC:
1417 case RTE_FLOW_FIELD_IPV6_DST:
1419 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1420 case RTE_FLOW_FIELD_TCP_PORT_DST:
1422 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1423 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1425 case RTE_FLOW_FIELD_TCP_FLAGS:
1427 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1428 case RTE_FLOW_FIELD_UDP_PORT_DST:
1430 case RTE_FLOW_FIELD_VXLAN_VNI:
1431 case RTE_FLOW_FIELD_GENEVE_VNI:
1433 case RTE_FLOW_FIELD_GTP_TEID:
1434 case RTE_FLOW_FIELD_TAG:
1436 case RTE_FLOW_FIELD_MARK:
1437 return __builtin_popcount(priv->sh->dv_mark_mask);
1438 case RTE_FLOW_FIELD_META:
1439 return (flow_dv_get_metadata_reg(dev, attr, error) == REG_C_0) ?
1440 __builtin_popcount(priv->sh->dv_meta_mask) : 32;
1441 case RTE_FLOW_FIELD_POINTER:
1442 case RTE_FLOW_FIELD_VALUE:
1443 return inherit < 0 ? 0 : inherit;
1451 mlx5_flow_field_id_to_modify_info
1452 (const struct rte_flow_action_modify_data *data,
1453 struct field_modify_info *info, uint32_t *mask,
1454 uint32_t width, uint32_t *shift, struct rte_eth_dev *dev,
1455 const struct rte_flow_attr *attr, struct rte_flow_error *error)
1457 struct mlx5_priv *priv = dev->data->dev_private;
1461 switch (data->field) {
1462 case RTE_FLOW_FIELD_START:
1463 /* not supported yet */
1466 case RTE_FLOW_FIELD_MAC_DST:
1467 off = data->offset > 16 ? data->offset - 16 : 0;
1469 if (data->offset < 16) {
1470 info[idx] = (struct field_modify_info){2, 4,
1471 MLX5_MODI_OUT_DMAC_15_0};
1473 mask[1] = rte_cpu_to_be_16(0xffff >>
1477 mask[1] = RTE_BE16(0xffff);
1484 info[idx] = (struct field_modify_info){4, 0,
1485 MLX5_MODI_OUT_DMAC_47_16};
1486 mask[0] = rte_cpu_to_be_32((0xffffffff >>
1487 (32 - width)) << off);
1489 if (data->offset < 16)
1490 info[idx++] = (struct field_modify_info){2, 0,
1491 MLX5_MODI_OUT_DMAC_15_0};
1492 info[idx] = (struct field_modify_info){4, off,
1493 MLX5_MODI_OUT_DMAC_47_16};
1496 case RTE_FLOW_FIELD_MAC_SRC:
1497 off = data->offset > 16 ? data->offset - 16 : 0;
1499 if (data->offset < 16) {
1500 info[idx] = (struct field_modify_info){2, 4,
1501 MLX5_MODI_OUT_SMAC_15_0};
1503 mask[1] = rte_cpu_to_be_16(0xffff >>
1507 mask[1] = RTE_BE16(0xffff);
1514 info[idx] = (struct field_modify_info){4, 0,
1515 MLX5_MODI_OUT_SMAC_47_16};
1516 mask[0] = rte_cpu_to_be_32((0xffffffff >>
1517 (32 - width)) << off);
1519 if (data->offset < 16)
1520 info[idx++] = (struct field_modify_info){2, 0,
1521 MLX5_MODI_OUT_SMAC_15_0};
1522 info[idx] = (struct field_modify_info){4, off,
1523 MLX5_MODI_OUT_SMAC_47_16};
1526 case RTE_FLOW_FIELD_VLAN_TYPE:
1527 /* not supported yet */
1529 case RTE_FLOW_FIELD_VLAN_ID:
1530 info[idx] = (struct field_modify_info){2, 0,
1531 MLX5_MODI_OUT_FIRST_VID};
1533 mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1535 case RTE_FLOW_FIELD_MAC_TYPE:
1536 info[idx] = (struct field_modify_info){2, 0,
1537 MLX5_MODI_OUT_ETHERTYPE};
1539 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1541 case RTE_FLOW_FIELD_IPV4_DSCP:
1542 info[idx] = (struct field_modify_info){1, 0,
1543 MLX5_MODI_OUT_IP_DSCP};
1545 mask[idx] = 0x3f >> (6 - width);
1547 case RTE_FLOW_FIELD_IPV4_TTL:
1548 info[idx] = (struct field_modify_info){1, 0,
1549 MLX5_MODI_OUT_IPV4_TTL};
1551 mask[idx] = 0xff >> (8 - width);
1553 case RTE_FLOW_FIELD_IPV4_SRC:
1554 info[idx] = (struct field_modify_info){4, 0,
1555 MLX5_MODI_OUT_SIPV4};
1557 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1560 case RTE_FLOW_FIELD_IPV4_DST:
1561 info[idx] = (struct field_modify_info){4, 0,
1562 MLX5_MODI_OUT_DIPV4};
1564 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1567 case RTE_FLOW_FIELD_IPV6_DSCP:
1568 info[idx] = (struct field_modify_info){1, 0,
1569 MLX5_MODI_OUT_IP_DSCP};
1571 mask[idx] = 0x3f >> (6 - width);
1573 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1574 info[idx] = (struct field_modify_info){1, 0,
1575 MLX5_MODI_OUT_IPV6_HOPLIMIT};
1577 mask[idx] = 0xff >> (8 - width);
1579 case RTE_FLOW_FIELD_IPV6_SRC:
1581 if (data->offset < 32) {
1582 info[idx] = (struct field_modify_info){4, 12,
1583 MLX5_MODI_OUT_SIPV6_31_0};
1586 rte_cpu_to_be_32(0xffffffff >>
1590 mask[3] = RTE_BE32(0xffffffff);
1597 if (data->offset < 64) {
1598 info[idx] = (struct field_modify_info){4, 8,
1599 MLX5_MODI_OUT_SIPV6_63_32};
1602 rte_cpu_to_be_32(0xffffffff >>
1606 mask[2] = RTE_BE32(0xffffffff);
1613 if (data->offset < 96) {
1614 info[idx] = (struct field_modify_info){4, 4,
1615 MLX5_MODI_OUT_SIPV6_95_64};
1618 rte_cpu_to_be_32(0xffffffff >>
1622 mask[1] = RTE_BE32(0xffffffff);
1629 info[idx] = (struct field_modify_info){4, 0,
1630 MLX5_MODI_OUT_SIPV6_127_96};
1631 mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1633 if (data->offset < 32)
1634 info[idx++] = (struct field_modify_info){4, 0,
1635 MLX5_MODI_OUT_SIPV6_31_0};
1636 if (data->offset < 64)
1637 info[idx++] = (struct field_modify_info){4, 0,
1638 MLX5_MODI_OUT_SIPV6_63_32};
1639 if (data->offset < 96)
1640 info[idx++] = (struct field_modify_info){4, 0,
1641 MLX5_MODI_OUT_SIPV6_95_64};
1642 if (data->offset < 128)
1643 info[idx++] = (struct field_modify_info){4, 0,
1644 MLX5_MODI_OUT_SIPV6_127_96};
1647 case RTE_FLOW_FIELD_IPV6_DST:
1649 if (data->offset < 32) {
1650 info[idx] = (struct field_modify_info){4, 12,
1651 MLX5_MODI_OUT_DIPV6_31_0};
1654 rte_cpu_to_be_32(0xffffffff >>
1658 mask[3] = RTE_BE32(0xffffffff);
1665 if (data->offset < 64) {
1666 info[idx] = (struct field_modify_info){4, 8,
1667 MLX5_MODI_OUT_DIPV6_63_32};
1670 rte_cpu_to_be_32(0xffffffff >>
1674 mask[2] = RTE_BE32(0xffffffff);
1681 if (data->offset < 96) {
1682 info[idx] = (struct field_modify_info){4, 4,
1683 MLX5_MODI_OUT_DIPV6_95_64};
1686 rte_cpu_to_be_32(0xffffffff >>
1690 mask[1] = RTE_BE32(0xffffffff);
1697 info[idx] = (struct field_modify_info){4, 0,
1698 MLX5_MODI_OUT_DIPV6_127_96};
1699 mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1701 if (data->offset < 32)
1702 info[idx++] = (struct field_modify_info){4, 0,
1703 MLX5_MODI_OUT_DIPV6_31_0};
1704 if (data->offset < 64)
1705 info[idx++] = (struct field_modify_info){4, 0,
1706 MLX5_MODI_OUT_DIPV6_63_32};
1707 if (data->offset < 96)
1708 info[idx++] = (struct field_modify_info){4, 0,
1709 MLX5_MODI_OUT_DIPV6_95_64};
1710 if (data->offset < 128)
1711 info[idx++] = (struct field_modify_info){4, 0,
1712 MLX5_MODI_OUT_DIPV6_127_96};
1715 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1716 info[idx] = (struct field_modify_info){2, 0,
1717 MLX5_MODI_OUT_TCP_SPORT};
1719 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1721 case RTE_FLOW_FIELD_TCP_PORT_DST:
1722 info[idx] = (struct field_modify_info){2, 0,
1723 MLX5_MODI_OUT_TCP_DPORT};
1725 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1727 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1728 info[idx] = (struct field_modify_info){4, 0,
1729 MLX5_MODI_OUT_TCP_SEQ_NUM};
1731 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1734 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1735 info[idx] = (struct field_modify_info){4, 0,
1736 MLX5_MODI_OUT_TCP_ACK_NUM};
1738 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1741 case RTE_FLOW_FIELD_TCP_FLAGS:
1742 info[idx] = (struct field_modify_info){2, 0,
1743 MLX5_MODI_OUT_TCP_FLAGS};
1745 mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1747 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1748 info[idx] = (struct field_modify_info){2, 0,
1749 MLX5_MODI_OUT_UDP_SPORT};
1751 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1753 case RTE_FLOW_FIELD_UDP_PORT_DST:
1754 info[idx] = (struct field_modify_info){2, 0,
1755 MLX5_MODI_OUT_UDP_DPORT};
1757 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1759 case RTE_FLOW_FIELD_VXLAN_VNI:
1760 /* not supported yet */
1762 case RTE_FLOW_FIELD_GENEVE_VNI:
1763 /* not supported yet*/
1765 case RTE_FLOW_FIELD_GTP_TEID:
1766 info[idx] = (struct field_modify_info){4, 0,
1767 MLX5_MODI_GTP_TEID};
1769 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1772 case RTE_FLOW_FIELD_TAG:
1774 int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1775 data->level, error);
1778 MLX5_ASSERT(reg != REG_NON);
1779 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1780 info[idx] = (struct field_modify_info){4, 0,
1784 rte_cpu_to_be_32(0xffffffff >>
1788 case RTE_FLOW_FIELD_MARK:
1790 uint32_t mark_mask = priv->sh->dv_mark_mask;
1791 uint32_t mark_count = __builtin_popcount(mark_mask);
1792 int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1796 MLX5_ASSERT(reg != REG_NON);
1797 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1798 info[idx] = (struct field_modify_info){4, 0,
1801 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1802 (mark_count - width)) & mark_mask);
1805 case RTE_FLOW_FIELD_META:
1807 uint32_t meta_mask = priv->sh->dv_meta_mask;
1808 uint32_t meta_count = __builtin_popcount(meta_mask);
1810 rte_cpu_to_be_32(priv->sh->dv_regc0_mask);
1811 uint32_t shl_c0 = rte_bsf32(msk_c0);
1812 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1815 MLX5_ASSERT(reg != REG_NON);
1816 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1819 info[idx] = (struct field_modify_info){4, 0,
1822 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1823 (meta_count - width)) & meta_mask);
1826 case RTE_FLOW_FIELD_POINTER:
1827 case RTE_FLOW_FIELD_VALUE:
1835 * Convert modify_field action to DV specification.
1838 * Pointer to the rte_eth_dev structure.
1839 * @param[in,out] resource
1840 * Pointer to the modify-header resource.
1842 * Pointer to action specification.
1844 * Attributes of flow that includes this item.
1846 * Pointer to the error structure.
1849 * 0 on success, a negative errno value otherwise and rte_errno is set.
1852 flow_dv_convert_action_modify_field
1853 (struct rte_eth_dev *dev,
1854 struct mlx5_flow_dv_modify_hdr_resource *resource,
1855 const struct rte_flow_action *action,
1856 const struct rte_flow_attr *attr,
1857 struct rte_flow_error *error)
1859 const struct rte_flow_action_modify_field *conf =
1860 (const struct rte_flow_action_modify_field *)(action->conf);
1861 struct rte_flow_item item = {
1865 struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1867 struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1869 uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1873 if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1874 conf->src.field == RTE_FLOW_FIELD_VALUE) {
1875 type = MLX5_MODIFICATION_TYPE_SET;
1876 /** For SET fill the destination field (field) first. */
1877 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1878 conf->width, &shift, dev,
1880 item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?
1881 (void *)(uintptr_t)conf->src.pvalue :
1882 (void *)(uintptr_t)&conf->src.value;
1884 type = MLX5_MODIFICATION_TYPE_COPY;
1885 /** For COPY fill the destination field (dcopy) without mask. */
1886 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1887 conf->width, &shift, dev,
1889 /** Then construct the source field (field) with mask. */
1890 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1891 conf->width, &shift,
1895 return flow_dv_convert_modify_action(&item,
1896 field, dcopy, resource, type, error);
1900 * Validate MARK item.
1903 * Pointer to the rte_eth_dev structure.
1905 * Item specification.
1907 * Attributes of flow that includes this item.
1909 * Pointer to error structure.
1912 * 0 on success, a negative errno value otherwise and rte_errno is set.
1915 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1916 const struct rte_flow_item *item,
1917 const struct rte_flow_attr *attr __rte_unused,
1918 struct rte_flow_error *error)
1920 struct mlx5_priv *priv = dev->data->dev_private;
1921 struct mlx5_dev_config *config = &priv->config;
1922 const struct rte_flow_item_mark *spec = item->spec;
1923 const struct rte_flow_item_mark *mask = item->mask;
1924 const struct rte_flow_item_mark nic_mask = {
1925 .id = priv->sh->dv_mark_mask,
1929 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1930 return rte_flow_error_set(error, ENOTSUP,
1931 RTE_FLOW_ERROR_TYPE_ITEM, item,
1932 "extended metadata feature"
1934 if (!mlx5_flow_ext_mreg_supported(dev))
1935 return rte_flow_error_set(error, ENOTSUP,
1936 RTE_FLOW_ERROR_TYPE_ITEM, item,
1937 "extended metadata register"
1938 " isn't supported");
1940 return rte_flow_error_set(error, ENOTSUP,
1941 RTE_FLOW_ERROR_TYPE_ITEM, item,
1942 "extended metadata register"
1943 " isn't available");
1944 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1948 return rte_flow_error_set(error, EINVAL,
1949 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1951 "data cannot be empty");
1952 if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1953 return rte_flow_error_set(error, EINVAL,
1954 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1956 "mark id exceeds the limit");
1960 return rte_flow_error_set(error, EINVAL,
1961 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1962 "mask cannot be zero");
1964 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1965 (const uint8_t *)&nic_mask,
1966 sizeof(struct rte_flow_item_mark),
1967 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1974 * Validate META item.
1977 * Pointer to the rte_eth_dev structure.
1979 * Item specification.
1981 * Attributes of flow that includes this item.
1983 * Pointer to error structure.
1986 * 0 on success, a negative errno value otherwise and rte_errno is set.
1989 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1990 const struct rte_flow_item *item,
1991 const struct rte_flow_attr *attr,
1992 struct rte_flow_error *error)
1994 struct mlx5_priv *priv = dev->data->dev_private;
1995 struct mlx5_dev_config *config = &priv->config;
1996 const struct rte_flow_item_meta *spec = item->spec;
1997 const struct rte_flow_item_meta *mask = item->mask;
1998 struct rte_flow_item_meta nic_mask = {
2005 return rte_flow_error_set(error, EINVAL,
2006 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2008 "data cannot be empty");
2009 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2010 if (!mlx5_flow_ext_mreg_supported(dev))
2011 return rte_flow_error_set(error, ENOTSUP,
2012 RTE_FLOW_ERROR_TYPE_ITEM, item,
2013 "extended metadata register"
2014 " isn't supported");
2015 reg = flow_dv_get_metadata_reg(dev, attr, error);
2019 return rte_flow_error_set(error, ENOTSUP,
2020 RTE_FLOW_ERROR_TYPE_ITEM, item,
2021 "unavailable extended metadata register");
2023 return rte_flow_error_set(error, ENOTSUP,
2024 RTE_FLOW_ERROR_TYPE_ITEM, item,
2028 nic_mask.data = priv->sh->dv_meta_mask;
2031 return rte_flow_error_set(error, ENOTSUP,
2032 RTE_FLOW_ERROR_TYPE_ITEM, item,
2033 "extended metadata feature "
2034 "should be enabled when "
2035 "meta item is requested "
2036 "with e-switch mode ");
2038 return rte_flow_error_set(error, ENOTSUP,
2039 RTE_FLOW_ERROR_TYPE_ITEM, item,
2040 "match on metadata for ingress "
2041 "is not supported in legacy "
2045 mask = &rte_flow_item_meta_mask;
2047 return rte_flow_error_set(error, EINVAL,
2048 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2049 "mask cannot be zero");
2051 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2052 (const uint8_t *)&nic_mask,
2053 sizeof(struct rte_flow_item_meta),
2054 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2059 * Validate TAG item.
2062 * Pointer to the rte_eth_dev structure.
2064 * Item specification.
2066 * Attributes of flow that includes this item.
2068 * Pointer to error structure.
2071 * 0 on success, a negative errno value otherwise and rte_errno is set.
2074 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2075 const struct rte_flow_item *item,
2076 const struct rte_flow_attr *attr __rte_unused,
2077 struct rte_flow_error *error)
2079 const struct rte_flow_item_tag *spec = item->spec;
2080 const struct rte_flow_item_tag *mask = item->mask;
2081 const struct rte_flow_item_tag nic_mask = {
2082 .data = RTE_BE32(UINT32_MAX),
2087 if (!mlx5_flow_ext_mreg_supported(dev))
2088 return rte_flow_error_set(error, ENOTSUP,
2089 RTE_FLOW_ERROR_TYPE_ITEM, item,
2090 "extensive metadata register"
2091 " isn't supported");
2093 return rte_flow_error_set(error, EINVAL,
2094 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2096 "data cannot be empty");
2098 mask = &rte_flow_item_tag_mask;
2100 return rte_flow_error_set(error, EINVAL,
2101 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2102 "mask cannot be zero");
2104 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2105 (const uint8_t *)&nic_mask,
2106 sizeof(struct rte_flow_item_tag),
2107 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2110 if (mask->index != 0xff)
2111 return rte_flow_error_set(error, EINVAL,
2112 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2113 "partial mask for tag index"
2114 " is not supported");
2115 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2118 MLX5_ASSERT(ret != REG_NON);
2123 * Validate vport item.
2126 * Pointer to the rte_eth_dev structure.
2128 * Item specification.
2130 * Attributes of flow that includes this item.
2131 * @param[in] item_flags
2132 * Bit-fields that holds the items detected until now.
2134 * Pointer to error structure.
2137 * 0 on success, a negative errno value otherwise and rte_errno is set.
2140 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2141 const struct rte_flow_item *item,
2142 const struct rte_flow_attr *attr,
2143 uint64_t item_flags,
2144 struct rte_flow_error *error)
2146 const struct rte_flow_item_port_id *spec = item->spec;
2147 const struct rte_flow_item_port_id *mask = item->mask;
2148 const struct rte_flow_item_port_id switch_mask = {
2151 struct mlx5_priv *esw_priv;
2152 struct mlx5_priv *dev_priv;
2155 if (!attr->transfer)
2156 return rte_flow_error_set(error, EINVAL,
2157 RTE_FLOW_ERROR_TYPE_ITEM,
2159 "match on port id is valid only"
2160 " when transfer flag is enabled");
2161 if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2162 return rte_flow_error_set(error, ENOTSUP,
2163 RTE_FLOW_ERROR_TYPE_ITEM, item,
2164 "multiple source ports are not"
2167 mask = &switch_mask;
2168 if (mask->id != 0xffffffff)
2169 return rte_flow_error_set(error, ENOTSUP,
2170 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2172 "no support for partial mask on"
2174 ret = mlx5_flow_item_acceptable
2175 (item, (const uint8_t *)mask,
2176 (const uint8_t *)&rte_flow_item_port_id_mask,
2177 sizeof(struct rte_flow_item_port_id),
2178 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2183 if (spec->id == MLX5_PORT_ESW_MGR)
2185 esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2187 return rte_flow_error_set(error, rte_errno,
2188 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2189 "failed to obtain E-Switch info for"
2191 dev_priv = mlx5_dev_to_eswitch_info(dev);
2193 return rte_flow_error_set(error, rte_errno,
2194 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2196 "failed to obtain E-Switch info");
2197 if (esw_priv->domain_id != dev_priv->domain_id)
2198 return rte_flow_error_set(error, EINVAL,
2199 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2200 "cannot match on a port from a"
2201 " different E-Switch");
2206 * Validate VLAN item.
2209 * Item specification.
2210 * @param[in] item_flags
2211 * Bit-fields that holds the items detected until now.
2213 * Ethernet device flow is being created on.
2215 * Pointer to error structure.
2218 * 0 on success, a negative errno value otherwise and rte_errno is set.
2221 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2222 uint64_t item_flags,
2223 struct rte_eth_dev *dev,
2224 struct rte_flow_error *error)
2226 const struct rte_flow_item_vlan *mask = item->mask;
2227 const struct rte_flow_item_vlan nic_mask = {
2228 .tci = RTE_BE16(UINT16_MAX),
2229 .inner_type = RTE_BE16(UINT16_MAX),
2232 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2234 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2235 MLX5_FLOW_LAYER_INNER_L4) :
2236 (MLX5_FLOW_LAYER_OUTER_L3 |
2237 MLX5_FLOW_LAYER_OUTER_L4);
2238 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2239 MLX5_FLOW_LAYER_OUTER_VLAN;
2241 if (item_flags & vlanm)
2242 return rte_flow_error_set(error, EINVAL,
2243 RTE_FLOW_ERROR_TYPE_ITEM, item,
2244 "multiple VLAN layers not supported");
2245 else if ((item_flags & l34m) != 0)
2246 return rte_flow_error_set(error, EINVAL,
2247 RTE_FLOW_ERROR_TYPE_ITEM, item,
2248 "VLAN cannot follow L3/L4 layer");
2250 mask = &rte_flow_item_vlan_mask;
2251 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2252 (const uint8_t *)&nic_mask,
2253 sizeof(struct rte_flow_item_vlan),
2254 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2257 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2258 struct mlx5_priv *priv = dev->data->dev_private;
2260 if (priv->vmwa_context) {
2262 * Non-NULL context means we have a virtual machine
2263 * and SR-IOV enabled, we have to create VLAN interface
2264 * to make hypervisor to setup E-Switch vport
2265 * context correctly. We avoid creating the multiple
2266 * VLAN interfaces, so we cannot support VLAN tag mask.
2268 return rte_flow_error_set(error, EINVAL,
2269 RTE_FLOW_ERROR_TYPE_ITEM,
2271 "VLAN tag mask is not"
2272 " supported in virtual"
2280 * GTP flags are contained in 1 byte of the format:
2281 * -------------------------------------------
2282 * | bit | 0 - 2 | 3 | 4 | 5 | 6 | 7 |
2283 * |-----------------------------------------|
2284 * | value | Version | PT | Res | E | S | PN |
2285 * -------------------------------------------
2287 * Matching is supported only for GTP flags E, S, PN.
2289 #define MLX5_GTP_FLAGS_MASK 0x07
2292 * Validate GTP item.
2295 * Pointer to the rte_eth_dev structure.
2297 * Item specification.
2298 * @param[in] item_flags
2299 * Bit-fields that holds the items detected until now.
2301 * Pointer to error structure.
2304 * 0 on success, a negative errno value otherwise and rte_errno is set.
2307 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2308 const struct rte_flow_item *item,
2309 uint64_t item_flags,
2310 struct rte_flow_error *error)
2312 struct mlx5_priv *priv = dev->data->dev_private;
2313 const struct rte_flow_item_gtp *spec = item->spec;
2314 const struct rte_flow_item_gtp *mask = item->mask;
2315 const struct rte_flow_item_gtp nic_mask = {
2316 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2318 .teid = RTE_BE32(0xffffffff),
2321 if (!priv->config.hca_attr.tunnel_stateless_gtp)
2322 return rte_flow_error_set(error, ENOTSUP,
2323 RTE_FLOW_ERROR_TYPE_ITEM, item,
2324 "GTP support is not enabled");
2325 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2326 return rte_flow_error_set(error, ENOTSUP,
2327 RTE_FLOW_ERROR_TYPE_ITEM, item,
2328 "multiple tunnel layers not"
2330 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2331 return rte_flow_error_set(error, EINVAL,
2332 RTE_FLOW_ERROR_TYPE_ITEM, item,
2333 "no outer UDP layer found");
2335 mask = &rte_flow_item_gtp_mask;
2336 if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2337 return rte_flow_error_set(error, ENOTSUP,
2338 RTE_FLOW_ERROR_TYPE_ITEM, item,
2339 "Match is supported for GTP"
2341 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2342 (const uint8_t *)&nic_mask,
2343 sizeof(struct rte_flow_item_gtp),
2344 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2348 * Validate GTP PSC item.
2351 * Item specification.
2352 * @param[in] last_item
2353 * Previous validated item in the pattern items.
2354 * @param[in] gtp_item
2355 * Previous GTP item specification.
2357 * Pointer to flow attributes.
2359 * Pointer to error structure.
2362 * 0 on success, a negative errno value otherwise and rte_errno is set.
2365 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2367 const struct rte_flow_item *gtp_item,
2368 const struct rte_flow_attr *attr,
2369 struct rte_flow_error *error)
2371 const struct rte_flow_item_gtp *gtp_spec;
2372 const struct rte_flow_item_gtp *gtp_mask;
2373 const struct rte_flow_item_gtp_psc *mask;
2374 const struct rte_flow_item_gtp_psc nic_mask = {
2379 if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2380 return rte_flow_error_set
2381 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2382 "GTP PSC item must be preceded with GTP item");
2383 gtp_spec = gtp_item->spec;
2384 gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2385 /* GTP spec and E flag is requested to match zero. */
2387 (gtp_mask->v_pt_rsv_flags &
2388 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2389 return rte_flow_error_set
2390 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2391 "GTP E flag must be 1 to match GTP PSC");
2392 /* Check the flow is not created in group zero. */
2393 if (!attr->transfer && !attr->group)
2394 return rte_flow_error_set
2395 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2396 "GTP PSC is not supported for group 0");
2397 /* GTP spec is here and E flag is requested to match zero. */
2400 mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2401 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2402 (const uint8_t *)&nic_mask,
2403 sizeof(struct rte_flow_item_gtp_psc),
2404 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2408 * Validate IPV4 item.
2409 * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2410 * add specific validation of fragment_offset field,
2413 * Item specification.
2414 * @param[in] item_flags
2415 * Bit-fields that holds the items detected until now.
2417 * Pointer to error structure.
2420 * 0 on success, a negative errno value otherwise and rte_errno is set.
2423 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2424 const struct rte_flow_item *item,
2425 uint64_t item_flags, uint64_t last_item,
2426 uint16_t ether_type, struct rte_flow_error *error)
2429 struct mlx5_priv *priv = dev->data->dev_private;
2430 const struct rte_flow_item_ipv4 *spec = item->spec;
2431 const struct rte_flow_item_ipv4 *last = item->last;
2432 const struct rte_flow_item_ipv4 *mask = item->mask;
2433 rte_be16_t fragment_offset_spec = 0;
2434 rte_be16_t fragment_offset_last = 0;
2435 struct rte_flow_item_ipv4 nic_ipv4_mask = {
2437 .src_addr = RTE_BE32(0xffffffff),
2438 .dst_addr = RTE_BE32(0xffffffff),
2439 .type_of_service = 0xff,
2440 .fragment_offset = RTE_BE16(0xffff),
2441 .next_proto_id = 0xff,
2442 .time_to_live = 0xff,
2446 if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2447 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2448 bool ihl_cap = !tunnel ? priv->config.hca_attr.outer_ipv4_ihl :
2449 priv->config.hca_attr.inner_ipv4_ihl;
2451 return rte_flow_error_set(error, ENOTSUP,
2452 RTE_FLOW_ERROR_TYPE_ITEM,
2454 "IPV4 ihl offload not supported");
2455 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2457 ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2458 ether_type, &nic_ipv4_mask,
2459 MLX5_ITEM_RANGE_ACCEPTED, error);
2463 fragment_offset_spec = spec->hdr.fragment_offset &
2464 mask->hdr.fragment_offset;
2465 if (!fragment_offset_spec)
2468 * spec and mask are valid, enforce using full mask to make sure the
2469 * complete value is used correctly.
2471 if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2472 != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2473 return rte_flow_error_set(error, EINVAL,
2474 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2475 item, "must use full mask for"
2476 " fragment_offset");
2478 * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2479 * indicating this is 1st fragment of fragmented packet.
2480 * This is not yet supported in MLX5, return appropriate error message.
2482 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2483 return rte_flow_error_set(error, ENOTSUP,
2484 RTE_FLOW_ERROR_TYPE_ITEM, item,
2485 "match on first fragment not "
2487 if (fragment_offset_spec && !last)
2488 return rte_flow_error_set(error, ENOTSUP,
2489 RTE_FLOW_ERROR_TYPE_ITEM, item,
2490 "specified value not supported");
2491 /* spec and last are valid, validate the specified range. */
2492 fragment_offset_last = last->hdr.fragment_offset &
2493 mask->hdr.fragment_offset;
2495 * Match on fragment_offset spec 0x2001 and last 0x3fff
2496 * means MF is 1 and frag-offset is > 0.
2497 * This packet is fragment 2nd and onward, excluding last.
2498 * This is not yet supported in MLX5, return appropriate
2501 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2502 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2503 return rte_flow_error_set(error, ENOTSUP,
2504 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2505 last, "match on following "
2506 "fragments not supported");
2508 * Match on fragment_offset spec 0x0001 and last 0x1fff
2509 * means MF is 0 and frag-offset is > 0.
2510 * This packet is last fragment of fragmented packet.
2511 * This is not yet supported in MLX5, return appropriate
2514 if (fragment_offset_spec == RTE_BE16(1) &&
2515 fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2516 return rte_flow_error_set(error, ENOTSUP,
2517 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2518 last, "match on last "
2519 "fragment not supported");
2521 * Match on fragment_offset spec 0x0001 and last 0x3fff
2522 * means MF and/or frag-offset is not 0.
2523 * This is a fragmented packet.
2524 * Other range values are invalid and rejected.
2526 if (!(fragment_offset_spec == RTE_BE16(1) &&
2527 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2528 return rte_flow_error_set(error, ENOTSUP,
2529 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2530 "specified range not supported");
2535 * Validate IPV6 fragment extension item.
2538 * Item specification.
2539 * @param[in] item_flags
2540 * Bit-fields that holds the items detected until now.
2542 * Pointer to error structure.
2545 * 0 on success, a negative errno value otherwise and rte_errno is set.
2548 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2549 uint64_t item_flags,
2550 struct rte_flow_error *error)
2552 const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2553 const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2554 const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2555 rte_be16_t frag_data_spec = 0;
2556 rte_be16_t frag_data_last = 0;
2557 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2558 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2559 MLX5_FLOW_LAYER_OUTER_L4;
2561 struct rte_flow_item_ipv6_frag_ext nic_mask = {
2563 .next_header = 0xff,
2564 .frag_data = RTE_BE16(0xffff),
2568 if (item_flags & l4m)
2569 return rte_flow_error_set(error, EINVAL,
2570 RTE_FLOW_ERROR_TYPE_ITEM, item,
2571 "ipv6 fragment extension item cannot "
2573 if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2574 (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2575 return rte_flow_error_set(error, EINVAL,
2576 RTE_FLOW_ERROR_TYPE_ITEM, item,
2577 "ipv6 fragment extension item must "
2578 "follow ipv6 item");
2580 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2581 if (!frag_data_spec)
2584 * spec and mask are valid, enforce using full mask to make sure the
2585 * complete value is used correctly.
2587 if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2588 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2589 return rte_flow_error_set(error, EINVAL,
2590 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2591 item, "must use full mask for"
2594 * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2595 * This is 1st fragment of fragmented packet.
2597 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2598 return rte_flow_error_set(error, ENOTSUP,
2599 RTE_FLOW_ERROR_TYPE_ITEM, item,
2600 "match on first fragment not "
2602 if (frag_data_spec && !last)
2603 return rte_flow_error_set(error, EINVAL,
2604 RTE_FLOW_ERROR_TYPE_ITEM, item,
2605 "specified value not supported");
2606 ret = mlx5_flow_item_acceptable
2607 (item, (const uint8_t *)mask,
2608 (const uint8_t *)&nic_mask,
2609 sizeof(struct rte_flow_item_ipv6_frag_ext),
2610 MLX5_ITEM_RANGE_ACCEPTED, error);
2613 /* spec and last are valid, validate the specified range. */
2614 frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2616 * Match on frag_data spec 0x0009 and last 0xfff9
2617 * means M is 1 and frag-offset is > 0.
2618 * This packet is fragment 2nd and onward, excluding last.
2619 * This is not yet supported in MLX5, return appropriate
2622 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2623 RTE_IPV6_EHDR_MF_MASK) &&
2624 frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2625 return rte_flow_error_set(error, ENOTSUP,
2626 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2627 last, "match on following "
2628 "fragments not supported");
2630 * Match on frag_data spec 0x0008 and last 0xfff8
2631 * means M is 0 and frag-offset is > 0.
2632 * This packet is last fragment of fragmented packet.
2633 * This is not yet supported in MLX5, return appropriate
2636 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2637 frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2638 return rte_flow_error_set(error, ENOTSUP,
2639 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2640 last, "match on last "
2641 "fragment not supported");
2642 /* Other range values are invalid and rejected. */
2643 return rte_flow_error_set(error, EINVAL,
2644 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2645 "specified range not supported");
2649 * Validate ASO CT item.
2652 * Pointer to the rte_eth_dev structure.
2654 * Item specification.
2655 * @param[in] item_flags
2656 * Pointer to bit-fields that holds the items detected until now.
2658 * Pointer to error structure.
2661 * 0 on success, a negative errno value otherwise and rte_errno is set.
2664 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2665 const struct rte_flow_item *item,
2666 uint64_t *item_flags,
2667 struct rte_flow_error *error)
2669 const struct rte_flow_item_conntrack *spec = item->spec;
2670 const struct rte_flow_item_conntrack *mask = item->mask;
2674 if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2675 return rte_flow_error_set(error, EINVAL,
2676 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2677 "Only one CT is supported");
2679 mask = &rte_flow_item_conntrack_mask;
2680 flags = spec->flags & mask->flags;
2681 if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2682 ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2683 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2684 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2685 return rte_flow_error_set(error, EINVAL,
2686 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2687 "Conflict status bits");
2688 /* State change also needs to be considered. */
2689 *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2694 * Validate the pop VLAN action.
2697 * Pointer to the rte_eth_dev structure.
2698 * @param[in] action_flags
2699 * Holds the actions detected until now.
2701 * Pointer to the pop vlan action.
2702 * @param[in] item_flags
2703 * The items found in this flow rule.
2705 * Pointer to flow attributes.
2707 * Pointer to error structure.
2710 * 0 on success, a negative errno value otherwise and rte_errno is set.
2713 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2714 uint64_t action_flags,
2715 const struct rte_flow_action *action,
2716 uint64_t item_flags,
2717 const struct rte_flow_attr *attr,
2718 struct rte_flow_error *error)
2720 const struct mlx5_priv *priv = dev->data->dev_private;
2721 struct mlx5_dev_ctx_shared *sh = priv->sh;
2722 bool direction_error = false;
2724 if (!priv->sh->pop_vlan_action)
2725 return rte_flow_error_set(error, ENOTSUP,
2726 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2728 "pop vlan action is not supported");
2729 /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2730 if (attr->transfer) {
2731 bool fdb_tx = priv->representor_id != UINT16_MAX;
2732 bool is_cx5 = sh->steering_format_version ==
2733 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2735 if (fdb_tx && is_cx5)
2736 direction_error = true;
2737 } else if (attr->egress) {
2738 direction_error = true;
2740 if (direction_error)
2741 return rte_flow_error_set(error, ENOTSUP,
2742 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2744 "pop vlan action not supported for egress");
2745 if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2746 return rte_flow_error_set(error, ENOTSUP,
2747 RTE_FLOW_ERROR_TYPE_ACTION, action,
2748 "no support for multiple VLAN "
2750 /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2751 if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2752 !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2753 return rte_flow_error_set(error, ENOTSUP,
2754 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2756 "cannot pop vlan after decap without "
2757 "match on inner vlan in the flow");
2758 /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2759 if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2760 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2761 return rte_flow_error_set(error, ENOTSUP,
2762 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2764 "cannot pop vlan without a "
2765 "match on (outer) vlan in the flow");
2766 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2767 return rte_flow_error_set(error, EINVAL,
2768 RTE_FLOW_ERROR_TYPE_ACTION, action,
2769 "wrong action order, port_id should "
2770 "be after pop VLAN action");
2771 if (!attr->transfer && priv->representor)
2772 return rte_flow_error_set(error, ENOTSUP,
2773 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2774 "pop vlan action for VF representor "
2775 "not supported on NIC table");
2780 * Get VLAN default info from vlan match info.
2783 * the list of item specifications.
2785 * pointer VLAN info to fill to.
2788 * 0 on success, a negative errno value otherwise and rte_errno is set.
2791 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2792 struct rte_vlan_hdr *vlan)
2794 const struct rte_flow_item_vlan nic_mask = {
2795 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2796 MLX5DV_FLOW_VLAN_VID_MASK),
2797 .inner_type = RTE_BE16(0xffff),
2802 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2803 int type = items->type;
2805 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2806 type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2809 if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2810 const struct rte_flow_item_vlan *vlan_m = items->mask;
2811 const struct rte_flow_item_vlan *vlan_v = items->spec;
2813 /* If VLAN item in pattern doesn't contain data, return here. */
2818 /* Only full match values are accepted */
2819 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2820 MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2821 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2823 rte_be_to_cpu_16(vlan_v->tci &
2824 MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2826 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2827 MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2828 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2830 rte_be_to_cpu_16(vlan_v->tci &
2831 MLX5DV_FLOW_VLAN_VID_MASK_BE);
2833 if (vlan_m->inner_type == nic_mask.inner_type)
2834 vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2835 vlan_m->inner_type);
2840 * Validate the push VLAN action.
2843 * Pointer to the rte_eth_dev structure.
2844 * @param[in] action_flags
2845 * Holds the actions detected until now.
2846 * @param[in] item_flags
2847 * The items found in this flow rule.
2849 * Pointer to the action structure.
2851 * Pointer to flow attributes
2853 * Pointer to error structure.
2856 * 0 on success, a negative errno value otherwise and rte_errno is set.
2859 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2860 uint64_t action_flags,
2861 const struct rte_flow_item_vlan *vlan_m,
2862 const struct rte_flow_action *action,
2863 const struct rte_flow_attr *attr,
2864 struct rte_flow_error *error)
2866 const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2867 const struct mlx5_priv *priv = dev->data->dev_private;
2868 struct mlx5_dev_ctx_shared *sh = priv->sh;
2869 bool direction_error = false;
2871 if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2872 push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2873 return rte_flow_error_set(error, EINVAL,
2874 RTE_FLOW_ERROR_TYPE_ACTION, action,
2875 "invalid vlan ethertype");
2876 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2877 return rte_flow_error_set(error, EINVAL,
2878 RTE_FLOW_ERROR_TYPE_ACTION, action,
2879 "wrong action order, port_id should "
2880 "be after push VLAN");
2881 /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2882 if (attr->transfer) {
2883 bool fdb_tx = priv->representor_id != UINT16_MAX;
2884 bool is_cx5 = sh->steering_format_version ==
2885 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2887 if (!fdb_tx && is_cx5)
2888 direction_error = true;
2889 } else if (attr->ingress) {
2890 direction_error = true;
2892 if (direction_error)
2893 return rte_flow_error_set(error, ENOTSUP,
2894 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2896 "push vlan action not supported for ingress");
2897 if (!attr->transfer && priv->representor)
2898 return rte_flow_error_set(error, ENOTSUP,
2899 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2900 "push vlan action for VF representor "
2901 "not supported on NIC table");
2903 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2904 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2905 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2906 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2907 !(mlx5_flow_find_action
2908 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2909 return rte_flow_error_set(error, EINVAL,
2910 RTE_FLOW_ERROR_TYPE_ACTION, action,
2911 "not full match mask on VLAN PCP and "
2912 "there is no of_set_vlan_pcp action, "
2913 "push VLAN action cannot figure out "
2916 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2917 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2918 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2919 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2920 !(mlx5_flow_find_action
2921 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2922 return rte_flow_error_set(error, EINVAL,
2923 RTE_FLOW_ERROR_TYPE_ACTION, action,
2924 "not full match mask on VLAN VID and "
2925 "there is no of_set_vlan_vid action, "
2926 "push VLAN action cannot figure out "
2933 * Validate the set VLAN PCP.
2935 * @param[in] action_flags
2936 * Holds the actions detected until now.
2937 * @param[in] actions
2938 * Pointer to the list of actions remaining in the flow rule.
2940 * Pointer to error structure.
2943 * 0 on success, a negative errno value otherwise and rte_errno is set.
2946 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2947 const struct rte_flow_action actions[],
2948 struct rte_flow_error *error)
2950 const struct rte_flow_action *action = actions;
2951 const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2953 if (conf->vlan_pcp > 7)
2954 return rte_flow_error_set(error, EINVAL,
2955 RTE_FLOW_ERROR_TYPE_ACTION, action,
2956 "VLAN PCP value is too big");
2957 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2958 return rte_flow_error_set(error, ENOTSUP,
2959 RTE_FLOW_ERROR_TYPE_ACTION, action,
2960 "set VLAN PCP action must follow "
2961 "the push VLAN action");
2962 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2963 return rte_flow_error_set(error, ENOTSUP,
2964 RTE_FLOW_ERROR_TYPE_ACTION, action,
2965 "Multiple VLAN PCP modification are "
2967 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2968 return rte_flow_error_set(error, EINVAL,
2969 RTE_FLOW_ERROR_TYPE_ACTION, action,
2970 "wrong action order, port_id should "
2971 "be after set VLAN PCP");
2976 * Validate the set VLAN VID.
2978 * @param[in] item_flags
2979 * Holds the items detected in this rule.
2980 * @param[in] action_flags
2981 * Holds the actions detected until now.
2982 * @param[in] actions
2983 * Pointer to the list of actions remaining in the flow rule.
2985 * Pointer to error structure.
2988 * 0 on success, a negative errno value otherwise and rte_errno is set.
2991 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
2992 uint64_t action_flags,
2993 const struct rte_flow_action actions[],
2994 struct rte_flow_error *error)
2996 const struct rte_flow_action *action = actions;
2997 const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
2999 if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3000 return rte_flow_error_set(error, EINVAL,
3001 RTE_FLOW_ERROR_TYPE_ACTION, action,
3002 "VLAN VID value is too big");
3003 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3004 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3005 return rte_flow_error_set(error, ENOTSUP,
3006 RTE_FLOW_ERROR_TYPE_ACTION, action,
3007 "set VLAN VID action must follow push"
3008 " VLAN action or match on VLAN item");
3009 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3010 return rte_flow_error_set(error, ENOTSUP,
3011 RTE_FLOW_ERROR_TYPE_ACTION, action,
3012 "Multiple VLAN VID modifications are "
3014 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3015 return rte_flow_error_set(error, EINVAL,
3016 RTE_FLOW_ERROR_TYPE_ACTION, action,
3017 "wrong action order, port_id should "
3018 "be after set VLAN VID");
3023 * Validate the FLAG action.
3026 * Pointer to the rte_eth_dev structure.
3027 * @param[in] action_flags
3028 * Holds the actions detected until now.
3030 * Pointer to flow attributes
3032 * Pointer to error structure.
3035 * 0 on success, a negative errno value otherwise and rte_errno is set.
3038 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3039 uint64_t action_flags,
3040 const struct rte_flow_attr *attr,
3041 struct rte_flow_error *error)
3043 struct mlx5_priv *priv = dev->data->dev_private;
3044 struct mlx5_dev_config *config = &priv->config;
3047 /* Fall back if no extended metadata register support. */
3048 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3049 return mlx5_flow_validate_action_flag(action_flags, attr,
3051 /* Extensive metadata mode requires registers. */
3052 if (!mlx5_flow_ext_mreg_supported(dev))
3053 return rte_flow_error_set(error, ENOTSUP,
3054 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3055 "no metadata registers "
3056 "to support flag action");
3057 if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3058 return rte_flow_error_set(error, ENOTSUP,
3059 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3060 "extended metadata register"
3061 " isn't available");
3062 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3065 MLX5_ASSERT(ret > 0);
3066 if (action_flags & MLX5_FLOW_ACTION_MARK)
3067 return rte_flow_error_set(error, EINVAL,
3068 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3069 "can't mark and flag in same flow");
3070 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3071 return rte_flow_error_set(error, EINVAL,
3072 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3074 " actions in same flow");
3079 * Validate MARK action.
3082 * Pointer to the rte_eth_dev structure.
3084 * Pointer to action.
3085 * @param[in] action_flags
3086 * Holds the actions detected until now.
3088 * Pointer to flow attributes
3090 * Pointer to error structure.
3093 * 0 on success, a negative errno value otherwise and rte_errno is set.
3096 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3097 const struct rte_flow_action *action,
3098 uint64_t action_flags,
3099 const struct rte_flow_attr *attr,
3100 struct rte_flow_error *error)
3102 struct mlx5_priv *priv = dev->data->dev_private;
3103 struct mlx5_dev_config *config = &priv->config;
3104 const struct rte_flow_action_mark *mark = action->conf;
3107 if (is_tunnel_offload_active(dev))
3108 return rte_flow_error_set(error, ENOTSUP,
3109 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3111 "if tunnel offload active");
3112 /* Fall back if no extended metadata register support. */
3113 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3114 return mlx5_flow_validate_action_mark(action, action_flags,
3116 /* Extensive metadata mode requires registers. */
3117 if (!mlx5_flow_ext_mreg_supported(dev))
3118 return rte_flow_error_set(error, ENOTSUP,
3119 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3120 "no metadata registers "
3121 "to support mark action");
3122 if (!priv->sh->dv_mark_mask)
3123 return rte_flow_error_set(error, ENOTSUP,
3124 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3125 "extended metadata register"
3126 " isn't available");
3127 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3130 MLX5_ASSERT(ret > 0);
3132 return rte_flow_error_set(error, EINVAL,
3133 RTE_FLOW_ERROR_TYPE_ACTION, action,
3134 "configuration cannot be null");
3135 if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3136 return rte_flow_error_set(error, EINVAL,
3137 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3139 "mark id exceeds the limit");
3140 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3141 return rte_flow_error_set(error, EINVAL,
3142 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3143 "can't flag and mark in same flow");
3144 if (action_flags & MLX5_FLOW_ACTION_MARK)
3145 return rte_flow_error_set(error, EINVAL,
3146 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3147 "can't have 2 mark actions in same"
3153 * Validate SET_META action.
3156 * Pointer to the rte_eth_dev structure.
3158 * Pointer to the action structure.
3159 * @param[in] action_flags
3160 * Holds the actions detected until now.
3162 * Pointer to flow attributes
3164 * Pointer to error structure.
3167 * 0 on success, a negative errno value otherwise and rte_errno is set.
3170 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3171 const struct rte_flow_action *action,
3172 uint64_t action_flags __rte_unused,
3173 const struct rte_flow_attr *attr,
3174 struct rte_flow_error *error)
3176 struct mlx5_priv *priv = dev->data->dev_private;
3177 struct mlx5_dev_config *config = &priv->config;
3178 const struct rte_flow_action_set_meta *conf;
3179 uint32_t nic_mask = UINT32_MAX;
3182 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
3183 !mlx5_flow_ext_mreg_supported(dev))
3184 return rte_flow_error_set(error, ENOTSUP,
3185 RTE_FLOW_ERROR_TYPE_ACTION, action,
3186 "extended metadata register"
3187 " isn't supported");
3188 reg = flow_dv_get_metadata_reg(dev, attr, error);
3192 return rte_flow_error_set(error, ENOTSUP,
3193 RTE_FLOW_ERROR_TYPE_ACTION, action,
3194 "unavailable extended metadata register");
3195 if (reg != REG_A && reg != REG_B) {
3196 struct mlx5_priv *priv = dev->data->dev_private;
3198 nic_mask = priv->sh->dv_meta_mask;
3200 if (!(action->conf))
3201 return rte_flow_error_set(error, EINVAL,
3202 RTE_FLOW_ERROR_TYPE_ACTION, action,
3203 "configuration cannot be null");
3204 conf = (const struct rte_flow_action_set_meta *)action->conf;
3206 return rte_flow_error_set(error, EINVAL,
3207 RTE_FLOW_ERROR_TYPE_ACTION, action,
3208 "zero mask doesn't have any effect");
3209 if (conf->mask & ~nic_mask)
3210 return rte_flow_error_set(error, EINVAL,
3211 RTE_FLOW_ERROR_TYPE_ACTION, action,
3212 "meta data must be within reg C0");
3217 * Validate SET_TAG action.
3220 * Pointer to the rte_eth_dev structure.
3222 * Pointer to the action structure.
3223 * @param[in] action_flags
3224 * Holds the actions detected until now.
3226 * Pointer to flow attributes
3228 * Pointer to error structure.
3231 * 0 on success, a negative errno value otherwise and rte_errno is set.
3234 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3235 const struct rte_flow_action *action,
3236 uint64_t action_flags,
3237 const struct rte_flow_attr *attr,
3238 struct rte_flow_error *error)
3240 const struct rte_flow_action_set_tag *conf;
3241 const uint64_t terminal_action_flags =
3242 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3243 MLX5_FLOW_ACTION_RSS;
3246 if (!mlx5_flow_ext_mreg_supported(dev))
3247 return rte_flow_error_set(error, ENOTSUP,
3248 RTE_FLOW_ERROR_TYPE_ACTION, action,
3249 "extensive metadata register"
3250 " isn't supported");
3251 if (!(action->conf))
3252 return rte_flow_error_set(error, EINVAL,
3253 RTE_FLOW_ERROR_TYPE_ACTION, action,
3254 "configuration cannot be null");
3255 conf = (const struct rte_flow_action_set_tag *)action->conf;
3257 return rte_flow_error_set(error, EINVAL,
3258 RTE_FLOW_ERROR_TYPE_ACTION, action,
3259 "zero mask doesn't have any effect");
3260 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3263 if (!attr->transfer && attr->ingress &&
3264 (action_flags & terminal_action_flags))
3265 return rte_flow_error_set(error, EINVAL,
3266 RTE_FLOW_ERROR_TYPE_ACTION, action,
3267 "set_tag has no effect"
3268 " with terminal actions");
3273 * Validate count action.
3276 * Pointer to rte_eth_dev structure.
3278 * Indicator if action is shared.
3279 * @param[in] action_flags
3280 * Holds the actions detected until now.
3282 * Pointer to error structure.
3285 * 0 on success, a negative errno value otherwise and rte_errno is set.
3288 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3289 uint64_t action_flags,
3290 struct rte_flow_error *error)
3292 struct mlx5_priv *priv = dev->data->dev_private;
3294 if (!priv->sh->devx)
3296 if (action_flags & MLX5_FLOW_ACTION_COUNT)
3297 return rte_flow_error_set(error, EINVAL,
3298 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3299 "duplicate count actions set");
3300 if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3301 !priv->sh->flow_hit_aso_en)
3302 return rte_flow_error_set(error, EINVAL,
3303 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3304 "old age and shared count combination is not supported");
3305 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3309 return rte_flow_error_set
3311 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3313 "count action not supported");
3317 * Validate the L2 encap action.
3320 * Pointer to the rte_eth_dev structure.
3321 * @param[in] action_flags
3322 * Holds the actions detected until now.
3324 * Pointer to the action structure.
3326 * Pointer to flow attributes.
3328 * Pointer to error structure.
3331 * 0 on success, a negative errno value otherwise and rte_errno is set.
3334 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3335 uint64_t action_flags,
3336 const struct rte_flow_action *action,
3337 const struct rte_flow_attr *attr,
3338 struct rte_flow_error *error)
3340 const struct mlx5_priv *priv = dev->data->dev_private;
3342 if (!(action->conf))
3343 return rte_flow_error_set(error, EINVAL,
3344 RTE_FLOW_ERROR_TYPE_ACTION, action,
3345 "configuration cannot be null");
3346 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3347 return rte_flow_error_set(error, EINVAL,
3348 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3349 "can only have a single encap action "
3351 if (!attr->transfer && priv->representor)
3352 return rte_flow_error_set(error, ENOTSUP,
3353 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3354 "encap action for VF representor "
3355 "not supported on NIC table");
3360 * Validate a decap action.
3363 * Pointer to the rte_eth_dev structure.
3364 * @param[in] action_flags
3365 * Holds the actions detected until now.
3367 * Pointer to the action structure.
3368 * @param[in] item_flags
3369 * Holds the items detected.
3371 * Pointer to flow attributes
3373 * Pointer to error structure.
3376 * 0 on success, a negative errno value otherwise and rte_errno is set.
3379 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3380 uint64_t action_flags,
3381 const struct rte_flow_action *action,
3382 const uint64_t item_flags,
3383 const struct rte_flow_attr *attr,
3384 struct rte_flow_error *error)
3386 const struct mlx5_priv *priv = dev->data->dev_private;
3388 if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3389 !priv->config.decap_en)
3390 return rte_flow_error_set(error, ENOTSUP,
3391 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3392 "decap is not enabled");
3393 if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3394 return rte_flow_error_set(error, ENOTSUP,
3395 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3397 MLX5_FLOW_ACTION_DECAP ? "can only "
3398 "have a single decap action" : "decap "
3399 "after encap is not supported");
3400 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3401 return rte_flow_error_set(error, EINVAL,
3402 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3403 "can't have decap action after"
3406 return rte_flow_error_set(error, ENOTSUP,
3407 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3409 "decap action not supported for "
3411 if (!attr->transfer && priv->representor)
3412 return rte_flow_error_set(error, ENOTSUP,
3413 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3414 "decap action for VF representor "
3415 "not supported on NIC table");
3416 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3417 !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3418 return rte_flow_error_set(error, ENOTSUP,
3419 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3420 "VXLAN item should be present for VXLAN decap");
3424 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3427 * Validate the raw encap and decap actions.
3430 * Pointer to the rte_eth_dev structure.
3432 * Pointer to the decap action.
3434 * Pointer to the encap action.
3436 * Pointer to flow attributes
3437 * @param[in/out] action_flags
3438 * Holds the actions detected until now.
3439 * @param[out] actions_n
3440 * pointer to the number of actions counter.
3442 * Pointer to the action structure.
3443 * @param[in] item_flags
3444 * Holds the items detected.
3446 * Pointer to error structure.
3449 * 0 on success, a negative errno value otherwise and rte_errno is set.
3452 flow_dv_validate_action_raw_encap_decap
3453 (struct rte_eth_dev *dev,
3454 const struct rte_flow_action_raw_decap *decap,
3455 const struct rte_flow_action_raw_encap *encap,
3456 const struct rte_flow_attr *attr, uint64_t *action_flags,
3457 int *actions_n, const struct rte_flow_action *action,
3458 uint64_t item_flags, struct rte_flow_error *error)
3460 const struct mlx5_priv *priv = dev->data->dev_private;
3463 if (encap && (!encap->size || !encap->data))
3464 return rte_flow_error_set(error, EINVAL,
3465 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3466 "raw encap data cannot be empty");
3467 if (decap && encap) {
3468 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3469 encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3472 else if (encap->size <=
3473 MLX5_ENCAPSULATION_DECISION_SIZE &&
3475 MLX5_ENCAPSULATION_DECISION_SIZE)
3478 else if (encap->size >
3479 MLX5_ENCAPSULATION_DECISION_SIZE &&
3481 MLX5_ENCAPSULATION_DECISION_SIZE)
3482 /* 2 L2 actions: encap and decap. */
3485 return rte_flow_error_set(error,
3487 RTE_FLOW_ERROR_TYPE_ACTION,
3488 NULL, "unsupported too small "
3489 "raw decap and too small raw "
3490 "encap combination");
3493 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3494 item_flags, attr, error);
3497 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3501 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3502 return rte_flow_error_set(error, ENOTSUP,
3503 RTE_FLOW_ERROR_TYPE_ACTION,
3505 "small raw encap size");
3506 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3507 return rte_flow_error_set(error, EINVAL,
3508 RTE_FLOW_ERROR_TYPE_ACTION,
3510 "more than one encap action");
3511 if (!attr->transfer && priv->representor)
3512 return rte_flow_error_set
3514 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3515 "encap action for VF representor "
3516 "not supported on NIC table");
3517 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3524 * Validate the ASO CT action.
3527 * Pointer to the rte_eth_dev structure.
3528 * @param[in] action_flags
3529 * Holds the actions detected until now.
3530 * @param[in] item_flags
3531 * The items found in this flow rule.
3533 * Pointer to flow attributes.
3535 * Pointer to error structure.
3538 * 0 on success, a negative errno value otherwise and rte_errno is set.
3541 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3542 uint64_t action_flags,
3543 uint64_t item_flags,
3544 const struct rte_flow_attr *attr,
3545 struct rte_flow_error *error)
3549 if (attr->group == 0 && !attr->transfer)
3550 return rte_flow_error_set(error, ENOTSUP,
3551 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3553 "Only support non-root table");
3554 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3555 return rte_flow_error_set(error, ENOTSUP,
3556 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3557 "CT cannot follow a fate action");
3558 if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3559 (action_flags & MLX5_FLOW_ACTION_AGE))
3560 return rte_flow_error_set(error, EINVAL,
3561 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3562 "Only one ASO action is supported");
3563 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3564 return rte_flow_error_set(error, EINVAL,
3565 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3566 "Encap cannot exist before CT");
3567 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3568 return rte_flow_error_set(error, EINVAL,
3569 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3570 "Not a outer TCP packet");
3575 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3576 struct mlx5_list_entry *entry, void *cb_ctx)
3578 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3579 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3580 struct mlx5_flow_dv_encap_decap_resource *resource;
3582 resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3584 if (resource->reformat_type == ctx_resource->reformat_type &&
3585 resource->ft_type == ctx_resource->ft_type &&
3586 resource->flags == ctx_resource->flags &&
3587 resource->size == ctx_resource->size &&
3588 !memcmp((const void *)resource->buf,
3589 (const void *)ctx_resource->buf,
3595 struct mlx5_list_entry *
3596 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3598 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3599 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3600 struct mlx5dv_dr_domain *domain;
3601 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3602 struct mlx5_flow_dv_encap_decap_resource *resource;
3606 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3607 domain = sh->fdb_domain;
3608 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3609 domain = sh->rx_domain;
3611 domain = sh->tx_domain;
3612 /* Register new encap/decap resource. */
3613 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3615 rte_flow_error_set(ctx->error, ENOMEM,
3616 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3617 "cannot allocate resource memory");
3620 *resource = *ctx_resource;
3621 resource->idx = idx;
3622 ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->cdev->ctx,
3626 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3627 rte_flow_error_set(ctx->error, ENOMEM,
3628 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3629 NULL, "cannot create action");
3633 return &resource->entry;
3636 struct mlx5_list_entry *
3637 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3640 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3641 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3642 struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3645 cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3647 if (!cache_resource) {
3648 rte_flow_error_set(ctx->error, ENOMEM,
3649 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3650 "cannot allocate resource memory");
3653 memcpy(cache_resource, oentry, sizeof(*cache_resource));
3654 cache_resource->idx = idx;
3655 return &cache_resource->entry;
3659 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3661 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3662 struct mlx5_flow_dv_encap_decap_resource *res =
3663 container_of(entry, typeof(*res), entry);
3665 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3669 * Find existing encap/decap resource or create and register a new one.
3671 * @param[in, out] dev
3672 * Pointer to rte_eth_dev structure.
3673 * @param[in, out] resource
3674 * Pointer to encap/decap resource.
3675 * @parm[in, out] dev_flow
3676 * Pointer to the dev_flow.
3678 * pointer to error structure.
3681 * 0 on success otherwise -errno and errno is set.
3684 flow_dv_encap_decap_resource_register
3685 (struct rte_eth_dev *dev,
3686 struct mlx5_flow_dv_encap_decap_resource *resource,
3687 struct mlx5_flow *dev_flow,
3688 struct rte_flow_error *error)
3690 struct mlx5_priv *priv = dev->data->dev_private;
3691 struct mlx5_dev_ctx_shared *sh = priv->sh;
3692 struct mlx5_list_entry *entry;
3696 uint32_t refmt_type:8;
3698 * Header reformat actions can be shared between
3699 * non-root tables. One bit to indicate non-root
3703 uint32_t reserve:15;
3706 } encap_decap_key = {
3708 .ft_type = resource->ft_type,
3709 .refmt_type = resource->reformat_type,
3710 .is_root = !!dev_flow->dv.group,
3714 struct mlx5_flow_cb_ctx ctx = {
3718 struct mlx5_hlist *encaps_decaps;
3721 encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3723 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3725 flow_dv_encap_decap_create_cb,
3726 flow_dv_encap_decap_match_cb,
3727 flow_dv_encap_decap_remove_cb,
3728 flow_dv_encap_decap_clone_cb,
3729 flow_dv_encap_decap_clone_free_cb);
3730 if (unlikely(!encaps_decaps))
3732 resource->flags = dev_flow->dv.group ? 0 : 1;
3733 key64 = __rte_raw_cksum(&encap_decap_key.v32,
3734 sizeof(encap_decap_key.v32), 0);
3735 if (resource->reformat_type !=
3736 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3738 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3739 entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3742 resource = container_of(entry, typeof(*resource), entry);
3743 dev_flow->dv.encap_decap = resource;
3744 dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3749 * Find existing table jump resource or create and register a new one.
3751 * @param[in, out] dev
3752 * Pointer to rte_eth_dev structure.
3753 * @param[in, out] tbl
3754 * Pointer to flow table resource.
3755 * @parm[in, out] dev_flow
3756 * Pointer to the dev_flow.
3758 * pointer to error structure.
3761 * 0 on success otherwise -errno and errno is set.
3764 flow_dv_jump_tbl_resource_register
3765 (struct rte_eth_dev *dev __rte_unused,
3766 struct mlx5_flow_tbl_resource *tbl,
3767 struct mlx5_flow *dev_flow,
3768 struct rte_flow_error *error __rte_unused)
3770 struct mlx5_flow_tbl_data_entry *tbl_data =
3771 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3774 MLX5_ASSERT(tbl_data->jump.action);
3775 dev_flow->handle->rix_jump = tbl_data->idx;
3776 dev_flow->dv.jump = &tbl_data->jump;
3781 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3782 struct mlx5_list_entry *entry, void *cb_ctx)
3784 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3785 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3786 struct mlx5_flow_dv_port_id_action_resource *res =
3787 container_of(entry, typeof(*res), entry);
3789 return ref->port_id != res->port_id;
3792 struct mlx5_list_entry *
3793 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3795 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3796 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3797 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3798 struct mlx5_flow_dv_port_id_action_resource *resource;
3802 /* Register new port id action resource. */
3803 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3805 rte_flow_error_set(ctx->error, ENOMEM,
3806 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3807 "cannot allocate port_id action memory");
3811 ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3815 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3816 rte_flow_error_set(ctx->error, ENOMEM,
3817 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3818 "cannot create action");
3821 resource->idx = idx;
3822 return &resource->entry;
3825 struct mlx5_list_entry *
3826 flow_dv_port_id_clone_cb(void *tool_ctx,
3827 struct mlx5_list_entry *entry __rte_unused,
3830 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3831 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3832 struct mlx5_flow_dv_port_id_action_resource *resource;
3835 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3837 rte_flow_error_set(ctx->error, ENOMEM,
3838 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3839 "cannot allocate port_id action memory");
3842 memcpy(resource, entry, sizeof(*resource));
3843 resource->idx = idx;
3844 return &resource->entry;
3848 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3850 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3851 struct mlx5_flow_dv_port_id_action_resource *resource =
3852 container_of(entry, typeof(*resource), entry);
3854 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3858 * Find existing table port ID resource or create and register a new one.
3860 * @param[in, out] dev
3861 * Pointer to rte_eth_dev structure.
3862 * @param[in, out] ref
3863 * Pointer to port ID action resource reference.
3864 * @parm[in, out] dev_flow
3865 * Pointer to the dev_flow.
3867 * pointer to error structure.
3870 * 0 on success otherwise -errno and errno is set.
3873 flow_dv_port_id_action_resource_register
3874 (struct rte_eth_dev *dev,
3875 struct mlx5_flow_dv_port_id_action_resource *ref,
3876 struct mlx5_flow *dev_flow,
3877 struct rte_flow_error *error)
3879 struct mlx5_priv *priv = dev->data->dev_private;
3880 struct mlx5_list_entry *entry;
3881 struct mlx5_flow_dv_port_id_action_resource *resource;
3882 struct mlx5_flow_cb_ctx ctx = {
3887 entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3890 resource = container_of(entry, typeof(*resource), entry);
3891 dev_flow->dv.port_id_action = resource;
3892 dev_flow->handle->rix_port_id_action = resource->idx;
3897 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3898 struct mlx5_list_entry *entry, void *cb_ctx)
3900 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3901 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3902 struct mlx5_flow_dv_push_vlan_action_resource *res =
3903 container_of(entry, typeof(*res), entry);
3905 return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3908 struct mlx5_list_entry *
3909 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3911 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3912 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3913 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3914 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3915 struct mlx5dv_dr_domain *domain;
3919 /* Register new port id action resource. */
3920 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3922 rte_flow_error_set(ctx->error, ENOMEM,
3923 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3924 "cannot allocate push_vlan action memory");
3928 if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3929 domain = sh->fdb_domain;
3930 else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3931 domain = sh->rx_domain;
3933 domain = sh->tx_domain;
3934 ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3937 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3938 rte_flow_error_set(ctx->error, ENOMEM,
3939 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3940 "cannot create push vlan action");
3943 resource->idx = idx;
3944 return &resource->entry;
3947 struct mlx5_list_entry *
3948 flow_dv_push_vlan_clone_cb(void *tool_ctx,
3949 struct mlx5_list_entry *entry __rte_unused,
3952 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3953 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3954 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3957 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3959 rte_flow_error_set(ctx->error, ENOMEM,
3960 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3961 "cannot allocate push_vlan action memory");
3964 memcpy(resource, entry, sizeof(*resource));
3965 resource->idx = idx;
3966 return &resource->entry;
3970 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3972 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3973 struct mlx5_flow_dv_push_vlan_action_resource *resource =
3974 container_of(entry, typeof(*resource), entry);
3976 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
3980 * Find existing push vlan resource or create and register a new one.
3982 * @param [in, out] dev
3983 * Pointer to rte_eth_dev structure.
3984 * @param[in, out] ref
3985 * Pointer to port ID action resource reference.
3986 * @parm[in, out] dev_flow
3987 * Pointer to the dev_flow.
3989 * pointer to error structure.
3992 * 0 on success otherwise -errno and errno is set.
3995 flow_dv_push_vlan_action_resource_register
3996 (struct rte_eth_dev *dev,
3997 struct mlx5_flow_dv_push_vlan_action_resource *ref,
3998 struct mlx5_flow *dev_flow,
3999 struct rte_flow_error *error)
4001 struct mlx5_priv *priv = dev->data->dev_private;
4002 struct mlx5_flow_dv_push_vlan_action_resource *resource;
4003 struct mlx5_list_entry *entry;
4004 struct mlx5_flow_cb_ctx ctx = {
4009 entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4012 resource = container_of(entry, typeof(*resource), entry);
4014 dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4015 dev_flow->dv.push_vlan_res = resource;
4020 * Get the size of specific rte_flow_item_type hdr size
4022 * @param[in] item_type
4023 * Tested rte_flow_item_type.
4026 * sizeof struct item_type, 0 if void or irrelevant.
4029 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4033 switch (item_type) {
4034 case RTE_FLOW_ITEM_TYPE_ETH:
4035 retval = sizeof(struct rte_ether_hdr);
4037 case RTE_FLOW_ITEM_TYPE_VLAN:
4038 retval = sizeof(struct rte_vlan_hdr);
4040 case RTE_FLOW_ITEM_TYPE_IPV4:
4041 retval = sizeof(struct rte_ipv4_hdr);
4043 case RTE_FLOW_ITEM_TYPE_IPV6:
4044 retval = sizeof(struct rte_ipv6_hdr);
4046 case RTE_FLOW_ITEM_TYPE_UDP:
4047 retval = sizeof(struct rte_udp_hdr);
4049 case RTE_FLOW_ITEM_TYPE_TCP:
4050 retval = sizeof(struct rte_tcp_hdr);
4052 case RTE_FLOW_ITEM_TYPE_VXLAN:
4053 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4054 retval = sizeof(struct rte_vxlan_hdr);
4056 case RTE_FLOW_ITEM_TYPE_GRE:
4057 case RTE_FLOW_ITEM_TYPE_NVGRE:
4058 retval = sizeof(struct rte_gre_hdr);
4060 case RTE_FLOW_ITEM_TYPE_MPLS:
4061 retval = sizeof(struct rte_mpls_hdr);
4063 case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4071 #define MLX5_ENCAP_IPV4_VERSION 0x40
4072 #define MLX5_ENCAP_IPV4_IHL_MIN 0x05
4073 #define MLX5_ENCAP_IPV4_TTL_DEF 0x40
4074 #define MLX5_ENCAP_IPV6_VTC_FLOW 0x60000000
4075 #define MLX5_ENCAP_IPV6_HOP_LIMIT 0xff
4076 #define MLX5_ENCAP_VXLAN_FLAGS 0x08000000
4077 #define MLX5_ENCAP_VXLAN_GPE_FLAGS 0x04
4080 * Convert the encap action data from list of rte_flow_item to raw buffer
4083 * Pointer to rte_flow_item objects list.
4085 * Pointer to the output buffer.
4087 * Pointer to the output buffer size.
4089 * Pointer to the error structure.
4092 * 0 on success, a negative errno value otherwise and rte_errno is set.
4095 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4096 size_t *size, struct rte_flow_error *error)
4098 struct rte_ether_hdr *eth = NULL;
4099 struct rte_vlan_hdr *vlan = NULL;
4100 struct rte_ipv4_hdr *ipv4 = NULL;
4101 struct rte_ipv6_hdr *ipv6 = NULL;
4102 struct rte_udp_hdr *udp = NULL;
4103 struct rte_vxlan_hdr *vxlan = NULL;
4104 struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4105 struct rte_gre_hdr *gre = NULL;
4107 size_t temp_size = 0;
4110 return rte_flow_error_set(error, EINVAL,
4111 RTE_FLOW_ERROR_TYPE_ACTION,
4112 NULL, "invalid empty data");
4113 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4114 len = flow_dv_get_item_hdr_len(items->type);
4115 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4116 return rte_flow_error_set(error, EINVAL,
4117 RTE_FLOW_ERROR_TYPE_ACTION,
4118 (void *)items->type,
4119 "items total size is too big"
4120 " for encap action");
4121 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4122 switch (items->type) {
4123 case RTE_FLOW_ITEM_TYPE_ETH:
4124 eth = (struct rte_ether_hdr *)&buf[temp_size];
4126 case RTE_FLOW_ITEM_TYPE_VLAN:
4127 vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4129 return rte_flow_error_set(error, EINVAL,
4130 RTE_FLOW_ERROR_TYPE_ACTION,
4131 (void *)items->type,
4132 "eth header not found");
4133 if (!eth->ether_type)
4134 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4136 case RTE_FLOW_ITEM_TYPE_IPV4:
4137 ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4139 return rte_flow_error_set(error, EINVAL,
4140 RTE_FLOW_ERROR_TYPE_ACTION,
4141 (void *)items->type,
4142 "neither eth nor vlan"
4144 if (vlan && !vlan->eth_proto)
4145 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4146 else if (eth && !eth->ether_type)
4147 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4148 if (!ipv4->version_ihl)
4149 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4150 MLX5_ENCAP_IPV4_IHL_MIN;
4151 if (!ipv4->time_to_live)
4152 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4154 case RTE_FLOW_ITEM_TYPE_IPV6:
4155 ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4157 return rte_flow_error_set(error, EINVAL,
4158 RTE_FLOW_ERROR_TYPE_ACTION,
4159 (void *)items->type,
4160 "neither eth nor vlan"
4162 if (vlan && !vlan->eth_proto)
4163 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4164 else if (eth && !eth->ether_type)
4165 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4166 if (!ipv6->vtc_flow)
4168 RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4169 if (!ipv6->hop_limits)
4170 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4172 case RTE_FLOW_ITEM_TYPE_UDP:
4173 udp = (struct rte_udp_hdr *)&buf[temp_size];
4175 return rte_flow_error_set(error, EINVAL,
4176 RTE_FLOW_ERROR_TYPE_ACTION,
4177 (void *)items->type,
4178 "ip header not found");
4179 if (ipv4 && !ipv4->next_proto_id)
4180 ipv4->next_proto_id = IPPROTO_UDP;
4181 else if (ipv6 && !ipv6->proto)
4182 ipv6->proto = IPPROTO_UDP;
4184 case RTE_FLOW_ITEM_TYPE_VXLAN:
4185 vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4187 return rte_flow_error_set(error, EINVAL,
4188 RTE_FLOW_ERROR_TYPE_ACTION,
4189 (void *)items->type,
4190 "udp header not found");
4192 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4193 if (!vxlan->vx_flags)
4195 RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4197 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4198 vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4200 return rte_flow_error_set(error, EINVAL,
4201 RTE_FLOW_ERROR_TYPE_ACTION,
4202 (void *)items->type,
4203 "udp header not found");
4204 if (!vxlan_gpe->proto)
4205 return rte_flow_error_set(error, EINVAL,
4206 RTE_FLOW_ERROR_TYPE_ACTION,
4207 (void *)items->type,
4208 "next protocol not found");
4211 RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4212 if (!vxlan_gpe->vx_flags)
4213 vxlan_gpe->vx_flags =
4214 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4216 case RTE_FLOW_ITEM_TYPE_GRE:
4217 case RTE_FLOW_ITEM_TYPE_NVGRE:
4218 gre = (struct rte_gre_hdr *)&buf[temp_size];
4220 return rte_flow_error_set(error, EINVAL,
4221 RTE_FLOW_ERROR_TYPE_ACTION,
4222 (void *)items->type,
4223 "next protocol not found");
4225 return rte_flow_error_set(error, EINVAL,
4226 RTE_FLOW_ERROR_TYPE_ACTION,
4227 (void *)items->type,
4228 "ip header not found");
4229 if (ipv4 && !ipv4->next_proto_id)
4230 ipv4->next_proto_id = IPPROTO_GRE;
4231 else if (ipv6 && !ipv6->proto)
4232 ipv6->proto = IPPROTO_GRE;
4234 case RTE_FLOW_ITEM_TYPE_VOID:
4237 return rte_flow_error_set(error, EINVAL,
4238 RTE_FLOW_ERROR_TYPE_ACTION,
4239 (void *)items->type,
4240 "unsupported item type");
4250 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4252 struct rte_ether_hdr *eth = NULL;
4253 struct rte_vlan_hdr *vlan = NULL;
4254 struct rte_ipv6_hdr *ipv6 = NULL;
4255 struct rte_udp_hdr *udp = NULL;
4259 eth = (struct rte_ether_hdr *)data;
4260 next_hdr = (char *)(eth + 1);
4261 proto = RTE_BE16(eth->ether_type);
4264 while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4265 vlan = (struct rte_vlan_hdr *)next_hdr;
4266 proto = RTE_BE16(vlan->eth_proto);
4267 next_hdr += sizeof(struct rte_vlan_hdr);
4270 /* HW calculates IPv4 csum. no need to proceed */
4271 if (proto == RTE_ETHER_TYPE_IPV4)
4274 /* non IPv4/IPv6 header. not supported */
4275 if (proto != RTE_ETHER_TYPE_IPV6) {
4276 return rte_flow_error_set(error, ENOTSUP,
4277 RTE_FLOW_ERROR_TYPE_ACTION,
4278 NULL, "Cannot offload non IPv4/IPv6");
4281 ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4283 /* ignore non UDP */
4284 if (ipv6->proto != IPPROTO_UDP)
4287 udp = (struct rte_udp_hdr *)(ipv6 + 1);
4288 udp->dgram_cksum = 0;
4294 * Convert L2 encap action to DV specification.
4297 * Pointer to rte_eth_dev structure.
4299 * Pointer to action structure.
4300 * @param[in, out] dev_flow
4301 * Pointer to the mlx5_flow.
4302 * @param[in] transfer
4303 * Mark if the flow is E-Switch flow.
4305 * Pointer to the error structure.
4308 * 0 on success, a negative errno value otherwise and rte_errno is set.
4311 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4312 const struct rte_flow_action *action,
4313 struct mlx5_flow *dev_flow,
4315 struct rte_flow_error *error)
4317 const struct rte_flow_item *encap_data;
4318 const struct rte_flow_action_raw_encap *raw_encap_data;
4319 struct mlx5_flow_dv_encap_decap_resource res = {
4321 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4322 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4323 MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4326 if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4328 (const struct rte_flow_action_raw_encap *)action->conf;
4329 res.size = raw_encap_data->size;
4330 memcpy(res.buf, raw_encap_data->data, res.size);
4332 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4334 ((const struct rte_flow_action_vxlan_encap *)
4335 action->conf)->definition;
4338 ((const struct rte_flow_action_nvgre_encap *)
4339 action->conf)->definition;
4340 if (flow_dv_convert_encap_data(encap_data, res.buf,
4344 if (flow_dv_zero_encap_udp_csum(res.buf, error))
4346 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4347 return rte_flow_error_set(error, EINVAL,
4348 RTE_FLOW_ERROR_TYPE_ACTION,
4349 NULL, "can't create L2 encap action");
4354 * Convert L2 decap action to DV specification.
4357 * Pointer to rte_eth_dev structure.
4358 * @param[in, out] dev_flow
4359 * Pointer to the mlx5_flow.
4360 * @param[in] transfer
4361 * Mark if the flow is E-Switch flow.
4363 * Pointer to the error structure.
4366 * 0 on success, a negative errno value otherwise and rte_errno is set.
4369 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4370 struct mlx5_flow *dev_flow,
4372 struct rte_flow_error *error)
4374 struct mlx5_flow_dv_encap_decap_resource res = {
4377 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4378 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4379 MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4382 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4383 return rte_flow_error_set(error, EINVAL,
4384 RTE_FLOW_ERROR_TYPE_ACTION,
4385 NULL, "can't create L2 decap action");
4390 * Convert raw decap/encap (L3 tunnel) action to DV specification.
4393 * Pointer to rte_eth_dev structure.
4395 * Pointer to action structure.
4396 * @param[in, out] dev_flow
4397 * Pointer to the mlx5_flow.
4399 * Pointer to the flow attributes.
4401 * Pointer to the error structure.
4404 * 0 on success, a negative errno value otherwise and rte_errno is set.
4407 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4408 const struct rte_flow_action *action,
4409 struct mlx5_flow *dev_flow,
4410 const struct rte_flow_attr *attr,
4411 struct rte_flow_error *error)
4413 const struct rte_flow_action_raw_encap *encap_data;
4414 struct mlx5_flow_dv_encap_decap_resource res;
4416 memset(&res, 0, sizeof(res));
4417 encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4418 res.size = encap_data->size;
4419 memcpy(res.buf, encap_data->data, res.size);
4420 res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4421 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4422 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4424 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4426 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4427 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4428 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4429 return rte_flow_error_set(error, EINVAL,
4430 RTE_FLOW_ERROR_TYPE_ACTION,
4431 NULL, "can't create encap action");
4436 * Create action push VLAN.
4439 * Pointer to rte_eth_dev structure.
4441 * Pointer to the flow attributes.
4443 * Pointer to the vlan to push to the Ethernet header.
4444 * @param[in, out] dev_flow
4445 * Pointer to the mlx5_flow.
4447 * Pointer to the error structure.
4450 * 0 on success, a negative errno value otherwise and rte_errno is set.
4453 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4454 const struct rte_flow_attr *attr,
4455 const struct rte_vlan_hdr *vlan,
4456 struct mlx5_flow *dev_flow,
4457 struct rte_flow_error *error)
4459 struct mlx5_flow_dv_push_vlan_action_resource res;
4461 memset(&res, 0, sizeof(res));
4463 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4466 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4468 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4469 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4470 return flow_dv_push_vlan_action_resource_register
4471 (dev, &res, dev_flow, error);
4475 * Validate the modify-header actions.
4477 * @param[in] action_flags
4478 * Holds the actions detected until now.
4480 * Pointer to the modify action.
4482 * Pointer to error structure.
4485 * 0 on success, a negative errno value otherwise and rte_errno is set.
4488 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4489 const struct rte_flow_action *action,
4490 struct rte_flow_error *error)
4492 if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4493 return rte_flow_error_set(error, EINVAL,
4494 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4495 NULL, "action configuration not set");
4496 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4497 return rte_flow_error_set(error, EINVAL,
4498 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4499 "can't have encap action before"
4505 * Validate the modify-header MAC address actions.
4507 * @param[in] action_flags
4508 * Holds the actions detected until now.
4510 * Pointer to the modify action.
4511 * @param[in] item_flags
4512 * Holds the items detected.
4514 * Pointer to error structure.
4517 * 0 on success, a negative errno value otherwise and rte_errno is set.
4520 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4521 const struct rte_flow_action *action,
4522 const uint64_t item_flags,
4523 struct rte_flow_error *error)
4527 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4529 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4530 return rte_flow_error_set(error, EINVAL,
4531 RTE_FLOW_ERROR_TYPE_ACTION,
4533 "no L2 item in pattern");
4539 * Validate the modify-header IPv4 address actions.
4541 * @param[in] action_flags
4542 * Holds the actions detected until now.
4544 * Pointer to the modify action.
4545 * @param[in] item_flags
4546 * Holds the items detected.
4548 * Pointer to error structure.
4551 * 0 on success, a negative errno value otherwise and rte_errno is set.
4554 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4555 const struct rte_flow_action *action,
4556 const uint64_t item_flags,
4557 struct rte_flow_error *error)
4562 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4564 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4565 MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4566 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4567 if (!(item_flags & layer))
4568 return rte_flow_error_set(error, EINVAL,
4569 RTE_FLOW_ERROR_TYPE_ACTION,
4571 "no ipv4 item in pattern");
4577 * Validate the modify-header IPv6 address actions.
4579 * @param[in] action_flags
4580 * Holds the actions detected until now.
4582 * Pointer to the modify action.
4583 * @param[in] item_flags
4584 * Holds the items detected.
4586 * Pointer to error structure.
4589 * 0 on success, a negative errno value otherwise and rte_errno is set.
4592 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4593 const struct rte_flow_action *action,
4594 const uint64_t item_flags,
4595 struct rte_flow_error *error)
4600 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4602 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4603 MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4604 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4605 if (!(item_flags & layer))
4606 return rte_flow_error_set(error, EINVAL,
4607 RTE_FLOW_ERROR_TYPE_ACTION,
4609 "no ipv6 item in pattern");
4615 * Validate the modify-header TP actions.
4617 * @param[in] action_flags
4618 * Holds the actions detected until now.
4620 * Pointer to the modify action.
4621 * @param[in] item_flags
4622 * Holds the items detected.
4624 * Pointer to error structure.
4627 * 0 on success, a negative errno value otherwise and rte_errno is set.
4630 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4631 const struct rte_flow_action *action,
4632 const uint64_t item_flags,
4633 struct rte_flow_error *error)
4638 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4640 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4641 MLX5_FLOW_LAYER_INNER_L4 :
4642 MLX5_FLOW_LAYER_OUTER_L4;
4643 if (!(item_flags & layer))
4644 return rte_flow_error_set(error, EINVAL,
4645 RTE_FLOW_ERROR_TYPE_ACTION,
4646 NULL, "no transport layer "
4653 * Validate the modify-header actions of increment/decrement
4654 * TCP Sequence-number.
4656 * @param[in] action_flags
4657 * Holds the actions detected until now.
4659 * Pointer to the modify action.
4660 * @param[in] item_flags
4661 * Holds the items detected.
4663 * Pointer to error structure.
4666 * 0 on success, a negative errno value otherwise and rte_errno is set.
4669 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4670 const struct rte_flow_action *action,
4671 const uint64_t item_flags,
4672 struct rte_flow_error *error)
4677 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4679 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4680 MLX5_FLOW_LAYER_INNER_L4_TCP :
4681 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4682 if (!(item_flags & layer))
4683 return rte_flow_error_set(error, EINVAL,
4684 RTE_FLOW_ERROR_TYPE_ACTION,
4685 NULL, "no TCP item in"
4687 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4688 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4689 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4690 (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4691 return rte_flow_error_set(error, EINVAL,
4692 RTE_FLOW_ERROR_TYPE_ACTION,
4694 "cannot decrease and increase"
4695 " TCP sequence number"
4696 " at the same time");
4702 * Validate the modify-header actions of increment/decrement
4703 * TCP Acknowledgment number.
4705 * @param[in] action_flags
4706 * Holds the actions detected until now.
4708 * Pointer to the modify action.
4709 * @param[in] item_flags
4710 * Holds the items detected.
4712 * Pointer to error structure.
4715 * 0 on success, a negative errno value otherwise and rte_errno is set.
4718 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4719 const struct rte_flow_action *action,
4720 const uint64_t item_flags,
4721 struct rte_flow_error *error)
4726 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4728 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4729 MLX5_FLOW_LAYER_INNER_L4_TCP :
4730 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4731 if (!(item_flags & layer))
4732 return rte_flow_error_set(error, EINVAL,
4733 RTE_FLOW_ERROR_TYPE_ACTION,
4734 NULL, "no TCP item in"
4736 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4737 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4738 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4739 (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4740 return rte_flow_error_set(error, EINVAL,
4741 RTE_FLOW_ERROR_TYPE_ACTION,
4743 "cannot decrease and increase"
4744 " TCP acknowledgment number"
4745 " at the same time");
4751 * Validate the modify-header TTL actions.
4753 * @param[in] action_flags
4754 * Holds the actions detected until now.
4756 * Pointer to the modify action.
4757 * @param[in] item_flags
4758 * Holds the items detected.
4760 * Pointer to error structure.
4763 * 0 on success, a negative errno value otherwise and rte_errno is set.
4766 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4767 const struct rte_flow_action *action,
4768 const uint64_t item_flags,
4769 struct rte_flow_error *error)
4774 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4776 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4777 MLX5_FLOW_LAYER_INNER_L3 :
4778 MLX5_FLOW_LAYER_OUTER_L3;
4779 if (!(item_flags & layer))
4780 return rte_flow_error_set(error, EINVAL,
4781 RTE_FLOW_ERROR_TYPE_ACTION,
4783 "no IP protocol in pattern");
4789 * Validate the generic modify field actions.
4791 * Pointer to the rte_eth_dev structure.
4792 * @param[in] action_flags
4793 * Holds the actions detected until now.
4795 * Pointer to the modify action.
4797 * Pointer to the flow attributes.
4799 * Pointer to error structure.
4802 * Number of header fields to modify (0 or more) on success,
4803 * a negative errno value otherwise and rte_errno is set.
4806 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4807 const uint64_t action_flags,
4808 const struct rte_flow_action *action,
4809 const struct rte_flow_attr *attr,
4810 struct rte_flow_error *error)
4813 struct mlx5_priv *priv = dev->data->dev_private;
4814 struct mlx5_dev_config *config = &priv->config;
4815 const struct rte_flow_action_modify_field *action_modify_field =
4817 uint32_t dst_width = mlx5_flow_item_field_width(dev,
4818 action_modify_field->dst.field,
4820 uint32_t src_width = mlx5_flow_item_field_width(dev,
4821 action_modify_field->src.field,
4822 dst_width, attr, error);
4824 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4828 if (action_modify_field->width == 0)
4829 return rte_flow_error_set(error, EINVAL,
4830 RTE_FLOW_ERROR_TYPE_ACTION, action,
4831 "no bits are requested to be modified");
4832 else if (action_modify_field->width > dst_width ||
4833 action_modify_field->width > src_width)
4834 return rte_flow_error_set(error, EINVAL,
4835 RTE_FLOW_ERROR_TYPE_ACTION, action,
4836 "cannot modify more bits than"
4837 " the width of a field");
4838 if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4839 action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4840 if ((action_modify_field->dst.offset +
4841 action_modify_field->width > dst_width) ||
4842 (action_modify_field->dst.offset % 32))
4843 return rte_flow_error_set(error, EINVAL,
4844 RTE_FLOW_ERROR_TYPE_ACTION, action,
4845 "destination offset is too big"
4846 " or not aligned to 4 bytes");
4847 if (action_modify_field->dst.level &&
4848 action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4849 return rte_flow_error_set(error, ENOTSUP,
4850 RTE_FLOW_ERROR_TYPE_ACTION, action,
4851 "inner header fields modification"
4852 " is not supported");
4854 if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4855 action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4856 if (!attr->transfer && !attr->group)
4857 return rte_flow_error_set(error, ENOTSUP,
4858 RTE_FLOW_ERROR_TYPE_ACTION, action,
4859 "modify field action is not"
4860 " supported for group 0");
4861 if ((action_modify_field->src.offset +
4862 action_modify_field->width > src_width) ||
4863 (action_modify_field->src.offset % 32))
4864 return rte_flow_error_set(error, EINVAL,
4865 RTE_FLOW_ERROR_TYPE_ACTION, action,
4866 "source offset is too big"
4867 " or not aligned to 4 bytes");
4868 if (action_modify_field->src.level &&
4869 action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4870 return rte_flow_error_set(error, ENOTSUP,
4871 RTE_FLOW_ERROR_TYPE_ACTION, action,
4872 "inner header fields modification"
4873 " is not supported");
4875 if ((action_modify_field->dst.field ==
4876 action_modify_field->src.field) &&
4877 (action_modify_field->dst.level ==
4878 action_modify_field->src.level))
4879 return rte_flow_error_set(error, EINVAL,
4880 RTE_FLOW_ERROR_TYPE_ACTION, action,
4881 "source and destination fields"
4882 " cannot be the same");
4883 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4884 action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4885 action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4886 return rte_flow_error_set(error, EINVAL,
4887 RTE_FLOW_ERROR_TYPE_ACTION, action,
4888 "mark, immediate value or a pointer to it"
4889 " cannot be used as a destination");
4890 if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4891 action_modify_field->src.field == RTE_FLOW_FIELD_START)
4892 return rte_flow_error_set(error, ENOTSUP,
4893 RTE_FLOW_ERROR_TYPE_ACTION, action,
4894 "modifications of an arbitrary"
4895 " place in a packet is not supported");
4896 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4897 action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4898 return rte_flow_error_set(error, ENOTSUP,
4899 RTE_FLOW_ERROR_TYPE_ACTION, action,
4900 "modifications of the 802.1Q Tag"
4901 " Identifier is not supported");
4902 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4903 action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4904 return rte_flow_error_set(error, ENOTSUP,
4905 RTE_FLOW_ERROR_TYPE_ACTION, action,
4906 "modifications of the VXLAN Network"
4907 " Identifier is not supported");
4908 if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4909 action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4910 return rte_flow_error_set(error, ENOTSUP,
4911 RTE_FLOW_ERROR_TYPE_ACTION, action,
4912 "modifications of the GENEVE Network"
4913 " Identifier is not supported");
4914 if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4915 action_modify_field->src.field == RTE_FLOW_FIELD_MARK)
4916 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4917 !mlx5_flow_ext_mreg_supported(dev))
4918 return rte_flow_error_set(error, ENOTSUP,
4919 RTE_FLOW_ERROR_TYPE_ACTION, action,
4920 "cannot modify mark in legacy mode"
4921 " or without extensive registers");
4922 if (action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4923 action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4924 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
4925 !mlx5_flow_ext_mreg_supported(dev))
4926 return rte_flow_error_set(error, ENOTSUP,
4927 RTE_FLOW_ERROR_TYPE_ACTION, action,
4928 "cannot modify meta without"
4929 " extensive registers support");
4930 ret = flow_dv_get_metadata_reg(dev, attr, error);
4931 if (ret < 0 || ret == REG_NON)
4932 return rte_flow_error_set(error, ENOTSUP,
4933 RTE_FLOW_ERROR_TYPE_ACTION, action,
4934 "cannot modify meta without"
4935 " extensive registers available");
4937 if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4938 return rte_flow_error_set(error, ENOTSUP,
4939 RTE_FLOW_ERROR_TYPE_ACTION, action,
4940 "add and sub operations"
4941 " are not supported");
4942 return (action_modify_field->width / 32) +
4943 !!(action_modify_field->width % 32);
4947 * Validate jump action.
4950 * Pointer to the jump action.
4951 * @param[in] action_flags
4952 * Holds the actions detected until now.
4953 * @param[in] attributes
4954 * Pointer to flow attributes
4955 * @param[in] external
4956 * Action belongs to flow rule created by request external to PMD.
4958 * Pointer to error structure.
4961 * 0 on success, a negative errno value otherwise and rte_errno is set.
4964 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4965 const struct mlx5_flow_tunnel *tunnel,
4966 const struct rte_flow_action *action,
4967 uint64_t action_flags,
4968 const struct rte_flow_attr *attributes,
4969 bool external, struct rte_flow_error *error)
4971 uint32_t target_group, table;
4973 struct flow_grp_info grp_info = {
4974 .external = !!external,
4975 .transfer = !!attributes->transfer,
4979 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4980 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4981 return rte_flow_error_set(error, EINVAL,
4982 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4983 "can't have 2 fate actions in"
4986 return rte_flow_error_set(error, EINVAL,
4987 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4988 NULL, "action configuration not set");
4990 ((const struct rte_flow_action_jump *)action->conf)->group;
4991 ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
4995 if (attributes->group == target_group &&
4996 !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
4997 MLX5_FLOW_ACTION_TUNNEL_MATCH)))
4998 return rte_flow_error_set(error, EINVAL,
4999 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5000 "target group must be other than"
5001 " the current flow group");
5006 * Validate action PORT_ID / REPRESENTED_PORT.
5009 * Pointer to rte_eth_dev structure.
5010 * @param[in] action_flags
5011 * Bit-fields that holds the actions detected until now.
5013 * PORT_ID / REPRESENTED_PORT action structure.
5015 * Attributes of flow that includes this action.
5017 * Pointer to error structure.
5020 * 0 on success, a negative errno value otherwise and rte_errno is set.
5023 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5024 uint64_t action_flags,
5025 const struct rte_flow_action *action,
5026 const struct rte_flow_attr *attr,
5027 struct rte_flow_error *error)
5029 const struct rte_flow_action_port_id *port_id;
5030 const struct rte_flow_action_ethdev *ethdev;
5031 struct mlx5_priv *act_priv;
5032 struct mlx5_priv *dev_priv;
5035 if (!attr->transfer)
5036 return rte_flow_error_set(error, ENOTSUP,
5037 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5039 "port action is valid in transfer"
5041 if (!action || !action->conf)
5042 return rte_flow_error_set(error, ENOTSUP,
5043 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5045 "port action parameters must be"
5047 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5048 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5049 return rte_flow_error_set(error, EINVAL,
5050 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5051 "can have only one fate actions in"
5053 dev_priv = mlx5_dev_to_eswitch_info(dev);
5055 return rte_flow_error_set(error, rte_errno,
5056 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5058 "failed to obtain E-Switch info");
5059 switch (action->type) {
5060 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5061 port_id = action->conf;
5062 port = port_id->original ? dev->data->port_id : port_id->id;
5064 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5065 ethdev = action->conf;
5066 port = ethdev->port_id;
5070 return rte_flow_error_set
5072 RTE_FLOW_ERROR_TYPE_ACTION, action,
5073 "unknown E-Switch action");
5075 act_priv = mlx5_port_to_eswitch_info(port, false);
5077 return rte_flow_error_set
5079 RTE_FLOW_ERROR_TYPE_ACTION_CONF, action->conf,
5080 "failed to obtain E-Switch port id for port");
5081 if (act_priv->domain_id != dev_priv->domain_id)
5082 return rte_flow_error_set
5084 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5085 "port does not belong to"
5086 " E-Switch being configured");
5091 * Get the maximum number of modify header actions.
5094 * Pointer to rte_eth_dev structure.
5096 * Whether action is on root table.
5099 * Max number of modify header actions device can support.
5101 static inline unsigned int
5102 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5106 * There's no way to directly query the max capacity from FW.
5107 * The maximal value on root table should be assumed to be supported.
5110 return MLX5_MAX_MODIFY_NUM;
5112 return MLX5_ROOT_TBL_MODIFY_NUM;
5116 * Validate the meter action.
5119 * Pointer to rte_eth_dev structure.
5120 * @param[in] action_flags
5121 * Bit-fields that holds the actions detected until now.
5122 * @param[in] item_flags
5123 * Holds the items detected.
5125 * Pointer to the meter action.
5127 * Attributes of flow that includes this action.
5128 * @param[in] port_id_item
5129 * Pointer to item indicating port id.
5131 * Pointer to error structure.
5134 * 0 on success, a negative errno value otherwise and rte_errno is set.
5137 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5138 uint64_t action_flags, uint64_t item_flags,
5139 const struct rte_flow_action *action,
5140 const struct rte_flow_attr *attr,
5141 const struct rte_flow_item *port_id_item,
5143 struct rte_flow_error *error)
5145 struct mlx5_priv *priv = dev->data->dev_private;
5146 const struct rte_flow_action_meter *am = action->conf;
5147 struct mlx5_flow_meter_info *fm;
5148 struct mlx5_flow_meter_policy *mtr_policy;
5149 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5152 return rte_flow_error_set(error, EINVAL,
5153 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5154 "meter action conf is NULL");
5156 if (action_flags & MLX5_FLOW_ACTION_METER)
5157 return rte_flow_error_set(error, ENOTSUP,
5158 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5159 "meter chaining not support");
5160 if (action_flags & MLX5_FLOW_ACTION_JUMP)
5161 return rte_flow_error_set(error, ENOTSUP,
5162 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5163 "meter with jump not support");
5165 return rte_flow_error_set(error, ENOTSUP,
5166 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5168 "meter action not supported");
5169 fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5171 return rte_flow_error_set(error, EINVAL,
5172 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5174 /* aso meter can always be shared by different domains */
5175 if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5176 !(fm->transfer == attr->transfer ||
5177 (!fm->ingress && !attr->ingress && attr->egress) ||
5178 (!fm->egress && !attr->egress && attr->ingress)))
5179 return rte_flow_error_set(error, EINVAL,
5180 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5181 "Flow attributes domain are either invalid "
5182 "or have a domain conflict with current "
5183 "meter attributes");
5184 if (fm->def_policy) {
5185 if (!((attr->transfer &&
5186 mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5188 mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5190 mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5191 return rte_flow_error_set(error, EINVAL,
5192 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5193 "Flow attributes domain "
5194 "have a conflict with current "
5195 "meter domain attributes");
5198 mtr_policy = mlx5_flow_meter_policy_find(dev,
5199 fm->policy_id, NULL);
5201 return rte_flow_error_set(error, EINVAL,
5202 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5203 "Invalid policy id for meter ");
5204 if (!((attr->transfer && mtr_policy->transfer) ||
5205 (attr->egress && mtr_policy->egress) ||
5206 (attr->ingress && mtr_policy->ingress)))
5207 return rte_flow_error_set(error, EINVAL,
5208 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5209 "Flow attributes domain "
5210 "have a conflict with current "
5211 "meter domain attributes");
5212 if (attr->transfer && mtr_policy->dev) {
5214 * When policy has fate action of port_id,
5215 * the flow should have the same src port as policy.
5217 struct mlx5_priv *policy_port_priv =
5218 mtr_policy->dev->data->dev_private;
5219 int32_t flow_src_port = priv->representor_id;
5222 const struct rte_flow_item_port_id *spec =
5224 struct mlx5_priv *port_priv =
5225 mlx5_port_to_eswitch_info(spec->id,
5228 return rte_flow_error_set(error,
5230 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5232 "Failed to get port info.");
5233 flow_src_port = port_priv->representor_id;
5235 if (flow_src_port != policy_port_priv->representor_id)
5236 return rte_flow_error_set(error,
5238 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5240 "Flow and meter policy "
5241 "have different src port.");
5242 } else if (mtr_policy->is_rss) {
5243 struct mlx5_flow_meter_policy *fp;
5244 struct mlx5_meter_policy_action_container *acg;
5245 struct mlx5_meter_policy_action_container *acy;
5246 const struct rte_flow_action *rss_act;
5249 fp = mlx5_flow_meter_hierarchy_get_final_policy(dev,
5252 return rte_flow_error_set(error, EINVAL,
5253 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5254 "Unable to get the final "
5255 "policy in the hierarchy");
5256 acg = &fp->act_cnt[RTE_COLOR_GREEN];
5257 acy = &fp->act_cnt[RTE_COLOR_YELLOW];
5258 MLX5_ASSERT(acg->fate_action ==
5259 MLX5_FLOW_FATE_SHARED_RSS ||
5261 MLX5_FLOW_FATE_SHARED_RSS);
5262 if (acg->fate_action == MLX5_FLOW_FATE_SHARED_RSS)
5266 ret = mlx5_flow_validate_action_rss(rss_act,
5267 action_flags, dev, attr,
5272 *def_policy = false;
5278 * Validate the age action.
5280 * @param[in] action_flags
5281 * Holds the actions detected until now.
5283 * Pointer to the age action.
5285 * Pointer to the Ethernet device structure.
5287 * Pointer to error structure.
5290 * 0 on success, a negative errno value otherwise and rte_errno is set.
5293 flow_dv_validate_action_age(uint64_t action_flags,
5294 const struct rte_flow_action *action,
5295 struct rte_eth_dev *dev,
5296 struct rte_flow_error *error)
5298 struct mlx5_priv *priv = dev->data->dev_private;
5299 const struct rte_flow_action_age *age = action->conf;
5301 if (!priv->sh->devx || (priv->sh->cmng.counter_fallback &&
5302 !priv->sh->aso_age_mng))
5303 return rte_flow_error_set(error, ENOTSUP,
5304 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5306 "age action not supported");
5307 if (!(action->conf))
5308 return rte_flow_error_set(error, EINVAL,
5309 RTE_FLOW_ERROR_TYPE_ACTION, action,
5310 "configuration cannot be null");
5311 if (!(age->timeout))
5312 return rte_flow_error_set(error, EINVAL,
5313 RTE_FLOW_ERROR_TYPE_ACTION, action,
5314 "invalid timeout value 0");
5315 if (action_flags & MLX5_FLOW_ACTION_AGE)
5316 return rte_flow_error_set(error, EINVAL,
5317 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5318 "duplicate age actions set");
5323 * Validate the modify-header IPv4 DSCP actions.
5325 * @param[in] action_flags
5326 * Holds the actions detected until now.
5328 * Pointer to the modify action.
5329 * @param[in] item_flags
5330 * Holds the items detected.
5332 * Pointer to error structure.
5335 * 0 on success, a negative errno value otherwise and rte_errno is set.
5338 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5339 const struct rte_flow_action *action,
5340 const uint64_t item_flags,
5341 struct rte_flow_error *error)
5345 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5347 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5348 return rte_flow_error_set(error, EINVAL,
5349 RTE_FLOW_ERROR_TYPE_ACTION,
5351 "no ipv4 item in pattern");
5357 * Validate the modify-header IPv6 DSCP actions.
5359 * @param[in] action_flags
5360 * Holds the actions detected until now.
5362 * Pointer to the modify action.
5363 * @param[in] item_flags
5364 * Holds the items detected.
5366 * Pointer to error structure.
5369 * 0 on success, a negative errno value otherwise and rte_errno is set.
5372 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5373 const struct rte_flow_action *action,
5374 const uint64_t item_flags,
5375 struct rte_flow_error *error)
5379 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5381 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5382 return rte_flow_error_set(error, EINVAL,
5383 RTE_FLOW_ERROR_TYPE_ACTION,
5385 "no ipv6 item in pattern");
5391 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5392 struct mlx5_list_entry *entry, void *cb_ctx)
5394 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5395 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5396 struct mlx5_flow_dv_modify_hdr_resource *resource =
5397 container_of(entry, typeof(*resource), entry);
5398 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5400 key_len += ref->actions_num * sizeof(ref->actions[0]);
5401 return ref->actions_num != resource->actions_num ||
5402 memcmp(&ref->ft_type, &resource->ft_type, key_len);
5405 static struct mlx5_indexed_pool *
5406 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5408 struct mlx5_indexed_pool *ipool = __atomic_load_n
5409 (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5412 struct mlx5_indexed_pool *expected = NULL;
5413 struct mlx5_indexed_pool_config cfg =
5414 (struct mlx5_indexed_pool_config) {
5415 .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5417 sizeof(struct mlx5_modification_cmd),
5422 .release_mem_en = !!sh->reclaim_mode,
5423 .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),
5424 .malloc = mlx5_malloc,
5426 .type = "mlx5_modify_action_resource",
5429 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5430 ipool = mlx5_ipool_create(&cfg);
5433 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5434 &expected, ipool, false,
5436 __ATOMIC_SEQ_CST)) {
5437 mlx5_ipool_destroy(ipool);
5438 ipool = __atomic_load_n(&sh->mdh_ipools[index],
5445 struct mlx5_list_entry *
5446 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5448 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5449 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5450 struct mlx5dv_dr_domain *ns;
5451 struct mlx5_flow_dv_modify_hdr_resource *entry;
5452 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5453 struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5454 ref->actions_num - 1);
5456 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5457 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5460 if (unlikely(!ipool)) {
5461 rte_flow_error_set(ctx->error, ENOMEM,
5462 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5463 NULL, "cannot allocate modify ipool");
5466 entry = mlx5_ipool_zmalloc(ipool, &idx);
5468 rte_flow_error_set(ctx->error, ENOMEM,
5469 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5470 "cannot allocate resource memory");
5473 rte_memcpy(&entry->ft_type,
5474 RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5475 key_len + data_len);
5476 if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5477 ns = sh->fdb_domain;
5478 else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5482 ret = mlx5_flow_os_create_flow_action_modify_header
5483 (sh->cdev->ctx, ns, entry,
5484 data_len, &entry->action);
5486 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5487 rte_flow_error_set(ctx->error, ENOMEM,
5488 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5489 NULL, "cannot create modification action");
5493 return &entry->entry;
5496 struct mlx5_list_entry *
5497 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5500 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5501 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5502 struct mlx5_flow_dv_modify_hdr_resource *entry;
5503 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5504 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5507 entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5510 rte_flow_error_set(ctx->error, ENOMEM,
5511 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5512 "cannot allocate resource memory");
5515 memcpy(entry, oentry, sizeof(*entry) + data_len);
5517 return &entry->entry;
5521 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5523 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5524 struct mlx5_flow_dv_modify_hdr_resource *res =
5525 container_of(entry, typeof(*res), entry);
5527 mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5531 * Validate the sample action.
5533 * @param[in, out] action_flags
5534 * Holds the actions detected until now.
5536 * Pointer to the sample action.
5538 * Pointer to the Ethernet device structure.
5540 * Attributes of flow that includes this action.
5541 * @param[in] item_flags
5542 * Holds the items detected.
5544 * Pointer to the RSS action.
5545 * @param[out] sample_rss
5546 * Pointer to the RSS action in sample action list.
5548 * Pointer to the COUNT action in sample action list.
5549 * @param[out] fdb_mirror_limit
5550 * Pointer to the FDB mirror limitation flag.
5552 * Pointer to error structure.
5555 * 0 on success, a negative errno value otherwise and rte_errno is set.
5558 flow_dv_validate_action_sample(uint64_t *action_flags,
5559 const struct rte_flow_action *action,
5560 struct rte_eth_dev *dev,
5561 const struct rte_flow_attr *attr,
5562 uint64_t item_flags,
5563 const struct rte_flow_action_rss *rss,
5564 const struct rte_flow_action_rss **sample_rss,
5565 const struct rte_flow_action_count **count,
5566 int *fdb_mirror_limit,
5567 struct rte_flow_error *error)
5569 struct mlx5_priv *priv = dev->data->dev_private;
5570 struct mlx5_dev_config *dev_conf = &priv->config;
5571 const struct rte_flow_action_sample *sample = action->conf;
5572 const struct rte_flow_action *act;
5573 uint64_t sub_action_flags = 0;
5574 uint16_t queue_index = 0xFFFF;
5579 return rte_flow_error_set(error, EINVAL,
5580 RTE_FLOW_ERROR_TYPE_ACTION, action,
5581 "configuration cannot be NULL");
5582 if (sample->ratio == 0)
5583 return rte_flow_error_set(error, EINVAL,
5584 RTE_FLOW_ERROR_TYPE_ACTION, action,
5585 "ratio value starts from 1");
5586 if (!priv->sh->devx || (sample->ratio > 0 && !priv->sampler_en))
5587 return rte_flow_error_set(error, ENOTSUP,
5588 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5590 "sample action not supported");
5591 if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5592 return rte_flow_error_set(error, EINVAL,
5593 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5594 "Multiple sample actions not "
5596 if (*action_flags & MLX5_FLOW_ACTION_METER)
5597 return rte_flow_error_set(error, EINVAL,
5598 RTE_FLOW_ERROR_TYPE_ACTION, action,
5599 "wrong action order, meter should "
5600 "be after sample action");
5601 if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5602 return rte_flow_error_set(error, EINVAL,
5603 RTE_FLOW_ERROR_TYPE_ACTION, action,
5604 "wrong action order, jump should "
5605 "be after sample action");
5606 if (*action_flags & MLX5_FLOW_ACTION_CT)
5607 return rte_flow_error_set(error, EINVAL,
5608 RTE_FLOW_ERROR_TYPE_ACTION, action,
5609 "Sample after CT not supported");
5610 act = sample->actions;
5611 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5612 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5613 return rte_flow_error_set(error, ENOTSUP,
5614 RTE_FLOW_ERROR_TYPE_ACTION,
5615 act, "too many actions");
5616 switch (act->type) {
5617 case RTE_FLOW_ACTION_TYPE_QUEUE:
5618 ret = mlx5_flow_validate_action_queue(act,
5624 queue_index = ((const struct rte_flow_action_queue *)
5625 (act->conf))->index;
5626 sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5629 case RTE_FLOW_ACTION_TYPE_RSS:
5630 *sample_rss = act->conf;
5631 ret = mlx5_flow_validate_action_rss(act,
5638 if (rss && *sample_rss &&
5639 ((*sample_rss)->level != rss->level ||
5640 (*sample_rss)->types != rss->types))
5641 return rte_flow_error_set(error, ENOTSUP,
5642 RTE_FLOW_ERROR_TYPE_ACTION,
5644 "Can't use the different RSS types "
5645 "or level in the same flow");
5646 if (*sample_rss != NULL && (*sample_rss)->queue_num)
5647 queue_index = (*sample_rss)->queue[0];
5648 sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5651 case RTE_FLOW_ACTION_TYPE_MARK:
5652 ret = flow_dv_validate_action_mark(dev, act,
5657 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5658 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5659 MLX5_FLOW_ACTION_MARK_EXT;
5661 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5664 case RTE_FLOW_ACTION_TYPE_COUNT:
5665 ret = flow_dv_validate_action_count
5666 (dev, false, *action_flags | sub_action_flags,
5671 sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5672 *action_flags |= MLX5_FLOW_ACTION_COUNT;
5675 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5676 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5677 ret = flow_dv_validate_action_port_id(dev,
5684 sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5687 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5688 ret = flow_dv_validate_action_raw_encap_decap
5689 (dev, NULL, act->conf, attr, &sub_action_flags,
5690 &actions_n, action, item_flags, error);
5695 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5696 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5697 ret = flow_dv_validate_action_l2_encap(dev,
5703 sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5707 return rte_flow_error_set(error, ENOTSUP,
5708 RTE_FLOW_ERROR_TYPE_ACTION,
5710 "Doesn't support optional "
5714 if (attr->ingress && !attr->transfer) {
5715 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5716 MLX5_FLOW_ACTION_RSS)))
5717 return rte_flow_error_set(error, EINVAL,
5718 RTE_FLOW_ERROR_TYPE_ACTION,
5720 "Ingress must has a dest "
5721 "QUEUE for Sample");
5722 } else if (attr->egress && !attr->transfer) {
5723 return rte_flow_error_set(error, ENOTSUP,
5724 RTE_FLOW_ERROR_TYPE_ACTION,
5726 "Sample Only support Ingress "
5728 } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5729 MLX5_ASSERT(attr->transfer);
5730 if (sample->ratio > 1)
5731 return rte_flow_error_set(error, ENOTSUP,
5732 RTE_FLOW_ERROR_TYPE_ACTION,
5734 "E-Switch doesn't support "
5735 "any optional action "
5737 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5738 return rte_flow_error_set(error, ENOTSUP,
5739 RTE_FLOW_ERROR_TYPE_ACTION,
5741 "unsupported action QUEUE");
5742 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5743 return rte_flow_error_set(error, ENOTSUP,
5744 RTE_FLOW_ERROR_TYPE_ACTION,
5746 "unsupported action QUEUE");
5747 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5748 return rte_flow_error_set(error, EINVAL,
5749 RTE_FLOW_ERROR_TYPE_ACTION,
5751 "E-Switch must has a dest "
5752 "port for mirroring");
5753 if (!priv->config.hca_attr.reg_c_preserve &&
5754 priv->representor_id != UINT16_MAX)
5755 *fdb_mirror_limit = 1;
5757 /* Continue validation for Xcap actions.*/
5758 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5759 (queue_index == 0xFFFF ||
5760 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5761 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5762 MLX5_FLOW_XCAP_ACTIONS)
5763 return rte_flow_error_set(error, ENOTSUP,
5764 RTE_FLOW_ERROR_TYPE_ACTION,
5765 NULL, "encap and decap "
5766 "combination aren't "
5768 if (!attr->transfer && attr->ingress && (sub_action_flags &
5769 MLX5_FLOW_ACTION_ENCAP))
5770 return rte_flow_error_set(error, ENOTSUP,
5771 RTE_FLOW_ERROR_TYPE_ACTION,
5772 NULL, "encap is not supported"
5773 " for ingress traffic");
5779 * Find existing modify-header resource or create and register a new one.
5781 * @param dev[in, out]
5782 * Pointer to rte_eth_dev structure.
5783 * @param[in, out] resource
5784 * Pointer to modify-header resource.
5785 * @parm[in, out] dev_flow
5786 * Pointer to the dev_flow.
5788 * pointer to error structure.
5791 * 0 on success otherwise -errno and errno is set.
5794 flow_dv_modify_hdr_resource_register
5795 (struct rte_eth_dev *dev,
5796 struct mlx5_flow_dv_modify_hdr_resource *resource,
5797 struct mlx5_flow *dev_flow,
5798 struct rte_flow_error *error)
5800 struct mlx5_priv *priv = dev->data->dev_private;
5801 struct mlx5_dev_ctx_shared *sh = priv->sh;
5802 uint32_t key_len = sizeof(*resource) -
5803 offsetof(typeof(*resource), ft_type) +
5804 resource->actions_num * sizeof(resource->actions[0]);
5805 struct mlx5_list_entry *entry;
5806 struct mlx5_flow_cb_ctx ctx = {
5810 struct mlx5_hlist *modify_cmds;
5813 modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5815 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5817 flow_dv_modify_create_cb,
5818 flow_dv_modify_match_cb,
5819 flow_dv_modify_remove_cb,
5820 flow_dv_modify_clone_cb,
5821 flow_dv_modify_clone_free_cb);
5822 if (unlikely(!modify_cmds))
5824 resource->root = !dev_flow->dv.group;
5825 if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5827 return rte_flow_error_set(error, EOVERFLOW,
5828 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5829 "too many modify header items");
5830 key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5831 entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5834 resource = container_of(entry, typeof(*resource), entry);
5835 dev_flow->handle->dvh.modify_hdr = resource;
5840 * Get DV flow counter by index.
5843 * Pointer to the Ethernet device structure.
5845 * mlx5 flow counter index in the container.
5847 * mlx5 flow counter pool in the container.
5850 * Pointer to the counter, NULL otherwise.
5852 static struct mlx5_flow_counter *
5853 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5855 struct mlx5_flow_counter_pool **ppool)
5857 struct mlx5_priv *priv = dev->data->dev_private;
5858 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5859 struct mlx5_flow_counter_pool *pool;
5861 /* Decrease to original index and clear shared bit. */
5862 idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5863 MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5864 pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5868 return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5872 * Check the devx counter belongs to the pool.
5875 * Pointer to the counter pool.
5877 * The counter devx ID.
5880 * True if counter belongs to the pool, false otherwise.
5883 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5885 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5886 MLX5_COUNTERS_PER_POOL;
5888 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5894 * Get a pool by devx counter ID.
5897 * Pointer to the counter management.
5899 * The counter devx ID.
5902 * The counter pool pointer if exists, NULL otherwise,
5904 static struct mlx5_flow_counter_pool *
5905 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5908 struct mlx5_flow_counter_pool *pool = NULL;
5910 rte_spinlock_lock(&cmng->pool_update_sl);
5911 /* Check last used pool. */
5912 if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5913 flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5914 pool = cmng->pools[cmng->last_pool_idx];
5917 /* ID out of range means no suitable pool in the container. */
5918 if (id > cmng->max_id || id < cmng->min_id)
5921 * Find the pool from the end of the container, since mostly counter
5922 * ID is sequence increasing, and the last pool should be the needed
5927 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5929 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5935 rte_spinlock_unlock(&cmng->pool_update_sl);
5940 * Resize a counter container.
5943 * Pointer to the Ethernet device structure.
5946 * 0 on success, otherwise negative errno value and rte_errno is set.
5949 flow_dv_container_resize(struct rte_eth_dev *dev)
5951 struct mlx5_priv *priv = dev->data->dev_private;
5952 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5953 void *old_pools = cmng->pools;
5954 uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5955 uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5956 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5963 memcpy(pools, old_pools, cmng->n *
5964 sizeof(struct mlx5_flow_counter_pool *));
5966 cmng->pools = pools;
5968 mlx5_free(old_pools);
5973 * Query a devx flow counter.
5976 * Pointer to the Ethernet device structure.
5977 * @param[in] counter
5978 * Index to the flow counter.
5980 * The statistics value of packets.
5982 * The statistics value of bytes.
5985 * 0 on success, otherwise a negative errno value and rte_errno is set.
5988 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5991 struct mlx5_priv *priv = dev->data->dev_private;
5992 struct mlx5_flow_counter_pool *pool = NULL;
5993 struct mlx5_flow_counter *cnt;
5996 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5998 if (priv->sh->cmng.counter_fallback)
5999 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
6000 0, pkts, bytes, 0, NULL, NULL, 0);
6001 rte_spinlock_lock(&pool->sl);
6006 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
6007 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
6008 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
6010 rte_spinlock_unlock(&pool->sl);
6015 * Create and initialize a new counter pool.
6018 * Pointer to the Ethernet device structure.
6020 * The devX counter handle.
6022 * Whether the pool is for counter that was allocated for aging.
6023 * @param[in/out] cont_cur
6024 * Pointer to the container pointer, it will be update in pool resize.
6027 * The pool container pointer on success, NULL otherwise and rte_errno is set.
6029 static struct mlx5_flow_counter_pool *
6030 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6033 struct mlx5_priv *priv = dev->data->dev_private;
6034 struct mlx5_flow_counter_pool *pool;
6035 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6036 bool fallback = priv->sh->cmng.counter_fallback;
6037 uint32_t size = sizeof(*pool);
6039 size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6040 size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6041 pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6047 pool->is_aged = !!age;
6048 pool->query_gen = 0;
6049 pool->min_dcs = dcs;
6050 rte_spinlock_init(&pool->sl);
6051 rte_spinlock_init(&pool->csl);
6052 TAILQ_INIT(&pool->counters[0]);
6053 TAILQ_INIT(&pool->counters[1]);
6054 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6055 rte_spinlock_lock(&cmng->pool_update_sl);
6056 pool->index = cmng->n_valid;
6057 if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6059 rte_spinlock_unlock(&cmng->pool_update_sl);
6062 cmng->pools[pool->index] = pool;
6064 if (unlikely(fallback)) {
6065 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6067 if (base < cmng->min_id)
6068 cmng->min_id = base;
6069 if (base > cmng->max_id)
6070 cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6071 cmng->last_pool_idx = pool->index;
6073 rte_spinlock_unlock(&cmng->pool_update_sl);
6078 * Prepare a new counter and/or a new counter pool.
6081 * Pointer to the Ethernet device structure.
6082 * @param[out] cnt_free
6083 * Where to put the pointer of a new counter.
6085 * Whether the pool is for counter that was allocated for aging.
6088 * The counter pool pointer and @p cnt_free is set on success,
6089 * NULL otherwise and rte_errno is set.
6091 static struct mlx5_flow_counter_pool *
6092 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6093 struct mlx5_flow_counter **cnt_free,
6096 struct mlx5_priv *priv = dev->data->dev_private;
6097 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6098 struct mlx5_flow_counter_pool *pool;
6099 struct mlx5_counters tmp_tq;
6100 struct mlx5_devx_obj *dcs = NULL;
6101 struct mlx5_flow_counter *cnt;
6102 enum mlx5_counter_type cnt_type =
6103 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6104 bool fallback = priv->sh->cmng.counter_fallback;
6108 /* bulk_bitmap must be 0 for single counter allocation. */
6109 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0);
6112 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6114 pool = flow_dv_pool_create(dev, dcs, age);
6116 mlx5_devx_cmd_destroy(dcs);
6120 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6121 cnt = MLX5_POOL_GET_CNT(pool, i);
6123 cnt->dcs_when_free = dcs;
6127 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
6129 rte_errno = ENODATA;
6132 pool = flow_dv_pool_create(dev, dcs, age);
6134 mlx5_devx_cmd_destroy(dcs);
6137 TAILQ_INIT(&tmp_tq);
6138 for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6139 cnt = MLX5_POOL_GET_CNT(pool, i);
6141 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6143 rte_spinlock_lock(&cmng->csl[cnt_type]);
6144 TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6145 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6146 *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6147 (*cnt_free)->pool = pool;
6152 * Allocate a flow counter.
6155 * Pointer to the Ethernet device structure.
6157 * Whether the counter was allocated for aging.
6160 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6163 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6165 struct mlx5_priv *priv = dev->data->dev_private;
6166 struct mlx5_flow_counter_pool *pool = NULL;
6167 struct mlx5_flow_counter *cnt_free = NULL;
6168 bool fallback = priv->sh->cmng.counter_fallback;
6169 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6170 enum mlx5_counter_type cnt_type =
6171 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6174 if (!priv->sh->devx) {
6175 rte_errno = ENOTSUP;
6178 /* Get free counters from container. */
6179 rte_spinlock_lock(&cmng->csl[cnt_type]);
6180 cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6182 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6183 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6184 if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6186 pool = cnt_free->pool;
6188 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6189 /* Create a DV counter action only in the first time usage. */
6190 if (!cnt_free->action) {
6192 struct mlx5_devx_obj *dcs;
6196 offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6197 dcs = pool->min_dcs;
6200 dcs = cnt_free->dcs_when_free;
6202 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6209 cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6210 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6211 /* Update the counter reset values. */
6212 if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6215 if (!fallback && !priv->sh->cmng.query_thread_on)
6216 /* Start the asynchronous batch query by the host thread. */
6217 mlx5_set_query_alarm(priv->sh);
6219 * When the count action isn't shared (by ID), shared_info field is
6220 * used for indirect action API's refcnt.
6221 * When the counter action is not shared neither by ID nor by indirect
6222 * action API, shared info must be 1.
6224 cnt_free->shared_info.refcnt = 1;
6228 cnt_free->pool = pool;
6230 cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6231 rte_spinlock_lock(&cmng->csl[cnt_type]);
6232 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6233 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6239 * Get age param from counter index.
6242 * Pointer to the Ethernet device structure.
6243 * @param[in] counter
6244 * Index to the counter handler.
6247 * The aging parameter specified for the counter index.
6249 static struct mlx5_age_param*
6250 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6253 struct mlx5_flow_counter *cnt;
6254 struct mlx5_flow_counter_pool *pool = NULL;
6256 flow_dv_counter_get_by_idx(dev, counter, &pool);
6257 counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6258 cnt = MLX5_POOL_GET_CNT(pool, counter);
6259 return MLX5_CNT_TO_AGE(cnt);
6263 * Remove a flow counter from aged counter list.
6266 * Pointer to the Ethernet device structure.
6267 * @param[in] counter
6268 * Index to the counter handler.
6270 * Pointer to the counter handler.
6273 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6274 uint32_t counter, struct mlx5_flow_counter *cnt)
6276 struct mlx5_age_info *age_info;
6277 struct mlx5_age_param *age_param;
6278 struct mlx5_priv *priv = dev->data->dev_private;
6279 uint16_t expected = AGE_CANDIDATE;
6281 age_info = GET_PORT_AGE_INFO(priv);
6282 age_param = flow_dv_counter_idx_get_age(dev, counter);
6283 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6284 AGE_FREE, false, __ATOMIC_RELAXED,
6285 __ATOMIC_RELAXED)) {
6287 * We need the lock even it is age timeout,
6288 * since counter may still in process.
6290 rte_spinlock_lock(&age_info->aged_sl);
6291 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6292 rte_spinlock_unlock(&age_info->aged_sl);
6293 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6298 * Release a flow counter.
6301 * Pointer to the Ethernet device structure.
6302 * @param[in] counter
6303 * Index to the counter handler.
6306 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6308 struct mlx5_priv *priv = dev->data->dev_private;
6309 struct mlx5_flow_counter_pool *pool = NULL;
6310 struct mlx5_flow_counter *cnt;
6311 enum mlx5_counter_type cnt_type;
6315 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6317 if (pool->is_aged) {
6318 flow_dv_counter_remove_from_age(dev, counter, cnt);
6321 * If the counter action is shared by indirect action API,
6322 * the atomic function reduces its references counter.
6323 * If after the reduction the action is still referenced, the
6324 * function returns here and does not release it.
6325 * When the counter action is not shared by
6326 * indirect action API, shared info is 1 before the reduction,
6327 * so this condition is failed and function doesn't return here.
6329 if (__atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6335 * Put the counter back to list to be updated in none fallback mode.
6336 * Currently, we are using two list alternately, while one is in query,
6337 * add the freed counter to the other list based on the pool query_gen
6338 * value. After query finishes, add counter the list to the global
6339 * container counter list. The list changes while query starts. In
6340 * this case, lock will not be needed as query callback and release
6341 * function both operate with the different list.
6343 if (!priv->sh->cmng.counter_fallback) {
6344 rte_spinlock_lock(&pool->csl);
6345 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6346 rte_spinlock_unlock(&pool->csl);
6348 cnt->dcs_when_free = cnt->dcs_when_active;
6349 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6350 MLX5_COUNTER_TYPE_ORIGIN;
6351 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6352 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6354 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6359 * Resize a meter id container.
6362 * Pointer to the Ethernet device structure.
6365 * 0 on success, otherwise negative errno value and rte_errno is set.
6368 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6370 struct mlx5_priv *priv = dev->data->dev_private;
6371 struct mlx5_aso_mtr_pools_mng *pools_mng =
6372 &priv->sh->mtrmng->pools_mng;
6373 void *old_pools = pools_mng->pools;
6374 uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6375 uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6376 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6383 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6388 memcpy(pools, old_pools, pools_mng->n *
6389 sizeof(struct mlx5_aso_mtr_pool *));
6390 pools_mng->n = resize;
6391 pools_mng->pools = pools;
6393 mlx5_free(old_pools);
6398 * Prepare a new meter and/or a new meter pool.
6401 * Pointer to the Ethernet device structure.
6402 * @param[out] mtr_free
6403 * Where to put the pointer of a new meter.g.
6406 * The meter pool pointer and @mtr_free is set on success,
6407 * NULL otherwise and rte_errno is set.
6409 static struct mlx5_aso_mtr_pool *
6410 flow_dv_mtr_pool_create(struct rte_eth_dev *dev, struct mlx5_aso_mtr **mtr_free)
6412 struct mlx5_priv *priv = dev->data->dev_private;
6413 struct mlx5_aso_mtr_pools_mng *pools_mng = &priv->sh->mtrmng->pools_mng;
6414 struct mlx5_aso_mtr_pool *pool = NULL;
6415 struct mlx5_devx_obj *dcs = NULL;
6417 uint32_t log_obj_size;
6419 log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6420 dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->cdev->ctx,
6421 priv->sh->cdev->pdn,
6424 rte_errno = ENODATA;
6427 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6430 claim_zero(mlx5_devx_cmd_destroy(dcs));
6433 pool->devx_obj = dcs;
6434 rte_rwlock_write_lock(&pools_mng->resize_mtrwl);
6435 pool->index = pools_mng->n_valid;
6436 if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6438 claim_zero(mlx5_devx_cmd_destroy(dcs));
6439 rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6442 pools_mng->pools[pool->index] = pool;
6443 pools_mng->n_valid++;
6444 rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6445 for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6446 pool->mtrs[i].offset = i;
6447 LIST_INSERT_HEAD(&pools_mng->meters, &pool->mtrs[i], next);
6449 pool->mtrs[0].offset = 0;
6450 *mtr_free = &pool->mtrs[0];
6455 * Release a flow meter into pool.
6458 * Pointer to the Ethernet device structure.
6459 * @param[in] mtr_idx
6460 * Index to aso flow meter.
6463 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6465 struct mlx5_priv *priv = dev->data->dev_private;
6466 struct mlx5_aso_mtr_pools_mng *pools_mng =
6467 &priv->sh->mtrmng->pools_mng;
6468 struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6470 MLX5_ASSERT(aso_mtr);
6471 rte_spinlock_lock(&pools_mng->mtrsl);
6472 memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6473 aso_mtr->state = ASO_METER_FREE;
6474 LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6475 rte_spinlock_unlock(&pools_mng->mtrsl);
6479 * Allocate a aso flow meter.
6482 * Pointer to the Ethernet device structure.
6485 * Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6488 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6490 struct mlx5_priv *priv = dev->data->dev_private;
6491 struct mlx5_aso_mtr *mtr_free = NULL;
6492 struct mlx5_aso_mtr_pools_mng *pools_mng =
6493 &priv->sh->mtrmng->pools_mng;
6494 struct mlx5_aso_mtr_pool *pool;
6495 uint32_t mtr_idx = 0;
6497 if (!priv->sh->devx) {
6498 rte_errno = ENOTSUP;
6501 /* Allocate the flow meter memory. */
6502 /* Get free meters from management. */
6503 rte_spinlock_lock(&pools_mng->mtrsl);
6504 mtr_free = LIST_FIRST(&pools_mng->meters);
6506 LIST_REMOVE(mtr_free, next);
6507 if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6508 rte_spinlock_unlock(&pools_mng->mtrsl);
6511 mtr_free->state = ASO_METER_WAIT;
6512 rte_spinlock_unlock(&pools_mng->mtrsl);
6513 pool = container_of(mtr_free,
6514 struct mlx5_aso_mtr_pool,
6515 mtrs[mtr_free->offset]);
6516 mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6517 if (!mtr_free->fm.meter_action) {
6518 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6519 struct rte_flow_error error;
6522 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6523 mtr_free->fm.meter_action =
6524 mlx5_glue->dv_create_flow_action_aso
6525 (priv->sh->rx_domain,
6526 pool->devx_obj->obj,
6528 (1 << MLX5_FLOW_COLOR_GREEN),
6530 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6531 if (!mtr_free->fm.meter_action) {
6532 flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6540 * Verify the @p attributes will be correctly understood by the NIC and store
6541 * them in the @p flow if everything is correct.
6544 * Pointer to dev struct.
6545 * @param[in] attributes
6546 * Pointer to flow attributes
6547 * @param[in] external
6548 * This flow rule is created by request external to PMD.
6550 * Pointer to error structure.
6553 * - 0 on success and non root table.
6554 * - 1 on success and root table.
6555 * - a negative errno value otherwise and rte_errno is set.
6558 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6559 const struct mlx5_flow_tunnel *tunnel,
6560 const struct rte_flow_attr *attributes,
6561 const struct flow_grp_info *grp_info,
6562 struct rte_flow_error *error)
6564 struct mlx5_priv *priv = dev->data->dev_private;
6565 uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6568 #ifndef HAVE_MLX5DV_DR
6569 RTE_SET_USED(tunnel);
6570 RTE_SET_USED(grp_info);
6571 if (attributes->group)
6572 return rte_flow_error_set(error, ENOTSUP,
6573 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6575 "groups are not supported");
6579 ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6584 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6586 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6587 attributes->priority > lowest_priority)
6588 return rte_flow_error_set(error, ENOTSUP,
6589 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6591 "priority out of range");
6592 if (attributes->transfer) {
6593 if (!priv->config.dv_esw_en)
6594 return rte_flow_error_set
6596 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6597 "E-Switch dr is not supported");
6598 if (!(priv->representor || priv->master))
6599 return rte_flow_error_set
6600 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6601 NULL, "E-Switch configuration can only be"
6602 " done by a master or a representor device");
6603 if (attributes->egress)
6604 return rte_flow_error_set
6606 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6607 "egress is not supported");
6609 if (!(attributes->egress ^ attributes->ingress))
6610 return rte_flow_error_set(error, ENOTSUP,
6611 RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6612 "must specify exactly one of "
6613 "ingress or egress");
6618 validate_integrity_bits(const struct rte_flow_item_integrity *mask,
6619 int64_t pattern_flags, uint64_t l3_flags,
6620 uint64_t l4_flags, uint64_t ip4_flag,
6621 struct rte_flow_error *error)
6623 if (mask->l3_ok && !(pattern_flags & l3_flags))
6624 return rte_flow_error_set(error, EINVAL,
6625 RTE_FLOW_ERROR_TYPE_ITEM,
6626 NULL, "missing L3 protocol");
6628 if (mask->ipv4_csum_ok && !(pattern_flags & ip4_flag))
6629 return rte_flow_error_set(error, EINVAL,
6630 RTE_FLOW_ERROR_TYPE_ITEM,
6631 NULL, "missing IPv4 protocol");
6633 if ((mask->l4_ok || mask->l4_csum_ok) && !(pattern_flags & l4_flags))
6634 return rte_flow_error_set(error, EINVAL,
6635 RTE_FLOW_ERROR_TYPE_ITEM,
6636 NULL, "missing L4 protocol");
6642 flow_dv_validate_item_integrity_post(const struct
6643 rte_flow_item *integrity_items[2],
6644 int64_t pattern_flags,
6645 struct rte_flow_error *error)
6647 const struct rte_flow_item_integrity *mask;
6650 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
6651 mask = (typeof(mask))integrity_items[0]->mask;
6652 ret = validate_integrity_bits(mask, pattern_flags,
6653 MLX5_FLOW_LAYER_OUTER_L3,
6654 MLX5_FLOW_LAYER_OUTER_L4,
6655 MLX5_FLOW_LAYER_OUTER_L3_IPV4,
6660 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
6661 mask = (typeof(mask))integrity_items[1]->mask;
6662 ret = validate_integrity_bits(mask, pattern_flags,
6663 MLX5_FLOW_LAYER_INNER_L3,
6664 MLX5_FLOW_LAYER_INNER_L4,
6665 MLX5_FLOW_LAYER_INNER_L3_IPV4,
6674 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6675 const struct rte_flow_item *integrity_item,
6676 uint64_t pattern_flags, uint64_t *last_item,
6677 const struct rte_flow_item *integrity_items[2],
6678 struct rte_flow_error *error)
6680 struct mlx5_priv *priv = dev->data->dev_private;
6681 const struct rte_flow_item_integrity *mask = (typeof(mask))
6682 integrity_item->mask;
6683 const struct rte_flow_item_integrity *spec = (typeof(spec))
6684 integrity_item->spec;
6686 if (!priv->config.hca_attr.pkt_integrity_match)
6687 return rte_flow_error_set(error, ENOTSUP,
6688 RTE_FLOW_ERROR_TYPE_ITEM,
6690 "packet integrity integrity_item not supported");
6692 return rte_flow_error_set(error, ENOTSUP,
6693 RTE_FLOW_ERROR_TYPE_ITEM,
6695 "no spec for integrity item");
6697 mask = &rte_flow_item_integrity_mask;
6698 if (!mlx5_validate_integrity_item(mask))
6699 return rte_flow_error_set(error, ENOTSUP,
6700 RTE_FLOW_ERROR_TYPE_ITEM,
6702 "unsupported integrity filter");
6703 if (spec->level > 1) {
6704 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY)
6705 return rte_flow_error_set
6707 RTE_FLOW_ERROR_TYPE_ITEM,
6708 NULL, "multiple inner integrity items not supported");
6709 integrity_items[1] = integrity_item;
6710 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
6712 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY)
6713 return rte_flow_error_set
6715 RTE_FLOW_ERROR_TYPE_ITEM,
6716 NULL, "multiple outer integrity items not supported");
6717 integrity_items[0] = integrity_item;
6718 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
6724 flow_dv_validate_item_flex(struct rte_eth_dev *dev,
6725 const struct rte_flow_item *item,
6726 uint64_t item_flags,
6727 uint64_t *last_item,
6729 struct rte_flow_error *error)
6731 const struct rte_flow_item_flex *flow_spec = item->spec;
6732 const struct rte_flow_item_flex *flow_mask = item->mask;
6733 struct mlx5_flex_item *flex;
6736 return rte_flow_error_set(error, EINVAL,
6737 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6738 "flex flow item spec cannot be NULL");
6740 return rte_flow_error_set(error, EINVAL,
6741 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6742 "flex flow item mask cannot be NULL");
6744 return rte_flow_error_set(error, ENOTSUP,
6745 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6746 "flex flow item last not supported");
6747 if (mlx5_flex_acquire_index(dev, flow_spec->handle, false) < 0)
6748 return rte_flow_error_set(error, EINVAL,
6749 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6750 "invalid flex flow item handle");
6751 flex = (struct mlx5_flex_item *)flow_spec->handle;
6752 switch (flex->tunnel_mode) {
6753 case FLEX_TUNNEL_MODE_SINGLE:
6755 (MLX5_FLOW_ITEM_OUTER_FLEX | MLX5_FLOW_ITEM_INNER_FLEX))
6756 rte_flow_error_set(error, EINVAL,
6757 RTE_FLOW_ERROR_TYPE_ITEM,
6758 NULL, "multiple flex items not supported");
6760 case FLEX_TUNNEL_MODE_OUTER:
6762 rte_flow_error_set(error, EINVAL,
6763 RTE_FLOW_ERROR_TYPE_ITEM,
6764 NULL, "inner flex item was not configured");
6765 if (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX)
6766 rte_flow_error_set(error, ENOTSUP,
6767 RTE_FLOW_ERROR_TYPE_ITEM,
6768 NULL, "multiple flex items not supported");
6770 case FLEX_TUNNEL_MODE_INNER:
6772 rte_flow_error_set(error, EINVAL,
6773 RTE_FLOW_ERROR_TYPE_ITEM,
6774 NULL, "outer flex item was not configured");
6775 if (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)
6776 rte_flow_error_set(error, EINVAL,
6777 RTE_FLOW_ERROR_TYPE_ITEM,
6778 NULL, "multiple flex items not supported");
6780 case FLEX_TUNNEL_MODE_MULTI:
6781 if ((is_inner && (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)) ||
6782 (!is_inner && (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX))) {
6783 rte_flow_error_set(error, EINVAL,
6784 RTE_FLOW_ERROR_TYPE_ITEM,
6785 NULL, "multiple flex items not supported");
6788 case FLEX_TUNNEL_MODE_TUNNEL:
6789 if (is_inner || (item_flags & MLX5_FLOW_ITEM_FLEX_TUNNEL))
6790 rte_flow_error_set(error, EINVAL,
6791 RTE_FLOW_ERROR_TYPE_ITEM,
6792 NULL, "multiple flex tunnel items not supported");
6795 rte_flow_error_set(error, EINVAL,
6796 RTE_FLOW_ERROR_TYPE_ITEM,
6797 NULL, "invalid flex item configuration");
6799 *last_item = flex->tunnel_mode == FLEX_TUNNEL_MODE_TUNNEL ?
6800 MLX5_FLOW_ITEM_FLEX_TUNNEL : is_inner ?
6801 MLX5_FLOW_ITEM_INNER_FLEX : MLX5_FLOW_ITEM_OUTER_FLEX;
6806 * Internal validation function. For validating both actions and items.
6809 * Pointer to the rte_eth_dev structure.
6811 * Pointer to the flow attributes.
6813 * Pointer to the list of items.
6814 * @param[in] actions
6815 * Pointer to the list of actions.
6816 * @param[in] external
6817 * This flow rule is created by request external to PMD.
6818 * @param[in] hairpin
6819 * Number of hairpin TX actions, 0 means classic flow.
6821 * Pointer to the error structure.
6824 * 0 on success, a negative errno value otherwise and rte_errno is set.
6827 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6828 const struct rte_flow_item items[],
6829 const struct rte_flow_action actions[],
6830 bool external, int hairpin, struct rte_flow_error *error)
6833 uint64_t action_flags = 0;
6834 uint64_t item_flags = 0;
6835 uint64_t last_item = 0;
6836 uint8_t next_protocol = 0xff;
6837 uint16_t ether_type = 0;
6839 uint8_t item_ipv6_proto = 0;
6840 int fdb_mirror_limit = 0;
6841 int modify_after_mirror = 0;
6842 const struct rte_flow_item *geneve_item = NULL;
6843 const struct rte_flow_item *gre_item = NULL;
6844 const struct rte_flow_item *gtp_item = NULL;
6845 const struct rte_flow_action_raw_decap *decap;
6846 const struct rte_flow_action_raw_encap *encap;
6847 const struct rte_flow_action_rss *rss = NULL;
6848 const struct rte_flow_action_rss *sample_rss = NULL;
6849 const struct rte_flow_action_count *sample_count = NULL;
6850 const struct rte_flow_item_tcp nic_tcp_mask = {
6853 .src_port = RTE_BE16(UINT16_MAX),
6854 .dst_port = RTE_BE16(UINT16_MAX),
6857 const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6860 "\xff\xff\xff\xff\xff\xff\xff\xff"
6861 "\xff\xff\xff\xff\xff\xff\xff\xff",
6863 "\xff\xff\xff\xff\xff\xff\xff\xff"
6864 "\xff\xff\xff\xff\xff\xff\xff\xff",
6865 .vtc_flow = RTE_BE32(0xffffffff),
6871 const struct rte_flow_item_ecpri nic_ecpri_mask = {
6875 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6879 .dummy[0] = 0xffffffff,
6882 struct mlx5_priv *priv = dev->data->dev_private;
6883 struct mlx5_dev_config *dev_conf = &priv->config;
6884 uint16_t queue_index = 0xFFFF;
6885 const struct rte_flow_item_vlan *vlan_m = NULL;
6886 uint32_t rw_act_num = 0;
6888 const struct mlx5_flow_tunnel *tunnel;
6889 enum mlx5_tof_rule_type tof_rule_type;
6890 struct flow_grp_info grp_info = {
6891 .external = !!external,
6892 .transfer = !!attr->transfer,
6893 .fdb_def_rule = !!priv->fdb_def_rule,
6894 .std_tbl_fix = true,
6896 const struct rte_eth_hairpin_conf *conf;
6897 const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
6898 const struct rte_flow_item *port_id_item = NULL;
6899 bool def_policy = false;
6900 uint16_t udp_dport = 0;
6904 tunnel = is_tunnel_offload_active(dev) ?
6905 mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6907 if (!priv->config.dv_flow_en)
6908 return rte_flow_error_set
6910 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6911 NULL, "tunnel offload requires DV flow interface");
6912 if (priv->representor)
6913 return rte_flow_error_set
6915 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6916 NULL, "decap not supported for VF representor");
6917 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6918 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6919 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6920 action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6921 MLX5_FLOW_ACTION_DECAP;
6922 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6923 (dev, attr, tunnel, tof_rule_type);
6925 ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6928 is_root = (uint64_t)ret;
6929 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6930 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6931 int type = items->type;
6933 if (!mlx5_flow_os_item_supported(type))
6934 return rte_flow_error_set(error, ENOTSUP,
6935 RTE_FLOW_ERROR_TYPE_ITEM,
6936 NULL, "item not supported");
6938 case RTE_FLOW_ITEM_TYPE_VOID:
6940 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6941 ret = flow_dv_validate_item_port_id
6942 (dev, items, attr, item_flags, error);
6945 last_item = MLX5_FLOW_ITEM_PORT_ID;
6946 port_id_item = items;
6948 case RTE_FLOW_ITEM_TYPE_ETH:
6949 ret = mlx5_flow_validate_item_eth(items, item_flags,
6953 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6954 MLX5_FLOW_LAYER_OUTER_L2;
6955 if (items->mask != NULL && items->spec != NULL) {
6957 ((const struct rte_flow_item_eth *)
6960 ((const struct rte_flow_item_eth *)
6962 ether_type = rte_be_to_cpu_16(ether_type);
6967 case RTE_FLOW_ITEM_TYPE_VLAN:
6968 ret = flow_dv_validate_item_vlan(items, item_flags,
6972 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6973 MLX5_FLOW_LAYER_OUTER_VLAN;
6974 if (items->mask != NULL && items->spec != NULL) {
6976 ((const struct rte_flow_item_vlan *)
6977 items->spec)->inner_type;
6979 ((const struct rte_flow_item_vlan *)
6980 items->mask)->inner_type;
6981 ether_type = rte_be_to_cpu_16(ether_type);
6985 /* Store outer VLAN mask for of_push_vlan action. */
6987 vlan_m = items->mask;
6989 case RTE_FLOW_ITEM_TYPE_IPV4:
6990 mlx5_flow_tunnel_ip_check(items, next_protocol,
6991 &item_flags, &tunnel);
6992 ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
6993 last_item, ether_type,
6997 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
6998 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
6999 if (items->mask != NULL &&
7000 ((const struct rte_flow_item_ipv4 *)
7001 items->mask)->hdr.next_proto_id) {
7003 ((const struct rte_flow_item_ipv4 *)
7004 (items->spec))->hdr.next_proto_id;
7006 ((const struct rte_flow_item_ipv4 *)
7007 (items->mask))->hdr.next_proto_id;
7009 /* Reset for inner layer. */
7010 next_protocol = 0xff;
7013 case RTE_FLOW_ITEM_TYPE_IPV6:
7014 mlx5_flow_tunnel_ip_check(items, next_protocol,
7015 &item_flags, &tunnel);
7016 ret = mlx5_flow_validate_item_ipv6(items, item_flags,
7023 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7024 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7025 if (items->mask != NULL &&
7026 ((const struct rte_flow_item_ipv6 *)
7027 items->mask)->hdr.proto) {
7029 ((const struct rte_flow_item_ipv6 *)
7030 items->spec)->hdr.proto;
7032 ((const struct rte_flow_item_ipv6 *)
7033 items->spec)->hdr.proto;
7035 ((const struct rte_flow_item_ipv6 *)
7036 items->mask)->hdr.proto;
7038 /* Reset for inner layer. */
7039 next_protocol = 0xff;
7042 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
7043 ret = flow_dv_validate_item_ipv6_frag_ext(items,
7048 last_item = tunnel ?
7049 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
7050 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
7051 if (items->mask != NULL &&
7052 ((const struct rte_flow_item_ipv6_frag_ext *)
7053 items->mask)->hdr.next_header) {
7055 ((const struct rte_flow_item_ipv6_frag_ext *)
7056 items->spec)->hdr.next_header;
7058 ((const struct rte_flow_item_ipv6_frag_ext *)
7059 items->mask)->hdr.next_header;
7061 /* Reset for inner layer. */
7062 next_protocol = 0xff;
7065 case RTE_FLOW_ITEM_TYPE_TCP:
7066 ret = mlx5_flow_validate_item_tcp
7073 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7074 MLX5_FLOW_LAYER_OUTER_L4_TCP;
7076 case RTE_FLOW_ITEM_TYPE_UDP:
7077 ret = mlx5_flow_validate_item_udp(items, item_flags,
7080 const struct rte_flow_item_udp *spec = items->spec;
7081 const struct rte_flow_item_udp *mask = items->mask;
7083 mask = &rte_flow_item_udp_mask;
7085 udp_dport = rte_be_to_cpu_16
7086 (spec->hdr.dst_port &
7087 mask->hdr.dst_port);
7090 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7091 MLX5_FLOW_LAYER_OUTER_L4_UDP;
7093 case RTE_FLOW_ITEM_TYPE_GRE:
7094 ret = mlx5_flow_validate_item_gre(items, item_flags,
7095 next_protocol, error);
7099 last_item = MLX5_FLOW_LAYER_GRE;
7101 case RTE_FLOW_ITEM_TYPE_NVGRE:
7102 ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7107 last_item = MLX5_FLOW_LAYER_NVGRE;
7109 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7110 ret = mlx5_flow_validate_item_gre_key
7111 (items, item_flags, gre_item, error);
7114 last_item = MLX5_FLOW_LAYER_GRE_KEY;
7116 case RTE_FLOW_ITEM_TYPE_VXLAN:
7117 ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
7122 last_item = MLX5_FLOW_LAYER_VXLAN;
7124 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7125 ret = mlx5_flow_validate_item_vxlan_gpe(items,
7130 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7132 case RTE_FLOW_ITEM_TYPE_GENEVE:
7133 ret = mlx5_flow_validate_item_geneve(items,
7138 geneve_item = items;
7139 last_item = MLX5_FLOW_LAYER_GENEVE;
7141 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7142 ret = mlx5_flow_validate_item_geneve_opt(items,
7149 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7151 case RTE_FLOW_ITEM_TYPE_MPLS:
7152 ret = mlx5_flow_validate_item_mpls(dev, items,
7157 last_item = MLX5_FLOW_LAYER_MPLS;
7160 case RTE_FLOW_ITEM_TYPE_MARK:
7161 ret = flow_dv_validate_item_mark(dev, items, attr,
7165 last_item = MLX5_FLOW_ITEM_MARK;
7167 case RTE_FLOW_ITEM_TYPE_META:
7168 ret = flow_dv_validate_item_meta(dev, items, attr,
7172 last_item = MLX5_FLOW_ITEM_METADATA;
7174 case RTE_FLOW_ITEM_TYPE_ICMP:
7175 ret = mlx5_flow_validate_item_icmp(items, item_flags,
7180 last_item = MLX5_FLOW_LAYER_ICMP;
7182 case RTE_FLOW_ITEM_TYPE_ICMP6:
7183 ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7188 item_ipv6_proto = IPPROTO_ICMPV6;
7189 last_item = MLX5_FLOW_LAYER_ICMP6;
7191 case RTE_FLOW_ITEM_TYPE_TAG:
7192 ret = flow_dv_validate_item_tag(dev, items,
7196 last_item = MLX5_FLOW_ITEM_TAG;
7198 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7199 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7201 case RTE_FLOW_ITEM_TYPE_GTP:
7202 ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7207 last_item = MLX5_FLOW_LAYER_GTP;
7209 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7210 ret = flow_dv_validate_item_gtp_psc(items, last_item,
7215 last_item = MLX5_FLOW_LAYER_GTP_PSC;
7217 case RTE_FLOW_ITEM_TYPE_ECPRI:
7218 /* Capacity will be checked in the translate stage. */
7219 ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7226 last_item = MLX5_FLOW_LAYER_ECPRI;
7228 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7229 ret = flow_dv_validate_item_integrity(dev, items,
7237 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7238 ret = flow_dv_validate_item_aso_ct(dev, items,
7239 &item_flags, error);
7243 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7244 /* tunnel offload item was processed before
7245 * list it here as a supported type
7248 case RTE_FLOW_ITEM_TYPE_FLEX:
7249 ret = flow_dv_validate_item_flex(dev, items, item_flags,
7251 tunnel != 0, error);
7256 return rte_flow_error_set(error, ENOTSUP,
7257 RTE_FLOW_ERROR_TYPE_ITEM,
7258 NULL, "item not supported");
7260 item_flags |= last_item;
7262 if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
7263 ret = flow_dv_validate_item_integrity_post(integrity_items,
7268 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7269 int type = actions->type;
7270 bool shared_count = false;
7272 if (!mlx5_flow_os_action_supported(type))
7273 return rte_flow_error_set(error, ENOTSUP,
7274 RTE_FLOW_ERROR_TYPE_ACTION,
7276 "action not supported");
7277 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7278 return rte_flow_error_set(error, ENOTSUP,
7279 RTE_FLOW_ERROR_TYPE_ACTION,
7280 actions, "too many actions");
7282 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7283 return rte_flow_error_set(error, ENOTSUP,
7284 RTE_FLOW_ERROR_TYPE_ACTION,
7285 NULL, "meter action with policy "
7286 "must be the last action");
7288 case RTE_FLOW_ACTION_TYPE_VOID:
7290 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7291 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
7292 ret = flow_dv_validate_action_port_id(dev,
7299 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7302 case RTE_FLOW_ACTION_TYPE_FLAG:
7303 ret = flow_dv_validate_action_flag(dev, action_flags,
7307 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7308 /* Count all modify-header actions as one. */
7309 if (!(action_flags &
7310 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7312 action_flags |= MLX5_FLOW_ACTION_FLAG |
7313 MLX5_FLOW_ACTION_MARK_EXT;
7314 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7315 modify_after_mirror = 1;
7318 action_flags |= MLX5_FLOW_ACTION_FLAG;
7321 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7323 case RTE_FLOW_ACTION_TYPE_MARK:
7324 ret = flow_dv_validate_action_mark(dev, actions,
7329 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7330 /* Count all modify-header actions as one. */
7331 if (!(action_flags &
7332 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7334 action_flags |= MLX5_FLOW_ACTION_MARK |
7335 MLX5_FLOW_ACTION_MARK_EXT;
7336 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7337 modify_after_mirror = 1;
7339 action_flags |= MLX5_FLOW_ACTION_MARK;
7342 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7344 case RTE_FLOW_ACTION_TYPE_SET_META:
7345 ret = flow_dv_validate_action_set_meta(dev, actions,
7350 /* Count all modify-header actions as one action. */
7351 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7353 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7354 modify_after_mirror = 1;
7355 action_flags |= MLX5_FLOW_ACTION_SET_META;
7356 rw_act_num += MLX5_ACT_NUM_SET_META;
7358 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7359 ret = flow_dv_validate_action_set_tag(dev, actions,
7364 /* Count all modify-header actions as one action. */
7365 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7367 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7368 modify_after_mirror = 1;
7369 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7370 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7372 case RTE_FLOW_ACTION_TYPE_DROP:
7373 ret = mlx5_flow_validate_action_drop(action_flags,
7377 action_flags |= MLX5_FLOW_ACTION_DROP;
7380 case RTE_FLOW_ACTION_TYPE_QUEUE:
7381 ret = mlx5_flow_validate_action_queue(actions,
7386 queue_index = ((const struct rte_flow_action_queue *)
7387 (actions->conf))->index;
7388 action_flags |= MLX5_FLOW_ACTION_QUEUE;
7391 case RTE_FLOW_ACTION_TYPE_RSS:
7392 rss = actions->conf;
7393 ret = mlx5_flow_validate_action_rss(actions,
7399 if (rss && sample_rss &&
7400 (sample_rss->level != rss->level ||
7401 sample_rss->types != rss->types))
7402 return rte_flow_error_set(error, ENOTSUP,
7403 RTE_FLOW_ERROR_TYPE_ACTION,
7405 "Can't use the different RSS types "
7406 "or level in the same flow");
7407 if (rss != NULL && rss->queue_num)
7408 queue_index = rss->queue[0];
7409 action_flags |= MLX5_FLOW_ACTION_RSS;
7412 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7414 mlx5_flow_validate_action_default_miss(action_flags,
7418 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7421 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7422 shared_count = true;
7424 case RTE_FLOW_ACTION_TYPE_COUNT:
7425 ret = flow_dv_validate_action_count(dev, shared_count,
7430 action_flags |= MLX5_FLOW_ACTION_COUNT;
7433 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7434 if (flow_dv_validate_action_pop_vlan(dev,
7440 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7441 modify_after_mirror = 1;
7442 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7445 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7446 ret = flow_dv_validate_action_push_vlan(dev,
7453 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7454 modify_after_mirror = 1;
7455 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7458 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7459 ret = flow_dv_validate_action_set_vlan_pcp
7460 (action_flags, actions, error);
7463 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7464 modify_after_mirror = 1;
7465 /* Count PCP with push_vlan command. */
7466 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7468 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7469 ret = flow_dv_validate_action_set_vlan_vid
7470 (item_flags, action_flags,
7474 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7475 modify_after_mirror = 1;
7476 /* Count VID with push_vlan command. */
7477 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7478 rw_act_num += MLX5_ACT_NUM_MDF_VID;
7480 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7481 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7482 ret = flow_dv_validate_action_l2_encap(dev,
7488 action_flags |= MLX5_FLOW_ACTION_ENCAP;
7491 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7492 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7493 ret = flow_dv_validate_action_decap(dev, action_flags,
7494 actions, item_flags,
7498 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7499 modify_after_mirror = 1;
7500 action_flags |= MLX5_FLOW_ACTION_DECAP;
7503 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7504 ret = flow_dv_validate_action_raw_encap_decap
7505 (dev, NULL, actions->conf, attr, &action_flags,
7506 &actions_n, actions, item_flags, error);
7510 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7511 decap = actions->conf;
7512 while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7514 if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7518 encap = actions->conf;
7520 ret = flow_dv_validate_action_raw_encap_decap
7522 decap ? decap : &empty_decap, encap,
7523 attr, &action_flags, &actions_n,
7524 actions, item_flags, error);
7527 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7528 (action_flags & MLX5_FLOW_ACTION_DECAP))
7529 modify_after_mirror = 1;
7531 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7532 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7533 ret = flow_dv_validate_action_modify_mac(action_flags,
7539 /* Count all modify-header actions as one action. */
7540 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7542 action_flags |= actions->type ==
7543 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7544 MLX5_FLOW_ACTION_SET_MAC_SRC :
7545 MLX5_FLOW_ACTION_SET_MAC_DST;
7546 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7547 modify_after_mirror = 1;
7549 * Even if the source and destination MAC addresses have
7550 * overlap in the header with 4B alignment, the convert
7551 * function will handle them separately and 4 SW actions
7552 * will be created. And 2 actions will be added each
7553 * time no matter how many bytes of address will be set.
7555 rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7557 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7558 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7559 ret = flow_dv_validate_action_modify_ipv4(action_flags,
7565 /* Count all modify-header actions as one action. */
7566 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7568 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7569 modify_after_mirror = 1;
7570 action_flags |= actions->type ==
7571 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7572 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7573 MLX5_FLOW_ACTION_SET_IPV4_DST;
7574 rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7576 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7577 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7578 ret = flow_dv_validate_action_modify_ipv6(action_flags,
7584 if (item_ipv6_proto == IPPROTO_ICMPV6)
7585 return rte_flow_error_set(error, ENOTSUP,
7586 RTE_FLOW_ERROR_TYPE_ACTION,
7588 "Can't change header "
7589 "with ICMPv6 proto");
7590 /* Count all modify-header actions as one action. */
7591 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7593 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7594 modify_after_mirror = 1;
7595 action_flags |= actions->type ==
7596 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7597 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7598 MLX5_FLOW_ACTION_SET_IPV6_DST;
7599 rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7601 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7602 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7603 ret = flow_dv_validate_action_modify_tp(action_flags,
7609 /* Count all modify-header actions as one action. */
7610 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7612 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7613 modify_after_mirror = 1;
7614 action_flags |= actions->type ==
7615 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7616 MLX5_FLOW_ACTION_SET_TP_SRC :
7617 MLX5_FLOW_ACTION_SET_TP_DST;
7618 rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7620 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7621 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7622 ret = flow_dv_validate_action_modify_ttl(action_flags,
7628 /* Count all modify-header actions as one action. */
7629 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7631 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7632 modify_after_mirror = 1;
7633 action_flags |= actions->type ==
7634 RTE_FLOW_ACTION_TYPE_SET_TTL ?
7635 MLX5_FLOW_ACTION_SET_TTL :
7636 MLX5_FLOW_ACTION_DEC_TTL;
7637 rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7639 case RTE_FLOW_ACTION_TYPE_JUMP:
7640 ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7646 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7648 return rte_flow_error_set(error, EINVAL,
7649 RTE_FLOW_ERROR_TYPE_ACTION,
7651 "sample and jump action combination is not supported");
7653 action_flags |= MLX5_FLOW_ACTION_JUMP;
7655 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7656 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7657 ret = flow_dv_validate_action_modify_tcp_seq
7664 /* Count all modify-header actions as one action. */
7665 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7667 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7668 modify_after_mirror = 1;
7669 action_flags |= actions->type ==
7670 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7671 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7672 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7673 rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7675 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7676 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7677 ret = flow_dv_validate_action_modify_tcp_ack
7684 /* Count all modify-header actions as one action. */
7685 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7687 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7688 modify_after_mirror = 1;
7689 action_flags |= actions->type ==
7690 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7691 MLX5_FLOW_ACTION_INC_TCP_ACK :
7692 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7693 rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7695 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7697 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7698 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7699 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7701 case RTE_FLOW_ACTION_TYPE_METER:
7702 ret = mlx5_flow_validate_action_meter(dev,
7711 action_flags |= MLX5_FLOW_ACTION_METER;
7714 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7716 /* Meter action will add one more TAG action. */
7717 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7719 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7720 if (!attr->transfer && !attr->group)
7721 return rte_flow_error_set(error, ENOTSUP,
7722 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7724 "Shared ASO age action is not supported for group 0");
7725 if (action_flags & MLX5_FLOW_ACTION_AGE)
7726 return rte_flow_error_set
7728 RTE_FLOW_ERROR_TYPE_ACTION,
7730 "duplicate age actions set");
7731 action_flags |= MLX5_FLOW_ACTION_AGE;
7734 case RTE_FLOW_ACTION_TYPE_AGE:
7735 ret = flow_dv_validate_action_age(action_flags,
7741 * Validate the regular AGE action (using counter)
7742 * mutual exclusion with share counter actions.
7744 if (!priv->sh->flow_hit_aso_en) {
7746 return rte_flow_error_set
7748 RTE_FLOW_ERROR_TYPE_ACTION,
7750 "old age and shared count combination is not supported");
7752 return rte_flow_error_set
7754 RTE_FLOW_ERROR_TYPE_ACTION,
7756 "old age action and count must be in the same sub flow");
7758 action_flags |= MLX5_FLOW_ACTION_AGE;
7761 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7762 ret = flow_dv_validate_action_modify_ipv4_dscp
7769 /* Count all modify-header actions as one action. */
7770 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7772 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7773 modify_after_mirror = 1;
7774 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7775 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7777 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7778 ret = flow_dv_validate_action_modify_ipv6_dscp
7785 /* Count all modify-header actions as one action. */
7786 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7788 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7789 modify_after_mirror = 1;
7790 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7791 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7793 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7794 ret = flow_dv_validate_action_sample(&action_flags,
7803 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7806 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7807 ret = flow_dv_validate_action_modify_field(dev,
7814 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7815 modify_after_mirror = 1;
7816 /* Count all modify-header actions as one action. */
7817 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7819 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7822 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7823 ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7828 action_flags |= MLX5_FLOW_ACTION_CT;
7830 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7831 /* tunnel offload action was processed before
7832 * list it here as a supported type
7836 return rte_flow_error_set(error, ENOTSUP,
7837 RTE_FLOW_ERROR_TYPE_ACTION,
7839 "action not supported");
7843 * Validate actions in flow rules
7844 * - Explicit decap action is prohibited by the tunnel offload API.
7845 * - Drop action in tunnel steer rule is prohibited by the API.
7846 * - Application cannot use MARK action because it's value can mask
7847 * tunnel default miss notification.
7848 * - JUMP in tunnel match rule has no support in current PMD
7850 * - TAG & META are reserved for future uses.
7852 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7853 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP |
7854 MLX5_FLOW_ACTION_MARK |
7855 MLX5_FLOW_ACTION_SET_TAG |
7856 MLX5_FLOW_ACTION_SET_META |
7857 MLX5_FLOW_ACTION_DROP;
7859 if (action_flags & bad_actions_mask)
7860 return rte_flow_error_set
7862 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7863 "Invalid RTE action in tunnel "
7865 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7866 return rte_flow_error_set
7868 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7869 "tunnel set decap rule must terminate "
7872 return rte_flow_error_set
7874 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7875 "tunnel flows for ingress traffic only");
7877 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7878 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP |
7879 MLX5_FLOW_ACTION_MARK |
7880 MLX5_FLOW_ACTION_SET_TAG |
7881 MLX5_FLOW_ACTION_SET_META;
7883 if (action_flags & bad_actions_mask)
7884 return rte_flow_error_set
7886 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7887 "Invalid RTE action in tunnel "
7891 * Validate the drop action mutual exclusion with other actions.
7892 * Drop action is mutually-exclusive with any other action, except for
7894 * Drop action compatibility with tunnel offload was already validated.
7896 if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7897 MLX5_FLOW_ACTION_TUNNEL_MATCH));
7898 else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7899 (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7900 return rte_flow_error_set(error, EINVAL,
7901 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7902 "Drop action is mutually-exclusive "
7903 "with any other action, except for "
7905 /* Eswitch has few restrictions on using items and actions */
7906 if (attr->transfer) {
7907 if (!mlx5_flow_ext_mreg_supported(dev) &&
7908 action_flags & MLX5_FLOW_ACTION_FLAG)
7909 return rte_flow_error_set(error, ENOTSUP,
7910 RTE_FLOW_ERROR_TYPE_ACTION,
7912 "unsupported action FLAG");
7913 if (!mlx5_flow_ext_mreg_supported(dev) &&
7914 action_flags & MLX5_FLOW_ACTION_MARK)
7915 return rte_flow_error_set(error, ENOTSUP,
7916 RTE_FLOW_ERROR_TYPE_ACTION,
7918 "unsupported action MARK");
7919 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7920 return rte_flow_error_set(error, ENOTSUP,
7921 RTE_FLOW_ERROR_TYPE_ACTION,
7923 "unsupported action QUEUE");
7924 if (action_flags & MLX5_FLOW_ACTION_RSS)
7925 return rte_flow_error_set(error, ENOTSUP,
7926 RTE_FLOW_ERROR_TYPE_ACTION,
7928 "unsupported action RSS");
7929 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7930 return rte_flow_error_set(error, EINVAL,
7931 RTE_FLOW_ERROR_TYPE_ACTION,
7933 "no fate action is found");
7935 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7936 return rte_flow_error_set(error, EINVAL,
7937 RTE_FLOW_ERROR_TYPE_ACTION,
7939 "no fate action is found");
7942 * Continue validation for Xcap and VLAN actions.
7943 * If hairpin is working in explicit TX rule mode, there is no actions
7944 * splitting and the validation of hairpin ingress flow should be the
7945 * same as other standard flows.
7947 if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7948 MLX5_FLOW_VLAN_ACTIONS)) &&
7949 (queue_index == 0xFFFF ||
7950 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7951 ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7952 conf->tx_explicit != 0))) {
7953 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7954 MLX5_FLOW_XCAP_ACTIONS)
7955 return rte_flow_error_set(error, ENOTSUP,
7956 RTE_FLOW_ERROR_TYPE_ACTION,
7957 NULL, "encap and decap "
7958 "combination aren't supported");
7959 if (!attr->transfer && attr->ingress) {
7960 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7961 return rte_flow_error_set
7963 RTE_FLOW_ERROR_TYPE_ACTION,
7964 NULL, "encap is not supported"
7965 " for ingress traffic");
7966 else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7967 return rte_flow_error_set
7969 RTE_FLOW_ERROR_TYPE_ACTION,
7970 NULL, "push VLAN action not "
7971 "supported for ingress");
7972 else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7973 MLX5_FLOW_VLAN_ACTIONS)
7974 return rte_flow_error_set
7976 RTE_FLOW_ERROR_TYPE_ACTION,
7977 NULL, "no support for "
7978 "multiple VLAN actions");
7981 if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7982 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7983 ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7985 return rte_flow_error_set
7987 RTE_FLOW_ERROR_TYPE_ACTION,
7988 NULL, "fate action not supported for "
7989 "meter with policy");
7991 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7992 return rte_flow_error_set
7994 RTE_FLOW_ERROR_TYPE_ACTION,
7995 NULL, "modify header action in egress "
7996 "cannot be done before meter action");
7997 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7998 return rte_flow_error_set
8000 RTE_FLOW_ERROR_TYPE_ACTION,
8001 NULL, "encap action in egress "
8002 "cannot be done before meter action");
8003 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
8004 return rte_flow_error_set
8006 RTE_FLOW_ERROR_TYPE_ACTION,
8007 NULL, "push vlan action in egress "
8008 "cannot be done before meter action");
8012 * Hairpin flow will add one more TAG action in TX implicit mode.
8013 * In TX explicit mode, there will be no hairpin flow ID.
8016 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8017 /* extra metadata enabled: one more TAG action will be add. */
8018 if (dev_conf->dv_flow_en &&
8019 dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
8020 mlx5_flow_ext_mreg_supported(dev))
8021 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8023 flow_dv_modify_hdr_action_max(dev, is_root)) {
8024 return rte_flow_error_set(error, ENOTSUP,
8025 RTE_FLOW_ERROR_TYPE_ACTION,
8026 NULL, "too many header modify"
8027 " actions to support");
8029 /* Eswitch egress mirror and modify flow has limitation on CX5 */
8030 if (fdb_mirror_limit && modify_after_mirror)
8031 return rte_flow_error_set(error, EINVAL,
8032 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8033 "sample before modify action is not supported");
8038 * Internal preparation function. Allocates the DV flow size,
8039 * this size is constant.
8042 * Pointer to the rte_eth_dev structure.
8044 * Pointer to the flow attributes.
8046 * Pointer to the list of items.
8047 * @param[in] actions
8048 * Pointer to the list of actions.
8050 * Pointer to the error structure.
8053 * Pointer to mlx5_flow object on success,
8054 * otherwise NULL and rte_errno is set.
8056 static struct mlx5_flow *
8057 flow_dv_prepare(struct rte_eth_dev *dev,
8058 const struct rte_flow_attr *attr __rte_unused,
8059 const struct rte_flow_item items[] __rte_unused,
8060 const struct rte_flow_action actions[] __rte_unused,
8061 struct rte_flow_error *error)
8063 uint32_t handle_idx = 0;
8064 struct mlx5_flow *dev_flow;
8065 struct mlx5_flow_handle *dev_handle;
8066 struct mlx5_priv *priv = dev->data->dev_private;
8067 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8070 wks->skip_matcher_reg = 0;
8072 wks->final_policy = NULL;
8073 /* In case of corrupting the memory. */
8074 if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8075 rte_flow_error_set(error, ENOSPC,
8076 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8077 "not free temporary device flow");
8080 dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8083 rte_flow_error_set(error, ENOMEM,
8084 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8085 "not enough memory to create flow handle");
8088 MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8089 dev_flow = &wks->flows[wks->flow_idx++];
8090 memset(dev_flow, 0, sizeof(*dev_flow));
8091 dev_flow->handle = dev_handle;
8092 dev_flow->handle_idx = handle_idx;
8093 dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8094 dev_flow->ingress = attr->ingress;
8095 dev_flow->dv.transfer = attr->transfer;
8099 #ifdef RTE_LIBRTE_MLX5_DEBUG
8101 * Sanity check for match mask and value. Similar to check_valid_spec() in
8102 * kernel driver. If unmasked bit is present in value, it returns failure.
8105 * pointer to match mask buffer.
8106 * @param match_value
8107 * pointer to match value buffer.
8110 * 0 if valid, -EINVAL otherwise.
8113 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8115 uint8_t *m = match_mask;
8116 uint8_t *v = match_value;
8119 for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8122 "match_value differs from match_criteria"
8123 " %p[%u] != %p[%u]",
8124 match_value, i, match_mask, i);
8133 * Add match of ip_version.
8137 * @param[in] headers_v
8138 * Values header pointer.
8139 * @param[in] headers_m
8140 * Masks header pointer.
8141 * @param[in] ip_version
8142 * The IP version to set.
8145 flow_dv_set_match_ip_version(uint32_t group,
8151 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8153 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8155 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8156 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8157 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8161 * Add Ethernet item to matcher and to the value.
8163 * @param[in, out] matcher
8165 * @param[in, out] key
8166 * Flow matcher value.
8168 * Flow pattern to translate.
8170 * Item is inner pattern.
8173 flow_dv_translate_item_eth(void *matcher, void *key,
8174 const struct rte_flow_item *item, int inner,
8177 const struct rte_flow_item_eth *eth_m = item->mask;
8178 const struct rte_flow_item_eth *eth_v = item->spec;
8179 const struct rte_flow_item_eth nic_mask = {
8180 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8181 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8182 .type = RTE_BE16(0xffff),
8195 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8197 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8199 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8201 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8203 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8204 ð_m->dst, sizeof(eth_m->dst));
8205 /* The value must be in the range of the mask. */
8206 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8207 for (i = 0; i < sizeof(eth_m->dst); ++i)
8208 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8209 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8210 ð_m->src, sizeof(eth_m->src));
8211 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8212 /* The value must be in the range of the mask. */
8213 for (i = 0; i < sizeof(eth_m->dst); ++i)
8214 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8216 * HW supports match on one Ethertype, the Ethertype following the last
8217 * VLAN tag of the packet (see PRM).
8218 * Set match on ethertype only if ETH header is not followed by VLAN.
8219 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8220 * ethertype, and use ip_version field instead.
8221 * eCPRI over Ether layer will use type value 0xAEFE.
8223 if (eth_m->type == 0xFFFF) {
8224 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8225 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8226 switch (eth_v->type) {
8227 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8228 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8230 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8231 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8232 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8234 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8235 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8237 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8238 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8244 if (eth_m->has_vlan) {
8245 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8246 if (eth_v->has_vlan) {
8248 * Here, when also has_more_vlan field in VLAN item is
8249 * not set, only single-tagged packets will be matched.
8251 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8255 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8256 rte_be_to_cpu_16(eth_m->type));
8257 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8258 *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8262 * Add VLAN item to matcher and to the value.
8264 * @param[in, out] dev_flow
8266 * @param[in, out] matcher
8268 * @param[in, out] key
8269 * Flow matcher value.
8271 * Flow pattern to translate.
8273 * Item is inner pattern.
8276 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8277 void *matcher, void *key,
8278 const struct rte_flow_item *item,
8279 int inner, uint32_t group)
8281 const struct rte_flow_item_vlan *vlan_m = item->mask;
8282 const struct rte_flow_item_vlan *vlan_v = item->spec;
8289 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8291 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8293 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8295 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8297 * This is workaround, masks are not supported,
8298 * and pre-validated.
8301 dev_flow->handle->vf_vlan.tag =
8302 rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8305 * When VLAN item exists in flow, mark packet as tagged,
8306 * even if TCI is not specified.
8308 if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8309 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8310 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8315 vlan_m = &rte_flow_item_vlan_mask;
8316 tci_m = rte_be_to_cpu_16(vlan_m->tci);
8317 tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8318 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8319 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8320 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8321 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8322 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8323 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8325 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8326 * ethertype, and use ip_version field instead.
8328 if (vlan_m->inner_type == 0xFFFF) {
8329 switch (vlan_v->inner_type) {
8330 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8331 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8332 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8333 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8335 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8336 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8338 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8339 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8345 if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8346 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8347 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8348 /* Only one vlan_tag bit can be set. */
8349 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8352 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8353 rte_be_to_cpu_16(vlan_m->inner_type));
8354 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8355 rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8359 * Add IPV4 item to matcher and to the value.
8361 * @param[in, out] matcher
8363 * @param[in, out] key
8364 * Flow matcher value.
8366 * Flow pattern to translate.
8368 * Item is inner pattern.
8370 * The group to insert the rule.
8373 flow_dv_translate_item_ipv4(void *matcher, void *key,
8374 const struct rte_flow_item *item,
8375 int inner, uint32_t group)
8377 const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8378 const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8379 const struct rte_flow_item_ipv4 nic_mask = {
8381 .src_addr = RTE_BE32(0xffffffff),
8382 .dst_addr = RTE_BE32(0xffffffff),
8383 .type_of_service = 0xff,
8384 .next_proto_id = 0xff,
8385 .time_to_live = 0xff,
8392 uint8_t tos, ihl_m, ihl_v;
8395 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8397 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8399 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8401 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8403 flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8408 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8409 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8410 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8411 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8412 *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8413 *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8414 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8415 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8416 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8417 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8418 *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8419 *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8420 tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8421 ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8422 ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8423 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8424 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8425 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8426 ipv4_m->hdr.type_of_service);
8427 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8428 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8429 ipv4_m->hdr.type_of_service >> 2);
8430 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8431 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8432 ipv4_m->hdr.next_proto_id);
8433 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8434 ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8435 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8436 ipv4_m->hdr.time_to_live);
8437 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8438 ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8439 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8440 !!(ipv4_m->hdr.fragment_offset));
8441 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8442 !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8446 * Add IPV6 item to matcher and to the value.
8448 * @param[in, out] matcher
8450 * @param[in, out] key
8451 * Flow matcher value.
8453 * Flow pattern to translate.
8455 * Item is inner pattern.
8457 * The group to insert the rule.
8460 flow_dv_translate_item_ipv6(void *matcher, void *key,
8461 const struct rte_flow_item *item,
8462 int inner, uint32_t group)
8464 const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8465 const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8466 const struct rte_flow_item_ipv6 nic_mask = {
8469 "\xff\xff\xff\xff\xff\xff\xff\xff"
8470 "\xff\xff\xff\xff\xff\xff\xff\xff",
8472 "\xff\xff\xff\xff\xff\xff\xff\xff"
8473 "\xff\xff\xff\xff\xff\xff\xff\xff",
8474 .vtc_flow = RTE_BE32(0xffffffff),
8481 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8482 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8491 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8493 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8495 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8497 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8499 flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8504 size = sizeof(ipv6_m->hdr.dst_addr);
8505 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8506 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8507 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8508 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8509 memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8510 for (i = 0; i < size; ++i)
8511 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8512 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8513 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8514 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8515 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8516 memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8517 for (i = 0; i < size; ++i)
8518 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8520 vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8521 vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8522 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8523 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8524 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8525 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8528 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8530 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8533 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8535 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8539 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8541 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8542 ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8544 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8545 ipv6_m->hdr.hop_limits);
8546 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8547 ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8548 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8549 !!(ipv6_m->has_frag_ext));
8550 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8551 !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8555 * Add IPV6 fragment extension item to matcher and to the value.
8557 * @param[in, out] matcher
8559 * @param[in, out] key
8560 * Flow matcher value.
8562 * Flow pattern to translate.
8564 * Item is inner pattern.
8567 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8568 const struct rte_flow_item *item,
8571 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8572 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8573 const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8575 .next_header = 0xff,
8576 .frag_data = RTE_BE16(0xffff),
8583 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8585 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8587 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8589 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8591 /* IPv6 fragment extension item exists, so packet is IP fragment. */
8592 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8593 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8594 if (!ipv6_frag_ext_v)
8596 if (!ipv6_frag_ext_m)
8597 ipv6_frag_ext_m = &nic_mask;
8598 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8599 ipv6_frag_ext_m->hdr.next_header);
8600 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8601 ipv6_frag_ext_v->hdr.next_header &
8602 ipv6_frag_ext_m->hdr.next_header);
8606 * Add TCP item to matcher and to the value.
8608 * @param[in, out] matcher
8610 * @param[in, out] key
8611 * Flow matcher value.
8613 * Flow pattern to translate.
8615 * Item is inner pattern.
8618 flow_dv_translate_item_tcp(void *matcher, void *key,
8619 const struct rte_flow_item *item,
8622 const struct rte_flow_item_tcp *tcp_m = item->mask;
8623 const struct rte_flow_item_tcp *tcp_v = item->spec;
8628 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8630 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8632 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8634 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8636 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8637 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8641 tcp_m = &rte_flow_item_tcp_mask;
8642 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8643 rte_be_to_cpu_16(tcp_m->hdr.src_port));
8644 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8645 rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8646 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8647 rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8648 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8649 rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8650 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8651 tcp_m->hdr.tcp_flags);
8652 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8653 (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8657 * Add UDP item to matcher and to the value.
8659 * @param[in, out] matcher
8661 * @param[in, out] key
8662 * Flow matcher value.
8664 * Flow pattern to translate.
8666 * Item is inner pattern.
8669 flow_dv_translate_item_udp(void *matcher, void *key,
8670 const struct rte_flow_item *item,
8673 const struct rte_flow_item_udp *udp_m = item->mask;
8674 const struct rte_flow_item_udp *udp_v = item->spec;
8679 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8681 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8683 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8685 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8687 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8688 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8692 udp_m = &rte_flow_item_udp_mask;
8693 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8694 rte_be_to_cpu_16(udp_m->hdr.src_port));
8695 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8696 rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8697 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8698 rte_be_to_cpu_16(udp_m->hdr.dst_port));
8699 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8700 rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8704 * Add GRE optional Key item to matcher and to the value.
8706 * @param[in, out] matcher
8708 * @param[in, out] key
8709 * Flow matcher value.
8711 * Flow pattern to translate.
8713 * Item is inner pattern.
8716 flow_dv_translate_item_gre_key(void *matcher, void *key,
8717 const struct rte_flow_item *item)
8719 const rte_be32_t *key_m = item->mask;
8720 const rte_be32_t *key_v = item->spec;
8721 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8722 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8723 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8725 /* GRE K bit must be on and should already be validated */
8726 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8727 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8731 key_m = &gre_key_default_mask;
8732 MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8733 rte_be_to_cpu_32(*key_m) >> 8);
8734 MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8735 rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8736 MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8737 rte_be_to_cpu_32(*key_m) & 0xFF);
8738 MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8739 rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8743 * Add GRE item to matcher and to the value.
8745 * @param[in, out] matcher
8747 * @param[in, out] key
8748 * Flow matcher value.
8750 * Flow pattern to translate.
8751 * @param[in] pattern_flags
8752 * Accumulated pattern flags.
8755 flow_dv_translate_item_gre(void *matcher, void *key,
8756 const struct rte_flow_item *item,
8757 uint64_t pattern_flags)
8759 static const struct rte_flow_item_gre empty_gre = {0,};
8760 const struct rte_flow_item_gre *gre_m = item->mask;
8761 const struct rte_flow_item_gre *gre_v = item->spec;
8762 void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
8763 void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8764 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8765 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8772 uint16_t s_present:1;
8773 uint16_t k_present:1;
8774 uint16_t rsvd_bit1:1;
8775 uint16_t c_present:1;
8779 } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8780 uint16_t protocol_m, protocol_v;
8782 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8783 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8789 gre_m = &rte_flow_item_gre_mask;
8791 gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8792 gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8793 MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8794 gre_crks_rsvd0_ver_m.c_present);
8795 MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8796 gre_crks_rsvd0_ver_v.c_present &
8797 gre_crks_rsvd0_ver_m.c_present);
8798 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8799 gre_crks_rsvd0_ver_m.k_present);
8800 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8801 gre_crks_rsvd0_ver_v.k_present &
8802 gre_crks_rsvd0_ver_m.k_present);
8803 MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8804 gre_crks_rsvd0_ver_m.s_present);
8805 MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8806 gre_crks_rsvd0_ver_v.s_present &
8807 gre_crks_rsvd0_ver_m.s_present);
8808 protocol_m = rte_be_to_cpu_16(gre_m->protocol);
8809 protocol_v = rte_be_to_cpu_16(gre_v->protocol);
8811 /* Force next protocol to prevent matchers duplication */
8812 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
8814 protocol_m = 0xFFFF;
8816 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, protocol_m);
8817 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8818 protocol_m & protocol_v);
8822 * Add NVGRE item to matcher and to the value.
8824 * @param[in, out] matcher
8826 * @param[in, out] key
8827 * Flow matcher value.
8829 * Flow pattern to translate.
8830 * @param[in] pattern_flags
8831 * Accumulated pattern flags.
8834 flow_dv_translate_item_nvgre(void *matcher, void *key,
8835 const struct rte_flow_item *item,
8836 unsigned long pattern_flags)
8838 const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8839 const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8840 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8841 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8842 const char *tni_flow_id_m;
8843 const char *tni_flow_id_v;
8849 /* For NVGRE, GRE header fields must be set with defined values. */
8850 const struct rte_flow_item_gre gre_spec = {
8851 .c_rsvd0_ver = RTE_BE16(0x2000),
8852 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8854 const struct rte_flow_item_gre gre_mask = {
8855 .c_rsvd0_ver = RTE_BE16(0xB000),
8856 .protocol = RTE_BE16(UINT16_MAX),
8858 const struct rte_flow_item gre_item = {
8863 flow_dv_translate_item_gre(matcher, key, &gre_item, pattern_flags);
8867 nvgre_m = &rte_flow_item_nvgre_mask;
8868 tni_flow_id_m = (const char *)nvgre_m->tni;
8869 tni_flow_id_v = (const char *)nvgre_v->tni;
8870 size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8871 gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8872 gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8873 memcpy(gre_key_m, tni_flow_id_m, size);
8874 for (i = 0; i < size; ++i)
8875 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8879 * Add VXLAN item to matcher and to the value.
8882 * Pointer to the Ethernet device structure.
8884 * Flow rule attributes.
8885 * @param[in, out] matcher
8887 * @param[in, out] key
8888 * Flow matcher value.
8890 * Flow pattern to translate.
8892 * Item is inner pattern.
8895 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8896 const struct rte_flow_attr *attr,
8897 void *matcher, void *key,
8898 const struct rte_flow_item *item,
8901 const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8902 const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8907 uint32_t *tunnel_header_v;
8908 uint32_t *tunnel_header_m;
8910 struct mlx5_priv *priv = dev->data->dev_private;
8911 const struct rte_flow_item_vxlan nic_mask = {
8912 .vni = "\xff\xff\xff",
8917 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8919 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8921 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8923 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8925 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8926 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8927 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8928 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8929 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8931 dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
8935 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8936 (attr->group && !priv->sh->misc5_cap))
8937 vxlan_m = &rte_flow_item_vxlan_mask;
8939 vxlan_m = &nic_mask;
8941 if ((priv->sh->steering_format_version ==
8942 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
8943 dport != MLX5_UDP_PORT_VXLAN) ||
8944 (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8945 ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8952 misc_m = MLX5_ADDR_OF(fte_match_param,
8953 matcher, misc_parameters);
8954 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8955 size = sizeof(vxlan_m->vni);
8956 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8957 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8958 memcpy(vni_m, vxlan_m->vni, size);
8959 for (i = 0; i < size; ++i)
8960 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8963 misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8964 misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8965 tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8968 tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8971 *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8972 (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8973 (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8974 if (*tunnel_header_v)
8975 *tunnel_header_m = vxlan_m->vni[0] |
8976 vxlan_m->vni[1] << 8 |
8977 vxlan_m->vni[2] << 16;
8979 *tunnel_header_m = 0x0;
8980 *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8981 if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8982 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8986 * Add VXLAN-GPE item to matcher and to the value.
8988 * @param[in, out] matcher
8990 * @param[in, out] key
8991 * Flow matcher value.
8993 * Flow pattern to translate.
8995 * Item is inner pattern.
8999 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
9000 const struct rte_flow_item *item,
9001 const uint64_t pattern_flags)
9003 static const struct rte_flow_item_vxlan_gpe dummy_vxlan_gpe_hdr = {0, };
9004 const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
9005 const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
9006 /* The item was validated to be on the outer side */
9007 void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9008 void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9010 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
9012 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9014 MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
9016 MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
9017 int i, size = sizeof(vxlan_m->vni);
9018 uint8_t flags_m = 0xff;
9019 uint8_t flags_v = 0xc;
9020 uint8_t m_protocol, v_protocol;
9022 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9023 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9024 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9025 MLX5_UDP_PORT_VXLAN_GPE);
9028 vxlan_v = &dummy_vxlan_gpe_hdr;
9029 vxlan_m = &dummy_vxlan_gpe_hdr;
9032 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
9034 memcpy(vni_m, vxlan_m->vni, size);
9035 for (i = 0; i < size; ++i)
9036 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9037 if (vxlan_m->flags) {
9038 flags_m = vxlan_m->flags;
9039 flags_v = vxlan_v->flags;
9041 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
9042 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
9043 m_protocol = vxlan_m->protocol;
9044 v_protocol = vxlan_v->protocol;
9046 /* Force next protocol to ensure next headers parsing. */
9047 if (pattern_flags & MLX5_FLOW_LAYER_INNER_L2)
9048 v_protocol = RTE_VXLAN_GPE_TYPE_ETH;
9049 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4)
9050 v_protocol = RTE_VXLAN_GPE_TYPE_IPV4;
9051 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)
9052 v_protocol = RTE_VXLAN_GPE_TYPE_IPV6;
9056 MLX5_SET(fte_match_set_misc3, misc_m,
9057 outer_vxlan_gpe_next_protocol, m_protocol);
9058 MLX5_SET(fte_match_set_misc3, misc_v,
9059 outer_vxlan_gpe_next_protocol, m_protocol & v_protocol);
9063 * Add Geneve item to matcher and to the value.
9065 * @param[in, out] matcher
9067 * @param[in, out] key
9068 * Flow matcher value.
9070 * Flow pattern to translate.
9072 * Item is inner pattern.
9076 flow_dv_translate_item_geneve(void *matcher, void *key,
9077 const struct rte_flow_item *item,
9078 uint64_t pattern_flags)
9080 static const struct rte_flow_item_geneve empty_geneve = {0,};
9081 const struct rte_flow_item_geneve *geneve_m = item->mask;
9082 const struct rte_flow_item_geneve *geneve_v = item->spec;
9083 /* GENEVE flow item validation allows single tunnel item */
9084 void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9085 void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9086 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9087 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9090 char *vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9091 char *vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9092 size_t size = sizeof(geneve_m->vni), i;
9093 uint16_t protocol_m, protocol_v;
9095 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9096 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9097 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9098 MLX5_UDP_PORT_GENEVE);
9101 geneve_v = &empty_geneve;
9102 geneve_m = &empty_geneve;
9105 geneve_m = &rte_flow_item_geneve_mask;
9107 memcpy(vni_m, geneve_m->vni, size);
9108 for (i = 0; i < size; ++i)
9109 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9110 gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9111 gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9112 MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9113 MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9114 MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9115 MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9116 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9117 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9118 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9119 MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9120 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9121 protocol_m = rte_be_to_cpu_16(geneve_m->protocol);
9122 protocol_v = rte_be_to_cpu_16(geneve_v->protocol);
9124 /* Force next protocol to prevent matchers duplication */
9125 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
9127 protocol_m = 0xFFFF;
9129 MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type, protocol_m);
9130 MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9131 protocol_m & protocol_v);
9135 * Create Geneve TLV option resource.
9137 * @param dev[in, out]
9138 * Pointer to rte_eth_dev structure.
9139 * @param[in, out] tag_be24
9140 * Tag value in big endian then R-shift 8.
9141 * @parm[in, out] dev_flow
9142 * Pointer to the dev_flow.
9144 * pointer to error structure.
9147 * 0 on success otherwise -errno and errno is set.
9151 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9152 const struct rte_flow_item *item,
9153 struct rte_flow_error *error)
9155 struct mlx5_priv *priv = dev->data->dev_private;
9156 struct mlx5_dev_ctx_shared *sh = priv->sh;
9157 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9158 sh->geneve_tlv_option_resource;
9159 struct mlx5_devx_obj *obj;
9160 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9165 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9166 if (geneve_opt_resource != NULL) {
9167 if (geneve_opt_resource->option_class ==
9168 geneve_opt_v->option_class &&
9169 geneve_opt_resource->option_type ==
9170 geneve_opt_v->option_type &&
9171 geneve_opt_resource->length ==
9172 geneve_opt_v->option_len) {
9173 /* We already have GENEVE TLV option obj allocated. */
9174 __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9177 ret = rte_flow_error_set(error, ENOMEM,
9178 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9179 "Only one GENEVE TLV option supported");
9183 /* Create a GENEVE TLV object and resource. */
9184 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->cdev->ctx,
9185 geneve_opt_v->option_class,
9186 geneve_opt_v->option_type,
9187 geneve_opt_v->option_len);
9189 ret = rte_flow_error_set(error, ENODATA,
9190 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9191 "Failed to create GENEVE TLV Devx object");
9194 sh->geneve_tlv_option_resource =
9195 mlx5_malloc(MLX5_MEM_ZERO,
9196 sizeof(*geneve_opt_resource),
9198 if (!sh->geneve_tlv_option_resource) {
9199 claim_zero(mlx5_devx_cmd_destroy(obj));
9200 ret = rte_flow_error_set(error, ENOMEM,
9201 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9202 "GENEVE TLV object memory allocation failed");
9205 geneve_opt_resource = sh->geneve_tlv_option_resource;
9206 geneve_opt_resource->obj = obj;
9207 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9208 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9209 geneve_opt_resource->length = geneve_opt_v->option_len;
9210 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9214 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9219 * Add Geneve TLV option item to matcher.
9221 * @param[in, out] dev
9222 * Pointer to rte_eth_dev structure.
9223 * @param[in, out] matcher
9225 * @param[in, out] key
9226 * Flow matcher value.
9228 * Flow pattern to translate.
9230 * Pointer to error structure.
9233 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9234 void *key, const struct rte_flow_item *item,
9235 struct rte_flow_error *error)
9237 const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9238 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9239 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9240 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9241 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9243 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9244 rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9250 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9251 ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9254 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9258 * Set the option length in GENEVE header if not requested.
9259 * The GENEVE TLV option length is expressed by the option length field
9260 * in the GENEVE header.
9261 * If the option length was not requested but the GENEVE TLV option item
9262 * is present we set the option length field implicitly.
9264 if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9265 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9266 MLX5_GENEVE_OPTLEN_MASK);
9267 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9268 geneve_opt_v->option_len + 1);
9270 MLX5_SET(fte_match_set_misc, misc_m, geneve_tlv_option_0_exist, 1);
9271 MLX5_SET(fte_match_set_misc, misc_v, geneve_tlv_option_0_exist, 1);
9273 if (geneve_opt_v->data) {
9274 memcpy(&opt_data_key, geneve_opt_v->data,
9275 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9276 sizeof(opt_data_key)));
9277 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9278 sizeof(opt_data_key));
9279 memcpy(&opt_data_mask, geneve_opt_m->data,
9280 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9281 sizeof(opt_data_mask)));
9282 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9283 sizeof(opt_data_mask));
9284 MLX5_SET(fte_match_set_misc3, misc3_m,
9285 geneve_tlv_option_0_data,
9286 rte_be_to_cpu_32(opt_data_mask));
9287 MLX5_SET(fte_match_set_misc3, misc3_v,
9288 geneve_tlv_option_0_data,
9289 rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9295 * Add MPLS item to matcher and to the value.
9297 * @param[in, out] matcher
9299 * @param[in, out] key
9300 * Flow matcher value.
9302 * Flow pattern to translate.
9303 * @param[in] prev_layer
9304 * The protocol layer indicated in previous item.
9306 * Item is inner pattern.
9309 flow_dv_translate_item_mpls(void *matcher, void *key,
9310 const struct rte_flow_item *item,
9311 uint64_t prev_layer,
9314 const uint32_t *in_mpls_m = item->mask;
9315 const uint32_t *in_mpls_v = item->spec;
9316 uint32_t *out_mpls_m = 0;
9317 uint32_t *out_mpls_v = 0;
9318 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9319 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9320 void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9322 void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9323 void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9324 void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9326 switch (prev_layer) {
9327 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9328 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9329 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
9331 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9332 MLX5_UDP_PORT_MPLS);
9335 case MLX5_FLOW_LAYER_GRE:
9337 case MLX5_FLOW_LAYER_GRE_KEY:
9338 if (!MLX5_GET16(fte_match_set_misc, misc_v, gre_protocol)) {
9339 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
9341 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9342 RTE_ETHER_TYPE_MPLS);
9351 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9352 switch (prev_layer) {
9353 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9355 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9356 outer_first_mpls_over_udp);
9358 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9359 outer_first_mpls_over_udp);
9361 case MLX5_FLOW_LAYER_GRE:
9363 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9364 outer_first_mpls_over_gre);
9366 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9367 outer_first_mpls_over_gre);
9370 /* Inner MPLS not over GRE is not supported. */
9373 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9377 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9383 if (out_mpls_m && out_mpls_v) {
9384 *out_mpls_m = *in_mpls_m;
9385 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9390 * Add metadata register item to matcher
9392 * @param[in, out] matcher
9394 * @param[in, out] key
9395 * Flow matcher value.
9396 * @param[in] reg_type
9397 * Type of device metadata register
9404 flow_dv_match_meta_reg(void *matcher, void *key,
9405 enum modify_reg reg_type,
9406 uint32_t data, uint32_t mask)
9409 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9411 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9417 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9418 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9421 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9422 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9426 * The metadata register C0 field might be divided into
9427 * source vport index and META item value, we should set
9428 * this field according to specified mask, not as whole one.
9430 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9432 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9433 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9436 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9439 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9440 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9443 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9444 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9447 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9448 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9451 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9452 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9455 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9456 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9459 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9460 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9463 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9464 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9473 * Add MARK item to matcher
9476 * The device to configure through.
9477 * @param[in, out] matcher
9479 * @param[in, out] key
9480 * Flow matcher value.
9482 * Flow pattern to translate.
9485 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9486 void *matcher, void *key,
9487 const struct rte_flow_item *item)
9489 struct mlx5_priv *priv = dev->data->dev_private;
9490 const struct rte_flow_item_mark *mark;
9494 mark = item->mask ? (const void *)item->mask :
9495 &rte_flow_item_mark_mask;
9496 mask = mark->id & priv->sh->dv_mark_mask;
9497 mark = (const void *)item->spec;
9499 value = mark->id & priv->sh->dv_mark_mask & mask;
9501 enum modify_reg reg;
9503 /* Get the metadata register index for the mark. */
9504 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9505 MLX5_ASSERT(reg > 0);
9506 if (reg == REG_C_0) {
9507 struct mlx5_priv *priv = dev->data->dev_private;
9508 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9509 uint32_t shl_c0 = rte_bsf32(msk_c0);
9515 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9520 * Add META item to matcher
9523 * The devich to configure through.
9524 * @param[in, out] matcher
9526 * @param[in, out] key
9527 * Flow matcher value.
9529 * Attributes of flow that includes this item.
9531 * Flow pattern to translate.
9534 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9535 void *matcher, void *key,
9536 const struct rte_flow_attr *attr,
9537 const struct rte_flow_item *item)
9539 const struct rte_flow_item_meta *meta_m;
9540 const struct rte_flow_item_meta *meta_v;
9542 meta_m = (const void *)item->mask;
9544 meta_m = &rte_flow_item_meta_mask;
9545 meta_v = (const void *)item->spec;
9548 uint32_t value = meta_v->data;
9549 uint32_t mask = meta_m->data;
9551 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9554 MLX5_ASSERT(reg != REG_NON);
9555 if (reg == REG_C_0) {
9556 struct mlx5_priv *priv = dev->data->dev_private;
9557 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9558 uint32_t shl_c0 = rte_bsf32(msk_c0);
9564 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9569 * Add vport metadata Reg C0 item to matcher
9571 * @param[in, out] matcher
9573 * @param[in, out] key
9574 * Flow matcher value.
9576 * Flow pattern to translate.
9579 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9580 uint32_t value, uint32_t mask)
9582 flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9586 * Add tag item to matcher
9589 * The devich to configure through.
9590 * @param[in, out] matcher
9592 * @param[in, out] key
9593 * Flow matcher value.
9595 * Flow pattern to translate.
9598 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9599 void *matcher, void *key,
9600 const struct rte_flow_item *item)
9602 const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9603 const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9604 uint32_t mask, value;
9607 value = tag_v->data;
9608 mask = tag_m ? tag_m->data : UINT32_MAX;
9609 if (tag_v->id == REG_C_0) {
9610 struct mlx5_priv *priv = dev->data->dev_private;
9611 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9612 uint32_t shl_c0 = rte_bsf32(msk_c0);
9618 flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9622 * Add TAG item to matcher
9625 * The devich to configure through.
9626 * @param[in, out] matcher
9628 * @param[in, out] key
9629 * Flow matcher value.
9631 * Flow pattern to translate.
9634 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9635 void *matcher, void *key,
9636 const struct rte_flow_item *item)
9638 const struct rte_flow_item_tag *tag_v = item->spec;
9639 const struct rte_flow_item_tag *tag_m = item->mask;
9640 enum modify_reg reg;
9643 tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9644 /* Get the metadata register index for the tag. */
9645 reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9646 MLX5_ASSERT(reg > 0);
9647 flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9651 * Add source vport match to the specified matcher.
9653 * @param[in, out] matcher
9655 * @param[in, out] key
9656 * Flow matcher value.
9658 * Source vport value to match
9663 flow_dv_translate_item_source_vport(void *matcher, void *key,
9664 int16_t port, uint16_t mask)
9666 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9667 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9669 MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9670 MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9674 * Translate port-id item to eswitch match on port-id.
9677 * The devich to configure through.
9678 * @param[in, out] matcher
9680 * @param[in, out] key
9681 * Flow matcher value.
9683 * Flow pattern to translate.
9688 * 0 on success, a negative errno value otherwise.
9691 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9692 void *key, const struct rte_flow_item *item,
9693 const struct rte_flow_attr *attr)
9695 const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9696 const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9697 struct mlx5_priv *priv;
9700 if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
9701 flow_dv_translate_item_source_vport(matcher, key,
9702 flow_dv_get_esw_manager_vport_id(dev), 0xffff);
9705 mask = pid_m ? pid_m->id : 0xffff;
9706 id = pid_v ? pid_v->id : dev->data->port_id;
9707 priv = mlx5_port_to_eswitch_info(id, item == NULL);
9711 * Translate to vport field or to metadata, depending on mode.
9712 * Kernel can use either misc.source_port or half of C0 metadata
9715 if (priv->vport_meta_mask) {
9717 * Provide the hint for SW steering library
9718 * to insert the flow into ingress domain and
9719 * save the extra vport match.
9721 if (mask == 0xffff && priv->vport_id == 0xffff &&
9722 priv->pf_bond < 0 && attr->transfer)
9723 flow_dv_translate_item_source_vport
9724 (matcher, key, priv->vport_id, mask);
9726 * We should always set the vport metadata register,
9727 * otherwise the SW steering library can drop
9728 * the rule if wire vport metadata value is not zero,
9729 * it depends on kernel configuration.
9731 flow_dv_translate_item_meta_vport(matcher, key,
9732 priv->vport_meta_tag,
9733 priv->vport_meta_mask);
9735 flow_dv_translate_item_source_vport(matcher, key,
9736 priv->vport_id, mask);
9742 * Add ICMP6 item to matcher and to the value.
9744 * @param[in, out] matcher
9746 * @param[in, out] key
9747 * Flow matcher value.
9749 * Flow pattern to translate.
9751 * Item is inner pattern.
9754 flow_dv_translate_item_icmp6(void *matcher, void *key,
9755 const struct rte_flow_item *item,
9758 const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9759 const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9762 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9764 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9766 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9768 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9770 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9772 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9774 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9775 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9779 icmp6_m = &rte_flow_item_icmp6_mask;
9780 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9781 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9782 icmp6_v->type & icmp6_m->type);
9783 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9784 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9785 icmp6_v->code & icmp6_m->code);
9789 * Add ICMP item to matcher and to the value.
9791 * @param[in, out] matcher
9793 * @param[in, out] key
9794 * Flow matcher value.
9796 * Flow pattern to translate.
9798 * Item is inner pattern.
9801 flow_dv_translate_item_icmp(void *matcher, void *key,
9802 const struct rte_flow_item *item,
9805 const struct rte_flow_item_icmp *icmp_m = item->mask;
9806 const struct rte_flow_item_icmp *icmp_v = item->spec;
9807 uint32_t icmp_header_data_m = 0;
9808 uint32_t icmp_header_data_v = 0;
9811 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9813 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9815 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9817 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9819 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9821 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9823 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9824 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9828 icmp_m = &rte_flow_item_icmp_mask;
9829 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9830 icmp_m->hdr.icmp_type);
9831 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9832 icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9833 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9834 icmp_m->hdr.icmp_code);
9835 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9836 icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9837 icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9838 icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9839 if (icmp_header_data_m) {
9840 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9841 icmp_header_data_v |=
9842 rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9843 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9844 icmp_header_data_m);
9845 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9846 icmp_header_data_v & icmp_header_data_m);
9851 * Add GTP item to matcher and to the value.
9853 * @param[in, out] matcher
9855 * @param[in, out] key
9856 * Flow matcher value.
9858 * Flow pattern to translate.
9860 * Item is inner pattern.
9863 flow_dv_translate_item_gtp(void *matcher, void *key,
9864 const struct rte_flow_item *item, int inner)
9866 const struct rte_flow_item_gtp *gtp_m = item->mask;
9867 const struct rte_flow_item_gtp *gtp_v = item->spec;
9870 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9872 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9873 uint16_t dport = RTE_GTPU_UDP_PORT;
9876 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9878 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9880 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9882 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9884 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9885 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9886 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9891 gtp_m = &rte_flow_item_gtp_mask;
9892 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9893 gtp_m->v_pt_rsv_flags);
9894 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9895 gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9896 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9897 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9898 gtp_v->msg_type & gtp_m->msg_type);
9899 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9900 rte_be_to_cpu_32(gtp_m->teid));
9901 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9902 rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9906 * Add GTP PSC item to matcher.
9908 * @param[in, out] matcher
9910 * @param[in, out] key
9911 * Flow matcher value.
9913 * Flow pattern to translate.
9916 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9917 const struct rte_flow_item *item)
9919 const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9920 const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9921 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9923 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9929 uint8_t next_ext_header_type;
9934 /* Always set E-flag match on one, regardless of GTP item settings. */
9935 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9936 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9937 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9938 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9939 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9940 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9941 /*Set next extension header type. */
9944 dw_2.next_ext_header_type = 0xff;
9945 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9946 rte_cpu_to_be_32(dw_2.w32));
9949 dw_2.next_ext_header_type = 0x85;
9950 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9951 rte_cpu_to_be_32(dw_2.w32));
9963 /*Set extension header PDU type and Qos. */
9965 gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9967 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->hdr.type);
9968 dw_0.qfi = gtp_psc_m->hdr.qfi;
9969 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9970 rte_cpu_to_be_32(dw_0.w32));
9972 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->hdr.type &
9973 gtp_psc_m->hdr.type);
9974 dw_0.qfi = gtp_psc_v->hdr.qfi & gtp_psc_m->hdr.qfi;
9975 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9976 rte_cpu_to_be_32(dw_0.w32));
9982 * Add eCPRI item to matcher and to the value.
9985 * The devich to configure through.
9986 * @param[in, out] matcher
9988 * @param[in, out] key
9989 * Flow matcher value.
9991 * Flow pattern to translate.
9992 * @param[in] last_item
9996 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9997 void *key, const struct rte_flow_item *item,
10000 struct mlx5_priv *priv = dev->data->dev_private;
10001 const struct rte_flow_item_ecpri *ecpri_m = item->mask;
10002 const struct rte_flow_item_ecpri *ecpri_v = item->spec;
10003 struct rte_ecpri_common_hdr common;
10004 void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
10005 misc_parameters_4);
10006 void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
10012 * In case of eCPRI over Ethernet, if EtherType is not specified,
10013 * match on eCPRI EtherType implicitly.
10015 if (last_item & MLX5_FLOW_LAYER_OUTER_L2) {
10016 void *hdrs_m, *hdrs_v, *l2m, *l2v;
10018 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
10019 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
10020 l2m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, ethertype);
10021 l2v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
10022 if (*(uint16_t *)l2m == 0 && *(uint16_t *)l2v == 0) {
10023 *(uint16_t *)l2m = UINT16_MAX;
10024 *(uint16_t *)l2v = RTE_BE16(RTE_ETHER_TYPE_ECPRI);
10030 ecpri_m = &rte_flow_item_ecpri_mask;
10032 * Maximal four DW samples are supported in a single matching now.
10033 * Two are used now for a eCPRI matching:
10034 * 1. Type: one byte, mask should be 0x00ff0000 in network order
10035 * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
10038 if (!ecpri_m->hdr.common.u32)
10040 samples = priv->sh->ecpri_parser.ids;
10041 /* Need to take the whole DW as the mask to fill the entry. */
10042 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10043 prog_sample_field_value_0);
10044 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10045 prog_sample_field_value_0);
10046 /* Already big endian (network order) in the header. */
10047 *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
10048 *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
10049 /* Sample#0, used for matching type, offset 0. */
10050 MLX5_SET(fte_match_set_misc4, misc4_m,
10051 prog_sample_field_id_0, samples[0]);
10052 /* It makes no sense to set the sample ID in the mask field. */
10053 MLX5_SET(fte_match_set_misc4, misc4_v,
10054 prog_sample_field_id_0, samples[0]);
10056 * Checking if message body part needs to be matched.
10057 * Some wildcard rules only matching type field should be supported.
10059 if (ecpri_m->hdr.dummy[0]) {
10060 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
10061 switch (common.type) {
10062 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
10063 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
10064 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
10065 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10066 prog_sample_field_value_1);
10067 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10068 prog_sample_field_value_1);
10069 *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
10070 *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
10071 ecpri_m->hdr.dummy[0];
10072 /* Sample#1, to match message body, offset 4. */
10073 MLX5_SET(fte_match_set_misc4, misc4_m,
10074 prog_sample_field_id_1, samples[1]);
10075 MLX5_SET(fte_match_set_misc4, misc4_v,
10076 prog_sample_field_id_1, samples[1]);
10079 /* Others, do not match any sample ID. */
10086 * Add connection tracking status item to matcher
10089 * The devich to configure through.
10090 * @param[in, out] matcher
10092 * @param[in, out] key
10093 * Flow matcher value.
10095 * Flow pattern to translate.
10098 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
10099 void *matcher, void *key,
10100 const struct rte_flow_item *item)
10102 uint32_t reg_value = 0;
10104 /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10105 uint32_t reg_mask = 0;
10106 const struct rte_flow_item_conntrack *spec = item->spec;
10107 const struct rte_flow_item_conntrack *mask = item->mask;
10109 struct rte_flow_error error;
10112 mask = &rte_flow_item_conntrack_mask;
10113 if (!spec || !mask->flags)
10115 flags = spec->flags & mask->flags;
10116 /* The conflict should be checked in the validation. */
10117 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10118 reg_value |= MLX5_CT_SYNDROME_VALID;
10119 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10120 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10121 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10122 reg_value |= MLX5_CT_SYNDROME_INVALID;
10123 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10124 reg_value |= MLX5_CT_SYNDROME_TRAP;
10125 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10126 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10127 if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10128 RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10129 RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10131 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10132 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10133 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10134 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10135 /* The REG_C_x value could be saved during startup. */
10136 reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10137 if (reg_id == REG_NON)
10139 flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10140 reg_value, reg_mask);
10144 flow_dv_translate_item_flex(struct rte_eth_dev *dev, void *matcher, void *key,
10145 const struct rte_flow_item *item,
10146 struct mlx5_flow *dev_flow, bool is_inner)
10148 const struct rte_flow_item_flex *spec =
10149 (const struct rte_flow_item_flex *)item->spec;
10150 int index = mlx5_flex_acquire_index(dev, spec->handle, false);
10152 MLX5_ASSERT(index >= 0 && index <= (int)(sizeof(uint32_t) * CHAR_BIT));
10155 if (!(dev_flow->handle->flex_item & RTE_BIT32(index))) {
10156 /* Don't count both inner and outer flex items in one rule. */
10157 if (mlx5_flex_acquire_index(dev, spec->handle, true) != index)
10158 MLX5_ASSERT(false);
10159 dev_flow->handle->flex_item |= RTE_BIT32(index);
10161 mlx5_flex_flow_translate_item(dev, matcher, key, item, is_inner);
10164 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10166 #define HEADER_IS_ZERO(match_criteria, headers) \
10167 !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers), \
10168 matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10171 * Calculate flow matcher enable bitmap.
10173 * @param match_criteria
10174 * Pointer to flow matcher criteria.
10177 * Bitmap of enabled fields.
10180 flow_dv_matcher_enable(uint32_t *match_criteria)
10182 uint8_t match_criteria_enable;
10184 match_criteria_enable =
10185 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10186 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10187 match_criteria_enable |=
10188 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10189 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10190 match_criteria_enable |=
10191 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10192 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10193 match_criteria_enable |=
10194 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10195 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10196 match_criteria_enable |=
10197 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10198 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10199 match_criteria_enable |=
10200 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10201 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10202 match_criteria_enable |=
10203 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10204 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10205 return match_criteria_enable;
10209 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10212 * Check flow matching criteria first, subtract misc5/4 length if flow
10213 * doesn't own misc5/4 parameters. In some old rdma-core releases,
10214 * misc5/4 are not supported, and matcher creation failure is expected
10215 * w/o subtraction. If misc5 is provided, misc4 must be counted in since
10216 * misc5 is right after misc4.
10218 if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10219 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10220 MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10221 if (!(match_criteria & (1 <<
10222 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10223 *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10228 static struct mlx5_list_entry *
10229 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10230 struct mlx5_list_entry *entry, void *cb_ctx)
10232 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10233 struct mlx5_flow_dv_matcher *ref = ctx->data;
10234 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10235 typeof(*tbl), tbl);
10236 struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10241 rte_flow_error_set(ctx->error, ENOMEM,
10242 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10243 "cannot create matcher");
10246 memcpy(resource, entry, sizeof(*resource));
10247 resource->tbl = &tbl->tbl;
10248 return &resource->entry;
10252 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10253 struct mlx5_list_entry *entry)
10258 struct mlx5_list_entry *
10259 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10261 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10262 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10263 struct rte_eth_dev *dev = ctx->dev;
10264 struct mlx5_flow_tbl_data_entry *tbl_data;
10265 struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10266 struct rte_flow_error *error = ctx->error;
10267 union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10268 struct mlx5_flow_tbl_resource *tbl;
10273 tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10275 rte_flow_error_set(error, ENOMEM,
10276 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10278 "cannot allocate flow table data entry");
10281 tbl_data->idx = idx;
10282 tbl_data->tunnel = tt_prm->tunnel;
10283 tbl_data->group_id = tt_prm->group_id;
10284 tbl_data->external = !!tt_prm->external;
10285 tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10286 tbl_data->is_egress = !!key.is_egress;
10287 tbl_data->is_transfer = !!key.is_fdb;
10288 tbl_data->dummy = !!key.dummy;
10289 tbl_data->level = key.level;
10290 tbl_data->id = key.id;
10291 tbl = &tbl_data->tbl;
10293 return &tbl_data->entry;
10295 domain = sh->fdb_domain;
10296 else if (key.is_egress)
10297 domain = sh->tx_domain;
10299 domain = sh->rx_domain;
10300 ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10302 rte_flow_error_set(error, ENOMEM,
10303 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10304 NULL, "cannot create flow table object");
10305 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10308 if (key.level != 0) {
10309 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10310 (tbl->obj, &tbl_data->jump.action);
10312 rte_flow_error_set(error, ENOMEM,
10313 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10315 "cannot create flow jump action");
10316 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10317 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10321 MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10322 key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10323 key.level, key.id);
10324 tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10325 flow_dv_matcher_create_cb,
10326 flow_dv_matcher_match_cb,
10327 flow_dv_matcher_remove_cb,
10328 flow_dv_matcher_clone_cb,
10329 flow_dv_matcher_clone_free_cb);
10330 if (!tbl_data->matchers) {
10331 rte_flow_error_set(error, ENOMEM,
10332 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10334 "cannot create tbl matcher list");
10335 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10336 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10337 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10340 return &tbl_data->entry;
10344 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10347 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10348 struct mlx5_flow_tbl_data_entry *tbl_data =
10349 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10350 union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10352 return tbl_data->level != key.level ||
10353 tbl_data->id != key.id ||
10354 tbl_data->dummy != key.dummy ||
10355 tbl_data->is_transfer != !!key.is_fdb ||
10356 tbl_data->is_egress != !!key.is_egress;
10359 struct mlx5_list_entry *
10360 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10363 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10364 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10365 struct mlx5_flow_tbl_data_entry *tbl_data;
10366 struct rte_flow_error *error = ctx->error;
10369 tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10371 rte_flow_error_set(error, ENOMEM,
10372 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10374 "cannot allocate flow table data entry");
10377 memcpy(tbl_data, oentry, sizeof(*tbl_data));
10378 tbl_data->idx = idx;
10379 return &tbl_data->entry;
10383 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10385 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10386 struct mlx5_flow_tbl_data_entry *tbl_data =
10387 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10389 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10393 * Get a flow table.
10395 * @param[in, out] dev
10396 * Pointer to rte_eth_dev structure.
10397 * @param[in] table_level
10398 * Table level to use.
10399 * @param[in] egress
10400 * Direction of the table.
10401 * @param[in] transfer
10402 * E-Switch or NIC flow.
10404 * Dummy entry for dv API.
10405 * @param[in] table_id
10407 * @param[out] error
10408 * pointer to error structure.
10411 * Returns tables resource based on the index, NULL in case of failed.
10413 struct mlx5_flow_tbl_resource *
10414 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10415 uint32_t table_level, uint8_t egress,
10418 const struct mlx5_flow_tunnel *tunnel,
10419 uint32_t group_id, uint8_t dummy,
10421 struct rte_flow_error *error)
10423 struct mlx5_priv *priv = dev->data->dev_private;
10424 union mlx5_flow_tbl_key table_key = {
10426 .level = table_level,
10430 .is_fdb = !!transfer,
10431 .is_egress = !!egress,
10434 struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10436 .group_id = group_id,
10437 .external = external,
10439 struct mlx5_flow_cb_ctx ctx = {
10442 .data = &table_key.v64,
10445 struct mlx5_list_entry *entry;
10446 struct mlx5_flow_tbl_data_entry *tbl_data;
10448 entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10450 rte_flow_error_set(error, ENOMEM,
10451 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10452 "cannot get table");
10455 DRV_LOG(DEBUG, "table_level %u table_id %u "
10456 "tunnel %u group %u registered.",
10457 table_level, table_id,
10458 tunnel ? tunnel->tunnel_id : 0, group_id);
10459 tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10460 return &tbl_data->tbl;
10464 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10466 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10467 struct mlx5_flow_tbl_data_entry *tbl_data =
10468 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10470 MLX5_ASSERT(entry && sh);
10471 if (tbl_data->jump.action)
10472 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10473 if (tbl_data->tbl.obj)
10474 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10475 if (tbl_data->tunnel_offload && tbl_data->external) {
10476 struct mlx5_list_entry *he;
10477 struct mlx5_hlist *tunnel_grp_hash;
10478 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10479 union tunnel_tbl_key tunnel_key = {
10480 .tunnel_id = tbl_data->tunnel ?
10481 tbl_data->tunnel->tunnel_id : 0,
10482 .group = tbl_data->group_id
10484 uint32_t table_level = tbl_data->level;
10485 struct mlx5_flow_cb_ctx ctx = {
10486 .data = (void *)&tunnel_key.val,
10489 tunnel_grp_hash = tbl_data->tunnel ?
10490 tbl_data->tunnel->groups :
10492 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10494 mlx5_hlist_unregister(tunnel_grp_hash, he);
10496 "table_level %u id %u tunnel %u group %u released.",
10500 tbl_data->tunnel->tunnel_id : 0,
10501 tbl_data->group_id);
10503 mlx5_list_destroy(tbl_data->matchers);
10504 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10508 * Release a flow table.
10511 * Pointer to device shared structure.
10513 * Table resource to be released.
10516 * Returns 0 if table was released, else return 1;
10519 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10520 struct mlx5_flow_tbl_resource *tbl)
10522 struct mlx5_flow_tbl_data_entry *tbl_data =
10523 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10527 return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10531 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10532 struct mlx5_list_entry *entry, void *cb_ctx)
10534 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10535 struct mlx5_flow_dv_matcher *ref = ctx->data;
10536 struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10539 return cur->crc != ref->crc ||
10540 cur->priority != ref->priority ||
10541 memcmp((const void *)cur->mask.buf,
10542 (const void *)ref->mask.buf, ref->mask.size);
10545 struct mlx5_list_entry *
10546 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10548 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10549 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10550 struct mlx5_flow_dv_matcher *ref = ctx->data;
10551 struct mlx5_flow_dv_matcher *resource;
10552 struct mlx5dv_flow_matcher_attr dv_attr = {
10553 .type = IBV_FLOW_ATTR_NORMAL,
10554 .match_mask = (void *)&ref->mask,
10556 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10557 typeof(*tbl), tbl);
10560 resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10563 rte_flow_error_set(ctx->error, ENOMEM,
10564 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10565 "cannot create matcher");
10569 dv_attr.match_criteria_enable =
10570 flow_dv_matcher_enable(resource->mask.buf);
10571 __flow_dv_adjust_buf_size(&ref->mask.size,
10572 dv_attr.match_criteria_enable);
10573 dv_attr.priority = ref->priority;
10574 if (tbl->is_egress)
10575 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10576 ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
10578 &resource->matcher_object);
10580 mlx5_free(resource);
10581 rte_flow_error_set(ctx->error, ENOMEM,
10582 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10583 "cannot create matcher");
10586 return &resource->entry;
10590 * Register the flow matcher.
10592 * @param[in, out] dev
10593 * Pointer to rte_eth_dev structure.
10594 * @param[in, out] matcher
10595 * Pointer to flow matcher.
10596 * @param[in, out] key
10597 * Pointer to flow table key.
10598 * @parm[in, out] dev_flow
10599 * Pointer to the dev_flow.
10600 * @param[out] error
10601 * pointer to error structure.
10604 * 0 on success otherwise -errno and errno is set.
10607 flow_dv_matcher_register(struct rte_eth_dev *dev,
10608 struct mlx5_flow_dv_matcher *ref,
10609 union mlx5_flow_tbl_key *key,
10610 struct mlx5_flow *dev_flow,
10611 const struct mlx5_flow_tunnel *tunnel,
10613 struct rte_flow_error *error)
10615 struct mlx5_list_entry *entry;
10616 struct mlx5_flow_dv_matcher *resource;
10617 struct mlx5_flow_tbl_resource *tbl;
10618 struct mlx5_flow_tbl_data_entry *tbl_data;
10619 struct mlx5_flow_cb_ctx ctx = {
10624 * tunnel offload API requires this registration for cases when
10625 * tunnel match rule was inserted before tunnel set rule.
10627 tbl = flow_dv_tbl_resource_get(dev, key->level,
10628 key->is_egress, key->is_fdb,
10629 dev_flow->external, tunnel,
10630 group_id, 0, key->id, error);
10632 return -rte_errno; /* No need to refill the error info */
10633 tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10635 entry = mlx5_list_register(tbl_data->matchers, &ctx);
10637 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10638 return rte_flow_error_set(error, ENOMEM,
10639 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10640 "cannot allocate ref memory");
10642 resource = container_of(entry, typeof(*resource), entry);
10643 dev_flow->handle->dvh.matcher = resource;
10647 struct mlx5_list_entry *
10648 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10650 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10651 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10652 struct mlx5_flow_dv_tag_resource *entry;
10656 entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10658 rte_flow_error_set(ctx->error, ENOMEM,
10659 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10660 "cannot allocate resource memory");
10664 entry->tag_id = *(uint32_t *)(ctx->data);
10665 ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10668 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10669 rte_flow_error_set(ctx->error, ENOMEM,
10670 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10671 NULL, "cannot create action");
10674 return &entry->entry;
10678 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10681 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10682 struct mlx5_flow_dv_tag_resource *tag =
10683 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10685 return *(uint32_t *)(ctx->data) != tag->tag_id;
10688 struct mlx5_list_entry *
10689 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10692 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10693 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10694 struct mlx5_flow_dv_tag_resource *entry;
10697 entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10699 rte_flow_error_set(ctx->error, ENOMEM,
10700 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10701 "cannot allocate tag resource memory");
10704 memcpy(entry, oentry, sizeof(*entry));
10706 return &entry->entry;
10710 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10712 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10713 struct mlx5_flow_dv_tag_resource *tag =
10714 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10716 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10720 * Find existing tag resource or create and register a new one.
10722 * @param dev[in, out]
10723 * Pointer to rte_eth_dev structure.
10724 * @param[in, out] tag_be24
10725 * Tag value in big endian then R-shift 8.
10726 * @parm[in, out] dev_flow
10727 * Pointer to the dev_flow.
10728 * @param[out] error
10729 * pointer to error structure.
10732 * 0 on success otherwise -errno and errno is set.
10735 flow_dv_tag_resource_register
10736 (struct rte_eth_dev *dev,
10738 struct mlx5_flow *dev_flow,
10739 struct rte_flow_error *error)
10741 struct mlx5_priv *priv = dev->data->dev_private;
10742 struct mlx5_flow_dv_tag_resource *resource;
10743 struct mlx5_list_entry *entry;
10744 struct mlx5_flow_cb_ctx ctx = {
10748 struct mlx5_hlist *tag_table;
10750 tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10752 MLX5_TAGS_HLIST_ARRAY_SIZE,
10753 false, false, priv->sh,
10754 flow_dv_tag_create_cb,
10755 flow_dv_tag_match_cb,
10756 flow_dv_tag_remove_cb,
10757 flow_dv_tag_clone_cb,
10758 flow_dv_tag_clone_free_cb);
10759 if (unlikely(!tag_table))
10761 entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10763 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10765 dev_flow->handle->dvh.rix_tag = resource->idx;
10766 dev_flow->dv.tag_resource = resource;
10773 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10775 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10776 struct mlx5_flow_dv_tag_resource *tag =
10777 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10779 MLX5_ASSERT(tag && sh && tag->action);
10780 claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10781 DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10782 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10789 * Pointer to Ethernet device.
10794 * 1 while a reference on it exists, 0 when freed.
10797 flow_dv_tag_release(struct rte_eth_dev *dev,
10800 struct mlx5_priv *priv = dev->data->dev_private;
10801 struct mlx5_flow_dv_tag_resource *tag;
10803 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10806 DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10807 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10808 return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10812 * Translate action PORT_ID / REPRESENTED_PORT to vport.
10815 * Pointer to rte_eth_dev structure.
10816 * @param[in] action
10817 * Pointer to action PORT_ID / REPRESENTED_PORT.
10818 * @param[out] dst_port_id
10819 * The target port ID.
10820 * @param[out] error
10821 * Pointer to the error structure.
10824 * 0 on success, a negative errno value otherwise and rte_errno is set.
10827 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10828 const struct rte_flow_action *action,
10829 uint32_t *dst_port_id,
10830 struct rte_flow_error *error)
10833 struct mlx5_priv *priv;
10835 switch (action->type) {
10836 case RTE_FLOW_ACTION_TYPE_PORT_ID: {
10837 const struct rte_flow_action_port_id *conf;
10839 conf = (const struct rte_flow_action_port_id *)action->conf;
10840 port = conf->original ? dev->data->port_id : conf->id;
10843 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: {
10844 const struct rte_flow_action_ethdev *ethdev;
10846 ethdev = (const struct rte_flow_action_ethdev *)action->conf;
10847 port = ethdev->port_id;
10851 MLX5_ASSERT(false);
10852 return rte_flow_error_set(error, EINVAL,
10853 RTE_FLOW_ERROR_TYPE_ACTION, action,
10854 "unknown E-Switch action");
10857 priv = mlx5_port_to_eswitch_info(port, false);
10859 return rte_flow_error_set(error, -rte_errno,
10860 RTE_FLOW_ERROR_TYPE_ACTION,
10862 "No eswitch info was found for port");
10863 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10865 * This parameter is transferred to
10866 * mlx5dv_dr_action_create_dest_ib_port().
10868 *dst_port_id = priv->dev_port;
10871 * Legacy mode, no LAG configurations is supported.
10872 * This parameter is transferred to
10873 * mlx5dv_dr_action_create_dest_vport().
10875 *dst_port_id = priv->vport_id;
10881 * Create a counter with aging configuration.
10884 * Pointer to rte_eth_dev structure.
10885 * @param[in] dev_flow
10886 * Pointer to the mlx5_flow.
10887 * @param[out] count
10888 * Pointer to the counter action configuration.
10890 * Pointer to the aging action configuration.
10893 * Index to flow counter on success, 0 otherwise.
10896 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10897 struct mlx5_flow *dev_flow,
10898 const struct rte_flow_action_count *count
10900 const struct rte_flow_action_age *age)
10903 struct mlx5_age_param *age_param;
10905 counter = flow_dv_counter_alloc(dev, !!age);
10906 if (!counter || age == NULL)
10908 age_param = flow_dv_counter_idx_get_age(dev, counter);
10909 age_param->context = age->context ? age->context :
10910 (void *)(uintptr_t)(dev_flow->flow_idx);
10911 age_param->timeout = age->timeout;
10912 age_param->port_id = dev->data->port_id;
10913 __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10914 __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10919 * Add Tx queue matcher
10922 * Pointer to the dev struct.
10923 * @param[in, out] matcher
10925 * @param[in, out] key
10926 * Flow matcher value.
10928 * Flow pattern to translate.
10930 * Item is inner pattern.
10933 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10934 void *matcher, void *key,
10935 const struct rte_flow_item *item)
10937 const struct mlx5_rte_flow_item_tx_queue *queue_m;
10938 const struct mlx5_rte_flow_item_tx_queue *queue_v;
10940 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10942 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10943 struct mlx5_txq_ctrl *txq;
10944 uint32_t queue, mask;
10946 queue_m = (const void *)item->mask;
10947 queue_v = (const void *)item->spec;
10950 txq = mlx5_txq_get(dev, queue_v->queue);
10953 if (txq->type == MLX5_TXQ_TYPE_HAIRPIN)
10954 queue = txq->obj->sq->id;
10956 queue = txq->obj->sq_obj.sq->id;
10957 mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
10958 MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
10959 MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
10960 mlx5_txq_release(dev, queue_v->queue);
10964 * Set the hash fields according to the @p flow information.
10966 * @param[in] dev_flow
10967 * Pointer to the mlx5_flow.
10968 * @param[in] rss_desc
10969 * Pointer to the mlx5_flow_rss_desc.
10972 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10973 struct mlx5_flow_rss_desc *rss_desc)
10975 uint64_t items = dev_flow->handle->layers;
10977 uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10979 dev_flow->hash_fields = 0;
10980 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10981 if (rss_desc->level >= 2)
10984 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10985 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10986 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10987 if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
10988 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10989 else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
10990 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10992 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10994 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10995 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10996 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10997 if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
10998 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10999 else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
11000 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
11002 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
11005 if (dev_flow->hash_fields == 0)
11007 * There is no match between the RSS types and the
11008 * L3 protocol (IPv4/IPv6) defined in the flow rule.
11011 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
11012 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
11013 if (rss_types & RTE_ETH_RSS_UDP) {
11014 if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
11015 dev_flow->hash_fields |=
11016 IBV_RX_HASH_SRC_PORT_UDP;
11017 else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11018 dev_flow->hash_fields |=
11019 IBV_RX_HASH_DST_PORT_UDP;
11021 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
11023 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
11024 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
11025 if (rss_types & RTE_ETH_RSS_TCP) {
11026 if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
11027 dev_flow->hash_fields |=
11028 IBV_RX_HASH_SRC_PORT_TCP;
11029 else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11030 dev_flow->hash_fields |=
11031 IBV_RX_HASH_DST_PORT_TCP;
11033 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
11037 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
11041 * Prepare an Rx Hash queue.
11044 * Pointer to Ethernet device.
11045 * @param[in] dev_flow
11046 * Pointer to the mlx5_flow.
11047 * @param[in] rss_desc
11048 * Pointer to the mlx5_flow_rss_desc.
11049 * @param[out] hrxq_idx
11050 * Hash Rx queue index.
11053 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
11055 static struct mlx5_hrxq *
11056 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
11057 struct mlx5_flow *dev_flow,
11058 struct mlx5_flow_rss_desc *rss_desc,
11059 uint32_t *hrxq_idx)
11061 struct mlx5_priv *priv = dev->data->dev_private;
11062 struct mlx5_flow_handle *dh = dev_flow->handle;
11063 struct mlx5_hrxq *hrxq;
11065 MLX5_ASSERT(rss_desc->queue_num);
11066 rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
11067 rss_desc->hash_fields = dev_flow->hash_fields;
11068 rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
11069 rss_desc->shared_rss = 0;
11070 if (rss_desc->hash_fields == 0)
11071 rss_desc->queue_num = 1;
11072 *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
11075 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
11081 * Release sample sub action resource.
11083 * @param[in, out] dev
11084 * Pointer to rte_eth_dev structure.
11085 * @param[in] act_res
11086 * Pointer to sample sub action resource.
11089 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
11090 struct mlx5_flow_sub_actions_idx *act_res)
11092 if (act_res->rix_hrxq) {
11093 mlx5_hrxq_release(dev, act_res->rix_hrxq);
11094 act_res->rix_hrxq = 0;
11096 if (act_res->rix_encap_decap) {
11097 flow_dv_encap_decap_resource_release(dev,
11098 act_res->rix_encap_decap);
11099 act_res->rix_encap_decap = 0;
11101 if (act_res->rix_port_id_action) {
11102 flow_dv_port_id_action_resource_release(dev,
11103 act_res->rix_port_id_action);
11104 act_res->rix_port_id_action = 0;
11106 if (act_res->rix_tag) {
11107 flow_dv_tag_release(dev, act_res->rix_tag);
11108 act_res->rix_tag = 0;
11110 if (act_res->rix_jump) {
11111 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
11112 act_res->rix_jump = 0;
11117 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
11118 struct mlx5_list_entry *entry, void *cb_ctx)
11120 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11121 struct rte_eth_dev *dev = ctx->dev;
11122 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11123 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11127 if (ctx_resource->ratio == resource->ratio &&
11128 ctx_resource->ft_type == resource->ft_type &&
11129 ctx_resource->ft_id == resource->ft_id &&
11130 ctx_resource->set_action == resource->set_action &&
11131 !memcmp((void *)&ctx_resource->sample_act,
11132 (void *)&resource->sample_act,
11133 sizeof(struct mlx5_flow_sub_actions_list))) {
11135 * Existing sample action should release the prepared
11136 * sub-actions reference counter.
11138 flow_dv_sample_sub_actions_release(dev,
11139 &ctx_resource->sample_idx);
11145 struct mlx5_list_entry *
11146 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11148 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11149 struct rte_eth_dev *dev = ctx->dev;
11150 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11151 void **sample_dv_actions = ctx_resource->sub_actions;
11152 struct mlx5_flow_dv_sample_resource *resource;
11153 struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11154 struct mlx5_priv *priv = dev->data->dev_private;
11155 struct mlx5_dev_ctx_shared *sh = priv->sh;
11156 struct mlx5_flow_tbl_resource *tbl;
11158 const uint32_t next_ft_step = 1;
11159 uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11160 uint8_t is_egress = 0;
11161 uint8_t is_transfer = 0;
11162 struct rte_flow_error *error = ctx->error;
11164 /* Register new sample resource. */
11165 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11167 rte_flow_error_set(error, ENOMEM,
11168 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11170 "cannot allocate resource memory");
11173 *resource = *ctx_resource;
11174 /* Create normal path table level */
11175 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11177 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11179 tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11180 is_egress, is_transfer,
11181 true, NULL, 0, 0, 0, error);
11183 rte_flow_error_set(error, ENOMEM,
11184 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11186 "fail to create normal path table "
11190 resource->normal_path_tbl = tbl;
11191 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11192 if (!sh->default_miss_action) {
11193 rte_flow_error_set(error, ENOMEM,
11194 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11196 "default miss action was not "
11200 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11201 sh->default_miss_action;
11203 /* Create a DR sample action */
11204 sampler_attr.sample_ratio = resource->ratio;
11205 sampler_attr.default_next_table = tbl->obj;
11206 sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11207 sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11208 &sample_dv_actions[0];
11209 sampler_attr.action = resource->set_action;
11210 if (mlx5_os_flow_dr_create_flow_action_sampler
11211 (&sampler_attr, &resource->verbs_action)) {
11212 rte_flow_error_set(error, ENOMEM,
11213 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11214 NULL, "cannot create sample action");
11217 resource->idx = idx;
11218 resource->dev = dev;
11219 return &resource->entry;
11221 if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11222 flow_dv_sample_sub_actions_release(dev,
11223 &resource->sample_idx);
11224 if (resource->normal_path_tbl)
11225 flow_dv_tbl_resource_release(MLX5_SH(dev),
11226 resource->normal_path_tbl);
11227 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11232 struct mlx5_list_entry *
11233 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11234 struct mlx5_list_entry *entry __rte_unused,
11237 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11238 struct rte_eth_dev *dev = ctx->dev;
11239 struct mlx5_flow_dv_sample_resource *resource;
11240 struct mlx5_priv *priv = dev->data->dev_private;
11241 struct mlx5_dev_ctx_shared *sh = priv->sh;
11244 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11246 rte_flow_error_set(ctx->error, ENOMEM,
11247 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11249 "cannot allocate resource memory");
11252 memcpy(resource, entry, sizeof(*resource));
11253 resource->idx = idx;
11254 resource->dev = dev;
11255 return &resource->entry;
11259 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11260 struct mlx5_list_entry *entry)
11262 struct mlx5_flow_dv_sample_resource *resource =
11263 container_of(entry, typeof(*resource), entry);
11264 struct rte_eth_dev *dev = resource->dev;
11265 struct mlx5_priv *priv = dev->data->dev_private;
11267 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11271 * Find existing sample resource or create and register a new one.
11273 * @param[in, out] dev
11274 * Pointer to rte_eth_dev structure.
11276 * Pointer to sample resource reference.
11277 * @parm[in, out] dev_flow
11278 * Pointer to the dev_flow.
11279 * @param[out] error
11280 * pointer to error structure.
11283 * 0 on success otherwise -errno and errno is set.
11286 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11287 struct mlx5_flow_dv_sample_resource *ref,
11288 struct mlx5_flow *dev_flow,
11289 struct rte_flow_error *error)
11291 struct mlx5_flow_dv_sample_resource *resource;
11292 struct mlx5_list_entry *entry;
11293 struct mlx5_priv *priv = dev->data->dev_private;
11294 struct mlx5_flow_cb_ctx ctx = {
11300 entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11303 resource = container_of(entry, typeof(*resource), entry);
11304 dev_flow->handle->dvh.rix_sample = resource->idx;
11305 dev_flow->dv.sample_res = resource;
11310 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11311 struct mlx5_list_entry *entry, void *cb_ctx)
11313 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11314 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11315 struct rte_eth_dev *dev = ctx->dev;
11316 struct mlx5_flow_dv_dest_array_resource *resource =
11317 container_of(entry, typeof(*resource), entry);
11320 if (ctx_resource->num_of_dest == resource->num_of_dest &&
11321 ctx_resource->ft_type == resource->ft_type &&
11322 !memcmp((void *)resource->sample_act,
11323 (void *)ctx_resource->sample_act,
11324 (ctx_resource->num_of_dest *
11325 sizeof(struct mlx5_flow_sub_actions_list)))) {
11327 * Existing sample action should release the prepared
11328 * sub-actions reference counter.
11330 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11331 flow_dv_sample_sub_actions_release(dev,
11332 &ctx_resource->sample_idx[idx]);
11338 struct mlx5_list_entry *
11339 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11341 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11342 struct rte_eth_dev *dev = ctx->dev;
11343 struct mlx5_flow_dv_dest_array_resource *resource;
11344 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11345 struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11346 struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11347 struct mlx5_priv *priv = dev->data->dev_private;
11348 struct mlx5_dev_ctx_shared *sh = priv->sh;
11349 struct mlx5_flow_sub_actions_list *sample_act;
11350 struct mlx5dv_dr_domain *domain;
11351 uint32_t idx = 0, res_idx = 0;
11352 struct rte_flow_error *error = ctx->error;
11353 uint64_t action_flags;
11356 /* Register new destination array resource. */
11357 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11360 rte_flow_error_set(error, ENOMEM,
11361 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11363 "cannot allocate resource memory");
11366 *resource = *ctx_resource;
11367 if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11368 domain = sh->fdb_domain;
11369 else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11370 domain = sh->rx_domain;
11372 domain = sh->tx_domain;
11373 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11374 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11375 mlx5_malloc(MLX5_MEM_ZERO,
11376 sizeof(struct mlx5dv_dr_action_dest_attr),
11378 if (!dest_attr[idx]) {
11379 rte_flow_error_set(error, ENOMEM,
11380 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11382 "cannot allocate resource memory");
11385 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11386 sample_act = &ctx_resource->sample_act[idx];
11387 action_flags = sample_act->action_flags;
11388 switch (action_flags) {
11389 case MLX5_FLOW_ACTION_QUEUE:
11390 dest_attr[idx]->dest = sample_act->dr_queue_action;
11392 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11393 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11394 dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11395 dest_attr[idx]->dest_reformat->reformat =
11396 sample_act->dr_encap_action;
11397 dest_attr[idx]->dest_reformat->dest =
11398 sample_act->dr_port_id_action;
11400 case MLX5_FLOW_ACTION_PORT_ID:
11401 dest_attr[idx]->dest = sample_act->dr_port_id_action;
11403 case MLX5_FLOW_ACTION_JUMP:
11404 dest_attr[idx]->dest = sample_act->dr_jump_action;
11407 rte_flow_error_set(error, EINVAL,
11408 RTE_FLOW_ERROR_TYPE_ACTION,
11410 "unsupported actions type");
11414 /* create a dest array action */
11415 ret = mlx5_os_flow_dr_create_flow_action_dest_array
11417 resource->num_of_dest,
11419 &resource->action);
11421 rte_flow_error_set(error, ENOMEM,
11422 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11424 "cannot create destination array action");
11427 resource->idx = res_idx;
11428 resource->dev = dev;
11429 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11430 mlx5_free(dest_attr[idx]);
11431 return &resource->entry;
11433 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11434 flow_dv_sample_sub_actions_release(dev,
11435 &resource->sample_idx[idx]);
11436 if (dest_attr[idx])
11437 mlx5_free(dest_attr[idx]);
11439 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11443 struct mlx5_list_entry *
11444 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11445 struct mlx5_list_entry *entry __rte_unused,
11448 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11449 struct rte_eth_dev *dev = ctx->dev;
11450 struct mlx5_flow_dv_dest_array_resource *resource;
11451 struct mlx5_priv *priv = dev->data->dev_private;
11452 struct mlx5_dev_ctx_shared *sh = priv->sh;
11453 uint32_t res_idx = 0;
11454 struct rte_flow_error *error = ctx->error;
11456 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11459 rte_flow_error_set(error, ENOMEM,
11460 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11462 "cannot allocate dest-array memory");
11465 memcpy(resource, entry, sizeof(*resource));
11466 resource->idx = res_idx;
11467 resource->dev = dev;
11468 return &resource->entry;
11472 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11473 struct mlx5_list_entry *entry)
11475 struct mlx5_flow_dv_dest_array_resource *resource =
11476 container_of(entry, typeof(*resource), entry);
11477 struct rte_eth_dev *dev = resource->dev;
11478 struct mlx5_priv *priv = dev->data->dev_private;
11480 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11484 * Find existing destination array resource or create and register a new one.
11486 * @param[in, out] dev
11487 * Pointer to rte_eth_dev structure.
11489 * Pointer to destination array resource reference.
11490 * @parm[in, out] dev_flow
11491 * Pointer to the dev_flow.
11492 * @param[out] error
11493 * pointer to error structure.
11496 * 0 on success otherwise -errno and errno is set.
11499 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11500 struct mlx5_flow_dv_dest_array_resource *ref,
11501 struct mlx5_flow *dev_flow,
11502 struct rte_flow_error *error)
11504 struct mlx5_flow_dv_dest_array_resource *resource;
11505 struct mlx5_priv *priv = dev->data->dev_private;
11506 struct mlx5_list_entry *entry;
11507 struct mlx5_flow_cb_ctx ctx = {
11513 entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11516 resource = container_of(entry, typeof(*resource), entry);
11517 dev_flow->handle->dvh.rix_dest_array = resource->idx;
11518 dev_flow->dv.dest_array_res = resource;
11523 * Convert Sample action to DV specification.
11526 * Pointer to rte_eth_dev structure.
11527 * @param[in] action
11528 * Pointer to sample action structure.
11529 * @param[in, out] dev_flow
11530 * Pointer to the mlx5_flow.
11532 * Pointer to the flow attributes.
11533 * @param[in, out] num_of_dest
11534 * Pointer to the num of destination.
11535 * @param[in, out] sample_actions
11536 * Pointer to sample actions list.
11537 * @param[in, out] res
11538 * Pointer to sample resource.
11539 * @param[out] error
11540 * Pointer to the error structure.
11543 * 0 on success, a negative errno value otherwise and rte_errno is set.
11546 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11547 const struct rte_flow_action_sample *action,
11548 struct mlx5_flow *dev_flow,
11549 const struct rte_flow_attr *attr,
11550 uint32_t *num_of_dest,
11551 void **sample_actions,
11552 struct mlx5_flow_dv_sample_resource *res,
11553 struct rte_flow_error *error)
11555 struct mlx5_priv *priv = dev->data->dev_private;
11556 const struct rte_flow_action *sub_actions;
11557 struct mlx5_flow_sub_actions_list *sample_act;
11558 struct mlx5_flow_sub_actions_idx *sample_idx;
11559 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11560 struct rte_flow *flow = dev_flow->flow;
11561 struct mlx5_flow_rss_desc *rss_desc;
11562 uint64_t action_flags = 0;
11565 rss_desc = &wks->rss_desc;
11566 sample_act = &res->sample_act;
11567 sample_idx = &res->sample_idx;
11568 res->ratio = action->ratio;
11569 sub_actions = action->actions;
11570 for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11571 int type = sub_actions->type;
11572 uint32_t pre_rix = 0;
11575 case RTE_FLOW_ACTION_TYPE_QUEUE:
11577 const struct rte_flow_action_queue *queue;
11578 struct mlx5_hrxq *hrxq;
11581 queue = sub_actions->conf;
11582 rss_desc->queue_num = 1;
11583 rss_desc->queue[0] = queue->index;
11584 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11585 rss_desc, &hrxq_idx);
11587 return rte_flow_error_set
11589 RTE_FLOW_ERROR_TYPE_ACTION,
11591 "cannot create fate queue");
11592 sample_act->dr_queue_action = hrxq->action;
11593 sample_idx->rix_hrxq = hrxq_idx;
11594 sample_actions[sample_act->actions_num++] =
11597 action_flags |= MLX5_FLOW_ACTION_QUEUE;
11598 if (action_flags & MLX5_FLOW_ACTION_MARK)
11599 dev_flow->handle->rix_hrxq = hrxq_idx;
11600 dev_flow->handle->fate_action =
11601 MLX5_FLOW_FATE_QUEUE;
11604 case RTE_FLOW_ACTION_TYPE_RSS:
11606 struct mlx5_hrxq *hrxq;
11608 const struct rte_flow_action_rss *rss;
11609 const uint8_t *rss_key;
11611 rss = sub_actions->conf;
11612 memcpy(rss_desc->queue, rss->queue,
11613 rss->queue_num * sizeof(uint16_t));
11614 rss_desc->queue_num = rss->queue_num;
11615 /* NULL RSS key indicates default RSS key. */
11616 rss_key = !rss->key ? rss_hash_default_key : rss->key;
11617 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11619 * rss->level and rss.types should be set in advance
11620 * when expanding items for RSS.
11622 flow_dv_hashfields_set(dev_flow, rss_desc);
11623 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11624 rss_desc, &hrxq_idx);
11626 return rte_flow_error_set
11628 RTE_FLOW_ERROR_TYPE_ACTION,
11630 "cannot create fate queue");
11631 sample_act->dr_queue_action = hrxq->action;
11632 sample_idx->rix_hrxq = hrxq_idx;
11633 sample_actions[sample_act->actions_num++] =
11636 action_flags |= MLX5_FLOW_ACTION_RSS;
11637 if (action_flags & MLX5_FLOW_ACTION_MARK)
11638 dev_flow->handle->rix_hrxq = hrxq_idx;
11639 dev_flow->handle->fate_action =
11640 MLX5_FLOW_FATE_QUEUE;
11643 case RTE_FLOW_ACTION_TYPE_MARK:
11645 uint32_t tag_be = mlx5_flow_mark_set
11646 (((const struct rte_flow_action_mark *)
11647 (sub_actions->conf))->id);
11650 pre_rix = dev_flow->handle->dvh.rix_tag;
11651 /* Save the mark resource before sample */
11652 pre_r = dev_flow->dv.tag_resource;
11653 if (flow_dv_tag_resource_register(dev, tag_be,
11656 MLX5_ASSERT(dev_flow->dv.tag_resource);
11657 sample_act->dr_tag_action =
11658 dev_flow->dv.tag_resource->action;
11659 sample_idx->rix_tag =
11660 dev_flow->handle->dvh.rix_tag;
11661 sample_actions[sample_act->actions_num++] =
11662 sample_act->dr_tag_action;
11663 /* Recover the mark resource after sample */
11664 dev_flow->dv.tag_resource = pre_r;
11665 dev_flow->handle->dvh.rix_tag = pre_rix;
11666 action_flags |= MLX5_FLOW_ACTION_MARK;
11669 case RTE_FLOW_ACTION_TYPE_COUNT:
11671 if (!flow->counter) {
11673 flow_dv_translate_create_counter(dev,
11674 dev_flow, sub_actions->conf,
11676 if (!flow->counter)
11677 return rte_flow_error_set
11679 RTE_FLOW_ERROR_TYPE_ACTION,
11681 "cannot create counter"
11684 sample_act->dr_cnt_action =
11685 (flow_dv_counter_get_by_idx(dev,
11686 flow->counter, NULL))->action;
11687 sample_actions[sample_act->actions_num++] =
11688 sample_act->dr_cnt_action;
11689 action_flags |= MLX5_FLOW_ACTION_COUNT;
11692 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11693 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
11695 struct mlx5_flow_dv_port_id_action_resource
11697 uint32_t port_id = 0;
11699 memset(&port_id_resource, 0, sizeof(port_id_resource));
11700 /* Save the port id resource before sample */
11701 pre_rix = dev_flow->handle->rix_port_id_action;
11702 pre_r = dev_flow->dv.port_id_action;
11703 if (flow_dv_translate_action_port_id(dev, sub_actions,
11706 port_id_resource.port_id = port_id;
11707 if (flow_dv_port_id_action_resource_register
11708 (dev, &port_id_resource, dev_flow, error))
11710 sample_act->dr_port_id_action =
11711 dev_flow->dv.port_id_action->action;
11712 sample_idx->rix_port_id_action =
11713 dev_flow->handle->rix_port_id_action;
11714 sample_actions[sample_act->actions_num++] =
11715 sample_act->dr_port_id_action;
11716 /* Recover the port id resource after sample */
11717 dev_flow->dv.port_id_action = pre_r;
11718 dev_flow->handle->rix_port_id_action = pre_rix;
11720 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11723 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11724 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11725 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11726 /* Save the encap resource before sample */
11727 pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11728 pre_r = dev_flow->dv.encap_decap;
11729 if (flow_dv_create_action_l2_encap(dev, sub_actions,
11734 sample_act->dr_encap_action =
11735 dev_flow->dv.encap_decap->action;
11736 sample_idx->rix_encap_decap =
11737 dev_flow->handle->dvh.rix_encap_decap;
11738 sample_actions[sample_act->actions_num++] =
11739 sample_act->dr_encap_action;
11740 /* Recover the encap resource after sample */
11741 dev_flow->dv.encap_decap = pre_r;
11742 dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11743 action_flags |= MLX5_FLOW_ACTION_ENCAP;
11746 return rte_flow_error_set(error, EINVAL,
11747 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11749 "Not support for sampler action");
11752 sample_act->action_flags = action_flags;
11753 res->ft_id = dev_flow->dv.group;
11754 if (attr->transfer) {
11756 uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11757 uint64_t set_action;
11758 } action_ctx = { .set_action = 0 };
11760 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11761 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11762 MLX5_MODIFICATION_TYPE_SET);
11763 MLX5_SET(set_action_in, action_ctx.action_in, field,
11764 MLX5_MODI_META_REG_C_0);
11765 MLX5_SET(set_action_in, action_ctx.action_in, data,
11766 priv->vport_meta_tag);
11767 res->set_action = action_ctx.set_action;
11768 } else if (attr->ingress) {
11769 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11771 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11777 * Convert Sample action to DV specification.
11780 * Pointer to rte_eth_dev structure.
11781 * @param[in, out] dev_flow
11782 * Pointer to the mlx5_flow.
11783 * @param[in] num_of_dest
11784 * The num of destination.
11785 * @param[in, out] res
11786 * Pointer to sample resource.
11787 * @param[in, out] mdest_res
11788 * Pointer to destination array resource.
11789 * @param[in] sample_actions
11790 * Pointer to sample path actions list.
11791 * @param[in] action_flags
11792 * Holds the actions detected until now.
11793 * @param[out] error
11794 * Pointer to the error structure.
11797 * 0 on success, a negative errno value otherwise and rte_errno is set.
11800 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11801 struct mlx5_flow *dev_flow,
11802 uint32_t num_of_dest,
11803 struct mlx5_flow_dv_sample_resource *res,
11804 struct mlx5_flow_dv_dest_array_resource *mdest_res,
11805 void **sample_actions,
11806 uint64_t action_flags,
11807 struct rte_flow_error *error)
11809 /* update normal path action resource into last index of array */
11810 uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11811 struct mlx5_flow_sub_actions_list *sample_act =
11812 &mdest_res->sample_act[dest_index];
11813 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11814 struct mlx5_flow_rss_desc *rss_desc;
11815 uint32_t normal_idx = 0;
11816 struct mlx5_hrxq *hrxq;
11820 rss_desc = &wks->rss_desc;
11821 if (num_of_dest > 1) {
11822 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11823 /* Handle QP action for mirroring */
11824 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11825 rss_desc, &hrxq_idx);
11827 return rte_flow_error_set
11829 RTE_FLOW_ERROR_TYPE_ACTION,
11831 "cannot create rx queue");
11833 mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11834 sample_act->dr_queue_action = hrxq->action;
11835 if (action_flags & MLX5_FLOW_ACTION_MARK)
11836 dev_flow->handle->rix_hrxq = hrxq_idx;
11837 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11839 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11841 mdest_res->sample_idx[dest_index].rix_encap_decap =
11842 dev_flow->handle->dvh.rix_encap_decap;
11843 sample_act->dr_encap_action =
11844 dev_flow->dv.encap_decap->action;
11845 dev_flow->handle->dvh.rix_encap_decap = 0;
11847 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11849 mdest_res->sample_idx[dest_index].rix_port_id_action =
11850 dev_flow->handle->rix_port_id_action;
11851 sample_act->dr_port_id_action =
11852 dev_flow->dv.port_id_action->action;
11853 dev_flow->handle->rix_port_id_action = 0;
11855 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11857 mdest_res->sample_idx[dest_index].rix_jump =
11858 dev_flow->handle->rix_jump;
11859 sample_act->dr_jump_action =
11860 dev_flow->dv.jump->action;
11861 dev_flow->handle->rix_jump = 0;
11863 sample_act->actions_num = normal_idx;
11864 /* update sample action resource into first index of array */
11865 mdest_res->ft_type = res->ft_type;
11866 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11867 sizeof(struct mlx5_flow_sub_actions_idx));
11868 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11869 sizeof(struct mlx5_flow_sub_actions_list));
11870 mdest_res->num_of_dest = num_of_dest;
11871 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11873 return rte_flow_error_set(error, EINVAL,
11874 RTE_FLOW_ERROR_TYPE_ACTION,
11875 NULL, "can't create sample "
11878 res->sub_actions = sample_actions;
11879 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11880 return rte_flow_error_set(error, EINVAL,
11881 RTE_FLOW_ERROR_TYPE_ACTION,
11883 "can't create sample action");
11889 * Remove an ASO age action from age actions list.
11892 * Pointer to the Ethernet device structure.
11894 * Pointer to the aso age action handler.
11897 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11898 struct mlx5_aso_age_action *age)
11900 struct mlx5_age_info *age_info;
11901 struct mlx5_age_param *age_param = &age->age_params;
11902 struct mlx5_priv *priv = dev->data->dev_private;
11903 uint16_t expected = AGE_CANDIDATE;
11905 age_info = GET_PORT_AGE_INFO(priv);
11906 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11907 AGE_FREE, false, __ATOMIC_RELAXED,
11908 __ATOMIC_RELAXED)) {
11910 * We need the lock even it is age timeout,
11911 * since age action may still in process.
11913 rte_spinlock_lock(&age_info->aged_sl);
11914 LIST_REMOVE(age, next);
11915 rte_spinlock_unlock(&age_info->aged_sl);
11916 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11921 * Release an ASO age action.
11924 * Pointer to the Ethernet device structure.
11925 * @param[in] age_idx
11926 * Index of ASO age action to release.
11928 * True if the release operation is during flow destroy operation.
11929 * False if the release operation is during action destroy operation.
11932 * 0 when age action was removed, otherwise the number of references.
11935 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11937 struct mlx5_priv *priv = dev->data->dev_private;
11938 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11939 struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11940 uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11943 flow_dv_aso_age_remove_from_age(dev, age);
11944 rte_spinlock_lock(&mng->free_sl);
11945 LIST_INSERT_HEAD(&mng->free, age, next);
11946 rte_spinlock_unlock(&mng->free_sl);
11952 * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11955 * Pointer to the Ethernet device structure.
11958 * 0 on success, otherwise negative errno value and rte_errno is set.
11961 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11963 struct mlx5_priv *priv = dev->data->dev_private;
11964 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11965 void *old_pools = mng->pools;
11966 uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11967 uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11968 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11971 rte_errno = ENOMEM;
11975 memcpy(pools, old_pools,
11976 mng->n * sizeof(struct mlx5_flow_counter_pool *));
11977 mlx5_free(old_pools);
11979 /* First ASO flow hit allocation - starting ASO data-path. */
11980 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11988 mng->pools = pools;
11993 * Create and initialize a new ASO aging pool.
11996 * Pointer to the Ethernet device structure.
11997 * @param[out] age_free
11998 * Where to put the pointer of a new age action.
12001 * The age actions pool pointer and @p age_free is set on success,
12002 * NULL otherwise and rte_errno is set.
12004 static struct mlx5_aso_age_pool *
12005 flow_dv_age_pool_create(struct rte_eth_dev *dev,
12006 struct mlx5_aso_age_action **age_free)
12008 struct mlx5_priv *priv = dev->data->dev_private;
12009 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12010 struct mlx5_aso_age_pool *pool = NULL;
12011 struct mlx5_devx_obj *obj = NULL;
12014 obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->cdev->ctx,
12015 priv->sh->cdev->pdn);
12017 rte_errno = ENODATA;
12018 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
12021 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12023 claim_zero(mlx5_devx_cmd_destroy(obj));
12024 rte_errno = ENOMEM;
12027 pool->flow_hit_aso_obj = obj;
12028 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
12029 rte_rwlock_write_lock(&mng->resize_rwl);
12030 pool->index = mng->next;
12031 /* Resize pools array if there is no room for the new pool in it. */
12032 if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
12033 claim_zero(mlx5_devx_cmd_destroy(obj));
12035 rte_rwlock_write_unlock(&mng->resize_rwl);
12038 mng->pools[pool->index] = pool;
12040 rte_rwlock_write_unlock(&mng->resize_rwl);
12041 /* Assign the first action in the new pool, the rest go to free list. */
12042 *age_free = &pool->actions[0];
12043 for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
12044 pool->actions[i].offset = i;
12045 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
12051 * Allocate a ASO aging bit.
12054 * Pointer to the Ethernet device structure.
12055 * @param[out] error
12056 * Pointer to the error structure.
12059 * Index to ASO age action on success, 0 otherwise and rte_errno is set.
12062 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12064 struct mlx5_priv *priv = dev->data->dev_private;
12065 const struct mlx5_aso_age_pool *pool;
12066 struct mlx5_aso_age_action *age_free = NULL;
12067 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12070 /* Try to get the next free age action bit. */
12071 rte_spinlock_lock(&mng->free_sl);
12072 age_free = LIST_FIRST(&mng->free);
12074 LIST_REMOVE(age_free, next);
12075 } else if (!flow_dv_age_pool_create(dev, &age_free)) {
12076 rte_spinlock_unlock(&mng->free_sl);
12077 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12078 NULL, "failed to create ASO age pool");
12079 return 0; /* 0 is an error. */
12081 rte_spinlock_unlock(&mng->free_sl);
12082 pool = container_of
12083 ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
12084 (age_free - age_free->offset), const struct mlx5_aso_age_pool,
12086 if (!age_free->dr_action) {
12087 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
12091 rte_flow_error_set(error, rte_errno,
12092 RTE_FLOW_ERROR_TYPE_ACTION,
12093 NULL, "failed to get reg_c "
12094 "for ASO flow hit");
12095 return 0; /* 0 is an error. */
12097 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
12098 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
12099 (priv->sh->rx_domain,
12100 pool->flow_hit_aso_obj->obj, age_free->offset,
12101 MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
12102 (reg_c - REG_C_0));
12103 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
12104 if (!age_free->dr_action) {
12106 rte_spinlock_lock(&mng->free_sl);
12107 LIST_INSERT_HEAD(&mng->free, age_free, next);
12108 rte_spinlock_unlock(&mng->free_sl);
12109 rte_flow_error_set(error, rte_errno,
12110 RTE_FLOW_ERROR_TYPE_ACTION,
12111 NULL, "failed to create ASO "
12112 "flow hit action");
12113 return 0; /* 0 is an error. */
12116 __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
12117 return pool->index | ((age_free->offset + 1) << 16);
12121 * Initialize flow ASO age parameters.
12124 * Pointer to rte_eth_dev structure.
12125 * @param[in] age_idx
12126 * Index of ASO age action.
12127 * @param[in] context
12128 * Pointer to flow counter age context.
12129 * @param[in] timeout
12130 * Aging timeout in seconds.
12134 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12139 struct mlx5_aso_age_action *aso_age;
12141 aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12142 MLX5_ASSERT(aso_age);
12143 aso_age->age_params.context = context;
12144 aso_age->age_params.timeout = timeout;
12145 aso_age->age_params.port_id = dev->data->port_id;
12146 __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12148 __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12153 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12154 const struct rte_flow_item_integrity *value,
12155 void *headers_m, void *headers_v)
12158 /* RTE l4_ok filter aggregates hardware l4_ok and
12159 * l4_checksum_ok filters.
12160 * Positive RTE l4_ok match requires hardware match on both L4
12161 * hardware integrity bits.
12162 * For negative match, check hardware l4_checksum_ok bit only,
12163 * because hardware sets that bit to 0 for all packets
12166 if (value->l4_ok) {
12167 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok, 1);
12168 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok, 1);
12170 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12171 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12174 if (mask->l4_csum_ok) {
12175 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12176 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12177 value->l4_csum_ok);
12182 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12183 const struct rte_flow_item_integrity *value,
12184 void *headers_m, void *headers_v, bool is_ipv4)
12187 /* RTE l3_ok filter aggregates for IPv4 hardware l3_ok and
12188 * ipv4_csum_ok filters.
12189 * Positive RTE l3_ok match requires hardware match on both L3
12190 * hardware integrity bits.
12191 * For negative match, check hardware l3_csum_ok bit only,
12192 * because hardware sets that bit to 0 for all packets
12196 if (value->l3_ok) {
12197 MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12199 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12202 MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12203 ipv4_checksum_ok, 1);
12204 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12205 ipv4_checksum_ok, !!value->l3_ok);
12207 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok, 1);
12208 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12212 if (mask->ipv4_csum_ok) {
12213 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok, 1);
12214 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12215 value->ipv4_csum_ok);
12220 set_integrity_bits(void *headers_m, void *headers_v,
12221 const struct rte_flow_item *integrity_item, bool is_l3_ip4)
12223 const struct rte_flow_item_integrity *spec = integrity_item->spec;
12224 const struct rte_flow_item_integrity *mask = integrity_item->mask;
12226 /* Integrity bits validation cleared spec pointer */
12227 MLX5_ASSERT(spec != NULL);
12229 mask = &rte_flow_item_integrity_mask;
12230 flow_dv_translate_integrity_l3(mask, spec, headers_m, headers_v,
12232 flow_dv_translate_integrity_l4(mask, spec, headers_m, headers_v);
12236 flow_dv_translate_item_integrity_post(void *matcher, void *key,
12238 struct rte_flow_item *integrity_items[2],
12239 uint64_t pattern_flags)
12241 void *headers_m, *headers_v;
12244 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
12245 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12247 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12248 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4) !=
12250 set_integrity_bits(headers_m, headers_v,
12251 integrity_items[1], is_l3_ip4);
12253 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
12254 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12256 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12257 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV4) !=
12259 set_integrity_bits(headers_m, headers_v,
12260 integrity_items[0], is_l3_ip4);
12265 flow_dv_translate_item_integrity(const struct rte_flow_item *item,
12266 const struct rte_flow_item *integrity_items[2],
12267 uint64_t *last_item)
12269 const struct rte_flow_item_integrity *spec = (typeof(spec))item->spec;
12271 /* integrity bits validation cleared spec pointer */
12272 MLX5_ASSERT(spec != NULL);
12273 if (spec->level > 1) {
12274 integrity_items[1] = item;
12275 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
12277 integrity_items[0] = item;
12278 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
12283 * Prepares DV flow counter with aging configuration.
12284 * Gets it by index when exists, creates a new one when doesn't.
12287 * Pointer to rte_eth_dev structure.
12288 * @param[in] dev_flow
12289 * Pointer to the mlx5_flow.
12290 * @param[in, out] flow
12291 * Pointer to the sub flow.
12293 * Pointer to the counter action configuration.
12295 * Pointer to the aging action configuration.
12296 * @param[out] error
12297 * Pointer to the error structure.
12300 * Pointer to the counter, NULL otherwise.
12302 static struct mlx5_flow_counter *
12303 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12304 struct mlx5_flow *dev_flow,
12305 struct rte_flow *flow,
12306 const struct rte_flow_action_count *count,
12307 const struct rte_flow_action_age *age,
12308 struct rte_flow_error *error)
12310 if (!flow->counter) {
12311 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12313 if (!flow->counter) {
12314 rte_flow_error_set(error, rte_errno,
12315 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12316 "cannot create counter object.");
12320 return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12324 * Release an ASO CT action by its own device.
12327 * Pointer to the Ethernet device structure.
12329 * Index of ASO CT action to release.
12332 * 0 when CT action was removed, otherwise the number of references.
12335 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12337 struct mlx5_priv *priv = dev->data->dev_private;
12338 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12340 struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12341 enum mlx5_aso_ct_state state =
12342 __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12344 /* Cannot release when CT is in the ASO SQ. */
12345 if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12347 ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12349 if (ct->dr_action_orig) {
12350 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12351 claim_zero(mlx5_glue->destroy_flow_action
12352 (ct->dr_action_orig));
12354 ct->dr_action_orig = NULL;
12356 if (ct->dr_action_rply) {
12357 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12358 claim_zero(mlx5_glue->destroy_flow_action
12359 (ct->dr_action_rply));
12361 ct->dr_action_rply = NULL;
12363 /* Clear the state to free, no need in 1st allocation. */
12364 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12365 rte_spinlock_lock(&mng->ct_sl);
12366 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12367 rte_spinlock_unlock(&mng->ct_sl);
12373 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx,
12374 struct rte_flow_error *error)
12376 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12377 uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12378 struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12381 MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12382 if (dev->data->dev_started != 1)
12383 return rte_flow_error_set(error, EAGAIN,
12384 RTE_FLOW_ERROR_TYPE_ACTION,
12386 "Indirect CT action cannot be destroyed when the port is stopped");
12387 ret = flow_dv_aso_ct_dev_release(owndev, idx);
12389 return rte_flow_error_set(error, EAGAIN,
12390 RTE_FLOW_ERROR_TYPE_ACTION,
12392 "Current state prevents indirect CT action from being destroyed");
12397 * Resize the ASO CT pools array by 64 pools.
12400 * Pointer to the Ethernet device structure.
12403 * 0 on success, otherwise negative errno value and rte_errno is set.
12406 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12408 struct mlx5_priv *priv = dev->data->dev_private;
12409 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12410 void *old_pools = mng->pools;
12411 /* Magic number now, need a macro. */
12412 uint32_t resize = mng->n + 64;
12413 uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12414 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12417 rte_errno = ENOMEM;
12420 rte_rwlock_write_lock(&mng->resize_rwl);
12421 /* ASO SQ/QP was already initialized in the startup. */
12423 /* Realloc could be an alternative choice. */
12424 rte_memcpy(pools, old_pools,
12425 mng->n * sizeof(struct mlx5_aso_ct_pool *));
12426 mlx5_free(old_pools);
12429 mng->pools = pools;
12430 rte_rwlock_write_unlock(&mng->resize_rwl);
12435 * Create and initialize a new ASO CT pool.
12438 * Pointer to the Ethernet device structure.
12439 * @param[out] ct_free
12440 * Where to put the pointer of a new CT action.
12443 * The CT actions pool pointer and @p ct_free is set on success,
12444 * NULL otherwise and rte_errno is set.
12446 static struct mlx5_aso_ct_pool *
12447 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12448 struct mlx5_aso_ct_action **ct_free)
12450 struct mlx5_priv *priv = dev->data->dev_private;
12451 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12452 struct mlx5_aso_ct_pool *pool = NULL;
12453 struct mlx5_devx_obj *obj = NULL;
12455 uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12457 obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->cdev->ctx,
12458 priv->sh->cdev->pdn,
12461 rte_errno = ENODATA;
12462 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12465 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12467 rte_errno = ENOMEM;
12468 claim_zero(mlx5_devx_cmd_destroy(obj));
12471 pool->devx_obj = obj;
12472 pool->index = mng->next;
12473 /* Resize pools array if there is no room for the new pool in it. */
12474 if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12475 claim_zero(mlx5_devx_cmd_destroy(obj));
12479 mng->pools[pool->index] = pool;
12481 /* Assign the first action in the new pool, the rest go to free list. */
12482 *ct_free = &pool->actions[0];
12483 /* Lock outside, the list operation is safe here. */
12484 for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12485 /* refcnt is 0 when allocating the memory. */
12486 pool->actions[i].offset = i;
12487 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12493 * Allocate a ASO CT action from free list.
12496 * Pointer to the Ethernet device structure.
12497 * @param[out] error
12498 * Pointer to the error structure.
12501 * Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12504 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12506 struct mlx5_priv *priv = dev->data->dev_private;
12507 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12508 struct mlx5_aso_ct_action *ct = NULL;
12509 struct mlx5_aso_ct_pool *pool;
12514 if (!priv->sh->devx) {
12515 rte_errno = ENOTSUP;
12518 /* Get a free CT action, if no, a new pool will be created. */
12519 rte_spinlock_lock(&mng->ct_sl);
12520 ct = LIST_FIRST(&mng->free_cts);
12522 LIST_REMOVE(ct, next);
12523 } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12524 rte_spinlock_unlock(&mng->ct_sl);
12525 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12526 NULL, "failed to create ASO CT pool");
12529 rte_spinlock_unlock(&mng->ct_sl);
12530 pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12531 ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12532 /* 0: inactive, 1: created, 2+: used by flows. */
12533 __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12534 reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12535 if (!ct->dr_action_orig) {
12536 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12537 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12538 (priv->sh->rx_domain, pool->devx_obj->obj,
12540 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12543 RTE_SET_USED(reg_c);
12545 if (!ct->dr_action_orig) {
12546 flow_dv_aso_ct_dev_release(dev, ct_idx);
12547 rte_flow_error_set(error, rte_errno,
12548 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12549 "failed to create ASO CT action");
12553 if (!ct->dr_action_rply) {
12554 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12555 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12556 (priv->sh->rx_domain, pool->devx_obj->obj,
12558 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12561 if (!ct->dr_action_rply) {
12562 flow_dv_aso_ct_dev_release(dev, ct_idx);
12563 rte_flow_error_set(error, rte_errno,
12564 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12565 "failed to create ASO CT action");
12573 * Create a conntrack object with context and actions by using ASO mechanism.
12576 * Pointer to rte_eth_dev structure.
12578 * Pointer to conntrack information profile.
12579 * @param[out] error
12580 * Pointer to the error structure.
12583 * Index to conntrack object on success, 0 otherwise.
12586 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12587 const struct rte_flow_action_conntrack *pro,
12588 struct rte_flow_error *error)
12590 struct mlx5_priv *priv = dev->data->dev_private;
12591 struct mlx5_dev_ctx_shared *sh = priv->sh;
12592 struct mlx5_aso_ct_action *ct;
12595 if (!sh->ct_aso_en)
12596 return rte_flow_error_set(error, ENOTSUP,
12597 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12598 "Connection is not supported");
12599 idx = flow_dv_aso_ct_alloc(dev, error);
12601 return rte_flow_error_set(error, rte_errno,
12602 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12603 "Failed to allocate CT object");
12604 ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12605 if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12606 return rte_flow_error_set(error, EBUSY,
12607 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12608 "Failed to update CT");
12609 ct->is_original = !!pro->is_original_dir;
12610 ct->peer = pro->peer_port;
12615 * Fill the flow with DV spec, lock free
12616 * (mutex should be acquired by caller).
12619 * Pointer to rte_eth_dev structure.
12620 * @param[in, out] dev_flow
12621 * Pointer to the sub flow.
12623 * Pointer to the flow attributes.
12625 * Pointer to the list of items.
12626 * @param[in] actions
12627 * Pointer to the list of actions.
12628 * @param[out] error
12629 * Pointer to the error structure.
12632 * 0 on success, a negative errno value otherwise and rte_errno is set.
12635 flow_dv_translate(struct rte_eth_dev *dev,
12636 struct mlx5_flow *dev_flow,
12637 const struct rte_flow_attr *attr,
12638 const struct rte_flow_item items[],
12639 const struct rte_flow_action actions[],
12640 struct rte_flow_error *error)
12642 struct mlx5_priv *priv = dev->data->dev_private;
12643 struct mlx5_dev_config *dev_conf = &priv->config;
12644 struct rte_flow *flow = dev_flow->flow;
12645 struct mlx5_flow_handle *handle = dev_flow->handle;
12646 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12647 struct mlx5_flow_rss_desc *rss_desc;
12648 uint64_t item_flags = 0;
12649 uint64_t last_item = 0;
12650 uint64_t action_flags = 0;
12651 struct mlx5_flow_dv_matcher matcher = {
12653 .size = sizeof(matcher.mask.buf),
12657 bool actions_end = false;
12659 struct mlx5_flow_dv_modify_hdr_resource res;
12660 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12661 sizeof(struct mlx5_modification_cmd) *
12662 (MLX5_MAX_MODIFY_NUM + 1)];
12664 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12665 const struct rte_flow_action_count *count = NULL;
12666 const struct rte_flow_action_age *non_shared_age = NULL;
12667 union flow_dv_attr flow_attr = { .attr = 0 };
12669 union mlx5_flow_tbl_key tbl_key;
12670 uint32_t modify_action_position = UINT32_MAX;
12671 void *match_mask = matcher.mask.buf;
12672 void *match_value = dev_flow->dv.value.buf;
12673 uint8_t next_protocol = 0xff;
12674 struct rte_vlan_hdr vlan = { 0 };
12675 struct mlx5_flow_dv_dest_array_resource mdest_res;
12676 struct mlx5_flow_dv_sample_resource sample_res;
12677 void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12678 const struct rte_flow_action_sample *sample = NULL;
12679 struct mlx5_flow_sub_actions_list *sample_act;
12680 uint32_t sample_act_pos = UINT32_MAX;
12681 uint32_t age_act_pos = UINT32_MAX;
12682 uint32_t num_of_dest = 0;
12683 int tmp_actions_n = 0;
12686 const struct mlx5_flow_tunnel *tunnel = NULL;
12687 struct flow_grp_info grp_info = {
12688 .external = !!dev_flow->external,
12689 .transfer = !!attr->transfer,
12690 .fdb_def_rule = !!priv->fdb_def_rule,
12691 .skip_scale = dev_flow->skip_scale &
12692 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12693 .std_tbl_fix = true,
12695 const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
12696 const struct rte_flow_item *tunnel_item = NULL;
12699 return rte_flow_error_set(error, ENOMEM,
12700 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12702 "failed to push flow workspace");
12703 rss_desc = &wks->rss_desc;
12704 memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12705 memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12706 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12707 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12708 /* update normal path action resource into last index of array */
12709 sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12710 if (is_tunnel_offload_active(dev)) {
12711 if (dev_flow->tunnel) {
12712 RTE_VERIFY(dev_flow->tof_type ==
12713 MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12714 tunnel = dev_flow->tunnel;
12716 tunnel = mlx5_get_tof(items, actions,
12717 &dev_flow->tof_type);
12718 dev_flow->tunnel = tunnel;
12720 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12721 (dev, attr, tunnel, dev_flow->tof_type);
12723 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12724 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12725 ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12729 dev_flow->dv.group = table;
12730 if (attr->transfer)
12731 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12732 /* number of actions must be set to 0 in case of dirty stack. */
12733 mhdr_res->actions_num = 0;
12734 if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12736 * do not add decap action if match rule drops packet
12737 * HW rejects rules with decap & drop
12739 * if tunnel match rule was inserted before matching tunnel set
12740 * rule flow table used in the match rule must be registered.
12741 * current implementation handles that in the
12742 * flow_dv_match_register() at the function end.
12744 bool add_decap = true;
12745 const struct rte_flow_action *ptr = actions;
12747 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12748 if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12754 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12758 dev_flow->dv.actions[actions_n++] =
12759 dev_flow->dv.encap_decap->action;
12760 action_flags |= MLX5_FLOW_ACTION_DECAP;
12763 for (; !actions_end ; actions++) {
12764 const struct rte_flow_action_queue *queue;
12765 const struct rte_flow_action_rss *rss;
12766 const struct rte_flow_action *action = actions;
12767 const uint8_t *rss_key;
12768 struct mlx5_flow_tbl_resource *tbl;
12769 struct mlx5_aso_age_action *age_act;
12770 struct mlx5_flow_counter *cnt_act;
12771 uint32_t port_id = 0;
12772 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12773 int action_type = actions->type;
12774 const struct rte_flow_action *found_action = NULL;
12775 uint32_t jump_group = 0;
12776 uint32_t owner_idx;
12777 struct mlx5_aso_ct_action *ct;
12779 if (!mlx5_flow_os_action_supported(action_type))
12780 return rte_flow_error_set(error, ENOTSUP,
12781 RTE_FLOW_ERROR_TYPE_ACTION,
12783 "action not supported");
12784 switch (action_type) {
12785 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12786 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12788 case RTE_FLOW_ACTION_TYPE_VOID:
12790 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12791 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
12792 if (flow_dv_translate_action_port_id(dev, action,
12795 port_id_resource.port_id = port_id;
12796 MLX5_ASSERT(!handle->rix_port_id_action);
12797 if (flow_dv_port_id_action_resource_register
12798 (dev, &port_id_resource, dev_flow, error))
12800 dev_flow->dv.actions[actions_n++] =
12801 dev_flow->dv.port_id_action->action;
12802 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12803 dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12804 sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12807 case RTE_FLOW_ACTION_TYPE_FLAG:
12808 action_flags |= MLX5_FLOW_ACTION_FLAG;
12810 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12811 struct rte_flow_action_mark mark = {
12812 .id = MLX5_FLOW_MARK_DEFAULT,
12815 if (flow_dv_convert_action_mark(dev, &mark,
12819 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12822 tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12824 * Only one FLAG or MARK is supported per device flow
12825 * right now. So the pointer to the tag resource must be
12826 * zero before the register process.
12828 MLX5_ASSERT(!handle->dvh.rix_tag);
12829 if (flow_dv_tag_resource_register(dev, tag_be,
12832 MLX5_ASSERT(dev_flow->dv.tag_resource);
12833 dev_flow->dv.actions[actions_n++] =
12834 dev_flow->dv.tag_resource->action;
12836 case RTE_FLOW_ACTION_TYPE_MARK:
12837 action_flags |= MLX5_FLOW_ACTION_MARK;
12839 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12840 const struct rte_flow_action_mark *mark =
12841 (const struct rte_flow_action_mark *)
12844 if (flow_dv_convert_action_mark(dev, mark,
12848 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12852 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12853 /* Legacy (non-extensive) MARK action. */
12854 tag_be = mlx5_flow_mark_set
12855 (((const struct rte_flow_action_mark *)
12856 (actions->conf))->id);
12857 MLX5_ASSERT(!handle->dvh.rix_tag);
12858 if (flow_dv_tag_resource_register(dev, tag_be,
12861 MLX5_ASSERT(dev_flow->dv.tag_resource);
12862 dev_flow->dv.actions[actions_n++] =
12863 dev_flow->dv.tag_resource->action;
12865 case RTE_FLOW_ACTION_TYPE_SET_META:
12866 if (flow_dv_convert_action_set_meta
12867 (dev, mhdr_res, attr,
12868 (const struct rte_flow_action_set_meta *)
12869 actions->conf, error))
12871 action_flags |= MLX5_FLOW_ACTION_SET_META;
12873 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12874 if (flow_dv_convert_action_set_tag
12876 (const struct rte_flow_action_set_tag *)
12877 actions->conf, error))
12879 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12881 case RTE_FLOW_ACTION_TYPE_DROP:
12882 action_flags |= MLX5_FLOW_ACTION_DROP;
12883 dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12885 case RTE_FLOW_ACTION_TYPE_QUEUE:
12886 queue = actions->conf;
12887 rss_desc->queue_num = 1;
12888 rss_desc->queue[0] = queue->index;
12889 action_flags |= MLX5_FLOW_ACTION_QUEUE;
12890 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12891 sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12894 case RTE_FLOW_ACTION_TYPE_RSS:
12895 rss = actions->conf;
12896 memcpy(rss_desc->queue, rss->queue,
12897 rss->queue_num * sizeof(uint16_t));
12898 rss_desc->queue_num = rss->queue_num;
12899 /* NULL RSS key indicates default RSS key. */
12900 rss_key = !rss->key ? rss_hash_default_key : rss->key;
12901 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12903 * rss->level and rss.types should be set in advance
12904 * when expanding items for RSS.
12906 action_flags |= MLX5_FLOW_ACTION_RSS;
12907 dev_flow->handle->fate_action = rss_desc->shared_rss ?
12908 MLX5_FLOW_FATE_SHARED_RSS :
12909 MLX5_FLOW_FATE_QUEUE;
12911 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12912 owner_idx = (uint32_t)(uintptr_t)action->conf;
12913 age_act = flow_aso_age_get_by_idx(dev, owner_idx);
12914 if (flow->age == 0) {
12915 flow->age = owner_idx;
12916 __atomic_fetch_add(&age_act->refcnt, 1,
12919 age_act_pos = actions_n++;
12920 action_flags |= MLX5_FLOW_ACTION_AGE;
12922 case RTE_FLOW_ACTION_TYPE_AGE:
12923 non_shared_age = action->conf;
12924 age_act_pos = actions_n++;
12925 action_flags |= MLX5_FLOW_ACTION_AGE;
12927 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12928 owner_idx = (uint32_t)(uintptr_t)action->conf;
12929 cnt_act = flow_dv_counter_get_by_idx(dev, owner_idx,
12931 MLX5_ASSERT(cnt_act != NULL);
12933 * When creating meter drop flow in drop table, the
12934 * counter should not overwrite the rte flow counter.
12936 if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
12937 dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP) {
12938 dev_flow->dv.actions[actions_n++] =
12941 if (flow->counter == 0) {
12942 flow->counter = owner_idx;
12944 (&cnt_act->shared_info.refcnt,
12945 1, __ATOMIC_RELAXED);
12947 /* Save information first, will apply later. */
12948 action_flags |= MLX5_FLOW_ACTION_COUNT;
12951 case RTE_FLOW_ACTION_TYPE_COUNT:
12952 if (!priv->sh->devx) {
12953 return rte_flow_error_set
12955 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12957 "count action not supported");
12959 /* Save information first, will apply later. */
12960 count = action->conf;
12961 action_flags |= MLX5_FLOW_ACTION_COUNT;
12963 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12964 dev_flow->dv.actions[actions_n++] =
12965 priv->sh->pop_vlan_action;
12966 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12968 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12969 if (!(action_flags &
12970 MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12971 flow_dev_get_vlan_info_from_items(items, &vlan);
12972 vlan.eth_proto = rte_be_to_cpu_16
12973 ((((const struct rte_flow_action_of_push_vlan *)
12974 actions->conf)->ethertype));
12975 found_action = mlx5_flow_find_action
12977 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12979 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12980 found_action = mlx5_flow_find_action
12982 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12984 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12985 if (flow_dv_create_action_push_vlan
12986 (dev, attr, &vlan, dev_flow, error))
12988 dev_flow->dv.actions[actions_n++] =
12989 dev_flow->dv.push_vlan_res->action;
12990 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12992 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12993 /* of_vlan_push action handled this action */
12994 MLX5_ASSERT(action_flags &
12995 MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12997 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12998 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
13000 flow_dev_get_vlan_info_from_items(items, &vlan);
13001 mlx5_update_vlan_vid_pcp(actions, &vlan);
13002 /* If no VLAN push - this is a modify header action */
13003 if (flow_dv_convert_action_modify_vlan_vid
13004 (mhdr_res, actions, error))
13006 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
13008 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
13009 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
13010 if (flow_dv_create_action_l2_encap(dev, actions,
13015 dev_flow->dv.actions[actions_n++] =
13016 dev_flow->dv.encap_decap->action;
13017 action_flags |= MLX5_FLOW_ACTION_ENCAP;
13018 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13019 sample_act->action_flags |=
13020 MLX5_FLOW_ACTION_ENCAP;
13022 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
13023 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
13024 if (flow_dv_create_action_l2_decap(dev, dev_flow,
13028 dev_flow->dv.actions[actions_n++] =
13029 dev_flow->dv.encap_decap->action;
13030 action_flags |= MLX5_FLOW_ACTION_DECAP;
13032 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
13033 /* Handle encap with preceding decap. */
13034 if (action_flags & MLX5_FLOW_ACTION_DECAP) {
13035 if (flow_dv_create_action_raw_encap
13036 (dev, actions, dev_flow, attr, error))
13038 dev_flow->dv.actions[actions_n++] =
13039 dev_flow->dv.encap_decap->action;
13041 /* Handle encap without preceding decap. */
13042 if (flow_dv_create_action_l2_encap
13043 (dev, actions, dev_flow, attr->transfer,
13046 dev_flow->dv.actions[actions_n++] =
13047 dev_flow->dv.encap_decap->action;
13049 action_flags |= MLX5_FLOW_ACTION_ENCAP;
13050 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13051 sample_act->action_flags |=
13052 MLX5_FLOW_ACTION_ENCAP;
13054 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
13055 while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
13057 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
13058 if (flow_dv_create_action_l2_decap
13059 (dev, dev_flow, attr->transfer, error))
13061 dev_flow->dv.actions[actions_n++] =
13062 dev_flow->dv.encap_decap->action;
13064 /* If decap is followed by encap, handle it at encap. */
13065 action_flags |= MLX5_FLOW_ACTION_DECAP;
13067 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
13068 dev_flow->dv.actions[actions_n++] =
13069 (void *)(uintptr_t)action->conf;
13070 action_flags |= MLX5_FLOW_ACTION_JUMP;
13072 case RTE_FLOW_ACTION_TYPE_JUMP:
13073 jump_group = ((const struct rte_flow_action_jump *)
13074 action->conf)->group;
13075 grp_info.std_tbl_fix = 0;
13076 if (dev_flow->skip_scale &
13077 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
13078 grp_info.skip_scale = 1;
13080 grp_info.skip_scale = 0;
13081 ret = mlx5_flow_group_to_table(dev, tunnel,
13087 tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
13089 !!dev_flow->external,
13090 tunnel, jump_group, 0,
13093 return rte_flow_error_set
13095 RTE_FLOW_ERROR_TYPE_ACTION,
13097 "cannot create jump action.");
13098 if (flow_dv_jump_tbl_resource_register
13099 (dev, tbl, dev_flow, error)) {
13100 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
13101 return rte_flow_error_set
13103 RTE_FLOW_ERROR_TYPE_ACTION,
13105 "cannot create jump action.");
13107 dev_flow->dv.actions[actions_n++] =
13108 dev_flow->dv.jump->action;
13109 action_flags |= MLX5_FLOW_ACTION_JUMP;
13110 dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
13111 sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
13114 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
13115 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
13116 if (flow_dv_convert_action_modify_mac
13117 (mhdr_res, actions, error))
13119 action_flags |= actions->type ==
13120 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
13121 MLX5_FLOW_ACTION_SET_MAC_SRC :
13122 MLX5_FLOW_ACTION_SET_MAC_DST;
13124 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
13125 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
13126 if (flow_dv_convert_action_modify_ipv4
13127 (mhdr_res, actions, error))
13129 action_flags |= actions->type ==
13130 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
13131 MLX5_FLOW_ACTION_SET_IPV4_SRC :
13132 MLX5_FLOW_ACTION_SET_IPV4_DST;
13134 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
13135 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
13136 if (flow_dv_convert_action_modify_ipv6
13137 (mhdr_res, actions, error))
13139 action_flags |= actions->type ==
13140 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13141 MLX5_FLOW_ACTION_SET_IPV6_SRC :
13142 MLX5_FLOW_ACTION_SET_IPV6_DST;
13144 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13145 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13146 if (flow_dv_convert_action_modify_tp
13147 (mhdr_res, actions, items,
13148 &flow_attr, dev_flow, !!(action_flags &
13149 MLX5_FLOW_ACTION_DECAP), error))
13151 action_flags |= actions->type ==
13152 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13153 MLX5_FLOW_ACTION_SET_TP_SRC :
13154 MLX5_FLOW_ACTION_SET_TP_DST;
13156 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13157 if (flow_dv_convert_action_modify_dec_ttl
13158 (mhdr_res, items, &flow_attr, dev_flow,
13160 MLX5_FLOW_ACTION_DECAP), error))
13162 action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13164 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13165 if (flow_dv_convert_action_modify_ttl
13166 (mhdr_res, actions, items, &flow_attr,
13167 dev_flow, !!(action_flags &
13168 MLX5_FLOW_ACTION_DECAP), error))
13170 action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13172 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13173 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13174 if (flow_dv_convert_action_modify_tcp_seq
13175 (mhdr_res, actions, error))
13177 action_flags |= actions->type ==
13178 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13179 MLX5_FLOW_ACTION_INC_TCP_SEQ :
13180 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13183 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13184 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13185 if (flow_dv_convert_action_modify_tcp_ack
13186 (mhdr_res, actions, error))
13188 action_flags |= actions->type ==
13189 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13190 MLX5_FLOW_ACTION_INC_TCP_ACK :
13191 MLX5_FLOW_ACTION_DEC_TCP_ACK;
13193 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13194 if (flow_dv_convert_action_set_reg
13195 (mhdr_res, actions, error))
13197 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13199 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13200 if (flow_dv_convert_action_copy_mreg
13201 (dev, mhdr_res, actions, error))
13203 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13205 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13206 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13207 dev_flow->handle->fate_action =
13208 MLX5_FLOW_FATE_DEFAULT_MISS;
13210 case RTE_FLOW_ACTION_TYPE_METER:
13212 return rte_flow_error_set(error, rte_errno,
13213 RTE_FLOW_ERROR_TYPE_ACTION,
13214 NULL, "Failed to get meter in flow.");
13215 /* Set the meter action. */
13216 dev_flow->dv.actions[actions_n++] =
13217 wks->fm->meter_action;
13218 action_flags |= MLX5_FLOW_ACTION_METER;
13220 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13221 if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13224 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13226 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13227 if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13230 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13232 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13233 sample_act_pos = actions_n;
13234 sample = (const struct rte_flow_action_sample *)
13237 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13238 /* put encap action into group if work with port id */
13239 if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13240 (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13241 sample_act->action_flags |=
13242 MLX5_FLOW_ACTION_ENCAP;
13244 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13245 if (flow_dv_convert_action_modify_field
13246 (dev, mhdr_res, actions, attr, error))
13248 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13250 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13251 owner_idx = (uint32_t)(uintptr_t)action->conf;
13252 ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13254 return rte_flow_error_set(error, EINVAL,
13255 RTE_FLOW_ERROR_TYPE_ACTION,
13257 "Failed to get CT object.");
13258 if (mlx5_aso_ct_available(priv->sh, ct))
13259 return rte_flow_error_set(error, rte_errno,
13260 RTE_FLOW_ERROR_TYPE_ACTION,
13262 "CT is unavailable.");
13263 if (ct->is_original)
13264 dev_flow->dv.actions[actions_n] =
13265 ct->dr_action_orig;
13267 dev_flow->dv.actions[actions_n] =
13268 ct->dr_action_rply;
13269 if (flow->ct == 0) {
13270 flow->indirect_type =
13271 MLX5_INDIRECT_ACTION_TYPE_CT;
13272 flow->ct = owner_idx;
13273 __atomic_fetch_add(&ct->refcnt, 1,
13277 action_flags |= MLX5_FLOW_ACTION_CT;
13279 case RTE_FLOW_ACTION_TYPE_END:
13280 actions_end = true;
13281 if (mhdr_res->actions_num) {
13282 /* create modify action if needed. */
13283 if (flow_dv_modify_hdr_resource_register
13284 (dev, mhdr_res, dev_flow, error))
13286 dev_flow->dv.actions[modify_action_position] =
13287 handle->dvh.modify_hdr->action;
13290 * Handle AGE and COUNT action by single HW counter
13291 * when they are not shared.
13293 if (action_flags & MLX5_FLOW_ACTION_AGE) {
13294 if ((non_shared_age && count) ||
13295 !(priv->sh->flow_hit_aso_en &&
13296 (attr->group || attr->transfer))) {
13297 /* Creates age by counters. */
13298 cnt_act = flow_dv_prepare_counter
13305 dev_flow->dv.actions[age_act_pos] =
13309 if (!flow->age && non_shared_age) {
13310 flow->age = flow_dv_aso_age_alloc
13314 flow_dv_aso_age_params_init
13316 non_shared_age->context ?
13317 non_shared_age->context :
13318 (void *)(uintptr_t)
13319 (dev_flow->flow_idx),
13320 non_shared_age->timeout);
13322 age_act = flow_aso_age_get_by_idx(dev,
13324 dev_flow->dv.actions[age_act_pos] =
13325 age_act->dr_action;
13327 if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13329 * Create one count action, to be used
13330 * by all sub-flows.
13332 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13337 dev_flow->dv.actions[actions_n++] =
13343 if (mhdr_res->actions_num &&
13344 modify_action_position == UINT32_MAX)
13345 modify_action_position = actions_n++;
13347 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13348 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13349 int item_type = items->type;
13351 if (!mlx5_flow_os_item_supported(item_type))
13352 return rte_flow_error_set(error, ENOTSUP,
13353 RTE_FLOW_ERROR_TYPE_ITEM,
13354 NULL, "item not supported");
13355 switch (item_type) {
13356 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13357 flow_dv_translate_item_port_id
13358 (dev, match_mask, match_value, items, attr);
13359 last_item = MLX5_FLOW_ITEM_PORT_ID;
13361 case RTE_FLOW_ITEM_TYPE_ETH:
13362 flow_dv_translate_item_eth(match_mask, match_value,
13364 dev_flow->dv.group);
13365 matcher.priority = action_flags &
13366 MLX5_FLOW_ACTION_DEFAULT_MISS &&
13367 !dev_flow->external ?
13368 MLX5_PRIORITY_MAP_L3 :
13369 MLX5_PRIORITY_MAP_L2;
13370 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13371 MLX5_FLOW_LAYER_OUTER_L2;
13373 case RTE_FLOW_ITEM_TYPE_VLAN:
13374 flow_dv_translate_item_vlan(dev_flow,
13375 match_mask, match_value,
13377 dev_flow->dv.group);
13378 matcher.priority = MLX5_PRIORITY_MAP_L2;
13379 last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13380 MLX5_FLOW_LAYER_INNER_VLAN) :
13381 (MLX5_FLOW_LAYER_OUTER_L2 |
13382 MLX5_FLOW_LAYER_OUTER_VLAN);
13384 case RTE_FLOW_ITEM_TYPE_IPV4:
13385 mlx5_flow_tunnel_ip_check(items, next_protocol,
13386 &item_flags, &tunnel);
13387 flow_dv_translate_item_ipv4(match_mask, match_value,
13389 dev_flow->dv.group);
13390 matcher.priority = MLX5_PRIORITY_MAP_L3;
13391 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13392 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13393 if (items->mask != NULL &&
13394 ((const struct rte_flow_item_ipv4 *)
13395 items->mask)->hdr.next_proto_id) {
13397 ((const struct rte_flow_item_ipv4 *)
13398 (items->spec))->hdr.next_proto_id;
13400 ((const struct rte_flow_item_ipv4 *)
13401 (items->mask))->hdr.next_proto_id;
13403 /* Reset for inner layer. */
13404 next_protocol = 0xff;
13407 case RTE_FLOW_ITEM_TYPE_IPV6:
13408 mlx5_flow_tunnel_ip_check(items, next_protocol,
13409 &item_flags, &tunnel);
13410 flow_dv_translate_item_ipv6(match_mask, match_value,
13412 dev_flow->dv.group);
13413 matcher.priority = MLX5_PRIORITY_MAP_L3;
13414 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13415 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13416 if (items->mask != NULL &&
13417 ((const struct rte_flow_item_ipv6 *)
13418 items->mask)->hdr.proto) {
13420 ((const struct rte_flow_item_ipv6 *)
13421 items->spec)->hdr.proto;
13423 ((const struct rte_flow_item_ipv6 *)
13424 items->mask)->hdr.proto;
13426 /* Reset for inner layer. */
13427 next_protocol = 0xff;
13430 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13431 flow_dv_translate_item_ipv6_frag_ext(match_mask,
13434 last_item = tunnel ?
13435 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13436 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13437 if (items->mask != NULL &&
13438 ((const struct rte_flow_item_ipv6_frag_ext *)
13439 items->mask)->hdr.next_header) {
13441 ((const struct rte_flow_item_ipv6_frag_ext *)
13442 items->spec)->hdr.next_header;
13444 ((const struct rte_flow_item_ipv6_frag_ext *)
13445 items->mask)->hdr.next_header;
13447 /* Reset for inner layer. */
13448 next_protocol = 0xff;
13451 case RTE_FLOW_ITEM_TYPE_TCP:
13452 flow_dv_translate_item_tcp(match_mask, match_value,
13454 matcher.priority = MLX5_PRIORITY_MAP_L4;
13455 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13456 MLX5_FLOW_LAYER_OUTER_L4_TCP;
13458 case RTE_FLOW_ITEM_TYPE_UDP:
13459 flow_dv_translate_item_udp(match_mask, match_value,
13461 matcher.priority = MLX5_PRIORITY_MAP_L4;
13462 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13463 MLX5_FLOW_LAYER_OUTER_L4_UDP;
13465 case RTE_FLOW_ITEM_TYPE_GRE:
13466 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13467 last_item = MLX5_FLOW_LAYER_GRE;
13468 tunnel_item = items;
13470 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13471 flow_dv_translate_item_gre_key(match_mask,
13472 match_value, items);
13473 last_item = MLX5_FLOW_LAYER_GRE_KEY;
13475 case RTE_FLOW_ITEM_TYPE_NVGRE:
13476 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13477 last_item = MLX5_FLOW_LAYER_GRE;
13478 tunnel_item = items;
13480 case RTE_FLOW_ITEM_TYPE_VXLAN:
13481 flow_dv_translate_item_vxlan(dev, attr,
13482 match_mask, match_value,
13484 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13485 last_item = MLX5_FLOW_LAYER_VXLAN;
13487 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13488 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13489 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13490 tunnel_item = items;
13492 case RTE_FLOW_ITEM_TYPE_GENEVE:
13493 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13494 last_item = MLX5_FLOW_LAYER_GENEVE;
13495 tunnel_item = items;
13497 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13498 ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13502 return rte_flow_error_set(error, -ret,
13503 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13504 "cannot create GENEVE TLV option");
13505 flow->geneve_tlv_option = 1;
13506 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13508 case RTE_FLOW_ITEM_TYPE_MPLS:
13509 flow_dv_translate_item_mpls(match_mask, match_value,
13510 items, last_item, tunnel);
13511 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13512 last_item = MLX5_FLOW_LAYER_MPLS;
13514 case RTE_FLOW_ITEM_TYPE_MARK:
13515 flow_dv_translate_item_mark(dev, match_mask,
13516 match_value, items);
13517 last_item = MLX5_FLOW_ITEM_MARK;
13519 case RTE_FLOW_ITEM_TYPE_META:
13520 flow_dv_translate_item_meta(dev, match_mask,
13521 match_value, attr, items);
13522 last_item = MLX5_FLOW_ITEM_METADATA;
13524 case RTE_FLOW_ITEM_TYPE_ICMP:
13525 flow_dv_translate_item_icmp(match_mask, match_value,
13527 last_item = MLX5_FLOW_LAYER_ICMP;
13529 case RTE_FLOW_ITEM_TYPE_ICMP6:
13530 flow_dv_translate_item_icmp6(match_mask, match_value,
13532 last_item = MLX5_FLOW_LAYER_ICMP6;
13534 case RTE_FLOW_ITEM_TYPE_TAG:
13535 flow_dv_translate_item_tag(dev, match_mask,
13536 match_value, items);
13537 last_item = MLX5_FLOW_ITEM_TAG;
13539 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13540 flow_dv_translate_mlx5_item_tag(dev, match_mask,
13541 match_value, items);
13542 last_item = MLX5_FLOW_ITEM_TAG;
13544 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13545 flow_dv_translate_item_tx_queue(dev, match_mask,
13548 last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13550 case RTE_FLOW_ITEM_TYPE_GTP:
13551 flow_dv_translate_item_gtp(match_mask, match_value,
13553 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13554 last_item = MLX5_FLOW_LAYER_GTP;
13556 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13557 ret = flow_dv_translate_item_gtp_psc(match_mask,
13561 return rte_flow_error_set(error, -ret,
13562 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13563 "cannot create GTP PSC item");
13564 last_item = MLX5_FLOW_LAYER_GTP_PSC;
13566 case RTE_FLOW_ITEM_TYPE_ECPRI:
13567 if (!mlx5_flex_parser_ecpri_exist(dev)) {
13568 /* Create it only the first time to be used. */
13569 ret = mlx5_flex_parser_ecpri_alloc(dev);
13571 return rte_flow_error_set
13573 RTE_FLOW_ERROR_TYPE_ITEM,
13575 "cannot create eCPRI parser");
13577 flow_dv_translate_item_ecpri(dev, match_mask,
13578 match_value, items,
13580 /* No other protocol should follow eCPRI layer. */
13581 last_item = MLX5_FLOW_LAYER_ECPRI;
13583 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13584 flow_dv_translate_item_integrity(items, integrity_items,
13587 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13588 flow_dv_translate_item_aso_ct(dev, match_mask,
13589 match_value, items);
13591 case RTE_FLOW_ITEM_TYPE_FLEX:
13592 flow_dv_translate_item_flex(dev, match_mask,
13593 match_value, items,
13594 dev_flow, tunnel != 0);
13595 last_item = tunnel ? MLX5_FLOW_ITEM_INNER_FLEX :
13596 MLX5_FLOW_ITEM_OUTER_FLEX;
13601 item_flags |= last_item;
13604 * When E-Switch mode is enabled, we have two cases where we need to
13605 * set the source port manually.
13606 * The first one, is in case of Nic steering rule, and the second is
13607 * E-Switch rule where no port_id item was found. In both cases
13608 * the source port is set according the current port in use.
13610 if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13611 (priv->representor || priv->master)) {
13612 if (flow_dv_translate_item_port_id(dev, match_mask,
13613 match_value, NULL, attr))
13616 if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
13617 flow_dv_translate_item_integrity_post(match_mask, match_value,
13621 if (item_flags & MLX5_FLOW_LAYER_VXLAN_GPE)
13622 flow_dv_translate_item_vxlan_gpe(match_mask, match_value,
13623 tunnel_item, item_flags);
13624 else if (item_flags & MLX5_FLOW_LAYER_GENEVE)
13625 flow_dv_translate_item_geneve(match_mask, match_value,
13626 tunnel_item, item_flags);
13627 else if (item_flags & MLX5_FLOW_LAYER_GRE) {
13628 if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_GRE)
13629 flow_dv_translate_item_gre(match_mask, match_value,
13630 tunnel_item, item_flags);
13631 else if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_NVGRE)
13632 flow_dv_translate_item_nvgre(match_mask, match_value,
13633 tunnel_item, item_flags);
13635 MLX5_ASSERT(false);
13637 #ifdef RTE_LIBRTE_MLX5_DEBUG
13638 MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13639 dev_flow->dv.value.buf));
13642 * Layers may be already initialized from prefix flow if this dev_flow
13643 * is the suffix flow.
13645 handle->layers |= item_flags;
13646 if (action_flags & MLX5_FLOW_ACTION_RSS)
13647 flow_dv_hashfields_set(dev_flow, rss_desc);
13648 /* If has RSS action in the sample action, the Sample/Mirror resource
13649 * should be registered after the hash filed be update.
13651 if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13652 ret = flow_dv_translate_action_sample(dev,
13661 ret = flow_dv_create_action_sample(dev,
13670 return rte_flow_error_set
13672 RTE_FLOW_ERROR_TYPE_ACTION,
13674 "cannot create sample action");
13675 if (num_of_dest > 1) {
13676 dev_flow->dv.actions[sample_act_pos] =
13677 dev_flow->dv.dest_array_res->action;
13679 dev_flow->dv.actions[sample_act_pos] =
13680 dev_flow->dv.sample_res->verbs_action;
13684 * For multiple destination (sample action with ratio=1), the encap
13685 * action and port id action will be combined into group action.
13686 * So need remove the original these actions in the flow and only
13687 * use the sample action instead of.
13689 if (num_of_dest > 1 &&
13690 (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13692 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13694 for (i = 0; i < actions_n; i++) {
13695 if ((sample_act->dr_encap_action &&
13696 sample_act->dr_encap_action ==
13697 dev_flow->dv.actions[i]) ||
13698 (sample_act->dr_port_id_action &&
13699 sample_act->dr_port_id_action ==
13700 dev_flow->dv.actions[i]) ||
13701 (sample_act->dr_jump_action &&
13702 sample_act->dr_jump_action ==
13703 dev_flow->dv.actions[i]))
13705 temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13707 memcpy((void *)dev_flow->dv.actions,
13708 (void *)temp_actions,
13709 tmp_actions_n * sizeof(void *));
13710 actions_n = tmp_actions_n;
13712 dev_flow->dv.actions_n = actions_n;
13713 dev_flow->act_flags = action_flags;
13714 if (wks->skip_matcher_reg)
13716 /* Register matcher. */
13717 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13718 matcher.mask.size);
13719 matcher.priority = mlx5_get_matcher_priority(dev, attr,
13721 dev_flow->external);
13723 * When creating meter drop flow in drop table, using original
13724 * 5-tuple match, the matcher priority should be lower than
13727 if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13728 dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13729 matcher.priority <= MLX5_REG_BITS)
13730 matcher.priority += MLX5_REG_BITS;
13731 /* reserved field no needs to be set to 0 here. */
13732 tbl_key.is_fdb = attr->transfer;
13733 tbl_key.is_egress = attr->egress;
13734 tbl_key.level = dev_flow->dv.group;
13735 tbl_key.id = dev_flow->dv.table_id;
13736 if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13737 tunnel, attr->group, error))
13743 * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13746 * @param[in, out] action
13747 * Shred RSS action holding hash RX queue objects.
13748 * @param[in] hash_fields
13749 * Defines combination of packet fields to participate in RX hash.
13750 * @param[in] tunnel
13752 * @param[in] hrxq_idx
13753 * Hash RX queue index to set.
13756 * 0 on success, otherwise negative errno value.
13759 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13760 const uint64_t hash_fields,
13763 uint32_t *hrxqs = action->hrxq;
13765 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13766 case MLX5_RSS_HASH_IPV4:
13767 /* fall-through. */
13768 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13769 /* fall-through. */
13770 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13771 hrxqs[0] = hrxq_idx;
13773 case MLX5_RSS_HASH_IPV4_TCP:
13774 /* fall-through. */
13775 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13776 /* fall-through. */
13777 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13778 hrxqs[1] = hrxq_idx;
13780 case MLX5_RSS_HASH_IPV4_UDP:
13781 /* fall-through. */
13782 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13783 /* fall-through. */
13784 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13785 hrxqs[2] = hrxq_idx;
13787 case MLX5_RSS_HASH_IPV6:
13788 /* fall-through. */
13789 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13790 /* fall-through. */
13791 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13792 hrxqs[3] = hrxq_idx;
13794 case MLX5_RSS_HASH_IPV6_TCP:
13795 /* fall-through. */
13796 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13797 /* fall-through. */
13798 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13799 hrxqs[4] = hrxq_idx;
13801 case MLX5_RSS_HASH_IPV6_UDP:
13802 /* fall-through. */
13803 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13804 /* fall-through. */
13805 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13806 hrxqs[5] = hrxq_idx;
13808 case MLX5_RSS_HASH_NONE:
13809 hrxqs[6] = hrxq_idx;
13817 * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13821 * Pointer to the Ethernet device structure.
13823 * Shared RSS action ID holding hash RX queue objects.
13824 * @param[in] hash_fields
13825 * Defines combination of packet fields to participate in RX hash.
13826 * @param[in] tunnel
13830 * Valid hash RX queue index, otherwise 0.
13833 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13834 const uint64_t hash_fields)
13836 struct mlx5_priv *priv = dev->data->dev_private;
13837 struct mlx5_shared_action_rss *shared_rss =
13838 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13839 const uint32_t *hrxqs = shared_rss->hrxq;
13841 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13842 case MLX5_RSS_HASH_IPV4:
13843 /* fall-through. */
13844 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13845 /* fall-through. */
13846 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13848 case MLX5_RSS_HASH_IPV4_TCP:
13849 /* fall-through. */
13850 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13851 /* fall-through. */
13852 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13854 case MLX5_RSS_HASH_IPV4_UDP:
13855 /* fall-through. */
13856 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13857 /* fall-through. */
13858 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13860 case MLX5_RSS_HASH_IPV6:
13861 /* fall-through. */
13862 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13863 /* fall-through. */
13864 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13866 case MLX5_RSS_HASH_IPV6_TCP:
13867 /* fall-through. */
13868 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13869 /* fall-through. */
13870 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13872 case MLX5_RSS_HASH_IPV6_UDP:
13873 /* fall-through. */
13874 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13875 /* fall-through. */
13876 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13878 case MLX5_RSS_HASH_NONE:
13887 * Apply the flow to the NIC, lock free,
13888 * (mutex should be acquired by caller).
13891 * Pointer to the Ethernet device structure.
13892 * @param[in, out] flow
13893 * Pointer to flow structure.
13894 * @param[out] error
13895 * Pointer to error structure.
13898 * 0 on success, a negative errno value otherwise and rte_errno is set.
13901 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13902 struct rte_flow_error *error)
13904 struct mlx5_flow_dv_workspace *dv;
13905 struct mlx5_flow_handle *dh;
13906 struct mlx5_flow_handle_dv *dv_h;
13907 struct mlx5_flow *dev_flow;
13908 struct mlx5_priv *priv = dev->data->dev_private;
13909 uint32_t handle_idx;
13913 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13914 struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13918 for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13919 dev_flow = &wks->flows[idx];
13920 dv = &dev_flow->dv;
13921 dh = dev_flow->handle;
13924 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13925 if (dv->transfer) {
13926 MLX5_ASSERT(priv->sh->dr_drop_action);
13927 dv->actions[n++] = priv->sh->dr_drop_action;
13929 #ifdef HAVE_MLX5DV_DR
13930 /* DR supports drop action placeholder. */
13931 MLX5_ASSERT(priv->sh->dr_drop_action);
13932 dv->actions[n++] = dv->group ?
13933 priv->sh->dr_drop_action :
13934 priv->root_drop_action;
13936 /* For DV we use the explicit drop queue. */
13937 MLX5_ASSERT(priv->drop_queue.hrxq);
13939 priv->drop_queue.hrxq->action;
13942 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13943 !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13944 struct mlx5_hrxq *hrxq;
13947 hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13952 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13953 "cannot get hash queue");
13956 dh->rix_hrxq = hrxq_idx;
13957 dv->actions[n++] = hrxq->action;
13958 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13959 struct mlx5_hrxq *hrxq = NULL;
13962 hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13963 rss_desc->shared_rss,
13964 dev_flow->hash_fields);
13966 hrxq = mlx5_ipool_get
13967 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13972 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13973 "cannot get hash queue");
13976 dh->rix_srss = rss_desc->shared_rss;
13977 dv->actions[n++] = hrxq->action;
13978 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13979 if (!priv->sh->default_miss_action) {
13982 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13983 "default miss action not be created.");
13986 dv->actions[n++] = priv->sh->default_miss_action;
13988 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13989 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13990 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13991 (void *)&dv->value, n,
13992 dv->actions, &dh->drv_flow);
13996 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13998 (!priv->config.allow_duplicate_pattern &&
14000 "duplicating pattern is not allowed" :
14001 "hardware refuses to create flow");
14004 if (priv->vmwa_context &&
14005 dh->vf_vlan.tag && !dh->vf_vlan.created) {
14007 * The rule contains the VLAN pattern.
14008 * For VF we are going to create VLAN
14009 * interface to make hypervisor set correct
14010 * e-Switch vport context.
14012 mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
14017 err = rte_errno; /* Save rte_errno before cleanup. */
14018 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
14019 handle_idx, dh, next) {
14020 /* hrxq is union, don't clear it if the flag is not set. */
14021 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
14022 mlx5_hrxq_release(dev, dh->rix_hrxq);
14024 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
14027 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14028 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14030 rte_errno = err; /* Restore rte_errno. */
14035 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
14036 struct mlx5_list_entry *entry)
14038 struct mlx5_flow_dv_matcher *resource = container_of(entry,
14042 claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
14043 mlx5_free(resource);
14047 * Release the flow matcher.
14050 * Pointer to Ethernet device.
14052 * Index to port ID action resource.
14055 * 1 while a reference on it exists, 0 when freed.
14058 flow_dv_matcher_release(struct rte_eth_dev *dev,
14059 struct mlx5_flow_handle *handle)
14061 struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
14062 struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
14063 typeof(*tbl), tbl);
14066 MLX5_ASSERT(matcher->matcher_object);
14067 ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
14068 flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
14073 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14075 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14076 struct mlx5_flow_dv_encap_decap_resource *res =
14077 container_of(entry, typeof(*res), entry);
14079 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14080 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
14084 * Release an encap/decap resource.
14087 * Pointer to Ethernet device.
14088 * @param encap_decap_idx
14089 * Index of encap decap resource.
14092 * 1 while a reference on it exists, 0 when freed.
14095 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
14096 uint32_t encap_decap_idx)
14098 struct mlx5_priv *priv = dev->data->dev_private;
14099 struct mlx5_flow_dv_encap_decap_resource *resource;
14101 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
14105 MLX5_ASSERT(resource->action);
14106 return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
14110 * Release an jump to table action resource.
14113 * Pointer to Ethernet device.
14115 * Index to the jump action resource.
14118 * 1 while a reference on it exists, 0 when freed.
14121 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
14124 struct mlx5_priv *priv = dev->data->dev_private;
14125 struct mlx5_flow_tbl_data_entry *tbl_data;
14127 tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
14131 return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
14135 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14137 struct mlx5_flow_dv_modify_hdr_resource *res =
14138 container_of(entry, typeof(*res), entry);
14139 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14141 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14142 mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
14146 * Release a modify-header resource.
14149 * Pointer to Ethernet device.
14151 * Pointer to mlx5_flow_handle.
14154 * 1 while a reference on it exists, 0 when freed.
14157 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
14158 struct mlx5_flow_handle *handle)
14160 struct mlx5_priv *priv = dev->data->dev_private;
14161 struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
14163 MLX5_ASSERT(entry->action);
14164 return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14168 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14170 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14171 struct mlx5_flow_dv_port_id_action_resource *resource =
14172 container_of(entry, typeof(*resource), entry);
14174 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14175 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14179 * Release port ID action resource.
14182 * Pointer to Ethernet device.
14184 * Pointer to mlx5_flow_handle.
14187 * 1 while a reference on it exists, 0 when freed.
14190 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14193 struct mlx5_priv *priv = dev->data->dev_private;
14194 struct mlx5_flow_dv_port_id_action_resource *resource;
14196 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14199 MLX5_ASSERT(resource->action);
14200 return mlx5_list_unregister(priv->sh->port_id_action_list,
14205 * Release shared RSS action resource.
14208 * Pointer to Ethernet device.
14210 * Shared RSS action index.
14213 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14215 struct mlx5_priv *priv = dev->data->dev_private;
14216 struct mlx5_shared_action_rss *shared_rss;
14218 shared_rss = mlx5_ipool_get
14219 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14220 __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14224 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14226 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14227 struct mlx5_flow_dv_push_vlan_action_resource *resource =
14228 container_of(entry, typeof(*resource), entry);
14230 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14231 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14235 * Release push vlan action resource.
14238 * Pointer to Ethernet device.
14240 * Pointer to mlx5_flow_handle.
14243 * 1 while a reference on it exists, 0 when freed.
14246 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14247 struct mlx5_flow_handle *handle)
14249 struct mlx5_priv *priv = dev->data->dev_private;
14250 struct mlx5_flow_dv_push_vlan_action_resource *resource;
14251 uint32_t idx = handle->dvh.rix_push_vlan;
14253 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14256 MLX5_ASSERT(resource->action);
14257 return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14262 * Release the fate resource.
14265 * Pointer to Ethernet device.
14267 * Pointer to mlx5_flow_handle.
14270 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14271 struct mlx5_flow_handle *handle)
14273 if (!handle->rix_fate)
14275 switch (handle->fate_action) {
14276 case MLX5_FLOW_FATE_QUEUE:
14277 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14278 mlx5_hrxq_release(dev, handle->rix_hrxq);
14280 case MLX5_FLOW_FATE_JUMP:
14281 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14283 case MLX5_FLOW_FATE_PORT_ID:
14284 flow_dv_port_id_action_resource_release(dev,
14285 handle->rix_port_id_action);
14288 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14291 handle->rix_fate = 0;
14295 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14296 struct mlx5_list_entry *entry)
14298 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14301 struct rte_eth_dev *dev = resource->dev;
14302 struct mlx5_priv *priv = dev->data->dev_private;
14304 if (resource->verbs_action)
14305 claim_zero(mlx5_flow_os_destroy_flow_action
14306 (resource->verbs_action));
14307 if (resource->normal_path_tbl)
14308 flow_dv_tbl_resource_release(MLX5_SH(dev),
14309 resource->normal_path_tbl);
14310 flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14311 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14312 DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14316 * Release an sample resource.
14319 * Pointer to Ethernet device.
14321 * Pointer to mlx5_flow_handle.
14324 * 1 while a reference on it exists, 0 when freed.
14327 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14328 struct mlx5_flow_handle *handle)
14330 struct mlx5_priv *priv = dev->data->dev_private;
14331 struct mlx5_flow_dv_sample_resource *resource;
14333 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14334 handle->dvh.rix_sample);
14337 MLX5_ASSERT(resource->verbs_action);
14338 return mlx5_list_unregister(priv->sh->sample_action_list,
14343 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14344 struct mlx5_list_entry *entry)
14346 struct mlx5_flow_dv_dest_array_resource *resource =
14347 container_of(entry, typeof(*resource), entry);
14348 struct rte_eth_dev *dev = resource->dev;
14349 struct mlx5_priv *priv = dev->data->dev_private;
14352 MLX5_ASSERT(resource->action);
14353 if (resource->action)
14354 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14355 for (; i < resource->num_of_dest; i++)
14356 flow_dv_sample_sub_actions_release(dev,
14357 &resource->sample_idx[i]);
14358 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14359 DRV_LOG(DEBUG, "destination array resource %p: removed",
14364 * Release an destination array resource.
14367 * Pointer to Ethernet device.
14369 * Pointer to mlx5_flow_handle.
14372 * 1 while a reference on it exists, 0 when freed.
14375 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14376 struct mlx5_flow_handle *handle)
14378 struct mlx5_priv *priv = dev->data->dev_private;
14379 struct mlx5_flow_dv_dest_array_resource *resource;
14381 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14382 handle->dvh.rix_dest_array);
14385 MLX5_ASSERT(resource->action);
14386 return mlx5_list_unregister(priv->sh->dest_array_list,
14391 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14393 struct mlx5_priv *priv = dev->data->dev_private;
14394 struct mlx5_dev_ctx_shared *sh = priv->sh;
14395 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14396 sh->geneve_tlv_option_resource;
14397 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14398 if (geneve_opt_resource) {
14399 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14400 __ATOMIC_RELAXED))) {
14401 claim_zero(mlx5_devx_cmd_destroy
14402 (geneve_opt_resource->obj));
14403 mlx5_free(sh->geneve_tlv_option_resource);
14404 sh->geneve_tlv_option_resource = NULL;
14407 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14411 * Remove the flow from the NIC but keeps it in memory.
14412 * Lock free, (mutex should be acquired by caller).
14415 * Pointer to Ethernet device.
14416 * @param[in, out] flow
14417 * Pointer to flow structure.
14420 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14422 struct mlx5_flow_handle *dh;
14423 uint32_t handle_idx;
14424 struct mlx5_priv *priv = dev->data->dev_private;
14428 handle_idx = flow->dev_handles;
14429 while (handle_idx) {
14430 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14434 if (dh->drv_flow) {
14435 claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14436 dh->drv_flow = NULL;
14438 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14439 flow_dv_fate_resource_release(dev, dh);
14440 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14441 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14442 handle_idx = dh->next.next;
14447 * Remove the flow from the NIC and the memory.
14448 * Lock free, (mutex should be acquired by caller).
14451 * Pointer to the Ethernet device structure.
14452 * @param[in, out] flow
14453 * Pointer to flow structure.
14456 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14458 struct mlx5_flow_handle *dev_handle;
14459 struct mlx5_priv *priv = dev->data->dev_private;
14460 struct mlx5_flow_meter_info *fm = NULL;
14465 flow_dv_remove(dev, flow);
14466 if (flow->counter) {
14467 flow_dv_counter_free(dev, flow->counter);
14471 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14473 mlx5_flow_meter_detach(priv, fm);
14476 /* Keep the current age handling by default. */
14477 if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14478 flow_dv_aso_ct_release(dev, flow->ct, NULL);
14479 else if (flow->age)
14480 flow_dv_aso_age_release(dev, flow->age);
14481 if (flow->geneve_tlv_option) {
14482 flow_dv_geneve_tlv_option_resource_release(dev);
14483 flow->geneve_tlv_option = 0;
14485 while (flow->dev_handles) {
14486 uint32_t tmp_idx = flow->dev_handles;
14488 dev_handle = mlx5_ipool_get(priv->sh->ipool
14489 [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14492 flow->dev_handles = dev_handle->next.next;
14493 while (dev_handle->flex_item) {
14494 int index = rte_bsf32(dev_handle->flex_item);
14496 mlx5_flex_release_index(dev, index);
14497 dev_handle->flex_item &= ~RTE_BIT32(index);
14499 if (dev_handle->dvh.matcher)
14500 flow_dv_matcher_release(dev, dev_handle);
14501 if (dev_handle->dvh.rix_sample)
14502 flow_dv_sample_resource_release(dev, dev_handle);
14503 if (dev_handle->dvh.rix_dest_array)
14504 flow_dv_dest_array_resource_release(dev, dev_handle);
14505 if (dev_handle->dvh.rix_encap_decap)
14506 flow_dv_encap_decap_resource_release(dev,
14507 dev_handle->dvh.rix_encap_decap);
14508 if (dev_handle->dvh.modify_hdr)
14509 flow_dv_modify_hdr_resource_release(dev, dev_handle);
14510 if (dev_handle->dvh.rix_push_vlan)
14511 flow_dv_push_vlan_action_resource_release(dev,
14513 if (dev_handle->dvh.rix_tag)
14514 flow_dv_tag_release(dev,
14515 dev_handle->dvh.rix_tag);
14516 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14517 flow_dv_fate_resource_release(dev, dev_handle);
14519 srss = dev_handle->rix_srss;
14520 if (fm && dev_handle->is_meter_flow_id &&
14521 dev_handle->split_flow_id)
14522 mlx5_ipool_free(fm->flow_ipool,
14523 dev_handle->split_flow_id);
14524 else if (dev_handle->split_flow_id &&
14525 !dev_handle->is_meter_flow_id)
14526 mlx5_ipool_free(priv->sh->ipool
14527 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14528 dev_handle->split_flow_id);
14529 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14533 flow_dv_shared_rss_action_release(dev, srss);
14537 * Release array of hash RX queue objects.
14541 * Pointer to the Ethernet device structure.
14542 * @param[in, out] hrxqs
14543 * Array of hash RX queue objects.
14546 * Total number of references to hash RX queue objects in *hrxqs* array
14547 * after this operation.
14550 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14551 uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14556 for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14557 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14567 * Release all hash RX queue objects representing shared RSS action.
14570 * Pointer to the Ethernet device structure.
14571 * @param[in, out] action
14572 * Shared RSS action to remove hash RX queue objects from.
14575 * Total number of references to hash RX queue objects stored in *action*
14576 * after this operation.
14577 * Expected to be 0 if no external references held.
14580 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14581 struct mlx5_shared_action_rss *shared_rss)
14583 return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14587 * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14590 * Only one hash value is available for one L3+L4 combination:
14592 * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14593 * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14594 * same slot in mlx5_rss_hash_fields.
14597 * Pointer to the shared action RSS conf.
14598 * @param[in, out] hash_field
14599 * hash_field variable needed to be adjusted.
14605 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14606 uint64_t *hash_field)
14608 uint64_t rss_types = rss->origin.types;
14610 switch (*hash_field & ~IBV_RX_HASH_INNER) {
14611 case MLX5_RSS_HASH_IPV4:
14612 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14613 *hash_field &= ~MLX5_RSS_HASH_IPV4;
14614 if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14615 *hash_field |= IBV_RX_HASH_DST_IPV4;
14616 else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14617 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14619 *hash_field |= MLX5_RSS_HASH_IPV4;
14622 case MLX5_RSS_HASH_IPV6:
14623 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14624 *hash_field &= ~MLX5_RSS_HASH_IPV6;
14625 if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14626 *hash_field |= IBV_RX_HASH_DST_IPV6;
14627 else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14628 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14630 *hash_field |= MLX5_RSS_HASH_IPV6;
14633 case MLX5_RSS_HASH_IPV4_UDP:
14634 /* fall-through. */
14635 case MLX5_RSS_HASH_IPV6_UDP:
14636 if (rss_types & RTE_ETH_RSS_UDP) {
14637 *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14638 if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14639 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14640 else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14641 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14643 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14646 case MLX5_RSS_HASH_IPV4_TCP:
14647 /* fall-through. */
14648 case MLX5_RSS_HASH_IPV6_TCP:
14649 if (rss_types & RTE_ETH_RSS_TCP) {
14650 *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14651 if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14652 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14653 else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14654 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14656 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14665 * Setup shared RSS action.
14666 * Prepare set of hash RX queue objects sufficient to handle all valid
14667 * hash_fields combinations (see enum ibv_rx_hash_fields).
14670 * Pointer to the Ethernet device structure.
14671 * @param[in] action_idx
14672 * Shared RSS action ipool index.
14673 * @param[in, out] action
14674 * Partially initialized shared RSS action.
14675 * @param[out] error
14676 * Perform verbose error reporting if not NULL. Initialized in case of
14680 * 0 on success, otherwise negative errno value.
14683 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14684 uint32_t action_idx,
14685 struct mlx5_shared_action_rss *shared_rss,
14686 struct rte_flow_error *error)
14688 struct mlx5_flow_rss_desc rss_desc = { 0 };
14692 if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl,
14693 !!dev->data->dev_started)) {
14694 return rte_flow_error_set(error, rte_errno,
14695 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14696 "cannot setup indirection table");
14698 memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14699 rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14700 rss_desc.const_q = shared_rss->origin.queue;
14701 rss_desc.queue_num = shared_rss->origin.queue_num;
14702 /* Set non-zero value to indicate a shared RSS. */
14703 rss_desc.shared_rss = action_idx;
14704 rss_desc.ind_tbl = shared_rss->ind_tbl;
14705 for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14707 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14710 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14711 if (shared_rss->origin.level > 1) {
14712 hash_fields |= IBV_RX_HASH_INNER;
14715 rss_desc.tunnel = tunnel;
14716 rss_desc.hash_fields = hash_fields;
14717 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14721 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14722 "cannot get hash queue");
14723 goto error_hrxq_new;
14725 err = __flow_dv_action_rss_hrxq_set
14726 (shared_rss, hash_fields, hrxq_idx);
14732 __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14733 if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true, true))
14734 shared_rss->ind_tbl = NULL;
14740 * Create shared RSS action.
14743 * Pointer to the Ethernet device structure.
14745 * Shared action configuration.
14747 * RSS action specification used to create shared action.
14748 * @param[out] error
14749 * Perform verbose error reporting if not NULL. Initialized in case of
14753 * A valid shared action ID in case of success, 0 otherwise and
14754 * rte_errno is set.
14757 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14758 const struct rte_flow_indir_action_conf *conf,
14759 const struct rte_flow_action_rss *rss,
14760 struct rte_flow_error *error)
14762 struct mlx5_priv *priv = dev->data->dev_private;
14763 struct mlx5_shared_action_rss *shared_rss = NULL;
14764 void *queue = NULL;
14765 struct rte_flow_action_rss *origin;
14766 const uint8_t *rss_key;
14767 uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14770 RTE_SET_USED(conf);
14771 queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14773 shared_rss = mlx5_ipool_zmalloc
14774 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14775 if (!shared_rss || !queue) {
14776 rte_flow_error_set(error, ENOMEM,
14777 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14778 "cannot allocate resource memory");
14779 goto error_rss_init;
14781 if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14782 rte_flow_error_set(error, E2BIG,
14783 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14784 "rss action number out of range");
14785 goto error_rss_init;
14787 shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14788 sizeof(*shared_rss->ind_tbl),
14790 if (!shared_rss->ind_tbl) {
14791 rte_flow_error_set(error, ENOMEM,
14792 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14793 "cannot allocate resource memory");
14794 goto error_rss_init;
14796 memcpy(queue, rss->queue, queue_size);
14797 shared_rss->ind_tbl->queues = queue;
14798 shared_rss->ind_tbl->queues_n = rss->queue_num;
14799 origin = &shared_rss->origin;
14800 origin->func = rss->func;
14801 origin->level = rss->level;
14802 /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
14803 origin->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
14804 /* NULL RSS key indicates default RSS key. */
14805 rss_key = !rss->key ? rss_hash_default_key : rss->key;
14806 memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14807 origin->key = &shared_rss->key[0];
14808 origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14809 origin->queue = queue;
14810 origin->queue_num = rss->queue_num;
14811 if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14812 goto error_rss_init;
14813 rte_spinlock_init(&shared_rss->action_rss_sl);
14814 __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14815 rte_spinlock_lock(&priv->shared_act_sl);
14816 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14817 &priv->rss_shared_actions, idx, shared_rss, next);
14818 rte_spinlock_unlock(&priv->shared_act_sl);
14822 if (shared_rss->ind_tbl)
14823 mlx5_free(shared_rss->ind_tbl);
14824 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14833 * Destroy the shared RSS action.
14834 * Release related hash RX queue objects.
14837 * Pointer to the Ethernet device structure.
14839 * The shared RSS action object ID to be removed.
14840 * @param[out] error
14841 * Perform verbose error reporting if not NULL. Initialized in case of
14845 * 0 on success, otherwise negative errno value.
14848 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14849 struct rte_flow_error *error)
14851 struct mlx5_priv *priv = dev->data->dev_private;
14852 struct mlx5_shared_action_rss *shared_rss =
14853 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14854 uint32_t old_refcnt = 1;
14856 uint16_t *queue = NULL;
14859 return rte_flow_error_set(error, EINVAL,
14860 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14861 "invalid shared action");
14862 if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14863 0, 0, __ATOMIC_ACQUIRE,
14865 return rte_flow_error_set(error, EBUSY,
14866 RTE_FLOW_ERROR_TYPE_ACTION,
14868 "shared rss has references");
14869 remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14871 return rte_flow_error_set(error, EBUSY,
14872 RTE_FLOW_ERROR_TYPE_ACTION,
14874 "shared rss hrxq has references");
14875 queue = shared_rss->ind_tbl->queues;
14876 remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true,
14877 !!dev->data->dev_started);
14879 return rte_flow_error_set(error, EBUSY,
14880 RTE_FLOW_ERROR_TYPE_ACTION,
14882 "shared rss indirection table has"
14885 rte_spinlock_lock(&priv->shared_act_sl);
14886 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14887 &priv->rss_shared_actions, idx, shared_rss, next);
14888 rte_spinlock_unlock(&priv->shared_act_sl);
14889 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14895 * Create indirect action, lock free,
14896 * (mutex should be acquired by caller).
14897 * Dispatcher for action type specific call.
14900 * Pointer to the Ethernet device structure.
14902 * Shared action configuration.
14903 * @param[in] action
14904 * Action specification used to create indirect action.
14905 * @param[out] error
14906 * Perform verbose error reporting if not NULL. Initialized in case of
14910 * A valid shared action handle in case of success, NULL otherwise and
14911 * rte_errno is set.
14913 static struct rte_flow_action_handle *
14914 flow_dv_action_create(struct rte_eth_dev *dev,
14915 const struct rte_flow_indir_action_conf *conf,
14916 const struct rte_flow_action *action,
14917 struct rte_flow_error *err)
14919 struct mlx5_priv *priv = dev->data->dev_private;
14920 uint32_t age_idx = 0;
14924 switch (action->type) {
14925 case RTE_FLOW_ACTION_TYPE_RSS:
14926 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14927 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14928 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14930 case RTE_FLOW_ACTION_TYPE_AGE:
14931 age_idx = flow_dv_aso_age_alloc(dev, err);
14936 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14937 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14938 flow_dv_aso_age_params_init(dev, age_idx,
14939 ((const struct rte_flow_action_age *)
14940 action->conf)->context ?
14941 ((const struct rte_flow_action_age *)
14942 action->conf)->context :
14943 (void *)(uintptr_t)idx,
14944 ((const struct rte_flow_action_age *)
14945 action->conf)->timeout);
14948 case RTE_FLOW_ACTION_TYPE_COUNT:
14949 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14950 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14951 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14953 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14954 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14956 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14959 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14960 NULL, "action type not supported");
14963 return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14967 * Destroy the indirect action.
14968 * Release action related resources on the NIC and the memory.
14969 * Lock free, (mutex should be acquired by caller).
14970 * Dispatcher for action type specific call.
14973 * Pointer to the Ethernet device structure.
14974 * @param[in] handle
14975 * The indirect action object handle to be removed.
14976 * @param[out] error
14977 * Perform verbose error reporting if not NULL. Initialized in case of
14981 * 0 on success, otherwise negative errno value.
14984 flow_dv_action_destroy(struct rte_eth_dev *dev,
14985 struct rte_flow_action_handle *handle,
14986 struct rte_flow_error *error)
14988 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14989 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14990 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14991 struct mlx5_flow_counter *cnt;
14992 uint32_t no_flow_refcnt = 1;
14996 case MLX5_INDIRECT_ACTION_TYPE_RSS:
14997 return __flow_dv_action_rss_release(dev, idx, error);
14998 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14999 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
15000 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
15001 &no_flow_refcnt, 1, false,
15004 return rte_flow_error_set(error, EBUSY,
15005 RTE_FLOW_ERROR_TYPE_ACTION,
15007 "Indirect count action has references");
15008 flow_dv_counter_free(dev, idx);
15010 case MLX5_INDIRECT_ACTION_TYPE_AGE:
15011 ret = flow_dv_aso_age_release(dev, idx);
15014 * In this case, the last flow has a reference will
15015 * actually release the age action.
15017 DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
15018 " released with references %d.", idx, ret);
15020 case MLX5_INDIRECT_ACTION_TYPE_CT:
15021 ret = flow_dv_aso_ct_release(dev, idx, error);
15025 DRV_LOG(DEBUG, "Connection tracking object %u still "
15026 "has references %d.", idx, ret);
15029 return rte_flow_error_set(error, ENOTSUP,
15030 RTE_FLOW_ERROR_TYPE_ACTION,
15032 "action type not supported");
15037 * Updates in place shared RSS action configuration.
15040 * Pointer to the Ethernet device structure.
15042 * The shared RSS action object ID to be updated.
15043 * @param[in] action_conf
15044 * RSS action specification used to modify *shared_rss*.
15045 * @param[out] error
15046 * Perform verbose error reporting if not NULL. Initialized in case of
15050 * 0 on success, otherwise negative errno value.
15051 * @note: currently only support update of RSS queues.
15054 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
15055 const struct rte_flow_action_rss *action_conf,
15056 struct rte_flow_error *error)
15058 struct mlx5_priv *priv = dev->data->dev_private;
15059 struct mlx5_shared_action_rss *shared_rss =
15060 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
15062 void *queue = NULL;
15063 uint16_t *queue_old = NULL;
15064 uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
15065 bool dev_started = !!dev->data->dev_started;
15068 return rte_flow_error_set(error, EINVAL,
15069 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15070 "invalid shared action to update");
15071 if (priv->obj_ops.ind_table_modify == NULL)
15072 return rte_flow_error_set(error, ENOTSUP,
15073 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15074 "cannot modify indirection table");
15075 queue = mlx5_malloc(MLX5_MEM_ZERO,
15076 RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
15079 return rte_flow_error_set(error, ENOMEM,
15080 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15082 "cannot allocate resource memory");
15083 memcpy(queue, action_conf->queue, queue_size);
15084 MLX5_ASSERT(shared_rss->ind_tbl);
15085 rte_spinlock_lock(&shared_rss->action_rss_sl);
15086 queue_old = shared_rss->ind_tbl->queues;
15087 ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
15088 queue, action_conf->queue_num,
15089 true /* standalone */,
15090 dev_started /* ref_new_qs */,
15091 dev_started /* deref_old_qs */);
15094 ret = rte_flow_error_set(error, rte_errno,
15095 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15096 "cannot update indirection table");
15098 mlx5_free(queue_old);
15099 shared_rss->origin.queue = queue;
15100 shared_rss->origin.queue_num = action_conf->queue_num;
15102 rte_spinlock_unlock(&shared_rss->action_rss_sl);
15107 * Updates in place conntrack context or direction.
15108 * Context update should be synchronized.
15111 * Pointer to the Ethernet device structure.
15113 * The conntrack object ID to be updated.
15114 * @param[in] update
15115 * Pointer to the structure of information to update.
15116 * @param[out] error
15117 * Perform verbose error reporting if not NULL. Initialized in case of
15121 * 0 on success, otherwise negative errno value.
15124 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
15125 const struct rte_flow_modify_conntrack *update,
15126 struct rte_flow_error *error)
15128 struct mlx5_priv *priv = dev->data->dev_private;
15129 struct mlx5_aso_ct_action *ct;
15130 const struct rte_flow_action_conntrack *new_prf;
15132 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15135 if (PORT_ID(priv) != owner)
15136 return rte_flow_error_set(error, EACCES,
15137 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15139 "CT object owned by another port");
15140 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15141 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15143 return rte_flow_error_set(error, ENOMEM,
15144 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15146 "CT object is inactive");
15147 new_prf = &update->new_ct;
15148 if (update->direction)
15149 ct->is_original = !!new_prf->is_original_dir;
15150 if (update->state) {
15151 /* Only validate the profile when it needs to be updated. */
15152 ret = mlx5_validate_action_ct(dev, new_prf, error);
15155 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
15157 return rte_flow_error_set(error, EIO,
15158 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15160 "Failed to send CT context update WQE");
15161 /* Block until ready or a failure. */
15162 ret = mlx5_aso_ct_available(priv->sh, ct);
15164 rte_flow_error_set(error, rte_errno,
15165 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15167 "Timeout to get the CT update");
15173 * Updates in place shared action configuration, lock free,
15174 * (mutex should be acquired by caller).
15177 * Pointer to the Ethernet device structure.
15178 * @param[in] handle
15179 * The indirect action object handle to be updated.
15180 * @param[in] update
15181 * Action specification used to modify the action pointed by *handle*.
15182 * *update* could be of same type with the action pointed by the *handle*
15183 * handle argument, or some other structures like a wrapper, depending on
15184 * the indirect action type.
15185 * @param[out] error
15186 * Perform verbose error reporting if not NULL. Initialized in case of
15190 * 0 on success, otherwise negative errno value.
15193 flow_dv_action_update(struct rte_eth_dev *dev,
15194 struct rte_flow_action_handle *handle,
15195 const void *update,
15196 struct rte_flow_error *err)
15198 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15199 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15200 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15201 const void *action_conf;
15204 case MLX5_INDIRECT_ACTION_TYPE_RSS:
15205 action_conf = ((const struct rte_flow_action *)update)->conf;
15206 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15207 case MLX5_INDIRECT_ACTION_TYPE_CT:
15208 return __flow_dv_action_ct_update(dev, idx, update, err);
15210 return rte_flow_error_set(err, ENOTSUP,
15211 RTE_FLOW_ERROR_TYPE_ACTION,
15213 "action type update not supported");
15218 * Destroy the meter sub policy table rules.
15219 * Lock free, (mutex should be acquired by caller).
15222 * Pointer to Ethernet device.
15223 * @param[in] sub_policy
15224 * Pointer to meter sub policy table.
15227 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15228 struct mlx5_flow_meter_sub_policy *sub_policy)
15230 struct mlx5_priv *priv = dev->data->dev_private;
15231 struct mlx5_flow_tbl_data_entry *tbl;
15232 struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15233 struct mlx5_flow_meter_info *next_fm;
15234 struct mlx5_sub_policy_color_rule *color_rule;
15238 for (i = 0; i < RTE_COLORS; i++) {
15240 if (i == RTE_COLOR_GREEN && policy &&
15241 policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15242 next_fm = mlx5_flow_meter_find(priv,
15243 policy->act_cnt[i].next_mtr_id, NULL);
15244 RTE_TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15246 claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15247 tbl = container_of(color_rule->matcher->tbl,
15248 typeof(*tbl), tbl);
15249 mlx5_list_unregister(tbl->matchers,
15250 &color_rule->matcher->entry);
15251 TAILQ_REMOVE(&sub_policy->color_rules[i],
15252 color_rule, next_port);
15253 mlx5_free(color_rule);
15255 mlx5_flow_meter_detach(priv, next_fm);
15258 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15259 if (sub_policy->rix_hrxq[i]) {
15260 if (policy && !policy->is_hierarchy)
15261 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15262 sub_policy->rix_hrxq[i] = 0;
15264 if (sub_policy->jump_tbl[i]) {
15265 flow_dv_tbl_resource_release(MLX5_SH(dev),
15266 sub_policy->jump_tbl[i]);
15267 sub_policy->jump_tbl[i] = NULL;
15270 if (sub_policy->tbl_rsc) {
15271 flow_dv_tbl_resource_release(MLX5_SH(dev),
15272 sub_policy->tbl_rsc);
15273 sub_policy->tbl_rsc = NULL;
15278 * Destroy policy rules, lock free,
15279 * (mutex should be acquired by caller).
15280 * Dispatcher for action type specific call.
15283 * Pointer to the Ethernet device structure.
15284 * @param[in] mtr_policy
15285 * Meter policy struct.
15288 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15289 struct mlx5_flow_meter_policy *mtr_policy)
15292 struct mlx5_flow_meter_sub_policy *sub_policy;
15293 uint16_t sub_policy_num;
15295 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15296 sub_policy_num = (mtr_policy->sub_policy_num >>
15297 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15298 MLX5_MTR_SUB_POLICY_NUM_MASK;
15299 for (j = 0; j < sub_policy_num; j++) {
15300 sub_policy = mtr_policy->sub_policys[i][j];
15302 __flow_dv_destroy_sub_policy_rules(dev,
15309 * Destroy policy action, lock free,
15310 * (mutex should be acquired by caller).
15311 * Dispatcher for action type specific call.
15314 * Pointer to the Ethernet device structure.
15315 * @param[in] mtr_policy
15316 * Meter policy struct.
15319 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15320 struct mlx5_flow_meter_policy *mtr_policy)
15322 struct rte_flow_action *rss_action;
15323 struct mlx5_flow_handle dev_handle;
15326 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15327 if (mtr_policy->act_cnt[i].rix_mark) {
15328 flow_dv_tag_release(dev,
15329 mtr_policy->act_cnt[i].rix_mark);
15330 mtr_policy->act_cnt[i].rix_mark = 0;
15332 if (mtr_policy->act_cnt[i].modify_hdr) {
15333 dev_handle.dvh.modify_hdr =
15334 mtr_policy->act_cnt[i].modify_hdr;
15335 flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15337 switch (mtr_policy->act_cnt[i].fate_action) {
15338 case MLX5_FLOW_FATE_SHARED_RSS:
15339 rss_action = mtr_policy->act_cnt[i].rss;
15340 mlx5_free(rss_action);
15342 case MLX5_FLOW_FATE_PORT_ID:
15343 if (mtr_policy->act_cnt[i].rix_port_id_action) {
15344 flow_dv_port_id_action_resource_release(dev,
15345 mtr_policy->act_cnt[i].rix_port_id_action);
15346 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15349 case MLX5_FLOW_FATE_DROP:
15350 case MLX5_FLOW_FATE_JUMP:
15351 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15352 mtr_policy->act_cnt[i].dr_jump_action[j] =
15356 /*Queue action do nothing*/
15360 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15361 mtr_policy->dr_drop_action[j] = NULL;
15365 * Create policy action per domain, lock free,
15366 * (mutex should be acquired by caller).
15367 * Dispatcher for action type specific call.
15370 * Pointer to the Ethernet device structure.
15371 * @param[in] mtr_policy
15372 * Meter policy struct.
15373 * @param[in] action
15374 * Action specification used to create meter actions.
15375 * @param[out] error
15376 * Perform verbose error reporting if not NULL. Initialized in case of
15380 * 0 on success, otherwise negative errno value.
15383 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15384 struct mlx5_flow_meter_policy *mtr_policy,
15385 const struct rte_flow_action *actions[RTE_COLORS],
15386 enum mlx5_meter_domain domain,
15387 struct rte_mtr_error *error)
15389 struct mlx5_priv *priv = dev->data->dev_private;
15390 struct rte_flow_error flow_err;
15391 const struct rte_flow_action *act;
15392 uint64_t action_flags;
15393 struct mlx5_flow_handle dh;
15394 struct mlx5_flow dev_flow;
15395 struct mlx5_flow_dv_port_id_action_resource port_id_action;
15397 uint8_t egress, transfer;
15398 struct mlx5_meter_policy_action_container *act_cnt = NULL;
15400 struct mlx5_flow_dv_modify_hdr_resource res;
15401 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15402 sizeof(struct mlx5_modification_cmd) *
15403 (MLX5_MAX_MODIFY_NUM + 1)];
15405 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15406 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
15409 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15410 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15411 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15412 memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15413 memset(&port_id_action, 0,
15414 sizeof(struct mlx5_flow_dv_port_id_action_resource));
15415 memset(mhdr_res, 0, sizeof(*mhdr_res));
15416 mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15417 (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15418 MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15419 dev_flow.handle = &dh;
15420 dev_flow.dv.port_id_action = &port_id_action;
15421 dev_flow.external = true;
15422 for (i = 0; i < RTE_COLORS; i++) {
15423 if (i < MLX5_MTR_RTE_COLORS)
15424 act_cnt = &mtr_policy->act_cnt[i];
15425 /* Skip the color policy actions creation. */
15426 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15427 (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15430 for (act = actions[i];
15431 act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15432 switch (act->type) {
15433 case RTE_FLOW_ACTION_TYPE_MARK:
15435 uint32_t tag_be = mlx5_flow_mark_set
15436 (((const struct rte_flow_action_mark *)
15439 if (i >= MLX5_MTR_RTE_COLORS)
15440 return -rte_mtr_error_set(error,
15442 RTE_MTR_ERROR_TYPE_METER_POLICY,
15444 "cannot create policy "
15445 "mark action for this color");
15447 if (flow_dv_tag_resource_register(dev, tag_be,
15448 &dev_flow, &flow_err))
15449 return -rte_mtr_error_set(error,
15451 RTE_MTR_ERROR_TYPE_METER_POLICY,
15453 "cannot setup policy mark action");
15454 MLX5_ASSERT(dev_flow.dv.tag_resource);
15455 act_cnt->rix_mark =
15456 dev_flow.handle->dvh.rix_tag;
15457 action_flags |= MLX5_FLOW_ACTION_MARK;
15460 case RTE_FLOW_ACTION_TYPE_SET_TAG:
15461 if (i >= MLX5_MTR_RTE_COLORS)
15462 return -rte_mtr_error_set(error,
15464 RTE_MTR_ERROR_TYPE_METER_POLICY,
15466 "cannot create policy "
15467 "set tag action for this color");
15468 if (flow_dv_convert_action_set_tag
15470 (const struct rte_flow_action_set_tag *)
15471 act->conf, &flow_err))
15472 return -rte_mtr_error_set(error,
15474 RTE_MTR_ERROR_TYPE_METER_POLICY,
15475 NULL, "cannot convert policy "
15477 if (!mhdr_res->actions_num)
15478 return -rte_mtr_error_set(error,
15480 RTE_MTR_ERROR_TYPE_METER_POLICY,
15481 NULL, "cannot find policy "
15483 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15485 case RTE_FLOW_ACTION_TYPE_DROP:
15487 struct mlx5_flow_mtr_mng *mtrmng =
15489 struct mlx5_flow_tbl_data_entry *tbl_data;
15492 * Create the drop table with
15493 * METER DROP level.
15495 if (!mtrmng->drop_tbl[domain]) {
15496 mtrmng->drop_tbl[domain] =
15497 flow_dv_tbl_resource_get(dev,
15498 MLX5_FLOW_TABLE_LEVEL_METER,
15499 egress, transfer, false, NULL, 0,
15500 0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15501 if (!mtrmng->drop_tbl[domain])
15502 return -rte_mtr_error_set
15504 RTE_MTR_ERROR_TYPE_METER_POLICY,
15506 "Failed to create meter drop table");
15508 tbl_data = container_of
15509 (mtrmng->drop_tbl[domain],
15510 struct mlx5_flow_tbl_data_entry, tbl);
15511 if (i < MLX5_MTR_RTE_COLORS) {
15512 act_cnt->dr_jump_action[domain] =
15513 tbl_data->jump.action;
15514 act_cnt->fate_action =
15515 MLX5_FLOW_FATE_DROP;
15517 if (i == RTE_COLOR_RED)
15518 mtr_policy->dr_drop_action[domain] =
15519 tbl_data->jump.action;
15520 action_flags |= MLX5_FLOW_ACTION_DROP;
15523 case RTE_FLOW_ACTION_TYPE_QUEUE:
15525 if (i >= MLX5_MTR_RTE_COLORS)
15526 return -rte_mtr_error_set(error,
15528 RTE_MTR_ERROR_TYPE_METER_POLICY,
15529 NULL, "cannot create policy "
15530 "fate queue for this color");
15532 ((const struct rte_flow_action_queue *)
15533 (act->conf))->index;
15534 act_cnt->fate_action =
15535 MLX5_FLOW_FATE_QUEUE;
15536 dev_flow.handle->fate_action =
15537 MLX5_FLOW_FATE_QUEUE;
15538 mtr_policy->is_queue = 1;
15539 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15542 case RTE_FLOW_ACTION_TYPE_RSS:
15546 if (i >= MLX5_MTR_RTE_COLORS)
15547 return -rte_mtr_error_set(error,
15549 RTE_MTR_ERROR_TYPE_METER_POLICY,
15551 "cannot create policy "
15552 "rss action for this color");
15554 * Save RSS conf into policy struct
15555 * for translate stage.
15557 rss_size = (int)rte_flow_conv
15558 (RTE_FLOW_CONV_OP_ACTION,
15559 NULL, 0, act, &flow_err);
15561 return -rte_mtr_error_set(error,
15563 RTE_MTR_ERROR_TYPE_METER_POLICY,
15564 NULL, "Get the wrong "
15565 "rss action struct size");
15566 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15567 rss_size, 0, SOCKET_ID_ANY);
15569 return -rte_mtr_error_set(error,
15571 RTE_MTR_ERROR_TYPE_METER_POLICY,
15573 "Fail to malloc rss action memory");
15574 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15575 act_cnt->rss, rss_size,
15578 return -rte_mtr_error_set(error,
15580 RTE_MTR_ERROR_TYPE_METER_POLICY,
15581 NULL, "Fail to save "
15582 "rss action into policy struct");
15583 act_cnt->fate_action =
15584 MLX5_FLOW_FATE_SHARED_RSS;
15585 action_flags |= MLX5_FLOW_ACTION_RSS;
15588 case RTE_FLOW_ACTION_TYPE_PORT_ID:
15589 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
15591 struct mlx5_flow_dv_port_id_action_resource
15593 uint32_t port_id = 0;
15595 if (i >= MLX5_MTR_RTE_COLORS)
15596 return -rte_mtr_error_set(error,
15598 RTE_MTR_ERROR_TYPE_METER_POLICY,
15599 NULL, "cannot create policy "
15600 "port action for this color");
15601 memset(&port_id_resource, 0,
15602 sizeof(port_id_resource));
15603 if (flow_dv_translate_action_port_id(dev, act,
15604 &port_id, &flow_err))
15605 return -rte_mtr_error_set(error,
15607 RTE_MTR_ERROR_TYPE_METER_POLICY,
15608 NULL, "cannot translate "
15609 "policy port action");
15610 port_id_resource.port_id = port_id;
15611 if (flow_dv_port_id_action_resource_register
15612 (dev, &port_id_resource,
15613 &dev_flow, &flow_err))
15614 return -rte_mtr_error_set(error,
15616 RTE_MTR_ERROR_TYPE_METER_POLICY,
15617 NULL, "cannot setup "
15618 "policy port action");
15619 act_cnt->rix_port_id_action =
15620 dev_flow.handle->rix_port_id_action;
15621 act_cnt->fate_action =
15622 MLX5_FLOW_FATE_PORT_ID;
15623 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15626 case RTE_FLOW_ACTION_TYPE_JUMP:
15628 uint32_t jump_group = 0;
15629 uint32_t table = 0;
15630 struct mlx5_flow_tbl_data_entry *tbl_data;
15631 struct flow_grp_info grp_info = {
15632 .external = !!dev_flow.external,
15633 .transfer = !!transfer,
15634 .fdb_def_rule = !!priv->fdb_def_rule,
15636 .skip_scale = dev_flow.skip_scale &
15637 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15639 struct mlx5_flow_meter_sub_policy *sub_policy =
15640 mtr_policy->sub_policys[domain][0];
15642 if (i >= MLX5_MTR_RTE_COLORS)
15643 return -rte_mtr_error_set(error,
15645 RTE_MTR_ERROR_TYPE_METER_POLICY,
15647 "cannot create policy "
15648 "jump action for this color");
15650 ((const struct rte_flow_action_jump *)
15652 if (mlx5_flow_group_to_table(dev, NULL,
15655 &grp_info, &flow_err))
15656 return -rte_mtr_error_set(error,
15658 RTE_MTR_ERROR_TYPE_METER_POLICY,
15659 NULL, "cannot setup "
15660 "policy jump action");
15661 sub_policy->jump_tbl[i] =
15662 flow_dv_tbl_resource_get(dev,
15665 !!dev_flow.external,
15666 NULL, jump_group, 0,
15669 (!sub_policy->jump_tbl[i])
15670 return -rte_mtr_error_set(error,
15672 RTE_MTR_ERROR_TYPE_METER_POLICY,
15673 NULL, "cannot create jump action.");
15674 tbl_data = container_of
15675 (sub_policy->jump_tbl[i],
15676 struct mlx5_flow_tbl_data_entry, tbl);
15677 act_cnt->dr_jump_action[domain] =
15678 tbl_data->jump.action;
15679 act_cnt->fate_action =
15680 MLX5_FLOW_FATE_JUMP;
15681 action_flags |= MLX5_FLOW_ACTION_JUMP;
15685 * No need to check meter hierarchy for Y or R colors
15686 * here since it is done in the validation stage.
15688 case RTE_FLOW_ACTION_TYPE_METER:
15690 const struct rte_flow_action_meter *mtr;
15691 struct mlx5_flow_meter_info *next_fm;
15692 struct mlx5_flow_meter_policy *next_policy;
15693 struct rte_flow_action tag_action;
15694 struct mlx5_rte_flow_action_set_tag set_tag;
15695 uint32_t next_mtr_idx = 0;
15698 next_fm = mlx5_flow_meter_find(priv,
15702 return -rte_mtr_error_set(error, EINVAL,
15703 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15704 "Fail to find next meter.");
15705 if (next_fm->def_policy)
15706 return -rte_mtr_error_set(error, EINVAL,
15707 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15708 "Hierarchy only supports termination meter.");
15709 next_policy = mlx5_flow_meter_policy_find(dev,
15710 next_fm->policy_id, NULL);
15711 MLX5_ASSERT(next_policy);
15712 if (next_fm->drop_cnt) {
15715 mlx5_flow_get_reg_id(dev,
15718 (struct rte_flow_error *)error);
15719 set_tag.offset = (priv->mtr_reg_share ?
15720 MLX5_MTR_COLOR_BITS : 0);
15721 set_tag.length = (priv->mtr_reg_share ?
15722 MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15724 set_tag.data = next_mtr_idx;
15726 (enum rte_flow_action_type)
15727 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15728 tag_action.conf = &set_tag;
15729 if (flow_dv_convert_action_set_reg
15730 (mhdr_res, &tag_action,
15731 (struct rte_flow_error *)error))
15734 MLX5_FLOW_ACTION_SET_TAG;
15736 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15737 act_cnt->next_mtr_id = next_fm->meter_id;
15738 act_cnt->next_sub_policy = NULL;
15739 mtr_policy->is_hierarchy = 1;
15740 mtr_policy->dev = next_policy->dev;
15742 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15746 return -rte_mtr_error_set(error, ENOTSUP,
15747 RTE_MTR_ERROR_TYPE_METER_POLICY,
15748 NULL, "action type not supported");
15750 if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15751 /* create modify action if needed. */
15752 dev_flow.dv.group = 1;
15753 if (flow_dv_modify_hdr_resource_register
15754 (dev, mhdr_res, &dev_flow, &flow_err))
15755 return -rte_mtr_error_set(error,
15757 RTE_MTR_ERROR_TYPE_METER_POLICY,
15758 NULL, "cannot register policy "
15760 act_cnt->modify_hdr =
15761 dev_flow.handle->dvh.modify_hdr;
15769 * Create policy action per domain, lock free,
15770 * (mutex should be acquired by caller).
15771 * Dispatcher for action type specific call.
15774 * Pointer to the Ethernet device structure.
15775 * @param[in] mtr_policy
15776 * Meter policy struct.
15777 * @param[in] action
15778 * Action specification used to create meter actions.
15779 * @param[out] error
15780 * Perform verbose error reporting if not NULL. Initialized in case of
15784 * 0 on success, otherwise negative errno value.
15787 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15788 struct mlx5_flow_meter_policy *mtr_policy,
15789 const struct rte_flow_action *actions[RTE_COLORS],
15790 struct rte_mtr_error *error)
15793 uint16_t sub_policy_num;
15795 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15796 sub_policy_num = (mtr_policy->sub_policy_num >>
15797 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15798 MLX5_MTR_SUB_POLICY_NUM_MASK;
15799 if (sub_policy_num) {
15800 ret = __flow_dv_create_domain_policy_acts(dev,
15801 mtr_policy, actions,
15802 (enum mlx5_meter_domain)i, error);
15803 /* Cleaning resource is done in the caller level. */
15812 * Query a DV flow rule for its statistics via DevX.
15815 * Pointer to Ethernet device.
15816 * @param[in] cnt_idx
15817 * Index to the flow counter.
15819 * Data retrieved by the query.
15820 * @param[out] error
15821 * Perform verbose error reporting if not NULL.
15824 * 0 on success, a negative errno value otherwise and rte_errno is set.
15827 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15828 struct rte_flow_error *error)
15830 struct mlx5_priv *priv = dev->data->dev_private;
15831 struct rte_flow_query_count *qc = data;
15833 if (!priv->sh->devx)
15834 return rte_flow_error_set(error, ENOTSUP,
15835 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15837 "counters are not supported");
15839 uint64_t pkts, bytes;
15840 struct mlx5_flow_counter *cnt;
15841 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15844 return rte_flow_error_set(error, -err,
15845 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15846 NULL, "cannot read counters");
15847 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15850 qc->hits = pkts - cnt->hits;
15851 qc->bytes = bytes - cnt->bytes;
15854 cnt->bytes = bytes;
15858 return rte_flow_error_set(error, EINVAL,
15859 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15861 "counters are not available");
15866 * Query counter's action pointer for a DV flow rule via DevX.
15869 * Pointer to Ethernet device.
15870 * @param[in] cnt_idx
15871 * Index to the flow counter.
15872 * @param[out] action_ptr
15873 * Action pointer for counter.
15874 * @param[out] error
15875 * Perform verbose error reporting if not NULL.
15878 * 0 on success, a negative errno value otherwise and rte_errno is set.
15881 flow_dv_query_count_ptr(struct rte_eth_dev *dev, uint32_t cnt_idx,
15882 void **action_ptr, struct rte_flow_error *error)
15884 struct mlx5_priv *priv = dev->data->dev_private;
15886 if (!priv->sh->devx || !action_ptr)
15887 return rte_flow_error_set(error, ENOTSUP,
15888 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15890 "counters are not supported");
15893 struct mlx5_flow_counter *cnt = NULL;
15894 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15896 *action_ptr = cnt->action;
15900 return rte_flow_error_set(error, EINVAL,
15901 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15903 "counters are not available");
15907 flow_dv_action_query(struct rte_eth_dev *dev,
15908 const struct rte_flow_action_handle *handle, void *data,
15909 struct rte_flow_error *error)
15911 struct mlx5_age_param *age_param;
15912 struct rte_flow_query_age *resp;
15913 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15914 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15915 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15916 struct mlx5_priv *priv = dev->data->dev_private;
15917 struct mlx5_aso_ct_action *ct;
15922 case MLX5_INDIRECT_ACTION_TYPE_AGE:
15923 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15925 resp->aged = __atomic_load_n(&age_param->state,
15926 __ATOMIC_RELAXED) == AGE_TMOUT ?
15928 resp->sec_since_last_hit_valid = !resp->aged;
15929 if (resp->sec_since_last_hit_valid)
15930 resp->sec_since_last_hit = __atomic_load_n
15931 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15933 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15934 return flow_dv_query_count(dev, idx, data, error);
15935 case MLX5_INDIRECT_ACTION_TYPE_CT:
15936 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15937 if (owner != PORT_ID(priv))
15938 return rte_flow_error_set(error, EACCES,
15939 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15941 "CT object owned by another port");
15942 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15943 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15946 return rte_flow_error_set(error, EFAULT,
15947 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15949 "CT object is inactive");
15950 ((struct rte_flow_action_conntrack *)data)->peer_port =
15952 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15954 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15955 return rte_flow_error_set(error, EIO,
15956 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15958 "Failed to query CT context");
15961 return rte_flow_error_set(error, ENOTSUP,
15962 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15963 "action type query not supported");
15968 * Query a flow rule AGE action for aging information.
15971 * Pointer to Ethernet device.
15973 * Pointer to the sub flow.
15975 * data retrieved by the query.
15976 * @param[out] error
15977 * Perform verbose error reporting if not NULL.
15980 * 0 on success, a negative errno value otherwise and rte_errno is set.
15983 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15984 void *data, struct rte_flow_error *error)
15986 struct rte_flow_query_age *resp = data;
15987 struct mlx5_age_param *age_param;
15990 struct mlx5_aso_age_action *act =
15991 flow_aso_age_get_by_idx(dev, flow->age);
15993 age_param = &act->age_params;
15994 } else if (flow->counter) {
15995 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15997 if (!age_param || !age_param->timeout)
15998 return rte_flow_error_set
16000 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16001 NULL, "cannot read age data");
16003 return rte_flow_error_set(error, EINVAL,
16004 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16005 NULL, "age data not available");
16007 resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
16009 resp->sec_since_last_hit_valid = !resp->aged;
16010 if (resp->sec_since_last_hit_valid)
16011 resp->sec_since_last_hit = __atomic_load_n
16012 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
16019 * @see rte_flow_query()
16020 * @see rte_flow_ops
16023 flow_dv_query(struct rte_eth_dev *dev,
16024 struct rte_flow *flow __rte_unused,
16025 const struct rte_flow_action *actions __rte_unused,
16026 void *data __rte_unused,
16027 struct rte_flow_error *error __rte_unused)
16031 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
16032 switch (actions->type) {
16033 case RTE_FLOW_ACTION_TYPE_VOID:
16035 case RTE_FLOW_ACTION_TYPE_COUNT:
16036 ret = flow_dv_query_count(dev, flow->counter, data,
16039 case RTE_FLOW_ACTION_TYPE_AGE:
16040 ret = flow_dv_query_age(dev, flow, data, error);
16043 return rte_flow_error_set(error, ENOTSUP,
16044 RTE_FLOW_ERROR_TYPE_ACTION,
16046 "action not supported");
16053 * Destroy the meter table set.
16054 * Lock free, (mutex should be acquired by caller).
16057 * Pointer to Ethernet device.
16059 * Meter information table.
16062 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
16063 struct mlx5_flow_meter_info *fm)
16065 struct mlx5_priv *priv = dev->data->dev_private;
16068 if (!fm || !priv->config.dv_flow_en)
16070 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16071 if (fm->drop_rule[i]) {
16072 claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
16073 fm->drop_rule[i] = NULL;
16079 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
16081 struct mlx5_priv *priv = dev->data->dev_private;
16082 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16083 struct mlx5_flow_tbl_data_entry *tbl;
16086 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16087 if (mtrmng->def_rule[i]) {
16088 claim_zero(mlx5_flow_os_destroy_flow
16089 (mtrmng->def_rule[i]));
16090 mtrmng->def_rule[i] = NULL;
16092 if (mtrmng->def_matcher[i]) {
16093 tbl = container_of(mtrmng->def_matcher[i]->tbl,
16094 struct mlx5_flow_tbl_data_entry, tbl);
16095 mlx5_list_unregister(tbl->matchers,
16096 &mtrmng->def_matcher[i]->entry);
16097 mtrmng->def_matcher[i] = NULL;
16099 for (j = 0; j < MLX5_REG_BITS; j++) {
16100 if (mtrmng->drop_matcher[i][j]) {
16102 container_of(mtrmng->drop_matcher[i][j]->tbl,
16103 struct mlx5_flow_tbl_data_entry,
16105 mlx5_list_unregister(tbl->matchers,
16106 &mtrmng->drop_matcher[i][j]->entry);
16107 mtrmng->drop_matcher[i][j] = NULL;
16110 if (mtrmng->drop_tbl[i]) {
16111 flow_dv_tbl_resource_release(MLX5_SH(dev),
16112 mtrmng->drop_tbl[i]);
16113 mtrmng->drop_tbl[i] = NULL;
16118 /* Number of meter flow actions, count and jump or count and drop. */
16119 #define METER_ACTIONS 2
16122 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
16123 enum mlx5_meter_domain domain)
16125 struct mlx5_priv *priv = dev->data->dev_private;
16126 struct mlx5_flow_meter_def_policy *def_policy =
16127 priv->sh->mtrmng->def_policy[domain];
16129 __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
16130 mlx5_free(def_policy);
16131 priv->sh->mtrmng->def_policy[domain] = NULL;
16135 * Destroy the default policy table set.
16138 * Pointer to Ethernet device.
16141 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
16143 struct mlx5_priv *priv = dev->data->dev_private;
16146 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
16147 if (priv->sh->mtrmng->def_policy[i])
16148 __flow_dv_destroy_domain_def_policy(dev,
16149 (enum mlx5_meter_domain)i);
16150 priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
16154 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
16155 uint32_t color_reg_c_idx,
16156 enum rte_color color, void *matcher_object,
16157 int actions_n, void *actions,
16158 bool match_src_port, const struct rte_flow_item *item,
16159 void **rule, const struct rte_flow_attr *attr)
16162 struct mlx5_flow_dv_match_params value = {
16163 .size = sizeof(value.buf),
16165 struct mlx5_flow_dv_match_params matcher = {
16166 .size = sizeof(matcher.buf),
16168 struct mlx5_priv *priv = dev->data->dev_private;
16171 if (match_src_port && (priv->representor || priv->master)) {
16172 if (flow_dv_translate_item_port_id(dev, matcher.buf,
16173 value.buf, item, attr)) {
16174 DRV_LOG(ERR, "Failed to create meter policy%d flow's"
16175 " value with port.", color);
16179 flow_dv_match_meta_reg(matcher.buf, value.buf,
16180 (enum modify_reg)color_reg_c_idx,
16181 rte_col_2_mlx5_col(color), UINT32_MAX);
16182 misc_mask = flow_dv_matcher_enable(value.buf);
16183 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16184 ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
16185 actions_n, actions, rule);
16187 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
16194 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
16195 uint32_t color_reg_c_idx,
16197 struct mlx5_flow_meter_sub_policy *sub_policy,
16198 const struct rte_flow_attr *attr,
16199 bool match_src_port,
16200 const struct rte_flow_item *item,
16201 struct mlx5_flow_dv_matcher **policy_matcher,
16202 struct rte_flow_error *error)
16204 struct mlx5_list_entry *entry;
16205 struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
16206 struct mlx5_flow_dv_matcher matcher = {
16208 .size = sizeof(matcher.mask.buf),
16212 struct mlx5_flow_dv_match_params value = {
16213 .size = sizeof(value.buf),
16215 struct mlx5_flow_cb_ctx ctx = {
16219 struct mlx5_flow_tbl_data_entry *tbl_data;
16220 struct mlx5_priv *priv = dev->data->dev_private;
16221 const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16223 if (match_src_port && (priv->representor || priv->master)) {
16224 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16225 value.buf, item, attr)) {
16226 DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16227 " with port.", priority);
16231 tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16232 if (priority < RTE_COLOR_RED)
16233 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16234 (enum modify_reg)color_reg_c_idx, 0, color_mask);
16235 matcher.priority = priority;
16236 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16237 matcher.mask.size);
16238 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16240 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16244 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16249 * Create the policy rules per domain.
16252 * Pointer to Ethernet device.
16253 * @param[in] sub_policy
16254 * Pointer to sub policy table..
16255 * @param[in] egress
16256 * Direction of the table.
16257 * @param[in] transfer
16258 * E-Switch or NIC flow.
16260 * Pointer to policy action list per color.
16263 * 0 on success, -1 otherwise.
16266 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16267 struct mlx5_flow_meter_sub_policy *sub_policy,
16268 uint8_t egress, uint8_t transfer, bool match_src_port,
16269 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16271 struct mlx5_priv *priv = dev->data->dev_private;
16272 struct rte_flow_error flow_err;
16273 uint32_t color_reg_c_idx;
16274 struct rte_flow_attr attr = {
16275 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16278 .egress = !!egress,
16279 .transfer = !!transfer,
16283 int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16284 struct mlx5_sub_policy_color_rule *color_rule;
16286 struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16290 /* Create policy table with POLICY level. */
16291 if (!sub_policy->tbl_rsc)
16292 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16293 MLX5_FLOW_TABLE_LEVEL_POLICY,
16294 egress, transfer, false, NULL, 0, 0,
16295 sub_policy->idx, &flow_err);
16296 if (!sub_policy->tbl_rsc) {
16298 "Failed to create meter sub policy table.");
16301 /* Prepare matchers. */
16302 color_reg_c_idx = ret;
16303 for (i = 0; i < RTE_COLORS; i++) {
16304 TAILQ_INIT(&sub_policy->color_rules[i]);
16305 if (!acts[i].actions_n)
16307 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16308 sizeof(struct mlx5_sub_policy_color_rule),
16311 DRV_LOG(ERR, "No memory to create color rule.");
16314 tmp_rules[i] = color_rule;
16315 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16316 color_rule, next_port);
16317 color_rule->src_port = priv->representor_id;
16320 /* Create matchers for colors. */
16321 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16322 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16323 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16324 &attr, svport_match, NULL,
16325 &color_rule->matcher, &flow_err)) {
16326 DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16329 /* Create flow, matching color. */
16330 if (__flow_dv_create_policy_flow(dev,
16331 color_reg_c_idx, (enum rte_color)i,
16332 color_rule->matcher->matcher_object,
16333 acts[i].actions_n, acts[i].dv_actions,
16334 svport_match, NULL, &color_rule->rule,
16336 DRV_LOG(ERR, "Failed to create color%u rule.", i);
16342 /* All the policy rules will be cleared. */
16344 color_rule = tmp_rules[i];
16346 if (color_rule->rule)
16347 mlx5_flow_os_destroy_flow(color_rule->rule);
16348 if (color_rule->matcher) {
16349 struct mlx5_flow_tbl_data_entry *tbl =
16350 container_of(color_rule->matcher->tbl,
16351 typeof(*tbl), tbl);
16352 mlx5_list_unregister(tbl->matchers,
16353 &color_rule->matcher->entry);
16355 TAILQ_REMOVE(&sub_policy->color_rules[i],
16356 color_rule, next_port);
16357 mlx5_free(color_rule);
16364 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16365 struct mlx5_flow_meter_policy *mtr_policy,
16366 struct mlx5_flow_meter_sub_policy *sub_policy,
16369 struct mlx5_priv *priv = dev->data->dev_private;
16370 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16371 struct mlx5_flow_dv_tag_resource *tag;
16372 struct mlx5_flow_dv_port_id_action_resource *port_action;
16373 struct mlx5_hrxq *hrxq;
16374 struct mlx5_flow_meter_info *next_fm = NULL;
16375 struct mlx5_flow_meter_policy *next_policy;
16376 struct mlx5_flow_meter_sub_policy *next_sub_policy;
16377 struct mlx5_flow_tbl_data_entry *tbl_data;
16378 struct rte_flow_error error;
16379 uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16380 uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16381 bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16382 bool match_src_port = false;
16385 /* If RSS or Queue, no previous actions / rules is created. */
16386 for (i = 0; i < RTE_COLORS; i++) {
16387 acts[i].actions_n = 0;
16388 if (i == RTE_COLOR_RED) {
16389 /* Only support drop on red. */
16390 acts[i].dv_actions[0] =
16391 mtr_policy->dr_drop_action[domain];
16392 acts[i].actions_n = 1;
16395 if (i == RTE_COLOR_GREEN &&
16396 mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16397 struct rte_flow_attr attr = {
16398 .transfer = transfer
16401 next_fm = mlx5_flow_meter_find(priv,
16402 mtr_policy->act_cnt[i].next_mtr_id,
16406 "Failed to get next hierarchy meter.");
16409 if (mlx5_flow_meter_attach(priv, next_fm,
16411 DRV_LOG(ERR, "%s", error.message);
16415 /* Meter action must be the first for TX. */
16417 acts[i].dv_actions[acts[i].actions_n] =
16418 next_fm->meter_action;
16419 acts[i].actions_n++;
16422 if (mtr_policy->act_cnt[i].rix_mark) {
16423 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16424 mtr_policy->act_cnt[i].rix_mark);
16426 DRV_LOG(ERR, "Failed to find "
16427 "mark action for policy.");
16430 acts[i].dv_actions[acts[i].actions_n] = tag->action;
16431 acts[i].actions_n++;
16433 if (mtr_policy->act_cnt[i].modify_hdr) {
16434 acts[i].dv_actions[acts[i].actions_n] =
16435 mtr_policy->act_cnt[i].modify_hdr->action;
16436 acts[i].actions_n++;
16438 if (mtr_policy->act_cnt[i].fate_action) {
16439 switch (mtr_policy->act_cnt[i].fate_action) {
16440 case MLX5_FLOW_FATE_PORT_ID:
16441 port_action = mlx5_ipool_get
16442 (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16443 mtr_policy->act_cnt[i].rix_port_id_action);
16444 if (!port_action) {
16445 DRV_LOG(ERR, "Failed to find "
16446 "port action for policy.");
16449 acts[i].dv_actions[acts[i].actions_n] =
16450 port_action->action;
16451 acts[i].actions_n++;
16452 mtr_policy->dev = dev;
16453 match_src_port = true;
16455 case MLX5_FLOW_FATE_DROP:
16456 case MLX5_FLOW_FATE_JUMP:
16457 acts[i].dv_actions[acts[i].actions_n] =
16458 mtr_policy->act_cnt[i].dr_jump_action[domain];
16459 acts[i].actions_n++;
16461 case MLX5_FLOW_FATE_SHARED_RSS:
16462 case MLX5_FLOW_FATE_QUEUE:
16463 hrxq = mlx5_ipool_get
16464 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16465 sub_policy->rix_hrxq[i]);
16467 DRV_LOG(ERR, "Failed to find "
16468 "queue action for policy.");
16471 acts[i].dv_actions[acts[i].actions_n] =
16473 acts[i].actions_n++;
16475 case MLX5_FLOW_FATE_MTR:
16478 "No next hierarchy meter.");
16482 acts[i].dv_actions[acts[i].actions_n] =
16483 next_fm->meter_action;
16484 acts[i].actions_n++;
16486 if (mtr_policy->act_cnt[i].next_sub_policy) {
16488 mtr_policy->act_cnt[i].next_sub_policy;
16491 mlx5_flow_meter_policy_find(dev,
16492 next_fm->policy_id, NULL);
16493 MLX5_ASSERT(next_policy);
16495 next_policy->sub_policys[domain][0];
16498 container_of(next_sub_policy->tbl_rsc,
16499 struct mlx5_flow_tbl_data_entry, tbl);
16500 acts[i].dv_actions[acts[i].actions_n++] =
16501 tbl_data->jump.action;
16502 if (mtr_policy->act_cnt[i].modify_hdr)
16503 match_src_port = !!transfer;
16506 /*Queue action do nothing*/
16511 if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16512 egress, transfer, match_src_port, acts)) {
16514 "Failed to create policy rules per domain.");
16520 mlx5_flow_meter_detach(priv, next_fm);
16525 * Create the policy rules.
16528 * Pointer to Ethernet device.
16529 * @param[in,out] mtr_policy
16530 * Pointer to meter policy table.
16533 * 0 on success, -1 otherwise.
16536 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16537 struct mlx5_flow_meter_policy *mtr_policy)
16540 uint16_t sub_policy_num;
16542 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16543 sub_policy_num = (mtr_policy->sub_policy_num >>
16544 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16545 MLX5_MTR_SUB_POLICY_NUM_MASK;
16546 if (!sub_policy_num)
16548 /* Prepare actions list and create policy rules. */
16549 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16550 mtr_policy->sub_policys[i][0], i)) {
16551 DRV_LOG(ERR, "Failed to create policy action "
16552 "list per domain.");
16560 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16562 struct mlx5_priv *priv = dev->data->dev_private;
16563 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16564 struct mlx5_flow_meter_def_policy *def_policy;
16565 struct mlx5_flow_tbl_resource *jump_tbl;
16566 struct mlx5_flow_tbl_data_entry *tbl_data;
16567 uint8_t egress, transfer;
16568 struct rte_flow_error error;
16569 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16572 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16573 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16574 def_policy = mtrmng->def_policy[domain];
16576 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16577 sizeof(struct mlx5_flow_meter_def_policy),
16578 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16580 DRV_LOG(ERR, "Failed to alloc default policy table.");
16581 goto def_policy_error;
16583 mtrmng->def_policy[domain] = def_policy;
16584 /* Create the meter suffix table with SUFFIX level. */
16585 jump_tbl = flow_dv_tbl_resource_get(dev,
16586 MLX5_FLOW_TABLE_LEVEL_METER,
16587 egress, transfer, false, NULL, 0,
16588 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16591 "Failed to create meter suffix table.");
16592 goto def_policy_error;
16594 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16595 tbl_data = container_of(jump_tbl,
16596 struct mlx5_flow_tbl_data_entry, tbl);
16597 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16598 tbl_data->jump.action;
16599 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16600 acts[RTE_COLOR_GREEN].actions_n = 1;
16602 * YELLOW has the same default policy as GREEN does.
16603 * G & Y share the same table and action. The 2nd time of table
16604 * resource getting is just to update the reference count for
16605 * the releasing stage.
16607 jump_tbl = flow_dv_tbl_resource_get(dev,
16608 MLX5_FLOW_TABLE_LEVEL_METER,
16609 egress, transfer, false, NULL, 0,
16610 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16613 "Failed to get meter suffix table.");
16614 goto def_policy_error;
16616 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16617 tbl_data = container_of(jump_tbl,
16618 struct mlx5_flow_tbl_data_entry, tbl);
16619 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16620 tbl_data->jump.action;
16621 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16622 acts[RTE_COLOR_YELLOW].actions_n = 1;
16623 /* Create jump action to the drop table. */
16624 if (!mtrmng->drop_tbl[domain]) {
16625 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16626 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16627 egress, transfer, false, NULL, 0,
16628 0, MLX5_MTR_TABLE_ID_DROP, &error);
16629 if (!mtrmng->drop_tbl[domain]) {
16630 DRV_LOG(ERR, "Failed to create meter "
16631 "drop table for default policy.");
16632 goto def_policy_error;
16635 /* all RED: unique Drop table for jump action. */
16636 tbl_data = container_of(mtrmng->drop_tbl[domain],
16637 struct mlx5_flow_tbl_data_entry, tbl);
16638 def_policy->dr_jump_action[RTE_COLOR_RED] =
16639 tbl_data->jump.action;
16640 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16641 acts[RTE_COLOR_RED].actions_n = 1;
16642 /* Create default policy rules. */
16643 ret = __flow_dv_create_domain_policy_rules(dev,
16644 &def_policy->sub_policy,
16645 egress, transfer, false, acts);
16647 DRV_LOG(ERR, "Failed to create default policy rules.");
16648 goto def_policy_error;
16653 __flow_dv_destroy_domain_def_policy(dev,
16654 (enum mlx5_meter_domain)domain);
16659 * Create the default policy table set.
16662 * Pointer to Ethernet device.
16664 * 0 on success, -1 otherwise.
16667 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16669 struct mlx5_priv *priv = dev->data->dev_private;
16672 /* Non-termination policy table. */
16673 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16674 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16676 if (__flow_dv_create_domain_def_policy(dev, i)) {
16677 DRV_LOG(ERR, "Failed to create default policy");
16678 /* Rollback the created default policies for others. */
16679 flow_dv_destroy_def_policy(dev);
16687 * Create the needed meter tables.
16688 * Lock free, (mutex should be acquired by caller).
16691 * Pointer to Ethernet device.
16693 * Meter information table.
16694 * @param[in] mtr_idx
16696 * @param[in] domain_bitmap
16699 * 0 on success, -1 otherwise.
16702 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16703 struct mlx5_flow_meter_info *fm,
16705 uint8_t domain_bitmap)
16707 struct mlx5_priv *priv = dev->data->dev_private;
16708 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16709 struct rte_flow_error error;
16710 struct mlx5_flow_tbl_data_entry *tbl_data;
16711 uint8_t egress, transfer;
16712 void *actions[METER_ACTIONS];
16713 int domain, ret, i;
16714 struct mlx5_flow_counter *cnt;
16715 struct mlx5_flow_dv_match_params value = {
16716 .size = sizeof(value.buf),
16718 struct mlx5_flow_dv_match_params matcher_para = {
16719 .size = sizeof(matcher_para.buf),
16721 int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16723 uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16724 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16725 struct mlx5_list_entry *entry;
16726 struct mlx5_flow_dv_matcher matcher = {
16728 .size = sizeof(matcher.mask.buf),
16731 struct mlx5_flow_dv_matcher *drop_matcher;
16732 struct mlx5_flow_cb_ctx ctx = {
16738 if (!priv->mtr_en || mtr_id_reg_c < 0) {
16739 rte_errno = ENOTSUP;
16742 for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16743 if (!(domain_bitmap & (1 << domain)) ||
16744 (mtrmng->def_rule[domain] && !fm->drop_cnt))
16746 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16747 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16748 /* Create the drop table with METER DROP level. */
16749 if (!mtrmng->drop_tbl[domain]) {
16750 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16751 MLX5_FLOW_TABLE_LEVEL_METER,
16752 egress, transfer, false, NULL, 0,
16753 0, MLX5_MTR_TABLE_ID_DROP, &error);
16754 if (!mtrmng->drop_tbl[domain]) {
16755 DRV_LOG(ERR, "Failed to create meter drop table.");
16759 /* Create default matcher in drop table. */
16760 matcher.tbl = mtrmng->drop_tbl[domain],
16761 tbl_data = container_of(mtrmng->drop_tbl[domain],
16762 struct mlx5_flow_tbl_data_entry, tbl);
16763 if (!mtrmng->def_matcher[domain]) {
16764 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16765 (enum modify_reg)mtr_id_reg_c,
16767 matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16768 matcher.crc = rte_raw_cksum
16769 ((const void *)matcher.mask.buf,
16770 matcher.mask.size);
16771 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16773 DRV_LOG(ERR, "Failed to register meter "
16774 "drop default matcher.");
16777 mtrmng->def_matcher[domain] = container_of(entry,
16778 struct mlx5_flow_dv_matcher, entry);
16780 /* Create default rule in drop table. */
16781 if (!mtrmng->def_rule[domain]) {
16783 actions[i++] = priv->sh->dr_drop_action;
16784 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16785 (enum modify_reg)mtr_id_reg_c, 0, 0);
16786 misc_mask = flow_dv_matcher_enable(value.buf);
16787 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16788 ret = mlx5_flow_os_create_flow
16789 (mtrmng->def_matcher[domain]->matcher_object,
16790 (void *)&value, i, actions,
16791 &mtrmng->def_rule[domain]);
16793 DRV_LOG(ERR, "Failed to create meter "
16794 "default drop rule for drop table.");
16800 MLX5_ASSERT(mtrmng->max_mtr_bits);
16801 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16802 /* Create matchers for Drop. */
16803 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16804 (enum modify_reg)mtr_id_reg_c, 0,
16805 (mtr_id_mask << mtr_id_offset));
16806 matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16807 matcher.crc = rte_raw_cksum
16808 ((const void *)matcher.mask.buf,
16809 matcher.mask.size);
16810 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16813 "Failed to register meter drop matcher.");
16816 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16817 container_of(entry, struct mlx5_flow_dv_matcher,
16821 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16822 /* Create drop rule, matching meter_id only. */
16823 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16824 (enum modify_reg)mtr_id_reg_c,
16825 (mtr_idx << mtr_id_offset), UINT32_MAX);
16827 cnt = flow_dv_counter_get_by_idx(dev,
16828 fm->drop_cnt, NULL);
16829 actions[i++] = cnt->action;
16830 actions[i++] = priv->sh->dr_drop_action;
16831 misc_mask = flow_dv_matcher_enable(value.buf);
16832 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16833 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16834 (void *)&value, i, actions,
16835 &fm->drop_rule[domain]);
16837 DRV_LOG(ERR, "Failed to create meter "
16838 "drop rule for drop table.");
16844 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16845 if (fm->drop_rule[i]) {
16846 claim_zero(mlx5_flow_os_destroy_flow
16847 (fm->drop_rule[i]));
16848 fm->drop_rule[i] = NULL;
16854 static struct mlx5_flow_meter_sub_policy *
16855 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16856 struct mlx5_flow_meter_policy *mtr_policy,
16857 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16858 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16861 struct mlx5_priv *priv = dev->data->dev_private;
16862 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16863 uint32_t sub_policy_idx = 0;
16864 uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16866 struct mlx5_hrxq *hrxq;
16867 struct mlx5_flow_handle dh;
16868 struct mlx5_meter_policy_action_container *act_cnt;
16869 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16870 uint16_t sub_policy_num;
16871 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
16874 rte_spinlock_lock(&mtr_policy->sl);
16875 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16878 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16879 if (!hrxq_idx[i]) {
16880 rte_spinlock_unlock(&mtr_policy->sl);
16884 sub_policy_num = (mtr_policy->sub_policy_num >>
16885 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16886 MLX5_MTR_SUB_POLICY_NUM_MASK;
16887 for (j = 0; j < sub_policy_num; j++) {
16888 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16891 mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16894 if (i >= MLX5_MTR_RTE_COLORS) {
16896 * Found the sub policy table with
16897 * the same queue per color.
16899 rte_spinlock_unlock(&mtr_policy->sl);
16900 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16901 mlx5_hrxq_release(dev, hrxq_idx[i]);
16903 return mtr_policy->sub_policys[domain][j];
16906 /* Create sub policy. */
16907 if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16908 /* Reuse the first pre-allocated sub_policy. */
16909 sub_policy = mtr_policy->sub_policys[domain][0];
16910 sub_policy_idx = sub_policy->idx;
16912 sub_policy = mlx5_ipool_zmalloc
16913 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16916 sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16917 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16918 mlx5_hrxq_release(dev, hrxq_idx[i]);
16919 goto rss_sub_policy_error;
16921 sub_policy->idx = sub_policy_idx;
16922 sub_policy->main_policy = mtr_policy;
16924 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16927 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16928 if (mtr_policy->is_hierarchy) {
16929 act_cnt = &mtr_policy->act_cnt[i];
16930 act_cnt->next_sub_policy = next_sub_policy;
16931 mlx5_hrxq_release(dev, hrxq_idx[i]);
16934 * Overwrite the last action from
16935 * RSS action to Queue action.
16937 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16940 DRV_LOG(ERR, "Failed to get policy hrxq");
16941 goto rss_sub_policy_error;
16943 act_cnt = &mtr_policy->act_cnt[i];
16944 if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16945 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16946 if (act_cnt->rix_mark)
16948 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16949 dh.rix_hrxq = hrxq_idx[i];
16950 flow_drv_rxq_flags_set(dev, &dh);
16954 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16955 sub_policy, domain)) {
16956 DRV_LOG(ERR, "Failed to create policy "
16957 "rules for ingress domain.");
16958 goto rss_sub_policy_error;
16960 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16961 i = (mtr_policy->sub_policy_num >>
16962 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16963 MLX5_MTR_SUB_POLICY_NUM_MASK;
16964 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
16965 DRV_LOG(ERR, "No free sub-policy slot.");
16966 goto rss_sub_policy_error;
16968 mtr_policy->sub_policys[domain][i] = sub_policy;
16970 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16971 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16972 mtr_policy->sub_policy_num |=
16973 (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16974 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16976 rte_spinlock_unlock(&mtr_policy->sl);
16979 rss_sub_policy_error:
16981 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16982 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16983 i = (mtr_policy->sub_policy_num >>
16984 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16985 MLX5_MTR_SUB_POLICY_NUM_MASK;
16986 mtr_policy->sub_policys[domain][i] = NULL;
16987 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16991 rte_spinlock_unlock(&mtr_policy->sl);
16996 * Find the policy table for prefix table with RSS.
16999 * Pointer to Ethernet device.
17000 * @param[in] mtr_policy
17001 * Pointer to meter policy table.
17002 * @param[in] rss_desc
17003 * Pointer to rss_desc
17005 * Pointer to table set on success, NULL otherwise and rte_errno is set.
17007 static struct mlx5_flow_meter_sub_policy *
17008 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
17009 struct mlx5_flow_meter_policy *mtr_policy,
17010 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
17012 struct mlx5_priv *priv = dev->data->dev_private;
17013 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17014 struct mlx5_flow_meter_info *next_fm;
17015 struct mlx5_flow_meter_policy *next_policy;
17016 struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
17017 struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
17018 struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
17019 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17020 bool reuse_sub_policy;
17025 /* Iterate hierarchy to get all policies in this hierarchy. */
17026 policies[i++] = mtr_policy;
17027 if (!mtr_policy->is_hierarchy)
17029 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
17030 DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
17033 next_fm = mlx5_flow_meter_find(priv,
17034 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
17036 DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
17040 mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
17042 MLX5_ASSERT(next_policy);
17043 mtr_policy = next_policy;
17047 * From last policy to the first one in hierarchy,
17048 * create / get the sub policy for each of them.
17050 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
17054 &reuse_sub_policy);
17056 DRV_LOG(ERR, "Failed to get the sub policy.");
17059 if (!reuse_sub_policy)
17060 sub_policies[j++] = sub_policy;
17061 next_sub_policy = sub_policy;
17066 uint16_t sub_policy_num;
17068 sub_policy = sub_policies[--j];
17069 mtr_policy = sub_policy->main_policy;
17070 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
17071 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17072 sub_policy_num = (mtr_policy->sub_policy_num >>
17073 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17074 MLX5_MTR_SUB_POLICY_NUM_MASK;
17075 mtr_policy->sub_policys[domain][sub_policy_num - 1] =
17078 mtr_policy->sub_policy_num &=
17079 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17080 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
17081 mtr_policy->sub_policy_num |=
17082 (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17083 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
17084 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17092 * Create the sub policy tag rule for all meters in hierarchy.
17095 * Pointer to Ethernet device.
17097 * Meter information table.
17098 * @param[in] src_port
17099 * The src port this extra rule should use.
17101 * The src port match item.
17102 * @param[out] error
17103 * Perform verbose error reporting if not NULL.
17105 * 0 on success, a negative errno value otherwise and rte_errno is set.
17108 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
17109 struct mlx5_flow_meter_info *fm,
17111 const struct rte_flow_item *item,
17112 struct rte_flow_error *error)
17114 struct mlx5_priv *priv = dev->data->dev_private;
17115 struct mlx5_flow_meter_policy *mtr_policy;
17116 struct mlx5_flow_meter_sub_policy *sub_policy;
17117 struct mlx5_flow_meter_info *next_fm = NULL;
17118 struct mlx5_flow_meter_policy *next_policy;
17119 struct mlx5_flow_meter_sub_policy *next_sub_policy;
17120 struct mlx5_flow_tbl_data_entry *tbl_data;
17121 struct mlx5_sub_policy_color_rule *color_rule;
17122 struct mlx5_meter_policy_acts acts;
17123 uint32_t color_reg_c_idx;
17124 bool mtr_first = (src_port != UINT16_MAX) ? true : false;
17125 struct rte_flow_attr attr = {
17126 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
17133 uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
17136 mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17137 MLX5_ASSERT(mtr_policy);
17138 if (!mtr_policy->is_hierarchy)
17140 next_fm = mlx5_flow_meter_find(priv,
17141 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
17143 return rte_flow_error_set(error, EINVAL,
17144 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
17145 "Failed to find next meter in hierarchy.");
17147 if (!next_fm->drop_cnt)
17149 color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
17150 sub_policy = mtr_policy->sub_policys[domain][0];
17151 for (i = 0; i < RTE_COLORS; i++) {
17152 bool rule_exist = false;
17153 struct mlx5_meter_policy_action_container *act_cnt;
17155 if (i >= RTE_COLOR_YELLOW)
17157 TAILQ_FOREACH(color_rule,
17158 &sub_policy->color_rules[i], next_port)
17159 if (color_rule->src_port == src_port) {
17165 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
17166 sizeof(struct mlx5_sub_policy_color_rule),
17169 return rte_flow_error_set(error, ENOMEM,
17170 RTE_FLOW_ERROR_TYPE_ACTION,
17171 NULL, "No memory to create tag color rule.");
17172 color_rule->src_port = src_port;
17174 next_policy = mlx5_flow_meter_policy_find(dev,
17175 next_fm->policy_id, NULL);
17176 MLX5_ASSERT(next_policy);
17177 next_sub_policy = next_policy->sub_policys[domain][0];
17178 tbl_data = container_of(next_sub_policy->tbl_rsc,
17179 struct mlx5_flow_tbl_data_entry, tbl);
17180 act_cnt = &mtr_policy->act_cnt[i];
17182 acts.dv_actions[0] = next_fm->meter_action;
17183 acts.dv_actions[1] = act_cnt->modify_hdr->action;
17185 acts.dv_actions[0] = act_cnt->modify_hdr->action;
17186 acts.dv_actions[1] = next_fm->meter_action;
17188 acts.dv_actions[2] = tbl_data->jump.action;
17189 acts.actions_n = 3;
17190 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
17194 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
17195 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
17197 &color_rule->matcher, error)) {
17198 rte_flow_error_set(error, errno,
17199 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17200 "Failed to create hierarchy meter matcher.");
17203 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
17205 color_rule->matcher->matcher_object,
17206 acts.actions_n, acts.dv_actions,
17208 &color_rule->rule, &attr)) {
17209 rte_flow_error_set(error, errno,
17210 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17211 "Failed to create hierarchy meter rule.");
17214 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
17215 color_rule, next_port);
17219 * Recursive call to iterate all meters in hierarchy and
17220 * create needed rules.
17222 return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17223 src_port, item, error);
17226 if (color_rule->rule)
17227 mlx5_flow_os_destroy_flow(color_rule->rule);
17228 if (color_rule->matcher) {
17229 struct mlx5_flow_tbl_data_entry *tbl =
17230 container_of(color_rule->matcher->tbl,
17231 typeof(*tbl), tbl);
17232 mlx5_list_unregister(tbl->matchers,
17233 &color_rule->matcher->entry);
17235 mlx5_free(color_rule);
17238 mlx5_flow_meter_detach(priv, next_fm);
17243 * Destroy the sub policy table with RX queue.
17246 * Pointer to Ethernet device.
17247 * @param[in] mtr_policy
17248 * Pointer to meter policy table.
17251 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17252 struct mlx5_flow_meter_policy *mtr_policy)
17254 struct mlx5_priv *priv = dev->data->dev_private;
17255 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17256 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17258 uint16_t sub_policy_num, new_policy_num;
17260 rte_spinlock_lock(&mtr_policy->sl);
17261 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17262 switch (mtr_policy->act_cnt[i].fate_action) {
17263 case MLX5_FLOW_FATE_SHARED_RSS:
17264 sub_policy_num = (mtr_policy->sub_policy_num >>
17265 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17266 MLX5_MTR_SUB_POLICY_NUM_MASK;
17267 new_policy_num = sub_policy_num;
17268 for (j = 0; j < sub_policy_num; j++) {
17270 mtr_policy->sub_policys[domain][j];
17272 __flow_dv_destroy_sub_policy_rules(dev,
17275 mtr_policy->sub_policys[domain][0]) {
17276 mtr_policy->sub_policys[domain][j] =
17279 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17285 if (new_policy_num != sub_policy_num) {
17286 mtr_policy->sub_policy_num &=
17287 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17288 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17289 mtr_policy->sub_policy_num |=
17291 MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17292 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17295 case MLX5_FLOW_FATE_QUEUE:
17296 sub_policy = mtr_policy->sub_policys[domain][0];
17297 __flow_dv_destroy_sub_policy_rules(dev,
17301 /*Other actions without queue and do nothing*/
17305 rte_spinlock_unlock(&mtr_policy->sl);
17308 * Check whether the DR drop action is supported on the root table or not.
17310 * Create a simple flow with DR drop action on root table to validate
17311 * if DR drop action on root table is supported or not.
17314 * Pointer to rte_eth_dev structure.
17317 * 0 on success, a negative errno value otherwise and rte_errno is set.
17320 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17322 struct mlx5_priv *priv = dev->data->dev_private;
17323 struct mlx5_dev_ctx_shared *sh = priv->sh;
17324 struct mlx5_flow_dv_match_params mask = {
17325 .size = sizeof(mask.buf),
17327 struct mlx5_flow_dv_match_params value = {
17328 .size = sizeof(value.buf),
17330 struct mlx5dv_flow_matcher_attr dv_attr = {
17331 .type = IBV_FLOW_ATTR_NORMAL,
17333 .match_criteria_enable = 0,
17334 .match_mask = (void *)&mask,
17336 struct mlx5_flow_tbl_resource *tbl = NULL;
17337 void *matcher = NULL;
17341 tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17345 dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17346 __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17347 ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17348 tbl->obj, &matcher);
17351 __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17352 ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17353 &sh->dr_drop_action, &flow);
17356 * If DR drop action is not supported on root table, flow create will
17357 * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17361 (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17362 DRV_LOG(INFO, "DR drop action is not supported in root table.");
17364 DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17367 claim_zero(mlx5_flow_os_destroy_flow(flow));
17370 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17372 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17377 * Validate the batch counter support in root table.
17379 * Create a simple flow with invalid counter and drop action on root table to
17380 * validate if batch counter with offset on root table is supported or not.
17383 * Pointer to rte_eth_dev structure.
17386 * 0 on success, a negative errno value otherwise and rte_errno is set.
17389 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17391 struct mlx5_priv *priv = dev->data->dev_private;
17392 struct mlx5_dev_ctx_shared *sh = priv->sh;
17393 struct mlx5_flow_dv_match_params mask = {
17394 .size = sizeof(mask.buf),
17396 struct mlx5_flow_dv_match_params value = {
17397 .size = sizeof(value.buf),
17399 struct mlx5dv_flow_matcher_attr dv_attr = {
17400 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17402 .match_criteria_enable = 0,
17403 .match_mask = (void *)&mask,
17405 void *actions[2] = { 0 };
17406 struct mlx5_flow_tbl_resource *tbl = NULL;
17407 struct mlx5_devx_obj *dcs = NULL;
17408 void *matcher = NULL;
17412 tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17416 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
17419 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17423 dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17424 __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17425 ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17426 tbl->obj, &matcher);
17429 __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17430 ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17434 * If batch counter with offset is not supported, the driver will not
17435 * validate the invalid offset value, flow create should success.
17436 * In this case, it means batch counter is not supported in root table.
17438 * Otherwise, if flow create is failed, counter offset is supported.
17441 DRV_LOG(INFO, "Batch counter is not supported in root "
17442 "table. Switch to fallback mode.");
17443 rte_errno = ENOTSUP;
17445 claim_zero(mlx5_flow_os_destroy_flow(flow));
17447 /* Check matcher to make sure validate fail at flow create. */
17448 if (!matcher || (matcher && errno != EINVAL))
17449 DRV_LOG(ERR, "Unexpected error in counter offset "
17450 "support detection");
17454 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17456 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17458 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17460 claim_zero(mlx5_devx_cmd_destroy(dcs));
17465 * Query a devx counter.
17468 * Pointer to the Ethernet device structure.
17470 * Index to the flow counter.
17472 * Set to clear the counter statistics.
17474 * The statistics value of packets.
17475 * @param[out] bytes
17476 * The statistics value of bytes.
17479 * 0 on success, otherwise return -1.
17482 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17483 uint64_t *pkts, uint64_t *bytes)
17485 struct mlx5_priv *priv = dev->data->dev_private;
17486 struct mlx5_flow_counter *cnt;
17487 uint64_t inn_pkts, inn_bytes;
17490 if (!priv->sh->devx)
17493 ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17496 cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17497 *pkts = inn_pkts - cnt->hits;
17498 *bytes = inn_bytes - cnt->bytes;
17500 cnt->hits = inn_pkts;
17501 cnt->bytes = inn_bytes;
17507 * Get aged-out flows.
17510 * Pointer to the Ethernet device structure.
17511 * @param[in] context
17512 * The address of an array of pointers to the aged-out flows contexts.
17513 * @param[in] nb_contexts
17514 * The length of context array pointers.
17515 * @param[out] error
17516 * Perform verbose error reporting if not NULL. Initialized in case of
17520 * how many contexts get in success, otherwise negative errno value.
17521 * if nb_contexts is 0, return the amount of all aged contexts.
17522 * if nb_contexts is not 0 , return the amount of aged flows reported
17523 * in the context array.
17524 * @note: only stub for now
17527 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17529 uint32_t nb_contexts,
17530 struct rte_flow_error *error)
17532 struct mlx5_priv *priv = dev->data->dev_private;
17533 struct mlx5_age_info *age_info;
17534 struct mlx5_age_param *age_param;
17535 struct mlx5_flow_counter *counter;
17536 struct mlx5_aso_age_action *act;
17539 if (nb_contexts && !context)
17540 return rte_flow_error_set(error, EINVAL,
17541 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17542 NULL, "empty context");
17543 age_info = GET_PORT_AGE_INFO(priv);
17544 rte_spinlock_lock(&age_info->aged_sl);
17545 LIST_FOREACH(act, &age_info->aged_aso, next) {
17548 context[nb_flows - 1] =
17549 act->age_params.context;
17550 if (!(--nb_contexts))
17554 TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17557 age_param = MLX5_CNT_TO_AGE(counter);
17558 context[nb_flows - 1] = age_param->context;
17559 if (!(--nb_contexts))
17563 rte_spinlock_unlock(&age_info->aged_sl);
17564 MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17569 * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17572 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17574 return flow_dv_counter_alloc(dev, 0);
17578 * Validate indirect action.
17579 * Dispatcher for action type specific validation.
17582 * Pointer to the Ethernet device structure.
17584 * Indirect action configuration.
17585 * @param[in] action
17586 * The indirect action object to validate.
17587 * @param[out] error
17588 * Perform verbose error reporting if not NULL. Initialized in case of
17592 * 0 on success, otherwise negative errno value.
17595 flow_dv_action_validate(struct rte_eth_dev *dev,
17596 const struct rte_flow_indir_action_conf *conf,
17597 const struct rte_flow_action *action,
17598 struct rte_flow_error *err)
17600 struct mlx5_priv *priv = dev->data->dev_private;
17602 RTE_SET_USED(conf);
17603 switch (action->type) {
17604 case RTE_FLOW_ACTION_TYPE_RSS:
17606 * priv->obj_ops is set according to driver capabilities.
17607 * When DevX capabilities are
17608 * sufficient, it is set to devx_obj_ops.
17609 * Otherwise, it is set to ibv_obj_ops.
17610 * ibv_obj_ops doesn't support ind_table_modify operation.
17611 * In this case the indirect RSS action can't be used.
17613 if (priv->obj_ops.ind_table_modify == NULL)
17614 return rte_flow_error_set
17616 RTE_FLOW_ERROR_TYPE_ACTION,
17618 "Indirect RSS action not supported");
17619 return mlx5_validate_action_rss(dev, action, err);
17620 case RTE_FLOW_ACTION_TYPE_AGE:
17621 if (!priv->sh->aso_age_mng)
17622 return rte_flow_error_set(err, ENOTSUP,
17623 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17625 "Indirect age action not supported");
17626 return flow_dv_validate_action_age(0, action, dev, err);
17627 case RTE_FLOW_ACTION_TYPE_COUNT:
17628 return flow_dv_validate_action_count(dev, true, 0, err);
17629 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17630 if (!priv->sh->ct_aso_en)
17631 return rte_flow_error_set(err, ENOTSUP,
17632 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17633 "ASO CT is not supported");
17634 return mlx5_validate_action_ct(dev, action->conf, err);
17636 return rte_flow_error_set(err, ENOTSUP,
17637 RTE_FLOW_ERROR_TYPE_ACTION,
17639 "action type not supported");
17644 * Check if the RSS configurations for colors of a meter policy match
17645 * each other, except the queues.
17648 * Pointer to the first RSS flow action.
17650 * Pointer to the second RSS flow action.
17653 * 0 on match, 1 on conflict.
17656 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17657 const struct rte_flow_action_rss *r2)
17659 if (r1 == NULL || r2 == NULL)
17661 if (!(r1->level <= 1 && r2->level <= 1) &&
17662 !(r1->level > 1 && r2->level > 1))
17664 if (r1->types != r2->types &&
17665 !((r1->types == 0 || r1->types == RTE_ETH_RSS_IP) &&
17666 (r2->types == 0 || r2->types == RTE_ETH_RSS_IP)))
17668 if (r1->key || r2->key) {
17669 const void *key1 = r1->key ? r1->key : rss_hash_default_key;
17670 const void *key2 = r2->key ? r2->key : rss_hash_default_key;
17672 if (memcmp(key1, key2, MLX5_RSS_HASH_KEY_LEN))
17679 * Validate the meter hierarchy chain for meter policy.
17682 * Pointer to the Ethernet device structure.
17683 * @param[in] meter_id
17685 * @param[in] action_flags
17686 * Holds the actions detected until now.
17687 * @param[out] is_rss
17689 * @param[out] hierarchy_domain
17690 * The domain bitmap for hierarchy policy.
17691 * @param[out] error
17692 * Perform verbose error reporting if not NULL. Initialized in case of
17696 * 0 on success, otherwise negative errno value with error set.
17699 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17701 uint64_t action_flags,
17703 uint8_t *hierarchy_domain,
17704 struct rte_mtr_error *error)
17706 struct mlx5_priv *priv = dev->data->dev_private;
17707 struct mlx5_flow_meter_info *fm;
17708 struct mlx5_flow_meter_policy *policy;
17711 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17712 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17713 return -rte_mtr_error_set(error, EINVAL,
17714 RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17716 "Multiple fate actions not supported.");
17717 *hierarchy_domain = 0;
17719 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17721 return -rte_mtr_error_set(error, EINVAL,
17722 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17723 "Meter not found in meter hierarchy.");
17724 if (fm->def_policy)
17725 return -rte_mtr_error_set(error, EINVAL,
17726 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17727 "Non termination meter not supported in hierarchy.");
17728 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17729 MLX5_ASSERT(policy);
17731 * Only inherit the supported domains of the first meter in
17733 * One meter supports at least one domain.
17735 if (!*hierarchy_domain) {
17736 if (policy->transfer)
17737 *hierarchy_domain |=
17738 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17739 if (policy->ingress)
17740 *hierarchy_domain |=
17741 MLX5_MTR_DOMAIN_INGRESS_BIT;
17742 if (policy->egress)
17743 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17745 if (!policy->is_hierarchy) {
17746 *is_rss = policy->is_rss;
17749 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17750 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17751 return -rte_mtr_error_set(error, EINVAL,
17752 RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17753 "Exceed max hierarchy meter number.");
17759 * Validate meter policy actions.
17760 * Dispatcher for action type specific validation.
17763 * Pointer to the Ethernet device structure.
17764 * @param[in] action
17765 * The meter policy action object to validate.
17767 * Attributes of flow to determine steering domain.
17768 * @param[out] error
17769 * Perform verbose error reporting if not NULL. Initialized in case of
17773 * 0 on success, otherwise negative errno value.
17776 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17777 const struct rte_flow_action *actions[RTE_COLORS],
17778 struct rte_flow_attr *attr,
17780 uint8_t *domain_bitmap,
17781 uint8_t *policy_mode,
17782 struct rte_mtr_error *error)
17784 struct mlx5_priv *priv = dev->data->dev_private;
17785 struct mlx5_dev_config *dev_conf = &priv->config;
17786 const struct rte_flow_action *act;
17787 uint64_t action_flags[RTE_COLORS] = {0};
17790 struct rte_flow_error flow_err;
17791 uint8_t domain_color[RTE_COLORS] = {0};
17792 uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17793 uint8_t hierarchy_domain = 0;
17794 const struct rte_flow_action_meter *mtr;
17795 bool def_green = false;
17796 bool def_yellow = false;
17797 const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17799 if (!priv->config.dv_esw_en)
17800 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17801 *domain_bitmap = def_domain;
17802 /* Red color could only support DROP action. */
17803 if (!actions[RTE_COLOR_RED] ||
17804 actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17805 return -rte_mtr_error_set(error, ENOTSUP,
17806 RTE_MTR_ERROR_TYPE_METER_POLICY,
17807 NULL, "Red color only supports drop action.");
17809 * Check default policy actions:
17810 * Green / Yellow: no action, Red: drop action
17811 * Either G or Y will trigger default policy actions to be created.
17813 if (!actions[RTE_COLOR_GREEN] ||
17814 actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17816 if (!actions[RTE_COLOR_YELLOW] ||
17817 actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17819 if (def_green && def_yellow) {
17820 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17822 } else if (!def_green && def_yellow) {
17823 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17824 } else if (def_green && !def_yellow) {
17825 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17827 *policy_mode = MLX5_MTR_POLICY_MODE_ALL;
17829 /* Set to empty string in case of NULL pointer access by user. */
17830 flow_err.message = "";
17831 for (i = 0; i < RTE_COLORS; i++) {
17833 for (action_flags[i] = 0, actions_n = 0;
17834 act && act->type != RTE_FLOW_ACTION_TYPE_END;
17836 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17837 return -rte_mtr_error_set(error, ENOTSUP,
17838 RTE_MTR_ERROR_TYPE_METER_POLICY,
17839 NULL, "too many actions");
17840 switch (act->type) {
17841 case RTE_FLOW_ACTION_TYPE_PORT_ID:
17842 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
17843 if (!priv->config.dv_esw_en)
17844 return -rte_mtr_error_set(error,
17846 RTE_MTR_ERROR_TYPE_METER_POLICY,
17847 NULL, "PORT action validate check"
17848 " fail for ESW disable");
17849 ret = flow_dv_validate_action_port_id(dev,
17851 act, attr, &flow_err);
17853 return -rte_mtr_error_set(error,
17855 RTE_MTR_ERROR_TYPE_METER_POLICY,
17856 NULL, flow_err.message ?
17858 "PORT action validate check fail");
17860 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17862 case RTE_FLOW_ACTION_TYPE_MARK:
17863 ret = flow_dv_validate_action_mark(dev, act,
17867 return -rte_mtr_error_set(error,
17869 RTE_MTR_ERROR_TYPE_METER_POLICY,
17870 NULL, flow_err.message ?
17872 "Mark action validate check fail");
17873 if (dev_conf->dv_xmeta_en !=
17874 MLX5_XMETA_MODE_LEGACY)
17875 return -rte_mtr_error_set(error,
17877 RTE_MTR_ERROR_TYPE_METER_POLICY,
17878 NULL, "Extend MARK action is "
17879 "not supported. Please try use "
17880 "default policy for meter.");
17881 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17884 case RTE_FLOW_ACTION_TYPE_SET_TAG:
17885 ret = flow_dv_validate_action_set_tag(dev,
17886 act, action_flags[i],
17889 return -rte_mtr_error_set(error,
17891 RTE_MTR_ERROR_TYPE_METER_POLICY,
17892 NULL, flow_err.message ?
17894 "Set tag action validate check fail");
17895 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17898 case RTE_FLOW_ACTION_TYPE_DROP:
17899 ret = mlx5_flow_validate_action_drop
17900 (action_flags[i], attr, &flow_err);
17902 return -rte_mtr_error_set(error,
17904 RTE_MTR_ERROR_TYPE_METER_POLICY,
17905 NULL, flow_err.message ?
17907 "Drop action validate check fail");
17908 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17911 case RTE_FLOW_ACTION_TYPE_QUEUE:
17913 * Check whether extensive
17914 * metadata feature is engaged.
17916 if (dev_conf->dv_flow_en &&
17917 (dev_conf->dv_xmeta_en !=
17918 MLX5_XMETA_MODE_LEGACY) &&
17919 mlx5_flow_ext_mreg_supported(dev))
17920 return -rte_mtr_error_set(error,
17922 RTE_MTR_ERROR_TYPE_METER_POLICY,
17923 NULL, "Queue action with meta "
17924 "is not supported. Please try use "
17925 "default policy for meter.");
17926 ret = mlx5_flow_validate_action_queue(act,
17927 action_flags[i], dev,
17930 return -rte_mtr_error_set(error,
17932 RTE_MTR_ERROR_TYPE_METER_POLICY,
17933 NULL, flow_err.message ?
17935 "Queue action validate check fail");
17936 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
17939 case RTE_FLOW_ACTION_TYPE_RSS:
17940 if (dev_conf->dv_flow_en &&
17941 (dev_conf->dv_xmeta_en !=
17942 MLX5_XMETA_MODE_LEGACY) &&
17943 mlx5_flow_ext_mreg_supported(dev))
17944 return -rte_mtr_error_set(error,
17946 RTE_MTR_ERROR_TYPE_METER_POLICY,
17947 NULL, "RSS action with meta "
17948 "is not supported. Please try use "
17949 "default policy for meter.");
17950 ret = mlx5_validate_action_rss(dev, act,
17953 return -rte_mtr_error_set(error,
17955 RTE_MTR_ERROR_TYPE_METER_POLICY,
17956 NULL, flow_err.message ?
17958 "RSS action validate check fail");
17959 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
17961 /* Either G or Y will set the RSS. */
17962 rss_color[i] = act->conf;
17964 case RTE_FLOW_ACTION_TYPE_JUMP:
17965 ret = flow_dv_validate_action_jump(dev,
17966 NULL, act, action_flags[i],
17967 attr, true, &flow_err);
17969 return -rte_mtr_error_set(error,
17971 RTE_MTR_ERROR_TYPE_METER_POLICY,
17972 NULL, flow_err.message ?
17974 "Jump action validate check fail");
17976 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
17979 * Only the last meter in the hierarchy will support
17980 * the YELLOW color steering. Then in the meter policy
17981 * actions list, there should be no other meter inside.
17983 case RTE_FLOW_ACTION_TYPE_METER:
17984 if (i != RTE_COLOR_GREEN)
17985 return -rte_mtr_error_set(error,
17987 RTE_MTR_ERROR_TYPE_METER_POLICY,
17989 "Meter hierarchy only supports GREEN color.");
17990 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
17991 return -rte_mtr_error_set(error,
17993 RTE_MTR_ERROR_TYPE_METER_POLICY,
17995 "No yellow policy should be provided in meter hierarchy.");
17997 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
18007 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
18010 return -rte_mtr_error_set(error, ENOTSUP,
18011 RTE_MTR_ERROR_TYPE_METER_POLICY,
18013 "Doesn't support optional action");
18016 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID) {
18017 domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
18018 } else if ((action_flags[i] &
18019 (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
18020 (action_flags[i] & MLX5_FLOW_ACTION_MARK)) {
18022 * Only support MLX5_XMETA_MODE_LEGACY
18023 * so MARK action is only in ingress domain.
18025 domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
18027 domain_color[i] = def_domain;
18028 if (action_flags[i] &&
18029 !(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18031 ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
18033 if (action_flags[i] &
18034 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
18035 domain_color[i] &= hierarchy_domain;
18037 * Non-termination actions only support NIC Tx domain.
18038 * The adjustion should be skipped when there is no
18039 * action or only END is provided. The default domains
18040 * bit-mask is set to find the MIN intersection.
18041 * The action flags checking should also be skipped.
18043 if ((def_green && i == RTE_COLOR_GREEN) ||
18044 (def_yellow && i == RTE_COLOR_YELLOW))
18047 * Validate the drop action mutual exclusion
18048 * with other actions. Drop action is mutually-exclusive
18049 * with any other action, except for Count action.
18051 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
18052 (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
18053 return -rte_mtr_error_set(error, ENOTSUP,
18054 RTE_MTR_ERROR_TYPE_METER_POLICY,
18055 NULL, "Drop action is mutually-exclusive "
18056 "with any other action");
18058 /* Eswitch has few restrictions on using items and actions */
18059 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
18060 if (!mlx5_flow_ext_mreg_supported(dev) &&
18061 action_flags[i] & MLX5_FLOW_ACTION_MARK)
18062 return -rte_mtr_error_set(error, ENOTSUP,
18063 RTE_MTR_ERROR_TYPE_METER_POLICY,
18064 NULL, "unsupported action MARK");
18065 if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
18066 return -rte_mtr_error_set(error, ENOTSUP,
18067 RTE_MTR_ERROR_TYPE_METER_POLICY,
18068 NULL, "unsupported action QUEUE");
18069 if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
18070 return -rte_mtr_error_set(error, ENOTSUP,
18071 RTE_MTR_ERROR_TYPE_METER_POLICY,
18072 NULL, "unsupported action RSS");
18073 if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18074 return -rte_mtr_error_set(error, ENOTSUP,
18075 RTE_MTR_ERROR_TYPE_METER_POLICY,
18076 NULL, "no fate action is found");
18078 if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
18079 (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
18080 if ((domain_color[i] &
18081 MLX5_MTR_DOMAIN_EGRESS_BIT))
18083 MLX5_MTR_DOMAIN_EGRESS_BIT;
18085 return -rte_mtr_error_set(error,
18087 RTE_MTR_ERROR_TYPE_METER_POLICY,
18089 "no fate action is found");
18093 /* If both colors have RSS, the attributes should be the same. */
18094 if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
18095 rss_color[RTE_COLOR_YELLOW]))
18096 return -rte_mtr_error_set(error, EINVAL,
18097 RTE_MTR_ERROR_TYPE_METER_POLICY,
18098 NULL, "policy RSS attr conflict");
18099 if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
18101 /* "domain_color[C]" is non-zero for each color, default is ALL. */
18102 if (!def_green && !def_yellow &&
18103 domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
18104 !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
18105 !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
18106 return -rte_mtr_error_set(error, EINVAL,
18107 RTE_MTR_ERROR_TYPE_METER_POLICY,
18108 NULL, "policy domains conflict");
18110 * At least one color policy is listed in the actions, the domains
18111 * to be supported should be the intersection.
18113 *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
18114 domain_color[RTE_COLOR_YELLOW];
18119 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
18121 struct mlx5_priv *priv = dev->data->dev_private;
18124 if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
18125 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
18130 if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
18131 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
18135 if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
18136 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
18144 * Discover the number of available flow priorities
18145 * by trying to create a flow with the highest priority value
18146 * for each possible number.
18151 * List of possible number of available priorities.
18152 * @param[in] vprio_n
18153 * Size of @p vprio array.
18155 * On success, number of available flow priorities.
18156 * On failure, a negative errno-style code and rte_errno is set.
18159 flow_dv_discover_priorities(struct rte_eth_dev *dev,
18160 const uint16_t *vprio, int vprio_n)
18162 struct mlx5_priv *priv = dev->data->dev_private;
18163 struct mlx5_indexed_pool *pool = priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW];
18164 struct rte_flow_item_eth eth;
18165 struct rte_flow_item item = {
18166 .type = RTE_FLOW_ITEM_TYPE_ETH,
18170 struct mlx5_flow_dv_matcher matcher = {
18172 .size = sizeof(matcher.mask.buf),
18175 union mlx5_flow_tbl_key tbl_key;
18176 struct mlx5_flow flow;
18178 struct rte_flow_error error;
18180 int i, err, ret = -ENOTSUP;
18183 * Prepare a flow with a catch-all pattern and a drop action.
18184 * Use drop queue, because shared drop action may be unavailable.
18186 action = priv->drop_queue.hrxq->action;
18187 if (action == NULL) {
18188 DRV_LOG(ERR, "Priority discovery requires a drop action");
18189 rte_errno = ENOTSUP;
18192 memset(&flow, 0, sizeof(flow));
18193 flow.handle = mlx5_ipool_zmalloc(pool, &flow.handle_idx);
18194 if (flow.handle == NULL) {
18195 DRV_LOG(ERR, "Cannot create flow handle");
18196 rte_errno = ENOMEM;
18199 flow.ingress = true;
18200 flow.dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
18201 flow.dv.actions[0] = action;
18202 flow.dv.actions_n = 1;
18203 memset(ð, 0, sizeof(eth));
18204 flow_dv_translate_item_eth(matcher.mask.buf, flow.dv.value.buf,
18205 &item, /* inner */ false, /* group */ 0);
18206 matcher.crc = rte_raw_cksum(matcher.mask.buf, matcher.mask.size);
18207 for (i = 0; i < vprio_n; i++) {
18208 /* Configure the next proposed maximum priority. */
18209 matcher.priority = vprio[i] - 1;
18210 memset(&tbl_key, 0, sizeof(tbl_key));
18211 err = flow_dv_matcher_register(dev, &matcher, &tbl_key, &flow,
18216 /* This action is pure SW and must always succeed. */
18217 DRV_LOG(ERR, "Cannot register matcher");
18221 /* Try to apply the flow to HW. */
18222 misc_mask = flow_dv_matcher_enable(flow.dv.value.buf);
18223 __flow_dv_adjust_buf_size(&flow.dv.value.size, misc_mask);
18224 err = mlx5_flow_os_create_flow
18225 (flow.handle->dvh.matcher->matcher_object,
18226 (void *)&flow.dv.value, flow.dv.actions_n,
18227 flow.dv.actions, &flow.handle->drv_flow);
18229 claim_zero(mlx5_flow_os_destroy_flow
18230 (flow.handle->drv_flow));
18231 flow.handle->drv_flow = NULL;
18233 claim_zero(flow_dv_matcher_release(dev, flow.handle));
18238 mlx5_ipool_free(pool, flow.handle_idx);
18239 /* Set rte_errno if no expected priority value matched. */
18245 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
18246 .validate = flow_dv_validate,
18247 .prepare = flow_dv_prepare,
18248 .translate = flow_dv_translate,
18249 .apply = flow_dv_apply,
18250 .remove = flow_dv_remove,
18251 .destroy = flow_dv_destroy,
18252 .query = flow_dv_query,
18253 .create_mtr_tbls = flow_dv_create_mtr_tbls,
18254 .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
18255 .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
18256 .create_meter = flow_dv_mtr_alloc,
18257 .free_meter = flow_dv_aso_mtr_release_to_pool,
18258 .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
18259 .create_mtr_acts = flow_dv_create_mtr_policy_acts,
18260 .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
18261 .create_policy_rules = flow_dv_create_policy_rules,
18262 .destroy_policy_rules = flow_dv_destroy_policy_rules,
18263 .create_def_policy = flow_dv_create_def_policy,
18264 .destroy_def_policy = flow_dv_destroy_def_policy,
18265 .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
18266 .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
18267 .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
18268 .counter_alloc = flow_dv_counter_allocate,
18269 .counter_free = flow_dv_counter_free,
18270 .counter_query = flow_dv_counter_query,
18271 .get_aged_flows = flow_dv_get_aged_flows,
18272 .action_validate = flow_dv_action_validate,
18273 .action_create = flow_dv_action_create,
18274 .action_destroy = flow_dv_action_destroy,
18275 .action_update = flow_dv_action_update,
18276 .action_query = flow_dv_action_query,
18277 .sync_domain = flow_dv_sync_domain,
18278 .discover_priorities = flow_dv_discover_priorities,
18279 .item_create = flow_dv_item_create,
18280 .item_release = flow_dv_item_release,
18283 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */