1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018 Mellanox Technologies, Ltd
11 #include <rte_common.h>
12 #include <rte_ether.h>
13 #include <ethdev_driver.h>
15 #include <rte_flow_driver.h>
16 #include <rte_malloc.h>
17 #include <rte_cycles.h>
20 #include <rte_vxlan.h>
22 #include <rte_eal_paging.h>
25 #include <rte_mtr_driver.h>
26 #include <rte_tailq.h>
28 #include <mlx5_glue.h>
29 #include <mlx5_devx_cmds.h>
31 #include <mlx5_malloc.h>
33 #include "mlx5_defs.h"
35 #include "mlx5_common_os.h"
36 #include "mlx5_flow.h"
37 #include "mlx5_flow_os.h"
40 #include "rte_pmd_mlx5.h"
42 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
44 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
45 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
48 #ifndef HAVE_MLX5DV_DR_ESWITCH
49 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
50 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
54 #ifndef HAVE_MLX5DV_DR
55 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
58 /* VLAN header definitions */
59 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
60 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
61 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
62 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
63 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
78 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
79 struct mlx5_flow_tbl_resource *tbl);
82 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
83 uint32_t encap_decap_idx);
86 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
89 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
92 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
96 * Initialize flow attributes structure according to flow items' types.
98 * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
99 * mode. For tunnel mode, the items to be modified are the outermost ones.
102 * Pointer to item specification.
104 * Pointer to flow attributes structure.
105 * @param[in] dev_flow
106 * Pointer to the sub flow.
107 * @param[in] tunnel_decap
108 * Whether action is after tunnel decapsulation.
111 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
112 struct mlx5_flow *dev_flow, bool tunnel_decap)
114 uint64_t layers = dev_flow->handle->layers;
117 * If layers is already initialized, it means this dev_flow is the
118 * suffix flow, the layers flags is set by the prefix flow. Need to
119 * use the layer flags from prefix flow as the suffix flow may not
120 * have the user defined items as the flow is split.
123 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
125 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
127 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
129 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
134 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
135 uint8_t next_protocol = 0xff;
136 switch (item->type) {
137 case RTE_FLOW_ITEM_TYPE_GRE:
138 case RTE_FLOW_ITEM_TYPE_NVGRE:
139 case RTE_FLOW_ITEM_TYPE_VXLAN:
140 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
141 case RTE_FLOW_ITEM_TYPE_GENEVE:
142 case RTE_FLOW_ITEM_TYPE_MPLS:
146 case RTE_FLOW_ITEM_TYPE_IPV4:
149 if (item->mask != NULL &&
150 ((const struct rte_flow_item_ipv4 *)
151 item->mask)->hdr.next_proto_id)
153 ((const struct rte_flow_item_ipv4 *)
154 (item->spec))->hdr.next_proto_id &
155 ((const struct rte_flow_item_ipv4 *)
156 (item->mask))->hdr.next_proto_id;
157 if ((next_protocol == IPPROTO_IPIP ||
158 next_protocol == IPPROTO_IPV6) && tunnel_decap)
161 case RTE_FLOW_ITEM_TYPE_IPV6:
164 if (item->mask != NULL &&
165 ((const struct rte_flow_item_ipv6 *)
166 item->mask)->hdr.proto)
168 ((const struct rte_flow_item_ipv6 *)
169 (item->spec))->hdr.proto &
170 ((const struct rte_flow_item_ipv6 *)
171 (item->mask))->hdr.proto;
172 if ((next_protocol == IPPROTO_IPIP ||
173 next_protocol == IPPROTO_IPV6) && tunnel_decap)
176 case RTE_FLOW_ITEM_TYPE_UDP:
180 case RTE_FLOW_ITEM_TYPE_TCP:
192 * Convert rte_mtr_color to mlx5 color.
201 rte_col_2_mlx5_col(enum rte_color rcol)
204 case RTE_COLOR_GREEN:
205 return MLX5_FLOW_COLOR_GREEN;
206 case RTE_COLOR_YELLOW:
207 return MLX5_FLOW_COLOR_YELLOW;
209 return MLX5_FLOW_COLOR_RED;
213 return MLX5_FLOW_COLOR_UNDEFINED;
216 struct field_modify_info {
217 uint32_t size; /* Size of field in protocol header, in bytes. */
218 uint32_t offset; /* Offset of field in protocol header, in bytes. */
219 enum mlx5_modification_field id;
222 struct field_modify_info modify_eth[] = {
223 {4, 0, MLX5_MODI_OUT_DMAC_47_16},
224 {2, 4, MLX5_MODI_OUT_DMAC_15_0},
225 {4, 6, MLX5_MODI_OUT_SMAC_47_16},
226 {2, 10, MLX5_MODI_OUT_SMAC_15_0},
230 struct field_modify_info modify_vlan_out_first_vid[] = {
231 /* Size in bits !!! */
232 {12, 0, MLX5_MODI_OUT_FIRST_VID},
236 struct field_modify_info modify_ipv4[] = {
237 {1, 1, MLX5_MODI_OUT_IP_DSCP},
238 {1, 8, MLX5_MODI_OUT_IPV4_TTL},
239 {4, 12, MLX5_MODI_OUT_SIPV4},
240 {4, 16, MLX5_MODI_OUT_DIPV4},
244 struct field_modify_info modify_ipv6[] = {
245 {1, 0, MLX5_MODI_OUT_IP_DSCP},
246 {1, 7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
247 {4, 8, MLX5_MODI_OUT_SIPV6_127_96},
248 {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
249 {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
250 {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
251 {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
252 {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
253 {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
254 {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
258 struct field_modify_info modify_udp[] = {
259 {2, 0, MLX5_MODI_OUT_UDP_SPORT},
260 {2, 2, MLX5_MODI_OUT_UDP_DPORT},
264 struct field_modify_info modify_tcp[] = {
265 {2, 0, MLX5_MODI_OUT_TCP_SPORT},
266 {2, 2, MLX5_MODI_OUT_TCP_DPORT},
267 {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
268 {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
272 static const struct rte_flow_item *
273 mlx5_flow_find_tunnel_item(const struct rte_flow_item *item)
275 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
276 switch (item->type) {
279 case RTE_FLOW_ITEM_TYPE_VXLAN:
280 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
281 case RTE_FLOW_ITEM_TYPE_GRE:
282 case RTE_FLOW_ITEM_TYPE_MPLS:
283 case RTE_FLOW_ITEM_TYPE_NVGRE:
284 case RTE_FLOW_ITEM_TYPE_GENEVE:
286 case RTE_FLOW_ITEM_TYPE_IPV4:
287 case RTE_FLOW_ITEM_TYPE_IPV6:
288 if (item[1].type == RTE_FLOW_ITEM_TYPE_IPV4 ||
289 item[1].type == RTE_FLOW_ITEM_TYPE_IPV6)
298 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
299 uint8_t next_protocol, uint64_t *item_flags,
302 MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
303 item->type == RTE_FLOW_ITEM_TYPE_IPV6);
304 if (next_protocol == IPPROTO_IPIP) {
305 *item_flags |= MLX5_FLOW_LAYER_IPIP;
308 if (next_protocol == IPPROTO_IPV6) {
309 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
314 static inline struct mlx5_hlist *
315 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
316 const char *name, uint32_t size, bool direct_key,
317 bool lcores_share, void *ctx,
318 mlx5_list_create_cb cb_create,
319 mlx5_list_match_cb cb_match,
320 mlx5_list_remove_cb cb_remove,
321 mlx5_list_clone_cb cb_clone,
322 mlx5_list_clone_free_cb cb_clone_free)
324 struct mlx5_hlist *hl;
325 struct mlx5_hlist *expected = NULL;
326 char s[MLX5_NAME_SIZE];
328 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
331 snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
332 hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
333 ctx, cb_create, cb_match, cb_remove, cb_clone,
336 DRV_LOG(ERR, "%s hash creation failed", name);
340 if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
343 mlx5_hlist_destroy(hl);
344 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
349 /* Update VLAN's VID/PCP based on input rte_flow_action.
352 * Pointer to struct rte_flow_action.
354 * Pointer to struct rte_vlan_hdr.
357 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
358 struct rte_vlan_hdr *vlan)
361 if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
363 ((const struct rte_flow_action_of_set_vlan_pcp *)
364 action->conf)->vlan_pcp;
365 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
366 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
367 vlan->vlan_tci |= vlan_tci;
368 } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
369 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
370 vlan->vlan_tci |= rte_be_to_cpu_16
371 (((const struct rte_flow_action_of_set_vlan_vid *)
372 action->conf)->vlan_vid);
377 * Fetch 1, 2, 3 or 4 byte field from the byte array
378 * and return as unsigned integer in host-endian format.
381 * Pointer to data array.
383 * Size of field to extract.
386 * converted field in host endian format.
388 static inline uint32_t
389 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
398 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
401 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
402 ret = (ret << 8) | *(data + sizeof(uint16_t));
405 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
416 * Convert modify-header action to DV specification.
418 * Data length of each action is determined by provided field description
419 * and the item mask. Data bit offset and width of each action is determined
420 * by provided item mask.
423 * Pointer to item specification.
425 * Pointer to field modification information.
426 * For MLX5_MODIFICATION_TYPE_SET specifies destination field.
427 * For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
428 * For MLX5_MODIFICATION_TYPE_COPY specifies source field.
430 * Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
431 * Negative offset value sets the same offset as source offset.
432 * size field is ignored, value is taken from source field.
433 * @param[in,out] resource
434 * Pointer to the modify-header resource.
436 * Type of modification.
438 * Pointer to the error structure.
441 * 0 on success, a negative errno value otherwise and rte_errno is set.
444 flow_dv_convert_modify_action(struct rte_flow_item *item,
445 struct field_modify_info *field,
446 struct field_modify_info *dcopy,
447 struct mlx5_flow_dv_modify_hdr_resource *resource,
448 uint32_t type, struct rte_flow_error *error)
450 uint32_t i = resource->actions_num;
451 struct mlx5_modification_cmd *actions = resource->actions;
452 uint32_t carry_b = 0;
455 * The item and mask are provided in big-endian format.
456 * The fields should be presented as in big-endian format either.
457 * Mask must be always present, it defines the actual field width.
459 MLX5_ASSERT(item->mask);
460 MLX5_ASSERT(field->size);
466 bool next_field = true;
467 bool next_dcopy = true;
469 if (i >= MLX5_MAX_MODIFY_NUM)
470 return rte_flow_error_set(error, EINVAL,
471 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
472 "too many items to modify");
473 /* Fetch variable byte size mask from the array. */
474 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
475 field->offset, field->size);
480 /* Deduce actual data width in bits from mask value. */
481 off_b = rte_bsf32(mask) + carry_b;
482 size_b = sizeof(uint32_t) * CHAR_BIT -
483 off_b - __builtin_clz(mask);
485 actions[i] = (struct mlx5_modification_cmd) {
489 .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
492 if (type == MLX5_MODIFICATION_TYPE_COPY) {
494 actions[i].dst_field = dcopy->id;
495 actions[i].dst_offset =
496 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
497 /* Convert entire record to big-endian format. */
498 actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
500 * Destination field overflow. Copy leftovers of
501 * a source field to the next destination field.
504 if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
507 dcopy->size * CHAR_BIT - dcopy->offset;
508 carry_b = actions[i].length;
512 * Not enough bits in a source filed to fill a
513 * destination field. Switch to the next source.
515 if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
516 (size_b == field->size * CHAR_BIT - off_b)) {
518 field->size * CHAR_BIT - off_b;
519 dcopy->offset += actions[i].length;
525 MLX5_ASSERT(item->spec);
526 data = flow_dv_fetch_field((const uint8_t *)item->spec +
527 field->offset, field->size);
528 /* Shift out the trailing masked bits from data. */
529 data = (data & mask) >> off_b;
530 actions[i].data1 = rte_cpu_to_be_32(data);
532 /* Convert entire record to expected big-endian format. */
533 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
537 } while (field->size);
538 if (resource->actions_num == i)
539 return rte_flow_error_set(error, EINVAL,
540 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
541 "invalid modification flow item");
542 resource->actions_num = i;
547 * Convert modify-header set IPv4 address action to DV specification.
549 * @param[in,out] resource
550 * Pointer to the modify-header resource.
552 * Pointer to action specification.
554 * Pointer to the error structure.
557 * 0 on success, a negative errno value otherwise and rte_errno is set.
560 flow_dv_convert_action_modify_ipv4
561 (struct mlx5_flow_dv_modify_hdr_resource *resource,
562 const struct rte_flow_action *action,
563 struct rte_flow_error *error)
565 const struct rte_flow_action_set_ipv4 *conf =
566 (const struct rte_flow_action_set_ipv4 *)(action->conf);
567 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
568 struct rte_flow_item_ipv4 ipv4;
569 struct rte_flow_item_ipv4 ipv4_mask;
571 memset(&ipv4, 0, sizeof(ipv4));
572 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
573 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
574 ipv4.hdr.src_addr = conf->ipv4_addr;
575 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
577 ipv4.hdr.dst_addr = conf->ipv4_addr;
578 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
581 item.mask = &ipv4_mask;
582 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
583 MLX5_MODIFICATION_TYPE_SET, error);
587 * Convert modify-header set IPv6 address action to DV specification.
589 * @param[in,out] resource
590 * Pointer to the modify-header resource.
592 * Pointer to action specification.
594 * Pointer to the error structure.
597 * 0 on success, a negative errno value otherwise and rte_errno is set.
600 flow_dv_convert_action_modify_ipv6
601 (struct mlx5_flow_dv_modify_hdr_resource *resource,
602 const struct rte_flow_action *action,
603 struct rte_flow_error *error)
605 const struct rte_flow_action_set_ipv6 *conf =
606 (const struct rte_flow_action_set_ipv6 *)(action->conf);
607 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
608 struct rte_flow_item_ipv6 ipv6;
609 struct rte_flow_item_ipv6 ipv6_mask;
611 memset(&ipv6, 0, sizeof(ipv6));
612 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
613 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
614 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
615 sizeof(ipv6.hdr.src_addr));
616 memcpy(&ipv6_mask.hdr.src_addr,
617 &rte_flow_item_ipv6_mask.hdr.src_addr,
618 sizeof(ipv6.hdr.src_addr));
620 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
621 sizeof(ipv6.hdr.dst_addr));
622 memcpy(&ipv6_mask.hdr.dst_addr,
623 &rte_flow_item_ipv6_mask.hdr.dst_addr,
624 sizeof(ipv6.hdr.dst_addr));
627 item.mask = &ipv6_mask;
628 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
629 MLX5_MODIFICATION_TYPE_SET, error);
633 * Convert modify-header set MAC address action to DV specification.
635 * @param[in,out] resource
636 * Pointer to the modify-header resource.
638 * Pointer to action specification.
640 * Pointer to the error structure.
643 * 0 on success, a negative errno value otherwise and rte_errno is set.
646 flow_dv_convert_action_modify_mac
647 (struct mlx5_flow_dv_modify_hdr_resource *resource,
648 const struct rte_flow_action *action,
649 struct rte_flow_error *error)
651 const struct rte_flow_action_set_mac *conf =
652 (const struct rte_flow_action_set_mac *)(action->conf);
653 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
654 struct rte_flow_item_eth eth;
655 struct rte_flow_item_eth eth_mask;
657 memset(ð, 0, sizeof(eth));
658 memset(ð_mask, 0, sizeof(eth_mask));
659 if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
660 memcpy(ð.src.addr_bytes, &conf->mac_addr,
661 sizeof(eth.src.addr_bytes));
662 memcpy(ð_mask.src.addr_bytes,
663 &rte_flow_item_eth_mask.src.addr_bytes,
664 sizeof(eth_mask.src.addr_bytes));
666 memcpy(ð.dst.addr_bytes, &conf->mac_addr,
667 sizeof(eth.dst.addr_bytes));
668 memcpy(ð_mask.dst.addr_bytes,
669 &rte_flow_item_eth_mask.dst.addr_bytes,
670 sizeof(eth_mask.dst.addr_bytes));
673 item.mask = ð_mask;
674 return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
675 MLX5_MODIFICATION_TYPE_SET, error);
679 * Convert modify-header set VLAN VID action to DV specification.
681 * @param[in,out] resource
682 * Pointer to the modify-header resource.
684 * Pointer to action specification.
686 * Pointer to the error structure.
689 * 0 on success, a negative errno value otherwise and rte_errno is set.
692 flow_dv_convert_action_modify_vlan_vid
693 (struct mlx5_flow_dv_modify_hdr_resource *resource,
694 const struct rte_flow_action *action,
695 struct rte_flow_error *error)
697 const struct rte_flow_action_of_set_vlan_vid *conf =
698 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
699 int i = resource->actions_num;
700 struct mlx5_modification_cmd *actions = resource->actions;
701 struct field_modify_info *field = modify_vlan_out_first_vid;
703 if (i >= MLX5_MAX_MODIFY_NUM)
704 return rte_flow_error_set(error, EINVAL,
705 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
706 "too many items to modify");
707 actions[i] = (struct mlx5_modification_cmd) {
708 .action_type = MLX5_MODIFICATION_TYPE_SET,
710 .length = field->size,
711 .offset = field->offset,
713 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
714 actions[i].data1 = conf->vlan_vid;
715 actions[i].data1 = actions[i].data1 << 16;
716 resource->actions_num = ++i;
721 * Convert modify-header set TP action to DV specification.
723 * @param[in,out] resource
724 * Pointer to the modify-header resource.
726 * Pointer to action specification.
728 * Pointer to rte_flow_item objects list.
730 * Pointer to flow attributes structure.
731 * @param[in] dev_flow
732 * Pointer to the sub flow.
733 * @param[in] tunnel_decap
734 * Whether action is after tunnel decapsulation.
736 * Pointer to the error structure.
739 * 0 on success, a negative errno value otherwise and rte_errno is set.
742 flow_dv_convert_action_modify_tp
743 (struct mlx5_flow_dv_modify_hdr_resource *resource,
744 const struct rte_flow_action *action,
745 const struct rte_flow_item *items,
746 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
747 bool tunnel_decap, struct rte_flow_error *error)
749 const struct rte_flow_action_set_tp *conf =
750 (const struct rte_flow_action_set_tp *)(action->conf);
751 struct rte_flow_item item;
752 struct rte_flow_item_udp udp;
753 struct rte_flow_item_udp udp_mask;
754 struct rte_flow_item_tcp tcp;
755 struct rte_flow_item_tcp tcp_mask;
756 struct field_modify_info *field;
759 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
761 memset(&udp, 0, sizeof(udp));
762 memset(&udp_mask, 0, sizeof(udp_mask));
763 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
764 udp.hdr.src_port = conf->port;
765 udp_mask.hdr.src_port =
766 rte_flow_item_udp_mask.hdr.src_port;
768 udp.hdr.dst_port = conf->port;
769 udp_mask.hdr.dst_port =
770 rte_flow_item_udp_mask.hdr.dst_port;
772 item.type = RTE_FLOW_ITEM_TYPE_UDP;
774 item.mask = &udp_mask;
777 MLX5_ASSERT(attr->tcp);
778 memset(&tcp, 0, sizeof(tcp));
779 memset(&tcp_mask, 0, sizeof(tcp_mask));
780 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
781 tcp.hdr.src_port = conf->port;
782 tcp_mask.hdr.src_port =
783 rte_flow_item_tcp_mask.hdr.src_port;
785 tcp.hdr.dst_port = conf->port;
786 tcp_mask.hdr.dst_port =
787 rte_flow_item_tcp_mask.hdr.dst_port;
789 item.type = RTE_FLOW_ITEM_TYPE_TCP;
791 item.mask = &tcp_mask;
794 return flow_dv_convert_modify_action(&item, field, NULL, resource,
795 MLX5_MODIFICATION_TYPE_SET, error);
799 * Convert modify-header set TTL action to DV specification.
801 * @param[in,out] resource
802 * Pointer to the modify-header resource.
804 * Pointer to action specification.
806 * Pointer to rte_flow_item objects list.
808 * Pointer to flow attributes structure.
809 * @param[in] dev_flow
810 * Pointer to the sub flow.
811 * @param[in] tunnel_decap
812 * Whether action is after tunnel decapsulation.
814 * Pointer to the error structure.
817 * 0 on success, a negative errno value otherwise and rte_errno is set.
820 flow_dv_convert_action_modify_ttl
821 (struct mlx5_flow_dv_modify_hdr_resource *resource,
822 const struct rte_flow_action *action,
823 const struct rte_flow_item *items,
824 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
825 bool tunnel_decap, struct rte_flow_error *error)
827 const struct rte_flow_action_set_ttl *conf =
828 (const struct rte_flow_action_set_ttl *)(action->conf);
829 struct rte_flow_item item;
830 struct rte_flow_item_ipv4 ipv4;
831 struct rte_flow_item_ipv4 ipv4_mask;
832 struct rte_flow_item_ipv6 ipv6;
833 struct rte_flow_item_ipv6 ipv6_mask;
834 struct field_modify_info *field;
837 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
839 memset(&ipv4, 0, sizeof(ipv4));
840 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
841 ipv4.hdr.time_to_live = conf->ttl_value;
842 ipv4_mask.hdr.time_to_live = 0xFF;
843 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
845 item.mask = &ipv4_mask;
848 MLX5_ASSERT(attr->ipv6);
849 memset(&ipv6, 0, sizeof(ipv6));
850 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
851 ipv6.hdr.hop_limits = conf->ttl_value;
852 ipv6_mask.hdr.hop_limits = 0xFF;
853 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
855 item.mask = &ipv6_mask;
858 return flow_dv_convert_modify_action(&item, field, NULL, resource,
859 MLX5_MODIFICATION_TYPE_SET, error);
863 * Convert modify-header decrement TTL action to DV specification.
865 * @param[in,out] resource
866 * Pointer to the modify-header resource.
868 * Pointer to action specification.
870 * Pointer to rte_flow_item objects list.
872 * Pointer to flow attributes structure.
873 * @param[in] dev_flow
874 * Pointer to the sub flow.
875 * @param[in] tunnel_decap
876 * Whether action is after tunnel decapsulation.
878 * Pointer to the error structure.
881 * 0 on success, a negative errno value otherwise and rte_errno is set.
884 flow_dv_convert_action_modify_dec_ttl
885 (struct mlx5_flow_dv_modify_hdr_resource *resource,
886 const struct rte_flow_item *items,
887 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
888 bool tunnel_decap, struct rte_flow_error *error)
890 struct rte_flow_item item;
891 struct rte_flow_item_ipv4 ipv4;
892 struct rte_flow_item_ipv4 ipv4_mask;
893 struct rte_flow_item_ipv6 ipv6;
894 struct rte_flow_item_ipv6 ipv6_mask;
895 struct field_modify_info *field;
898 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
900 memset(&ipv4, 0, sizeof(ipv4));
901 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
902 ipv4.hdr.time_to_live = 0xFF;
903 ipv4_mask.hdr.time_to_live = 0xFF;
904 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
906 item.mask = &ipv4_mask;
909 MLX5_ASSERT(attr->ipv6);
910 memset(&ipv6, 0, sizeof(ipv6));
911 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
912 ipv6.hdr.hop_limits = 0xFF;
913 ipv6_mask.hdr.hop_limits = 0xFF;
914 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
916 item.mask = &ipv6_mask;
919 return flow_dv_convert_modify_action(&item, field, NULL, resource,
920 MLX5_MODIFICATION_TYPE_ADD, error);
924 * Convert modify-header increment/decrement TCP Sequence number
925 * to DV specification.
927 * @param[in,out] resource
928 * Pointer to the modify-header resource.
930 * Pointer to action specification.
932 * Pointer to the error structure.
935 * 0 on success, a negative errno value otherwise and rte_errno is set.
938 flow_dv_convert_action_modify_tcp_seq
939 (struct mlx5_flow_dv_modify_hdr_resource *resource,
940 const struct rte_flow_action *action,
941 struct rte_flow_error *error)
943 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
944 uint64_t value = rte_be_to_cpu_32(*conf);
945 struct rte_flow_item item;
946 struct rte_flow_item_tcp tcp;
947 struct rte_flow_item_tcp tcp_mask;
949 memset(&tcp, 0, sizeof(tcp));
950 memset(&tcp_mask, 0, sizeof(tcp_mask));
951 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
953 * The HW has no decrement operation, only increment operation.
954 * To simulate decrement X from Y using increment operation
955 * we need to add UINT32_MAX X times to Y.
956 * Each adding of UINT32_MAX decrements Y by 1.
959 tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
960 tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
961 item.type = RTE_FLOW_ITEM_TYPE_TCP;
963 item.mask = &tcp_mask;
964 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
965 MLX5_MODIFICATION_TYPE_ADD, error);
969 * Convert modify-header increment/decrement TCP Acknowledgment number
970 * to DV specification.
972 * @param[in,out] resource
973 * Pointer to the modify-header resource.
975 * Pointer to action specification.
977 * Pointer to the error structure.
980 * 0 on success, a negative errno value otherwise and rte_errno is set.
983 flow_dv_convert_action_modify_tcp_ack
984 (struct mlx5_flow_dv_modify_hdr_resource *resource,
985 const struct rte_flow_action *action,
986 struct rte_flow_error *error)
988 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
989 uint64_t value = rte_be_to_cpu_32(*conf);
990 struct rte_flow_item item;
991 struct rte_flow_item_tcp tcp;
992 struct rte_flow_item_tcp tcp_mask;
994 memset(&tcp, 0, sizeof(tcp));
995 memset(&tcp_mask, 0, sizeof(tcp_mask));
996 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
998 * The HW has no decrement operation, only increment operation.
999 * To simulate decrement X from Y using increment operation
1000 * we need to add UINT32_MAX X times to Y.
1001 * Each adding of UINT32_MAX decrements Y by 1.
1003 value *= UINT32_MAX;
1004 tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
1005 tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
1006 item.type = RTE_FLOW_ITEM_TYPE_TCP;
1008 item.mask = &tcp_mask;
1009 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1010 MLX5_MODIFICATION_TYPE_ADD, error);
1013 static enum mlx5_modification_field reg_to_field[] = {
1014 [REG_NON] = MLX5_MODI_OUT_NONE,
1015 [REG_A] = MLX5_MODI_META_DATA_REG_A,
1016 [REG_B] = MLX5_MODI_META_DATA_REG_B,
1017 [REG_C_0] = MLX5_MODI_META_REG_C_0,
1018 [REG_C_1] = MLX5_MODI_META_REG_C_1,
1019 [REG_C_2] = MLX5_MODI_META_REG_C_2,
1020 [REG_C_3] = MLX5_MODI_META_REG_C_3,
1021 [REG_C_4] = MLX5_MODI_META_REG_C_4,
1022 [REG_C_5] = MLX5_MODI_META_REG_C_5,
1023 [REG_C_6] = MLX5_MODI_META_REG_C_6,
1024 [REG_C_7] = MLX5_MODI_META_REG_C_7,
1028 * Convert register set to DV specification.
1030 * @param[in,out] resource
1031 * Pointer to the modify-header resource.
1033 * Pointer to action specification.
1035 * Pointer to the error structure.
1038 * 0 on success, a negative errno value otherwise and rte_errno is set.
1041 flow_dv_convert_action_set_reg
1042 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1043 const struct rte_flow_action *action,
1044 struct rte_flow_error *error)
1046 const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1047 struct mlx5_modification_cmd *actions = resource->actions;
1048 uint32_t i = resource->actions_num;
1050 if (i >= MLX5_MAX_MODIFY_NUM)
1051 return rte_flow_error_set(error, EINVAL,
1052 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1053 "too many items to modify");
1054 MLX5_ASSERT(conf->id != REG_NON);
1055 MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1056 actions[i] = (struct mlx5_modification_cmd) {
1057 .action_type = MLX5_MODIFICATION_TYPE_SET,
1058 .field = reg_to_field[conf->id],
1059 .offset = conf->offset,
1060 .length = conf->length,
1062 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1063 actions[i].data1 = rte_cpu_to_be_32(conf->data);
1065 resource->actions_num = i;
1070 * Convert SET_TAG action to DV specification.
1073 * Pointer to the rte_eth_dev structure.
1074 * @param[in,out] resource
1075 * Pointer to the modify-header resource.
1077 * Pointer to action specification.
1079 * Pointer to the error structure.
1082 * 0 on success, a negative errno value otherwise and rte_errno is set.
1085 flow_dv_convert_action_set_tag
1086 (struct rte_eth_dev *dev,
1087 struct mlx5_flow_dv_modify_hdr_resource *resource,
1088 const struct rte_flow_action_set_tag *conf,
1089 struct rte_flow_error *error)
1091 rte_be32_t data = rte_cpu_to_be_32(conf->data);
1092 rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1093 struct rte_flow_item item = {
1097 struct field_modify_info reg_c_x[] = {
1100 enum mlx5_modification_field reg_type;
1103 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1106 MLX5_ASSERT(ret != REG_NON);
1107 MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1108 reg_type = reg_to_field[ret];
1109 MLX5_ASSERT(reg_type > 0);
1110 reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1111 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1112 MLX5_MODIFICATION_TYPE_SET, error);
1116 * Convert internal COPY_REG action to DV specification.
1119 * Pointer to the rte_eth_dev structure.
1120 * @param[in,out] res
1121 * Pointer to the modify-header resource.
1123 * Pointer to action specification.
1125 * Pointer to the error structure.
1128 * 0 on success, a negative errno value otherwise and rte_errno is set.
1131 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1132 struct mlx5_flow_dv_modify_hdr_resource *res,
1133 const struct rte_flow_action *action,
1134 struct rte_flow_error *error)
1136 const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1137 rte_be32_t mask = RTE_BE32(UINT32_MAX);
1138 struct rte_flow_item item = {
1142 struct field_modify_info reg_src[] = {
1143 {4, 0, reg_to_field[conf->src]},
1146 struct field_modify_info reg_dst = {
1148 .id = reg_to_field[conf->dst],
1150 /* Adjust reg_c[0] usage according to reported mask. */
1151 if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1152 struct mlx5_priv *priv = dev->data->dev_private;
1153 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1155 MLX5_ASSERT(reg_c0);
1156 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1157 if (conf->dst == REG_C_0) {
1158 /* Copy to reg_c[0], within mask only. */
1159 reg_dst.offset = rte_bsf32(reg_c0);
1160 mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1163 mask = rte_cpu_to_be_32(reg_c0);
1166 return flow_dv_convert_modify_action(&item,
1167 reg_src, ®_dst, res,
1168 MLX5_MODIFICATION_TYPE_COPY,
1173 * Convert MARK action to DV specification. This routine is used
1174 * in extensive metadata only and requires metadata register to be
1175 * handled. In legacy mode hardware tag resource is engaged.
1178 * Pointer to the rte_eth_dev structure.
1180 * Pointer to MARK action specification.
1181 * @param[in,out] resource
1182 * Pointer to the modify-header resource.
1184 * Pointer to the error structure.
1187 * 0 on success, a negative errno value otherwise and rte_errno is set.
1190 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1191 const struct rte_flow_action_mark *conf,
1192 struct mlx5_flow_dv_modify_hdr_resource *resource,
1193 struct rte_flow_error *error)
1195 struct mlx5_priv *priv = dev->data->dev_private;
1196 rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1197 priv->sh->dv_mark_mask);
1198 rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1199 struct rte_flow_item item = {
1203 struct field_modify_info reg_c_x[] = {
1209 return rte_flow_error_set(error, EINVAL,
1210 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1211 NULL, "zero mark action mask");
1212 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1215 MLX5_ASSERT(reg > 0);
1216 if (reg == REG_C_0) {
1217 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1218 uint32_t shl_c0 = rte_bsf32(msk_c0);
1220 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1221 mask = rte_cpu_to_be_32(mask) & msk_c0;
1222 mask = rte_cpu_to_be_32(mask << shl_c0);
1224 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1225 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1226 MLX5_MODIFICATION_TYPE_SET, error);
1230 * Get metadata register index for specified steering domain.
1233 * Pointer to the rte_eth_dev structure.
1235 * Attributes of flow to determine steering domain.
1237 * Pointer to the error structure.
1240 * positive index on success, a negative errno value otherwise
1241 * and rte_errno is set.
1243 static enum modify_reg
1244 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1245 const struct rte_flow_attr *attr,
1246 struct rte_flow_error *error)
1249 mlx5_flow_get_reg_id(dev, attr->transfer ?
1253 MLX5_METADATA_RX, 0, error);
1255 return rte_flow_error_set(error,
1256 ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1257 NULL, "unavailable "
1258 "metadata register");
1263 * Convert SET_META action to DV specification.
1266 * Pointer to the rte_eth_dev structure.
1267 * @param[in,out] resource
1268 * Pointer to the modify-header resource.
1270 * Attributes of flow that includes this item.
1272 * Pointer to action specification.
1274 * Pointer to the error structure.
1277 * 0 on success, a negative errno value otherwise and rte_errno is set.
1280 flow_dv_convert_action_set_meta
1281 (struct rte_eth_dev *dev,
1282 struct mlx5_flow_dv_modify_hdr_resource *resource,
1283 const struct rte_flow_attr *attr,
1284 const struct rte_flow_action_set_meta *conf,
1285 struct rte_flow_error *error)
1287 uint32_t mask = rte_cpu_to_be_32(conf->mask);
1288 uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1289 struct rte_flow_item item = {
1293 struct field_modify_info reg_c_x[] = {
1296 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1300 MLX5_ASSERT(reg != REG_NON);
1301 if (reg == REG_C_0) {
1302 struct mlx5_priv *priv = dev->data->dev_private;
1303 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1304 uint32_t shl_c0 = rte_bsf32(msk_c0);
1306 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1307 mask = rte_cpu_to_be_32(mask) & msk_c0;
1308 mask = rte_cpu_to_be_32(mask << shl_c0);
1310 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1311 /* The routine expects parameters in memory as big-endian ones. */
1312 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1313 MLX5_MODIFICATION_TYPE_SET, error);
1317 * Convert modify-header set IPv4 DSCP action to DV specification.
1319 * @param[in,out] resource
1320 * Pointer to the modify-header resource.
1322 * Pointer to action specification.
1324 * Pointer to the error structure.
1327 * 0 on success, a negative errno value otherwise and rte_errno is set.
1330 flow_dv_convert_action_modify_ipv4_dscp
1331 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1332 const struct rte_flow_action *action,
1333 struct rte_flow_error *error)
1335 const struct rte_flow_action_set_dscp *conf =
1336 (const struct rte_flow_action_set_dscp *)(action->conf);
1337 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1338 struct rte_flow_item_ipv4 ipv4;
1339 struct rte_flow_item_ipv4 ipv4_mask;
1341 memset(&ipv4, 0, sizeof(ipv4));
1342 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1343 ipv4.hdr.type_of_service = conf->dscp;
1344 ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1346 item.mask = &ipv4_mask;
1347 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1348 MLX5_MODIFICATION_TYPE_SET, error);
1352 * Convert modify-header set IPv6 DSCP action to DV specification.
1354 * @param[in,out] resource
1355 * Pointer to the modify-header resource.
1357 * Pointer to action specification.
1359 * Pointer to the error structure.
1362 * 0 on success, a negative errno value otherwise and rte_errno is set.
1365 flow_dv_convert_action_modify_ipv6_dscp
1366 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1367 const struct rte_flow_action *action,
1368 struct rte_flow_error *error)
1370 const struct rte_flow_action_set_dscp *conf =
1371 (const struct rte_flow_action_set_dscp *)(action->conf);
1372 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1373 struct rte_flow_item_ipv6 ipv6;
1374 struct rte_flow_item_ipv6 ipv6_mask;
1376 memset(&ipv6, 0, sizeof(ipv6));
1377 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1379 * Even though the DSCP bits offset of IPv6 is not byte aligned,
1380 * rdma-core only accept the DSCP bits byte aligned start from
1381 * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1382 * bits in IPv6 case as rdma-core requires byte aligned value.
1384 ipv6.hdr.vtc_flow = conf->dscp;
1385 ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1387 item.mask = &ipv6_mask;
1388 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1389 MLX5_MODIFICATION_TYPE_SET, error);
1393 mlx5_flow_item_field_width(struct mlx5_priv *priv,
1394 enum rte_flow_field_id field)
1397 case RTE_FLOW_FIELD_START:
1399 case RTE_FLOW_FIELD_MAC_DST:
1400 case RTE_FLOW_FIELD_MAC_SRC:
1402 case RTE_FLOW_FIELD_VLAN_TYPE:
1404 case RTE_FLOW_FIELD_VLAN_ID:
1406 case RTE_FLOW_FIELD_MAC_TYPE:
1408 case RTE_FLOW_FIELD_IPV4_DSCP:
1410 case RTE_FLOW_FIELD_IPV4_TTL:
1412 case RTE_FLOW_FIELD_IPV4_SRC:
1413 case RTE_FLOW_FIELD_IPV4_DST:
1415 case RTE_FLOW_FIELD_IPV6_DSCP:
1417 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1419 case RTE_FLOW_FIELD_IPV6_SRC:
1420 case RTE_FLOW_FIELD_IPV6_DST:
1422 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1423 case RTE_FLOW_FIELD_TCP_PORT_DST:
1425 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1426 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1428 case RTE_FLOW_FIELD_TCP_FLAGS:
1430 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1431 case RTE_FLOW_FIELD_UDP_PORT_DST:
1433 case RTE_FLOW_FIELD_VXLAN_VNI:
1434 case RTE_FLOW_FIELD_GENEVE_VNI:
1436 case RTE_FLOW_FIELD_GTP_TEID:
1437 case RTE_FLOW_FIELD_TAG:
1439 case RTE_FLOW_FIELD_MARK:
1440 return __builtin_popcount(priv->sh->dv_mark_mask);
1441 case RTE_FLOW_FIELD_META:
1442 return __builtin_popcount(priv->sh->dv_meta_mask);
1443 case RTE_FLOW_FIELD_POINTER:
1444 case RTE_FLOW_FIELD_VALUE:
1453 mlx5_flow_field_id_to_modify_info
1454 (const struct rte_flow_action_modify_data *data,
1455 struct field_modify_info *info,
1456 uint32_t *mask, uint32_t *value,
1457 uint32_t width, uint32_t dst_width,
1458 uint32_t *shift, struct rte_eth_dev *dev,
1459 const struct rte_flow_attr *attr,
1460 struct rte_flow_error *error)
1462 struct mlx5_priv *priv = dev->data->dev_private;
1466 switch (data->field) {
1467 case RTE_FLOW_FIELD_START:
1468 /* not supported yet */
1471 case RTE_FLOW_FIELD_MAC_DST:
1472 off = data->offset > 16 ? data->offset - 16 : 0;
1474 if (data->offset < 16) {
1475 info[idx] = (struct field_modify_info){2, 0,
1476 MLX5_MODI_OUT_DMAC_15_0};
1478 mask[idx] = rte_cpu_to_be_16(0xffff >>
1482 mask[idx] = RTE_BE16(0xffff);
1489 info[idx] = (struct field_modify_info){4, 4 * idx,
1490 MLX5_MODI_OUT_DMAC_47_16};
1491 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1492 (32 - width)) << off);
1494 if (data->offset < 16)
1495 info[idx++] = (struct field_modify_info){2, 0,
1496 MLX5_MODI_OUT_DMAC_15_0};
1497 info[idx] = (struct field_modify_info){4, off,
1498 MLX5_MODI_OUT_DMAC_47_16};
1501 case RTE_FLOW_FIELD_MAC_SRC:
1502 off = data->offset > 16 ? data->offset - 16 : 0;
1504 if (data->offset < 16) {
1505 info[idx] = (struct field_modify_info){2, 0,
1506 MLX5_MODI_OUT_SMAC_15_0};
1508 mask[idx] = rte_cpu_to_be_16(0xffff >>
1512 mask[idx] = RTE_BE16(0xffff);
1519 info[idx] = (struct field_modify_info){4, 4 * idx,
1520 MLX5_MODI_OUT_SMAC_47_16};
1521 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1522 (32 - width)) << off);
1524 if (data->offset < 16)
1525 info[idx++] = (struct field_modify_info){2, 0,
1526 MLX5_MODI_OUT_SMAC_15_0};
1527 info[idx] = (struct field_modify_info){4, off,
1528 MLX5_MODI_OUT_SMAC_47_16};
1531 case RTE_FLOW_FIELD_VLAN_TYPE:
1532 /* not supported yet */
1534 case RTE_FLOW_FIELD_VLAN_ID:
1535 info[idx] = (struct field_modify_info){2, 0,
1536 MLX5_MODI_OUT_FIRST_VID};
1538 mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1540 case RTE_FLOW_FIELD_MAC_TYPE:
1541 info[idx] = (struct field_modify_info){2, 0,
1542 MLX5_MODI_OUT_ETHERTYPE};
1544 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1546 case RTE_FLOW_FIELD_IPV4_DSCP:
1547 info[idx] = (struct field_modify_info){1, 0,
1548 MLX5_MODI_OUT_IP_DSCP};
1550 mask[idx] = 0x3f >> (6 - width);
1552 case RTE_FLOW_FIELD_IPV4_TTL:
1553 info[idx] = (struct field_modify_info){1, 0,
1554 MLX5_MODI_OUT_IPV4_TTL};
1556 mask[idx] = 0xff >> (8 - width);
1558 case RTE_FLOW_FIELD_IPV4_SRC:
1559 info[idx] = (struct field_modify_info){4, 0,
1560 MLX5_MODI_OUT_SIPV4};
1562 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1565 case RTE_FLOW_FIELD_IPV4_DST:
1566 info[idx] = (struct field_modify_info){4, 0,
1567 MLX5_MODI_OUT_DIPV4};
1569 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1572 case RTE_FLOW_FIELD_IPV6_DSCP:
1573 info[idx] = (struct field_modify_info){1, 0,
1574 MLX5_MODI_OUT_IP_DSCP};
1576 mask[idx] = 0x3f >> (6 - width);
1578 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1579 info[idx] = (struct field_modify_info){1, 0,
1580 MLX5_MODI_OUT_IPV6_HOPLIMIT};
1582 mask[idx] = 0xff >> (8 - width);
1584 case RTE_FLOW_FIELD_IPV6_SRC:
1586 if (data->offset < 32) {
1587 info[idx] = (struct field_modify_info){4,
1589 MLX5_MODI_OUT_SIPV6_31_0};
1592 rte_cpu_to_be_32(0xffffffff >>
1596 mask[idx] = RTE_BE32(0xffffffff);
1603 if (data->offset < 64) {
1604 info[idx] = (struct field_modify_info){4,
1606 MLX5_MODI_OUT_SIPV6_63_32};
1609 rte_cpu_to_be_32(0xffffffff >>
1613 mask[idx] = RTE_BE32(0xffffffff);
1620 if (data->offset < 96) {
1621 info[idx] = (struct field_modify_info){4,
1623 MLX5_MODI_OUT_SIPV6_95_64};
1626 rte_cpu_to_be_32(0xffffffff >>
1630 mask[idx] = RTE_BE32(0xffffffff);
1637 info[idx] = (struct field_modify_info){4, 4 * idx,
1638 MLX5_MODI_OUT_SIPV6_127_96};
1639 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1642 if (data->offset < 32)
1643 info[idx++] = (struct field_modify_info){4, 0,
1644 MLX5_MODI_OUT_SIPV6_31_0};
1645 if (data->offset < 64)
1646 info[idx++] = (struct field_modify_info){4, 0,
1647 MLX5_MODI_OUT_SIPV6_63_32};
1648 if (data->offset < 96)
1649 info[idx++] = (struct field_modify_info){4, 0,
1650 MLX5_MODI_OUT_SIPV6_95_64};
1651 if (data->offset < 128)
1652 info[idx++] = (struct field_modify_info){4, 0,
1653 MLX5_MODI_OUT_SIPV6_127_96};
1656 case RTE_FLOW_FIELD_IPV6_DST:
1658 if (data->offset < 32) {
1659 info[idx] = (struct field_modify_info){4,
1661 MLX5_MODI_OUT_DIPV6_31_0};
1664 rte_cpu_to_be_32(0xffffffff >>
1668 mask[idx] = RTE_BE32(0xffffffff);
1675 if (data->offset < 64) {
1676 info[idx] = (struct field_modify_info){4,
1678 MLX5_MODI_OUT_DIPV6_63_32};
1681 rte_cpu_to_be_32(0xffffffff >>
1685 mask[idx] = RTE_BE32(0xffffffff);
1692 if (data->offset < 96) {
1693 info[idx] = (struct field_modify_info){4,
1695 MLX5_MODI_OUT_DIPV6_95_64};
1698 rte_cpu_to_be_32(0xffffffff >>
1702 mask[idx] = RTE_BE32(0xffffffff);
1709 info[idx] = (struct field_modify_info){4, 4 * idx,
1710 MLX5_MODI_OUT_DIPV6_127_96};
1711 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1714 if (data->offset < 32)
1715 info[idx++] = (struct field_modify_info){4, 0,
1716 MLX5_MODI_OUT_DIPV6_31_0};
1717 if (data->offset < 64)
1718 info[idx++] = (struct field_modify_info){4, 0,
1719 MLX5_MODI_OUT_DIPV6_63_32};
1720 if (data->offset < 96)
1721 info[idx++] = (struct field_modify_info){4, 0,
1722 MLX5_MODI_OUT_DIPV6_95_64};
1723 if (data->offset < 128)
1724 info[idx++] = (struct field_modify_info){4, 0,
1725 MLX5_MODI_OUT_DIPV6_127_96};
1728 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1729 info[idx] = (struct field_modify_info){2, 0,
1730 MLX5_MODI_OUT_TCP_SPORT};
1732 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1734 case RTE_FLOW_FIELD_TCP_PORT_DST:
1735 info[idx] = (struct field_modify_info){2, 0,
1736 MLX5_MODI_OUT_TCP_DPORT};
1738 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1740 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1741 info[idx] = (struct field_modify_info){4, 0,
1742 MLX5_MODI_OUT_TCP_SEQ_NUM};
1744 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1747 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1748 info[idx] = (struct field_modify_info){4, 0,
1749 MLX5_MODI_OUT_TCP_ACK_NUM};
1751 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1754 case RTE_FLOW_FIELD_TCP_FLAGS:
1755 info[idx] = (struct field_modify_info){2, 0,
1756 MLX5_MODI_OUT_TCP_FLAGS};
1758 mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1760 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1761 info[idx] = (struct field_modify_info){2, 0,
1762 MLX5_MODI_OUT_UDP_SPORT};
1764 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1766 case RTE_FLOW_FIELD_UDP_PORT_DST:
1767 info[idx] = (struct field_modify_info){2, 0,
1768 MLX5_MODI_OUT_UDP_DPORT};
1770 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1772 case RTE_FLOW_FIELD_VXLAN_VNI:
1773 /* not supported yet */
1775 case RTE_FLOW_FIELD_GENEVE_VNI:
1776 /* not supported yet*/
1778 case RTE_FLOW_FIELD_GTP_TEID:
1779 info[idx] = (struct field_modify_info){4, 0,
1780 MLX5_MODI_GTP_TEID};
1782 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1785 case RTE_FLOW_FIELD_TAG:
1787 int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1788 data->level, error);
1791 MLX5_ASSERT(reg != REG_NON);
1792 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1793 info[idx] = (struct field_modify_info){4, 0,
1797 rte_cpu_to_be_32(0xffffffff >>
1801 case RTE_FLOW_FIELD_MARK:
1803 uint32_t mark_mask = priv->sh->dv_mark_mask;
1804 uint32_t mark_count = __builtin_popcount(mark_mask);
1805 int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1809 MLX5_ASSERT(reg != REG_NON);
1810 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1811 info[idx] = (struct field_modify_info){4, 0,
1814 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1815 (mark_count - width)) & mark_mask);
1818 case RTE_FLOW_FIELD_META:
1820 uint32_t meta_mask = priv->sh->dv_meta_mask;
1821 uint32_t meta_count = __builtin_popcount(meta_mask);
1823 rte_cpu_to_be_32(priv->sh->dv_regc0_mask);
1824 uint32_t shl_c0 = rte_bsf32(msk_c0);
1825 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1828 MLX5_ASSERT(reg != REG_NON);
1829 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1832 info[idx] = (struct field_modify_info){4, 0,
1835 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1836 (meta_count - width)) & meta_mask);
1839 case RTE_FLOW_FIELD_POINTER:
1840 case RTE_FLOW_FIELD_VALUE:
1841 if (data->field == RTE_FLOW_FIELD_POINTER)
1842 memcpy(&val, (void *)(uintptr_t)data->value,
1846 for (idx = 0; idx < MLX5_ACT_MAX_MOD_FIELDS; idx++) {
1848 if (dst_width == 48) {
1849 /*special case for MAC addresses */
1850 value[idx] = rte_cpu_to_be_16(val);
1853 } else if (dst_width > 16) {
1854 value[idx] = rte_cpu_to_be_32(val);
1856 } else if (dst_width > 8) {
1857 value[idx] = rte_cpu_to_be_16(val);
1860 value[idx] = (uint8_t)val;
1864 value[idx] <<= *shift;
1877 * Convert modify_field action to DV specification.
1880 * Pointer to the rte_eth_dev structure.
1881 * @param[in,out] resource
1882 * Pointer to the modify-header resource.
1884 * Pointer to action specification.
1886 * Attributes of flow that includes this item.
1888 * Pointer to the error structure.
1891 * 0 on success, a negative errno value otherwise and rte_errno is set.
1894 flow_dv_convert_action_modify_field
1895 (struct rte_eth_dev *dev,
1896 struct mlx5_flow_dv_modify_hdr_resource *resource,
1897 const struct rte_flow_action *action,
1898 const struct rte_flow_attr *attr,
1899 struct rte_flow_error *error)
1901 struct mlx5_priv *priv = dev->data->dev_private;
1902 const struct rte_flow_action_modify_field *conf =
1903 (const struct rte_flow_action_modify_field *)(action->conf);
1904 struct rte_flow_item item;
1905 struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1907 struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1909 uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1910 uint32_t value[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1913 uint32_t dst_width = mlx5_flow_item_field_width(priv, conf->dst.field);
1915 if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1916 conf->src.field == RTE_FLOW_FIELD_VALUE) {
1917 type = MLX5_MODIFICATION_TYPE_SET;
1918 /** For SET fill the destination field (field) first. */
1919 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1920 value, conf->width, dst_width,
1921 &shift, dev, attr, error);
1922 /** Then copy immediate value from source as per mask. */
1923 mlx5_flow_field_id_to_modify_info(&conf->src, dcopy, mask,
1924 value, conf->width, dst_width,
1925 &shift, dev, attr, error);
1928 type = MLX5_MODIFICATION_TYPE_COPY;
1929 /** For COPY fill the destination field (dcopy) without mask. */
1930 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1931 value, conf->width, dst_width,
1932 &shift, dev, attr, error);
1933 /** Then construct the source field (field) with mask. */
1934 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1935 value, conf->width, dst_width,
1936 &shift, dev, attr, error);
1939 return flow_dv_convert_modify_action(&item,
1940 field, dcopy, resource, type, error);
1944 * Validate MARK item.
1947 * Pointer to the rte_eth_dev structure.
1949 * Item specification.
1951 * Attributes of flow that includes this item.
1953 * Pointer to error structure.
1956 * 0 on success, a negative errno value otherwise and rte_errno is set.
1959 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1960 const struct rte_flow_item *item,
1961 const struct rte_flow_attr *attr __rte_unused,
1962 struct rte_flow_error *error)
1964 struct mlx5_priv *priv = dev->data->dev_private;
1965 struct mlx5_dev_config *config = &priv->config;
1966 const struct rte_flow_item_mark *spec = item->spec;
1967 const struct rte_flow_item_mark *mask = item->mask;
1968 const struct rte_flow_item_mark nic_mask = {
1969 .id = priv->sh->dv_mark_mask,
1973 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1974 return rte_flow_error_set(error, ENOTSUP,
1975 RTE_FLOW_ERROR_TYPE_ITEM, item,
1976 "extended metadata feature"
1978 if (!mlx5_flow_ext_mreg_supported(dev))
1979 return rte_flow_error_set(error, ENOTSUP,
1980 RTE_FLOW_ERROR_TYPE_ITEM, item,
1981 "extended metadata register"
1982 " isn't supported");
1984 return rte_flow_error_set(error, ENOTSUP,
1985 RTE_FLOW_ERROR_TYPE_ITEM, item,
1986 "extended metadata register"
1987 " isn't available");
1988 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1992 return rte_flow_error_set(error, EINVAL,
1993 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1995 "data cannot be empty");
1996 if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1997 return rte_flow_error_set(error, EINVAL,
1998 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2000 "mark id exceeds the limit");
2004 return rte_flow_error_set(error, EINVAL,
2005 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2006 "mask cannot be zero");
2008 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2009 (const uint8_t *)&nic_mask,
2010 sizeof(struct rte_flow_item_mark),
2011 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2018 * Validate META item.
2021 * Pointer to the rte_eth_dev structure.
2023 * Item specification.
2025 * Attributes of flow that includes this item.
2027 * Pointer to error structure.
2030 * 0 on success, a negative errno value otherwise and rte_errno is set.
2033 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
2034 const struct rte_flow_item *item,
2035 const struct rte_flow_attr *attr,
2036 struct rte_flow_error *error)
2038 struct mlx5_priv *priv = dev->data->dev_private;
2039 struct mlx5_dev_config *config = &priv->config;
2040 const struct rte_flow_item_meta *spec = item->spec;
2041 const struct rte_flow_item_meta *mask = item->mask;
2042 struct rte_flow_item_meta nic_mask = {
2049 return rte_flow_error_set(error, EINVAL,
2050 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2052 "data cannot be empty");
2053 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2054 if (!mlx5_flow_ext_mreg_supported(dev))
2055 return rte_flow_error_set(error, ENOTSUP,
2056 RTE_FLOW_ERROR_TYPE_ITEM, item,
2057 "extended metadata register"
2058 " isn't supported");
2059 reg = flow_dv_get_metadata_reg(dev, attr, error);
2063 return rte_flow_error_set(error, ENOTSUP,
2064 RTE_FLOW_ERROR_TYPE_ITEM, item,
2065 "unavalable extended metadata register");
2067 return rte_flow_error_set(error, ENOTSUP,
2068 RTE_FLOW_ERROR_TYPE_ITEM, item,
2072 nic_mask.data = priv->sh->dv_meta_mask;
2075 return rte_flow_error_set(error, ENOTSUP,
2076 RTE_FLOW_ERROR_TYPE_ITEM, item,
2077 "extended metadata feature "
2078 "should be enabled when "
2079 "meta item is requested "
2080 "with e-switch mode ");
2082 return rte_flow_error_set(error, ENOTSUP,
2083 RTE_FLOW_ERROR_TYPE_ITEM, item,
2084 "match on metadata for ingress "
2085 "is not supported in legacy "
2089 mask = &rte_flow_item_meta_mask;
2091 return rte_flow_error_set(error, EINVAL,
2092 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2093 "mask cannot be zero");
2095 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2096 (const uint8_t *)&nic_mask,
2097 sizeof(struct rte_flow_item_meta),
2098 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2103 * Validate TAG item.
2106 * Pointer to the rte_eth_dev structure.
2108 * Item specification.
2110 * Attributes of flow that includes this item.
2112 * Pointer to error structure.
2115 * 0 on success, a negative errno value otherwise and rte_errno is set.
2118 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2119 const struct rte_flow_item *item,
2120 const struct rte_flow_attr *attr __rte_unused,
2121 struct rte_flow_error *error)
2123 const struct rte_flow_item_tag *spec = item->spec;
2124 const struct rte_flow_item_tag *mask = item->mask;
2125 const struct rte_flow_item_tag nic_mask = {
2126 .data = RTE_BE32(UINT32_MAX),
2131 if (!mlx5_flow_ext_mreg_supported(dev))
2132 return rte_flow_error_set(error, ENOTSUP,
2133 RTE_FLOW_ERROR_TYPE_ITEM, item,
2134 "extensive metadata register"
2135 " isn't supported");
2137 return rte_flow_error_set(error, EINVAL,
2138 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2140 "data cannot be empty");
2142 mask = &rte_flow_item_tag_mask;
2144 return rte_flow_error_set(error, EINVAL,
2145 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2146 "mask cannot be zero");
2148 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2149 (const uint8_t *)&nic_mask,
2150 sizeof(struct rte_flow_item_tag),
2151 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2154 if (mask->index != 0xff)
2155 return rte_flow_error_set(error, EINVAL,
2156 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2157 "partial mask for tag index"
2158 " is not supported");
2159 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2162 MLX5_ASSERT(ret != REG_NON);
2167 * Validate vport item.
2170 * Pointer to the rte_eth_dev structure.
2172 * Item specification.
2174 * Attributes of flow that includes this item.
2175 * @param[in] item_flags
2176 * Bit-fields that holds the items detected until now.
2178 * Pointer to error structure.
2181 * 0 on success, a negative errno value otherwise and rte_errno is set.
2184 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2185 const struct rte_flow_item *item,
2186 const struct rte_flow_attr *attr,
2187 uint64_t item_flags,
2188 struct rte_flow_error *error)
2190 const struct rte_flow_item_port_id *spec = item->spec;
2191 const struct rte_flow_item_port_id *mask = item->mask;
2192 const struct rte_flow_item_port_id switch_mask = {
2195 struct mlx5_priv *esw_priv;
2196 struct mlx5_priv *dev_priv;
2199 if (!attr->transfer)
2200 return rte_flow_error_set(error, EINVAL,
2201 RTE_FLOW_ERROR_TYPE_ITEM,
2203 "match on port id is valid only"
2204 " when transfer flag is enabled");
2205 if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2206 return rte_flow_error_set(error, ENOTSUP,
2207 RTE_FLOW_ERROR_TYPE_ITEM, item,
2208 "multiple source ports are not"
2211 mask = &switch_mask;
2212 if (mask->id != 0xffffffff)
2213 return rte_flow_error_set(error, ENOTSUP,
2214 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2216 "no support for partial mask on"
2218 ret = mlx5_flow_item_acceptable
2219 (item, (const uint8_t *)mask,
2220 (const uint8_t *)&rte_flow_item_port_id_mask,
2221 sizeof(struct rte_flow_item_port_id),
2222 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2227 esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2229 return rte_flow_error_set(error, rte_errno,
2230 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2231 "failed to obtain E-Switch info for"
2233 dev_priv = mlx5_dev_to_eswitch_info(dev);
2235 return rte_flow_error_set(error, rte_errno,
2236 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2238 "failed to obtain E-Switch info");
2239 if (esw_priv->domain_id != dev_priv->domain_id)
2240 return rte_flow_error_set(error, EINVAL,
2241 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2242 "cannot match on a port from a"
2243 " different E-Switch");
2248 * Validate VLAN item.
2251 * Item specification.
2252 * @param[in] item_flags
2253 * Bit-fields that holds the items detected until now.
2255 * Ethernet device flow is being created on.
2257 * Pointer to error structure.
2260 * 0 on success, a negative errno value otherwise and rte_errno is set.
2263 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2264 uint64_t item_flags,
2265 struct rte_eth_dev *dev,
2266 struct rte_flow_error *error)
2268 const struct rte_flow_item_vlan *mask = item->mask;
2269 const struct rte_flow_item_vlan nic_mask = {
2270 .tci = RTE_BE16(UINT16_MAX),
2271 .inner_type = RTE_BE16(UINT16_MAX),
2274 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2276 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2277 MLX5_FLOW_LAYER_INNER_L4) :
2278 (MLX5_FLOW_LAYER_OUTER_L3 |
2279 MLX5_FLOW_LAYER_OUTER_L4);
2280 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2281 MLX5_FLOW_LAYER_OUTER_VLAN;
2283 if (item_flags & vlanm)
2284 return rte_flow_error_set(error, EINVAL,
2285 RTE_FLOW_ERROR_TYPE_ITEM, item,
2286 "multiple VLAN layers not supported");
2287 else if ((item_flags & l34m) != 0)
2288 return rte_flow_error_set(error, EINVAL,
2289 RTE_FLOW_ERROR_TYPE_ITEM, item,
2290 "VLAN cannot follow L3/L4 layer");
2292 mask = &rte_flow_item_vlan_mask;
2293 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2294 (const uint8_t *)&nic_mask,
2295 sizeof(struct rte_flow_item_vlan),
2296 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2299 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2300 struct mlx5_priv *priv = dev->data->dev_private;
2302 if (priv->vmwa_context) {
2304 * Non-NULL context means we have a virtual machine
2305 * and SR-IOV enabled, we have to create VLAN interface
2306 * to make hypervisor to setup E-Switch vport
2307 * context correctly. We avoid creating the multiple
2308 * VLAN interfaces, so we cannot support VLAN tag mask.
2310 return rte_flow_error_set(error, EINVAL,
2311 RTE_FLOW_ERROR_TYPE_ITEM,
2313 "VLAN tag mask is not"
2314 " supported in virtual"
2322 * GTP flags are contained in 1 byte of the format:
2323 * -------------------------------------------
2324 * | bit | 0 - 2 | 3 | 4 | 5 | 6 | 7 |
2325 * |-----------------------------------------|
2326 * | value | Version | PT | Res | E | S | PN |
2327 * -------------------------------------------
2329 * Matching is supported only for GTP flags E, S, PN.
2331 #define MLX5_GTP_FLAGS_MASK 0x07
2334 * Validate GTP item.
2337 * Pointer to the rte_eth_dev structure.
2339 * Item specification.
2340 * @param[in] item_flags
2341 * Bit-fields that holds the items detected until now.
2343 * Pointer to error structure.
2346 * 0 on success, a negative errno value otherwise and rte_errno is set.
2349 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2350 const struct rte_flow_item *item,
2351 uint64_t item_flags,
2352 struct rte_flow_error *error)
2354 struct mlx5_priv *priv = dev->data->dev_private;
2355 const struct rte_flow_item_gtp *spec = item->spec;
2356 const struct rte_flow_item_gtp *mask = item->mask;
2357 const struct rte_flow_item_gtp nic_mask = {
2358 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2360 .teid = RTE_BE32(0xffffffff),
2363 if (!priv->config.hca_attr.tunnel_stateless_gtp)
2364 return rte_flow_error_set(error, ENOTSUP,
2365 RTE_FLOW_ERROR_TYPE_ITEM, item,
2366 "GTP support is not enabled");
2367 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2368 return rte_flow_error_set(error, ENOTSUP,
2369 RTE_FLOW_ERROR_TYPE_ITEM, item,
2370 "multiple tunnel layers not"
2372 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2373 return rte_flow_error_set(error, EINVAL,
2374 RTE_FLOW_ERROR_TYPE_ITEM, item,
2375 "no outer UDP layer found");
2377 mask = &rte_flow_item_gtp_mask;
2378 if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2379 return rte_flow_error_set(error, ENOTSUP,
2380 RTE_FLOW_ERROR_TYPE_ITEM, item,
2381 "Match is supported for GTP"
2383 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2384 (const uint8_t *)&nic_mask,
2385 sizeof(struct rte_flow_item_gtp),
2386 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2390 * Validate GTP PSC item.
2393 * Item specification.
2394 * @param[in] last_item
2395 * Previous validated item in the pattern items.
2396 * @param[in] gtp_item
2397 * Previous GTP item specification.
2399 * Pointer to flow attributes.
2401 * Pointer to error structure.
2404 * 0 on success, a negative errno value otherwise and rte_errno is set.
2407 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2409 const struct rte_flow_item *gtp_item,
2410 const struct rte_flow_attr *attr,
2411 struct rte_flow_error *error)
2413 const struct rte_flow_item_gtp *gtp_spec;
2414 const struct rte_flow_item_gtp *gtp_mask;
2415 const struct rte_flow_item_gtp_psc *spec;
2416 const struct rte_flow_item_gtp_psc *mask;
2417 const struct rte_flow_item_gtp_psc nic_mask = {
2422 if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2423 return rte_flow_error_set
2424 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2425 "GTP PSC item must be preceded with GTP item");
2426 gtp_spec = gtp_item->spec;
2427 gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2428 /* GTP spec and E flag is requested to match zero. */
2430 (gtp_mask->v_pt_rsv_flags &
2431 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2432 return rte_flow_error_set
2433 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2434 "GTP E flag must be 1 to match GTP PSC");
2435 /* Check the flow is not created in group zero. */
2436 if (!attr->transfer && !attr->group)
2437 return rte_flow_error_set
2438 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2439 "GTP PSC is not supported for group 0");
2440 /* GTP spec is here and E flag is requested to match zero. */
2444 mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2445 if (spec->pdu_type > MLX5_GTP_EXT_MAX_PDU_TYPE)
2446 return rte_flow_error_set
2447 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2448 "PDU type should be smaller than 16");
2449 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2450 (const uint8_t *)&nic_mask,
2451 sizeof(struct rte_flow_item_gtp_psc),
2452 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2456 * Validate IPV4 item.
2457 * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2458 * add specific validation of fragment_offset field,
2461 * Item specification.
2462 * @param[in] item_flags
2463 * Bit-fields that holds the items detected until now.
2465 * Pointer to error structure.
2468 * 0 on success, a negative errno value otherwise and rte_errno is set.
2471 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2472 const struct rte_flow_item *item,
2473 uint64_t item_flags, uint64_t last_item,
2474 uint16_t ether_type, struct rte_flow_error *error)
2477 struct mlx5_priv *priv = dev->data->dev_private;
2478 const struct rte_flow_item_ipv4 *spec = item->spec;
2479 const struct rte_flow_item_ipv4 *last = item->last;
2480 const struct rte_flow_item_ipv4 *mask = item->mask;
2481 rte_be16_t fragment_offset_spec = 0;
2482 rte_be16_t fragment_offset_last = 0;
2483 struct rte_flow_item_ipv4 nic_ipv4_mask = {
2485 .src_addr = RTE_BE32(0xffffffff),
2486 .dst_addr = RTE_BE32(0xffffffff),
2487 .type_of_service = 0xff,
2488 .fragment_offset = RTE_BE16(0xffff),
2489 .next_proto_id = 0xff,
2490 .time_to_live = 0xff,
2494 if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2495 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2496 bool ihl_cap = !tunnel ? priv->config.hca_attr.outer_ipv4_ihl :
2497 priv->config.hca_attr.inner_ipv4_ihl;
2499 return rte_flow_error_set(error, ENOTSUP,
2500 RTE_FLOW_ERROR_TYPE_ITEM,
2502 "IPV4 ihl offload not supported");
2503 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2505 ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2506 ether_type, &nic_ipv4_mask,
2507 MLX5_ITEM_RANGE_ACCEPTED, error);
2511 fragment_offset_spec = spec->hdr.fragment_offset &
2512 mask->hdr.fragment_offset;
2513 if (!fragment_offset_spec)
2516 * spec and mask are valid, enforce using full mask to make sure the
2517 * complete value is used correctly.
2519 if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2520 != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2521 return rte_flow_error_set(error, EINVAL,
2522 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2523 item, "must use full mask for"
2524 " fragment_offset");
2526 * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2527 * indicating this is 1st fragment of fragmented packet.
2528 * This is not yet supported in MLX5, return appropriate error message.
2530 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2531 return rte_flow_error_set(error, ENOTSUP,
2532 RTE_FLOW_ERROR_TYPE_ITEM, item,
2533 "match on first fragment not "
2535 if (fragment_offset_spec && !last)
2536 return rte_flow_error_set(error, ENOTSUP,
2537 RTE_FLOW_ERROR_TYPE_ITEM, item,
2538 "specified value not supported");
2539 /* spec and last are valid, validate the specified range. */
2540 fragment_offset_last = last->hdr.fragment_offset &
2541 mask->hdr.fragment_offset;
2543 * Match on fragment_offset spec 0x2001 and last 0x3fff
2544 * means MF is 1 and frag-offset is > 0.
2545 * This packet is fragment 2nd and onward, excluding last.
2546 * This is not yet supported in MLX5, return appropriate
2549 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2550 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2551 return rte_flow_error_set(error, ENOTSUP,
2552 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2553 last, "match on following "
2554 "fragments not supported");
2556 * Match on fragment_offset spec 0x0001 and last 0x1fff
2557 * means MF is 0 and frag-offset is > 0.
2558 * This packet is last fragment of fragmented packet.
2559 * This is not yet supported in MLX5, return appropriate
2562 if (fragment_offset_spec == RTE_BE16(1) &&
2563 fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2564 return rte_flow_error_set(error, ENOTSUP,
2565 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2566 last, "match on last "
2567 "fragment not supported");
2569 * Match on fragment_offset spec 0x0001 and last 0x3fff
2570 * means MF and/or frag-offset is not 0.
2571 * This is a fragmented packet.
2572 * Other range values are invalid and rejected.
2574 if (!(fragment_offset_spec == RTE_BE16(1) &&
2575 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2576 return rte_flow_error_set(error, ENOTSUP,
2577 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2578 "specified range not supported");
2583 * Validate IPV6 fragment extension item.
2586 * Item specification.
2587 * @param[in] item_flags
2588 * Bit-fields that holds the items detected until now.
2590 * Pointer to error structure.
2593 * 0 on success, a negative errno value otherwise and rte_errno is set.
2596 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2597 uint64_t item_flags,
2598 struct rte_flow_error *error)
2600 const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2601 const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2602 const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2603 rte_be16_t frag_data_spec = 0;
2604 rte_be16_t frag_data_last = 0;
2605 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2606 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2607 MLX5_FLOW_LAYER_OUTER_L4;
2609 struct rte_flow_item_ipv6_frag_ext nic_mask = {
2611 .next_header = 0xff,
2612 .frag_data = RTE_BE16(0xffff),
2616 if (item_flags & l4m)
2617 return rte_flow_error_set(error, EINVAL,
2618 RTE_FLOW_ERROR_TYPE_ITEM, item,
2619 "ipv6 fragment extension item cannot "
2621 if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2622 (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2623 return rte_flow_error_set(error, EINVAL,
2624 RTE_FLOW_ERROR_TYPE_ITEM, item,
2625 "ipv6 fragment extension item must "
2626 "follow ipv6 item");
2628 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2629 if (!frag_data_spec)
2632 * spec and mask are valid, enforce using full mask to make sure the
2633 * complete value is used correctly.
2635 if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2636 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2637 return rte_flow_error_set(error, EINVAL,
2638 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2639 item, "must use full mask for"
2642 * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2643 * This is 1st fragment of fragmented packet.
2645 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2646 return rte_flow_error_set(error, ENOTSUP,
2647 RTE_FLOW_ERROR_TYPE_ITEM, item,
2648 "match on first fragment not "
2650 if (frag_data_spec && !last)
2651 return rte_flow_error_set(error, EINVAL,
2652 RTE_FLOW_ERROR_TYPE_ITEM, item,
2653 "specified value not supported");
2654 ret = mlx5_flow_item_acceptable
2655 (item, (const uint8_t *)mask,
2656 (const uint8_t *)&nic_mask,
2657 sizeof(struct rte_flow_item_ipv6_frag_ext),
2658 MLX5_ITEM_RANGE_ACCEPTED, error);
2661 /* spec and last are valid, validate the specified range. */
2662 frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2664 * Match on frag_data spec 0x0009 and last 0xfff9
2665 * means M is 1 and frag-offset is > 0.
2666 * This packet is fragment 2nd and onward, excluding last.
2667 * This is not yet supported in MLX5, return appropriate
2670 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2671 RTE_IPV6_EHDR_MF_MASK) &&
2672 frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2673 return rte_flow_error_set(error, ENOTSUP,
2674 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2675 last, "match on following "
2676 "fragments not supported");
2678 * Match on frag_data spec 0x0008 and last 0xfff8
2679 * means M is 0 and frag-offset is > 0.
2680 * This packet is last fragment of fragmented packet.
2681 * This is not yet supported in MLX5, return appropriate
2684 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2685 frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2686 return rte_flow_error_set(error, ENOTSUP,
2687 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2688 last, "match on last "
2689 "fragment not supported");
2690 /* Other range values are invalid and rejected. */
2691 return rte_flow_error_set(error, EINVAL,
2692 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2693 "specified range not supported");
2697 * Validate ASO CT item.
2700 * Pointer to the rte_eth_dev structure.
2702 * Item specification.
2703 * @param[in] item_flags
2704 * Pointer to bit-fields that holds the items detected until now.
2706 * Pointer to error structure.
2709 * 0 on success, a negative errno value otherwise and rte_errno is set.
2712 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2713 const struct rte_flow_item *item,
2714 uint64_t *item_flags,
2715 struct rte_flow_error *error)
2717 const struct rte_flow_item_conntrack *spec = item->spec;
2718 const struct rte_flow_item_conntrack *mask = item->mask;
2722 if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2723 return rte_flow_error_set(error, EINVAL,
2724 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2725 "Only one CT is supported");
2727 mask = &rte_flow_item_conntrack_mask;
2728 flags = spec->flags & mask->flags;
2729 if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2730 ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2731 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2732 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2733 return rte_flow_error_set(error, EINVAL,
2734 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2735 "Conflict status bits");
2736 /* State change also needs to be considered. */
2737 *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2742 * Validate the pop VLAN action.
2745 * Pointer to the rte_eth_dev structure.
2746 * @param[in] action_flags
2747 * Holds the actions detected until now.
2749 * Pointer to the pop vlan action.
2750 * @param[in] item_flags
2751 * The items found in this flow rule.
2753 * Pointer to flow attributes.
2755 * Pointer to error structure.
2758 * 0 on success, a negative errno value otherwise and rte_errno is set.
2761 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2762 uint64_t action_flags,
2763 const struct rte_flow_action *action,
2764 uint64_t item_flags,
2765 const struct rte_flow_attr *attr,
2766 struct rte_flow_error *error)
2768 const struct mlx5_priv *priv = dev->data->dev_private;
2769 struct mlx5_dev_ctx_shared *sh = priv->sh;
2770 bool direction_error = false;
2772 if (!priv->sh->pop_vlan_action)
2773 return rte_flow_error_set(error, ENOTSUP,
2774 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2776 "pop vlan action is not supported");
2777 /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2778 if (attr->transfer) {
2779 bool fdb_tx = priv->representor_id != UINT16_MAX;
2780 bool is_cx5 = sh->steering_format_version ==
2781 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2783 if (fdb_tx && is_cx5)
2784 direction_error = true;
2785 } else if (attr->egress) {
2786 direction_error = true;
2788 if (direction_error)
2789 return rte_flow_error_set(error, ENOTSUP,
2790 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2792 "pop vlan action not supported for egress");
2793 if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2794 return rte_flow_error_set(error, ENOTSUP,
2795 RTE_FLOW_ERROR_TYPE_ACTION, action,
2796 "no support for multiple VLAN "
2798 /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2799 if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2800 !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2801 return rte_flow_error_set(error, ENOTSUP,
2802 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2804 "cannot pop vlan after decap without "
2805 "match on inner vlan in the flow");
2806 /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2807 if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2808 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2809 return rte_flow_error_set(error, ENOTSUP,
2810 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2812 "cannot pop vlan without a "
2813 "match on (outer) vlan in the flow");
2814 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2815 return rte_flow_error_set(error, EINVAL,
2816 RTE_FLOW_ERROR_TYPE_ACTION, action,
2817 "wrong action order, port_id should "
2818 "be after pop VLAN action");
2819 if (!attr->transfer && priv->representor)
2820 return rte_flow_error_set(error, ENOTSUP,
2821 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2822 "pop vlan action for VF representor "
2823 "not supported on NIC table");
2828 * Get VLAN default info from vlan match info.
2831 * the list of item specifications.
2833 * pointer VLAN info to fill to.
2836 * 0 on success, a negative errno value otherwise and rte_errno is set.
2839 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2840 struct rte_vlan_hdr *vlan)
2842 const struct rte_flow_item_vlan nic_mask = {
2843 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2844 MLX5DV_FLOW_VLAN_VID_MASK),
2845 .inner_type = RTE_BE16(0xffff),
2850 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2851 int type = items->type;
2853 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2854 type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2857 if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2858 const struct rte_flow_item_vlan *vlan_m = items->mask;
2859 const struct rte_flow_item_vlan *vlan_v = items->spec;
2861 /* If VLAN item in pattern doesn't contain data, return here. */
2866 /* Only full match values are accepted */
2867 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2868 MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2869 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2871 rte_be_to_cpu_16(vlan_v->tci &
2872 MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2874 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2875 MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2876 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2878 rte_be_to_cpu_16(vlan_v->tci &
2879 MLX5DV_FLOW_VLAN_VID_MASK_BE);
2881 if (vlan_m->inner_type == nic_mask.inner_type)
2882 vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2883 vlan_m->inner_type);
2888 * Validate the push VLAN action.
2891 * Pointer to the rte_eth_dev structure.
2892 * @param[in] action_flags
2893 * Holds the actions detected until now.
2894 * @param[in] item_flags
2895 * The items found in this flow rule.
2897 * Pointer to the action structure.
2899 * Pointer to flow attributes
2901 * Pointer to error structure.
2904 * 0 on success, a negative errno value otherwise and rte_errno is set.
2907 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2908 uint64_t action_flags,
2909 const struct rte_flow_item_vlan *vlan_m,
2910 const struct rte_flow_action *action,
2911 const struct rte_flow_attr *attr,
2912 struct rte_flow_error *error)
2914 const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2915 const struct mlx5_priv *priv = dev->data->dev_private;
2916 struct mlx5_dev_ctx_shared *sh = priv->sh;
2917 bool direction_error = false;
2919 if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2920 push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2921 return rte_flow_error_set(error, EINVAL,
2922 RTE_FLOW_ERROR_TYPE_ACTION, action,
2923 "invalid vlan ethertype");
2924 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2925 return rte_flow_error_set(error, EINVAL,
2926 RTE_FLOW_ERROR_TYPE_ACTION, action,
2927 "wrong action order, port_id should "
2928 "be after push VLAN");
2929 /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2930 if (attr->transfer) {
2931 bool fdb_tx = priv->representor_id != UINT16_MAX;
2932 bool is_cx5 = sh->steering_format_version ==
2933 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2935 if (!fdb_tx && is_cx5)
2936 direction_error = true;
2937 } else if (attr->ingress) {
2938 direction_error = true;
2940 if (direction_error)
2941 return rte_flow_error_set(error, ENOTSUP,
2942 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2944 "push vlan action not supported for ingress");
2945 if (!attr->transfer && priv->representor)
2946 return rte_flow_error_set(error, ENOTSUP,
2947 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2948 "push vlan action for VF representor "
2949 "not supported on NIC table");
2951 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2952 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2953 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2954 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2955 !(mlx5_flow_find_action
2956 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2957 return rte_flow_error_set(error, EINVAL,
2958 RTE_FLOW_ERROR_TYPE_ACTION, action,
2959 "not full match mask on VLAN PCP and "
2960 "there is no of_set_vlan_pcp action, "
2961 "push VLAN action cannot figure out "
2964 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2965 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2966 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2967 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2968 !(mlx5_flow_find_action
2969 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2970 return rte_flow_error_set(error, EINVAL,
2971 RTE_FLOW_ERROR_TYPE_ACTION, action,
2972 "not full match mask on VLAN VID and "
2973 "there is no of_set_vlan_vid action, "
2974 "push VLAN action cannot figure out "
2981 * Validate the set VLAN PCP.
2983 * @param[in] action_flags
2984 * Holds the actions detected until now.
2985 * @param[in] actions
2986 * Pointer to the list of actions remaining in the flow rule.
2988 * Pointer to error structure.
2991 * 0 on success, a negative errno value otherwise and rte_errno is set.
2994 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2995 const struct rte_flow_action actions[],
2996 struct rte_flow_error *error)
2998 const struct rte_flow_action *action = actions;
2999 const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
3001 if (conf->vlan_pcp > 7)
3002 return rte_flow_error_set(error, EINVAL,
3003 RTE_FLOW_ERROR_TYPE_ACTION, action,
3004 "VLAN PCP value is too big");
3005 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
3006 return rte_flow_error_set(error, ENOTSUP,
3007 RTE_FLOW_ERROR_TYPE_ACTION, action,
3008 "set VLAN PCP action must follow "
3009 "the push VLAN action");
3010 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
3011 return rte_flow_error_set(error, ENOTSUP,
3012 RTE_FLOW_ERROR_TYPE_ACTION, action,
3013 "Multiple VLAN PCP modification are "
3015 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3016 return rte_flow_error_set(error, EINVAL,
3017 RTE_FLOW_ERROR_TYPE_ACTION, action,
3018 "wrong action order, port_id should "
3019 "be after set VLAN PCP");
3024 * Validate the set VLAN VID.
3026 * @param[in] item_flags
3027 * Holds the items detected in this rule.
3028 * @param[in] action_flags
3029 * Holds the actions detected until now.
3030 * @param[in] actions
3031 * Pointer to the list of actions remaining in the flow rule.
3033 * Pointer to error structure.
3036 * 0 on success, a negative errno value otherwise and rte_errno is set.
3039 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
3040 uint64_t action_flags,
3041 const struct rte_flow_action actions[],
3042 struct rte_flow_error *error)
3044 const struct rte_flow_action *action = actions;
3045 const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3047 if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3048 return rte_flow_error_set(error, EINVAL,
3049 RTE_FLOW_ERROR_TYPE_ACTION, action,
3050 "VLAN VID value is too big");
3051 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3052 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3053 return rte_flow_error_set(error, ENOTSUP,
3054 RTE_FLOW_ERROR_TYPE_ACTION, action,
3055 "set VLAN VID action must follow push"
3056 " VLAN action or match on VLAN item");
3057 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3058 return rte_flow_error_set(error, ENOTSUP,
3059 RTE_FLOW_ERROR_TYPE_ACTION, action,
3060 "Multiple VLAN VID modifications are "
3062 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3063 return rte_flow_error_set(error, EINVAL,
3064 RTE_FLOW_ERROR_TYPE_ACTION, action,
3065 "wrong action order, port_id should "
3066 "be after set VLAN VID");
3071 * Validate the FLAG action.
3074 * Pointer to the rte_eth_dev structure.
3075 * @param[in] action_flags
3076 * Holds the actions detected until now.
3078 * Pointer to flow attributes
3080 * Pointer to error structure.
3083 * 0 on success, a negative errno value otherwise and rte_errno is set.
3086 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3087 uint64_t action_flags,
3088 const struct rte_flow_attr *attr,
3089 struct rte_flow_error *error)
3091 struct mlx5_priv *priv = dev->data->dev_private;
3092 struct mlx5_dev_config *config = &priv->config;
3095 /* Fall back if no extended metadata register support. */
3096 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3097 return mlx5_flow_validate_action_flag(action_flags, attr,
3099 /* Extensive metadata mode requires registers. */
3100 if (!mlx5_flow_ext_mreg_supported(dev))
3101 return rte_flow_error_set(error, ENOTSUP,
3102 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3103 "no metadata registers "
3104 "to support flag action");
3105 if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3106 return rte_flow_error_set(error, ENOTSUP,
3107 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3108 "extended metadata register"
3109 " isn't available");
3110 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3113 MLX5_ASSERT(ret > 0);
3114 if (action_flags & MLX5_FLOW_ACTION_MARK)
3115 return rte_flow_error_set(error, EINVAL,
3116 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3117 "can't mark and flag in same flow");
3118 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3119 return rte_flow_error_set(error, EINVAL,
3120 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3122 " actions in same flow");
3127 * Validate MARK action.
3130 * Pointer to the rte_eth_dev structure.
3132 * Pointer to action.
3133 * @param[in] action_flags
3134 * Holds the actions detected until now.
3136 * Pointer to flow attributes
3138 * Pointer to error structure.
3141 * 0 on success, a negative errno value otherwise and rte_errno is set.
3144 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3145 const struct rte_flow_action *action,
3146 uint64_t action_flags,
3147 const struct rte_flow_attr *attr,
3148 struct rte_flow_error *error)
3150 struct mlx5_priv *priv = dev->data->dev_private;
3151 struct mlx5_dev_config *config = &priv->config;
3152 const struct rte_flow_action_mark *mark = action->conf;
3155 if (is_tunnel_offload_active(dev))
3156 return rte_flow_error_set(error, ENOTSUP,
3157 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3159 "if tunnel offload active");
3160 /* Fall back if no extended metadata register support. */
3161 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3162 return mlx5_flow_validate_action_mark(action, action_flags,
3164 /* Extensive metadata mode requires registers. */
3165 if (!mlx5_flow_ext_mreg_supported(dev))
3166 return rte_flow_error_set(error, ENOTSUP,
3167 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3168 "no metadata registers "
3169 "to support mark action");
3170 if (!priv->sh->dv_mark_mask)
3171 return rte_flow_error_set(error, ENOTSUP,
3172 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3173 "extended metadata register"
3174 " isn't available");
3175 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3178 MLX5_ASSERT(ret > 0);
3180 return rte_flow_error_set(error, EINVAL,
3181 RTE_FLOW_ERROR_TYPE_ACTION, action,
3182 "configuration cannot be null");
3183 if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3184 return rte_flow_error_set(error, EINVAL,
3185 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3187 "mark id exceeds the limit");
3188 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3189 return rte_flow_error_set(error, EINVAL,
3190 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3191 "can't flag and mark in same flow");
3192 if (action_flags & MLX5_FLOW_ACTION_MARK)
3193 return rte_flow_error_set(error, EINVAL,
3194 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3195 "can't have 2 mark actions in same"
3201 * Validate SET_META action.
3204 * Pointer to the rte_eth_dev structure.
3206 * Pointer to the action structure.
3207 * @param[in] action_flags
3208 * Holds the actions detected until now.
3210 * Pointer to flow attributes
3212 * Pointer to error structure.
3215 * 0 on success, a negative errno value otherwise and rte_errno is set.
3218 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3219 const struct rte_flow_action *action,
3220 uint64_t action_flags __rte_unused,
3221 const struct rte_flow_attr *attr,
3222 struct rte_flow_error *error)
3224 const struct rte_flow_action_set_meta *conf;
3225 uint32_t nic_mask = UINT32_MAX;
3228 if (!mlx5_flow_ext_mreg_supported(dev))
3229 return rte_flow_error_set(error, ENOTSUP,
3230 RTE_FLOW_ERROR_TYPE_ACTION, action,
3231 "extended metadata register"
3232 " isn't supported");
3233 reg = flow_dv_get_metadata_reg(dev, attr, error);
3237 return rte_flow_error_set(error, ENOTSUP,
3238 RTE_FLOW_ERROR_TYPE_ACTION, action,
3239 "unavalable extended metadata register");
3240 if (reg != REG_A && reg != REG_B) {
3241 struct mlx5_priv *priv = dev->data->dev_private;
3243 nic_mask = priv->sh->dv_meta_mask;
3245 if (!(action->conf))
3246 return rte_flow_error_set(error, EINVAL,
3247 RTE_FLOW_ERROR_TYPE_ACTION, action,
3248 "configuration cannot be null");
3249 conf = (const struct rte_flow_action_set_meta *)action->conf;
3251 return rte_flow_error_set(error, EINVAL,
3252 RTE_FLOW_ERROR_TYPE_ACTION, action,
3253 "zero mask doesn't have any effect");
3254 if (conf->mask & ~nic_mask)
3255 return rte_flow_error_set(error, EINVAL,
3256 RTE_FLOW_ERROR_TYPE_ACTION, action,
3257 "meta data must be within reg C0");
3262 * Validate SET_TAG action.
3265 * Pointer to the rte_eth_dev structure.
3267 * Pointer to the action structure.
3268 * @param[in] action_flags
3269 * Holds the actions detected until now.
3271 * Pointer to flow attributes
3273 * Pointer to error structure.
3276 * 0 on success, a negative errno value otherwise and rte_errno is set.
3279 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3280 const struct rte_flow_action *action,
3281 uint64_t action_flags,
3282 const struct rte_flow_attr *attr,
3283 struct rte_flow_error *error)
3285 const struct rte_flow_action_set_tag *conf;
3286 const uint64_t terminal_action_flags =
3287 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3288 MLX5_FLOW_ACTION_RSS;
3291 if (!mlx5_flow_ext_mreg_supported(dev))
3292 return rte_flow_error_set(error, ENOTSUP,
3293 RTE_FLOW_ERROR_TYPE_ACTION, action,
3294 "extensive metadata register"
3295 " isn't supported");
3296 if (!(action->conf))
3297 return rte_flow_error_set(error, EINVAL,
3298 RTE_FLOW_ERROR_TYPE_ACTION, action,
3299 "configuration cannot be null");
3300 conf = (const struct rte_flow_action_set_tag *)action->conf;
3302 return rte_flow_error_set(error, EINVAL,
3303 RTE_FLOW_ERROR_TYPE_ACTION, action,
3304 "zero mask doesn't have any effect");
3305 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3308 if (!attr->transfer && attr->ingress &&
3309 (action_flags & terminal_action_flags))
3310 return rte_flow_error_set(error, EINVAL,
3311 RTE_FLOW_ERROR_TYPE_ACTION, action,
3312 "set_tag has no effect"
3313 " with terminal actions");
3318 * Check if action counter is shared by either old or new mechanism.
3321 * Pointer to the action structure.
3324 * True when counter is shared, false otherwise.
3327 is_shared_action_count(const struct rte_flow_action *action)
3329 const struct rte_flow_action_count *count =
3330 (const struct rte_flow_action_count *)action->conf;
3332 if ((int)action->type == MLX5_RTE_FLOW_ACTION_TYPE_COUNT)
3334 return !!(count && count->shared);
3338 * Validate count action.
3341 * Pointer to rte_eth_dev structure.
3343 * Indicator if action is shared.
3344 * @param[in] action_flags
3345 * Holds the actions detected until now.
3347 * Pointer to error structure.
3350 * 0 on success, a negative errno value otherwise and rte_errno is set.
3353 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3354 uint64_t action_flags,
3355 struct rte_flow_error *error)
3357 struct mlx5_priv *priv = dev->data->dev_private;
3359 if (!priv->config.devx)
3361 if (action_flags & MLX5_FLOW_ACTION_COUNT)
3362 return rte_flow_error_set(error, EINVAL,
3363 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3364 "duplicate count actions set");
3365 if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3366 !priv->sh->flow_hit_aso_en)
3367 return rte_flow_error_set(error, EINVAL,
3368 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3369 "old age and shared count combination is not supported");
3370 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3374 return rte_flow_error_set
3376 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3378 "count action not supported");
3382 * Validate the L2 encap action.
3385 * Pointer to the rte_eth_dev structure.
3386 * @param[in] action_flags
3387 * Holds the actions detected until now.
3389 * Pointer to the action structure.
3391 * Pointer to flow attributes.
3393 * Pointer to error structure.
3396 * 0 on success, a negative errno value otherwise and rte_errno is set.
3399 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3400 uint64_t action_flags,
3401 const struct rte_flow_action *action,
3402 const struct rte_flow_attr *attr,
3403 struct rte_flow_error *error)
3405 const struct mlx5_priv *priv = dev->data->dev_private;
3407 if (!(action->conf))
3408 return rte_flow_error_set(error, EINVAL,
3409 RTE_FLOW_ERROR_TYPE_ACTION, action,
3410 "configuration cannot be null");
3411 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3412 return rte_flow_error_set(error, EINVAL,
3413 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3414 "can only have a single encap action "
3416 if (!attr->transfer && priv->representor)
3417 return rte_flow_error_set(error, ENOTSUP,
3418 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3419 "encap action for VF representor "
3420 "not supported on NIC table");
3425 * Validate a decap action.
3428 * Pointer to the rte_eth_dev structure.
3429 * @param[in] action_flags
3430 * Holds the actions detected until now.
3432 * Pointer to the action structure.
3433 * @param[in] item_flags
3434 * Holds the items detected.
3436 * Pointer to flow attributes
3438 * Pointer to error structure.
3441 * 0 on success, a negative errno value otherwise and rte_errno is set.
3444 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3445 uint64_t action_flags,
3446 const struct rte_flow_action *action,
3447 const uint64_t item_flags,
3448 const struct rte_flow_attr *attr,
3449 struct rte_flow_error *error)
3451 const struct mlx5_priv *priv = dev->data->dev_private;
3453 if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3454 !priv->config.decap_en)
3455 return rte_flow_error_set(error, ENOTSUP,
3456 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3457 "decap is not enabled");
3458 if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3459 return rte_flow_error_set(error, ENOTSUP,
3460 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3462 MLX5_FLOW_ACTION_DECAP ? "can only "
3463 "have a single decap action" : "decap "
3464 "after encap is not supported");
3465 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3466 return rte_flow_error_set(error, EINVAL,
3467 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3468 "can't have decap action after"
3471 return rte_flow_error_set(error, ENOTSUP,
3472 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3474 "decap action not supported for "
3476 if (!attr->transfer && priv->representor)
3477 return rte_flow_error_set(error, ENOTSUP,
3478 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3479 "decap action for VF representor "
3480 "not supported on NIC table");
3481 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3482 !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3483 return rte_flow_error_set(error, ENOTSUP,
3484 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3485 "VXLAN item should be present for VXLAN decap");
3489 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3492 * Validate the raw encap and decap actions.
3495 * Pointer to the rte_eth_dev structure.
3497 * Pointer to the decap action.
3499 * Pointer to the encap action.
3501 * Pointer to flow attributes
3502 * @param[in/out] action_flags
3503 * Holds the actions detected until now.
3504 * @param[out] actions_n
3505 * pointer to the number of actions counter.
3507 * Pointer to the action structure.
3508 * @param[in] item_flags
3509 * Holds the items detected.
3511 * Pointer to error structure.
3514 * 0 on success, a negative errno value otherwise and rte_errno is set.
3517 flow_dv_validate_action_raw_encap_decap
3518 (struct rte_eth_dev *dev,
3519 const struct rte_flow_action_raw_decap *decap,
3520 const struct rte_flow_action_raw_encap *encap,
3521 const struct rte_flow_attr *attr, uint64_t *action_flags,
3522 int *actions_n, const struct rte_flow_action *action,
3523 uint64_t item_flags, struct rte_flow_error *error)
3525 const struct mlx5_priv *priv = dev->data->dev_private;
3528 if (encap && (!encap->size || !encap->data))
3529 return rte_flow_error_set(error, EINVAL,
3530 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3531 "raw encap data cannot be empty");
3532 if (decap && encap) {
3533 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3534 encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3537 else if (encap->size <=
3538 MLX5_ENCAPSULATION_DECISION_SIZE &&
3540 MLX5_ENCAPSULATION_DECISION_SIZE)
3543 else if (encap->size >
3544 MLX5_ENCAPSULATION_DECISION_SIZE &&
3546 MLX5_ENCAPSULATION_DECISION_SIZE)
3547 /* 2 L2 actions: encap and decap. */
3550 return rte_flow_error_set(error,
3552 RTE_FLOW_ERROR_TYPE_ACTION,
3553 NULL, "unsupported too small "
3554 "raw decap and too small raw "
3555 "encap combination");
3558 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3559 item_flags, attr, error);
3562 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3566 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3567 return rte_flow_error_set(error, ENOTSUP,
3568 RTE_FLOW_ERROR_TYPE_ACTION,
3570 "small raw encap size");
3571 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3572 return rte_flow_error_set(error, EINVAL,
3573 RTE_FLOW_ERROR_TYPE_ACTION,
3575 "more than one encap action");
3576 if (!attr->transfer && priv->representor)
3577 return rte_flow_error_set
3579 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3580 "encap action for VF representor "
3581 "not supported on NIC table");
3582 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3589 * Validate the ASO CT action.
3592 * Pointer to the rte_eth_dev structure.
3593 * @param[in] action_flags
3594 * Holds the actions detected until now.
3595 * @param[in] item_flags
3596 * The items found in this flow rule.
3598 * Pointer to flow attributes.
3600 * Pointer to error structure.
3603 * 0 on success, a negative errno value otherwise and rte_errno is set.
3606 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3607 uint64_t action_flags,
3608 uint64_t item_flags,
3609 const struct rte_flow_attr *attr,
3610 struct rte_flow_error *error)
3614 if (attr->group == 0 && !attr->transfer)
3615 return rte_flow_error_set(error, ENOTSUP,
3616 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3618 "Only support non-root table");
3619 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3620 return rte_flow_error_set(error, ENOTSUP,
3621 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3622 "CT cannot follow a fate action");
3623 if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3624 (action_flags & MLX5_FLOW_ACTION_AGE))
3625 return rte_flow_error_set(error, EINVAL,
3626 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3627 "Only one ASO action is supported");
3628 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3629 return rte_flow_error_set(error, EINVAL,
3630 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3631 "Encap cannot exist before CT");
3632 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3633 return rte_flow_error_set(error, EINVAL,
3634 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3635 "Not a outer TCP packet");
3640 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3641 struct mlx5_list_entry *entry, void *cb_ctx)
3643 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3644 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3645 struct mlx5_flow_dv_encap_decap_resource *resource;
3647 resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3649 if (resource->reformat_type == ctx_resource->reformat_type &&
3650 resource->ft_type == ctx_resource->ft_type &&
3651 resource->flags == ctx_resource->flags &&
3652 resource->size == ctx_resource->size &&
3653 !memcmp((const void *)resource->buf,
3654 (const void *)ctx_resource->buf,
3660 struct mlx5_list_entry *
3661 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3663 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3664 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3665 struct mlx5dv_dr_domain *domain;
3666 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3667 struct mlx5_flow_dv_encap_decap_resource *resource;
3671 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3672 domain = sh->fdb_domain;
3673 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3674 domain = sh->rx_domain;
3676 domain = sh->tx_domain;
3677 /* Register new encap/decap resource. */
3678 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3680 rte_flow_error_set(ctx->error, ENOMEM,
3681 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3682 "cannot allocate resource memory");
3685 *resource = *ctx_resource;
3686 resource->idx = idx;
3687 ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->ctx, domain,
3691 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3692 rte_flow_error_set(ctx->error, ENOMEM,
3693 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3694 NULL, "cannot create action");
3698 return &resource->entry;
3701 struct mlx5_list_entry *
3702 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3705 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3706 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3707 struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3710 cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3712 if (!cache_resource) {
3713 rte_flow_error_set(ctx->error, ENOMEM,
3714 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3715 "cannot allocate resource memory");
3718 memcpy(cache_resource, oentry, sizeof(*cache_resource));
3719 cache_resource->idx = idx;
3720 return &cache_resource->entry;
3724 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3726 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3727 struct mlx5_flow_dv_encap_decap_resource *res =
3728 container_of(entry, typeof(*res), entry);
3730 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3734 * Find existing encap/decap resource or create and register a new one.
3736 * @param[in, out] dev
3737 * Pointer to rte_eth_dev structure.
3738 * @param[in, out] resource
3739 * Pointer to encap/decap resource.
3740 * @parm[in, out] dev_flow
3741 * Pointer to the dev_flow.
3743 * pointer to error structure.
3746 * 0 on success otherwise -errno and errno is set.
3749 flow_dv_encap_decap_resource_register
3750 (struct rte_eth_dev *dev,
3751 struct mlx5_flow_dv_encap_decap_resource *resource,
3752 struct mlx5_flow *dev_flow,
3753 struct rte_flow_error *error)
3755 struct mlx5_priv *priv = dev->data->dev_private;
3756 struct mlx5_dev_ctx_shared *sh = priv->sh;
3757 struct mlx5_list_entry *entry;
3761 uint32_t refmt_type:8;
3763 * Header reformat actions can be shared between
3764 * non-root tables. One bit to indicate non-root
3768 uint32_t reserve:15;
3771 } encap_decap_key = {
3773 .ft_type = resource->ft_type,
3774 .refmt_type = resource->reformat_type,
3775 .is_root = !!dev_flow->dv.group,
3779 struct mlx5_flow_cb_ctx ctx = {
3783 struct mlx5_hlist *encaps_decaps;
3786 encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3788 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3790 flow_dv_encap_decap_create_cb,
3791 flow_dv_encap_decap_match_cb,
3792 flow_dv_encap_decap_remove_cb,
3793 flow_dv_encap_decap_clone_cb,
3794 flow_dv_encap_decap_clone_free_cb);
3795 if (unlikely(!encaps_decaps))
3797 resource->flags = dev_flow->dv.group ? 0 : 1;
3798 key64 = __rte_raw_cksum(&encap_decap_key.v32,
3799 sizeof(encap_decap_key.v32), 0);
3800 if (resource->reformat_type !=
3801 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3803 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3804 entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3807 resource = container_of(entry, typeof(*resource), entry);
3808 dev_flow->dv.encap_decap = resource;
3809 dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3814 * Find existing table jump resource or create and register a new one.
3816 * @param[in, out] dev
3817 * Pointer to rte_eth_dev structure.
3818 * @param[in, out] tbl
3819 * Pointer to flow table resource.
3820 * @parm[in, out] dev_flow
3821 * Pointer to the dev_flow.
3823 * pointer to error structure.
3826 * 0 on success otherwise -errno and errno is set.
3829 flow_dv_jump_tbl_resource_register
3830 (struct rte_eth_dev *dev __rte_unused,
3831 struct mlx5_flow_tbl_resource *tbl,
3832 struct mlx5_flow *dev_flow,
3833 struct rte_flow_error *error __rte_unused)
3835 struct mlx5_flow_tbl_data_entry *tbl_data =
3836 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3839 MLX5_ASSERT(tbl_data->jump.action);
3840 dev_flow->handle->rix_jump = tbl_data->idx;
3841 dev_flow->dv.jump = &tbl_data->jump;
3846 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3847 struct mlx5_list_entry *entry, void *cb_ctx)
3849 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3850 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3851 struct mlx5_flow_dv_port_id_action_resource *res =
3852 container_of(entry, typeof(*res), entry);
3854 return ref->port_id != res->port_id;
3857 struct mlx5_list_entry *
3858 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3860 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3861 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3862 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3863 struct mlx5_flow_dv_port_id_action_resource *resource;
3867 /* Register new port id action resource. */
3868 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3870 rte_flow_error_set(ctx->error, ENOMEM,
3871 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3872 "cannot allocate port_id action memory");
3876 ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3880 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3881 rte_flow_error_set(ctx->error, ENOMEM,
3882 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3883 "cannot create action");
3886 resource->idx = idx;
3887 return &resource->entry;
3890 struct mlx5_list_entry *
3891 flow_dv_port_id_clone_cb(void *tool_ctx,
3892 struct mlx5_list_entry *entry __rte_unused,
3895 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3896 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3897 struct mlx5_flow_dv_port_id_action_resource *resource;
3900 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3902 rte_flow_error_set(ctx->error, ENOMEM,
3903 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3904 "cannot allocate port_id action memory");
3907 memcpy(resource, entry, sizeof(*resource));
3908 resource->idx = idx;
3909 return &resource->entry;
3913 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3915 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3916 struct mlx5_flow_dv_port_id_action_resource *resource =
3917 container_of(entry, typeof(*resource), entry);
3919 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3923 * Find existing table port ID resource or create and register a new one.
3925 * @param[in, out] dev
3926 * Pointer to rte_eth_dev structure.
3927 * @param[in, out] ref
3928 * Pointer to port ID action resource reference.
3929 * @parm[in, out] dev_flow
3930 * Pointer to the dev_flow.
3932 * pointer to error structure.
3935 * 0 on success otherwise -errno and errno is set.
3938 flow_dv_port_id_action_resource_register
3939 (struct rte_eth_dev *dev,
3940 struct mlx5_flow_dv_port_id_action_resource *ref,
3941 struct mlx5_flow *dev_flow,
3942 struct rte_flow_error *error)
3944 struct mlx5_priv *priv = dev->data->dev_private;
3945 struct mlx5_list_entry *entry;
3946 struct mlx5_flow_dv_port_id_action_resource *resource;
3947 struct mlx5_flow_cb_ctx ctx = {
3952 entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3955 resource = container_of(entry, typeof(*resource), entry);
3956 dev_flow->dv.port_id_action = resource;
3957 dev_flow->handle->rix_port_id_action = resource->idx;
3962 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3963 struct mlx5_list_entry *entry, void *cb_ctx)
3965 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3966 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3967 struct mlx5_flow_dv_push_vlan_action_resource *res =
3968 container_of(entry, typeof(*res), entry);
3970 return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3973 struct mlx5_list_entry *
3974 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3976 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3977 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3978 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3979 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3980 struct mlx5dv_dr_domain *domain;
3984 /* Register new port id action resource. */
3985 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3987 rte_flow_error_set(ctx->error, ENOMEM,
3988 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3989 "cannot allocate push_vlan action memory");
3993 if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3994 domain = sh->fdb_domain;
3995 else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3996 domain = sh->rx_domain;
3998 domain = sh->tx_domain;
3999 ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
4002 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
4003 rte_flow_error_set(ctx->error, ENOMEM,
4004 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4005 "cannot create push vlan action");
4008 resource->idx = idx;
4009 return &resource->entry;
4012 struct mlx5_list_entry *
4013 flow_dv_push_vlan_clone_cb(void *tool_ctx,
4014 struct mlx5_list_entry *entry __rte_unused,
4017 struct mlx5_dev_ctx_shared *sh = tool_ctx;
4018 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4019 struct mlx5_flow_dv_push_vlan_action_resource *resource;
4022 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
4024 rte_flow_error_set(ctx->error, ENOMEM,
4025 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4026 "cannot allocate push_vlan action memory");
4029 memcpy(resource, entry, sizeof(*resource));
4030 resource->idx = idx;
4031 return &resource->entry;
4035 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4037 struct mlx5_dev_ctx_shared *sh = tool_ctx;
4038 struct mlx5_flow_dv_push_vlan_action_resource *resource =
4039 container_of(entry, typeof(*resource), entry);
4041 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
4045 * Find existing push vlan resource or create and register a new one.
4047 * @param [in, out] dev
4048 * Pointer to rte_eth_dev structure.
4049 * @param[in, out] ref
4050 * Pointer to port ID action resource reference.
4051 * @parm[in, out] dev_flow
4052 * Pointer to the dev_flow.
4054 * pointer to error structure.
4057 * 0 on success otherwise -errno and errno is set.
4060 flow_dv_push_vlan_action_resource_register
4061 (struct rte_eth_dev *dev,
4062 struct mlx5_flow_dv_push_vlan_action_resource *ref,
4063 struct mlx5_flow *dev_flow,
4064 struct rte_flow_error *error)
4066 struct mlx5_priv *priv = dev->data->dev_private;
4067 struct mlx5_flow_dv_push_vlan_action_resource *resource;
4068 struct mlx5_list_entry *entry;
4069 struct mlx5_flow_cb_ctx ctx = {
4074 entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4077 resource = container_of(entry, typeof(*resource), entry);
4079 dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4080 dev_flow->dv.push_vlan_res = resource;
4085 * Get the size of specific rte_flow_item_type hdr size
4087 * @param[in] item_type
4088 * Tested rte_flow_item_type.
4091 * sizeof struct item_type, 0 if void or irrelevant.
4094 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4098 switch (item_type) {
4099 case RTE_FLOW_ITEM_TYPE_ETH:
4100 retval = sizeof(struct rte_ether_hdr);
4102 case RTE_FLOW_ITEM_TYPE_VLAN:
4103 retval = sizeof(struct rte_vlan_hdr);
4105 case RTE_FLOW_ITEM_TYPE_IPV4:
4106 retval = sizeof(struct rte_ipv4_hdr);
4108 case RTE_FLOW_ITEM_TYPE_IPV6:
4109 retval = sizeof(struct rte_ipv6_hdr);
4111 case RTE_FLOW_ITEM_TYPE_UDP:
4112 retval = sizeof(struct rte_udp_hdr);
4114 case RTE_FLOW_ITEM_TYPE_TCP:
4115 retval = sizeof(struct rte_tcp_hdr);
4117 case RTE_FLOW_ITEM_TYPE_VXLAN:
4118 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4119 retval = sizeof(struct rte_vxlan_hdr);
4121 case RTE_FLOW_ITEM_TYPE_GRE:
4122 case RTE_FLOW_ITEM_TYPE_NVGRE:
4123 retval = sizeof(struct rte_gre_hdr);
4125 case RTE_FLOW_ITEM_TYPE_MPLS:
4126 retval = sizeof(struct rte_mpls_hdr);
4128 case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4136 #define MLX5_ENCAP_IPV4_VERSION 0x40
4137 #define MLX5_ENCAP_IPV4_IHL_MIN 0x05
4138 #define MLX5_ENCAP_IPV4_TTL_DEF 0x40
4139 #define MLX5_ENCAP_IPV6_VTC_FLOW 0x60000000
4140 #define MLX5_ENCAP_IPV6_HOP_LIMIT 0xff
4141 #define MLX5_ENCAP_VXLAN_FLAGS 0x08000000
4142 #define MLX5_ENCAP_VXLAN_GPE_FLAGS 0x04
4145 * Convert the encap action data from list of rte_flow_item to raw buffer
4148 * Pointer to rte_flow_item objects list.
4150 * Pointer to the output buffer.
4152 * Pointer to the output buffer size.
4154 * Pointer to the error structure.
4157 * 0 on success, a negative errno value otherwise and rte_errno is set.
4160 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4161 size_t *size, struct rte_flow_error *error)
4163 struct rte_ether_hdr *eth = NULL;
4164 struct rte_vlan_hdr *vlan = NULL;
4165 struct rte_ipv4_hdr *ipv4 = NULL;
4166 struct rte_ipv6_hdr *ipv6 = NULL;
4167 struct rte_udp_hdr *udp = NULL;
4168 struct rte_vxlan_hdr *vxlan = NULL;
4169 struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4170 struct rte_gre_hdr *gre = NULL;
4172 size_t temp_size = 0;
4175 return rte_flow_error_set(error, EINVAL,
4176 RTE_FLOW_ERROR_TYPE_ACTION,
4177 NULL, "invalid empty data");
4178 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4179 len = flow_dv_get_item_hdr_len(items->type);
4180 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4181 return rte_flow_error_set(error, EINVAL,
4182 RTE_FLOW_ERROR_TYPE_ACTION,
4183 (void *)items->type,
4184 "items total size is too big"
4185 " for encap action");
4186 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4187 switch (items->type) {
4188 case RTE_FLOW_ITEM_TYPE_ETH:
4189 eth = (struct rte_ether_hdr *)&buf[temp_size];
4191 case RTE_FLOW_ITEM_TYPE_VLAN:
4192 vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4194 return rte_flow_error_set(error, EINVAL,
4195 RTE_FLOW_ERROR_TYPE_ACTION,
4196 (void *)items->type,
4197 "eth header not found");
4198 if (!eth->ether_type)
4199 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4201 case RTE_FLOW_ITEM_TYPE_IPV4:
4202 ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4204 return rte_flow_error_set(error, EINVAL,
4205 RTE_FLOW_ERROR_TYPE_ACTION,
4206 (void *)items->type,
4207 "neither eth nor vlan"
4209 if (vlan && !vlan->eth_proto)
4210 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4211 else if (eth && !eth->ether_type)
4212 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4213 if (!ipv4->version_ihl)
4214 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4215 MLX5_ENCAP_IPV4_IHL_MIN;
4216 if (!ipv4->time_to_live)
4217 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4219 case RTE_FLOW_ITEM_TYPE_IPV6:
4220 ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4222 return rte_flow_error_set(error, EINVAL,
4223 RTE_FLOW_ERROR_TYPE_ACTION,
4224 (void *)items->type,
4225 "neither eth nor vlan"
4227 if (vlan && !vlan->eth_proto)
4228 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4229 else if (eth && !eth->ether_type)
4230 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4231 if (!ipv6->vtc_flow)
4233 RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4234 if (!ipv6->hop_limits)
4235 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4237 case RTE_FLOW_ITEM_TYPE_UDP:
4238 udp = (struct rte_udp_hdr *)&buf[temp_size];
4240 return rte_flow_error_set(error, EINVAL,
4241 RTE_FLOW_ERROR_TYPE_ACTION,
4242 (void *)items->type,
4243 "ip header not found");
4244 if (ipv4 && !ipv4->next_proto_id)
4245 ipv4->next_proto_id = IPPROTO_UDP;
4246 else if (ipv6 && !ipv6->proto)
4247 ipv6->proto = IPPROTO_UDP;
4249 case RTE_FLOW_ITEM_TYPE_VXLAN:
4250 vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4252 return rte_flow_error_set(error, EINVAL,
4253 RTE_FLOW_ERROR_TYPE_ACTION,
4254 (void *)items->type,
4255 "udp header not found");
4257 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4258 if (!vxlan->vx_flags)
4260 RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4262 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4263 vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4265 return rte_flow_error_set(error, EINVAL,
4266 RTE_FLOW_ERROR_TYPE_ACTION,
4267 (void *)items->type,
4268 "udp header not found");
4269 if (!vxlan_gpe->proto)
4270 return rte_flow_error_set(error, EINVAL,
4271 RTE_FLOW_ERROR_TYPE_ACTION,
4272 (void *)items->type,
4273 "next protocol not found");
4276 RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4277 if (!vxlan_gpe->vx_flags)
4278 vxlan_gpe->vx_flags =
4279 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4281 case RTE_FLOW_ITEM_TYPE_GRE:
4282 case RTE_FLOW_ITEM_TYPE_NVGRE:
4283 gre = (struct rte_gre_hdr *)&buf[temp_size];
4285 return rte_flow_error_set(error, EINVAL,
4286 RTE_FLOW_ERROR_TYPE_ACTION,
4287 (void *)items->type,
4288 "next protocol not found");
4290 return rte_flow_error_set(error, EINVAL,
4291 RTE_FLOW_ERROR_TYPE_ACTION,
4292 (void *)items->type,
4293 "ip header not found");
4294 if (ipv4 && !ipv4->next_proto_id)
4295 ipv4->next_proto_id = IPPROTO_GRE;
4296 else if (ipv6 && !ipv6->proto)
4297 ipv6->proto = IPPROTO_GRE;
4299 case RTE_FLOW_ITEM_TYPE_VOID:
4302 return rte_flow_error_set(error, EINVAL,
4303 RTE_FLOW_ERROR_TYPE_ACTION,
4304 (void *)items->type,
4305 "unsupported item type");
4315 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4317 struct rte_ether_hdr *eth = NULL;
4318 struct rte_vlan_hdr *vlan = NULL;
4319 struct rte_ipv6_hdr *ipv6 = NULL;
4320 struct rte_udp_hdr *udp = NULL;
4324 eth = (struct rte_ether_hdr *)data;
4325 next_hdr = (char *)(eth + 1);
4326 proto = RTE_BE16(eth->ether_type);
4329 while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4330 vlan = (struct rte_vlan_hdr *)next_hdr;
4331 proto = RTE_BE16(vlan->eth_proto);
4332 next_hdr += sizeof(struct rte_vlan_hdr);
4335 /* HW calculates IPv4 csum. no need to proceed */
4336 if (proto == RTE_ETHER_TYPE_IPV4)
4339 /* non IPv4/IPv6 header. not supported */
4340 if (proto != RTE_ETHER_TYPE_IPV6) {
4341 return rte_flow_error_set(error, ENOTSUP,
4342 RTE_FLOW_ERROR_TYPE_ACTION,
4343 NULL, "Cannot offload non IPv4/IPv6");
4346 ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4348 /* ignore non UDP */
4349 if (ipv6->proto != IPPROTO_UDP)
4352 udp = (struct rte_udp_hdr *)(ipv6 + 1);
4353 udp->dgram_cksum = 0;
4359 * Convert L2 encap action to DV specification.
4362 * Pointer to rte_eth_dev structure.
4364 * Pointer to action structure.
4365 * @param[in, out] dev_flow
4366 * Pointer to the mlx5_flow.
4367 * @param[in] transfer
4368 * Mark if the flow is E-Switch flow.
4370 * Pointer to the error structure.
4373 * 0 on success, a negative errno value otherwise and rte_errno is set.
4376 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4377 const struct rte_flow_action *action,
4378 struct mlx5_flow *dev_flow,
4380 struct rte_flow_error *error)
4382 const struct rte_flow_item *encap_data;
4383 const struct rte_flow_action_raw_encap *raw_encap_data;
4384 struct mlx5_flow_dv_encap_decap_resource res = {
4386 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4387 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4388 MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4391 if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4393 (const struct rte_flow_action_raw_encap *)action->conf;
4394 res.size = raw_encap_data->size;
4395 memcpy(res.buf, raw_encap_data->data, res.size);
4397 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4399 ((const struct rte_flow_action_vxlan_encap *)
4400 action->conf)->definition;
4403 ((const struct rte_flow_action_nvgre_encap *)
4404 action->conf)->definition;
4405 if (flow_dv_convert_encap_data(encap_data, res.buf,
4409 if (flow_dv_zero_encap_udp_csum(res.buf, error))
4411 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4412 return rte_flow_error_set(error, EINVAL,
4413 RTE_FLOW_ERROR_TYPE_ACTION,
4414 NULL, "can't create L2 encap action");
4419 * Convert L2 decap action to DV specification.
4422 * Pointer to rte_eth_dev structure.
4423 * @param[in, out] dev_flow
4424 * Pointer to the mlx5_flow.
4425 * @param[in] transfer
4426 * Mark if the flow is E-Switch flow.
4428 * Pointer to the error structure.
4431 * 0 on success, a negative errno value otherwise and rte_errno is set.
4434 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4435 struct mlx5_flow *dev_flow,
4437 struct rte_flow_error *error)
4439 struct mlx5_flow_dv_encap_decap_resource res = {
4442 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4443 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4444 MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4447 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4448 return rte_flow_error_set(error, EINVAL,
4449 RTE_FLOW_ERROR_TYPE_ACTION,
4450 NULL, "can't create L2 decap action");
4455 * Convert raw decap/encap (L3 tunnel) action to DV specification.
4458 * Pointer to rte_eth_dev structure.
4460 * Pointer to action structure.
4461 * @param[in, out] dev_flow
4462 * Pointer to the mlx5_flow.
4464 * Pointer to the flow attributes.
4466 * Pointer to the error structure.
4469 * 0 on success, a negative errno value otherwise and rte_errno is set.
4472 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4473 const struct rte_flow_action *action,
4474 struct mlx5_flow *dev_flow,
4475 const struct rte_flow_attr *attr,
4476 struct rte_flow_error *error)
4478 const struct rte_flow_action_raw_encap *encap_data;
4479 struct mlx5_flow_dv_encap_decap_resource res;
4481 memset(&res, 0, sizeof(res));
4482 encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4483 res.size = encap_data->size;
4484 memcpy(res.buf, encap_data->data, res.size);
4485 res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4486 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4487 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4489 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4491 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4492 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4493 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4494 return rte_flow_error_set(error, EINVAL,
4495 RTE_FLOW_ERROR_TYPE_ACTION,
4496 NULL, "can't create encap action");
4501 * Create action push VLAN.
4504 * Pointer to rte_eth_dev structure.
4506 * Pointer to the flow attributes.
4508 * Pointer to the vlan to push to the Ethernet header.
4509 * @param[in, out] dev_flow
4510 * Pointer to the mlx5_flow.
4512 * Pointer to the error structure.
4515 * 0 on success, a negative errno value otherwise and rte_errno is set.
4518 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4519 const struct rte_flow_attr *attr,
4520 const struct rte_vlan_hdr *vlan,
4521 struct mlx5_flow *dev_flow,
4522 struct rte_flow_error *error)
4524 struct mlx5_flow_dv_push_vlan_action_resource res;
4526 memset(&res, 0, sizeof(res));
4528 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4531 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4533 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4534 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4535 return flow_dv_push_vlan_action_resource_register
4536 (dev, &res, dev_flow, error);
4540 * Validate the modify-header actions.
4542 * @param[in] action_flags
4543 * Holds the actions detected until now.
4545 * Pointer to the modify action.
4547 * Pointer to error structure.
4550 * 0 on success, a negative errno value otherwise and rte_errno is set.
4553 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4554 const struct rte_flow_action *action,
4555 struct rte_flow_error *error)
4557 if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4558 return rte_flow_error_set(error, EINVAL,
4559 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4560 NULL, "action configuration not set");
4561 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4562 return rte_flow_error_set(error, EINVAL,
4563 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4564 "can't have encap action before"
4570 * Validate the modify-header MAC address actions.
4572 * @param[in] action_flags
4573 * Holds the actions detected until now.
4575 * Pointer to the modify action.
4576 * @param[in] item_flags
4577 * Holds the items detected.
4579 * Pointer to error structure.
4582 * 0 on success, a negative errno value otherwise and rte_errno is set.
4585 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4586 const struct rte_flow_action *action,
4587 const uint64_t item_flags,
4588 struct rte_flow_error *error)
4592 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4594 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4595 return rte_flow_error_set(error, EINVAL,
4596 RTE_FLOW_ERROR_TYPE_ACTION,
4598 "no L2 item in pattern");
4604 * Validate the modify-header IPv4 address actions.
4606 * @param[in] action_flags
4607 * Holds the actions detected until now.
4609 * Pointer to the modify action.
4610 * @param[in] item_flags
4611 * Holds the items detected.
4613 * Pointer to error structure.
4616 * 0 on success, a negative errno value otherwise and rte_errno is set.
4619 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4620 const struct rte_flow_action *action,
4621 const uint64_t item_flags,
4622 struct rte_flow_error *error)
4627 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4629 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4630 MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4631 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4632 if (!(item_flags & layer))
4633 return rte_flow_error_set(error, EINVAL,
4634 RTE_FLOW_ERROR_TYPE_ACTION,
4636 "no ipv4 item in pattern");
4642 * Validate the modify-header IPv6 address actions.
4644 * @param[in] action_flags
4645 * Holds the actions detected until now.
4647 * Pointer to the modify action.
4648 * @param[in] item_flags
4649 * Holds the items detected.
4651 * Pointer to error structure.
4654 * 0 on success, a negative errno value otherwise and rte_errno is set.
4657 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4658 const struct rte_flow_action *action,
4659 const uint64_t item_flags,
4660 struct rte_flow_error *error)
4665 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4667 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4668 MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4669 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4670 if (!(item_flags & layer))
4671 return rte_flow_error_set(error, EINVAL,
4672 RTE_FLOW_ERROR_TYPE_ACTION,
4674 "no ipv6 item in pattern");
4680 * Validate the modify-header TP actions.
4682 * @param[in] action_flags
4683 * Holds the actions detected until now.
4685 * Pointer to the modify action.
4686 * @param[in] item_flags
4687 * Holds the items detected.
4689 * Pointer to error structure.
4692 * 0 on success, a negative errno value otherwise and rte_errno is set.
4695 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4696 const struct rte_flow_action *action,
4697 const uint64_t item_flags,
4698 struct rte_flow_error *error)
4703 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4705 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4706 MLX5_FLOW_LAYER_INNER_L4 :
4707 MLX5_FLOW_LAYER_OUTER_L4;
4708 if (!(item_flags & layer))
4709 return rte_flow_error_set(error, EINVAL,
4710 RTE_FLOW_ERROR_TYPE_ACTION,
4711 NULL, "no transport layer "
4718 * Validate the modify-header actions of increment/decrement
4719 * TCP Sequence-number.
4721 * @param[in] action_flags
4722 * Holds the actions detected until now.
4724 * Pointer to the modify action.
4725 * @param[in] item_flags
4726 * Holds the items detected.
4728 * Pointer to error structure.
4731 * 0 on success, a negative errno value otherwise and rte_errno is set.
4734 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4735 const struct rte_flow_action *action,
4736 const uint64_t item_flags,
4737 struct rte_flow_error *error)
4742 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4744 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4745 MLX5_FLOW_LAYER_INNER_L4_TCP :
4746 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4747 if (!(item_flags & layer))
4748 return rte_flow_error_set(error, EINVAL,
4749 RTE_FLOW_ERROR_TYPE_ACTION,
4750 NULL, "no TCP item in"
4752 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4753 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4754 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4755 (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4756 return rte_flow_error_set(error, EINVAL,
4757 RTE_FLOW_ERROR_TYPE_ACTION,
4759 "cannot decrease and increase"
4760 " TCP sequence number"
4761 " at the same time");
4767 * Validate the modify-header actions of increment/decrement
4768 * TCP Acknowledgment number.
4770 * @param[in] action_flags
4771 * Holds the actions detected until now.
4773 * Pointer to the modify action.
4774 * @param[in] item_flags
4775 * Holds the items detected.
4777 * Pointer to error structure.
4780 * 0 on success, a negative errno value otherwise and rte_errno is set.
4783 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4784 const struct rte_flow_action *action,
4785 const uint64_t item_flags,
4786 struct rte_flow_error *error)
4791 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4793 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4794 MLX5_FLOW_LAYER_INNER_L4_TCP :
4795 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4796 if (!(item_flags & layer))
4797 return rte_flow_error_set(error, EINVAL,
4798 RTE_FLOW_ERROR_TYPE_ACTION,
4799 NULL, "no TCP item in"
4801 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4802 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4803 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4804 (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4805 return rte_flow_error_set(error, EINVAL,
4806 RTE_FLOW_ERROR_TYPE_ACTION,
4808 "cannot decrease and increase"
4809 " TCP acknowledgment number"
4810 " at the same time");
4816 * Validate the modify-header TTL actions.
4818 * @param[in] action_flags
4819 * Holds the actions detected until now.
4821 * Pointer to the modify action.
4822 * @param[in] item_flags
4823 * Holds the items detected.
4825 * Pointer to error structure.
4828 * 0 on success, a negative errno value otherwise and rte_errno is set.
4831 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4832 const struct rte_flow_action *action,
4833 const uint64_t item_flags,
4834 struct rte_flow_error *error)
4839 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4841 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4842 MLX5_FLOW_LAYER_INNER_L3 :
4843 MLX5_FLOW_LAYER_OUTER_L3;
4844 if (!(item_flags & layer))
4845 return rte_flow_error_set(error, EINVAL,
4846 RTE_FLOW_ERROR_TYPE_ACTION,
4848 "no IP protocol in pattern");
4854 * Validate the generic modify field actions.
4856 * Pointer to the rte_eth_dev structure.
4857 * @param[in] action_flags
4858 * Holds the actions detected until now.
4860 * Pointer to the modify action.
4862 * Pointer to the flow attributes.
4864 * Pointer to error structure.
4867 * Number of header fields to modify (0 or more) on success,
4868 * a negative errno value otherwise and rte_errno is set.
4871 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4872 const uint64_t action_flags,
4873 const struct rte_flow_action *action,
4874 const struct rte_flow_attr *attr,
4875 struct rte_flow_error *error)
4878 struct mlx5_priv *priv = dev->data->dev_private;
4879 struct mlx5_dev_config *config = &priv->config;
4880 const struct rte_flow_action_modify_field *action_modify_field =
4882 uint32_t dst_width = mlx5_flow_item_field_width(priv,
4883 action_modify_field->dst.field);
4884 uint32_t src_width = mlx5_flow_item_field_width(priv,
4885 action_modify_field->src.field);
4887 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4891 if (action_modify_field->width == 0)
4892 return rte_flow_error_set(error, EINVAL,
4893 RTE_FLOW_ERROR_TYPE_ACTION, action,
4894 "no bits are requested to be modified");
4895 else if (action_modify_field->width > dst_width ||
4896 action_modify_field->width > src_width)
4897 return rte_flow_error_set(error, EINVAL,
4898 RTE_FLOW_ERROR_TYPE_ACTION, action,
4899 "cannot modify more bits than"
4900 " the width of a field");
4901 if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4902 action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4903 if ((action_modify_field->dst.offset +
4904 action_modify_field->width > dst_width) ||
4905 (action_modify_field->dst.offset % 32))
4906 return rte_flow_error_set(error, EINVAL,
4907 RTE_FLOW_ERROR_TYPE_ACTION, action,
4908 "destination offset is too big"
4909 " or not aligned to 4 bytes");
4910 if (action_modify_field->dst.level &&
4911 action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4912 return rte_flow_error_set(error, ENOTSUP,
4913 RTE_FLOW_ERROR_TYPE_ACTION, action,
4914 "inner header fields modification"
4915 " is not supported");
4917 if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4918 action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4919 if (!attr->transfer && !attr->group)
4920 return rte_flow_error_set(error, ENOTSUP,
4921 RTE_FLOW_ERROR_TYPE_ACTION, action,
4922 "modify field action is not"
4923 " supported for group 0");
4924 if ((action_modify_field->src.offset +
4925 action_modify_field->width > src_width) ||
4926 (action_modify_field->src.offset % 32))
4927 return rte_flow_error_set(error, EINVAL,
4928 RTE_FLOW_ERROR_TYPE_ACTION, action,
4929 "source offset is too big"
4930 " or not aligned to 4 bytes");
4931 if (action_modify_field->src.level &&
4932 action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4933 return rte_flow_error_set(error, ENOTSUP,
4934 RTE_FLOW_ERROR_TYPE_ACTION, action,
4935 "inner header fields modification"
4936 " is not supported");
4938 if ((action_modify_field->dst.field ==
4939 action_modify_field->src.field) &&
4940 (action_modify_field->dst.level ==
4941 action_modify_field->src.level))
4942 return rte_flow_error_set(error, EINVAL,
4943 RTE_FLOW_ERROR_TYPE_ACTION, action,
4944 "source and destination fields"
4945 " cannot be the same");
4946 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4947 action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER)
4948 return rte_flow_error_set(error, EINVAL,
4949 RTE_FLOW_ERROR_TYPE_ACTION, action,
4950 "immediate value or a pointer to it"
4951 " cannot be used as a destination");
4952 if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4953 action_modify_field->src.field == RTE_FLOW_FIELD_START)
4954 return rte_flow_error_set(error, ENOTSUP,
4955 RTE_FLOW_ERROR_TYPE_ACTION, action,
4956 "modifications of an arbitrary"
4957 " place in a packet is not supported");
4958 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4959 action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4960 return rte_flow_error_set(error, ENOTSUP,
4961 RTE_FLOW_ERROR_TYPE_ACTION, action,
4962 "modifications of the 802.1Q Tag"
4963 " Identifier is not supported");
4964 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4965 action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4966 return rte_flow_error_set(error, ENOTSUP,
4967 RTE_FLOW_ERROR_TYPE_ACTION, action,
4968 "modifications of the VXLAN Network"
4969 " Identifier is not supported");
4970 if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4971 action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4972 return rte_flow_error_set(error, ENOTSUP,
4973 RTE_FLOW_ERROR_TYPE_ACTION, action,
4974 "modifications of the GENEVE Network"
4975 " Identifier is not supported");
4976 if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4977 action_modify_field->src.field == RTE_FLOW_FIELD_MARK ||
4978 action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4979 action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4980 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4981 !mlx5_flow_ext_mreg_supported(dev))
4982 return rte_flow_error_set(error, ENOTSUP,
4983 RTE_FLOW_ERROR_TYPE_ACTION, action,
4984 "cannot modify mark or metadata without"
4985 " extended metadata register support");
4987 if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4988 return rte_flow_error_set(error, ENOTSUP,
4989 RTE_FLOW_ERROR_TYPE_ACTION, action,
4990 "add and sub operations"
4991 " are not supported");
4992 return (action_modify_field->width / 32) +
4993 !!(action_modify_field->width % 32);
4997 * Validate jump action.
5000 * Pointer to the jump action.
5001 * @param[in] action_flags
5002 * Holds the actions detected until now.
5003 * @param[in] attributes
5004 * Pointer to flow attributes
5005 * @param[in] external
5006 * Action belongs to flow rule created by request external to PMD.
5008 * Pointer to error structure.
5011 * 0 on success, a negative errno value otherwise and rte_errno is set.
5014 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
5015 const struct mlx5_flow_tunnel *tunnel,
5016 const struct rte_flow_action *action,
5017 uint64_t action_flags,
5018 const struct rte_flow_attr *attributes,
5019 bool external, struct rte_flow_error *error)
5021 uint32_t target_group, table;
5023 struct flow_grp_info grp_info = {
5024 .external = !!external,
5025 .transfer = !!attributes->transfer,
5029 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5030 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5031 return rte_flow_error_set(error, EINVAL,
5032 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5033 "can't have 2 fate actions in"
5036 return rte_flow_error_set(error, EINVAL,
5037 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5038 NULL, "action configuration not set");
5040 ((const struct rte_flow_action_jump *)action->conf)->group;
5041 ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
5045 if (attributes->group == target_group &&
5046 !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
5047 MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5048 return rte_flow_error_set(error, EINVAL,
5049 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5050 "target group must be other than"
5051 " the current flow group");
5056 * Validate the port_id action.
5059 * Pointer to rte_eth_dev structure.
5060 * @param[in] action_flags
5061 * Bit-fields that holds the actions detected until now.
5063 * Port_id RTE action structure.
5065 * Attributes of flow that includes this action.
5067 * Pointer to error structure.
5070 * 0 on success, a negative errno value otherwise and rte_errno is set.
5073 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5074 uint64_t action_flags,
5075 const struct rte_flow_action *action,
5076 const struct rte_flow_attr *attr,
5077 struct rte_flow_error *error)
5079 const struct rte_flow_action_port_id *port_id;
5080 struct mlx5_priv *act_priv;
5081 struct mlx5_priv *dev_priv;
5084 if (!attr->transfer)
5085 return rte_flow_error_set(error, ENOTSUP,
5086 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5088 "port id action is valid in transfer"
5090 if (!action || !action->conf)
5091 return rte_flow_error_set(error, ENOTSUP,
5092 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5094 "port id action parameters must be"
5096 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5097 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5098 return rte_flow_error_set(error, EINVAL,
5099 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5100 "can have only one fate actions in"
5102 dev_priv = mlx5_dev_to_eswitch_info(dev);
5104 return rte_flow_error_set(error, rte_errno,
5105 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5107 "failed to obtain E-Switch info");
5108 port_id = action->conf;
5109 port = port_id->original ? dev->data->port_id : port_id->id;
5110 act_priv = mlx5_port_to_eswitch_info(port, false);
5112 return rte_flow_error_set
5114 RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
5115 "failed to obtain E-Switch port id for port");
5116 if (act_priv->domain_id != dev_priv->domain_id)
5117 return rte_flow_error_set
5119 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5120 "port does not belong to"
5121 " E-Switch being configured");
5126 * Get the maximum number of modify header actions.
5129 * Pointer to rte_eth_dev structure.
5131 * Whether action is on root table.
5134 * Max number of modify header actions device can support.
5136 static inline unsigned int
5137 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5141 * There's no way to directly query the max capacity from FW.
5142 * The maximal value on root table should be assumed to be supported.
5145 return MLX5_MAX_MODIFY_NUM;
5147 return MLX5_ROOT_TBL_MODIFY_NUM;
5151 * Validate the meter action.
5154 * Pointer to rte_eth_dev structure.
5155 * @param[in] action_flags
5156 * Bit-fields that holds the actions detected until now.
5158 * Pointer to the meter action.
5160 * Attributes of flow that includes this action.
5161 * @param[in] port_id_item
5162 * Pointer to item indicating port id.
5164 * Pointer to error structure.
5167 * 0 on success, a negative errno value otherwise and rte_ernno is set.
5170 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5171 uint64_t action_flags,
5172 const struct rte_flow_action *action,
5173 const struct rte_flow_attr *attr,
5174 const struct rte_flow_item *port_id_item,
5176 struct rte_flow_error *error)
5178 struct mlx5_priv *priv = dev->data->dev_private;
5179 const struct rte_flow_action_meter *am = action->conf;
5180 struct mlx5_flow_meter_info *fm;
5181 struct mlx5_flow_meter_policy *mtr_policy;
5182 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5185 return rte_flow_error_set(error, EINVAL,
5186 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5187 "meter action conf is NULL");
5189 if (action_flags & MLX5_FLOW_ACTION_METER)
5190 return rte_flow_error_set(error, ENOTSUP,
5191 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5192 "meter chaining not support");
5193 if (action_flags & MLX5_FLOW_ACTION_JUMP)
5194 return rte_flow_error_set(error, ENOTSUP,
5195 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5196 "meter with jump not support");
5198 return rte_flow_error_set(error, ENOTSUP,
5199 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5201 "meter action not supported");
5202 fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5204 return rte_flow_error_set(error, EINVAL,
5205 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5207 /* aso meter can always be shared by different domains */
5208 if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5209 !(fm->transfer == attr->transfer ||
5210 (!fm->ingress && !attr->ingress && attr->egress) ||
5211 (!fm->egress && !attr->egress && attr->ingress)))
5212 return rte_flow_error_set(error, EINVAL,
5213 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5214 "Flow attributes domain are either invalid "
5215 "or have a domain conflict with current "
5216 "meter attributes");
5217 if (fm->def_policy) {
5218 if (!((attr->transfer &&
5219 mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5221 mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5223 mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5224 return rte_flow_error_set(error, EINVAL,
5225 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5226 "Flow attributes domain "
5227 "have a conflict with current "
5228 "meter domain attributes");
5231 mtr_policy = mlx5_flow_meter_policy_find(dev,
5232 fm->policy_id, NULL);
5234 return rte_flow_error_set(error, EINVAL,
5235 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5236 "Invalid policy id for meter ");
5237 if (!((attr->transfer && mtr_policy->transfer) ||
5238 (attr->egress && mtr_policy->egress) ||
5239 (attr->ingress && mtr_policy->ingress)))
5240 return rte_flow_error_set(error, EINVAL,
5241 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5242 "Flow attributes domain "
5243 "have a conflict with current "
5244 "meter domain attributes");
5245 if (attr->transfer && mtr_policy->dev) {
5247 * When policy has fate action of port_id,
5248 * the flow should have the same src port as policy.
5250 struct mlx5_priv *policy_port_priv =
5251 mtr_policy->dev->data->dev_private;
5252 int32_t flow_src_port = priv->representor_id;
5255 const struct rte_flow_item_port_id *spec =
5257 struct mlx5_priv *port_priv =
5258 mlx5_port_to_eswitch_info(spec->id,
5261 return rte_flow_error_set(error,
5263 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5265 "Failed to get port info.");
5266 flow_src_port = port_priv->representor_id;
5268 if (flow_src_port != policy_port_priv->representor_id)
5269 return rte_flow_error_set(error,
5271 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5273 "Flow and meter policy "
5274 "have different src port.");
5276 *def_policy = false;
5282 * Validate the age action.
5284 * @param[in] action_flags
5285 * Holds the actions detected until now.
5287 * Pointer to the age action.
5289 * Pointer to the Ethernet device structure.
5291 * Pointer to error structure.
5294 * 0 on success, a negative errno value otherwise and rte_errno is set.
5297 flow_dv_validate_action_age(uint64_t action_flags,
5298 const struct rte_flow_action *action,
5299 struct rte_eth_dev *dev,
5300 struct rte_flow_error *error)
5302 struct mlx5_priv *priv = dev->data->dev_private;
5303 const struct rte_flow_action_age *age = action->conf;
5305 if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
5306 !priv->sh->aso_age_mng))
5307 return rte_flow_error_set(error, ENOTSUP,
5308 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5310 "age action not supported");
5311 if (!(action->conf))
5312 return rte_flow_error_set(error, EINVAL,
5313 RTE_FLOW_ERROR_TYPE_ACTION, action,
5314 "configuration cannot be null");
5315 if (!(age->timeout))
5316 return rte_flow_error_set(error, EINVAL,
5317 RTE_FLOW_ERROR_TYPE_ACTION, action,
5318 "invalid timeout value 0");
5319 if (action_flags & MLX5_FLOW_ACTION_AGE)
5320 return rte_flow_error_set(error, EINVAL,
5321 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5322 "duplicate age actions set");
5327 * Validate the modify-header IPv4 DSCP actions.
5329 * @param[in] action_flags
5330 * Holds the actions detected until now.
5332 * Pointer to the modify action.
5333 * @param[in] item_flags
5334 * Holds the items detected.
5336 * Pointer to error structure.
5339 * 0 on success, a negative errno value otherwise and rte_errno is set.
5342 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5343 const struct rte_flow_action *action,
5344 const uint64_t item_flags,
5345 struct rte_flow_error *error)
5349 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5351 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5352 return rte_flow_error_set(error, EINVAL,
5353 RTE_FLOW_ERROR_TYPE_ACTION,
5355 "no ipv4 item in pattern");
5361 * Validate the modify-header IPv6 DSCP actions.
5363 * @param[in] action_flags
5364 * Holds the actions detected until now.
5366 * Pointer to the modify action.
5367 * @param[in] item_flags
5368 * Holds the items detected.
5370 * Pointer to error structure.
5373 * 0 on success, a negative errno value otherwise and rte_errno is set.
5376 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5377 const struct rte_flow_action *action,
5378 const uint64_t item_flags,
5379 struct rte_flow_error *error)
5383 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5385 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5386 return rte_flow_error_set(error, EINVAL,
5387 RTE_FLOW_ERROR_TYPE_ACTION,
5389 "no ipv6 item in pattern");
5395 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5396 struct mlx5_list_entry *entry, void *cb_ctx)
5398 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5399 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5400 struct mlx5_flow_dv_modify_hdr_resource *resource =
5401 container_of(entry, typeof(*resource), entry);
5402 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5404 key_len += ref->actions_num * sizeof(ref->actions[0]);
5405 return ref->actions_num != resource->actions_num ||
5406 memcmp(&ref->ft_type, &resource->ft_type, key_len);
5409 static struct mlx5_indexed_pool *
5410 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5412 struct mlx5_indexed_pool *ipool = __atomic_load_n
5413 (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5416 struct mlx5_indexed_pool *expected = NULL;
5417 struct mlx5_indexed_pool_config cfg =
5418 (struct mlx5_indexed_pool_config) {
5419 .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5421 sizeof(struct mlx5_modification_cmd),
5426 .release_mem_en = !!sh->reclaim_mode,
5427 .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),
5428 .malloc = mlx5_malloc,
5430 .type = "mlx5_modify_action_resource",
5433 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5434 ipool = mlx5_ipool_create(&cfg);
5437 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5438 &expected, ipool, false,
5440 __ATOMIC_SEQ_CST)) {
5441 mlx5_ipool_destroy(ipool);
5442 ipool = __atomic_load_n(&sh->mdh_ipools[index],
5449 struct mlx5_list_entry *
5450 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5452 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5453 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5454 struct mlx5dv_dr_domain *ns;
5455 struct mlx5_flow_dv_modify_hdr_resource *entry;
5456 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5457 struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5458 ref->actions_num - 1);
5460 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5461 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5464 if (unlikely(!ipool)) {
5465 rte_flow_error_set(ctx->error, ENOMEM,
5466 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5467 NULL, "cannot allocate modify ipool");
5470 entry = mlx5_ipool_zmalloc(ipool, &idx);
5472 rte_flow_error_set(ctx->error, ENOMEM,
5473 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5474 "cannot allocate resource memory");
5477 rte_memcpy(&entry->ft_type,
5478 RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5479 key_len + data_len);
5480 if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5481 ns = sh->fdb_domain;
5482 else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5486 ret = mlx5_flow_os_create_flow_action_modify_header
5487 (sh->ctx, ns, entry,
5488 data_len, &entry->action);
5490 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5491 rte_flow_error_set(ctx->error, ENOMEM,
5492 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5493 NULL, "cannot create modification action");
5497 return &entry->entry;
5500 struct mlx5_list_entry *
5501 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5504 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5505 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5506 struct mlx5_flow_dv_modify_hdr_resource *entry;
5507 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5508 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5511 entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5514 rte_flow_error_set(ctx->error, ENOMEM,
5515 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5516 "cannot allocate resource memory");
5519 memcpy(entry, oentry, sizeof(*entry) + data_len);
5521 return &entry->entry;
5525 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5527 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5528 struct mlx5_flow_dv_modify_hdr_resource *res =
5529 container_of(entry, typeof(*res), entry);
5531 mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5535 * Validate the sample action.
5537 * @param[in, out] action_flags
5538 * Holds the actions detected until now.
5540 * Pointer to the sample action.
5542 * Pointer to the Ethernet device structure.
5544 * Attributes of flow that includes this action.
5545 * @param[in] item_flags
5546 * Holds the items detected.
5548 * Pointer to the RSS action.
5549 * @param[out] sample_rss
5550 * Pointer to the RSS action in sample action list.
5552 * Pointer to the COUNT action in sample action list.
5553 * @param[out] fdb_mirror_limit
5554 * Pointer to the FDB mirror limitation flag.
5556 * Pointer to error structure.
5559 * 0 on success, a negative errno value otherwise and rte_errno is set.
5562 flow_dv_validate_action_sample(uint64_t *action_flags,
5563 const struct rte_flow_action *action,
5564 struct rte_eth_dev *dev,
5565 const struct rte_flow_attr *attr,
5566 uint64_t item_flags,
5567 const struct rte_flow_action_rss *rss,
5568 const struct rte_flow_action_rss **sample_rss,
5569 const struct rte_flow_action_count **count,
5570 int *fdb_mirror_limit,
5571 struct rte_flow_error *error)
5573 struct mlx5_priv *priv = dev->data->dev_private;
5574 struct mlx5_dev_config *dev_conf = &priv->config;
5575 const struct rte_flow_action_sample *sample = action->conf;
5576 const struct rte_flow_action *act;
5577 uint64_t sub_action_flags = 0;
5578 uint16_t queue_index = 0xFFFF;
5583 return rte_flow_error_set(error, EINVAL,
5584 RTE_FLOW_ERROR_TYPE_ACTION, action,
5585 "configuration cannot be NULL");
5586 if (sample->ratio == 0)
5587 return rte_flow_error_set(error, EINVAL,
5588 RTE_FLOW_ERROR_TYPE_ACTION, action,
5589 "ratio value starts from 1");
5590 if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
5591 return rte_flow_error_set(error, ENOTSUP,
5592 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5594 "sample action not supported");
5595 if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5596 return rte_flow_error_set(error, EINVAL,
5597 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5598 "Multiple sample actions not "
5600 if (*action_flags & MLX5_FLOW_ACTION_METER)
5601 return rte_flow_error_set(error, EINVAL,
5602 RTE_FLOW_ERROR_TYPE_ACTION, action,
5603 "wrong action order, meter should "
5604 "be after sample action");
5605 if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5606 return rte_flow_error_set(error, EINVAL,
5607 RTE_FLOW_ERROR_TYPE_ACTION, action,
5608 "wrong action order, jump should "
5609 "be after sample action");
5610 act = sample->actions;
5611 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5612 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5613 return rte_flow_error_set(error, ENOTSUP,
5614 RTE_FLOW_ERROR_TYPE_ACTION,
5615 act, "too many actions");
5616 switch (act->type) {
5617 case RTE_FLOW_ACTION_TYPE_QUEUE:
5618 ret = mlx5_flow_validate_action_queue(act,
5624 queue_index = ((const struct rte_flow_action_queue *)
5625 (act->conf))->index;
5626 sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5629 case RTE_FLOW_ACTION_TYPE_RSS:
5630 *sample_rss = act->conf;
5631 ret = mlx5_flow_validate_action_rss(act,
5638 if (rss && *sample_rss &&
5639 ((*sample_rss)->level != rss->level ||
5640 (*sample_rss)->types != rss->types))
5641 return rte_flow_error_set(error, ENOTSUP,
5642 RTE_FLOW_ERROR_TYPE_ACTION,
5644 "Can't use the different RSS types "
5645 "or level in the same flow");
5646 if (*sample_rss != NULL && (*sample_rss)->queue_num)
5647 queue_index = (*sample_rss)->queue[0];
5648 sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5651 case RTE_FLOW_ACTION_TYPE_MARK:
5652 ret = flow_dv_validate_action_mark(dev, act,
5657 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5658 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5659 MLX5_FLOW_ACTION_MARK_EXT;
5661 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5664 case RTE_FLOW_ACTION_TYPE_COUNT:
5665 ret = flow_dv_validate_action_count
5666 (dev, is_shared_action_count(act),
5667 *action_flags | sub_action_flags,
5672 sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5673 *action_flags |= MLX5_FLOW_ACTION_COUNT;
5676 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5677 ret = flow_dv_validate_action_port_id(dev,
5684 sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5687 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5688 ret = flow_dv_validate_action_raw_encap_decap
5689 (dev, NULL, act->conf, attr, &sub_action_flags,
5690 &actions_n, action, item_flags, error);
5695 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5696 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5697 ret = flow_dv_validate_action_l2_encap(dev,
5703 sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5707 return rte_flow_error_set(error, ENOTSUP,
5708 RTE_FLOW_ERROR_TYPE_ACTION,
5710 "Doesn't support optional "
5714 if (attr->ingress && !attr->transfer) {
5715 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5716 MLX5_FLOW_ACTION_RSS)))
5717 return rte_flow_error_set(error, EINVAL,
5718 RTE_FLOW_ERROR_TYPE_ACTION,
5720 "Ingress must has a dest "
5721 "QUEUE for Sample");
5722 } else if (attr->egress && !attr->transfer) {
5723 return rte_flow_error_set(error, ENOTSUP,
5724 RTE_FLOW_ERROR_TYPE_ACTION,
5726 "Sample Only support Ingress "
5728 } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5729 MLX5_ASSERT(attr->transfer);
5730 if (sample->ratio > 1)
5731 return rte_flow_error_set(error, ENOTSUP,
5732 RTE_FLOW_ERROR_TYPE_ACTION,
5734 "E-Switch doesn't support "
5735 "any optional action "
5737 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5738 return rte_flow_error_set(error, ENOTSUP,
5739 RTE_FLOW_ERROR_TYPE_ACTION,
5741 "unsupported action QUEUE");
5742 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5743 return rte_flow_error_set(error, ENOTSUP,
5744 RTE_FLOW_ERROR_TYPE_ACTION,
5746 "unsupported action QUEUE");
5747 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5748 return rte_flow_error_set(error, EINVAL,
5749 RTE_FLOW_ERROR_TYPE_ACTION,
5751 "E-Switch must has a dest "
5752 "port for mirroring");
5753 if (!priv->config.hca_attr.reg_c_preserve &&
5754 priv->representor_id != UINT16_MAX)
5755 *fdb_mirror_limit = 1;
5757 /* Continue validation for Xcap actions.*/
5758 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5759 (queue_index == 0xFFFF ||
5760 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5761 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5762 MLX5_FLOW_XCAP_ACTIONS)
5763 return rte_flow_error_set(error, ENOTSUP,
5764 RTE_FLOW_ERROR_TYPE_ACTION,
5765 NULL, "encap and decap "
5766 "combination aren't "
5768 if (!attr->transfer && attr->ingress && (sub_action_flags &
5769 MLX5_FLOW_ACTION_ENCAP))
5770 return rte_flow_error_set(error, ENOTSUP,
5771 RTE_FLOW_ERROR_TYPE_ACTION,
5772 NULL, "encap is not supported"
5773 " for ingress traffic");
5779 * Find existing modify-header resource or create and register a new one.
5781 * @param dev[in, out]
5782 * Pointer to rte_eth_dev structure.
5783 * @param[in, out] resource
5784 * Pointer to modify-header resource.
5785 * @parm[in, out] dev_flow
5786 * Pointer to the dev_flow.
5788 * pointer to error structure.
5791 * 0 on success otherwise -errno and errno is set.
5794 flow_dv_modify_hdr_resource_register
5795 (struct rte_eth_dev *dev,
5796 struct mlx5_flow_dv_modify_hdr_resource *resource,
5797 struct mlx5_flow *dev_flow,
5798 struct rte_flow_error *error)
5800 struct mlx5_priv *priv = dev->data->dev_private;
5801 struct mlx5_dev_ctx_shared *sh = priv->sh;
5802 uint32_t key_len = sizeof(*resource) -
5803 offsetof(typeof(*resource), ft_type) +
5804 resource->actions_num * sizeof(resource->actions[0]);
5805 struct mlx5_list_entry *entry;
5806 struct mlx5_flow_cb_ctx ctx = {
5810 struct mlx5_hlist *modify_cmds;
5813 modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5815 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5817 flow_dv_modify_create_cb,
5818 flow_dv_modify_match_cb,
5819 flow_dv_modify_remove_cb,
5820 flow_dv_modify_clone_cb,
5821 flow_dv_modify_clone_free_cb);
5822 if (unlikely(!modify_cmds))
5824 resource->root = !dev_flow->dv.group;
5825 if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5827 return rte_flow_error_set(error, EOVERFLOW,
5828 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5829 "too many modify header items");
5830 key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5831 entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5834 resource = container_of(entry, typeof(*resource), entry);
5835 dev_flow->handle->dvh.modify_hdr = resource;
5840 * Get DV flow counter by index.
5843 * Pointer to the Ethernet device structure.
5845 * mlx5 flow counter index in the container.
5847 * mlx5 flow counter pool in the container.
5850 * Pointer to the counter, NULL otherwise.
5852 static struct mlx5_flow_counter *
5853 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5855 struct mlx5_flow_counter_pool **ppool)
5857 struct mlx5_priv *priv = dev->data->dev_private;
5858 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5859 struct mlx5_flow_counter_pool *pool;
5861 /* Decrease to original index and clear shared bit. */
5862 idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5863 MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5864 pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5868 return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5872 * Check the devx counter belongs to the pool.
5875 * Pointer to the counter pool.
5877 * The counter devx ID.
5880 * True if counter belongs to the pool, false otherwise.
5883 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5885 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5886 MLX5_COUNTERS_PER_POOL;
5888 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5894 * Get a pool by devx counter ID.
5897 * Pointer to the counter management.
5899 * The counter devx ID.
5902 * The counter pool pointer if exists, NULL otherwise,
5904 static struct mlx5_flow_counter_pool *
5905 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5908 struct mlx5_flow_counter_pool *pool = NULL;
5910 rte_spinlock_lock(&cmng->pool_update_sl);
5911 /* Check last used pool. */
5912 if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5913 flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5914 pool = cmng->pools[cmng->last_pool_idx];
5917 /* ID out of range means no suitable pool in the container. */
5918 if (id > cmng->max_id || id < cmng->min_id)
5921 * Find the pool from the end of the container, since mostly counter
5922 * ID is sequence increasing, and the last pool should be the needed
5927 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5929 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5935 rte_spinlock_unlock(&cmng->pool_update_sl);
5940 * Resize a counter container.
5943 * Pointer to the Ethernet device structure.
5946 * 0 on success, otherwise negative errno value and rte_errno is set.
5949 flow_dv_container_resize(struct rte_eth_dev *dev)
5951 struct mlx5_priv *priv = dev->data->dev_private;
5952 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5953 void *old_pools = cmng->pools;
5954 uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5955 uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5956 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5963 memcpy(pools, old_pools, cmng->n *
5964 sizeof(struct mlx5_flow_counter_pool *));
5966 cmng->pools = pools;
5968 mlx5_free(old_pools);
5973 * Query a devx flow counter.
5976 * Pointer to the Ethernet device structure.
5977 * @param[in] counter
5978 * Index to the flow counter.
5980 * The statistics value of packets.
5982 * The statistics value of bytes.
5985 * 0 on success, otherwise a negative errno value and rte_errno is set.
5988 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5991 struct mlx5_priv *priv = dev->data->dev_private;
5992 struct mlx5_flow_counter_pool *pool = NULL;
5993 struct mlx5_flow_counter *cnt;
5996 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5998 if (priv->sh->cmng.counter_fallback)
5999 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
6000 0, pkts, bytes, 0, NULL, NULL, 0);
6001 rte_spinlock_lock(&pool->sl);
6006 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
6007 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
6008 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
6010 rte_spinlock_unlock(&pool->sl);
6015 * Create and initialize a new counter pool.
6018 * Pointer to the Ethernet device structure.
6020 * The devX counter handle.
6022 * Whether the pool is for counter that was allocated for aging.
6023 * @param[in/out] cont_cur
6024 * Pointer to the container pointer, it will be update in pool resize.
6027 * The pool container pointer on success, NULL otherwise and rte_errno is set.
6029 static struct mlx5_flow_counter_pool *
6030 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6033 struct mlx5_priv *priv = dev->data->dev_private;
6034 struct mlx5_flow_counter_pool *pool;
6035 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6036 bool fallback = priv->sh->cmng.counter_fallback;
6037 uint32_t size = sizeof(*pool);
6039 size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6040 size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6041 pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6047 pool->is_aged = !!age;
6048 pool->query_gen = 0;
6049 pool->min_dcs = dcs;
6050 rte_spinlock_init(&pool->sl);
6051 rte_spinlock_init(&pool->csl);
6052 TAILQ_INIT(&pool->counters[0]);
6053 TAILQ_INIT(&pool->counters[1]);
6054 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6055 rte_spinlock_lock(&cmng->pool_update_sl);
6056 pool->index = cmng->n_valid;
6057 if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6059 rte_spinlock_unlock(&cmng->pool_update_sl);
6062 cmng->pools[pool->index] = pool;
6064 if (unlikely(fallback)) {
6065 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6067 if (base < cmng->min_id)
6068 cmng->min_id = base;
6069 if (base > cmng->max_id)
6070 cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6071 cmng->last_pool_idx = pool->index;
6073 rte_spinlock_unlock(&cmng->pool_update_sl);
6078 * Prepare a new counter and/or a new counter pool.
6081 * Pointer to the Ethernet device structure.
6082 * @param[out] cnt_free
6083 * Where to put the pointer of a new counter.
6085 * Whether the pool is for counter that was allocated for aging.
6088 * The counter pool pointer and @p cnt_free is set on success,
6089 * NULL otherwise and rte_errno is set.
6091 static struct mlx5_flow_counter_pool *
6092 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6093 struct mlx5_flow_counter **cnt_free,
6096 struct mlx5_priv *priv = dev->data->dev_private;
6097 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6098 struct mlx5_flow_counter_pool *pool;
6099 struct mlx5_counters tmp_tq;
6100 struct mlx5_devx_obj *dcs = NULL;
6101 struct mlx5_flow_counter *cnt;
6102 enum mlx5_counter_type cnt_type =
6103 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6104 bool fallback = priv->sh->cmng.counter_fallback;
6108 /* bulk_bitmap must be 0 for single counter allocation. */
6109 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
6112 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6114 pool = flow_dv_pool_create(dev, dcs, age);
6116 mlx5_devx_cmd_destroy(dcs);
6120 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6121 cnt = MLX5_POOL_GET_CNT(pool, i);
6123 cnt->dcs_when_free = dcs;
6127 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
6129 rte_errno = ENODATA;
6132 pool = flow_dv_pool_create(dev, dcs, age);
6134 mlx5_devx_cmd_destroy(dcs);
6137 TAILQ_INIT(&tmp_tq);
6138 for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6139 cnt = MLX5_POOL_GET_CNT(pool, i);
6141 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6143 rte_spinlock_lock(&cmng->csl[cnt_type]);
6144 TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6145 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6146 *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6147 (*cnt_free)->pool = pool;
6152 * Allocate a flow counter.
6155 * Pointer to the Ethernet device structure.
6157 * Whether the counter was allocated for aging.
6160 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6163 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6165 struct mlx5_priv *priv = dev->data->dev_private;
6166 struct mlx5_flow_counter_pool *pool = NULL;
6167 struct mlx5_flow_counter *cnt_free = NULL;
6168 bool fallback = priv->sh->cmng.counter_fallback;
6169 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6170 enum mlx5_counter_type cnt_type =
6171 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6174 if (!priv->config.devx) {
6175 rte_errno = ENOTSUP;
6178 /* Get free counters from container. */
6179 rte_spinlock_lock(&cmng->csl[cnt_type]);
6180 cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6182 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6183 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6184 if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6186 pool = cnt_free->pool;
6188 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6189 /* Create a DV counter action only in the first time usage. */
6190 if (!cnt_free->action) {
6192 struct mlx5_devx_obj *dcs;
6196 offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6197 dcs = pool->min_dcs;
6200 dcs = cnt_free->dcs_when_free;
6202 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6209 cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6210 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6211 /* Update the counter reset values. */
6212 if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6215 if (!fallback && !priv->sh->cmng.query_thread_on)
6216 /* Start the asynchronous batch query by the host thread. */
6217 mlx5_set_query_alarm(priv->sh);
6219 * When the count action isn't shared (by ID), shared_info field is
6220 * used for indirect action API's refcnt.
6221 * When the counter action is not shared neither by ID nor by indirect
6222 * action API, shared info must be 1.
6224 cnt_free->shared_info.refcnt = 1;
6228 cnt_free->pool = pool;
6230 cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6231 rte_spinlock_lock(&cmng->csl[cnt_type]);
6232 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6233 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6239 * Allocate a shared flow counter.
6242 * Pointer to the shared counter configuration.
6244 * Pointer to save the allocated counter index.
6247 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6251 flow_dv_counter_alloc_shared_cb(void *ctx, union mlx5_l3t_data *data)
6253 struct mlx5_shared_counter_conf *conf = ctx;
6254 struct rte_eth_dev *dev = conf->dev;
6255 struct mlx5_flow_counter *cnt;
6257 data->dword = flow_dv_counter_alloc(dev, 0);
6258 data->dword |= MLX5_CNT_SHARED_OFFSET;
6259 cnt = flow_dv_counter_get_by_idx(dev, data->dword, NULL);
6260 cnt->shared_info.id = conf->id;
6265 * Get a shared flow counter.
6268 * Pointer to the Ethernet device structure.
6270 * Counter identifier.
6273 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6276 flow_dv_counter_get_shared(struct rte_eth_dev *dev, uint32_t id)
6278 struct mlx5_priv *priv = dev->data->dev_private;
6279 struct mlx5_shared_counter_conf conf = {
6283 union mlx5_l3t_data data = {
6287 mlx5_l3t_prepare_entry(priv->sh->cnt_id_tbl, id, &data,
6288 flow_dv_counter_alloc_shared_cb, &conf);
6293 * Get age param from counter index.
6296 * Pointer to the Ethernet device structure.
6297 * @param[in] counter
6298 * Index to the counter handler.
6301 * The aging parameter specified for the counter index.
6303 static struct mlx5_age_param*
6304 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6307 struct mlx5_flow_counter *cnt;
6308 struct mlx5_flow_counter_pool *pool = NULL;
6310 flow_dv_counter_get_by_idx(dev, counter, &pool);
6311 counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6312 cnt = MLX5_POOL_GET_CNT(pool, counter);
6313 return MLX5_CNT_TO_AGE(cnt);
6317 * Remove a flow counter from aged counter list.
6320 * Pointer to the Ethernet device structure.
6321 * @param[in] counter
6322 * Index to the counter handler.
6324 * Pointer to the counter handler.
6327 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6328 uint32_t counter, struct mlx5_flow_counter *cnt)
6330 struct mlx5_age_info *age_info;
6331 struct mlx5_age_param *age_param;
6332 struct mlx5_priv *priv = dev->data->dev_private;
6333 uint16_t expected = AGE_CANDIDATE;
6335 age_info = GET_PORT_AGE_INFO(priv);
6336 age_param = flow_dv_counter_idx_get_age(dev, counter);
6337 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6338 AGE_FREE, false, __ATOMIC_RELAXED,
6339 __ATOMIC_RELAXED)) {
6341 * We need the lock even it is age timeout,
6342 * since counter may still in process.
6344 rte_spinlock_lock(&age_info->aged_sl);
6345 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6346 rte_spinlock_unlock(&age_info->aged_sl);
6347 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6352 * Release a flow counter.
6355 * Pointer to the Ethernet device structure.
6356 * @param[in] counter
6357 * Index to the counter handler.
6360 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6362 struct mlx5_priv *priv = dev->data->dev_private;
6363 struct mlx5_flow_counter_pool *pool = NULL;
6364 struct mlx5_flow_counter *cnt;
6365 enum mlx5_counter_type cnt_type;
6369 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6371 if (pool->is_aged) {
6372 flow_dv_counter_remove_from_age(dev, counter, cnt);
6375 * If the counter action is shared by ID, the l3t_clear_entry
6376 * function reduces its references counter. If after the
6377 * reduction the action is still referenced, the function
6378 * returns here and does not release it.
6380 if (IS_LEGACY_SHARED_CNT(counter) &&
6381 mlx5_l3t_clear_entry(priv->sh->cnt_id_tbl,
6382 cnt->shared_info.id))
6385 * If the counter action is shared by indirect action API,
6386 * the atomic function reduces its references counter.
6387 * If after the reduction the action is still referenced, the
6388 * function returns here and does not release it.
6389 * When the counter action is not shared neither by ID nor by
6390 * indirect action API, shared info is 1 before the reduction,
6391 * so this condition is failed and function doesn't return here.
6393 if (!IS_LEGACY_SHARED_CNT(counter) &&
6394 __atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6400 * Put the counter back to list to be updated in none fallback mode.
6401 * Currently, we are using two list alternately, while one is in query,
6402 * add the freed counter to the other list based on the pool query_gen
6403 * value. After query finishes, add counter the list to the global
6404 * container counter list. The list changes while query starts. In
6405 * this case, lock will not be needed as query callback and release
6406 * function both operate with the different list.
6408 if (!priv->sh->cmng.counter_fallback) {
6409 rte_spinlock_lock(&pool->csl);
6410 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6411 rte_spinlock_unlock(&pool->csl);
6413 cnt->dcs_when_free = cnt->dcs_when_active;
6414 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6415 MLX5_COUNTER_TYPE_ORIGIN;
6416 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6417 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6419 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6424 * Resize a meter id container.
6427 * Pointer to the Ethernet device structure.
6430 * 0 on success, otherwise negative errno value and rte_errno is set.
6433 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6435 struct mlx5_priv *priv = dev->data->dev_private;
6436 struct mlx5_aso_mtr_pools_mng *pools_mng =
6437 &priv->sh->mtrmng->pools_mng;
6438 void *old_pools = pools_mng->pools;
6439 uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6440 uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6441 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6448 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6453 memcpy(pools, old_pools, pools_mng->n *
6454 sizeof(struct mlx5_aso_mtr_pool *));
6455 pools_mng->n = resize;
6456 pools_mng->pools = pools;
6458 mlx5_free(old_pools);
6463 * Prepare a new meter and/or a new meter pool.
6466 * Pointer to the Ethernet device structure.
6467 * @param[out] mtr_free
6468 * Where to put the pointer of a new meter.g.
6471 * The meter pool pointer and @mtr_free is set on success,
6472 * NULL otherwise and rte_errno is set.
6474 static struct mlx5_aso_mtr_pool *
6475 flow_dv_mtr_pool_create(struct rte_eth_dev *dev,
6476 struct mlx5_aso_mtr **mtr_free)
6478 struct mlx5_priv *priv = dev->data->dev_private;
6479 struct mlx5_aso_mtr_pools_mng *pools_mng =
6480 &priv->sh->mtrmng->pools_mng;
6481 struct mlx5_aso_mtr_pool *pool = NULL;
6482 struct mlx5_devx_obj *dcs = NULL;
6484 uint32_t log_obj_size;
6486 log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6487 dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->ctx,
6488 priv->sh->pdn, log_obj_size);
6490 rte_errno = ENODATA;
6493 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6496 claim_zero(mlx5_devx_cmd_destroy(dcs));
6499 pool->devx_obj = dcs;
6500 pool->index = pools_mng->n_valid;
6501 if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6503 claim_zero(mlx5_devx_cmd_destroy(dcs));
6506 pools_mng->pools[pool->index] = pool;
6507 pools_mng->n_valid++;
6508 for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6509 pool->mtrs[i].offset = i;
6510 LIST_INSERT_HEAD(&pools_mng->meters,
6511 &pool->mtrs[i], next);
6513 pool->mtrs[0].offset = 0;
6514 *mtr_free = &pool->mtrs[0];
6519 * Release a flow meter into pool.
6522 * Pointer to the Ethernet device structure.
6523 * @param[in] mtr_idx
6524 * Index to aso flow meter.
6527 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6529 struct mlx5_priv *priv = dev->data->dev_private;
6530 struct mlx5_aso_mtr_pools_mng *pools_mng =
6531 &priv->sh->mtrmng->pools_mng;
6532 struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6534 MLX5_ASSERT(aso_mtr);
6535 rte_spinlock_lock(&pools_mng->mtrsl);
6536 memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6537 aso_mtr->state = ASO_METER_FREE;
6538 LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6539 rte_spinlock_unlock(&pools_mng->mtrsl);
6543 * Allocate a aso flow meter.
6546 * Pointer to the Ethernet device structure.
6549 * Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6552 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6554 struct mlx5_priv *priv = dev->data->dev_private;
6555 struct mlx5_aso_mtr *mtr_free = NULL;
6556 struct mlx5_aso_mtr_pools_mng *pools_mng =
6557 &priv->sh->mtrmng->pools_mng;
6558 struct mlx5_aso_mtr_pool *pool;
6559 uint32_t mtr_idx = 0;
6561 if (!priv->config.devx) {
6562 rte_errno = ENOTSUP;
6565 /* Allocate the flow meter memory. */
6566 /* Get free meters from management. */
6567 rte_spinlock_lock(&pools_mng->mtrsl);
6568 mtr_free = LIST_FIRST(&pools_mng->meters);
6570 LIST_REMOVE(mtr_free, next);
6571 if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6572 rte_spinlock_unlock(&pools_mng->mtrsl);
6575 mtr_free->state = ASO_METER_WAIT;
6576 rte_spinlock_unlock(&pools_mng->mtrsl);
6577 pool = container_of(mtr_free,
6578 struct mlx5_aso_mtr_pool,
6579 mtrs[mtr_free->offset]);
6580 mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6581 if (!mtr_free->fm.meter_action) {
6582 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6583 struct rte_flow_error error;
6586 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6587 mtr_free->fm.meter_action =
6588 mlx5_glue->dv_create_flow_action_aso
6589 (priv->sh->rx_domain,
6590 pool->devx_obj->obj,
6592 (1 << MLX5_FLOW_COLOR_GREEN),
6594 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6595 if (!mtr_free->fm.meter_action) {
6596 flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6604 * Verify the @p attributes will be correctly understood by the NIC and store
6605 * them in the @p flow if everything is correct.
6608 * Pointer to dev struct.
6609 * @param[in] attributes
6610 * Pointer to flow attributes
6611 * @param[in] external
6612 * This flow rule is created by request external to PMD.
6614 * Pointer to error structure.
6617 * - 0 on success and non root table.
6618 * - 1 on success and root table.
6619 * - a negative errno value otherwise and rte_errno is set.
6622 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6623 const struct mlx5_flow_tunnel *tunnel,
6624 const struct rte_flow_attr *attributes,
6625 const struct flow_grp_info *grp_info,
6626 struct rte_flow_error *error)
6628 struct mlx5_priv *priv = dev->data->dev_private;
6629 uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6632 #ifndef HAVE_MLX5DV_DR
6633 RTE_SET_USED(tunnel);
6634 RTE_SET_USED(grp_info);
6635 if (attributes->group)
6636 return rte_flow_error_set(error, ENOTSUP,
6637 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6639 "groups are not supported");
6643 ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6648 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6650 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6651 attributes->priority > lowest_priority)
6652 return rte_flow_error_set(error, ENOTSUP,
6653 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6655 "priority out of range");
6656 if (attributes->transfer) {
6657 if (!priv->config.dv_esw_en)
6658 return rte_flow_error_set
6660 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6661 "E-Switch dr is not supported");
6662 if (!(priv->representor || priv->master))
6663 return rte_flow_error_set
6664 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6665 NULL, "E-Switch configuration can only be"
6666 " done by a master or a representor device");
6667 if (attributes->egress)
6668 return rte_flow_error_set
6670 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6671 "egress is not supported");
6673 if (!(attributes->egress ^ attributes->ingress))
6674 return rte_flow_error_set(error, ENOTSUP,
6675 RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6676 "must specify exactly one of "
6677 "ingress or egress");
6682 mlx5_flow_locate_proto_l3(const struct rte_flow_item **head,
6683 const struct rte_flow_item *end)
6685 const struct rte_flow_item *item = *head;
6686 uint16_t l3_protocol;
6688 for (; item != end; item++) {
6689 switch (item->type) {
6692 case RTE_FLOW_ITEM_TYPE_IPV4:
6693 l3_protocol = RTE_ETHER_TYPE_IPV4;
6695 case RTE_FLOW_ITEM_TYPE_IPV6:
6696 l3_protocol = RTE_ETHER_TYPE_IPV6;
6698 case RTE_FLOW_ITEM_TYPE_ETH:
6699 if (item->mask && item->spec) {
6700 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_eth,
6703 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6704 l3_protocol == RTE_ETHER_TYPE_IPV6)
6708 case RTE_FLOW_ITEM_TYPE_VLAN:
6709 if (item->mask && item->spec) {
6710 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_vlan,
6713 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6714 l3_protocol == RTE_ETHER_TYPE_IPV6)
6727 mlx5_flow_locate_proto_l4(const struct rte_flow_item **head,
6728 const struct rte_flow_item *end)
6730 const struct rte_flow_item *item = *head;
6731 uint8_t l4_protocol;
6733 for (; item != end; item++) {
6734 switch (item->type) {
6737 case RTE_FLOW_ITEM_TYPE_TCP:
6738 l4_protocol = IPPROTO_TCP;
6740 case RTE_FLOW_ITEM_TYPE_UDP:
6741 l4_protocol = IPPROTO_UDP;
6743 case RTE_FLOW_ITEM_TYPE_IPV4:
6744 if (item->mask && item->spec) {
6745 const struct rte_flow_item_ipv4 *mask, *spec;
6747 mask = (typeof(mask))item->mask;
6748 spec = (typeof(spec))item->spec;
6749 l4_protocol = mask->hdr.next_proto_id &
6750 spec->hdr.next_proto_id;
6751 if (l4_protocol == IPPROTO_TCP ||
6752 l4_protocol == IPPROTO_UDP)
6756 case RTE_FLOW_ITEM_TYPE_IPV6:
6757 if (item->mask && item->spec) {
6758 const struct rte_flow_item_ipv6 *mask, *spec;
6759 mask = (typeof(mask))item->mask;
6760 spec = (typeof(spec))item->spec;
6761 l4_protocol = mask->hdr.proto & spec->hdr.proto;
6762 if (l4_protocol == IPPROTO_TCP ||
6763 l4_protocol == IPPROTO_UDP)
6776 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6777 const struct rte_flow_item *rule_items,
6778 const struct rte_flow_item *integrity_item,
6779 struct rte_flow_error *error)
6781 struct mlx5_priv *priv = dev->data->dev_private;
6782 const struct rte_flow_item *tunnel_item, *end_item, *item = rule_items;
6783 const struct rte_flow_item_integrity *mask = (typeof(mask))
6784 integrity_item->mask;
6785 const struct rte_flow_item_integrity *spec = (typeof(spec))
6786 integrity_item->spec;
6789 if (!priv->config.hca_attr.pkt_integrity_match)
6790 return rte_flow_error_set(error, ENOTSUP,
6791 RTE_FLOW_ERROR_TYPE_ITEM,
6793 "packet integrity integrity_item not supported");
6795 mask = &rte_flow_item_integrity_mask;
6796 if (!mlx5_validate_integrity_item(mask))
6797 return rte_flow_error_set(error, ENOTSUP,
6798 RTE_FLOW_ERROR_TYPE_ITEM,
6800 "unsupported integrity filter");
6801 tunnel_item = mlx5_flow_find_tunnel_item(rule_items);
6802 if (spec->level > 1) {
6804 return rte_flow_error_set(error, ENOTSUP,
6805 RTE_FLOW_ERROR_TYPE_ITEM,
6807 "missing tunnel item");
6809 end_item = mlx5_find_end_item(tunnel_item);
6811 end_item = tunnel_item ? tunnel_item :
6812 mlx5_find_end_item(integrity_item);
6814 if (mask->l3_ok || mask->ipv4_csum_ok) {
6815 protocol = mlx5_flow_locate_proto_l3(&item, end_item);
6817 return rte_flow_error_set(error, EINVAL,
6818 RTE_FLOW_ERROR_TYPE_ITEM,
6820 "missing L3 protocol");
6822 if (mask->l4_ok || mask->l4_csum_ok) {
6823 protocol = mlx5_flow_locate_proto_l4(&item, end_item);
6825 return rte_flow_error_set(error, EINVAL,
6826 RTE_FLOW_ERROR_TYPE_ITEM,
6828 "missing L4 protocol");
6834 * Internal validation function. For validating both actions and items.
6837 * Pointer to the rte_eth_dev structure.
6839 * Pointer to the flow attributes.
6841 * Pointer to the list of items.
6842 * @param[in] actions
6843 * Pointer to the list of actions.
6844 * @param[in] external
6845 * This flow rule is created by request external to PMD.
6846 * @param[in] hairpin
6847 * Number of hairpin TX actions, 0 means classic flow.
6849 * Pointer to the error structure.
6852 * 0 on success, a negative errno value otherwise and rte_errno is set.
6855 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6856 const struct rte_flow_item items[],
6857 const struct rte_flow_action actions[],
6858 bool external, int hairpin, struct rte_flow_error *error)
6861 uint64_t action_flags = 0;
6862 uint64_t item_flags = 0;
6863 uint64_t last_item = 0;
6864 uint8_t next_protocol = 0xff;
6865 uint16_t ether_type = 0;
6867 uint8_t item_ipv6_proto = 0;
6868 int fdb_mirror_limit = 0;
6869 int modify_after_mirror = 0;
6870 const struct rte_flow_item *geneve_item = NULL;
6871 const struct rte_flow_item *gre_item = NULL;
6872 const struct rte_flow_item *gtp_item = NULL;
6873 const struct rte_flow_action_raw_decap *decap;
6874 const struct rte_flow_action_raw_encap *encap;
6875 const struct rte_flow_action_rss *rss = NULL;
6876 const struct rte_flow_action_rss *sample_rss = NULL;
6877 const struct rte_flow_action_count *sample_count = NULL;
6878 const struct rte_flow_item_tcp nic_tcp_mask = {
6881 .src_port = RTE_BE16(UINT16_MAX),
6882 .dst_port = RTE_BE16(UINT16_MAX),
6885 const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6888 "\xff\xff\xff\xff\xff\xff\xff\xff"
6889 "\xff\xff\xff\xff\xff\xff\xff\xff",
6891 "\xff\xff\xff\xff\xff\xff\xff\xff"
6892 "\xff\xff\xff\xff\xff\xff\xff\xff",
6893 .vtc_flow = RTE_BE32(0xffffffff),
6899 const struct rte_flow_item_ecpri nic_ecpri_mask = {
6903 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6907 .dummy[0] = 0xffffffff,
6910 struct mlx5_priv *priv = dev->data->dev_private;
6911 struct mlx5_dev_config *dev_conf = &priv->config;
6912 uint16_t queue_index = 0xFFFF;
6913 const struct rte_flow_item_vlan *vlan_m = NULL;
6914 uint32_t rw_act_num = 0;
6916 const struct mlx5_flow_tunnel *tunnel;
6917 enum mlx5_tof_rule_type tof_rule_type;
6918 struct flow_grp_info grp_info = {
6919 .external = !!external,
6920 .transfer = !!attr->transfer,
6921 .fdb_def_rule = !!priv->fdb_def_rule,
6922 .std_tbl_fix = true,
6924 const struct rte_eth_hairpin_conf *conf;
6925 const struct rte_flow_item *rule_items = items;
6926 const struct rte_flow_item *port_id_item = NULL;
6927 bool def_policy = false;
6931 tunnel = is_tunnel_offload_active(dev) ?
6932 mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6934 if (priv->representor)
6935 return rte_flow_error_set
6937 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6938 NULL, "decap not supported for VF representor");
6939 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6940 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6941 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6942 action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6943 MLX5_FLOW_ACTION_DECAP;
6944 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6945 (dev, attr, tunnel, tof_rule_type);
6947 ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6950 is_root = (uint64_t)ret;
6951 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6952 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6953 int type = items->type;
6955 if (!mlx5_flow_os_item_supported(type))
6956 return rte_flow_error_set(error, ENOTSUP,
6957 RTE_FLOW_ERROR_TYPE_ITEM,
6958 NULL, "item not supported");
6960 case RTE_FLOW_ITEM_TYPE_VOID:
6962 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6963 ret = flow_dv_validate_item_port_id
6964 (dev, items, attr, item_flags, error);
6967 last_item = MLX5_FLOW_ITEM_PORT_ID;
6968 port_id_item = items;
6970 case RTE_FLOW_ITEM_TYPE_ETH:
6971 ret = mlx5_flow_validate_item_eth(items, item_flags,
6975 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6976 MLX5_FLOW_LAYER_OUTER_L2;
6977 if (items->mask != NULL && items->spec != NULL) {
6979 ((const struct rte_flow_item_eth *)
6982 ((const struct rte_flow_item_eth *)
6984 ether_type = rte_be_to_cpu_16(ether_type);
6989 case RTE_FLOW_ITEM_TYPE_VLAN:
6990 ret = flow_dv_validate_item_vlan(items, item_flags,
6994 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6995 MLX5_FLOW_LAYER_OUTER_VLAN;
6996 if (items->mask != NULL && items->spec != NULL) {
6998 ((const struct rte_flow_item_vlan *)
6999 items->spec)->inner_type;
7001 ((const struct rte_flow_item_vlan *)
7002 items->mask)->inner_type;
7003 ether_type = rte_be_to_cpu_16(ether_type);
7007 /* Store outer VLAN mask for of_push_vlan action. */
7009 vlan_m = items->mask;
7011 case RTE_FLOW_ITEM_TYPE_IPV4:
7012 mlx5_flow_tunnel_ip_check(items, next_protocol,
7013 &item_flags, &tunnel);
7014 ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
7015 last_item, ether_type,
7019 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7020 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7021 if (items->mask != NULL &&
7022 ((const struct rte_flow_item_ipv4 *)
7023 items->mask)->hdr.next_proto_id) {
7025 ((const struct rte_flow_item_ipv4 *)
7026 (items->spec))->hdr.next_proto_id;
7028 ((const struct rte_flow_item_ipv4 *)
7029 (items->mask))->hdr.next_proto_id;
7031 /* Reset for inner layer. */
7032 next_protocol = 0xff;
7035 case RTE_FLOW_ITEM_TYPE_IPV6:
7036 mlx5_flow_tunnel_ip_check(items, next_protocol,
7037 &item_flags, &tunnel);
7038 ret = mlx5_flow_validate_item_ipv6(items, item_flags,
7045 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7046 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7047 if (items->mask != NULL &&
7048 ((const struct rte_flow_item_ipv6 *)
7049 items->mask)->hdr.proto) {
7051 ((const struct rte_flow_item_ipv6 *)
7052 items->spec)->hdr.proto;
7054 ((const struct rte_flow_item_ipv6 *)
7055 items->spec)->hdr.proto;
7057 ((const struct rte_flow_item_ipv6 *)
7058 items->mask)->hdr.proto;
7060 /* Reset for inner layer. */
7061 next_protocol = 0xff;
7064 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
7065 ret = flow_dv_validate_item_ipv6_frag_ext(items,
7070 last_item = tunnel ?
7071 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
7072 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
7073 if (items->mask != NULL &&
7074 ((const struct rte_flow_item_ipv6_frag_ext *)
7075 items->mask)->hdr.next_header) {
7077 ((const struct rte_flow_item_ipv6_frag_ext *)
7078 items->spec)->hdr.next_header;
7080 ((const struct rte_flow_item_ipv6_frag_ext *)
7081 items->mask)->hdr.next_header;
7083 /* Reset for inner layer. */
7084 next_protocol = 0xff;
7087 case RTE_FLOW_ITEM_TYPE_TCP:
7088 ret = mlx5_flow_validate_item_tcp
7095 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7096 MLX5_FLOW_LAYER_OUTER_L4_TCP;
7098 case RTE_FLOW_ITEM_TYPE_UDP:
7099 ret = mlx5_flow_validate_item_udp(items, item_flags,
7104 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7105 MLX5_FLOW_LAYER_OUTER_L4_UDP;
7107 case RTE_FLOW_ITEM_TYPE_GRE:
7108 ret = mlx5_flow_validate_item_gre(items, item_flags,
7109 next_protocol, error);
7113 last_item = MLX5_FLOW_LAYER_GRE;
7115 case RTE_FLOW_ITEM_TYPE_NVGRE:
7116 ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7121 last_item = MLX5_FLOW_LAYER_NVGRE;
7123 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7124 ret = mlx5_flow_validate_item_gre_key
7125 (items, item_flags, gre_item, error);
7128 last_item = MLX5_FLOW_LAYER_GRE_KEY;
7130 case RTE_FLOW_ITEM_TYPE_VXLAN:
7131 ret = mlx5_flow_validate_item_vxlan(dev, items,
7136 last_item = MLX5_FLOW_LAYER_VXLAN;
7138 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7139 ret = mlx5_flow_validate_item_vxlan_gpe(items,
7144 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7146 case RTE_FLOW_ITEM_TYPE_GENEVE:
7147 ret = mlx5_flow_validate_item_geneve(items,
7152 geneve_item = items;
7153 last_item = MLX5_FLOW_LAYER_GENEVE;
7155 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7156 ret = mlx5_flow_validate_item_geneve_opt(items,
7163 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7165 case RTE_FLOW_ITEM_TYPE_MPLS:
7166 ret = mlx5_flow_validate_item_mpls(dev, items,
7171 last_item = MLX5_FLOW_LAYER_MPLS;
7174 case RTE_FLOW_ITEM_TYPE_MARK:
7175 ret = flow_dv_validate_item_mark(dev, items, attr,
7179 last_item = MLX5_FLOW_ITEM_MARK;
7181 case RTE_FLOW_ITEM_TYPE_META:
7182 ret = flow_dv_validate_item_meta(dev, items, attr,
7186 last_item = MLX5_FLOW_ITEM_METADATA;
7188 case RTE_FLOW_ITEM_TYPE_ICMP:
7189 ret = mlx5_flow_validate_item_icmp(items, item_flags,
7194 last_item = MLX5_FLOW_LAYER_ICMP;
7196 case RTE_FLOW_ITEM_TYPE_ICMP6:
7197 ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7202 item_ipv6_proto = IPPROTO_ICMPV6;
7203 last_item = MLX5_FLOW_LAYER_ICMP6;
7205 case RTE_FLOW_ITEM_TYPE_TAG:
7206 ret = flow_dv_validate_item_tag(dev, items,
7210 last_item = MLX5_FLOW_ITEM_TAG;
7212 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7213 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7215 case RTE_FLOW_ITEM_TYPE_GTP:
7216 ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7221 last_item = MLX5_FLOW_LAYER_GTP;
7223 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7224 ret = flow_dv_validate_item_gtp_psc(items, last_item,
7229 last_item = MLX5_FLOW_LAYER_GTP_PSC;
7231 case RTE_FLOW_ITEM_TYPE_ECPRI:
7232 /* Capacity will be checked in the translate stage. */
7233 ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7240 last_item = MLX5_FLOW_LAYER_ECPRI;
7242 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7243 if (item_flags & MLX5_FLOW_ITEM_INTEGRITY)
7244 return rte_flow_error_set
7246 RTE_FLOW_ERROR_TYPE_ITEM,
7247 NULL, "multiple integrity items not supported");
7248 ret = flow_dv_validate_item_integrity(dev, rule_items,
7252 last_item = MLX5_FLOW_ITEM_INTEGRITY;
7254 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7255 ret = flow_dv_validate_item_aso_ct(dev, items,
7256 &item_flags, error);
7260 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7261 /* tunnel offload item was processed before
7262 * list it here as a supported type
7266 return rte_flow_error_set(error, ENOTSUP,
7267 RTE_FLOW_ERROR_TYPE_ITEM,
7268 NULL, "item not supported");
7270 item_flags |= last_item;
7272 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7273 int type = actions->type;
7274 bool shared_count = false;
7276 if (!mlx5_flow_os_action_supported(type))
7277 return rte_flow_error_set(error, ENOTSUP,
7278 RTE_FLOW_ERROR_TYPE_ACTION,
7280 "action not supported");
7281 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7282 return rte_flow_error_set(error, ENOTSUP,
7283 RTE_FLOW_ERROR_TYPE_ACTION,
7284 actions, "too many actions");
7286 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7287 return rte_flow_error_set(error, ENOTSUP,
7288 RTE_FLOW_ERROR_TYPE_ACTION,
7289 NULL, "meter action with policy "
7290 "must be the last action");
7292 case RTE_FLOW_ACTION_TYPE_VOID:
7294 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7295 ret = flow_dv_validate_action_port_id(dev,
7302 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7305 case RTE_FLOW_ACTION_TYPE_FLAG:
7306 ret = flow_dv_validate_action_flag(dev, action_flags,
7310 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7311 /* Count all modify-header actions as one. */
7312 if (!(action_flags &
7313 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7315 action_flags |= MLX5_FLOW_ACTION_FLAG |
7316 MLX5_FLOW_ACTION_MARK_EXT;
7317 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7318 modify_after_mirror = 1;
7321 action_flags |= MLX5_FLOW_ACTION_FLAG;
7324 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7326 case RTE_FLOW_ACTION_TYPE_MARK:
7327 ret = flow_dv_validate_action_mark(dev, actions,
7332 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7333 /* Count all modify-header actions as one. */
7334 if (!(action_flags &
7335 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7337 action_flags |= MLX5_FLOW_ACTION_MARK |
7338 MLX5_FLOW_ACTION_MARK_EXT;
7339 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7340 modify_after_mirror = 1;
7342 action_flags |= MLX5_FLOW_ACTION_MARK;
7345 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7347 case RTE_FLOW_ACTION_TYPE_SET_META:
7348 ret = flow_dv_validate_action_set_meta(dev, actions,
7353 /* Count all modify-header actions as one action. */
7354 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7356 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7357 modify_after_mirror = 1;
7358 action_flags |= MLX5_FLOW_ACTION_SET_META;
7359 rw_act_num += MLX5_ACT_NUM_SET_META;
7361 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7362 ret = flow_dv_validate_action_set_tag(dev, actions,
7367 /* Count all modify-header actions as one action. */
7368 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7370 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7371 modify_after_mirror = 1;
7372 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7373 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7375 case RTE_FLOW_ACTION_TYPE_DROP:
7376 ret = mlx5_flow_validate_action_drop(action_flags,
7380 action_flags |= MLX5_FLOW_ACTION_DROP;
7383 case RTE_FLOW_ACTION_TYPE_QUEUE:
7384 ret = mlx5_flow_validate_action_queue(actions,
7389 queue_index = ((const struct rte_flow_action_queue *)
7390 (actions->conf))->index;
7391 action_flags |= MLX5_FLOW_ACTION_QUEUE;
7394 case RTE_FLOW_ACTION_TYPE_RSS:
7395 rss = actions->conf;
7396 ret = mlx5_flow_validate_action_rss(actions,
7402 if (rss && sample_rss &&
7403 (sample_rss->level != rss->level ||
7404 sample_rss->types != rss->types))
7405 return rte_flow_error_set(error, ENOTSUP,
7406 RTE_FLOW_ERROR_TYPE_ACTION,
7408 "Can't use the different RSS types "
7409 "or level in the same flow");
7410 if (rss != NULL && rss->queue_num)
7411 queue_index = rss->queue[0];
7412 action_flags |= MLX5_FLOW_ACTION_RSS;
7415 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7417 mlx5_flow_validate_action_default_miss(action_flags,
7421 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7424 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7425 case RTE_FLOW_ACTION_TYPE_COUNT:
7426 shared_count = is_shared_action_count(actions);
7427 ret = flow_dv_validate_action_count(dev, shared_count,
7432 action_flags |= MLX5_FLOW_ACTION_COUNT;
7435 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7436 if (flow_dv_validate_action_pop_vlan(dev,
7442 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7443 modify_after_mirror = 1;
7444 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7447 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7448 ret = flow_dv_validate_action_push_vlan(dev,
7455 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7456 modify_after_mirror = 1;
7457 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7460 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7461 ret = flow_dv_validate_action_set_vlan_pcp
7462 (action_flags, actions, error);
7465 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7466 modify_after_mirror = 1;
7467 /* Count PCP with push_vlan command. */
7468 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7470 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7471 ret = flow_dv_validate_action_set_vlan_vid
7472 (item_flags, action_flags,
7476 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7477 modify_after_mirror = 1;
7478 /* Count VID with push_vlan command. */
7479 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7480 rw_act_num += MLX5_ACT_NUM_MDF_VID;
7482 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7483 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7484 ret = flow_dv_validate_action_l2_encap(dev,
7490 action_flags |= MLX5_FLOW_ACTION_ENCAP;
7493 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7494 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7495 ret = flow_dv_validate_action_decap(dev, action_flags,
7496 actions, item_flags,
7500 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7501 modify_after_mirror = 1;
7502 action_flags |= MLX5_FLOW_ACTION_DECAP;
7505 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7506 ret = flow_dv_validate_action_raw_encap_decap
7507 (dev, NULL, actions->conf, attr, &action_flags,
7508 &actions_n, actions, item_flags, error);
7512 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7513 decap = actions->conf;
7514 while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7516 if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7520 encap = actions->conf;
7522 ret = flow_dv_validate_action_raw_encap_decap
7524 decap ? decap : &empty_decap, encap,
7525 attr, &action_flags, &actions_n,
7526 actions, item_flags, error);
7529 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7530 (action_flags & MLX5_FLOW_ACTION_DECAP))
7531 modify_after_mirror = 1;
7533 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7534 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7535 ret = flow_dv_validate_action_modify_mac(action_flags,
7541 /* Count all modify-header actions as one action. */
7542 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7544 action_flags |= actions->type ==
7545 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7546 MLX5_FLOW_ACTION_SET_MAC_SRC :
7547 MLX5_FLOW_ACTION_SET_MAC_DST;
7548 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7549 modify_after_mirror = 1;
7551 * Even if the source and destination MAC addresses have
7552 * overlap in the header with 4B alignment, the convert
7553 * function will handle them separately and 4 SW actions
7554 * will be created. And 2 actions will be added each
7555 * time no matter how many bytes of address will be set.
7557 rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7559 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7560 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7561 ret = flow_dv_validate_action_modify_ipv4(action_flags,
7567 /* Count all modify-header actions as one action. */
7568 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7570 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7571 modify_after_mirror = 1;
7572 action_flags |= actions->type ==
7573 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7574 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7575 MLX5_FLOW_ACTION_SET_IPV4_DST;
7576 rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7578 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7579 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7580 ret = flow_dv_validate_action_modify_ipv6(action_flags,
7586 if (item_ipv6_proto == IPPROTO_ICMPV6)
7587 return rte_flow_error_set(error, ENOTSUP,
7588 RTE_FLOW_ERROR_TYPE_ACTION,
7590 "Can't change header "
7591 "with ICMPv6 proto");
7592 /* Count all modify-header actions as one action. */
7593 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7595 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7596 modify_after_mirror = 1;
7597 action_flags |= actions->type ==
7598 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7599 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7600 MLX5_FLOW_ACTION_SET_IPV6_DST;
7601 rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7603 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7604 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7605 ret = flow_dv_validate_action_modify_tp(action_flags,
7611 /* Count all modify-header actions as one action. */
7612 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7614 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7615 modify_after_mirror = 1;
7616 action_flags |= actions->type ==
7617 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7618 MLX5_FLOW_ACTION_SET_TP_SRC :
7619 MLX5_FLOW_ACTION_SET_TP_DST;
7620 rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7622 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7623 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7624 ret = flow_dv_validate_action_modify_ttl(action_flags,
7630 /* Count all modify-header actions as one action. */
7631 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7633 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7634 modify_after_mirror = 1;
7635 action_flags |= actions->type ==
7636 RTE_FLOW_ACTION_TYPE_SET_TTL ?
7637 MLX5_FLOW_ACTION_SET_TTL :
7638 MLX5_FLOW_ACTION_DEC_TTL;
7639 rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7641 case RTE_FLOW_ACTION_TYPE_JUMP:
7642 ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7648 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7650 return rte_flow_error_set(error, EINVAL,
7651 RTE_FLOW_ERROR_TYPE_ACTION,
7653 "sample and jump action combination is not supported");
7655 action_flags |= MLX5_FLOW_ACTION_JUMP;
7657 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7658 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7659 ret = flow_dv_validate_action_modify_tcp_seq
7666 /* Count all modify-header actions as one action. */
7667 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7669 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7670 modify_after_mirror = 1;
7671 action_flags |= actions->type ==
7672 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7673 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7674 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7675 rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7677 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7678 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7679 ret = flow_dv_validate_action_modify_tcp_ack
7686 /* Count all modify-header actions as one action. */
7687 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7689 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7690 modify_after_mirror = 1;
7691 action_flags |= actions->type ==
7692 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7693 MLX5_FLOW_ACTION_INC_TCP_ACK :
7694 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7695 rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7697 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7699 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7700 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7701 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7703 case RTE_FLOW_ACTION_TYPE_METER:
7704 ret = mlx5_flow_validate_action_meter(dev,
7712 action_flags |= MLX5_FLOW_ACTION_METER;
7715 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7717 /* Meter action will add one more TAG action. */
7718 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7720 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7721 if (!attr->transfer && !attr->group)
7722 return rte_flow_error_set(error, ENOTSUP,
7723 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7725 "Shared ASO age action is not supported for group 0");
7726 if (action_flags & MLX5_FLOW_ACTION_AGE)
7727 return rte_flow_error_set
7729 RTE_FLOW_ERROR_TYPE_ACTION,
7731 "duplicate age actions set");
7732 action_flags |= MLX5_FLOW_ACTION_AGE;
7735 case RTE_FLOW_ACTION_TYPE_AGE:
7736 ret = flow_dv_validate_action_age(action_flags,
7742 * Validate the regular AGE action (using counter)
7743 * mutual exclusion with share counter actions.
7745 if (!priv->sh->flow_hit_aso_en) {
7747 return rte_flow_error_set
7749 RTE_FLOW_ERROR_TYPE_ACTION,
7751 "old age and shared count combination is not supported");
7753 return rte_flow_error_set
7755 RTE_FLOW_ERROR_TYPE_ACTION,
7757 "old age action and count must be in the same sub flow");
7759 action_flags |= MLX5_FLOW_ACTION_AGE;
7762 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7763 ret = flow_dv_validate_action_modify_ipv4_dscp
7770 /* Count all modify-header actions as one action. */
7771 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7773 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7774 modify_after_mirror = 1;
7775 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7776 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7778 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7779 ret = flow_dv_validate_action_modify_ipv6_dscp
7786 /* Count all modify-header actions as one action. */
7787 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7789 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7790 modify_after_mirror = 1;
7791 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7792 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7794 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7795 ret = flow_dv_validate_action_sample(&action_flags,
7804 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7807 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7808 ret = flow_dv_validate_action_modify_field(dev,
7815 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7816 modify_after_mirror = 1;
7817 /* Count all modify-header actions as one action. */
7818 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7820 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7823 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7824 ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7829 action_flags |= MLX5_FLOW_ACTION_CT;
7831 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7832 /* tunnel offload action was processed before
7833 * list it here as a supported type
7837 return rte_flow_error_set(error, ENOTSUP,
7838 RTE_FLOW_ERROR_TYPE_ACTION,
7840 "action not supported");
7844 * Validate actions in flow rules
7845 * - Explicit decap action is prohibited by the tunnel offload API.
7846 * - Drop action in tunnel steer rule is prohibited by the API.
7847 * - Application cannot use MARK action because it's value can mask
7848 * tunnel default miss nitification.
7849 * - JUMP in tunnel match rule has no support in current PMD
7851 * - TAG & META are reserved for future uses.
7853 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7854 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP |
7855 MLX5_FLOW_ACTION_MARK |
7856 MLX5_FLOW_ACTION_SET_TAG |
7857 MLX5_FLOW_ACTION_SET_META |
7858 MLX5_FLOW_ACTION_DROP;
7860 if (action_flags & bad_actions_mask)
7861 return rte_flow_error_set
7863 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7864 "Invalid RTE action in tunnel "
7866 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7867 return rte_flow_error_set
7869 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7870 "tunnel set decap rule must terminate "
7873 return rte_flow_error_set
7875 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7876 "tunnel flows for ingress traffic only");
7878 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7879 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP |
7880 MLX5_FLOW_ACTION_MARK |
7881 MLX5_FLOW_ACTION_SET_TAG |
7882 MLX5_FLOW_ACTION_SET_META;
7884 if (action_flags & bad_actions_mask)
7885 return rte_flow_error_set
7887 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7888 "Invalid RTE action in tunnel "
7892 * Validate the drop action mutual exclusion with other actions.
7893 * Drop action is mutually-exclusive with any other action, except for
7895 * Drop action compatibility with tunnel offload was already validated.
7897 if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7898 MLX5_FLOW_ACTION_TUNNEL_MATCH));
7899 else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7900 (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7901 return rte_flow_error_set(error, EINVAL,
7902 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7903 "Drop action is mutually-exclusive "
7904 "with any other action, except for "
7906 /* Eswitch has few restrictions on using items and actions */
7907 if (attr->transfer) {
7908 if (!mlx5_flow_ext_mreg_supported(dev) &&
7909 action_flags & MLX5_FLOW_ACTION_FLAG)
7910 return rte_flow_error_set(error, ENOTSUP,
7911 RTE_FLOW_ERROR_TYPE_ACTION,
7913 "unsupported action FLAG");
7914 if (!mlx5_flow_ext_mreg_supported(dev) &&
7915 action_flags & MLX5_FLOW_ACTION_MARK)
7916 return rte_flow_error_set(error, ENOTSUP,
7917 RTE_FLOW_ERROR_TYPE_ACTION,
7919 "unsupported action MARK");
7920 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7921 return rte_flow_error_set(error, ENOTSUP,
7922 RTE_FLOW_ERROR_TYPE_ACTION,
7924 "unsupported action QUEUE");
7925 if (action_flags & MLX5_FLOW_ACTION_RSS)
7926 return rte_flow_error_set(error, ENOTSUP,
7927 RTE_FLOW_ERROR_TYPE_ACTION,
7929 "unsupported action RSS");
7930 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7931 return rte_flow_error_set(error, EINVAL,
7932 RTE_FLOW_ERROR_TYPE_ACTION,
7934 "no fate action is found");
7936 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7937 return rte_flow_error_set(error, EINVAL,
7938 RTE_FLOW_ERROR_TYPE_ACTION,
7940 "no fate action is found");
7943 * Continue validation for Xcap and VLAN actions.
7944 * If hairpin is working in explicit TX rule mode, there is no actions
7945 * splitting and the validation of hairpin ingress flow should be the
7946 * same as other standard flows.
7948 if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7949 MLX5_FLOW_VLAN_ACTIONS)) &&
7950 (queue_index == 0xFFFF ||
7951 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7952 ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7953 conf->tx_explicit != 0))) {
7954 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7955 MLX5_FLOW_XCAP_ACTIONS)
7956 return rte_flow_error_set(error, ENOTSUP,
7957 RTE_FLOW_ERROR_TYPE_ACTION,
7958 NULL, "encap and decap "
7959 "combination aren't supported");
7960 if (!attr->transfer && attr->ingress) {
7961 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7962 return rte_flow_error_set
7964 RTE_FLOW_ERROR_TYPE_ACTION,
7965 NULL, "encap is not supported"
7966 " for ingress traffic");
7967 else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7968 return rte_flow_error_set
7970 RTE_FLOW_ERROR_TYPE_ACTION,
7971 NULL, "push VLAN action not "
7972 "supported for ingress");
7973 else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7974 MLX5_FLOW_VLAN_ACTIONS)
7975 return rte_flow_error_set
7977 RTE_FLOW_ERROR_TYPE_ACTION,
7978 NULL, "no support for "
7979 "multiple VLAN actions");
7982 if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7983 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7984 ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7986 return rte_flow_error_set
7988 RTE_FLOW_ERROR_TYPE_ACTION,
7989 NULL, "fate action not supported for "
7990 "meter with policy");
7992 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7993 return rte_flow_error_set
7995 RTE_FLOW_ERROR_TYPE_ACTION,
7996 NULL, "modify header action in egress "
7997 "cannot be done before meter action");
7998 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7999 return rte_flow_error_set
8001 RTE_FLOW_ERROR_TYPE_ACTION,
8002 NULL, "encap action in egress "
8003 "cannot be done before meter action");
8004 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
8005 return rte_flow_error_set
8007 RTE_FLOW_ERROR_TYPE_ACTION,
8008 NULL, "push vlan action in egress "
8009 "cannot be done before meter action");
8013 * Hairpin flow will add one more TAG action in TX implicit mode.
8014 * In TX explicit mode, there will be no hairpin flow ID.
8017 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8018 /* extra metadata enabled: one more TAG action will be add. */
8019 if (dev_conf->dv_flow_en &&
8020 dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
8021 mlx5_flow_ext_mreg_supported(dev))
8022 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8024 flow_dv_modify_hdr_action_max(dev, is_root)) {
8025 return rte_flow_error_set(error, ENOTSUP,
8026 RTE_FLOW_ERROR_TYPE_ACTION,
8027 NULL, "too many header modify"
8028 " actions to support");
8030 /* Eswitch egress mirror and modify flow has limitation on CX5 */
8031 if (fdb_mirror_limit && modify_after_mirror)
8032 return rte_flow_error_set(error, EINVAL,
8033 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8034 "sample before modify action is not supported");
8039 * Internal preparation function. Allocates the DV flow size,
8040 * this size is constant.
8043 * Pointer to the rte_eth_dev structure.
8045 * Pointer to the flow attributes.
8047 * Pointer to the list of items.
8048 * @param[in] actions
8049 * Pointer to the list of actions.
8051 * Pointer to the error structure.
8054 * Pointer to mlx5_flow object on success,
8055 * otherwise NULL and rte_errno is set.
8057 static struct mlx5_flow *
8058 flow_dv_prepare(struct rte_eth_dev *dev,
8059 const struct rte_flow_attr *attr __rte_unused,
8060 const struct rte_flow_item items[] __rte_unused,
8061 const struct rte_flow_action actions[] __rte_unused,
8062 struct rte_flow_error *error)
8064 uint32_t handle_idx = 0;
8065 struct mlx5_flow *dev_flow;
8066 struct mlx5_flow_handle *dev_handle;
8067 struct mlx5_priv *priv = dev->data->dev_private;
8068 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8071 wks->skip_matcher_reg = 0;
8073 wks->final_policy = NULL;
8074 /* In case of corrupting the memory. */
8075 if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8076 rte_flow_error_set(error, ENOSPC,
8077 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8078 "not free temporary device flow");
8081 dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8084 rte_flow_error_set(error, ENOMEM,
8085 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8086 "not enough memory to create flow handle");
8089 MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8090 dev_flow = &wks->flows[wks->flow_idx++];
8091 memset(dev_flow, 0, sizeof(*dev_flow));
8092 dev_flow->handle = dev_handle;
8093 dev_flow->handle_idx = handle_idx;
8094 dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8095 dev_flow->ingress = attr->ingress;
8096 dev_flow->dv.transfer = attr->transfer;
8100 #ifdef RTE_LIBRTE_MLX5_DEBUG
8102 * Sanity check for match mask and value. Similar to check_valid_spec() in
8103 * kernel driver. If unmasked bit is present in value, it returns failure.
8106 * pointer to match mask buffer.
8107 * @param match_value
8108 * pointer to match value buffer.
8111 * 0 if valid, -EINVAL otherwise.
8114 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8116 uint8_t *m = match_mask;
8117 uint8_t *v = match_value;
8120 for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8123 "match_value differs from match_criteria"
8124 " %p[%u] != %p[%u]",
8125 match_value, i, match_mask, i);
8134 * Add match of ip_version.
8138 * @param[in] headers_v
8139 * Values header pointer.
8140 * @param[in] headers_m
8141 * Masks header pointer.
8142 * @param[in] ip_version
8143 * The IP version to set.
8146 flow_dv_set_match_ip_version(uint32_t group,
8152 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8154 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8156 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8157 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8158 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8162 * Add Ethernet item to matcher and to the value.
8164 * @param[in, out] matcher
8166 * @param[in, out] key
8167 * Flow matcher value.
8169 * Flow pattern to translate.
8171 * Item is inner pattern.
8174 flow_dv_translate_item_eth(void *matcher, void *key,
8175 const struct rte_flow_item *item, int inner,
8178 const struct rte_flow_item_eth *eth_m = item->mask;
8179 const struct rte_flow_item_eth *eth_v = item->spec;
8180 const struct rte_flow_item_eth nic_mask = {
8181 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8182 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8183 .type = RTE_BE16(0xffff),
8196 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8198 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8200 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8202 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8204 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8205 ð_m->dst, sizeof(eth_m->dst));
8206 /* The value must be in the range of the mask. */
8207 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8208 for (i = 0; i < sizeof(eth_m->dst); ++i)
8209 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8210 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8211 ð_m->src, sizeof(eth_m->src));
8212 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8213 /* The value must be in the range of the mask. */
8214 for (i = 0; i < sizeof(eth_m->dst); ++i)
8215 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8217 * HW supports match on one Ethertype, the Ethertype following the last
8218 * VLAN tag of the packet (see PRM).
8219 * Set match on ethertype only if ETH header is not followed by VLAN.
8220 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8221 * ethertype, and use ip_version field instead.
8222 * eCPRI over Ether layer will use type value 0xAEFE.
8224 if (eth_m->type == 0xFFFF) {
8225 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8226 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8227 switch (eth_v->type) {
8228 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8229 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8231 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8232 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8233 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8235 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8236 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8238 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8239 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8245 if (eth_m->has_vlan) {
8246 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8247 if (eth_v->has_vlan) {
8249 * Here, when also has_more_vlan field in VLAN item is
8250 * not set, only single-tagged packets will be matched.
8252 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8256 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8257 rte_be_to_cpu_16(eth_m->type));
8258 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8259 *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8263 * Add VLAN item to matcher and to the value.
8265 * @param[in, out] dev_flow
8267 * @param[in, out] matcher
8269 * @param[in, out] key
8270 * Flow matcher value.
8272 * Flow pattern to translate.
8274 * Item is inner pattern.
8277 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8278 void *matcher, void *key,
8279 const struct rte_flow_item *item,
8280 int inner, uint32_t group)
8282 const struct rte_flow_item_vlan *vlan_m = item->mask;
8283 const struct rte_flow_item_vlan *vlan_v = item->spec;
8290 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8292 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8294 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8296 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8298 * This is workaround, masks are not supported,
8299 * and pre-validated.
8302 dev_flow->handle->vf_vlan.tag =
8303 rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8306 * When VLAN item exists in flow, mark packet as tagged,
8307 * even if TCI is not specified.
8309 if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8310 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8311 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8316 vlan_m = &rte_flow_item_vlan_mask;
8317 tci_m = rte_be_to_cpu_16(vlan_m->tci);
8318 tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8319 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8320 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8321 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8322 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8323 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8324 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8326 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8327 * ethertype, and use ip_version field instead.
8329 if (vlan_m->inner_type == 0xFFFF) {
8330 switch (vlan_v->inner_type) {
8331 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8332 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8333 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8334 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8336 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8337 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8339 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8340 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8346 if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8347 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8348 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8349 /* Only one vlan_tag bit can be set. */
8350 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8353 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8354 rte_be_to_cpu_16(vlan_m->inner_type));
8355 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8356 rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8360 * Add IPV4 item to matcher and to the value.
8362 * @param[in, out] matcher
8364 * @param[in, out] key
8365 * Flow matcher value.
8367 * Flow pattern to translate.
8369 * Item is inner pattern.
8371 * The group to insert the rule.
8374 flow_dv_translate_item_ipv4(void *matcher, void *key,
8375 const struct rte_flow_item *item,
8376 int inner, uint32_t group)
8378 const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8379 const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8380 const struct rte_flow_item_ipv4 nic_mask = {
8382 .src_addr = RTE_BE32(0xffffffff),
8383 .dst_addr = RTE_BE32(0xffffffff),
8384 .type_of_service = 0xff,
8385 .next_proto_id = 0xff,
8386 .time_to_live = 0xff,
8393 uint8_t tos, ihl_m, ihl_v;
8396 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8398 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8400 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8402 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8404 flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8409 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8410 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8411 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8412 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8413 *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8414 *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8415 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8416 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8417 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8418 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8419 *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8420 *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8421 tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8422 ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8423 ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8424 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8425 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8426 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8427 ipv4_m->hdr.type_of_service);
8428 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8429 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8430 ipv4_m->hdr.type_of_service >> 2);
8431 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8432 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8433 ipv4_m->hdr.next_proto_id);
8434 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8435 ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8436 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8437 ipv4_m->hdr.time_to_live);
8438 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8439 ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8440 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8441 !!(ipv4_m->hdr.fragment_offset));
8442 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8443 !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8447 * Add IPV6 item to matcher and to the value.
8449 * @param[in, out] matcher
8451 * @param[in, out] key
8452 * Flow matcher value.
8454 * Flow pattern to translate.
8456 * Item is inner pattern.
8458 * The group to insert the rule.
8461 flow_dv_translate_item_ipv6(void *matcher, void *key,
8462 const struct rte_flow_item *item,
8463 int inner, uint32_t group)
8465 const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8466 const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8467 const struct rte_flow_item_ipv6 nic_mask = {
8470 "\xff\xff\xff\xff\xff\xff\xff\xff"
8471 "\xff\xff\xff\xff\xff\xff\xff\xff",
8473 "\xff\xff\xff\xff\xff\xff\xff\xff"
8474 "\xff\xff\xff\xff\xff\xff\xff\xff",
8475 .vtc_flow = RTE_BE32(0xffffffff),
8482 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8483 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8492 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8494 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8496 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8498 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8500 flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8505 size = sizeof(ipv6_m->hdr.dst_addr);
8506 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8507 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8508 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8509 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8510 memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8511 for (i = 0; i < size; ++i)
8512 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8513 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8514 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8515 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8516 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8517 memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8518 for (i = 0; i < size; ++i)
8519 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8521 vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8522 vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8523 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8524 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8525 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8526 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8529 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8531 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8534 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8536 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8540 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8542 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8543 ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8545 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8546 ipv6_m->hdr.hop_limits);
8547 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8548 ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8549 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8550 !!(ipv6_m->has_frag_ext));
8551 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8552 !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8556 * Add IPV6 fragment extension item to matcher and to the value.
8558 * @param[in, out] matcher
8560 * @param[in, out] key
8561 * Flow matcher value.
8563 * Flow pattern to translate.
8565 * Item is inner pattern.
8568 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8569 const struct rte_flow_item *item,
8572 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8573 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8574 const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8576 .next_header = 0xff,
8577 .frag_data = RTE_BE16(0xffff),
8584 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8586 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8588 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8590 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8592 /* IPv6 fragment extension item exists, so packet is IP fragment. */
8593 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8594 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8595 if (!ipv6_frag_ext_v)
8597 if (!ipv6_frag_ext_m)
8598 ipv6_frag_ext_m = &nic_mask;
8599 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8600 ipv6_frag_ext_m->hdr.next_header);
8601 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8602 ipv6_frag_ext_v->hdr.next_header &
8603 ipv6_frag_ext_m->hdr.next_header);
8607 * Add TCP item to matcher and to the value.
8609 * @param[in, out] matcher
8611 * @param[in, out] key
8612 * Flow matcher value.
8614 * Flow pattern to translate.
8616 * Item is inner pattern.
8619 flow_dv_translate_item_tcp(void *matcher, void *key,
8620 const struct rte_flow_item *item,
8623 const struct rte_flow_item_tcp *tcp_m = item->mask;
8624 const struct rte_flow_item_tcp *tcp_v = item->spec;
8629 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8631 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8633 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8635 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8637 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8638 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8642 tcp_m = &rte_flow_item_tcp_mask;
8643 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8644 rte_be_to_cpu_16(tcp_m->hdr.src_port));
8645 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8646 rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8647 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8648 rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8649 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8650 rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8651 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8652 tcp_m->hdr.tcp_flags);
8653 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8654 (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8658 * Add UDP item to matcher and to the value.
8660 * @param[in, out] matcher
8662 * @param[in, out] key
8663 * Flow matcher value.
8665 * Flow pattern to translate.
8667 * Item is inner pattern.
8670 flow_dv_translate_item_udp(void *matcher, void *key,
8671 const struct rte_flow_item *item,
8674 const struct rte_flow_item_udp *udp_m = item->mask;
8675 const struct rte_flow_item_udp *udp_v = item->spec;
8680 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8682 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8684 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8686 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8688 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8689 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8693 udp_m = &rte_flow_item_udp_mask;
8694 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8695 rte_be_to_cpu_16(udp_m->hdr.src_port));
8696 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8697 rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8698 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8699 rte_be_to_cpu_16(udp_m->hdr.dst_port));
8700 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8701 rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8705 * Add GRE optional Key item to matcher and to the value.
8707 * @param[in, out] matcher
8709 * @param[in, out] key
8710 * Flow matcher value.
8712 * Flow pattern to translate.
8714 * Item is inner pattern.
8717 flow_dv_translate_item_gre_key(void *matcher, void *key,
8718 const struct rte_flow_item *item)
8720 const rte_be32_t *key_m = item->mask;
8721 const rte_be32_t *key_v = item->spec;
8722 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8723 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8724 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8726 /* GRE K bit must be on and should already be validated */
8727 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8728 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8732 key_m = &gre_key_default_mask;
8733 MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8734 rte_be_to_cpu_32(*key_m) >> 8);
8735 MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8736 rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8737 MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8738 rte_be_to_cpu_32(*key_m) & 0xFF);
8739 MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8740 rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8744 * Add GRE item to matcher and to the value.
8746 * @param[in, out] matcher
8748 * @param[in, out] key
8749 * Flow matcher value.
8751 * Flow pattern to translate.
8753 * Item is inner pattern.
8756 flow_dv_translate_item_gre(void *matcher, void *key,
8757 const struct rte_flow_item *item,
8760 const struct rte_flow_item_gre *gre_m = item->mask;
8761 const struct rte_flow_item_gre *gre_v = item->spec;
8764 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8765 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8772 uint16_t s_present:1;
8773 uint16_t k_present:1;
8774 uint16_t rsvd_bit1:1;
8775 uint16_t c_present:1;
8779 } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8782 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8784 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8786 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8788 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8790 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8791 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8795 gre_m = &rte_flow_item_gre_mask;
8796 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8797 rte_be_to_cpu_16(gre_m->protocol));
8798 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8799 rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8800 gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8801 gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8802 MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8803 gre_crks_rsvd0_ver_m.c_present);
8804 MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8805 gre_crks_rsvd0_ver_v.c_present &
8806 gre_crks_rsvd0_ver_m.c_present);
8807 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8808 gre_crks_rsvd0_ver_m.k_present);
8809 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8810 gre_crks_rsvd0_ver_v.k_present &
8811 gre_crks_rsvd0_ver_m.k_present);
8812 MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8813 gre_crks_rsvd0_ver_m.s_present);
8814 MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8815 gre_crks_rsvd0_ver_v.s_present &
8816 gre_crks_rsvd0_ver_m.s_present);
8820 * Add NVGRE item to matcher and to the value.
8822 * @param[in, out] matcher
8824 * @param[in, out] key
8825 * Flow matcher value.
8827 * Flow pattern to translate.
8829 * Item is inner pattern.
8832 flow_dv_translate_item_nvgre(void *matcher, void *key,
8833 const struct rte_flow_item *item,
8836 const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8837 const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8838 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8839 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8840 const char *tni_flow_id_m;
8841 const char *tni_flow_id_v;
8847 /* For NVGRE, GRE header fields must be set with defined values. */
8848 const struct rte_flow_item_gre gre_spec = {
8849 .c_rsvd0_ver = RTE_BE16(0x2000),
8850 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8852 const struct rte_flow_item_gre gre_mask = {
8853 .c_rsvd0_ver = RTE_BE16(0xB000),
8854 .protocol = RTE_BE16(UINT16_MAX),
8856 const struct rte_flow_item gre_item = {
8861 flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8865 nvgre_m = &rte_flow_item_nvgre_mask;
8866 tni_flow_id_m = (const char *)nvgre_m->tni;
8867 tni_flow_id_v = (const char *)nvgre_v->tni;
8868 size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8869 gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8870 gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8871 memcpy(gre_key_m, tni_flow_id_m, size);
8872 for (i = 0; i < size; ++i)
8873 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8877 * Add VXLAN item to matcher and to the value.
8880 * Pointer to the Ethernet device structure.
8882 * Flow rule attributes.
8883 * @param[in, out] matcher
8885 * @param[in, out] key
8886 * Flow matcher value.
8888 * Flow pattern to translate.
8890 * Item is inner pattern.
8893 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8894 const struct rte_flow_attr *attr,
8895 void *matcher, void *key,
8896 const struct rte_flow_item *item,
8899 const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8900 const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8905 uint32_t *tunnel_header_v;
8906 uint32_t *tunnel_header_m;
8908 struct mlx5_priv *priv = dev->data->dev_private;
8909 const struct rte_flow_item_vxlan nic_mask = {
8910 .vni = "\xff\xff\xff",
8915 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8917 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8919 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8921 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8923 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8924 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8925 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8926 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8927 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8932 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8933 (attr->group && !priv->sh->misc5_cap))
8934 vxlan_m = &rte_flow_item_vxlan_mask;
8936 vxlan_m = &nic_mask;
8938 if ((!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8939 ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8946 misc_m = MLX5_ADDR_OF(fte_match_param,
8947 matcher, misc_parameters);
8948 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8949 size = sizeof(vxlan_m->vni);
8950 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8951 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8952 memcpy(vni_m, vxlan_m->vni, size);
8953 for (i = 0; i < size; ++i)
8954 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8957 misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8958 misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8959 tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8962 tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8965 *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8966 (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8967 (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8968 if (*tunnel_header_v)
8969 *tunnel_header_m = vxlan_m->vni[0] |
8970 vxlan_m->vni[1] << 8 |
8971 vxlan_m->vni[2] << 16;
8973 *tunnel_header_m = 0x0;
8974 *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8975 if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8976 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8980 * Add VXLAN-GPE item to matcher and to the value.
8982 * @param[in, out] matcher
8984 * @param[in, out] key
8985 * Flow matcher value.
8987 * Flow pattern to translate.
8989 * Item is inner pattern.
8993 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
8994 const struct rte_flow_item *item, int inner)
8996 const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
8997 const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
9001 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
9003 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9009 uint8_t flags_m = 0xff;
9010 uint8_t flags_v = 0xc;
9013 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9015 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9017 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9019 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9021 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
9022 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
9023 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9024 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9025 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9030 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
9031 size = sizeof(vxlan_m->vni);
9032 vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
9033 vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
9034 memcpy(vni_m, vxlan_m->vni, size);
9035 for (i = 0; i < size; ++i)
9036 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9037 if (vxlan_m->flags) {
9038 flags_m = vxlan_m->flags;
9039 flags_v = vxlan_v->flags;
9041 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
9042 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
9043 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
9045 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
9050 * Add Geneve item to matcher and to the value.
9052 * @param[in, out] matcher
9054 * @param[in, out] key
9055 * Flow matcher value.
9057 * Flow pattern to translate.
9059 * Item is inner pattern.
9063 flow_dv_translate_item_geneve(void *matcher, void *key,
9064 const struct rte_flow_item *item, int inner)
9066 const struct rte_flow_item_geneve *geneve_m = item->mask;
9067 const struct rte_flow_item_geneve *geneve_v = item->spec;
9070 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9071 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9080 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9082 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9084 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9086 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9088 dport = MLX5_UDP_PORT_GENEVE;
9089 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9090 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9091 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9096 geneve_m = &rte_flow_item_geneve_mask;
9097 size = sizeof(geneve_m->vni);
9098 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9099 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9100 memcpy(vni_m, geneve_m->vni, size);
9101 for (i = 0; i < size; ++i)
9102 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9103 MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
9104 rte_be_to_cpu_16(geneve_m->protocol));
9105 MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9106 rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
9107 gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9108 gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9109 MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9110 MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9111 MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9112 MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9113 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9114 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9115 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9116 MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9117 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9121 * Create Geneve TLV option resource.
9123 * @param dev[in, out]
9124 * Pointer to rte_eth_dev structure.
9125 * @param[in, out] tag_be24
9126 * Tag value in big endian then R-shift 8.
9127 * @parm[in, out] dev_flow
9128 * Pointer to the dev_flow.
9130 * pointer to error structure.
9133 * 0 on success otherwise -errno and errno is set.
9137 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9138 const struct rte_flow_item *item,
9139 struct rte_flow_error *error)
9141 struct mlx5_priv *priv = dev->data->dev_private;
9142 struct mlx5_dev_ctx_shared *sh = priv->sh;
9143 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9144 sh->geneve_tlv_option_resource;
9145 struct mlx5_devx_obj *obj;
9146 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9151 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9152 if (geneve_opt_resource != NULL) {
9153 if (geneve_opt_resource->option_class ==
9154 geneve_opt_v->option_class &&
9155 geneve_opt_resource->option_type ==
9156 geneve_opt_v->option_type &&
9157 geneve_opt_resource->length ==
9158 geneve_opt_v->option_len) {
9159 /* We already have GENVE TLV option obj allocated. */
9160 __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9163 ret = rte_flow_error_set(error, ENOMEM,
9164 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9165 "Only one GENEVE TLV option supported");
9169 /* Create a GENEVE TLV object and resource. */
9170 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->ctx,
9171 geneve_opt_v->option_class,
9172 geneve_opt_v->option_type,
9173 geneve_opt_v->option_len);
9175 ret = rte_flow_error_set(error, ENODATA,
9176 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9177 "Failed to create GENEVE TLV Devx object");
9180 sh->geneve_tlv_option_resource =
9181 mlx5_malloc(MLX5_MEM_ZERO,
9182 sizeof(*geneve_opt_resource),
9184 if (!sh->geneve_tlv_option_resource) {
9185 claim_zero(mlx5_devx_cmd_destroy(obj));
9186 ret = rte_flow_error_set(error, ENOMEM,
9187 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9188 "GENEVE TLV object memory allocation failed");
9191 geneve_opt_resource = sh->geneve_tlv_option_resource;
9192 geneve_opt_resource->obj = obj;
9193 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9194 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9195 geneve_opt_resource->length = geneve_opt_v->option_len;
9196 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9200 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9205 * Add Geneve TLV option item to matcher.
9207 * @param[in, out] dev
9208 * Pointer to rte_eth_dev structure.
9209 * @param[in, out] matcher
9211 * @param[in, out] key
9212 * Flow matcher value.
9214 * Flow pattern to translate.
9216 * Pointer to error structure.
9219 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9220 void *key, const struct rte_flow_item *item,
9221 struct rte_flow_error *error)
9223 const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9224 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9225 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9226 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9227 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9229 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9230 rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9236 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9237 ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9240 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9244 * Set the option length in GENEVE header if not requested.
9245 * The GENEVE TLV option length is expressed by the option length field
9246 * in the GENEVE header.
9247 * If the option length was not requested but the GENEVE TLV option item
9248 * is present we set the option length field implicitly.
9250 if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9251 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9252 MLX5_GENEVE_OPTLEN_MASK);
9253 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9254 geneve_opt_v->option_len + 1);
9257 if (geneve_opt_v->data) {
9258 memcpy(&opt_data_key, geneve_opt_v->data,
9259 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9260 sizeof(opt_data_key)));
9261 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9262 sizeof(opt_data_key));
9263 memcpy(&opt_data_mask, geneve_opt_m->data,
9264 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9265 sizeof(opt_data_mask)));
9266 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9267 sizeof(opt_data_mask));
9268 MLX5_SET(fte_match_set_misc3, misc3_m,
9269 geneve_tlv_option_0_data,
9270 rte_be_to_cpu_32(opt_data_mask));
9271 MLX5_SET(fte_match_set_misc3, misc3_v,
9272 geneve_tlv_option_0_data,
9273 rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9279 * Add MPLS item to matcher and to the value.
9281 * @param[in, out] matcher
9283 * @param[in, out] key
9284 * Flow matcher value.
9286 * Flow pattern to translate.
9287 * @param[in] prev_layer
9288 * The protocol layer indicated in previous item.
9290 * Item is inner pattern.
9293 flow_dv_translate_item_mpls(void *matcher, void *key,
9294 const struct rte_flow_item *item,
9295 uint64_t prev_layer,
9298 const uint32_t *in_mpls_m = item->mask;
9299 const uint32_t *in_mpls_v = item->spec;
9300 uint32_t *out_mpls_m = 0;
9301 uint32_t *out_mpls_v = 0;
9302 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9303 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9304 void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9306 void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9307 void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9308 void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9310 switch (prev_layer) {
9311 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9312 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
9313 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9314 MLX5_UDP_PORT_MPLS);
9316 case MLX5_FLOW_LAYER_GRE:
9318 case MLX5_FLOW_LAYER_GRE_KEY:
9319 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
9320 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9321 RTE_ETHER_TYPE_MPLS);
9329 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9330 switch (prev_layer) {
9331 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9333 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9334 outer_first_mpls_over_udp);
9336 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9337 outer_first_mpls_over_udp);
9339 case MLX5_FLOW_LAYER_GRE:
9341 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9342 outer_first_mpls_over_gre);
9344 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9345 outer_first_mpls_over_gre);
9348 /* Inner MPLS not over GRE is not supported. */
9351 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9355 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9361 if (out_mpls_m && out_mpls_v) {
9362 *out_mpls_m = *in_mpls_m;
9363 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9368 * Add metadata register item to matcher
9370 * @param[in, out] matcher
9372 * @param[in, out] key
9373 * Flow matcher value.
9374 * @param[in] reg_type
9375 * Type of device metadata register
9382 flow_dv_match_meta_reg(void *matcher, void *key,
9383 enum modify_reg reg_type,
9384 uint32_t data, uint32_t mask)
9387 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9389 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9395 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9396 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9399 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9400 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9404 * The metadata register C0 field might be divided into
9405 * source vport index and META item value, we should set
9406 * this field according to specified mask, not as whole one.
9408 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9410 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9411 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9414 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9417 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9418 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9421 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9422 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9425 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9426 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9429 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9430 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9433 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9434 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9437 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9438 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9441 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9442 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9451 * Add MARK item to matcher
9454 * The device to configure through.
9455 * @param[in, out] matcher
9457 * @param[in, out] key
9458 * Flow matcher value.
9460 * Flow pattern to translate.
9463 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9464 void *matcher, void *key,
9465 const struct rte_flow_item *item)
9467 struct mlx5_priv *priv = dev->data->dev_private;
9468 const struct rte_flow_item_mark *mark;
9472 mark = item->mask ? (const void *)item->mask :
9473 &rte_flow_item_mark_mask;
9474 mask = mark->id & priv->sh->dv_mark_mask;
9475 mark = (const void *)item->spec;
9477 value = mark->id & priv->sh->dv_mark_mask & mask;
9479 enum modify_reg reg;
9481 /* Get the metadata register index for the mark. */
9482 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9483 MLX5_ASSERT(reg > 0);
9484 if (reg == REG_C_0) {
9485 struct mlx5_priv *priv = dev->data->dev_private;
9486 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9487 uint32_t shl_c0 = rte_bsf32(msk_c0);
9493 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9498 * Add META item to matcher
9501 * The devich to configure through.
9502 * @param[in, out] matcher
9504 * @param[in, out] key
9505 * Flow matcher value.
9507 * Attributes of flow that includes this item.
9509 * Flow pattern to translate.
9512 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9513 void *matcher, void *key,
9514 const struct rte_flow_attr *attr,
9515 const struct rte_flow_item *item)
9517 const struct rte_flow_item_meta *meta_m;
9518 const struct rte_flow_item_meta *meta_v;
9520 meta_m = (const void *)item->mask;
9522 meta_m = &rte_flow_item_meta_mask;
9523 meta_v = (const void *)item->spec;
9526 uint32_t value = meta_v->data;
9527 uint32_t mask = meta_m->data;
9529 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9532 MLX5_ASSERT(reg != REG_NON);
9533 if (reg == REG_C_0) {
9534 struct mlx5_priv *priv = dev->data->dev_private;
9535 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9536 uint32_t shl_c0 = rte_bsf32(msk_c0);
9542 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9547 * Add vport metadata Reg C0 item to matcher
9549 * @param[in, out] matcher
9551 * @param[in, out] key
9552 * Flow matcher value.
9554 * Flow pattern to translate.
9557 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9558 uint32_t value, uint32_t mask)
9560 flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9564 * Add tag item to matcher
9567 * The devich to configure through.
9568 * @param[in, out] matcher
9570 * @param[in, out] key
9571 * Flow matcher value.
9573 * Flow pattern to translate.
9576 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9577 void *matcher, void *key,
9578 const struct rte_flow_item *item)
9580 const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9581 const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9582 uint32_t mask, value;
9585 value = tag_v->data;
9586 mask = tag_m ? tag_m->data : UINT32_MAX;
9587 if (tag_v->id == REG_C_0) {
9588 struct mlx5_priv *priv = dev->data->dev_private;
9589 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9590 uint32_t shl_c0 = rte_bsf32(msk_c0);
9596 flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9600 * Add TAG item to matcher
9603 * The devich to configure through.
9604 * @param[in, out] matcher
9606 * @param[in, out] key
9607 * Flow matcher value.
9609 * Flow pattern to translate.
9612 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9613 void *matcher, void *key,
9614 const struct rte_flow_item *item)
9616 const struct rte_flow_item_tag *tag_v = item->spec;
9617 const struct rte_flow_item_tag *tag_m = item->mask;
9618 enum modify_reg reg;
9621 tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9622 /* Get the metadata register index for the tag. */
9623 reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9624 MLX5_ASSERT(reg > 0);
9625 flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9629 * Add source vport match to the specified matcher.
9631 * @param[in, out] matcher
9633 * @param[in, out] key
9634 * Flow matcher value.
9636 * Source vport value to match
9641 flow_dv_translate_item_source_vport(void *matcher, void *key,
9642 int16_t port, uint16_t mask)
9644 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9645 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9647 MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9648 MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9652 * Translate port-id item to eswitch match on port-id.
9655 * The devich to configure through.
9656 * @param[in, out] matcher
9658 * @param[in, out] key
9659 * Flow matcher value.
9661 * Flow pattern to translate.
9666 * 0 on success, a negative errno value otherwise.
9669 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9670 void *key, const struct rte_flow_item *item,
9671 const struct rte_flow_attr *attr)
9673 const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9674 const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9675 struct mlx5_priv *priv;
9678 mask = pid_m ? pid_m->id : 0xffff;
9679 id = pid_v ? pid_v->id : dev->data->port_id;
9680 priv = mlx5_port_to_eswitch_info(id, item == NULL);
9684 * Translate to vport field or to metadata, depending on mode.
9685 * Kernel can use either misc.source_port or half of C0 metadata
9688 if (priv->vport_meta_mask) {
9690 * Provide the hint for SW steering library
9691 * to insert the flow into ingress domain and
9692 * save the extra vport match.
9694 if (mask == 0xffff && priv->vport_id == 0xffff &&
9695 priv->pf_bond < 0 && attr->transfer)
9696 flow_dv_translate_item_source_vport
9697 (matcher, key, priv->vport_id, mask);
9699 * We should always set the vport metadata register,
9700 * otherwise the SW steering library can drop
9701 * the rule if wire vport metadata value is not zero,
9702 * it depends on kernel configuration.
9704 flow_dv_translate_item_meta_vport(matcher, key,
9705 priv->vport_meta_tag,
9706 priv->vport_meta_mask);
9708 flow_dv_translate_item_source_vport(matcher, key,
9709 priv->vport_id, mask);
9715 * Add ICMP6 item to matcher and to the value.
9717 * @param[in, out] matcher
9719 * @param[in, out] key
9720 * Flow matcher value.
9722 * Flow pattern to translate.
9724 * Item is inner pattern.
9727 flow_dv_translate_item_icmp6(void *matcher, void *key,
9728 const struct rte_flow_item *item,
9731 const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9732 const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9735 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9737 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9739 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9741 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9743 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9745 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9747 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9748 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9752 icmp6_m = &rte_flow_item_icmp6_mask;
9753 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9754 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9755 icmp6_v->type & icmp6_m->type);
9756 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9757 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9758 icmp6_v->code & icmp6_m->code);
9762 * Add ICMP item to matcher and to the value.
9764 * @param[in, out] matcher
9766 * @param[in, out] key
9767 * Flow matcher value.
9769 * Flow pattern to translate.
9771 * Item is inner pattern.
9774 flow_dv_translate_item_icmp(void *matcher, void *key,
9775 const struct rte_flow_item *item,
9778 const struct rte_flow_item_icmp *icmp_m = item->mask;
9779 const struct rte_flow_item_icmp *icmp_v = item->spec;
9780 uint32_t icmp_header_data_m = 0;
9781 uint32_t icmp_header_data_v = 0;
9784 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9786 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9788 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9790 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9792 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9794 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9796 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9797 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9801 icmp_m = &rte_flow_item_icmp_mask;
9802 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9803 icmp_m->hdr.icmp_type);
9804 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9805 icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9806 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9807 icmp_m->hdr.icmp_code);
9808 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9809 icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9810 icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9811 icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9812 if (icmp_header_data_m) {
9813 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9814 icmp_header_data_v |=
9815 rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9816 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9817 icmp_header_data_m);
9818 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9819 icmp_header_data_v & icmp_header_data_m);
9824 * Add GTP item to matcher and to the value.
9826 * @param[in, out] matcher
9828 * @param[in, out] key
9829 * Flow matcher value.
9831 * Flow pattern to translate.
9833 * Item is inner pattern.
9836 flow_dv_translate_item_gtp(void *matcher, void *key,
9837 const struct rte_flow_item *item, int inner)
9839 const struct rte_flow_item_gtp *gtp_m = item->mask;
9840 const struct rte_flow_item_gtp *gtp_v = item->spec;
9843 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9845 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9846 uint16_t dport = RTE_GTPU_UDP_PORT;
9849 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9851 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9853 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9855 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9857 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9858 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9859 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9864 gtp_m = &rte_flow_item_gtp_mask;
9865 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9866 gtp_m->v_pt_rsv_flags);
9867 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9868 gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9869 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9870 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9871 gtp_v->msg_type & gtp_m->msg_type);
9872 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9873 rte_be_to_cpu_32(gtp_m->teid));
9874 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9875 rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9879 * Add GTP PSC item to matcher.
9881 * @param[in, out] matcher
9883 * @param[in, out] key
9884 * Flow matcher value.
9886 * Flow pattern to translate.
9889 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9890 const struct rte_flow_item *item)
9892 const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9893 const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9894 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9896 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9902 uint8_t next_ext_header_type;
9907 /* Always set E-flag match on one, regardless of GTP item settings. */
9908 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9909 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9910 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9911 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9912 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9913 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9914 /*Set next extension header type. */
9917 dw_2.next_ext_header_type = 0xff;
9918 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9919 rte_cpu_to_be_32(dw_2.w32));
9922 dw_2.next_ext_header_type = 0x85;
9923 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9924 rte_cpu_to_be_32(dw_2.w32));
9936 /*Set extension header PDU type and Qos. */
9938 gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9940 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->pdu_type);
9941 dw_0.qfi = gtp_psc_m->qfi;
9942 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9943 rte_cpu_to_be_32(dw_0.w32));
9945 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->pdu_type &
9946 gtp_psc_m->pdu_type);
9947 dw_0.qfi = gtp_psc_v->qfi & gtp_psc_m->qfi;
9948 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9949 rte_cpu_to_be_32(dw_0.w32));
9955 * Add eCPRI item to matcher and to the value.
9958 * The devich to configure through.
9959 * @param[in, out] matcher
9961 * @param[in, out] key
9962 * Flow matcher value.
9964 * Flow pattern to translate.
9965 * @param[in] samples
9966 * Sample IDs to be used in the matching.
9969 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9970 void *key, const struct rte_flow_item *item)
9972 struct mlx5_priv *priv = dev->data->dev_private;
9973 const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9974 const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9975 struct rte_ecpri_common_hdr common;
9976 void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9978 void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9986 ecpri_m = &rte_flow_item_ecpri_mask;
9988 * Maximal four DW samples are supported in a single matching now.
9989 * Two are used now for a eCPRI matching:
9990 * 1. Type: one byte, mask should be 0x00ff0000 in network order
9991 * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
9994 if (!ecpri_m->hdr.common.u32)
9996 samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
9997 /* Need to take the whole DW as the mask to fill the entry. */
9998 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9999 prog_sample_field_value_0);
10000 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10001 prog_sample_field_value_0);
10002 /* Already big endian (network order) in the header. */
10003 *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
10004 *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
10005 /* Sample#0, used for matching type, offset 0. */
10006 MLX5_SET(fte_match_set_misc4, misc4_m,
10007 prog_sample_field_id_0, samples[0]);
10008 /* It makes no sense to set the sample ID in the mask field. */
10009 MLX5_SET(fte_match_set_misc4, misc4_v,
10010 prog_sample_field_id_0, samples[0]);
10012 * Checking if message body part needs to be matched.
10013 * Some wildcard rules only matching type field should be supported.
10015 if (ecpri_m->hdr.dummy[0]) {
10016 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
10017 switch (common.type) {
10018 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
10019 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
10020 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
10021 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10022 prog_sample_field_value_1);
10023 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10024 prog_sample_field_value_1);
10025 *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
10026 *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
10027 ecpri_m->hdr.dummy[0];
10028 /* Sample#1, to match message body, offset 4. */
10029 MLX5_SET(fte_match_set_misc4, misc4_m,
10030 prog_sample_field_id_1, samples[1]);
10031 MLX5_SET(fte_match_set_misc4, misc4_v,
10032 prog_sample_field_id_1, samples[1]);
10035 /* Others, do not match any sample ID. */
10042 * Add connection tracking status item to matcher
10045 * The devich to configure through.
10046 * @param[in, out] matcher
10048 * @param[in, out] key
10049 * Flow matcher value.
10051 * Flow pattern to translate.
10054 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
10055 void *matcher, void *key,
10056 const struct rte_flow_item *item)
10058 uint32_t reg_value = 0;
10060 /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10061 uint32_t reg_mask = 0;
10062 const struct rte_flow_item_conntrack *spec = item->spec;
10063 const struct rte_flow_item_conntrack *mask = item->mask;
10065 struct rte_flow_error error;
10068 mask = &rte_flow_item_conntrack_mask;
10069 if (!spec || !mask->flags)
10071 flags = spec->flags & mask->flags;
10072 /* The conflict should be checked in the validation. */
10073 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10074 reg_value |= MLX5_CT_SYNDROME_VALID;
10075 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10076 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10077 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10078 reg_value |= MLX5_CT_SYNDROME_INVALID;
10079 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10080 reg_value |= MLX5_CT_SYNDROME_TRAP;
10081 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10082 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10083 if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10084 RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10085 RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10087 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10088 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10089 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10090 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10091 /* The REG_C_x value could be saved during startup. */
10092 reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10093 if (reg_id == REG_NON)
10095 flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10096 reg_value, reg_mask);
10099 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10101 #define HEADER_IS_ZERO(match_criteria, headers) \
10102 !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers), \
10103 matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10106 * Calculate flow matcher enable bitmap.
10108 * @param match_criteria
10109 * Pointer to flow matcher criteria.
10112 * Bitmap of enabled fields.
10115 flow_dv_matcher_enable(uint32_t *match_criteria)
10117 uint8_t match_criteria_enable;
10119 match_criteria_enable =
10120 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10121 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10122 match_criteria_enable |=
10123 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10124 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10125 match_criteria_enable |=
10126 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10127 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10128 match_criteria_enable |=
10129 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10130 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10131 match_criteria_enable |=
10132 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10133 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10134 match_criteria_enable |=
10135 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10136 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10137 match_criteria_enable |=
10138 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10139 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10140 return match_criteria_enable;
10144 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10147 * Check flow matching criteria first, subtract misc5/4 length if flow
10148 * doesn't own misc5/4 parameters. In some old rdma-core releases,
10149 * misc5/4 are not supported, and matcher creation failure is expected
10150 * w/o subtration. If misc5 is provided, misc4 must be counted in since
10151 * misc5 is right after misc4.
10153 if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10154 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10155 MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10156 if (!(match_criteria & (1 <<
10157 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10158 *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10163 static struct mlx5_list_entry *
10164 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10165 struct mlx5_list_entry *entry, void *cb_ctx)
10167 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10168 struct mlx5_flow_dv_matcher *ref = ctx->data;
10169 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10170 typeof(*tbl), tbl);
10171 struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10176 rte_flow_error_set(ctx->error, ENOMEM,
10177 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10178 "cannot create matcher");
10181 memcpy(resource, entry, sizeof(*resource));
10182 resource->tbl = &tbl->tbl;
10183 return &resource->entry;
10187 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10188 struct mlx5_list_entry *entry)
10193 struct mlx5_list_entry *
10194 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10196 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10197 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10198 struct rte_eth_dev *dev = ctx->dev;
10199 struct mlx5_flow_tbl_data_entry *tbl_data;
10200 struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10201 struct rte_flow_error *error = ctx->error;
10202 union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10203 struct mlx5_flow_tbl_resource *tbl;
10208 tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10210 rte_flow_error_set(error, ENOMEM,
10211 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10213 "cannot allocate flow table data entry");
10216 tbl_data->idx = idx;
10217 tbl_data->tunnel = tt_prm->tunnel;
10218 tbl_data->group_id = tt_prm->group_id;
10219 tbl_data->external = !!tt_prm->external;
10220 tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10221 tbl_data->is_egress = !!key.is_egress;
10222 tbl_data->is_transfer = !!key.is_fdb;
10223 tbl_data->dummy = !!key.dummy;
10224 tbl_data->level = key.level;
10225 tbl_data->id = key.id;
10226 tbl = &tbl_data->tbl;
10228 return &tbl_data->entry;
10230 domain = sh->fdb_domain;
10231 else if (key.is_egress)
10232 domain = sh->tx_domain;
10234 domain = sh->rx_domain;
10235 ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10237 rte_flow_error_set(error, ENOMEM,
10238 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10239 NULL, "cannot create flow table object");
10240 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10243 if (key.level != 0) {
10244 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10245 (tbl->obj, &tbl_data->jump.action);
10247 rte_flow_error_set(error, ENOMEM,
10248 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10250 "cannot create flow jump action");
10251 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10252 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10256 MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10257 key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10258 key.level, key.id);
10259 tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10260 flow_dv_matcher_create_cb,
10261 flow_dv_matcher_match_cb,
10262 flow_dv_matcher_remove_cb,
10263 flow_dv_matcher_clone_cb,
10264 flow_dv_matcher_clone_free_cb);
10265 if (!tbl_data->matchers) {
10266 rte_flow_error_set(error, ENOMEM,
10267 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10269 "cannot create tbl matcher list");
10270 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10271 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10272 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10275 return &tbl_data->entry;
10279 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10282 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10283 struct mlx5_flow_tbl_data_entry *tbl_data =
10284 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10285 union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10287 return tbl_data->level != key.level ||
10288 tbl_data->id != key.id ||
10289 tbl_data->dummy != key.dummy ||
10290 tbl_data->is_transfer != !!key.is_fdb ||
10291 tbl_data->is_egress != !!key.is_egress;
10294 struct mlx5_list_entry *
10295 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10298 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10299 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10300 struct mlx5_flow_tbl_data_entry *tbl_data;
10301 struct rte_flow_error *error = ctx->error;
10304 tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10306 rte_flow_error_set(error, ENOMEM,
10307 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10309 "cannot allocate flow table data entry");
10312 memcpy(tbl_data, oentry, sizeof(*tbl_data));
10313 tbl_data->idx = idx;
10314 return &tbl_data->entry;
10318 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10320 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10321 struct mlx5_flow_tbl_data_entry *tbl_data =
10322 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10324 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10328 * Get a flow table.
10330 * @param[in, out] dev
10331 * Pointer to rte_eth_dev structure.
10332 * @param[in] table_level
10333 * Table level to use.
10334 * @param[in] egress
10335 * Direction of the table.
10336 * @param[in] transfer
10337 * E-Switch or NIC flow.
10339 * Dummy entry for dv API.
10340 * @param[in] table_id
10342 * @param[out] error
10343 * pointer to error structure.
10346 * Returns tables resource based on the index, NULL in case of failed.
10348 struct mlx5_flow_tbl_resource *
10349 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10350 uint32_t table_level, uint8_t egress,
10353 const struct mlx5_flow_tunnel *tunnel,
10354 uint32_t group_id, uint8_t dummy,
10356 struct rte_flow_error *error)
10358 struct mlx5_priv *priv = dev->data->dev_private;
10359 union mlx5_flow_tbl_key table_key = {
10361 .level = table_level,
10365 .is_fdb = !!transfer,
10366 .is_egress = !!egress,
10369 struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10371 .group_id = group_id,
10372 .external = external,
10374 struct mlx5_flow_cb_ctx ctx = {
10377 .data = &table_key.v64,
10380 struct mlx5_list_entry *entry;
10381 struct mlx5_flow_tbl_data_entry *tbl_data;
10383 entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10385 rte_flow_error_set(error, ENOMEM,
10386 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10387 "cannot get table");
10390 DRV_LOG(DEBUG, "table_level %u table_id %u "
10391 "tunnel %u group %u registered.",
10392 table_level, table_id,
10393 tunnel ? tunnel->tunnel_id : 0, group_id);
10394 tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10395 return &tbl_data->tbl;
10399 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10401 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10402 struct mlx5_flow_tbl_data_entry *tbl_data =
10403 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10405 MLX5_ASSERT(entry && sh);
10406 if (tbl_data->jump.action)
10407 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10408 if (tbl_data->tbl.obj)
10409 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10410 if (tbl_data->tunnel_offload && tbl_data->external) {
10411 struct mlx5_list_entry *he;
10412 struct mlx5_hlist *tunnel_grp_hash;
10413 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10414 union tunnel_tbl_key tunnel_key = {
10415 .tunnel_id = tbl_data->tunnel ?
10416 tbl_data->tunnel->tunnel_id : 0,
10417 .group = tbl_data->group_id
10419 uint32_t table_level = tbl_data->level;
10420 struct mlx5_flow_cb_ctx ctx = {
10421 .data = (void *)&tunnel_key.val,
10424 tunnel_grp_hash = tbl_data->tunnel ?
10425 tbl_data->tunnel->groups :
10427 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10429 mlx5_hlist_unregister(tunnel_grp_hash, he);
10431 "table_level %u id %u tunnel %u group %u released.",
10435 tbl_data->tunnel->tunnel_id : 0,
10436 tbl_data->group_id);
10438 mlx5_list_destroy(tbl_data->matchers);
10439 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10443 * Release a flow table.
10446 * Pointer to device shared structure.
10448 * Table resource to be released.
10451 * Returns 0 if table was released, else return 1;
10454 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10455 struct mlx5_flow_tbl_resource *tbl)
10457 struct mlx5_flow_tbl_data_entry *tbl_data =
10458 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10462 return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10466 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10467 struct mlx5_list_entry *entry, void *cb_ctx)
10469 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10470 struct mlx5_flow_dv_matcher *ref = ctx->data;
10471 struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10474 return cur->crc != ref->crc ||
10475 cur->priority != ref->priority ||
10476 memcmp((const void *)cur->mask.buf,
10477 (const void *)ref->mask.buf, ref->mask.size);
10480 struct mlx5_list_entry *
10481 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10483 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10484 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10485 struct mlx5_flow_dv_matcher *ref = ctx->data;
10486 struct mlx5_flow_dv_matcher *resource;
10487 struct mlx5dv_flow_matcher_attr dv_attr = {
10488 .type = IBV_FLOW_ATTR_NORMAL,
10489 .match_mask = (void *)&ref->mask,
10491 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10492 typeof(*tbl), tbl);
10495 resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10498 rte_flow_error_set(ctx->error, ENOMEM,
10499 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10500 "cannot create matcher");
10504 dv_attr.match_criteria_enable =
10505 flow_dv_matcher_enable(resource->mask.buf);
10506 __flow_dv_adjust_buf_size(&ref->mask.size,
10507 dv_attr.match_criteria_enable);
10508 dv_attr.priority = ref->priority;
10509 if (tbl->is_egress)
10510 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10511 ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
10512 &resource->matcher_object);
10514 mlx5_free(resource);
10515 rte_flow_error_set(ctx->error, ENOMEM,
10516 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10517 "cannot create matcher");
10520 return &resource->entry;
10524 * Register the flow matcher.
10526 * @param[in, out] dev
10527 * Pointer to rte_eth_dev structure.
10528 * @param[in, out] matcher
10529 * Pointer to flow matcher.
10530 * @param[in, out] key
10531 * Pointer to flow table key.
10532 * @parm[in, out] dev_flow
10533 * Pointer to the dev_flow.
10534 * @param[out] error
10535 * pointer to error structure.
10538 * 0 on success otherwise -errno and errno is set.
10541 flow_dv_matcher_register(struct rte_eth_dev *dev,
10542 struct mlx5_flow_dv_matcher *ref,
10543 union mlx5_flow_tbl_key *key,
10544 struct mlx5_flow *dev_flow,
10545 const struct mlx5_flow_tunnel *tunnel,
10547 struct rte_flow_error *error)
10549 struct mlx5_list_entry *entry;
10550 struct mlx5_flow_dv_matcher *resource;
10551 struct mlx5_flow_tbl_resource *tbl;
10552 struct mlx5_flow_tbl_data_entry *tbl_data;
10553 struct mlx5_flow_cb_ctx ctx = {
10558 * tunnel offload API requires this registration for cases when
10559 * tunnel match rule was inserted before tunnel set rule.
10561 tbl = flow_dv_tbl_resource_get(dev, key->level,
10562 key->is_egress, key->is_fdb,
10563 dev_flow->external, tunnel,
10564 group_id, 0, key->id, error);
10566 return -rte_errno; /* No need to refill the error info */
10567 tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10569 entry = mlx5_list_register(tbl_data->matchers, &ctx);
10571 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10572 return rte_flow_error_set(error, ENOMEM,
10573 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10574 "cannot allocate ref memory");
10576 resource = container_of(entry, typeof(*resource), entry);
10577 dev_flow->handle->dvh.matcher = resource;
10581 struct mlx5_list_entry *
10582 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10584 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10585 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10586 struct mlx5_flow_dv_tag_resource *entry;
10590 entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10592 rte_flow_error_set(ctx->error, ENOMEM,
10593 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10594 "cannot allocate resource memory");
10598 entry->tag_id = *(uint32_t *)(ctx->data);
10599 ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10602 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10603 rte_flow_error_set(ctx->error, ENOMEM,
10604 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10605 NULL, "cannot create action");
10608 return &entry->entry;
10612 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10615 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10616 struct mlx5_flow_dv_tag_resource *tag =
10617 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10619 return *(uint32_t *)(ctx->data) != tag->tag_id;
10622 struct mlx5_list_entry *
10623 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10626 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10627 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10628 struct mlx5_flow_dv_tag_resource *entry;
10631 entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10633 rte_flow_error_set(ctx->error, ENOMEM,
10634 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10635 "cannot allocate tag resource memory");
10638 memcpy(entry, oentry, sizeof(*entry));
10640 return &entry->entry;
10644 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10646 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10647 struct mlx5_flow_dv_tag_resource *tag =
10648 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10650 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10654 * Find existing tag resource or create and register a new one.
10656 * @param dev[in, out]
10657 * Pointer to rte_eth_dev structure.
10658 * @param[in, out] tag_be24
10659 * Tag value in big endian then R-shift 8.
10660 * @parm[in, out] dev_flow
10661 * Pointer to the dev_flow.
10662 * @param[out] error
10663 * pointer to error structure.
10666 * 0 on success otherwise -errno and errno is set.
10669 flow_dv_tag_resource_register
10670 (struct rte_eth_dev *dev,
10672 struct mlx5_flow *dev_flow,
10673 struct rte_flow_error *error)
10675 struct mlx5_priv *priv = dev->data->dev_private;
10676 struct mlx5_flow_dv_tag_resource *resource;
10677 struct mlx5_list_entry *entry;
10678 struct mlx5_flow_cb_ctx ctx = {
10682 struct mlx5_hlist *tag_table;
10684 tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10686 MLX5_TAGS_HLIST_ARRAY_SIZE,
10687 false, false, priv->sh,
10688 flow_dv_tag_create_cb,
10689 flow_dv_tag_match_cb,
10690 flow_dv_tag_remove_cb,
10691 flow_dv_tag_clone_cb,
10692 flow_dv_tag_clone_free_cb);
10693 if (unlikely(!tag_table))
10695 entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10697 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10699 dev_flow->handle->dvh.rix_tag = resource->idx;
10700 dev_flow->dv.tag_resource = resource;
10707 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10709 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10710 struct mlx5_flow_dv_tag_resource *tag =
10711 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10713 MLX5_ASSERT(tag && sh && tag->action);
10714 claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10715 DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10716 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10723 * Pointer to Ethernet device.
10728 * 1 while a reference on it exists, 0 when freed.
10731 flow_dv_tag_release(struct rte_eth_dev *dev,
10734 struct mlx5_priv *priv = dev->data->dev_private;
10735 struct mlx5_flow_dv_tag_resource *tag;
10737 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10740 DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10741 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10742 return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10746 * Translate port ID action to vport.
10749 * Pointer to rte_eth_dev structure.
10750 * @param[in] action
10751 * Pointer to the port ID action.
10752 * @param[out] dst_port_id
10753 * The target port ID.
10754 * @param[out] error
10755 * Pointer to the error structure.
10758 * 0 on success, a negative errno value otherwise and rte_errno is set.
10761 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10762 const struct rte_flow_action *action,
10763 uint32_t *dst_port_id,
10764 struct rte_flow_error *error)
10767 struct mlx5_priv *priv;
10768 const struct rte_flow_action_port_id *conf =
10769 (const struct rte_flow_action_port_id *)action->conf;
10771 port = conf->original ? dev->data->port_id : conf->id;
10772 priv = mlx5_port_to_eswitch_info(port, false);
10774 return rte_flow_error_set(error, -rte_errno,
10775 RTE_FLOW_ERROR_TYPE_ACTION,
10777 "No eswitch info was found for port");
10778 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10780 * This parameter is transferred to
10781 * mlx5dv_dr_action_create_dest_ib_port().
10783 *dst_port_id = priv->dev_port;
10786 * Legacy mode, no LAG configurations is supported.
10787 * This parameter is transferred to
10788 * mlx5dv_dr_action_create_dest_vport().
10790 *dst_port_id = priv->vport_id;
10796 * Create a counter with aging configuration.
10799 * Pointer to rte_eth_dev structure.
10800 * @param[in] dev_flow
10801 * Pointer to the mlx5_flow.
10802 * @param[out] count
10803 * Pointer to the counter action configuration.
10805 * Pointer to the aging action configuration.
10808 * Index to flow counter on success, 0 otherwise.
10811 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10812 struct mlx5_flow *dev_flow,
10813 const struct rte_flow_action_count *count,
10814 const struct rte_flow_action_age *age)
10817 struct mlx5_age_param *age_param;
10819 if (count && count->shared)
10820 counter = flow_dv_counter_get_shared(dev, count->id);
10822 counter = flow_dv_counter_alloc(dev, !!age);
10823 if (!counter || age == NULL)
10825 age_param = flow_dv_counter_idx_get_age(dev, counter);
10826 age_param->context = age->context ? age->context :
10827 (void *)(uintptr_t)(dev_flow->flow_idx);
10828 age_param->timeout = age->timeout;
10829 age_param->port_id = dev->data->port_id;
10830 __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10831 __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10836 * Add Tx queue matcher
10839 * Pointer to the dev struct.
10840 * @param[in, out] matcher
10842 * @param[in, out] key
10843 * Flow matcher value.
10845 * Flow pattern to translate.
10847 * Item is inner pattern.
10850 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10851 void *matcher, void *key,
10852 const struct rte_flow_item *item)
10854 const struct mlx5_rte_flow_item_tx_queue *queue_m;
10855 const struct mlx5_rte_flow_item_tx_queue *queue_v;
10857 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10859 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10860 struct mlx5_txq_ctrl *txq;
10864 queue_m = (const void *)item->mask;
10867 queue_v = (const void *)item->spec;
10870 txq = mlx5_txq_get(dev, queue_v->queue);
10873 queue = txq->obj->sq->id;
10874 MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
10875 MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
10876 queue & queue_m->queue);
10877 mlx5_txq_release(dev, queue_v->queue);
10881 * Set the hash fields according to the @p flow information.
10883 * @param[in] dev_flow
10884 * Pointer to the mlx5_flow.
10885 * @param[in] rss_desc
10886 * Pointer to the mlx5_flow_rss_desc.
10889 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10890 struct mlx5_flow_rss_desc *rss_desc)
10892 uint64_t items = dev_flow->handle->layers;
10894 uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10896 dev_flow->hash_fields = 0;
10897 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10898 if (rss_desc->level >= 2) {
10899 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10903 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10904 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10905 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10906 if (rss_types & ETH_RSS_L3_SRC_ONLY)
10907 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10908 else if (rss_types & ETH_RSS_L3_DST_ONLY)
10909 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10911 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10913 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10914 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10915 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10916 if (rss_types & ETH_RSS_L3_SRC_ONLY)
10917 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10918 else if (rss_types & ETH_RSS_L3_DST_ONLY)
10919 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10921 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10924 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10925 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10926 if (rss_types & ETH_RSS_UDP) {
10927 if (rss_types & ETH_RSS_L4_SRC_ONLY)
10928 dev_flow->hash_fields |=
10929 IBV_RX_HASH_SRC_PORT_UDP;
10930 else if (rss_types & ETH_RSS_L4_DST_ONLY)
10931 dev_flow->hash_fields |=
10932 IBV_RX_HASH_DST_PORT_UDP;
10934 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10936 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10937 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10938 if (rss_types & ETH_RSS_TCP) {
10939 if (rss_types & ETH_RSS_L4_SRC_ONLY)
10940 dev_flow->hash_fields |=
10941 IBV_RX_HASH_SRC_PORT_TCP;
10942 else if (rss_types & ETH_RSS_L4_DST_ONLY)
10943 dev_flow->hash_fields |=
10944 IBV_RX_HASH_DST_PORT_TCP;
10946 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10952 * Prepare an Rx Hash queue.
10955 * Pointer to Ethernet device.
10956 * @param[in] dev_flow
10957 * Pointer to the mlx5_flow.
10958 * @param[in] rss_desc
10959 * Pointer to the mlx5_flow_rss_desc.
10960 * @param[out] hrxq_idx
10961 * Hash Rx queue index.
10964 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10966 static struct mlx5_hrxq *
10967 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
10968 struct mlx5_flow *dev_flow,
10969 struct mlx5_flow_rss_desc *rss_desc,
10970 uint32_t *hrxq_idx)
10972 struct mlx5_priv *priv = dev->data->dev_private;
10973 struct mlx5_flow_handle *dh = dev_flow->handle;
10974 struct mlx5_hrxq *hrxq;
10976 MLX5_ASSERT(rss_desc->queue_num);
10977 rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
10978 rss_desc->hash_fields = dev_flow->hash_fields;
10979 rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
10980 rss_desc->shared_rss = 0;
10981 *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
10984 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10990 * Release sample sub action resource.
10992 * @param[in, out] dev
10993 * Pointer to rte_eth_dev structure.
10994 * @param[in] act_res
10995 * Pointer to sample sub action resource.
10998 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
10999 struct mlx5_flow_sub_actions_idx *act_res)
11001 if (act_res->rix_hrxq) {
11002 mlx5_hrxq_release(dev, act_res->rix_hrxq);
11003 act_res->rix_hrxq = 0;
11005 if (act_res->rix_encap_decap) {
11006 flow_dv_encap_decap_resource_release(dev,
11007 act_res->rix_encap_decap);
11008 act_res->rix_encap_decap = 0;
11010 if (act_res->rix_port_id_action) {
11011 flow_dv_port_id_action_resource_release(dev,
11012 act_res->rix_port_id_action);
11013 act_res->rix_port_id_action = 0;
11015 if (act_res->rix_tag) {
11016 flow_dv_tag_release(dev, act_res->rix_tag);
11017 act_res->rix_tag = 0;
11019 if (act_res->rix_jump) {
11020 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
11021 act_res->rix_jump = 0;
11026 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
11027 struct mlx5_list_entry *entry, void *cb_ctx)
11029 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11030 struct rte_eth_dev *dev = ctx->dev;
11031 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11032 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11036 if (ctx_resource->ratio == resource->ratio &&
11037 ctx_resource->ft_type == resource->ft_type &&
11038 ctx_resource->ft_id == resource->ft_id &&
11039 ctx_resource->set_action == resource->set_action &&
11040 !memcmp((void *)&ctx_resource->sample_act,
11041 (void *)&resource->sample_act,
11042 sizeof(struct mlx5_flow_sub_actions_list))) {
11044 * Existing sample action should release the prepared
11045 * sub-actions reference counter.
11047 flow_dv_sample_sub_actions_release(dev,
11048 &ctx_resource->sample_idx);
11054 struct mlx5_list_entry *
11055 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11057 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11058 struct rte_eth_dev *dev = ctx->dev;
11059 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11060 void **sample_dv_actions = ctx_resource->sub_actions;
11061 struct mlx5_flow_dv_sample_resource *resource;
11062 struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11063 struct mlx5_priv *priv = dev->data->dev_private;
11064 struct mlx5_dev_ctx_shared *sh = priv->sh;
11065 struct mlx5_flow_tbl_resource *tbl;
11067 const uint32_t next_ft_step = 1;
11068 uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11069 uint8_t is_egress = 0;
11070 uint8_t is_transfer = 0;
11071 struct rte_flow_error *error = ctx->error;
11073 /* Register new sample resource. */
11074 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11076 rte_flow_error_set(error, ENOMEM,
11077 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11079 "cannot allocate resource memory");
11082 *resource = *ctx_resource;
11083 /* Create normal path table level */
11084 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11086 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11088 tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11089 is_egress, is_transfer,
11090 true, NULL, 0, 0, 0, error);
11092 rte_flow_error_set(error, ENOMEM,
11093 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11095 "fail to create normal path table "
11099 resource->normal_path_tbl = tbl;
11100 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11101 if (!sh->default_miss_action) {
11102 rte_flow_error_set(error, ENOMEM,
11103 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11105 "default miss action was not "
11109 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11110 sh->default_miss_action;
11112 /* Create a DR sample action */
11113 sampler_attr.sample_ratio = resource->ratio;
11114 sampler_attr.default_next_table = tbl->obj;
11115 sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11116 sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11117 &sample_dv_actions[0];
11118 sampler_attr.action = resource->set_action;
11119 if (mlx5_os_flow_dr_create_flow_action_sampler
11120 (&sampler_attr, &resource->verbs_action)) {
11121 rte_flow_error_set(error, ENOMEM,
11122 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11123 NULL, "cannot create sample action");
11126 resource->idx = idx;
11127 resource->dev = dev;
11128 return &resource->entry;
11130 if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11131 flow_dv_sample_sub_actions_release(dev,
11132 &resource->sample_idx);
11133 if (resource->normal_path_tbl)
11134 flow_dv_tbl_resource_release(MLX5_SH(dev),
11135 resource->normal_path_tbl);
11136 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11141 struct mlx5_list_entry *
11142 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11143 struct mlx5_list_entry *entry __rte_unused,
11146 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11147 struct rte_eth_dev *dev = ctx->dev;
11148 struct mlx5_flow_dv_sample_resource *resource;
11149 struct mlx5_priv *priv = dev->data->dev_private;
11150 struct mlx5_dev_ctx_shared *sh = priv->sh;
11153 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11155 rte_flow_error_set(ctx->error, ENOMEM,
11156 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11158 "cannot allocate resource memory");
11161 memcpy(resource, entry, sizeof(*resource));
11162 resource->idx = idx;
11163 resource->dev = dev;
11164 return &resource->entry;
11168 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11169 struct mlx5_list_entry *entry)
11171 struct mlx5_flow_dv_sample_resource *resource =
11172 container_of(entry, typeof(*resource), entry);
11173 struct rte_eth_dev *dev = resource->dev;
11174 struct mlx5_priv *priv = dev->data->dev_private;
11176 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11180 * Find existing sample resource or create and register a new one.
11182 * @param[in, out] dev
11183 * Pointer to rte_eth_dev structure.
11185 * Pointer to sample resource reference.
11186 * @parm[in, out] dev_flow
11187 * Pointer to the dev_flow.
11188 * @param[out] error
11189 * pointer to error structure.
11192 * 0 on success otherwise -errno and errno is set.
11195 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11196 struct mlx5_flow_dv_sample_resource *ref,
11197 struct mlx5_flow *dev_flow,
11198 struct rte_flow_error *error)
11200 struct mlx5_flow_dv_sample_resource *resource;
11201 struct mlx5_list_entry *entry;
11202 struct mlx5_priv *priv = dev->data->dev_private;
11203 struct mlx5_flow_cb_ctx ctx = {
11209 entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11212 resource = container_of(entry, typeof(*resource), entry);
11213 dev_flow->handle->dvh.rix_sample = resource->idx;
11214 dev_flow->dv.sample_res = resource;
11219 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11220 struct mlx5_list_entry *entry, void *cb_ctx)
11222 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11223 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11224 struct rte_eth_dev *dev = ctx->dev;
11225 struct mlx5_flow_dv_dest_array_resource *resource =
11226 container_of(entry, typeof(*resource), entry);
11229 if (ctx_resource->num_of_dest == resource->num_of_dest &&
11230 ctx_resource->ft_type == resource->ft_type &&
11231 !memcmp((void *)resource->sample_act,
11232 (void *)ctx_resource->sample_act,
11233 (ctx_resource->num_of_dest *
11234 sizeof(struct mlx5_flow_sub_actions_list)))) {
11236 * Existing sample action should release the prepared
11237 * sub-actions reference counter.
11239 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11240 flow_dv_sample_sub_actions_release(dev,
11241 &ctx_resource->sample_idx[idx]);
11247 struct mlx5_list_entry *
11248 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11250 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11251 struct rte_eth_dev *dev = ctx->dev;
11252 struct mlx5_flow_dv_dest_array_resource *resource;
11253 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11254 struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11255 struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11256 struct mlx5_priv *priv = dev->data->dev_private;
11257 struct mlx5_dev_ctx_shared *sh = priv->sh;
11258 struct mlx5_flow_sub_actions_list *sample_act;
11259 struct mlx5dv_dr_domain *domain;
11260 uint32_t idx = 0, res_idx = 0;
11261 struct rte_flow_error *error = ctx->error;
11262 uint64_t action_flags;
11265 /* Register new destination array resource. */
11266 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11269 rte_flow_error_set(error, ENOMEM,
11270 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11272 "cannot allocate resource memory");
11275 *resource = *ctx_resource;
11276 if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11277 domain = sh->fdb_domain;
11278 else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11279 domain = sh->rx_domain;
11281 domain = sh->tx_domain;
11282 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11283 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11284 mlx5_malloc(MLX5_MEM_ZERO,
11285 sizeof(struct mlx5dv_dr_action_dest_attr),
11287 if (!dest_attr[idx]) {
11288 rte_flow_error_set(error, ENOMEM,
11289 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11291 "cannot allocate resource memory");
11294 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11295 sample_act = &ctx_resource->sample_act[idx];
11296 action_flags = sample_act->action_flags;
11297 switch (action_flags) {
11298 case MLX5_FLOW_ACTION_QUEUE:
11299 dest_attr[idx]->dest = sample_act->dr_queue_action;
11301 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11302 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11303 dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11304 dest_attr[idx]->dest_reformat->reformat =
11305 sample_act->dr_encap_action;
11306 dest_attr[idx]->dest_reformat->dest =
11307 sample_act->dr_port_id_action;
11309 case MLX5_FLOW_ACTION_PORT_ID:
11310 dest_attr[idx]->dest = sample_act->dr_port_id_action;
11312 case MLX5_FLOW_ACTION_JUMP:
11313 dest_attr[idx]->dest = sample_act->dr_jump_action;
11316 rte_flow_error_set(error, EINVAL,
11317 RTE_FLOW_ERROR_TYPE_ACTION,
11319 "unsupported actions type");
11323 /* create a dest array actioin */
11324 ret = mlx5_os_flow_dr_create_flow_action_dest_array
11326 resource->num_of_dest,
11328 &resource->action);
11330 rte_flow_error_set(error, ENOMEM,
11331 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11333 "cannot create destination array action");
11336 resource->idx = res_idx;
11337 resource->dev = dev;
11338 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11339 mlx5_free(dest_attr[idx]);
11340 return &resource->entry;
11342 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11343 flow_dv_sample_sub_actions_release(dev,
11344 &resource->sample_idx[idx]);
11345 if (dest_attr[idx])
11346 mlx5_free(dest_attr[idx]);
11348 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11352 struct mlx5_list_entry *
11353 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11354 struct mlx5_list_entry *entry __rte_unused,
11357 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11358 struct rte_eth_dev *dev = ctx->dev;
11359 struct mlx5_flow_dv_dest_array_resource *resource;
11360 struct mlx5_priv *priv = dev->data->dev_private;
11361 struct mlx5_dev_ctx_shared *sh = priv->sh;
11362 uint32_t res_idx = 0;
11363 struct rte_flow_error *error = ctx->error;
11365 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11368 rte_flow_error_set(error, ENOMEM,
11369 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11371 "cannot allocate dest-array memory");
11374 memcpy(resource, entry, sizeof(*resource));
11375 resource->idx = res_idx;
11376 resource->dev = dev;
11377 return &resource->entry;
11381 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11382 struct mlx5_list_entry *entry)
11384 struct mlx5_flow_dv_dest_array_resource *resource =
11385 container_of(entry, typeof(*resource), entry);
11386 struct rte_eth_dev *dev = resource->dev;
11387 struct mlx5_priv *priv = dev->data->dev_private;
11389 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11393 * Find existing destination array resource or create and register a new one.
11395 * @param[in, out] dev
11396 * Pointer to rte_eth_dev structure.
11398 * Pointer to destination array resource reference.
11399 * @parm[in, out] dev_flow
11400 * Pointer to the dev_flow.
11401 * @param[out] error
11402 * pointer to error structure.
11405 * 0 on success otherwise -errno and errno is set.
11408 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11409 struct mlx5_flow_dv_dest_array_resource *ref,
11410 struct mlx5_flow *dev_flow,
11411 struct rte_flow_error *error)
11413 struct mlx5_flow_dv_dest_array_resource *resource;
11414 struct mlx5_priv *priv = dev->data->dev_private;
11415 struct mlx5_list_entry *entry;
11416 struct mlx5_flow_cb_ctx ctx = {
11422 entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11425 resource = container_of(entry, typeof(*resource), entry);
11426 dev_flow->handle->dvh.rix_dest_array = resource->idx;
11427 dev_flow->dv.dest_array_res = resource;
11432 * Convert Sample action to DV specification.
11435 * Pointer to rte_eth_dev structure.
11436 * @param[in] action
11437 * Pointer to sample action structure.
11438 * @param[in, out] dev_flow
11439 * Pointer to the mlx5_flow.
11441 * Pointer to the flow attributes.
11442 * @param[in, out] num_of_dest
11443 * Pointer to the num of destination.
11444 * @param[in, out] sample_actions
11445 * Pointer to sample actions list.
11446 * @param[in, out] res
11447 * Pointer to sample resource.
11448 * @param[out] error
11449 * Pointer to the error structure.
11452 * 0 on success, a negative errno value otherwise and rte_errno is set.
11455 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11456 const struct rte_flow_action_sample *action,
11457 struct mlx5_flow *dev_flow,
11458 const struct rte_flow_attr *attr,
11459 uint32_t *num_of_dest,
11460 void **sample_actions,
11461 struct mlx5_flow_dv_sample_resource *res,
11462 struct rte_flow_error *error)
11464 struct mlx5_priv *priv = dev->data->dev_private;
11465 const struct rte_flow_action *sub_actions;
11466 struct mlx5_flow_sub_actions_list *sample_act;
11467 struct mlx5_flow_sub_actions_idx *sample_idx;
11468 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11469 struct rte_flow *flow = dev_flow->flow;
11470 struct mlx5_flow_rss_desc *rss_desc;
11471 uint64_t action_flags = 0;
11474 rss_desc = &wks->rss_desc;
11475 sample_act = &res->sample_act;
11476 sample_idx = &res->sample_idx;
11477 res->ratio = action->ratio;
11478 sub_actions = action->actions;
11479 for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11480 int type = sub_actions->type;
11481 uint32_t pre_rix = 0;
11484 case RTE_FLOW_ACTION_TYPE_QUEUE:
11486 const struct rte_flow_action_queue *queue;
11487 struct mlx5_hrxq *hrxq;
11490 queue = sub_actions->conf;
11491 rss_desc->queue_num = 1;
11492 rss_desc->queue[0] = queue->index;
11493 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11494 rss_desc, &hrxq_idx);
11496 return rte_flow_error_set
11498 RTE_FLOW_ERROR_TYPE_ACTION,
11500 "cannot create fate queue");
11501 sample_act->dr_queue_action = hrxq->action;
11502 sample_idx->rix_hrxq = hrxq_idx;
11503 sample_actions[sample_act->actions_num++] =
11506 action_flags |= MLX5_FLOW_ACTION_QUEUE;
11507 if (action_flags & MLX5_FLOW_ACTION_MARK)
11508 dev_flow->handle->rix_hrxq = hrxq_idx;
11509 dev_flow->handle->fate_action =
11510 MLX5_FLOW_FATE_QUEUE;
11513 case RTE_FLOW_ACTION_TYPE_RSS:
11515 struct mlx5_hrxq *hrxq;
11517 const struct rte_flow_action_rss *rss;
11518 const uint8_t *rss_key;
11520 rss = sub_actions->conf;
11521 memcpy(rss_desc->queue, rss->queue,
11522 rss->queue_num * sizeof(uint16_t));
11523 rss_desc->queue_num = rss->queue_num;
11524 /* NULL RSS key indicates default RSS key. */
11525 rss_key = !rss->key ? rss_hash_default_key : rss->key;
11526 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11528 * rss->level and rss.types should be set in advance
11529 * when expanding items for RSS.
11531 flow_dv_hashfields_set(dev_flow, rss_desc);
11532 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11533 rss_desc, &hrxq_idx);
11535 return rte_flow_error_set
11537 RTE_FLOW_ERROR_TYPE_ACTION,
11539 "cannot create fate queue");
11540 sample_act->dr_queue_action = hrxq->action;
11541 sample_idx->rix_hrxq = hrxq_idx;
11542 sample_actions[sample_act->actions_num++] =
11545 action_flags |= MLX5_FLOW_ACTION_RSS;
11546 if (action_flags & MLX5_FLOW_ACTION_MARK)
11547 dev_flow->handle->rix_hrxq = hrxq_idx;
11548 dev_flow->handle->fate_action =
11549 MLX5_FLOW_FATE_QUEUE;
11552 case RTE_FLOW_ACTION_TYPE_MARK:
11554 uint32_t tag_be = mlx5_flow_mark_set
11555 (((const struct rte_flow_action_mark *)
11556 (sub_actions->conf))->id);
11558 dev_flow->handle->mark = 1;
11559 pre_rix = dev_flow->handle->dvh.rix_tag;
11560 /* Save the mark resource before sample */
11561 pre_r = dev_flow->dv.tag_resource;
11562 if (flow_dv_tag_resource_register(dev, tag_be,
11565 MLX5_ASSERT(dev_flow->dv.tag_resource);
11566 sample_act->dr_tag_action =
11567 dev_flow->dv.tag_resource->action;
11568 sample_idx->rix_tag =
11569 dev_flow->handle->dvh.rix_tag;
11570 sample_actions[sample_act->actions_num++] =
11571 sample_act->dr_tag_action;
11572 /* Recover the mark resource after sample */
11573 dev_flow->dv.tag_resource = pre_r;
11574 dev_flow->handle->dvh.rix_tag = pre_rix;
11575 action_flags |= MLX5_FLOW_ACTION_MARK;
11578 case RTE_FLOW_ACTION_TYPE_COUNT:
11580 if (!flow->counter) {
11582 flow_dv_translate_create_counter(dev,
11583 dev_flow, sub_actions->conf,
11585 if (!flow->counter)
11586 return rte_flow_error_set
11588 RTE_FLOW_ERROR_TYPE_ACTION,
11590 "cannot create counter"
11593 sample_act->dr_cnt_action =
11594 (flow_dv_counter_get_by_idx(dev,
11595 flow->counter, NULL))->action;
11596 sample_actions[sample_act->actions_num++] =
11597 sample_act->dr_cnt_action;
11598 action_flags |= MLX5_FLOW_ACTION_COUNT;
11601 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11603 struct mlx5_flow_dv_port_id_action_resource
11605 uint32_t port_id = 0;
11607 memset(&port_id_resource, 0, sizeof(port_id_resource));
11608 /* Save the port id resource before sample */
11609 pre_rix = dev_flow->handle->rix_port_id_action;
11610 pre_r = dev_flow->dv.port_id_action;
11611 if (flow_dv_translate_action_port_id(dev, sub_actions,
11614 port_id_resource.port_id = port_id;
11615 if (flow_dv_port_id_action_resource_register
11616 (dev, &port_id_resource, dev_flow, error))
11618 sample_act->dr_port_id_action =
11619 dev_flow->dv.port_id_action->action;
11620 sample_idx->rix_port_id_action =
11621 dev_flow->handle->rix_port_id_action;
11622 sample_actions[sample_act->actions_num++] =
11623 sample_act->dr_port_id_action;
11624 /* Recover the port id resource after sample */
11625 dev_flow->dv.port_id_action = pre_r;
11626 dev_flow->handle->rix_port_id_action = pre_rix;
11628 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11631 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11632 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11633 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11634 /* Save the encap resource before sample */
11635 pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11636 pre_r = dev_flow->dv.encap_decap;
11637 if (flow_dv_create_action_l2_encap(dev, sub_actions,
11642 sample_act->dr_encap_action =
11643 dev_flow->dv.encap_decap->action;
11644 sample_idx->rix_encap_decap =
11645 dev_flow->handle->dvh.rix_encap_decap;
11646 sample_actions[sample_act->actions_num++] =
11647 sample_act->dr_encap_action;
11648 /* Recover the encap resource after sample */
11649 dev_flow->dv.encap_decap = pre_r;
11650 dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11651 action_flags |= MLX5_FLOW_ACTION_ENCAP;
11654 return rte_flow_error_set(error, EINVAL,
11655 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11657 "Not support for sampler action");
11660 sample_act->action_flags = action_flags;
11661 res->ft_id = dev_flow->dv.group;
11662 if (attr->transfer) {
11664 uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11665 uint64_t set_action;
11666 } action_ctx = { .set_action = 0 };
11668 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11669 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11670 MLX5_MODIFICATION_TYPE_SET);
11671 MLX5_SET(set_action_in, action_ctx.action_in, field,
11672 MLX5_MODI_META_REG_C_0);
11673 MLX5_SET(set_action_in, action_ctx.action_in, data,
11674 priv->vport_meta_tag);
11675 res->set_action = action_ctx.set_action;
11676 } else if (attr->ingress) {
11677 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11679 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11685 * Convert Sample action to DV specification.
11688 * Pointer to rte_eth_dev structure.
11689 * @param[in, out] dev_flow
11690 * Pointer to the mlx5_flow.
11691 * @param[in] num_of_dest
11692 * The num of destination.
11693 * @param[in, out] res
11694 * Pointer to sample resource.
11695 * @param[in, out] mdest_res
11696 * Pointer to destination array resource.
11697 * @param[in] sample_actions
11698 * Pointer to sample path actions list.
11699 * @param[in] action_flags
11700 * Holds the actions detected until now.
11701 * @param[out] error
11702 * Pointer to the error structure.
11705 * 0 on success, a negative errno value otherwise and rte_errno is set.
11708 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11709 struct mlx5_flow *dev_flow,
11710 uint32_t num_of_dest,
11711 struct mlx5_flow_dv_sample_resource *res,
11712 struct mlx5_flow_dv_dest_array_resource *mdest_res,
11713 void **sample_actions,
11714 uint64_t action_flags,
11715 struct rte_flow_error *error)
11717 /* update normal path action resource into last index of array */
11718 uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11719 struct mlx5_flow_sub_actions_list *sample_act =
11720 &mdest_res->sample_act[dest_index];
11721 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11722 struct mlx5_flow_rss_desc *rss_desc;
11723 uint32_t normal_idx = 0;
11724 struct mlx5_hrxq *hrxq;
11728 rss_desc = &wks->rss_desc;
11729 if (num_of_dest > 1) {
11730 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11731 /* Handle QP action for mirroring */
11732 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11733 rss_desc, &hrxq_idx);
11735 return rte_flow_error_set
11737 RTE_FLOW_ERROR_TYPE_ACTION,
11739 "cannot create rx queue");
11741 mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11742 sample_act->dr_queue_action = hrxq->action;
11743 if (action_flags & MLX5_FLOW_ACTION_MARK)
11744 dev_flow->handle->rix_hrxq = hrxq_idx;
11745 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11747 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11749 mdest_res->sample_idx[dest_index].rix_encap_decap =
11750 dev_flow->handle->dvh.rix_encap_decap;
11751 sample_act->dr_encap_action =
11752 dev_flow->dv.encap_decap->action;
11753 dev_flow->handle->dvh.rix_encap_decap = 0;
11755 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11757 mdest_res->sample_idx[dest_index].rix_port_id_action =
11758 dev_flow->handle->rix_port_id_action;
11759 sample_act->dr_port_id_action =
11760 dev_flow->dv.port_id_action->action;
11761 dev_flow->handle->rix_port_id_action = 0;
11763 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11765 mdest_res->sample_idx[dest_index].rix_jump =
11766 dev_flow->handle->rix_jump;
11767 sample_act->dr_jump_action =
11768 dev_flow->dv.jump->action;
11769 dev_flow->handle->rix_jump = 0;
11771 sample_act->actions_num = normal_idx;
11772 /* update sample action resource into first index of array */
11773 mdest_res->ft_type = res->ft_type;
11774 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11775 sizeof(struct mlx5_flow_sub_actions_idx));
11776 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11777 sizeof(struct mlx5_flow_sub_actions_list));
11778 mdest_res->num_of_dest = num_of_dest;
11779 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11781 return rte_flow_error_set(error, EINVAL,
11782 RTE_FLOW_ERROR_TYPE_ACTION,
11783 NULL, "can't create sample "
11786 res->sub_actions = sample_actions;
11787 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11788 return rte_flow_error_set(error, EINVAL,
11789 RTE_FLOW_ERROR_TYPE_ACTION,
11791 "can't create sample action");
11797 * Remove an ASO age action from age actions list.
11800 * Pointer to the Ethernet device structure.
11802 * Pointer to the aso age action handler.
11805 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11806 struct mlx5_aso_age_action *age)
11808 struct mlx5_age_info *age_info;
11809 struct mlx5_age_param *age_param = &age->age_params;
11810 struct mlx5_priv *priv = dev->data->dev_private;
11811 uint16_t expected = AGE_CANDIDATE;
11813 age_info = GET_PORT_AGE_INFO(priv);
11814 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11815 AGE_FREE, false, __ATOMIC_RELAXED,
11816 __ATOMIC_RELAXED)) {
11818 * We need the lock even it is age timeout,
11819 * since age action may still in process.
11821 rte_spinlock_lock(&age_info->aged_sl);
11822 LIST_REMOVE(age, next);
11823 rte_spinlock_unlock(&age_info->aged_sl);
11824 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11829 * Release an ASO age action.
11832 * Pointer to the Ethernet device structure.
11833 * @param[in] age_idx
11834 * Index of ASO age action to release.
11836 * True if the release operation is during flow destroy operation.
11837 * False if the release operation is during action destroy operation.
11840 * 0 when age action was removed, otherwise the number of references.
11843 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11845 struct mlx5_priv *priv = dev->data->dev_private;
11846 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11847 struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11848 uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11851 flow_dv_aso_age_remove_from_age(dev, age);
11852 rte_spinlock_lock(&mng->free_sl);
11853 LIST_INSERT_HEAD(&mng->free, age, next);
11854 rte_spinlock_unlock(&mng->free_sl);
11860 * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11863 * Pointer to the Ethernet device structure.
11866 * 0 on success, otherwise negative errno value and rte_errno is set.
11869 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11871 struct mlx5_priv *priv = dev->data->dev_private;
11872 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11873 void *old_pools = mng->pools;
11874 uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11875 uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11876 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11879 rte_errno = ENOMEM;
11883 memcpy(pools, old_pools,
11884 mng->n * sizeof(struct mlx5_flow_counter_pool *));
11885 mlx5_free(old_pools);
11887 /* First ASO flow hit allocation - starting ASO data-path. */
11888 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11896 mng->pools = pools;
11901 * Create and initialize a new ASO aging pool.
11904 * Pointer to the Ethernet device structure.
11905 * @param[out] age_free
11906 * Where to put the pointer of a new age action.
11909 * The age actions pool pointer and @p age_free is set on success,
11910 * NULL otherwise and rte_errno is set.
11912 static struct mlx5_aso_age_pool *
11913 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11914 struct mlx5_aso_age_action **age_free)
11916 struct mlx5_priv *priv = dev->data->dev_private;
11917 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11918 struct mlx5_aso_age_pool *pool = NULL;
11919 struct mlx5_devx_obj *obj = NULL;
11922 obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->ctx,
11925 rte_errno = ENODATA;
11926 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11929 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11931 claim_zero(mlx5_devx_cmd_destroy(obj));
11932 rte_errno = ENOMEM;
11935 pool->flow_hit_aso_obj = obj;
11936 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11937 rte_spinlock_lock(&mng->resize_sl);
11938 pool->index = mng->next;
11939 /* Resize pools array if there is no room for the new pool in it. */
11940 if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11941 claim_zero(mlx5_devx_cmd_destroy(obj));
11943 rte_spinlock_unlock(&mng->resize_sl);
11946 mng->pools[pool->index] = pool;
11948 rte_spinlock_unlock(&mng->resize_sl);
11949 /* Assign the first action in the new pool, the rest go to free list. */
11950 *age_free = &pool->actions[0];
11951 for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11952 pool->actions[i].offset = i;
11953 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11959 * Allocate a ASO aging bit.
11962 * Pointer to the Ethernet device structure.
11963 * @param[out] error
11964 * Pointer to the error structure.
11967 * Index to ASO age action on success, 0 otherwise and rte_errno is set.
11970 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11972 struct mlx5_priv *priv = dev->data->dev_private;
11973 const struct mlx5_aso_age_pool *pool;
11974 struct mlx5_aso_age_action *age_free = NULL;
11975 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11978 /* Try to get the next free age action bit. */
11979 rte_spinlock_lock(&mng->free_sl);
11980 age_free = LIST_FIRST(&mng->free);
11982 LIST_REMOVE(age_free, next);
11983 } else if (!flow_dv_age_pool_create(dev, &age_free)) {
11984 rte_spinlock_unlock(&mng->free_sl);
11985 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11986 NULL, "failed to create ASO age pool");
11987 return 0; /* 0 is an error. */
11989 rte_spinlock_unlock(&mng->free_sl);
11990 pool = container_of
11991 ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
11992 (age_free - age_free->offset), const struct mlx5_aso_age_pool,
11994 if (!age_free->dr_action) {
11995 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
11999 rte_flow_error_set(error, rte_errno,
12000 RTE_FLOW_ERROR_TYPE_ACTION,
12001 NULL, "failed to get reg_c "
12002 "for ASO flow hit");
12003 return 0; /* 0 is an error. */
12005 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
12006 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
12007 (priv->sh->rx_domain,
12008 pool->flow_hit_aso_obj->obj, age_free->offset,
12009 MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
12010 (reg_c - REG_C_0));
12011 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
12012 if (!age_free->dr_action) {
12014 rte_spinlock_lock(&mng->free_sl);
12015 LIST_INSERT_HEAD(&mng->free, age_free, next);
12016 rte_spinlock_unlock(&mng->free_sl);
12017 rte_flow_error_set(error, rte_errno,
12018 RTE_FLOW_ERROR_TYPE_ACTION,
12019 NULL, "failed to create ASO "
12020 "flow hit action");
12021 return 0; /* 0 is an error. */
12024 __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
12025 return pool->index | ((age_free->offset + 1) << 16);
12029 * Initialize flow ASO age parameters.
12032 * Pointer to rte_eth_dev structure.
12033 * @param[in] age_idx
12034 * Index of ASO age action.
12035 * @param[in] context
12036 * Pointer to flow counter age context.
12037 * @param[in] timeout
12038 * Aging timeout in seconds.
12042 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12047 struct mlx5_aso_age_action *aso_age;
12049 aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12050 MLX5_ASSERT(aso_age);
12051 aso_age->age_params.context = context;
12052 aso_age->age_params.timeout = timeout;
12053 aso_age->age_params.port_id = dev->data->port_id;
12054 __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12056 __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12061 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12062 const struct rte_flow_item_integrity *value,
12063 void *headers_m, void *headers_v)
12066 /* application l4_ok filter aggregates all hardware l4 filters
12067 * therefore hw l4_checksum_ok must be implicitly added here.
12069 struct rte_flow_item_integrity local_item;
12071 local_item.l4_csum_ok = 1;
12072 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12073 local_item.l4_csum_ok);
12074 if (value->l4_ok) {
12075 /* application l4_ok = 1 matches sets both hw flags
12076 * l4_ok and l4_checksum_ok flags to 1.
12078 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12079 l4_checksum_ok, local_item.l4_csum_ok);
12080 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
12082 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
12085 /* application l4_ok = 0 matches on hw flag
12086 * l4_checksum_ok = 0 only.
12088 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12089 l4_checksum_ok, 0);
12091 } else if (mask->l4_csum_ok) {
12092 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12094 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12095 value->l4_csum_ok);
12100 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12101 const struct rte_flow_item_integrity *value,
12102 void *headers_m, void *headers_v,
12106 /* application l3_ok filter aggregates all hardware l3 filters
12107 * therefore hw ipv4_checksum_ok must be implicitly added here.
12109 struct rte_flow_item_integrity local_item;
12111 local_item.ipv4_csum_ok = !!is_ipv4;
12112 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12113 local_item.ipv4_csum_ok);
12114 if (value->l3_ok) {
12115 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12116 ipv4_checksum_ok, local_item.ipv4_csum_ok);
12117 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
12119 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12122 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12123 ipv4_checksum_ok, 0);
12125 } else if (mask->ipv4_csum_ok) {
12126 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12127 mask->ipv4_csum_ok);
12128 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12129 value->ipv4_csum_ok);
12134 flow_dv_translate_item_integrity(void *matcher, void *key,
12135 const struct rte_flow_item *head_item,
12136 const struct rte_flow_item *integrity_item)
12138 const struct rte_flow_item_integrity *mask = integrity_item->mask;
12139 const struct rte_flow_item_integrity *value = integrity_item->spec;
12140 const struct rte_flow_item *tunnel_item, *end_item, *item;
12143 uint32_t l3_protocol;
12148 mask = &rte_flow_item_integrity_mask;
12149 if (value->level > 1) {
12150 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12152 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12154 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12156 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12158 tunnel_item = mlx5_flow_find_tunnel_item(head_item);
12159 if (value->level > 1) {
12160 /* tunnel item was verified during the item validation */
12161 item = tunnel_item;
12162 end_item = mlx5_find_end_item(tunnel_item);
12165 end_item = tunnel_item ? tunnel_item :
12166 mlx5_find_end_item(integrity_item);
12168 l3_protocol = mask->l3_ok ?
12169 mlx5_flow_locate_proto_l3(&item, end_item) : 0;
12170 flow_dv_translate_integrity_l3(mask, value, headers_m, headers_v,
12171 l3_protocol == RTE_ETHER_TYPE_IPV4);
12172 flow_dv_translate_integrity_l4(mask, value, headers_m, headers_v);
12176 * Prepares DV flow counter with aging configuration.
12177 * Gets it by index when exists, creates a new one when doesn't.
12180 * Pointer to rte_eth_dev structure.
12181 * @param[in] dev_flow
12182 * Pointer to the mlx5_flow.
12183 * @param[in, out] flow
12184 * Pointer to the sub flow.
12186 * Pointer to the counter action configuration.
12188 * Pointer to the aging action configuration.
12189 * @param[out] error
12190 * Pointer to the error structure.
12193 * Pointer to the counter, NULL otherwise.
12195 static struct mlx5_flow_counter *
12196 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12197 struct mlx5_flow *dev_flow,
12198 struct rte_flow *flow,
12199 const struct rte_flow_action_count *count,
12200 const struct rte_flow_action_age *age,
12201 struct rte_flow_error *error)
12203 if (!flow->counter) {
12204 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12206 if (!flow->counter) {
12207 rte_flow_error_set(error, rte_errno,
12208 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12209 "cannot create counter object.");
12213 return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12217 * Release an ASO CT action by its own device.
12220 * Pointer to the Ethernet device structure.
12222 * Index of ASO CT action to release.
12225 * 0 when CT action was removed, otherwise the number of references.
12228 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12230 struct mlx5_priv *priv = dev->data->dev_private;
12231 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12233 struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12234 enum mlx5_aso_ct_state state =
12235 __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12237 /* Cannot release when CT is in the ASO SQ. */
12238 if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12240 ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12242 if (ct->dr_action_orig) {
12243 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12244 claim_zero(mlx5_glue->destroy_flow_action
12245 (ct->dr_action_orig));
12247 ct->dr_action_orig = NULL;
12249 if (ct->dr_action_rply) {
12250 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12251 claim_zero(mlx5_glue->destroy_flow_action
12252 (ct->dr_action_rply));
12254 ct->dr_action_rply = NULL;
12256 /* Clear the state to free, no need in 1st allocation. */
12257 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12258 rte_spinlock_lock(&mng->ct_sl);
12259 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12260 rte_spinlock_unlock(&mng->ct_sl);
12266 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx)
12268 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12269 uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12270 struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12273 MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12274 if (dev->data->dev_started != 1)
12276 return flow_dv_aso_ct_dev_release(owndev, idx);
12280 * Resize the ASO CT pools array by 64 pools.
12283 * Pointer to the Ethernet device structure.
12286 * 0 on success, otherwise negative errno value and rte_errno is set.
12289 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12291 struct mlx5_priv *priv = dev->data->dev_private;
12292 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12293 void *old_pools = mng->pools;
12294 /* Magic number now, need a macro. */
12295 uint32_t resize = mng->n + 64;
12296 uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12297 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12300 rte_errno = ENOMEM;
12303 rte_rwlock_write_lock(&mng->resize_rwl);
12304 /* ASO SQ/QP was already initialized in the startup. */
12306 /* Realloc could be an alternative choice. */
12307 rte_memcpy(pools, old_pools,
12308 mng->n * sizeof(struct mlx5_aso_ct_pool *));
12309 mlx5_free(old_pools);
12312 mng->pools = pools;
12313 rte_rwlock_write_unlock(&mng->resize_rwl);
12318 * Create and initialize a new ASO CT pool.
12321 * Pointer to the Ethernet device structure.
12322 * @param[out] ct_free
12323 * Where to put the pointer of a new CT action.
12326 * The CT actions pool pointer and @p ct_free is set on success,
12327 * NULL otherwise and rte_errno is set.
12329 static struct mlx5_aso_ct_pool *
12330 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12331 struct mlx5_aso_ct_action **ct_free)
12333 struct mlx5_priv *priv = dev->data->dev_private;
12334 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12335 struct mlx5_aso_ct_pool *pool = NULL;
12336 struct mlx5_devx_obj *obj = NULL;
12338 uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12340 obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->ctx,
12341 priv->sh->pdn, log_obj_size);
12343 rte_errno = ENODATA;
12344 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12347 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12349 rte_errno = ENOMEM;
12350 claim_zero(mlx5_devx_cmd_destroy(obj));
12353 pool->devx_obj = obj;
12354 pool->index = mng->next;
12355 /* Resize pools array if there is no room for the new pool in it. */
12356 if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12357 claim_zero(mlx5_devx_cmd_destroy(obj));
12361 mng->pools[pool->index] = pool;
12363 /* Assign the first action in the new pool, the rest go to free list. */
12364 *ct_free = &pool->actions[0];
12365 /* Lock outside, the list operation is safe here. */
12366 for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12367 /* refcnt is 0 when allocating the memory. */
12368 pool->actions[i].offset = i;
12369 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12375 * Allocate a ASO CT action from free list.
12378 * Pointer to the Ethernet device structure.
12379 * @param[out] error
12380 * Pointer to the error structure.
12383 * Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12386 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12388 struct mlx5_priv *priv = dev->data->dev_private;
12389 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12390 struct mlx5_aso_ct_action *ct = NULL;
12391 struct mlx5_aso_ct_pool *pool;
12396 if (!priv->config.devx) {
12397 rte_errno = ENOTSUP;
12400 /* Get a free CT action, if no, a new pool will be created. */
12401 rte_spinlock_lock(&mng->ct_sl);
12402 ct = LIST_FIRST(&mng->free_cts);
12404 LIST_REMOVE(ct, next);
12405 } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12406 rte_spinlock_unlock(&mng->ct_sl);
12407 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12408 NULL, "failed to create ASO CT pool");
12411 rte_spinlock_unlock(&mng->ct_sl);
12412 pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12413 ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12414 /* 0: inactive, 1: created, 2+: used by flows. */
12415 __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12416 reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12417 if (!ct->dr_action_orig) {
12418 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12419 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12420 (priv->sh->rx_domain, pool->devx_obj->obj,
12422 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12425 RTE_SET_USED(reg_c);
12427 if (!ct->dr_action_orig) {
12428 flow_dv_aso_ct_dev_release(dev, ct_idx);
12429 rte_flow_error_set(error, rte_errno,
12430 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12431 "failed to create ASO CT action");
12435 if (!ct->dr_action_rply) {
12436 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12437 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12438 (priv->sh->rx_domain, pool->devx_obj->obj,
12440 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12443 if (!ct->dr_action_rply) {
12444 flow_dv_aso_ct_dev_release(dev, ct_idx);
12445 rte_flow_error_set(error, rte_errno,
12446 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12447 "failed to create ASO CT action");
12455 * Create a conntrack object with context and actions by using ASO mechanism.
12458 * Pointer to rte_eth_dev structure.
12460 * Pointer to conntrack information profile.
12461 * @param[out] error
12462 * Pointer to the error structure.
12465 * Index to conntrack object on success, 0 otherwise.
12468 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12469 const struct rte_flow_action_conntrack *pro,
12470 struct rte_flow_error *error)
12472 struct mlx5_priv *priv = dev->data->dev_private;
12473 struct mlx5_dev_ctx_shared *sh = priv->sh;
12474 struct mlx5_aso_ct_action *ct;
12477 if (!sh->ct_aso_en)
12478 return rte_flow_error_set(error, ENOTSUP,
12479 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12480 "Connection is not supported");
12481 idx = flow_dv_aso_ct_alloc(dev, error);
12483 return rte_flow_error_set(error, rte_errno,
12484 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12485 "Failed to allocate CT object");
12486 ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12487 if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12488 return rte_flow_error_set(error, EBUSY,
12489 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12490 "Failed to update CT");
12491 ct->is_original = !!pro->is_original_dir;
12492 ct->peer = pro->peer_port;
12497 * Fill the flow with DV spec, lock free
12498 * (mutex should be acquired by caller).
12501 * Pointer to rte_eth_dev structure.
12502 * @param[in, out] dev_flow
12503 * Pointer to the sub flow.
12505 * Pointer to the flow attributes.
12507 * Pointer to the list of items.
12508 * @param[in] actions
12509 * Pointer to the list of actions.
12510 * @param[out] error
12511 * Pointer to the error structure.
12514 * 0 on success, a negative errno value otherwise and rte_errno is set.
12517 flow_dv_translate(struct rte_eth_dev *dev,
12518 struct mlx5_flow *dev_flow,
12519 const struct rte_flow_attr *attr,
12520 const struct rte_flow_item items[],
12521 const struct rte_flow_action actions[],
12522 struct rte_flow_error *error)
12524 struct mlx5_priv *priv = dev->data->dev_private;
12525 struct mlx5_dev_config *dev_conf = &priv->config;
12526 struct rte_flow *flow = dev_flow->flow;
12527 struct mlx5_flow_handle *handle = dev_flow->handle;
12528 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12529 struct mlx5_flow_rss_desc *rss_desc;
12530 uint64_t item_flags = 0;
12531 uint64_t last_item = 0;
12532 uint64_t action_flags = 0;
12533 struct mlx5_flow_dv_matcher matcher = {
12535 .size = sizeof(matcher.mask.buf),
12539 bool actions_end = false;
12541 struct mlx5_flow_dv_modify_hdr_resource res;
12542 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12543 sizeof(struct mlx5_modification_cmd) *
12544 (MLX5_MAX_MODIFY_NUM + 1)];
12546 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12547 const struct rte_flow_action_count *count = NULL;
12548 const struct rte_flow_action_age *non_shared_age = NULL;
12549 union flow_dv_attr flow_attr = { .attr = 0 };
12551 union mlx5_flow_tbl_key tbl_key;
12552 uint32_t modify_action_position = UINT32_MAX;
12553 void *match_mask = matcher.mask.buf;
12554 void *match_value = dev_flow->dv.value.buf;
12555 uint8_t next_protocol = 0xff;
12556 struct rte_vlan_hdr vlan = { 0 };
12557 struct mlx5_flow_dv_dest_array_resource mdest_res;
12558 struct mlx5_flow_dv_sample_resource sample_res;
12559 void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12560 const struct rte_flow_action_sample *sample = NULL;
12561 struct mlx5_flow_sub_actions_list *sample_act;
12562 uint32_t sample_act_pos = UINT32_MAX;
12563 uint32_t age_act_pos = UINT32_MAX;
12564 uint32_t num_of_dest = 0;
12565 int tmp_actions_n = 0;
12568 const struct mlx5_flow_tunnel *tunnel = NULL;
12569 struct flow_grp_info grp_info = {
12570 .external = !!dev_flow->external,
12571 .transfer = !!attr->transfer,
12572 .fdb_def_rule = !!priv->fdb_def_rule,
12573 .skip_scale = dev_flow->skip_scale &
12574 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12575 .std_tbl_fix = true,
12577 const struct rte_flow_item *head_item = items;
12580 return rte_flow_error_set(error, ENOMEM,
12581 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12583 "failed to push flow workspace");
12584 rss_desc = &wks->rss_desc;
12585 memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12586 memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12587 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12588 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12589 /* update normal path action resource into last index of array */
12590 sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12591 if (is_tunnel_offload_active(dev)) {
12592 if (dev_flow->tunnel) {
12593 RTE_VERIFY(dev_flow->tof_type ==
12594 MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12595 tunnel = dev_flow->tunnel;
12597 tunnel = mlx5_get_tof(items, actions,
12598 &dev_flow->tof_type);
12599 dev_flow->tunnel = tunnel;
12601 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12602 (dev, attr, tunnel, dev_flow->tof_type);
12604 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12605 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12606 ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12610 dev_flow->dv.group = table;
12611 if (attr->transfer)
12612 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12613 /* number of actions must be set to 0 in case of dirty stack. */
12614 mhdr_res->actions_num = 0;
12615 if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12617 * do not add decap action if match rule drops packet
12618 * HW rejects rules with decap & drop
12620 * if tunnel match rule was inserted before matching tunnel set
12621 * rule flow table used in the match rule must be registered.
12622 * current implementation handles that in the
12623 * flow_dv_match_register() at the function end.
12625 bool add_decap = true;
12626 const struct rte_flow_action *ptr = actions;
12628 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12629 if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12635 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12639 dev_flow->dv.actions[actions_n++] =
12640 dev_flow->dv.encap_decap->action;
12641 action_flags |= MLX5_FLOW_ACTION_DECAP;
12644 for (; !actions_end ; actions++) {
12645 const struct rte_flow_action_queue *queue;
12646 const struct rte_flow_action_rss *rss;
12647 const struct rte_flow_action *action = actions;
12648 const uint8_t *rss_key;
12649 struct mlx5_flow_tbl_resource *tbl;
12650 struct mlx5_aso_age_action *age_act;
12651 struct mlx5_flow_counter *cnt_act;
12652 uint32_t port_id = 0;
12653 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12654 int action_type = actions->type;
12655 const struct rte_flow_action *found_action = NULL;
12656 uint32_t jump_group = 0;
12657 uint32_t owner_idx;
12658 struct mlx5_aso_ct_action *ct;
12660 if (!mlx5_flow_os_action_supported(action_type))
12661 return rte_flow_error_set(error, ENOTSUP,
12662 RTE_FLOW_ERROR_TYPE_ACTION,
12664 "action not supported");
12665 switch (action_type) {
12666 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12667 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12669 case RTE_FLOW_ACTION_TYPE_VOID:
12671 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12672 if (flow_dv_translate_action_port_id(dev, action,
12675 port_id_resource.port_id = port_id;
12676 MLX5_ASSERT(!handle->rix_port_id_action);
12677 if (flow_dv_port_id_action_resource_register
12678 (dev, &port_id_resource, dev_flow, error))
12680 dev_flow->dv.actions[actions_n++] =
12681 dev_flow->dv.port_id_action->action;
12682 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12683 dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12684 sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12687 case RTE_FLOW_ACTION_TYPE_FLAG:
12688 action_flags |= MLX5_FLOW_ACTION_FLAG;
12689 dev_flow->handle->mark = 1;
12690 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12691 struct rte_flow_action_mark mark = {
12692 .id = MLX5_FLOW_MARK_DEFAULT,
12695 if (flow_dv_convert_action_mark(dev, &mark,
12699 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12702 tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12704 * Only one FLAG or MARK is supported per device flow
12705 * right now. So the pointer to the tag resource must be
12706 * zero before the register process.
12708 MLX5_ASSERT(!handle->dvh.rix_tag);
12709 if (flow_dv_tag_resource_register(dev, tag_be,
12712 MLX5_ASSERT(dev_flow->dv.tag_resource);
12713 dev_flow->dv.actions[actions_n++] =
12714 dev_flow->dv.tag_resource->action;
12716 case RTE_FLOW_ACTION_TYPE_MARK:
12717 action_flags |= MLX5_FLOW_ACTION_MARK;
12718 dev_flow->handle->mark = 1;
12719 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12720 const struct rte_flow_action_mark *mark =
12721 (const struct rte_flow_action_mark *)
12724 if (flow_dv_convert_action_mark(dev, mark,
12728 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12732 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12733 /* Legacy (non-extensive) MARK action. */
12734 tag_be = mlx5_flow_mark_set
12735 (((const struct rte_flow_action_mark *)
12736 (actions->conf))->id);
12737 MLX5_ASSERT(!handle->dvh.rix_tag);
12738 if (flow_dv_tag_resource_register(dev, tag_be,
12741 MLX5_ASSERT(dev_flow->dv.tag_resource);
12742 dev_flow->dv.actions[actions_n++] =
12743 dev_flow->dv.tag_resource->action;
12745 case RTE_FLOW_ACTION_TYPE_SET_META:
12746 if (flow_dv_convert_action_set_meta
12747 (dev, mhdr_res, attr,
12748 (const struct rte_flow_action_set_meta *)
12749 actions->conf, error))
12751 action_flags |= MLX5_FLOW_ACTION_SET_META;
12753 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12754 if (flow_dv_convert_action_set_tag
12756 (const struct rte_flow_action_set_tag *)
12757 actions->conf, error))
12759 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12761 case RTE_FLOW_ACTION_TYPE_DROP:
12762 action_flags |= MLX5_FLOW_ACTION_DROP;
12763 dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12765 case RTE_FLOW_ACTION_TYPE_QUEUE:
12766 queue = actions->conf;
12767 rss_desc->queue_num = 1;
12768 rss_desc->queue[0] = queue->index;
12769 action_flags |= MLX5_FLOW_ACTION_QUEUE;
12770 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12771 sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12774 case RTE_FLOW_ACTION_TYPE_RSS:
12775 rss = actions->conf;
12776 memcpy(rss_desc->queue, rss->queue,
12777 rss->queue_num * sizeof(uint16_t));
12778 rss_desc->queue_num = rss->queue_num;
12779 /* NULL RSS key indicates default RSS key. */
12780 rss_key = !rss->key ? rss_hash_default_key : rss->key;
12781 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12783 * rss->level and rss.types should be set in advance
12784 * when expanding items for RSS.
12786 action_flags |= MLX5_FLOW_ACTION_RSS;
12787 dev_flow->handle->fate_action = rss_desc->shared_rss ?
12788 MLX5_FLOW_FATE_SHARED_RSS :
12789 MLX5_FLOW_FATE_QUEUE;
12791 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12792 flow->age = (uint32_t)(uintptr_t)(action->conf);
12793 age_act = flow_aso_age_get_by_idx(dev, flow->age);
12794 __atomic_fetch_add(&age_act->refcnt, 1,
12796 age_act_pos = actions_n++;
12797 action_flags |= MLX5_FLOW_ACTION_AGE;
12799 case RTE_FLOW_ACTION_TYPE_AGE:
12800 non_shared_age = action->conf;
12801 age_act_pos = actions_n++;
12802 action_flags |= MLX5_FLOW_ACTION_AGE;
12804 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12805 flow->counter = (uint32_t)(uintptr_t)(action->conf);
12806 cnt_act = flow_dv_counter_get_by_idx(dev, flow->counter,
12808 __atomic_fetch_add(&cnt_act->shared_info.refcnt, 1,
12810 /* Save information first, will apply later. */
12811 action_flags |= MLX5_FLOW_ACTION_COUNT;
12813 case RTE_FLOW_ACTION_TYPE_COUNT:
12814 if (!dev_conf->devx) {
12815 return rte_flow_error_set
12817 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12819 "count action not supported");
12821 /* Save information first, will apply later. */
12822 count = action->conf;
12823 action_flags |= MLX5_FLOW_ACTION_COUNT;
12825 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12826 dev_flow->dv.actions[actions_n++] =
12827 priv->sh->pop_vlan_action;
12828 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12830 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12831 if (!(action_flags &
12832 MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12833 flow_dev_get_vlan_info_from_items(items, &vlan);
12834 vlan.eth_proto = rte_be_to_cpu_16
12835 ((((const struct rte_flow_action_of_push_vlan *)
12836 actions->conf)->ethertype));
12837 found_action = mlx5_flow_find_action
12839 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12841 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12842 found_action = mlx5_flow_find_action
12844 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12846 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12847 if (flow_dv_create_action_push_vlan
12848 (dev, attr, &vlan, dev_flow, error))
12850 dev_flow->dv.actions[actions_n++] =
12851 dev_flow->dv.push_vlan_res->action;
12852 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12854 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12855 /* of_vlan_push action handled this action */
12856 MLX5_ASSERT(action_flags &
12857 MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12859 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12860 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12862 flow_dev_get_vlan_info_from_items(items, &vlan);
12863 mlx5_update_vlan_vid_pcp(actions, &vlan);
12864 /* If no VLAN push - this is a modify header action */
12865 if (flow_dv_convert_action_modify_vlan_vid
12866 (mhdr_res, actions, error))
12868 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12870 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12871 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12872 if (flow_dv_create_action_l2_encap(dev, actions,
12877 dev_flow->dv.actions[actions_n++] =
12878 dev_flow->dv.encap_decap->action;
12879 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12880 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12881 sample_act->action_flags |=
12882 MLX5_FLOW_ACTION_ENCAP;
12884 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12885 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12886 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12890 dev_flow->dv.actions[actions_n++] =
12891 dev_flow->dv.encap_decap->action;
12892 action_flags |= MLX5_FLOW_ACTION_DECAP;
12894 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12895 /* Handle encap with preceding decap. */
12896 if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12897 if (flow_dv_create_action_raw_encap
12898 (dev, actions, dev_flow, attr, error))
12900 dev_flow->dv.actions[actions_n++] =
12901 dev_flow->dv.encap_decap->action;
12903 /* Handle encap without preceding decap. */
12904 if (flow_dv_create_action_l2_encap
12905 (dev, actions, dev_flow, attr->transfer,
12908 dev_flow->dv.actions[actions_n++] =
12909 dev_flow->dv.encap_decap->action;
12911 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12912 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12913 sample_act->action_flags |=
12914 MLX5_FLOW_ACTION_ENCAP;
12916 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
12917 while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
12919 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
12920 if (flow_dv_create_action_l2_decap
12921 (dev, dev_flow, attr->transfer, error))
12923 dev_flow->dv.actions[actions_n++] =
12924 dev_flow->dv.encap_decap->action;
12926 /* If decap is followed by encap, handle it at encap. */
12927 action_flags |= MLX5_FLOW_ACTION_DECAP;
12929 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
12930 dev_flow->dv.actions[actions_n++] =
12931 (void *)(uintptr_t)action->conf;
12932 action_flags |= MLX5_FLOW_ACTION_JUMP;
12934 case RTE_FLOW_ACTION_TYPE_JUMP:
12935 jump_group = ((const struct rte_flow_action_jump *)
12936 action->conf)->group;
12937 grp_info.std_tbl_fix = 0;
12938 if (dev_flow->skip_scale &
12939 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
12940 grp_info.skip_scale = 1;
12942 grp_info.skip_scale = 0;
12943 ret = mlx5_flow_group_to_table(dev, tunnel,
12949 tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
12951 !!dev_flow->external,
12952 tunnel, jump_group, 0,
12955 return rte_flow_error_set
12957 RTE_FLOW_ERROR_TYPE_ACTION,
12959 "cannot create jump action.");
12960 if (flow_dv_jump_tbl_resource_register
12961 (dev, tbl, dev_flow, error)) {
12962 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12963 return rte_flow_error_set
12965 RTE_FLOW_ERROR_TYPE_ACTION,
12967 "cannot create jump action.");
12969 dev_flow->dv.actions[actions_n++] =
12970 dev_flow->dv.jump->action;
12971 action_flags |= MLX5_FLOW_ACTION_JUMP;
12972 dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
12973 sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
12976 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
12977 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
12978 if (flow_dv_convert_action_modify_mac
12979 (mhdr_res, actions, error))
12981 action_flags |= actions->type ==
12982 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
12983 MLX5_FLOW_ACTION_SET_MAC_SRC :
12984 MLX5_FLOW_ACTION_SET_MAC_DST;
12986 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
12987 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
12988 if (flow_dv_convert_action_modify_ipv4
12989 (mhdr_res, actions, error))
12991 action_flags |= actions->type ==
12992 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
12993 MLX5_FLOW_ACTION_SET_IPV4_SRC :
12994 MLX5_FLOW_ACTION_SET_IPV4_DST;
12996 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
12997 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
12998 if (flow_dv_convert_action_modify_ipv6
12999 (mhdr_res, actions, error))
13001 action_flags |= actions->type ==
13002 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13003 MLX5_FLOW_ACTION_SET_IPV6_SRC :
13004 MLX5_FLOW_ACTION_SET_IPV6_DST;
13006 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13007 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13008 if (flow_dv_convert_action_modify_tp
13009 (mhdr_res, actions, items,
13010 &flow_attr, dev_flow, !!(action_flags &
13011 MLX5_FLOW_ACTION_DECAP), error))
13013 action_flags |= actions->type ==
13014 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13015 MLX5_FLOW_ACTION_SET_TP_SRC :
13016 MLX5_FLOW_ACTION_SET_TP_DST;
13018 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13019 if (flow_dv_convert_action_modify_dec_ttl
13020 (mhdr_res, items, &flow_attr, dev_flow,
13022 MLX5_FLOW_ACTION_DECAP), error))
13024 action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13026 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13027 if (flow_dv_convert_action_modify_ttl
13028 (mhdr_res, actions, items, &flow_attr,
13029 dev_flow, !!(action_flags &
13030 MLX5_FLOW_ACTION_DECAP), error))
13032 action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13034 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13035 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13036 if (flow_dv_convert_action_modify_tcp_seq
13037 (mhdr_res, actions, error))
13039 action_flags |= actions->type ==
13040 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13041 MLX5_FLOW_ACTION_INC_TCP_SEQ :
13042 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13045 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13046 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13047 if (flow_dv_convert_action_modify_tcp_ack
13048 (mhdr_res, actions, error))
13050 action_flags |= actions->type ==
13051 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13052 MLX5_FLOW_ACTION_INC_TCP_ACK :
13053 MLX5_FLOW_ACTION_DEC_TCP_ACK;
13055 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13056 if (flow_dv_convert_action_set_reg
13057 (mhdr_res, actions, error))
13059 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13061 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13062 if (flow_dv_convert_action_copy_mreg
13063 (dev, mhdr_res, actions, error))
13065 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13067 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13068 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13069 dev_flow->handle->fate_action =
13070 MLX5_FLOW_FATE_DEFAULT_MISS;
13072 case RTE_FLOW_ACTION_TYPE_METER:
13074 return rte_flow_error_set(error, rte_errno,
13075 RTE_FLOW_ERROR_TYPE_ACTION,
13076 NULL, "Failed to get meter in flow.");
13077 /* Set the meter action. */
13078 dev_flow->dv.actions[actions_n++] =
13079 wks->fm->meter_action;
13080 action_flags |= MLX5_FLOW_ACTION_METER;
13082 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13083 if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13086 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13088 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13089 if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13092 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13094 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13095 sample_act_pos = actions_n;
13096 sample = (const struct rte_flow_action_sample *)
13099 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13100 /* put encap action into group if work with port id */
13101 if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13102 (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13103 sample_act->action_flags |=
13104 MLX5_FLOW_ACTION_ENCAP;
13106 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13107 if (flow_dv_convert_action_modify_field
13108 (dev, mhdr_res, actions, attr, error))
13110 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13112 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13113 owner_idx = (uint32_t)(uintptr_t)action->conf;
13114 ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13116 return rte_flow_error_set(error, EINVAL,
13117 RTE_FLOW_ERROR_TYPE_ACTION,
13119 "Failed to get CT object.");
13120 if (mlx5_aso_ct_available(priv->sh, ct))
13121 return rte_flow_error_set(error, rte_errno,
13122 RTE_FLOW_ERROR_TYPE_ACTION,
13124 "CT is unavailable.");
13125 if (ct->is_original)
13126 dev_flow->dv.actions[actions_n] =
13127 ct->dr_action_orig;
13129 dev_flow->dv.actions[actions_n] =
13130 ct->dr_action_rply;
13131 flow->indirect_type = MLX5_INDIRECT_ACTION_TYPE_CT;
13132 flow->ct = owner_idx;
13133 __atomic_fetch_add(&ct->refcnt, 1, __ATOMIC_RELAXED);
13135 action_flags |= MLX5_FLOW_ACTION_CT;
13137 case RTE_FLOW_ACTION_TYPE_END:
13138 actions_end = true;
13139 if (mhdr_res->actions_num) {
13140 /* create modify action if needed. */
13141 if (flow_dv_modify_hdr_resource_register
13142 (dev, mhdr_res, dev_flow, error))
13144 dev_flow->dv.actions[modify_action_position] =
13145 handle->dvh.modify_hdr->action;
13148 * Handle AGE and COUNT action by single HW counter
13149 * when they are not shared.
13151 if (action_flags & MLX5_FLOW_ACTION_AGE) {
13152 if ((non_shared_age &&
13153 count && !count->shared) ||
13154 !(priv->sh->flow_hit_aso_en &&
13155 (attr->group || attr->transfer))) {
13156 /* Creates age by counters. */
13157 cnt_act = flow_dv_prepare_counter
13164 dev_flow->dv.actions[age_act_pos] =
13168 if (!flow->age && non_shared_age) {
13169 flow->age = flow_dv_aso_age_alloc
13173 flow_dv_aso_age_params_init
13175 non_shared_age->context ?
13176 non_shared_age->context :
13177 (void *)(uintptr_t)
13178 (dev_flow->flow_idx),
13179 non_shared_age->timeout);
13181 age_act = flow_aso_age_get_by_idx(dev,
13183 dev_flow->dv.actions[age_act_pos] =
13184 age_act->dr_action;
13186 if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13188 * Create one count action, to be used
13189 * by all sub-flows.
13191 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13196 dev_flow->dv.actions[actions_n++] =
13202 if (mhdr_res->actions_num &&
13203 modify_action_position == UINT32_MAX)
13204 modify_action_position = actions_n++;
13206 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13207 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13208 int item_type = items->type;
13210 if (!mlx5_flow_os_item_supported(item_type))
13211 return rte_flow_error_set(error, ENOTSUP,
13212 RTE_FLOW_ERROR_TYPE_ITEM,
13213 NULL, "item not supported");
13214 switch (item_type) {
13215 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13216 flow_dv_translate_item_port_id
13217 (dev, match_mask, match_value, items, attr);
13218 last_item = MLX5_FLOW_ITEM_PORT_ID;
13220 case RTE_FLOW_ITEM_TYPE_ETH:
13221 flow_dv_translate_item_eth(match_mask, match_value,
13223 dev_flow->dv.group);
13224 matcher.priority = action_flags &
13225 MLX5_FLOW_ACTION_DEFAULT_MISS &&
13226 !dev_flow->external ?
13227 MLX5_PRIORITY_MAP_L3 :
13228 MLX5_PRIORITY_MAP_L2;
13229 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13230 MLX5_FLOW_LAYER_OUTER_L2;
13232 case RTE_FLOW_ITEM_TYPE_VLAN:
13233 flow_dv_translate_item_vlan(dev_flow,
13234 match_mask, match_value,
13236 dev_flow->dv.group);
13237 matcher.priority = MLX5_PRIORITY_MAP_L2;
13238 last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13239 MLX5_FLOW_LAYER_INNER_VLAN) :
13240 (MLX5_FLOW_LAYER_OUTER_L2 |
13241 MLX5_FLOW_LAYER_OUTER_VLAN);
13243 case RTE_FLOW_ITEM_TYPE_IPV4:
13244 mlx5_flow_tunnel_ip_check(items, next_protocol,
13245 &item_flags, &tunnel);
13246 flow_dv_translate_item_ipv4(match_mask, match_value,
13248 dev_flow->dv.group);
13249 matcher.priority = MLX5_PRIORITY_MAP_L3;
13250 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13251 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13252 if (items->mask != NULL &&
13253 ((const struct rte_flow_item_ipv4 *)
13254 items->mask)->hdr.next_proto_id) {
13256 ((const struct rte_flow_item_ipv4 *)
13257 (items->spec))->hdr.next_proto_id;
13259 ((const struct rte_flow_item_ipv4 *)
13260 (items->mask))->hdr.next_proto_id;
13262 /* Reset for inner layer. */
13263 next_protocol = 0xff;
13266 case RTE_FLOW_ITEM_TYPE_IPV6:
13267 mlx5_flow_tunnel_ip_check(items, next_protocol,
13268 &item_flags, &tunnel);
13269 flow_dv_translate_item_ipv6(match_mask, match_value,
13271 dev_flow->dv.group);
13272 matcher.priority = MLX5_PRIORITY_MAP_L3;
13273 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13274 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13275 if (items->mask != NULL &&
13276 ((const struct rte_flow_item_ipv6 *)
13277 items->mask)->hdr.proto) {
13279 ((const struct rte_flow_item_ipv6 *)
13280 items->spec)->hdr.proto;
13282 ((const struct rte_flow_item_ipv6 *)
13283 items->mask)->hdr.proto;
13285 /* Reset for inner layer. */
13286 next_protocol = 0xff;
13289 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13290 flow_dv_translate_item_ipv6_frag_ext(match_mask,
13293 last_item = tunnel ?
13294 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13295 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13296 if (items->mask != NULL &&
13297 ((const struct rte_flow_item_ipv6_frag_ext *)
13298 items->mask)->hdr.next_header) {
13300 ((const struct rte_flow_item_ipv6_frag_ext *)
13301 items->spec)->hdr.next_header;
13303 ((const struct rte_flow_item_ipv6_frag_ext *)
13304 items->mask)->hdr.next_header;
13306 /* Reset for inner layer. */
13307 next_protocol = 0xff;
13310 case RTE_FLOW_ITEM_TYPE_TCP:
13311 flow_dv_translate_item_tcp(match_mask, match_value,
13313 matcher.priority = MLX5_PRIORITY_MAP_L4;
13314 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13315 MLX5_FLOW_LAYER_OUTER_L4_TCP;
13317 case RTE_FLOW_ITEM_TYPE_UDP:
13318 flow_dv_translate_item_udp(match_mask, match_value,
13320 matcher.priority = MLX5_PRIORITY_MAP_L4;
13321 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13322 MLX5_FLOW_LAYER_OUTER_L4_UDP;
13324 case RTE_FLOW_ITEM_TYPE_GRE:
13325 flow_dv_translate_item_gre(match_mask, match_value,
13327 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13328 last_item = MLX5_FLOW_LAYER_GRE;
13330 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13331 flow_dv_translate_item_gre_key(match_mask,
13332 match_value, items);
13333 last_item = MLX5_FLOW_LAYER_GRE_KEY;
13335 case RTE_FLOW_ITEM_TYPE_NVGRE:
13336 flow_dv_translate_item_nvgre(match_mask, match_value,
13338 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13339 last_item = MLX5_FLOW_LAYER_GRE;
13341 case RTE_FLOW_ITEM_TYPE_VXLAN:
13342 flow_dv_translate_item_vxlan(dev, attr,
13343 match_mask, match_value,
13345 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13346 last_item = MLX5_FLOW_LAYER_VXLAN;
13348 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13349 flow_dv_translate_item_vxlan_gpe(match_mask,
13350 match_value, items,
13352 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13353 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13355 case RTE_FLOW_ITEM_TYPE_GENEVE:
13356 flow_dv_translate_item_geneve(match_mask, match_value,
13358 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13359 last_item = MLX5_FLOW_LAYER_GENEVE;
13361 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13362 ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13366 return rte_flow_error_set(error, -ret,
13367 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13368 "cannot create GENEVE TLV option");
13369 flow->geneve_tlv_option = 1;
13370 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13372 case RTE_FLOW_ITEM_TYPE_MPLS:
13373 flow_dv_translate_item_mpls(match_mask, match_value,
13374 items, last_item, tunnel);
13375 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13376 last_item = MLX5_FLOW_LAYER_MPLS;
13378 case RTE_FLOW_ITEM_TYPE_MARK:
13379 flow_dv_translate_item_mark(dev, match_mask,
13380 match_value, items);
13381 last_item = MLX5_FLOW_ITEM_MARK;
13383 case RTE_FLOW_ITEM_TYPE_META:
13384 flow_dv_translate_item_meta(dev, match_mask,
13385 match_value, attr, items);
13386 last_item = MLX5_FLOW_ITEM_METADATA;
13388 case RTE_FLOW_ITEM_TYPE_ICMP:
13389 flow_dv_translate_item_icmp(match_mask, match_value,
13391 last_item = MLX5_FLOW_LAYER_ICMP;
13393 case RTE_FLOW_ITEM_TYPE_ICMP6:
13394 flow_dv_translate_item_icmp6(match_mask, match_value,
13396 last_item = MLX5_FLOW_LAYER_ICMP6;
13398 case RTE_FLOW_ITEM_TYPE_TAG:
13399 flow_dv_translate_item_tag(dev, match_mask,
13400 match_value, items);
13401 last_item = MLX5_FLOW_ITEM_TAG;
13403 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13404 flow_dv_translate_mlx5_item_tag(dev, match_mask,
13405 match_value, items);
13406 last_item = MLX5_FLOW_ITEM_TAG;
13408 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13409 flow_dv_translate_item_tx_queue(dev, match_mask,
13412 last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13414 case RTE_FLOW_ITEM_TYPE_GTP:
13415 flow_dv_translate_item_gtp(match_mask, match_value,
13417 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13418 last_item = MLX5_FLOW_LAYER_GTP;
13420 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13421 ret = flow_dv_translate_item_gtp_psc(match_mask,
13425 return rte_flow_error_set(error, -ret,
13426 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13427 "cannot create GTP PSC item");
13428 last_item = MLX5_FLOW_LAYER_GTP_PSC;
13430 case RTE_FLOW_ITEM_TYPE_ECPRI:
13431 if (!mlx5_flex_parser_ecpri_exist(dev)) {
13432 /* Create it only the first time to be used. */
13433 ret = mlx5_flex_parser_ecpri_alloc(dev);
13435 return rte_flow_error_set
13437 RTE_FLOW_ERROR_TYPE_ITEM,
13439 "cannot create eCPRI parser");
13441 flow_dv_translate_item_ecpri(dev, match_mask,
13442 match_value, items);
13443 /* No other protocol should follow eCPRI layer. */
13444 last_item = MLX5_FLOW_LAYER_ECPRI;
13446 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13447 flow_dv_translate_item_integrity(match_mask,
13451 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13452 flow_dv_translate_item_aso_ct(dev, match_mask,
13453 match_value, items);
13458 item_flags |= last_item;
13461 * When E-Switch mode is enabled, we have two cases where we need to
13462 * set the source port manually.
13463 * The first one, is in case of Nic steering rule, and the second is
13464 * E-Switch rule where no port_id item was found. In both cases
13465 * the source port is set according the current port in use.
13467 if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13468 (priv->representor || priv->master)) {
13469 if (flow_dv_translate_item_port_id(dev, match_mask,
13470 match_value, NULL, attr))
13473 #ifdef RTE_LIBRTE_MLX5_DEBUG
13474 MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13475 dev_flow->dv.value.buf));
13478 * Layers may be already initialized from prefix flow if this dev_flow
13479 * is the suffix flow.
13481 handle->layers |= item_flags;
13482 if (action_flags & MLX5_FLOW_ACTION_RSS)
13483 flow_dv_hashfields_set(dev_flow, rss_desc);
13484 /* If has RSS action in the sample action, the Sample/Mirror resource
13485 * should be registered after the hash filed be update.
13487 if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13488 ret = flow_dv_translate_action_sample(dev,
13497 ret = flow_dv_create_action_sample(dev,
13506 return rte_flow_error_set
13508 RTE_FLOW_ERROR_TYPE_ACTION,
13510 "cannot create sample action");
13511 if (num_of_dest > 1) {
13512 dev_flow->dv.actions[sample_act_pos] =
13513 dev_flow->dv.dest_array_res->action;
13515 dev_flow->dv.actions[sample_act_pos] =
13516 dev_flow->dv.sample_res->verbs_action;
13520 * For multiple destination (sample action with ratio=1), the encap
13521 * action and port id action will be combined into group action.
13522 * So need remove the original these actions in the flow and only
13523 * use the sample action instead of.
13525 if (num_of_dest > 1 &&
13526 (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13528 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13530 for (i = 0; i < actions_n; i++) {
13531 if ((sample_act->dr_encap_action &&
13532 sample_act->dr_encap_action ==
13533 dev_flow->dv.actions[i]) ||
13534 (sample_act->dr_port_id_action &&
13535 sample_act->dr_port_id_action ==
13536 dev_flow->dv.actions[i]) ||
13537 (sample_act->dr_jump_action &&
13538 sample_act->dr_jump_action ==
13539 dev_flow->dv.actions[i]))
13541 temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13543 memcpy((void *)dev_flow->dv.actions,
13544 (void *)temp_actions,
13545 tmp_actions_n * sizeof(void *));
13546 actions_n = tmp_actions_n;
13548 dev_flow->dv.actions_n = actions_n;
13549 dev_flow->act_flags = action_flags;
13550 if (wks->skip_matcher_reg)
13552 /* Register matcher. */
13553 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13554 matcher.mask.size);
13555 matcher.priority = mlx5_get_matcher_priority(dev, attr,
13558 * When creating meter drop flow in drop table, using original
13559 * 5-tuple match, the matcher priority should be lower than
13562 if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13563 dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13564 matcher.priority <= MLX5_REG_BITS)
13565 matcher.priority += MLX5_REG_BITS;
13566 /* reserved field no needs to be set to 0 here. */
13567 tbl_key.is_fdb = attr->transfer;
13568 tbl_key.is_egress = attr->egress;
13569 tbl_key.level = dev_flow->dv.group;
13570 tbl_key.id = dev_flow->dv.table_id;
13571 if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13572 tunnel, attr->group, error))
13578 * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13581 * @param[in, out] action
13582 * Shred RSS action holding hash RX queue objects.
13583 * @param[in] hash_fields
13584 * Defines combination of packet fields to participate in RX hash.
13585 * @param[in] tunnel
13587 * @param[in] hrxq_idx
13588 * Hash RX queue index to set.
13591 * 0 on success, otherwise negative errno value.
13594 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13595 const uint64_t hash_fields,
13598 uint32_t *hrxqs = action->hrxq;
13600 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13601 case MLX5_RSS_HASH_IPV4:
13602 /* fall-through. */
13603 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13604 /* fall-through. */
13605 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13606 hrxqs[0] = hrxq_idx;
13608 case MLX5_RSS_HASH_IPV4_TCP:
13609 /* fall-through. */
13610 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13611 /* fall-through. */
13612 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13613 hrxqs[1] = hrxq_idx;
13615 case MLX5_RSS_HASH_IPV4_UDP:
13616 /* fall-through. */
13617 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13618 /* fall-through. */
13619 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13620 hrxqs[2] = hrxq_idx;
13622 case MLX5_RSS_HASH_IPV6:
13623 /* fall-through. */
13624 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13625 /* fall-through. */
13626 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13627 hrxqs[3] = hrxq_idx;
13629 case MLX5_RSS_HASH_IPV6_TCP:
13630 /* fall-through. */
13631 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13632 /* fall-through. */
13633 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13634 hrxqs[4] = hrxq_idx;
13636 case MLX5_RSS_HASH_IPV6_UDP:
13637 /* fall-through. */
13638 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13639 /* fall-through. */
13640 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13641 hrxqs[5] = hrxq_idx;
13643 case MLX5_RSS_HASH_NONE:
13644 hrxqs[6] = hrxq_idx;
13652 * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13656 * Pointer to the Ethernet device structure.
13658 * Shared RSS action ID holding hash RX queue objects.
13659 * @param[in] hash_fields
13660 * Defines combination of packet fields to participate in RX hash.
13661 * @param[in] tunnel
13665 * Valid hash RX queue index, otherwise 0.
13668 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13669 const uint64_t hash_fields)
13671 struct mlx5_priv *priv = dev->data->dev_private;
13672 struct mlx5_shared_action_rss *shared_rss =
13673 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13674 const uint32_t *hrxqs = shared_rss->hrxq;
13676 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13677 case MLX5_RSS_HASH_IPV4:
13678 /* fall-through. */
13679 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13680 /* fall-through. */
13681 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13683 case MLX5_RSS_HASH_IPV4_TCP:
13684 /* fall-through. */
13685 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13686 /* fall-through. */
13687 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13689 case MLX5_RSS_HASH_IPV4_UDP:
13690 /* fall-through. */
13691 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13692 /* fall-through. */
13693 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13695 case MLX5_RSS_HASH_IPV6:
13696 /* fall-through. */
13697 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13698 /* fall-through. */
13699 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13701 case MLX5_RSS_HASH_IPV6_TCP:
13702 /* fall-through. */
13703 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13704 /* fall-through. */
13705 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13707 case MLX5_RSS_HASH_IPV6_UDP:
13708 /* fall-through. */
13709 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13710 /* fall-through. */
13711 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13713 case MLX5_RSS_HASH_NONE:
13722 * Apply the flow to the NIC, lock free,
13723 * (mutex should be acquired by caller).
13726 * Pointer to the Ethernet device structure.
13727 * @param[in, out] flow
13728 * Pointer to flow structure.
13729 * @param[out] error
13730 * Pointer to error structure.
13733 * 0 on success, a negative errno value otherwise and rte_errno is set.
13736 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13737 struct rte_flow_error *error)
13739 struct mlx5_flow_dv_workspace *dv;
13740 struct mlx5_flow_handle *dh;
13741 struct mlx5_flow_handle_dv *dv_h;
13742 struct mlx5_flow *dev_flow;
13743 struct mlx5_priv *priv = dev->data->dev_private;
13744 uint32_t handle_idx;
13748 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13749 struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13753 for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13754 dev_flow = &wks->flows[idx];
13755 dv = &dev_flow->dv;
13756 dh = dev_flow->handle;
13759 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13760 if (dv->transfer) {
13761 MLX5_ASSERT(priv->sh->dr_drop_action);
13762 dv->actions[n++] = priv->sh->dr_drop_action;
13764 #ifdef HAVE_MLX5DV_DR
13765 /* DR supports drop action placeholder. */
13766 MLX5_ASSERT(priv->sh->dr_drop_action);
13767 dv->actions[n++] = priv->sh->dr_drop_action;
13769 /* For DV we use the explicit drop queue. */
13770 MLX5_ASSERT(priv->drop_queue.hrxq);
13772 priv->drop_queue.hrxq->action;
13775 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13776 !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13777 struct mlx5_hrxq *hrxq;
13780 hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13785 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13786 "cannot get hash queue");
13789 dh->rix_hrxq = hrxq_idx;
13790 dv->actions[n++] = hrxq->action;
13791 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13792 struct mlx5_hrxq *hrxq = NULL;
13795 hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13796 rss_desc->shared_rss,
13797 dev_flow->hash_fields);
13799 hrxq = mlx5_ipool_get
13800 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13805 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13806 "cannot get hash queue");
13809 dh->rix_srss = rss_desc->shared_rss;
13810 dv->actions[n++] = hrxq->action;
13811 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13812 if (!priv->sh->default_miss_action) {
13815 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13816 "default miss action not be created.");
13819 dv->actions[n++] = priv->sh->default_miss_action;
13821 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13822 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13823 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13824 (void *)&dv->value, n,
13825 dv->actions, &dh->drv_flow);
13829 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13831 (!priv->config.allow_duplicate_pattern &&
13833 "duplicating pattern is not allowed" :
13834 "hardware refuses to create flow");
13837 if (priv->vmwa_context &&
13838 dh->vf_vlan.tag && !dh->vf_vlan.created) {
13840 * The rule contains the VLAN pattern.
13841 * For VF we are going to create VLAN
13842 * interface to make hypervisor set correct
13843 * e-Switch vport context.
13845 mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13850 err = rte_errno; /* Save rte_errno before cleanup. */
13851 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13852 handle_idx, dh, next) {
13853 /* hrxq is union, don't clear it if the flag is not set. */
13854 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13855 mlx5_hrxq_release(dev, dh->rix_hrxq);
13857 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13860 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13861 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13863 rte_errno = err; /* Restore rte_errno. */
13868 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
13869 struct mlx5_list_entry *entry)
13871 struct mlx5_flow_dv_matcher *resource = container_of(entry,
13875 claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
13876 mlx5_free(resource);
13880 * Release the flow matcher.
13883 * Pointer to Ethernet device.
13885 * Index to port ID action resource.
13888 * 1 while a reference on it exists, 0 when freed.
13891 flow_dv_matcher_release(struct rte_eth_dev *dev,
13892 struct mlx5_flow_handle *handle)
13894 struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13895 struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
13896 typeof(*tbl), tbl);
13899 MLX5_ASSERT(matcher->matcher_object);
13900 ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
13901 flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
13906 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13908 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13909 struct mlx5_flow_dv_encap_decap_resource *res =
13910 container_of(entry, typeof(*res), entry);
13912 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13913 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
13917 * Release an encap/decap resource.
13920 * Pointer to Ethernet device.
13921 * @param encap_decap_idx
13922 * Index of encap decap resource.
13925 * 1 while a reference on it exists, 0 when freed.
13928 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
13929 uint32_t encap_decap_idx)
13931 struct mlx5_priv *priv = dev->data->dev_private;
13932 struct mlx5_flow_dv_encap_decap_resource *resource;
13934 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
13938 MLX5_ASSERT(resource->action);
13939 return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
13943 * Release an jump to table action resource.
13946 * Pointer to Ethernet device.
13948 * Index to the jump action resource.
13951 * 1 while a reference on it exists, 0 when freed.
13954 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
13957 struct mlx5_priv *priv = dev->data->dev_private;
13958 struct mlx5_flow_tbl_data_entry *tbl_data;
13960 tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
13964 return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
13968 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13970 struct mlx5_flow_dv_modify_hdr_resource *res =
13971 container_of(entry, typeof(*res), entry);
13972 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13974 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13975 mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
13979 * Release a modify-header resource.
13982 * Pointer to Ethernet device.
13984 * Pointer to mlx5_flow_handle.
13987 * 1 while a reference on it exists, 0 when freed.
13990 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
13991 struct mlx5_flow_handle *handle)
13993 struct mlx5_priv *priv = dev->data->dev_private;
13994 struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
13996 MLX5_ASSERT(entry->action);
13997 return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14001 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14003 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14004 struct mlx5_flow_dv_port_id_action_resource *resource =
14005 container_of(entry, typeof(*resource), entry);
14007 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14008 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14012 * Release port ID action resource.
14015 * Pointer to Ethernet device.
14017 * Pointer to mlx5_flow_handle.
14020 * 1 while a reference on it exists, 0 when freed.
14023 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14026 struct mlx5_priv *priv = dev->data->dev_private;
14027 struct mlx5_flow_dv_port_id_action_resource *resource;
14029 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14032 MLX5_ASSERT(resource->action);
14033 return mlx5_list_unregister(priv->sh->port_id_action_list,
14038 * Release shared RSS action resource.
14041 * Pointer to Ethernet device.
14043 * Shared RSS action index.
14046 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14048 struct mlx5_priv *priv = dev->data->dev_private;
14049 struct mlx5_shared_action_rss *shared_rss;
14051 shared_rss = mlx5_ipool_get
14052 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14053 __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14057 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14059 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14060 struct mlx5_flow_dv_push_vlan_action_resource *resource =
14061 container_of(entry, typeof(*resource), entry);
14063 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14064 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14068 * Release push vlan action resource.
14071 * Pointer to Ethernet device.
14073 * Pointer to mlx5_flow_handle.
14076 * 1 while a reference on it exists, 0 when freed.
14079 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14080 struct mlx5_flow_handle *handle)
14082 struct mlx5_priv *priv = dev->data->dev_private;
14083 struct mlx5_flow_dv_push_vlan_action_resource *resource;
14084 uint32_t idx = handle->dvh.rix_push_vlan;
14086 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14089 MLX5_ASSERT(resource->action);
14090 return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14095 * Release the fate resource.
14098 * Pointer to Ethernet device.
14100 * Pointer to mlx5_flow_handle.
14103 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14104 struct mlx5_flow_handle *handle)
14106 if (!handle->rix_fate)
14108 switch (handle->fate_action) {
14109 case MLX5_FLOW_FATE_QUEUE:
14110 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14111 mlx5_hrxq_release(dev, handle->rix_hrxq);
14113 case MLX5_FLOW_FATE_JUMP:
14114 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14116 case MLX5_FLOW_FATE_PORT_ID:
14117 flow_dv_port_id_action_resource_release(dev,
14118 handle->rix_port_id_action);
14121 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14124 handle->rix_fate = 0;
14128 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14129 struct mlx5_list_entry *entry)
14131 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14134 struct rte_eth_dev *dev = resource->dev;
14135 struct mlx5_priv *priv = dev->data->dev_private;
14137 if (resource->verbs_action)
14138 claim_zero(mlx5_flow_os_destroy_flow_action
14139 (resource->verbs_action));
14140 if (resource->normal_path_tbl)
14141 flow_dv_tbl_resource_release(MLX5_SH(dev),
14142 resource->normal_path_tbl);
14143 flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14144 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14145 DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14149 * Release an sample resource.
14152 * Pointer to Ethernet device.
14154 * Pointer to mlx5_flow_handle.
14157 * 1 while a reference on it exists, 0 when freed.
14160 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14161 struct mlx5_flow_handle *handle)
14163 struct mlx5_priv *priv = dev->data->dev_private;
14164 struct mlx5_flow_dv_sample_resource *resource;
14166 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14167 handle->dvh.rix_sample);
14170 MLX5_ASSERT(resource->verbs_action);
14171 return mlx5_list_unregister(priv->sh->sample_action_list,
14176 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14177 struct mlx5_list_entry *entry)
14179 struct mlx5_flow_dv_dest_array_resource *resource =
14180 container_of(entry, typeof(*resource), entry);
14181 struct rte_eth_dev *dev = resource->dev;
14182 struct mlx5_priv *priv = dev->data->dev_private;
14185 MLX5_ASSERT(resource->action);
14186 if (resource->action)
14187 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14188 for (; i < resource->num_of_dest; i++)
14189 flow_dv_sample_sub_actions_release(dev,
14190 &resource->sample_idx[i]);
14191 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14192 DRV_LOG(DEBUG, "destination array resource %p: removed",
14197 * Release an destination array resource.
14200 * Pointer to Ethernet device.
14202 * Pointer to mlx5_flow_handle.
14205 * 1 while a reference on it exists, 0 when freed.
14208 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14209 struct mlx5_flow_handle *handle)
14211 struct mlx5_priv *priv = dev->data->dev_private;
14212 struct mlx5_flow_dv_dest_array_resource *resource;
14214 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14215 handle->dvh.rix_dest_array);
14218 MLX5_ASSERT(resource->action);
14219 return mlx5_list_unregister(priv->sh->dest_array_list,
14224 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14226 struct mlx5_priv *priv = dev->data->dev_private;
14227 struct mlx5_dev_ctx_shared *sh = priv->sh;
14228 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14229 sh->geneve_tlv_option_resource;
14230 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14231 if (geneve_opt_resource) {
14232 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14233 __ATOMIC_RELAXED))) {
14234 claim_zero(mlx5_devx_cmd_destroy
14235 (geneve_opt_resource->obj));
14236 mlx5_free(sh->geneve_tlv_option_resource);
14237 sh->geneve_tlv_option_resource = NULL;
14240 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14244 * Remove the flow from the NIC but keeps it in memory.
14245 * Lock free, (mutex should be acquired by caller).
14248 * Pointer to Ethernet device.
14249 * @param[in, out] flow
14250 * Pointer to flow structure.
14253 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14255 struct mlx5_flow_handle *dh;
14256 uint32_t handle_idx;
14257 struct mlx5_priv *priv = dev->data->dev_private;
14261 handle_idx = flow->dev_handles;
14262 while (handle_idx) {
14263 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14267 if (dh->drv_flow) {
14268 claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14269 dh->drv_flow = NULL;
14271 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14272 flow_dv_fate_resource_release(dev, dh);
14273 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14274 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14275 handle_idx = dh->next.next;
14280 * Remove the flow from the NIC and the memory.
14281 * Lock free, (mutex should be acquired by caller).
14284 * Pointer to the Ethernet device structure.
14285 * @param[in, out] flow
14286 * Pointer to flow structure.
14289 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14291 struct mlx5_flow_handle *dev_handle;
14292 struct mlx5_priv *priv = dev->data->dev_private;
14293 struct mlx5_flow_meter_info *fm = NULL;
14298 flow_dv_remove(dev, flow);
14299 if (flow->counter) {
14300 flow_dv_counter_free(dev, flow->counter);
14304 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14306 mlx5_flow_meter_detach(priv, fm);
14309 /* Keep the current age handling by default. */
14310 if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14311 flow_dv_aso_ct_release(dev, flow->ct);
14312 else if (flow->age)
14313 flow_dv_aso_age_release(dev, flow->age);
14314 if (flow->geneve_tlv_option) {
14315 flow_dv_geneve_tlv_option_resource_release(dev);
14316 flow->geneve_tlv_option = 0;
14318 while (flow->dev_handles) {
14319 uint32_t tmp_idx = flow->dev_handles;
14321 dev_handle = mlx5_ipool_get(priv->sh->ipool
14322 [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14325 flow->dev_handles = dev_handle->next.next;
14326 if (dev_handle->dvh.matcher)
14327 flow_dv_matcher_release(dev, dev_handle);
14328 if (dev_handle->dvh.rix_sample)
14329 flow_dv_sample_resource_release(dev, dev_handle);
14330 if (dev_handle->dvh.rix_dest_array)
14331 flow_dv_dest_array_resource_release(dev, dev_handle);
14332 if (dev_handle->dvh.rix_encap_decap)
14333 flow_dv_encap_decap_resource_release(dev,
14334 dev_handle->dvh.rix_encap_decap);
14335 if (dev_handle->dvh.modify_hdr)
14336 flow_dv_modify_hdr_resource_release(dev, dev_handle);
14337 if (dev_handle->dvh.rix_push_vlan)
14338 flow_dv_push_vlan_action_resource_release(dev,
14340 if (dev_handle->dvh.rix_tag)
14341 flow_dv_tag_release(dev,
14342 dev_handle->dvh.rix_tag);
14343 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14344 flow_dv_fate_resource_release(dev, dev_handle);
14346 srss = dev_handle->rix_srss;
14347 if (fm && dev_handle->is_meter_flow_id &&
14348 dev_handle->split_flow_id)
14349 mlx5_ipool_free(fm->flow_ipool,
14350 dev_handle->split_flow_id);
14351 else if (dev_handle->split_flow_id &&
14352 !dev_handle->is_meter_flow_id)
14353 mlx5_ipool_free(priv->sh->ipool
14354 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14355 dev_handle->split_flow_id);
14356 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14360 flow_dv_shared_rss_action_release(dev, srss);
14364 * Release array of hash RX queue objects.
14368 * Pointer to the Ethernet device structure.
14369 * @param[in, out] hrxqs
14370 * Array of hash RX queue objects.
14373 * Total number of references to hash RX queue objects in *hrxqs* array
14374 * after this operation.
14377 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14378 uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14383 for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14384 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14394 * Release all hash RX queue objects representing shared RSS action.
14397 * Pointer to the Ethernet device structure.
14398 * @param[in, out] action
14399 * Shared RSS action to remove hash RX queue objects from.
14402 * Total number of references to hash RX queue objects stored in *action*
14403 * after this operation.
14404 * Expected to be 0 if no external references held.
14407 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14408 struct mlx5_shared_action_rss *shared_rss)
14410 return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14414 * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14417 * Only one hash value is available for one L3+L4 combination:
14419 * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14420 * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14421 * same slot in mlx5_rss_hash_fields.
14424 * Pointer to the shared action RSS conf.
14425 * @param[in, out] hash_field
14426 * hash_field variable needed to be adjusted.
14432 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14433 uint64_t *hash_field)
14435 uint64_t rss_types = rss->origin.types;
14437 switch (*hash_field & ~IBV_RX_HASH_INNER) {
14438 case MLX5_RSS_HASH_IPV4:
14439 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14440 *hash_field &= ~MLX5_RSS_HASH_IPV4;
14441 if (rss_types & ETH_RSS_L3_DST_ONLY)
14442 *hash_field |= IBV_RX_HASH_DST_IPV4;
14443 else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14444 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14446 *hash_field |= MLX5_RSS_HASH_IPV4;
14449 case MLX5_RSS_HASH_IPV6:
14450 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14451 *hash_field &= ~MLX5_RSS_HASH_IPV6;
14452 if (rss_types & ETH_RSS_L3_DST_ONLY)
14453 *hash_field |= IBV_RX_HASH_DST_IPV6;
14454 else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14455 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14457 *hash_field |= MLX5_RSS_HASH_IPV6;
14460 case MLX5_RSS_HASH_IPV4_UDP:
14461 /* fall-through. */
14462 case MLX5_RSS_HASH_IPV6_UDP:
14463 if (rss_types & ETH_RSS_UDP) {
14464 *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14465 if (rss_types & ETH_RSS_L4_DST_ONLY)
14466 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14467 else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14468 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14470 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14473 case MLX5_RSS_HASH_IPV4_TCP:
14474 /* fall-through. */
14475 case MLX5_RSS_HASH_IPV6_TCP:
14476 if (rss_types & ETH_RSS_TCP) {
14477 *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14478 if (rss_types & ETH_RSS_L4_DST_ONLY)
14479 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14480 else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14481 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14483 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14492 * Setup shared RSS action.
14493 * Prepare set of hash RX queue objects sufficient to handle all valid
14494 * hash_fields combinations (see enum ibv_rx_hash_fields).
14497 * Pointer to the Ethernet device structure.
14498 * @param[in] action_idx
14499 * Shared RSS action ipool index.
14500 * @param[in, out] action
14501 * Partially initialized shared RSS action.
14502 * @param[out] error
14503 * Perform verbose error reporting if not NULL. Initialized in case of
14507 * 0 on success, otherwise negative errno value.
14510 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14511 uint32_t action_idx,
14512 struct mlx5_shared_action_rss *shared_rss,
14513 struct rte_flow_error *error)
14515 struct mlx5_flow_rss_desc rss_desc = { 0 };
14519 if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
14520 return rte_flow_error_set(error, rte_errno,
14521 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14522 "cannot setup indirection table");
14524 memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14525 rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14526 rss_desc.const_q = shared_rss->origin.queue;
14527 rss_desc.queue_num = shared_rss->origin.queue_num;
14528 /* Set non-zero value to indicate a shared RSS. */
14529 rss_desc.shared_rss = action_idx;
14530 rss_desc.ind_tbl = shared_rss->ind_tbl;
14531 for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14533 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14536 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14537 if (shared_rss->origin.level > 1) {
14538 hash_fields |= IBV_RX_HASH_INNER;
14541 rss_desc.tunnel = tunnel;
14542 rss_desc.hash_fields = hash_fields;
14543 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14547 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14548 "cannot get hash queue");
14549 goto error_hrxq_new;
14551 err = __flow_dv_action_rss_hrxq_set
14552 (shared_rss, hash_fields, hrxq_idx);
14558 __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14559 if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14560 shared_rss->ind_tbl = NULL;
14566 * Create shared RSS action.
14569 * Pointer to the Ethernet device structure.
14571 * Shared action configuration.
14573 * RSS action specification used to create shared action.
14574 * @param[out] error
14575 * Perform verbose error reporting if not NULL. Initialized in case of
14579 * A valid shared action ID in case of success, 0 otherwise and
14580 * rte_errno is set.
14583 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14584 const struct rte_flow_indir_action_conf *conf,
14585 const struct rte_flow_action_rss *rss,
14586 struct rte_flow_error *error)
14588 struct mlx5_priv *priv = dev->data->dev_private;
14589 struct mlx5_shared_action_rss *shared_rss = NULL;
14590 void *queue = NULL;
14591 struct rte_flow_action_rss *origin;
14592 const uint8_t *rss_key;
14593 uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14596 RTE_SET_USED(conf);
14597 queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14599 shared_rss = mlx5_ipool_zmalloc
14600 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14601 if (!shared_rss || !queue) {
14602 rte_flow_error_set(error, ENOMEM,
14603 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14604 "cannot allocate resource memory");
14605 goto error_rss_init;
14607 if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14608 rte_flow_error_set(error, E2BIG,
14609 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14610 "rss action number out of range");
14611 goto error_rss_init;
14613 shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14614 sizeof(*shared_rss->ind_tbl),
14616 if (!shared_rss->ind_tbl) {
14617 rte_flow_error_set(error, ENOMEM,
14618 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14619 "cannot allocate resource memory");
14620 goto error_rss_init;
14622 memcpy(queue, rss->queue, queue_size);
14623 shared_rss->ind_tbl->queues = queue;
14624 shared_rss->ind_tbl->queues_n = rss->queue_num;
14625 origin = &shared_rss->origin;
14626 origin->func = rss->func;
14627 origin->level = rss->level;
14628 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
14629 origin->types = !rss->types ? ETH_RSS_IP : rss->types;
14630 /* NULL RSS key indicates default RSS key. */
14631 rss_key = !rss->key ? rss_hash_default_key : rss->key;
14632 memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14633 origin->key = &shared_rss->key[0];
14634 origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14635 origin->queue = queue;
14636 origin->queue_num = rss->queue_num;
14637 if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14638 goto error_rss_init;
14639 rte_spinlock_init(&shared_rss->action_rss_sl);
14640 __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14641 rte_spinlock_lock(&priv->shared_act_sl);
14642 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14643 &priv->rss_shared_actions, idx, shared_rss, next);
14644 rte_spinlock_unlock(&priv->shared_act_sl);
14648 if (shared_rss->ind_tbl)
14649 mlx5_free(shared_rss->ind_tbl);
14650 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14659 * Destroy the shared RSS action.
14660 * Release related hash RX queue objects.
14663 * Pointer to the Ethernet device structure.
14665 * The shared RSS action object ID to be removed.
14666 * @param[out] error
14667 * Perform verbose error reporting if not NULL. Initialized in case of
14671 * 0 on success, otherwise negative errno value.
14674 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14675 struct rte_flow_error *error)
14677 struct mlx5_priv *priv = dev->data->dev_private;
14678 struct mlx5_shared_action_rss *shared_rss =
14679 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14680 uint32_t old_refcnt = 1;
14682 uint16_t *queue = NULL;
14685 return rte_flow_error_set(error, EINVAL,
14686 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14687 "invalid shared action");
14688 remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14690 return rte_flow_error_set(error, EBUSY,
14691 RTE_FLOW_ERROR_TYPE_ACTION,
14693 "shared rss hrxq has references");
14694 if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14695 0, 0, __ATOMIC_ACQUIRE,
14697 return rte_flow_error_set(error, EBUSY,
14698 RTE_FLOW_ERROR_TYPE_ACTION,
14700 "shared rss has references");
14701 queue = shared_rss->ind_tbl->queues;
14702 remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14704 return rte_flow_error_set(error, EBUSY,
14705 RTE_FLOW_ERROR_TYPE_ACTION,
14707 "shared rss indirection table has"
14710 rte_spinlock_lock(&priv->shared_act_sl);
14711 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14712 &priv->rss_shared_actions, idx, shared_rss, next);
14713 rte_spinlock_unlock(&priv->shared_act_sl);
14714 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14720 * Create indirect action, lock free,
14721 * (mutex should be acquired by caller).
14722 * Dispatcher for action type specific call.
14725 * Pointer to the Ethernet device structure.
14727 * Shared action configuration.
14728 * @param[in] action
14729 * Action specification used to create indirect action.
14730 * @param[out] error
14731 * Perform verbose error reporting if not NULL. Initialized in case of
14735 * A valid shared action handle in case of success, NULL otherwise and
14736 * rte_errno is set.
14738 static struct rte_flow_action_handle *
14739 flow_dv_action_create(struct rte_eth_dev *dev,
14740 const struct rte_flow_indir_action_conf *conf,
14741 const struct rte_flow_action *action,
14742 struct rte_flow_error *err)
14744 struct mlx5_priv *priv = dev->data->dev_private;
14745 uint32_t age_idx = 0;
14749 switch (action->type) {
14750 case RTE_FLOW_ACTION_TYPE_RSS:
14751 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14752 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14753 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14755 case RTE_FLOW_ACTION_TYPE_AGE:
14756 age_idx = flow_dv_aso_age_alloc(dev, err);
14761 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14762 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14763 flow_dv_aso_age_params_init(dev, age_idx,
14764 ((const struct rte_flow_action_age *)
14765 action->conf)->context ?
14766 ((const struct rte_flow_action_age *)
14767 action->conf)->context :
14768 (void *)(uintptr_t)idx,
14769 ((const struct rte_flow_action_age *)
14770 action->conf)->timeout);
14773 case RTE_FLOW_ACTION_TYPE_COUNT:
14774 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14775 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14776 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14778 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14779 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14781 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14784 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14785 NULL, "action type not supported");
14788 return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14792 * Destroy the indirect action.
14793 * Release action related resources on the NIC and the memory.
14794 * Lock free, (mutex should be acquired by caller).
14795 * Dispatcher for action type specific call.
14798 * Pointer to the Ethernet device structure.
14799 * @param[in] handle
14800 * The indirect action object handle to be removed.
14801 * @param[out] error
14802 * Perform verbose error reporting if not NULL. Initialized in case of
14806 * 0 on success, otherwise negative errno value.
14809 flow_dv_action_destroy(struct rte_eth_dev *dev,
14810 struct rte_flow_action_handle *handle,
14811 struct rte_flow_error *error)
14813 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14814 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14815 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14816 struct mlx5_flow_counter *cnt;
14817 uint32_t no_flow_refcnt = 1;
14821 case MLX5_INDIRECT_ACTION_TYPE_RSS:
14822 return __flow_dv_action_rss_release(dev, idx, error);
14823 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14824 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14825 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14826 &no_flow_refcnt, 1, false,
14829 return rte_flow_error_set(error, EBUSY,
14830 RTE_FLOW_ERROR_TYPE_ACTION,
14832 "Indirect count action has references");
14833 flow_dv_counter_free(dev, idx);
14835 case MLX5_INDIRECT_ACTION_TYPE_AGE:
14836 ret = flow_dv_aso_age_release(dev, idx);
14839 * In this case, the last flow has a reference will
14840 * actually release the age action.
14842 DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14843 " released with references %d.", idx, ret);
14845 case MLX5_INDIRECT_ACTION_TYPE_CT:
14846 ret = flow_dv_aso_ct_release(dev, idx);
14850 DRV_LOG(DEBUG, "Connection tracking object %u still "
14851 "has references %d.", idx, ret);
14854 return rte_flow_error_set(error, ENOTSUP,
14855 RTE_FLOW_ERROR_TYPE_ACTION,
14857 "action type not supported");
14862 * Updates in place shared RSS action configuration.
14865 * Pointer to the Ethernet device structure.
14867 * The shared RSS action object ID to be updated.
14868 * @param[in] action_conf
14869 * RSS action specification used to modify *shared_rss*.
14870 * @param[out] error
14871 * Perform verbose error reporting if not NULL. Initialized in case of
14875 * 0 on success, otherwise negative errno value.
14876 * @note: currently only support update of RSS queues.
14879 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14880 const struct rte_flow_action_rss *action_conf,
14881 struct rte_flow_error *error)
14883 struct mlx5_priv *priv = dev->data->dev_private;
14884 struct mlx5_shared_action_rss *shared_rss =
14885 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14887 void *queue = NULL;
14888 uint16_t *queue_old = NULL;
14889 uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
14892 return rte_flow_error_set(error, EINVAL,
14893 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14894 "invalid shared action to update");
14895 if (priv->obj_ops.ind_table_modify == NULL)
14896 return rte_flow_error_set(error, ENOTSUP,
14897 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14898 "cannot modify indirection table");
14899 queue = mlx5_malloc(MLX5_MEM_ZERO,
14900 RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14903 return rte_flow_error_set(error, ENOMEM,
14904 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14906 "cannot allocate resource memory");
14907 memcpy(queue, action_conf->queue, queue_size);
14908 MLX5_ASSERT(shared_rss->ind_tbl);
14909 rte_spinlock_lock(&shared_rss->action_rss_sl);
14910 queue_old = shared_rss->ind_tbl->queues;
14911 ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
14912 queue, action_conf->queue_num, true);
14915 ret = rte_flow_error_set(error, rte_errno,
14916 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14917 "cannot update indirection table");
14919 mlx5_free(queue_old);
14920 shared_rss->origin.queue = queue;
14921 shared_rss->origin.queue_num = action_conf->queue_num;
14923 rte_spinlock_unlock(&shared_rss->action_rss_sl);
14928 * Updates in place conntrack context or direction.
14929 * Context update should be synchronized.
14932 * Pointer to the Ethernet device structure.
14934 * The conntrack object ID to be updated.
14935 * @param[in] update
14936 * Pointer to the structure of information to update.
14937 * @param[out] error
14938 * Perform verbose error reporting if not NULL. Initialized in case of
14942 * 0 on success, otherwise negative errno value.
14945 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
14946 const struct rte_flow_modify_conntrack *update,
14947 struct rte_flow_error *error)
14949 struct mlx5_priv *priv = dev->data->dev_private;
14950 struct mlx5_aso_ct_action *ct;
14951 const struct rte_flow_action_conntrack *new_prf;
14953 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
14956 if (PORT_ID(priv) != owner)
14957 return rte_flow_error_set(error, EACCES,
14958 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14960 "CT object owned by another port");
14961 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
14962 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
14964 return rte_flow_error_set(error, ENOMEM,
14965 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14967 "CT object is inactive");
14968 new_prf = &update->new_ct;
14969 if (update->direction)
14970 ct->is_original = !!new_prf->is_original_dir;
14971 if (update->state) {
14972 /* Only validate the profile when it needs to be updated. */
14973 ret = mlx5_validate_action_ct(dev, new_prf, error);
14976 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
14978 return rte_flow_error_set(error, EIO,
14979 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14981 "Failed to send CT context update WQE");
14982 /* Block until ready or a failure. */
14983 ret = mlx5_aso_ct_available(priv->sh, ct);
14985 rte_flow_error_set(error, rte_errno,
14986 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14988 "Timeout to get the CT update");
14994 * Updates in place shared action configuration, lock free,
14995 * (mutex should be acquired by caller).
14998 * Pointer to the Ethernet device structure.
14999 * @param[in] handle
15000 * The indirect action object handle to be updated.
15001 * @param[in] update
15002 * Action specification used to modify the action pointed by *handle*.
15003 * *update* could be of same type with the action pointed by the *handle*
15004 * handle argument, or some other structures like a wrapper, depending on
15005 * the indirect action type.
15006 * @param[out] error
15007 * Perform verbose error reporting if not NULL. Initialized in case of
15011 * 0 on success, otherwise negative errno value.
15014 flow_dv_action_update(struct rte_eth_dev *dev,
15015 struct rte_flow_action_handle *handle,
15016 const void *update,
15017 struct rte_flow_error *err)
15019 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15020 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15021 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15022 const void *action_conf;
15025 case MLX5_INDIRECT_ACTION_TYPE_RSS:
15026 action_conf = ((const struct rte_flow_action *)update)->conf;
15027 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15028 case MLX5_INDIRECT_ACTION_TYPE_CT:
15029 return __flow_dv_action_ct_update(dev, idx, update, err);
15031 return rte_flow_error_set(err, ENOTSUP,
15032 RTE_FLOW_ERROR_TYPE_ACTION,
15034 "action type update not supported");
15039 * Destroy the meter sub policy table rules.
15040 * Lock free, (mutex should be acquired by caller).
15043 * Pointer to Ethernet device.
15044 * @param[in] sub_policy
15045 * Pointer to meter sub policy table.
15048 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15049 struct mlx5_flow_meter_sub_policy *sub_policy)
15051 struct mlx5_priv *priv = dev->data->dev_private;
15052 struct mlx5_flow_tbl_data_entry *tbl;
15053 struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15054 struct mlx5_flow_meter_info *next_fm;
15055 struct mlx5_sub_policy_color_rule *color_rule;
15059 for (i = 0; i < RTE_COLORS; i++) {
15061 if (i == RTE_COLOR_GREEN && policy &&
15062 policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15063 next_fm = mlx5_flow_meter_find(priv,
15064 policy->act_cnt[i].next_mtr_id, NULL);
15065 TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15067 claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15068 tbl = container_of(color_rule->matcher->tbl,
15069 typeof(*tbl), tbl);
15070 mlx5_list_unregister(tbl->matchers,
15071 &color_rule->matcher->entry);
15072 TAILQ_REMOVE(&sub_policy->color_rules[i],
15073 color_rule, next_port);
15074 mlx5_free(color_rule);
15076 mlx5_flow_meter_detach(priv, next_fm);
15079 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15080 if (sub_policy->rix_hrxq[i]) {
15081 if (policy && !policy->is_hierarchy)
15082 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15083 sub_policy->rix_hrxq[i] = 0;
15085 if (sub_policy->jump_tbl[i]) {
15086 flow_dv_tbl_resource_release(MLX5_SH(dev),
15087 sub_policy->jump_tbl[i]);
15088 sub_policy->jump_tbl[i] = NULL;
15091 if (sub_policy->tbl_rsc) {
15092 flow_dv_tbl_resource_release(MLX5_SH(dev),
15093 sub_policy->tbl_rsc);
15094 sub_policy->tbl_rsc = NULL;
15099 * Destroy policy rules, lock free,
15100 * (mutex should be acquired by caller).
15101 * Dispatcher for action type specific call.
15104 * Pointer to the Ethernet device structure.
15105 * @param[in] mtr_policy
15106 * Meter policy struct.
15109 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15110 struct mlx5_flow_meter_policy *mtr_policy)
15113 struct mlx5_flow_meter_sub_policy *sub_policy;
15114 uint16_t sub_policy_num;
15116 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15117 sub_policy_num = (mtr_policy->sub_policy_num >>
15118 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15119 MLX5_MTR_SUB_POLICY_NUM_MASK;
15120 for (j = 0; j < sub_policy_num; j++) {
15121 sub_policy = mtr_policy->sub_policys[i][j];
15123 __flow_dv_destroy_sub_policy_rules(dev,
15130 * Destroy policy action, lock free,
15131 * (mutex should be acquired by caller).
15132 * Dispatcher for action type specific call.
15135 * Pointer to the Ethernet device structure.
15136 * @param[in] mtr_policy
15137 * Meter policy struct.
15140 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15141 struct mlx5_flow_meter_policy *mtr_policy)
15143 struct rte_flow_action *rss_action;
15144 struct mlx5_flow_handle dev_handle;
15147 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15148 if (mtr_policy->act_cnt[i].rix_mark) {
15149 flow_dv_tag_release(dev,
15150 mtr_policy->act_cnt[i].rix_mark);
15151 mtr_policy->act_cnt[i].rix_mark = 0;
15153 if (mtr_policy->act_cnt[i].modify_hdr) {
15154 dev_handle.dvh.modify_hdr =
15155 mtr_policy->act_cnt[i].modify_hdr;
15156 flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15158 switch (mtr_policy->act_cnt[i].fate_action) {
15159 case MLX5_FLOW_FATE_SHARED_RSS:
15160 rss_action = mtr_policy->act_cnt[i].rss;
15161 mlx5_free(rss_action);
15163 case MLX5_FLOW_FATE_PORT_ID:
15164 if (mtr_policy->act_cnt[i].rix_port_id_action) {
15165 flow_dv_port_id_action_resource_release(dev,
15166 mtr_policy->act_cnt[i].rix_port_id_action);
15167 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15170 case MLX5_FLOW_FATE_DROP:
15171 case MLX5_FLOW_FATE_JUMP:
15172 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15173 mtr_policy->act_cnt[i].dr_jump_action[j] =
15177 /*Queue action do nothing*/
15181 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15182 mtr_policy->dr_drop_action[j] = NULL;
15186 * Create policy action per domain, lock free,
15187 * (mutex should be acquired by caller).
15188 * Dispatcher for action type specific call.
15191 * Pointer to the Ethernet device structure.
15192 * @param[in] mtr_policy
15193 * Meter policy struct.
15194 * @param[in] action
15195 * Action specification used to create meter actions.
15196 * @param[out] error
15197 * Perform verbose error reporting if not NULL. Initialized in case of
15201 * 0 on success, otherwise negative errno value.
15204 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15205 struct mlx5_flow_meter_policy *mtr_policy,
15206 const struct rte_flow_action *actions[RTE_COLORS],
15207 enum mlx5_meter_domain domain,
15208 struct rte_mtr_error *error)
15210 struct mlx5_priv *priv = dev->data->dev_private;
15211 struct rte_flow_error flow_err;
15212 const struct rte_flow_action *act;
15213 uint64_t action_flags;
15214 struct mlx5_flow_handle dh;
15215 struct mlx5_flow dev_flow;
15216 struct mlx5_flow_dv_port_id_action_resource port_id_action;
15218 uint8_t egress, transfer;
15219 struct mlx5_meter_policy_action_container *act_cnt = NULL;
15221 struct mlx5_flow_dv_modify_hdr_resource res;
15222 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15223 sizeof(struct mlx5_modification_cmd) *
15224 (MLX5_MAX_MODIFY_NUM + 1)];
15226 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15228 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15229 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15230 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15231 memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15232 memset(&port_id_action, 0,
15233 sizeof(struct mlx5_flow_dv_port_id_action_resource));
15234 memset(mhdr_res, 0, sizeof(*mhdr_res));
15235 mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15236 (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15237 MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15238 dev_flow.handle = &dh;
15239 dev_flow.dv.port_id_action = &port_id_action;
15240 dev_flow.external = true;
15241 for (i = 0; i < RTE_COLORS; i++) {
15242 if (i < MLX5_MTR_RTE_COLORS)
15243 act_cnt = &mtr_policy->act_cnt[i];
15244 /* Skip the color policy actions creation. */
15245 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15246 (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15249 for (act = actions[i];
15250 act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15251 switch (act->type) {
15252 case RTE_FLOW_ACTION_TYPE_MARK:
15254 uint32_t tag_be = mlx5_flow_mark_set
15255 (((const struct rte_flow_action_mark *)
15258 if (i >= MLX5_MTR_RTE_COLORS)
15259 return -rte_mtr_error_set(error,
15261 RTE_MTR_ERROR_TYPE_METER_POLICY,
15263 "cannot create policy "
15264 "mark action for this color");
15265 dev_flow.handle->mark = 1;
15266 if (flow_dv_tag_resource_register(dev, tag_be,
15267 &dev_flow, &flow_err))
15268 return -rte_mtr_error_set(error,
15270 RTE_MTR_ERROR_TYPE_METER_POLICY,
15272 "cannot setup policy mark action");
15273 MLX5_ASSERT(dev_flow.dv.tag_resource);
15274 act_cnt->rix_mark =
15275 dev_flow.handle->dvh.rix_tag;
15276 action_flags |= MLX5_FLOW_ACTION_MARK;
15279 case RTE_FLOW_ACTION_TYPE_SET_TAG:
15280 if (i >= MLX5_MTR_RTE_COLORS)
15281 return -rte_mtr_error_set(error,
15283 RTE_MTR_ERROR_TYPE_METER_POLICY,
15285 "cannot create policy "
15286 "set tag action for this color");
15287 if (flow_dv_convert_action_set_tag
15289 (const struct rte_flow_action_set_tag *)
15290 act->conf, &flow_err))
15291 return -rte_mtr_error_set(error,
15293 RTE_MTR_ERROR_TYPE_METER_POLICY,
15294 NULL, "cannot convert policy "
15296 if (!mhdr_res->actions_num)
15297 return -rte_mtr_error_set(error,
15299 RTE_MTR_ERROR_TYPE_METER_POLICY,
15300 NULL, "cannot find policy "
15302 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15304 case RTE_FLOW_ACTION_TYPE_DROP:
15306 struct mlx5_flow_mtr_mng *mtrmng =
15308 struct mlx5_flow_tbl_data_entry *tbl_data;
15311 * Create the drop table with
15312 * METER DROP level.
15314 if (!mtrmng->drop_tbl[domain]) {
15315 mtrmng->drop_tbl[domain] =
15316 flow_dv_tbl_resource_get(dev,
15317 MLX5_FLOW_TABLE_LEVEL_METER,
15318 egress, transfer, false, NULL, 0,
15319 0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15320 if (!mtrmng->drop_tbl[domain])
15321 return -rte_mtr_error_set
15323 RTE_MTR_ERROR_TYPE_METER_POLICY,
15325 "Failed to create meter drop table");
15327 tbl_data = container_of
15328 (mtrmng->drop_tbl[domain],
15329 struct mlx5_flow_tbl_data_entry, tbl);
15330 if (i < MLX5_MTR_RTE_COLORS) {
15331 act_cnt->dr_jump_action[domain] =
15332 tbl_data->jump.action;
15333 act_cnt->fate_action =
15334 MLX5_FLOW_FATE_DROP;
15336 if (i == RTE_COLOR_RED)
15337 mtr_policy->dr_drop_action[domain] =
15338 tbl_data->jump.action;
15339 action_flags |= MLX5_FLOW_ACTION_DROP;
15342 case RTE_FLOW_ACTION_TYPE_QUEUE:
15344 if (i >= MLX5_MTR_RTE_COLORS)
15345 return -rte_mtr_error_set(error,
15347 RTE_MTR_ERROR_TYPE_METER_POLICY,
15348 NULL, "cannot create policy "
15349 "fate queue for this color");
15351 ((const struct rte_flow_action_queue *)
15352 (act->conf))->index;
15353 act_cnt->fate_action =
15354 MLX5_FLOW_FATE_QUEUE;
15355 dev_flow.handle->fate_action =
15356 MLX5_FLOW_FATE_QUEUE;
15357 mtr_policy->is_queue = 1;
15358 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15361 case RTE_FLOW_ACTION_TYPE_RSS:
15365 if (i >= MLX5_MTR_RTE_COLORS)
15366 return -rte_mtr_error_set(error,
15368 RTE_MTR_ERROR_TYPE_METER_POLICY,
15370 "cannot create policy "
15371 "rss action for this color");
15373 * Save RSS conf into policy struct
15374 * for translate stage.
15376 rss_size = (int)rte_flow_conv
15377 (RTE_FLOW_CONV_OP_ACTION,
15378 NULL, 0, act, &flow_err);
15380 return -rte_mtr_error_set(error,
15382 RTE_MTR_ERROR_TYPE_METER_POLICY,
15383 NULL, "Get the wrong "
15384 "rss action struct size");
15385 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15386 rss_size, 0, SOCKET_ID_ANY);
15388 return -rte_mtr_error_set(error,
15390 RTE_MTR_ERROR_TYPE_METER_POLICY,
15392 "Fail to malloc rss action memory");
15393 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15394 act_cnt->rss, rss_size,
15397 return -rte_mtr_error_set(error,
15399 RTE_MTR_ERROR_TYPE_METER_POLICY,
15400 NULL, "Fail to save "
15401 "rss action into policy struct");
15402 act_cnt->fate_action =
15403 MLX5_FLOW_FATE_SHARED_RSS;
15404 action_flags |= MLX5_FLOW_ACTION_RSS;
15407 case RTE_FLOW_ACTION_TYPE_PORT_ID:
15409 struct mlx5_flow_dv_port_id_action_resource
15411 uint32_t port_id = 0;
15413 if (i >= MLX5_MTR_RTE_COLORS)
15414 return -rte_mtr_error_set(error,
15416 RTE_MTR_ERROR_TYPE_METER_POLICY,
15417 NULL, "cannot create policy "
15418 "port action for this color");
15419 memset(&port_id_resource, 0,
15420 sizeof(port_id_resource));
15421 if (flow_dv_translate_action_port_id(dev, act,
15422 &port_id, &flow_err))
15423 return -rte_mtr_error_set(error,
15425 RTE_MTR_ERROR_TYPE_METER_POLICY,
15426 NULL, "cannot translate "
15427 "policy port action");
15428 port_id_resource.port_id = port_id;
15429 if (flow_dv_port_id_action_resource_register
15430 (dev, &port_id_resource,
15431 &dev_flow, &flow_err))
15432 return -rte_mtr_error_set(error,
15434 RTE_MTR_ERROR_TYPE_METER_POLICY,
15435 NULL, "cannot setup "
15436 "policy port action");
15437 act_cnt->rix_port_id_action =
15438 dev_flow.handle->rix_port_id_action;
15439 act_cnt->fate_action =
15440 MLX5_FLOW_FATE_PORT_ID;
15441 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15444 case RTE_FLOW_ACTION_TYPE_JUMP:
15446 uint32_t jump_group = 0;
15447 uint32_t table = 0;
15448 struct mlx5_flow_tbl_data_entry *tbl_data;
15449 struct flow_grp_info grp_info = {
15450 .external = !!dev_flow.external,
15451 .transfer = !!transfer,
15452 .fdb_def_rule = !!priv->fdb_def_rule,
15454 .skip_scale = dev_flow.skip_scale &
15455 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15457 struct mlx5_flow_meter_sub_policy *sub_policy =
15458 mtr_policy->sub_policys[domain][0];
15460 if (i >= MLX5_MTR_RTE_COLORS)
15461 return -rte_mtr_error_set(error,
15463 RTE_MTR_ERROR_TYPE_METER_POLICY,
15465 "cannot create policy "
15466 "jump action for this color");
15468 ((const struct rte_flow_action_jump *)
15470 if (mlx5_flow_group_to_table(dev, NULL,
15473 &grp_info, &flow_err))
15474 return -rte_mtr_error_set(error,
15476 RTE_MTR_ERROR_TYPE_METER_POLICY,
15477 NULL, "cannot setup "
15478 "policy jump action");
15479 sub_policy->jump_tbl[i] =
15480 flow_dv_tbl_resource_get(dev,
15483 !!dev_flow.external,
15484 NULL, jump_group, 0,
15487 (!sub_policy->jump_tbl[i])
15488 return -rte_mtr_error_set(error,
15490 RTE_MTR_ERROR_TYPE_METER_POLICY,
15491 NULL, "cannot create jump action.");
15492 tbl_data = container_of
15493 (sub_policy->jump_tbl[i],
15494 struct mlx5_flow_tbl_data_entry, tbl);
15495 act_cnt->dr_jump_action[domain] =
15496 tbl_data->jump.action;
15497 act_cnt->fate_action =
15498 MLX5_FLOW_FATE_JUMP;
15499 action_flags |= MLX5_FLOW_ACTION_JUMP;
15503 * No need to check meter hierarchy for Y or R colors
15504 * here since it is done in the validation stage.
15506 case RTE_FLOW_ACTION_TYPE_METER:
15508 const struct rte_flow_action_meter *mtr;
15509 struct mlx5_flow_meter_info *next_fm;
15510 struct mlx5_flow_meter_policy *next_policy;
15511 struct rte_flow_action tag_action;
15512 struct mlx5_rte_flow_action_set_tag set_tag;
15513 uint32_t next_mtr_idx = 0;
15516 next_fm = mlx5_flow_meter_find(priv,
15520 return -rte_mtr_error_set(error, EINVAL,
15521 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15522 "Fail to find next meter.");
15523 if (next_fm->def_policy)
15524 return -rte_mtr_error_set(error, EINVAL,
15525 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15526 "Hierarchy only supports termination meter.");
15527 next_policy = mlx5_flow_meter_policy_find(dev,
15528 next_fm->policy_id, NULL);
15529 MLX5_ASSERT(next_policy);
15530 if (next_fm->drop_cnt) {
15533 mlx5_flow_get_reg_id(dev,
15536 (struct rte_flow_error *)error);
15537 set_tag.offset = (priv->mtr_reg_share ?
15538 MLX5_MTR_COLOR_BITS : 0);
15539 set_tag.length = (priv->mtr_reg_share ?
15540 MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15542 set_tag.data = next_mtr_idx;
15544 (enum rte_flow_action_type)
15545 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15546 tag_action.conf = &set_tag;
15547 if (flow_dv_convert_action_set_reg
15548 (mhdr_res, &tag_action,
15549 (struct rte_flow_error *)error))
15552 MLX5_FLOW_ACTION_SET_TAG;
15554 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15555 act_cnt->next_mtr_id = next_fm->meter_id;
15556 act_cnt->next_sub_policy = NULL;
15557 mtr_policy->is_hierarchy = 1;
15558 mtr_policy->dev = next_policy->dev;
15560 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15564 return -rte_mtr_error_set(error, ENOTSUP,
15565 RTE_MTR_ERROR_TYPE_METER_POLICY,
15566 NULL, "action type not supported");
15568 if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15569 /* create modify action if needed. */
15570 dev_flow.dv.group = 1;
15571 if (flow_dv_modify_hdr_resource_register
15572 (dev, mhdr_res, &dev_flow, &flow_err))
15573 return -rte_mtr_error_set(error,
15575 RTE_MTR_ERROR_TYPE_METER_POLICY,
15576 NULL, "cannot register policy "
15578 act_cnt->modify_hdr =
15579 dev_flow.handle->dvh.modify_hdr;
15587 * Create policy action per domain, lock free,
15588 * (mutex should be acquired by caller).
15589 * Dispatcher for action type specific call.
15592 * Pointer to the Ethernet device structure.
15593 * @param[in] mtr_policy
15594 * Meter policy struct.
15595 * @param[in] action
15596 * Action specification used to create meter actions.
15597 * @param[out] error
15598 * Perform verbose error reporting if not NULL. Initialized in case of
15602 * 0 on success, otherwise negative errno value.
15605 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15606 struct mlx5_flow_meter_policy *mtr_policy,
15607 const struct rte_flow_action *actions[RTE_COLORS],
15608 struct rte_mtr_error *error)
15611 uint16_t sub_policy_num;
15613 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15614 sub_policy_num = (mtr_policy->sub_policy_num >>
15615 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15616 MLX5_MTR_SUB_POLICY_NUM_MASK;
15617 if (sub_policy_num) {
15618 ret = __flow_dv_create_domain_policy_acts(dev,
15619 mtr_policy, actions,
15620 (enum mlx5_meter_domain)i, error);
15621 /* Cleaning resource is done in the caller level. */
15630 * Query a DV flow rule for its statistics via DevX.
15633 * Pointer to Ethernet device.
15634 * @param[in] cnt_idx
15635 * Index to the flow counter.
15637 * Data retrieved by the query.
15638 * @param[out] error
15639 * Perform verbose error reporting if not NULL.
15642 * 0 on success, a negative errno value otherwise and rte_errno is set.
15645 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15646 struct rte_flow_error *error)
15648 struct mlx5_priv *priv = dev->data->dev_private;
15649 struct rte_flow_query_count *qc = data;
15651 if (!priv->config.devx)
15652 return rte_flow_error_set(error, ENOTSUP,
15653 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15655 "counters are not supported");
15657 uint64_t pkts, bytes;
15658 struct mlx5_flow_counter *cnt;
15659 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15662 return rte_flow_error_set(error, -err,
15663 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15664 NULL, "cannot read counters");
15665 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15668 qc->hits = pkts - cnt->hits;
15669 qc->bytes = bytes - cnt->bytes;
15672 cnt->bytes = bytes;
15676 return rte_flow_error_set(error, EINVAL,
15677 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15679 "counters are not available");
15683 flow_dv_action_query(struct rte_eth_dev *dev,
15684 const struct rte_flow_action_handle *handle, void *data,
15685 struct rte_flow_error *error)
15687 struct mlx5_age_param *age_param;
15688 struct rte_flow_query_age *resp;
15689 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15690 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15691 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15692 struct mlx5_priv *priv = dev->data->dev_private;
15693 struct mlx5_aso_ct_action *ct;
15698 case MLX5_INDIRECT_ACTION_TYPE_AGE:
15699 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15701 resp->aged = __atomic_load_n(&age_param->state,
15702 __ATOMIC_RELAXED) == AGE_TMOUT ?
15704 resp->sec_since_last_hit_valid = !resp->aged;
15705 if (resp->sec_since_last_hit_valid)
15706 resp->sec_since_last_hit = __atomic_load_n
15707 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15709 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15710 return flow_dv_query_count(dev, idx, data, error);
15711 case MLX5_INDIRECT_ACTION_TYPE_CT:
15712 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15713 if (owner != PORT_ID(priv))
15714 return rte_flow_error_set(error, EACCES,
15715 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15717 "CT object owned by another port");
15718 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15719 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15722 return rte_flow_error_set(error, EFAULT,
15723 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15725 "CT object is inactive");
15726 ((struct rte_flow_action_conntrack *)data)->peer_port =
15728 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15730 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15731 return rte_flow_error_set(error, EIO,
15732 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15734 "Failed to query CT context");
15737 return rte_flow_error_set(error, ENOTSUP,
15738 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15739 "action type query not supported");
15744 * Query a flow rule AGE action for aging information.
15747 * Pointer to Ethernet device.
15749 * Pointer to the sub flow.
15751 * data retrieved by the query.
15752 * @param[out] error
15753 * Perform verbose error reporting if not NULL.
15756 * 0 on success, a negative errno value otherwise and rte_errno is set.
15759 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15760 void *data, struct rte_flow_error *error)
15762 struct rte_flow_query_age *resp = data;
15763 struct mlx5_age_param *age_param;
15766 struct mlx5_aso_age_action *act =
15767 flow_aso_age_get_by_idx(dev, flow->age);
15769 age_param = &act->age_params;
15770 } else if (flow->counter) {
15771 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15773 if (!age_param || !age_param->timeout)
15774 return rte_flow_error_set
15776 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15777 NULL, "cannot read age data");
15779 return rte_flow_error_set(error, EINVAL,
15780 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15781 NULL, "age data not available");
15783 resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15785 resp->sec_since_last_hit_valid = !resp->aged;
15786 if (resp->sec_since_last_hit_valid)
15787 resp->sec_since_last_hit = __atomic_load_n
15788 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15795 * @see rte_flow_query()
15796 * @see rte_flow_ops
15799 flow_dv_query(struct rte_eth_dev *dev,
15800 struct rte_flow *flow __rte_unused,
15801 const struct rte_flow_action *actions __rte_unused,
15802 void *data __rte_unused,
15803 struct rte_flow_error *error __rte_unused)
15807 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15808 switch (actions->type) {
15809 case RTE_FLOW_ACTION_TYPE_VOID:
15811 case RTE_FLOW_ACTION_TYPE_COUNT:
15812 ret = flow_dv_query_count(dev, flow->counter, data,
15815 case RTE_FLOW_ACTION_TYPE_AGE:
15816 ret = flow_dv_query_age(dev, flow, data, error);
15819 return rte_flow_error_set(error, ENOTSUP,
15820 RTE_FLOW_ERROR_TYPE_ACTION,
15822 "action not supported");
15829 * Destroy the meter table set.
15830 * Lock free, (mutex should be acquired by caller).
15833 * Pointer to Ethernet device.
15835 * Meter information table.
15838 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
15839 struct mlx5_flow_meter_info *fm)
15841 struct mlx5_priv *priv = dev->data->dev_private;
15844 if (!fm || !priv->config.dv_flow_en)
15846 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15847 if (fm->drop_rule[i]) {
15848 claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
15849 fm->drop_rule[i] = NULL;
15855 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
15857 struct mlx5_priv *priv = dev->data->dev_private;
15858 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15859 struct mlx5_flow_tbl_data_entry *tbl;
15862 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15863 if (mtrmng->def_rule[i]) {
15864 claim_zero(mlx5_flow_os_destroy_flow
15865 (mtrmng->def_rule[i]));
15866 mtrmng->def_rule[i] = NULL;
15868 if (mtrmng->def_matcher[i]) {
15869 tbl = container_of(mtrmng->def_matcher[i]->tbl,
15870 struct mlx5_flow_tbl_data_entry, tbl);
15871 mlx5_list_unregister(tbl->matchers,
15872 &mtrmng->def_matcher[i]->entry);
15873 mtrmng->def_matcher[i] = NULL;
15875 for (j = 0; j < MLX5_REG_BITS; j++) {
15876 if (mtrmng->drop_matcher[i][j]) {
15878 container_of(mtrmng->drop_matcher[i][j]->tbl,
15879 struct mlx5_flow_tbl_data_entry,
15881 mlx5_list_unregister(tbl->matchers,
15882 &mtrmng->drop_matcher[i][j]->entry);
15883 mtrmng->drop_matcher[i][j] = NULL;
15886 if (mtrmng->drop_tbl[i]) {
15887 flow_dv_tbl_resource_release(MLX5_SH(dev),
15888 mtrmng->drop_tbl[i]);
15889 mtrmng->drop_tbl[i] = NULL;
15894 /* Number of meter flow actions, count and jump or count and drop. */
15895 #define METER_ACTIONS 2
15898 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
15899 enum mlx5_meter_domain domain)
15901 struct mlx5_priv *priv = dev->data->dev_private;
15902 struct mlx5_flow_meter_def_policy *def_policy =
15903 priv->sh->mtrmng->def_policy[domain];
15905 __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
15906 mlx5_free(def_policy);
15907 priv->sh->mtrmng->def_policy[domain] = NULL;
15911 * Destroy the default policy table set.
15914 * Pointer to Ethernet device.
15917 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
15919 struct mlx5_priv *priv = dev->data->dev_private;
15922 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
15923 if (priv->sh->mtrmng->def_policy[i])
15924 __flow_dv_destroy_domain_def_policy(dev,
15925 (enum mlx5_meter_domain)i);
15926 priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
15930 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
15931 uint32_t color_reg_c_idx,
15932 enum rte_color color, void *matcher_object,
15933 int actions_n, void *actions,
15934 bool match_src_port, const struct rte_flow_item *item,
15935 void **rule, const struct rte_flow_attr *attr)
15938 struct mlx5_flow_dv_match_params value = {
15939 .size = sizeof(value.buf),
15941 struct mlx5_flow_dv_match_params matcher = {
15942 .size = sizeof(matcher.buf),
15944 struct mlx5_priv *priv = dev->data->dev_private;
15947 if (match_src_port && (priv->representor || priv->master)) {
15948 if (flow_dv_translate_item_port_id(dev, matcher.buf,
15949 value.buf, item, attr)) {
15950 DRV_LOG(ERR, "Failed to create meter policy%d flow's"
15951 " value with port.", color);
15955 flow_dv_match_meta_reg(matcher.buf, value.buf,
15956 (enum modify_reg)color_reg_c_idx,
15957 rte_col_2_mlx5_col(color), UINT32_MAX);
15958 misc_mask = flow_dv_matcher_enable(value.buf);
15959 __flow_dv_adjust_buf_size(&value.size, misc_mask);
15960 ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
15961 actions_n, actions, rule);
15963 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
15970 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
15971 uint32_t color_reg_c_idx,
15973 struct mlx5_flow_meter_sub_policy *sub_policy,
15974 const struct rte_flow_attr *attr,
15975 bool match_src_port,
15976 const struct rte_flow_item *item,
15977 struct mlx5_flow_dv_matcher **policy_matcher,
15978 struct rte_flow_error *error)
15980 struct mlx5_list_entry *entry;
15981 struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
15982 struct mlx5_flow_dv_matcher matcher = {
15984 .size = sizeof(matcher.mask.buf),
15988 struct mlx5_flow_dv_match_params value = {
15989 .size = sizeof(value.buf),
15991 struct mlx5_flow_cb_ctx ctx = {
15995 struct mlx5_flow_tbl_data_entry *tbl_data;
15996 struct mlx5_priv *priv = dev->data->dev_private;
15997 const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
15999 if (match_src_port && (priv->representor || priv->master)) {
16000 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16001 value.buf, item, attr)) {
16002 DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16003 " with port.", priority);
16007 tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16008 if (priority < RTE_COLOR_RED)
16009 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16010 (enum modify_reg)color_reg_c_idx, 0, color_mask);
16011 matcher.priority = priority;
16012 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16013 matcher.mask.size);
16014 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16016 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16020 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16025 * Create the policy rules per domain.
16028 * Pointer to Ethernet device.
16029 * @param[in] sub_policy
16030 * Pointer to sub policy table..
16031 * @param[in] egress
16032 * Direction of the table.
16033 * @param[in] transfer
16034 * E-Switch or NIC flow.
16036 * Pointer to policy action list per color.
16039 * 0 on success, -1 otherwise.
16042 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16043 struct mlx5_flow_meter_sub_policy *sub_policy,
16044 uint8_t egress, uint8_t transfer, bool match_src_port,
16045 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16047 struct mlx5_priv *priv = dev->data->dev_private;
16048 struct rte_flow_error flow_err;
16049 uint32_t color_reg_c_idx;
16050 struct rte_flow_attr attr = {
16051 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16054 .egress = !!egress,
16055 .transfer = !!transfer,
16059 int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16060 struct mlx5_sub_policy_color_rule *color_rule;
16062 struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16066 /* Create policy table with POLICY level. */
16067 if (!sub_policy->tbl_rsc)
16068 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16069 MLX5_FLOW_TABLE_LEVEL_POLICY,
16070 egress, transfer, false, NULL, 0, 0,
16071 sub_policy->idx, &flow_err);
16072 if (!sub_policy->tbl_rsc) {
16074 "Failed to create meter sub policy table.");
16077 /* Prepare matchers. */
16078 color_reg_c_idx = ret;
16079 for (i = 0; i < RTE_COLORS; i++) {
16080 TAILQ_INIT(&sub_policy->color_rules[i]);
16081 if (!acts[i].actions_n)
16083 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16084 sizeof(struct mlx5_sub_policy_color_rule),
16087 DRV_LOG(ERR, "No memory to create color rule.");
16090 tmp_rules[i] = color_rule;
16091 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16092 color_rule, next_port);
16093 color_rule->src_port = priv->representor_id;
16096 /* Create matchers for colors. */
16097 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16098 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16099 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16100 &attr, svport_match, NULL,
16101 &color_rule->matcher, &flow_err)) {
16102 DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16105 /* Create flow, matching color. */
16106 if (__flow_dv_create_policy_flow(dev,
16107 color_reg_c_idx, (enum rte_color)i,
16108 color_rule->matcher->matcher_object,
16109 acts[i].actions_n, acts[i].dv_actions,
16110 svport_match, NULL, &color_rule->rule,
16112 DRV_LOG(ERR, "Failed to create color%u rule.", i);
16118 /* All the policy rules will be cleared. */
16120 color_rule = tmp_rules[i];
16122 if (color_rule->rule)
16123 mlx5_flow_os_destroy_flow(color_rule->rule);
16124 if (color_rule->matcher) {
16125 struct mlx5_flow_tbl_data_entry *tbl =
16126 container_of(color_rule->matcher->tbl,
16127 typeof(*tbl), tbl);
16128 mlx5_list_unregister(tbl->matchers,
16129 &color_rule->matcher->entry);
16131 TAILQ_REMOVE(&sub_policy->color_rules[i],
16132 color_rule, next_port);
16133 mlx5_free(color_rule);
16140 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16141 struct mlx5_flow_meter_policy *mtr_policy,
16142 struct mlx5_flow_meter_sub_policy *sub_policy,
16145 struct mlx5_priv *priv = dev->data->dev_private;
16146 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16147 struct mlx5_flow_dv_tag_resource *tag;
16148 struct mlx5_flow_dv_port_id_action_resource *port_action;
16149 struct mlx5_hrxq *hrxq;
16150 struct mlx5_flow_meter_info *next_fm = NULL;
16151 struct mlx5_flow_meter_policy *next_policy;
16152 struct mlx5_flow_meter_sub_policy *next_sub_policy;
16153 struct mlx5_flow_tbl_data_entry *tbl_data;
16154 struct rte_flow_error error;
16155 uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16156 uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16157 bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16158 bool match_src_port = false;
16161 /* If RSS or Queue, no previous actions / rules is created. */
16162 for (i = 0; i < RTE_COLORS; i++) {
16163 acts[i].actions_n = 0;
16164 if (i == RTE_COLOR_RED) {
16165 /* Only support drop on red. */
16166 acts[i].dv_actions[0] =
16167 mtr_policy->dr_drop_action[domain];
16168 acts[i].actions_n = 1;
16171 if (i == RTE_COLOR_GREEN &&
16172 mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16173 struct rte_flow_attr attr = {
16174 .transfer = transfer
16177 next_fm = mlx5_flow_meter_find(priv,
16178 mtr_policy->act_cnt[i].next_mtr_id,
16182 "Failed to get next hierarchy meter.");
16185 if (mlx5_flow_meter_attach(priv, next_fm,
16187 DRV_LOG(ERR, "%s", error.message);
16191 /* Meter action must be the first for TX. */
16193 acts[i].dv_actions[acts[i].actions_n] =
16194 next_fm->meter_action;
16195 acts[i].actions_n++;
16198 if (mtr_policy->act_cnt[i].rix_mark) {
16199 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16200 mtr_policy->act_cnt[i].rix_mark);
16202 DRV_LOG(ERR, "Failed to find "
16203 "mark action for policy.");
16206 acts[i].dv_actions[acts[i].actions_n] = tag->action;
16207 acts[i].actions_n++;
16209 if (mtr_policy->act_cnt[i].modify_hdr) {
16210 acts[i].dv_actions[acts[i].actions_n] =
16211 mtr_policy->act_cnt[i].modify_hdr->action;
16212 acts[i].actions_n++;
16214 if (mtr_policy->act_cnt[i].fate_action) {
16215 switch (mtr_policy->act_cnt[i].fate_action) {
16216 case MLX5_FLOW_FATE_PORT_ID:
16217 port_action = mlx5_ipool_get
16218 (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16219 mtr_policy->act_cnt[i].rix_port_id_action);
16220 if (!port_action) {
16221 DRV_LOG(ERR, "Failed to find "
16222 "port action for policy.");
16225 acts[i].dv_actions[acts[i].actions_n] =
16226 port_action->action;
16227 acts[i].actions_n++;
16228 mtr_policy->dev = dev;
16229 match_src_port = true;
16231 case MLX5_FLOW_FATE_DROP:
16232 case MLX5_FLOW_FATE_JUMP:
16233 acts[i].dv_actions[acts[i].actions_n] =
16234 mtr_policy->act_cnt[i].dr_jump_action[domain];
16235 acts[i].actions_n++;
16237 case MLX5_FLOW_FATE_SHARED_RSS:
16238 case MLX5_FLOW_FATE_QUEUE:
16239 hrxq = mlx5_ipool_get
16240 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16241 sub_policy->rix_hrxq[i]);
16243 DRV_LOG(ERR, "Failed to find "
16244 "queue action for policy.");
16247 acts[i].dv_actions[acts[i].actions_n] =
16249 acts[i].actions_n++;
16251 case MLX5_FLOW_FATE_MTR:
16254 "No next hierarchy meter.");
16258 acts[i].dv_actions[acts[i].actions_n] =
16259 next_fm->meter_action;
16260 acts[i].actions_n++;
16262 if (mtr_policy->act_cnt[i].next_sub_policy) {
16264 mtr_policy->act_cnt[i].next_sub_policy;
16267 mlx5_flow_meter_policy_find(dev,
16268 next_fm->policy_id, NULL);
16269 MLX5_ASSERT(next_policy);
16271 next_policy->sub_policys[domain][0];
16274 container_of(next_sub_policy->tbl_rsc,
16275 struct mlx5_flow_tbl_data_entry, tbl);
16276 acts[i].dv_actions[acts[i].actions_n++] =
16277 tbl_data->jump.action;
16278 if (mtr_policy->act_cnt[i].modify_hdr)
16279 match_src_port = !!transfer;
16282 /*Queue action do nothing*/
16287 if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16288 egress, transfer, match_src_port, acts)) {
16290 "Failed to create policy rules per domain.");
16296 mlx5_flow_meter_detach(priv, next_fm);
16301 * Create the policy rules.
16304 * Pointer to Ethernet device.
16305 * @param[in,out] mtr_policy
16306 * Pointer to meter policy table.
16309 * 0 on success, -1 otherwise.
16312 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16313 struct mlx5_flow_meter_policy *mtr_policy)
16316 uint16_t sub_policy_num;
16318 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16319 sub_policy_num = (mtr_policy->sub_policy_num >>
16320 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16321 MLX5_MTR_SUB_POLICY_NUM_MASK;
16322 if (!sub_policy_num)
16324 /* Prepare actions list and create policy rules. */
16325 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16326 mtr_policy->sub_policys[i][0], i)) {
16327 DRV_LOG(ERR, "Failed to create policy action "
16328 "list per domain.");
16336 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16338 struct mlx5_priv *priv = dev->data->dev_private;
16339 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16340 struct mlx5_flow_meter_def_policy *def_policy;
16341 struct mlx5_flow_tbl_resource *jump_tbl;
16342 struct mlx5_flow_tbl_data_entry *tbl_data;
16343 uint8_t egress, transfer;
16344 struct rte_flow_error error;
16345 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16348 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16349 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16350 def_policy = mtrmng->def_policy[domain];
16352 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16353 sizeof(struct mlx5_flow_meter_def_policy),
16354 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16356 DRV_LOG(ERR, "Failed to alloc default policy table.");
16357 goto def_policy_error;
16359 mtrmng->def_policy[domain] = def_policy;
16360 /* Create the meter suffix table with SUFFIX level. */
16361 jump_tbl = flow_dv_tbl_resource_get(dev,
16362 MLX5_FLOW_TABLE_LEVEL_METER,
16363 egress, transfer, false, NULL, 0,
16364 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16367 "Failed to create meter suffix table.");
16368 goto def_policy_error;
16370 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16371 tbl_data = container_of(jump_tbl,
16372 struct mlx5_flow_tbl_data_entry, tbl);
16373 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16374 tbl_data->jump.action;
16375 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16376 acts[RTE_COLOR_GREEN].actions_n = 1;
16378 * YELLOW has the same default policy as GREEN does.
16379 * G & Y share the same table and action. The 2nd time of table
16380 * resource getting is just to update the reference count for
16381 * the releasing stage.
16383 jump_tbl = flow_dv_tbl_resource_get(dev,
16384 MLX5_FLOW_TABLE_LEVEL_METER,
16385 egress, transfer, false, NULL, 0,
16386 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16389 "Failed to get meter suffix table.");
16390 goto def_policy_error;
16392 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16393 tbl_data = container_of(jump_tbl,
16394 struct mlx5_flow_tbl_data_entry, tbl);
16395 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16396 tbl_data->jump.action;
16397 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16398 acts[RTE_COLOR_YELLOW].actions_n = 1;
16399 /* Create jump action to the drop table. */
16400 if (!mtrmng->drop_tbl[domain]) {
16401 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16402 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16403 egress, transfer, false, NULL, 0,
16404 0, MLX5_MTR_TABLE_ID_DROP, &error);
16405 if (!mtrmng->drop_tbl[domain]) {
16406 DRV_LOG(ERR, "Failed to create meter "
16407 "drop table for default policy.");
16408 goto def_policy_error;
16411 /* all RED: unique Drop table for jump action. */
16412 tbl_data = container_of(mtrmng->drop_tbl[domain],
16413 struct mlx5_flow_tbl_data_entry, tbl);
16414 def_policy->dr_jump_action[RTE_COLOR_RED] =
16415 tbl_data->jump.action;
16416 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16417 acts[RTE_COLOR_RED].actions_n = 1;
16418 /* Create default policy rules. */
16419 ret = __flow_dv_create_domain_policy_rules(dev,
16420 &def_policy->sub_policy,
16421 egress, transfer, false, acts);
16423 DRV_LOG(ERR, "Failed to create default policy rules.");
16424 goto def_policy_error;
16429 __flow_dv_destroy_domain_def_policy(dev,
16430 (enum mlx5_meter_domain)domain);
16435 * Create the default policy table set.
16438 * Pointer to Ethernet device.
16440 * 0 on success, -1 otherwise.
16443 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16445 struct mlx5_priv *priv = dev->data->dev_private;
16448 /* Non-termination policy table. */
16449 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16450 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16452 if (__flow_dv_create_domain_def_policy(dev, i)) {
16453 DRV_LOG(ERR, "Failed to create default policy");
16454 /* Rollback the created default policies for others. */
16455 flow_dv_destroy_def_policy(dev);
16463 * Create the needed meter tables.
16464 * Lock free, (mutex should be acquired by caller).
16467 * Pointer to Ethernet device.
16469 * Meter information table.
16470 * @param[in] mtr_idx
16472 * @param[in] domain_bitmap
16475 * 0 on success, -1 otherwise.
16478 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16479 struct mlx5_flow_meter_info *fm,
16481 uint8_t domain_bitmap)
16483 struct mlx5_priv *priv = dev->data->dev_private;
16484 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16485 struct rte_flow_error error;
16486 struct mlx5_flow_tbl_data_entry *tbl_data;
16487 uint8_t egress, transfer;
16488 void *actions[METER_ACTIONS];
16489 int domain, ret, i;
16490 struct mlx5_flow_counter *cnt;
16491 struct mlx5_flow_dv_match_params value = {
16492 .size = sizeof(value.buf),
16494 struct mlx5_flow_dv_match_params matcher_para = {
16495 .size = sizeof(matcher_para.buf),
16497 int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16499 uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16500 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16501 struct mlx5_list_entry *entry;
16502 struct mlx5_flow_dv_matcher matcher = {
16504 .size = sizeof(matcher.mask.buf),
16507 struct mlx5_flow_dv_matcher *drop_matcher;
16508 struct mlx5_flow_cb_ctx ctx = {
16514 if (!priv->mtr_en || mtr_id_reg_c < 0) {
16515 rte_errno = ENOTSUP;
16518 for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16519 if (!(domain_bitmap & (1 << domain)) ||
16520 (mtrmng->def_rule[domain] && !fm->drop_cnt))
16522 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16523 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16524 /* Create the drop table with METER DROP level. */
16525 if (!mtrmng->drop_tbl[domain]) {
16526 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16527 MLX5_FLOW_TABLE_LEVEL_METER,
16528 egress, transfer, false, NULL, 0,
16529 0, MLX5_MTR_TABLE_ID_DROP, &error);
16530 if (!mtrmng->drop_tbl[domain]) {
16531 DRV_LOG(ERR, "Failed to create meter drop table.");
16535 /* Create default matcher in drop table. */
16536 matcher.tbl = mtrmng->drop_tbl[domain],
16537 tbl_data = container_of(mtrmng->drop_tbl[domain],
16538 struct mlx5_flow_tbl_data_entry, tbl);
16539 if (!mtrmng->def_matcher[domain]) {
16540 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16541 (enum modify_reg)mtr_id_reg_c,
16543 matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16544 matcher.crc = rte_raw_cksum
16545 ((const void *)matcher.mask.buf,
16546 matcher.mask.size);
16547 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16549 DRV_LOG(ERR, "Failed to register meter "
16550 "drop default matcher.");
16553 mtrmng->def_matcher[domain] = container_of(entry,
16554 struct mlx5_flow_dv_matcher, entry);
16556 /* Create default rule in drop table. */
16557 if (!mtrmng->def_rule[domain]) {
16559 actions[i++] = priv->sh->dr_drop_action;
16560 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16561 (enum modify_reg)mtr_id_reg_c, 0, 0);
16562 misc_mask = flow_dv_matcher_enable(value.buf);
16563 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16564 ret = mlx5_flow_os_create_flow
16565 (mtrmng->def_matcher[domain]->matcher_object,
16566 (void *)&value, i, actions,
16567 &mtrmng->def_rule[domain]);
16569 DRV_LOG(ERR, "Failed to create meter "
16570 "default drop rule for drop table.");
16576 MLX5_ASSERT(mtrmng->max_mtr_bits);
16577 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16578 /* Create matchers for Drop. */
16579 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16580 (enum modify_reg)mtr_id_reg_c, 0,
16581 (mtr_id_mask << mtr_id_offset));
16582 matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16583 matcher.crc = rte_raw_cksum
16584 ((const void *)matcher.mask.buf,
16585 matcher.mask.size);
16586 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16589 "Failed to register meter drop matcher.");
16592 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16593 container_of(entry, struct mlx5_flow_dv_matcher,
16597 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16598 /* Create drop rule, matching meter_id only. */
16599 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16600 (enum modify_reg)mtr_id_reg_c,
16601 (mtr_idx << mtr_id_offset), UINT32_MAX);
16603 cnt = flow_dv_counter_get_by_idx(dev,
16604 fm->drop_cnt, NULL);
16605 actions[i++] = cnt->action;
16606 actions[i++] = priv->sh->dr_drop_action;
16607 misc_mask = flow_dv_matcher_enable(value.buf);
16608 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16609 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16610 (void *)&value, i, actions,
16611 &fm->drop_rule[domain]);
16613 DRV_LOG(ERR, "Failed to create meter "
16614 "drop rule for drop table.");
16620 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16621 if (fm->drop_rule[i]) {
16622 claim_zero(mlx5_flow_os_destroy_flow
16623 (fm->drop_rule[i]));
16624 fm->drop_rule[i] = NULL;
16630 static struct mlx5_flow_meter_sub_policy *
16631 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16632 struct mlx5_flow_meter_policy *mtr_policy,
16633 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16634 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16637 struct mlx5_priv *priv = dev->data->dev_private;
16638 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16639 uint32_t sub_policy_idx = 0;
16640 uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16642 struct mlx5_hrxq *hrxq;
16643 struct mlx5_flow_handle dh;
16644 struct mlx5_meter_policy_action_container *act_cnt;
16645 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16646 uint16_t sub_policy_num;
16648 rte_spinlock_lock(&mtr_policy->sl);
16649 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16652 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16653 if (!hrxq_idx[i]) {
16654 rte_spinlock_unlock(&mtr_policy->sl);
16658 sub_policy_num = (mtr_policy->sub_policy_num >>
16659 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16660 MLX5_MTR_SUB_POLICY_NUM_MASK;
16661 for (j = 0; j < sub_policy_num; j++) {
16662 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16665 mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16668 if (i >= MLX5_MTR_RTE_COLORS) {
16670 * Found the sub policy table with
16671 * the same queue per color.
16673 rte_spinlock_unlock(&mtr_policy->sl);
16674 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16675 mlx5_hrxq_release(dev, hrxq_idx[i]);
16677 return mtr_policy->sub_policys[domain][j];
16680 /* Create sub policy. */
16681 if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16682 /* Reuse the first pre-allocated sub_policy. */
16683 sub_policy = mtr_policy->sub_policys[domain][0];
16684 sub_policy_idx = sub_policy->idx;
16686 sub_policy = mlx5_ipool_zmalloc
16687 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16690 sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16691 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16692 mlx5_hrxq_release(dev, hrxq_idx[i]);
16693 goto rss_sub_policy_error;
16695 sub_policy->idx = sub_policy_idx;
16696 sub_policy->main_policy = mtr_policy;
16698 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16701 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16702 if (mtr_policy->is_hierarchy) {
16703 act_cnt = &mtr_policy->act_cnt[i];
16704 act_cnt->next_sub_policy = next_sub_policy;
16705 mlx5_hrxq_release(dev, hrxq_idx[i]);
16708 * Overwrite the last action from
16709 * RSS action to Queue action.
16711 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16714 DRV_LOG(ERR, "Failed to get policy hrxq");
16715 goto rss_sub_policy_error;
16717 act_cnt = &mtr_policy->act_cnt[i];
16718 if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16719 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16720 if (act_cnt->rix_mark)
16722 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16723 dh.rix_hrxq = hrxq_idx[i];
16724 flow_drv_rxq_flags_set(dev, &dh);
16728 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16729 sub_policy, domain)) {
16730 DRV_LOG(ERR, "Failed to create policy "
16731 "rules for ingress domain.");
16732 goto rss_sub_policy_error;
16734 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16735 i = (mtr_policy->sub_policy_num >>
16736 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16737 MLX5_MTR_SUB_POLICY_NUM_MASK;
16738 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
16739 DRV_LOG(ERR, "No free sub-policy slot.");
16740 goto rss_sub_policy_error;
16742 mtr_policy->sub_policys[domain][i] = sub_policy;
16744 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16745 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16746 mtr_policy->sub_policy_num |=
16747 (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16748 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16750 rte_spinlock_unlock(&mtr_policy->sl);
16753 rss_sub_policy_error:
16755 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16756 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16757 i = (mtr_policy->sub_policy_num >>
16758 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16759 MLX5_MTR_SUB_POLICY_NUM_MASK;
16760 mtr_policy->sub_policys[domain][i] = NULL;
16761 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16765 rte_spinlock_unlock(&mtr_policy->sl);
16770 * Find the policy table for prefix table with RSS.
16773 * Pointer to Ethernet device.
16774 * @param[in] mtr_policy
16775 * Pointer to meter policy table.
16776 * @param[in] rss_desc
16777 * Pointer to rss_desc
16779 * Pointer to table set on success, NULL otherwise and rte_errno is set.
16781 static struct mlx5_flow_meter_sub_policy *
16782 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
16783 struct mlx5_flow_meter_policy *mtr_policy,
16784 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
16786 struct mlx5_priv *priv = dev->data->dev_private;
16787 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16788 struct mlx5_flow_meter_info *next_fm;
16789 struct mlx5_flow_meter_policy *next_policy;
16790 struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
16791 struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
16792 struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
16793 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16794 bool reuse_sub_policy;
16799 /* Iterate hierarchy to get all policies in this hierarchy. */
16800 policies[i++] = mtr_policy;
16801 if (!mtr_policy->is_hierarchy)
16803 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
16804 DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
16807 next_fm = mlx5_flow_meter_find(priv,
16808 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16810 DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
16814 mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
16816 MLX5_ASSERT(next_policy);
16817 mtr_policy = next_policy;
16821 * From last policy to the first one in hierarchy,
16822 * create / get the sub policy for each of them.
16824 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
16828 &reuse_sub_policy);
16830 DRV_LOG(ERR, "Failed to get the sub policy.");
16833 if (!reuse_sub_policy)
16834 sub_policies[j++] = sub_policy;
16835 next_sub_policy = sub_policy;
16840 uint16_t sub_policy_num;
16842 sub_policy = sub_policies[--j];
16843 mtr_policy = sub_policy->main_policy;
16844 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16845 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16846 sub_policy_num = (mtr_policy->sub_policy_num >>
16847 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16848 MLX5_MTR_SUB_POLICY_NUM_MASK;
16849 mtr_policy->sub_policys[domain][sub_policy_num - 1] =
16852 mtr_policy->sub_policy_num &=
16853 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16854 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
16855 mtr_policy->sub_policy_num |=
16856 (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16857 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
16858 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16866 * Create the sub policy tag rule for all meters in hierarchy.
16869 * Pointer to Ethernet device.
16871 * Meter information table.
16872 * @param[in] src_port
16873 * The src port this extra rule should use.
16875 * The src port match item.
16876 * @param[out] error
16877 * Perform verbose error reporting if not NULL.
16879 * 0 on success, a negative errno value otherwise and rte_errno is set.
16882 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
16883 struct mlx5_flow_meter_info *fm,
16885 const struct rte_flow_item *item,
16886 struct rte_flow_error *error)
16888 struct mlx5_priv *priv = dev->data->dev_private;
16889 struct mlx5_flow_meter_policy *mtr_policy;
16890 struct mlx5_flow_meter_sub_policy *sub_policy;
16891 struct mlx5_flow_meter_info *next_fm = NULL;
16892 struct mlx5_flow_meter_policy *next_policy;
16893 struct mlx5_flow_meter_sub_policy *next_sub_policy;
16894 struct mlx5_flow_tbl_data_entry *tbl_data;
16895 struct mlx5_sub_policy_color_rule *color_rule;
16896 struct mlx5_meter_policy_acts acts;
16897 uint32_t color_reg_c_idx;
16898 bool mtr_first = (src_port != UINT16_MAX) ? true : false;
16899 struct rte_flow_attr attr = {
16900 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16907 uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
16910 mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
16911 MLX5_ASSERT(mtr_policy);
16912 if (!mtr_policy->is_hierarchy)
16914 next_fm = mlx5_flow_meter_find(priv,
16915 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16917 return rte_flow_error_set(error, EINVAL,
16918 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16919 "Failed to find next meter in hierarchy.");
16921 if (!next_fm->drop_cnt)
16923 color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
16924 sub_policy = mtr_policy->sub_policys[domain][0];
16925 for (i = 0; i < RTE_COLORS; i++) {
16926 bool rule_exist = false;
16927 struct mlx5_meter_policy_action_container *act_cnt;
16929 if (i >= RTE_COLOR_YELLOW)
16931 TAILQ_FOREACH(color_rule,
16932 &sub_policy->color_rules[i], next_port)
16933 if (color_rule->src_port == src_port) {
16939 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16940 sizeof(struct mlx5_sub_policy_color_rule),
16943 return rte_flow_error_set(error, ENOMEM,
16944 RTE_FLOW_ERROR_TYPE_ACTION,
16945 NULL, "No memory to create tag color rule.");
16946 color_rule->src_port = src_port;
16948 next_policy = mlx5_flow_meter_policy_find(dev,
16949 next_fm->policy_id, NULL);
16950 MLX5_ASSERT(next_policy);
16951 next_sub_policy = next_policy->sub_policys[domain][0];
16952 tbl_data = container_of(next_sub_policy->tbl_rsc,
16953 struct mlx5_flow_tbl_data_entry, tbl);
16954 act_cnt = &mtr_policy->act_cnt[i];
16956 acts.dv_actions[0] = next_fm->meter_action;
16957 acts.dv_actions[1] = act_cnt->modify_hdr->action;
16959 acts.dv_actions[0] = act_cnt->modify_hdr->action;
16960 acts.dv_actions[1] = next_fm->meter_action;
16962 acts.dv_actions[2] = tbl_data->jump.action;
16963 acts.actions_n = 3;
16964 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
16968 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16969 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16971 &color_rule->matcher, error)) {
16972 rte_flow_error_set(error, errno,
16973 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16974 "Failed to create hierarchy meter matcher.");
16977 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
16979 color_rule->matcher->matcher_object,
16980 acts.actions_n, acts.dv_actions,
16982 &color_rule->rule, &attr)) {
16983 rte_flow_error_set(error, errno,
16984 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16985 "Failed to create hierarchy meter rule.");
16988 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16989 color_rule, next_port);
16993 * Recursive call to iterate all meters in hierarchy and
16994 * create needed rules.
16996 return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
16997 src_port, item, error);
17000 if (color_rule->rule)
17001 mlx5_flow_os_destroy_flow(color_rule->rule);
17002 if (color_rule->matcher) {
17003 struct mlx5_flow_tbl_data_entry *tbl =
17004 container_of(color_rule->matcher->tbl,
17005 typeof(*tbl), tbl);
17006 mlx5_list_unregister(tbl->matchers,
17007 &color_rule->matcher->entry);
17009 mlx5_free(color_rule);
17012 mlx5_flow_meter_detach(priv, next_fm);
17017 * Destroy the sub policy table with RX queue.
17020 * Pointer to Ethernet device.
17021 * @param[in] mtr_policy
17022 * Pointer to meter policy table.
17025 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17026 struct mlx5_flow_meter_policy *mtr_policy)
17028 struct mlx5_priv *priv = dev->data->dev_private;
17029 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17030 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17032 uint16_t sub_policy_num, new_policy_num;
17034 rte_spinlock_lock(&mtr_policy->sl);
17035 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17036 switch (mtr_policy->act_cnt[i].fate_action) {
17037 case MLX5_FLOW_FATE_SHARED_RSS:
17038 sub_policy_num = (mtr_policy->sub_policy_num >>
17039 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17040 MLX5_MTR_SUB_POLICY_NUM_MASK;
17041 new_policy_num = sub_policy_num;
17042 for (j = 0; j < sub_policy_num; j++) {
17044 mtr_policy->sub_policys[domain][j];
17046 __flow_dv_destroy_sub_policy_rules(dev,
17049 mtr_policy->sub_policys[domain][0]) {
17050 mtr_policy->sub_policys[domain][j] =
17053 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17059 if (new_policy_num != sub_policy_num) {
17060 mtr_policy->sub_policy_num &=
17061 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17062 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17063 mtr_policy->sub_policy_num |=
17065 MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17066 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17069 case MLX5_FLOW_FATE_QUEUE:
17070 sub_policy = mtr_policy->sub_policys[domain][0];
17071 __flow_dv_destroy_sub_policy_rules(dev,
17075 /*Other actions without queue and do nothing*/
17079 rte_spinlock_unlock(&mtr_policy->sl);
17083 * Validate the batch counter support in root table.
17085 * Create a simple flow with invalid counter and drop action on root table to
17086 * validate if batch counter with offset on root table is supported or not.
17089 * Pointer to rte_eth_dev structure.
17092 * 0 on success, a negative errno value otherwise and rte_errno is set.
17095 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17097 struct mlx5_priv *priv = dev->data->dev_private;
17098 struct mlx5_dev_ctx_shared *sh = priv->sh;
17099 struct mlx5_flow_dv_match_params mask = {
17100 .size = sizeof(mask.buf),
17102 struct mlx5_flow_dv_match_params value = {
17103 .size = sizeof(value.buf),
17105 struct mlx5dv_flow_matcher_attr dv_attr = {
17106 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17108 .match_criteria_enable = 0,
17109 .match_mask = (void *)&mask,
17111 void *actions[2] = { 0 };
17112 struct mlx5_flow_tbl_resource *tbl = NULL;
17113 struct mlx5_devx_obj *dcs = NULL;
17114 void *matcher = NULL;
17118 tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17122 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
17125 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17129 dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17130 __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17131 ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
17135 __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17136 ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17140 * If batch counter with offset is not supported, the driver will not
17141 * validate the invalid offset value, flow create should success.
17142 * In this case, it means batch counter is not supported in root table.
17144 * Otherwise, if flow create is failed, counter offset is supported.
17147 DRV_LOG(INFO, "Batch counter is not supported in root "
17148 "table. Switch to fallback mode.");
17149 rte_errno = ENOTSUP;
17151 claim_zero(mlx5_flow_os_destroy_flow(flow));
17153 /* Check matcher to make sure validate fail at flow create. */
17154 if (!matcher || (matcher && errno != EINVAL))
17155 DRV_LOG(ERR, "Unexpected error in counter offset "
17156 "support detection");
17160 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17162 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17164 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17166 claim_zero(mlx5_devx_cmd_destroy(dcs));
17171 * Query a devx counter.
17174 * Pointer to the Ethernet device structure.
17176 * Index to the flow counter.
17178 * Set to clear the counter statistics.
17180 * The statistics value of packets.
17181 * @param[out] bytes
17182 * The statistics value of bytes.
17185 * 0 on success, otherwise return -1.
17188 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17189 uint64_t *pkts, uint64_t *bytes)
17191 struct mlx5_priv *priv = dev->data->dev_private;
17192 struct mlx5_flow_counter *cnt;
17193 uint64_t inn_pkts, inn_bytes;
17196 if (!priv->config.devx)
17199 ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17202 cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17203 *pkts = inn_pkts - cnt->hits;
17204 *bytes = inn_bytes - cnt->bytes;
17206 cnt->hits = inn_pkts;
17207 cnt->bytes = inn_bytes;
17213 * Get aged-out flows.
17216 * Pointer to the Ethernet device structure.
17217 * @param[in] context
17218 * The address of an array of pointers to the aged-out flows contexts.
17219 * @param[in] nb_contexts
17220 * The length of context array pointers.
17221 * @param[out] error
17222 * Perform verbose error reporting if not NULL. Initialized in case of
17226 * how many contexts get in success, otherwise negative errno value.
17227 * if nb_contexts is 0, return the amount of all aged contexts.
17228 * if nb_contexts is not 0 , return the amount of aged flows reported
17229 * in the context array.
17230 * @note: only stub for now
17233 flow_get_aged_flows(struct rte_eth_dev *dev,
17235 uint32_t nb_contexts,
17236 struct rte_flow_error *error)
17238 struct mlx5_priv *priv = dev->data->dev_private;
17239 struct mlx5_age_info *age_info;
17240 struct mlx5_age_param *age_param;
17241 struct mlx5_flow_counter *counter;
17242 struct mlx5_aso_age_action *act;
17245 if (nb_contexts && !context)
17246 return rte_flow_error_set(error, EINVAL,
17247 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17248 NULL, "empty context");
17249 age_info = GET_PORT_AGE_INFO(priv);
17250 rte_spinlock_lock(&age_info->aged_sl);
17251 LIST_FOREACH(act, &age_info->aged_aso, next) {
17254 context[nb_flows - 1] =
17255 act->age_params.context;
17256 if (!(--nb_contexts))
17260 TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17263 age_param = MLX5_CNT_TO_AGE(counter);
17264 context[nb_flows - 1] = age_param->context;
17265 if (!(--nb_contexts))
17269 rte_spinlock_unlock(&age_info->aged_sl);
17270 MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17275 * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17278 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17280 return flow_dv_counter_alloc(dev, 0);
17284 * Validate indirect action.
17285 * Dispatcher for action type specific validation.
17288 * Pointer to the Ethernet device structure.
17290 * Indirect action configuration.
17291 * @param[in] action
17292 * The indirect action object to validate.
17293 * @param[out] error
17294 * Perform verbose error reporting if not NULL. Initialized in case of
17298 * 0 on success, otherwise negative errno value.
17301 flow_dv_action_validate(struct rte_eth_dev *dev,
17302 const struct rte_flow_indir_action_conf *conf,
17303 const struct rte_flow_action *action,
17304 struct rte_flow_error *err)
17306 struct mlx5_priv *priv = dev->data->dev_private;
17308 RTE_SET_USED(conf);
17309 switch (action->type) {
17310 case RTE_FLOW_ACTION_TYPE_RSS:
17312 * priv->obj_ops is set according to driver capabilities.
17313 * When DevX capabilities are
17314 * sufficient, it is set to devx_obj_ops.
17315 * Otherwise, it is set to ibv_obj_ops.
17316 * ibv_obj_ops doesn't support ind_table_modify operation.
17317 * In this case the indirect RSS action can't be used.
17319 if (priv->obj_ops.ind_table_modify == NULL)
17320 return rte_flow_error_set
17322 RTE_FLOW_ERROR_TYPE_ACTION,
17324 "Indirect RSS action not supported");
17325 return mlx5_validate_action_rss(dev, action, err);
17326 case RTE_FLOW_ACTION_TYPE_AGE:
17327 if (!priv->sh->aso_age_mng)
17328 return rte_flow_error_set(err, ENOTSUP,
17329 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17331 "Indirect age action not supported");
17332 return flow_dv_validate_action_age(0, action, dev, err);
17333 case RTE_FLOW_ACTION_TYPE_COUNT:
17335 * There are two mechanisms to share the action count.
17336 * The old mechanism uses the shared field to share, while the
17337 * new mechanism uses the indirect action API.
17338 * This validation comes to make sure that the two mechanisms
17339 * are not combined.
17341 if (is_shared_action_count(action))
17342 return rte_flow_error_set(err, ENOTSUP,
17343 RTE_FLOW_ERROR_TYPE_ACTION,
17345 "Mix shared and indirect counter is not supported");
17346 return flow_dv_validate_action_count(dev, true, 0, err);
17347 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17348 if (!priv->sh->ct_aso_en)
17349 return rte_flow_error_set(err, ENOTSUP,
17350 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17351 "ASO CT is not supported");
17352 return mlx5_validate_action_ct(dev, action->conf, err);
17354 return rte_flow_error_set(err, ENOTSUP,
17355 RTE_FLOW_ERROR_TYPE_ACTION,
17357 "action type not supported");
17362 * Check if the RSS configurations for colors of a meter policy match
17363 * each other, except the queues.
17366 * Pointer to the first RSS flow action.
17368 * Pointer to the second RSS flow action.
17371 * 0 on match, 1 on conflict.
17374 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17375 const struct rte_flow_action_rss *r2)
17379 if (r1->func != r2->func || r1->level != r2->level ||
17380 r1->types != r2->types || r1->key_len != r2->key_len ||
17381 memcmp(r1->key, r2->key, r1->key_len))
17387 * Validate the meter hierarchy chain for meter policy.
17390 * Pointer to the Ethernet device structure.
17391 * @param[in] meter_id
17393 * @param[in] action_flags
17394 * Holds the actions detected until now.
17395 * @param[out] is_rss
17397 * @param[out] hierarchy_domain
17398 * The domain bitmap for hierarchy policy.
17399 * @param[out] error
17400 * Perform verbose error reporting if not NULL. Initialized in case of
17404 * 0 on success, otherwise negative errno value with error set.
17407 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17409 uint64_t action_flags,
17411 uint8_t *hierarchy_domain,
17412 struct rte_mtr_error *error)
17414 struct mlx5_priv *priv = dev->data->dev_private;
17415 struct mlx5_flow_meter_info *fm;
17416 struct mlx5_flow_meter_policy *policy;
17419 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17420 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17421 return -rte_mtr_error_set(error, EINVAL,
17422 RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17424 "Multiple fate actions not supported.");
17426 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17428 return -rte_mtr_error_set(error, EINVAL,
17429 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17430 "Meter not found in meter hierarchy.");
17431 if (fm->def_policy)
17432 return -rte_mtr_error_set(error, EINVAL,
17433 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17434 "Non termination meter not supported in hierarchy.");
17435 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17436 MLX5_ASSERT(policy);
17437 if (!policy->is_hierarchy) {
17438 if (policy->transfer)
17439 *hierarchy_domain |=
17440 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17441 if (policy->ingress)
17442 *hierarchy_domain |=
17443 MLX5_MTR_DOMAIN_INGRESS_BIT;
17444 if (policy->egress)
17445 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17446 *is_rss = policy->is_rss;
17449 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17450 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17451 return -rte_mtr_error_set(error, EINVAL,
17452 RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17453 "Exceed max hierarchy meter number.");
17459 * Validate meter policy actions.
17460 * Dispatcher for action type specific validation.
17463 * Pointer to the Ethernet device structure.
17464 * @param[in] action
17465 * The meter policy action object to validate.
17467 * Attributes of flow to determine steering domain.
17468 * @param[out] error
17469 * Perform verbose error reporting if not NULL. Initialized in case of
17473 * 0 on success, otherwise negative errno value.
17476 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17477 const struct rte_flow_action *actions[RTE_COLORS],
17478 struct rte_flow_attr *attr,
17480 uint8_t *domain_bitmap,
17481 uint8_t *policy_mode,
17482 struct rte_mtr_error *error)
17484 struct mlx5_priv *priv = dev->data->dev_private;
17485 struct mlx5_dev_config *dev_conf = &priv->config;
17486 const struct rte_flow_action *act;
17487 uint64_t action_flags[RTE_COLORS] = {0};
17490 struct rte_flow_error flow_err;
17491 uint8_t domain_color[RTE_COLORS] = {0};
17492 uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17493 uint8_t hierarchy_domain = 0;
17494 const struct rte_flow_action_meter *mtr;
17495 bool def_green = false;
17496 bool def_yellow = false;
17497 const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17499 if (!priv->config.dv_esw_en)
17500 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17501 *domain_bitmap = def_domain;
17502 /* Red color could only support DROP action. */
17503 if (!actions[RTE_COLOR_RED] ||
17504 actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17505 return -rte_mtr_error_set(error, ENOTSUP,
17506 RTE_MTR_ERROR_TYPE_METER_POLICY,
17507 NULL, "Red color only supports drop action.");
17509 * Check default policy actions:
17510 * Green / Yellow: no action, Red: drop action
17511 * Either G or Y will trigger default policy actions to be created.
17513 if (!actions[RTE_COLOR_GREEN] ||
17514 actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17516 if (!actions[RTE_COLOR_YELLOW] ||
17517 actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17519 if (def_green && def_yellow) {
17520 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17522 } else if (!def_green && def_yellow) {
17523 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17524 } else if (def_green && !def_yellow) {
17525 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17527 /* Set to empty string in case of NULL pointer access by user. */
17528 flow_err.message = "";
17529 for (i = 0; i < RTE_COLORS; i++) {
17531 for (action_flags[i] = 0, actions_n = 0;
17532 act && act->type != RTE_FLOW_ACTION_TYPE_END;
17534 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17535 return -rte_mtr_error_set(error, ENOTSUP,
17536 RTE_MTR_ERROR_TYPE_METER_POLICY,
17537 NULL, "too many actions");
17538 switch (act->type) {
17539 case RTE_FLOW_ACTION_TYPE_PORT_ID:
17540 if (!priv->config.dv_esw_en)
17541 return -rte_mtr_error_set(error,
17543 RTE_MTR_ERROR_TYPE_METER_POLICY,
17544 NULL, "PORT action validate check"
17545 " fail for ESW disable");
17546 ret = flow_dv_validate_action_port_id(dev,
17548 act, attr, &flow_err);
17550 return -rte_mtr_error_set(error,
17552 RTE_MTR_ERROR_TYPE_METER_POLICY,
17553 NULL, flow_err.message ?
17555 "PORT action validate check fail");
17557 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17559 case RTE_FLOW_ACTION_TYPE_MARK:
17560 ret = flow_dv_validate_action_mark(dev, act,
17564 return -rte_mtr_error_set(error,
17566 RTE_MTR_ERROR_TYPE_METER_POLICY,
17567 NULL, flow_err.message ?
17569 "Mark action validate check fail");
17570 if (dev_conf->dv_xmeta_en !=
17571 MLX5_XMETA_MODE_LEGACY)
17572 return -rte_mtr_error_set(error,
17574 RTE_MTR_ERROR_TYPE_METER_POLICY,
17575 NULL, "Extend MARK action is "
17576 "not supported. Please try use "
17577 "default policy for meter.");
17578 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17581 case RTE_FLOW_ACTION_TYPE_SET_TAG:
17582 ret = flow_dv_validate_action_set_tag(dev,
17583 act, action_flags[i],
17586 return -rte_mtr_error_set(error,
17588 RTE_MTR_ERROR_TYPE_METER_POLICY,
17589 NULL, flow_err.message ?
17591 "Set tag action validate check fail");
17592 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17595 case RTE_FLOW_ACTION_TYPE_DROP:
17596 ret = mlx5_flow_validate_action_drop
17597 (action_flags[i], attr, &flow_err);
17599 return -rte_mtr_error_set(error,
17601 RTE_MTR_ERROR_TYPE_METER_POLICY,
17602 NULL, flow_err.message ?
17604 "Drop action validate check fail");
17605 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17608 case RTE_FLOW_ACTION_TYPE_QUEUE:
17610 * Check whether extensive
17611 * metadata feature is engaged.
17613 if (dev_conf->dv_flow_en &&
17614 (dev_conf->dv_xmeta_en !=
17615 MLX5_XMETA_MODE_LEGACY) &&
17616 mlx5_flow_ext_mreg_supported(dev))
17617 return -rte_mtr_error_set(error,
17619 RTE_MTR_ERROR_TYPE_METER_POLICY,
17620 NULL, "Queue action with meta "
17621 "is not supported. Please try use "
17622 "default policy for meter.");
17623 ret = mlx5_flow_validate_action_queue(act,
17624 action_flags[i], dev,
17627 return -rte_mtr_error_set(error,
17629 RTE_MTR_ERROR_TYPE_METER_POLICY,
17630 NULL, flow_err.message ?
17632 "Queue action validate check fail");
17633 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
17636 case RTE_FLOW_ACTION_TYPE_RSS:
17637 if (dev_conf->dv_flow_en &&
17638 (dev_conf->dv_xmeta_en !=
17639 MLX5_XMETA_MODE_LEGACY) &&
17640 mlx5_flow_ext_mreg_supported(dev))
17641 return -rte_mtr_error_set(error,
17643 RTE_MTR_ERROR_TYPE_METER_POLICY,
17644 NULL, "RSS action with meta "
17645 "is not supported. Please try use "
17646 "default policy for meter.");
17647 ret = mlx5_validate_action_rss(dev, act,
17650 return -rte_mtr_error_set(error,
17652 RTE_MTR_ERROR_TYPE_METER_POLICY,
17653 NULL, flow_err.message ?
17655 "RSS action validate check fail");
17656 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
17658 /* Either G or Y will set the RSS. */
17659 rss_color[i] = act->conf;
17661 case RTE_FLOW_ACTION_TYPE_JUMP:
17662 ret = flow_dv_validate_action_jump(dev,
17663 NULL, act, action_flags[i],
17664 attr, true, &flow_err);
17666 return -rte_mtr_error_set(error,
17668 RTE_MTR_ERROR_TYPE_METER_POLICY,
17669 NULL, flow_err.message ?
17671 "Jump action validate check fail");
17673 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
17676 * Only the last meter in the hierarchy will support
17677 * the YELLOW color steering. Then in the meter policy
17678 * actions list, there should be no other meter inside.
17680 case RTE_FLOW_ACTION_TYPE_METER:
17681 if (i != RTE_COLOR_GREEN)
17682 return -rte_mtr_error_set(error,
17684 RTE_MTR_ERROR_TYPE_METER_POLICY,
17685 NULL, flow_err.message ?
17687 "Meter hierarchy only supports GREEN color.");
17689 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17699 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
17702 return -rte_mtr_error_set(error, ENOTSUP,
17703 RTE_MTR_ERROR_TYPE_METER_POLICY,
17705 "Doesn't support optional action");
17708 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID)
17709 domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
17710 else if ((action_flags[i] &
17711 (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
17712 (action_flags[i] & MLX5_FLOW_ACTION_MARK))
17714 * Only support MLX5_XMETA_MODE_LEGACY
17715 * so MARK action is only in ingress domain.
17717 domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
17718 else if (action_flags[i] &
17719 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
17720 domain_color[i] = hierarchy_domain;
17722 domain_color[i] = def_domain;
17724 * Non-termination actions only support NIC Tx domain.
17725 * The adjustion should be skipped when there is no
17726 * action or only END is provided. The default domains
17727 * bit-mask is set to find the MIN intersection.
17728 * The action flags checking should also be skipped.
17730 if ((def_green && i == RTE_COLOR_GREEN) ||
17731 (def_yellow && i == RTE_COLOR_YELLOW))
17734 * Validate the drop action mutual exclusion
17735 * with other actions. Drop action is mutually-exclusive
17736 * with any other action, except for Count action.
17738 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
17739 (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
17740 return -rte_mtr_error_set(error, ENOTSUP,
17741 RTE_MTR_ERROR_TYPE_METER_POLICY,
17742 NULL, "Drop action is mutually-exclusive "
17743 "with any other action");
17745 /* Eswitch has few restrictions on using items and actions */
17746 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
17747 if (!mlx5_flow_ext_mreg_supported(dev) &&
17748 action_flags[i] & MLX5_FLOW_ACTION_MARK)
17749 return -rte_mtr_error_set(error, ENOTSUP,
17750 RTE_MTR_ERROR_TYPE_METER_POLICY,
17751 NULL, "unsupported action MARK");
17752 if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
17753 return -rte_mtr_error_set(error, ENOTSUP,
17754 RTE_MTR_ERROR_TYPE_METER_POLICY,
17755 NULL, "unsupported action QUEUE");
17756 if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
17757 return -rte_mtr_error_set(error, ENOTSUP,
17758 RTE_MTR_ERROR_TYPE_METER_POLICY,
17759 NULL, "unsupported action RSS");
17760 if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17761 return -rte_mtr_error_set(error, ENOTSUP,
17762 RTE_MTR_ERROR_TYPE_METER_POLICY,
17763 NULL, "no fate action is found");
17765 if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
17766 (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
17767 if ((domain_color[i] &
17768 MLX5_MTR_DOMAIN_EGRESS_BIT))
17770 MLX5_MTR_DOMAIN_EGRESS_BIT;
17772 return -rte_mtr_error_set(error,
17774 RTE_MTR_ERROR_TYPE_METER_POLICY,
17776 "no fate action is found");
17780 /* If both colors have RSS, the attributes should be the same. */
17781 if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
17782 rss_color[RTE_COLOR_YELLOW]))
17783 return -rte_mtr_error_set(error, EINVAL,
17784 RTE_MTR_ERROR_TYPE_METER_POLICY,
17785 NULL, "policy RSS attr conflict");
17786 if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
17788 /* "domain_color[C]" is non-zero for each color, default is ALL. */
17789 if (!def_green && !def_yellow &&
17790 domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
17791 !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
17792 !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
17793 return -rte_mtr_error_set(error, EINVAL,
17794 RTE_MTR_ERROR_TYPE_METER_POLICY,
17795 NULL, "policy domains conflict");
17797 * At least one color policy is listed in the actions, the domains
17798 * to be supported should be the intersection.
17800 *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
17801 domain_color[RTE_COLOR_YELLOW];
17806 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
17808 struct mlx5_priv *priv = dev->data->dev_private;
17811 if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
17812 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
17817 if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
17818 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
17822 if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
17823 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
17830 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
17831 .validate = flow_dv_validate,
17832 .prepare = flow_dv_prepare,
17833 .translate = flow_dv_translate,
17834 .apply = flow_dv_apply,
17835 .remove = flow_dv_remove,
17836 .destroy = flow_dv_destroy,
17837 .query = flow_dv_query,
17838 .create_mtr_tbls = flow_dv_create_mtr_tbls,
17839 .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
17840 .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
17841 .create_meter = flow_dv_mtr_alloc,
17842 .free_meter = flow_dv_aso_mtr_release_to_pool,
17843 .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
17844 .create_mtr_acts = flow_dv_create_mtr_policy_acts,
17845 .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
17846 .create_policy_rules = flow_dv_create_policy_rules,
17847 .destroy_policy_rules = flow_dv_destroy_policy_rules,
17848 .create_def_policy = flow_dv_create_def_policy,
17849 .destroy_def_policy = flow_dv_destroy_def_policy,
17850 .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
17851 .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
17852 .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
17853 .counter_alloc = flow_dv_counter_allocate,
17854 .counter_free = flow_dv_counter_free,
17855 .counter_query = flow_dv_counter_query,
17856 .get_aged_flows = flow_get_aged_flows,
17857 .action_validate = flow_dv_action_validate,
17858 .action_create = flow_dv_action_create,
17859 .action_destroy = flow_dv_action_destroy,
17860 .action_update = flow_dv_action_update,
17861 .action_query = flow_dv_action_query,
17862 .sync_domain = flow_dv_sync_domain,
17865 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */