1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018 Mellanox Technologies, Ltd
11 #include <rte_common.h>
12 #include <rte_ether.h>
13 #include <ethdev_driver.h>
15 #include <rte_flow_driver.h>
16 #include <rte_malloc.h>
17 #include <rte_cycles.h>
20 #include <rte_vxlan.h>
22 #include <rte_eal_paging.h>
25 #include <rte_mtr_driver.h>
26 #include <rte_tailq.h>
28 #include <mlx5_glue.h>
29 #include <mlx5_devx_cmds.h>
31 #include <mlx5_malloc.h>
33 #include "mlx5_defs.h"
35 #include "mlx5_common_os.h"
36 #include "mlx5_flow.h"
37 #include "mlx5_flow_os.h"
40 #include "rte_pmd_mlx5.h"
42 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
44 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
45 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
48 #ifndef HAVE_MLX5DV_DR_ESWITCH
49 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
50 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
54 #ifndef HAVE_MLX5DV_DR
55 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
58 /* VLAN header definitions */
59 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
60 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
61 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
62 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
63 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
78 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
79 struct mlx5_flow_tbl_resource *tbl);
82 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
83 uint32_t encap_decap_idx);
86 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
89 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
92 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
96 * Initialize flow attributes structure according to flow items' types.
98 * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
99 * mode. For tunnel mode, the items to be modified are the outermost ones.
102 * Pointer to item specification.
104 * Pointer to flow attributes structure.
105 * @param[in] dev_flow
106 * Pointer to the sub flow.
107 * @param[in] tunnel_decap
108 * Whether action is after tunnel decapsulation.
111 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
112 struct mlx5_flow *dev_flow, bool tunnel_decap)
114 uint64_t layers = dev_flow->handle->layers;
117 * If layers is already initialized, it means this dev_flow is the
118 * suffix flow, the layers flags is set by the prefix flow. Need to
119 * use the layer flags from prefix flow as the suffix flow may not
120 * have the user defined items as the flow is split.
123 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
125 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
127 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
129 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
134 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
135 uint8_t next_protocol = 0xff;
136 switch (item->type) {
137 case RTE_FLOW_ITEM_TYPE_GRE:
138 case RTE_FLOW_ITEM_TYPE_NVGRE:
139 case RTE_FLOW_ITEM_TYPE_VXLAN:
140 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
141 case RTE_FLOW_ITEM_TYPE_GENEVE:
142 case RTE_FLOW_ITEM_TYPE_MPLS:
146 case RTE_FLOW_ITEM_TYPE_IPV4:
149 if (item->mask != NULL &&
150 ((const struct rte_flow_item_ipv4 *)
151 item->mask)->hdr.next_proto_id)
153 ((const struct rte_flow_item_ipv4 *)
154 (item->spec))->hdr.next_proto_id &
155 ((const struct rte_flow_item_ipv4 *)
156 (item->mask))->hdr.next_proto_id;
157 if ((next_protocol == IPPROTO_IPIP ||
158 next_protocol == IPPROTO_IPV6) && tunnel_decap)
161 case RTE_FLOW_ITEM_TYPE_IPV6:
164 if (item->mask != NULL &&
165 ((const struct rte_flow_item_ipv6 *)
166 item->mask)->hdr.proto)
168 ((const struct rte_flow_item_ipv6 *)
169 (item->spec))->hdr.proto &
170 ((const struct rte_flow_item_ipv6 *)
171 (item->mask))->hdr.proto;
172 if ((next_protocol == IPPROTO_IPIP ||
173 next_protocol == IPPROTO_IPV6) && tunnel_decap)
176 case RTE_FLOW_ITEM_TYPE_UDP:
180 case RTE_FLOW_ITEM_TYPE_TCP:
192 * Convert rte_mtr_color to mlx5 color.
201 rte_col_2_mlx5_col(enum rte_color rcol)
204 case RTE_COLOR_GREEN:
205 return MLX5_FLOW_COLOR_GREEN;
206 case RTE_COLOR_YELLOW:
207 return MLX5_FLOW_COLOR_YELLOW;
209 return MLX5_FLOW_COLOR_RED;
213 return MLX5_FLOW_COLOR_UNDEFINED;
216 struct field_modify_info {
217 uint32_t size; /* Size of field in protocol header, in bytes. */
218 uint32_t offset; /* Offset of field in protocol header, in bytes. */
219 enum mlx5_modification_field id;
222 struct field_modify_info modify_eth[] = {
223 {4, 0, MLX5_MODI_OUT_DMAC_47_16},
224 {2, 4, MLX5_MODI_OUT_DMAC_15_0},
225 {4, 6, MLX5_MODI_OUT_SMAC_47_16},
226 {2, 10, MLX5_MODI_OUT_SMAC_15_0},
230 struct field_modify_info modify_vlan_out_first_vid[] = {
231 /* Size in bits !!! */
232 {12, 0, MLX5_MODI_OUT_FIRST_VID},
236 struct field_modify_info modify_ipv4[] = {
237 {1, 1, MLX5_MODI_OUT_IP_DSCP},
238 {1, 8, MLX5_MODI_OUT_IPV4_TTL},
239 {4, 12, MLX5_MODI_OUT_SIPV4},
240 {4, 16, MLX5_MODI_OUT_DIPV4},
244 struct field_modify_info modify_ipv6[] = {
245 {1, 0, MLX5_MODI_OUT_IP_DSCP},
246 {1, 7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
247 {4, 8, MLX5_MODI_OUT_SIPV6_127_96},
248 {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
249 {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
250 {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
251 {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
252 {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
253 {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
254 {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
258 struct field_modify_info modify_udp[] = {
259 {2, 0, MLX5_MODI_OUT_UDP_SPORT},
260 {2, 2, MLX5_MODI_OUT_UDP_DPORT},
264 struct field_modify_info modify_tcp[] = {
265 {2, 0, MLX5_MODI_OUT_TCP_SPORT},
266 {2, 2, MLX5_MODI_OUT_TCP_DPORT},
267 {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
268 {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
272 static const struct rte_flow_item *
273 mlx5_flow_find_tunnel_item(const struct rte_flow_item *item)
275 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
276 switch (item->type) {
279 case RTE_FLOW_ITEM_TYPE_VXLAN:
280 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
281 case RTE_FLOW_ITEM_TYPE_GRE:
282 case RTE_FLOW_ITEM_TYPE_MPLS:
283 case RTE_FLOW_ITEM_TYPE_NVGRE:
284 case RTE_FLOW_ITEM_TYPE_GENEVE:
286 case RTE_FLOW_ITEM_TYPE_IPV4:
287 case RTE_FLOW_ITEM_TYPE_IPV6:
288 if (item[1].type == RTE_FLOW_ITEM_TYPE_IPV4 ||
289 item[1].type == RTE_FLOW_ITEM_TYPE_IPV6)
298 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
299 uint8_t next_protocol, uint64_t *item_flags,
302 MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
303 item->type == RTE_FLOW_ITEM_TYPE_IPV6);
304 if (next_protocol == IPPROTO_IPIP) {
305 *item_flags |= MLX5_FLOW_LAYER_IPIP;
308 if (next_protocol == IPPROTO_IPV6) {
309 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
314 /* Update VLAN's VID/PCP based on input rte_flow_action.
317 * Pointer to struct rte_flow_action.
319 * Pointer to struct rte_vlan_hdr.
322 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
323 struct rte_vlan_hdr *vlan)
326 if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
328 ((const struct rte_flow_action_of_set_vlan_pcp *)
329 action->conf)->vlan_pcp;
330 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
331 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
332 vlan->vlan_tci |= vlan_tci;
333 } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
334 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
335 vlan->vlan_tci |= rte_be_to_cpu_16
336 (((const struct rte_flow_action_of_set_vlan_vid *)
337 action->conf)->vlan_vid);
342 * Fetch 1, 2, 3 or 4 byte field from the byte array
343 * and return as unsigned integer in host-endian format.
346 * Pointer to data array.
348 * Size of field to extract.
351 * converted field in host endian format.
353 static inline uint32_t
354 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
363 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
366 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
367 ret = (ret << 8) | *(data + sizeof(uint16_t));
370 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
381 * Convert modify-header action to DV specification.
383 * Data length of each action is determined by provided field description
384 * and the item mask. Data bit offset and width of each action is determined
385 * by provided item mask.
388 * Pointer to item specification.
390 * Pointer to field modification information.
391 * For MLX5_MODIFICATION_TYPE_SET specifies destination field.
392 * For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
393 * For MLX5_MODIFICATION_TYPE_COPY specifies source field.
395 * Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
396 * Negative offset value sets the same offset as source offset.
397 * size field is ignored, value is taken from source field.
398 * @param[in,out] resource
399 * Pointer to the modify-header resource.
401 * Type of modification.
403 * Pointer to the error structure.
406 * 0 on success, a negative errno value otherwise and rte_errno is set.
409 flow_dv_convert_modify_action(struct rte_flow_item *item,
410 struct field_modify_info *field,
411 struct field_modify_info *dcopy,
412 struct mlx5_flow_dv_modify_hdr_resource *resource,
413 uint32_t type, struct rte_flow_error *error)
415 uint32_t i = resource->actions_num;
416 struct mlx5_modification_cmd *actions = resource->actions;
417 uint32_t carry_b = 0;
420 * The item and mask are provided in big-endian format.
421 * The fields should be presented as in big-endian format either.
422 * Mask must be always present, it defines the actual field width.
424 MLX5_ASSERT(item->mask);
425 MLX5_ASSERT(field->size);
431 bool next_field = true;
432 bool next_dcopy = true;
434 if (i >= MLX5_MAX_MODIFY_NUM)
435 return rte_flow_error_set(error, EINVAL,
436 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
437 "too many items to modify");
438 /* Fetch variable byte size mask from the array. */
439 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
440 field->offset, field->size);
445 /* Deduce actual data width in bits from mask value. */
446 off_b = rte_bsf32(mask) + carry_b;
447 size_b = sizeof(uint32_t) * CHAR_BIT -
448 off_b - __builtin_clz(mask);
450 actions[i] = (struct mlx5_modification_cmd) {
454 .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
457 if (type == MLX5_MODIFICATION_TYPE_COPY) {
459 actions[i].dst_field = dcopy->id;
460 actions[i].dst_offset =
461 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
462 /* Convert entire record to big-endian format. */
463 actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
465 * Destination field overflow. Copy leftovers of
466 * a source field to the next destination field.
469 if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
472 dcopy->size * CHAR_BIT - dcopy->offset;
473 carry_b = actions[i].length;
477 * Not enough bits in a source filed to fill a
478 * destination field. Switch to the next source.
480 if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
481 (size_b == field->size * CHAR_BIT - off_b)) {
483 field->size * CHAR_BIT - off_b;
484 dcopy->offset += actions[i].length;
490 MLX5_ASSERT(item->spec);
491 data = flow_dv_fetch_field((const uint8_t *)item->spec +
492 field->offset, field->size);
493 /* Shift out the trailing masked bits from data. */
494 data = (data & mask) >> off_b;
495 actions[i].data1 = rte_cpu_to_be_32(data);
497 /* Convert entire record to expected big-endian format. */
498 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
502 } while (field->size);
503 if (resource->actions_num == i)
504 return rte_flow_error_set(error, EINVAL,
505 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
506 "invalid modification flow item");
507 resource->actions_num = i;
512 * Convert modify-header set IPv4 address action to DV specification.
514 * @param[in,out] resource
515 * Pointer to the modify-header resource.
517 * Pointer to action specification.
519 * Pointer to the error structure.
522 * 0 on success, a negative errno value otherwise and rte_errno is set.
525 flow_dv_convert_action_modify_ipv4
526 (struct mlx5_flow_dv_modify_hdr_resource *resource,
527 const struct rte_flow_action *action,
528 struct rte_flow_error *error)
530 const struct rte_flow_action_set_ipv4 *conf =
531 (const struct rte_flow_action_set_ipv4 *)(action->conf);
532 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
533 struct rte_flow_item_ipv4 ipv4;
534 struct rte_flow_item_ipv4 ipv4_mask;
536 memset(&ipv4, 0, sizeof(ipv4));
537 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
538 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
539 ipv4.hdr.src_addr = conf->ipv4_addr;
540 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
542 ipv4.hdr.dst_addr = conf->ipv4_addr;
543 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
546 item.mask = &ipv4_mask;
547 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
548 MLX5_MODIFICATION_TYPE_SET, error);
552 * Convert modify-header set IPv6 address action to DV specification.
554 * @param[in,out] resource
555 * Pointer to the modify-header resource.
557 * Pointer to action specification.
559 * Pointer to the error structure.
562 * 0 on success, a negative errno value otherwise and rte_errno is set.
565 flow_dv_convert_action_modify_ipv6
566 (struct mlx5_flow_dv_modify_hdr_resource *resource,
567 const struct rte_flow_action *action,
568 struct rte_flow_error *error)
570 const struct rte_flow_action_set_ipv6 *conf =
571 (const struct rte_flow_action_set_ipv6 *)(action->conf);
572 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
573 struct rte_flow_item_ipv6 ipv6;
574 struct rte_flow_item_ipv6 ipv6_mask;
576 memset(&ipv6, 0, sizeof(ipv6));
577 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
578 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
579 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
580 sizeof(ipv6.hdr.src_addr));
581 memcpy(&ipv6_mask.hdr.src_addr,
582 &rte_flow_item_ipv6_mask.hdr.src_addr,
583 sizeof(ipv6.hdr.src_addr));
585 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
586 sizeof(ipv6.hdr.dst_addr));
587 memcpy(&ipv6_mask.hdr.dst_addr,
588 &rte_flow_item_ipv6_mask.hdr.dst_addr,
589 sizeof(ipv6.hdr.dst_addr));
592 item.mask = &ipv6_mask;
593 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
594 MLX5_MODIFICATION_TYPE_SET, error);
598 * Convert modify-header set MAC address action to DV specification.
600 * @param[in,out] resource
601 * Pointer to the modify-header resource.
603 * Pointer to action specification.
605 * Pointer to the error structure.
608 * 0 on success, a negative errno value otherwise and rte_errno is set.
611 flow_dv_convert_action_modify_mac
612 (struct mlx5_flow_dv_modify_hdr_resource *resource,
613 const struct rte_flow_action *action,
614 struct rte_flow_error *error)
616 const struct rte_flow_action_set_mac *conf =
617 (const struct rte_flow_action_set_mac *)(action->conf);
618 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
619 struct rte_flow_item_eth eth;
620 struct rte_flow_item_eth eth_mask;
622 memset(ð, 0, sizeof(eth));
623 memset(ð_mask, 0, sizeof(eth_mask));
624 if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
625 memcpy(ð.src.addr_bytes, &conf->mac_addr,
626 sizeof(eth.src.addr_bytes));
627 memcpy(ð_mask.src.addr_bytes,
628 &rte_flow_item_eth_mask.src.addr_bytes,
629 sizeof(eth_mask.src.addr_bytes));
631 memcpy(ð.dst.addr_bytes, &conf->mac_addr,
632 sizeof(eth.dst.addr_bytes));
633 memcpy(ð_mask.dst.addr_bytes,
634 &rte_flow_item_eth_mask.dst.addr_bytes,
635 sizeof(eth_mask.dst.addr_bytes));
638 item.mask = ð_mask;
639 return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
640 MLX5_MODIFICATION_TYPE_SET, error);
644 * Convert modify-header set VLAN VID action to DV specification.
646 * @param[in,out] resource
647 * Pointer to the modify-header resource.
649 * Pointer to action specification.
651 * Pointer to the error structure.
654 * 0 on success, a negative errno value otherwise and rte_errno is set.
657 flow_dv_convert_action_modify_vlan_vid
658 (struct mlx5_flow_dv_modify_hdr_resource *resource,
659 const struct rte_flow_action *action,
660 struct rte_flow_error *error)
662 const struct rte_flow_action_of_set_vlan_vid *conf =
663 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
664 int i = resource->actions_num;
665 struct mlx5_modification_cmd *actions = resource->actions;
666 struct field_modify_info *field = modify_vlan_out_first_vid;
668 if (i >= MLX5_MAX_MODIFY_NUM)
669 return rte_flow_error_set(error, EINVAL,
670 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
671 "too many items to modify");
672 actions[i] = (struct mlx5_modification_cmd) {
673 .action_type = MLX5_MODIFICATION_TYPE_SET,
675 .length = field->size,
676 .offset = field->offset,
678 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
679 actions[i].data1 = conf->vlan_vid;
680 actions[i].data1 = actions[i].data1 << 16;
681 resource->actions_num = ++i;
686 * Convert modify-header set TP action to DV specification.
688 * @param[in,out] resource
689 * Pointer to the modify-header resource.
691 * Pointer to action specification.
693 * Pointer to rte_flow_item objects list.
695 * Pointer to flow attributes structure.
696 * @param[in] dev_flow
697 * Pointer to the sub flow.
698 * @param[in] tunnel_decap
699 * Whether action is after tunnel decapsulation.
701 * Pointer to the error structure.
704 * 0 on success, a negative errno value otherwise and rte_errno is set.
707 flow_dv_convert_action_modify_tp
708 (struct mlx5_flow_dv_modify_hdr_resource *resource,
709 const struct rte_flow_action *action,
710 const struct rte_flow_item *items,
711 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
712 bool tunnel_decap, struct rte_flow_error *error)
714 const struct rte_flow_action_set_tp *conf =
715 (const struct rte_flow_action_set_tp *)(action->conf);
716 struct rte_flow_item item;
717 struct rte_flow_item_udp udp;
718 struct rte_flow_item_udp udp_mask;
719 struct rte_flow_item_tcp tcp;
720 struct rte_flow_item_tcp tcp_mask;
721 struct field_modify_info *field;
724 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
726 memset(&udp, 0, sizeof(udp));
727 memset(&udp_mask, 0, sizeof(udp_mask));
728 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
729 udp.hdr.src_port = conf->port;
730 udp_mask.hdr.src_port =
731 rte_flow_item_udp_mask.hdr.src_port;
733 udp.hdr.dst_port = conf->port;
734 udp_mask.hdr.dst_port =
735 rte_flow_item_udp_mask.hdr.dst_port;
737 item.type = RTE_FLOW_ITEM_TYPE_UDP;
739 item.mask = &udp_mask;
742 MLX5_ASSERT(attr->tcp);
743 memset(&tcp, 0, sizeof(tcp));
744 memset(&tcp_mask, 0, sizeof(tcp_mask));
745 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
746 tcp.hdr.src_port = conf->port;
747 tcp_mask.hdr.src_port =
748 rte_flow_item_tcp_mask.hdr.src_port;
750 tcp.hdr.dst_port = conf->port;
751 tcp_mask.hdr.dst_port =
752 rte_flow_item_tcp_mask.hdr.dst_port;
754 item.type = RTE_FLOW_ITEM_TYPE_TCP;
756 item.mask = &tcp_mask;
759 return flow_dv_convert_modify_action(&item, field, NULL, resource,
760 MLX5_MODIFICATION_TYPE_SET, error);
764 * Convert modify-header set TTL action to DV specification.
766 * @param[in,out] resource
767 * Pointer to the modify-header resource.
769 * Pointer to action specification.
771 * Pointer to rte_flow_item objects list.
773 * Pointer to flow attributes structure.
774 * @param[in] dev_flow
775 * Pointer to the sub flow.
776 * @param[in] tunnel_decap
777 * Whether action is after tunnel decapsulation.
779 * Pointer to the error structure.
782 * 0 on success, a negative errno value otherwise and rte_errno is set.
785 flow_dv_convert_action_modify_ttl
786 (struct mlx5_flow_dv_modify_hdr_resource *resource,
787 const struct rte_flow_action *action,
788 const struct rte_flow_item *items,
789 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
790 bool tunnel_decap, struct rte_flow_error *error)
792 const struct rte_flow_action_set_ttl *conf =
793 (const struct rte_flow_action_set_ttl *)(action->conf);
794 struct rte_flow_item item;
795 struct rte_flow_item_ipv4 ipv4;
796 struct rte_flow_item_ipv4 ipv4_mask;
797 struct rte_flow_item_ipv6 ipv6;
798 struct rte_flow_item_ipv6 ipv6_mask;
799 struct field_modify_info *field;
802 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
804 memset(&ipv4, 0, sizeof(ipv4));
805 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
806 ipv4.hdr.time_to_live = conf->ttl_value;
807 ipv4_mask.hdr.time_to_live = 0xFF;
808 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
810 item.mask = &ipv4_mask;
813 MLX5_ASSERT(attr->ipv6);
814 memset(&ipv6, 0, sizeof(ipv6));
815 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
816 ipv6.hdr.hop_limits = conf->ttl_value;
817 ipv6_mask.hdr.hop_limits = 0xFF;
818 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
820 item.mask = &ipv6_mask;
823 return flow_dv_convert_modify_action(&item, field, NULL, resource,
824 MLX5_MODIFICATION_TYPE_SET, error);
828 * Convert modify-header decrement TTL action to DV specification.
830 * @param[in,out] resource
831 * Pointer to the modify-header resource.
833 * Pointer to action specification.
835 * Pointer to rte_flow_item objects list.
837 * Pointer to flow attributes structure.
838 * @param[in] dev_flow
839 * Pointer to the sub flow.
840 * @param[in] tunnel_decap
841 * Whether action is after tunnel decapsulation.
843 * Pointer to the error structure.
846 * 0 on success, a negative errno value otherwise and rte_errno is set.
849 flow_dv_convert_action_modify_dec_ttl
850 (struct mlx5_flow_dv_modify_hdr_resource *resource,
851 const struct rte_flow_item *items,
852 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
853 bool tunnel_decap, struct rte_flow_error *error)
855 struct rte_flow_item item;
856 struct rte_flow_item_ipv4 ipv4;
857 struct rte_flow_item_ipv4 ipv4_mask;
858 struct rte_flow_item_ipv6 ipv6;
859 struct rte_flow_item_ipv6 ipv6_mask;
860 struct field_modify_info *field;
863 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
865 memset(&ipv4, 0, sizeof(ipv4));
866 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
867 ipv4.hdr.time_to_live = 0xFF;
868 ipv4_mask.hdr.time_to_live = 0xFF;
869 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
871 item.mask = &ipv4_mask;
874 MLX5_ASSERT(attr->ipv6);
875 memset(&ipv6, 0, sizeof(ipv6));
876 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
877 ipv6.hdr.hop_limits = 0xFF;
878 ipv6_mask.hdr.hop_limits = 0xFF;
879 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
881 item.mask = &ipv6_mask;
884 return flow_dv_convert_modify_action(&item, field, NULL, resource,
885 MLX5_MODIFICATION_TYPE_ADD, error);
889 * Convert modify-header increment/decrement TCP Sequence number
890 * to DV specification.
892 * @param[in,out] resource
893 * Pointer to the modify-header resource.
895 * Pointer to action specification.
897 * Pointer to the error structure.
900 * 0 on success, a negative errno value otherwise and rte_errno is set.
903 flow_dv_convert_action_modify_tcp_seq
904 (struct mlx5_flow_dv_modify_hdr_resource *resource,
905 const struct rte_flow_action *action,
906 struct rte_flow_error *error)
908 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
909 uint64_t value = rte_be_to_cpu_32(*conf);
910 struct rte_flow_item item;
911 struct rte_flow_item_tcp tcp;
912 struct rte_flow_item_tcp tcp_mask;
914 memset(&tcp, 0, sizeof(tcp));
915 memset(&tcp_mask, 0, sizeof(tcp_mask));
916 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
918 * The HW has no decrement operation, only increment operation.
919 * To simulate decrement X from Y using increment operation
920 * we need to add UINT32_MAX X times to Y.
921 * Each adding of UINT32_MAX decrements Y by 1.
924 tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
925 tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
926 item.type = RTE_FLOW_ITEM_TYPE_TCP;
928 item.mask = &tcp_mask;
929 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
930 MLX5_MODIFICATION_TYPE_ADD, error);
934 * Convert modify-header increment/decrement TCP Acknowledgment number
935 * to DV specification.
937 * @param[in,out] resource
938 * Pointer to the modify-header resource.
940 * Pointer to action specification.
942 * Pointer to the error structure.
945 * 0 on success, a negative errno value otherwise and rte_errno is set.
948 flow_dv_convert_action_modify_tcp_ack
949 (struct mlx5_flow_dv_modify_hdr_resource *resource,
950 const struct rte_flow_action *action,
951 struct rte_flow_error *error)
953 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
954 uint64_t value = rte_be_to_cpu_32(*conf);
955 struct rte_flow_item item;
956 struct rte_flow_item_tcp tcp;
957 struct rte_flow_item_tcp tcp_mask;
959 memset(&tcp, 0, sizeof(tcp));
960 memset(&tcp_mask, 0, sizeof(tcp_mask));
961 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
963 * The HW has no decrement operation, only increment operation.
964 * To simulate decrement X from Y using increment operation
965 * we need to add UINT32_MAX X times to Y.
966 * Each adding of UINT32_MAX decrements Y by 1.
969 tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
970 tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
971 item.type = RTE_FLOW_ITEM_TYPE_TCP;
973 item.mask = &tcp_mask;
974 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
975 MLX5_MODIFICATION_TYPE_ADD, error);
978 static enum mlx5_modification_field reg_to_field[] = {
979 [REG_NON] = MLX5_MODI_OUT_NONE,
980 [REG_A] = MLX5_MODI_META_DATA_REG_A,
981 [REG_B] = MLX5_MODI_META_DATA_REG_B,
982 [REG_C_0] = MLX5_MODI_META_REG_C_0,
983 [REG_C_1] = MLX5_MODI_META_REG_C_1,
984 [REG_C_2] = MLX5_MODI_META_REG_C_2,
985 [REG_C_3] = MLX5_MODI_META_REG_C_3,
986 [REG_C_4] = MLX5_MODI_META_REG_C_4,
987 [REG_C_5] = MLX5_MODI_META_REG_C_5,
988 [REG_C_6] = MLX5_MODI_META_REG_C_6,
989 [REG_C_7] = MLX5_MODI_META_REG_C_7,
993 * Convert register set to DV specification.
995 * @param[in,out] resource
996 * Pointer to the modify-header resource.
998 * Pointer to action specification.
1000 * Pointer to the error structure.
1003 * 0 on success, a negative errno value otherwise and rte_errno is set.
1006 flow_dv_convert_action_set_reg
1007 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1008 const struct rte_flow_action *action,
1009 struct rte_flow_error *error)
1011 const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1012 struct mlx5_modification_cmd *actions = resource->actions;
1013 uint32_t i = resource->actions_num;
1015 if (i >= MLX5_MAX_MODIFY_NUM)
1016 return rte_flow_error_set(error, EINVAL,
1017 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1018 "too many items to modify");
1019 MLX5_ASSERT(conf->id != REG_NON);
1020 MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1021 actions[i] = (struct mlx5_modification_cmd) {
1022 .action_type = MLX5_MODIFICATION_TYPE_SET,
1023 .field = reg_to_field[conf->id],
1024 .offset = conf->offset,
1025 .length = conf->length,
1027 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1028 actions[i].data1 = rte_cpu_to_be_32(conf->data);
1030 resource->actions_num = i;
1035 * Convert SET_TAG action to DV specification.
1038 * Pointer to the rte_eth_dev structure.
1039 * @param[in,out] resource
1040 * Pointer to the modify-header resource.
1042 * Pointer to action specification.
1044 * Pointer to the error structure.
1047 * 0 on success, a negative errno value otherwise and rte_errno is set.
1050 flow_dv_convert_action_set_tag
1051 (struct rte_eth_dev *dev,
1052 struct mlx5_flow_dv_modify_hdr_resource *resource,
1053 const struct rte_flow_action_set_tag *conf,
1054 struct rte_flow_error *error)
1056 rte_be32_t data = rte_cpu_to_be_32(conf->data);
1057 rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1058 struct rte_flow_item item = {
1062 struct field_modify_info reg_c_x[] = {
1065 enum mlx5_modification_field reg_type;
1068 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1071 MLX5_ASSERT(ret != REG_NON);
1072 MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1073 reg_type = reg_to_field[ret];
1074 MLX5_ASSERT(reg_type > 0);
1075 reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1076 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1077 MLX5_MODIFICATION_TYPE_SET, error);
1081 * Convert internal COPY_REG action to DV specification.
1084 * Pointer to the rte_eth_dev structure.
1085 * @param[in,out] res
1086 * Pointer to the modify-header resource.
1088 * Pointer to action specification.
1090 * Pointer to the error structure.
1093 * 0 on success, a negative errno value otherwise and rte_errno is set.
1096 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1097 struct mlx5_flow_dv_modify_hdr_resource *res,
1098 const struct rte_flow_action *action,
1099 struct rte_flow_error *error)
1101 const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1102 rte_be32_t mask = RTE_BE32(UINT32_MAX);
1103 struct rte_flow_item item = {
1107 struct field_modify_info reg_src[] = {
1108 {4, 0, reg_to_field[conf->src]},
1111 struct field_modify_info reg_dst = {
1113 .id = reg_to_field[conf->dst],
1115 /* Adjust reg_c[0] usage according to reported mask. */
1116 if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1117 struct mlx5_priv *priv = dev->data->dev_private;
1118 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1120 MLX5_ASSERT(reg_c0);
1121 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1122 if (conf->dst == REG_C_0) {
1123 /* Copy to reg_c[0], within mask only. */
1124 reg_dst.offset = rte_bsf32(reg_c0);
1126 * Mask is ignoring the enianness, because
1127 * there is no conversion in datapath.
1129 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1130 /* Copy from destination lower bits to reg_c[0]. */
1131 mask = reg_c0 >> reg_dst.offset;
1133 /* Copy from destination upper bits to reg_c[0]. */
1134 mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1135 rte_fls_u32(reg_c0));
1138 mask = rte_cpu_to_be_32(reg_c0);
1139 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1140 /* Copy from reg_c[0] to destination lower bits. */
1143 /* Copy from reg_c[0] to destination upper bits. */
1144 reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1145 (rte_fls_u32(reg_c0) -
1150 return flow_dv_convert_modify_action(&item,
1151 reg_src, ®_dst, res,
1152 MLX5_MODIFICATION_TYPE_COPY,
1157 * Convert MARK action to DV specification. This routine is used
1158 * in extensive metadata only and requires metadata register to be
1159 * handled. In legacy mode hardware tag resource is engaged.
1162 * Pointer to the rte_eth_dev structure.
1164 * Pointer to MARK action specification.
1165 * @param[in,out] resource
1166 * Pointer to the modify-header resource.
1168 * Pointer to the error structure.
1171 * 0 on success, a negative errno value otherwise and rte_errno is set.
1174 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1175 const struct rte_flow_action_mark *conf,
1176 struct mlx5_flow_dv_modify_hdr_resource *resource,
1177 struct rte_flow_error *error)
1179 struct mlx5_priv *priv = dev->data->dev_private;
1180 rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1181 priv->sh->dv_mark_mask);
1182 rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1183 struct rte_flow_item item = {
1187 struct field_modify_info reg_c_x[] = {
1193 return rte_flow_error_set(error, EINVAL,
1194 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1195 NULL, "zero mark action mask");
1196 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1199 MLX5_ASSERT(reg > 0);
1200 if (reg == REG_C_0) {
1201 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1202 uint32_t shl_c0 = rte_bsf32(msk_c0);
1204 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1205 mask = rte_cpu_to_be_32(mask) & msk_c0;
1206 mask = rte_cpu_to_be_32(mask << shl_c0);
1208 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1209 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1210 MLX5_MODIFICATION_TYPE_SET, error);
1214 * Get metadata register index for specified steering domain.
1217 * Pointer to the rte_eth_dev structure.
1219 * Attributes of flow to determine steering domain.
1221 * Pointer to the error structure.
1224 * positive index on success, a negative errno value otherwise
1225 * and rte_errno is set.
1227 static enum modify_reg
1228 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1229 const struct rte_flow_attr *attr,
1230 struct rte_flow_error *error)
1233 mlx5_flow_get_reg_id(dev, attr->transfer ?
1237 MLX5_METADATA_RX, 0, error);
1239 return rte_flow_error_set(error,
1240 ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1241 NULL, "unavailable "
1242 "metadata register");
1247 * Convert SET_META action to DV specification.
1250 * Pointer to the rte_eth_dev structure.
1251 * @param[in,out] resource
1252 * Pointer to the modify-header resource.
1254 * Attributes of flow that includes this item.
1256 * Pointer to action specification.
1258 * Pointer to the error structure.
1261 * 0 on success, a negative errno value otherwise and rte_errno is set.
1264 flow_dv_convert_action_set_meta
1265 (struct rte_eth_dev *dev,
1266 struct mlx5_flow_dv_modify_hdr_resource *resource,
1267 const struct rte_flow_attr *attr,
1268 const struct rte_flow_action_set_meta *conf,
1269 struct rte_flow_error *error)
1271 uint32_t mask = rte_cpu_to_be_32(conf->mask);
1272 uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1273 struct rte_flow_item item = {
1277 struct field_modify_info reg_c_x[] = {
1280 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1284 MLX5_ASSERT(reg != REG_NON);
1285 if (reg == REG_C_0) {
1286 struct mlx5_priv *priv = dev->data->dev_private;
1287 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1288 uint32_t shl_c0 = rte_bsf32(msk_c0);
1290 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1291 mask = rte_cpu_to_be_32(mask) & msk_c0;
1292 mask = rte_cpu_to_be_32(mask << shl_c0);
1294 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1295 /* The routine expects parameters in memory as big-endian ones. */
1296 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1297 MLX5_MODIFICATION_TYPE_SET, error);
1301 * Convert modify-header set IPv4 DSCP action to DV specification.
1303 * @param[in,out] resource
1304 * Pointer to the modify-header resource.
1306 * Pointer to action specification.
1308 * Pointer to the error structure.
1311 * 0 on success, a negative errno value otherwise and rte_errno is set.
1314 flow_dv_convert_action_modify_ipv4_dscp
1315 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1316 const struct rte_flow_action *action,
1317 struct rte_flow_error *error)
1319 const struct rte_flow_action_set_dscp *conf =
1320 (const struct rte_flow_action_set_dscp *)(action->conf);
1321 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1322 struct rte_flow_item_ipv4 ipv4;
1323 struct rte_flow_item_ipv4 ipv4_mask;
1325 memset(&ipv4, 0, sizeof(ipv4));
1326 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1327 ipv4.hdr.type_of_service = conf->dscp;
1328 ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1330 item.mask = &ipv4_mask;
1331 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1332 MLX5_MODIFICATION_TYPE_SET, error);
1336 * Convert modify-header set IPv6 DSCP action to DV specification.
1338 * @param[in,out] resource
1339 * Pointer to the modify-header resource.
1341 * Pointer to action specification.
1343 * Pointer to the error structure.
1346 * 0 on success, a negative errno value otherwise and rte_errno is set.
1349 flow_dv_convert_action_modify_ipv6_dscp
1350 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1351 const struct rte_flow_action *action,
1352 struct rte_flow_error *error)
1354 const struct rte_flow_action_set_dscp *conf =
1355 (const struct rte_flow_action_set_dscp *)(action->conf);
1356 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1357 struct rte_flow_item_ipv6 ipv6;
1358 struct rte_flow_item_ipv6 ipv6_mask;
1360 memset(&ipv6, 0, sizeof(ipv6));
1361 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1363 * Even though the DSCP bits offset of IPv6 is not byte aligned,
1364 * rdma-core only accept the DSCP bits byte aligned start from
1365 * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1366 * bits in IPv6 case as rdma-core requires byte aligned value.
1368 ipv6.hdr.vtc_flow = conf->dscp;
1369 ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1371 item.mask = &ipv6_mask;
1372 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1373 MLX5_MODIFICATION_TYPE_SET, error);
1377 mlx5_flow_item_field_width(struct mlx5_dev_config *config,
1378 enum rte_flow_field_id field)
1381 case RTE_FLOW_FIELD_START:
1383 case RTE_FLOW_FIELD_MAC_DST:
1384 case RTE_FLOW_FIELD_MAC_SRC:
1386 case RTE_FLOW_FIELD_VLAN_TYPE:
1388 case RTE_FLOW_FIELD_VLAN_ID:
1390 case RTE_FLOW_FIELD_MAC_TYPE:
1392 case RTE_FLOW_FIELD_IPV4_DSCP:
1394 case RTE_FLOW_FIELD_IPV4_TTL:
1396 case RTE_FLOW_FIELD_IPV4_SRC:
1397 case RTE_FLOW_FIELD_IPV4_DST:
1399 case RTE_FLOW_FIELD_IPV6_DSCP:
1401 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1403 case RTE_FLOW_FIELD_IPV6_SRC:
1404 case RTE_FLOW_FIELD_IPV6_DST:
1406 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1407 case RTE_FLOW_FIELD_TCP_PORT_DST:
1409 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1410 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1412 case RTE_FLOW_FIELD_TCP_FLAGS:
1414 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1415 case RTE_FLOW_FIELD_UDP_PORT_DST:
1417 case RTE_FLOW_FIELD_VXLAN_VNI:
1418 case RTE_FLOW_FIELD_GENEVE_VNI:
1420 case RTE_FLOW_FIELD_GTP_TEID:
1421 case RTE_FLOW_FIELD_TAG:
1423 case RTE_FLOW_FIELD_MARK:
1425 case RTE_FLOW_FIELD_META:
1426 if (config->dv_xmeta_en == MLX5_XMETA_MODE_META16)
1428 else if (config->dv_xmeta_en == MLX5_XMETA_MODE_META32)
1432 case RTE_FLOW_FIELD_POINTER:
1433 case RTE_FLOW_FIELD_VALUE:
1442 mlx5_flow_field_id_to_modify_info
1443 (const struct rte_flow_action_modify_data *data,
1444 struct field_modify_info *info,
1445 uint32_t *mask, uint32_t *value,
1446 uint32_t width, uint32_t dst_width,
1447 struct rte_eth_dev *dev,
1448 const struct rte_flow_attr *attr,
1449 struct rte_flow_error *error)
1451 struct mlx5_priv *priv = dev->data->dev_private;
1452 struct mlx5_dev_config *config = &priv->config;
1456 switch (data->field) {
1457 case RTE_FLOW_FIELD_START:
1458 /* not supported yet */
1461 case RTE_FLOW_FIELD_MAC_DST:
1462 off = data->offset > 16 ? data->offset - 16 : 0;
1464 if (data->offset < 16) {
1465 info[idx] = (struct field_modify_info){2, 0,
1466 MLX5_MODI_OUT_DMAC_15_0};
1468 mask[idx] = rte_cpu_to_be_16(0xffff >>
1472 mask[idx] = RTE_BE16(0xffff);
1479 info[idx] = (struct field_modify_info){4, 4 * idx,
1480 MLX5_MODI_OUT_DMAC_47_16};
1481 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1482 (32 - width)) << off);
1484 if (data->offset < 16)
1485 info[idx++] = (struct field_modify_info){2, 0,
1486 MLX5_MODI_OUT_DMAC_15_0};
1487 info[idx] = (struct field_modify_info){4, off,
1488 MLX5_MODI_OUT_DMAC_47_16};
1491 case RTE_FLOW_FIELD_MAC_SRC:
1492 off = data->offset > 16 ? data->offset - 16 : 0;
1494 if (data->offset < 16) {
1495 info[idx] = (struct field_modify_info){2, 0,
1496 MLX5_MODI_OUT_SMAC_15_0};
1498 mask[idx] = rte_cpu_to_be_16(0xffff >>
1502 mask[idx] = RTE_BE16(0xffff);
1509 info[idx] = (struct field_modify_info){4, 4 * idx,
1510 MLX5_MODI_OUT_SMAC_47_16};
1511 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1512 (32 - width)) << off);
1514 if (data->offset < 16)
1515 info[idx++] = (struct field_modify_info){2, 0,
1516 MLX5_MODI_OUT_SMAC_15_0};
1517 info[idx] = (struct field_modify_info){4, off,
1518 MLX5_MODI_OUT_SMAC_47_16};
1521 case RTE_FLOW_FIELD_VLAN_TYPE:
1522 /* not supported yet */
1524 case RTE_FLOW_FIELD_VLAN_ID:
1525 info[idx] = (struct field_modify_info){2, 0,
1526 MLX5_MODI_OUT_FIRST_VID};
1528 mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1530 case RTE_FLOW_FIELD_MAC_TYPE:
1531 info[idx] = (struct field_modify_info){2, 0,
1532 MLX5_MODI_OUT_ETHERTYPE};
1534 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1536 case RTE_FLOW_FIELD_IPV4_DSCP:
1537 info[idx] = (struct field_modify_info){1, 0,
1538 MLX5_MODI_OUT_IP_DSCP};
1540 mask[idx] = 0x3f >> (6 - width);
1542 case RTE_FLOW_FIELD_IPV4_TTL:
1543 info[idx] = (struct field_modify_info){1, 0,
1544 MLX5_MODI_OUT_IPV4_TTL};
1546 mask[idx] = 0xff >> (8 - width);
1548 case RTE_FLOW_FIELD_IPV4_SRC:
1549 info[idx] = (struct field_modify_info){4, 0,
1550 MLX5_MODI_OUT_SIPV4};
1552 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1555 case RTE_FLOW_FIELD_IPV4_DST:
1556 info[idx] = (struct field_modify_info){4, 0,
1557 MLX5_MODI_OUT_DIPV4};
1559 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1562 case RTE_FLOW_FIELD_IPV6_DSCP:
1563 info[idx] = (struct field_modify_info){1, 0,
1564 MLX5_MODI_OUT_IP_DSCP};
1566 mask[idx] = 0x3f >> (6 - width);
1568 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1569 info[idx] = (struct field_modify_info){1, 0,
1570 MLX5_MODI_OUT_IPV6_HOPLIMIT};
1572 mask[idx] = 0xff >> (8 - width);
1574 case RTE_FLOW_FIELD_IPV6_SRC:
1576 if (data->offset < 32) {
1577 info[idx] = (struct field_modify_info){4,
1579 MLX5_MODI_OUT_SIPV6_31_0};
1582 rte_cpu_to_be_32(0xffffffff >>
1586 mask[idx] = RTE_BE32(0xffffffff);
1593 if (data->offset < 64) {
1594 info[idx] = (struct field_modify_info){4,
1596 MLX5_MODI_OUT_SIPV6_63_32};
1599 rte_cpu_to_be_32(0xffffffff >>
1603 mask[idx] = RTE_BE32(0xffffffff);
1610 if (data->offset < 96) {
1611 info[idx] = (struct field_modify_info){4,
1613 MLX5_MODI_OUT_SIPV6_95_64};
1616 rte_cpu_to_be_32(0xffffffff >>
1620 mask[idx] = RTE_BE32(0xffffffff);
1627 info[idx] = (struct field_modify_info){4, 4 * idx,
1628 MLX5_MODI_OUT_SIPV6_127_96};
1629 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1632 if (data->offset < 32)
1633 info[idx++] = (struct field_modify_info){4, 0,
1634 MLX5_MODI_OUT_SIPV6_31_0};
1635 if (data->offset < 64)
1636 info[idx++] = (struct field_modify_info){4, 0,
1637 MLX5_MODI_OUT_SIPV6_63_32};
1638 if (data->offset < 96)
1639 info[idx++] = (struct field_modify_info){4, 0,
1640 MLX5_MODI_OUT_SIPV6_95_64};
1641 if (data->offset < 128)
1642 info[idx++] = (struct field_modify_info){4, 0,
1643 MLX5_MODI_OUT_SIPV6_127_96};
1646 case RTE_FLOW_FIELD_IPV6_DST:
1648 if (data->offset < 32) {
1649 info[idx] = (struct field_modify_info){4,
1651 MLX5_MODI_OUT_DIPV6_31_0};
1654 rte_cpu_to_be_32(0xffffffff >>
1658 mask[idx] = RTE_BE32(0xffffffff);
1665 if (data->offset < 64) {
1666 info[idx] = (struct field_modify_info){4,
1668 MLX5_MODI_OUT_DIPV6_63_32};
1671 rte_cpu_to_be_32(0xffffffff >>
1675 mask[idx] = RTE_BE32(0xffffffff);
1682 if (data->offset < 96) {
1683 info[idx] = (struct field_modify_info){4,
1685 MLX5_MODI_OUT_DIPV6_95_64};
1688 rte_cpu_to_be_32(0xffffffff >>
1692 mask[idx] = RTE_BE32(0xffffffff);
1699 info[idx] = (struct field_modify_info){4, 4 * idx,
1700 MLX5_MODI_OUT_DIPV6_127_96};
1701 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1704 if (data->offset < 32)
1705 info[idx++] = (struct field_modify_info){4, 0,
1706 MLX5_MODI_OUT_DIPV6_31_0};
1707 if (data->offset < 64)
1708 info[idx++] = (struct field_modify_info){4, 0,
1709 MLX5_MODI_OUT_DIPV6_63_32};
1710 if (data->offset < 96)
1711 info[idx++] = (struct field_modify_info){4, 0,
1712 MLX5_MODI_OUT_DIPV6_95_64};
1713 if (data->offset < 128)
1714 info[idx++] = (struct field_modify_info){4, 0,
1715 MLX5_MODI_OUT_DIPV6_127_96};
1718 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1719 info[idx] = (struct field_modify_info){2, 0,
1720 MLX5_MODI_OUT_TCP_SPORT};
1722 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1724 case RTE_FLOW_FIELD_TCP_PORT_DST:
1725 info[idx] = (struct field_modify_info){2, 0,
1726 MLX5_MODI_OUT_TCP_DPORT};
1728 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1730 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1731 info[idx] = (struct field_modify_info){4, 0,
1732 MLX5_MODI_OUT_TCP_SEQ_NUM};
1734 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1737 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1738 info[idx] = (struct field_modify_info){4, 0,
1739 MLX5_MODI_OUT_TCP_ACK_NUM};
1741 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1744 case RTE_FLOW_FIELD_TCP_FLAGS:
1745 info[idx] = (struct field_modify_info){2, 0,
1746 MLX5_MODI_OUT_TCP_FLAGS};
1748 mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1750 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1751 info[idx] = (struct field_modify_info){2, 0,
1752 MLX5_MODI_OUT_UDP_SPORT};
1754 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1756 case RTE_FLOW_FIELD_UDP_PORT_DST:
1757 info[idx] = (struct field_modify_info){2, 0,
1758 MLX5_MODI_OUT_UDP_DPORT};
1760 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1762 case RTE_FLOW_FIELD_VXLAN_VNI:
1763 /* not supported yet */
1765 case RTE_FLOW_FIELD_GENEVE_VNI:
1766 /* not supported yet*/
1768 case RTE_FLOW_FIELD_GTP_TEID:
1769 info[idx] = (struct field_modify_info){4, 0,
1770 MLX5_MODI_GTP_TEID};
1772 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1775 case RTE_FLOW_FIELD_TAG:
1777 int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1778 data->level, error);
1781 MLX5_ASSERT(reg != REG_NON);
1782 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1783 info[idx] = (struct field_modify_info){4, 0,
1787 rte_cpu_to_be_32(0xffffffff >>
1791 case RTE_FLOW_FIELD_MARK:
1793 int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1797 MLX5_ASSERT(reg != REG_NON);
1798 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1799 info[idx] = (struct field_modify_info){4, 0,
1803 rte_cpu_to_be_32(0xffffffff >>
1807 case RTE_FLOW_FIELD_META:
1809 unsigned int xmeta = config->dv_xmeta_en;
1810 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1813 MLX5_ASSERT(reg != REG_NON);
1814 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1815 if (xmeta == MLX5_XMETA_MODE_META16) {
1816 info[idx] = (struct field_modify_info){2, 0,
1819 mask[idx] = rte_cpu_to_be_16(0xffff >>
1821 } else if (xmeta == MLX5_XMETA_MODE_META32) {
1822 info[idx] = (struct field_modify_info){4, 0,
1826 rte_cpu_to_be_32(0xffffffff >>
1833 case RTE_FLOW_FIELD_POINTER:
1834 case RTE_FLOW_FIELD_VALUE:
1835 if (data->field == RTE_FLOW_FIELD_POINTER)
1836 memcpy(&val, (void *)(uintptr_t)data->value,
1840 for (idx = 0; idx < MLX5_ACT_MAX_MOD_FIELDS; idx++) {
1842 if (dst_width == 48) {
1843 /*special case for MAC addresses */
1844 value[idx] = rte_cpu_to_be_16(val);
1847 } else if (dst_width > 16) {
1848 value[idx] = rte_cpu_to_be_32(val);
1850 } else if (dst_width > 8) {
1851 value[idx] = rte_cpu_to_be_16(val);
1854 value[idx] = (uint8_t)val;
1869 * Convert modify_field action to DV specification.
1872 * Pointer to the rte_eth_dev structure.
1873 * @param[in,out] resource
1874 * Pointer to the modify-header resource.
1876 * Pointer to action specification.
1878 * Attributes of flow that includes this item.
1880 * Pointer to the error structure.
1883 * 0 on success, a negative errno value otherwise and rte_errno is set.
1886 flow_dv_convert_action_modify_field
1887 (struct rte_eth_dev *dev,
1888 struct mlx5_flow_dv_modify_hdr_resource *resource,
1889 const struct rte_flow_action *action,
1890 const struct rte_flow_attr *attr,
1891 struct rte_flow_error *error)
1893 struct mlx5_priv *priv = dev->data->dev_private;
1894 struct mlx5_dev_config *config = &priv->config;
1895 const struct rte_flow_action_modify_field *conf =
1896 (const struct rte_flow_action_modify_field *)(action->conf);
1897 struct rte_flow_item item;
1898 struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1900 struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1902 uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1903 uint32_t value[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1905 uint32_t dst_width = mlx5_flow_item_field_width(config,
1908 if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1909 conf->src.field == RTE_FLOW_FIELD_VALUE) {
1910 type = MLX5_MODIFICATION_TYPE_SET;
1911 /** For SET fill the destination field (field) first. */
1912 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1913 value, conf->width, dst_width, dev, attr, error);
1914 /** Then copy immediate value from source as per mask. */
1915 mlx5_flow_field_id_to_modify_info(&conf->src, dcopy, mask,
1916 value, conf->width, dst_width, dev, attr, error);
1919 type = MLX5_MODIFICATION_TYPE_COPY;
1920 /** For COPY fill the destination field (dcopy) without mask. */
1921 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1922 value, conf->width, dst_width, dev, attr, error);
1923 /** Then construct the source field (field) with mask. */
1924 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1925 value, conf->width, dst_width, dev, attr, error);
1928 return flow_dv_convert_modify_action(&item,
1929 field, dcopy, resource, type, error);
1933 * Validate MARK item.
1936 * Pointer to the rte_eth_dev structure.
1938 * Item specification.
1940 * Attributes of flow that includes this item.
1942 * Pointer to error structure.
1945 * 0 on success, a negative errno value otherwise and rte_errno is set.
1948 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1949 const struct rte_flow_item *item,
1950 const struct rte_flow_attr *attr __rte_unused,
1951 struct rte_flow_error *error)
1953 struct mlx5_priv *priv = dev->data->dev_private;
1954 struct mlx5_dev_config *config = &priv->config;
1955 const struct rte_flow_item_mark *spec = item->spec;
1956 const struct rte_flow_item_mark *mask = item->mask;
1957 const struct rte_flow_item_mark nic_mask = {
1958 .id = priv->sh->dv_mark_mask,
1962 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1963 return rte_flow_error_set(error, ENOTSUP,
1964 RTE_FLOW_ERROR_TYPE_ITEM, item,
1965 "extended metadata feature"
1967 if (!mlx5_flow_ext_mreg_supported(dev))
1968 return rte_flow_error_set(error, ENOTSUP,
1969 RTE_FLOW_ERROR_TYPE_ITEM, item,
1970 "extended metadata register"
1971 " isn't supported");
1973 return rte_flow_error_set(error, ENOTSUP,
1974 RTE_FLOW_ERROR_TYPE_ITEM, item,
1975 "extended metadata register"
1976 " isn't available");
1977 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1981 return rte_flow_error_set(error, EINVAL,
1982 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1984 "data cannot be empty");
1985 if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1986 return rte_flow_error_set(error, EINVAL,
1987 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1989 "mark id exceeds the limit");
1993 return rte_flow_error_set(error, EINVAL,
1994 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1995 "mask cannot be zero");
1997 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1998 (const uint8_t *)&nic_mask,
1999 sizeof(struct rte_flow_item_mark),
2000 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2007 * Validate META item.
2010 * Pointer to the rte_eth_dev structure.
2012 * Item specification.
2014 * Attributes of flow that includes this item.
2016 * Pointer to error structure.
2019 * 0 on success, a negative errno value otherwise and rte_errno is set.
2022 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
2023 const struct rte_flow_item *item,
2024 const struct rte_flow_attr *attr,
2025 struct rte_flow_error *error)
2027 struct mlx5_priv *priv = dev->data->dev_private;
2028 struct mlx5_dev_config *config = &priv->config;
2029 const struct rte_flow_item_meta *spec = item->spec;
2030 const struct rte_flow_item_meta *mask = item->mask;
2031 struct rte_flow_item_meta nic_mask = {
2038 return rte_flow_error_set(error, EINVAL,
2039 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2041 "data cannot be empty");
2042 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2043 if (!mlx5_flow_ext_mreg_supported(dev))
2044 return rte_flow_error_set(error, ENOTSUP,
2045 RTE_FLOW_ERROR_TYPE_ITEM, item,
2046 "extended metadata register"
2047 " isn't supported");
2048 reg = flow_dv_get_metadata_reg(dev, attr, error);
2052 return rte_flow_error_set(error, ENOTSUP,
2053 RTE_FLOW_ERROR_TYPE_ITEM, item,
2054 "unavalable extended metadata register");
2056 return rte_flow_error_set(error, ENOTSUP,
2057 RTE_FLOW_ERROR_TYPE_ITEM, item,
2061 nic_mask.data = priv->sh->dv_meta_mask;
2064 return rte_flow_error_set(error, ENOTSUP,
2065 RTE_FLOW_ERROR_TYPE_ITEM, item,
2066 "extended metadata feature "
2067 "should be enabled when "
2068 "meta item is requested "
2069 "with e-switch mode ");
2071 return rte_flow_error_set(error, ENOTSUP,
2072 RTE_FLOW_ERROR_TYPE_ITEM, item,
2073 "match on metadata for ingress "
2074 "is not supported in legacy "
2078 mask = &rte_flow_item_meta_mask;
2080 return rte_flow_error_set(error, EINVAL,
2081 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2082 "mask cannot be zero");
2084 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2085 (const uint8_t *)&nic_mask,
2086 sizeof(struct rte_flow_item_meta),
2087 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2092 * Validate TAG item.
2095 * Pointer to the rte_eth_dev structure.
2097 * Item specification.
2099 * Attributes of flow that includes this item.
2101 * Pointer to error structure.
2104 * 0 on success, a negative errno value otherwise and rte_errno is set.
2107 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2108 const struct rte_flow_item *item,
2109 const struct rte_flow_attr *attr __rte_unused,
2110 struct rte_flow_error *error)
2112 const struct rte_flow_item_tag *spec = item->spec;
2113 const struct rte_flow_item_tag *mask = item->mask;
2114 const struct rte_flow_item_tag nic_mask = {
2115 .data = RTE_BE32(UINT32_MAX),
2120 if (!mlx5_flow_ext_mreg_supported(dev))
2121 return rte_flow_error_set(error, ENOTSUP,
2122 RTE_FLOW_ERROR_TYPE_ITEM, item,
2123 "extensive metadata register"
2124 " isn't supported");
2126 return rte_flow_error_set(error, EINVAL,
2127 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2129 "data cannot be empty");
2131 mask = &rte_flow_item_tag_mask;
2133 return rte_flow_error_set(error, EINVAL,
2134 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2135 "mask cannot be zero");
2137 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2138 (const uint8_t *)&nic_mask,
2139 sizeof(struct rte_flow_item_tag),
2140 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2143 if (mask->index != 0xff)
2144 return rte_flow_error_set(error, EINVAL,
2145 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2146 "partial mask for tag index"
2147 " is not supported");
2148 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2151 MLX5_ASSERT(ret != REG_NON);
2156 * Validate vport item.
2159 * Pointer to the rte_eth_dev structure.
2161 * Item specification.
2163 * Attributes of flow that includes this item.
2164 * @param[in] item_flags
2165 * Bit-fields that holds the items detected until now.
2167 * Pointer to error structure.
2170 * 0 on success, a negative errno value otherwise and rte_errno is set.
2173 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2174 const struct rte_flow_item *item,
2175 const struct rte_flow_attr *attr,
2176 uint64_t item_flags,
2177 struct rte_flow_error *error)
2179 const struct rte_flow_item_port_id *spec = item->spec;
2180 const struct rte_flow_item_port_id *mask = item->mask;
2181 const struct rte_flow_item_port_id switch_mask = {
2184 struct mlx5_priv *esw_priv;
2185 struct mlx5_priv *dev_priv;
2188 if (!attr->transfer)
2189 return rte_flow_error_set(error, EINVAL,
2190 RTE_FLOW_ERROR_TYPE_ITEM,
2192 "match on port id is valid only"
2193 " when transfer flag is enabled");
2194 if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2195 return rte_flow_error_set(error, ENOTSUP,
2196 RTE_FLOW_ERROR_TYPE_ITEM, item,
2197 "multiple source ports are not"
2200 mask = &switch_mask;
2201 if (mask->id != 0xffffffff)
2202 return rte_flow_error_set(error, ENOTSUP,
2203 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2205 "no support for partial mask on"
2207 ret = mlx5_flow_item_acceptable
2208 (item, (const uint8_t *)mask,
2209 (const uint8_t *)&rte_flow_item_port_id_mask,
2210 sizeof(struct rte_flow_item_port_id),
2211 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2216 esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2218 return rte_flow_error_set(error, rte_errno,
2219 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2220 "failed to obtain E-Switch info for"
2222 dev_priv = mlx5_dev_to_eswitch_info(dev);
2224 return rte_flow_error_set(error, rte_errno,
2225 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2227 "failed to obtain E-Switch info");
2228 if (esw_priv->domain_id != dev_priv->domain_id)
2229 return rte_flow_error_set(error, EINVAL,
2230 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2231 "cannot match on a port from a"
2232 " different E-Switch");
2237 * Validate VLAN item.
2240 * Item specification.
2241 * @param[in] item_flags
2242 * Bit-fields that holds the items detected until now.
2244 * Ethernet device flow is being created on.
2246 * Pointer to error structure.
2249 * 0 on success, a negative errno value otherwise and rte_errno is set.
2252 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2253 uint64_t item_flags,
2254 struct rte_eth_dev *dev,
2255 struct rte_flow_error *error)
2257 const struct rte_flow_item_vlan *mask = item->mask;
2258 const struct rte_flow_item_vlan nic_mask = {
2259 .tci = RTE_BE16(UINT16_MAX),
2260 .inner_type = RTE_BE16(UINT16_MAX),
2263 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2265 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2266 MLX5_FLOW_LAYER_INNER_L4) :
2267 (MLX5_FLOW_LAYER_OUTER_L3 |
2268 MLX5_FLOW_LAYER_OUTER_L4);
2269 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2270 MLX5_FLOW_LAYER_OUTER_VLAN;
2272 if (item_flags & vlanm)
2273 return rte_flow_error_set(error, EINVAL,
2274 RTE_FLOW_ERROR_TYPE_ITEM, item,
2275 "multiple VLAN layers not supported");
2276 else if ((item_flags & l34m) != 0)
2277 return rte_flow_error_set(error, EINVAL,
2278 RTE_FLOW_ERROR_TYPE_ITEM, item,
2279 "VLAN cannot follow L3/L4 layer");
2281 mask = &rte_flow_item_vlan_mask;
2282 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2283 (const uint8_t *)&nic_mask,
2284 sizeof(struct rte_flow_item_vlan),
2285 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2288 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2289 struct mlx5_priv *priv = dev->data->dev_private;
2291 if (priv->vmwa_context) {
2293 * Non-NULL context means we have a virtual machine
2294 * and SR-IOV enabled, we have to create VLAN interface
2295 * to make hypervisor to setup E-Switch vport
2296 * context correctly. We avoid creating the multiple
2297 * VLAN interfaces, so we cannot support VLAN tag mask.
2299 return rte_flow_error_set(error, EINVAL,
2300 RTE_FLOW_ERROR_TYPE_ITEM,
2302 "VLAN tag mask is not"
2303 " supported in virtual"
2311 * GTP flags are contained in 1 byte of the format:
2312 * -------------------------------------------
2313 * | bit | 0 - 2 | 3 | 4 | 5 | 6 | 7 |
2314 * |-----------------------------------------|
2315 * | value | Version | PT | Res | E | S | PN |
2316 * -------------------------------------------
2318 * Matching is supported only for GTP flags E, S, PN.
2320 #define MLX5_GTP_FLAGS_MASK 0x07
2323 * Validate GTP item.
2326 * Pointer to the rte_eth_dev structure.
2328 * Item specification.
2329 * @param[in] item_flags
2330 * Bit-fields that holds the items detected until now.
2332 * Pointer to error structure.
2335 * 0 on success, a negative errno value otherwise and rte_errno is set.
2338 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2339 const struct rte_flow_item *item,
2340 uint64_t item_flags,
2341 struct rte_flow_error *error)
2343 struct mlx5_priv *priv = dev->data->dev_private;
2344 const struct rte_flow_item_gtp *spec = item->spec;
2345 const struct rte_flow_item_gtp *mask = item->mask;
2346 const struct rte_flow_item_gtp nic_mask = {
2347 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2349 .teid = RTE_BE32(0xffffffff),
2352 if (!priv->config.hca_attr.tunnel_stateless_gtp)
2353 return rte_flow_error_set(error, ENOTSUP,
2354 RTE_FLOW_ERROR_TYPE_ITEM, item,
2355 "GTP support is not enabled");
2356 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2357 return rte_flow_error_set(error, ENOTSUP,
2358 RTE_FLOW_ERROR_TYPE_ITEM, item,
2359 "multiple tunnel layers not"
2361 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2362 return rte_flow_error_set(error, EINVAL,
2363 RTE_FLOW_ERROR_TYPE_ITEM, item,
2364 "no outer UDP layer found");
2366 mask = &rte_flow_item_gtp_mask;
2367 if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2368 return rte_flow_error_set(error, ENOTSUP,
2369 RTE_FLOW_ERROR_TYPE_ITEM, item,
2370 "Match is supported for GTP"
2372 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2373 (const uint8_t *)&nic_mask,
2374 sizeof(struct rte_flow_item_gtp),
2375 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2379 * Validate GTP PSC item.
2382 * Item specification.
2383 * @param[in] last_item
2384 * Previous validated item in the pattern items.
2385 * @param[in] gtp_item
2386 * Previous GTP item specification.
2388 * Pointer to flow attributes.
2390 * Pointer to error structure.
2393 * 0 on success, a negative errno value otherwise and rte_errno is set.
2396 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2398 const struct rte_flow_item *gtp_item,
2399 const struct rte_flow_attr *attr,
2400 struct rte_flow_error *error)
2402 const struct rte_flow_item_gtp *gtp_spec;
2403 const struct rte_flow_item_gtp *gtp_mask;
2404 const struct rte_flow_item_gtp_psc *spec;
2405 const struct rte_flow_item_gtp_psc *mask;
2406 const struct rte_flow_item_gtp_psc nic_mask = {
2411 if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2412 return rte_flow_error_set
2413 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2414 "GTP PSC item must be preceded with GTP item");
2415 gtp_spec = gtp_item->spec;
2416 gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2417 /* GTP spec and E flag is requested to match zero. */
2419 (gtp_mask->v_pt_rsv_flags &
2420 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2421 return rte_flow_error_set
2422 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2423 "GTP E flag must be 1 to match GTP PSC");
2424 /* Check the flow is not created in group zero. */
2425 if (!attr->transfer && !attr->group)
2426 return rte_flow_error_set
2427 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2428 "GTP PSC is not supported for group 0");
2429 /* GTP spec is here and E flag is requested to match zero. */
2433 mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2434 if (spec->pdu_type > MLX5_GTP_EXT_MAX_PDU_TYPE)
2435 return rte_flow_error_set
2436 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2437 "PDU type should be smaller than 16");
2438 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2439 (const uint8_t *)&nic_mask,
2440 sizeof(struct rte_flow_item_gtp_psc),
2441 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2445 * Validate IPV4 item.
2446 * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2447 * add specific validation of fragment_offset field,
2450 * Item specification.
2451 * @param[in] item_flags
2452 * Bit-fields that holds the items detected until now.
2454 * Pointer to error structure.
2457 * 0 on success, a negative errno value otherwise and rte_errno is set.
2460 flow_dv_validate_item_ipv4(const struct rte_flow_item *item,
2461 uint64_t item_flags,
2463 uint16_t ether_type,
2464 struct rte_flow_error *error)
2467 const struct rte_flow_item_ipv4 *spec = item->spec;
2468 const struct rte_flow_item_ipv4 *last = item->last;
2469 const struct rte_flow_item_ipv4 *mask = item->mask;
2470 rte_be16_t fragment_offset_spec = 0;
2471 rte_be16_t fragment_offset_last = 0;
2472 const struct rte_flow_item_ipv4 nic_ipv4_mask = {
2474 .src_addr = RTE_BE32(0xffffffff),
2475 .dst_addr = RTE_BE32(0xffffffff),
2476 .type_of_service = 0xff,
2477 .fragment_offset = RTE_BE16(0xffff),
2478 .next_proto_id = 0xff,
2479 .time_to_live = 0xff,
2483 ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2484 ether_type, &nic_ipv4_mask,
2485 MLX5_ITEM_RANGE_ACCEPTED, error);
2489 fragment_offset_spec = spec->hdr.fragment_offset &
2490 mask->hdr.fragment_offset;
2491 if (!fragment_offset_spec)
2494 * spec and mask are valid, enforce using full mask to make sure the
2495 * complete value is used correctly.
2497 if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2498 != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2499 return rte_flow_error_set(error, EINVAL,
2500 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2501 item, "must use full mask for"
2502 " fragment_offset");
2504 * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2505 * indicating this is 1st fragment of fragmented packet.
2506 * This is not yet supported in MLX5, return appropriate error message.
2508 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2509 return rte_flow_error_set(error, ENOTSUP,
2510 RTE_FLOW_ERROR_TYPE_ITEM, item,
2511 "match on first fragment not "
2513 if (fragment_offset_spec && !last)
2514 return rte_flow_error_set(error, ENOTSUP,
2515 RTE_FLOW_ERROR_TYPE_ITEM, item,
2516 "specified value not supported");
2517 /* spec and last are valid, validate the specified range. */
2518 fragment_offset_last = last->hdr.fragment_offset &
2519 mask->hdr.fragment_offset;
2521 * Match on fragment_offset spec 0x2001 and last 0x3fff
2522 * means MF is 1 and frag-offset is > 0.
2523 * This packet is fragment 2nd and onward, excluding last.
2524 * This is not yet supported in MLX5, return appropriate
2527 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2528 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2529 return rte_flow_error_set(error, ENOTSUP,
2530 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2531 last, "match on following "
2532 "fragments not supported");
2534 * Match on fragment_offset spec 0x0001 and last 0x1fff
2535 * means MF is 0 and frag-offset is > 0.
2536 * This packet is last fragment of fragmented packet.
2537 * This is not yet supported in MLX5, return appropriate
2540 if (fragment_offset_spec == RTE_BE16(1) &&
2541 fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2542 return rte_flow_error_set(error, ENOTSUP,
2543 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2544 last, "match on last "
2545 "fragment not supported");
2547 * Match on fragment_offset spec 0x0001 and last 0x3fff
2548 * means MF and/or frag-offset is not 0.
2549 * This is a fragmented packet.
2550 * Other range values are invalid and rejected.
2552 if (!(fragment_offset_spec == RTE_BE16(1) &&
2553 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2554 return rte_flow_error_set(error, ENOTSUP,
2555 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2556 "specified range not supported");
2561 * Validate IPV6 fragment extension item.
2564 * Item specification.
2565 * @param[in] item_flags
2566 * Bit-fields that holds the items detected until now.
2568 * Pointer to error structure.
2571 * 0 on success, a negative errno value otherwise and rte_errno is set.
2574 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2575 uint64_t item_flags,
2576 struct rte_flow_error *error)
2578 const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2579 const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2580 const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2581 rte_be16_t frag_data_spec = 0;
2582 rte_be16_t frag_data_last = 0;
2583 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2584 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2585 MLX5_FLOW_LAYER_OUTER_L4;
2587 struct rte_flow_item_ipv6_frag_ext nic_mask = {
2589 .next_header = 0xff,
2590 .frag_data = RTE_BE16(0xffff),
2594 if (item_flags & l4m)
2595 return rte_flow_error_set(error, EINVAL,
2596 RTE_FLOW_ERROR_TYPE_ITEM, item,
2597 "ipv6 fragment extension item cannot "
2599 if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2600 (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2601 return rte_flow_error_set(error, EINVAL,
2602 RTE_FLOW_ERROR_TYPE_ITEM, item,
2603 "ipv6 fragment extension item must "
2604 "follow ipv6 item");
2606 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2607 if (!frag_data_spec)
2610 * spec and mask are valid, enforce using full mask to make sure the
2611 * complete value is used correctly.
2613 if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2614 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2615 return rte_flow_error_set(error, EINVAL,
2616 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2617 item, "must use full mask for"
2620 * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2621 * This is 1st fragment of fragmented packet.
2623 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2624 return rte_flow_error_set(error, ENOTSUP,
2625 RTE_FLOW_ERROR_TYPE_ITEM, item,
2626 "match on first fragment not "
2628 if (frag_data_spec && !last)
2629 return rte_flow_error_set(error, EINVAL,
2630 RTE_FLOW_ERROR_TYPE_ITEM, item,
2631 "specified value not supported");
2632 ret = mlx5_flow_item_acceptable
2633 (item, (const uint8_t *)mask,
2634 (const uint8_t *)&nic_mask,
2635 sizeof(struct rte_flow_item_ipv6_frag_ext),
2636 MLX5_ITEM_RANGE_ACCEPTED, error);
2639 /* spec and last are valid, validate the specified range. */
2640 frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2642 * Match on frag_data spec 0x0009 and last 0xfff9
2643 * means M is 1 and frag-offset is > 0.
2644 * This packet is fragment 2nd and onward, excluding last.
2645 * This is not yet supported in MLX5, return appropriate
2648 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2649 RTE_IPV6_EHDR_MF_MASK) &&
2650 frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2651 return rte_flow_error_set(error, ENOTSUP,
2652 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2653 last, "match on following "
2654 "fragments not supported");
2656 * Match on frag_data spec 0x0008 and last 0xfff8
2657 * means M is 0 and frag-offset is > 0.
2658 * This packet is last fragment of fragmented packet.
2659 * This is not yet supported in MLX5, return appropriate
2662 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2663 frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2664 return rte_flow_error_set(error, ENOTSUP,
2665 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2666 last, "match on last "
2667 "fragment not supported");
2668 /* Other range values are invalid and rejected. */
2669 return rte_flow_error_set(error, EINVAL,
2670 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2671 "specified range not supported");
2675 * Validate ASO CT item.
2678 * Pointer to the rte_eth_dev structure.
2680 * Item specification.
2681 * @param[in] item_flags
2682 * Pointer to bit-fields that holds the items detected until now.
2684 * Pointer to error structure.
2687 * 0 on success, a negative errno value otherwise and rte_errno is set.
2690 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2691 const struct rte_flow_item *item,
2692 uint64_t *item_flags,
2693 struct rte_flow_error *error)
2695 const struct rte_flow_item_conntrack *spec = item->spec;
2696 const struct rte_flow_item_conntrack *mask = item->mask;
2700 if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2701 return rte_flow_error_set(error, EINVAL,
2702 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2703 "Only one CT is supported");
2705 mask = &rte_flow_item_conntrack_mask;
2706 flags = spec->flags & mask->flags;
2707 if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2708 ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2709 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2710 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2711 return rte_flow_error_set(error, EINVAL,
2712 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2713 "Conflict status bits");
2714 /* State change also needs to be considered. */
2715 *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2720 * Validate the pop VLAN action.
2723 * Pointer to the rte_eth_dev structure.
2724 * @param[in] action_flags
2725 * Holds the actions detected until now.
2727 * Pointer to the pop vlan action.
2728 * @param[in] item_flags
2729 * The items found in this flow rule.
2731 * Pointer to flow attributes.
2733 * Pointer to error structure.
2736 * 0 on success, a negative errno value otherwise and rte_errno is set.
2739 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2740 uint64_t action_flags,
2741 const struct rte_flow_action *action,
2742 uint64_t item_flags,
2743 const struct rte_flow_attr *attr,
2744 struct rte_flow_error *error)
2746 const struct mlx5_priv *priv = dev->data->dev_private;
2750 if (!priv->sh->pop_vlan_action)
2751 return rte_flow_error_set(error, ENOTSUP,
2752 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2754 "pop vlan action is not supported");
2756 return rte_flow_error_set(error, ENOTSUP,
2757 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2759 "pop vlan action not supported for "
2761 if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2762 return rte_flow_error_set(error, ENOTSUP,
2763 RTE_FLOW_ERROR_TYPE_ACTION, action,
2764 "no support for multiple VLAN "
2766 /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2767 if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2768 !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2769 return rte_flow_error_set(error, ENOTSUP,
2770 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2772 "cannot pop vlan after decap without "
2773 "match on inner vlan in the flow");
2774 /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2775 if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2776 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2777 return rte_flow_error_set(error, ENOTSUP,
2778 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2780 "cannot pop vlan without a "
2781 "match on (outer) vlan in the flow");
2782 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2783 return rte_flow_error_set(error, EINVAL,
2784 RTE_FLOW_ERROR_TYPE_ACTION, action,
2785 "wrong action order, port_id should "
2786 "be after pop VLAN action");
2787 if (!attr->transfer && priv->representor)
2788 return rte_flow_error_set(error, ENOTSUP,
2789 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2790 "pop vlan action for VF representor "
2791 "not supported on NIC table");
2796 * Get VLAN default info from vlan match info.
2799 * the list of item specifications.
2801 * pointer VLAN info to fill to.
2804 * 0 on success, a negative errno value otherwise and rte_errno is set.
2807 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2808 struct rte_vlan_hdr *vlan)
2810 const struct rte_flow_item_vlan nic_mask = {
2811 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2812 MLX5DV_FLOW_VLAN_VID_MASK),
2813 .inner_type = RTE_BE16(0xffff),
2818 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2819 int type = items->type;
2821 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2822 type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2825 if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2826 const struct rte_flow_item_vlan *vlan_m = items->mask;
2827 const struct rte_flow_item_vlan *vlan_v = items->spec;
2829 /* If VLAN item in pattern doesn't contain data, return here. */
2834 /* Only full match values are accepted */
2835 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2836 MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2837 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2839 rte_be_to_cpu_16(vlan_v->tci &
2840 MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2842 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2843 MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2844 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2846 rte_be_to_cpu_16(vlan_v->tci &
2847 MLX5DV_FLOW_VLAN_VID_MASK_BE);
2849 if (vlan_m->inner_type == nic_mask.inner_type)
2850 vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2851 vlan_m->inner_type);
2856 * Validate the push VLAN action.
2859 * Pointer to the rte_eth_dev structure.
2860 * @param[in] action_flags
2861 * Holds the actions detected until now.
2862 * @param[in] item_flags
2863 * The items found in this flow rule.
2865 * Pointer to the action structure.
2867 * Pointer to flow attributes
2869 * Pointer to error structure.
2872 * 0 on success, a negative errno value otherwise and rte_errno is set.
2875 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2876 uint64_t action_flags,
2877 const struct rte_flow_item_vlan *vlan_m,
2878 const struct rte_flow_action *action,
2879 const struct rte_flow_attr *attr,
2880 struct rte_flow_error *error)
2882 const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2883 const struct mlx5_priv *priv = dev->data->dev_private;
2885 if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2886 push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2887 return rte_flow_error_set(error, EINVAL,
2888 RTE_FLOW_ERROR_TYPE_ACTION, action,
2889 "invalid vlan ethertype");
2890 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2891 return rte_flow_error_set(error, EINVAL,
2892 RTE_FLOW_ERROR_TYPE_ACTION, action,
2893 "wrong action order, port_id should "
2894 "be after push VLAN");
2895 if (!attr->transfer && priv->representor)
2896 return rte_flow_error_set(error, ENOTSUP,
2897 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2898 "push vlan action for VF representor "
2899 "not supported on NIC table");
2901 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2902 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2903 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2904 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2905 !(mlx5_flow_find_action
2906 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2907 return rte_flow_error_set(error, EINVAL,
2908 RTE_FLOW_ERROR_TYPE_ACTION, action,
2909 "not full match mask on VLAN PCP and "
2910 "there is no of_set_vlan_pcp action, "
2911 "push VLAN action cannot figure out "
2914 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2915 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2916 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2917 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2918 !(mlx5_flow_find_action
2919 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2920 return rte_flow_error_set(error, EINVAL,
2921 RTE_FLOW_ERROR_TYPE_ACTION, action,
2922 "not full match mask on VLAN VID and "
2923 "there is no of_set_vlan_vid action, "
2924 "push VLAN action cannot figure out "
2931 * Validate the set VLAN PCP.
2933 * @param[in] action_flags
2934 * Holds the actions detected until now.
2935 * @param[in] actions
2936 * Pointer to the list of actions remaining in the flow rule.
2938 * Pointer to error structure.
2941 * 0 on success, a negative errno value otherwise and rte_errno is set.
2944 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2945 const struct rte_flow_action actions[],
2946 struct rte_flow_error *error)
2948 const struct rte_flow_action *action = actions;
2949 const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2951 if (conf->vlan_pcp > 7)
2952 return rte_flow_error_set(error, EINVAL,
2953 RTE_FLOW_ERROR_TYPE_ACTION, action,
2954 "VLAN PCP value is too big");
2955 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2956 return rte_flow_error_set(error, ENOTSUP,
2957 RTE_FLOW_ERROR_TYPE_ACTION, action,
2958 "set VLAN PCP action must follow "
2959 "the push VLAN action");
2960 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2961 return rte_flow_error_set(error, ENOTSUP,
2962 RTE_FLOW_ERROR_TYPE_ACTION, action,
2963 "Multiple VLAN PCP modification are "
2965 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2966 return rte_flow_error_set(error, EINVAL,
2967 RTE_FLOW_ERROR_TYPE_ACTION, action,
2968 "wrong action order, port_id should "
2969 "be after set VLAN PCP");
2974 * Validate the set VLAN VID.
2976 * @param[in] item_flags
2977 * Holds the items detected in this rule.
2978 * @param[in] action_flags
2979 * Holds the actions detected until now.
2980 * @param[in] actions
2981 * Pointer to the list of actions remaining in the flow rule.
2983 * Pointer to error structure.
2986 * 0 on success, a negative errno value otherwise and rte_errno is set.
2989 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
2990 uint64_t action_flags,
2991 const struct rte_flow_action actions[],
2992 struct rte_flow_error *error)
2994 const struct rte_flow_action *action = actions;
2995 const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
2997 if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
2998 return rte_flow_error_set(error, EINVAL,
2999 RTE_FLOW_ERROR_TYPE_ACTION, action,
3000 "VLAN VID value is too big");
3001 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3002 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3003 return rte_flow_error_set(error, ENOTSUP,
3004 RTE_FLOW_ERROR_TYPE_ACTION, action,
3005 "set VLAN VID action must follow push"
3006 " VLAN action or match on VLAN item");
3007 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3008 return rte_flow_error_set(error, ENOTSUP,
3009 RTE_FLOW_ERROR_TYPE_ACTION, action,
3010 "Multiple VLAN VID modifications are "
3012 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3013 return rte_flow_error_set(error, EINVAL,
3014 RTE_FLOW_ERROR_TYPE_ACTION, action,
3015 "wrong action order, port_id should "
3016 "be after set VLAN VID");
3021 * Validate the FLAG action.
3024 * Pointer to the rte_eth_dev structure.
3025 * @param[in] action_flags
3026 * Holds the actions detected until now.
3028 * Pointer to flow attributes
3030 * Pointer to error structure.
3033 * 0 on success, a negative errno value otherwise and rte_errno is set.
3036 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3037 uint64_t action_flags,
3038 const struct rte_flow_attr *attr,
3039 struct rte_flow_error *error)
3041 struct mlx5_priv *priv = dev->data->dev_private;
3042 struct mlx5_dev_config *config = &priv->config;
3045 /* Fall back if no extended metadata register support. */
3046 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3047 return mlx5_flow_validate_action_flag(action_flags, attr,
3049 /* Extensive metadata mode requires registers. */
3050 if (!mlx5_flow_ext_mreg_supported(dev))
3051 return rte_flow_error_set(error, ENOTSUP,
3052 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3053 "no metadata registers "
3054 "to support flag action");
3055 if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3056 return rte_flow_error_set(error, ENOTSUP,
3057 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3058 "extended metadata register"
3059 " isn't available");
3060 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3063 MLX5_ASSERT(ret > 0);
3064 if (action_flags & MLX5_FLOW_ACTION_MARK)
3065 return rte_flow_error_set(error, EINVAL,
3066 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3067 "can't mark and flag in same flow");
3068 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3069 return rte_flow_error_set(error, EINVAL,
3070 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3072 " actions in same flow");
3077 * Validate MARK action.
3080 * Pointer to the rte_eth_dev structure.
3082 * Pointer to action.
3083 * @param[in] action_flags
3084 * Holds the actions detected until now.
3086 * Pointer to flow attributes
3088 * Pointer to error structure.
3091 * 0 on success, a negative errno value otherwise and rte_errno is set.
3094 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3095 const struct rte_flow_action *action,
3096 uint64_t action_flags,
3097 const struct rte_flow_attr *attr,
3098 struct rte_flow_error *error)
3100 struct mlx5_priv *priv = dev->data->dev_private;
3101 struct mlx5_dev_config *config = &priv->config;
3102 const struct rte_flow_action_mark *mark = action->conf;
3105 if (is_tunnel_offload_active(dev))
3106 return rte_flow_error_set(error, ENOTSUP,
3107 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3109 "if tunnel offload active");
3110 /* Fall back if no extended metadata register support. */
3111 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3112 return mlx5_flow_validate_action_mark(action, action_flags,
3114 /* Extensive metadata mode requires registers. */
3115 if (!mlx5_flow_ext_mreg_supported(dev))
3116 return rte_flow_error_set(error, ENOTSUP,
3117 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3118 "no metadata registers "
3119 "to support mark action");
3120 if (!priv->sh->dv_mark_mask)
3121 return rte_flow_error_set(error, ENOTSUP,
3122 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3123 "extended metadata register"
3124 " isn't available");
3125 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3128 MLX5_ASSERT(ret > 0);
3130 return rte_flow_error_set(error, EINVAL,
3131 RTE_FLOW_ERROR_TYPE_ACTION, action,
3132 "configuration cannot be null");
3133 if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3134 return rte_flow_error_set(error, EINVAL,
3135 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3137 "mark id exceeds the limit");
3138 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3139 return rte_flow_error_set(error, EINVAL,
3140 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3141 "can't flag and mark in same flow");
3142 if (action_flags & MLX5_FLOW_ACTION_MARK)
3143 return rte_flow_error_set(error, EINVAL,
3144 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3145 "can't have 2 mark actions in same"
3151 * Validate SET_META action.
3154 * Pointer to the rte_eth_dev structure.
3156 * Pointer to the action structure.
3157 * @param[in] action_flags
3158 * Holds the actions detected until now.
3160 * Pointer to flow attributes
3162 * Pointer to error structure.
3165 * 0 on success, a negative errno value otherwise and rte_errno is set.
3168 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3169 const struct rte_flow_action *action,
3170 uint64_t action_flags __rte_unused,
3171 const struct rte_flow_attr *attr,
3172 struct rte_flow_error *error)
3174 const struct rte_flow_action_set_meta *conf;
3175 uint32_t nic_mask = UINT32_MAX;
3178 if (!mlx5_flow_ext_mreg_supported(dev))
3179 return rte_flow_error_set(error, ENOTSUP,
3180 RTE_FLOW_ERROR_TYPE_ACTION, action,
3181 "extended metadata register"
3182 " isn't supported");
3183 reg = flow_dv_get_metadata_reg(dev, attr, error);
3187 return rte_flow_error_set(error, ENOTSUP,
3188 RTE_FLOW_ERROR_TYPE_ACTION, action,
3189 "unavalable extended metadata register");
3190 if (reg != REG_A && reg != REG_B) {
3191 struct mlx5_priv *priv = dev->data->dev_private;
3193 nic_mask = priv->sh->dv_meta_mask;
3195 if (!(action->conf))
3196 return rte_flow_error_set(error, EINVAL,
3197 RTE_FLOW_ERROR_TYPE_ACTION, action,
3198 "configuration cannot be null");
3199 conf = (const struct rte_flow_action_set_meta *)action->conf;
3201 return rte_flow_error_set(error, EINVAL,
3202 RTE_FLOW_ERROR_TYPE_ACTION, action,
3203 "zero mask doesn't have any effect");
3204 if (conf->mask & ~nic_mask)
3205 return rte_flow_error_set(error, EINVAL,
3206 RTE_FLOW_ERROR_TYPE_ACTION, action,
3207 "meta data must be within reg C0");
3212 * Validate SET_TAG action.
3215 * Pointer to the rte_eth_dev structure.
3217 * Pointer to the action structure.
3218 * @param[in] action_flags
3219 * Holds the actions detected until now.
3221 * Pointer to flow attributes
3223 * Pointer to error structure.
3226 * 0 on success, a negative errno value otherwise and rte_errno is set.
3229 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3230 const struct rte_flow_action *action,
3231 uint64_t action_flags,
3232 const struct rte_flow_attr *attr,
3233 struct rte_flow_error *error)
3235 const struct rte_flow_action_set_tag *conf;
3236 const uint64_t terminal_action_flags =
3237 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3238 MLX5_FLOW_ACTION_RSS;
3241 if (!mlx5_flow_ext_mreg_supported(dev))
3242 return rte_flow_error_set(error, ENOTSUP,
3243 RTE_FLOW_ERROR_TYPE_ACTION, action,
3244 "extensive metadata register"
3245 " isn't supported");
3246 if (!(action->conf))
3247 return rte_flow_error_set(error, EINVAL,
3248 RTE_FLOW_ERROR_TYPE_ACTION, action,
3249 "configuration cannot be null");
3250 conf = (const struct rte_flow_action_set_tag *)action->conf;
3252 return rte_flow_error_set(error, EINVAL,
3253 RTE_FLOW_ERROR_TYPE_ACTION, action,
3254 "zero mask doesn't have any effect");
3255 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3258 if (!attr->transfer && attr->ingress &&
3259 (action_flags & terminal_action_flags))
3260 return rte_flow_error_set(error, EINVAL,
3261 RTE_FLOW_ERROR_TYPE_ACTION, action,
3262 "set_tag has no effect"
3263 " with terminal actions");
3268 * Check if action counter is shared by either old or new mechanism.
3271 * Pointer to the action structure.
3274 * True when counter is shared, false otherwise.
3277 is_shared_action_count(const struct rte_flow_action *action)
3279 const struct rte_flow_action_count *count =
3280 (const struct rte_flow_action_count *)action->conf;
3282 if ((int)action->type == MLX5_RTE_FLOW_ACTION_TYPE_COUNT)
3284 return !!(count && count->shared);
3288 * Validate count action.
3291 * Pointer to rte_eth_dev structure.
3293 * Indicator if action is shared.
3294 * @param[in] action_flags
3295 * Holds the actions detected until now.
3297 * Pointer to error structure.
3300 * 0 on success, a negative errno value otherwise and rte_errno is set.
3303 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3304 uint64_t action_flags,
3305 struct rte_flow_error *error)
3307 struct mlx5_priv *priv = dev->data->dev_private;
3309 if (!priv->config.devx)
3311 if (action_flags & MLX5_FLOW_ACTION_COUNT)
3312 return rte_flow_error_set(error, EINVAL,
3313 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3314 "duplicate count actions set");
3315 if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3316 !priv->sh->flow_hit_aso_en)
3317 return rte_flow_error_set(error, EINVAL,
3318 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3319 "old age and shared count combination is not supported");
3320 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3324 return rte_flow_error_set
3326 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3328 "count action not supported");
3332 * Validate the L2 encap action.
3335 * Pointer to the rte_eth_dev structure.
3336 * @param[in] action_flags
3337 * Holds the actions detected until now.
3339 * Pointer to the action structure.
3341 * Pointer to flow attributes.
3343 * Pointer to error structure.
3346 * 0 on success, a negative errno value otherwise and rte_errno is set.
3349 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3350 uint64_t action_flags,
3351 const struct rte_flow_action *action,
3352 const struct rte_flow_attr *attr,
3353 struct rte_flow_error *error)
3355 const struct mlx5_priv *priv = dev->data->dev_private;
3357 if (!(action->conf))
3358 return rte_flow_error_set(error, EINVAL,
3359 RTE_FLOW_ERROR_TYPE_ACTION, action,
3360 "configuration cannot be null");
3361 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3362 return rte_flow_error_set(error, EINVAL,
3363 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3364 "can only have a single encap action "
3366 if (!attr->transfer && priv->representor)
3367 return rte_flow_error_set(error, ENOTSUP,
3368 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3369 "encap action for VF representor "
3370 "not supported on NIC table");
3375 * Validate a decap action.
3378 * Pointer to the rte_eth_dev structure.
3379 * @param[in] action_flags
3380 * Holds the actions detected until now.
3382 * Pointer to the action structure.
3383 * @param[in] item_flags
3384 * Holds the items detected.
3386 * Pointer to flow attributes
3388 * Pointer to error structure.
3391 * 0 on success, a negative errno value otherwise and rte_errno is set.
3394 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3395 uint64_t action_flags,
3396 const struct rte_flow_action *action,
3397 const uint64_t item_flags,
3398 const struct rte_flow_attr *attr,
3399 struct rte_flow_error *error)
3401 const struct mlx5_priv *priv = dev->data->dev_private;
3403 if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3404 !priv->config.decap_en)
3405 return rte_flow_error_set(error, ENOTSUP,
3406 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3407 "decap is not enabled");
3408 if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3409 return rte_flow_error_set(error, ENOTSUP,
3410 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3412 MLX5_FLOW_ACTION_DECAP ? "can only "
3413 "have a single decap action" : "decap "
3414 "after encap is not supported");
3415 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3416 return rte_flow_error_set(error, EINVAL,
3417 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3418 "can't have decap action after"
3421 return rte_flow_error_set(error, ENOTSUP,
3422 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3424 "decap action not supported for "
3426 if (!attr->transfer && priv->representor)
3427 return rte_flow_error_set(error, ENOTSUP,
3428 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3429 "decap action for VF representor "
3430 "not supported on NIC table");
3431 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3432 !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3433 return rte_flow_error_set(error, ENOTSUP,
3434 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3435 "VXLAN item should be present for VXLAN decap");
3439 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3442 * Validate the raw encap and decap actions.
3445 * Pointer to the rte_eth_dev structure.
3447 * Pointer to the decap action.
3449 * Pointer to the encap action.
3451 * Pointer to flow attributes
3452 * @param[in/out] action_flags
3453 * Holds the actions detected until now.
3454 * @param[out] actions_n
3455 * pointer to the number of actions counter.
3457 * Pointer to the action structure.
3458 * @param[in] item_flags
3459 * Holds the items detected.
3461 * Pointer to error structure.
3464 * 0 on success, a negative errno value otherwise and rte_errno is set.
3467 flow_dv_validate_action_raw_encap_decap
3468 (struct rte_eth_dev *dev,
3469 const struct rte_flow_action_raw_decap *decap,
3470 const struct rte_flow_action_raw_encap *encap,
3471 const struct rte_flow_attr *attr, uint64_t *action_flags,
3472 int *actions_n, const struct rte_flow_action *action,
3473 uint64_t item_flags, struct rte_flow_error *error)
3475 const struct mlx5_priv *priv = dev->data->dev_private;
3478 if (encap && (!encap->size || !encap->data))
3479 return rte_flow_error_set(error, EINVAL,
3480 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3481 "raw encap data cannot be empty");
3482 if (decap && encap) {
3483 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3484 encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3487 else if (encap->size <=
3488 MLX5_ENCAPSULATION_DECISION_SIZE &&
3490 MLX5_ENCAPSULATION_DECISION_SIZE)
3493 else if (encap->size >
3494 MLX5_ENCAPSULATION_DECISION_SIZE &&
3496 MLX5_ENCAPSULATION_DECISION_SIZE)
3497 /* 2 L2 actions: encap and decap. */
3500 return rte_flow_error_set(error,
3502 RTE_FLOW_ERROR_TYPE_ACTION,
3503 NULL, "unsupported too small "
3504 "raw decap and too small raw "
3505 "encap combination");
3508 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3509 item_flags, attr, error);
3512 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3516 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3517 return rte_flow_error_set(error, ENOTSUP,
3518 RTE_FLOW_ERROR_TYPE_ACTION,
3520 "small raw encap size");
3521 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3522 return rte_flow_error_set(error, EINVAL,
3523 RTE_FLOW_ERROR_TYPE_ACTION,
3525 "more than one encap action");
3526 if (!attr->transfer && priv->representor)
3527 return rte_flow_error_set
3529 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3530 "encap action for VF representor "
3531 "not supported on NIC table");
3532 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3539 * Validate the ASO CT action.
3542 * Pointer to the rte_eth_dev structure.
3543 * @param[in] action_flags
3544 * Holds the actions detected until now.
3545 * @param[in] item_flags
3546 * The items found in this flow rule.
3548 * Pointer to flow attributes.
3550 * Pointer to error structure.
3553 * 0 on success, a negative errno value otherwise and rte_errno is set.
3556 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3557 uint64_t action_flags,
3558 uint64_t item_flags,
3559 const struct rte_flow_attr *attr,
3560 struct rte_flow_error *error)
3564 if (attr->group == 0 && !attr->transfer)
3565 return rte_flow_error_set(error, ENOTSUP,
3566 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3568 "Only support non-root table");
3569 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3570 return rte_flow_error_set(error, ENOTSUP,
3571 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3572 "CT cannot follow a fate action");
3573 if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3574 (action_flags & MLX5_FLOW_ACTION_AGE))
3575 return rte_flow_error_set(error, EINVAL,
3576 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3577 "Only one ASO action is supported");
3578 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3579 return rte_flow_error_set(error, EINVAL,
3580 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3581 "Encap cannot exist before CT");
3582 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3583 return rte_flow_error_set(error, EINVAL,
3584 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3585 "Not a outer TCP packet");
3590 * Match encap_decap resource.
3593 * Pointer to the hash list.
3595 * Pointer to exist resource entry object.
3597 * Key of the new entry.
3599 * Pointer to new encap_decap resource.
3602 * 0 on matching, none-zero otherwise.
3605 flow_dv_encap_decap_match_cb(struct mlx5_hlist *list __rte_unused,
3606 struct mlx5_hlist_entry *entry,
3607 uint64_t key __rte_unused, void *cb_ctx)
3609 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3610 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3611 struct mlx5_flow_dv_encap_decap_resource *resource;
3613 resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3615 if (resource->reformat_type == ctx_resource->reformat_type &&
3616 resource->ft_type == ctx_resource->ft_type &&
3617 resource->flags == ctx_resource->flags &&
3618 resource->size == ctx_resource->size &&
3619 !memcmp((const void *)resource->buf,
3620 (const void *)ctx_resource->buf,
3627 * Allocate encap_decap resource.
3630 * Pointer to the hash list.
3632 * Pointer to exist resource entry object.
3634 * Pointer to new encap_decap resource.
3637 * 0 on matching, none-zero otherwise.
3639 struct mlx5_hlist_entry *
3640 flow_dv_encap_decap_create_cb(struct mlx5_hlist *list,
3641 uint64_t key __rte_unused,
3644 struct mlx5_dev_ctx_shared *sh = list->ctx;
3645 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3646 struct mlx5dv_dr_domain *domain;
3647 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3648 struct mlx5_flow_dv_encap_decap_resource *resource;
3652 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3653 domain = sh->fdb_domain;
3654 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3655 domain = sh->rx_domain;
3657 domain = sh->tx_domain;
3658 /* Register new encap/decap resource. */
3659 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3661 rte_flow_error_set(ctx->error, ENOMEM,
3662 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3663 "cannot allocate resource memory");
3666 *resource = *ctx_resource;
3667 resource->idx = idx;
3668 ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->ctx, domain,
3672 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3673 rte_flow_error_set(ctx->error, ENOMEM,
3674 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3675 NULL, "cannot create action");
3679 return &resource->entry;
3683 * Find existing encap/decap resource or create and register a new one.
3685 * @param[in, out] dev
3686 * Pointer to rte_eth_dev structure.
3687 * @param[in, out] resource
3688 * Pointer to encap/decap resource.
3689 * @parm[in, out] dev_flow
3690 * Pointer to the dev_flow.
3692 * pointer to error structure.
3695 * 0 on success otherwise -errno and errno is set.
3698 flow_dv_encap_decap_resource_register
3699 (struct rte_eth_dev *dev,
3700 struct mlx5_flow_dv_encap_decap_resource *resource,
3701 struct mlx5_flow *dev_flow,
3702 struct rte_flow_error *error)
3704 struct mlx5_priv *priv = dev->data->dev_private;
3705 struct mlx5_dev_ctx_shared *sh = priv->sh;
3706 struct mlx5_hlist_entry *entry;
3710 uint32_t refmt_type:8;
3712 * Header reformat actions can be shared between
3713 * non-root tables. One bit to indicate non-root
3717 uint32_t reserve:15;
3720 } encap_decap_key = {
3722 .ft_type = resource->ft_type,
3723 .refmt_type = resource->reformat_type,
3724 .is_root = !!dev_flow->dv.group,
3728 struct mlx5_flow_cb_ctx ctx = {
3734 resource->flags = dev_flow->dv.group ? 0 : 1;
3735 key64 = __rte_raw_cksum(&encap_decap_key.v32,
3736 sizeof(encap_decap_key.v32), 0);
3737 if (resource->reformat_type !=
3738 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3740 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3741 entry = mlx5_hlist_register(sh->encaps_decaps, key64, &ctx);
3744 resource = container_of(entry, typeof(*resource), entry);
3745 dev_flow->dv.encap_decap = resource;
3746 dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3751 * Find existing table jump resource or create and register a new one.
3753 * @param[in, out] dev
3754 * Pointer to rte_eth_dev structure.
3755 * @param[in, out] tbl
3756 * Pointer to flow table resource.
3757 * @parm[in, out] dev_flow
3758 * Pointer to the dev_flow.
3760 * pointer to error structure.
3763 * 0 on success otherwise -errno and errno is set.
3766 flow_dv_jump_tbl_resource_register
3767 (struct rte_eth_dev *dev __rte_unused,
3768 struct mlx5_flow_tbl_resource *tbl,
3769 struct mlx5_flow *dev_flow,
3770 struct rte_flow_error *error __rte_unused)
3772 struct mlx5_flow_tbl_data_entry *tbl_data =
3773 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3776 MLX5_ASSERT(tbl_data->jump.action);
3777 dev_flow->handle->rix_jump = tbl_data->idx;
3778 dev_flow->dv.jump = &tbl_data->jump;
3783 flow_dv_port_id_match_cb(struct mlx5_list *list __rte_unused,
3784 struct mlx5_list_entry *entry, void *cb_ctx)
3786 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3787 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3788 struct mlx5_flow_dv_port_id_action_resource *res =
3789 container_of(entry, typeof(*res), entry);
3791 return ref->port_id != res->port_id;
3794 struct mlx5_list_entry *
3795 flow_dv_port_id_create_cb(struct mlx5_list *list,
3796 struct mlx5_list_entry *entry __rte_unused,
3799 struct mlx5_dev_ctx_shared *sh = list->ctx;
3800 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3801 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3802 struct mlx5_flow_dv_port_id_action_resource *resource;
3806 /* Register new port id action resource. */
3807 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3809 rte_flow_error_set(ctx->error, ENOMEM,
3810 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3811 "cannot allocate port_id action memory");
3815 ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3819 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3820 rte_flow_error_set(ctx->error, ENOMEM,
3821 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3822 "cannot create action");
3825 resource->idx = idx;
3826 return &resource->entry;
3829 struct mlx5_list_entry *
3830 flow_dv_port_id_clone_cb(struct mlx5_list *list,
3831 struct mlx5_list_entry *entry __rte_unused,
3834 struct mlx5_dev_ctx_shared *sh = list->ctx;
3835 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3836 struct mlx5_flow_dv_port_id_action_resource *resource;
3839 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3841 rte_flow_error_set(ctx->error, ENOMEM,
3842 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3843 "cannot allocate port_id action memory");
3846 memcpy(resource, entry, sizeof(*resource));
3847 resource->idx = idx;
3848 return &resource->entry;
3852 flow_dv_port_id_clone_free_cb(struct mlx5_list *list,
3853 struct mlx5_list_entry *entry)
3855 struct mlx5_dev_ctx_shared *sh = list->ctx;
3856 struct mlx5_flow_dv_port_id_action_resource *resource =
3857 container_of(entry, typeof(*resource), entry);
3859 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3863 * Find existing table port ID resource or create and register a new one.
3865 * @param[in, out] dev
3866 * Pointer to rte_eth_dev structure.
3867 * @param[in, out] ref
3868 * Pointer to port ID action resource reference.
3869 * @parm[in, out] dev_flow
3870 * Pointer to the dev_flow.
3872 * pointer to error structure.
3875 * 0 on success otherwise -errno and errno is set.
3878 flow_dv_port_id_action_resource_register
3879 (struct rte_eth_dev *dev,
3880 struct mlx5_flow_dv_port_id_action_resource *ref,
3881 struct mlx5_flow *dev_flow,
3882 struct rte_flow_error *error)
3884 struct mlx5_priv *priv = dev->data->dev_private;
3885 struct mlx5_list_entry *entry;
3886 struct mlx5_flow_dv_port_id_action_resource *resource;
3887 struct mlx5_flow_cb_ctx ctx = {
3892 entry = mlx5_list_register(&priv->sh->port_id_action_list, &ctx);
3895 resource = container_of(entry, typeof(*resource), entry);
3896 dev_flow->dv.port_id_action = resource;
3897 dev_flow->handle->rix_port_id_action = resource->idx;
3902 flow_dv_push_vlan_match_cb(struct mlx5_list *list __rte_unused,
3903 struct mlx5_list_entry *entry, void *cb_ctx)
3905 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3906 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3907 struct mlx5_flow_dv_push_vlan_action_resource *res =
3908 container_of(entry, typeof(*res), entry);
3910 return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3913 struct mlx5_list_entry *
3914 flow_dv_push_vlan_create_cb(struct mlx5_list *list,
3915 struct mlx5_list_entry *entry __rte_unused,
3918 struct mlx5_dev_ctx_shared *sh = list->ctx;
3919 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3920 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3921 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3922 struct mlx5dv_dr_domain *domain;
3926 /* Register new port id action resource. */
3927 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3929 rte_flow_error_set(ctx->error, ENOMEM,
3930 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3931 "cannot allocate push_vlan action memory");
3935 if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3936 domain = sh->fdb_domain;
3937 else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3938 domain = sh->rx_domain;
3940 domain = sh->tx_domain;
3941 ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3944 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3945 rte_flow_error_set(ctx->error, ENOMEM,
3946 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3947 "cannot create push vlan action");
3950 resource->idx = idx;
3951 return &resource->entry;
3954 struct mlx5_list_entry *
3955 flow_dv_push_vlan_clone_cb(struct mlx5_list *list,
3956 struct mlx5_list_entry *entry __rte_unused,
3959 struct mlx5_dev_ctx_shared *sh = list->ctx;
3960 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3961 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3964 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3966 rte_flow_error_set(ctx->error, ENOMEM,
3967 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3968 "cannot allocate push_vlan action memory");
3971 memcpy(resource, entry, sizeof(*resource));
3972 resource->idx = idx;
3973 return &resource->entry;
3977 flow_dv_push_vlan_clone_free_cb(struct mlx5_list *list,
3978 struct mlx5_list_entry *entry)
3980 struct mlx5_dev_ctx_shared *sh = list->ctx;
3981 struct mlx5_flow_dv_push_vlan_action_resource *resource =
3982 container_of(entry, typeof(*resource), entry);
3984 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
3988 * Find existing push vlan resource or create and register a new one.
3990 * @param [in, out] dev
3991 * Pointer to rte_eth_dev structure.
3992 * @param[in, out] ref
3993 * Pointer to port ID action resource reference.
3994 * @parm[in, out] dev_flow
3995 * Pointer to the dev_flow.
3997 * pointer to error structure.
4000 * 0 on success otherwise -errno and errno is set.
4003 flow_dv_push_vlan_action_resource_register
4004 (struct rte_eth_dev *dev,
4005 struct mlx5_flow_dv_push_vlan_action_resource *ref,
4006 struct mlx5_flow *dev_flow,
4007 struct rte_flow_error *error)
4009 struct mlx5_priv *priv = dev->data->dev_private;
4010 struct mlx5_flow_dv_push_vlan_action_resource *resource;
4011 struct mlx5_list_entry *entry;
4012 struct mlx5_flow_cb_ctx ctx = {
4017 entry = mlx5_list_register(&priv->sh->push_vlan_action_list, &ctx);
4020 resource = container_of(entry, typeof(*resource), entry);
4022 dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4023 dev_flow->dv.push_vlan_res = resource;
4028 * Get the size of specific rte_flow_item_type hdr size
4030 * @param[in] item_type
4031 * Tested rte_flow_item_type.
4034 * sizeof struct item_type, 0 if void or irrelevant.
4037 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4041 switch (item_type) {
4042 case RTE_FLOW_ITEM_TYPE_ETH:
4043 retval = sizeof(struct rte_ether_hdr);
4045 case RTE_FLOW_ITEM_TYPE_VLAN:
4046 retval = sizeof(struct rte_vlan_hdr);
4048 case RTE_FLOW_ITEM_TYPE_IPV4:
4049 retval = sizeof(struct rte_ipv4_hdr);
4051 case RTE_FLOW_ITEM_TYPE_IPV6:
4052 retval = sizeof(struct rte_ipv6_hdr);
4054 case RTE_FLOW_ITEM_TYPE_UDP:
4055 retval = sizeof(struct rte_udp_hdr);
4057 case RTE_FLOW_ITEM_TYPE_TCP:
4058 retval = sizeof(struct rte_tcp_hdr);
4060 case RTE_FLOW_ITEM_TYPE_VXLAN:
4061 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4062 retval = sizeof(struct rte_vxlan_hdr);
4064 case RTE_FLOW_ITEM_TYPE_GRE:
4065 case RTE_FLOW_ITEM_TYPE_NVGRE:
4066 retval = sizeof(struct rte_gre_hdr);
4068 case RTE_FLOW_ITEM_TYPE_MPLS:
4069 retval = sizeof(struct rte_mpls_hdr);
4071 case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4079 #define MLX5_ENCAP_IPV4_VERSION 0x40
4080 #define MLX5_ENCAP_IPV4_IHL_MIN 0x05
4081 #define MLX5_ENCAP_IPV4_TTL_DEF 0x40
4082 #define MLX5_ENCAP_IPV6_VTC_FLOW 0x60000000
4083 #define MLX5_ENCAP_IPV6_HOP_LIMIT 0xff
4084 #define MLX5_ENCAP_VXLAN_FLAGS 0x08000000
4085 #define MLX5_ENCAP_VXLAN_GPE_FLAGS 0x04
4088 * Convert the encap action data from list of rte_flow_item to raw buffer
4091 * Pointer to rte_flow_item objects list.
4093 * Pointer to the output buffer.
4095 * Pointer to the output buffer size.
4097 * Pointer to the error structure.
4100 * 0 on success, a negative errno value otherwise and rte_errno is set.
4103 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4104 size_t *size, struct rte_flow_error *error)
4106 struct rte_ether_hdr *eth = NULL;
4107 struct rte_vlan_hdr *vlan = NULL;
4108 struct rte_ipv4_hdr *ipv4 = NULL;
4109 struct rte_ipv6_hdr *ipv6 = NULL;
4110 struct rte_udp_hdr *udp = NULL;
4111 struct rte_vxlan_hdr *vxlan = NULL;
4112 struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4113 struct rte_gre_hdr *gre = NULL;
4115 size_t temp_size = 0;
4118 return rte_flow_error_set(error, EINVAL,
4119 RTE_FLOW_ERROR_TYPE_ACTION,
4120 NULL, "invalid empty data");
4121 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4122 len = flow_dv_get_item_hdr_len(items->type);
4123 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4124 return rte_flow_error_set(error, EINVAL,
4125 RTE_FLOW_ERROR_TYPE_ACTION,
4126 (void *)items->type,
4127 "items total size is too big"
4128 " for encap action");
4129 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4130 switch (items->type) {
4131 case RTE_FLOW_ITEM_TYPE_ETH:
4132 eth = (struct rte_ether_hdr *)&buf[temp_size];
4134 case RTE_FLOW_ITEM_TYPE_VLAN:
4135 vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4137 return rte_flow_error_set(error, EINVAL,
4138 RTE_FLOW_ERROR_TYPE_ACTION,
4139 (void *)items->type,
4140 "eth header not found");
4141 if (!eth->ether_type)
4142 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4144 case RTE_FLOW_ITEM_TYPE_IPV4:
4145 ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4147 return rte_flow_error_set(error, EINVAL,
4148 RTE_FLOW_ERROR_TYPE_ACTION,
4149 (void *)items->type,
4150 "neither eth nor vlan"
4152 if (vlan && !vlan->eth_proto)
4153 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4154 else if (eth && !eth->ether_type)
4155 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4156 if (!ipv4->version_ihl)
4157 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4158 MLX5_ENCAP_IPV4_IHL_MIN;
4159 if (!ipv4->time_to_live)
4160 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4162 case RTE_FLOW_ITEM_TYPE_IPV6:
4163 ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4165 return rte_flow_error_set(error, EINVAL,
4166 RTE_FLOW_ERROR_TYPE_ACTION,
4167 (void *)items->type,
4168 "neither eth nor vlan"
4170 if (vlan && !vlan->eth_proto)
4171 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4172 else if (eth && !eth->ether_type)
4173 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4174 if (!ipv6->vtc_flow)
4176 RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4177 if (!ipv6->hop_limits)
4178 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4180 case RTE_FLOW_ITEM_TYPE_UDP:
4181 udp = (struct rte_udp_hdr *)&buf[temp_size];
4183 return rte_flow_error_set(error, EINVAL,
4184 RTE_FLOW_ERROR_TYPE_ACTION,
4185 (void *)items->type,
4186 "ip header not found");
4187 if (ipv4 && !ipv4->next_proto_id)
4188 ipv4->next_proto_id = IPPROTO_UDP;
4189 else if (ipv6 && !ipv6->proto)
4190 ipv6->proto = IPPROTO_UDP;
4192 case RTE_FLOW_ITEM_TYPE_VXLAN:
4193 vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4195 return rte_flow_error_set(error, EINVAL,
4196 RTE_FLOW_ERROR_TYPE_ACTION,
4197 (void *)items->type,
4198 "udp header not found");
4200 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4201 if (!vxlan->vx_flags)
4203 RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4205 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4206 vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4208 return rte_flow_error_set(error, EINVAL,
4209 RTE_FLOW_ERROR_TYPE_ACTION,
4210 (void *)items->type,
4211 "udp header not found");
4212 if (!vxlan_gpe->proto)
4213 return rte_flow_error_set(error, EINVAL,
4214 RTE_FLOW_ERROR_TYPE_ACTION,
4215 (void *)items->type,
4216 "next protocol not found");
4219 RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4220 if (!vxlan_gpe->vx_flags)
4221 vxlan_gpe->vx_flags =
4222 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4224 case RTE_FLOW_ITEM_TYPE_GRE:
4225 case RTE_FLOW_ITEM_TYPE_NVGRE:
4226 gre = (struct rte_gre_hdr *)&buf[temp_size];
4228 return rte_flow_error_set(error, EINVAL,
4229 RTE_FLOW_ERROR_TYPE_ACTION,
4230 (void *)items->type,
4231 "next protocol not found");
4233 return rte_flow_error_set(error, EINVAL,
4234 RTE_FLOW_ERROR_TYPE_ACTION,
4235 (void *)items->type,
4236 "ip header not found");
4237 if (ipv4 && !ipv4->next_proto_id)
4238 ipv4->next_proto_id = IPPROTO_GRE;
4239 else if (ipv6 && !ipv6->proto)
4240 ipv6->proto = IPPROTO_GRE;
4242 case RTE_FLOW_ITEM_TYPE_VOID:
4245 return rte_flow_error_set(error, EINVAL,
4246 RTE_FLOW_ERROR_TYPE_ACTION,
4247 (void *)items->type,
4248 "unsupported item type");
4258 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4260 struct rte_ether_hdr *eth = NULL;
4261 struct rte_vlan_hdr *vlan = NULL;
4262 struct rte_ipv6_hdr *ipv6 = NULL;
4263 struct rte_udp_hdr *udp = NULL;
4267 eth = (struct rte_ether_hdr *)data;
4268 next_hdr = (char *)(eth + 1);
4269 proto = RTE_BE16(eth->ether_type);
4272 while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4273 vlan = (struct rte_vlan_hdr *)next_hdr;
4274 proto = RTE_BE16(vlan->eth_proto);
4275 next_hdr += sizeof(struct rte_vlan_hdr);
4278 /* HW calculates IPv4 csum. no need to proceed */
4279 if (proto == RTE_ETHER_TYPE_IPV4)
4282 /* non IPv4/IPv6 header. not supported */
4283 if (proto != RTE_ETHER_TYPE_IPV6) {
4284 return rte_flow_error_set(error, ENOTSUP,
4285 RTE_FLOW_ERROR_TYPE_ACTION,
4286 NULL, "Cannot offload non IPv4/IPv6");
4289 ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4291 /* ignore non UDP */
4292 if (ipv6->proto != IPPROTO_UDP)
4295 udp = (struct rte_udp_hdr *)(ipv6 + 1);
4296 udp->dgram_cksum = 0;
4302 * Convert L2 encap action to DV specification.
4305 * Pointer to rte_eth_dev structure.
4307 * Pointer to action structure.
4308 * @param[in, out] dev_flow
4309 * Pointer to the mlx5_flow.
4310 * @param[in] transfer
4311 * Mark if the flow is E-Switch flow.
4313 * Pointer to the error structure.
4316 * 0 on success, a negative errno value otherwise and rte_errno is set.
4319 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4320 const struct rte_flow_action *action,
4321 struct mlx5_flow *dev_flow,
4323 struct rte_flow_error *error)
4325 const struct rte_flow_item *encap_data;
4326 const struct rte_flow_action_raw_encap *raw_encap_data;
4327 struct mlx5_flow_dv_encap_decap_resource res = {
4329 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4330 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4331 MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4334 if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4336 (const struct rte_flow_action_raw_encap *)action->conf;
4337 res.size = raw_encap_data->size;
4338 memcpy(res.buf, raw_encap_data->data, res.size);
4340 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4342 ((const struct rte_flow_action_vxlan_encap *)
4343 action->conf)->definition;
4346 ((const struct rte_flow_action_nvgre_encap *)
4347 action->conf)->definition;
4348 if (flow_dv_convert_encap_data(encap_data, res.buf,
4352 if (flow_dv_zero_encap_udp_csum(res.buf, error))
4354 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4355 return rte_flow_error_set(error, EINVAL,
4356 RTE_FLOW_ERROR_TYPE_ACTION,
4357 NULL, "can't create L2 encap action");
4362 * Convert L2 decap action to DV specification.
4365 * Pointer to rte_eth_dev structure.
4366 * @param[in, out] dev_flow
4367 * Pointer to the mlx5_flow.
4368 * @param[in] transfer
4369 * Mark if the flow is E-Switch flow.
4371 * Pointer to the error structure.
4374 * 0 on success, a negative errno value otherwise and rte_errno is set.
4377 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4378 struct mlx5_flow *dev_flow,
4380 struct rte_flow_error *error)
4382 struct mlx5_flow_dv_encap_decap_resource res = {
4385 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4386 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4387 MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4390 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4391 return rte_flow_error_set(error, EINVAL,
4392 RTE_FLOW_ERROR_TYPE_ACTION,
4393 NULL, "can't create L2 decap action");
4398 * Convert raw decap/encap (L3 tunnel) action to DV specification.
4401 * Pointer to rte_eth_dev structure.
4403 * Pointer to action structure.
4404 * @param[in, out] dev_flow
4405 * Pointer to the mlx5_flow.
4407 * Pointer to the flow attributes.
4409 * Pointer to the error structure.
4412 * 0 on success, a negative errno value otherwise and rte_errno is set.
4415 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4416 const struct rte_flow_action *action,
4417 struct mlx5_flow *dev_flow,
4418 const struct rte_flow_attr *attr,
4419 struct rte_flow_error *error)
4421 const struct rte_flow_action_raw_encap *encap_data;
4422 struct mlx5_flow_dv_encap_decap_resource res;
4424 memset(&res, 0, sizeof(res));
4425 encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4426 res.size = encap_data->size;
4427 memcpy(res.buf, encap_data->data, res.size);
4428 res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4429 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4430 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4432 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4434 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4435 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4436 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4437 return rte_flow_error_set(error, EINVAL,
4438 RTE_FLOW_ERROR_TYPE_ACTION,
4439 NULL, "can't create encap action");
4444 * Create action push VLAN.
4447 * Pointer to rte_eth_dev structure.
4449 * Pointer to the flow attributes.
4451 * Pointer to the vlan to push to the Ethernet header.
4452 * @param[in, out] dev_flow
4453 * Pointer to the mlx5_flow.
4455 * Pointer to the error structure.
4458 * 0 on success, a negative errno value otherwise and rte_errno is set.
4461 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4462 const struct rte_flow_attr *attr,
4463 const struct rte_vlan_hdr *vlan,
4464 struct mlx5_flow *dev_flow,
4465 struct rte_flow_error *error)
4467 struct mlx5_flow_dv_push_vlan_action_resource res;
4469 memset(&res, 0, sizeof(res));
4471 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4474 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4476 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4477 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4478 return flow_dv_push_vlan_action_resource_register
4479 (dev, &res, dev_flow, error);
4483 * Validate the modify-header actions.
4485 * @param[in] action_flags
4486 * Holds the actions detected until now.
4488 * Pointer to the modify action.
4490 * Pointer to error structure.
4493 * 0 on success, a negative errno value otherwise and rte_errno is set.
4496 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4497 const struct rte_flow_action *action,
4498 struct rte_flow_error *error)
4500 if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4501 return rte_flow_error_set(error, EINVAL,
4502 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4503 NULL, "action configuration not set");
4504 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4505 return rte_flow_error_set(error, EINVAL,
4506 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4507 "can't have encap action before"
4513 * Validate the modify-header MAC address actions.
4515 * @param[in] action_flags
4516 * Holds the actions detected until now.
4518 * Pointer to the modify action.
4519 * @param[in] item_flags
4520 * Holds the items detected.
4522 * Pointer to error structure.
4525 * 0 on success, a negative errno value otherwise and rte_errno is set.
4528 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4529 const struct rte_flow_action *action,
4530 const uint64_t item_flags,
4531 struct rte_flow_error *error)
4535 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4537 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4538 return rte_flow_error_set(error, EINVAL,
4539 RTE_FLOW_ERROR_TYPE_ACTION,
4541 "no L2 item in pattern");
4547 * Validate the modify-header IPv4 address actions.
4549 * @param[in] action_flags
4550 * Holds the actions detected until now.
4552 * Pointer to the modify action.
4553 * @param[in] item_flags
4554 * Holds the items detected.
4556 * Pointer to error structure.
4559 * 0 on success, a negative errno value otherwise and rte_errno is set.
4562 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4563 const struct rte_flow_action *action,
4564 const uint64_t item_flags,
4565 struct rte_flow_error *error)
4570 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4572 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4573 MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4574 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4575 if (!(item_flags & layer))
4576 return rte_flow_error_set(error, EINVAL,
4577 RTE_FLOW_ERROR_TYPE_ACTION,
4579 "no ipv4 item in pattern");
4585 * Validate the modify-header IPv6 address actions.
4587 * @param[in] action_flags
4588 * Holds the actions detected until now.
4590 * Pointer to the modify action.
4591 * @param[in] item_flags
4592 * Holds the items detected.
4594 * Pointer to error structure.
4597 * 0 on success, a negative errno value otherwise and rte_errno is set.
4600 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4601 const struct rte_flow_action *action,
4602 const uint64_t item_flags,
4603 struct rte_flow_error *error)
4608 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4610 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4611 MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4612 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4613 if (!(item_flags & layer))
4614 return rte_flow_error_set(error, EINVAL,
4615 RTE_FLOW_ERROR_TYPE_ACTION,
4617 "no ipv6 item in pattern");
4623 * Validate the modify-header TP actions.
4625 * @param[in] action_flags
4626 * Holds the actions detected until now.
4628 * Pointer to the modify action.
4629 * @param[in] item_flags
4630 * Holds the items detected.
4632 * Pointer to error structure.
4635 * 0 on success, a negative errno value otherwise and rte_errno is set.
4638 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4639 const struct rte_flow_action *action,
4640 const uint64_t item_flags,
4641 struct rte_flow_error *error)
4646 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4648 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4649 MLX5_FLOW_LAYER_INNER_L4 :
4650 MLX5_FLOW_LAYER_OUTER_L4;
4651 if (!(item_flags & layer))
4652 return rte_flow_error_set(error, EINVAL,
4653 RTE_FLOW_ERROR_TYPE_ACTION,
4654 NULL, "no transport layer "
4661 * Validate the modify-header actions of increment/decrement
4662 * TCP Sequence-number.
4664 * @param[in] action_flags
4665 * Holds the actions detected until now.
4667 * Pointer to the modify action.
4668 * @param[in] item_flags
4669 * Holds the items detected.
4671 * Pointer to error structure.
4674 * 0 on success, a negative errno value otherwise and rte_errno is set.
4677 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4678 const struct rte_flow_action *action,
4679 const uint64_t item_flags,
4680 struct rte_flow_error *error)
4685 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4687 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4688 MLX5_FLOW_LAYER_INNER_L4_TCP :
4689 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4690 if (!(item_flags & layer))
4691 return rte_flow_error_set(error, EINVAL,
4692 RTE_FLOW_ERROR_TYPE_ACTION,
4693 NULL, "no TCP item in"
4695 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4696 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4697 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4698 (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4699 return rte_flow_error_set(error, EINVAL,
4700 RTE_FLOW_ERROR_TYPE_ACTION,
4702 "cannot decrease and increase"
4703 " TCP sequence number"
4704 " at the same time");
4710 * Validate the modify-header actions of increment/decrement
4711 * TCP Acknowledgment number.
4713 * @param[in] action_flags
4714 * Holds the actions detected until now.
4716 * Pointer to the modify action.
4717 * @param[in] item_flags
4718 * Holds the items detected.
4720 * Pointer to error structure.
4723 * 0 on success, a negative errno value otherwise and rte_errno is set.
4726 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4727 const struct rte_flow_action *action,
4728 const uint64_t item_flags,
4729 struct rte_flow_error *error)
4734 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4736 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4737 MLX5_FLOW_LAYER_INNER_L4_TCP :
4738 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4739 if (!(item_flags & layer))
4740 return rte_flow_error_set(error, EINVAL,
4741 RTE_FLOW_ERROR_TYPE_ACTION,
4742 NULL, "no TCP item in"
4744 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4745 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4746 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4747 (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4748 return rte_flow_error_set(error, EINVAL,
4749 RTE_FLOW_ERROR_TYPE_ACTION,
4751 "cannot decrease and increase"
4752 " TCP acknowledgment number"
4753 " at the same time");
4759 * Validate the modify-header TTL actions.
4761 * @param[in] action_flags
4762 * Holds the actions detected until now.
4764 * Pointer to the modify action.
4765 * @param[in] item_flags
4766 * Holds the items detected.
4768 * Pointer to error structure.
4771 * 0 on success, a negative errno value otherwise and rte_errno is set.
4774 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4775 const struct rte_flow_action *action,
4776 const uint64_t item_flags,
4777 struct rte_flow_error *error)
4782 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4784 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4785 MLX5_FLOW_LAYER_INNER_L3 :
4786 MLX5_FLOW_LAYER_OUTER_L3;
4787 if (!(item_flags & layer))
4788 return rte_flow_error_set(error, EINVAL,
4789 RTE_FLOW_ERROR_TYPE_ACTION,
4791 "no IP protocol in pattern");
4797 * Validate the generic modify field actions.
4799 * Pointer to the rte_eth_dev structure.
4800 * @param[in] action_flags
4801 * Holds the actions detected until now.
4803 * Pointer to the modify action.
4805 * Pointer to the flow attributes.
4807 * Pointer to error structure.
4810 * Number of header fields to modify (0 or more) on success,
4811 * a negative errno value otherwise and rte_errno is set.
4814 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4815 const uint64_t action_flags,
4816 const struct rte_flow_action *action,
4817 const struct rte_flow_attr *attr,
4818 struct rte_flow_error *error)
4821 struct mlx5_priv *priv = dev->data->dev_private;
4822 struct mlx5_dev_config *config = &priv->config;
4823 const struct rte_flow_action_modify_field *action_modify_field =
4825 uint32_t dst_width = mlx5_flow_item_field_width(config,
4826 action_modify_field->dst.field);
4827 uint32_t src_width = mlx5_flow_item_field_width(config,
4828 action_modify_field->src.field);
4830 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4834 if (action_modify_field->width == 0)
4835 return rte_flow_error_set(error, EINVAL,
4836 RTE_FLOW_ERROR_TYPE_ACTION, action,
4837 "no bits are requested to be modified");
4838 else if (action_modify_field->width > dst_width ||
4839 action_modify_field->width > src_width)
4840 return rte_flow_error_set(error, EINVAL,
4841 RTE_FLOW_ERROR_TYPE_ACTION, action,
4842 "cannot modify more bits than"
4843 " the width of a field");
4844 if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4845 action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4846 if ((action_modify_field->dst.offset +
4847 action_modify_field->width > dst_width) ||
4848 (action_modify_field->dst.offset % 32))
4849 return rte_flow_error_set(error, EINVAL,
4850 RTE_FLOW_ERROR_TYPE_ACTION, action,
4851 "destination offset is too big"
4852 " or not aligned to 4 bytes");
4853 if (action_modify_field->dst.level &&
4854 action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4855 return rte_flow_error_set(error, ENOTSUP,
4856 RTE_FLOW_ERROR_TYPE_ACTION, action,
4857 "inner header fields modification"
4858 " is not supported");
4860 if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4861 action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4862 if (!attr->transfer && !attr->group)
4863 return rte_flow_error_set(error, ENOTSUP,
4864 RTE_FLOW_ERROR_TYPE_ACTION, action,
4865 "modify field action is not"
4866 " supported for group 0");
4867 if ((action_modify_field->src.offset +
4868 action_modify_field->width > src_width) ||
4869 (action_modify_field->src.offset % 32))
4870 return rte_flow_error_set(error, EINVAL,
4871 RTE_FLOW_ERROR_TYPE_ACTION, action,
4872 "source offset is too big"
4873 " or not aligned to 4 bytes");
4874 if (action_modify_field->src.level &&
4875 action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4876 return rte_flow_error_set(error, ENOTSUP,
4877 RTE_FLOW_ERROR_TYPE_ACTION, action,
4878 "inner header fields modification"
4879 " is not supported");
4881 if ((action_modify_field->dst.field ==
4882 action_modify_field->src.field) &&
4883 (action_modify_field->dst.level ==
4884 action_modify_field->src.level))
4885 return rte_flow_error_set(error, EINVAL,
4886 RTE_FLOW_ERROR_TYPE_ACTION, action,
4887 "source and destination fields"
4888 " cannot be the same");
4889 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4890 action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER)
4891 return rte_flow_error_set(error, EINVAL,
4892 RTE_FLOW_ERROR_TYPE_ACTION, action,
4893 "immediate value or a pointer to it"
4894 " cannot be used as a destination");
4895 if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4896 action_modify_field->src.field == RTE_FLOW_FIELD_START)
4897 return rte_flow_error_set(error, ENOTSUP,
4898 RTE_FLOW_ERROR_TYPE_ACTION, action,
4899 "modifications of an arbitrary"
4900 " place in a packet is not supported");
4901 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4902 action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4903 return rte_flow_error_set(error, ENOTSUP,
4904 RTE_FLOW_ERROR_TYPE_ACTION, action,
4905 "modifications of the 802.1Q Tag"
4906 " Identifier is not supported");
4907 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4908 action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4909 return rte_flow_error_set(error, ENOTSUP,
4910 RTE_FLOW_ERROR_TYPE_ACTION, action,
4911 "modifications of the VXLAN Network"
4912 " Identifier is not supported");
4913 if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4914 action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4915 return rte_flow_error_set(error, ENOTSUP,
4916 RTE_FLOW_ERROR_TYPE_ACTION, action,
4917 "modifications of the GENEVE Network"
4918 " Identifier is not supported");
4919 if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4920 action_modify_field->src.field == RTE_FLOW_FIELD_MARK ||
4921 action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4922 action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4923 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4924 !mlx5_flow_ext_mreg_supported(dev))
4925 return rte_flow_error_set(error, ENOTSUP,
4926 RTE_FLOW_ERROR_TYPE_ACTION, action,
4927 "cannot modify mark or metadata without"
4928 " extended metadata register support");
4930 if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4931 return rte_flow_error_set(error, ENOTSUP,
4932 RTE_FLOW_ERROR_TYPE_ACTION, action,
4933 "add and sub operations"
4934 " are not supported");
4935 return (action_modify_field->width / 32) +
4936 !!(action_modify_field->width % 32);
4940 * Validate jump action.
4943 * Pointer to the jump action.
4944 * @param[in] action_flags
4945 * Holds the actions detected until now.
4946 * @param[in] attributes
4947 * Pointer to flow attributes
4948 * @param[in] external
4949 * Action belongs to flow rule created by request external to PMD.
4951 * Pointer to error structure.
4954 * 0 on success, a negative errno value otherwise and rte_errno is set.
4957 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4958 const struct mlx5_flow_tunnel *tunnel,
4959 const struct rte_flow_action *action,
4960 uint64_t action_flags,
4961 const struct rte_flow_attr *attributes,
4962 bool external, struct rte_flow_error *error)
4964 uint32_t target_group, table;
4966 struct flow_grp_info grp_info = {
4967 .external = !!external,
4968 .transfer = !!attributes->transfer,
4972 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4973 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4974 return rte_flow_error_set(error, EINVAL,
4975 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4976 "can't have 2 fate actions in"
4979 return rte_flow_error_set(error, EINVAL,
4980 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4981 NULL, "action configuration not set");
4983 ((const struct rte_flow_action_jump *)action->conf)->group;
4984 ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
4988 if (attributes->group == target_group &&
4989 !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
4990 MLX5_FLOW_ACTION_TUNNEL_MATCH)))
4991 return rte_flow_error_set(error, EINVAL,
4992 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4993 "target group must be other than"
4994 " the current flow group");
4999 * Validate the port_id action.
5002 * Pointer to rte_eth_dev structure.
5003 * @param[in] action_flags
5004 * Bit-fields that holds the actions detected until now.
5006 * Port_id RTE action structure.
5008 * Attributes of flow that includes this action.
5010 * Pointer to error structure.
5013 * 0 on success, a negative errno value otherwise and rte_errno is set.
5016 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5017 uint64_t action_flags,
5018 const struct rte_flow_action *action,
5019 const struct rte_flow_attr *attr,
5020 struct rte_flow_error *error)
5022 const struct rte_flow_action_port_id *port_id;
5023 struct mlx5_priv *act_priv;
5024 struct mlx5_priv *dev_priv;
5027 if (!attr->transfer)
5028 return rte_flow_error_set(error, ENOTSUP,
5029 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5031 "port id action is valid in transfer"
5033 if (!action || !action->conf)
5034 return rte_flow_error_set(error, ENOTSUP,
5035 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5037 "port id action parameters must be"
5039 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5040 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5041 return rte_flow_error_set(error, EINVAL,
5042 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5043 "can have only one fate actions in"
5045 dev_priv = mlx5_dev_to_eswitch_info(dev);
5047 return rte_flow_error_set(error, rte_errno,
5048 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5050 "failed to obtain E-Switch info");
5051 port_id = action->conf;
5052 port = port_id->original ? dev->data->port_id : port_id->id;
5053 act_priv = mlx5_port_to_eswitch_info(port, false);
5055 return rte_flow_error_set
5057 RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
5058 "failed to obtain E-Switch port id for port");
5059 if (act_priv->domain_id != dev_priv->domain_id)
5060 return rte_flow_error_set
5062 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5063 "port does not belong to"
5064 " E-Switch being configured");
5069 * Get the maximum number of modify header actions.
5072 * Pointer to rte_eth_dev structure.
5074 * Whether action is on root table.
5077 * Max number of modify header actions device can support.
5079 static inline unsigned int
5080 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5084 * There's no way to directly query the max capacity from FW.
5085 * The maximal value on root table should be assumed to be supported.
5088 return MLX5_MAX_MODIFY_NUM;
5090 return MLX5_ROOT_TBL_MODIFY_NUM;
5094 * Validate the meter action.
5097 * Pointer to rte_eth_dev structure.
5098 * @param[in] action_flags
5099 * Bit-fields that holds the actions detected until now.
5101 * Pointer to the meter action.
5103 * Attributes of flow that includes this action.
5104 * @param[in] port_id_item
5105 * Pointer to item indicating port id.
5107 * Pointer to error structure.
5110 * 0 on success, a negative errno value otherwise and rte_ernno is set.
5113 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5114 uint64_t action_flags,
5115 const struct rte_flow_action *action,
5116 const struct rte_flow_attr *attr,
5117 const struct rte_flow_item *port_id_item,
5119 struct rte_flow_error *error)
5121 struct mlx5_priv *priv = dev->data->dev_private;
5122 const struct rte_flow_action_meter *am = action->conf;
5123 struct mlx5_flow_meter_info *fm;
5124 struct mlx5_flow_meter_policy *mtr_policy;
5125 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5128 return rte_flow_error_set(error, EINVAL,
5129 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5130 "meter action conf is NULL");
5132 if (action_flags & MLX5_FLOW_ACTION_METER)
5133 return rte_flow_error_set(error, ENOTSUP,
5134 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5135 "meter chaining not support");
5136 if (action_flags & MLX5_FLOW_ACTION_JUMP)
5137 return rte_flow_error_set(error, ENOTSUP,
5138 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5139 "meter with jump not support");
5141 return rte_flow_error_set(error, ENOTSUP,
5142 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5144 "meter action not supported");
5145 fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5147 return rte_flow_error_set(error, EINVAL,
5148 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5150 /* aso meter can always be shared by different domains */
5151 if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5152 !(fm->transfer == attr->transfer ||
5153 (!fm->ingress && !attr->ingress && attr->egress) ||
5154 (!fm->egress && !attr->egress && attr->ingress)))
5155 return rte_flow_error_set(error, EINVAL,
5156 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5157 "Flow attributes domain are either invalid "
5158 "or have a domain conflict with current "
5159 "meter attributes");
5160 if (fm->def_policy) {
5161 if (!((attr->transfer &&
5162 mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5164 mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5166 mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5167 return rte_flow_error_set(error, EINVAL,
5168 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5169 "Flow attributes domain "
5170 "have a conflict with current "
5171 "meter domain attributes");
5174 mtr_policy = mlx5_flow_meter_policy_find(dev,
5175 fm->policy_id, NULL);
5177 return rte_flow_error_set(error, EINVAL,
5178 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5179 "Invalid policy id for meter ");
5180 if (!((attr->transfer && mtr_policy->transfer) ||
5181 (attr->egress && mtr_policy->egress) ||
5182 (attr->ingress && mtr_policy->ingress)))
5183 return rte_flow_error_set(error, EINVAL,
5184 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5185 "Flow attributes domain "
5186 "have a conflict with current "
5187 "meter domain attributes");
5188 if (attr->transfer && mtr_policy->dev) {
5190 * When policy has fate action of port_id,
5191 * the flow should have the same src port as policy.
5193 struct mlx5_priv *policy_port_priv =
5194 mtr_policy->dev->data->dev_private;
5195 int32_t flow_src_port = priv->representor_id;
5198 const struct rte_flow_item_port_id *spec =
5200 struct mlx5_priv *port_priv =
5201 mlx5_port_to_eswitch_info(spec->id,
5204 return rte_flow_error_set(error,
5206 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5208 "Failed to get port info.");
5209 flow_src_port = port_priv->representor_id;
5211 if (flow_src_port != policy_port_priv->representor_id)
5212 return rte_flow_error_set(error,
5214 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5216 "Flow and meter policy "
5217 "have different src port.");
5219 *def_policy = false;
5225 * Validate the age action.
5227 * @param[in] action_flags
5228 * Holds the actions detected until now.
5230 * Pointer to the age action.
5232 * Pointer to the Ethernet device structure.
5234 * Pointer to error structure.
5237 * 0 on success, a negative errno value otherwise and rte_errno is set.
5240 flow_dv_validate_action_age(uint64_t action_flags,
5241 const struct rte_flow_action *action,
5242 struct rte_eth_dev *dev,
5243 struct rte_flow_error *error)
5245 struct mlx5_priv *priv = dev->data->dev_private;
5246 const struct rte_flow_action_age *age = action->conf;
5248 if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
5249 !priv->sh->aso_age_mng))
5250 return rte_flow_error_set(error, ENOTSUP,
5251 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5253 "age action not supported");
5254 if (!(action->conf))
5255 return rte_flow_error_set(error, EINVAL,
5256 RTE_FLOW_ERROR_TYPE_ACTION, action,
5257 "configuration cannot be null");
5258 if (!(age->timeout))
5259 return rte_flow_error_set(error, EINVAL,
5260 RTE_FLOW_ERROR_TYPE_ACTION, action,
5261 "invalid timeout value 0");
5262 if (action_flags & MLX5_FLOW_ACTION_AGE)
5263 return rte_flow_error_set(error, EINVAL,
5264 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5265 "duplicate age actions set");
5270 * Validate the modify-header IPv4 DSCP actions.
5272 * @param[in] action_flags
5273 * Holds the actions detected until now.
5275 * Pointer to the modify action.
5276 * @param[in] item_flags
5277 * Holds the items detected.
5279 * Pointer to error structure.
5282 * 0 on success, a negative errno value otherwise and rte_errno is set.
5285 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5286 const struct rte_flow_action *action,
5287 const uint64_t item_flags,
5288 struct rte_flow_error *error)
5292 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5294 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5295 return rte_flow_error_set(error, EINVAL,
5296 RTE_FLOW_ERROR_TYPE_ACTION,
5298 "no ipv4 item in pattern");
5304 * Validate the modify-header IPv6 DSCP actions.
5306 * @param[in] action_flags
5307 * Holds the actions detected until now.
5309 * Pointer to the modify action.
5310 * @param[in] item_flags
5311 * Holds the items detected.
5313 * Pointer to error structure.
5316 * 0 on success, a negative errno value otherwise and rte_errno is set.
5319 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5320 const struct rte_flow_action *action,
5321 const uint64_t item_flags,
5322 struct rte_flow_error *error)
5326 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5328 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5329 return rte_flow_error_set(error, EINVAL,
5330 RTE_FLOW_ERROR_TYPE_ACTION,
5332 "no ipv6 item in pattern");
5338 * Match modify-header resource.
5341 * Pointer to the hash list.
5343 * Pointer to exist resource entry object.
5345 * Key of the new entry.
5347 * Pointer to new modify-header resource.
5350 * 0 on matching, non-zero otherwise.
5353 flow_dv_modify_match_cb(struct mlx5_hlist *list __rte_unused,
5354 struct mlx5_hlist_entry *entry,
5355 uint64_t key __rte_unused, void *cb_ctx)
5357 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5358 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5359 struct mlx5_flow_dv_modify_hdr_resource *resource =
5360 container_of(entry, typeof(*resource), entry);
5361 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5363 key_len += ref->actions_num * sizeof(ref->actions[0]);
5364 return ref->actions_num != resource->actions_num ||
5365 memcmp(&ref->ft_type, &resource->ft_type, key_len);
5368 struct mlx5_hlist_entry *
5369 flow_dv_modify_create_cb(struct mlx5_hlist *list, uint64_t key __rte_unused,
5372 struct mlx5_dev_ctx_shared *sh = list->ctx;
5373 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5374 struct mlx5dv_dr_domain *ns;
5375 struct mlx5_flow_dv_modify_hdr_resource *entry;
5376 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5378 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5379 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5381 entry = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*entry) + data_len, 0,
5384 rte_flow_error_set(ctx->error, ENOMEM,
5385 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5386 "cannot allocate resource memory");
5389 rte_memcpy(&entry->ft_type,
5390 RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5391 key_len + data_len);
5392 if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5393 ns = sh->fdb_domain;
5394 else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5398 ret = mlx5_flow_os_create_flow_action_modify_header
5399 (sh->ctx, ns, entry,
5400 data_len, &entry->action);
5403 rte_flow_error_set(ctx->error, ENOMEM,
5404 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5405 NULL, "cannot create modification action");
5408 return &entry->entry;
5412 * Validate the sample action.
5414 * @param[in, out] action_flags
5415 * Holds the actions detected until now.
5417 * Pointer to the sample action.
5419 * Pointer to the Ethernet device structure.
5421 * Attributes of flow that includes this action.
5422 * @param[in] item_flags
5423 * Holds the items detected.
5425 * Pointer to the RSS action.
5426 * @param[out] sample_rss
5427 * Pointer to the RSS action in sample action list.
5429 * Pointer to the COUNT action in sample action list.
5430 * @param[out] fdb_mirror_limit
5431 * Pointer to the FDB mirror limitation flag.
5433 * Pointer to error structure.
5436 * 0 on success, a negative errno value otherwise and rte_errno is set.
5439 flow_dv_validate_action_sample(uint64_t *action_flags,
5440 const struct rte_flow_action *action,
5441 struct rte_eth_dev *dev,
5442 const struct rte_flow_attr *attr,
5443 uint64_t item_flags,
5444 const struct rte_flow_action_rss *rss,
5445 const struct rte_flow_action_rss **sample_rss,
5446 const struct rte_flow_action_count **count,
5447 int *fdb_mirror_limit,
5448 struct rte_flow_error *error)
5450 struct mlx5_priv *priv = dev->data->dev_private;
5451 struct mlx5_dev_config *dev_conf = &priv->config;
5452 const struct rte_flow_action_sample *sample = action->conf;
5453 const struct rte_flow_action *act;
5454 uint64_t sub_action_flags = 0;
5455 uint16_t queue_index = 0xFFFF;
5460 return rte_flow_error_set(error, EINVAL,
5461 RTE_FLOW_ERROR_TYPE_ACTION, action,
5462 "configuration cannot be NULL");
5463 if (sample->ratio == 0)
5464 return rte_flow_error_set(error, EINVAL,
5465 RTE_FLOW_ERROR_TYPE_ACTION, action,
5466 "ratio value starts from 1");
5467 if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
5468 return rte_flow_error_set(error, ENOTSUP,
5469 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5471 "sample action not supported");
5472 if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5473 return rte_flow_error_set(error, EINVAL,
5474 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5475 "Multiple sample actions not "
5477 if (*action_flags & MLX5_FLOW_ACTION_METER)
5478 return rte_flow_error_set(error, EINVAL,
5479 RTE_FLOW_ERROR_TYPE_ACTION, action,
5480 "wrong action order, meter should "
5481 "be after sample action");
5482 if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5483 return rte_flow_error_set(error, EINVAL,
5484 RTE_FLOW_ERROR_TYPE_ACTION, action,
5485 "wrong action order, jump should "
5486 "be after sample action");
5487 act = sample->actions;
5488 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5489 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5490 return rte_flow_error_set(error, ENOTSUP,
5491 RTE_FLOW_ERROR_TYPE_ACTION,
5492 act, "too many actions");
5493 switch (act->type) {
5494 case RTE_FLOW_ACTION_TYPE_QUEUE:
5495 ret = mlx5_flow_validate_action_queue(act,
5501 queue_index = ((const struct rte_flow_action_queue *)
5502 (act->conf))->index;
5503 sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5506 case RTE_FLOW_ACTION_TYPE_RSS:
5507 *sample_rss = act->conf;
5508 ret = mlx5_flow_validate_action_rss(act,
5515 if (rss && *sample_rss &&
5516 ((*sample_rss)->level != rss->level ||
5517 (*sample_rss)->types != rss->types))
5518 return rte_flow_error_set(error, ENOTSUP,
5519 RTE_FLOW_ERROR_TYPE_ACTION,
5521 "Can't use the different RSS types "
5522 "or level in the same flow");
5523 if (*sample_rss != NULL && (*sample_rss)->queue_num)
5524 queue_index = (*sample_rss)->queue[0];
5525 sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5528 case RTE_FLOW_ACTION_TYPE_MARK:
5529 ret = flow_dv_validate_action_mark(dev, act,
5534 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5535 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5536 MLX5_FLOW_ACTION_MARK_EXT;
5538 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5541 case RTE_FLOW_ACTION_TYPE_COUNT:
5542 ret = flow_dv_validate_action_count
5543 (dev, is_shared_action_count(act),
5544 *action_flags | sub_action_flags,
5549 sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5550 *action_flags |= MLX5_FLOW_ACTION_COUNT;
5553 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5554 ret = flow_dv_validate_action_port_id(dev,
5561 sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5564 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5565 ret = flow_dv_validate_action_raw_encap_decap
5566 (dev, NULL, act->conf, attr, &sub_action_flags,
5567 &actions_n, action, item_flags, error);
5572 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5573 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5574 ret = flow_dv_validate_action_l2_encap(dev,
5580 sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5584 return rte_flow_error_set(error, ENOTSUP,
5585 RTE_FLOW_ERROR_TYPE_ACTION,
5587 "Doesn't support optional "
5591 if (attr->ingress && !attr->transfer) {
5592 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5593 MLX5_FLOW_ACTION_RSS)))
5594 return rte_flow_error_set(error, EINVAL,
5595 RTE_FLOW_ERROR_TYPE_ACTION,
5597 "Ingress must has a dest "
5598 "QUEUE for Sample");
5599 } else if (attr->egress && !attr->transfer) {
5600 return rte_flow_error_set(error, ENOTSUP,
5601 RTE_FLOW_ERROR_TYPE_ACTION,
5603 "Sample Only support Ingress "
5605 } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5606 MLX5_ASSERT(attr->transfer);
5607 if (sample->ratio > 1)
5608 return rte_flow_error_set(error, ENOTSUP,
5609 RTE_FLOW_ERROR_TYPE_ACTION,
5611 "E-Switch doesn't support "
5612 "any optional action "
5614 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5615 return rte_flow_error_set(error, ENOTSUP,
5616 RTE_FLOW_ERROR_TYPE_ACTION,
5618 "unsupported action QUEUE");
5619 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5620 return rte_flow_error_set(error, ENOTSUP,
5621 RTE_FLOW_ERROR_TYPE_ACTION,
5623 "unsupported action QUEUE");
5624 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5625 return rte_flow_error_set(error, EINVAL,
5626 RTE_FLOW_ERROR_TYPE_ACTION,
5628 "E-Switch must has a dest "
5629 "port for mirroring");
5630 if (!priv->config.hca_attr.reg_c_preserve &&
5631 priv->representor_id != UINT16_MAX)
5632 *fdb_mirror_limit = 1;
5634 /* Continue validation for Xcap actions.*/
5635 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5636 (queue_index == 0xFFFF ||
5637 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5638 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5639 MLX5_FLOW_XCAP_ACTIONS)
5640 return rte_flow_error_set(error, ENOTSUP,
5641 RTE_FLOW_ERROR_TYPE_ACTION,
5642 NULL, "encap and decap "
5643 "combination aren't "
5645 if (!attr->transfer && attr->ingress && (sub_action_flags &
5646 MLX5_FLOW_ACTION_ENCAP))
5647 return rte_flow_error_set(error, ENOTSUP,
5648 RTE_FLOW_ERROR_TYPE_ACTION,
5649 NULL, "encap is not supported"
5650 " for ingress traffic");
5656 * Find existing modify-header resource or create and register a new one.
5658 * @param dev[in, out]
5659 * Pointer to rte_eth_dev structure.
5660 * @param[in, out] resource
5661 * Pointer to modify-header resource.
5662 * @parm[in, out] dev_flow
5663 * Pointer to the dev_flow.
5665 * pointer to error structure.
5668 * 0 on success otherwise -errno and errno is set.
5671 flow_dv_modify_hdr_resource_register
5672 (struct rte_eth_dev *dev,
5673 struct mlx5_flow_dv_modify_hdr_resource *resource,
5674 struct mlx5_flow *dev_flow,
5675 struct rte_flow_error *error)
5677 struct mlx5_priv *priv = dev->data->dev_private;
5678 struct mlx5_dev_ctx_shared *sh = priv->sh;
5679 uint32_t key_len = sizeof(*resource) -
5680 offsetof(typeof(*resource), ft_type) +
5681 resource->actions_num * sizeof(resource->actions[0]);
5682 struct mlx5_hlist_entry *entry;
5683 struct mlx5_flow_cb_ctx ctx = {
5689 resource->root = !dev_flow->dv.group;
5690 if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5692 return rte_flow_error_set(error, EOVERFLOW,
5693 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5694 "too many modify header items");
5695 key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5696 entry = mlx5_hlist_register(sh->modify_cmds, key64, &ctx);
5699 resource = container_of(entry, typeof(*resource), entry);
5700 dev_flow->handle->dvh.modify_hdr = resource;
5705 * Get DV flow counter by index.
5708 * Pointer to the Ethernet device structure.
5710 * mlx5 flow counter index in the container.
5712 * mlx5 flow counter pool in the container.
5715 * Pointer to the counter, NULL otherwise.
5717 static struct mlx5_flow_counter *
5718 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5720 struct mlx5_flow_counter_pool **ppool)
5722 struct mlx5_priv *priv = dev->data->dev_private;
5723 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5724 struct mlx5_flow_counter_pool *pool;
5726 /* Decrease to original index and clear shared bit. */
5727 idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5728 MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5729 pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5733 return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5737 * Check the devx counter belongs to the pool.
5740 * Pointer to the counter pool.
5742 * The counter devx ID.
5745 * True if counter belongs to the pool, false otherwise.
5748 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5750 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5751 MLX5_COUNTERS_PER_POOL;
5753 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5759 * Get a pool by devx counter ID.
5762 * Pointer to the counter management.
5764 * The counter devx ID.
5767 * The counter pool pointer if exists, NULL otherwise,
5769 static struct mlx5_flow_counter_pool *
5770 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5773 struct mlx5_flow_counter_pool *pool = NULL;
5775 rte_spinlock_lock(&cmng->pool_update_sl);
5776 /* Check last used pool. */
5777 if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5778 flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5779 pool = cmng->pools[cmng->last_pool_idx];
5782 /* ID out of range means no suitable pool in the container. */
5783 if (id > cmng->max_id || id < cmng->min_id)
5786 * Find the pool from the end of the container, since mostly counter
5787 * ID is sequence increasing, and the last pool should be the needed
5792 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5794 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5800 rte_spinlock_unlock(&cmng->pool_update_sl);
5805 * Resize a counter container.
5808 * Pointer to the Ethernet device structure.
5811 * 0 on success, otherwise negative errno value and rte_errno is set.
5814 flow_dv_container_resize(struct rte_eth_dev *dev)
5816 struct mlx5_priv *priv = dev->data->dev_private;
5817 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5818 void *old_pools = cmng->pools;
5819 uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5820 uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5821 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5828 memcpy(pools, old_pools, cmng->n *
5829 sizeof(struct mlx5_flow_counter_pool *));
5831 cmng->pools = pools;
5833 mlx5_free(old_pools);
5838 * Query a devx flow counter.
5841 * Pointer to the Ethernet device structure.
5842 * @param[in] counter
5843 * Index to the flow counter.
5845 * The statistics value of packets.
5847 * The statistics value of bytes.
5850 * 0 on success, otherwise a negative errno value and rte_errno is set.
5853 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5856 struct mlx5_priv *priv = dev->data->dev_private;
5857 struct mlx5_flow_counter_pool *pool = NULL;
5858 struct mlx5_flow_counter *cnt;
5861 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5863 if (priv->sh->cmng.counter_fallback)
5864 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
5865 0, pkts, bytes, 0, NULL, NULL, 0);
5866 rte_spinlock_lock(&pool->sl);
5871 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
5872 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
5873 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
5875 rte_spinlock_unlock(&pool->sl);
5880 * Create and initialize a new counter pool.
5883 * Pointer to the Ethernet device structure.
5885 * The devX counter handle.
5887 * Whether the pool is for counter that was allocated for aging.
5888 * @param[in/out] cont_cur
5889 * Pointer to the container pointer, it will be update in pool resize.
5892 * The pool container pointer on success, NULL otherwise and rte_errno is set.
5894 static struct mlx5_flow_counter_pool *
5895 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
5898 struct mlx5_priv *priv = dev->data->dev_private;
5899 struct mlx5_flow_counter_pool *pool;
5900 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5901 bool fallback = priv->sh->cmng.counter_fallback;
5902 uint32_t size = sizeof(*pool);
5904 size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
5905 size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
5906 pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
5912 pool->is_aged = !!age;
5913 pool->query_gen = 0;
5914 pool->min_dcs = dcs;
5915 rte_spinlock_init(&pool->sl);
5916 rte_spinlock_init(&pool->csl);
5917 TAILQ_INIT(&pool->counters[0]);
5918 TAILQ_INIT(&pool->counters[1]);
5919 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
5920 rte_spinlock_lock(&cmng->pool_update_sl);
5921 pool->index = cmng->n_valid;
5922 if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
5924 rte_spinlock_unlock(&cmng->pool_update_sl);
5927 cmng->pools[pool->index] = pool;
5929 if (unlikely(fallback)) {
5930 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
5932 if (base < cmng->min_id)
5933 cmng->min_id = base;
5934 if (base > cmng->max_id)
5935 cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
5936 cmng->last_pool_idx = pool->index;
5938 rte_spinlock_unlock(&cmng->pool_update_sl);
5943 * Prepare a new counter and/or a new counter pool.
5946 * Pointer to the Ethernet device structure.
5947 * @param[out] cnt_free
5948 * Where to put the pointer of a new counter.
5950 * Whether the pool is for counter that was allocated for aging.
5953 * The counter pool pointer and @p cnt_free is set on success,
5954 * NULL otherwise and rte_errno is set.
5956 static struct mlx5_flow_counter_pool *
5957 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
5958 struct mlx5_flow_counter **cnt_free,
5961 struct mlx5_priv *priv = dev->data->dev_private;
5962 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5963 struct mlx5_flow_counter_pool *pool;
5964 struct mlx5_counters tmp_tq;
5965 struct mlx5_devx_obj *dcs = NULL;
5966 struct mlx5_flow_counter *cnt;
5967 enum mlx5_counter_type cnt_type =
5968 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
5969 bool fallback = priv->sh->cmng.counter_fallback;
5973 /* bulk_bitmap must be 0 for single counter allocation. */
5974 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
5977 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
5979 pool = flow_dv_pool_create(dev, dcs, age);
5981 mlx5_devx_cmd_destroy(dcs);
5985 i = dcs->id % MLX5_COUNTERS_PER_POOL;
5986 cnt = MLX5_POOL_GET_CNT(pool, i);
5988 cnt->dcs_when_free = dcs;
5992 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
5994 rte_errno = ENODATA;
5997 pool = flow_dv_pool_create(dev, dcs, age);
5999 mlx5_devx_cmd_destroy(dcs);
6002 TAILQ_INIT(&tmp_tq);
6003 for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6004 cnt = MLX5_POOL_GET_CNT(pool, i);
6006 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6008 rte_spinlock_lock(&cmng->csl[cnt_type]);
6009 TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6010 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6011 *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6012 (*cnt_free)->pool = pool;
6017 * Allocate a flow counter.
6020 * Pointer to the Ethernet device structure.
6022 * Whether the counter was allocated for aging.
6025 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6028 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6030 struct mlx5_priv *priv = dev->data->dev_private;
6031 struct mlx5_flow_counter_pool *pool = NULL;
6032 struct mlx5_flow_counter *cnt_free = NULL;
6033 bool fallback = priv->sh->cmng.counter_fallback;
6034 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6035 enum mlx5_counter_type cnt_type =
6036 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6039 if (!priv->config.devx) {
6040 rte_errno = ENOTSUP;
6043 /* Get free counters from container. */
6044 rte_spinlock_lock(&cmng->csl[cnt_type]);
6045 cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6047 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6048 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6049 if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6051 pool = cnt_free->pool;
6053 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6054 /* Create a DV counter action only in the first time usage. */
6055 if (!cnt_free->action) {
6057 struct mlx5_devx_obj *dcs;
6061 offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6062 dcs = pool->min_dcs;
6065 dcs = cnt_free->dcs_when_free;
6067 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6074 cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6075 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6076 /* Update the counter reset values. */
6077 if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6080 if (!fallback && !priv->sh->cmng.query_thread_on)
6081 /* Start the asynchronous batch query by the host thread. */
6082 mlx5_set_query_alarm(priv->sh);
6084 * When the count action isn't shared (by ID), shared_info field is
6085 * used for indirect action API's refcnt.
6086 * When the counter action is not shared neither by ID nor by indirect
6087 * action API, shared info must be 1.
6089 cnt_free->shared_info.refcnt = 1;
6093 cnt_free->pool = pool;
6095 cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6096 rte_spinlock_lock(&cmng->csl[cnt_type]);
6097 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6098 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6104 * Allocate a shared flow counter.
6107 * Pointer to the shared counter configuration.
6109 * Pointer to save the allocated counter index.
6112 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6116 flow_dv_counter_alloc_shared_cb(void *ctx, union mlx5_l3t_data *data)
6118 struct mlx5_shared_counter_conf *conf = ctx;
6119 struct rte_eth_dev *dev = conf->dev;
6120 struct mlx5_flow_counter *cnt;
6122 data->dword = flow_dv_counter_alloc(dev, 0);
6123 data->dword |= MLX5_CNT_SHARED_OFFSET;
6124 cnt = flow_dv_counter_get_by_idx(dev, data->dword, NULL);
6125 cnt->shared_info.id = conf->id;
6130 * Get a shared flow counter.
6133 * Pointer to the Ethernet device structure.
6135 * Counter identifier.
6138 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6141 flow_dv_counter_get_shared(struct rte_eth_dev *dev, uint32_t id)
6143 struct mlx5_priv *priv = dev->data->dev_private;
6144 struct mlx5_shared_counter_conf conf = {
6148 union mlx5_l3t_data data = {
6152 mlx5_l3t_prepare_entry(priv->sh->cnt_id_tbl, id, &data,
6153 flow_dv_counter_alloc_shared_cb, &conf);
6158 * Get age param from counter index.
6161 * Pointer to the Ethernet device structure.
6162 * @param[in] counter
6163 * Index to the counter handler.
6166 * The aging parameter specified for the counter index.
6168 static struct mlx5_age_param*
6169 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6172 struct mlx5_flow_counter *cnt;
6173 struct mlx5_flow_counter_pool *pool = NULL;
6175 flow_dv_counter_get_by_idx(dev, counter, &pool);
6176 counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6177 cnt = MLX5_POOL_GET_CNT(pool, counter);
6178 return MLX5_CNT_TO_AGE(cnt);
6182 * Remove a flow counter from aged counter list.
6185 * Pointer to the Ethernet device structure.
6186 * @param[in] counter
6187 * Index to the counter handler.
6189 * Pointer to the counter handler.
6192 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6193 uint32_t counter, struct mlx5_flow_counter *cnt)
6195 struct mlx5_age_info *age_info;
6196 struct mlx5_age_param *age_param;
6197 struct mlx5_priv *priv = dev->data->dev_private;
6198 uint16_t expected = AGE_CANDIDATE;
6200 age_info = GET_PORT_AGE_INFO(priv);
6201 age_param = flow_dv_counter_idx_get_age(dev, counter);
6202 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6203 AGE_FREE, false, __ATOMIC_RELAXED,
6204 __ATOMIC_RELAXED)) {
6206 * We need the lock even it is age timeout,
6207 * since counter may still in process.
6209 rte_spinlock_lock(&age_info->aged_sl);
6210 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6211 rte_spinlock_unlock(&age_info->aged_sl);
6212 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6217 * Release a flow counter.
6220 * Pointer to the Ethernet device structure.
6221 * @param[in] counter
6222 * Index to the counter handler.
6225 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6227 struct mlx5_priv *priv = dev->data->dev_private;
6228 struct mlx5_flow_counter_pool *pool = NULL;
6229 struct mlx5_flow_counter *cnt;
6230 enum mlx5_counter_type cnt_type;
6234 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6236 if (pool->is_aged) {
6237 flow_dv_counter_remove_from_age(dev, counter, cnt);
6240 * If the counter action is shared by ID, the l3t_clear_entry
6241 * function reduces its references counter. If after the
6242 * reduction the action is still referenced, the function
6243 * returns here and does not release it.
6245 if (IS_LEGACY_SHARED_CNT(counter) &&
6246 mlx5_l3t_clear_entry(priv->sh->cnt_id_tbl,
6247 cnt->shared_info.id))
6250 * If the counter action is shared by indirect action API,
6251 * the atomic function reduces its references counter.
6252 * If after the reduction the action is still referenced, the
6253 * function returns here and does not release it.
6254 * When the counter action is not shared neither by ID nor by
6255 * indirect action API, shared info is 1 before the reduction,
6256 * so this condition is failed and function doesn't return here.
6258 if (!IS_LEGACY_SHARED_CNT(counter) &&
6259 __atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6265 * Put the counter back to list to be updated in none fallback mode.
6266 * Currently, we are using two list alternately, while one is in query,
6267 * add the freed counter to the other list based on the pool query_gen
6268 * value. After query finishes, add counter the list to the global
6269 * container counter list. The list changes while query starts. In
6270 * this case, lock will not be needed as query callback and release
6271 * function both operate with the different list.
6273 if (!priv->sh->cmng.counter_fallback) {
6274 rte_spinlock_lock(&pool->csl);
6275 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6276 rte_spinlock_unlock(&pool->csl);
6278 cnt->dcs_when_free = cnt->dcs_when_active;
6279 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6280 MLX5_COUNTER_TYPE_ORIGIN;
6281 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6282 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6284 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6289 * Resize a meter id container.
6292 * Pointer to the Ethernet device structure.
6295 * 0 on success, otherwise negative errno value and rte_errno is set.
6298 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6300 struct mlx5_priv *priv = dev->data->dev_private;
6301 struct mlx5_aso_mtr_pools_mng *pools_mng =
6302 &priv->sh->mtrmng->pools_mng;
6303 void *old_pools = pools_mng->pools;
6304 uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6305 uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6306 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6313 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6318 memcpy(pools, old_pools, pools_mng->n *
6319 sizeof(struct mlx5_aso_mtr_pool *));
6320 pools_mng->n = resize;
6321 pools_mng->pools = pools;
6323 mlx5_free(old_pools);
6328 * Prepare a new meter and/or a new meter pool.
6331 * Pointer to the Ethernet device structure.
6332 * @param[out] mtr_free
6333 * Where to put the pointer of a new meter.g.
6336 * The meter pool pointer and @mtr_free is set on success,
6337 * NULL otherwise and rte_errno is set.
6339 static struct mlx5_aso_mtr_pool *
6340 flow_dv_mtr_pool_create(struct rte_eth_dev *dev,
6341 struct mlx5_aso_mtr **mtr_free)
6343 struct mlx5_priv *priv = dev->data->dev_private;
6344 struct mlx5_aso_mtr_pools_mng *pools_mng =
6345 &priv->sh->mtrmng->pools_mng;
6346 struct mlx5_aso_mtr_pool *pool = NULL;
6347 struct mlx5_devx_obj *dcs = NULL;
6349 uint32_t log_obj_size;
6351 log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6352 dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->ctx,
6353 priv->sh->pdn, log_obj_size);
6355 rte_errno = ENODATA;
6358 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6361 claim_zero(mlx5_devx_cmd_destroy(dcs));
6364 pool->devx_obj = dcs;
6365 pool->index = pools_mng->n_valid;
6366 if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6368 claim_zero(mlx5_devx_cmd_destroy(dcs));
6371 pools_mng->pools[pool->index] = pool;
6372 pools_mng->n_valid++;
6373 for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6374 pool->mtrs[i].offset = i;
6375 LIST_INSERT_HEAD(&pools_mng->meters,
6376 &pool->mtrs[i], next);
6378 pool->mtrs[0].offset = 0;
6379 *mtr_free = &pool->mtrs[0];
6384 * Release a flow meter into pool.
6387 * Pointer to the Ethernet device structure.
6388 * @param[in] mtr_idx
6389 * Index to aso flow meter.
6392 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6394 struct mlx5_priv *priv = dev->data->dev_private;
6395 struct mlx5_aso_mtr_pools_mng *pools_mng =
6396 &priv->sh->mtrmng->pools_mng;
6397 struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6399 MLX5_ASSERT(aso_mtr);
6400 rte_spinlock_lock(&pools_mng->mtrsl);
6401 memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6402 aso_mtr->state = ASO_METER_FREE;
6403 LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6404 rte_spinlock_unlock(&pools_mng->mtrsl);
6408 * Allocate a aso flow meter.
6411 * Pointer to the Ethernet device structure.
6414 * Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6417 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6419 struct mlx5_priv *priv = dev->data->dev_private;
6420 struct mlx5_aso_mtr *mtr_free = NULL;
6421 struct mlx5_aso_mtr_pools_mng *pools_mng =
6422 &priv->sh->mtrmng->pools_mng;
6423 struct mlx5_aso_mtr_pool *pool;
6424 uint32_t mtr_idx = 0;
6426 if (!priv->config.devx) {
6427 rte_errno = ENOTSUP;
6430 /* Allocate the flow meter memory. */
6431 /* Get free meters from management. */
6432 rte_spinlock_lock(&pools_mng->mtrsl);
6433 mtr_free = LIST_FIRST(&pools_mng->meters);
6435 LIST_REMOVE(mtr_free, next);
6436 if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6437 rte_spinlock_unlock(&pools_mng->mtrsl);
6440 mtr_free->state = ASO_METER_WAIT;
6441 rte_spinlock_unlock(&pools_mng->mtrsl);
6442 pool = container_of(mtr_free,
6443 struct mlx5_aso_mtr_pool,
6444 mtrs[mtr_free->offset]);
6445 mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6446 if (!mtr_free->fm.meter_action) {
6447 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6448 struct rte_flow_error error;
6451 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6452 mtr_free->fm.meter_action =
6453 mlx5_glue->dv_create_flow_action_aso
6454 (priv->sh->rx_domain,
6455 pool->devx_obj->obj,
6457 (1 << MLX5_FLOW_COLOR_GREEN),
6459 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6460 if (!mtr_free->fm.meter_action) {
6461 flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6469 * Verify the @p attributes will be correctly understood by the NIC and store
6470 * them in the @p flow if everything is correct.
6473 * Pointer to dev struct.
6474 * @param[in] attributes
6475 * Pointer to flow attributes
6476 * @param[in] external
6477 * This flow rule is created by request external to PMD.
6479 * Pointer to error structure.
6482 * - 0 on success and non root table.
6483 * - 1 on success and root table.
6484 * - a negative errno value otherwise and rte_errno is set.
6487 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6488 const struct mlx5_flow_tunnel *tunnel,
6489 const struct rte_flow_attr *attributes,
6490 const struct flow_grp_info *grp_info,
6491 struct rte_flow_error *error)
6493 struct mlx5_priv *priv = dev->data->dev_private;
6494 uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6497 #ifndef HAVE_MLX5DV_DR
6498 RTE_SET_USED(tunnel);
6499 RTE_SET_USED(grp_info);
6500 if (attributes->group)
6501 return rte_flow_error_set(error, ENOTSUP,
6502 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6504 "groups are not supported");
6508 ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6513 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6515 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6516 attributes->priority > lowest_priority)
6517 return rte_flow_error_set(error, ENOTSUP,
6518 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6520 "priority out of range");
6521 if (attributes->transfer) {
6522 if (!priv->config.dv_esw_en)
6523 return rte_flow_error_set
6525 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6526 "E-Switch dr is not supported");
6527 if (!(priv->representor || priv->master))
6528 return rte_flow_error_set
6529 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6530 NULL, "E-Switch configuration can only be"
6531 " done by a master or a representor device");
6532 if (attributes->egress)
6533 return rte_flow_error_set
6535 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6536 "egress is not supported");
6538 if (!(attributes->egress ^ attributes->ingress))
6539 return rte_flow_error_set(error, ENOTSUP,
6540 RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6541 "must specify exactly one of "
6542 "ingress or egress");
6547 mlx5_flow_locate_proto_l3(const struct rte_flow_item **head,
6548 const struct rte_flow_item *end)
6550 const struct rte_flow_item *item = *head;
6551 uint16_t l3_protocol;
6553 for (; item != end; item++) {
6554 switch (item->type) {
6557 case RTE_FLOW_ITEM_TYPE_IPV4:
6558 l3_protocol = RTE_ETHER_TYPE_IPV4;
6560 case RTE_FLOW_ITEM_TYPE_IPV6:
6561 l3_protocol = RTE_ETHER_TYPE_IPV6;
6563 case RTE_FLOW_ITEM_TYPE_ETH:
6564 if (item->mask && item->spec) {
6565 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_eth,
6568 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6569 l3_protocol == RTE_ETHER_TYPE_IPV6)
6573 case RTE_FLOW_ITEM_TYPE_VLAN:
6574 if (item->mask && item->spec) {
6575 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_vlan,
6578 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6579 l3_protocol == RTE_ETHER_TYPE_IPV6)
6592 mlx5_flow_locate_proto_l4(const struct rte_flow_item **head,
6593 const struct rte_flow_item *end)
6595 const struct rte_flow_item *item = *head;
6596 uint8_t l4_protocol;
6598 for (; item != end; item++) {
6599 switch (item->type) {
6602 case RTE_FLOW_ITEM_TYPE_TCP:
6603 l4_protocol = IPPROTO_TCP;
6605 case RTE_FLOW_ITEM_TYPE_UDP:
6606 l4_protocol = IPPROTO_UDP;
6608 case RTE_FLOW_ITEM_TYPE_IPV4:
6609 if (item->mask && item->spec) {
6610 const struct rte_flow_item_ipv4 *mask, *spec;
6612 mask = (typeof(mask))item->mask;
6613 spec = (typeof(spec))item->spec;
6614 l4_protocol = mask->hdr.next_proto_id &
6615 spec->hdr.next_proto_id;
6616 if (l4_protocol == IPPROTO_TCP ||
6617 l4_protocol == IPPROTO_UDP)
6621 case RTE_FLOW_ITEM_TYPE_IPV6:
6622 if (item->mask && item->spec) {
6623 const struct rte_flow_item_ipv6 *mask, *spec;
6624 mask = (typeof(mask))item->mask;
6625 spec = (typeof(spec))item->spec;
6626 l4_protocol = mask->hdr.proto & spec->hdr.proto;
6627 if (l4_protocol == IPPROTO_TCP ||
6628 l4_protocol == IPPROTO_UDP)
6641 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6642 const struct rte_flow_item *rule_items,
6643 const struct rte_flow_item *integrity_item,
6644 struct rte_flow_error *error)
6646 struct mlx5_priv *priv = dev->data->dev_private;
6647 const struct rte_flow_item *tunnel_item, *end_item, *item = rule_items;
6648 const struct rte_flow_item_integrity *mask = (typeof(mask))
6649 integrity_item->mask;
6650 const struct rte_flow_item_integrity *spec = (typeof(spec))
6651 integrity_item->spec;
6654 if (!priv->config.hca_attr.pkt_integrity_match)
6655 return rte_flow_error_set(error, ENOTSUP,
6656 RTE_FLOW_ERROR_TYPE_ITEM,
6658 "packet integrity integrity_item not supported");
6660 mask = &rte_flow_item_integrity_mask;
6661 if (!mlx5_validate_integrity_item(mask))
6662 return rte_flow_error_set(error, ENOTSUP,
6663 RTE_FLOW_ERROR_TYPE_ITEM,
6665 "unsupported integrity filter");
6666 tunnel_item = mlx5_flow_find_tunnel_item(rule_items);
6667 if (spec->level > 1) {
6669 return rte_flow_error_set(error, ENOTSUP,
6670 RTE_FLOW_ERROR_TYPE_ITEM,
6672 "missing tunnel item");
6674 end_item = mlx5_find_end_item(tunnel_item);
6676 end_item = tunnel_item ? tunnel_item :
6677 mlx5_find_end_item(integrity_item);
6679 if (mask->l3_ok || mask->ipv4_csum_ok) {
6680 protocol = mlx5_flow_locate_proto_l3(&item, end_item);
6682 return rte_flow_error_set(error, EINVAL,
6683 RTE_FLOW_ERROR_TYPE_ITEM,
6685 "missing L3 protocol");
6687 if (mask->l4_ok || mask->l4_csum_ok) {
6688 protocol = mlx5_flow_locate_proto_l4(&item, end_item);
6690 return rte_flow_error_set(error, EINVAL,
6691 RTE_FLOW_ERROR_TYPE_ITEM,
6693 "missing L4 protocol");
6699 * Internal validation function. For validating both actions and items.
6702 * Pointer to the rte_eth_dev structure.
6704 * Pointer to the flow attributes.
6706 * Pointer to the list of items.
6707 * @param[in] actions
6708 * Pointer to the list of actions.
6709 * @param[in] external
6710 * This flow rule is created by request external to PMD.
6711 * @param[in] hairpin
6712 * Number of hairpin TX actions, 0 means classic flow.
6714 * Pointer to the error structure.
6717 * 0 on success, a negative errno value otherwise and rte_errno is set.
6720 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6721 const struct rte_flow_item items[],
6722 const struct rte_flow_action actions[],
6723 bool external, int hairpin, struct rte_flow_error *error)
6726 uint64_t action_flags = 0;
6727 uint64_t item_flags = 0;
6728 uint64_t last_item = 0;
6729 uint8_t next_protocol = 0xff;
6730 uint16_t ether_type = 0;
6732 uint8_t item_ipv6_proto = 0;
6733 int fdb_mirror_limit = 0;
6734 int modify_after_mirror = 0;
6735 const struct rte_flow_item *geneve_item = NULL;
6736 const struct rte_flow_item *gre_item = NULL;
6737 const struct rte_flow_item *gtp_item = NULL;
6738 const struct rte_flow_action_raw_decap *decap;
6739 const struct rte_flow_action_raw_encap *encap;
6740 const struct rte_flow_action_rss *rss = NULL;
6741 const struct rte_flow_action_rss *sample_rss = NULL;
6742 const struct rte_flow_action_count *sample_count = NULL;
6743 const struct rte_flow_item_tcp nic_tcp_mask = {
6746 .src_port = RTE_BE16(UINT16_MAX),
6747 .dst_port = RTE_BE16(UINT16_MAX),
6750 const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6753 "\xff\xff\xff\xff\xff\xff\xff\xff"
6754 "\xff\xff\xff\xff\xff\xff\xff\xff",
6756 "\xff\xff\xff\xff\xff\xff\xff\xff"
6757 "\xff\xff\xff\xff\xff\xff\xff\xff",
6758 .vtc_flow = RTE_BE32(0xffffffff),
6764 const struct rte_flow_item_ecpri nic_ecpri_mask = {
6768 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6772 .dummy[0] = 0xffffffff,
6775 struct mlx5_priv *priv = dev->data->dev_private;
6776 struct mlx5_dev_config *dev_conf = &priv->config;
6777 uint16_t queue_index = 0xFFFF;
6778 const struct rte_flow_item_vlan *vlan_m = NULL;
6779 uint32_t rw_act_num = 0;
6781 const struct mlx5_flow_tunnel *tunnel;
6782 enum mlx5_tof_rule_type tof_rule_type;
6783 struct flow_grp_info grp_info = {
6784 .external = !!external,
6785 .transfer = !!attr->transfer,
6786 .fdb_def_rule = !!priv->fdb_def_rule,
6787 .std_tbl_fix = true,
6789 const struct rte_eth_hairpin_conf *conf;
6790 const struct rte_flow_item *rule_items = items;
6791 const struct rte_flow_item *port_id_item = NULL;
6792 bool def_policy = false;
6796 tunnel = is_tunnel_offload_active(dev) ?
6797 mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6799 if (priv->representor)
6800 return rte_flow_error_set
6802 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6803 NULL, "decap not supported for VF representor");
6804 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6805 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6806 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6807 action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6808 MLX5_FLOW_ACTION_DECAP;
6809 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6810 (dev, attr, tunnel, tof_rule_type);
6812 ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6815 is_root = (uint64_t)ret;
6816 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6817 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6818 int type = items->type;
6820 if (!mlx5_flow_os_item_supported(type))
6821 return rte_flow_error_set(error, ENOTSUP,
6822 RTE_FLOW_ERROR_TYPE_ITEM,
6823 NULL, "item not supported");
6825 case RTE_FLOW_ITEM_TYPE_VOID:
6827 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6828 ret = flow_dv_validate_item_port_id
6829 (dev, items, attr, item_flags, error);
6832 last_item = MLX5_FLOW_ITEM_PORT_ID;
6833 port_id_item = items;
6835 case RTE_FLOW_ITEM_TYPE_ETH:
6836 ret = mlx5_flow_validate_item_eth(items, item_flags,
6840 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6841 MLX5_FLOW_LAYER_OUTER_L2;
6842 if (items->mask != NULL && items->spec != NULL) {
6844 ((const struct rte_flow_item_eth *)
6847 ((const struct rte_flow_item_eth *)
6849 ether_type = rte_be_to_cpu_16(ether_type);
6854 case RTE_FLOW_ITEM_TYPE_VLAN:
6855 ret = flow_dv_validate_item_vlan(items, item_flags,
6859 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6860 MLX5_FLOW_LAYER_OUTER_VLAN;
6861 if (items->mask != NULL && items->spec != NULL) {
6863 ((const struct rte_flow_item_vlan *)
6864 items->spec)->inner_type;
6866 ((const struct rte_flow_item_vlan *)
6867 items->mask)->inner_type;
6868 ether_type = rte_be_to_cpu_16(ether_type);
6872 /* Store outer VLAN mask for of_push_vlan action. */
6874 vlan_m = items->mask;
6876 case RTE_FLOW_ITEM_TYPE_IPV4:
6877 mlx5_flow_tunnel_ip_check(items, next_protocol,
6878 &item_flags, &tunnel);
6879 ret = flow_dv_validate_item_ipv4(items, item_flags,
6880 last_item, ether_type,
6884 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
6885 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
6886 if (items->mask != NULL &&
6887 ((const struct rte_flow_item_ipv4 *)
6888 items->mask)->hdr.next_proto_id) {
6890 ((const struct rte_flow_item_ipv4 *)
6891 (items->spec))->hdr.next_proto_id;
6893 ((const struct rte_flow_item_ipv4 *)
6894 (items->mask))->hdr.next_proto_id;
6896 /* Reset for inner layer. */
6897 next_protocol = 0xff;
6900 case RTE_FLOW_ITEM_TYPE_IPV6:
6901 mlx5_flow_tunnel_ip_check(items, next_protocol,
6902 &item_flags, &tunnel);
6903 ret = mlx5_flow_validate_item_ipv6(items, item_flags,
6910 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
6911 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
6912 if (items->mask != NULL &&
6913 ((const struct rte_flow_item_ipv6 *)
6914 items->mask)->hdr.proto) {
6916 ((const struct rte_flow_item_ipv6 *)
6917 items->spec)->hdr.proto;
6919 ((const struct rte_flow_item_ipv6 *)
6920 items->spec)->hdr.proto;
6922 ((const struct rte_flow_item_ipv6 *)
6923 items->mask)->hdr.proto;
6925 /* Reset for inner layer. */
6926 next_protocol = 0xff;
6929 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
6930 ret = flow_dv_validate_item_ipv6_frag_ext(items,
6935 last_item = tunnel ?
6936 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
6937 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
6938 if (items->mask != NULL &&
6939 ((const struct rte_flow_item_ipv6_frag_ext *)
6940 items->mask)->hdr.next_header) {
6942 ((const struct rte_flow_item_ipv6_frag_ext *)
6943 items->spec)->hdr.next_header;
6945 ((const struct rte_flow_item_ipv6_frag_ext *)
6946 items->mask)->hdr.next_header;
6948 /* Reset for inner layer. */
6949 next_protocol = 0xff;
6952 case RTE_FLOW_ITEM_TYPE_TCP:
6953 ret = mlx5_flow_validate_item_tcp
6960 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
6961 MLX5_FLOW_LAYER_OUTER_L4_TCP;
6963 case RTE_FLOW_ITEM_TYPE_UDP:
6964 ret = mlx5_flow_validate_item_udp(items, item_flags,
6969 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
6970 MLX5_FLOW_LAYER_OUTER_L4_UDP;
6972 case RTE_FLOW_ITEM_TYPE_GRE:
6973 ret = mlx5_flow_validate_item_gre(items, item_flags,
6974 next_protocol, error);
6978 last_item = MLX5_FLOW_LAYER_GRE;
6980 case RTE_FLOW_ITEM_TYPE_NVGRE:
6981 ret = mlx5_flow_validate_item_nvgre(items, item_flags,
6986 last_item = MLX5_FLOW_LAYER_NVGRE;
6988 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
6989 ret = mlx5_flow_validate_item_gre_key
6990 (items, item_flags, gre_item, error);
6993 last_item = MLX5_FLOW_LAYER_GRE_KEY;
6995 case RTE_FLOW_ITEM_TYPE_VXLAN:
6996 ret = mlx5_flow_validate_item_vxlan(dev, items,
7001 last_item = MLX5_FLOW_LAYER_VXLAN;
7003 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7004 ret = mlx5_flow_validate_item_vxlan_gpe(items,
7009 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7011 case RTE_FLOW_ITEM_TYPE_GENEVE:
7012 ret = mlx5_flow_validate_item_geneve(items,
7017 geneve_item = items;
7018 last_item = MLX5_FLOW_LAYER_GENEVE;
7020 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7021 ret = mlx5_flow_validate_item_geneve_opt(items,
7028 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7030 case RTE_FLOW_ITEM_TYPE_MPLS:
7031 ret = mlx5_flow_validate_item_mpls(dev, items,
7036 last_item = MLX5_FLOW_LAYER_MPLS;
7039 case RTE_FLOW_ITEM_TYPE_MARK:
7040 ret = flow_dv_validate_item_mark(dev, items, attr,
7044 last_item = MLX5_FLOW_ITEM_MARK;
7046 case RTE_FLOW_ITEM_TYPE_META:
7047 ret = flow_dv_validate_item_meta(dev, items, attr,
7051 last_item = MLX5_FLOW_ITEM_METADATA;
7053 case RTE_FLOW_ITEM_TYPE_ICMP:
7054 ret = mlx5_flow_validate_item_icmp(items, item_flags,
7059 last_item = MLX5_FLOW_LAYER_ICMP;
7061 case RTE_FLOW_ITEM_TYPE_ICMP6:
7062 ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7067 item_ipv6_proto = IPPROTO_ICMPV6;
7068 last_item = MLX5_FLOW_LAYER_ICMP6;
7070 case RTE_FLOW_ITEM_TYPE_TAG:
7071 ret = flow_dv_validate_item_tag(dev, items,
7075 last_item = MLX5_FLOW_ITEM_TAG;
7077 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7078 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7080 case RTE_FLOW_ITEM_TYPE_GTP:
7081 ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7086 last_item = MLX5_FLOW_LAYER_GTP;
7088 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7089 ret = flow_dv_validate_item_gtp_psc(items, last_item,
7094 last_item = MLX5_FLOW_LAYER_GTP_PSC;
7096 case RTE_FLOW_ITEM_TYPE_ECPRI:
7097 /* Capacity will be checked in the translate stage. */
7098 ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7105 last_item = MLX5_FLOW_LAYER_ECPRI;
7107 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7108 if (item_flags & MLX5_FLOW_ITEM_INTEGRITY)
7109 return rte_flow_error_set
7111 RTE_FLOW_ERROR_TYPE_ITEM,
7112 NULL, "multiple integrity items not supported");
7113 ret = flow_dv_validate_item_integrity(dev, rule_items,
7117 last_item = MLX5_FLOW_ITEM_INTEGRITY;
7119 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7120 ret = flow_dv_validate_item_aso_ct(dev, items,
7121 &item_flags, error);
7125 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7126 /* tunnel offload item was processed before
7127 * list it here as a supported type
7131 return rte_flow_error_set(error, ENOTSUP,
7132 RTE_FLOW_ERROR_TYPE_ITEM,
7133 NULL, "item not supported");
7135 item_flags |= last_item;
7137 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7138 int type = actions->type;
7139 bool shared_count = false;
7141 if (!mlx5_flow_os_action_supported(type))
7142 return rte_flow_error_set(error, ENOTSUP,
7143 RTE_FLOW_ERROR_TYPE_ACTION,
7145 "action not supported");
7146 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7147 return rte_flow_error_set(error, ENOTSUP,
7148 RTE_FLOW_ERROR_TYPE_ACTION,
7149 actions, "too many actions");
7151 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7152 return rte_flow_error_set(error, ENOTSUP,
7153 RTE_FLOW_ERROR_TYPE_ACTION,
7154 NULL, "meter action with policy "
7155 "must be the last action");
7157 case RTE_FLOW_ACTION_TYPE_VOID:
7159 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7160 ret = flow_dv_validate_action_port_id(dev,
7167 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7170 case RTE_FLOW_ACTION_TYPE_FLAG:
7171 ret = flow_dv_validate_action_flag(dev, action_flags,
7175 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7176 /* Count all modify-header actions as one. */
7177 if (!(action_flags &
7178 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7180 action_flags |= MLX5_FLOW_ACTION_FLAG |
7181 MLX5_FLOW_ACTION_MARK_EXT;
7182 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7183 modify_after_mirror = 1;
7186 action_flags |= MLX5_FLOW_ACTION_FLAG;
7189 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7191 case RTE_FLOW_ACTION_TYPE_MARK:
7192 ret = flow_dv_validate_action_mark(dev, actions,
7197 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7198 /* Count all modify-header actions as one. */
7199 if (!(action_flags &
7200 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7202 action_flags |= MLX5_FLOW_ACTION_MARK |
7203 MLX5_FLOW_ACTION_MARK_EXT;
7204 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7205 modify_after_mirror = 1;
7207 action_flags |= MLX5_FLOW_ACTION_MARK;
7210 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7212 case RTE_FLOW_ACTION_TYPE_SET_META:
7213 ret = flow_dv_validate_action_set_meta(dev, actions,
7218 /* Count all modify-header actions as one action. */
7219 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7221 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7222 modify_after_mirror = 1;
7223 action_flags |= MLX5_FLOW_ACTION_SET_META;
7224 rw_act_num += MLX5_ACT_NUM_SET_META;
7226 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7227 ret = flow_dv_validate_action_set_tag(dev, actions,
7232 /* Count all modify-header actions as one action. */
7233 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7235 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7236 modify_after_mirror = 1;
7237 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7238 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7240 case RTE_FLOW_ACTION_TYPE_DROP:
7241 ret = mlx5_flow_validate_action_drop(action_flags,
7245 action_flags |= MLX5_FLOW_ACTION_DROP;
7248 case RTE_FLOW_ACTION_TYPE_QUEUE:
7249 ret = mlx5_flow_validate_action_queue(actions,
7254 queue_index = ((const struct rte_flow_action_queue *)
7255 (actions->conf))->index;
7256 action_flags |= MLX5_FLOW_ACTION_QUEUE;
7259 case RTE_FLOW_ACTION_TYPE_RSS:
7260 rss = actions->conf;
7261 ret = mlx5_flow_validate_action_rss(actions,
7267 if (rss && sample_rss &&
7268 (sample_rss->level != rss->level ||
7269 sample_rss->types != rss->types))
7270 return rte_flow_error_set(error, ENOTSUP,
7271 RTE_FLOW_ERROR_TYPE_ACTION,
7273 "Can't use the different RSS types "
7274 "or level in the same flow");
7275 if (rss != NULL && rss->queue_num)
7276 queue_index = rss->queue[0];
7277 action_flags |= MLX5_FLOW_ACTION_RSS;
7280 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7282 mlx5_flow_validate_action_default_miss(action_flags,
7286 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7289 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7290 case RTE_FLOW_ACTION_TYPE_COUNT:
7291 shared_count = is_shared_action_count(actions);
7292 ret = flow_dv_validate_action_count(dev, shared_count,
7297 action_flags |= MLX5_FLOW_ACTION_COUNT;
7300 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7301 if (flow_dv_validate_action_pop_vlan(dev,
7307 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7308 modify_after_mirror = 1;
7309 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7312 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7313 ret = flow_dv_validate_action_push_vlan(dev,
7320 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7321 modify_after_mirror = 1;
7322 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7325 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7326 ret = flow_dv_validate_action_set_vlan_pcp
7327 (action_flags, actions, error);
7330 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7331 modify_after_mirror = 1;
7332 /* Count PCP with push_vlan command. */
7333 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7335 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7336 ret = flow_dv_validate_action_set_vlan_vid
7337 (item_flags, action_flags,
7341 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7342 modify_after_mirror = 1;
7343 /* Count VID with push_vlan command. */
7344 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7345 rw_act_num += MLX5_ACT_NUM_MDF_VID;
7347 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7348 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7349 ret = flow_dv_validate_action_l2_encap(dev,
7355 action_flags |= MLX5_FLOW_ACTION_ENCAP;
7358 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7359 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7360 ret = flow_dv_validate_action_decap(dev, action_flags,
7361 actions, item_flags,
7365 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7366 modify_after_mirror = 1;
7367 action_flags |= MLX5_FLOW_ACTION_DECAP;
7370 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7371 ret = flow_dv_validate_action_raw_encap_decap
7372 (dev, NULL, actions->conf, attr, &action_flags,
7373 &actions_n, actions, item_flags, error);
7377 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7378 decap = actions->conf;
7379 while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7381 if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7385 encap = actions->conf;
7387 ret = flow_dv_validate_action_raw_encap_decap
7389 decap ? decap : &empty_decap, encap,
7390 attr, &action_flags, &actions_n,
7391 actions, item_flags, error);
7394 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7395 (action_flags & MLX5_FLOW_ACTION_DECAP))
7396 modify_after_mirror = 1;
7398 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7399 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7400 ret = flow_dv_validate_action_modify_mac(action_flags,
7406 /* Count all modify-header actions as one action. */
7407 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7409 action_flags |= actions->type ==
7410 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7411 MLX5_FLOW_ACTION_SET_MAC_SRC :
7412 MLX5_FLOW_ACTION_SET_MAC_DST;
7413 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7414 modify_after_mirror = 1;
7416 * Even if the source and destination MAC addresses have
7417 * overlap in the header with 4B alignment, the convert
7418 * function will handle them separately and 4 SW actions
7419 * will be created. And 2 actions will be added each
7420 * time no matter how many bytes of address will be set.
7422 rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7424 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7425 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7426 ret = flow_dv_validate_action_modify_ipv4(action_flags,
7432 /* Count all modify-header actions as one action. */
7433 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7435 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7436 modify_after_mirror = 1;
7437 action_flags |= actions->type ==
7438 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7439 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7440 MLX5_FLOW_ACTION_SET_IPV4_DST;
7441 rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7443 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7444 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7445 ret = flow_dv_validate_action_modify_ipv6(action_flags,
7451 if (item_ipv6_proto == IPPROTO_ICMPV6)
7452 return rte_flow_error_set(error, ENOTSUP,
7453 RTE_FLOW_ERROR_TYPE_ACTION,
7455 "Can't change header "
7456 "with ICMPv6 proto");
7457 /* Count all modify-header actions as one action. */
7458 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7460 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7461 modify_after_mirror = 1;
7462 action_flags |= actions->type ==
7463 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7464 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7465 MLX5_FLOW_ACTION_SET_IPV6_DST;
7466 rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7468 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7469 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7470 ret = flow_dv_validate_action_modify_tp(action_flags,
7476 /* Count all modify-header actions as one action. */
7477 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7479 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7480 modify_after_mirror = 1;
7481 action_flags |= actions->type ==
7482 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7483 MLX5_FLOW_ACTION_SET_TP_SRC :
7484 MLX5_FLOW_ACTION_SET_TP_DST;
7485 rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7487 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7488 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7489 ret = flow_dv_validate_action_modify_ttl(action_flags,
7495 /* Count all modify-header actions as one action. */
7496 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7498 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7499 modify_after_mirror = 1;
7500 action_flags |= actions->type ==
7501 RTE_FLOW_ACTION_TYPE_SET_TTL ?
7502 MLX5_FLOW_ACTION_SET_TTL :
7503 MLX5_FLOW_ACTION_DEC_TTL;
7504 rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7506 case RTE_FLOW_ACTION_TYPE_JUMP:
7507 ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7513 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7515 return rte_flow_error_set(error, EINVAL,
7516 RTE_FLOW_ERROR_TYPE_ACTION,
7518 "sample and jump action combination is not supported");
7520 action_flags |= MLX5_FLOW_ACTION_JUMP;
7522 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7523 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7524 ret = flow_dv_validate_action_modify_tcp_seq
7531 /* Count all modify-header actions as one action. */
7532 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7534 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7535 modify_after_mirror = 1;
7536 action_flags |= actions->type ==
7537 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7538 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7539 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7540 rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7542 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7543 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7544 ret = flow_dv_validate_action_modify_tcp_ack
7551 /* Count all modify-header actions as one action. */
7552 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7554 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7555 modify_after_mirror = 1;
7556 action_flags |= actions->type ==
7557 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7558 MLX5_FLOW_ACTION_INC_TCP_ACK :
7559 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7560 rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7562 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7564 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7565 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7566 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7568 case RTE_FLOW_ACTION_TYPE_METER:
7569 ret = mlx5_flow_validate_action_meter(dev,
7577 action_flags |= MLX5_FLOW_ACTION_METER;
7580 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7582 /* Meter action will add one more TAG action. */
7583 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7585 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7586 if (!attr->transfer && !attr->group)
7587 return rte_flow_error_set(error, ENOTSUP,
7588 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7590 "Shared ASO age action is not supported for group 0");
7591 if (action_flags & MLX5_FLOW_ACTION_AGE)
7592 return rte_flow_error_set
7594 RTE_FLOW_ERROR_TYPE_ACTION,
7596 "duplicate age actions set");
7597 action_flags |= MLX5_FLOW_ACTION_AGE;
7600 case RTE_FLOW_ACTION_TYPE_AGE:
7601 ret = flow_dv_validate_action_age(action_flags,
7607 * Validate the regular AGE action (using counter)
7608 * mutual exclusion with share counter actions.
7610 if (!priv->sh->flow_hit_aso_en) {
7612 return rte_flow_error_set
7614 RTE_FLOW_ERROR_TYPE_ACTION,
7616 "old age and shared count combination is not supported");
7618 return rte_flow_error_set
7620 RTE_FLOW_ERROR_TYPE_ACTION,
7622 "old age action and count must be in the same sub flow");
7624 action_flags |= MLX5_FLOW_ACTION_AGE;
7627 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7628 ret = flow_dv_validate_action_modify_ipv4_dscp
7635 /* Count all modify-header actions as one action. */
7636 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7638 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7639 modify_after_mirror = 1;
7640 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7641 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7643 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7644 ret = flow_dv_validate_action_modify_ipv6_dscp
7651 /* Count all modify-header actions as one action. */
7652 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7654 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7655 modify_after_mirror = 1;
7656 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7657 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7659 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7660 ret = flow_dv_validate_action_sample(&action_flags,
7669 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7672 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7673 ret = flow_dv_validate_action_modify_field(dev,
7680 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7681 modify_after_mirror = 1;
7682 /* Count all modify-header actions as one action. */
7683 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7685 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7688 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7689 ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7694 action_flags |= MLX5_FLOW_ACTION_CT;
7696 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7697 /* tunnel offload action was processed before
7698 * list it here as a supported type
7702 return rte_flow_error_set(error, ENOTSUP,
7703 RTE_FLOW_ERROR_TYPE_ACTION,
7705 "action not supported");
7709 * Validate actions in flow rules
7710 * - Explicit decap action is prohibited by the tunnel offload API.
7711 * - Drop action in tunnel steer rule is prohibited by the API.
7712 * - Application cannot use MARK action because it's value can mask
7713 * tunnel default miss nitification.
7714 * - JUMP in tunnel match rule has no support in current PMD
7716 * - TAG & META are reserved for future uses.
7718 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7719 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP |
7720 MLX5_FLOW_ACTION_MARK |
7721 MLX5_FLOW_ACTION_SET_TAG |
7722 MLX5_FLOW_ACTION_SET_META |
7723 MLX5_FLOW_ACTION_DROP;
7725 if (action_flags & bad_actions_mask)
7726 return rte_flow_error_set
7728 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7729 "Invalid RTE action in tunnel "
7731 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7732 return rte_flow_error_set
7734 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7735 "tunnel set decap rule must terminate "
7738 return rte_flow_error_set
7740 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7741 "tunnel flows for ingress traffic only");
7743 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7744 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP |
7745 MLX5_FLOW_ACTION_MARK |
7746 MLX5_FLOW_ACTION_SET_TAG |
7747 MLX5_FLOW_ACTION_SET_META;
7749 if (action_flags & bad_actions_mask)
7750 return rte_flow_error_set
7752 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7753 "Invalid RTE action in tunnel "
7757 * Validate the drop action mutual exclusion with other actions.
7758 * Drop action is mutually-exclusive with any other action, except for
7760 * Drop action compatibility with tunnel offload was already validated.
7762 if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7763 MLX5_FLOW_ACTION_TUNNEL_MATCH));
7764 else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7765 (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7766 return rte_flow_error_set(error, EINVAL,
7767 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7768 "Drop action is mutually-exclusive "
7769 "with any other action, except for "
7771 /* Eswitch has few restrictions on using items and actions */
7772 if (attr->transfer) {
7773 if (!mlx5_flow_ext_mreg_supported(dev) &&
7774 action_flags & MLX5_FLOW_ACTION_FLAG)
7775 return rte_flow_error_set(error, ENOTSUP,
7776 RTE_FLOW_ERROR_TYPE_ACTION,
7778 "unsupported action FLAG");
7779 if (!mlx5_flow_ext_mreg_supported(dev) &&
7780 action_flags & MLX5_FLOW_ACTION_MARK)
7781 return rte_flow_error_set(error, ENOTSUP,
7782 RTE_FLOW_ERROR_TYPE_ACTION,
7784 "unsupported action MARK");
7785 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7786 return rte_flow_error_set(error, ENOTSUP,
7787 RTE_FLOW_ERROR_TYPE_ACTION,
7789 "unsupported action QUEUE");
7790 if (action_flags & MLX5_FLOW_ACTION_RSS)
7791 return rte_flow_error_set(error, ENOTSUP,
7792 RTE_FLOW_ERROR_TYPE_ACTION,
7794 "unsupported action RSS");
7795 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7796 return rte_flow_error_set(error, EINVAL,
7797 RTE_FLOW_ERROR_TYPE_ACTION,
7799 "no fate action is found");
7801 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7802 return rte_flow_error_set(error, EINVAL,
7803 RTE_FLOW_ERROR_TYPE_ACTION,
7805 "no fate action is found");
7808 * Continue validation for Xcap and VLAN actions.
7809 * If hairpin is working in explicit TX rule mode, there is no actions
7810 * splitting and the validation of hairpin ingress flow should be the
7811 * same as other standard flows.
7813 if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7814 MLX5_FLOW_VLAN_ACTIONS)) &&
7815 (queue_index == 0xFFFF ||
7816 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7817 ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7818 conf->tx_explicit != 0))) {
7819 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7820 MLX5_FLOW_XCAP_ACTIONS)
7821 return rte_flow_error_set(error, ENOTSUP,
7822 RTE_FLOW_ERROR_TYPE_ACTION,
7823 NULL, "encap and decap "
7824 "combination aren't supported");
7825 if (!attr->transfer && attr->ingress) {
7826 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7827 return rte_flow_error_set
7829 RTE_FLOW_ERROR_TYPE_ACTION,
7830 NULL, "encap is not supported"
7831 " for ingress traffic");
7832 else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7833 return rte_flow_error_set
7835 RTE_FLOW_ERROR_TYPE_ACTION,
7836 NULL, "push VLAN action not "
7837 "supported for ingress");
7838 else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7839 MLX5_FLOW_VLAN_ACTIONS)
7840 return rte_flow_error_set
7842 RTE_FLOW_ERROR_TYPE_ACTION,
7843 NULL, "no support for "
7844 "multiple VLAN actions");
7847 if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7848 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7849 ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7851 return rte_flow_error_set
7853 RTE_FLOW_ERROR_TYPE_ACTION,
7854 NULL, "fate action not supported for "
7855 "meter with policy");
7857 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7858 return rte_flow_error_set
7860 RTE_FLOW_ERROR_TYPE_ACTION,
7861 NULL, "modify header action in egress "
7862 "cannot be done before meter action");
7863 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7864 return rte_flow_error_set
7866 RTE_FLOW_ERROR_TYPE_ACTION,
7867 NULL, "encap action in egress "
7868 "cannot be done before meter action");
7869 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7870 return rte_flow_error_set
7872 RTE_FLOW_ERROR_TYPE_ACTION,
7873 NULL, "push vlan action in egress "
7874 "cannot be done before meter action");
7878 * Hairpin flow will add one more TAG action in TX implicit mode.
7879 * In TX explicit mode, there will be no hairpin flow ID.
7882 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7883 /* extra metadata enabled: one more TAG action will be add. */
7884 if (dev_conf->dv_flow_en &&
7885 dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
7886 mlx5_flow_ext_mreg_supported(dev))
7887 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7889 flow_dv_modify_hdr_action_max(dev, is_root)) {
7890 return rte_flow_error_set(error, ENOTSUP,
7891 RTE_FLOW_ERROR_TYPE_ACTION,
7892 NULL, "too many header modify"
7893 " actions to support");
7895 /* Eswitch egress mirror and modify flow has limitation on CX5 */
7896 if (fdb_mirror_limit && modify_after_mirror)
7897 return rte_flow_error_set(error, EINVAL,
7898 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7899 "sample before modify action is not supported");
7904 * Internal preparation function. Allocates the DV flow size,
7905 * this size is constant.
7908 * Pointer to the rte_eth_dev structure.
7910 * Pointer to the flow attributes.
7912 * Pointer to the list of items.
7913 * @param[in] actions
7914 * Pointer to the list of actions.
7916 * Pointer to the error structure.
7919 * Pointer to mlx5_flow object on success,
7920 * otherwise NULL and rte_errno is set.
7922 static struct mlx5_flow *
7923 flow_dv_prepare(struct rte_eth_dev *dev,
7924 const struct rte_flow_attr *attr __rte_unused,
7925 const struct rte_flow_item items[] __rte_unused,
7926 const struct rte_flow_action actions[] __rte_unused,
7927 struct rte_flow_error *error)
7929 uint32_t handle_idx = 0;
7930 struct mlx5_flow *dev_flow;
7931 struct mlx5_flow_handle *dev_handle;
7932 struct mlx5_priv *priv = dev->data->dev_private;
7933 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
7936 wks->skip_matcher_reg = 0;
7938 wks->final_policy = NULL;
7939 /* In case of corrupting the memory. */
7940 if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
7941 rte_flow_error_set(error, ENOSPC,
7942 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7943 "not free temporary device flow");
7946 dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
7949 rte_flow_error_set(error, ENOMEM,
7950 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7951 "not enough memory to create flow handle");
7954 MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
7955 dev_flow = &wks->flows[wks->flow_idx++];
7956 memset(dev_flow, 0, sizeof(*dev_flow));
7957 dev_flow->handle = dev_handle;
7958 dev_flow->handle_idx = handle_idx;
7959 dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
7960 dev_flow->ingress = attr->ingress;
7961 dev_flow->dv.transfer = attr->transfer;
7965 #ifdef RTE_LIBRTE_MLX5_DEBUG
7967 * Sanity check for match mask and value. Similar to check_valid_spec() in
7968 * kernel driver. If unmasked bit is present in value, it returns failure.
7971 * pointer to match mask buffer.
7972 * @param match_value
7973 * pointer to match value buffer.
7976 * 0 if valid, -EINVAL otherwise.
7979 flow_dv_check_valid_spec(void *match_mask, void *match_value)
7981 uint8_t *m = match_mask;
7982 uint8_t *v = match_value;
7985 for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
7988 "match_value differs from match_criteria"
7989 " %p[%u] != %p[%u]",
7990 match_value, i, match_mask, i);
7999 * Add match of ip_version.
8003 * @param[in] headers_v
8004 * Values header pointer.
8005 * @param[in] headers_m
8006 * Masks header pointer.
8007 * @param[in] ip_version
8008 * The IP version to set.
8011 flow_dv_set_match_ip_version(uint32_t group,
8017 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8019 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8021 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8022 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8023 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8027 * Add Ethernet item to matcher and to the value.
8029 * @param[in, out] matcher
8031 * @param[in, out] key
8032 * Flow matcher value.
8034 * Flow pattern to translate.
8036 * Item is inner pattern.
8039 flow_dv_translate_item_eth(void *matcher, void *key,
8040 const struct rte_flow_item *item, int inner,
8043 const struct rte_flow_item_eth *eth_m = item->mask;
8044 const struct rte_flow_item_eth *eth_v = item->spec;
8045 const struct rte_flow_item_eth nic_mask = {
8046 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8047 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8048 .type = RTE_BE16(0xffff),
8061 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8063 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8065 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8067 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8069 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8070 ð_m->dst, sizeof(eth_m->dst));
8071 /* The value must be in the range of the mask. */
8072 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8073 for (i = 0; i < sizeof(eth_m->dst); ++i)
8074 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8075 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8076 ð_m->src, sizeof(eth_m->src));
8077 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8078 /* The value must be in the range of the mask. */
8079 for (i = 0; i < sizeof(eth_m->dst); ++i)
8080 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8082 * HW supports match on one Ethertype, the Ethertype following the last
8083 * VLAN tag of the packet (see PRM).
8084 * Set match on ethertype only if ETH header is not followed by VLAN.
8085 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8086 * ethertype, and use ip_version field instead.
8087 * eCPRI over Ether layer will use type value 0xAEFE.
8089 if (eth_m->type == 0xFFFF) {
8090 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8091 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8092 switch (eth_v->type) {
8093 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8094 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8096 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8097 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8098 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8100 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8101 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8103 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8104 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8110 if (eth_m->has_vlan) {
8111 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8112 if (eth_v->has_vlan) {
8114 * Here, when also has_more_vlan field in VLAN item is
8115 * not set, only single-tagged packets will be matched.
8117 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8121 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8122 rte_be_to_cpu_16(eth_m->type));
8123 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8124 *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8128 * Add VLAN item to matcher and to the value.
8130 * @param[in, out] dev_flow
8132 * @param[in, out] matcher
8134 * @param[in, out] key
8135 * Flow matcher value.
8137 * Flow pattern to translate.
8139 * Item is inner pattern.
8142 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8143 void *matcher, void *key,
8144 const struct rte_flow_item *item,
8145 int inner, uint32_t group)
8147 const struct rte_flow_item_vlan *vlan_m = item->mask;
8148 const struct rte_flow_item_vlan *vlan_v = item->spec;
8155 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8157 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8159 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8161 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8163 * This is workaround, masks are not supported,
8164 * and pre-validated.
8167 dev_flow->handle->vf_vlan.tag =
8168 rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8171 * When VLAN item exists in flow, mark packet as tagged,
8172 * even if TCI is not specified.
8174 if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8175 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8176 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8181 vlan_m = &rte_flow_item_vlan_mask;
8182 tci_m = rte_be_to_cpu_16(vlan_m->tci);
8183 tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8184 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8185 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8186 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8187 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8188 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8189 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8191 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8192 * ethertype, and use ip_version field instead.
8194 if (vlan_m->inner_type == 0xFFFF) {
8195 switch (vlan_v->inner_type) {
8196 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8197 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8198 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8199 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8201 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8202 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8204 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8205 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8211 if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8212 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8213 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8214 /* Only one vlan_tag bit can be set. */
8215 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8218 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8219 rte_be_to_cpu_16(vlan_m->inner_type));
8220 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8221 rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8225 * Add IPV4 item to matcher and to the value.
8227 * @param[in, out] matcher
8229 * @param[in, out] key
8230 * Flow matcher value.
8232 * Flow pattern to translate.
8234 * Item is inner pattern.
8236 * The group to insert the rule.
8239 flow_dv_translate_item_ipv4(void *matcher, void *key,
8240 const struct rte_flow_item *item,
8241 int inner, uint32_t group)
8243 const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8244 const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8245 const struct rte_flow_item_ipv4 nic_mask = {
8247 .src_addr = RTE_BE32(0xffffffff),
8248 .dst_addr = RTE_BE32(0xffffffff),
8249 .type_of_service = 0xff,
8250 .next_proto_id = 0xff,
8251 .time_to_live = 0xff,
8261 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8263 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8265 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8267 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8269 flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8274 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8275 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8276 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8277 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8278 *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8279 *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8280 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8281 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8282 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8283 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8284 *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8285 *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8286 tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8287 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8288 ipv4_m->hdr.type_of_service);
8289 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8290 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8291 ipv4_m->hdr.type_of_service >> 2);
8292 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8293 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8294 ipv4_m->hdr.next_proto_id);
8295 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8296 ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8297 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8298 ipv4_m->hdr.time_to_live);
8299 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8300 ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8301 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8302 !!(ipv4_m->hdr.fragment_offset));
8303 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8304 !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8308 * Add IPV6 item to matcher and to the value.
8310 * @param[in, out] matcher
8312 * @param[in, out] key
8313 * Flow matcher value.
8315 * Flow pattern to translate.
8317 * Item is inner pattern.
8319 * The group to insert the rule.
8322 flow_dv_translate_item_ipv6(void *matcher, void *key,
8323 const struct rte_flow_item *item,
8324 int inner, uint32_t group)
8326 const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8327 const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8328 const struct rte_flow_item_ipv6 nic_mask = {
8331 "\xff\xff\xff\xff\xff\xff\xff\xff"
8332 "\xff\xff\xff\xff\xff\xff\xff\xff",
8334 "\xff\xff\xff\xff\xff\xff\xff\xff"
8335 "\xff\xff\xff\xff\xff\xff\xff\xff",
8336 .vtc_flow = RTE_BE32(0xffffffff),
8343 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8344 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8353 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8355 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8357 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8359 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8361 flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8366 size = sizeof(ipv6_m->hdr.dst_addr);
8367 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8368 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8369 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8370 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8371 memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8372 for (i = 0; i < size; ++i)
8373 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8374 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8375 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8376 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8377 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8378 memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8379 for (i = 0; i < size; ++i)
8380 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8382 vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8383 vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8384 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8385 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8386 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8387 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8390 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8392 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8395 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8397 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8401 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8403 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8404 ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8406 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8407 ipv6_m->hdr.hop_limits);
8408 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8409 ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8410 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8411 !!(ipv6_m->has_frag_ext));
8412 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8413 !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8417 * Add IPV6 fragment extension item to matcher and to the value.
8419 * @param[in, out] matcher
8421 * @param[in, out] key
8422 * Flow matcher value.
8424 * Flow pattern to translate.
8426 * Item is inner pattern.
8429 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8430 const struct rte_flow_item *item,
8433 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8434 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8435 const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8437 .next_header = 0xff,
8438 .frag_data = RTE_BE16(0xffff),
8445 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8447 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8449 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8451 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8453 /* IPv6 fragment extension item exists, so packet is IP fragment. */
8454 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8455 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8456 if (!ipv6_frag_ext_v)
8458 if (!ipv6_frag_ext_m)
8459 ipv6_frag_ext_m = &nic_mask;
8460 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8461 ipv6_frag_ext_m->hdr.next_header);
8462 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8463 ipv6_frag_ext_v->hdr.next_header &
8464 ipv6_frag_ext_m->hdr.next_header);
8468 * Add TCP item to matcher and to the value.
8470 * @param[in, out] matcher
8472 * @param[in, out] key
8473 * Flow matcher value.
8475 * Flow pattern to translate.
8477 * Item is inner pattern.
8480 flow_dv_translate_item_tcp(void *matcher, void *key,
8481 const struct rte_flow_item *item,
8484 const struct rte_flow_item_tcp *tcp_m = item->mask;
8485 const struct rte_flow_item_tcp *tcp_v = item->spec;
8490 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8492 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8494 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8496 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8498 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8499 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8503 tcp_m = &rte_flow_item_tcp_mask;
8504 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8505 rte_be_to_cpu_16(tcp_m->hdr.src_port));
8506 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8507 rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8508 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8509 rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8510 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8511 rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8512 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8513 tcp_m->hdr.tcp_flags);
8514 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8515 (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8519 * Add UDP item to matcher and to the value.
8521 * @param[in, out] matcher
8523 * @param[in, out] key
8524 * Flow matcher value.
8526 * Flow pattern to translate.
8528 * Item is inner pattern.
8531 flow_dv_translate_item_udp(void *matcher, void *key,
8532 const struct rte_flow_item *item,
8535 const struct rte_flow_item_udp *udp_m = item->mask;
8536 const struct rte_flow_item_udp *udp_v = item->spec;
8541 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8543 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8545 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8547 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8549 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8550 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8554 udp_m = &rte_flow_item_udp_mask;
8555 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8556 rte_be_to_cpu_16(udp_m->hdr.src_port));
8557 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8558 rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8559 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8560 rte_be_to_cpu_16(udp_m->hdr.dst_port));
8561 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8562 rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8566 * Add GRE optional Key item to matcher and to the value.
8568 * @param[in, out] matcher
8570 * @param[in, out] key
8571 * Flow matcher value.
8573 * Flow pattern to translate.
8575 * Item is inner pattern.
8578 flow_dv_translate_item_gre_key(void *matcher, void *key,
8579 const struct rte_flow_item *item)
8581 const rte_be32_t *key_m = item->mask;
8582 const rte_be32_t *key_v = item->spec;
8583 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8584 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8585 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8587 /* GRE K bit must be on and should already be validated */
8588 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8589 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8593 key_m = &gre_key_default_mask;
8594 MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8595 rte_be_to_cpu_32(*key_m) >> 8);
8596 MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8597 rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8598 MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8599 rte_be_to_cpu_32(*key_m) & 0xFF);
8600 MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8601 rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8605 * Add GRE item to matcher and to the value.
8607 * @param[in, out] matcher
8609 * @param[in, out] key
8610 * Flow matcher value.
8612 * Flow pattern to translate.
8614 * Item is inner pattern.
8617 flow_dv_translate_item_gre(void *matcher, void *key,
8618 const struct rte_flow_item *item,
8621 const struct rte_flow_item_gre *gre_m = item->mask;
8622 const struct rte_flow_item_gre *gre_v = item->spec;
8625 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8626 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8633 uint16_t s_present:1;
8634 uint16_t k_present:1;
8635 uint16_t rsvd_bit1:1;
8636 uint16_t c_present:1;
8640 } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8643 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8645 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8647 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8649 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8651 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8652 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8656 gre_m = &rte_flow_item_gre_mask;
8657 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8658 rte_be_to_cpu_16(gre_m->protocol));
8659 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8660 rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8661 gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8662 gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8663 MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8664 gre_crks_rsvd0_ver_m.c_present);
8665 MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8666 gre_crks_rsvd0_ver_v.c_present &
8667 gre_crks_rsvd0_ver_m.c_present);
8668 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8669 gre_crks_rsvd0_ver_m.k_present);
8670 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8671 gre_crks_rsvd0_ver_v.k_present &
8672 gre_crks_rsvd0_ver_m.k_present);
8673 MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8674 gre_crks_rsvd0_ver_m.s_present);
8675 MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8676 gre_crks_rsvd0_ver_v.s_present &
8677 gre_crks_rsvd0_ver_m.s_present);
8681 * Add NVGRE item to matcher and to the value.
8683 * @param[in, out] matcher
8685 * @param[in, out] key
8686 * Flow matcher value.
8688 * Flow pattern to translate.
8690 * Item is inner pattern.
8693 flow_dv_translate_item_nvgre(void *matcher, void *key,
8694 const struct rte_flow_item *item,
8697 const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8698 const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8699 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8700 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8701 const char *tni_flow_id_m;
8702 const char *tni_flow_id_v;
8708 /* For NVGRE, GRE header fields must be set with defined values. */
8709 const struct rte_flow_item_gre gre_spec = {
8710 .c_rsvd0_ver = RTE_BE16(0x2000),
8711 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8713 const struct rte_flow_item_gre gre_mask = {
8714 .c_rsvd0_ver = RTE_BE16(0xB000),
8715 .protocol = RTE_BE16(UINT16_MAX),
8717 const struct rte_flow_item gre_item = {
8722 flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8726 nvgre_m = &rte_flow_item_nvgre_mask;
8727 tni_flow_id_m = (const char *)nvgre_m->tni;
8728 tni_flow_id_v = (const char *)nvgre_v->tni;
8729 size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8730 gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8731 gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8732 memcpy(gre_key_m, tni_flow_id_m, size);
8733 for (i = 0; i < size; ++i)
8734 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8738 * Add VXLAN item to matcher and to the value.
8741 * Pointer to the Ethernet device structure.
8743 * Flow rule attributes.
8744 * @param[in, out] matcher
8746 * @param[in, out] key
8747 * Flow matcher value.
8749 * Flow pattern to translate.
8751 * Item is inner pattern.
8754 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8755 const struct rte_flow_attr *attr,
8756 void *matcher, void *key,
8757 const struct rte_flow_item *item,
8760 const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8761 const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8766 uint32_t *tunnel_header_v;
8767 uint32_t *tunnel_header_m;
8769 struct mlx5_priv *priv = dev->data->dev_private;
8770 const struct rte_flow_item_vxlan nic_mask = {
8771 .vni = "\xff\xff\xff",
8776 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8778 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8780 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8782 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8784 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8785 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8786 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8787 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8788 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8793 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8794 (attr->group && !priv->sh->misc5_cap))
8795 vxlan_m = &rte_flow_item_vxlan_mask;
8797 vxlan_m = &nic_mask;
8799 if ((!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8800 ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8807 misc_m = MLX5_ADDR_OF(fte_match_param,
8808 matcher, misc_parameters);
8809 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8810 size = sizeof(vxlan_m->vni);
8811 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8812 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8813 memcpy(vni_m, vxlan_m->vni, size);
8814 for (i = 0; i < size; ++i)
8815 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8818 misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8819 misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8820 tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8823 tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8826 *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8827 (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8828 (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8829 if (*tunnel_header_v)
8830 *tunnel_header_m = vxlan_m->vni[0] |
8831 vxlan_m->vni[1] << 8 |
8832 vxlan_m->vni[2] << 16;
8834 *tunnel_header_m = 0x0;
8835 *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8836 if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8837 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8841 * Add VXLAN-GPE item to matcher and to the value.
8843 * @param[in, out] matcher
8845 * @param[in, out] key
8846 * Flow matcher value.
8848 * Flow pattern to translate.
8850 * Item is inner pattern.
8854 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
8855 const struct rte_flow_item *item, int inner)
8857 const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
8858 const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
8862 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
8864 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
8870 uint8_t flags_m = 0xff;
8871 uint8_t flags_v = 0xc;
8874 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8876 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8878 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8880 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8882 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8883 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8884 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8885 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8886 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8891 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
8892 size = sizeof(vxlan_m->vni);
8893 vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
8894 vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
8895 memcpy(vni_m, vxlan_m->vni, size);
8896 for (i = 0; i < size; ++i)
8897 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8898 if (vxlan_m->flags) {
8899 flags_m = vxlan_m->flags;
8900 flags_v = vxlan_v->flags;
8902 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
8903 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
8904 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
8906 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
8911 * Add Geneve item to matcher and to the value.
8913 * @param[in, out] matcher
8915 * @param[in, out] key
8916 * Flow matcher value.
8918 * Flow pattern to translate.
8920 * Item is inner pattern.
8924 flow_dv_translate_item_geneve(void *matcher, void *key,
8925 const struct rte_flow_item *item, int inner)
8927 const struct rte_flow_item_geneve *geneve_m = item->mask;
8928 const struct rte_flow_item_geneve *geneve_v = item->spec;
8931 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8932 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8941 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8943 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8945 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8947 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8949 dport = MLX5_UDP_PORT_GENEVE;
8950 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8951 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8952 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8957 geneve_m = &rte_flow_item_geneve_mask;
8958 size = sizeof(geneve_m->vni);
8959 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
8960 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
8961 memcpy(vni_m, geneve_m->vni, size);
8962 for (i = 0; i < size; ++i)
8963 vni_v[i] = vni_m[i] & geneve_v->vni[i];
8964 MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
8965 rte_be_to_cpu_16(geneve_m->protocol));
8966 MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
8967 rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
8968 gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
8969 gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
8970 MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
8971 MLX5_GENEVE_OAMF_VAL(gbhdr_m));
8972 MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
8973 MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
8974 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
8975 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
8976 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
8977 MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
8978 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
8982 * Create Geneve TLV option resource.
8984 * @param dev[in, out]
8985 * Pointer to rte_eth_dev structure.
8986 * @param[in, out] tag_be24
8987 * Tag value in big endian then R-shift 8.
8988 * @parm[in, out] dev_flow
8989 * Pointer to the dev_flow.
8991 * pointer to error structure.
8994 * 0 on success otherwise -errno and errno is set.
8998 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
8999 const struct rte_flow_item *item,
9000 struct rte_flow_error *error)
9002 struct mlx5_priv *priv = dev->data->dev_private;
9003 struct mlx5_dev_ctx_shared *sh = priv->sh;
9004 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9005 sh->geneve_tlv_option_resource;
9006 struct mlx5_devx_obj *obj;
9007 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9012 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9013 if (geneve_opt_resource != NULL) {
9014 if (geneve_opt_resource->option_class ==
9015 geneve_opt_v->option_class &&
9016 geneve_opt_resource->option_type ==
9017 geneve_opt_v->option_type &&
9018 geneve_opt_resource->length ==
9019 geneve_opt_v->option_len) {
9020 /* We already have GENVE TLV option obj allocated. */
9021 __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9024 ret = rte_flow_error_set(error, ENOMEM,
9025 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9026 "Only one GENEVE TLV option supported");
9030 /* Create a GENEVE TLV object and resource. */
9031 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->ctx,
9032 geneve_opt_v->option_class,
9033 geneve_opt_v->option_type,
9034 geneve_opt_v->option_len);
9036 ret = rte_flow_error_set(error, ENODATA,
9037 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9038 "Failed to create GENEVE TLV Devx object");
9041 sh->geneve_tlv_option_resource =
9042 mlx5_malloc(MLX5_MEM_ZERO,
9043 sizeof(*geneve_opt_resource),
9045 if (!sh->geneve_tlv_option_resource) {
9046 claim_zero(mlx5_devx_cmd_destroy(obj));
9047 ret = rte_flow_error_set(error, ENOMEM,
9048 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9049 "GENEVE TLV object memory allocation failed");
9052 geneve_opt_resource = sh->geneve_tlv_option_resource;
9053 geneve_opt_resource->obj = obj;
9054 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9055 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9056 geneve_opt_resource->length = geneve_opt_v->option_len;
9057 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9061 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9066 * Add Geneve TLV option item to matcher.
9068 * @param[in, out] dev
9069 * Pointer to rte_eth_dev structure.
9070 * @param[in, out] matcher
9072 * @param[in, out] key
9073 * Flow matcher value.
9075 * Flow pattern to translate.
9077 * Pointer to error structure.
9080 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9081 void *key, const struct rte_flow_item *item,
9082 struct rte_flow_error *error)
9084 const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9085 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9086 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9087 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9088 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9090 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9091 rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9097 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9098 ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9101 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9105 * Set the option length in GENEVE header if not requested.
9106 * The GENEVE TLV option length is expressed by the option length field
9107 * in the GENEVE header.
9108 * If the option length was not requested but the GENEVE TLV option item
9109 * is present we set the option length field implicitly.
9111 if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9112 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9113 MLX5_GENEVE_OPTLEN_MASK);
9114 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9115 geneve_opt_v->option_len + 1);
9118 if (geneve_opt_v->data) {
9119 memcpy(&opt_data_key, geneve_opt_v->data,
9120 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9121 sizeof(opt_data_key)));
9122 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9123 sizeof(opt_data_key));
9124 memcpy(&opt_data_mask, geneve_opt_m->data,
9125 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9126 sizeof(opt_data_mask)));
9127 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9128 sizeof(opt_data_mask));
9129 MLX5_SET(fte_match_set_misc3, misc3_m,
9130 geneve_tlv_option_0_data,
9131 rte_be_to_cpu_32(opt_data_mask));
9132 MLX5_SET(fte_match_set_misc3, misc3_v,
9133 geneve_tlv_option_0_data,
9134 rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9140 * Add MPLS item to matcher and to the value.
9142 * @param[in, out] matcher
9144 * @param[in, out] key
9145 * Flow matcher value.
9147 * Flow pattern to translate.
9148 * @param[in] prev_layer
9149 * The protocol layer indicated in previous item.
9151 * Item is inner pattern.
9154 flow_dv_translate_item_mpls(void *matcher, void *key,
9155 const struct rte_flow_item *item,
9156 uint64_t prev_layer,
9159 const uint32_t *in_mpls_m = item->mask;
9160 const uint32_t *in_mpls_v = item->spec;
9161 uint32_t *out_mpls_m = 0;
9162 uint32_t *out_mpls_v = 0;
9163 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9164 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9165 void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9167 void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9168 void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9169 void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9171 switch (prev_layer) {
9172 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9173 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
9174 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9175 MLX5_UDP_PORT_MPLS);
9177 case MLX5_FLOW_LAYER_GRE:
9179 case MLX5_FLOW_LAYER_GRE_KEY:
9180 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
9181 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9182 RTE_ETHER_TYPE_MPLS);
9190 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9191 switch (prev_layer) {
9192 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9194 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9195 outer_first_mpls_over_udp);
9197 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9198 outer_first_mpls_over_udp);
9200 case MLX5_FLOW_LAYER_GRE:
9202 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9203 outer_first_mpls_over_gre);
9205 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9206 outer_first_mpls_over_gre);
9209 /* Inner MPLS not over GRE is not supported. */
9212 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9216 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9222 if (out_mpls_m && out_mpls_v) {
9223 *out_mpls_m = *in_mpls_m;
9224 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9229 * Add metadata register item to matcher
9231 * @param[in, out] matcher
9233 * @param[in, out] key
9234 * Flow matcher value.
9235 * @param[in] reg_type
9236 * Type of device metadata register
9243 flow_dv_match_meta_reg(void *matcher, void *key,
9244 enum modify_reg reg_type,
9245 uint32_t data, uint32_t mask)
9248 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9250 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9256 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9257 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9260 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9261 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9265 * The metadata register C0 field might be divided into
9266 * source vport index and META item value, we should set
9267 * this field according to specified mask, not as whole one.
9269 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9271 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9272 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9275 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9278 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9279 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9282 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9283 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9286 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9287 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9290 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9291 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9294 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9295 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9298 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9299 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9302 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9303 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9312 * Add MARK item to matcher
9315 * The device to configure through.
9316 * @param[in, out] matcher
9318 * @param[in, out] key
9319 * Flow matcher value.
9321 * Flow pattern to translate.
9324 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9325 void *matcher, void *key,
9326 const struct rte_flow_item *item)
9328 struct mlx5_priv *priv = dev->data->dev_private;
9329 const struct rte_flow_item_mark *mark;
9333 mark = item->mask ? (const void *)item->mask :
9334 &rte_flow_item_mark_mask;
9335 mask = mark->id & priv->sh->dv_mark_mask;
9336 mark = (const void *)item->spec;
9338 value = mark->id & priv->sh->dv_mark_mask & mask;
9340 enum modify_reg reg;
9342 /* Get the metadata register index for the mark. */
9343 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9344 MLX5_ASSERT(reg > 0);
9345 if (reg == REG_C_0) {
9346 struct mlx5_priv *priv = dev->data->dev_private;
9347 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9348 uint32_t shl_c0 = rte_bsf32(msk_c0);
9354 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9359 * Add META item to matcher
9362 * The devich to configure through.
9363 * @param[in, out] matcher
9365 * @param[in, out] key
9366 * Flow matcher value.
9368 * Attributes of flow that includes this item.
9370 * Flow pattern to translate.
9373 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9374 void *matcher, void *key,
9375 const struct rte_flow_attr *attr,
9376 const struct rte_flow_item *item)
9378 const struct rte_flow_item_meta *meta_m;
9379 const struct rte_flow_item_meta *meta_v;
9381 meta_m = (const void *)item->mask;
9383 meta_m = &rte_flow_item_meta_mask;
9384 meta_v = (const void *)item->spec;
9387 uint32_t value = meta_v->data;
9388 uint32_t mask = meta_m->data;
9390 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9393 MLX5_ASSERT(reg != REG_NON);
9394 if (reg == REG_C_0) {
9395 struct mlx5_priv *priv = dev->data->dev_private;
9396 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9397 uint32_t shl_c0 = rte_bsf32(msk_c0);
9403 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9408 * Add vport metadata Reg C0 item to matcher
9410 * @param[in, out] matcher
9412 * @param[in, out] key
9413 * Flow matcher value.
9415 * Flow pattern to translate.
9418 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9419 uint32_t value, uint32_t mask)
9421 flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9425 * Add tag item to matcher
9428 * The devich to configure through.
9429 * @param[in, out] matcher
9431 * @param[in, out] key
9432 * Flow matcher value.
9434 * Flow pattern to translate.
9437 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9438 void *matcher, void *key,
9439 const struct rte_flow_item *item)
9441 const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9442 const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9443 uint32_t mask, value;
9446 value = tag_v->data;
9447 mask = tag_m ? tag_m->data : UINT32_MAX;
9448 if (tag_v->id == REG_C_0) {
9449 struct mlx5_priv *priv = dev->data->dev_private;
9450 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9451 uint32_t shl_c0 = rte_bsf32(msk_c0);
9457 flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9461 * Add TAG item to matcher
9464 * The devich to configure through.
9465 * @param[in, out] matcher
9467 * @param[in, out] key
9468 * Flow matcher value.
9470 * Flow pattern to translate.
9473 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9474 void *matcher, void *key,
9475 const struct rte_flow_item *item)
9477 const struct rte_flow_item_tag *tag_v = item->spec;
9478 const struct rte_flow_item_tag *tag_m = item->mask;
9479 enum modify_reg reg;
9482 tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9483 /* Get the metadata register index for the tag. */
9484 reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9485 MLX5_ASSERT(reg > 0);
9486 flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9490 * Add source vport match to the specified matcher.
9492 * @param[in, out] matcher
9494 * @param[in, out] key
9495 * Flow matcher value.
9497 * Source vport value to match
9502 flow_dv_translate_item_source_vport(void *matcher, void *key,
9503 int16_t port, uint16_t mask)
9505 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9506 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9508 MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9509 MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9513 * Translate port-id item to eswitch match on port-id.
9516 * The devich to configure through.
9517 * @param[in, out] matcher
9519 * @param[in, out] key
9520 * Flow matcher value.
9522 * Flow pattern to translate.
9527 * 0 on success, a negative errno value otherwise.
9530 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9531 void *key, const struct rte_flow_item *item,
9532 const struct rte_flow_attr *attr)
9534 const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9535 const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9536 struct mlx5_priv *priv;
9539 mask = pid_m ? pid_m->id : 0xffff;
9540 id = pid_v ? pid_v->id : dev->data->port_id;
9541 priv = mlx5_port_to_eswitch_info(id, item == NULL);
9545 * Translate to vport field or to metadata, depending on mode.
9546 * Kernel can use either misc.source_port or half of C0 metadata
9549 if (priv->vport_meta_mask) {
9551 * Provide the hint for SW steering library
9552 * to insert the flow into ingress domain and
9553 * save the extra vport match.
9555 if (mask == 0xffff && priv->vport_id == 0xffff &&
9556 priv->pf_bond < 0 && attr->transfer)
9557 flow_dv_translate_item_source_vport
9558 (matcher, key, priv->vport_id, mask);
9560 * We should always set the vport metadata register,
9561 * otherwise the SW steering library can drop
9562 * the rule if wire vport metadata value is not zero,
9563 * it depends on kernel configuration.
9565 flow_dv_translate_item_meta_vport(matcher, key,
9566 priv->vport_meta_tag,
9567 priv->vport_meta_mask);
9569 flow_dv_translate_item_source_vport(matcher, key,
9570 priv->vport_id, mask);
9576 * Add ICMP6 item to matcher and to the value.
9578 * @param[in, out] matcher
9580 * @param[in, out] key
9581 * Flow matcher value.
9583 * Flow pattern to translate.
9585 * Item is inner pattern.
9588 flow_dv_translate_item_icmp6(void *matcher, void *key,
9589 const struct rte_flow_item *item,
9592 const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9593 const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9596 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9598 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9600 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9602 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9604 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9606 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9608 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9609 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9613 icmp6_m = &rte_flow_item_icmp6_mask;
9614 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9615 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9616 icmp6_v->type & icmp6_m->type);
9617 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9618 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9619 icmp6_v->code & icmp6_m->code);
9623 * Add ICMP item to matcher and to the value.
9625 * @param[in, out] matcher
9627 * @param[in, out] key
9628 * Flow matcher value.
9630 * Flow pattern to translate.
9632 * Item is inner pattern.
9635 flow_dv_translate_item_icmp(void *matcher, void *key,
9636 const struct rte_flow_item *item,
9639 const struct rte_flow_item_icmp *icmp_m = item->mask;
9640 const struct rte_flow_item_icmp *icmp_v = item->spec;
9641 uint32_t icmp_header_data_m = 0;
9642 uint32_t icmp_header_data_v = 0;
9645 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9647 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9649 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9651 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9653 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9655 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9657 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9658 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9662 icmp_m = &rte_flow_item_icmp_mask;
9663 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9664 icmp_m->hdr.icmp_type);
9665 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9666 icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9667 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9668 icmp_m->hdr.icmp_code);
9669 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9670 icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9671 icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9672 icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9673 if (icmp_header_data_m) {
9674 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9675 icmp_header_data_v |=
9676 rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9677 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9678 icmp_header_data_m);
9679 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9680 icmp_header_data_v & icmp_header_data_m);
9685 * Add GTP item to matcher and to the value.
9687 * @param[in, out] matcher
9689 * @param[in, out] key
9690 * Flow matcher value.
9692 * Flow pattern to translate.
9694 * Item is inner pattern.
9697 flow_dv_translate_item_gtp(void *matcher, void *key,
9698 const struct rte_flow_item *item, int inner)
9700 const struct rte_flow_item_gtp *gtp_m = item->mask;
9701 const struct rte_flow_item_gtp *gtp_v = item->spec;
9704 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9706 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9707 uint16_t dport = RTE_GTPU_UDP_PORT;
9710 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9712 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9714 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9716 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9718 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9719 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9720 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9725 gtp_m = &rte_flow_item_gtp_mask;
9726 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9727 gtp_m->v_pt_rsv_flags);
9728 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9729 gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9730 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9731 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9732 gtp_v->msg_type & gtp_m->msg_type);
9733 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9734 rte_be_to_cpu_32(gtp_m->teid));
9735 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9736 rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9740 * Add GTP PSC item to matcher.
9742 * @param[in, out] matcher
9744 * @param[in, out] key
9745 * Flow matcher value.
9747 * Flow pattern to translate.
9750 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9751 const struct rte_flow_item *item)
9753 const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9754 const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9755 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9757 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9763 uint8_t next_ext_header_type;
9768 /* Always set E-flag match on one, regardless of GTP item settings. */
9769 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9770 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9771 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9772 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9773 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9774 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9775 /*Set next extension header type. */
9778 dw_2.next_ext_header_type = 0xff;
9779 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9780 rte_cpu_to_be_32(dw_2.w32));
9783 dw_2.next_ext_header_type = 0x85;
9784 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9785 rte_cpu_to_be_32(dw_2.w32));
9797 /*Set extension header PDU type and Qos. */
9799 gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9801 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->pdu_type);
9802 dw_0.qfi = gtp_psc_m->qfi;
9803 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9804 rte_cpu_to_be_32(dw_0.w32));
9806 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->pdu_type &
9807 gtp_psc_m->pdu_type);
9808 dw_0.qfi = gtp_psc_v->qfi & gtp_psc_m->qfi;
9809 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9810 rte_cpu_to_be_32(dw_0.w32));
9816 * Add eCPRI item to matcher and to the value.
9819 * The devich to configure through.
9820 * @param[in, out] matcher
9822 * @param[in, out] key
9823 * Flow matcher value.
9825 * Flow pattern to translate.
9826 * @param[in] samples
9827 * Sample IDs to be used in the matching.
9830 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9831 void *key, const struct rte_flow_item *item)
9833 struct mlx5_priv *priv = dev->data->dev_private;
9834 const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9835 const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9836 struct rte_ecpri_common_hdr common;
9837 void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9839 void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9847 ecpri_m = &rte_flow_item_ecpri_mask;
9849 * Maximal four DW samples are supported in a single matching now.
9850 * Two are used now for a eCPRI matching:
9851 * 1. Type: one byte, mask should be 0x00ff0000 in network order
9852 * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
9855 if (!ecpri_m->hdr.common.u32)
9857 samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
9858 /* Need to take the whole DW as the mask to fill the entry. */
9859 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9860 prog_sample_field_value_0);
9861 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9862 prog_sample_field_value_0);
9863 /* Already big endian (network order) in the header. */
9864 *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
9865 *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
9866 /* Sample#0, used for matching type, offset 0. */
9867 MLX5_SET(fte_match_set_misc4, misc4_m,
9868 prog_sample_field_id_0, samples[0]);
9869 /* It makes no sense to set the sample ID in the mask field. */
9870 MLX5_SET(fte_match_set_misc4, misc4_v,
9871 prog_sample_field_id_0, samples[0]);
9873 * Checking if message body part needs to be matched.
9874 * Some wildcard rules only matching type field should be supported.
9876 if (ecpri_m->hdr.dummy[0]) {
9877 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
9878 switch (common.type) {
9879 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
9880 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
9881 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
9882 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9883 prog_sample_field_value_1);
9884 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9885 prog_sample_field_value_1);
9886 *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
9887 *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
9888 ecpri_m->hdr.dummy[0];
9889 /* Sample#1, to match message body, offset 4. */
9890 MLX5_SET(fte_match_set_misc4, misc4_m,
9891 prog_sample_field_id_1, samples[1]);
9892 MLX5_SET(fte_match_set_misc4, misc4_v,
9893 prog_sample_field_id_1, samples[1]);
9896 /* Others, do not match any sample ID. */
9903 * Add connection tracking status item to matcher
9906 * The devich to configure through.
9907 * @param[in, out] matcher
9909 * @param[in, out] key
9910 * Flow matcher value.
9912 * Flow pattern to translate.
9915 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
9916 void *matcher, void *key,
9917 const struct rte_flow_item *item)
9919 uint32_t reg_value = 0;
9921 /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
9922 uint32_t reg_mask = 0;
9923 const struct rte_flow_item_conntrack *spec = item->spec;
9924 const struct rte_flow_item_conntrack *mask = item->mask;
9926 struct rte_flow_error error;
9929 mask = &rte_flow_item_conntrack_mask;
9930 if (!spec || !mask->flags)
9932 flags = spec->flags & mask->flags;
9933 /* The conflict should be checked in the validation. */
9934 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
9935 reg_value |= MLX5_CT_SYNDROME_VALID;
9936 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
9937 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
9938 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
9939 reg_value |= MLX5_CT_SYNDROME_INVALID;
9940 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
9941 reg_value |= MLX5_CT_SYNDROME_TRAP;
9942 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
9943 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
9944 if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
9945 RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
9946 RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
9948 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
9949 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
9950 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
9951 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
9952 /* The REG_C_x value could be saved during startup. */
9953 reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
9954 if (reg_id == REG_NON)
9956 flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
9957 reg_value, reg_mask);
9960 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
9962 #define HEADER_IS_ZERO(match_criteria, headers) \
9963 !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers), \
9964 matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
9967 * Calculate flow matcher enable bitmap.
9969 * @param match_criteria
9970 * Pointer to flow matcher criteria.
9973 * Bitmap of enabled fields.
9976 flow_dv_matcher_enable(uint32_t *match_criteria)
9978 uint8_t match_criteria_enable;
9980 match_criteria_enable =
9981 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
9982 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
9983 match_criteria_enable |=
9984 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
9985 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
9986 match_criteria_enable |=
9987 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
9988 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
9989 match_criteria_enable |=
9990 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
9991 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
9992 match_criteria_enable |=
9993 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
9994 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
9995 match_criteria_enable |=
9996 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
9997 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
9998 match_criteria_enable |=
9999 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10000 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10001 return match_criteria_enable;
10005 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10008 * Check flow matching criteria first, subtract misc5/4 length if flow
10009 * doesn't own misc5/4 parameters. In some old rdma-core releases,
10010 * misc5/4 are not supported, and matcher creation failure is expected
10011 * w/o subtration. If misc5 is provided, misc4 must be counted in since
10012 * misc5 is right after misc4.
10014 if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10015 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10016 MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10017 if (!(match_criteria & (1 <<
10018 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10019 *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10024 static struct mlx5_list_entry *
10025 flow_dv_matcher_clone_cb(struct mlx5_list *list __rte_unused,
10026 struct mlx5_list_entry *entry, void *cb_ctx)
10028 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10029 struct mlx5_flow_dv_matcher *ref = ctx->data;
10030 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10031 typeof(*tbl), tbl);
10032 struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10037 rte_flow_error_set(ctx->error, ENOMEM,
10038 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10039 "cannot create matcher");
10042 memcpy(resource, entry, sizeof(*resource));
10043 resource->tbl = &tbl->tbl;
10044 return &resource->entry;
10048 flow_dv_matcher_clone_free_cb(struct mlx5_list *list __rte_unused,
10049 struct mlx5_list_entry *entry)
10054 struct mlx5_hlist_entry *
10055 flow_dv_tbl_create_cb(struct mlx5_hlist *list, uint64_t key64, void *cb_ctx)
10057 struct mlx5_dev_ctx_shared *sh = list->ctx;
10058 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10059 struct rte_eth_dev *dev = ctx->dev;
10060 struct mlx5_flow_tbl_data_entry *tbl_data;
10061 struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data;
10062 struct rte_flow_error *error = ctx->error;
10063 union mlx5_flow_tbl_key key = { .v64 = key64 };
10064 struct mlx5_flow_tbl_resource *tbl;
10069 tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10071 rte_flow_error_set(error, ENOMEM,
10072 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10074 "cannot allocate flow table data entry");
10077 tbl_data->idx = idx;
10078 tbl_data->tunnel = tt_prm->tunnel;
10079 tbl_data->group_id = tt_prm->group_id;
10080 tbl_data->external = !!tt_prm->external;
10081 tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10082 tbl_data->is_egress = !!key.is_egress;
10083 tbl_data->is_transfer = !!key.is_fdb;
10084 tbl_data->dummy = !!key.dummy;
10085 tbl_data->level = key.level;
10086 tbl_data->id = key.id;
10087 tbl = &tbl_data->tbl;
10089 return &tbl_data->entry;
10091 domain = sh->fdb_domain;
10092 else if (key.is_egress)
10093 domain = sh->tx_domain;
10095 domain = sh->rx_domain;
10096 ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10098 rte_flow_error_set(error, ENOMEM,
10099 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10100 NULL, "cannot create flow table object");
10101 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10104 if (key.level != 0) {
10105 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10106 (tbl->obj, &tbl_data->jump.action);
10108 rte_flow_error_set(error, ENOMEM,
10109 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10111 "cannot create flow jump action");
10112 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10113 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10117 MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10118 key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10119 key.level, key.id);
10120 mlx5_list_create(&tbl_data->matchers, matcher_name, sh,
10121 flow_dv_matcher_create_cb,
10122 flow_dv_matcher_match_cb,
10123 flow_dv_matcher_remove_cb,
10124 flow_dv_matcher_clone_cb,
10125 flow_dv_matcher_clone_free_cb);
10126 return &tbl_data->entry;
10130 flow_dv_tbl_match_cb(struct mlx5_hlist *list __rte_unused,
10131 struct mlx5_hlist_entry *entry, uint64_t key64,
10132 void *cb_ctx __rte_unused)
10134 struct mlx5_flow_tbl_data_entry *tbl_data =
10135 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10136 union mlx5_flow_tbl_key key = { .v64 = key64 };
10138 return tbl_data->level != key.level ||
10139 tbl_data->id != key.id ||
10140 tbl_data->dummy != key.dummy ||
10141 tbl_data->is_transfer != !!key.is_fdb ||
10142 tbl_data->is_egress != !!key.is_egress;
10146 * Get a flow table.
10148 * @param[in, out] dev
10149 * Pointer to rte_eth_dev structure.
10150 * @param[in] table_level
10151 * Table level to use.
10152 * @param[in] egress
10153 * Direction of the table.
10154 * @param[in] transfer
10155 * E-Switch or NIC flow.
10157 * Dummy entry for dv API.
10158 * @param[in] table_id
10160 * @param[out] error
10161 * pointer to error structure.
10164 * Returns tables resource based on the index, NULL in case of failed.
10166 struct mlx5_flow_tbl_resource *
10167 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10168 uint32_t table_level, uint8_t egress,
10171 const struct mlx5_flow_tunnel *tunnel,
10172 uint32_t group_id, uint8_t dummy,
10174 struct rte_flow_error *error)
10176 struct mlx5_priv *priv = dev->data->dev_private;
10177 union mlx5_flow_tbl_key table_key = {
10179 .level = table_level,
10183 .is_fdb = !!transfer,
10184 .is_egress = !!egress,
10187 struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10189 .group_id = group_id,
10190 .external = external,
10192 struct mlx5_flow_cb_ctx ctx = {
10197 struct mlx5_hlist_entry *entry;
10198 struct mlx5_flow_tbl_data_entry *tbl_data;
10200 entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10202 rte_flow_error_set(error, ENOMEM,
10203 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10204 "cannot get table");
10207 DRV_LOG(DEBUG, "table_level %u table_id %u "
10208 "tunnel %u group %u registered.",
10209 table_level, table_id,
10210 tunnel ? tunnel->tunnel_id : 0, group_id);
10211 tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10212 return &tbl_data->tbl;
10216 flow_dv_tbl_remove_cb(struct mlx5_hlist *list,
10217 struct mlx5_hlist_entry *entry)
10219 struct mlx5_dev_ctx_shared *sh = list->ctx;
10220 struct mlx5_flow_tbl_data_entry *tbl_data =
10221 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10223 MLX5_ASSERT(entry && sh);
10224 if (tbl_data->jump.action)
10225 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10226 if (tbl_data->tbl.obj)
10227 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10228 if (tbl_data->tunnel_offload && tbl_data->external) {
10229 struct mlx5_hlist_entry *he;
10230 struct mlx5_hlist *tunnel_grp_hash;
10231 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10232 union tunnel_tbl_key tunnel_key = {
10233 .tunnel_id = tbl_data->tunnel ?
10234 tbl_data->tunnel->tunnel_id : 0,
10235 .group = tbl_data->group_id
10237 uint32_t table_level = tbl_data->level;
10239 tunnel_grp_hash = tbl_data->tunnel ?
10240 tbl_data->tunnel->groups :
10242 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, NULL);
10244 mlx5_hlist_unregister(tunnel_grp_hash, he);
10246 "table_level %u id %u tunnel %u group %u released.",
10250 tbl_data->tunnel->tunnel_id : 0,
10251 tbl_data->group_id);
10253 mlx5_list_destroy(&tbl_data->matchers);
10254 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10258 * Release a flow table.
10261 * Pointer to device shared structure.
10263 * Table resource to be released.
10266 * Returns 0 if table was released, else return 1;
10269 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10270 struct mlx5_flow_tbl_resource *tbl)
10272 struct mlx5_flow_tbl_data_entry *tbl_data =
10273 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10277 return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10281 flow_dv_matcher_match_cb(struct mlx5_list *list __rte_unused,
10282 struct mlx5_list_entry *entry, void *cb_ctx)
10284 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10285 struct mlx5_flow_dv_matcher *ref = ctx->data;
10286 struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10289 return cur->crc != ref->crc ||
10290 cur->priority != ref->priority ||
10291 memcmp((const void *)cur->mask.buf,
10292 (const void *)ref->mask.buf, ref->mask.size);
10295 struct mlx5_list_entry *
10296 flow_dv_matcher_create_cb(struct mlx5_list *list,
10297 struct mlx5_list_entry *entry __rte_unused,
10300 struct mlx5_dev_ctx_shared *sh = list->ctx;
10301 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10302 struct mlx5_flow_dv_matcher *ref = ctx->data;
10303 struct mlx5_flow_dv_matcher *resource;
10304 struct mlx5dv_flow_matcher_attr dv_attr = {
10305 .type = IBV_FLOW_ATTR_NORMAL,
10306 .match_mask = (void *)&ref->mask,
10308 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10309 typeof(*tbl), tbl);
10312 resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10315 rte_flow_error_set(ctx->error, ENOMEM,
10316 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10317 "cannot create matcher");
10321 dv_attr.match_criteria_enable =
10322 flow_dv_matcher_enable(resource->mask.buf);
10323 __flow_dv_adjust_buf_size(&ref->mask.size,
10324 dv_attr.match_criteria_enable);
10325 dv_attr.priority = ref->priority;
10326 if (tbl->is_egress)
10327 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10328 ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
10329 &resource->matcher_object);
10331 mlx5_free(resource);
10332 rte_flow_error_set(ctx->error, ENOMEM,
10333 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10334 "cannot create matcher");
10337 return &resource->entry;
10341 * Register the flow matcher.
10343 * @param[in, out] dev
10344 * Pointer to rte_eth_dev structure.
10345 * @param[in, out] matcher
10346 * Pointer to flow matcher.
10347 * @param[in, out] key
10348 * Pointer to flow table key.
10349 * @parm[in, out] dev_flow
10350 * Pointer to the dev_flow.
10351 * @param[out] error
10352 * pointer to error structure.
10355 * 0 on success otherwise -errno and errno is set.
10358 flow_dv_matcher_register(struct rte_eth_dev *dev,
10359 struct mlx5_flow_dv_matcher *ref,
10360 union mlx5_flow_tbl_key *key,
10361 struct mlx5_flow *dev_flow,
10362 const struct mlx5_flow_tunnel *tunnel,
10364 struct rte_flow_error *error)
10366 struct mlx5_list_entry *entry;
10367 struct mlx5_flow_dv_matcher *resource;
10368 struct mlx5_flow_tbl_resource *tbl;
10369 struct mlx5_flow_tbl_data_entry *tbl_data;
10370 struct mlx5_flow_cb_ctx ctx = {
10375 * tunnel offload API requires this registration for cases when
10376 * tunnel match rule was inserted before tunnel set rule.
10378 tbl = flow_dv_tbl_resource_get(dev, key->level,
10379 key->is_egress, key->is_fdb,
10380 dev_flow->external, tunnel,
10381 group_id, 0, key->id, error);
10383 return -rte_errno; /* No need to refill the error info */
10384 tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10386 entry = mlx5_list_register(&tbl_data->matchers, &ctx);
10388 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10389 return rte_flow_error_set(error, ENOMEM,
10390 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10391 "cannot allocate ref memory");
10393 resource = container_of(entry, typeof(*resource), entry);
10394 dev_flow->handle->dvh.matcher = resource;
10398 struct mlx5_hlist_entry *
10399 flow_dv_tag_create_cb(struct mlx5_hlist *list, uint64_t key, void *ctx)
10401 struct mlx5_dev_ctx_shared *sh = list->ctx;
10402 struct rte_flow_error *error = ctx;
10403 struct mlx5_flow_dv_tag_resource *entry;
10407 entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10409 rte_flow_error_set(error, ENOMEM,
10410 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10411 "cannot allocate resource memory");
10415 entry->tag_id = key;
10416 ret = mlx5_flow_os_create_flow_action_tag(key,
10419 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10420 rte_flow_error_set(error, ENOMEM,
10421 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10422 NULL, "cannot create action");
10425 return &entry->entry;
10429 flow_dv_tag_match_cb(struct mlx5_hlist *list __rte_unused,
10430 struct mlx5_hlist_entry *entry, uint64_t key,
10431 void *cb_ctx __rte_unused)
10433 struct mlx5_flow_dv_tag_resource *tag =
10434 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10436 return key != tag->tag_id;
10440 * Find existing tag resource or create and register a new one.
10442 * @param dev[in, out]
10443 * Pointer to rte_eth_dev structure.
10444 * @param[in, out] tag_be24
10445 * Tag value in big endian then R-shift 8.
10446 * @parm[in, out] dev_flow
10447 * Pointer to the dev_flow.
10448 * @param[out] error
10449 * pointer to error structure.
10452 * 0 on success otherwise -errno and errno is set.
10455 flow_dv_tag_resource_register
10456 (struct rte_eth_dev *dev,
10458 struct mlx5_flow *dev_flow,
10459 struct rte_flow_error *error)
10461 struct mlx5_priv *priv = dev->data->dev_private;
10462 struct mlx5_flow_dv_tag_resource *resource;
10463 struct mlx5_hlist_entry *entry;
10465 entry = mlx5_hlist_register(priv->sh->tag_table, tag_be24, error);
10467 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10469 dev_flow->handle->dvh.rix_tag = resource->idx;
10470 dev_flow->dv.tag_resource = resource;
10477 flow_dv_tag_remove_cb(struct mlx5_hlist *list,
10478 struct mlx5_hlist_entry *entry)
10480 struct mlx5_dev_ctx_shared *sh = list->ctx;
10481 struct mlx5_flow_dv_tag_resource *tag =
10482 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10484 MLX5_ASSERT(tag && sh && tag->action);
10485 claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10486 DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10487 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10494 * Pointer to Ethernet device.
10499 * 1 while a reference on it exists, 0 when freed.
10502 flow_dv_tag_release(struct rte_eth_dev *dev,
10505 struct mlx5_priv *priv = dev->data->dev_private;
10506 struct mlx5_flow_dv_tag_resource *tag;
10508 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10511 DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10512 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10513 return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10517 * Translate port ID action to vport.
10520 * Pointer to rte_eth_dev structure.
10521 * @param[in] action
10522 * Pointer to the port ID action.
10523 * @param[out] dst_port_id
10524 * The target port ID.
10525 * @param[out] error
10526 * Pointer to the error structure.
10529 * 0 on success, a negative errno value otherwise and rte_errno is set.
10532 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10533 const struct rte_flow_action *action,
10534 uint32_t *dst_port_id,
10535 struct rte_flow_error *error)
10538 struct mlx5_priv *priv;
10539 const struct rte_flow_action_port_id *conf =
10540 (const struct rte_flow_action_port_id *)action->conf;
10542 port = conf->original ? dev->data->port_id : conf->id;
10543 priv = mlx5_port_to_eswitch_info(port, false);
10545 return rte_flow_error_set(error, -rte_errno,
10546 RTE_FLOW_ERROR_TYPE_ACTION,
10548 "No eswitch info was found for port");
10549 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10551 * This parameter is transferred to
10552 * mlx5dv_dr_action_create_dest_ib_port().
10554 *dst_port_id = priv->dev_port;
10557 * Legacy mode, no LAG configurations is supported.
10558 * This parameter is transferred to
10559 * mlx5dv_dr_action_create_dest_vport().
10561 *dst_port_id = priv->vport_id;
10567 * Create a counter with aging configuration.
10570 * Pointer to rte_eth_dev structure.
10571 * @param[in] dev_flow
10572 * Pointer to the mlx5_flow.
10573 * @param[out] count
10574 * Pointer to the counter action configuration.
10576 * Pointer to the aging action configuration.
10579 * Index to flow counter on success, 0 otherwise.
10582 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10583 struct mlx5_flow *dev_flow,
10584 const struct rte_flow_action_count *count,
10585 const struct rte_flow_action_age *age)
10588 struct mlx5_age_param *age_param;
10590 if (count && count->shared)
10591 counter = flow_dv_counter_get_shared(dev, count->id);
10593 counter = flow_dv_counter_alloc(dev, !!age);
10594 if (!counter || age == NULL)
10596 age_param = flow_dv_counter_idx_get_age(dev, counter);
10597 age_param->context = age->context ? age->context :
10598 (void *)(uintptr_t)(dev_flow->flow_idx);
10599 age_param->timeout = age->timeout;
10600 age_param->port_id = dev->data->port_id;
10601 __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10602 __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10607 * Add Tx queue matcher
10610 * Pointer to the dev struct.
10611 * @param[in, out] matcher
10613 * @param[in, out] key
10614 * Flow matcher value.
10616 * Flow pattern to translate.
10618 * Item is inner pattern.
10621 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10622 void *matcher, void *key,
10623 const struct rte_flow_item *item)
10625 const struct mlx5_rte_flow_item_tx_queue *queue_m;
10626 const struct mlx5_rte_flow_item_tx_queue *queue_v;
10628 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10630 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10631 struct mlx5_txq_ctrl *txq;
10635 queue_m = (const void *)item->mask;
10638 queue_v = (const void *)item->spec;
10641 txq = mlx5_txq_get(dev, queue_v->queue);
10644 queue = txq->obj->sq->id;
10645 MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
10646 MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
10647 queue & queue_m->queue);
10648 mlx5_txq_release(dev, queue_v->queue);
10652 * Set the hash fields according to the @p flow information.
10654 * @param[in] dev_flow
10655 * Pointer to the mlx5_flow.
10656 * @param[in] rss_desc
10657 * Pointer to the mlx5_flow_rss_desc.
10660 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10661 struct mlx5_flow_rss_desc *rss_desc)
10663 uint64_t items = dev_flow->handle->layers;
10665 uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10667 dev_flow->hash_fields = 0;
10668 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10669 if (rss_desc->level >= 2) {
10670 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10674 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10675 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10676 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10677 if (rss_types & ETH_RSS_L3_SRC_ONLY)
10678 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10679 else if (rss_types & ETH_RSS_L3_DST_ONLY)
10680 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10682 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10684 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10685 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10686 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10687 if (rss_types & ETH_RSS_L3_SRC_ONLY)
10688 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10689 else if (rss_types & ETH_RSS_L3_DST_ONLY)
10690 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10692 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10695 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10696 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10697 if (rss_types & ETH_RSS_UDP) {
10698 if (rss_types & ETH_RSS_L4_SRC_ONLY)
10699 dev_flow->hash_fields |=
10700 IBV_RX_HASH_SRC_PORT_UDP;
10701 else if (rss_types & ETH_RSS_L4_DST_ONLY)
10702 dev_flow->hash_fields |=
10703 IBV_RX_HASH_DST_PORT_UDP;
10705 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10707 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10708 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10709 if (rss_types & ETH_RSS_TCP) {
10710 if (rss_types & ETH_RSS_L4_SRC_ONLY)
10711 dev_flow->hash_fields |=
10712 IBV_RX_HASH_SRC_PORT_TCP;
10713 else if (rss_types & ETH_RSS_L4_DST_ONLY)
10714 dev_flow->hash_fields |=
10715 IBV_RX_HASH_DST_PORT_TCP;
10717 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10723 * Prepare an Rx Hash queue.
10726 * Pointer to Ethernet device.
10727 * @param[in] dev_flow
10728 * Pointer to the mlx5_flow.
10729 * @param[in] rss_desc
10730 * Pointer to the mlx5_flow_rss_desc.
10731 * @param[out] hrxq_idx
10732 * Hash Rx queue index.
10735 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10737 static struct mlx5_hrxq *
10738 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
10739 struct mlx5_flow *dev_flow,
10740 struct mlx5_flow_rss_desc *rss_desc,
10741 uint32_t *hrxq_idx)
10743 struct mlx5_priv *priv = dev->data->dev_private;
10744 struct mlx5_flow_handle *dh = dev_flow->handle;
10745 struct mlx5_hrxq *hrxq;
10747 MLX5_ASSERT(rss_desc->queue_num);
10748 rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
10749 rss_desc->hash_fields = dev_flow->hash_fields;
10750 rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
10751 rss_desc->shared_rss = 0;
10752 *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
10755 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10761 * Release sample sub action resource.
10763 * @param[in, out] dev
10764 * Pointer to rte_eth_dev structure.
10765 * @param[in] act_res
10766 * Pointer to sample sub action resource.
10769 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
10770 struct mlx5_flow_sub_actions_idx *act_res)
10772 if (act_res->rix_hrxq) {
10773 mlx5_hrxq_release(dev, act_res->rix_hrxq);
10774 act_res->rix_hrxq = 0;
10776 if (act_res->rix_encap_decap) {
10777 flow_dv_encap_decap_resource_release(dev,
10778 act_res->rix_encap_decap);
10779 act_res->rix_encap_decap = 0;
10781 if (act_res->rix_port_id_action) {
10782 flow_dv_port_id_action_resource_release(dev,
10783 act_res->rix_port_id_action);
10784 act_res->rix_port_id_action = 0;
10786 if (act_res->rix_tag) {
10787 flow_dv_tag_release(dev, act_res->rix_tag);
10788 act_res->rix_tag = 0;
10790 if (act_res->rix_jump) {
10791 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
10792 act_res->rix_jump = 0;
10797 flow_dv_sample_match_cb(struct mlx5_list *list __rte_unused,
10798 struct mlx5_list_entry *entry, void *cb_ctx)
10800 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10801 struct rte_eth_dev *dev = ctx->dev;
10802 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
10803 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
10807 if (ctx_resource->ratio == resource->ratio &&
10808 ctx_resource->ft_type == resource->ft_type &&
10809 ctx_resource->ft_id == resource->ft_id &&
10810 ctx_resource->set_action == resource->set_action &&
10811 !memcmp((void *)&ctx_resource->sample_act,
10812 (void *)&resource->sample_act,
10813 sizeof(struct mlx5_flow_sub_actions_list))) {
10815 * Existing sample action should release the prepared
10816 * sub-actions reference counter.
10818 flow_dv_sample_sub_actions_release(dev,
10819 &ctx_resource->sample_idx);
10825 struct mlx5_list_entry *
10826 flow_dv_sample_create_cb(struct mlx5_list *list __rte_unused,
10827 struct mlx5_list_entry *entry __rte_unused,
10830 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10831 struct rte_eth_dev *dev = ctx->dev;
10832 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
10833 void **sample_dv_actions = ctx_resource->sub_actions;
10834 struct mlx5_flow_dv_sample_resource *resource;
10835 struct mlx5dv_dr_flow_sampler_attr sampler_attr;
10836 struct mlx5_priv *priv = dev->data->dev_private;
10837 struct mlx5_dev_ctx_shared *sh = priv->sh;
10838 struct mlx5_flow_tbl_resource *tbl;
10840 const uint32_t next_ft_step = 1;
10841 uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
10842 uint8_t is_egress = 0;
10843 uint8_t is_transfer = 0;
10844 struct rte_flow_error *error = ctx->error;
10846 /* Register new sample resource. */
10847 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
10849 rte_flow_error_set(error, ENOMEM,
10850 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10852 "cannot allocate resource memory");
10855 *resource = *ctx_resource;
10856 /* Create normal path table level */
10857 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
10859 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
10861 tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
10862 is_egress, is_transfer,
10863 true, NULL, 0, 0, 0, error);
10865 rte_flow_error_set(error, ENOMEM,
10866 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10868 "fail to create normal path table "
10872 resource->normal_path_tbl = tbl;
10873 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
10874 if (!sh->default_miss_action) {
10875 rte_flow_error_set(error, ENOMEM,
10876 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10878 "default miss action was not "
10882 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
10883 sh->default_miss_action;
10885 /* Create a DR sample action */
10886 sampler_attr.sample_ratio = resource->ratio;
10887 sampler_attr.default_next_table = tbl->obj;
10888 sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
10889 sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
10890 &sample_dv_actions[0];
10891 sampler_attr.action = resource->set_action;
10892 if (mlx5_os_flow_dr_create_flow_action_sampler
10893 (&sampler_attr, &resource->verbs_action)) {
10894 rte_flow_error_set(error, ENOMEM,
10895 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10896 NULL, "cannot create sample action");
10899 resource->idx = idx;
10900 resource->dev = dev;
10901 return &resource->entry;
10903 if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
10904 flow_dv_sample_sub_actions_release(dev,
10905 &resource->sample_idx);
10906 if (resource->normal_path_tbl)
10907 flow_dv_tbl_resource_release(MLX5_SH(dev),
10908 resource->normal_path_tbl);
10909 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
10914 struct mlx5_list_entry *
10915 flow_dv_sample_clone_cb(struct mlx5_list *list __rte_unused,
10916 struct mlx5_list_entry *entry __rte_unused,
10919 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10920 struct rte_eth_dev *dev = ctx->dev;
10921 struct mlx5_flow_dv_sample_resource *resource;
10922 struct mlx5_priv *priv = dev->data->dev_private;
10923 struct mlx5_dev_ctx_shared *sh = priv->sh;
10926 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
10928 rte_flow_error_set(ctx->error, ENOMEM,
10929 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10931 "cannot allocate resource memory");
10934 memcpy(resource, entry, sizeof(*resource));
10935 resource->idx = idx;
10936 resource->dev = dev;
10937 return &resource->entry;
10941 flow_dv_sample_clone_free_cb(struct mlx5_list *list __rte_unused,
10942 struct mlx5_list_entry *entry)
10944 struct mlx5_flow_dv_sample_resource *resource =
10945 container_of(entry, typeof(*resource), entry);
10946 struct rte_eth_dev *dev = resource->dev;
10947 struct mlx5_priv *priv = dev->data->dev_private;
10949 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
10954 * Find existing sample resource or create and register a new one.
10956 * @param[in, out] dev
10957 * Pointer to rte_eth_dev structure.
10959 * Pointer to sample resource reference.
10960 * @parm[in, out] dev_flow
10961 * Pointer to the dev_flow.
10962 * @param[out] error
10963 * pointer to error structure.
10966 * 0 on success otherwise -errno and errno is set.
10969 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
10970 struct mlx5_flow_dv_sample_resource *ref,
10971 struct mlx5_flow *dev_flow,
10972 struct rte_flow_error *error)
10974 struct mlx5_flow_dv_sample_resource *resource;
10975 struct mlx5_list_entry *entry;
10976 struct mlx5_priv *priv = dev->data->dev_private;
10977 struct mlx5_flow_cb_ctx ctx = {
10983 entry = mlx5_list_register(&priv->sh->sample_action_list, &ctx);
10986 resource = container_of(entry, typeof(*resource), entry);
10987 dev_flow->handle->dvh.rix_sample = resource->idx;
10988 dev_flow->dv.sample_res = resource;
10993 flow_dv_dest_array_match_cb(struct mlx5_list *list __rte_unused,
10994 struct mlx5_list_entry *entry, void *cb_ctx)
10996 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10997 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
10998 struct rte_eth_dev *dev = ctx->dev;
10999 struct mlx5_flow_dv_dest_array_resource *resource =
11000 container_of(entry, typeof(*resource), entry);
11003 if (ctx_resource->num_of_dest == resource->num_of_dest &&
11004 ctx_resource->ft_type == resource->ft_type &&
11005 !memcmp((void *)resource->sample_act,
11006 (void *)ctx_resource->sample_act,
11007 (ctx_resource->num_of_dest *
11008 sizeof(struct mlx5_flow_sub_actions_list)))) {
11010 * Existing sample action should release the prepared
11011 * sub-actions reference counter.
11013 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11014 flow_dv_sample_sub_actions_release(dev,
11015 &ctx_resource->sample_idx[idx]);
11021 struct mlx5_list_entry *
11022 flow_dv_dest_array_create_cb(struct mlx5_list *list __rte_unused,
11023 struct mlx5_list_entry *entry __rte_unused,
11026 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11027 struct rte_eth_dev *dev = ctx->dev;
11028 struct mlx5_flow_dv_dest_array_resource *resource;
11029 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11030 struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11031 struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11032 struct mlx5_priv *priv = dev->data->dev_private;
11033 struct mlx5_dev_ctx_shared *sh = priv->sh;
11034 struct mlx5_flow_sub_actions_list *sample_act;
11035 struct mlx5dv_dr_domain *domain;
11036 uint32_t idx = 0, res_idx = 0;
11037 struct rte_flow_error *error = ctx->error;
11038 uint64_t action_flags;
11041 /* Register new destination array resource. */
11042 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11045 rte_flow_error_set(error, ENOMEM,
11046 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11048 "cannot allocate resource memory");
11051 *resource = *ctx_resource;
11052 if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11053 domain = sh->fdb_domain;
11054 else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11055 domain = sh->rx_domain;
11057 domain = sh->tx_domain;
11058 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11059 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11060 mlx5_malloc(MLX5_MEM_ZERO,
11061 sizeof(struct mlx5dv_dr_action_dest_attr),
11063 if (!dest_attr[idx]) {
11064 rte_flow_error_set(error, ENOMEM,
11065 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11067 "cannot allocate resource memory");
11070 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11071 sample_act = &ctx_resource->sample_act[idx];
11072 action_flags = sample_act->action_flags;
11073 switch (action_flags) {
11074 case MLX5_FLOW_ACTION_QUEUE:
11075 dest_attr[idx]->dest = sample_act->dr_queue_action;
11077 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11078 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11079 dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11080 dest_attr[idx]->dest_reformat->reformat =
11081 sample_act->dr_encap_action;
11082 dest_attr[idx]->dest_reformat->dest =
11083 sample_act->dr_port_id_action;
11085 case MLX5_FLOW_ACTION_PORT_ID:
11086 dest_attr[idx]->dest = sample_act->dr_port_id_action;
11088 case MLX5_FLOW_ACTION_JUMP:
11089 dest_attr[idx]->dest = sample_act->dr_jump_action;
11092 rte_flow_error_set(error, EINVAL,
11093 RTE_FLOW_ERROR_TYPE_ACTION,
11095 "unsupported actions type");
11099 /* create a dest array actioin */
11100 ret = mlx5_os_flow_dr_create_flow_action_dest_array
11102 resource->num_of_dest,
11104 &resource->action);
11106 rte_flow_error_set(error, ENOMEM,
11107 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11109 "cannot create destination array action");
11112 resource->idx = res_idx;
11113 resource->dev = dev;
11114 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11115 mlx5_free(dest_attr[idx]);
11116 return &resource->entry;
11118 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11119 flow_dv_sample_sub_actions_release(dev,
11120 &resource->sample_idx[idx]);
11121 if (dest_attr[idx])
11122 mlx5_free(dest_attr[idx]);
11124 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11128 struct mlx5_list_entry *
11129 flow_dv_dest_array_clone_cb(struct mlx5_list *list __rte_unused,
11130 struct mlx5_list_entry *entry __rte_unused,
11133 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11134 struct rte_eth_dev *dev = ctx->dev;
11135 struct mlx5_flow_dv_dest_array_resource *resource;
11136 struct mlx5_priv *priv = dev->data->dev_private;
11137 struct mlx5_dev_ctx_shared *sh = priv->sh;
11138 uint32_t res_idx = 0;
11139 struct rte_flow_error *error = ctx->error;
11141 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11144 rte_flow_error_set(error, ENOMEM,
11145 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11147 "cannot allocate dest-array memory");
11150 memcpy(resource, entry, sizeof(*resource));
11151 resource->idx = res_idx;
11152 resource->dev = dev;
11153 return &resource->entry;
11157 flow_dv_dest_array_clone_free_cb(struct mlx5_list *list __rte_unused,
11158 struct mlx5_list_entry *entry)
11160 struct mlx5_flow_dv_dest_array_resource *resource =
11161 container_of(entry, typeof(*resource), entry);
11162 struct rte_eth_dev *dev = resource->dev;
11163 struct mlx5_priv *priv = dev->data->dev_private;
11165 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11169 * Find existing destination array resource or create and register a new one.
11171 * @param[in, out] dev
11172 * Pointer to rte_eth_dev structure.
11174 * Pointer to destination array resource reference.
11175 * @parm[in, out] dev_flow
11176 * Pointer to the dev_flow.
11177 * @param[out] error
11178 * pointer to error structure.
11181 * 0 on success otherwise -errno and errno is set.
11184 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11185 struct mlx5_flow_dv_dest_array_resource *ref,
11186 struct mlx5_flow *dev_flow,
11187 struct rte_flow_error *error)
11189 struct mlx5_flow_dv_dest_array_resource *resource;
11190 struct mlx5_priv *priv = dev->data->dev_private;
11191 struct mlx5_list_entry *entry;
11192 struct mlx5_flow_cb_ctx ctx = {
11198 entry = mlx5_list_register(&priv->sh->dest_array_list, &ctx);
11201 resource = container_of(entry, typeof(*resource), entry);
11202 dev_flow->handle->dvh.rix_dest_array = resource->idx;
11203 dev_flow->dv.dest_array_res = resource;
11208 * Convert Sample action to DV specification.
11211 * Pointer to rte_eth_dev structure.
11212 * @param[in] action
11213 * Pointer to sample action structure.
11214 * @param[in, out] dev_flow
11215 * Pointer to the mlx5_flow.
11217 * Pointer to the flow attributes.
11218 * @param[in, out] num_of_dest
11219 * Pointer to the num of destination.
11220 * @param[in, out] sample_actions
11221 * Pointer to sample actions list.
11222 * @param[in, out] res
11223 * Pointer to sample resource.
11224 * @param[out] error
11225 * Pointer to the error structure.
11228 * 0 on success, a negative errno value otherwise and rte_errno is set.
11231 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11232 const struct rte_flow_action_sample *action,
11233 struct mlx5_flow *dev_flow,
11234 const struct rte_flow_attr *attr,
11235 uint32_t *num_of_dest,
11236 void **sample_actions,
11237 struct mlx5_flow_dv_sample_resource *res,
11238 struct rte_flow_error *error)
11240 struct mlx5_priv *priv = dev->data->dev_private;
11241 const struct rte_flow_action *sub_actions;
11242 struct mlx5_flow_sub_actions_list *sample_act;
11243 struct mlx5_flow_sub_actions_idx *sample_idx;
11244 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11245 struct rte_flow *flow = dev_flow->flow;
11246 struct mlx5_flow_rss_desc *rss_desc;
11247 uint64_t action_flags = 0;
11250 rss_desc = &wks->rss_desc;
11251 sample_act = &res->sample_act;
11252 sample_idx = &res->sample_idx;
11253 res->ratio = action->ratio;
11254 sub_actions = action->actions;
11255 for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11256 int type = sub_actions->type;
11257 uint32_t pre_rix = 0;
11260 case RTE_FLOW_ACTION_TYPE_QUEUE:
11262 const struct rte_flow_action_queue *queue;
11263 struct mlx5_hrxq *hrxq;
11266 queue = sub_actions->conf;
11267 rss_desc->queue_num = 1;
11268 rss_desc->queue[0] = queue->index;
11269 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11270 rss_desc, &hrxq_idx);
11272 return rte_flow_error_set
11274 RTE_FLOW_ERROR_TYPE_ACTION,
11276 "cannot create fate queue");
11277 sample_act->dr_queue_action = hrxq->action;
11278 sample_idx->rix_hrxq = hrxq_idx;
11279 sample_actions[sample_act->actions_num++] =
11282 action_flags |= MLX5_FLOW_ACTION_QUEUE;
11283 if (action_flags & MLX5_FLOW_ACTION_MARK)
11284 dev_flow->handle->rix_hrxq = hrxq_idx;
11285 dev_flow->handle->fate_action =
11286 MLX5_FLOW_FATE_QUEUE;
11289 case RTE_FLOW_ACTION_TYPE_RSS:
11291 struct mlx5_hrxq *hrxq;
11293 const struct rte_flow_action_rss *rss;
11294 const uint8_t *rss_key;
11296 rss = sub_actions->conf;
11297 memcpy(rss_desc->queue, rss->queue,
11298 rss->queue_num * sizeof(uint16_t));
11299 rss_desc->queue_num = rss->queue_num;
11300 /* NULL RSS key indicates default RSS key. */
11301 rss_key = !rss->key ? rss_hash_default_key : rss->key;
11302 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11304 * rss->level and rss.types should be set in advance
11305 * when expanding items for RSS.
11307 flow_dv_hashfields_set(dev_flow, rss_desc);
11308 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11309 rss_desc, &hrxq_idx);
11311 return rte_flow_error_set
11313 RTE_FLOW_ERROR_TYPE_ACTION,
11315 "cannot create fate queue");
11316 sample_act->dr_queue_action = hrxq->action;
11317 sample_idx->rix_hrxq = hrxq_idx;
11318 sample_actions[sample_act->actions_num++] =
11321 action_flags |= MLX5_FLOW_ACTION_RSS;
11322 if (action_flags & MLX5_FLOW_ACTION_MARK)
11323 dev_flow->handle->rix_hrxq = hrxq_idx;
11324 dev_flow->handle->fate_action =
11325 MLX5_FLOW_FATE_QUEUE;
11328 case RTE_FLOW_ACTION_TYPE_MARK:
11330 uint32_t tag_be = mlx5_flow_mark_set
11331 (((const struct rte_flow_action_mark *)
11332 (sub_actions->conf))->id);
11334 dev_flow->handle->mark = 1;
11335 pre_rix = dev_flow->handle->dvh.rix_tag;
11336 /* Save the mark resource before sample */
11337 pre_r = dev_flow->dv.tag_resource;
11338 if (flow_dv_tag_resource_register(dev, tag_be,
11341 MLX5_ASSERT(dev_flow->dv.tag_resource);
11342 sample_act->dr_tag_action =
11343 dev_flow->dv.tag_resource->action;
11344 sample_idx->rix_tag =
11345 dev_flow->handle->dvh.rix_tag;
11346 sample_actions[sample_act->actions_num++] =
11347 sample_act->dr_tag_action;
11348 /* Recover the mark resource after sample */
11349 dev_flow->dv.tag_resource = pre_r;
11350 dev_flow->handle->dvh.rix_tag = pre_rix;
11351 action_flags |= MLX5_FLOW_ACTION_MARK;
11354 case RTE_FLOW_ACTION_TYPE_COUNT:
11356 if (!flow->counter) {
11358 flow_dv_translate_create_counter(dev,
11359 dev_flow, sub_actions->conf,
11361 if (!flow->counter)
11362 return rte_flow_error_set
11364 RTE_FLOW_ERROR_TYPE_ACTION,
11366 "cannot create counter"
11369 sample_act->dr_cnt_action =
11370 (flow_dv_counter_get_by_idx(dev,
11371 flow->counter, NULL))->action;
11372 sample_actions[sample_act->actions_num++] =
11373 sample_act->dr_cnt_action;
11374 action_flags |= MLX5_FLOW_ACTION_COUNT;
11377 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11379 struct mlx5_flow_dv_port_id_action_resource
11381 uint32_t port_id = 0;
11383 memset(&port_id_resource, 0, sizeof(port_id_resource));
11384 /* Save the port id resource before sample */
11385 pre_rix = dev_flow->handle->rix_port_id_action;
11386 pre_r = dev_flow->dv.port_id_action;
11387 if (flow_dv_translate_action_port_id(dev, sub_actions,
11390 port_id_resource.port_id = port_id;
11391 if (flow_dv_port_id_action_resource_register
11392 (dev, &port_id_resource, dev_flow, error))
11394 sample_act->dr_port_id_action =
11395 dev_flow->dv.port_id_action->action;
11396 sample_idx->rix_port_id_action =
11397 dev_flow->handle->rix_port_id_action;
11398 sample_actions[sample_act->actions_num++] =
11399 sample_act->dr_port_id_action;
11400 /* Recover the port id resource after sample */
11401 dev_flow->dv.port_id_action = pre_r;
11402 dev_flow->handle->rix_port_id_action = pre_rix;
11404 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11407 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11408 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11409 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11410 /* Save the encap resource before sample */
11411 pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11412 pre_r = dev_flow->dv.encap_decap;
11413 if (flow_dv_create_action_l2_encap(dev, sub_actions,
11418 sample_act->dr_encap_action =
11419 dev_flow->dv.encap_decap->action;
11420 sample_idx->rix_encap_decap =
11421 dev_flow->handle->dvh.rix_encap_decap;
11422 sample_actions[sample_act->actions_num++] =
11423 sample_act->dr_encap_action;
11424 /* Recover the encap resource after sample */
11425 dev_flow->dv.encap_decap = pre_r;
11426 dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11427 action_flags |= MLX5_FLOW_ACTION_ENCAP;
11430 return rte_flow_error_set(error, EINVAL,
11431 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11433 "Not support for sampler action");
11436 sample_act->action_flags = action_flags;
11437 res->ft_id = dev_flow->dv.group;
11438 if (attr->transfer) {
11440 uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11441 uint64_t set_action;
11442 } action_ctx = { .set_action = 0 };
11444 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11445 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11446 MLX5_MODIFICATION_TYPE_SET);
11447 MLX5_SET(set_action_in, action_ctx.action_in, field,
11448 MLX5_MODI_META_REG_C_0);
11449 MLX5_SET(set_action_in, action_ctx.action_in, data,
11450 priv->vport_meta_tag);
11451 res->set_action = action_ctx.set_action;
11452 } else if (attr->ingress) {
11453 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11455 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11461 * Convert Sample action to DV specification.
11464 * Pointer to rte_eth_dev structure.
11465 * @param[in, out] dev_flow
11466 * Pointer to the mlx5_flow.
11467 * @param[in] num_of_dest
11468 * The num of destination.
11469 * @param[in, out] res
11470 * Pointer to sample resource.
11471 * @param[in, out] mdest_res
11472 * Pointer to destination array resource.
11473 * @param[in] sample_actions
11474 * Pointer to sample path actions list.
11475 * @param[in] action_flags
11476 * Holds the actions detected until now.
11477 * @param[out] error
11478 * Pointer to the error structure.
11481 * 0 on success, a negative errno value otherwise and rte_errno is set.
11484 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11485 struct mlx5_flow *dev_flow,
11486 uint32_t num_of_dest,
11487 struct mlx5_flow_dv_sample_resource *res,
11488 struct mlx5_flow_dv_dest_array_resource *mdest_res,
11489 void **sample_actions,
11490 uint64_t action_flags,
11491 struct rte_flow_error *error)
11493 /* update normal path action resource into last index of array */
11494 uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11495 struct mlx5_flow_sub_actions_list *sample_act =
11496 &mdest_res->sample_act[dest_index];
11497 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11498 struct mlx5_flow_rss_desc *rss_desc;
11499 uint32_t normal_idx = 0;
11500 struct mlx5_hrxq *hrxq;
11504 rss_desc = &wks->rss_desc;
11505 if (num_of_dest > 1) {
11506 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11507 /* Handle QP action for mirroring */
11508 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11509 rss_desc, &hrxq_idx);
11511 return rte_flow_error_set
11513 RTE_FLOW_ERROR_TYPE_ACTION,
11515 "cannot create rx queue");
11517 mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11518 sample_act->dr_queue_action = hrxq->action;
11519 if (action_flags & MLX5_FLOW_ACTION_MARK)
11520 dev_flow->handle->rix_hrxq = hrxq_idx;
11521 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11523 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11525 mdest_res->sample_idx[dest_index].rix_encap_decap =
11526 dev_flow->handle->dvh.rix_encap_decap;
11527 sample_act->dr_encap_action =
11528 dev_flow->dv.encap_decap->action;
11529 dev_flow->handle->dvh.rix_encap_decap = 0;
11531 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11533 mdest_res->sample_idx[dest_index].rix_port_id_action =
11534 dev_flow->handle->rix_port_id_action;
11535 sample_act->dr_port_id_action =
11536 dev_flow->dv.port_id_action->action;
11537 dev_flow->handle->rix_port_id_action = 0;
11539 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11541 mdest_res->sample_idx[dest_index].rix_jump =
11542 dev_flow->handle->rix_jump;
11543 sample_act->dr_jump_action =
11544 dev_flow->dv.jump->action;
11545 dev_flow->handle->rix_jump = 0;
11547 sample_act->actions_num = normal_idx;
11548 /* update sample action resource into first index of array */
11549 mdest_res->ft_type = res->ft_type;
11550 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11551 sizeof(struct mlx5_flow_sub_actions_idx));
11552 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11553 sizeof(struct mlx5_flow_sub_actions_list));
11554 mdest_res->num_of_dest = num_of_dest;
11555 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11557 return rte_flow_error_set(error, EINVAL,
11558 RTE_FLOW_ERROR_TYPE_ACTION,
11559 NULL, "can't create sample "
11562 res->sub_actions = sample_actions;
11563 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11564 return rte_flow_error_set(error, EINVAL,
11565 RTE_FLOW_ERROR_TYPE_ACTION,
11567 "can't create sample action");
11573 * Remove an ASO age action from age actions list.
11576 * Pointer to the Ethernet device structure.
11578 * Pointer to the aso age action handler.
11581 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11582 struct mlx5_aso_age_action *age)
11584 struct mlx5_age_info *age_info;
11585 struct mlx5_age_param *age_param = &age->age_params;
11586 struct mlx5_priv *priv = dev->data->dev_private;
11587 uint16_t expected = AGE_CANDIDATE;
11589 age_info = GET_PORT_AGE_INFO(priv);
11590 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11591 AGE_FREE, false, __ATOMIC_RELAXED,
11592 __ATOMIC_RELAXED)) {
11594 * We need the lock even it is age timeout,
11595 * since age action may still in process.
11597 rte_spinlock_lock(&age_info->aged_sl);
11598 LIST_REMOVE(age, next);
11599 rte_spinlock_unlock(&age_info->aged_sl);
11600 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11605 * Release an ASO age action.
11608 * Pointer to the Ethernet device structure.
11609 * @param[in] age_idx
11610 * Index of ASO age action to release.
11612 * True if the release operation is during flow destroy operation.
11613 * False if the release operation is during action destroy operation.
11616 * 0 when age action was removed, otherwise the number of references.
11619 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11621 struct mlx5_priv *priv = dev->data->dev_private;
11622 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11623 struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11624 uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11627 flow_dv_aso_age_remove_from_age(dev, age);
11628 rte_spinlock_lock(&mng->free_sl);
11629 LIST_INSERT_HEAD(&mng->free, age, next);
11630 rte_spinlock_unlock(&mng->free_sl);
11636 * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11639 * Pointer to the Ethernet device structure.
11642 * 0 on success, otherwise negative errno value and rte_errno is set.
11645 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11647 struct mlx5_priv *priv = dev->data->dev_private;
11648 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11649 void *old_pools = mng->pools;
11650 uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11651 uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11652 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11655 rte_errno = ENOMEM;
11659 memcpy(pools, old_pools,
11660 mng->n * sizeof(struct mlx5_flow_counter_pool *));
11661 mlx5_free(old_pools);
11663 /* First ASO flow hit allocation - starting ASO data-path. */
11664 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11672 mng->pools = pools;
11677 * Create and initialize a new ASO aging pool.
11680 * Pointer to the Ethernet device structure.
11681 * @param[out] age_free
11682 * Where to put the pointer of a new age action.
11685 * The age actions pool pointer and @p age_free is set on success,
11686 * NULL otherwise and rte_errno is set.
11688 static struct mlx5_aso_age_pool *
11689 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11690 struct mlx5_aso_age_action **age_free)
11692 struct mlx5_priv *priv = dev->data->dev_private;
11693 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11694 struct mlx5_aso_age_pool *pool = NULL;
11695 struct mlx5_devx_obj *obj = NULL;
11698 obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->ctx,
11701 rte_errno = ENODATA;
11702 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11705 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11707 claim_zero(mlx5_devx_cmd_destroy(obj));
11708 rte_errno = ENOMEM;
11711 pool->flow_hit_aso_obj = obj;
11712 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11713 rte_spinlock_lock(&mng->resize_sl);
11714 pool->index = mng->next;
11715 /* Resize pools array if there is no room for the new pool in it. */
11716 if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11717 claim_zero(mlx5_devx_cmd_destroy(obj));
11719 rte_spinlock_unlock(&mng->resize_sl);
11722 mng->pools[pool->index] = pool;
11724 rte_spinlock_unlock(&mng->resize_sl);
11725 /* Assign the first action in the new pool, the rest go to free list. */
11726 *age_free = &pool->actions[0];
11727 for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11728 pool->actions[i].offset = i;
11729 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11735 * Allocate a ASO aging bit.
11738 * Pointer to the Ethernet device structure.
11739 * @param[out] error
11740 * Pointer to the error structure.
11743 * Index to ASO age action on success, 0 otherwise and rte_errno is set.
11746 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11748 struct mlx5_priv *priv = dev->data->dev_private;
11749 const struct mlx5_aso_age_pool *pool;
11750 struct mlx5_aso_age_action *age_free = NULL;
11751 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11754 /* Try to get the next free age action bit. */
11755 rte_spinlock_lock(&mng->free_sl);
11756 age_free = LIST_FIRST(&mng->free);
11758 LIST_REMOVE(age_free, next);
11759 } else if (!flow_dv_age_pool_create(dev, &age_free)) {
11760 rte_spinlock_unlock(&mng->free_sl);
11761 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11762 NULL, "failed to create ASO age pool");
11763 return 0; /* 0 is an error. */
11765 rte_spinlock_unlock(&mng->free_sl);
11766 pool = container_of
11767 ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
11768 (age_free - age_free->offset), const struct mlx5_aso_age_pool,
11770 if (!age_free->dr_action) {
11771 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
11775 rte_flow_error_set(error, rte_errno,
11776 RTE_FLOW_ERROR_TYPE_ACTION,
11777 NULL, "failed to get reg_c "
11778 "for ASO flow hit");
11779 return 0; /* 0 is an error. */
11781 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
11782 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
11783 (priv->sh->rx_domain,
11784 pool->flow_hit_aso_obj->obj, age_free->offset,
11785 MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
11786 (reg_c - REG_C_0));
11787 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
11788 if (!age_free->dr_action) {
11790 rte_spinlock_lock(&mng->free_sl);
11791 LIST_INSERT_HEAD(&mng->free, age_free, next);
11792 rte_spinlock_unlock(&mng->free_sl);
11793 rte_flow_error_set(error, rte_errno,
11794 RTE_FLOW_ERROR_TYPE_ACTION,
11795 NULL, "failed to create ASO "
11796 "flow hit action");
11797 return 0; /* 0 is an error. */
11800 __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
11801 return pool->index | ((age_free->offset + 1) << 16);
11805 * Initialize flow ASO age parameters.
11808 * Pointer to rte_eth_dev structure.
11809 * @param[in] age_idx
11810 * Index of ASO age action.
11811 * @param[in] context
11812 * Pointer to flow counter age context.
11813 * @param[in] timeout
11814 * Aging timeout in seconds.
11818 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
11823 struct mlx5_aso_age_action *aso_age;
11825 aso_age = flow_aso_age_get_by_idx(dev, age_idx);
11826 MLX5_ASSERT(aso_age);
11827 aso_age->age_params.context = context;
11828 aso_age->age_params.timeout = timeout;
11829 aso_age->age_params.port_id = dev->data->port_id;
11830 __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
11832 __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
11837 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
11838 const struct rte_flow_item_integrity *value,
11839 void *headers_m, void *headers_v)
11842 /* application l4_ok filter aggregates all hardware l4 filters
11843 * therefore hw l4_checksum_ok must be implicitly added here.
11845 struct rte_flow_item_integrity local_item;
11847 local_item.l4_csum_ok = 1;
11848 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
11849 local_item.l4_csum_ok);
11850 if (value->l4_ok) {
11851 /* application l4_ok = 1 matches sets both hw flags
11852 * l4_ok and l4_checksum_ok flags to 1.
11854 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11855 l4_checksum_ok, local_item.l4_csum_ok);
11856 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
11858 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
11861 /* application l4_ok = 0 matches on hw flag
11862 * l4_checksum_ok = 0 only.
11864 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11865 l4_checksum_ok, 0);
11867 } else if (mask->l4_csum_ok) {
11868 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
11870 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
11871 value->l4_csum_ok);
11876 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
11877 const struct rte_flow_item_integrity *value,
11878 void *headers_m, void *headers_v,
11882 /* application l3_ok filter aggregates all hardware l3 filters
11883 * therefore hw ipv4_checksum_ok must be implicitly added here.
11885 struct rte_flow_item_integrity local_item;
11887 local_item.ipv4_csum_ok = !!is_ipv4;
11888 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
11889 local_item.ipv4_csum_ok);
11890 if (value->l3_ok) {
11891 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11892 ipv4_checksum_ok, local_item.ipv4_csum_ok);
11893 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
11895 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
11898 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11899 ipv4_checksum_ok, 0);
11901 } else if (mask->ipv4_csum_ok) {
11902 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
11903 mask->ipv4_csum_ok);
11904 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
11905 value->ipv4_csum_ok);
11910 flow_dv_translate_item_integrity(void *matcher, void *key,
11911 const struct rte_flow_item *head_item,
11912 const struct rte_flow_item *integrity_item)
11914 const struct rte_flow_item_integrity *mask = integrity_item->mask;
11915 const struct rte_flow_item_integrity *value = integrity_item->spec;
11916 const struct rte_flow_item *tunnel_item, *end_item, *item;
11919 uint32_t l3_protocol;
11924 mask = &rte_flow_item_integrity_mask;
11925 if (value->level > 1) {
11926 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
11928 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
11930 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
11932 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
11934 tunnel_item = mlx5_flow_find_tunnel_item(head_item);
11935 if (value->level > 1) {
11936 /* tunnel item was verified during the item validation */
11937 item = tunnel_item;
11938 end_item = mlx5_find_end_item(tunnel_item);
11941 end_item = tunnel_item ? tunnel_item :
11942 mlx5_find_end_item(integrity_item);
11944 l3_protocol = mask->l3_ok ?
11945 mlx5_flow_locate_proto_l3(&item, end_item) : 0;
11946 flow_dv_translate_integrity_l3(mask, value, headers_m, headers_v,
11947 l3_protocol == RTE_ETHER_TYPE_IPV4);
11948 flow_dv_translate_integrity_l4(mask, value, headers_m, headers_v);
11952 * Prepares DV flow counter with aging configuration.
11953 * Gets it by index when exists, creates a new one when doesn't.
11956 * Pointer to rte_eth_dev structure.
11957 * @param[in] dev_flow
11958 * Pointer to the mlx5_flow.
11959 * @param[in, out] flow
11960 * Pointer to the sub flow.
11962 * Pointer to the counter action configuration.
11964 * Pointer to the aging action configuration.
11965 * @param[out] error
11966 * Pointer to the error structure.
11969 * Pointer to the counter, NULL otherwise.
11971 static struct mlx5_flow_counter *
11972 flow_dv_prepare_counter(struct rte_eth_dev *dev,
11973 struct mlx5_flow *dev_flow,
11974 struct rte_flow *flow,
11975 const struct rte_flow_action_count *count,
11976 const struct rte_flow_action_age *age,
11977 struct rte_flow_error *error)
11979 if (!flow->counter) {
11980 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
11982 if (!flow->counter) {
11983 rte_flow_error_set(error, rte_errno,
11984 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11985 "cannot create counter object.");
11989 return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
11993 * Release an ASO CT action by its own device.
11996 * Pointer to the Ethernet device structure.
11998 * Index of ASO CT action to release.
12001 * 0 when CT action was removed, otherwise the number of references.
12004 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12006 struct mlx5_priv *priv = dev->data->dev_private;
12007 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12009 struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12010 enum mlx5_aso_ct_state state =
12011 __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12013 /* Cannot release when CT is in the ASO SQ. */
12014 if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12016 ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12018 if (ct->dr_action_orig) {
12019 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12020 claim_zero(mlx5_glue->destroy_flow_action
12021 (ct->dr_action_orig));
12023 ct->dr_action_orig = NULL;
12025 if (ct->dr_action_rply) {
12026 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12027 claim_zero(mlx5_glue->destroy_flow_action
12028 (ct->dr_action_rply));
12030 ct->dr_action_rply = NULL;
12032 /* Clear the state to free, no need in 1st allocation. */
12033 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12034 rte_spinlock_lock(&mng->ct_sl);
12035 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12036 rte_spinlock_unlock(&mng->ct_sl);
12042 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx)
12044 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12045 uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12046 struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12049 MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12050 if (dev->data->dev_started != 1)
12052 return flow_dv_aso_ct_dev_release(owndev, idx);
12056 * Resize the ASO CT pools array by 64 pools.
12059 * Pointer to the Ethernet device structure.
12062 * 0 on success, otherwise negative errno value and rte_errno is set.
12065 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12067 struct mlx5_priv *priv = dev->data->dev_private;
12068 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12069 void *old_pools = mng->pools;
12070 /* Magic number now, need a macro. */
12071 uint32_t resize = mng->n + 64;
12072 uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12073 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12076 rte_errno = ENOMEM;
12079 rte_rwlock_write_lock(&mng->resize_rwl);
12080 /* ASO SQ/QP was already initialized in the startup. */
12082 /* Realloc could be an alternative choice. */
12083 rte_memcpy(pools, old_pools,
12084 mng->n * sizeof(struct mlx5_aso_ct_pool *));
12085 mlx5_free(old_pools);
12088 mng->pools = pools;
12089 rte_rwlock_write_unlock(&mng->resize_rwl);
12094 * Create and initialize a new ASO CT pool.
12097 * Pointer to the Ethernet device structure.
12098 * @param[out] ct_free
12099 * Where to put the pointer of a new CT action.
12102 * The CT actions pool pointer and @p ct_free is set on success,
12103 * NULL otherwise and rte_errno is set.
12105 static struct mlx5_aso_ct_pool *
12106 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12107 struct mlx5_aso_ct_action **ct_free)
12109 struct mlx5_priv *priv = dev->data->dev_private;
12110 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12111 struct mlx5_aso_ct_pool *pool = NULL;
12112 struct mlx5_devx_obj *obj = NULL;
12114 uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12116 obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->ctx,
12117 priv->sh->pdn, log_obj_size);
12119 rte_errno = ENODATA;
12120 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12123 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12125 rte_errno = ENOMEM;
12126 claim_zero(mlx5_devx_cmd_destroy(obj));
12129 pool->devx_obj = obj;
12130 pool->index = mng->next;
12131 /* Resize pools array if there is no room for the new pool in it. */
12132 if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12133 claim_zero(mlx5_devx_cmd_destroy(obj));
12137 mng->pools[pool->index] = pool;
12139 /* Assign the first action in the new pool, the rest go to free list. */
12140 *ct_free = &pool->actions[0];
12141 /* Lock outside, the list operation is safe here. */
12142 for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12143 /* refcnt is 0 when allocating the memory. */
12144 pool->actions[i].offset = i;
12145 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12151 * Allocate a ASO CT action from free list.
12154 * Pointer to the Ethernet device structure.
12155 * @param[out] error
12156 * Pointer to the error structure.
12159 * Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12162 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12164 struct mlx5_priv *priv = dev->data->dev_private;
12165 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12166 struct mlx5_aso_ct_action *ct = NULL;
12167 struct mlx5_aso_ct_pool *pool;
12172 if (!priv->config.devx) {
12173 rte_errno = ENOTSUP;
12176 /* Get a free CT action, if no, a new pool will be created. */
12177 rte_spinlock_lock(&mng->ct_sl);
12178 ct = LIST_FIRST(&mng->free_cts);
12180 LIST_REMOVE(ct, next);
12181 } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12182 rte_spinlock_unlock(&mng->ct_sl);
12183 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12184 NULL, "failed to create ASO CT pool");
12187 rte_spinlock_unlock(&mng->ct_sl);
12188 pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12189 ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12190 /* 0: inactive, 1: created, 2+: used by flows. */
12191 __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12192 reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12193 if (!ct->dr_action_orig) {
12194 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12195 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12196 (priv->sh->rx_domain, pool->devx_obj->obj,
12198 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12201 RTE_SET_USED(reg_c);
12203 if (!ct->dr_action_orig) {
12204 flow_dv_aso_ct_dev_release(dev, ct_idx);
12205 rte_flow_error_set(error, rte_errno,
12206 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12207 "failed to create ASO CT action");
12211 if (!ct->dr_action_rply) {
12212 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12213 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12214 (priv->sh->rx_domain, pool->devx_obj->obj,
12216 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12219 if (!ct->dr_action_rply) {
12220 flow_dv_aso_ct_dev_release(dev, ct_idx);
12221 rte_flow_error_set(error, rte_errno,
12222 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12223 "failed to create ASO CT action");
12231 * Create a conntrack object with context and actions by using ASO mechanism.
12234 * Pointer to rte_eth_dev structure.
12236 * Pointer to conntrack information profile.
12237 * @param[out] error
12238 * Pointer to the error structure.
12241 * Index to conntrack object on success, 0 otherwise.
12244 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12245 const struct rte_flow_action_conntrack *pro,
12246 struct rte_flow_error *error)
12248 struct mlx5_priv *priv = dev->data->dev_private;
12249 struct mlx5_dev_ctx_shared *sh = priv->sh;
12250 struct mlx5_aso_ct_action *ct;
12253 if (!sh->ct_aso_en)
12254 return rte_flow_error_set(error, ENOTSUP,
12255 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12256 "Connection is not supported");
12257 idx = flow_dv_aso_ct_alloc(dev, error);
12259 return rte_flow_error_set(error, rte_errno,
12260 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12261 "Failed to allocate CT object");
12262 ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12263 if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12264 return rte_flow_error_set(error, EBUSY,
12265 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12266 "Failed to update CT");
12267 ct->is_original = !!pro->is_original_dir;
12268 ct->peer = pro->peer_port;
12273 * Fill the flow with DV spec, lock free
12274 * (mutex should be acquired by caller).
12277 * Pointer to rte_eth_dev structure.
12278 * @param[in, out] dev_flow
12279 * Pointer to the sub flow.
12281 * Pointer to the flow attributes.
12283 * Pointer to the list of items.
12284 * @param[in] actions
12285 * Pointer to the list of actions.
12286 * @param[out] error
12287 * Pointer to the error structure.
12290 * 0 on success, a negative errno value otherwise and rte_errno is set.
12293 flow_dv_translate(struct rte_eth_dev *dev,
12294 struct mlx5_flow *dev_flow,
12295 const struct rte_flow_attr *attr,
12296 const struct rte_flow_item items[],
12297 const struct rte_flow_action actions[],
12298 struct rte_flow_error *error)
12300 struct mlx5_priv *priv = dev->data->dev_private;
12301 struct mlx5_dev_config *dev_conf = &priv->config;
12302 struct rte_flow *flow = dev_flow->flow;
12303 struct mlx5_flow_handle *handle = dev_flow->handle;
12304 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12305 struct mlx5_flow_rss_desc *rss_desc;
12306 uint64_t item_flags = 0;
12307 uint64_t last_item = 0;
12308 uint64_t action_flags = 0;
12309 struct mlx5_flow_dv_matcher matcher = {
12311 .size = sizeof(matcher.mask.buf),
12315 bool actions_end = false;
12317 struct mlx5_flow_dv_modify_hdr_resource res;
12318 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12319 sizeof(struct mlx5_modification_cmd) *
12320 (MLX5_MAX_MODIFY_NUM + 1)];
12322 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12323 const struct rte_flow_action_count *count = NULL;
12324 const struct rte_flow_action_age *non_shared_age = NULL;
12325 union flow_dv_attr flow_attr = { .attr = 0 };
12327 union mlx5_flow_tbl_key tbl_key;
12328 uint32_t modify_action_position = UINT32_MAX;
12329 void *match_mask = matcher.mask.buf;
12330 void *match_value = dev_flow->dv.value.buf;
12331 uint8_t next_protocol = 0xff;
12332 struct rte_vlan_hdr vlan = { 0 };
12333 struct mlx5_flow_dv_dest_array_resource mdest_res;
12334 struct mlx5_flow_dv_sample_resource sample_res;
12335 void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12336 const struct rte_flow_action_sample *sample = NULL;
12337 struct mlx5_flow_sub_actions_list *sample_act;
12338 uint32_t sample_act_pos = UINT32_MAX;
12339 uint32_t age_act_pos = UINT32_MAX;
12340 uint32_t num_of_dest = 0;
12341 int tmp_actions_n = 0;
12344 const struct mlx5_flow_tunnel *tunnel = NULL;
12345 struct flow_grp_info grp_info = {
12346 .external = !!dev_flow->external,
12347 .transfer = !!attr->transfer,
12348 .fdb_def_rule = !!priv->fdb_def_rule,
12349 .skip_scale = dev_flow->skip_scale &
12350 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12351 .std_tbl_fix = true,
12353 const struct rte_flow_item *head_item = items;
12356 return rte_flow_error_set(error, ENOMEM,
12357 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12359 "failed to push flow workspace");
12360 rss_desc = &wks->rss_desc;
12361 memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12362 memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12363 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12364 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12365 /* update normal path action resource into last index of array */
12366 sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12367 if (is_tunnel_offload_active(dev)) {
12368 if (dev_flow->tunnel) {
12369 RTE_VERIFY(dev_flow->tof_type ==
12370 MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12371 tunnel = dev_flow->tunnel;
12373 tunnel = mlx5_get_tof(items, actions,
12374 &dev_flow->tof_type);
12375 dev_flow->tunnel = tunnel;
12377 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12378 (dev, attr, tunnel, dev_flow->tof_type);
12380 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12381 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12382 ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12386 dev_flow->dv.group = table;
12387 if (attr->transfer)
12388 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12389 /* number of actions must be set to 0 in case of dirty stack. */
12390 mhdr_res->actions_num = 0;
12391 if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12393 * do not add decap action if match rule drops packet
12394 * HW rejects rules with decap & drop
12396 * if tunnel match rule was inserted before matching tunnel set
12397 * rule flow table used in the match rule must be registered.
12398 * current implementation handles that in the
12399 * flow_dv_match_register() at the function end.
12401 bool add_decap = true;
12402 const struct rte_flow_action *ptr = actions;
12404 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12405 if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12411 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12415 dev_flow->dv.actions[actions_n++] =
12416 dev_flow->dv.encap_decap->action;
12417 action_flags |= MLX5_FLOW_ACTION_DECAP;
12420 for (; !actions_end ; actions++) {
12421 const struct rte_flow_action_queue *queue;
12422 const struct rte_flow_action_rss *rss;
12423 const struct rte_flow_action *action = actions;
12424 const uint8_t *rss_key;
12425 struct mlx5_flow_tbl_resource *tbl;
12426 struct mlx5_aso_age_action *age_act;
12427 struct mlx5_flow_counter *cnt_act;
12428 uint32_t port_id = 0;
12429 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12430 int action_type = actions->type;
12431 const struct rte_flow_action *found_action = NULL;
12432 uint32_t jump_group = 0;
12433 uint32_t owner_idx;
12434 struct mlx5_aso_ct_action *ct;
12436 if (!mlx5_flow_os_action_supported(action_type))
12437 return rte_flow_error_set(error, ENOTSUP,
12438 RTE_FLOW_ERROR_TYPE_ACTION,
12440 "action not supported");
12441 switch (action_type) {
12442 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12443 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12445 case RTE_FLOW_ACTION_TYPE_VOID:
12447 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12448 if (flow_dv_translate_action_port_id(dev, action,
12451 port_id_resource.port_id = port_id;
12452 MLX5_ASSERT(!handle->rix_port_id_action);
12453 if (flow_dv_port_id_action_resource_register
12454 (dev, &port_id_resource, dev_flow, error))
12456 dev_flow->dv.actions[actions_n++] =
12457 dev_flow->dv.port_id_action->action;
12458 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12459 dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12460 sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12463 case RTE_FLOW_ACTION_TYPE_FLAG:
12464 action_flags |= MLX5_FLOW_ACTION_FLAG;
12465 dev_flow->handle->mark = 1;
12466 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12467 struct rte_flow_action_mark mark = {
12468 .id = MLX5_FLOW_MARK_DEFAULT,
12471 if (flow_dv_convert_action_mark(dev, &mark,
12475 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12478 tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12480 * Only one FLAG or MARK is supported per device flow
12481 * right now. So the pointer to the tag resource must be
12482 * zero before the register process.
12484 MLX5_ASSERT(!handle->dvh.rix_tag);
12485 if (flow_dv_tag_resource_register(dev, tag_be,
12488 MLX5_ASSERT(dev_flow->dv.tag_resource);
12489 dev_flow->dv.actions[actions_n++] =
12490 dev_flow->dv.tag_resource->action;
12492 case RTE_FLOW_ACTION_TYPE_MARK:
12493 action_flags |= MLX5_FLOW_ACTION_MARK;
12494 dev_flow->handle->mark = 1;
12495 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12496 const struct rte_flow_action_mark *mark =
12497 (const struct rte_flow_action_mark *)
12500 if (flow_dv_convert_action_mark(dev, mark,
12504 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12508 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12509 /* Legacy (non-extensive) MARK action. */
12510 tag_be = mlx5_flow_mark_set
12511 (((const struct rte_flow_action_mark *)
12512 (actions->conf))->id);
12513 MLX5_ASSERT(!handle->dvh.rix_tag);
12514 if (flow_dv_tag_resource_register(dev, tag_be,
12517 MLX5_ASSERT(dev_flow->dv.tag_resource);
12518 dev_flow->dv.actions[actions_n++] =
12519 dev_flow->dv.tag_resource->action;
12521 case RTE_FLOW_ACTION_TYPE_SET_META:
12522 if (flow_dv_convert_action_set_meta
12523 (dev, mhdr_res, attr,
12524 (const struct rte_flow_action_set_meta *)
12525 actions->conf, error))
12527 action_flags |= MLX5_FLOW_ACTION_SET_META;
12529 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12530 if (flow_dv_convert_action_set_tag
12532 (const struct rte_flow_action_set_tag *)
12533 actions->conf, error))
12535 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12537 case RTE_FLOW_ACTION_TYPE_DROP:
12538 action_flags |= MLX5_FLOW_ACTION_DROP;
12539 dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12541 case RTE_FLOW_ACTION_TYPE_QUEUE:
12542 queue = actions->conf;
12543 rss_desc->queue_num = 1;
12544 rss_desc->queue[0] = queue->index;
12545 action_flags |= MLX5_FLOW_ACTION_QUEUE;
12546 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12547 sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12550 case RTE_FLOW_ACTION_TYPE_RSS:
12551 rss = actions->conf;
12552 memcpy(rss_desc->queue, rss->queue,
12553 rss->queue_num * sizeof(uint16_t));
12554 rss_desc->queue_num = rss->queue_num;
12555 /* NULL RSS key indicates default RSS key. */
12556 rss_key = !rss->key ? rss_hash_default_key : rss->key;
12557 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12559 * rss->level and rss.types should be set in advance
12560 * when expanding items for RSS.
12562 action_flags |= MLX5_FLOW_ACTION_RSS;
12563 dev_flow->handle->fate_action = rss_desc->shared_rss ?
12564 MLX5_FLOW_FATE_SHARED_RSS :
12565 MLX5_FLOW_FATE_QUEUE;
12567 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12568 flow->age = (uint32_t)(uintptr_t)(action->conf);
12569 age_act = flow_aso_age_get_by_idx(dev, flow->age);
12570 __atomic_fetch_add(&age_act->refcnt, 1,
12572 age_act_pos = actions_n++;
12573 action_flags |= MLX5_FLOW_ACTION_AGE;
12575 case RTE_FLOW_ACTION_TYPE_AGE:
12576 non_shared_age = action->conf;
12577 age_act_pos = actions_n++;
12578 action_flags |= MLX5_FLOW_ACTION_AGE;
12580 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12581 flow->counter = (uint32_t)(uintptr_t)(action->conf);
12582 cnt_act = flow_dv_counter_get_by_idx(dev, flow->counter,
12584 __atomic_fetch_add(&cnt_act->shared_info.refcnt, 1,
12586 /* Save information first, will apply later. */
12587 action_flags |= MLX5_FLOW_ACTION_COUNT;
12589 case RTE_FLOW_ACTION_TYPE_COUNT:
12590 if (!dev_conf->devx) {
12591 return rte_flow_error_set
12593 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12595 "count action not supported");
12597 /* Save information first, will apply later. */
12598 count = action->conf;
12599 action_flags |= MLX5_FLOW_ACTION_COUNT;
12601 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12602 dev_flow->dv.actions[actions_n++] =
12603 priv->sh->pop_vlan_action;
12604 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12606 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12607 if (!(action_flags &
12608 MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12609 flow_dev_get_vlan_info_from_items(items, &vlan);
12610 vlan.eth_proto = rte_be_to_cpu_16
12611 ((((const struct rte_flow_action_of_push_vlan *)
12612 actions->conf)->ethertype));
12613 found_action = mlx5_flow_find_action
12615 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12617 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12618 found_action = mlx5_flow_find_action
12620 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12622 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12623 if (flow_dv_create_action_push_vlan
12624 (dev, attr, &vlan, dev_flow, error))
12626 dev_flow->dv.actions[actions_n++] =
12627 dev_flow->dv.push_vlan_res->action;
12628 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12630 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12631 /* of_vlan_push action handled this action */
12632 MLX5_ASSERT(action_flags &
12633 MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12635 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12636 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12638 flow_dev_get_vlan_info_from_items(items, &vlan);
12639 mlx5_update_vlan_vid_pcp(actions, &vlan);
12640 /* If no VLAN push - this is a modify header action */
12641 if (flow_dv_convert_action_modify_vlan_vid
12642 (mhdr_res, actions, error))
12644 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12646 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12647 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12648 if (flow_dv_create_action_l2_encap(dev, actions,
12653 dev_flow->dv.actions[actions_n++] =
12654 dev_flow->dv.encap_decap->action;
12655 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12656 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12657 sample_act->action_flags |=
12658 MLX5_FLOW_ACTION_ENCAP;
12660 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12661 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12662 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12666 dev_flow->dv.actions[actions_n++] =
12667 dev_flow->dv.encap_decap->action;
12668 action_flags |= MLX5_FLOW_ACTION_DECAP;
12670 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12671 /* Handle encap with preceding decap. */
12672 if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12673 if (flow_dv_create_action_raw_encap
12674 (dev, actions, dev_flow, attr, error))
12676 dev_flow->dv.actions[actions_n++] =
12677 dev_flow->dv.encap_decap->action;
12679 /* Handle encap without preceding decap. */
12680 if (flow_dv_create_action_l2_encap
12681 (dev, actions, dev_flow, attr->transfer,
12684 dev_flow->dv.actions[actions_n++] =
12685 dev_flow->dv.encap_decap->action;
12687 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12688 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12689 sample_act->action_flags |=
12690 MLX5_FLOW_ACTION_ENCAP;
12692 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
12693 while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
12695 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
12696 if (flow_dv_create_action_l2_decap
12697 (dev, dev_flow, attr->transfer, error))
12699 dev_flow->dv.actions[actions_n++] =
12700 dev_flow->dv.encap_decap->action;
12702 /* If decap is followed by encap, handle it at encap. */
12703 action_flags |= MLX5_FLOW_ACTION_DECAP;
12705 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
12706 dev_flow->dv.actions[actions_n++] =
12707 (void *)(uintptr_t)action->conf;
12708 action_flags |= MLX5_FLOW_ACTION_JUMP;
12710 case RTE_FLOW_ACTION_TYPE_JUMP:
12711 jump_group = ((const struct rte_flow_action_jump *)
12712 action->conf)->group;
12713 grp_info.std_tbl_fix = 0;
12714 if (dev_flow->skip_scale &
12715 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
12716 grp_info.skip_scale = 1;
12718 grp_info.skip_scale = 0;
12719 ret = mlx5_flow_group_to_table(dev, tunnel,
12725 tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
12727 !!dev_flow->external,
12728 tunnel, jump_group, 0,
12731 return rte_flow_error_set
12733 RTE_FLOW_ERROR_TYPE_ACTION,
12735 "cannot create jump action.");
12736 if (flow_dv_jump_tbl_resource_register
12737 (dev, tbl, dev_flow, error)) {
12738 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12739 return rte_flow_error_set
12741 RTE_FLOW_ERROR_TYPE_ACTION,
12743 "cannot create jump action.");
12745 dev_flow->dv.actions[actions_n++] =
12746 dev_flow->dv.jump->action;
12747 action_flags |= MLX5_FLOW_ACTION_JUMP;
12748 dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
12749 sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
12752 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
12753 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
12754 if (flow_dv_convert_action_modify_mac
12755 (mhdr_res, actions, error))
12757 action_flags |= actions->type ==
12758 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
12759 MLX5_FLOW_ACTION_SET_MAC_SRC :
12760 MLX5_FLOW_ACTION_SET_MAC_DST;
12762 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
12763 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
12764 if (flow_dv_convert_action_modify_ipv4
12765 (mhdr_res, actions, error))
12767 action_flags |= actions->type ==
12768 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
12769 MLX5_FLOW_ACTION_SET_IPV4_SRC :
12770 MLX5_FLOW_ACTION_SET_IPV4_DST;
12772 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
12773 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
12774 if (flow_dv_convert_action_modify_ipv6
12775 (mhdr_res, actions, error))
12777 action_flags |= actions->type ==
12778 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
12779 MLX5_FLOW_ACTION_SET_IPV6_SRC :
12780 MLX5_FLOW_ACTION_SET_IPV6_DST;
12782 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
12783 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
12784 if (flow_dv_convert_action_modify_tp
12785 (mhdr_res, actions, items,
12786 &flow_attr, dev_flow, !!(action_flags &
12787 MLX5_FLOW_ACTION_DECAP), error))
12789 action_flags |= actions->type ==
12790 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
12791 MLX5_FLOW_ACTION_SET_TP_SRC :
12792 MLX5_FLOW_ACTION_SET_TP_DST;
12794 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
12795 if (flow_dv_convert_action_modify_dec_ttl
12796 (mhdr_res, items, &flow_attr, dev_flow,
12798 MLX5_FLOW_ACTION_DECAP), error))
12800 action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
12802 case RTE_FLOW_ACTION_TYPE_SET_TTL:
12803 if (flow_dv_convert_action_modify_ttl
12804 (mhdr_res, actions, items, &flow_attr,
12805 dev_flow, !!(action_flags &
12806 MLX5_FLOW_ACTION_DECAP), error))
12808 action_flags |= MLX5_FLOW_ACTION_SET_TTL;
12810 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
12811 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
12812 if (flow_dv_convert_action_modify_tcp_seq
12813 (mhdr_res, actions, error))
12815 action_flags |= actions->type ==
12816 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
12817 MLX5_FLOW_ACTION_INC_TCP_SEQ :
12818 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
12821 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
12822 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
12823 if (flow_dv_convert_action_modify_tcp_ack
12824 (mhdr_res, actions, error))
12826 action_flags |= actions->type ==
12827 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
12828 MLX5_FLOW_ACTION_INC_TCP_ACK :
12829 MLX5_FLOW_ACTION_DEC_TCP_ACK;
12831 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
12832 if (flow_dv_convert_action_set_reg
12833 (mhdr_res, actions, error))
12835 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12837 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
12838 if (flow_dv_convert_action_copy_mreg
12839 (dev, mhdr_res, actions, error))
12841 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12843 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
12844 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
12845 dev_flow->handle->fate_action =
12846 MLX5_FLOW_FATE_DEFAULT_MISS;
12848 case RTE_FLOW_ACTION_TYPE_METER:
12850 return rte_flow_error_set(error, rte_errno,
12851 RTE_FLOW_ERROR_TYPE_ACTION,
12852 NULL, "Failed to get meter in flow.");
12853 /* Set the meter action. */
12854 dev_flow->dv.actions[actions_n++] =
12855 wks->fm->meter_action;
12856 action_flags |= MLX5_FLOW_ACTION_METER;
12858 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
12859 if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
12862 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
12864 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
12865 if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
12868 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
12870 case RTE_FLOW_ACTION_TYPE_SAMPLE:
12871 sample_act_pos = actions_n;
12872 sample = (const struct rte_flow_action_sample *)
12875 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
12876 /* put encap action into group if work with port id */
12877 if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
12878 (action_flags & MLX5_FLOW_ACTION_PORT_ID))
12879 sample_act->action_flags |=
12880 MLX5_FLOW_ACTION_ENCAP;
12882 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
12883 if (flow_dv_convert_action_modify_field
12884 (dev, mhdr_res, actions, attr, error))
12886 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
12888 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
12889 owner_idx = (uint32_t)(uintptr_t)action->conf;
12890 ct = flow_aso_ct_get_by_idx(dev, owner_idx);
12892 return rte_flow_error_set(error, EINVAL,
12893 RTE_FLOW_ERROR_TYPE_ACTION,
12895 "Failed to get CT object.");
12896 if (mlx5_aso_ct_available(priv->sh, ct))
12897 return rte_flow_error_set(error, rte_errno,
12898 RTE_FLOW_ERROR_TYPE_ACTION,
12900 "CT is unavailable.");
12901 if (ct->is_original)
12902 dev_flow->dv.actions[actions_n] =
12903 ct->dr_action_orig;
12905 dev_flow->dv.actions[actions_n] =
12906 ct->dr_action_rply;
12907 flow->indirect_type = MLX5_INDIRECT_ACTION_TYPE_CT;
12908 flow->ct = owner_idx;
12909 __atomic_fetch_add(&ct->refcnt, 1, __ATOMIC_RELAXED);
12911 action_flags |= MLX5_FLOW_ACTION_CT;
12913 case RTE_FLOW_ACTION_TYPE_END:
12914 actions_end = true;
12915 if (mhdr_res->actions_num) {
12916 /* create modify action if needed. */
12917 if (flow_dv_modify_hdr_resource_register
12918 (dev, mhdr_res, dev_flow, error))
12920 dev_flow->dv.actions[modify_action_position] =
12921 handle->dvh.modify_hdr->action;
12924 * Handle AGE and COUNT action by single HW counter
12925 * when they are not shared.
12927 if (action_flags & MLX5_FLOW_ACTION_AGE) {
12928 if ((non_shared_age &&
12929 count && !count->shared) ||
12930 !(priv->sh->flow_hit_aso_en &&
12931 (attr->group || attr->transfer))) {
12932 /* Creates age by counters. */
12933 cnt_act = flow_dv_prepare_counter
12940 dev_flow->dv.actions[age_act_pos] =
12944 if (!flow->age && non_shared_age) {
12945 flow->age = flow_dv_aso_age_alloc
12949 flow_dv_aso_age_params_init
12951 non_shared_age->context ?
12952 non_shared_age->context :
12953 (void *)(uintptr_t)
12954 (dev_flow->flow_idx),
12955 non_shared_age->timeout);
12957 age_act = flow_aso_age_get_by_idx(dev,
12959 dev_flow->dv.actions[age_act_pos] =
12960 age_act->dr_action;
12962 if (action_flags & MLX5_FLOW_ACTION_COUNT) {
12964 * Create one count action, to be used
12965 * by all sub-flows.
12967 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
12972 dev_flow->dv.actions[actions_n++] =
12978 if (mhdr_res->actions_num &&
12979 modify_action_position == UINT32_MAX)
12980 modify_action_position = actions_n++;
12982 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
12983 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
12984 int item_type = items->type;
12986 if (!mlx5_flow_os_item_supported(item_type))
12987 return rte_flow_error_set(error, ENOTSUP,
12988 RTE_FLOW_ERROR_TYPE_ITEM,
12989 NULL, "item not supported");
12990 switch (item_type) {
12991 case RTE_FLOW_ITEM_TYPE_PORT_ID:
12992 flow_dv_translate_item_port_id
12993 (dev, match_mask, match_value, items, attr);
12994 last_item = MLX5_FLOW_ITEM_PORT_ID;
12996 case RTE_FLOW_ITEM_TYPE_ETH:
12997 flow_dv_translate_item_eth(match_mask, match_value,
12999 dev_flow->dv.group);
13000 matcher.priority = action_flags &
13001 MLX5_FLOW_ACTION_DEFAULT_MISS &&
13002 !dev_flow->external ?
13003 MLX5_PRIORITY_MAP_L3 :
13004 MLX5_PRIORITY_MAP_L2;
13005 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13006 MLX5_FLOW_LAYER_OUTER_L2;
13008 case RTE_FLOW_ITEM_TYPE_VLAN:
13009 flow_dv_translate_item_vlan(dev_flow,
13010 match_mask, match_value,
13012 dev_flow->dv.group);
13013 matcher.priority = MLX5_PRIORITY_MAP_L2;
13014 last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13015 MLX5_FLOW_LAYER_INNER_VLAN) :
13016 (MLX5_FLOW_LAYER_OUTER_L2 |
13017 MLX5_FLOW_LAYER_OUTER_VLAN);
13019 case RTE_FLOW_ITEM_TYPE_IPV4:
13020 mlx5_flow_tunnel_ip_check(items, next_protocol,
13021 &item_flags, &tunnel);
13022 flow_dv_translate_item_ipv4(match_mask, match_value,
13024 dev_flow->dv.group);
13025 matcher.priority = MLX5_PRIORITY_MAP_L3;
13026 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13027 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13028 if (items->mask != NULL &&
13029 ((const struct rte_flow_item_ipv4 *)
13030 items->mask)->hdr.next_proto_id) {
13032 ((const struct rte_flow_item_ipv4 *)
13033 (items->spec))->hdr.next_proto_id;
13035 ((const struct rte_flow_item_ipv4 *)
13036 (items->mask))->hdr.next_proto_id;
13038 /* Reset for inner layer. */
13039 next_protocol = 0xff;
13042 case RTE_FLOW_ITEM_TYPE_IPV6:
13043 mlx5_flow_tunnel_ip_check(items, next_protocol,
13044 &item_flags, &tunnel);
13045 flow_dv_translate_item_ipv6(match_mask, match_value,
13047 dev_flow->dv.group);
13048 matcher.priority = MLX5_PRIORITY_MAP_L3;
13049 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13050 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13051 if (items->mask != NULL &&
13052 ((const struct rte_flow_item_ipv6 *)
13053 items->mask)->hdr.proto) {
13055 ((const struct rte_flow_item_ipv6 *)
13056 items->spec)->hdr.proto;
13058 ((const struct rte_flow_item_ipv6 *)
13059 items->mask)->hdr.proto;
13061 /* Reset for inner layer. */
13062 next_protocol = 0xff;
13065 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13066 flow_dv_translate_item_ipv6_frag_ext(match_mask,
13069 last_item = tunnel ?
13070 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13071 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13072 if (items->mask != NULL &&
13073 ((const struct rte_flow_item_ipv6_frag_ext *)
13074 items->mask)->hdr.next_header) {
13076 ((const struct rte_flow_item_ipv6_frag_ext *)
13077 items->spec)->hdr.next_header;
13079 ((const struct rte_flow_item_ipv6_frag_ext *)
13080 items->mask)->hdr.next_header;
13082 /* Reset for inner layer. */
13083 next_protocol = 0xff;
13086 case RTE_FLOW_ITEM_TYPE_TCP:
13087 flow_dv_translate_item_tcp(match_mask, match_value,
13089 matcher.priority = MLX5_PRIORITY_MAP_L4;
13090 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13091 MLX5_FLOW_LAYER_OUTER_L4_TCP;
13093 case RTE_FLOW_ITEM_TYPE_UDP:
13094 flow_dv_translate_item_udp(match_mask, match_value,
13096 matcher.priority = MLX5_PRIORITY_MAP_L4;
13097 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13098 MLX5_FLOW_LAYER_OUTER_L4_UDP;
13100 case RTE_FLOW_ITEM_TYPE_GRE:
13101 flow_dv_translate_item_gre(match_mask, match_value,
13103 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13104 last_item = MLX5_FLOW_LAYER_GRE;
13106 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13107 flow_dv_translate_item_gre_key(match_mask,
13108 match_value, items);
13109 last_item = MLX5_FLOW_LAYER_GRE_KEY;
13111 case RTE_FLOW_ITEM_TYPE_NVGRE:
13112 flow_dv_translate_item_nvgre(match_mask, match_value,
13114 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13115 last_item = MLX5_FLOW_LAYER_GRE;
13117 case RTE_FLOW_ITEM_TYPE_VXLAN:
13118 flow_dv_translate_item_vxlan(dev, attr,
13119 match_mask, match_value,
13121 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13122 last_item = MLX5_FLOW_LAYER_VXLAN;
13124 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13125 flow_dv_translate_item_vxlan_gpe(match_mask,
13126 match_value, items,
13128 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13129 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13131 case RTE_FLOW_ITEM_TYPE_GENEVE:
13132 flow_dv_translate_item_geneve(match_mask, match_value,
13134 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13135 last_item = MLX5_FLOW_LAYER_GENEVE;
13137 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13138 ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13142 return rte_flow_error_set(error, -ret,
13143 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13144 "cannot create GENEVE TLV option");
13145 flow->geneve_tlv_option = 1;
13146 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13148 case RTE_FLOW_ITEM_TYPE_MPLS:
13149 flow_dv_translate_item_mpls(match_mask, match_value,
13150 items, last_item, tunnel);
13151 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13152 last_item = MLX5_FLOW_LAYER_MPLS;
13154 case RTE_FLOW_ITEM_TYPE_MARK:
13155 flow_dv_translate_item_mark(dev, match_mask,
13156 match_value, items);
13157 last_item = MLX5_FLOW_ITEM_MARK;
13159 case RTE_FLOW_ITEM_TYPE_META:
13160 flow_dv_translate_item_meta(dev, match_mask,
13161 match_value, attr, items);
13162 last_item = MLX5_FLOW_ITEM_METADATA;
13164 case RTE_FLOW_ITEM_TYPE_ICMP:
13165 flow_dv_translate_item_icmp(match_mask, match_value,
13167 last_item = MLX5_FLOW_LAYER_ICMP;
13169 case RTE_FLOW_ITEM_TYPE_ICMP6:
13170 flow_dv_translate_item_icmp6(match_mask, match_value,
13172 last_item = MLX5_FLOW_LAYER_ICMP6;
13174 case RTE_FLOW_ITEM_TYPE_TAG:
13175 flow_dv_translate_item_tag(dev, match_mask,
13176 match_value, items);
13177 last_item = MLX5_FLOW_ITEM_TAG;
13179 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13180 flow_dv_translate_mlx5_item_tag(dev, match_mask,
13181 match_value, items);
13182 last_item = MLX5_FLOW_ITEM_TAG;
13184 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13185 flow_dv_translate_item_tx_queue(dev, match_mask,
13188 last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13190 case RTE_FLOW_ITEM_TYPE_GTP:
13191 flow_dv_translate_item_gtp(match_mask, match_value,
13193 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13194 last_item = MLX5_FLOW_LAYER_GTP;
13196 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13197 ret = flow_dv_translate_item_gtp_psc(match_mask,
13201 return rte_flow_error_set(error, -ret,
13202 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13203 "cannot create GTP PSC item");
13204 last_item = MLX5_FLOW_LAYER_GTP_PSC;
13206 case RTE_FLOW_ITEM_TYPE_ECPRI:
13207 if (!mlx5_flex_parser_ecpri_exist(dev)) {
13208 /* Create it only the first time to be used. */
13209 ret = mlx5_flex_parser_ecpri_alloc(dev);
13211 return rte_flow_error_set
13213 RTE_FLOW_ERROR_TYPE_ITEM,
13215 "cannot create eCPRI parser");
13217 flow_dv_translate_item_ecpri(dev, match_mask,
13218 match_value, items);
13219 /* No other protocol should follow eCPRI layer. */
13220 last_item = MLX5_FLOW_LAYER_ECPRI;
13222 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13223 flow_dv_translate_item_integrity(match_mask,
13227 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13228 flow_dv_translate_item_aso_ct(dev, match_mask,
13229 match_value, items);
13234 item_flags |= last_item;
13237 * When E-Switch mode is enabled, we have two cases where we need to
13238 * set the source port manually.
13239 * The first one, is in case of Nic steering rule, and the second is
13240 * E-Switch rule where no port_id item was found. In both cases
13241 * the source port is set according the current port in use.
13243 if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13244 (priv->representor || priv->master)) {
13245 if (flow_dv_translate_item_port_id(dev, match_mask,
13246 match_value, NULL, attr))
13249 #ifdef RTE_LIBRTE_MLX5_DEBUG
13250 MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13251 dev_flow->dv.value.buf));
13254 * Layers may be already initialized from prefix flow if this dev_flow
13255 * is the suffix flow.
13257 handle->layers |= item_flags;
13258 if (action_flags & MLX5_FLOW_ACTION_RSS)
13259 flow_dv_hashfields_set(dev_flow, rss_desc);
13260 /* If has RSS action in the sample action, the Sample/Mirror resource
13261 * should be registered after the hash filed be update.
13263 if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13264 ret = flow_dv_translate_action_sample(dev,
13273 ret = flow_dv_create_action_sample(dev,
13282 return rte_flow_error_set
13284 RTE_FLOW_ERROR_TYPE_ACTION,
13286 "cannot create sample action");
13287 if (num_of_dest > 1) {
13288 dev_flow->dv.actions[sample_act_pos] =
13289 dev_flow->dv.dest_array_res->action;
13291 dev_flow->dv.actions[sample_act_pos] =
13292 dev_flow->dv.sample_res->verbs_action;
13296 * For multiple destination (sample action with ratio=1), the encap
13297 * action and port id action will be combined into group action.
13298 * So need remove the original these actions in the flow and only
13299 * use the sample action instead of.
13301 if (num_of_dest > 1 &&
13302 (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13304 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13306 for (i = 0; i < actions_n; i++) {
13307 if ((sample_act->dr_encap_action &&
13308 sample_act->dr_encap_action ==
13309 dev_flow->dv.actions[i]) ||
13310 (sample_act->dr_port_id_action &&
13311 sample_act->dr_port_id_action ==
13312 dev_flow->dv.actions[i]) ||
13313 (sample_act->dr_jump_action &&
13314 sample_act->dr_jump_action ==
13315 dev_flow->dv.actions[i]))
13317 temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13319 memcpy((void *)dev_flow->dv.actions,
13320 (void *)temp_actions,
13321 tmp_actions_n * sizeof(void *));
13322 actions_n = tmp_actions_n;
13324 dev_flow->dv.actions_n = actions_n;
13325 dev_flow->act_flags = action_flags;
13326 if (wks->skip_matcher_reg)
13328 /* Register matcher. */
13329 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13330 matcher.mask.size);
13331 matcher.priority = mlx5_get_matcher_priority(dev, attr,
13334 * When creating meter drop flow in drop table, using original
13335 * 5-tuple match, the matcher priority should be lower than
13338 if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13339 dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13340 matcher.priority <= MLX5_REG_BITS)
13341 matcher.priority += MLX5_REG_BITS;
13342 /* reserved field no needs to be set to 0 here. */
13343 tbl_key.is_fdb = attr->transfer;
13344 tbl_key.is_egress = attr->egress;
13345 tbl_key.level = dev_flow->dv.group;
13346 tbl_key.id = dev_flow->dv.table_id;
13347 if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13348 tunnel, attr->group, error))
13354 * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13357 * @param[in, out] action
13358 * Shred RSS action holding hash RX queue objects.
13359 * @param[in] hash_fields
13360 * Defines combination of packet fields to participate in RX hash.
13361 * @param[in] tunnel
13363 * @param[in] hrxq_idx
13364 * Hash RX queue index to set.
13367 * 0 on success, otherwise negative errno value.
13370 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13371 const uint64_t hash_fields,
13374 uint32_t *hrxqs = action->hrxq;
13376 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13377 case MLX5_RSS_HASH_IPV4:
13378 /* fall-through. */
13379 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13380 /* fall-through. */
13381 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13382 hrxqs[0] = hrxq_idx;
13384 case MLX5_RSS_HASH_IPV4_TCP:
13385 /* fall-through. */
13386 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13387 /* fall-through. */
13388 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13389 hrxqs[1] = hrxq_idx;
13391 case MLX5_RSS_HASH_IPV4_UDP:
13392 /* fall-through. */
13393 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13394 /* fall-through. */
13395 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13396 hrxqs[2] = hrxq_idx;
13398 case MLX5_RSS_HASH_IPV6:
13399 /* fall-through. */
13400 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13401 /* fall-through. */
13402 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13403 hrxqs[3] = hrxq_idx;
13405 case MLX5_RSS_HASH_IPV6_TCP:
13406 /* fall-through. */
13407 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13408 /* fall-through. */
13409 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13410 hrxqs[4] = hrxq_idx;
13412 case MLX5_RSS_HASH_IPV6_UDP:
13413 /* fall-through. */
13414 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13415 /* fall-through. */
13416 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13417 hrxqs[5] = hrxq_idx;
13419 case MLX5_RSS_HASH_NONE:
13420 hrxqs[6] = hrxq_idx;
13428 * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13432 * Pointer to the Ethernet device structure.
13434 * Shared RSS action ID holding hash RX queue objects.
13435 * @param[in] hash_fields
13436 * Defines combination of packet fields to participate in RX hash.
13437 * @param[in] tunnel
13441 * Valid hash RX queue index, otherwise 0.
13444 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13445 const uint64_t hash_fields)
13447 struct mlx5_priv *priv = dev->data->dev_private;
13448 struct mlx5_shared_action_rss *shared_rss =
13449 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13450 const uint32_t *hrxqs = shared_rss->hrxq;
13452 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13453 case MLX5_RSS_HASH_IPV4:
13454 /* fall-through. */
13455 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13456 /* fall-through. */
13457 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13459 case MLX5_RSS_HASH_IPV4_TCP:
13460 /* fall-through. */
13461 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13462 /* fall-through. */
13463 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13465 case MLX5_RSS_HASH_IPV4_UDP:
13466 /* fall-through. */
13467 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13468 /* fall-through. */
13469 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13471 case MLX5_RSS_HASH_IPV6:
13472 /* fall-through. */
13473 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13474 /* fall-through. */
13475 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13477 case MLX5_RSS_HASH_IPV6_TCP:
13478 /* fall-through. */
13479 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13480 /* fall-through. */
13481 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13483 case MLX5_RSS_HASH_IPV6_UDP:
13484 /* fall-through. */
13485 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13486 /* fall-through. */
13487 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13489 case MLX5_RSS_HASH_NONE:
13498 * Apply the flow to the NIC, lock free,
13499 * (mutex should be acquired by caller).
13502 * Pointer to the Ethernet device structure.
13503 * @param[in, out] flow
13504 * Pointer to flow structure.
13505 * @param[out] error
13506 * Pointer to error structure.
13509 * 0 on success, a negative errno value otherwise and rte_errno is set.
13512 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13513 struct rte_flow_error *error)
13515 struct mlx5_flow_dv_workspace *dv;
13516 struct mlx5_flow_handle *dh;
13517 struct mlx5_flow_handle_dv *dv_h;
13518 struct mlx5_flow *dev_flow;
13519 struct mlx5_priv *priv = dev->data->dev_private;
13520 uint32_t handle_idx;
13524 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13525 struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13529 for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13530 dev_flow = &wks->flows[idx];
13531 dv = &dev_flow->dv;
13532 dh = dev_flow->handle;
13535 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13536 if (dv->transfer) {
13537 MLX5_ASSERT(priv->sh->dr_drop_action);
13538 dv->actions[n++] = priv->sh->dr_drop_action;
13540 #ifdef HAVE_MLX5DV_DR
13541 /* DR supports drop action placeholder. */
13542 MLX5_ASSERT(priv->sh->dr_drop_action);
13543 dv->actions[n++] = priv->sh->dr_drop_action;
13545 /* For DV we use the explicit drop queue. */
13546 MLX5_ASSERT(priv->drop_queue.hrxq);
13548 priv->drop_queue.hrxq->action;
13551 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13552 !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13553 struct mlx5_hrxq *hrxq;
13556 hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13561 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13562 "cannot get hash queue");
13565 dh->rix_hrxq = hrxq_idx;
13566 dv->actions[n++] = hrxq->action;
13567 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13568 struct mlx5_hrxq *hrxq = NULL;
13571 hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13572 rss_desc->shared_rss,
13573 dev_flow->hash_fields);
13575 hrxq = mlx5_ipool_get
13576 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13581 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13582 "cannot get hash queue");
13585 dh->rix_srss = rss_desc->shared_rss;
13586 dv->actions[n++] = hrxq->action;
13587 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13588 if (!priv->sh->default_miss_action) {
13591 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13592 "default miss action not be created.");
13595 dv->actions[n++] = priv->sh->default_miss_action;
13597 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13598 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13599 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13600 (void *)&dv->value, n,
13601 dv->actions, &dh->drv_flow);
13605 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13607 (!priv->config.allow_duplicate_pattern &&
13609 "duplicating pattern is not allowed" :
13610 "hardware refuses to create flow");
13613 if (priv->vmwa_context &&
13614 dh->vf_vlan.tag && !dh->vf_vlan.created) {
13616 * The rule contains the VLAN pattern.
13617 * For VF we are going to create VLAN
13618 * interface to make hypervisor set correct
13619 * e-Switch vport context.
13621 mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13626 err = rte_errno; /* Save rte_errno before cleanup. */
13627 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13628 handle_idx, dh, next) {
13629 /* hrxq is union, don't clear it if the flag is not set. */
13630 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13631 mlx5_hrxq_release(dev, dh->rix_hrxq);
13633 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13636 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13637 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13639 rte_errno = err; /* Restore rte_errno. */
13644 flow_dv_matcher_remove_cb(struct mlx5_list *list __rte_unused,
13645 struct mlx5_list_entry *entry)
13647 struct mlx5_flow_dv_matcher *resource = container_of(entry,
13651 claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
13652 mlx5_free(resource);
13656 * Release the flow matcher.
13659 * Pointer to Ethernet device.
13661 * Index to port ID action resource.
13664 * 1 while a reference on it exists, 0 when freed.
13667 flow_dv_matcher_release(struct rte_eth_dev *dev,
13668 struct mlx5_flow_handle *handle)
13670 struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13671 struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
13672 typeof(*tbl), tbl);
13675 MLX5_ASSERT(matcher->matcher_object);
13676 ret = mlx5_list_unregister(&tbl->matchers, &matcher->entry);
13677 flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
13682 * Release encap_decap resource.
13685 * Pointer to the hash list.
13687 * Pointer to exist resource entry object.
13690 flow_dv_encap_decap_remove_cb(struct mlx5_hlist *list,
13691 struct mlx5_hlist_entry *entry)
13693 struct mlx5_dev_ctx_shared *sh = list->ctx;
13694 struct mlx5_flow_dv_encap_decap_resource *res =
13695 container_of(entry, typeof(*res), entry);
13697 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13698 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
13702 * Release an encap/decap resource.
13705 * Pointer to Ethernet device.
13706 * @param encap_decap_idx
13707 * Index of encap decap resource.
13710 * 1 while a reference on it exists, 0 when freed.
13713 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
13714 uint32_t encap_decap_idx)
13716 struct mlx5_priv *priv = dev->data->dev_private;
13717 struct mlx5_flow_dv_encap_decap_resource *resource;
13719 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
13723 MLX5_ASSERT(resource->action);
13724 return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
13728 * Release an jump to table action resource.
13731 * Pointer to Ethernet device.
13733 * Index to the jump action resource.
13736 * 1 while a reference on it exists, 0 when freed.
13739 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
13742 struct mlx5_priv *priv = dev->data->dev_private;
13743 struct mlx5_flow_tbl_data_entry *tbl_data;
13745 tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
13749 return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
13753 flow_dv_modify_remove_cb(struct mlx5_hlist *list __rte_unused,
13754 struct mlx5_hlist_entry *entry)
13756 struct mlx5_flow_dv_modify_hdr_resource *res =
13757 container_of(entry, typeof(*res), entry);
13759 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13764 * Release a modify-header resource.
13767 * Pointer to Ethernet device.
13769 * Pointer to mlx5_flow_handle.
13772 * 1 while a reference on it exists, 0 when freed.
13775 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
13776 struct mlx5_flow_handle *handle)
13778 struct mlx5_priv *priv = dev->data->dev_private;
13779 struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
13781 MLX5_ASSERT(entry->action);
13782 return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
13786 flow_dv_port_id_remove_cb(struct mlx5_list *list,
13787 struct mlx5_list_entry *entry)
13789 struct mlx5_dev_ctx_shared *sh = list->ctx;
13790 struct mlx5_flow_dv_port_id_action_resource *resource =
13791 container_of(entry, typeof(*resource), entry);
13793 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
13794 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
13798 * Release port ID action resource.
13801 * Pointer to Ethernet device.
13803 * Pointer to mlx5_flow_handle.
13806 * 1 while a reference on it exists, 0 when freed.
13809 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
13812 struct mlx5_priv *priv = dev->data->dev_private;
13813 struct mlx5_flow_dv_port_id_action_resource *resource;
13815 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
13818 MLX5_ASSERT(resource->action);
13819 return mlx5_list_unregister(&priv->sh->port_id_action_list,
13824 * Release shared RSS action resource.
13827 * Pointer to Ethernet device.
13829 * Shared RSS action index.
13832 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
13834 struct mlx5_priv *priv = dev->data->dev_private;
13835 struct mlx5_shared_action_rss *shared_rss;
13837 shared_rss = mlx5_ipool_get
13838 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
13839 __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
13843 flow_dv_push_vlan_remove_cb(struct mlx5_list *list,
13844 struct mlx5_list_entry *entry)
13846 struct mlx5_dev_ctx_shared *sh = list->ctx;
13847 struct mlx5_flow_dv_push_vlan_action_resource *resource =
13848 container_of(entry, typeof(*resource), entry);
13850 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
13851 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
13855 * Release push vlan action resource.
13858 * Pointer to Ethernet device.
13860 * Pointer to mlx5_flow_handle.
13863 * 1 while a reference on it exists, 0 when freed.
13866 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
13867 struct mlx5_flow_handle *handle)
13869 struct mlx5_priv *priv = dev->data->dev_private;
13870 struct mlx5_flow_dv_push_vlan_action_resource *resource;
13871 uint32_t idx = handle->dvh.rix_push_vlan;
13873 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
13876 MLX5_ASSERT(resource->action);
13877 return mlx5_list_unregister(&priv->sh->push_vlan_action_list,
13882 * Release the fate resource.
13885 * Pointer to Ethernet device.
13887 * Pointer to mlx5_flow_handle.
13890 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
13891 struct mlx5_flow_handle *handle)
13893 if (!handle->rix_fate)
13895 switch (handle->fate_action) {
13896 case MLX5_FLOW_FATE_QUEUE:
13897 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
13898 mlx5_hrxq_release(dev, handle->rix_hrxq);
13900 case MLX5_FLOW_FATE_JUMP:
13901 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
13903 case MLX5_FLOW_FATE_PORT_ID:
13904 flow_dv_port_id_action_resource_release(dev,
13905 handle->rix_port_id_action);
13908 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
13911 handle->rix_fate = 0;
13915 flow_dv_sample_remove_cb(struct mlx5_list *list __rte_unused,
13916 struct mlx5_list_entry *entry)
13918 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
13921 struct rte_eth_dev *dev = resource->dev;
13922 struct mlx5_priv *priv = dev->data->dev_private;
13924 if (resource->verbs_action)
13925 claim_zero(mlx5_flow_os_destroy_flow_action
13926 (resource->verbs_action));
13927 if (resource->normal_path_tbl)
13928 flow_dv_tbl_resource_release(MLX5_SH(dev),
13929 resource->normal_path_tbl);
13930 flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
13931 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
13932 DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
13936 * Release an sample resource.
13939 * Pointer to Ethernet device.
13941 * Pointer to mlx5_flow_handle.
13944 * 1 while a reference on it exists, 0 when freed.
13947 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
13948 struct mlx5_flow_handle *handle)
13950 struct mlx5_priv *priv = dev->data->dev_private;
13951 struct mlx5_flow_dv_sample_resource *resource;
13953 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
13954 handle->dvh.rix_sample);
13957 MLX5_ASSERT(resource->verbs_action);
13958 return mlx5_list_unregister(&priv->sh->sample_action_list,
13963 flow_dv_dest_array_remove_cb(struct mlx5_list *list __rte_unused,
13964 struct mlx5_list_entry *entry)
13966 struct mlx5_flow_dv_dest_array_resource *resource =
13967 container_of(entry, typeof(*resource), entry);
13968 struct rte_eth_dev *dev = resource->dev;
13969 struct mlx5_priv *priv = dev->data->dev_private;
13972 MLX5_ASSERT(resource->action);
13973 if (resource->action)
13974 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
13975 for (; i < resource->num_of_dest; i++)
13976 flow_dv_sample_sub_actions_release(dev,
13977 &resource->sample_idx[i]);
13978 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
13979 DRV_LOG(DEBUG, "destination array resource %p: removed",
13984 * Release an destination array resource.
13987 * Pointer to Ethernet device.
13989 * Pointer to mlx5_flow_handle.
13992 * 1 while a reference on it exists, 0 when freed.
13995 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
13996 struct mlx5_flow_handle *handle)
13998 struct mlx5_priv *priv = dev->data->dev_private;
13999 struct mlx5_flow_dv_dest_array_resource *resource;
14001 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14002 handle->dvh.rix_dest_array);
14005 MLX5_ASSERT(resource->action);
14006 return mlx5_list_unregister(&priv->sh->dest_array_list,
14011 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14013 struct mlx5_priv *priv = dev->data->dev_private;
14014 struct mlx5_dev_ctx_shared *sh = priv->sh;
14015 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14016 sh->geneve_tlv_option_resource;
14017 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14018 if (geneve_opt_resource) {
14019 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14020 __ATOMIC_RELAXED))) {
14021 claim_zero(mlx5_devx_cmd_destroy
14022 (geneve_opt_resource->obj));
14023 mlx5_free(sh->geneve_tlv_option_resource);
14024 sh->geneve_tlv_option_resource = NULL;
14027 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14031 * Remove the flow from the NIC but keeps it in memory.
14032 * Lock free, (mutex should be acquired by caller).
14035 * Pointer to Ethernet device.
14036 * @param[in, out] flow
14037 * Pointer to flow structure.
14040 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14042 struct mlx5_flow_handle *dh;
14043 uint32_t handle_idx;
14044 struct mlx5_priv *priv = dev->data->dev_private;
14048 handle_idx = flow->dev_handles;
14049 while (handle_idx) {
14050 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14054 if (dh->drv_flow) {
14055 claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14056 dh->drv_flow = NULL;
14058 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14059 flow_dv_fate_resource_release(dev, dh);
14060 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14061 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14062 handle_idx = dh->next.next;
14067 * Remove the flow from the NIC and the memory.
14068 * Lock free, (mutex should be acquired by caller).
14071 * Pointer to the Ethernet device structure.
14072 * @param[in, out] flow
14073 * Pointer to flow structure.
14076 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14078 struct mlx5_flow_handle *dev_handle;
14079 struct mlx5_priv *priv = dev->data->dev_private;
14080 struct mlx5_flow_meter_info *fm = NULL;
14085 flow_dv_remove(dev, flow);
14086 if (flow->counter) {
14087 flow_dv_counter_free(dev, flow->counter);
14091 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14093 mlx5_flow_meter_detach(priv, fm);
14096 /* Keep the current age handling by default. */
14097 if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14098 flow_dv_aso_ct_release(dev, flow->ct);
14099 else if (flow->age)
14100 flow_dv_aso_age_release(dev, flow->age);
14101 if (flow->geneve_tlv_option) {
14102 flow_dv_geneve_tlv_option_resource_release(dev);
14103 flow->geneve_tlv_option = 0;
14105 while (flow->dev_handles) {
14106 uint32_t tmp_idx = flow->dev_handles;
14108 dev_handle = mlx5_ipool_get(priv->sh->ipool
14109 [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14112 flow->dev_handles = dev_handle->next.next;
14113 if (dev_handle->dvh.matcher)
14114 flow_dv_matcher_release(dev, dev_handle);
14115 if (dev_handle->dvh.rix_sample)
14116 flow_dv_sample_resource_release(dev, dev_handle);
14117 if (dev_handle->dvh.rix_dest_array)
14118 flow_dv_dest_array_resource_release(dev, dev_handle);
14119 if (dev_handle->dvh.rix_encap_decap)
14120 flow_dv_encap_decap_resource_release(dev,
14121 dev_handle->dvh.rix_encap_decap);
14122 if (dev_handle->dvh.modify_hdr)
14123 flow_dv_modify_hdr_resource_release(dev, dev_handle);
14124 if (dev_handle->dvh.rix_push_vlan)
14125 flow_dv_push_vlan_action_resource_release(dev,
14127 if (dev_handle->dvh.rix_tag)
14128 flow_dv_tag_release(dev,
14129 dev_handle->dvh.rix_tag);
14130 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14131 flow_dv_fate_resource_release(dev, dev_handle);
14133 srss = dev_handle->rix_srss;
14134 if (fm && dev_handle->is_meter_flow_id &&
14135 dev_handle->split_flow_id)
14136 mlx5_ipool_free(fm->flow_ipool,
14137 dev_handle->split_flow_id);
14138 else if (dev_handle->split_flow_id &&
14139 !dev_handle->is_meter_flow_id)
14140 mlx5_ipool_free(priv->sh->ipool
14141 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14142 dev_handle->split_flow_id);
14143 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14147 flow_dv_shared_rss_action_release(dev, srss);
14151 * Release array of hash RX queue objects.
14155 * Pointer to the Ethernet device structure.
14156 * @param[in, out] hrxqs
14157 * Array of hash RX queue objects.
14160 * Total number of references to hash RX queue objects in *hrxqs* array
14161 * after this operation.
14164 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14165 uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14170 for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14171 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14181 * Release all hash RX queue objects representing shared RSS action.
14184 * Pointer to the Ethernet device structure.
14185 * @param[in, out] action
14186 * Shared RSS action to remove hash RX queue objects from.
14189 * Total number of references to hash RX queue objects stored in *action*
14190 * after this operation.
14191 * Expected to be 0 if no external references held.
14194 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14195 struct mlx5_shared_action_rss *shared_rss)
14197 return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14201 * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14204 * Only one hash value is available for one L3+L4 combination:
14206 * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14207 * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14208 * same slot in mlx5_rss_hash_fields.
14211 * Pointer to the shared action RSS conf.
14212 * @param[in, out] hash_field
14213 * hash_field variable needed to be adjusted.
14219 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14220 uint64_t *hash_field)
14222 uint64_t rss_types = rss->origin.types;
14224 switch (*hash_field & ~IBV_RX_HASH_INNER) {
14225 case MLX5_RSS_HASH_IPV4:
14226 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14227 *hash_field &= ~MLX5_RSS_HASH_IPV4;
14228 if (rss_types & ETH_RSS_L3_DST_ONLY)
14229 *hash_field |= IBV_RX_HASH_DST_IPV4;
14230 else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14231 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14233 *hash_field |= MLX5_RSS_HASH_IPV4;
14236 case MLX5_RSS_HASH_IPV6:
14237 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14238 *hash_field &= ~MLX5_RSS_HASH_IPV6;
14239 if (rss_types & ETH_RSS_L3_DST_ONLY)
14240 *hash_field |= IBV_RX_HASH_DST_IPV6;
14241 else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14242 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14244 *hash_field |= MLX5_RSS_HASH_IPV6;
14247 case MLX5_RSS_HASH_IPV4_UDP:
14248 /* fall-through. */
14249 case MLX5_RSS_HASH_IPV6_UDP:
14250 if (rss_types & ETH_RSS_UDP) {
14251 *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14252 if (rss_types & ETH_RSS_L4_DST_ONLY)
14253 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14254 else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14255 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14257 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14260 case MLX5_RSS_HASH_IPV4_TCP:
14261 /* fall-through. */
14262 case MLX5_RSS_HASH_IPV6_TCP:
14263 if (rss_types & ETH_RSS_TCP) {
14264 *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14265 if (rss_types & ETH_RSS_L4_DST_ONLY)
14266 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14267 else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14268 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14270 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14279 * Setup shared RSS action.
14280 * Prepare set of hash RX queue objects sufficient to handle all valid
14281 * hash_fields combinations (see enum ibv_rx_hash_fields).
14284 * Pointer to the Ethernet device structure.
14285 * @param[in] action_idx
14286 * Shared RSS action ipool index.
14287 * @param[in, out] action
14288 * Partially initialized shared RSS action.
14289 * @param[out] error
14290 * Perform verbose error reporting if not NULL. Initialized in case of
14294 * 0 on success, otherwise negative errno value.
14297 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14298 uint32_t action_idx,
14299 struct mlx5_shared_action_rss *shared_rss,
14300 struct rte_flow_error *error)
14302 struct mlx5_flow_rss_desc rss_desc = { 0 };
14306 if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
14307 return rte_flow_error_set(error, rte_errno,
14308 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14309 "cannot setup indirection table");
14311 memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14312 rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14313 rss_desc.const_q = shared_rss->origin.queue;
14314 rss_desc.queue_num = shared_rss->origin.queue_num;
14315 /* Set non-zero value to indicate a shared RSS. */
14316 rss_desc.shared_rss = action_idx;
14317 rss_desc.ind_tbl = shared_rss->ind_tbl;
14318 for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14320 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14323 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14324 if (shared_rss->origin.level > 1) {
14325 hash_fields |= IBV_RX_HASH_INNER;
14328 rss_desc.tunnel = tunnel;
14329 rss_desc.hash_fields = hash_fields;
14330 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14334 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14335 "cannot get hash queue");
14336 goto error_hrxq_new;
14338 err = __flow_dv_action_rss_hrxq_set
14339 (shared_rss, hash_fields, hrxq_idx);
14345 __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14346 if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14347 shared_rss->ind_tbl = NULL;
14353 * Create shared RSS action.
14356 * Pointer to the Ethernet device structure.
14358 * Shared action configuration.
14360 * RSS action specification used to create shared action.
14361 * @param[out] error
14362 * Perform verbose error reporting if not NULL. Initialized in case of
14366 * A valid shared action ID in case of success, 0 otherwise and
14367 * rte_errno is set.
14370 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14371 const struct rte_flow_indir_action_conf *conf,
14372 const struct rte_flow_action_rss *rss,
14373 struct rte_flow_error *error)
14375 struct mlx5_priv *priv = dev->data->dev_private;
14376 struct mlx5_shared_action_rss *shared_rss = NULL;
14377 void *queue = NULL;
14378 struct rte_flow_action_rss *origin;
14379 const uint8_t *rss_key;
14380 uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14383 RTE_SET_USED(conf);
14384 queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14386 shared_rss = mlx5_ipool_zmalloc
14387 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14388 if (!shared_rss || !queue) {
14389 rte_flow_error_set(error, ENOMEM,
14390 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14391 "cannot allocate resource memory");
14392 goto error_rss_init;
14394 if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14395 rte_flow_error_set(error, E2BIG,
14396 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14397 "rss action number out of range");
14398 goto error_rss_init;
14400 shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14401 sizeof(*shared_rss->ind_tbl),
14403 if (!shared_rss->ind_tbl) {
14404 rte_flow_error_set(error, ENOMEM,
14405 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14406 "cannot allocate resource memory");
14407 goto error_rss_init;
14409 memcpy(queue, rss->queue, queue_size);
14410 shared_rss->ind_tbl->queues = queue;
14411 shared_rss->ind_tbl->queues_n = rss->queue_num;
14412 origin = &shared_rss->origin;
14413 origin->func = rss->func;
14414 origin->level = rss->level;
14415 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
14416 origin->types = !rss->types ? ETH_RSS_IP : rss->types;
14417 /* NULL RSS key indicates default RSS key. */
14418 rss_key = !rss->key ? rss_hash_default_key : rss->key;
14419 memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14420 origin->key = &shared_rss->key[0];
14421 origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14422 origin->queue = queue;
14423 origin->queue_num = rss->queue_num;
14424 if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14425 goto error_rss_init;
14426 rte_spinlock_init(&shared_rss->action_rss_sl);
14427 __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14428 rte_spinlock_lock(&priv->shared_act_sl);
14429 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14430 &priv->rss_shared_actions, idx, shared_rss, next);
14431 rte_spinlock_unlock(&priv->shared_act_sl);
14435 if (shared_rss->ind_tbl)
14436 mlx5_free(shared_rss->ind_tbl);
14437 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14446 * Destroy the shared RSS action.
14447 * Release related hash RX queue objects.
14450 * Pointer to the Ethernet device structure.
14452 * The shared RSS action object ID to be removed.
14453 * @param[out] error
14454 * Perform verbose error reporting if not NULL. Initialized in case of
14458 * 0 on success, otherwise negative errno value.
14461 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14462 struct rte_flow_error *error)
14464 struct mlx5_priv *priv = dev->data->dev_private;
14465 struct mlx5_shared_action_rss *shared_rss =
14466 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14467 uint32_t old_refcnt = 1;
14469 uint16_t *queue = NULL;
14472 return rte_flow_error_set(error, EINVAL,
14473 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14474 "invalid shared action");
14475 remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14477 return rte_flow_error_set(error, EBUSY,
14478 RTE_FLOW_ERROR_TYPE_ACTION,
14480 "shared rss hrxq has references");
14481 if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14482 0, 0, __ATOMIC_ACQUIRE,
14484 return rte_flow_error_set(error, EBUSY,
14485 RTE_FLOW_ERROR_TYPE_ACTION,
14487 "shared rss has references");
14488 queue = shared_rss->ind_tbl->queues;
14489 remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14491 return rte_flow_error_set(error, EBUSY,
14492 RTE_FLOW_ERROR_TYPE_ACTION,
14494 "shared rss indirection table has"
14497 rte_spinlock_lock(&priv->shared_act_sl);
14498 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14499 &priv->rss_shared_actions, idx, shared_rss, next);
14500 rte_spinlock_unlock(&priv->shared_act_sl);
14501 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14507 * Create indirect action, lock free,
14508 * (mutex should be acquired by caller).
14509 * Dispatcher for action type specific call.
14512 * Pointer to the Ethernet device structure.
14514 * Shared action configuration.
14515 * @param[in] action
14516 * Action specification used to create indirect action.
14517 * @param[out] error
14518 * Perform verbose error reporting if not NULL. Initialized in case of
14522 * A valid shared action handle in case of success, NULL otherwise and
14523 * rte_errno is set.
14525 static struct rte_flow_action_handle *
14526 flow_dv_action_create(struct rte_eth_dev *dev,
14527 const struct rte_flow_indir_action_conf *conf,
14528 const struct rte_flow_action *action,
14529 struct rte_flow_error *err)
14531 struct mlx5_priv *priv = dev->data->dev_private;
14532 uint32_t age_idx = 0;
14536 switch (action->type) {
14537 case RTE_FLOW_ACTION_TYPE_RSS:
14538 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14539 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14540 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14542 case RTE_FLOW_ACTION_TYPE_AGE:
14543 age_idx = flow_dv_aso_age_alloc(dev, err);
14548 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14549 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14550 flow_dv_aso_age_params_init(dev, age_idx,
14551 ((const struct rte_flow_action_age *)
14552 action->conf)->context ?
14553 ((const struct rte_flow_action_age *)
14554 action->conf)->context :
14555 (void *)(uintptr_t)idx,
14556 ((const struct rte_flow_action_age *)
14557 action->conf)->timeout);
14560 case RTE_FLOW_ACTION_TYPE_COUNT:
14561 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14562 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14563 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14565 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14566 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14568 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14571 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14572 NULL, "action type not supported");
14575 return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14579 * Destroy the indirect action.
14580 * Release action related resources on the NIC and the memory.
14581 * Lock free, (mutex should be acquired by caller).
14582 * Dispatcher for action type specific call.
14585 * Pointer to the Ethernet device structure.
14586 * @param[in] handle
14587 * The indirect action object handle to be removed.
14588 * @param[out] error
14589 * Perform verbose error reporting if not NULL. Initialized in case of
14593 * 0 on success, otherwise negative errno value.
14596 flow_dv_action_destroy(struct rte_eth_dev *dev,
14597 struct rte_flow_action_handle *handle,
14598 struct rte_flow_error *error)
14600 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14601 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14602 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14603 struct mlx5_flow_counter *cnt;
14604 uint32_t no_flow_refcnt = 1;
14608 case MLX5_INDIRECT_ACTION_TYPE_RSS:
14609 return __flow_dv_action_rss_release(dev, idx, error);
14610 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14611 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14612 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14613 &no_flow_refcnt, 1, false,
14616 return rte_flow_error_set(error, EBUSY,
14617 RTE_FLOW_ERROR_TYPE_ACTION,
14619 "Indirect count action has references");
14620 flow_dv_counter_free(dev, idx);
14622 case MLX5_INDIRECT_ACTION_TYPE_AGE:
14623 ret = flow_dv_aso_age_release(dev, idx);
14626 * In this case, the last flow has a reference will
14627 * actually release the age action.
14629 DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14630 " released with references %d.", idx, ret);
14632 case MLX5_INDIRECT_ACTION_TYPE_CT:
14633 ret = flow_dv_aso_ct_release(dev, idx);
14637 DRV_LOG(DEBUG, "Connection tracking object %u still "
14638 "has references %d.", idx, ret);
14641 return rte_flow_error_set(error, ENOTSUP,
14642 RTE_FLOW_ERROR_TYPE_ACTION,
14644 "action type not supported");
14649 * Updates in place shared RSS action configuration.
14652 * Pointer to the Ethernet device structure.
14654 * The shared RSS action object ID to be updated.
14655 * @param[in] action_conf
14656 * RSS action specification used to modify *shared_rss*.
14657 * @param[out] error
14658 * Perform verbose error reporting if not NULL. Initialized in case of
14662 * 0 on success, otherwise negative errno value.
14663 * @note: currently only support update of RSS queues.
14666 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14667 const struct rte_flow_action_rss *action_conf,
14668 struct rte_flow_error *error)
14670 struct mlx5_priv *priv = dev->data->dev_private;
14671 struct mlx5_shared_action_rss *shared_rss =
14672 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14674 void *queue = NULL;
14675 uint16_t *queue_old = NULL;
14676 uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
14679 return rte_flow_error_set(error, EINVAL,
14680 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14681 "invalid shared action to update");
14682 if (priv->obj_ops.ind_table_modify == NULL)
14683 return rte_flow_error_set(error, ENOTSUP,
14684 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14685 "cannot modify indirection table");
14686 queue = mlx5_malloc(MLX5_MEM_ZERO,
14687 RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14690 return rte_flow_error_set(error, ENOMEM,
14691 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14693 "cannot allocate resource memory");
14694 memcpy(queue, action_conf->queue, queue_size);
14695 MLX5_ASSERT(shared_rss->ind_tbl);
14696 rte_spinlock_lock(&shared_rss->action_rss_sl);
14697 queue_old = shared_rss->ind_tbl->queues;
14698 ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
14699 queue, action_conf->queue_num, true);
14702 ret = rte_flow_error_set(error, rte_errno,
14703 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14704 "cannot update indirection table");
14706 mlx5_free(queue_old);
14707 shared_rss->origin.queue = queue;
14708 shared_rss->origin.queue_num = action_conf->queue_num;
14710 rte_spinlock_unlock(&shared_rss->action_rss_sl);
14715 * Updates in place conntrack context or direction.
14716 * Context update should be synchronized.
14719 * Pointer to the Ethernet device structure.
14721 * The conntrack object ID to be updated.
14722 * @param[in] update
14723 * Pointer to the structure of information to update.
14724 * @param[out] error
14725 * Perform verbose error reporting if not NULL. Initialized in case of
14729 * 0 on success, otherwise negative errno value.
14732 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
14733 const struct rte_flow_modify_conntrack *update,
14734 struct rte_flow_error *error)
14736 struct mlx5_priv *priv = dev->data->dev_private;
14737 struct mlx5_aso_ct_action *ct;
14738 const struct rte_flow_action_conntrack *new_prf;
14740 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
14743 if (PORT_ID(priv) != owner)
14744 return rte_flow_error_set(error, EACCES,
14745 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14747 "CT object owned by another port");
14748 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
14749 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
14751 return rte_flow_error_set(error, ENOMEM,
14752 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14754 "CT object is inactive");
14755 new_prf = &update->new_ct;
14756 if (update->direction)
14757 ct->is_original = !!new_prf->is_original_dir;
14758 if (update->state) {
14759 /* Only validate the profile when it needs to be updated. */
14760 ret = mlx5_validate_action_ct(dev, new_prf, error);
14763 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
14765 return rte_flow_error_set(error, EIO,
14766 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14768 "Failed to send CT context update WQE");
14769 /* Block until ready or a failure. */
14770 ret = mlx5_aso_ct_available(priv->sh, ct);
14772 rte_flow_error_set(error, rte_errno,
14773 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14775 "Timeout to get the CT update");
14781 * Updates in place shared action configuration, lock free,
14782 * (mutex should be acquired by caller).
14785 * Pointer to the Ethernet device structure.
14786 * @param[in] handle
14787 * The indirect action object handle to be updated.
14788 * @param[in] update
14789 * Action specification used to modify the action pointed by *handle*.
14790 * *update* could be of same type with the action pointed by the *handle*
14791 * handle argument, or some other structures like a wrapper, depending on
14792 * the indirect action type.
14793 * @param[out] error
14794 * Perform verbose error reporting if not NULL. Initialized in case of
14798 * 0 on success, otherwise negative errno value.
14801 flow_dv_action_update(struct rte_eth_dev *dev,
14802 struct rte_flow_action_handle *handle,
14803 const void *update,
14804 struct rte_flow_error *err)
14806 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14807 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14808 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14809 const void *action_conf;
14812 case MLX5_INDIRECT_ACTION_TYPE_RSS:
14813 action_conf = ((const struct rte_flow_action *)update)->conf;
14814 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
14815 case MLX5_INDIRECT_ACTION_TYPE_CT:
14816 return __flow_dv_action_ct_update(dev, idx, update, err);
14818 return rte_flow_error_set(err, ENOTSUP,
14819 RTE_FLOW_ERROR_TYPE_ACTION,
14821 "action type update not supported");
14826 * Destroy the meter sub policy table rules.
14827 * Lock free, (mutex should be acquired by caller).
14830 * Pointer to Ethernet device.
14831 * @param[in] sub_policy
14832 * Pointer to meter sub policy table.
14835 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
14836 struct mlx5_flow_meter_sub_policy *sub_policy)
14838 struct mlx5_priv *priv = dev->data->dev_private;
14839 struct mlx5_flow_tbl_data_entry *tbl;
14840 struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
14841 struct mlx5_flow_meter_info *next_fm;
14842 struct mlx5_sub_policy_color_rule *color_rule;
14846 for (i = 0; i < RTE_COLORS; i++) {
14848 if (i == RTE_COLOR_GREEN && policy &&
14849 policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
14850 next_fm = mlx5_flow_meter_find(priv,
14851 policy->act_cnt[i].next_mtr_id, NULL);
14852 TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
14854 claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
14855 tbl = container_of(color_rule->matcher->tbl,
14856 typeof(*tbl), tbl);
14857 mlx5_list_unregister(&tbl->matchers,
14858 &color_rule->matcher->entry);
14859 TAILQ_REMOVE(&sub_policy->color_rules[i],
14860 color_rule, next_port);
14861 mlx5_free(color_rule);
14863 mlx5_flow_meter_detach(priv, next_fm);
14866 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
14867 if (sub_policy->rix_hrxq[i]) {
14868 if (policy && !policy->is_hierarchy)
14869 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
14870 sub_policy->rix_hrxq[i] = 0;
14872 if (sub_policy->jump_tbl[i]) {
14873 flow_dv_tbl_resource_release(MLX5_SH(dev),
14874 sub_policy->jump_tbl[i]);
14875 sub_policy->jump_tbl[i] = NULL;
14878 if (sub_policy->tbl_rsc) {
14879 flow_dv_tbl_resource_release(MLX5_SH(dev),
14880 sub_policy->tbl_rsc);
14881 sub_policy->tbl_rsc = NULL;
14886 * Destroy policy rules, lock free,
14887 * (mutex should be acquired by caller).
14888 * Dispatcher for action type specific call.
14891 * Pointer to the Ethernet device structure.
14892 * @param[in] mtr_policy
14893 * Meter policy struct.
14896 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
14897 struct mlx5_flow_meter_policy *mtr_policy)
14900 struct mlx5_flow_meter_sub_policy *sub_policy;
14901 uint16_t sub_policy_num;
14903 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
14904 sub_policy_num = (mtr_policy->sub_policy_num >>
14905 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
14906 MLX5_MTR_SUB_POLICY_NUM_MASK;
14907 for (j = 0; j < sub_policy_num; j++) {
14908 sub_policy = mtr_policy->sub_policys[i][j];
14910 __flow_dv_destroy_sub_policy_rules
14917 * Destroy policy action, lock free,
14918 * (mutex should be acquired by caller).
14919 * Dispatcher for action type specific call.
14922 * Pointer to the Ethernet device structure.
14923 * @param[in] mtr_policy
14924 * Meter policy struct.
14927 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
14928 struct mlx5_flow_meter_policy *mtr_policy)
14930 struct rte_flow_action *rss_action;
14931 struct mlx5_flow_handle dev_handle;
14934 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
14935 if (mtr_policy->act_cnt[i].rix_mark) {
14936 flow_dv_tag_release(dev,
14937 mtr_policy->act_cnt[i].rix_mark);
14938 mtr_policy->act_cnt[i].rix_mark = 0;
14940 if (mtr_policy->act_cnt[i].modify_hdr) {
14941 dev_handle.dvh.modify_hdr =
14942 mtr_policy->act_cnt[i].modify_hdr;
14943 flow_dv_modify_hdr_resource_release(dev, &dev_handle);
14945 switch (mtr_policy->act_cnt[i].fate_action) {
14946 case MLX5_FLOW_FATE_SHARED_RSS:
14947 rss_action = mtr_policy->act_cnt[i].rss;
14948 mlx5_free(rss_action);
14950 case MLX5_FLOW_FATE_PORT_ID:
14951 if (mtr_policy->act_cnt[i].rix_port_id_action) {
14952 flow_dv_port_id_action_resource_release(dev,
14953 mtr_policy->act_cnt[i].rix_port_id_action);
14954 mtr_policy->act_cnt[i].rix_port_id_action = 0;
14957 case MLX5_FLOW_FATE_DROP:
14958 case MLX5_FLOW_FATE_JUMP:
14959 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
14960 mtr_policy->act_cnt[i].dr_jump_action[j] =
14964 /*Queue action do nothing*/
14968 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
14969 mtr_policy->dr_drop_action[j] = NULL;
14973 * Create policy action per domain, lock free,
14974 * (mutex should be acquired by caller).
14975 * Dispatcher for action type specific call.
14978 * Pointer to the Ethernet device structure.
14979 * @param[in] mtr_policy
14980 * Meter policy struct.
14981 * @param[in] action
14982 * Action specification used to create meter actions.
14983 * @param[out] error
14984 * Perform verbose error reporting if not NULL. Initialized in case of
14988 * 0 on success, otherwise negative errno value.
14991 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
14992 struct mlx5_flow_meter_policy *mtr_policy,
14993 const struct rte_flow_action *actions[RTE_COLORS],
14994 enum mlx5_meter_domain domain,
14995 struct rte_mtr_error *error)
14997 struct mlx5_priv *priv = dev->data->dev_private;
14998 struct rte_flow_error flow_err;
14999 const struct rte_flow_action *act;
15000 uint64_t action_flags = 0;
15001 struct mlx5_flow_handle dh;
15002 struct mlx5_flow dev_flow;
15003 struct mlx5_flow_dv_port_id_action_resource port_id_action;
15005 uint8_t egress, transfer;
15006 struct mlx5_meter_policy_action_container *act_cnt = NULL;
15008 struct mlx5_flow_dv_modify_hdr_resource res;
15009 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15010 sizeof(struct mlx5_modification_cmd) *
15011 (MLX5_MAX_MODIFY_NUM + 1)];
15013 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15015 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15016 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15017 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15018 memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15019 memset(&port_id_action, 0,
15020 sizeof(struct mlx5_flow_dv_port_id_action_resource));
15021 memset(mhdr_res, 0, sizeof(*mhdr_res));
15022 mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15024 MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15025 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
15026 dev_flow.handle = &dh;
15027 dev_flow.dv.port_id_action = &port_id_action;
15028 dev_flow.external = true;
15029 for (i = 0; i < RTE_COLORS; i++) {
15030 if (i < MLX5_MTR_RTE_COLORS)
15031 act_cnt = &mtr_policy->act_cnt[i];
15032 for (act = actions[i];
15033 act && act->type != RTE_FLOW_ACTION_TYPE_END;
15035 switch (act->type) {
15036 case RTE_FLOW_ACTION_TYPE_MARK:
15038 uint32_t tag_be = mlx5_flow_mark_set
15039 (((const struct rte_flow_action_mark *)
15042 if (i >= MLX5_MTR_RTE_COLORS)
15043 return -rte_mtr_error_set(error,
15045 RTE_MTR_ERROR_TYPE_METER_POLICY,
15047 "cannot create policy "
15048 "mark action for this color");
15049 dev_flow.handle->mark = 1;
15050 if (flow_dv_tag_resource_register(dev, tag_be,
15051 &dev_flow, &flow_err))
15052 return -rte_mtr_error_set(error,
15054 RTE_MTR_ERROR_TYPE_METER_POLICY,
15056 "cannot setup policy mark action");
15057 MLX5_ASSERT(dev_flow.dv.tag_resource);
15058 act_cnt->rix_mark =
15059 dev_flow.handle->dvh.rix_tag;
15060 action_flags |= MLX5_FLOW_ACTION_MARK;
15063 case RTE_FLOW_ACTION_TYPE_SET_TAG:
15064 if (i >= MLX5_MTR_RTE_COLORS)
15065 return -rte_mtr_error_set(error,
15067 RTE_MTR_ERROR_TYPE_METER_POLICY,
15069 "cannot create policy "
15070 "set tag action for this color");
15071 if (flow_dv_convert_action_set_tag
15073 (const struct rte_flow_action_set_tag *)
15074 act->conf, &flow_err))
15075 return -rte_mtr_error_set(error,
15077 RTE_MTR_ERROR_TYPE_METER_POLICY,
15078 NULL, "cannot convert policy "
15080 if (!mhdr_res->actions_num)
15081 return -rte_mtr_error_set(error,
15083 RTE_MTR_ERROR_TYPE_METER_POLICY,
15084 NULL, "cannot find policy "
15086 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15088 case RTE_FLOW_ACTION_TYPE_DROP:
15090 struct mlx5_flow_mtr_mng *mtrmng =
15092 struct mlx5_flow_tbl_data_entry *tbl_data;
15095 * Create the drop table with
15096 * METER DROP level.
15098 if (!mtrmng->drop_tbl[domain]) {
15099 mtrmng->drop_tbl[domain] =
15100 flow_dv_tbl_resource_get(dev,
15101 MLX5_FLOW_TABLE_LEVEL_METER,
15102 egress, transfer, false, NULL, 0,
15103 0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15104 if (!mtrmng->drop_tbl[domain])
15105 return -rte_mtr_error_set
15107 RTE_MTR_ERROR_TYPE_METER_POLICY,
15109 "Failed to create meter drop table");
15111 tbl_data = container_of
15112 (mtrmng->drop_tbl[domain],
15113 struct mlx5_flow_tbl_data_entry, tbl);
15114 if (i < MLX5_MTR_RTE_COLORS) {
15115 act_cnt->dr_jump_action[domain] =
15116 tbl_data->jump.action;
15117 act_cnt->fate_action =
15118 MLX5_FLOW_FATE_DROP;
15120 if (i == RTE_COLOR_RED)
15121 mtr_policy->dr_drop_action[domain] =
15122 tbl_data->jump.action;
15123 action_flags |= MLX5_FLOW_ACTION_DROP;
15126 case RTE_FLOW_ACTION_TYPE_QUEUE:
15128 if (i >= MLX5_MTR_RTE_COLORS)
15129 return -rte_mtr_error_set(error,
15131 RTE_MTR_ERROR_TYPE_METER_POLICY,
15132 NULL, "cannot create policy "
15133 "fate queue for this color");
15135 ((const struct rte_flow_action_queue *)
15136 (act->conf))->index;
15137 act_cnt->fate_action =
15138 MLX5_FLOW_FATE_QUEUE;
15139 dev_flow.handle->fate_action =
15140 MLX5_FLOW_FATE_QUEUE;
15141 mtr_policy->is_queue = 1;
15142 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15145 case RTE_FLOW_ACTION_TYPE_RSS:
15149 if (i >= MLX5_MTR_RTE_COLORS)
15150 return -rte_mtr_error_set(error,
15152 RTE_MTR_ERROR_TYPE_METER_POLICY,
15154 "cannot create policy "
15155 "rss action for this color");
15157 * Save RSS conf into policy struct
15158 * for translate stage.
15160 rss_size = (int)rte_flow_conv
15161 (RTE_FLOW_CONV_OP_ACTION,
15162 NULL, 0, act, &flow_err);
15164 return -rte_mtr_error_set(error,
15166 RTE_MTR_ERROR_TYPE_METER_POLICY,
15167 NULL, "Get the wrong "
15168 "rss action struct size");
15169 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15170 rss_size, 0, SOCKET_ID_ANY);
15172 return -rte_mtr_error_set(error,
15174 RTE_MTR_ERROR_TYPE_METER_POLICY,
15176 "Fail to malloc rss action memory");
15177 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15178 act_cnt->rss, rss_size,
15181 return -rte_mtr_error_set(error,
15183 RTE_MTR_ERROR_TYPE_METER_POLICY,
15184 NULL, "Fail to save "
15185 "rss action into policy struct");
15186 act_cnt->fate_action =
15187 MLX5_FLOW_FATE_SHARED_RSS;
15188 action_flags |= MLX5_FLOW_ACTION_RSS;
15191 case RTE_FLOW_ACTION_TYPE_PORT_ID:
15193 struct mlx5_flow_dv_port_id_action_resource
15195 uint32_t port_id = 0;
15197 if (i >= MLX5_MTR_RTE_COLORS)
15198 return -rte_mtr_error_set(error,
15200 RTE_MTR_ERROR_TYPE_METER_POLICY,
15201 NULL, "cannot create policy "
15202 "port action for this color");
15203 memset(&port_id_resource, 0,
15204 sizeof(port_id_resource));
15205 if (flow_dv_translate_action_port_id(dev, act,
15206 &port_id, &flow_err))
15207 return -rte_mtr_error_set(error,
15209 RTE_MTR_ERROR_TYPE_METER_POLICY,
15210 NULL, "cannot translate "
15211 "policy port action");
15212 port_id_resource.port_id = port_id;
15213 if (flow_dv_port_id_action_resource_register
15214 (dev, &port_id_resource,
15215 &dev_flow, &flow_err))
15216 return -rte_mtr_error_set(error,
15218 RTE_MTR_ERROR_TYPE_METER_POLICY,
15219 NULL, "cannot setup "
15220 "policy port action");
15221 act_cnt->rix_port_id_action =
15222 dev_flow.handle->rix_port_id_action;
15223 act_cnt->fate_action =
15224 MLX5_FLOW_FATE_PORT_ID;
15225 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15228 case RTE_FLOW_ACTION_TYPE_JUMP:
15230 uint32_t jump_group = 0;
15231 uint32_t table = 0;
15232 struct mlx5_flow_tbl_data_entry *tbl_data;
15233 struct flow_grp_info grp_info = {
15234 .external = !!dev_flow.external,
15235 .transfer = !!transfer,
15236 .fdb_def_rule = !!priv->fdb_def_rule,
15238 .skip_scale = dev_flow.skip_scale &
15239 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15241 struct mlx5_flow_meter_sub_policy *sub_policy =
15242 mtr_policy->sub_policys[domain][0];
15244 if (i >= MLX5_MTR_RTE_COLORS)
15245 return -rte_mtr_error_set(error,
15247 RTE_MTR_ERROR_TYPE_METER_POLICY,
15249 "cannot create policy "
15250 "jump action for this color");
15252 ((const struct rte_flow_action_jump *)
15254 if (mlx5_flow_group_to_table(dev, NULL,
15257 &grp_info, &flow_err))
15258 return -rte_mtr_error_set(error,
15260 RTE_MTR_ERROR_TYPE_METER_POLICY,
15261 NULL, "cannot setup "
15262 "policy jump action");
15263 sub_policy->jump_tbl[i] =
15264 flow_dv_tbl_resource_get(dev,
15267 !!dev_flow.external,
15268 NULL, jump_group, 0,
15271 (!sub_policy->jump_tbl[i])
15272 return -rte_mtr_error_set(error,
15274 RTE_MTR_ERROR_TYPE_METER_POLICY,
15275 NULL, "cannot create jump action.");
15276 tbl_data = container_of
15277 (sub_policy->jump_tbl[i],
15278 struct mlx5_flow_tbl_data_entry, tbl);
15279 act_cnt->dr_jump_action[domain] =
15280 tbl_data->jump.action;
15281 act_cnt->fate_action =
15282 MLX5_FLOW_FATE_JUMP;
15283 action_flags |= MLX5_FLOW_ACTION_JUMP;
15286 case RTE_FLOW_ACTION_TYPE_METER:
15288 const struct rte_flow_action_meter *mtr;
15289 struct mlx5_flow_meter_info *next_fm;
15290 struct mlx5_flow_meter_policy *next_policy;
15291 struct rte_flow_action tag_action;
15292 struct mlx5_rte_flow_action_set_tag set_tag;
15293 uint32_t next_mtr_idx = 0;
15296 next_fm = mlx5_flow_meter_find(priv,
15300 return -rte_mtr_error_set(error, EINVAL,
15301 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15302 "Fail to find next meter.");
15303 if (next_fm->def_policy)
15304 return -rte_mtr_error_set(error, EINVAL,
15305 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15306 "Hierarchy only supports termination meter.");
15307 next_policy = mlx5_flow_meter_policy_find(dev,
15308 next_fm->policy_id, NULL);
15309 MLX5_ASSERT(next_policy);
15310 if (next_fm->drop_cnt) {
15313 mlx5_flow_get_reg_id(dev,
15316 (struct rte_flow_error *)error);
15317 set_tag.offset = (priv->mtr_reg_share ?
15318 MLX5_MTR_COLOR_BITS : 0);
15319 set_tag.length = (priv->mtr_reg_share ?
15320 MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15322 set_tag.data = next_mtr_idx;
15324 (enum rte_flow_action_type)
15325 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15326 tag_action.conf = &set_tag;
15327 if (flow_dv_convert_action_set_reg
15328 (mhdr_res, &tag_action,
15329 (struct rte_flow_error *)error))
15332 MLX5_FLOW_ACTION_SET_TAG;
15334 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15335 act_cnt->next_mtr_id = next_fm->meter_id;
15336 act_cnt->next_sub_policy = NULL;
15337 mtr_policy->is_hierarchy = 1;
15338 mtr_policy->dev = next_policy->dev;
15340 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15344 return -rte_mtr_error_set(error, ENOTSUP,
15345 RTE_MTR_ERROR_TYPE_METER_POLICY,
15346 NULL, "action type not supported");
15348 if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15349 /* create modify action if needed. */
15350 dev_flow.dv.group = 1;
15351 if (flow_dv_modify_hdr_resource_register
15352 (dev, mhdr_res, &dev_flow, &flow_err))
15353 return -rte_mtr_error_set(error,
15355 RTE_MTR_ERROR_TYPE_METER_POLICY,
15356 NULL, "cannot register policy "
15358 act_cnt->modify_hdr =
15359 dev_flow.handle->dvh.modify_hdr;
15367 * Create policy action per domain, lock free,
15368 * (mutex should be acquired by caller).
15369 * Dispatcher for action type specific call.
15372 * Pointer to the Ethernet device structure.
15373 * @param[in] mtr_policy
15374 * Meter policy struct.
15375 * @param[in] action
15376 * Action specification used to create meter actions.
15377 * @param[out] error
15378 * Perform verbose error reporting if not NULL. Initialized in case of
15382 * 0 on success, otherwise negative errno value.
15385 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15386 struct mlx5_flow_meter_policy *mtr_policy,
15387 const struct rte_flow_action *actions[RTE_COLORS],
15388 struct rte_mtr_error *error)
15391 uint16_t sub_policy_num;
15393 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15394 sub_policy_num = (mtr_policy->sub_policy_num >>
15395 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15396 MLX5_MTR_SUB_POLICY_NUM_MASK;
15397 if (sub_policy_num) {
15398 ret = __flow_dv_create_domain_policy_acts(dev,
15399 mtr_policy, actions,
15400 (enum mlx5_meter_domain)i, error);
15409 * Query a DV flow rule for its statistics via DevX.
15412 * Pointer to Ethernet device.
15413 * @param[in] cnt_idx
15414 * Index to the flow counter.
15416 * Data retrieved by the query.
15417 * @param[out] error
15418 * Perform verbose error reporting if not NULL.
15421 * 0 on success, a negative errno value otherwise and rte_errno is set.
15424 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15425 struct rte_flow_error *error)
15427 struct mlx5_priv *priv = dev->data->dev_private;
15428 struct rte_flow_query_count *qc = data;
15430 if (!priv->config.devx)
15431 return rte_flow_error_set(error, ENOTSUP,
15432 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15434 "counters are not supported");
15436 uint64_t pkts, bytes;
15437 struct mlx5_flow_counter *cnt;
15438 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15441 return rte_flow_error_set(error, -err,
15442 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15443 NULL, "cannot read counters");
15444 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15447 qc->hits = pkts - cnt->hits;
15448 qc->bytes = bytes - cnt->bytes;
15451 cnt->bytes = bytes;
15455 return rte_flow_error_set(error, EINVAL,
15456 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15458 "counters are not available");
15462 flow_dv_action_query(struct rte_eth_dev *dev,
15463 const struct rte_flow_action_handle *handle, void *data,
15464 struct rte_flow_error *error)
15466 struct mlx5_age_param *age_param;
15467 struct rte_flow_query_age *resp;
15468 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15469 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15470 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15471 struct mlx5_priv *priv = dev->data->dev_private;
15472 struct mlx5_aso_ct_action *ct;
15477 case MLX5_INDIRECT_ACTION_TYPE_AGE:
15478 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15480 resp->aged = __atomic_load_n(&age_param->state,
15481 __ATOMIC_RELAXED) == AGE_TMOUT ?
15483 resp->sec_since_last_hit_valid = !resp->aged;
15484 if (resp->sec_since_last_hit_valid)
15485 resp->sec_since_last_hit = __atomic_load_n
15486 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15488 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15489 return flow_dv_query_count(dev, idx, data, error);
15490 case MLX5_INDIRECT_ACTION_TYPE_CT:
15491 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15492 if (owner != PORT_ID(priv))
15493 return rte_flow_error_set(error, EACCES,
15494 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15496 "CT object owned by another port");
15497 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15498 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15501 return rte_flow_error_set(error, EFAULT,
15502 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15504 "CT object is inactive");
15505 ((struct rte_flow_action_conntrack *)data)->peer_port =
15507 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15509 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15510 return rte_flow_error_set(error, EIO,
15511 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15513 "Failed to query CT context");
15516 return rte_flow_error_set(error, ENOTSUP,
15517 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15518 "action type query not supported");
15523 * Query a flow rule AGE action for aging information.
15526 * Pointer to Ethernet device.
15528 * Pointer to the sub flow.
15530 * data retrieved by the query.
15531 * @param[out] error
15532 * Perform verbose error reporting if not NULL.
15535 * 0 on success, a negative errno value otherwise and rte_errno is set.
15538 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15539 void *data, struct rte_flow_error *error)
15541 struct rte_flow_query_age *resp = data;
15542 struct mlx5_age_param *age_param;
15545 struct mlx5_aso_age_action *act =
15546 flow_aso_age_get_by_idx(dev, flow->age);
15548 age_param = &act->age_params;
15549 } else if (flow->counter) {
15550 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15552 if (!age_param || !age_param->timeout)
15553 return rte_flow_error_set
15555 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15556 NULL, "cannot read age data");
15558 return rte_flow_error_set(error, EINVAL,
15559 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15560 NULL, "age data not available");
15562 resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15564 resp->sec_since_last_hit_valid = !resp->aged;
15565 if (resp->sec_since_last_hit_valid)
15566 resp->sec_since_last_hit = __atomic_load_n
15567 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15574 * @see rte_flow_query()
15575 * @see rte_flow_ops
15578 flow_dv_query(struct rte_eth_dev *dev,
15579 struct rte_flow *flow __rte_unused,
15580 const struct rte_flow_action *actions __rte_unused,
15581 void *data __rte_unused,
15582 struct rte_flow_error *error __rte_unused)
15586 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15587 switch (actions->type) {
15588 case RTE_FLOW_ACTION_TYPE_VOID:
15590 case RTE_FLOW_ACTION_TYPE_COUNT:
15591 ret = flow_dv_query_count(dev, flow->counter, data,
15594 case RTE_FLOW_ACTION_TYPE_AGE:
15595 ret = flow_dv_query_age(dev, flow, data, error);
15598 return rte_flow_error_set(error, ENOTSUP,
15599 RTE_FLOW_ERROR_TYPE_ACTION,
15601 "action not supported");
15608 * Destroy the meter table set.
15609 * Lock free, (mutex should be acquired by caller).
15612 * Pointer to Ethernet device.
15614 * Meter information table.
15617 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
15618 struct mlx5_flow_meter_info *fm)
15620 struct mlx5_priv *priv = dev->data->dev_private;
15623 if (!fm || !priv->config.dv_flow_en)
15625 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15626 if (fm->drop_rule[i]) {
15627 claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
15628 fm->drop_rule[i] = NULL;
15634 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
15636 struct mlx5_priv *priv = dev->data->dev_private;
15637 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15638 struct mlx5_flow_tbl_data_entry *tbl;
15641 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15642 if (mtrmng->def_rule[i]) {
15643 claim_zero(mlx5_flow_os_destroy_flow
15644 (mtrmng->def_rule[i]));
15645 mtrmng->def_rule[i] = NULL;
15647 if (mtrmng->def_matcher[i]) {
15648 tbl = container_of(mtrmng->def_matcher[i]->tbl,
15649 struct mlx5_flow_tbl_data_entry, tbl);
15650 mlx5_list_unregister(&tbl->matchers,
15651 &mtrmng->def_matcher[i]->entry);
15652 mtrmng->def_matcher[i] = NULL;
15654 for (j = 0; j < MLX5_REG_BITS; j++) {
15655 if (mtrmng->drop_matcher[i][j]) {
15657 container_of(mtrmng->drop_matcher[i][j]->tbl,
15658 struct mlx5_flow_tbl_data_entry,
15660 mlx5_list_unregister(&tbl->matchers,
15661 &mtrmng->drop_matcher[i][j]->entry);
15662 mtrmng->drop_matcher[i][j] = NULL;
15665 if (mtrmng->drop_tbl[i]) {
15666 flow_dv_tbl_resource_release(MLX5_SH(dev),
15667 mtrmng->drop_tbl[i]);
15668 mtrmng->drop_tbl[i] = NULL;
15673 /* Number of meter flow actions, count and jump or count and drop. */
15674 #define METER_ACTIONS 2
15677 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
15678 enum mlx5_meter_domain domain)
15680 struct mlx5_priv *priv = dev->data->dev_private;
15681 struct mlx5_flow_meter_def_policy *def_policy =
15682 priv->sh->mtrmng->def_policy[domain];
15684 __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
15685 mlx5_free(def_policy);
15686 priv->sh->mtrmng->def_policy[domain] = NULL;
15690 * Destroy the default policy table set.
15693 * Pointer to Ethernet device.
15696 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
15698 struct mlx5_priv *priv = dev->data->dev_private;
15701 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
15702 if (priv->sh->mtrmng->def_policy[i])
15703 __flow_dv_destroy_domain_def_policy(dev,
15704 (enum mlx5_meter_domain)i);
15705 priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
15709 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
15710 uint32_t color_reg_c_idx,
15711 enum rte_color color, void *matcher_object,
15712 int actions_n, void *actions,
15713 bool match_src_port, const struct rte_flow_item *item,
15714 void **rule, const struct rte_flow_attr *attr)
15717 struct mlx5_flow_dv_match_params value = {
15718 .size = sizeof(value.buf),
15720 struct mlx5_flow_dv_match_params matcher = {
15721 .size = sizeof(matcher.buf),
15723 struct mlx5_priv *priv = dev->data->dev_private;
15726 if (match_src_port && (priv->representor || priv->master)) {
15727 if (flow_dv_translate_item_port_id(dev, matcher.buf,
15728 value.buf, item, attr)) {
15730 "Failed to create meter policy flow with port.");
15734 flow_dv_match_meta_reg(matcher.buf, value.buf,
15735 (enum modify_reg)color_reg_c_idx,
15736 rte_col_2_mlx5_col(color),
15738 misc_mask = flow_dv_matcher_enable(value.buf);
15739 __flow_dv_adjust_buf_size(&value.size, misc_mask);
15740 ret = mlx5_flow_os_create_flow(matcher_object,
15741 (void *)&value, actions_n, actions, rule);
15743 DRV_LOG(ERR, "Failed to create meter policy flow.");
15750 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
15751 uint32_t color_reg_c_idx,
15753 struct mlx5_flow_meter_sub_policy *sub_policy,
15754 const struct rte_flow_attr *attr,
15755 bool match_src_port,
15756 const struct rte_flow_item *item,
15757 struct mlx5_flow_dv_matcher **policy_matcher,
15758 struct rte_flow_error *error)
15760 struct mlx5_list_entry *entry;
15761 struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
15762 struct mlx5_flow_dv_matcher matcher = {
15764 .size = sizeof(matcher.mask.buf),
15768 struct mlx5_flow_dv_match_params value = {
15769 .size = sizeof(value.buf),
15771 struct mlx5_flow_cb_ctx ctx = {
15775 struct mlx5_flow_tbl_data_entry *tbl_data;
15776 struct mlx5_priv *priv = dev->data->dev_private;
15777 uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
15779 if (match_src_port && (priv->representor || priv->master)) {
15780 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
15781 value.buf, item, attr)) {
15783 "Failed to register meter drop matcher with port.");
15787 tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
15788 if (priority < RTE_COLOR_RED)
15789 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
15790 (enum modify_reg)color_reg_c_idx, 0, color_mask);
15791 matcher.priority = priority;
15792 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
15793 matcher.mask.size);
15794 entry = mlx5_list_register(&tbl_data->matchers, &ctx);
15796 DRV_LOG(ERR, "Failed to register meter drop matcher.");
15800 container_of(entry, struct mlx5_flow_dv_matcher, entry);
15805 * Create the policy rules per domain.
15808 * Pointer to Ethernet device.
15809 * @param[in] sub_policy
15810 * Pointer to sub policy table..
15811 * @param[in] egress
15812 * Direction of the table.
15813 * @param[in] transfer
15814 * E-Switch or NIC flow.
15816 * Pointer to policy action list per color.
15819 * 0 on success, -1 otherwise.
15822 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
15823 struct mlx5_flow_meter_sub_policy *sub_policy,
15824 uint8_t egress, uint8_t transfer, bool match_src_port,
15825 struct mlx5_meter_policy_acts acts[RTE_COLORS])
15827 struct mlx5_priv *priv = dev->data->dev_private;
15828 struct rte_flow_error flow_err;
15829 uint32_t color_reg_c_idx;
15830 struct rte_flow_attr attr = {
15831 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
15834 .egress = !!egress,
15835 .transfer = !!transfer,
15839 int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
15840 struct mlx5_sub_policy_color_rule *color_rule;
15844 /* Create policy table with POLICY level. */
15845 if (!sub_policy->tbl_rsc)
15846 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
15847 MLX5_FLOW_TABLE_LEVEL_POLICY,
15848 egress, transfer, false, NULL, 0, 0,
15849 sub_policy->idx, &flow_err);
15850 if (!sub_policy->tbl_rsc) {
15852 "Failed to create meter sub policy table.");
15855 /* Prepare matchers. */
15856 color_reg_c_idx = ret;
15857 for (i = 0; i < RTE_COLORS; i++) {
15858 TAILQ_INIT(&sub_policy->color_rules[i]);
15859 if (i == RTE_COLOR_YELLOW || !acts[i].actions_n)
15861 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
15862 sizeof(struct mlx5_sub_policy_color_rule),
15865 DRV_LOG(ERR, "No memory to create color rule.");
15868 color_rule->src_port = priv->representor_id;
15870 /* Create matchers for Color. */
15871 if (__flow_dv_create_policy_matcher(dev,
15872 color_reg_c_idx, i, sub_policy, &attr,
15873 (i != RTE_COLOR_RED ? match_src_port : false),
15874 NULL, &color_rule->matcher, &flow_err)) {
15875 DRV_LOG(ERR, "Failed to create color matcher.");
15878 /* Create flow, matching color. */
15879 if (__flow_dv_create_policy_flow(dev,
15880 color_reg_c_idx, (enum rte_color)i,
15881 color_rule->matcher->matcher_object,
15883 acts[i].dv_actions,
15884 (i != RTE_COLOR_RED ? match_src_port : false),
15885 NULL, &color_rule->rule,
15887 DRV_LOG(ERR, "Failed to create color rule.");
15890 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
15891 color_rule, next_port);
15896 if (color_rule->rule)
15897 mlx5_flow_os_destroy_flow(color_rule->rule);
15898 if (color_rule->matcher) {
15899 struct mlx5_flow_tbl_data_entry *tbl =
15900 container_of(color_rule->matcher->tbl,
15901 typeof(*tbl), tbl);
15902 mlx5_list_unregister(&tbl->matchers,
15903 &color_rule->matcher->entry);
15905 mlx5_free(color_rule);
15911 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
15912 struct mlx5_flow_meter_policy *mtr_policy,
15913 struct mlx5_flow_meter_sub_policy *sub_policy,
15916 struct mlx5_priv *priv = dev->data->dev_private;
15917 struct mlx5_meter_policy_acts acts[RTE_COLORS];
15918 struct mlx5_flow_dv_tag_resource *tag;
15919 struct mlx5_flow_dv_port_id_action_resource *port_action;
15920 struct mlx5_hrxq *hrxq;
15921 struct mlx5_flow_meter_info *next_fm = NULL;
15922 struct mlx5_flow_meter_policy *next_policy;
15923 struct mlx5_flow_meter_sub_policy *next_sub_policy;
15924 struct mlx5_flow_tbl_data_entry *tbl_data;
15925 struct rte_flow_error error;
15926 uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15927 uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15928 bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
15929 bool match_src_port = false;
15932 for (i = 0; i < RTE_COLORS; i++) {
15933 acts[i].actions_n = 0;
15934 if (i == RTE_COLOR_YELLOW)
15936 if (i == RTE_COLOR_RED) {
15937 /* Only support drop on red. */
15938 acts[i].dv_actions[0] =
15939 mtr_policy->dr_drop_action[domain];
15940 acts[i].actions_n = 1;
15943 if (mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
15944 struct rte_flow_attr attr = {
15945 .transfer = transfer
15948 next_fm = mlx5_flow_meter_find(priv,
15949 mtr_policy->act_cnt[i].next_mtr_id,
15953 "Failed to get next hierarchy meter.");
15956 if (mlx5_flow_meter_attach(priv, next_fm,
15958 DRV_LOG(ERR, "%s", error.message);
15962 /* Meter action must be the first for TX. */
15964 acts[i].dv_actions[acts[i].actions_n] =
15965 next_fm->meter_action;
15966 acts[i].actions_n++;
15969 if (mtr_policy->act_cnt[i].rix_mark) {
15970 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
15971 mtr_policy->act_cnt[i].rix_mark);
15973 DRV_LOG(ERR, "Failed to find "
15974 "mark action for policy.");
15977 acts[i].dv_actions[acts[i].actions_n] =
15979 acts[i].actions_n++;
15981 if (mtr_policy->act_cnt[i].modify_hdr) {
15982 acts[i].dv_actions[acts[i].actions_n] =
15983 mtr_policy->act_cnt[i].modify_hdr->action;
15984 acts[i].actions_n++;
15986 if (mtr_policy->act_cnt[i].fate_action) {
15987 switch (mtr_policy->act_cnt[i].fate_action) {
15988 case MLX5_FLOW_FATE_PORT_ID:
15989 port_action = mlx5_ipool_get
15990 (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
15991 mtr_policy->act_cnt[i].rix_port_id_action);
15992 if (!port_action) {
15993 DRV_LOG(ERR, "Failed to find "
15994 "port action for policy.");
15997 acts[i].dv_actions[acts[i].actions_n] =
15998 port_action->action;
15999 acts[i].actions_n++;
16000 mtr_policy->dev = dev;
16001 match_src_port = true;
16003 case MLX5_FLOW_FATE_DROP:
16004 case MLX5_FLOW_FATE_JUMP:
16005 acts[i].dv_actions[acts[i].actions_n] =
16006 mtr_policy->act_cnt[i].dr_jump_action[domain];
16007 acts[i].actions_n++;
16009 case MLX5_FLOW_FATE_SHARED_RSS:
16010 case MLX5_FLOW_FATE_QUEUE:
16011 hrxq = mlx5_ipool_get
16012 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16013 sub_policy->rix_hrxq[i]);
16015 DRV_LOG(ERR, "Failed to find "
16016 "queue action for policy.");
16019 acts[i].dv_actions[acts[i].actions_n] =
16021 acts[i].actions_n++;
16023 case MLX5_FLOW_FATE_MTR:
16026 "No next hierarchy meter.");
16030 acts[i].dv_actions[acts[i].actions_n] =
16031 next_fm->meter_action;
16032 acts[i].actions_n++;
16034 if (mtr_policy->act_cnt[i].next_sub_policy) {
16036 mtr_policy->act_cnt[i].next_sub_policy;
16039 mlx5_flow_meter_policy_find(dev,
16040 next_fm->policy_id, NULL);
16041 MLX5_ASSERT(next_policy);
16043 next_policy->sub_policys[domain][0];
16046 container_of(next_sub_policy->tbl_rsc,
16047 struct mlx5_flow_tbl_data_entry, tbl);
16048 acts[i].dv_actions[acts[i].actions_n++] =
16049 tbl_data->jump.action;
16050 if (mtr_policy->act_cnt[i].modify_hdr)
16051 match_src_port = !!transfer;
16054 /*Queue action do nothing*/
16059 if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16060 egress, transfer, match_src_port, acts)) {
16062 "Failed to create policy rules per domain.");
16068 mlx5_flow_meter_detach(priv, next_fm);
16073 * Create the policy rules.
16076 * Pointer to Ethernet device.
16077 * @param[in,out] mtr_policy
16078 * Pointer to meter policy table.
16081 * 0 on success, -1 otherwise.
16084 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16085 struct mlx5_flow_meter_policy *mtr_policy)
16088 uint16_t sub_policy_num;
16090 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16091 sub_policy_num = (mtr_policy->sub_policy_num >>
16092 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16093 MLX5_MTR_SUB_POLICY_NUM_MASK;
16094 if (!sub_policy_num)
16096 /* Prepare actions list and create policy rules. */
16097 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16098 mtr_policy->sub_policys[i][0], i)) {
16100 "Failed to create policy action list per domain.");
16108 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16110 struct mlx5_priv *priv = dev->data->dev_private;
16111 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16112 struct mlx5_flow_meter_def_policy *def_policy;
16113 struct mlx5_flow_tbl_resource *jump_tbl;
16114 struct mlx5_flow_tbl_data_entry *tbl_data;
16115 uint8_t egress, transfer;
16116 struct rte_flow_error error;
16117 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16120 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16121 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16122 def_policy = mtrmng->def_policy[domain];
16124 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16125 sizeof(struct mlx5_flow_meter_def_policy),
16126 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16128 DRV_LOG(ERR, "Failed to alloc "
16129 "default policy table.");
16130 goto def_policy_error;
16132 mtrmng->def_policy[domain] = def_policy;
16133 /* Create the meter suffix table with SUFFIX level. */
16134 jump_tbl = flow_dv_tbl_resource_get(dev,
16135 MLX5_FLOW_TABLE_LEVEL_METER,
16136 egress, transfer, false, NULL, 0,
16137 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16140 "Failed to create meter suffix table.");
16141 goto def_policy_error;
16143 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16144 tbl_data = container_of(jump_tbl,
16145 struct mlx5_flow_tbl_data_entry, tbl);
16146 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16147 tbl_data->jump.action;
16148 acts[RTE_COLOR_GREEN].dv_actions[0] =
16149 tbl_data->jump.action;
16150 acts[RTE_COLOR_GREEN].actions_n = 1;
16151 /* Create jump action to the drop table. */
16152 if (!mtrmng->drop_tbl[domain]) {
16153 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16154 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16155 egress, transfer, false, NULL, 0,
16156 0, MLX5_MTR_TABLE_ID_DROP, &error);
16157 if (!mtrmng->drop_tbl[domain]) {
16158 DRV_LOG(ERR, "Failed to create "
16159 "meter drop table for default policy.");
16160 goto def_policy_error;
16163 tbl_data = container_of(mtrmng->drop_tbl[domain],
16164 struct mlx5_flow_tbl_data_entry, tbl);
16165 def_policy->dr_jump_action[RTE_COLOR_RED] =
16166 tbl_data->jump.action;
16167 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16168 acts[RTE_COLOR_RED].actions_n = 1;
16169 /* Create default policy rules. */
16170 ret = __flow_dv_create_domain_policy_rules(dev,
16171 &def_policy->sub_policy,
16172 egress, transfer, false, acts);
16174 DRV_LOG(ERR, "Failed to create "
16175 "default policy rules.");
16176 goto def_policy_error;
16181 __flow_dv_destroy_domain_def_policy(dev,
16182 (enum mlx5_meter_domain)domain);
16187 * Create the default policy table set.
16190 * Pointer to Ethernet device.
16192 * 0 on success, -1 otherwise.
16195 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16197 struct mlx5_priv *priv = dev->data->dev_private;
16200 /* Non-termination policy table. */
16201 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16202 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16204 if (__flow_dv_create_domain_def_policy(dev, i)) {
16206 "Failed to create default policy");
16214 * Create the needed meter tables.
16215 * Lock free, (mutex should be acquired by caller).
16218 * Pointer to Ethernet device.
16220 * Meter information table.
16221 * @param[in] mtr_idx
16223 * @param[in] domain_bitmap
16226 * 0 on success, -1 otherwise.
16229 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16230 struct mlx5_flow_meter_info *fm,
16232 uint8_t domain_bitmap)
16234 struct mlx5_priv *priv = dev->data->dev_private;
16235 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16236 struct rte_flow_error error;
16237 struct mlx5_flow_tbl_data_entry *tbl_data;
16238 uint8_t egress, transfer;
16239 void *actions[METER_ACTIONS];
16240 int domain, ret, i;
16241 struct mlx5_flow_counter *cnt;
16242 struct mlx5_flow_dv_match_params value = {
16243 .size = sizeof(value.buf),
16245 struct mlx5_flow_dv_match_params matcher_para = {
16246 .size = sizeof(matcher_para.buf),
16248 int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16250 uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16251 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16252 struct mlx5_list_entry *entry;
16253 struct mlx5_flow_dv_matcher matcher = {
16255 .size = sizeof(matcher.mask.buf),
16258 struct mlx5_flow_dv_matcher *drop_matcher;
16259 struct mlx5_flow_cb_ctx ctx = {
16265 if (!priv->mtr_en || mtr_id_reg_c < 0) {
16266 rte_errno = ENOTSUP;
16269 for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16270 if (!(domain_bitmap & (1 << domain)) ||
16271 (mtrmng->def_rule[domain] && !fm->drop_cnt))
16273 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16274 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16275 /* Create the drop table with METER DROP level. */
16276 if (!mtrmng->drop_tbl[domain]) {
16277 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16278 MLX5_FLOW_TABLE_LEVEL_METER,
16279 egress, transfer, false, NULL, 0,
16280 0, MLX5_MTR_TABLE_ID_DROP, &error);
16281 if (!mtrmng->drop_tbl[domain]) {
16282 DRV_LOG(ERR, "Failed to create meter drop table.");
16286 /* Create default matcher in drop table. */
16287 matcher.tbl = mtrmng->drop_tbl[domain],
16288 tbl_data = container_of(mtrmng->drop_tbl[domain],
16289 struct mlx5_flow_tbl_data_entry, tbl);
16290 if (!mtrmng->def_matcher[domain]) {
16291 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16292 (enum modify_reg)mtr_id_reg_c,
16294 matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16295 matcher.crc = rte_raw_cksum
16296 ((const void *)matcher.mask.buf,
16297 matcher.mask.size);
16298 entry = mlx5_list_register(&tbl_data->matchers, &ctx);
16300 DRV_LOG(ERR, "Failed to register meter "
16301 "drop default matcher.");
16304 mtrmng->def_matcher[domain] = container_of(entry,
16305 struct mlx5_flow_dv_matcher, entry);
16307 /* Create default rule in drop table. */
16308 if (!mtrmng->def_rule[domain]) {
16310 actions[i++] = priv->sh->dr_drop_action;
16311 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16312 (enum modify_reg)mtr_id_reg_c, 0, 0);
16313 misc_mask = flow_dv_matcher_enable(value.buf);
16314 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16315 ret = mlx5_flow_os_create_flow
16316 (mtrmng->def_matcher[domain]->matcher_object,
16317 (void *)&value, i, actions,
16318 &mtrmng->def_rule[domain]);
16320 DRV_LOG(ERR, "Failed to create meter "
16321 "default drop rule for drop table.");
16327 MLX5_ASSERT(mtrmng->max_mtr_bits);
16328 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16329 /* Create matchers for Drop. */
16330 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16331 (enum modify_reg)mtr_id_reg_c, 0,
16332 (mtr_id_mask << mtr_id_offset));
16333 matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16334 matcher.crc = rte_raw_cksum
16335 ((const void *)matcher.mask.buf,
16336 matcher.mask.size);
16337 entry = mlx5_list_register(&tbl_data->matchers, &ctx);
16340 "Failed to register meter drop matcher.");
16343 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16344 container_of(entry, struct mlx5_flow_dv_matcher,
16348 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16349 /* Create drop rule, matching meter_id only. */
16350 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16351 (enum modify_reg)mtr_id_reg_c,
16352 (mtr_idx << mtr_id_offset), UINT32_MAX);
16354 cnt = flow_dv_counter_get_by_idx(dev,
16355 fm->drop_cnt, NULL);
16356 actions[i++] = cnt->action;
16357 actions[i++] = priv->sh->dr_drop_action;
16358 misc_mask = flow_dv_matcher_enable(value.buf);
16359 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16360 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16361 (void *)&value, i, actions,
16362 &fm->drop_rule[domain]);
16364 DRV_LOG(ERR, "Failed to create meter "
16365 "drop rule for drop table.");
16371 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16372 if (fm->drop_rule[i]) {
16373 claim_zero(mlx5_flow_os_destroy_flow
16374 (fm->drop_rule[i]));
16375 fm->drop_rule[i] = NULL;
16381 static struct mlx5_flow_meter_sub_policy *
16382 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16383 struct mlx5_flow_meter_policy *mtr_policy,
16384 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16385 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16388 struct mlx5_priv *priv = dev->data->dev_private;
16389 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16390 uint32_t sub_policy_idx = 0;
16391 uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16393 struct mlx5_hrxq *hrxq;
16394 struct mlx5_flow_handle dh;
16395 struct mlx5_meter_policy_action_container *act_cnt;
16396 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16397 uint16_t sub_policy_num;
16399 rte_spinlock_lock(&mtr_policy->sl);
16400 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16403 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16404 if (!hrxq_idx[i]) {
16405 rte_spinlock_unlock(&mtr_policy->sl);
16409 sub_policy_num = (mtr_policy->sub_policy_num >>
16410 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16411 MLX5_MTR_SUB_POLICY_NUM_MASK;
16412 for (i = 0; i < sub_policy_num;
16414 for (j = 0; j < MLX5_MTR_RTE_COLORS; j++) {
16417 mtr_policy->sub_policys[domain][i]->rix_hrxq[j])
16420 if (j >= MLX5_MTR_RTE_COLORS) {
16422 * Found the sub policy table with
16423 * the same queue per color
16425 rte_spinlock_unlock(&mtr_policy->sl);
16426 for (j = 0; j < MLX5_MTR_RTE_COLORS; j++)
16427 mlx5_hrxq_release(dev, hrxq_idx[j]);
16429 return mtr_policy->sub_policys[domain][i];
16432 /* Create sub policy. */
16433 if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16434 /* Reuse the first dummy sub_policy*/
16435 sub_policy = mtr_policy->sub_policys[domain][0];
16436 sub_policy_idx = sub_policy->idx;
16438 sub_policy = mlx5_ipool_zmalloc
16439 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16442 sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16443 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16444 mlx5_hrxq_release(dev, hrxq_idx[i]);
16445 goto rss_sub_policy_error;
16447 sub_policy->idx = sub_policy_idx;
16448 sub_policy->main_policy = mtr_policy;
16450 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16453 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16454 if (mtr_policy->is_hierarchy) {
16455 act_cnt = &mtr_policy->act_cnt[i];
16456 act_cnt->next_sub_policy = next_sub_policy;
16457 mlx5_hrxq_release(dev, hrxq_idx[i]);
16460 * Overwrite the last action from
16461 * RSS action to Queue action.
16463 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16466 DRV_LOG(ERR, "Failed to create policy hrxq");
16467 goto rss_sub_policy_error;
16469 act_cnt = &mtr_policy->act_cnt[i];
16470 if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16471 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16472 if (act_cnt->rix_mark)
16474 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16475 dh.rix_hrxq = hrxq_idx[i];
16476 flow_drv_rxq_flags_set(dev, &dh);
16480 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16481 sub_policy, domain)) {
16482 DRV_LOG(ERR, "Failed to create policy "
16483 "rules per domain.");
16484 goto rss_sub_policy_error;
16486 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16487 i = (mtr_policy->sub_policy_num >>
16488 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16489 MLX5_MTR_SUB_POLICY_NUM_MASK;
16490 mtr_policy->sub_policys[domain][i] = sub_policy;
16492 if (i > MLX5_MTR_RSS_MAX_SUB_POLICY)
16493 goto rss_sub_policy_error;
16494 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16495 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16496 mtr_policy->sub_policy_num |=
16497 (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16498 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16500 rte_spinlock_unlock(&mtr_policy->sl);
16503 rss_sub_policy_error:
16505 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16506 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16507 i = (mtr_policy->sub_policy_num >>
16508 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16509 MLX5_MTR_SUB_POLICY_NUM_MASK;
16510 mtr_policy->sub_policys[domain][i] = NULL;
16512 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16516 rte_spinlock_unlock(&mtr_policy->sl);
16521 * Find the policy table for prefix table with RSS.
16524 * Pointer to Ethernet device.
16525 * @param[in] mtr_policy
16526 * Pointer to meter policy table.
16527 * @param[in] rss_desc
16528 * Pointer to rss_desc
16530 * Pointer to table set on success, NULL otherwise and rte_errno is set.
16532 static struct mlx5_flow_meter_sub_policy *
16533 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
16534 struct mlx5_flow_meter_policy *mtr_policy,
16535 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
16537 struct mlx5_priv *priv = dev->data->dev_private;
16538 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16539 struct mlx5_flow_meter_info *next_fm;
16540 struct mlx5_flow_meter_policy *next_policy;
16541 struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
16542 struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
16543 struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
16544 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16545 bool reuse_sub_policy;
16550 /* Iterate hierarchy to get all policies in this hierarchy. */
16551 policies[i++] = mtr_policy;
16552 if (!mtr_policy->is_hierarchy)
16554 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
16555 DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
16558 next_fm = mlx5_flow_meter_find(priv,
16559 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16561 DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
16565 mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
16567 MLX5_ASSERT(next_policy);
16568 mtr_policy = next_policy;
16572 * From last policy to the first one in hierarchy,
16573 * create/get the sub policy for each of them.
16575 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
16579 &reuse_sub_policy);
16581 DRV_LOG(ERR, "Failed to get the sub policy.");
16584 if (!reuse_sub_policy)
16585 sub_policies[j++] = sub_policy;
16586 next_sub_policy = sub_policy;
16591 uint16_t sub_policy_num;
16593 sub_policy = sub_policies[--j];
16594 mtr_policy = sub_policy->main_policy;
16595 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16596 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16597 sub_policy_num = (mtr_policy->sub_policy_num >>
16598 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16599 MLX5_MTR_SUB_POLICY_NUM_MASK;
16600 mtr_policy->sub_policys[domain][sub_policy_num - 1] =
16603 mtr_policy->sub_policy_num &=
16604 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16605 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
16606 mtr_policy->sub_policy_num |=
16607 (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16608 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
16609 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16617 * Create the sub policy tag rule for all meters in hierarchy.
16620 * Pointer to Ethernet device.
16622 * Meter information table.
16623 * @param[in] src_port
16624 * The src port this extra rule should use.
16626 * The src port match item.
16627 * @param[out] error
16628 * Perform verbose error reporting if not NULL.
16630 * 0 on success, a negative errno value otherwise and rte_errno is set.
16633 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
16634 struct mlx5_flow_meter_info *fm,
16636 const struct rte_flow_item *item,
16637 struct rte_flow_error *error)
16639 struct mlx5_priv *priv = dev->data->dev_private;
16640 struct mlx5_flow_meter_policy *mtr_policy;
16641 struct mlx5_flow_meter_sub_policy *sub_policy;
16642 struct mlx5_flow_meter_info *next_fm = NULL;
16643 struct mlx5_flow_meter_policy *next_policy;
16644 struct mlx5_flow_meter_sub_policy *next_sub_policy;
16645 struct mlx5_flow_tbl_data_entry *tbl_data;
16646 struct mlx5_sub_policy_color_rule *color_rule;
16647 struct mlx5_meter_policy_acts acts;
16648 uint32_t color_reg_c_idx;
16649 bool mtr_first = (src_port != UINT16_MAX) ? true : false;
16650 struct rte_flow_attr attr = {
16651 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16658 uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
16661 mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
16662 MLX5_ASSERT(mtr_policy);
16663 if (!mtr_policy->is_hierarchy)
16665 next_fm = mlx5_flow_meter_find(priv,
16666 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16668 return rte_flow_error_set(error, EINVAL,
16669 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16670 "Failed to find next meter in hierarchy.");
16672 if (!next_fm->drop_cnt)
16674 color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
16675 sub_policy = mtr_policy->sub_policys[domain][0];
16676 for (i = 0; i < RTE_COLORS; i++) {
16677 bool rule_exist = false;
16678 struct mlx5_meter_policy_action_container *act_cnt;
16680 if (i >= RTE_COLOR_YELLOW)
16682 TAILQ_FOREACH(color_rule,
16683 &sub_policy->color_rules[i], next_port)
16684 if (color_rule->src_port == src_port) {
16690 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16691 sizeof(struct mlx5_sub_policy_color_rule),
16694 return rte_flow_error_set(error, ENOMEM,
16695 RTE_FLOW_ERROR_TYPE_ACTION,
16696 NULL, "No memory to create tag color rule.");
16697 color_rule->src_port = src_port;
16699 next_policy = mlx5_flow_meter_policy_find(dev,
16700 next_fm->policy_id, NULL);
16701 MLX5_ASSERT(next_policy);
16702 next_sub_policy = next_policy->sub_policys[domain][0];
16703 tbl_data = container_of(next_sub_policy->tbl_rsc,
16704 struct mlx5_flow_tbl_data_entry, tbl);
16705 act_cnt = &mtr_policy->act_cnt[i];
16707 acts.dv_actions[0] = next_fm->meter_action;
16708 acts.dv_actions[1] = act_cnt->modify_hdr->action;
16710 acts.dv_actions[0] = act_cnt->modify_hdr->action;
16711 acts.dv_actions[1] = next_fm->meter_action;
16713 acts.dv_actions[2] = tbl_data->jump.action;
16714 acts.actions_n = 3;
16715 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
16719 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16720 i, sub_policy, &attr, true, item,
16721 &color_rule->matcher, error)) {
16722 rte_flow_error_set(error, errno,
16723 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16724 "Failed to create hierarchy meter matcher.");
16727 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
16729 color_rule->matcher->matcher_object,
16730 acts.actions_n, acts.dv_actions,
16732 &color_rule->rule, &attr)) {
16733 rte_flow_error_set(error, errno,
16734 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16735 "Failed to create hierarchy meter rule.");
16738 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16739 color_rule, next_port);
16743 * Recursive call to iterate all meters in hierarchy and
16744 * create needed rules.
16746 return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
16747 src_port, item, error);
16750 if (color_rule->rule)
16751 mlx5_flow_os_destroy_flow(color_rule->rule);
16752 if (color_rule->matcher) {
16753 struct mlx5_flow_tbl_data_entry *tbl =
16754 container_of(color_rule->matcher->tbl,
16755 typeof(*tbl), tbl);
16756 mlx5_list_unregister(&tbl->matchers,
16757 &color_rule->matcher->entry);
16759 mlx5_free(color_rule);
16762 mlx5_flow_meter_detach(priv, next_fm);
16767 * Destroy the sub policy table with RX queue.
16770 * Pointer to Ethernet device.
16771 * @param[in] mtr_policy
16772 * Pointer to meter policy table.
16775 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
16776 struct mlx5_flow_meter_policy *mtr_policy)
16778 struct mlx5_priv *priv = dev->data->dev_private;
16779 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16780 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16782 uint16_t sub_policy_num, new_policy_num;
16784 rte_spinlock_lock(&mtr_policy->sl);
16785 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16786 switch (mtr_policy->act_cnt[i].fate_action) {
16787 case MLX5_FLOW_FATE_SHARED_RSS:
16788 sub_policy_num = (mtr_policy->sub_policy_num >>
16789 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16790 MLX5_MTR_SUB_POLICY_NUM_MASK;
16791 new_policy_num = sub_policy_num;
16792 for (j = 0; j < sub_policy_num; j++) {
16794 mtr_policy->sub_policys[domain][j];
16796 __flow_dv_destroy_sub_policy_rules(dev,
16799 mtr_policy->sub_policys[domain][0]) {
16800 mtr_policy->sub_policys[domain][j] =
16803 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16809 if (new_policy_num != sub_policy_num) {
16810 mtr_policy->sub_policy_num &=
16811 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16812 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16813 mtr_policy->sub_policy_num |=
16815 MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16816 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16819 case MLX5_FLOW_FATE_QUEUE:
16820 sub_policy = mtr_policy->sub_policys[domain][0];
16821 __flow_dv_destroy_sub_policy_rules(dev,
16825 /*Other actions without queue and do nothing*/
16829 rte_spinlock_unlock(&mtr_policy->sl);
16833 * Validate the batch counter support in root table.
16835 * Create a simple flow with invalid counter and drop action on root table to
16836 * validate if batch counter with offset on root table is supported or not.
16839 * Pointer to rte_eth_dev structure.
16842 * 0 on success, a negative errno value otherwise and rte_errno is set.
16845 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
16847 struct mlx5_priv *priv = dev->data->dev_private;
16848 struct mlx5_dev_ctx_shared *sh = priv->sh;
16849 struct mlx5_flow_dv_match_params mask = {
16850 .size = sizeof(mask.buf),
16852 struct mlx5_flow_dv_match_params value = {
16853 .size = sizeof(value.buf),
16855 struct mlx5dv_flow_matcher_attr dv_attr = {
16856 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
16858 .match_criteria_enable = 0,
16859 .match_mask = (void *)&mask,
16861 void *actions[2] = { 0 };
16862 struct mlx5_flow_tbl_resource *tbl = NULL;
16863 struct mlx5_devx_obj *dcs = NULL;
16864 void *matcher = NULL;
16868 tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
16872 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
16875 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
16879 dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
16880 __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
16881 ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
16885 __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
16886 ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
16890 * If batch counter with offset is not supported, the driver will not
16891 * validate the invalid offset value, flow create should success.
16892 * In this case, it means batch counter is not supported in root table.
16894 * Otherwise, if flow create is failed, counter offset is supported.
16897 DRV_LOG(INFO, "Batch counter is not supported in root "
16898 "table. Switch to fallback mode.");
16899 rte_errno = ENOTSUP;
16901 claim_zero(mlx5_flow_os_destroy_flow(flow));
16903 /* Check matcher to make sure validate fail at flow create. */
16904 if (!matcher || (matcher && errno != EINVAL))
16905 DRV_LOG(ERR, "Unexpected error in counter offset "
16906 "support detection");
16910 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
16912 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
16914 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
16916 claim_zero(mlx5_devx_cmd_destroy(dcs));
16921 * Query a devx counter.
16924 * Pointer to the Ethernet device structure.
16926 * Index to the flow counter.
16928 * Set to clear the counter statistics.
16930 * The statistics value of packets.
16931 * @param[out] bytes
16932 * The statistics value of bytes.
16935 * 0 on success, otherwise return -1.
16938 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
16939 uint64_t *pkts, uint64_t *bytes)
16941 struct mlx5_priv *priv = dev->data->dev_private;
16942 struct mlx5_flow_counter *cnt;
16943 uint64_t inn_pkts, inn_bytes;
16946 if (!priv->config.devx)
16949 ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
16952 cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
16953 *pkts = inn_pkts - cnt->hits;
16954 *bytes = inn_bytes - cnt->bytes;
16956 cnt->hits = inn_pkts;
16957 cnt->bytes = inn_bytes;
16963 * Get aged-out flows.
16966 * Pointer to the Ethernet device structure.
16967 * @param[in] context
16968 * The address of an array of pointers to the aged-out flows contexts.
16969 * @param[in] nb_contexts
16970 * The length of context array pointers.
16971 * @param[out] error
16972 * Perform verbose error reporting if not NULL. Initialized in case of
16976 * how many contexts get in success, otherwise negative errno value.
16977 * if nb_contexts is 0, return the amount of all aged contexts.
16978 * if nb_contexts is not 0 , return the amount of aged flows reported
16979 * in the context array.
16980 * @note: only stub for now
16983 flow_get_aged_flows(struct rte_eth_dev *dev,
16985 uint32_t nb_contexts,
16986 struct rte_flow_error *error)
16988 struct mlx5_priv *priv = dev->data->dev_private;
16989 struct mlx5_age_info *age_info;
16990 struct mlx5_age_param *age_param;
16991 struct mlx5_flow_counter *counter;
16992 struct mlx5_aso_age_action *act;
16995 if (nb_contexts && !context)
16996 return rte_flow_error_set(error, EINVAL,
16997 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16998 NULL, "empty context");
16999 age_info = GET_PORT_AGE_INFO(priv);
17000 rte_spinlock_lock(&age_info->aged_sl);
17001 LIST_FOREACH(act, &age_info->aged_aso, next) {
17004 context[nb_flows - 1] =
17005 act->age_params.context;
17006 if (!(--nb_contexts))
17010 TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17013 age_param = MLX5_CNT_TO_AGE(counter);
17014 context[nb_flows - 1] = age_param->context;
17015 if (!(--nb_contexts))
17019 rte_spinlock_unlock(&age_info->aged_sl);
17020 MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17025 * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17028 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17030 return flow_dv_counter_alloc(dev, 0);
17034 * Validate indirect action.
17035 * Dispatcher for action type specific validation.
17038 * Pointer to the Ethernet device structure.
17040 * Indirect action configuration.
17041 * @param[in] action
17042 * The indirect action object to validate.
17043 * @param[out] error
17044 * Perform verbose error reporting if not NULL. Initialized in case of
17048 * 0 on success, otherwise negative errno value.
17051 flow_dv_action_validate(struct rte_eth_dev *dev,
17052 const struct rte_flow_indir_action_conf *conf,
17053 const struct rte_flow_action *action,
17054 struct rte_flow_error *err)
17056 struct mlx5_priv *priv = dev->data->dev_private;
17058 RTE_SET_USED(conf);
17059 switch (action->type) {
17060 case RTE_FLOW_ACTION_TYPE_RSS:
17062 * priv->obj_ops is set according to driver capabilities.
17063 * When DevX capabilities are
17064 * sufficient, it is set to devx_obj_ops.
17065 * Otherwise, it is set to ibv_obj_ops.
17066 * ibv_obj_ops doesn't support ind_table_modify operation.
17067 * In this case the indirect RSS action can't be used.
17069 if (priv->obj_ops.ind_table_modify == NULL)
17070 return rte_flow_error_set
17072 RTE_FLOW_ERROR_TYPE_ACTION,
17074 "Indirect RSS action not supported");
17075 return mlx5_validate_action_rss(dev, action, err);
17076 case RTE_FLOW_ACTION_TYPE_AGE:
17077 if (!priv->sh->aso_age_mng)
17078 return rte_flow_error_set(err, ENOTSUP,
17079 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17081 "Indirect age action not supported");
17082 return flow_dv_validate_action_age(0, action, dev, err);
17083 case RTE_FLOW_ACTION_TYPE_COUNT:
17085 * There are two mechanisms to share the action count.
17086 * The old mechanism uses the shared field to share, while the
17087 * new mechanism uses the indirect action API.
17088 * This validation comes to make sure that the two mechanisms
17089 * are not combined.
17091 if (is_shared_action_count(action))
17092 return rte_flow_error_set(err, ENOTSUP,
17093 RTE_FLOW_ERROR_TYPE_ACTION,
17095 "Mix shared and indirect counter is not supported");
17096 return flow_dv_validate_action_count(dev, true, 0, err);
17097 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17098 if (!priv->sh->ct_aso_en)
17099 return rte_flow_error_set(err, ENOTSUP,
17100 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17101 "ASO CT is not supported");
17102 return mlx5_validate_action_ct(dev, action->conf, err);
17104 return rte_flow_error_set(err, ENOTSUP,
17105 RTE_FLOW_ERROR_TYPE_ACTION,
17107 "action type not supported");
17112 * Validate the meter hierarchy chain for meter policy.
17115 * Pointer to the Ethernet device structure.
17116 * @param[in] meter_id
17118 * @param[in] action_flags
17119 * Holds the actions detected until now.
17120 * @param[out] is_rss
17122 * @param[out] hierarchy_domain
17123 * The domain bitmap for hierarchy policy.
17124 * @param[out] error
17125 * Perform verbose error reporting if not NULL. Initialized in case of
17129 * 0 on success, otherwise negative errno value with error set.
17132 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17134 uint64_t action_flags,
17136 uint8_t *hierarchy_domain,
17137 struct rte_mtr_error *error)
17139 struct mlx5_priv *priv = dev->data->dev_private;
17140 struct mlx5_flow_meter_info *fm;
17141 struct mlx5_flow_meter_policy *policy;
17144 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17145 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17146 return -rte_mtr_error_set(error, EINVAL,
17147 RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17149 "Multiple fate actions not supported.");
17151 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17153 return -rte_mtr_error_set(error, EINVAL,
17154 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17155 "Meter not found in meter hierarchy.");
17156 if (fm->def_policy)
17157 return -rte_mtr_error_set(error, EINVAL,
17158 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17159 "Non termination meter not supported in hierarchy.");
17160 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17161 MLX5_ASSERT(policy);
17162 if (!policy->is_hierarchy) {
17163 if (policy->transfer)
17164 *hierarchy_domain |=
17165 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17166 if (policy->ingress)
17167 *hierarchy_domain |=
17168 MLX5_MTR_DOMAIN_INGRESS_BIT;
17169 if (policy->egress)
17170 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17171 *is_rss = policy->is_rss;
17174 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17175 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17176 return -rte_mtr_error_set(error, EINVAL,
17177 RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17178 "Exceed max hierarchy meter number.");
17184 * Validate meter policy actions.
17185 * Dispatcher for action type specific validation.
17188 * Pointer to the Ethernet device structure.
17189 * @param[in] action
17190 * The meter policy action object to validate.
17192 * Attributes of flow to determine steering domain.
17193 * @param[out] error
17194 * Perform verbose error reporting if not NULL. Initialized in case of
17198 * 0 on success, otherwise negative errno value.
17201 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17202 const struct rte_flow_action *actions[RTE_COLORS],
17203 struct rte_flow_attr *attr,
17205 uint8_t *domain_bitmap,
17206 bool *is_def_policy,
17207 struct rte_mtr_error *error)
17209 struct mlx5_priv *priv = dev->data->dev_private;
17210 struct mlx5_dev_config *dev_conf = &priv->config;
17211 const struct rte_flow_action *act;
17212 uint64_t action_flags = 0;
17215 struct rte_flow_error flow_err;
17216 uint8_t domain_color[RTE_COLORS] = {0};
17217 uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17218 uint8_t hierarchy_domain = 0;
17219 const struct rte_flow_action_meter *mtr;
17221 if (!priv->config.dv_esw_en)
17222 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17223 *domain_bitmap = def_domain;
17224 if (actions[RTE_COLOR_YELLOW] &&
17225 actions[RTE_COLOR_YELLOW]->type != RTE_FLOW_ACTION_TYPE_END)
17226 return -rte_mtr_error_set(error, ENOTSUP,
17227 RTE_MTR_ERROR_TYPE_METER_POLICY,
17229 "Yellow color does not support any action.");
17230 if (actions[RTE_COLOR_YELLOW] &&
17231 actions[RTE_COLOR_YELLOW]->type != RTE_FLOW_ACTION_TYPE_DROP)
17232 return -rte_mtr_error_set(error, ENOTSUP,
17233 RTE_MTR_ERROR_TYPE_METER_POLICY,
17234 NULL, "Red color only supports drop action.");
17236 * Check default policy actions:
17237 * Green/Yellow: no action, Red: drop action
17239 if ((!actions[RTE_COLOR_GREEN] ||
17240 actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)) {
17241 *is_def_policy = true;
17244 flow_err.message = NULL;
17245 for (i = 0; i < RTE_COLORS; i++) {
17247 for (action_flags = 0, actions_n = 0;
17248 act && act->type != RTE_FLOW_ACTION_TYPE_END;
17250 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17251 return -rte_mtr_error_set(error, ENOTSUP,
17252 RTE_MTR_ERROR_TYPE_METER_POLICY,
17253 NULL, "too many actions");
17254 switch (act->type) {
17255 case RTE_FLOW_ACTION_TYPE_PORT_ID:
17256 if (!priv->config.dv_esw_en)
17257 return -rte_mtr_error_set(error,
17259 RTE_MTR_ERROR_TYPE_METER_POLICY,
17260 NULL, "PORT action validate check"
17261 " fail for ESW disable");
17262 ret = flow_dv_validate_action_port_id(dev,
17264 act, attr, &flow_err);
17266 return -rte_mtr_error_set(error,
17268 RTE_MTR_ERROR_TYPE_METER_POLICY,
17269 NULL, flow_err.message ?
17271 "PORT action validate check fail");
17273 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
17275 case RTE_FLOW_ACTION_TYPE_MARK:
17276 ret = flow_dv_validate_action_mark(dev, act,
17280 return -rte_mtr_error_set(error,
17282 RTE_MTR_ERROR_TYPE_METER_POLICY,
17283 NULL, flow_err.message ?
17285 "Mark action validate check fail");
17286 if (dev_conf->dv_xmeta_en !=
17287 MLX5_XMETA_MODE_LEGACY)
17288 return -rte_mtr_error_set(error,
17290 RTE_MTR_ERROR_TYPE_METER_POLICY,
17291 NULL, "Extend MARK action is "
17292 "not supported. Please try use "
17293 "default policy for meter.");
17294 action_flags |= MLX5_FLOW_ACTION_MARK;
17297 case RTE_FLOW_ACTION_TYPE_SET_TAG:
17298 ret = flow_dv_validate_action_set_tag(dev,
17302 return -rte_mtr_error_set(error,
17304 RTE_MTR_ERROR_TYPE_METER_POLICY,
17305 NULL, flow_err.message ?
17307 "Set tag action validate check fail");
17309 * Count all modify-header actions
17312 if (!(action_flags &
17313 MLX5_FLOW_MODIFY_HDR_ACTIONS))
17315 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
17317 case RTE_FLOW_ACTION_TYPE_DROP:
17318 ret = mlx5_flow_validate_action_drop
17322 return -rte_mtr_error_set(error,
17324 RTE_MTR_ERROR_TYPE_METER_POLICY,
17325 NULL, flow_err.message ?
17327 "Drop action validate check fail");
17328 action_flags |= MLX5_FLOW_ACTION_DROP;
17331 case RTE_FLOW_ACTION_TYPE_QUEUE:
17333 * Check whether extensive
17334 * metadata feature is engaged.
17336 if (dev_conf->dv_flow_en &&
17337 (dev_conf->dv_xmeta_en !=
17338 MLX5_XMETA_MODE_LEGACY) &&
17339 mlx5_flow_ext_mreg_supported(dev))
17340 return -rte_mtr_error_set(error,
17342 RTE_MTR_ERROR_TYPE_METER_POLICY,
17343 NULL, "Queue action with meta "
17344 "is not supported. Please try use "
17345 "default policy for meter.");
17346 ret = mlx5_flow_validate_action_queue(act,
17350 return -rte_mtr_error_set(error,
17352 RTE_MTR_ERROR_TYPE_METER_POLICY,
17353 NULL, flow_err.message ?
17355 "Queue action validate check fail");
17356 action_flags |= MLX5_FLOW_ACTION_QUEUE;
17359 case RTE_FLOW_ACTION_TYPE_RSS:
17360 if (dev_conf->dv_flow_en &&
17361 (dev_conf->dv_xmeta_en !=
17362 MLX5_XMETA_MODE_LEGACY) &&
17363 mlx5_flow_ext_mreg_supported(dev))
17364 return -rte_mtr_error_set(error,
17366 RTE_MTR_ERROR_TYPE_METER_POLICY,
17367 NULL, "RSS action with meta "
17368 "is not supported. Please try use "
17369 "default policy for meter.");
17370 ret = mlx5_validate_action_rss(dev, act,
17373 return -rte_mtr_error_set(error,
17375 RTE_MTR_ERROR_TYPE_METER_POLICY,
17376 NULL, flow_err.message ?
17378 "RSS action validate check fail");
17379 action_flags |= MLX5_FLOW_ACTION_RSS;
17383 case RTE_FLOW_ACTION_TYPE_JUMP:
17384 ret = flow_dv_validate_action_jump(dev,
17385 NULL, act, action_flags,
17386 attr, true, &flow_err);
17388 return -rte_mtr_error_set(error,
17390 RTE_MTR_ERROR_TYPE_METER_POLICY,
17391 NULL, flow_err.message ?
17393 "Jump action validate check fail");
17395 action_flags |= MLX5_FLOW_ACTION_JUMP;
17397 case RTE_FLOW_ACTION_TYPE_METER:
17398 if (i != RTE_COLOR_GREEN)
17399 return -rte_mtr_error_set(error,
17401 RTE_MTR_ERROR_TYPE_METER_POLICY,
17402 NULL, flow_err.message ?
17404 "Meter hierarchy only supports GREEN color.");
17406 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17416 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
17419 return -rte_mtr_error_set(error, ENOTSUP,
17420 RTE_MTR_ERROR_TYPE_METER_POLICY,
17422 "Doesn't support optional action");
17425 /* Yellow is not supported, just skip. */
17426 if (i == RTE_COLOR_YELLOW)
17428 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
17429 domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
17430 else if ((action_flags &
17431 (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
17432 (action_flags & MLX5_FLOW_ACTION_MARK))
17434 * Only support MLX5_XMETA_MODE_LEGACY
17435 * so MARK action only in ingress domain.
17437 domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
17438 else if (action_flags &
17439 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
17440 domain_color[i] = hierarchy_domain;
17442 domain_color[i] = def_domain;
17444 * Validate the drop action mutual exclusion
17445 * with other actions. Drop action is mutually-exclusive
17446 * with any other action, except for Count action.
17448 if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
17449 (action_flags & ~MLX5_FLOW_ACTION_DROP)) {
17450 return -rte_mtr_error_set(error, ENOTSUP,
17451 RTE_MTR_ERROR_TYPE_METER_POLICY,
17452 NULL, "Drop action is mutually-exclusive "
17453 "with any other action");
17455 /* Eswitch has few restrictions on using items and actions */
17456 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
17457 if (!mlx5_flow_ext_mreg_supported(dev) &&
17458 action_flags & MLX5_FLOW_ACTION_MARK)
17459 return -rte_mtr_error_set(error, ENOTSUP,
17460 RTE_MTR_ERROR_TYPE_METER_POLICY,
17461 NULL, "unsupported action MARK");
17462 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
17463 return -rte_mtr_error_set(error, ENOTSUP,
17464 RTE_MTR_ERROR_TYPE_METER_POLICY,
17465 NULL, "unsupported action QUEUE");
17466 if (action_flags & MLX5_FLOW_ACTION_RSS)
17467 return -rte_mtr_error_set(error, ENOTSUP,
17468 RTE_MTR_ERROR_TYPE_METER_POLICY,
17469 NULL, "unsupported action RSS");
17470 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17471 return -rte_mtr_error_set(error, ENOTSUP,
17472 RTE_MTR_ERROR_TYPE_METER_POLICY,
17473 NULL, "no fate action is found");
17475 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) &&
17477 MLX5_MTR_DOMAIN_INGRESS_BIT)) {
17478 if ((domain_color[i] &
17479 MLX5_MTR_DOMAIN_EGRESS_BIT))
17481 MLX5_MTR_DOMAIN_EGRESS_BIT;
17483 return -rte_mtr_error_set(error,
17485 RTE_MTR_ERROR_TYPE_METER_POLICY,
17486 NULL, "no fate action is found");
17489 if (domain_color[i] != def_domain)
17490 *domain_bitmap = domain_color[i];
17496 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
17498 struct mlx5_priv *priv = dev->data->dev_private;
17501 if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
17502 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
17507 if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
17508 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
17512 if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
17513 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
17520 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
17521 .validate = flow_dv_validate,
17522 .prepare = flow_dv_prepare,
17523 .translate = flow_dv_translate,
17524 .apply = flow_dv_apply,
17525 .remove = flow_dv_remove,
17526 .destroy = flow_dv_destroy,
17527 .query = flow_dv_query,
17528 .create_mtr_tbls = flow_dv_create_mtr_tbls,
17529 .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
17530 .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
17531 .create_meter = flow_dv_mtr_alloc,
17532 .free_meter = flow_dv_aso_mtr_release_to_pool,
17533 .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
17534 .create_mtr_acts = flow_dv_create_mtr_policy_acts,
17535 .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
17536 .create_policy_rules = flow_dv_create_policy_rules,
17537 .destroy_policy_rules = flow_dv_destroy_policy_rules,
17538 .create_def_policy = flow_dv_create_def_policy,
17539 .destroy_def_policy = flow_dv_destroy_def_policy,
17540 .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
17541 .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
17542 .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
17543 .counter_alloc = flow_dv_counter_allocate,
17544 .counter_free = flow_dv_counter_free,
17545 .counter_query = flow_dv_counter_query,
17546 .get_aged_flows = flow_get_aged_flows,
17547 .action_validate = flow_dv_action_validate,
17548 .action_create = flow_dv_action_create,
17549 .action_destroy = flow_dv_action_destroy,
17550 .action_update = flow_dv_action_update,
17551 .action_query = flow_dv_action_query,
17552 .sync_domain = flow_dv_sync_domain,
17555 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */