drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_bus_pci.h>
  19 #include <rte_ip.h>
  20 #include <rte_gre.h>
  21 #include <rte_vxlan.h>
  22 #include <rte_gtp.h>
  23 #include <rte_eal_paging.h>
  24 #include <rte_mpls.h>
  25 #include <rte_mtr.h>
  26 #include <rte_mtr_driver.h>
  27 #include <rte_tailq.h>
  28
  29 #include <mlx5_glue.h>
  30 #include <mlx5_devx_cmds.h>
  31 #include <mlx5_prm.h>
  32 #include <mlx5_malloc.h>
  33
  34 #include "mlx5_defs.h"
  35 #include "mlx5.h"
  36 #include "mlx5_common_os.h"
  37 #include "mlx5_flow.h"
  38 #include "mlx5_flow_os.h"
  39 #include "mlx5_rx.h"
  40 #include "mlx5_tx.h"
  41 #include "rte_pmd_mlx5.h"
  42
  43 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  44
  45 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  46 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  47 #endif
  48
  49 #ifndef HAVE_MLX5DV_DR_ESWITCH
  50 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  51 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  52 #endif
  53 #endif
  54
  55 #ifndef HAVE_MLX5DV_DR
  56 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  57 #endif
  58
  59 /* VLAN header definitions */
  60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  65
  66 union flow_dv_attr {
  67         struct {
  68                 uint32_t valid:1;
  69                 uint32_t ipv4:1;
  70                 uint32_t ipv6:1;
  71                 uint32_t tcp:1;
  72                 uint32_t udp:1;
  73                 uint32_t reserved:27;
  74         };
  75         uint32_t attr;
  76 };
  77
  78 static int
  79 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  80                              struct mlx5_flow_tbl_resource *tbl);
  81
  82 static int
  83 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  84                                      uint32_t encap_decap_idx);
  85
  86 static int
  87 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  88                                         uint32_t port_id);
  89 static void
  90 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  91
  92 static int
  93 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
  94                                   uint32_t rix_jump);
  95
  96 static int16_t
  97 flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
  98 {
  99         struct mlx5_priv *priv = dev->data->dev_private;
 100         struct mlx5_common_device *cdev = priv->sh->cdev;
 101
 102         if (cdev->config.hca_attr.esw_mgr_vport_id_valid)
 103                 return (int16_t)cdev->config.hca_attr.esw_mgr_vport_id;
 104
 105         if (priv->pci_dev == NULL)
 106                 return 0;
 107         switch (priv->pci_dev->id.device_id) {
 108         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
 109         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
 110         case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
 111                 return (int16_t)0xfffe;
 112         default:
 113                 return 0;
 114         }
 115 }
 116
 117 /**
 118  * Initialize flow attributes structure according to flow items' types.
 119  *
 120  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
 121  * mode. For tunnel mode, the items to be modified are the outermost ones.
 122  *
 123  * @param[in] item
 124  *   Pointer to item specification.
 125  * @param[out] attr
 126  *   Pointer to flow attributes structure.
 127  * @param[in] dev_flow
 128  *   Pointer to the sub flow.
 129  * @param[in] tunnel_decap
 130  *   Whether action is after tunnel decapsulation.
 131  */
 132 static void
 133 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 134                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 135 {
 136         uint64_t layers = dev_flow->handle->layers;
 137
 138         /*
 139          * If layers is already initialized, it means this dev_flow is the
 140          * suffix flow, the layers flags is set by the prefix flow. Need to
 141          * use the layer flags from prefix flow as the suffix flow may not
 142          * have the user defined items as the flow is split.
 143          */
 144         if (layers) {
 145                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 146                         attr->ipv4 = 1;
 147                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 148                         attr->ipv6 = 1;
 149                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 150                         attr->tcp = 1;
 151                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 152                         attr->udp = 1;
 153                 attr->valid = 1;
 154                 return;
 155         }
 156         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 157                 uint8_t next_protocol = 0xff;
 158                 switch (item->type) {
 159                 case RTE_FLOW_ITEM_TYPE_GRE:
 160                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 161                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 162                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 163                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 164                 case RTE_FLOW_ITEM_TYPE_MPLS:
 165                         if (tunnel_decap)
 166                                 attr->attr = 0;
 167                         break;
 168                 case RTE_FLOW_ITEM_TYPE_IPV4:
 169                         if (!attr->ipv6)
 170                                 attr->ipv4 = 1;
 171                         if (item->mask != NULL &&
 172                             ((const struct rte_flow_item_ipv4 *)
 173                             item->mask)->hdr.next_proto_id)
 174                                 next_protocol =
 175                                     ((const struct rte_flow_item_ipv4 *)
 176                                       (item->spec))->hdr.next_proto_id &
 177                                     ((const struct rte_flow_item_ipv4 *)
 178                                       (item->mask))->hdr.next_proto_id;
 179                         if ((next_protocol == IPPROTO_IPIP ||
 180                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 181                                 attr->attr = 0;
 182                         break;
 183                 case RTE_FLOW_ITEM_TYPE_IPV6:
 184                         if (!attr->ipv4)
 185                                 attr->ipv6 = 1;
 186                         if (item->mask != NULL &&
 187                             ((const struct rte_flow_item_ipv6 *)
 188                             item->mask)->hdr.proto)
 189                                 next_protocol =
 190                                     ((const struct rte_flow_item_ipv6 *)
 191                                       (item->spec))->hdr.proto &
 192                                     ((const struct rte_flow_item_ipv6 *)
 193                                       (item->mask))->hdr.proto;
 194                         if ((next_protocol == IPPROTO_IPIP ||
 195                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 196                                 attr->attr = 0;
 197                         break;
 198                 case RTE_FLOW_ITEM_TYPE_UDP:
 199                         if (!attr->tcp)
 200                                 attr->udp = 1;
 201                         break;
 202                 case RTE_FLOW_ITEM_TYPE_TCP:
 203                         if (!attr->udp)
 204                                 attr->tcp = 1;
 205                         break;
 206                 default:
 207                         break;
 208                 }
 209         }
 210         attr->valid = 1;
 211 }
 212
 213 /*
 214  * Convert rte_mtr_color to mlx5 color.
 215  *
 216  * @param[in] rcol
 217  *   rte_mtr_color.
 218  *
 219  * @return
 220  *   mlx5 color.
 221  */
 222 static inline int
 223 rte_col_2_mlx5_col(enum rte_color rcol)
 224 {
 225         switch (rcol) {
 226         case RTE_COLOR_GREEN:
 227                 return MLX5_FLOW_COLOR_GREEN;
 228         case RTE_COLOR_YELLOW:
 229                 return MLX5_FLOW_COLOR_YELLOW;
 230         case RTE_COLOR_RED:
 231                 return MLX5_FLOW_COLOR_RED;
 232         default:
 233                 break;
 234         }
 235         return MLX5_FLOW_COLOR_UNDEFINED;
 236 }
 237
 238 struct field_modify_info {
 239         uint32_t size; /* Size of field in protocol header, in bytes. */
 240         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 241         enum mlx5_modification_field id;
 242 };
 243
 244 struct field_modify_info modify_eth[] = {
 245         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 246         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 247         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 248         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 249         {0, 0, 0},
 250 };
 251
 252 struct field_modify_info modify_vlan_out_first_vid[] = {
 253         /* Size in bits !!! */
 254         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 255         {0, 0, 0},
 256 };
 257
 258 struct field_modify_info modify_ipv4[] = {
 259         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 260         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 261         {4, 12, MLX5_MODI_OUT_SIPV4},
 262         {4, 16, MLX5_MODI_OUT_DIPV4},
 263         {0, 0, 0},
 264 };
 265
 266 struct field_modify_info modify_ipv6[] = {
 267         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 268         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 269         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 270         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 271         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 272         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 273         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 274         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 275         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 276         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 277         {0, 0, 0},
 278 };
 279
 280 struct field_modify_info modify_udp[] = {
 281         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 282         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 283         {0, 0, 0},
 284 };
 285
 286 struct field_modify_info modify_tcp[] = {
 287         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 288         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 289         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 290         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 291         {0, 0, 0},
 292 };
 293
 294 static void
 295 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 296                           uint8_t next_protocol, uint64_t *item_flags,
 297                           int *tunnel)
 298 {
 299         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 300                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 301         if (next_protocol == IPPROTO_IPIP) {
 302                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 303                 *tunnel = 1;
 304         }
 305         if (next_protocol == IPPROTO_IPV6) {
 306                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 307                 *tunnel = 1;
 308         }
 309 }
 310
 311 static inline struct mlx5_hlist *
 312 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
 313                      const char *name, uint32_t size, bool direct_key,
 314                      bool lcores_share, void *ctx,
 315                      mlx5_list_create_cb cb_create,
 316                      mlx5_list_match_cb cb_match,
 317                      mlx5_list_remove_cb cb_remove,
 318                      mlx5_list_clone_cb cb_clone,
 319                      mlx5_list_clone_free_cb cb_clone_free,
 320                      struct rte_flow_error *error)
 321 {
 322         struct mlx5_hlist *hl;
 323         struct mlx5_hlist *expected = NULL;
 324         char s[MLX5_NAME_SIZE];
 325
 326         hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 327         if (likely(hl))
 328                 return hl;
 329         snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
 330         hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
 331                         ctx, cb_create, cb_match, cb_remove, cb_clone,
 332                         cb_clone_free);
 333         if (!hl) {
 334                 DRV_LOG(ERR, "%s hash creation failed", name);
 335                 rte_flow_error_set(error, ENOMEM,
 336                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
 337                                    "cannot allocate resource memory");
 338                 return NULL;
 339         }
 340         if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
 341                                          __ATOMIC_SEQ_CST,
 342                                          __ATOMIC_SEQ_CST)) {
 343                 mlx5_hlist_destroy(hl);
 344                 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 345         }
 346         return hl;
 347 }
 348
 349 /* Update VLAN's VID/PCP based on input rte_flow_action.
 350  *
 351  * @param[in] action
 352  *   Pointer to struct rte_flow_action.
 353  * @param[out] vlan
 354  *   Pointer to struct rte_vlan_hdr.
 355  */
 356 static void
 357 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 358                          struct rte_vlan_hdr *vlan)
 359 {
 360         uint16_t vlan_tci;
 361         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 362                 vlan_tci =
 363                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 364                                                action->conf)->vlan_pcp;
 365                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 366                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 367                 vlan->vlan_tci |= vlan_tci;
 368         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 369                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 370                 vlan->vlan_tci |= rte_be_to_cpu_16
 371                     (((const struct rte_flow_action_of_set_vlan_vid *)
 372                                              action->conf)->vlan_vid);
 373         }
 374 }
 375
 376 /**
 377  * Fetch 1, 2, 3 or 4 byte field from the byte array
 378  * and return as unsigned integer in host-endian format.
 379  *
 380  * @param[in] data
 381  *   Pointer to data array.
 382  * @param[in] size
 383  *   Size of field to extract.
 384  *
 385  * @return
 386  *   converted field in host endian format.
 387  */
 388 static inline uint32_t
 389 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 390 {
 391         uint32_t ret;
 392
 393         switch (size) {
 394         case 1:
 395                 ret = *data;
 396                 break;
 397         case 2:
 398                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 399                 break;
 400         case 3:
 401                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 402                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 403                 break;
 404         case 4:
 405                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 406                 break;
 407         default:
 408                 MLX5_ASSERT(false);
 409                 ret = 0;
 410                 break;
 411         }
 412         return ret;
 413 }
 414
 415 /**
 416  * Convert modify-header action to DV specification.
 417  *
 418  * Data length of each action is determined by provided field description
 419  * and the item mask. Data bit offset and width of each action is determined
 420  * by provided item mask.
 421  *
 422  * @param[in] item
 423  *   Pointer to item specification.
 424  * @param[in] field
 425  *   Pointer to field modification information.
 426  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 427  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 428  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 429  * @param[in] dcopy
 430  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 431  *   Negative offset value sets the same offset as source offset.
 432  *   size field is ignored, value is taken from source field.
 433  * @param[in,out] resource
 434  *   Pointer to the modify-header resource.
 435  * @param[in] type
 436  *   Type of modification.
 437  * @param[out] error
 438  *   Pointer to the error structure.
 439  *
 440  * @return
 441  *   0 on success, a negative errno value otherwise and rte_errno is set.
 442  */
 443 static int
 444 flow_dv_convert_modify_action(struct rte_flow_item *item,
 445                               struct field_modify_info *field,
 446                               struct field_modify_info *dcopy,
 447                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 448                               uint32_t type, struct rte_flow_error *error)
 449 {
 450         uint32_t i = resource->actions_num;
 451         struct mlx5_modification_cmd *actions = resource->actions;
 452         uint32_t carry_b = 0;
 453
 454         /*
 455          * The item and mask are provided in big-endian format.
 456          * The fields should be presented as in big-endian format either.
 457          * Mask must be always present, it defines the actual field width.
 458          */
 459         MLX5_ASSERT(item->mask);
 460         MLX5_ASSERT(field->size);
 461         do {
 462                 uint32_t size_b;
 463                 uint32_t off_b;
 464                 uint32_t mask;
 465                 uint32_t data;
 466                 bool next_field = true;
 467                 bool next_dcopy = true;
 468
 469                 if (i >= MLX5_MAX_MODIFY_NUM)
 470                         return rte_flow_error_set(error, EINVAL,
 471                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 472                                  "too many items to modify");
 473                 /* Fetch variable byte size mask from the array. */
 474                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 475                                            field->offset, field->size);
 476                 if (!mask) {
 477                         ++field;
 478                         continue;
 479                 }
 480                 /* Deduce actual data width in bits from mask value. */
 481                 off_b = rte_bsf32(mask) + carry_b;
 482                 size_b = sizeof(uint32_t) * CHAR_BIT -
 483                          off_b - __builtin_clz(mask);
 484                 MLX5_ASSERT(size_b);
 485                 actions[i] = (struct mlx5_modification_cmd) {
 486                         .action_type = type,
 487                         .field = field->id,
 488                         .offset = off_b,
 489                         .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
 490                                 0 : size_b,
 491                 };
 492                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 493                         MLX5_ASSERT(dcopy);
 494                         actions[i].dst_field = dcopy->id;
 495                         actions[i].dst_offset =
 496                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 497                         /* Convert entire record to big-endian format. */
 498                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 499                         /*
 500                          * Destination field overflow. Copy leftovers of
 501                          * a source field to the next destination field.
 502                          */
 503                         carry_b = 0;
 504                         if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
 505                             dcopy->size != 0) {
 506                                 actions[i].length =
 507                                         dcopy->size * CHAR_BIT - dcopy->offset;
 508                                 carry_b = actions[i].length;
 509                                 next_field = false;
 510                         }
 511                         /*
 512                          * Not enough bits in a source filed to fill a
 513                          * destination field. Switch to the next source.
 514                          */
 515                         if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
 516                             (size_b == field->size * CHAR_BIT - off_b)) {
 517                                 actions[i].length =
 518                                         field->size * CHAR_BIT - off_b;
 519                                 dcopy->offset += actions[i].length;
 520                                 next_dcopy = false;
 521                         }
 522                         if (next_dcopy)
 523                                 ++dcopy;
 524                 } else {
 525                         MLX5_ASSERT(item->spec);
 526                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 527                                                    field->offset, field->size);
 528                         /* Shift out the trailing masked bits from data. */
 529                         data = (data & mask) >> off_b;
 530                         actions[i].data1 = rte_cpu_to_be_32(data);
 531                 }
 532                 /* Convert entire record to expected big-endian format. */
 533                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 534                 if (next_field)
 535                         ++field;
 536                 ++i;
 537         } while (field->size);
 538         if (resource->actions_num == i)
 539                 return rte_flow_error_set(error, EINVAL,
 540                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 541                                           "invalid modification flow item");
 542         resource->actions_num = i;
 543         return 0;
 544 }
 545
 546 /**
 547  * Convert modify-header set IPv4 address action to DV specification.
 548  *
 549  * @param[in,out] resource
 550  *   Pointer to the modify-header resource.
 551  * @param[in] action
 552  *   Pointer to action specification.
 553  * @param[out] error
 554  *   Pointer to the error structure.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 flow_dv_convert_action_modify_ipv4
 561                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 562                          const struct rte_flow_action *action,
 563                          struct rte_flow_error *error)
 564 {
 565         const struct rte_flow_action_set_ipv4 *conf =
 566                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 567         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 568         struct rte_flow_item_ipv4 ipv4;
 569         struct rte_flow_item_ipv4 ipv4_mask;
 570
 571         memset(&ipv4, 0, sizeof(ipv4));
 572         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 573         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 574                 ipv4.hdr.src_addr = conf->ipv4_addr;
 575                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 576         } else {
 577                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 578                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 579         }
 580         item.spec = &ipv4;
 581         item.mask = &ipv4_mask;
 582         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 583                                              MLX5_MODIFICATION_TYPE_SET, error);
 584 }
 585
 586 /**
 587  * Convert modify-header set IPv6 address action to DV specification.
 588  *
 589  * @param[in,out] resource
 590  *   Pointer to the modify-header resource.
 591  * @param[in] action
 592  *   Pointer to action specification.
 593  * @param[out] error
 594  *   Pointer to the error structure.
 595  *
 596  * @return
 597  *   0 on success, a negative errno value otherwise and rte_errno is set.
 598  */
 599 static int
 600 flow_dv_convert_action_modify_ipv6
 601                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 602                          const struct rte_flow_action *action,
 603                          struct rte_flow_error *error)
 604 {
 605         const struct rte_flow_action_set_ipv6 *conf =
 606                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 607         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 608         struct rte_flow_item_ipv6 ipv6;
 609         struct rte_flow_item_ipv6 ipv6_mask;
 610
 611         memset(&ipv6, 0, sizeof(ipv6));
 612         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 613         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 614                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 615                        sizeof(ipv6.hdr.src_addr));
 616                 memcpy(&ipv6_mask.hdr.src_addr,
 617                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 618                        sizeof(ipv6.hdr.src_addr));
 619         } else {
 620                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 621                        sizeof(ipv6.hdr.dst_addr));
 622                 memcpy(&ipv6_mask.hdr.dst_addr,
 623                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 624                        sizeof(ipv6.hdr.dst_addr));
 625         }
 626         item.spec = &ipv6;
 627         item.mask = &ipv6_mask;
 628         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 629                                              MLX5_MODIFICATION_TYPE_SET, error);
 630 }
 631
 632 /**
 633  * Convert modify-header set MAC address action to DV specification.
 634  *
 635  * @param[in,out] resource
 636  *   Pointer to the modify-header resource.
 637  * @param[in] action
 638  *   Pointer to action specification.
 639  * @param[out] error
 640  *   Pointer to the error structure.
 641  *
 642  * @return
 643  *   0 on success, a negative errno value otherwise and rte_errno is set.
 644  */
 645 static int
 646 flow_dv_convert_action_modify_mac
 647                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 648                          const struct rte_flow_action *action,
 649                          struct rte_flow_error *error)
 650 {
 651         const struct rte_flow_action_set_mac *conf =
 652                 (const struct rte_flow_action_set_mac *)(action->conf);
 653         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 654         struct rte_flow_item_eth eth;
 655         struct rte_flow_item_eth eth_mask;
 656
 657         memset(&eth, 0, sizeof(eth));
 658         memset(&eth_mask, 0, sizeof(eth_mask));
 659         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 660                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 661                        sizeof(eth.src.addr_bytes));
 662                 memcpy(&eth_mask.src.addr_bytes,
 663                        &rte_flow_item_eth_mask.src.addr_bytes,
 664                        sizeof(eth_mask.src.addr_bytes));
 665         } else {
 666                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 667                        sizeof(eth.dst.addr_bytes));
 668                 memcpy(&eth_mask.dst.addr_bytes,
 669                        &rte_flow_item_eth_mask.dst.addr_bytes,
 670                        sizeof(eth_mask.dst.addr_bytes));
 671         }
 672         item.spec = &eth;
 673         item.mask = &eth_mask;
 674         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 675                                              MLX5_MODIFICATION_TYPE_SET, error);
 676 }
 677
 678 /**
 679  * Convert modify-header set VLAN VID action to DV specification.
 680  *
 681  * @param[in,out] resource
 682  *   Pointer to the modify-header resource.
 683  * @param[in] action
 684  *   Pointer to action specification.
 685  * @param[out] error
 686  *   Pointer to the error structure.
 687  *
 688  * @return
 689  *   0 on success, a negative errno value otherwise and rte_errno is set.
 690  */
 691 static int
 692 flow_dv_convert_action_modify_vlan_vid
 693                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 694                          const struct rte_flow_action *action,
 695                          struct rte_flow_error *error)
 696 {
 697         const struct rte_flow_action_of_set_vlan_vid *conf =
 698                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 699         int i = resource->actions_num;
 700         struct mlx5_modification_cmd *actions = resource->actions;
 701         struct field_modify_info *field = modify_vlan_out_first_vid;
 702
 703         if (i >= MLX5_MAX_MODIFY_NUM)
 704                 return rte_flow_error_set(error, EINVAL,
 705                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 706                          "too many items to modify");
 707         actions[i] = (struct mlx5_modification_cmd) {
 708                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 709                 .field = field->id,
 710                 .length = field->size,
 711                 .offset = field->offset,
 712         };
 713         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 714         actions[i].data1 = conf->vlan_vid;
 715         actions[i].data1 = actions[i].data1 << 16;
 716         resource->actions_num = ++i;
 717         return 0;
 718 }
 719
 720 /**
 721  * Convert modify-header set TP action to DV specification.
 722  *
 723  * @param[in,out] resource
 724  *   Pointer to the modify-header resource.
 725  * @param[in] action
 726  *   Pointer to action specification.
 727  * @param[in] items
 728  *   Pointer to rte_flow_item objects list.
 729  * @param[in] attr
 730  *   Pointer to flow attributes structure.
 731  * @param[in] dev_flow
 732  *   Pointer to the sub flow.
 733  * @param[in] tunnel_decap
 734  *   Whether action is after tunnel decapsulation.
 735  * @param[out] error
 736  *   Pointer to the error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_convert_action_modify_tp
 743                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 744                          const struct rte_flow_action *action,
 745                          const struct rte_flow_item *items,
 746                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 747                          bool tunnel_decap, struct rte_flow_error *error)
 748 {
 749         const struct rte_flow_action_set_tp *conf =
 750                 (const struct rte_flow_action_set_tp *)(action->conf);
 751         struct rte_flow_item item;
 752         struct rte_flow_item_udp udp;
 753         struct rte_flow_item_udp udp_mask;
 754         struct rte_flow_item_tcp tcp;
 755         struct rte_flow_item_tcp tcp_mask;
 756         struct field_modify_info *field;
 757
 758         if (!attr->valid)
 759                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 760         if (attr->udp) {
 761                 memset(&udp, 0, sizeof(udp));
 762                 memset(&udp_mask, 0, sizeof(udp_mask));
 763                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 764                         udp.hdr.src_port = conf->port;
 765                         udp_mask.hdr.src_port =
 766                                         rte_flow_item_udp_mask.hdr.src_port;
 767                 } else {
 768                         udp.hdr.dst_port = conf->port;
 769                         udp_mask.hdr.dst_port =
 770                                         rte_flow_item_udp_mask.hdr.dst_port;
 771                 }
 772                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 773                 item.spec = &udp;
 774                 item.mask = &udp_mask;
 775                 field = modify_udp;
 776         } else {
 777                 MLX5_ASSERT(attr->tcp);
 778                 memset(&tcp, 0, sizeof(tcp));
 779                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 780                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 781                         tcp.hdr.src_port = conf->port;
 782                         tcp_mask.hdr.src_port =
 783                                         rte_flow_item_tcp_mask.hdr.src_port;
 784                 } else {
 785                         tcp.hdr.dst_port = conf->port;
 786                         tcp_mask.hdr.dst_port =
 787                                         rte_flow_item_tcp_mask.hdr.dst_port;
 788                 }
 789                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 790                 item.spec = &tcp;
 791                 item.mask = &tcp_mask;
 792                 field = modify_tcp;
 793         }
 794         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 795                                              MLX5_MODIFICATION_TYPE_SET, error);
 796 }
 797
 798 /**
 799  * Convert modify-header set TTL action to DV specification.
 800  *
 801  * @param[in,out] resource
 802  *   Pointer to the modify-header resource.
 803  * @param[in] action
 804  *   Pointer to action specification.
 805  * @param[in] items
 806  *   Pointer to rte_flow_item objects list.
 807  * @param[in] attr
 808  *   Pointer to flow attributes structure.
 809  * @param[in] dev_flow
 810  *   Pointer to the sub flow.
 811  * @param[in] tunnel_decap
 812  *   Whether action is after tunnel decapsulation.
 813  * @param[out] error
 814  *   Pointer to the error structure.
 815  *
 816  * @return
 817  *   0 on success, a negative errno value otherwise and rte_errno is set.
 818  */
 819 static int
 820 flow_dv_convert_action_modify_ttl
 821                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 822                          const struct rte_flow_action *action,
 823                          const struct rte_flow_item *items,
 824                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 825                          bool tunnel_decap, struct rte_flow_error *error)
 826 {
 827         const struct rte_flow_action_set_ttl *conf =
 828                 (const struct rte_flow_action_set_ttl *)(action->conf);
 829         struct rte_flow_item item;
 830         struct rte_flow_item_ipv4 ipv4;
 831         struct rte_flow_item_ipv4 ipv4_mask;
 832         struct rte_flow_item_ipv6 ipv6;
 833         struct rte_flow_item_ipv6 ipv6_mask;
 834         struct field_modify_info *field;
 835
 836         if (!attr->valid)
 837                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 838         if (attr->ipv4) {
 839                 memset(&ipv4, 0, sizeof(ipv4));
 840                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 841                 ipv4.hdr.time_to_live = conf->ttl_value;
 842                 ipv4_mask.hdr.time_to_live = 0xFF;
 843                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 844                 item.spec = &ipv4;
 845                 item.mask = &ipv4_mask;
 846                 field = modify_ipv4;
 847         } else {
 848                 MLX5_ASSERT(attr->ipv6);
 849                 memset(&ipv6, 0, sizeof(ipv6));
 850                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 851                 ipv6.hdr.hop_limits = conf->ttl_value;
 852                 ipv6_mask.hdr.hop_limits = 0xFF;
 853                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 854                 item.spec = &ipv6;
 855                 item.mask = &ipv6_mask;
 856                 field = modify_ipv6;
 857         }
 858         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 859                                              MLX5_MODIFICATION_TYPE_SET, error);
 860 }
 861
 862 /**
 863  * Convert modify-header decrement TTL action to DV specification.
 864  *
 865  * @param[in,out] resource
 866  *   Pointer to the modify-header resource.
 867  * @param[in] action
 868  *   Pointer to action specification.
 869  * @param[in] items
 870  *   Pointer to rte_flow_item objects list.
 871  * @param[in] attr
 872  *   Pointer to flow attributes structure.
 873  * @param[in] dev_flow
 874  *   Pointer to the sub flow.
 875  * @param[in] tunnel_decap
 876  *   Whether action is after tunnel decapsulation.
 877  * @param[out] error
 878  *   Pointer to the error structure.
 879  *
 880  * @return
 881  *   0 on success, a negative errno value otherwise and rte_errno is set.
 882  */
 883 static int
 884 flow_dv_convert_action_modify_dec_ttl
 885                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 886                          const struct rte_flow_item *items,
 887                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 888                          bool tunnel_decap, struct rte_flow_error *error)
 889 {
 890         struct rte_flow_item item;
 891         struct rte_flow_item_ipv4 ipv4;
 892         struct rte_flow_item_ipv4 ipv4_mask;
 893         struct rte_flow_item_ipv6 ipv6;
 894         struct rte_flow_item_ipv6 ipv6_mask;
 895         struct field_modify_info *field;
 896
 897         if (!attr->valid)
 898                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 899         if (attr->ipv4) {
 900                 memset(&ipv4, 0, sizeof(ipv4));
 901                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 902                 ipv4.hdr.time_to_live = 0xFF;
 903                 ipv4_mask.hdr.time_to_live = 0xFF;
 904                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 905                 item.spec = &ipv4;
 906                 item.mask = &ipv4_mask;
 907                 field = modify_ipv4;
 908         } else {
 909                 MLX5_ASSERT(attr->ipv6);
 910                 memset(&ipv6, 0, sizeof(ipv6));
 911                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 912                 ipv6.hdr.hop_limits = 0xFF;
 913                 ipv6_mask.hdr.hop_limits = 0xFF;
 914                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 915                 item.spec = &ipv6;
 916                 item.mask = &ipv6_mask;
 917                 field = modify_ipv6;
 918         }
 919         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 920                                              MLX5_MODIFICATION_TYPE_ADD, error);
 921 }
 922
 923 /**
 924  * Convert modify-header increment/decrement TCP Sequence number
 925  * to DV specification.
 926  *
 927  * @param[in,out] resource
 928  *   Pointer to the modify-header resource.
 929  * @param[in] action
 930  *   Pointer to action specification.
 931  * @param[out] error
 932  *   Pointer to the error structure.
 933  *
 934  * @return
 935  *   0 on success, a negative errno value otherwise and rte_errno is set.
 936  */
 937 static int
 938 flow_dv_convert_action_modify_tcp_seq
 939                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 940                          const struct rte_flow_action *action,
 941                          struct rte_flow_error *error)
 942 {
 943         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 944         uint64_t value = rte_be_to_cpu_32(*conf);
 945         struct rte_flow_item item;
 946         struct rte_flow_item_tcp tcp;
 947         struct rte_flow_item_tcp tcp_mask;
 948
 949         memset(&tcp, 0, sizeof(tcp));
 950         memset(&tcp_mask, 0, sizeof(tcp_mask));
 951         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 952                 /*
 953                  * The HW has no decrement operation, only increment operation.
 954                  * To simulate decrement X from Y using increment operation
 955                  * we need to add UINT32_MAX X times to Y.
 956                  * Each adding of UINT32_MAX decrements Y by 1.
 957                  */
 958                 value *= UINT32_MAX;
 959         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 960         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 961         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 962         item.spec = &tcp;
 963         item.mask = &tcp_mask;
 964         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 965                                              MLX5_MODIFICATION_TYPE_ADD, error);
 966 }
 967
 968 /**
 969  * Convert modify-header increment/decrement TCP Acknowledgment number
 970  * to DV specification.
 971  *
 972  * @param[in,out] resource
 973  *   Pointer to the modify-header resource.
 974  * @param[in] action
 975  *   Pointer to action specification.
 976  * @param[out] error
 977  *   Pointer to the error structure.
 978  *
 979  * @return
 980  *   0 on success, a negative errno value otherwise and rte_errno is set.
 981  */
 982 static int
 983 flow_dv_convert_action_modify_tcp_ack
 984                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 985                          const struct rte_flow_action *action,
 986                          struct rte_flow_error *error)
 987 {
 988         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 989         uint64_t value = rte_be_to_cpu_32(*conf);
 990         struct rte_flow_item item;
 991         struct rte_flow_item_tcp tcp;
 992         struct rte_flow_item_tcp tcp_mask;
 993
 994         memset(&tcp, 0, sizeof(tcp));
 995         memset(&tcp_mask, 0, sizeof(tcp_mask));
 996         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 997                 /*
 998                  * The HW has no decrement operation, only increment operation.
 999                  * To simulate decrement X from Y using increment operation
1000                  * we need to add UINT32_MAX X times to Y.
1001                  * Each adding of UINT32_MAX decrements Y by 1.
1002                  */
1003                 value *= UINT32_MAX;
1004         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
1005         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
1006         item.type = RTE_FLOW_ITEM_TYPE_TCP;
1007         item.spec = &tcp;
1008         item.mask = &tcp_mask;
1009         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1010                                              MLX5_MODIFICATION_TYPE_ADD, error);
1011 }
1012
1013 static enum mlx5_modification_field reg_to_field[] = {
1014         [REG_NON] = MLX5_MODI_OUT_NONE,
1015         [REG_A] = MLX5_MODI_META_DATA_REG_A,
1016         [REG_B] = MLX5_MODI_META_DATA_REG_B,
1017         [REG_C_0] = MLX5_MODI_META_REG_C_0,
1018         [REG_C_1] = MLX5_MODI_META_REG_C_1,
1019         [REG_C_2] = MLX5_MODI_META_REG_C_2,
1020         [REG_C_3] = MLX5_MODI_META_REG_C_3,
1021         [REG_C_4] = MLX5_MODI_META_REG_C_4,
1022         [REG_C_5] = MLX5_MODI_META_REG_C_5,
1023         [REG_C_6] = MLX5_MODI_META_REG_C_6,
1024         [REG_C_7] = MLX5_MODI_META_REG_C_7,
1025 };
1026
1027 /**
1028  * Convert register set to DV specification.
1029  *
1030  * @param[in,out] resource
1031  *   Pointer to the modify-header resource.
1032  * @param[in] action
1033  *   Pointer to action specification.
1034  * @param[out] error
1035  *   Pointer to the error structure.
1036  *
1037  * @return
1038  *   0 on success, a negative errno value otherwise and rte_errno is set.
1039  */
1040 static int
1041 flow_dv_convert_action_set_reg
1042                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1043                          const struct rte_flow_action *action,
1044                          struct rte_flow_error *error)
1045 {
1046         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1047         struct mlx5_modification_cmd *actions = resource->actions;
1048         uint32_t i = resource->actions_num;
1049
1050         if (i >= MLX5_MAX_MODIFY_NUM)
1051                 return rte_flow_error_set(error, EINVAL,
1052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1053                                           "too many items to modify");
1054         MLX5_ASSERT(conf->id != REG_NON);
1055         MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1056         actions[i] = (struct mlx5_modification_cmd) {
1057                 .action_type = MLX5_MODIFICATION_TYPE_SET,
1058                 .field = reg_to_field[conf->id],
1059                 .offset = conf->offset,
1060                 .length = conf->length,
1061         };
1062         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1063         actions[i].data1 = rte_cpu_to_be_32(conf->data);
1064         ++i;
1065         resource->actions_num = i;
1066         return 0;
1067 }
1068
1069 /**
1070  * Convert SET_TAG action to DV specification.
1071  *
1072  * @param[in] dev
1073  *   Pointer to the rte_eth_dev structure.
1074  * @param[in,out] resource
1075  *   Pointer to the modify-header resource.
1076  * @param[in] conf
1077  *   Pointer to action specification.
1078  * @param[out] error
1079  *   Pointer to the error structure.
1080  *
1081  * @return
1082  *   0 on success, a negative errno value otherwise and rte_errno is set.
1083  */
1084 static int
1085 flow_dv_convert_action_set_tag
1086                         (struct rte_eth_dev *dev,
1087                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1088                          const struct rte_flow_action_set_tag *conf,
1089                          struct rte_flow_error *error)
1090 {
1091         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1092         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1093         struct rte_flow_item item = {
1094                 .spec = &data,
1095                 .mask = &mask,
1096         };
1097         struct field_modify_info reg_c_x[] = {
1098                 [1] = {0, 0, 0},
1099         };
1100         enum mlx5_modification_field reg_type;
1101         int ret;
1102
1103         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1104         if (ret < 0)
1105                 return ret;
1106         MLX5_ASSERT(ret != REG_NON);
1107         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1108         reg_type = reg_to_field[ret];
1109         MLX5_ASSERT(reg_type > 0);
1110         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1111         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1112                                              MLX5_MODIFICATION_TYPE_SET, error);
1113 }
1114
1115 /**
1116  * Convert internal COPY_REG action to DV specification.
1117  *
1118  * @param[in] dev
1119  *   Pointer to the rte_eth_dev structure.
1120  * @param[in,out] res
1121  *   Pointer to the modify-header resource.
1122  * @param[in] action
1123  *   Pointer to action specification.
1124  * @param[out] error
1125  *   Pointer to the error structure.
1126  *
1127  * @return
1128  *   0 on success, a negative errno value otherwise and rte_errno is set.
1129  */
1130 static int
1131 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1132                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1133                                  const struct rte_flow_action *action,
1134                                  struct rte_flow_error *error)
1135 {
1136         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1137         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1138         struct rte_flow_item item = {
1139                 .spec = NULL,
1140                 .mask = &mask,
1141         };
1142         struct field_modify_info reg_src[] = {
1143                 {4, 0, reg_to_field[conf->src]},
1144                 {0, 0, 0},
1145         };
1146         struct field_modify_info reg_dst = {
1147                 .offset = 0,
1148                 .id = reg_to_field[conf->dst],
1149         };
1150         /* Adjust reg_c[0] usage according to reported mask. */
1151         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1152                 struct mlx5_priv *priv = dev->data->dev_private;
1153                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1154
1155                 MLX5_ASSERT(reg_c0);
1156                 MLX5_ASSERT(priv->sh->config.dv_xmeta_en !=
1157                             MLX5_XMETA_MODE_LEGACY);
1158                 if (conf->dst == REG_C_0) {
1159                         /* Copy to reg_c[0], within mask only. */
1160                         reg_dst.offset = rte_bsf32(reg_c0);
1161                         mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1162                 } else {
1163                         reg_dst.offset = 0;
1164                         mask = rte_cpu_to_be_32(reg_c0);
1165                 }
1166         }
1167         return flow_dv_convert_modify_action(&item,
1168                                              reg_src, &reg_dst, res,
1169                                              MLX5_MODIFICATION_TYPE_COPY,
1170                                              error);
1171 }
1172
1173 /**
1174  * Convert MARK action to DV specification. This routine is used
1175  * in extensive metadata only and requires metadata register to be
1176  * handled. In legacy mode hardware tag resource is engaged.
1177  *
1178  * @param[in] dev
1179  *   Pointer to the rte_eth_dev structure.
1180  * @param[in] conf
1181  *   Pointer to MARK action specification.
1182  * @param[in,out] resource
1183  *   Pointer to the modify-header resource.
1184  * @param[out] error
1185  *   Pointer to the error structure.
1186  *
1187  * @return
1188  *   0 on success, a negative errno value otherwise and rte_errno is set.
1189  */
1190 static int
1191 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1192                             const struct rte_flow_action_mark *conf,
1193                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1194                             struct rte_flow_error *error)
1195 {
1196         struct mlx5_priv *priv = dev->data->dev_private;
1197         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1198                                            priv->sh->dv_mark_mask);
1199         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1200         struct rte_flow_item item = {
1201                 .spec = &data,
1202                 .mask = &mask,
1203         };
1204         struct field_modify_info reg_c_x[] = {
1205                 [1] = {0, 0, 0},
1206         };
1207         int reg;
1208
1209         if (!mask)
1210                 return rte_flow_error_set(error, EINVAL,
1211                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1212                                           NULL, "zero mark action mask");
1213         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1214         if (reg < 0)
1215                 return reg;
1216         MLX5_ASSERT(reg > 0);
1217         if (reg == REG_C_0) {
1218                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1219                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1220
1221                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1222                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1223                 mask = rte_cpu_to_be_32(mask << shl_c0);
1224         }
1225         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1226         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1227                                              MLX5_MODIFICATION_TYPE_SET, error);
1228 }
1229
1230 /**
1231  * Get metadata register index for specified steering domain.
1232  *
1233  * @param[in] dev
1234  *   Pointer to the rte_eth_dev structure.
1235  * @param[in] attr
1236  *   Attributes of flow to determine steering domain.
1237  * @param[out] error
1238  *   Pointer to the error structure.
1239  *
1240  * @return
1241  *   positive index on success, a negative errno value otherwise
1242  *   and rte_errno is set.
1243  */
1244 static enum modify_reg
1245 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1246                          const struct rte_flow_attr *attr,
1247                          struct rte_flow_error *error)
1248 {
1249         int reg =
1250                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1251                                           MLX5_METADATA_FDB :
1252                                             attr->egress ?
1253                                             MLX5_METADATA_TX :
1254                                             MLX5_METADATA_RX, 0, error);
1255         if (reg < 0)
1256                 return rte_flow_error_set(error,
1257                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1258                                           NULL, "unavailable "
1259                                           "metadata register");
1260         return reg;
1261 }
1262
1263 /**
1264  * Convert SET_META action to DV specification.
1265  *
1266  * @param[in] dev
1267  *   Pointer to the rte_eth_dev structure.
1268  * @param[in,out] resource
1269  *   Pointer to the modify-header resource.
1270  * @param[in] attr
1271  *   Attributes of flow that includes this item.
1272  * @param[in] conf
1273  *   Pointer to action specification.
1274  * @param[out] error
1275  *   Pointer to the error structure.
1276  *
1277  * @return
1278  *   0 on success, a negative errno value otherwise and rte_errno is set.
1279  */
1280 static int
1281 flow_dv_convert_action_set_meta
1282                         (struct rte_eth_dev *dev,
1283                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1284                          const struct rte_flow_attr *attr,
1285                          const struct rte_flow_action_set_meta *conf,
1286                          struct rte_flow_error *error)
1287 {
1288         uint32_t mask = rte_cpu_to_be_32(conf->mask);
1289         uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1290         struct rte_flow_item item = {
1291                 .spec = &data,
1292                 .mask = &mask,
1293         };
1294         struct field_modify_info reg_c_x[] = {
1295                 [1] = {0, 0, 0},
1296         };
1297         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1298
1299         if (reg < 0)
1300                 return reg;
1301         MLX5_ASSERT(reg != REG_NON);
1302         if (reg == REG_C_0) {
1303                 struct mlx5_priv *priv = dev->data->dev_private;
1304                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1305                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1306
1307                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1308                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1309                 mask = rte_cpu_to_be_32(mask << shl_c0);
1310         }
1311         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1312         /* The routine expects parameters in memory as big-endian ones. */
1313         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1314                                              MLX5_MODIFICATION_TYPE_SET, error);
1315 }
1316
1317 /**
1318  * Convert modify-header set IPv4 DSCP action to DV specification.
1319  *
1320  * @param[in,out] resource
1321  *   Pointer to the modify-header resource.
1322  * @param[in] action
1323  *   Pointer to action specification.
1324  * @param[out] error
1325  *   Pointer to the error structure.
1326  *
1327  * @return
1328  *   0 on success, a negative errno value otherwise and rte_errno is set.
1329  */
1330 static int
1331 flow_dv_convert_action_modify_ipv4_dscp
1332                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1333                          const struct rte_flow_action *action,
1334                          struct rte_flow_error *error)
1335 {
1336         const struct rte_flow_action_set_dscp *conf =
1337                 (const struct rte_flow_action_set_dscp *)(action->conf);
1338         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1339         struct rte_flow_item_ipv4 ipv4;
1340         struct rte_flow_item_ipv4 ipv4_mask;
1341
1342         memset(&ipv4, 0, sizeof(ipv4));
1343         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1344         ipv4.hdr.type_of_service = conf->dscp;
1345         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1346         item.spec = &ipv4;
1347         item.mask = &ipv4_mask;
1348         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1349                                              MLX5_MODIFICATION_TYPE_SET, error);
1350 }
1351
1352 /**
1353  * Convert modify-header set IPv6 DSCP action to DV specification.
1354  *
1355  * @param[in,out] resource
1356  *   Pointer to the modify-header resource.
1357  * @param[in] action
1358  *   Pointer to action specification.
1359  * @param[out] error
1360  *   Pointer to the error structure.
1361  *
1362  * @return
1363  *   0 on success, a negative errno value otherwise and rte_errno is set.
1364  */
1365 static int
1366 flow_dv_convert_action_modify_ipv6_dscp
1367                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1368                          const struct rte_flow_action *action,
1369                          struct rte_flow_error *error)
1370 {
1371         const struct rte_flow_action_set_dscp *conf =
1372                 (const struct rte_flow_action_set_dscp *)(action->conf);
1373         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1374         struct rte_flow_item_ipv6 ipv6;
1375         struct rte_flow_item_ipv6 ipv6_mask;
1376
1377         memset(&ipv6, 0, sizeof(ipv6));
1378         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1379         /*
1380          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1381          * rdma-core only accept the DSCP bits byte aligned start from
1382          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1383          * bits in IPv6 case as rdma-core requires byte aligned value.
1384          */
1385         ipv6.hdr.vtc_flow = conf->dscp;
1386         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1387         item.spec = &ipv6;
1388         item.mask = &ipv6_mask;
1389         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1390                                              MLX5_MODIFICATION_TYPE_SET, error);
1391 }
1392
1393 static int
1394 mlx5_flow_item_field_width(struct rte_eth_dev *dev,
1395                            enum rte_flow_field_id field, int inherit,
1396                            const struct rte_flow_attr *attr,
1397                            struct rte_flow_error *error)
1398 {
1399         struct mlx5_priv *priv = dev->data->dev_private;
1400
1401         switch (field) {
1402         case RTE_FLOW_FIELD_START:
1403                 return 32;
1404         case RTE_FLOW_FIELD_MAC_DST:
1405         case RTE_FLOW_FIELD_MAC_SRC:
1406                 return 48;
1407         case RTE_FLOW_FIELD_VLAN_TYPE:
1408                 return 16;
1409         case RTE_FLOW_FIELD_VLAN_ID:
1410                 return 12;
1411         case RTE_FLOW_FIELD_MAC_TYPE:
1412                 return 16;
1413         case RTE_FLOW_FIELD_IPV4_DSCP:
1414                 return 6;
1415         case RTE_FLOW_FIELD_IPV4_TTL:
1416                 return 8;
1417         case RTE_FLOW_FIELD_IPV4_SRC:
1418         case RTE_FLOW_FIELD_IPV4_DST:
1419                 return 32;
1420         case RTE_FLOW_FIELD_IPV6_DSCP:
1421                 return 6;
1422         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1423                 return 8;
1424         case RTE_FLOW_FIELD_IPV6_SRC:
1425         case RTE_FLOW_FIELD_IPV6_DST:
1426                 return 128;
1427         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1428         case RTE_FLOW_FIELD_TCP_PORT_DST:
1429                 return 16;
1430         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1431         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1432                 return 32;
1433         case RTE_FLOW_FIELD_TCP_FLAGS:
1434                 return 9;
1435         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1436         case RTE_FLOW_FIELD_UDP_PORT_DST:
1437                 return 16;
1438         case RTE_FLOW_FIELD_VXLAN_VNI:
1439         case RTE_FLOW_FIELD_GENEVE_VNI:
1440                 return 24;
1441         case RTE_FLOW_FIELD_GTP_TEID:
1442         case RTE_FLOW_FIELD_TAG:
1443                 return 32;
1444         case RTE_FLOW_FIELD_MARK:
1445                 return __builtin_popcount(priv->sh->dv_mark_mask);
1446         case RTE_FLOW_FIELD_META:
1447                 return (flow_dv_get_metadata_reg(dev, attr, error) == REG_C_0) ?
1448                         __builtin_popcount(priv->sh->dv_meta_mask) : 32;
1449         case RTE_FLOW_FIELD_POINTER:
1450         case RTE_FLOW_FIELD_VALUE:
1451                 return inherit < 0 ? 0 : inherit;
1452         default:
1453                 MLX5_ASSERT(false);
1454         }
1455         return 0;
1456 }
1457
1458 static void
1459 mlx5_flow_field_id_to_modify_info
1460                 (const struct rte_flow_action_modify_data *data,
1461                  struct field_modify_info *info, uint32_t *mask,
1462                  uint32_t width, struct rte_eth_dev *dev,
1463                  const struct rte_flow_attr *attr, struct rte_flow_error *error)
1464 {
1465         struct mlx5_priv *priv = dev->data->dev_private;
1466         uint32_t idx = 0;
1467         uint32_t off = 0;
1468
1469         switch (data->field) {
1470         case RTE_FLOW_FIELD_START:
1471                 /* not supported yet */
1472                 MLX5_ASSERT(false);
1473                 break;
1474         case RTE_FLOW_FIELD_MAC_DST:
1475                 off = data->offset > 16 ? data->offset - 16 : 0;
1476                 if (mask) {
1477                         if (data->offset < 16) {
1478                                 info[idx] = (struct field_modify_info){2, 4,
1479                                                 MLX5_MODI_OUT_DMAC_15_0};
1480                                 if (width < 16) {
1481                                         mask[1] = rte_cpu_to_be_16(0xffff >>
1482                                                                  (16 - width));
1483                                         width = 0;
1484                                 } else {
1485                                         mask[1] = RTE_BE16(0xffff);
1486                                         width -= 16;
1487                                 }
1488                                 if (!width)
1489                                         break;
1490                                 ++idx;
1491                         }
1492                         info[idx] = (struct field_modify_info){4, 0,
1493                                                 MLX5_MODI_OUT_DMAC_47_16};
1494                         mask[0] = rte_cpu_to_be_32((0xffffffff >>
1495                                                     (32 - width)) << off);
1496                 } else {
1497                         if (data->offset < 16)
1498                                 info[idx++] = (struct field_modify_info){2, 0,
1499                                                 MLX5_MODI_OUT_DMAC_15_0};
1500                         info[idx] = (struct field_modify_info){4, off,
1501                                                 MLX5_MODI_OUT_DMAC_47_16};
1502                 }
1503                 break;
1504         case RTE_FLOW_FIELD_MAC_SRC:
1505                 off = data->offset > 16 ? data->offset - 16 : 0;
1506                 if (mask) {
1507                         if (data->offset < 16) {
1508                                 info[idx] = (struct field_modify_info){2, 4,
1509                                                 MLX5_MODI_OUT_SMAC_15_0};
1510                                 if (width < 16) {
1511                                         mask[1] = rte_cpu_to_be_16(0xffff >>
1512                                                                  (16 - width));
1513                                         width = 0;
1514                                 } else {
1515                                         mask[1] = RTE_BE16(0xffff);
1516                                         width -= 16;
1517                                 }
1518                                 if (!width)
1519                                         break;
1520                                 ++idx;
1521                         }
1522                         info[idx] = (struct field_modify_info){4, 0,
1523                                                 MLX5_MODI_OUT_SMAC_47_16};
1524                         mask[0] = rte_cpu_to_be_32((0xffffffff >>
1525                                                     (32 - width)) << off);
1526                 } else {
1527                         if (data->offset < 16)
1528                                 info[idx++] = (struct field_modify_info){2, 0,
1529                                                 MLX5_MODI_OUT_SMAC_15_0};
1530                         info[idx] = (struct field_modify_info){4, off,
1531                                                 MLX5_MODI_OUT_SMAC_47_16};
1532                 }
1533                 break;
1534         case RTE_FLOW_FIELD_VLAN_TYPE:
1535                 /* not supported yet */
1536                 break;
1537         case RTE_FLOW_FIELD_VLAN_ID:
1538                 info[idx] = (struct field_modify_info){2, 0,
1539                                         MLX5_MODI_OUT_FIRST_VID};
1540                 if (mask)
1541                         mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1542                 break;
1543         case RTE_FLOW_FIELD_MAC_TYPE:
1544                 info[idx] = (struct field_modify_info){2, 0,
1545                                         MLX5_MODI_OUT_ETHERTYPE};
1546                 if (mask)
1547                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1548                 break;
1549         case RTE_FLOW_FIELD_IPV4_DSCP:
1550                 info[idx] = (struct field_modify_info){1, 0,
1551                                         MLX5_MODI_OUT_IP_DSCP};
1552                 if (mask)
1553                         mask[idx] = 0x3f >> (6 - width);
1554                 break;
1555         case RTE_FLOW_FIELD_IPV4_TTL:
1556                 info[idx] = (struct field_modify_info){1, 0,
1557                                         MLX5_MODI_OUT_IPV4_TTL};
1558                 if (mask)
1559                         mask[idx] = 0xff >> (8 - width);
1560                 break;
1561         case RTE_FLOW_FIELD_IPV4_SRC:
1562                 info[idx] = (struct field_modify_info){4, 0,
1563                                         MLX5_MODI_OUT_SIPV4};
1564                 if (mask)
1565                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1566                                                      (32 - width));
1567                 break;
1568         case RTE_FLOW_FIELD_IPV4_DST:
1569                 info[idx] = (struct field_modify_info){4, 0,
1570                                         MLX5_MODI_OUT_DIPV4};
1571                 if (mask)
1572                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1573                                                      (32 - width));
1574                 break;
1575         case RTE_FLOW_FIELD_IPV6_DSCP:
1576                 info[idx] = (struct field_modify_info){1, 0,
1577                                         MLX5_MODI_OUT_IP_DSCP};
1578                 if (mask)
1579                         mask[idx] = 0x3f >> (6 - width);
1580                 break;
1581         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1582                 info[idx] = (struct field_modify_info){1, 0,
1583                                         MLX5_MODI_OUT_IPV6_HOPLIMIT};
1584                 if (mask)
1585                         mask[idx] = 0xff >> (8 - width);
1586                 break;
1587         case RTE_FLOW_FIELD_IPV6_SRC:
1588                 if (mask) {
1589                         if (data->offset < 32) {
1590                                 info[idx] = (struct field_modify_info){4, 12,
1591                                                 MLX5_MODI_OUT_SIPV6_31_0};
1592                                 if (width < 32) {
1593                                         mask[3] =
1594                                                 rte_cpu_to_be_32(0xffffffff >>
1595                                                                  (32 - width));
1596                                         width = 0;
1597                                 } else {
1598                                         mask[3] = RTE_BE32(0xffffffff);
1599                                         width -= 32;
1600                                 }
1601                                 if (!width)
1602                                         break;
1603                                 ++idx;
1604                         }
1605                         if (data->offset < 64) {
1606                                 info[idx] = (struct field_modify_info){4, 8,
1607                                                 MLX5_MODI_OUT_SIPV6_63_32};
1608                                 if (width < 32) {
1609                                         mask[2] =
1610                                                 rte_cpu_to_be_32(0xffffffff >>
1611                                                                  (32 - width));
1612                                         width = 0;
1613                                 } else {
1614                                         mask[2] = RTE_BE32(0xffffffff);
1615                                         width -= 32;
1616                                 }
1617                                 if (!width)
1618                                         break;
1619                                 ++idx;
1620                         }
1621                         if (data->offset < 96) {
1622                                 info[idx] = (struct field_modify_info){4, 4,
1623                                                 MLX5_MODI_OUT_SIPV6_95_64};
1624                                 if (width < 32) {
1625                                         mask[1] =
1626                                                 rte_cpu_to_be_32(0xffffffff >>
1627                                                                  (32 - width));
1628                                         width = 0;
1629                                 } else {
1630                                         mask[1] = RTE_BE32(0xffffffff);
1631                                         width -= 32;
1632                                 }
1633                                 if (!width)
1634                                         break;
1635                                 ++idx;
1636                         }
1637                         info[idx] = (struct field_modify_info){4, 0,
1638                                                 MLX5_MODI_OUT_SIPV6_127_96};
1639                         mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1640                 } else {
1641                         if (data->offset < 32)
1642                                 info[idx++] = (struct field_modify_info){4, 0,
1643                                                 MLX5_MODI_OUT_SIPV6_31_0};
1644                         if (data->offset < 64)
1645                                 info[idx++] = (struct field_modify_info){4, 0,
1646                                                 MLX5_MODI_OUT_SIPV6_63_32};
1647                         if (data->offset < 96)
1648                                 info[idx++] = (struct field_modify_info){4, 0,
1649                                                 MLX5_MODI_OUT_SIPV6_95_64};
1650                         if (data->offset < 128)
1651                                 info[idx++] = (struct field_modify_info){4, 0,
1652                                                 MLX5_MODI_OUT_SIPV6_127_96};
1653                 }
1654                 break;
1655         case RTE_FLOW_FIELD_IPV6_DST:
1656                 if (mask) {
1657                         if (data->offset < 32) {
1658                                 info[idx] = (struct field_modify_info){4, 12,
1659                                                 MLX5_MODI_OUT_DIPV6_31_0};
1660                                 if (width < 32) {
1661                                         mask[3] =
1662                                                 rte_cpu_to_be_32(0xffffffff >>
1663                                                                  (32 - width));
1664                                         width = 0;
1665                                 } else {
1666                                         mask[3] = RTE_BE32(0xffffffff);
1667                                         width -= 32;
1668                                 }
1669                                 if (!width)
1670                                         break;
1671                                 ++idx;
1672                         }
1673                         if (data->offset < 64) {
1674                                 info[idx] = (struct field_modify_info){4, 8,
1675                                                 MLX5_MODI_OUT_DIPV6_63_32};
1676                                 if (width < 32) {
1677                                         mask[2] =
1678                                                 rte_cpu_to_be_32(0xffffffff >>
1679                                                                  (32 - width));
1680                                         width = 0;
1681                                 } else {
1682                                         mask[2] = RTE_BE32(0xffffffff);
1683                                         width -= 32;
1684                                 }
1685                                 if (!width)
1686                                         break;
1687                                 ++idx;
1688                         }
1689                         if (data->offset < 96) {
1690                                 info[idx] = (struct field_modify_info){4, 4,
1691                                                 MLX5_MODI_OUT_DIPV6_95_64};
1692                                 if (width < 32) {
1693                                         mask[1] =
1694                                                 rte_cpu_to_be_32(0xffffffff >>
1695                                                                  (32 - width));
1696                                         width = 0;
1697                                 } else {
1698                                         mask[1] = RTE_BE32(0xffffffff);
1699                                         width -= 32;
1700                                 }
1701                                 if (!width)
1702                                         break;
1703                                 ++idx;
1704                         }
1705                         info[idx] = (struct field_modify_info){4, 0,
1706                                                 MLX5_MODI_OUT_DIPV6_127_96};
1707                         mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1708                 } else {
1709                         if (data->offset < 32)
1710                                 info[idx++] = (struct field_modify_info){4, 0,
1711                                                 MLX5_MODI_OUT_DIPV6_31_0};
1712                         if (data->offset < 64)
1713                                 info[idx++] = (struct field_modify_info){4, 0,
1714                                                 MLX5_MODI_OUT_DIPV6_63_32};
1715                         if (data->offset < 96)
1716                                 info[idx++] = (struct field_modify_info){4, 0,
1717                                                 MLX5_MODI_OUT_DIPV6_95_64};
1718                         if (data->offset < 128)
1719                                 info[idx++] = (struct field_modify_info){4, 0,
1720                                                 MLX5_MODI_OUT_DIPV6_127_96};
1721                 }
1722                 break;
1723         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1724                 info[idx] = (struct field_modify_info){2, 0,
1725                                         MLX5_MODI_OUT_TCP_SPORT};
1726                 if (mask)
1727                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1728                 break;
1729         case RTE_FLOW_FIELD_TCP_PORT_DST:
1730                 info[idx] = (struct field_modify_info){2, 0,
1731                                         MLX5_MODI_OUT_TCP_DPORT};
1732                 if (mask)
1733                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1734                 break;
1735         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1736                 info[idx] = (struct field_modify_info){4, 0,
1737                                         MLX5_MODI_OUT_TCP_SEQ_NUM};
1738                 if (mask)
1739                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1740                                                      (32 - width));
1741                 break;
1742         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1743                 info[idx] = (struct field_modify_info){4, 0,
1744                                         MLX5_MODI_OUT_TCP_ACK_NUM};
1745                 if (mask)
1746                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1747                                                      (32 - width));
1748                 break;
1749         case RTE_FLOW_FIELD_TCP_FLAGS:
1750                 info[idx] = (struct field_modify_info){2, 0,
1751                                         MLX5_MODI_OUT_TCP_FLAGS};
1752                 if (mask)
1753                         mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1754                 break;
1755         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1756                 info[idx] = (struct field_modify_info){2, 0,
1757                                         MLX5_MODI_OUT_UDP_SPORT};
1758                 if (mask)
1759                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1760                 break;
1761         case RTE_FLOW_FIELD_UDP_PORT_DST:
1762                 info[idx] = (struct field_modify_info){2, 0,
1763                                         MLX5_MODI_OUT_UDP_DPORT};
1764                 if (mask)
1765                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1766                 break;
1767         case RTE_FLOW_FIELD_VXLAN_VNI:
1768                 /* not supported yet */
1769                 break;
1770         case RTE_FLOW_FIELD_GENEVE_VNI:
1771                 /* not supported yet*/
1772                 break;
1773         case RTE_FLOW_FIELD_GTP_TEID:
1774                 info[idx] = (struct field_modify_info){4, 0,
1775                                         MLX5_MODI_GTP_TEID};
1776                 if (mask)
1777                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1778                                                      (32 - width));
1779                 break;
1780         case RTE_FLOW_FIELD_TAG:
1781                 {
1782                         int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1783                                                    data->level, error);
1784                         if (reg < 0)
1785                                 return;
1786                         MLX5_ASSERT(reg != REG_NON);
1787                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1788                         info[idx] = (struct field_modify_info){4, 0,
1789                                                 reg_to_field[reg]};
1790                         if (mask)
1791                                 mask[idx] =
1792                                         rte_cpu_to_be_32(0xffffffff >>
1793                                                          (32 - width));
1794                 }
1795                 break;
1796         case RTE_FLOW_FIELD_MARK:
1797                 {
1798                         uint32_t mark_mask = priv->sh->dv_mark_mask;
1799                         uint32_t mark_count = __builtin_popcount(mark_mask);
1800                         int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1801                                                        0, error);
1802                         if (reg < 0)
1803                                 return;
1804                         MLX5_ASSERT(reg != REG_NON);
1805                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1806                         info[idx] = (struct field_modify_info){4, 0,
1807                                                 reg_to_field[reg]};
1808                         if (mask)
1809                                 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1810                                          (mark_count - width)) & mark_mask);
1811                 }
1812                 break;
1813         case RTE_FLOW_FIELD_META:
1814                 {
1815                         uint32_t meta_mask = priv->sh->dv_meta_mask;
1816                         uint32_t meta_count = __builtin_popcount(meta_mask);
1817                         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1818                         if (reg < 0)
1819                                 return;
1820                         MLX5_ASSERT(reg != REG_NON);
1821                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1822                         info[idx] = (struct field_modify_info){4, 0,
1823                                                 reg_to_field[reg]};
1824                         if (mask)
1825                                 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1826                                         (meta_count - width)) & meta_mask);
1827                 }
1828                 break;
1829         case RTE_FLOW_FIELD_POINTER:
1830         case RTE_FLOW_FIELD_VALUE:
1831         default:
1832                 MLX5_ASSERT(false);
1833                 break;
1834         }
1835 }
1836
1837 /**
1838  * Convert modify_field action to DV specification.
1839  *
1840  * @param[in] dev
1841  *   Pointer to the rte_eth_dev structure.
1842  * @param[in,out] resource
1843  *   Pointer to the modify-header resource.
1844  * @param[in] action
1845  *   Pointer to action specification.
1846  * @param[in] attr
1847  *   Attributes of flow that includes this item.
1848  * @param[out] error
1849  *   Pointer to the error structure.
1850  *
1851  * @return
1852  *   0 on success, a negative errno value otherwise and rte_errno is set.
1853  */
1854 static int
1855 flow_dv_convert_action_modify_field
1856                         (struct rte_eth_dev *dev,
1857                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1858                          const struct rte_flow_action *action,
1859                          const struct rte_flow_attr *attr,
1860                          struct rte_flow_error *error)
1861 {
1862         const struct rte_flow_action_modify_field *conf =
1863                 (const struct rte_flow_action_modify_field *)(action->conf);
1864         struct rte_flow_item item = {
1865                 .spec = NULL,
1866                 .mask = NULL
1867         };
1868         struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1869                                                                 {0, 0, 0} };
1870         struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1871                                                                 {0, 0, 0} };
1872         uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1873         uint32_t type, meta = 0;
1874
1875         if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1876             conf->src.field == RTE_FLOW_FIELD_VALUE) {
1877                 type = MLX5_MODIFICATION_TYPE_SET;
1878                 /** For SET fill the destination field (field) first. */
1879                 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1880                                                   conf->width, dev,
1881                                                   attr, error);
1882                 item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?
1883                                         (void *)(uintptr_t)conf->src.pvalue :
1884                                         (void *)(uintptr_t)&conf->src.value;
1885                 if (conf->dst.field == RTE_FLOW_FIELD_META) {
1886                         meta = *(const unaligned_uint32_t *)item.spec;
1887                         meta = rte_cpu_to_be_32(meta);
1888                         item.spec = &meta;
1889                 }
1890         } else {
1891                 type = MLX5_MODIFICATION_TYPE_COPY;
1892                 /** For COPY fill the destination field (dcopy) without mask. */
1893                 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1894                                                   conf->width, dev,
1895                                                   attr, error);
1896                 /** Then construct the source field (field) with mask. */
1897                 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1898                                                   conf->width, dev,
1899                                                   attr, error);
1900         }
1901         item.mask = &mask;
1902         return flow_dv_convert_modify_action(&item,
1903                         field, dcopy, resource, type, error);
1904 }
1905
1906 /**
1907  * Validate MARK item.
1908  *
1909  * @param[in] dev
1910  *   Pointer to the rte_eth_dev structure.
1911  * @param[in] item
1912  *   Item specification.
1913  * @param[in] attr
1914  *   Attributes of flow that includes this item.
1915  * @param[out] error
1916  *   Pointer to error structure.
1917  *
1918  * @return
1919  *   0 on success, a negative errno value otherwise and rte_errno is set.
1920  */
1921 static int
1922 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1923                            const struct rte_flow_item *item,
1924                            const struct rte_flow_attr *attr __rte_unused,
1925                            struct rte_flow_error *error)
1926 {
1927         struct mlx5_priv *priv = dev->data->dev_private;
1928         struct mlx5_sh_config *config = &priv->sh->config;
1929         const struct rte_flow_item_mark *spec = item->spec;
1930         const struct rte_flow_item_mark *mask = item->mask;
1931         const struct rte_flow_item_mark nic_mask = {
1932                 .id = priv->sh->dv_mark_mask,
1933         };
1934         int ret;
1935
1936         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1937                 return rte_flow_error_set(error, ENOTSUP,
1938                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1939                                           "extended metadata feature"
1940                                           " isn't enabled");
1941         if (!mlx5_flow_ext_mreg_supported(dev))
1942                 return rte_flow_error_set(error, ENOTSUP,
1943                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1944                                           "extended metadata register"
1945                                           " isn't supported");
1946         if (!nic_mask.id)
1947                 return rte_flow_error_set(error, ENOTSUP,
1948                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1949                                           "extended metadata register"
1950                                           " isn't available");
1951         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1952         if (ret < 0)
1953                 return ret;
1954         if (!spec)
1955                 return rte_flow_error_set(error, EINVAL,
1956                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1957                                           item->spec,
1958                                           "data cannot be empty");
1959         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1960                 return rte_flow_error_set(error, EINVAL,
1961                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1962                                           &spec->id,
1963                                           "mark id exceeds the limit");
1964         if (!mask)
1965                 mask = &nic_mask;
1966         if (!mask->id)
1967                 return rte_flow_error_set(error, EINVAL,
1968                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1969                                         "mask cannot be zero");
1970
1971         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1972                                         (const uint8_t *)&nic_mask,
1973                                         sizeof(struct rte_flow_item_mark),
1974                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1975         if (ret < 0)
1976                 return ret;
1977         return 0;
1978 }
1979
1980 /**
1981  * Validate META item.
1982  *
1983  * @param[in] dev
1984  *   Pointer to the rte_eth_dev structure.
1985  * @param[in] item
1986  *   Item specification.
1987  * @param[in] attr
1988  *   Attributes of flow that includes this item.
1989  * @param[out] error
1990  *   Pointer to error structure.
1991  *
1992  * @return
1993  *   0 on success, a negative errno value otherwise and rte_errno is set.
1994  */
1995 static int
1996 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1997                            const struct rte_flow_item *item,
1998                            const struct rte_flow_attr *attr,
1999                            struct rte_flow_error *error)
2000 {
2001         struct mlx5_priv *priv = dev->data->dev_private;
2002         struct mlx5_sh_config *config = &priv->sh->config;
2003         const struct rte_flow_item_meta *spec = item->spec;
2004         const struct rte_flow_item_meta *mask = item->mask;
2005         struct rte_flow_item_meta nic_mask = {
2006                 .data = UINT32_MAX
2007         };
2008         int reg;
2009         int ret;
2010
2011         if (!spec)
2012                 return rte_flow_error_set(error, EINVAL,
2013                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2014                                           item->spec,
2015                                           "data cannot be empty");
2016         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2017                 if (!mlx5_flow_ext_mreg_supported(dev))
2018                         return rte_flow_error_set(error, ENOTSUP,
2019                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2020                                           "extended metadata register"
2021                                           " isn't supported");
2022                 reg = flow_dv_get_metadata_reg(dev, attr, error);
2023                 if (reg < 0)
2024                         return reg;
2025                 if (reg == REG_NON)
2026                         return rte_flow_error_set(error, ENOTSUP,
2027                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2028                                         "unavailable extended metadata register");
2029                 if (reg == REG_B)
2030                         return rte_flow_error_set(error, ENOTSUP,
2031                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2032                                           "match on reg_b "
2033                                           "isn't supported");
2034                 if (reg != REG_A)
2035                         nic_mask.data = priv->sh->dv_meta_mask;
2036         } else {
2037                 if (attr->transfer)
2038                         return rte_flow_error_set(error, ENOTSUP,
2039                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2040                                         "extended metadata feature "
2041                                         "should be enabled when "
2042                                         "meta item is requested "
2043                                         "with e-switch mode ");
2044                 if (attr->ingress)
2045                         return rte_flow_error_set(error, ENOTSUP,
2046                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2047                                         "match on metadata for ingress "
2048                                         "is not supported in legacy "
2049                                         "metadata mode");
2050         }
2051         if (!mask)
2052                 mask = &rte_flow_item_meta_mask;
2053         if (!mask->data)
2054                 return rte_flow_error_set(error, EINVAL,
2055                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2056                                         "mask cannot be zero");
2057
2058         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2059                                         (const uint8_t *)&nic_mask,
2060                                         sizeof(struct rte_flow_item_meta),
2061                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2062         return ret;
2063 }
2064
2065 /**
2066  * Validate TAG item.
2067  *
2068  * @param[in] dev
2069  *   Pointer to the rte_eth_dev structure.
2070  * @param[in] item
2071  *   Item specification.
2072  * @param[in] attr
2073  *   Attributes of flow that includes this item.
2074  * @param[out] error
2075  *   Pointer to error structure.
2076  *
2077  * @return
2078  *   0 on success, a negative errno value otherwise and rte_errno is set.
2079  */
2080 static int
2081 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2082                           const struct rte_flow_item *item,
2083                           const struct rte_flow_attr *attr __rte_unused,
2084                           struct rte_flow_error *error)
2085 {
2086         const struct rte_flow_item_tag *spec = item->spec;
2087         const struct rte_flow_item_tag *mask = item->mask;
2088         const struct rte_flow_item_tag nic_mask = {
2089                 .data = RTE_BE32(UINT32_MAX),
2090                 .index = 0xff,
2091         };
2092         int ret;
2093
2094         if (!mlx5_flow_ext_mreg_supported(dev))
2095                 return rte_flow_error_set(error, ENOTSUP,
2096                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2097                                           "extensive metadata register"
2098                                           " isn't supported");
2099         if (!spec)
2100                 return rte_flow_error_set(error, EINVAL,
2101                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2102                                           item->spec,
2103                                           "data cannot be empty");
2104         if (!mask)
2105                 mask = &rte_flow_item_tag_mask;
2106         if (!mask->data)
2107                 return rte_flow_error_set(error, EINVAL,
2108                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2109                                         "mask cannot be zero");
2110
2111         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2112                                         (const uint8_t *)&nic_mask,
2113                                         sizeof(struct rte_flow_item_tag),
2114                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2115         if (ret < 0)
2116                 return ret;
2117         if (mask->index != 0xff)
2118                 return rte_flow_error_set(error, EINVAL,
2119                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2120                                           "partial mask for tag index"
2121                                           " is not supported");
2122         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2123         if (ret < 0)
2124                 return ret;
2125         MLX5_ASSERT(ret != REG_NON);
2126         return 0;
2127 }
2128
2129 /**
2130  * Validate vport item.
2131  *
2132  * @param[in] dev
2133  *   Pointer to the rte_eth_dev structure.
2134  * @param[in] item
2135  *   Item specification.
2136  * @param[in] attr
2137  *   Attributes of flow that includes this item.
2138  * @param[in] item_flags
2139  *   Bit-fields that holds the items detected until now.
2140  * @param[out] error
2141  *   Pointer to error structure.
2142  *
2143  * @return
2144  *   0 on success, a negative errno value otherwise and rte_errno is set.
2145  */
2146 static int
2147 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2148                               const struct rte_flow_item *item,
2149                               const struct rte_flow_attr *attr,
2150                               uint64_t item_flags,
2151                               struct rte_flow_error *error)
2152 {
2153         const struct rte_flow_item_port_id *spec = item->spec;
2154         const struct rte_flow_item_port_id *mask = item->mask;
2155         const struct rte_flow_item_port_id switch_mask = {
2156                         .id = 0xffffffff,
2157         };
2158         struct mlx5_priv *esw_priv;
2159         struct mlx5_priv *dev_priv;
2160         int ret;
2161
2162         if (!attr->transfer)
2163                 return rte_flow_error_set(error, EINVAL,
2164                                           RTE_FLOW_ERROR_TYPE_ITEM,
2165                                           NULL,
2166                                           "match on port id is valid only"
2167                                           " when transfer flag is enabled");
2168         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2169                 return rte_flow_error_set(error, ENOTSUP,
2170                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2171                                           "multiple source ports are not"
2172                                           " supported");
2173         if (!mask)
2174                 mask = &switch_mask;
2175         if (mask->id != 0xffffffff)
2176                 return rte_flow_error_set(error, ENOTSUP,
2177                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2178                                            mask,
2179                                            "no support for partial mask on"
2180                                            " \"id\" field");
2181         ret = mlx5_flow_item_acceptable
2182                                 (item, (const uint8_t *)mask,
2183                                  (const uint8_t *)&rte_flow_item_port_id_mask,
2184                                  sizeof(struct rte_flow_item_port_id),
2185                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2186         if (ret)
2187                 return ret;
2188         if (!spec)
2189                 return 0;
2190         if (spec->id == MLX5_PORT_ESW_MGR)
2191                 return 0;
2192         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2193         if (!esw_priv)
2194                 return rte_flow_error_set(error, rte_errno,
2195                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2196                                           "failed to obtain E-Switch info for"
2197                                           " port");
2198         dev_priv = mlx5_dev_to_eswitch_info(dev);
2199         if (!dev_priv)
2200                 return rte_flow_error_set(error, rte_errno,
2201                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2202                                           NULL,
2203                                           "failed to obtain E-Switch info");
2204         if (esw_priv->domain_id != dev_priv->domain_id)
2205                 return rte_flow_error_set(error, EINVAL,
2206                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2207                                           "cannot match on a port from a"
2208                                           " different E-Switch");
2209         return 0;
2210 }
2211
2212 /**
2213  * Validate VLAN item.
2214  *
2215  * @param[in] item
2216  *   Item specification.
2217  * @param[in] item_flags
2218  *   Bit-fields that holds the items detected until now.
2219  * @param[in] dev
2220  *   Ethernet device flow is being created on.
2221  * @param[out] error
2222  *   Pointer to error structure.
2223  *
2224  * @return
2225  *   0 on success, a negative errno value otherwise and rte_errno is set.
2226  */
2227 static int
2228 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2229                            uint64_t item_flags,
2230                            struct rte_eth_dev *dev,
2231                            struct rte_flow_error *error)
2232 {
2233         const struct rte_flow_item_vlan *mask = item->mask;
2234         const struct rte_flow_item_vlan nic_mask = {
2235                 .tci = RTE_BE16(UINT16_MAX),
2236                 .inner_type = RTE_BE16(UINT16_MAX),
2237                 .has_more_vlan = 1,
2238         };
2239         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2240         int ret;
2241         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2242                                         MLX5_FLOW_LAYER_INNER_L4) :
2243                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2244                                         MLX5_FLOW_LAYER_OUTER_L4);
2245         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2246                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2247
2248         if (item_flags & vlanm)
2249                 return rte_flow_error_set(error, EINVAL,
2250                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2251                                           "multiple VLAN layers not supported");
2252         else if ((item_flags & l34m) != 0)
2253                 return rte_flow_error_set(error, EINVAL,
2254                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2255                                           "VLAN cannot follow L3/L4 layer");
2256         if (!mask)
2257                 mask = &rte_flow_item_vlan_mask;
2258         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2259                                         (const uint8_t *)&nic_mask,
2260                                         sizeof(struct rte_flow_item_vlan),
2261                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2262         if (ret)
2263                 return ret;
2264         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2265                 struct mlx5_priv *priv = dev->data->dev_private;
2266
2267                 if (priv->vmwa_context) {
2268                         /*
2269                          * Non-NULL context means we have a virtual machine
2270                          * and SR-IOV enabled, we have to create VLAN interface
2271                          * to make hypervisor to setup E-Switch vport
2272                          * context correctly. We avoid creating the multiple
2273                          * VLAN interfaces, so we cannot support VLAN tag mask.
2274                          */
2275                         return rte_flow_error_set(error, EINVAL,
2276                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2277                                                   item,
2278                                                   "VLAN tag mask is not"
2279                                                   " supported in virtual"
2280                                                   " environment");
2281                 }
2282         }
2283         return 0;
2284 }
2285
2286 /*
2287  * GTP flags are contained in 1 byte of the format:
2288  * -------------------------------------------
2289  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
2290  * |-----------------------------------------|
2291  * | value | Version | PT | Res | E | S | PN |
2292  * -------------------------------------------
2293  *
2294  * Matching is supported only for GTP flags E, S, PN.
2295  */
2296 #define MLX5_GTP_FLAGS_MASK     0x07
2297
2298 /**
2299  * Validate GTP item.
2300  *
2301  * @param[in] dev
2302  *   Pointer to the rte_eth_dev structure.
2303  * @param[in] item
2304  *   Item specification.
2305  * @param[in] item_flags
2306  *   Bit-fields that holds the items detected until now.
2307  * @param[out] error
2308  *   Pointer to error structure.
2309  *
2310  * @return
2311  *   0 on success, a negative errno value otherwise and rte_errno is set.
2312  */
2313 static int
2314 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2315                           const struct rte_flow_item *item,
2316                           uint64_t item_flags,
2317                           struct rte_flow_error *error)
2318 {
2319         struct mlx5_priv *priv = dev->data->dev_private;
2320         const struct rte_flow_item_gtp *spec = item->spec;
2321         const struct rte_flow_item_gtp *mask = item->mask;
2322         const struct rte_flow_item_gtp nic_mask = {
2323                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2324                 .msg_type = 0xff,
2325                 .teid = RTE_BE32(0xffffffff),
2326         };
2327
2328         if (!priv->sh->cdev->config.hca_attr.tunnel_stateless_gtp)
2329                 return rte_flow_error_set(error, ENOTSUP,
2330                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2331                                           "GTP support is not enabled");
2332         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2333                 return rte_flow_error_set(error, ENOTSUP,
2334                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2335                                           "multiple tunnel layers not"
2336                                           " supported");
2337         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2338                 return rte_flow_error_set(error, EINVAL,
2339                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2340                                           "no outer UDP layer found");
2341         if (!mask)
2342                 mask = &rte_flow_item_gtp_mask;
2343         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2344                 return rte_flow_error_set(error, ENOTSUP,
2345                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2346                                           "Match is supported for GTP"
2347                                           " flags only");
2348         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2349                                          (const uint8_t *)&nic_mask,
2350                                          sizeof(struct rte_flow_item_gtp),
2351                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2352 }
2353
2354 /**
2355  * Validate GTP PSC item.
2356  *
2357  * @param[in] item
2358  *   Item specification.
2359  * @param[in] last_item
2360  *   Previous validated item in the pattern items.
2361  * @param[in] gtp_item
2362  *   Previous GTP item specification.
2363  * @param[in] attr
2364  *   Pointer to flow attributes.
2365  * @param[out] error
2366  *   Pointer to error structure.
2367  *
2368  * @return
2369  *   0 on success, a negative errno value otherwise and rte_errno is set.
2370  */
2371 static int
2372 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2373                               uint64_t last_item,
2374                               const struct rte_flow_item *gtp_item,
2375                               const struct rte_flow_attr *attr,
2376                               struct rte_flow_error *error)
2377 {
2378         const struct rte_flow_item_gtp *gtp_spec;
2379         const struct rte_flow_item_gtp *gtp_mask;
2380         const struct rte_flow_item_gtp_psc *mask;
2381         const struct rte_flow_item_gtp_psc nic_mask = {
2382                 .hdr.type = 0xF,
2383                 .hdr.qfi = 0x3F,
2384         };
2385
2386         if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2387                 return rte_flow_error_set
2388                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2389                          "GTP PSC item must be preceded with GTP item");
2390         gtp_spec = gtp_item->spec;
2391         gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2392         /* GTP spec and E flag is requested to match zero. */
2393         if (gtp_spec &&
2394                 (gtp_mask->v_pt_rsv_flags &
2395                 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2396                 return rte_flow_error_set
2397                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2398                          "GTP E flag must be 1 to match GTP PSC");
2399         /* Check the flow is not created in group zero. */
2400         if (!attr->transfer && !attr->group)
2401                 return rte_flow_error_set
2402                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2403                          "GTP PSC is not supported for group 0");
2404         /* GTP spec is here and E flag is requested to match zero. */
2405         if (!item->spec)
2406                 return 0;
2407         mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2408         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2409                                          (const uint8_t *)&nic_mask,
2410                                          sizeof(struct rte_flow_item_gtp_psc),
2411                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2412 }
2413
2414 /**
2415  * Validate IPV4 item.
2416  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2417  * add specific validation of fragment_offset field,
2418  *
2419  * @param[in] item
2420  *   Item specification.
2421  * @param[in] item_flags
2422  *   Bit-fields that holds the items detected until now.
2423  * @param[out] error
2424  *   Pointer to error structure.
2425  *
2426  * @return
2427  *   0 on success, a negative errno value otherwise and rte_errno is set.
2428  */
2429 static int
2430 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2431                            const struct rte_flow_item *item,
2432                            uint64_t item_flags, uint64_t last_item,
2433                            uint16_t ether_type, struct rte_flow_error *error)
2434 {
2435         int ret;
2436         struct mlx5_priv *priv = dev->data->dev_private;
2437         struct mlx5_hca_attr *attr = &priv->sh->cdev->config.hca_attr;
2438         const struct rte_flow_item_ipv4 *spec = item->spec;
2439         const struct rte_flow_item_ipv4 *last = item->last;
2440         const struct rte_flow_item_ipv4 *mask = item->mask;
2441         rte_be16_t fragment_offset_spec = 0;
2442         rte_be16_t fragment_offset_last = 0;
2443         struct rte_flow_item_ipv4 nic_ipv4_mask = {
2444                 .hdr = {
2445                         .src_addr = RTE_BE32(0xffffffff),
2446                         .dst_addr = RTE_BE32(0xffffffff),
2447                         .type_of_service = 0xff,
2448                         .fragment_offset = RTE_BE16(0xffff),
2449                         .next_proto_id = 0xff,
2450                         .time_to_live = 0xff,
2451                 },
2452         };
2453
2454         if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2455                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2456                 bool ihl_cap = !tunnel ?
2457                                attr->outer_ipv4_ihl : attr->inner_ipv4_ihl;
2458                 if (!ihl_cap)
2459                         return rte_flow_error_set(error, ENOTSUP,
2460                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2461                                                   item,
2462                                                   "IPV4 ihl offload not supported");
2463                 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2464         }
2465         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2466                                            ether_type, &nic_ipv4_mask,
2467                                            MLX5_ITEM_RANGE_ACCEPTED, error);
2468         if (ret < 0)
2469                 return ret;
2470         if (spec && mask)
2471                 fragment_offset_spec = spec->hdr.fragment_offset &
2472                                        mask->hdr.fragment_offset;
2473         if (!fragment_offset_spec)
2474                 return 0;
2475         /*
2476          * spec and mask are valid, enforce using full mask to make sure the
2477          * complete value is used correctly.
2478          */
2479         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2480                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2481                 return rte_flow_error_set(error, EINVAL,
2482                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2483                                           item, "must use full mask for"
2484                                           " fragment_offset");
2485         /*
2486          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2487          * indicating this is 1st fragment of fragmented packet.
2488          * This is not yet supported in MLX5, return appropriate error message.
2489          */
2490         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2491                 return rte_flow_error_set(error, ENOTSUP,
2492                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2493                                           "match on first fragment not "
2494                                           "supported");
2495         if (fragment_offset_spec && !last)
2496                 return rte_flow_error_set(error, ENOTSUP,
2497                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2498                                           "specified value not supported");
2499         /* spec and last are valid, validate the specified range. */
2500         fragment_offset_last = last->hdr.fragment_offset &
2501                                mask->hdr.fragment_offset;
2502         /*
2503          * Match on fragment_offset spec 0x2001 and last 0x3fff
2504          * means MF is 1 and frag-offset is > 0.
2505          * This packet is fragment 2nd and onward, excluding last.
2506          * This is not yet supported in MLX5, return appropriate
2507          * error message.
2508          */
2509         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2510             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2511                 return rte_flow_error_set(error, ENOTSUP,
2512                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2513                                           last, "match on following "
2514                                           "fragments not supported");
2515         /*
2516          * Match on fragment_offset spec 0x0001 and last 0x1fff
2517          * means MF is 0 and frag-offset is > 0.
2518          * This packet is last fragment of fragmented packet.
2519          * This is not yet supported in MLX5, return appropriate
2520          * error message.
2521          */
2522         if (fragment_offset_spec == RTE_BE16(1) &&
2523             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2524                 return rte_flow_error_set(error, ENOTSUP,
2525                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2526                                           last, "match on last "
2527                                           "fragment not supported");
2528         /*
2529          * Match on fragment_offset spec 0x0001 and last 0x3fff
2530          * means MF and/or frag-offset is not 0.
2531          * This is a fragmented packet.
2532          * Other range values are invalid and rejected.
2533          */
2534         if (!(fragment_offset_spec == RTE_BE16(1) &&
2535               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2536                 return rte_flow_error_set(error, ENOTSUP,
2537                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2538                                           "specified range not supported");
2539         return 0;
2540 }
2541
2542 /**
2543  * Validate IPV6 fragment extension item.
2544  *
2545  * @param[in] item
2546  *   Item specification.
2547  * @param[in] item_flags
2548  *   Bit-fields that holds the items detected until now.
2549  * @param[out] error
2550  *   Pointer to error structure.
2551  *
2552  * @return
2553  *   0 on success, a negative errno value otherwise and rte_errno is set.
2554  */
2555 static int
2556 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2557                                     uint64_t item_flags,
2558                                     struct rte_flow_error *error)
2559 {
2560         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2561         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2562         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2563         rte_be16_t frag_data_spec = 0;
2564         rte_be16_t frag_data_last = 0;
2565         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2566         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2567                                       MLX5_FLOW_LAYER_OUTER_L4;
2568         int ret = 0;
2569         struct rte_flow_item_ipv6_frag_ext nic_mask = {
2570                 .hdr = {
2571                         .next_header = 0xff,
2572                         .frag_data = RTE_BE16(0xffff),
2573                 },
2574         };
2575
2576         if (item_flags & l4m)
2577                 return rte_flow_error_set(error, EINVAL,
2578                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2579                                           "ipv6 fragment extension item cannot "
2580                                           "follow L4 item.");
2581         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2582             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2583                 return rte_flow_error_set(error, EINVAL,
2584                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2585                                           "ipv6 fragment extension item must "
2586                                           "follow ipv6 item");
2587         if (spec && mask)
2588                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2589         if (!frag_data_spec)
2590                 return 0;
2591         /*
2592          * spec and mask are valid, enforce using full mask to make sure the
2593          * complete value is used correctly.
2594          */
2595         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2596                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2597                 return rte_flow_error_set(error, EINVAL,
2598                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2599                                           item, "must use full mask for"
2600                                           " frag_data");
2601         /*
2602          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2603          * This is 1st fragment of fragmented packet.
2604          */
2605         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2606                 return rte_flow_error_set(error, ENOTSUP,
2607                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2608                                           "match on first fragment not "
2609                                           "supported");
2610         if (frag_data_spec && !last)
2611                 return rte_flow_error_set(error, EINVAL,
2612                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2613                                           "specified value not supported");
2614         ret = mlx5_flow_item_acceptable
2615                                 (item, (const uint8_t *)mask,
2616                                  (const uint8_t *)&nic_mask,
2617                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
2618                                  MLX5_ITEM_RANGE_ACCEPTED, error);
2619         if (ret)
2620                 return ret;
2621         /* spec and last are valid, validate the specified range. */
2622         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2623         /*
2624          * Match on frag_data spec 0x0009 and last 0xfff9
2625          * means M is 1 and frag-offset is > 0.
2626          * This packet is fragment 2nd and onward, excluding last.
2627          * This is not yet supported in MLX5, return appropriate
2628          * error message.
2629          */
2630         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2631                                        RTE_IPV6_EHDR_MF_MASK) &&
2632             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2633                 return rte_flow_error_set(error, ENOTSUP,
2634                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2635                                           last, "match on following "
2636                                           "fragments not supported");
2637         /*
2638          * Match on frag_data spec 0x0008 and last 0xfff8
2639          * means M is 0 and frag-offset is > 0.
2640          * This packet is last fragment of fragmented packet.
2641          * This is not yet supported in MLX5, return appropriate
2642          * error message.
2643          */
2644         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2645             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2646                 return rte_flow_error_set(error, ENOTSUP,
2647                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2648                                           last, "match on last "
2649                                           "fragment not supported");
2650         /* Other range values are invalid and rejected. */
2651         return rte_flow_error_set(error, EINVAL,
2652                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2653                                   "specified range not supported");
2654 }
2655
2656 /*
2657  * Validate ASO CT item.
2658  *
2659  * @param[in] dev
2660  *   Pointer to the rte_eth_dev structure.
2661  * @param[in] item
2662  *   Item specification.
2663  * @param[in] item_flags
2664  *   Pointer to bit-fields that holds the items detected until now.
2665  * @param[out] error
2666  *   Pointer to error structure.
2667  *
2668  * @return
2669  *   0 on success, a negative errno value otherwise and rte_errno is set.
2670  */
2671 static int
2672 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2673                              const struct rte_flow_item *item,
2674                              uint64_t *item_flags,
2675                              struct rte_flow_error *error)
2676 {
2677         const struct rte_flow_item_conntrack *spec = item->spec;
2678         const struct rte_flow_item_conntrack *mask = item->mask;
2679         RTE_SET_USED(dev);
2680         uint32_t flags;
2681
2682         if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2683                 return rte_flow_error_set(error, EINVAL,
2684                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2685                                           "Only one CT is supported");
2686         if (!mask)
2687                 mask = &rte_flow_item_conntrack_mask;
2688         flags = spec->flags & mask->flags;
2689         if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2690             ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2691              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2692              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2693                 return rte_flow_error_set(error, EINVAL,
2694                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2695                                           "Conflict status bits");
2696         /* State change also needs to be considered. */
2697         *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2698         return 0;
2699 }
2700
2701 /**
2702  * Validate the pop VLAN action.
2703  *
2704  * @param[in] dev
2705  *   Pointer to the rte_eth_dev structure.
2706  * @param[in] action_flags
2707  *   Holds the actions detected until now.
2708  * @param[in] action
2709  *   Pointer to the pop vlan action.
2710  * @param[in] item_flags
2711  *   The items found in this flow rule.
2712  * @param[in] attr
2713  *   Pointer to flow attributes.
2714  * @param[out] error
2715  *   Pointer to error structure.
2716  *
2717  * @return
2718  *   0 on success, a negative errno value otherwise and rte_errno is set.
2719  */
2720 static int
2721 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2722                                  uint64_t action_flags,
2723                                  const struct rte_flow_action *action,
2724                                  uint64_t item_flags,
2725                                  const struct rte_flow_attr *attr,
2726                                  struct rte_flow_error *error)
2727 {
2728         const struct mlx5_priv *priv = dev->data->dev_private;
2729         struct mlx5_dev_ctx_shared *sh = priv->sh;
2730         bool direction_error = false;
2731
2732         if (!priv->sh->pop_vlan_action)
2733                 return rte_flow_error_set(error, ENOTSUP,
2734                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2735                                           NULL,
2736                                           "pop vlan action is not supported");
2737         /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2738         if (attr->transfer) {
2739                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2740                 bool is_cx5 = sh->steering_format_version ==
2741                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2742
2743                 if (fdb_tx && is_cx5)
2744                         direction_error = true;
2745         } else if (attr->egress) {
2746                 direction_error = true;
2747         }
2748         if (direction_error)
2749                 return rte_flow_error_set(error, ENOTSUP,
2750                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2751                                           NULL,
2752                                           "pop vlan action not supported for egress");
2753         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2754                 return rte_flow_error_set(error, ENOTSUP,
2755                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2756                                           "no support for multiple VLAN "
2757                                           "actions");
2758         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2759         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2760             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2761                 return rte_flow_error_set(error, ENOTSUP,
2762                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2763                                           NULL,
2764                                           "cannot pop vlan after decap without "
2765                                           "match on inner vlan in the flow");
2766         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2767         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2768             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2769                 return rte_flow_error_set(error, ENOTSUP,
2770                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2771                                           NULL,
2772                                           "cannot pop vlan without a "
2773                                           "match on (outer) vlan in the flow");
2774         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2775                 return rte_flow_error_set(error, EINVAL,
2776                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2777                                           "wrong action order, port_id should "
2778                                           "be after pop VLAN action");
2779         if (!attr->transfer && priv->representor)
2780                 return rte_flow_error_set(error, ENOTSUP,
2781                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2782                                           "pop vlan action for VF representor "
2783                                           "not supported on NIC table");
2784         return 0;
2785 }
2786
2787 /**
2788  * Get VLAN default info from vlan match info.
2789  *
2790  * @param[in] items
2791  *   the list of item specifications.
2792  * @param[out] vlan
2793  *   pointer VLAN info to fill to.
2794  *
2795  * @return
2796  *   0 on success, a negative errno value otherwise and rte_errno is set.
2797  */
2798 static void
2799 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2800                                   struct rte_vlan_hdr *vlan)
2801 {
2802         const struct rte_flow_item_vlan nic_mask = {
2803                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2804                                 MLX5DV_FLOW_VLAN_VID_MASK),
2805                 .inner_type = RTE_BE16(0xffff),
2806         };
2807
2808         if (items == NULL)
2809                 return;
2810         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2811                 int type = items->type;
2812
2813                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2814                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2815                         break;
2816         }
2817         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2818                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2819                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2820
2821                 /* If VLAN item in pattern doesn't contain data, return here. */
2822                 if (!vlan_v)
2823                         return;
2824                 if (!vlan_m)
2825                         vlan_m = &nic_mask;
2826                 /* Only full match values are accepted */
2827                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2828                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2829                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2830                         vlan->vlan_tci |=
2831                                 rte_be_to_cpu_16(vlan_v->tci &
2832                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2833                 }
2834                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2835                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2836                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2837                         vlan->vlan_tci |=
2838                                 rte_be_to_cpu_16(vlan_v->tci &
2839                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2840                 }
2841                 if (vlan_m->inner_type == nic_mask.inner_type)
2842                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2843                                                            vlan_m->inner_type);
2844         }
2845 }
2846
2847 /**
2848  * Validate the push VLAN action.
2849  *
2850  * @param[in] dev
2851  *   Pointer to the rte_eth_dev structure.
2852  * @param[in] action_flags
2853  *   Holds the actions detected until now.
2854  * @param[in] item_flags
2855  *   The items found in this flow rule.
2856  * @param[in] action
2857  *   Pointer to the action structure.
2858  * @param[in] attr
2859  *   Pointer to flow attributes
2860  * @param[out] error
2861  *   Pointer to error structure.
2862  *
2863  * @return
2864  *   0 on success, a negative errno value otherwise and rte_errno is set.
2865  */
2866 static int
2867 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2868                                   uint64_t action_flags,
2869                                   const struct rte_flow_item_vlan *vlan_m,
2870                                   const struct rte_flow_action *action,
2871                                   const struct rte_flow_attr *attr,
2872                                   struct rte_flow_error *error)
2873 {
2874         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2875         const struct mlx5_priv *priv = dev->data->dev_private;
2876         struct mlx5_dev_ctx_shared *sh = priv->sh;
2877         bool direction_error = false;
2878
2879         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2880             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2881                 return rte_flow_error_set(error, EINVAL,
2882                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2883                                           "invalid vlan ethertype");
2884         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2885                 return rte_flow_error_set(error, EINVAL,
2886                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2887                                           "wrong action order, port_id should "
2888                                           "be after push VLAN");
2889         /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2890         if (attr->transfer) {
2891                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2892                 bool is_cx5 = sh->steering_format_version ==
2893                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2894
2895                 if (!fdb_tx && is_cx5)
2896                         direction_error = true;
2897         } else if (attr->ingress) {
2898                 direction_error = true;
2899         }
2900         if (direction_error)
2901                 return rte_flow_error_set(error, ENOTSUP,
2902                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2903                                           NULL,
2904                                           "push vlan action not supported for ingress");
2905         if (!attr->transfer && priv->representor)
2906                 return rte_flow_error_set(error, ENOTSUP,
2907                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2908                                           "push vlan action for VF representor "
2909                                           "not supported on NIC table");
2910         if (vlan_m &&
2911             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2912             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2913                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2914             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2915             !(mlx5_flow_find_action
2916                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2917                 return rte_flow_error_set(error, EINVAL,
2918                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2919                                           "not full match mask on VLAN PCP and "
2920                                           "there is no of_set_vlan_pcp action, "
2921                                           "push VLAN action cannot figure out "
2922                                           "PCP value");
2923         if (vlan_m &&
2924             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2925             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2926                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2927             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2928             !(mlx5_flow_find_action
2929                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2930                 return rte_flow_error_set(error, EINVAL,
2931                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2932                                           "not full match mask on VLAN VID and "
2933                                           "there is no of_set_vlan_vid action, "
2934                                           "push VLAN action cannot figure out "
2935                                           "VID value");
2936         (void)attr;
2937         return 0;
2938 }
2939
2940 /**
2941  * Validate the set VLAN PCP.
2942  *
2943  * @param[in] action_flags
2944  *   Holds the actions detected until now.
2945  * @param[in] actions
2946  *   Pointer to the list of actions remaining in the flow rule.
2947  * @param[out] error
2948  *   Pointer to error structure.
2949  *
2950  * @return
2951  *   0 on success, a negative errno value otherwise and rte_errno is set.
2952  */
2953 static int
2954 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2955                                      const struct rte_flow_action actions[],
2956                                      struct rte_flow_error *error)
2957 {
2958         const struct rte_flow_action *action = actions;
2959         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2960
2961         if (conf->vlan_pcp > 7)
2962                 return rte_flow_error_set(error, EINVAL,
2963                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2964                                           "VLAN PCP value is too big");
2965         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2966                 return rte_flow_error_set(error, ENOTSUP,
2967                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2968                                           "set VLAN PCP action must follow "
2969                                           "the push VLAN action");
2970         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2971                 return rte_flow_error_set(error, ENOTSUP,
2972                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2973                                           "Multiple VLAN PCP modification are "
2974                                           "not supported");
2975         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2976                 return rte_flow_error_set(error, EINVAL,
2977                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2978                                           "wrong action order, port_id should "
2979                                           "be after set VLAN PCP");
2980         return 0;
2981 }
2982
2983 /**
2984  * Validate the set VLAN VID.
2985  *
2986  * @param[in] item_flags
2987  *   Holds the items detected in this rule.
2988  * @param[in] action_flags
2989  *   Holds the actions detected until now.
2990  * @param[in] actions
2991  *   Pointer to the list of actions remaining in the flow rule.
2992  * @param[out] error
2993  *   Pointer to error structure.
2994  *
2995  * @return
2996  *   0 on success, a negative errno value otherwise and rte_errno is set.
2997  */
2998 static int
2999 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
3000                                      uint64_t action_flags,
3001                                      const struct rte_flow_action actions[],
3002                                      struct rte_flow_error *error)
3003 {
3004         const struct rte_flow_action *action = actions;
3005         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3006
3007         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3008                 return rte_flow_error_set(error, EINVAL,
3009                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3010                                           "VLAN VID value is too big");
3011         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3012             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3013                 return rte_flow_error_set(error, ENOTSUP,
3014                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3015                                           "set VLAN VID action must follow push"
3016                                           " VLAN action or match on VLAN item");
3017         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3018                 return rte_flow_error_set(error, ENOTSUP,
3019                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3020                                           "Multiple VLAN VID modifications are "
3021                                           "not supported");
3022         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3023                 return rte_flow_error_set(error, EINVAL,
3024                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3025                                           "wrong action order, port_id should "
3026                                           "be after set VLAN VID");
3027         return 0;
3028 }
3029
3030 /*
3031  * Validate the FLAG action.
3032  *
3033  * @param[in] dev
3034  *   Pointer to the rte_eth_dev structure.
3035  * @param[in] action_flags
3036  *   Holds the actions detected until now.
3037  * @param[in] attr
3038  *   Pointer to flow attributes
3039  * @param[out] error
3040  *   Pointer to error structure.
3041  *
3042  * @return
3043  *   0 on success, a negative errno value otherwise and rte_errno is set.
3044  */
3045 static int
3046 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3047                              uint64_t action_flags,
3048                              const struct rte_flow_attr *attr,
3049                              struct rte_flow_error *error)
3050 {
3051         struct mlx5_priv *priv = dev->data->dev_private;
3052         struct mlx5_sh_config *config = &priv->sh->config;
3053         int ret;
3054
3055         /* Fall back if no extended metadata register support. */
3056         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3057                 return mlx5_flow_validate_action_flag(action_flags, attr,
3058                                                       error);
3059         /* Extensive metadata mode requires registers. */
3060         if (!mlx5_flow_ext_mreg_supported(dev))
3061                 return rte_flow_error_set(error, ENOTSUP,
3062                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3063                                           "no metadata registers "
3064                                           "to support flag action");
3065         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3066                 return rte_flow_error_set(error, ENOTSUP,
3067                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3068                                           "extended metadata register"
3069                                           " isn't available");
3070         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3071         if (ret < 0)
3072                 return ret;
3073         MLX5_ASSERT(ret > 0);
3074         if (action_flags & MLX5_FLOW_ACTION_MARK)
3075                 return rte_flow_error_set(error, EINVAL,
3076                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3077                                           "can't mark and flag in same flow");
3078         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3079                 return rte_flow_error_set(error, EINVAL,
3080                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3081                                           "can't have 2 flag"
3082                                           " actions in same flow");
3083         return 0;
3084 }
3085
3086 /**
3087  * Validate MARK action.
3088  *
3089  * @param[in] dev
3090  *   Pointer to the rte_eth_dev structure.
3091  * @param[in] action
3092  *   Pointer to action.
3093  * @param[in] action_flags
3094  *   Holds the actions detected until now.
3095  * @param[in] attr
3096  *   Pointer to flow attributes
3097  * @param[out] error
3098  *   Pointer to error structure.
3099  *
3100  * @return
3101  *   0 on success, a negative errno value otherwise and rte_errno is set.
3102  */
3103 static int
3104 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3105                              const struct rte_flow_action *action,
3106                              uint64_t action_flags,
3107                              const struct rte_flow_attr *attr,
3108                              struct rte_flow_error *error)
3109 {
3110         struct mlx5_priv *priv = dev->data->dev_private;
3111         struct mlx5_sh_config *config = &priv->sh->config;
3112         const struct rte_flow_action_mark *mark = action->conf;
3113         int ret;
3114
3115         if (is_tunnel_offload_active(dev))
3116                 return rte_flow_error_set(error, ENOTSUP,
3117                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3118                                           "no mark action "
3119                                           "if tunnel offload active");
3120         /* Fall back if no extended metadata register support. */
3121         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3122                 return mlx5_flow_validate_action_mark(action, action_flags,
3123                                                       attr, error);
3124         /* Extensive metadata mode requires registers. */
3125         if (!mlx5_flow_ext_mreg_supported(dev))
3126                 return rte_flow_error_set(error, ENOTSUP,
3127                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3128                                           "no metadata registers "
3129                                           "to support mark action");
3130         if (!priv->sh->dv_mark_mask)
3131                 return rte_flow_error_set(error, ENOTSUP,
3132                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3133                                           "extended metadata register"
3134                                           " isn't available");
3135         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3136         if (ret < 0)
3137                 return ret;
3138         MLX5_ASSERT(ret > 0);
3139         if (!mark)
3140                 return rte_flow_error_set(error, EINVAL,
3141                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3142                                           "configuration cannot be null");
3143         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3144                 return rte_flow_error_set(error, EINVAL,
3145                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3146                                           &mark->id,
3147                                           "mark id exceeds the limit");
3148         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3149                 return rte_flow_error_set(error, EINVAL,
3150                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3151                                           "can't flag and mark in same flow");
3152         if (action_flags & MLX5_FLOW_ACTION_MARK)
3153                 return rte_flow_error_set(error, EINVAL,
3154                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3155                                           "can't have 2 mark actions in same"
3156                                           " flow");
3157         return 0;
3158 }
3159
3160 /**
3161  * Validate SET_META action.
3162  *
3163  * @param[in] dev
3164  *   Pointer to the rte_eth_dev structure.
3165  * @param[in] action
3166  *   Pointer to the action structure.
3167  * @param[in] action_flags
3168  *   Holds the actions detected until now.
3169  * @param[in] attr
3170  *   Pointer to flow attributes
3171  * @param[out] error
3172  *   Pointer to error structure.
3173  *
3174  * @return
3175  *   0 on success, a negative errno value otherwise and rte_errno is set.
3176  */
3177 static int
3178 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3179                                  const struct rte_flow_action *action,
3180                                  uint64_t action_flags __rte_unused,
3181                                  const struct rte_flow_attr *attr,
3182                                  struct rte_flow_error *error)
3183 {
3184         struct mlx5_priv *priv = dev->data->dev_private;
3185         struct mlx5_sh_config *config = &priv->sh->config;
3186         const struct rte_flow_action_set_meta *conf;
3187         uint32_t nic_mask = UINT32_MAX;
3188         int reg;
3189
3190         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
3191             !mlx5_flow_ext_mreg_supported(dev))
3192                 return rte_flow_error_set(error, ENOTSUP,
3193                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3194                                           "extended metadata register"
3195                                           " isn't supported");
3196         reg = flow_dv_get_metadata_reg(dev, attr, error);
3197         if (reg < 0)
3198                 return reg;
3199         if (reg == REG_NON)
3200                 return rte_flow_error_set(error, ENOTSUP,
3201                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3202                                           "unavailable extended metadata register");
3203         if (reg != REG_A && reg != REG_B) {
3204                 struct mlx5_priv *priv = dev->data->dev_private;
3205
3206                 nic_mask = priv->sh->dv_meta_mask;
3207         }
3208         if (!(action->conf))
3209                 return rte_flow_error_set(error, EINVAL,
3210                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3211                                           "configuration cannot be null");
3212         conf = (const struct rte_flow_action_set_meta *)action->conf;
3213         if (!conf->mask)
3214                 return rte_flow_error_set(error, EINVAL,
3215                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3216                                           "zero mask doesn't have any effect");
3217         if (conf->mask & ~nic_mask)
3218                 return rte_flow_error_set(error, EINVAL,
3219                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3220                                           "meta data must be within reg C0");
3221         return 0;
3222 }
3223
3224 /**
3225  * Validate SET_TAG action.
3226  *
3227  * @param[in] dev
3228  *   Pointer to the rte_eth_dev structure.
3229  * @param[in] action
3230  *   Pointer to the action structure.
3231  * @param[in] action_flags
3232  *   Holds the actions detected until now.
3233  * @param[in] attr
3234  *   Pointer to flow attributes
3235  * @param[out] error
3236  *   Pointer to error structure.
3237  *
3238  * @return
3239  *   0 on success, a negative errno value otherwise and rte_errno is set.
3240  */
3241 static int
3242 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3243                                 const struct rte_flow_action *action,
3244                                 uint64_t action_flags,
3245                                 const struct rte_flow_attr *attr,
3246                                 struct rte_flow_error *error)
3247 {
3248         const struct rte_flow_action_set_tag *conf;
3249         const uint64_t terminal_action_flags =
3250                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3251                 MLX5_FLOW_ACTION_RSS;
3252         int ret;
3253
3254         if (!mlx5_flow_ext_mreg_supported(dev))
3255                 return rte_flow_error_set(error, ENOTSUP,
3256                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3257                                           "extensive metadata register"
3258                                           " isn't supported");
3259         if (!(action->conf))
3260                 return rte_flow_error_set(error, EINVAL,
3261                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3262                                           "configuration cannot be null");
3263         conf = (const struct rte_flow_action_set_tag *)action->conf;
3264         if (!conf->mask)
3265                 return rte_flow_error_set(error, EINVAL,
3266                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3267                                           "zero mask doesn't have any effect");
3268         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3269         if (ret < 0)
3270                 return ret;
3271         if (!attr->transfer && attr->ingress &&
3272             (action_flags & terminal_action_flags))
3273                 return rte_flow_error_set(error, EINVAL,
3274                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3275                                           "set_tag has no effect"
3276                                           " with terminal actions");
3277         return 0;
3278 }
3279
3280 /**
3281  * Validate count action.
3282  *
3283  * @param[in] dev
3284  *   Pointer to rte_eth_dev structure.
3285  * @param[in] shared
3286  *   Indicator if action is shared.
3287  * @param[in] action_flags
3288  *   Holds the actions detected until now.
3289  * @param[out] error
3290  *   Pointer to error structure.
3291  *
3292  * @return
3293  *   0 on success, a negative errno value otherwise and rte_errno is set.
3294  */
3295 static int
3296 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3297                               uint64_t action_flags,
3298                               struct rte_flow_error *error)
3299 {
3300         struct mlx5_priv *priv = dev->data->dev_private;
3301
3302         if (!priv->sh->cdev->config.devx)
3303                 goto notsup_err;
3304         if (action_flags & MLX5_FLOW_ACTION_COUNT)
3305                 return rte_flow_error_set(error, EINVAL,
3306                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3307                                           "duplicate count actions set");
3308         if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3309             !priv->sh->flow_hit_aso_en)
3310                 return rte_flow_error_set(error, EINVAL,
3311                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3312                                           "old age and shared count combination is not supported");
3313 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3314         return 0;
3315 #endif
3316 notsup_err:
3317         return rte_flow_error_set
3318                       (error, ENOTSUP,
3319                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3320                        NULL,
3321                        "count action not supported");
3322 }
3323
3324 /**
3325  * Validate the L2 encap action.
3326  *
3327  * @param[in] dev
3328  *   Pointer to the rte_eth_dev structure.
3329  * @param[in] action_flags
3330  *   Holds the actions detected until now.
3331  * @param[in] action
3332  *   Pointer to the action structure.
3333  * @param[in] attr
3334  *   Pointer to flow attributes.
3335  * @param[out] error
3336  *   Pointer to error structure.
3337  *
3338  * @return
3339  *   0 on success, a negative errno value otherwise and rte_errno is set.
3340  */
3341 static int
3342 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3343                                  uint64_t action_flags,
3344                                  const struct rte_flow_action *action,
3345                                  const struct rte_flow_attr *attr,
3346                                  struct rte_flow_error *error)
3347 {
3348         const struct mlx5_priv *priv = dev->data->dev_private;
3349
3350         if (!(action->conf))
3351                 return rte_flow_error_set(error, EINVAL,
3352                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3353                                           "configuration cannot be null");
3354         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3355                 return rte_flow_error_set(error, EINVAL,
3356                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3357                                           "can only have a single encap action "
3358                                           "in a flow");
3359         if (!attr->transfer && priv->representor)
3360                 return rte_flow_error_set(error, ENOTSUP,
3361                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3362                                           "encap action for VF representor "
3363                                           "not supported on NIC table");
3364         return 0;
3365 }
3366
3367 /**
3368  * Validate a decap action.
3369  *
3370  * @param[in] dev
3371  *   Pointer to the rte_eth_dev structure.
3372  * @param[in] action_flags
3373  *   Holds the actions detected until now.
3374  * @param[in] action
3375  *   Pointer to the action structure.
3376  * @param[in] item_flags
3377  *   Holds the items detected.
3378  * @param[in] attr
3379  *   Pointer to flow attributes
3380  * @param[out] error
3381  *   Pointer to error structure.
3382  *
3383  * @return
3384  *   0 on success, a negative errno value otherwise and rte_errno is set.
3385  */
3386 static int
3387 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3388                               uint64_t action_flags,
3389                               const struct rte_flow_action *action,
3390                               const uint64_t item_flags,
3391                               const struct rte_flow_attr *attr,
3392                               struct rte_flow_error *error)
3393 {
3394         const struct mlx5_priv *priv = dev->data->dev_private;
3395
3396         if (priv->sh->cdev->config.hca_attr.scatter_fcs_w_decap_disable &&
3397             !priv->sh->config.decap_en)
3398                 return rte_flow_error_set(error, ENOTSUP,
3399                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3400                                           "decap is not enabled");
3401         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3402                 return rte_flow_error_set(error, ENOTSUP,
3403                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3404                                           action_flags &
3405                                           MLX5_FLOW_ACTION_DECAP ? "can only "
3406                                           "have a single decap action" : "decap "
3407                                           "after encap is not supported");
3408         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3409                 return rte_flow_error_set(error, EINVAL,
3410                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3411                                           "can't have decap action after"
3412                                           " modify action");
3413         if (attr->egress)
3414                 return rte_flow_error_set(error, ENOTSUP,
3415                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3416                                           NULL,
3417                                           "decap action not supported for "
3418                                           "egress");
3419         if (!attr->transfer && priv->representor)
3420                 return rte_flow_error_set(error, ENOTSUP,
3421                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3422                                           "decap action for VF representor "
3423                                           "not supported on NIC table");
3424         if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3425             !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3426                 return rte_flow_error_set(error, ENOTSUP,
3427                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3428                                 "VXLAN item should be present for VXLAN decap");
3429         return 0;
3430 }
3431
3432 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3433
3434 /**
3435  * Validate the raw encap and decap actions.
3436  *
3437  * @param[in] dev
3438  *   Pointer to the rte_eth_dev structure.
3439  * @param[in] decap
3440  *   Pointer to the decap action.
3441  * @param[in] encap
3442  *   Pointer to the encap action.
3443  * @param[in] attr
3444  *   Pointer to flow attributes
3445  * @param[in/out] action_flags
3446  *   Holds the actions detected until now.
3447  * @param[out] actions_n
3448  *   pointer to the number of actions counter.
3449  * @param[in] action
3450  *   Pointer to the action structure.
3451  * @param[in] item_flags
3452  *   Holds the items detected.
3453  * @param[out] error
3454  *   Pointer to error structure.
3455  *
3456  * @return
3457  *   0 on success, a negative errno value otherwise and rte_errno is set.
3458  */
3459 static int
3460 flow_dv_validate_action_raw_encap_decap
3461         (struct rte_eth_dev *dev,
3462          const struct rte_flow_action_raw_decap *decap,
3463          const struct rte_flow_action_raw_encap *encap,
3464          const struct rte_flow_attr *attr, uint64_t *action_flags,
3465          int *actions_n, const struct rte_flow_action *action,
3466          uint64_t item_flags, struct rte_flow_error *error)
3467 {
3468         const struct mlx5_priv *priv = dev->data->dev_private;
3469         int ret;
3470
3471         if (encap && (!encap->size || !encap->data))
3472                 return rte_flow_error_set(error, EINVAL,
3473                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3474                                           "raw encap data cannot be empty");
3475         if (decap && encap) {
3476                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3477                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3478                         /* L3 encap. */
3479                         decap = NULL;
3480                 else if (encap->size <=
3481                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3482                            decap->size >
3483                            MLX5_ENCAPSULATION_DECISION_SIZE)
3484                         /* L3 decap. */
3485                         encap = NULL;
3486                 else if (encap->size >
3487                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3488                            decap->size >
3489                            MLX5_ENCAPSULATION_DECISION_SIZE)
3490                         /* 2 L2 actions: encap and decap. */
3491                         ;
3492                 else
3493                         return rte_flow_error_set(error,
3494                                 ENOTSUP,
3495                                 RTE_FLOW_ERROR_TYPE_ACTION,
3496                                 NULL, "unsupported too small "
3497                                 "raw decap and too small raw "
3498                                 "encap combination");
3499         }
3500         if (decap) {
3501                 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3502                                                     item_flags, attr, error);
3503                 if (ret < 0)
3504                         return ret;
3505                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3506                 ++(*actions_n);
3507         }
3508         if (encap) {
3509                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3510                         return rte_flow_error_set(error, ENOTSUP,
3511                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3512                                                   NULL,
3513                                                   "small raw encap size");
3514                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3515                         return rte_flow_error_set(error, EINVAL,
3516                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3517                                                   NULL,
3518                                                   "more than one encap action");
3519                 if (!attr->transfer && priv->representor)
3520                         return rte_flow_error_set
3521                                         (error, ENOTSUP,
3522                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3523                                          "encap action for VF representor "
3524                                          "not supported on NIC table");
3525                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3526                 ++(*actions_n);
3527         }
3528         return 0;
3529 }
3530
3531 /*
3532  * Validate the ASO CT action.
3533  *
3534  * @param[in] dev
3535  *   Pointer to the rte_eth_dev structure.
3536  * @param[in] action_flags
3537  *   Holds the actions detected until now.
3538  * @param[in] item_flags
3539  *   The items found in this flow rule.
3540  * @param[in] attr
3541  *   Pointer to flow attributes.
3542  * @param[out] error
3543  *   Pointer to error structure.
3544  *
3545  * @return
3546  *   0 on success, a negative errno value otherwise and rte_errno is set.
3547  */
3548 static int
3549 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3550                                uint64_t action_flags,
3551                                uint64_t item_flags,
3552                                const struct rte_flow_attr *attr,
3553                                struct rte_flow_error *error)
3554 {
3555         RTE_SET_USED(dev);
3556
3557         if (attr->group == 0 && !attr->transfer)
3558                 return rte_flow_error_set(error, ENOTSUP,
3559                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3560                                           NULL,
3561                                           "Only support non-root table");
3562         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3563                 return rte_flow_error_set(error, ENOTSUP,
3564                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3565                                           "CT cannot follow a fate action");
3566         if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3567             (action_flags & MLX5_FLOW_ACTION_AGE))
3568                 return rte_flow_error_set(error, EINVAL,
3569                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3570                                           "Only one ASO action is supported");
3571         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3572                 return rte_flow_error_set(error, EINVAL,
3573                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3574                                           "Encap cannot exist before CT");
3575         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3576                 return rte_flow_error_set(error, EINVAL,
3577                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3578                                           "Not a outer TCP packet");
3579         return 0;
3580 }
3581
3582 int
3583 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3584                              struct mlx5_list_entry *entry, void *cb_ctx)
3585 {
3586         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3587         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3588         struct mlx5_flow_dv_encap_decap_resource *resource;
3589
3590         resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3591                                 entry);
3592         if (resource->reformat_type == ctx_resource->reformat_type &&
3593             resource->ft_type == ctx_resource->ft_type &&
3594             resource->flags == ctx_resource->flags &&
3595             resource->size == ctx_resource->size &&
3596             !memcmp((const void *)resource->buf,
3597                     (const void *)ctx_resource->buf,
3598                     resource->size))
3599                 return 0;
3600         return -1;
3601 }
3602
3603 struct mlx5_list_entry *
3604 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3605 {
3606         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3607         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3608         struct mlx5dv_dr_domain *domain;
3609         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3610         struct mlx5_flow_dv_encap_decap_resource *resource;
3611         uint32_t idx;
3612         int ret;
3613
3614         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3615                 domain = sh->fdb_domain;
3616         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3617                 domain = sh->rx_domain;
3618         else
3619                 domain = sh->tx_domain;
3620         /* Register new encap/decap resource. */
3621         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3622         if (!resource) {
3623                 rte_flow_error_set(ctx->error, ENOMEM,
3624                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3625                                    "cannot allocate resource memory");
3626                 return NULL;
3627         }
3628         *resource = *ctx_resource;
3629         resource->idx = idx;
3630         ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->cdev->ctx,
3631                                                               domain, resource,
3632                                                              &resource->action);
3633         if (ret) {
3634                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3635                 rte_flow_error_set(ctx->error, ENOMEM,
3636                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3637                                    NULL, "cannot create action");
3638                 return NULL;
3639         }
3640
3641         return &resource->entry;
3642 }
3643
3644 struct mlx5_list_entry *
3645 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3646                              void *cb_ctx)
3647 {
3648         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3649         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3650         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3651         uint32_t idx;
3652
3653         cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3654                                            &idx);
3655         if (!cache_resource) {
3656                 rte_flow_error_set(ctx->error, ENOMEM,
3657                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3658                                    "cannot allocate resource memory");
3659                 return NULL;
3660         }
3661         memcpy(cache_resource, oentry, sizeof(*cache_resource));
3662         cache_resource->idx = idx;
3663         return &cache_resource->entry;
3664 }
3665
3666 void
3667 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3668 {
3669         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3670         struct mlx5_flow_dv_encap_decap_resource *res =
3671                                        container_of(entry, typeof(*res), entry);
3672
3673         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3674 }
3675
3676 /**
3677  * Find existing encap/decap resource or create and register a new one.
3678  *
3679  * @param[in, out] dev
3680  *   Pointer to rte_eth_dev structure.
3681  * @param[in, out] resource
3682  *   Pointer to encap/decap resource.
3683  * @parm[in, out] dev_flow
3684  *   Pointer to the dev_flow.
3685  * @param[out] error
3686  *   pointer to error structure.
3687  *
3688  * @return
3689  *   0 on success otherwise -errno and errno is set.
3690  */
3691 static int
3692 flow_dv_encap_decap_resource_register
3693                         (struct rte_eth_dev *dev,
3694                          struct mlx5_flow_dv_encap_decap_resource *resource,
3695                          struct mlx5_flow *dev_flow,
3696                          struct rte_flow_error *error)
3697 {
3698         struct mlx5_priv *priv = dev->data->dev_private;
3699         struct mlx5_dev_ctx_shared *sh = priv->sh;
3700         struct mlx5_list_entry *entry;
3701         union {
3702                 struct {
3703                         uint32_t ft_type:8;
3704                         uint32_t refmt_type:8;
3705                         /*
3706                          * Header reformat actions can be shared between
3707                          * non-root tables. One bit to indicate non-root
3708                          * table or not.
3709                          */
3710                         uint32_t is_root:1;
3711                         uint32_t reserve:15;
3712                 };
3713                 uint32_t v32;
3714         } encap_decap_key = {
3715                 {
3716                         .ft_type = resource->ft_type,
3717                         .refmt_type = resource->reformat_type,
3718                         .is_root = !!dev_flow->dv.group,
3719                         .reserve = 0,
3720                 }
3721         };
3722         struct mlx5_flow_cb_ctx ctx = {
3723                 .error = error,
3724                 .data = resource,
3725         };
3726         struct mlx5_hlist *encaps_decaps;
3727         uint64_t key64;
3728
3729         encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3730                                 "encaps_decaps",
3731                                 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3732                                 true, true, sh,
3733                                 flow_dv_encap_decap_create_cb,
3734                                 flow_dv_encap_decap_match_cb,
3735                                 flow_dv_encap_decap_remove_cb,
3736                                 flow_dv_encap_decap_clone_cb,
3737                                 flow_dv_encap_decap_clone_free_cb,
3738                                 error);
3739         if (unlikely(!encaps_decaps))
3740                 return -rte_errno;
3741         resource->flags = dev_flow->dv.group ? 0 : 1;
3742         key64 =  __rte_raw_cksum(&encap_decap_key.v32,
3743                                  sizeof(encap_decap_key.v32), 0);
3744         if (resource->reformat_type !=
3745             MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3746             resource->size)
3747                 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3748         entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3749         if (!entry)
3750                 return -rte_errno;
3751         resource = container_of(entry, typeof(*resource), entry);
3752         dev_flow->dv.encap_decap = resource;
3753         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3754         return 0;
3755 }
3756
3757 /**
3758  * Find existing table jump resource or create and register a new one.
3759  *
3760  * @param[in, out] dev
3761  *   Pointer to rte_eth_dev structure.
3762  * @param[in, out] tbl
3763  *   Pointer to flow table resource.
3764  * @parm[in, out] dev_flow
3765  *   Pointer to the dev_flow.
3766  * @param[out] error
3767  *   pointer to error structure.
3768  *
3769  * @return
3770  *   0 on success otherwise -errno and errno is set.
3771  */
3772 static int
3773 flow_dv_jump_tbl_resource_register
3774                         (struct rte_eth_dev *dev __rte_unused,
3775                          struct mlx5_flow_tbl_resource *tbl,
3776                          struct mlx5_flow *dev_flow,
3777                          struct rte_flow_error *error __rte_unused)
3778 {
3779         struct mlx5_flow_tbl_data_entry *tbl_data =
3780                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3781
3782         MLX5_ASSERT(tbl);
3783         MLX5_ASSERT(tbl_data->jump.action);
3784         dev_flow->handle->rix_jump = tbl_data->idx;
3785         dev_flow->dv.jump = &tbl_data->jump;
3786         return 0;
3787 }
3788
3789 int
3790 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3791                          struct mlx5_list_entry *entry, void *cb_ctx)
3792 {
3793         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3794         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3795         struct mlx5_flow_dv_port_id_action_resource *res =
3796                                        container_of(entry, typeof(*res), entry);
3797
3798         return ref->port_id != res->port_id;
3799 }
3800
3801 struct mlx5_list_entry *
3802 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3803 {
3804         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3805         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3806         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3807         struct mlx5_flow_dv_port_id_action_resource *resource;
3808         uint32_t idx;
3809         int ret;
3810
3811         /* Register new port id action resource. */
3812         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3813         if (!resource) {
3814                 rte_flow_error_set(ctx->error, ENOMEM,
3815                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3816                                    "cannot allocate port_id action memory");
3817                 return NULL;
3818         }
3819         *resource = *ref;
3820         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3821                                                         ref->port_id,
3822                                                         &resource->action);
3823         if (ret) {
3824                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3825                 rte_flow_error_set(ctx->error, ENOMEM,
3826                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3827                                    "cannot create action");
3828                 return NULL;
3829         }
3830         resource->idx = idx;
3831         return &resource->entry;
3832 }
3833
3834 struct mlx5_list_entry *
3835 flow_dv_port_id_clone_cb(void *tool_ctx,
3836                          struct mlx5_list_entry *entry __rte_unused,
3837                          void *cb_ctx)
3838 {
3839         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3840         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3841         struct mlx5_flow_dv_port_id_action_resource *resource;
3842         uint32_t idx;
3843
3844         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3845         if (!resource) {
3846                 rte_flow_error_set(ctx->error, ENOMEM,
3847                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3848                                    "cannot allocate port_id action memory");
3849                 return NULL;
3850         }
3851         memcpy(resource, entry, sizeof(*resource));
3852         resource->idx = idx;
3853         return &resource->entry;
3854 }
3855
3856 void
3857 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3858 {
3859         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3860         struct mlx5_flow_dv_port_id_action_resource *resource =
3861                                   container_of(entry, typeof(*resource), entry);
3862
3863         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3864 }
3865
3866 /**
3867  * Find existing table port ID resource or create and register a new one.
3868  *
3869  * @param[in, out] dev
3870  *   Pointer to rte_eth_dev structure.
3871  * @param[in, out] ref
3872  *   Pointer to port ID action resource reference.
3873  * @parm[in, out] dev_flow
3874  *   Pointer to the dev_flow.
3875  * @param[out] error
3876  *   pointer to error structure.
3877  *
3878  * @return
3879  *   0 on success otherwise -errno and errno is set.
3880  */
3881 static int
3882 flow_dv_port_id_action_resource_register
3883                         (struct rte_eth_dev *dev,
3884                          struct mlx5_flow_dv_port_id_action_resource *ref,
3885                          struct mlx5_flow *dev_flow,
3886                          struct rte_flow_error *error)
3887 {
3888         struct mlx5_priv *priv = dev->data->dev_private;
3889         struct mlx5_list_entry *entry;
3890         struct mlx5_flow_dv_port_id_action_resource *resource;
3891         struct mlx5_flow_cb_ctx ctx = {
3892                 .error = error,
3893                 .data = ref,
3894         };
3895
3896         entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3897         if (!entry)
3898                 return -rte_errno;
3899         resource = container_of(entry, typeof(*resource), entry);
3900         dev_flow->dv.port_id_action = resource;
3901         dev_flow->handle->rix_port_id_action = resource->idx;
3902         return 0;
3903 }
3904
3905 int
3906 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3907                            struct mlx5_list_entry *entry, void *cb_ctx)
3908 {
3909         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3910         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3911         struct mlx5_flow_dv_push_vlan_action_resource *res =
3912                                        container_of(entry, typeof(*res), entry);
3913
3914         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3915 }
3916
3917 struct mlx5_list_entry *
3918 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3919 {
3920         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3921         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3922         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3923         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3924         struct mlx5dv_dr_domain *domain;
3925         uint32_t idx;
3926         int ret;
3927
3928         /* Register new port id action resource. */
3929         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3930         if (!resource) {
3931                 rte_flow_error_set(ctx->error, ENOMEM,
3932                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3933                                    "cannot allocate push_vlan action memory");
3934                 return NULL;
3935         }
3936         *resource = *ref;
3937         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3938                 domain = sh->fdb_domain;
3939         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3940                 domain = sh->rx_domain;
3941         else
3942                 domain = sh->tx_domain;
3943         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3944                                                         &resource->action);
3945         if (ret) {
3946                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3947                 rte_flow_error_set(ctx->error, ENOMEM,
3948                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3949                                    "cannot create push vlan action");
3950                 return NULL;
3951         }
3952         resource->idx = idx;
3953         return &resource->entry;
3954 }
3955
3956 struct mlx5_list_entry *
3957 flow_dv_push_vlan_clone_cb(void *tool_ctx,
3958                            struct mlx5_list_entry *entry __rte_unused,
3959                            void *cb_ctx)
3960 {
3961         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3962         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3963         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3964         uint32_t idx;
3965
3966         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3967         if (!resource) {
3968                 rte_flow_error_set(ctx->error, ENOMEM,
3969                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3970                                    "cannot allocate push_vlan action memory");
3971                 return NULL;
3972         }
3973         memcpy(resource, entry, sizeof(*resource));
3974         resource->idx = idx;
3975         return &resource->entry;
3976 }
3977
3978 void
3979 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3980 {
3981         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3982         struct mlx5_flow_dv_push_vlan_action_resource *resource =
3983                                   container_of(entry, typeof(*resource), entry);
3984
3985         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
3986 }
3987
3988 /**
3989  * Find existing push vlan resource or create and register a new one.
3990  *
3991  * @param [in, out] dev
3992  *   Pointer to rte_eth_dev structure.
3993  * @param[in, out] ref
3994  *   Pointer to port ID action resource reference.
3995  * @parm[in, out] dev_flow
3996  *   Pointer to the dev_flow.
3997  * @param[out] error
3998  *   pointer to error structure.
3999  *
4000  * @return
4001  *   0 on success otherwise -errno and errno is set.
4002  */
4003 static int
4004 flow_dv_push_vlan_action_resource_register
4005                        (struct rte_eth_dev *dev,
4006                         struct mlx5_flow_dv_push_vlan_action_resource *ref,
4007                         struct mlx5_flow *dev_flow,
4008                         struct rte_flow_error *error)
4009 {
4010         struct mlx5_priv *priv = dev->data->dev_private;
4011         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4012         struct mlx5_list_entry *entry;
4013         struct mlx5_flow_cb_ctx ctx = {
4014                 .error = error,
4015                 .data = ref,
4016         };
4017
4018         entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4019         if (!entry)
4020                 return -rte_errno;
4021         resource = container_of(entry, typeof(*resource), entry);
4022
4023         dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4024         dev_flow->dv.push_vlan_res = resource;
4025         return 0;
4026 }
4027
4028 /**
4029  * Get the size of specific rte_flow_item_type hdr size
4030  *
4031  * @param[in] item_type
4032  *   Tested rte_flow_item_type.
4033  *
4034  * @return
4035  *   sizeof struct item_type, 0 if void or irrelevant.
4036  */
4037 size_t
4038 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4039 {
4040         size_t retval;
4041
4042         switch (item_type) {
4043         case RTE_FLOW_ITEM_TYPE_ETH:
4044                 retval = sizeof(struct rte_ether_hdr);
4045                 break;
4046         case RTE_FLOW_ITEM_TYPE_VLAN:
4047                 retval = sizeof(struct rte_vlan_hdr);
4048                 break;
4049         case RTE_FLOW_ITEM_TYPE_IPV4:
4050                 retval = sizeof(struct rte_ipv4_hdr);
4051                 break;
4052         case RTE_FLOW_ITEM_TYPE_IPV6:
4053                 retval = sizeof(struct rte_ipv6_hdr);
4054                 break;
4055         case RTE_FLOW_ITEM_TYPE_UDP:
4056                 retval = sizeof(struct rte_udp_hdr);
4057                 break;
4058         case RTE_FLOW_ITEM_TYPE_TCP:
4059                 retval = sizeof(struct rte_tcp_hdr);
4060                 break;
4061         case RTE_FLOW_ITEM_TYPE_VXLAN:
4062         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4063                 retval = sizeof(struct rte_vxlan_hdr);
4064                 break;
4065         case RTE_FLOW_ITEM_TYPE_GRE:
4066         case RTE_FLOW_ITEM_TYPE_NVGRE:
4067                 retval = sizeof(struct rte_gre_hdr);
4068                 break;
4069         case RTE_FLOW_ITEM_TYPE_MPLS:
4070                 retval = sizeof(struct rte_mpls_hdr);
4071                 break;
4072         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4073         default:
4074                 retval = 0;
4075                 break;
4076         }
4077         return retval;
4078 }
4079
4080 #define MLX5_ENCAP_IPV4_VERSION         0x40
4081 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
4082 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
4083 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
4084 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
4085 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
4086 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
4087
4088 /**
4089  * Convert the encap action data from list of rte_flow_item to raw buffer
4090  *
4091  * @param[in] items
4092  *   Pointer to rte_flow_item objects list.
4093  * @param[out] buf
4094  *   Pointer to the output buffer.
4095  * @param[out] size
4096  *   Pointer to the output buffer size.
4097  * @param[out] error
4098  *   Pointer to the error structure.
4099  *
4100  * @return
4101  *   0 on success, a negative errno value otherwise and rte_errno is set.
4102  */
4103 int
4104 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4105                            size_t *size, struct rte_flow_error *error)
4106 {
4107         struct rte_ether_hdr *eth = NULL;
4108         struct rte_vlan_hdr *vlan = NULL;
4109         struct rte_ipv4_hdr *ipv4 = NULL;
4110         struct rte_ipv6_hdr *ipv6 = NULL;
4111         struct rte_udp_hdr *udp = NULL;
4112         struct rte_vxlan_hdr *vxlan = NULL;
4113         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4114         struct rte_gre_hdr *gre = NULL;
4115         size_t len;
4116         size_t temp_size = 0;
4117
4118         if (!items)
4119                 return rte_flow_error_set(error, EINVAL,
4120                                           RTE_FLOW_ERROR_TYPE_ACTION,
4121                                           NULL, "invalid empty data");
4122         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4123                 len = flow_dv_get_item_hdr_len(items->type);
4124                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4125                         return rte_flow_error_set(error, EINVAL,
4126                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4127                                                   (void *)items->type,
4128                                                   "items total size is too big"
4129                                                   " for encap action");
4130                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4131                 switch (items->type) {
4132                 case RTE_FLOW_ITEM_TYPE_ETH:
4133                         eth = (struct rte_ether_hdr *)&buf[temp_size];
4134                         break;
4135                 case RTE_FLOW_ITEM_TYPE_VLAN:
4136                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4137                         if (!eth)
4138                                 return rte_flow_error_set(error, EINVAL,
4139                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4140                                                 (void *)items->type,
4141                                                 "eth header not found");
4142                         if (!eth->ether_type)
4143                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4144                         break;
4145                 case RTE_FLOW_ITEM_TYPE_IPV4:
4146                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4147                         if (!vlan && !eth)
4148                                 return rte_flow_error_set(error, EINVAL,
4149                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4150                                                 (void *)items->type,
4151                                                 "neither eth nor vlan"
4152                                                 " header found");
4153                         if (vlan && !vlan->eth_proto)
4154                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4155                         else if (eth && !eth->ether_type)
4156                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4157                         if (!ipv4->version_ihl)
4158                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4159                                                     MLX5_ENCAP_IPV4_IHL_MIN;
4160                         if (!ipv4->time_to_live)
4161                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4162                         break;
4163                 case RTE_FLOW_ITEM_TYPE_IPV6:
4164                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4165                         if (!vlan && !eth)
4166                                 return rte_flow_error_set(error, EINVAL,
4167                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4168                                                 (void *)items->type,
4169                                                 "neither eth nor vlan"
4170                                                 " header found");
4171                         if (vlan && !vlan->eth_proto)
4172                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4173                         else if (eth && !eth->ether_type)
4174                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4175                         if (!ipv6->vtc_flow)
4176                                 ipv6->vtc_flow =
4177                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4178                         if (!ipv6->hop_limits)
4179                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4180                         break;
4181                 case RTE_FLOW_ITEM_TYPE_UDP:
4182                         udp = (struct rte_udp_hdr *)&buf[temp_size];
4183                         if (!ipv4 && !ipv6)
4184                                 return rte_flow_error_set(error, EINVAL,
4185                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4186                                                 (void *)items->type,
4187                                                 "ip header not found");
4188                         if (ipv4 && !ipv4->next_proto_id)
4189                                 ipv4->next_proto_id = IPPROTO_UDP;
4190                         else if (ipv6 && !ipv6->proto)
4191                                 ipv6->proto = IPPROTO_UDP;
4192                         break;
4193                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4194                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4195                         if (!udp)
4196                                 return rte_flow_error_set(error, EINVAL,
4197                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4198                                                 (void *)items->type,
4199                                                 "udp header not found");
4200                         if (!udp->dst_port)
4201                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4202                         if (!vxlan->vx_flags)
4203                                 vxlan->vx_flags =
4204                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4205                         break;
4206                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4207                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4208                         if (!udp)
4209                                 return rte_flow_error_set(error, EINVAL,
4210                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4211                                                 (void *)items->type,
4212                                                 "udp header not found");
4213                         if (!vxlan_gpe->proto)
4214                                 return rte_flow_error_set(error, EINVAL,
4215                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4216                                                 (void *)items->type,
4217                                                 "next protocol not found");
4218                         if (!udp->dst_port)
4219                                 udp->dst_port =
4220                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4221                         if (!vxlan_gpe->vx_flags)
4222                                 vxlan_gpe->vx_flags =
4223                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4224                         break;
4225                 case RTE_FLOW_ITEM_TYPE_GRE:
4226                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4227                         gre = (struct rte_gre_hdr *)&buf[temp_size];
4228                         if (!gre->proto)
4229                                 return rte_flow_error_set(error, EINVAL,
4230                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4231                                                 (void *)items->type,
4232                                                 "next protocol not found");
4233                         if (!ipv4 && !ipv6)
4234                                 return rte_flow_error_set(error, EINVAL,
4235                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4236                                                 (void *)items->type,
4237                                                 "ip header not found");
4238                         if (ipv4 && !ipv4->next_proto_id)
4239                                 ipv4->next_proto_id = IPPROTO_GRE;
4240                         else if (ipv6 && !ipv6->proto)
4241                                 ipv6->proto = IPPROTO_GRE;
4242                         break;
4243                 case RTE_FLOW_ITEM_TYPE_VOID:
4244                         break;
4245                 default:
4246                         return rte_flow_error_set(error, EINVAL,
4247                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4248                                                   (void *)items->type,
4249                                                   "unsupported item type");
4250                         break;
4251                 }
4252                 temp_size += len;
4253         }
4254         *size = temp_size;
4255         return 0;
4256 }
4257
4258 static int
4259 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4260 {
4261         struct rte_ether_hdr *eth = NULL;
4262         struct rte_vlan_hdr *vlan = NULL;
4263         struct rte_ipv6_hdr *ipv6 = NULL;
4264         struct rte_udp_hdr *udp = NULL;
4265         char *next_hdr;
4266         uint16_t proto;
4267
4268         eth = (struct rte_ether_hdr *)data;
4269         next_hdr = (char *)(eth + 1);
4270         proto = RTE_BE16(eth->ether_type);
4271
4272         /* VLAN skipping */
4273         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4274                 vlan = (struct rte_vlan_hdr *)next_hdr;
4275                 proto = RTE_BE16(vlan->eth_proto);
4276                 next_hdr += sizeof(struct rte_vlan_hdr);
4277         }
4278
4279         /* HW calculates IPv4 csum. no need to proceed */
4280         if (proto == RTE_ETHER_TYPE_IPV4)
4281                 return 0;
4282
4283         /* non IPv4/IPv6 header. not supported */
4284         if (proto != RTE_ETHER_TYPE_IPV6) {
4285                 return rte_flow_error_set(error, ENOTSUP,
4286                                           RTE_FLOW_ERROR_TYPE_ACTION,
4287                                           NULL, "Cannot offload non IPv4/IPv6");
4288         }
4289
4290         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4291
4292         /* ignore non UDP */
4293         if (ipv6->proto != IPPROTO_UDP)
4294                 return 0;
4295
4296         udp = (struct rte_udp_hdr *)(ipv6 + 1);
4297         udp->dgram_cksum = 0;
4298
4299         return 0;
4300 }
4301
4302 /**
4303  * Convert L2 encap action to DV specification.
4304  *
4305  * @param[in] dev
4306  *   Pointer to rte_eth_dev structure.
4307  * @param[in] action
4308  *   Pointer to action structure.
4309  * @param[in, out] dev_flow
4310  *   Pointer to the mlx5_flow.
4311  * @param[in] transfer
4312  *   Mark if the flow is E-Switch flow.
4313  * @param[out] error
4314  *   Pointer to the error structure.
4315  *
4316  * @return
4317  *   0 on success, a negative errno value otherwise and rte_errno is set.
4318  */
4319 static int
4320 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4321                                const struct rte_flow_action *action,
4322                                struct mlx5_flow *dev_flow,
4323                                uint8_t transfer,
4324                                struct rte_flow_error *error)
4325 {
4326         const struct rte_flow_item *encap_data;
4327         const struct rte_flow_action_raw_encap *raw_encap_data;
4328         struct mlx5_flow_dv_encap_decap_resource res = {
4329                 .reformat_type =
4330                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4331                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4332                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4333         };
4334
4335         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4336                 raw_encap_data =
4337                         (const struct rte_flow_action_raw_encap *)action->conf;
4338                 res.size = raw_encap_data->size;
4339                 memcpy(res.buf, raw_encap_data->data, res.size);
4340         } else {
4341                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4342                         encap_data =
4343                                 ((const struct rte_flow_action_vxlan_encap *)
4344                                                 action->conf)->definition;
4345                 else
4346                         encap_data =
4347                                 ((const struct rte_flow_action_nvgre_encap *)
4348                                                 action->conf)->definition;
4349                 if (flow_dv_convert_encap_data(encap_data, res.buf,
4350                                                &res.size, error))
4351                         return -rte_errno;
4352         }
4353         if (flow_dv_zero_encap_udp_csum(res.buf, error))
4354                 return -rte_errno;
4355         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4356                 return rte_flow_error_set(error, EINVAL,
4357                                           RTE_FLOW_ERROR_TYPE_ACTION,
4358                                           NULL, "can't create L2 encap action");
4359         return 0;
4360 }
4361
4362 /**
4363  * Convert L2 decap action to DV specification.
4364  *
4365  * @param[in] dev
4366  *   Pointer to rte_eth_dev structure.
4367  * @param[in, out] dev_flow
4368  *   Pointer to the mlx5_flow.
4369  * @param[in] transfer
4370  *   Mark if the flow is E-Switch flow.
4371  * @param[out] error
4372  *   Pointer to the error structure.
4373  *
4374  * @return
4375  *   0 on success, a negative errno value otherwise and rte_errno is set.
4376  */
4377 static int
4378 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4379                                struct mlx5_flow *dev_flow,
4380                                uint8_t transfer,
4381                                struct rte_flow_error *error)
4382 {
4383         struct mlx5_flow_dv_encap_decap_resource res = {
4384                 .size = 0,
4385                 .reformat_type =
4386                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4387                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4388                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4389         };
4390
4391         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4392                 return rte_flow_error_set(error, EINVAL,
4393                                           RTE_FLOW_ERROR_TYPE_ACTION,
4394                                           NULL, "can't create L2 decap action");
4395         return 0;
4396 }
4397
4398 /**
4399  * Convert raw decap/encap (L3 tunnel) action to DV specification.
4400  *
4401  * @param[in] dev
4402  *   Pointer to rte_eth_dev structure.
4403  * @param[in] action
4404  *   Pointer to action structure.
4405  * @param[in, out] dev_flow
4406  *   Pointer to the mlx5_flow.
4407  * @param[in] attr
4408  *   Pointer to the flow attributes.
4409  * @param[out] error
4410  *   Pointer to the error structure.
4411  *
4412  * @return
4413  *   0 on success, a negative errno value otherwise and rte_errno is set.
4414  */
4415 static int
4416 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4417                                 const struct rte_flow_action *action,
4418                                 struct mlx5_flow *dev_flow,
4419                                 const struct rte_flow_attr *attr,
4420                                 struct rte_flow_error *error)
4421 {
4422         const struct rte_flow_action_raw_encap *encap_data;
4423         struct mlx5_flow_dv_encap_decap_resource res;
4424
4425         memset(&res, 0, sizeof(res));
4426         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4427         res.size = encap_data->size;
4428         memcpy(res.buf, encap_data->data, res.size);
4429         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4430                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4431                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4432         if (attr->transfer)
4433                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4434         else
4435                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4436                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4437         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4438                 return rte_flow_error_set(error, EINVAL,
4439                                           RTE_FLOW_ERROR_TYPE_ACTION,
4440                                           NULL, "can't create encap action");
4441         return 0;
4442 }
4443
4444 /**
4445  * Create action push VLAN.
4446  *
4447  * @param[in] dev
4448  *   Pointer to rte_eth_dev structure.
4449  * @param[in] attr
4450  *   Pointer to the flow attributes.
4451  * @param[in] vlan
4452  *   Pointer to the vlan to push to the Ethernet header.
4453  * @param[in, out] dev_flow
4454  *   Pointer to the mlx5_flow.
4455  * @param[out] error
4456  *   Pointer to the error structure.
4457  *
4458  * @return
4459  *   0 on success, a negative errno value otherwise and rte_errno is set.
4460  */
4461 static int
4462 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4463                                 const struct rte_flow_attr *attr,
4464                                 const struct rte_vlan_hdr *vlan,
4465                                 struct mlx5_flow *dev_flow,
4466                                 struct rte_flow_error *error)
4467 {
4468         struct mlx5_flow_dv_push_vlan_action_resource res;
4469
4470         memset(&res, 0, sizeof(res));
4471         res.vlan_tag =
4472                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4473                                  vlan->vlan_tci);
4474         if (attr->transfer)
4475                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4476         else
4477                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4478                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4479         return flow_dv_push_vlan_action_resource_register
4480                                             (dev, &res, dev_flow, error);
4481 }
4482
4483 /**
4484  * Validate the modify-header actions.
4485  *
4486  * @param[in] action_flags
4487  *   Holds the actions detected until now.
4488  * @param[in] action
4489  *   Pointer to the modify action.
4490  * @param[out] error
4491  *   Pointer to error structure.
4492  *
4493  * @return
4494  *   0 on success, a negative errno value otherwise and rte_errno is set.
4495  */
4496 static int
4497 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4498                                    const struct rte_flow_action *action,
4499                                    struct rte_flow_error *error)
4500 {
4501         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4502                 return rte_flow_error_set(error, EINVAL,
4503                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4504                                           NULL, "action configuration not set");
4505         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4506                 return rte_flow_error_set(error, EINVAL,
4507                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4508                                           "can't have encap action before"
4509                                           " modify action");
4510         return 0;
4511 }
4512
4513 /**
4514  * Validate the modify-header MAC address actions.
4515  *
4516  * @param[in] action_flags
4517  *   Holds the actions detected until now.
4518  * @param[in] action
4519  *   Pointer to the modify action.
4520  * @param[in] item_flags
4521  *   Holds the items detected.
4522  * @param[out] error
4523  *   Pointer to error structure.
4524  *
4525  * @return
4526  *   0 on success, a negative errno value otherwise and rte_errno is set.
4527  */
4528 static int
4529 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4530                                    const struct rte_flow_action *action,
4531                                    const uint64_t item_flags,
4532                                    struct rte_flow_error *error)
4533 {
4534         int ret = 0;
4535
4536         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4537         if (!ret) {
4538                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4539                         return rte_flow_error_set(error, EINVAL,
4540                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4541                                                   NULL,
4542                                                   "no L2 item in pattern");
4543         }
4544         return ret;
4545 }
4546
4547 /**
4548  * Validate the modify-header IPv4 address actions.
4549  *
4550  * @param[in] action_flags
4551  *   Holds the actions detected until now.
4552  * @param[in] action
4553  *   Pointer to the modify action.
4554  * @param[in] item_flags
4555  *   Holds the items detected.
4556  * @param[out] error
4557  *   Pointer to error structure.
4558  *
4559  * @return
4560  *   0 on success, a negative errno value otherwise and rte_errno is set.
4561  */
4562 static int
4563 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4564                                     const struct rte_flow_action *action,
4565                                     const uint64_t item_flags,
4566                                     struct rte_flow_error *error)
4567 {
4568         int ret = 0;
4569         uint64_t layer;
4570
4571         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4572         if (!ret) {
4573                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4574                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4575                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4576                 if (!(item_flags & layer))
4577                         return rte_flow_error_set(error, EINVAL,
4578                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4579                                                   NULL,
4580                                                   "no ipv4 item in pattern");
4581         }
4582         return ret;
4583 }
4584
4585 /**
4586  * Validate the modify-header IPv6 address actions.
4587  *
4588  * @param[in] action_flags
4589  *   Holds the actions detected until now.
4590  * @param[in] action
4591  *   Pointer to the modify action.
4592  * @param[in] item_flags
4593  *   Holds the items detected.
4594  * @param[out] error
4595  *   Pointer to error structure.
4596  *
4597  * @return
4598  *   0 on success, a negative errno value otherwise and rte_errno is set.
4599  */
4600 static int
4601 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4602                                     const struct rte_flow_action *action,
4603                                     const uint64_t item_flags,
4604                                     struct rte_flow_error *error)
4605 {
4606         int ret = 0;
4607         uint64_t layer;
4608
4609         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4610         if (!ret) {
4611                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4612                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4613                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4614                 if (!(item_flags & layer))
4615                         return rte_flow_error_set(error, EINVAL,
4616                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4617                                                   NULL,
4618                                                   "no ipv6 item in pattern");
4619         }
4620         return ret;
4621 }
4622
4623 /**
4624  * Validate the modify-header TP actions.
4625  *
4626  * @param[in] action_flags
4627  *   Holds the actions detected until now.
4628  * @param[in] action
4629  *   Pointer to the modify action.
4630  * @param[in] item_flags
4631  *   Holds the items detected.
4632  * @param[out] error
4633  *   Pointer to error structure.
4634  *
4635  * @return
4636  *   0 on success, a negative errno value otherwise and rte_errno is set.
4637  */
4638 static int
4639 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4640                                   const struct rte_flow_action *action,
4641                                   const uint64_t item_flags,
4642                                   struct rte_flow_error *error)
4643 {
4644         int ret = 0;
4645         uint64_t layer;
4646
4647         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4648         if (!ret) {
4649                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4650                                  MLX5_FLOW_LAYER_INNER_L4 :
4651                                  MLX5_FLOW_LAYER_OUTER_L4;
4652                 if (!(item_flags & layer))
4653                         return rte_flow_error_set(error, EINVAL,
4654                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4655                                                   NULL, "no transport layer "
4656                                                   "in pattern");
4657         }
4658         return ret;
4659 }
4660
4661 /**
4662  * Validate the modify-header actions of increment/decrement
4663  * TCP Sequence-number.
4664  *
4665  * @param[in] action_flags
4666  *   Holds the actions detected until now.
4667  * @param[in] action
4668  *   Pointer to the modify action.
4669  * @param[in] item_flags
4670  *   Holds the items detected.
4671  * @param[out] error
4672  *   Pointer to error structure.
4673  *
4674  * @return
4675  *   0 on success, a negative errno value otherwise and rte_errno is set.
4676  */
4677 static int
4678 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4679                                        const struct rte_flow_action *action,
4680                                        const uint64_t item_flags,
4681                                        struct rte_flow_error *error)
4682 {
4683         int ret = 0;
4684         uint64_t layer;
4685
4686         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4687         if (!ret) {
4688                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4689                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4690                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4691                 if (!(item_flags & layer))
4692                         return rte_flow_error_set(error, EINVAL,
4693                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4694                                                   NULL, "no TCP item in"
4695                                                   " pattern");
4696                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4697                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4698                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4699                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4700                         return rte_flow_error_set(error, EINVAL,
4701                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4702                                                   NULL,
4703                                                   "cannot decrease and increase"
4704                                                   " TCP sequence number"
4705                                                   " at the same time");
4706         }
4707         return ret;
4708 }
4709
4710 /**
4711  * Validate the modify-header actions of increment/decrement
4712  * TCP Acknowledgment number.
4713  *
4714  * @param[in] action_flags
4715  *   Holds the actions detected until now.
4716  * @param[in] action
4717  *   Pointer to the modify action.
4718  * @param[in] item_flags
4719  *   Holds the items detected.
4720  * @param[out] error
4721  *   Pointer to error structure.
4722  *
4723  * @return
4724  *   0 on success, a negative errno value otherwise and rte_errno is set.
4725  */
4726 static int
4727 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4728                                        const struct rte_flow_action *action,
4729                                        const uint64_t item_flags,
4730                                        struct rte_flow_error *error)
4731 {
4732         int ret = 0;
4733         uint64_t layer;
4734
4735         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4736         if (!ret) {
4737                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4738                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4739                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4740                 if (!(item_flags & layer))
4741                         return rte_flow_error_set(error, EINVAL,
4742                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4743                                                   NULL, "no TCP item in"
4744                                                   " pattern");
4745                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4746                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4747                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4748                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4749                         return rte_flow_error_set(error, EINVAL,
4750                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4751                                                   NULL,
4752                                                   "cannot decrease and increase"
4753                                                   " TCP acknowledgment number"
4754                                                   " at the same time");
4755         }
4756         return ret;
4757 }
4758
4759 /**
4760  * Validate the modify-header TTL actions.
4761  *
4762  * @param[in] action_flags
4763  *   Holds the actions detected until now.
4764  * @param[in] action
4765  *   Pointer to the modify action.
4766  * @param[in] item_flags
4767  *   Holds the items detected.
4768  * @param[out] error
4769  *   Pointer to error structure.
4770  *
4771  * @return
4772  *   0 on success, a negative errno value otherwise and rte_errno is set.
4773  */
4774 static int
4775 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4776                                    const struct rte_flow_action *action,
4777                                    const uint64_t item_flags,
4778                                    struct rte_flow_error *error)
4779 {
4780         int ret = 0;
4781         uint64_t layer;
4782
4783         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4784         if (!ret) {
4785                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4786                                  MLX5_FLOW_LAYER_INNER_L3 :
4787                                  MLX5_FLOW_LAYER_OUTER_L3;
4788                 if (!(item_flags & layer))
4789                         return rte_flow_error_set(error, EINVAL,
4790                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4791                                                   NULL,
4792                                                   "no IP protocol in pattern");
4793         }
4794         return ret;
4795 }
4796
4797 /**
4798  * Validate the generic modify field actions.
4799  * @param[in] dev
4800  *   Pointer to the rte_eth_dev structure.
4801  * @param[in] action_flags
4802  *   Holds the actions detected until now.
4803  * @param[in] action
4804  *   Pointer to the modify action.
4805  * @param[in] attr
4806  *   Pointer to the flow attributes.
4807  * @param[out] error
4808  *   Pointer to error structure.
4809  *
4810  * @return
4811  *   Number of header fields to modify (0 or more) on success,
4812  *   a negative errno value otherwise and rte_errno is set.
4813  */
4814 static int
4815 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4816                                    const uint64_t action_flags,
4817                                    const struct rte_flow_action *action,
4818                                    const struct rte_flow_attr *attr,
4819                                    struct rte_flow_error *error)
4820 {
4821         int ret = 0;
4822         struct mlx5_priv *priv = dev->data->dev_private;
4823         struct mlx5_sh_config *config = &priv->sh->config;
4824         const struct rte_flow_action_modify_field *action_modify_field =
4825                 action->conf;
4826         uint32_t dst_width = mlx5_flow_item_field_width(dev,
4827                                 action_modify_field->dst.field,
4828                                 -1, attr, error);
4829         uint32_t src_width = mlx5_flow_item_field_width(dev,
4830                                 action_modify_field->src.field,
4831                                 dst_width, attr, error);
4832
4833         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4834         if (ret)
4835                 return ret;
4836
4837         if (action_modify_field->width == 0)
4838                 return rte_flow_error_set(error, EINVAL,
4839                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4840                                 "no bits are requested to be modified");
4841         else if (action_modify_field->width > dst_width ||
4842                  action_modify_field->width > src_width)
4843                 return rte_flow_error_set(error, EINVAL,
4844                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4845                                 "cannot modify more bits than"
4846                                 " the width of a field");
4847         if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4848             action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4849                 if ((action_modify_field->dst.offset +
4850                      action_modify_field->width > dst_width) ||
4851                     (action_modify_field->dst.offset % 32))
4852                         return rte_flow_error_set(error, EINVAL,
4853                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4854                                         "destination offset is too big"
4855                                         " or not aligned to 4 bytes");
4856                 if (action_modify_field->dst.level &&
4857                     action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4858                         return rte_flow_error_set(error, ENOTSUP,
4859                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4860                                         "inner header fields modification"
4861                                         " is not supported");
4862         }
4863         if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4864             action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4865                 if (!attr->transfer && !attr->group)
4866                         return rte_flow_error_set(error, ENOTSUP,
4867                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4868                                         "modify field action is not"
4869                                         " supported for group 0");
4870                 if ((action_modify_field->src.offset +
4871                      action_modify_field->width > src_width) ||
4872                     (action_modify_field->src.offset % 32))
4873                         return rte_flow_error_set(error, EINVAL,
4874                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4875                                         "source offset is too big"
4876                                         " or not aligned to 4 bytes");
4877                 if (action_modify_field->src.level &&
4878                     action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4879                         return rte_flow_error_set(error, ENOTSUP,
4880                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4881                                         "inner header fields modification"
4882                                         " is not supported");
4883         }
4884         if ((action_modify_field->dst.field ==
4885              action_modify_field->src.field) &&
4886             (action_modify_field->dst.level ==
4887              action_modify_field->src.level))
4888                 return rte_flow_error_set(error, EINVAL,
4889                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4890                                 "source and destination fields"
4891                                 " cannot be the same");
4892         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4893             action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4894             action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4895                 return rte_flow_error_set(error, EINVAL,
4896                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4897                                 "mark, immediate value or a pointer to it"
4898                                 " cannot be used as a destination");
4899         if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4900             action_modify_field->src.field == RTE_FLOW_FIELD_START)
4901                 return rte_flow_error_set(error, ENOTSUP,
4902                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4903                                 "modifications of an arbitrary"
4904                                 " place in a packet is not supported");
4905         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4906             action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4907                 return rte_flow_error_set(error, ENOTSUP,
4908                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4909                                 "modifications of the 802.1Q Tag"
4910                                 " Identifier is not supported");
4911         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4912             action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4913                 return rte_flow_error_set(error, ENOTSUP,
4914                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4915                                 "modifications of the VXLAN Network"
4916                                 " Identifier is not supported");
4917         if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4918             action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4919                 return rte_flow_error_set(error, ENOTSUP,
4920                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4921                                 "modifications of the GENEVE Network"
4922                                 " Identifier is not supported");
4923         if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4924             action_modify_field->src.field == RTE_FLOW_FIELD_MARK)
4925                 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4926                     !mlx5_flow_ext_mreg_supported(dev))
4927                         return rte_flow_error_set(error, ENOTSUP,
4928                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4929                                         "cannot modify mark in legacy mode"
4930                                         " or without extensive registers");
4931         if (action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4932             action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4933                 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
4934                     !mlx5_flow_ext_mreg_supported(dev))
4935                         return rte_flow_error_set(error, ENOTSUP,
4936                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4937                                         "cannot modify meta without"
4938                                         " extensive registers support");
4939                 ret = flow_dv_get_metadata_reg(dev, attr, error);
4940                 if (ret < 0 || ret == REG_NON)
4941                         return rte_flow_error_set(error, ENOTSUP,
4942                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4943                                         "cannot modify meta without"
4944                                         " extensive registers available");
4945         }
4946         if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4947                 return rte_flow_error_set(error, ENOTSUP,
4948                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4949                                 "add and sub operations"
4950                                 " are not supported");
4951         return (action_modify_field->width / 32) +
4952                !!(action_modify_field->width % 32);
4953 }
4954
4955 /**
4956  * Validate jump action.
4957  *
4958  * @param[in] action
4959  *   Pointer to the jump action.
4960  * @param[in] action_flags
4961  *   Holds the actions detected until now.
4962  * @param[in] attributes
4963  *   Pointer to flow attributes
4964  * @param[in] external
4965  *   Action belongs to flow rule created by request external to PMD.
4966  * @param[out] error
4967  *   Pointer to error structure.
4968  *
4969  * @return
4970  *   0 on success, a negative errno value otherwise and rte_errno is set.
4971  */
4972 static int
4973 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4974                              const struct mlx5_flow_tunnel *tunnel,
4975                              const struct rte_flow_action *action,
4976                              uint64_t action_flags,
4977                              const struct rte_flow_attr *attributes,
4978                              bool external, struct rte_flow_error *error)
4979 {
4980         uint32_t target_group, table = 0;
4981         int ret = 0;
4982         struct flow_grp_info grp_info = {
4983                 .external = !!external,
4984                 .transfer = !!attributes->transfer,
4985                 .fdb_def_rule = 1,
4986                 .std_tbl_fix = 0
4987         };
4988         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4989                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4990                 return rte_flow_error_set(error, EINVAL,
4991                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4992                                           "can't have 2 fate actions in"
4993                                           " same flow");
4994         if (!action->conf)
4995                 return rte_flow_error_set(error, EINVAL,
4996                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4997                                           NULL, "action configuration not set");
4998         target_group =
4999                 ((const struct rte_flow_action_jump *)action->conf)->group;
5000         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
5001                                        &grp_info, error);
5002         if (ret)
5003                 return ret;
5004         if (attributes->group == target_group &&
5005             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
5006                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5007                 return rte_flow_error_set(error, EINVAL,
5008                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5009                                           "target group must be other than"
5010                                           " the current flow group");
5011         if (table == 0)
5012                 return rte_flow_error_set(error, EINVAL,
5013                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5014                                           NULL, "root table shouldn't be destination");
5015         return 0;
5016 }
5017
5018 /*
5019  * Validate action PORT_ID / REPRESENTED_PORT.
5020  *
5021  * @param[in] dev
5022  *   Pointer to rte_eth_dev structure.
5023  * @param[in] action_flags
5024  *   Bit-fields that holds the actions detected until now.
5025  * @param[in] action
5026  *   PORT_ID / REPRESENTED_PORT action structure.
5027  * @param[in] attr
5028  *   Attributes of flow that includes this action.
5029  * @param[out] error
5030  *   Pointer to error structure.
5031  *
5032  * @return
5033  *   0 on success, a negative errno value otherwise and rte_errno is set.
5034  */
5035 static int
5036 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5037                                 uint64_t action_flags,
5038                                 const struct rte_flow_action *action,
5039                                 const struct rte_flow_attr *attr,
5040                                 struct rte_flow_error *error)
5041 {
5042         const struct rte_flow_action_port_id *port_id;
5043         const struct rte_flow_action_ethdev *ethdev;
5044         struct mlx5_priv *act_priv;
5045         struct mlx5_priv *dev_priv;
5046         uint16_t port;
5047
5048         if (!attr->transfer)
5049                 return rte_flow_error_set(error, ENOTSUP,
5050                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5051                                           NULL,
5052                                           "port action is valid in transfer"
5053                                           " mode only");
5054         if (!action || !action->conf)
5055                 return rte_flow_error_set(error, ENOTSUP,
5056                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5057                                           NULL,
5058                                           "port action parameters must be"
5059                                           " specified");
5060         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5061                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5062                 return rte_flow_error_set(error, EINVAL,
5063                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5064                                           "can have only one fate actions in"
5065                                           " a flow");
5066         dev_priv = mlx5_dev_to_eswitch_info(dev);
5067         if (!dev_priv)
5068                 return rte_flow_error_set(error, rte_errno,
5069                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5070                                           NULL,
5071                                           "failed to obtain E-Switch info");
5072         switch (action->type) {
5073         case RTE_FLOW_ACTION_TYPE_PORT_ID:
5074                 port_id = action->conf;
5075                 port = port_id->original ? dev->data->port_id : port_id->id;
5076                 break;
5077         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5078                 ethdev = action->conf;
5079                 port = ethdev->port_id;
5080                 break;
5081         default:
5082                 MLX5_ASSERT(false);
5083                 return rte_flow_error_set
5084                                 (error, EINVAL,
5085                                  RTE_FLOW_ERROR_TYPE_ACTION, action,
5086                                  "unknown E-Switch action");
5087         }
5088         act_priv = mlx5_port_to_eswitch_info(port, false);
5089         if (!act_priv)
5090                 return rte_flow_error_set
5091                                 (error, rte_errno,
5092                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, action->conf,
5093                                  "failed to obtain E-Switch port id for port");
5094         if (act_priv->domain_id != dev_priv->domain_id)
5095                 return rte_flow_error_set
5096                                 (error, EINVAL,
5097                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5098                                  "port does not belong to"
5099                                  " E-Switch being configured");
5100         return 0;
5101 }
5102
5103 /**
5104  * Get the maximum number of modify header actions.
5105  *
5106  * @param dev
5107  *   Pointer to rte_eth_dev structure.
5108  * @param root
5109  *   Whether action is on root table.
5110  *
5111  * @return
5112  *   Max number of modify header actions device can support.
5113  */
5114 static inline unsigned int
5115 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5116                               bool root)
5117 {
5118         /*
5119          * There's no way to directly query the max capacity from FW.
5120          * The maximal value on root table should be assumed to be supported.
5121          */
5122         if (!root)
5123                 return MLX5_MAX_MODIFY_NUM;
5124         else
5125                 return MLX5_ROOT_TBL_MODIFY_NUM;
5126 }
5127
5128 /**
5129  * Validate the meter action.
5130  *
5131  * @param[in] dev
5132  *   Pointer to rte_eth_dev structure.
5133  * @param[in] action_flags
5134  *   Bit-fields that holds the actions detected until now.
5135  * @param[in] item_flags
5136  *   Holds the items detected.
5137  * @param[in] action
5138  *   Pointer to the meter action.
5139  * @param[in] attr
5140  *   Attributes of flow that includes this action.
5141  * @param[in] port_id_item
5142  *   Pointer to item indicating port id.
5143  * @param[out] error
5144  *   Pointer to error structure.
5145  *
5146  * @return
5147  *   0 on success, a negative errno value otherwise and rte_errno is set.
5148  */
5149 static int
5150 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5151                                 uint64_t action_flags, uint64_t item_flags,
5152                                 const struct rte_flow_action *action,
5153                                 const struct rte_flow_attr *attr,
5154                                 const struct rte_flow_item *port_id_item,
5155                                 bool *def_policy,
5156                                 struct rte_flow_error *error)
5157 {
5158         struct mlx5_priv *priv = dev->data->dev_private;
5159         const struct rte_flow_action_meter *am = action->conf;
5160         struct mlx5_flow_meter_info *fm;
5161         struct mlx5_flow_meter_policy *mtr_policy;
5162         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5163
5164         if (!am)
5165                 return rte_flow_error_set(error, EINVAL,
5166                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5167                                           "meter action conf is NULL");
5168
5169         if (action_flags & MLX5_FLOW_ACTION_METER)
5170                 return rte_flow_error_set(error, ENOTSUP,
5171                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5172                                           "meter chaining not support");
5173         if (action_flags & MLX5_FLOW_ACTION_JUMP)
5174                 return rte_flow_error_set(error, ENOTSUP,
5175                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5176                                           "meter with jump not support");
5177         if (!priv->mtr_en)
5178                 return rte_flow_error_set(error, ENOTSUP,
5179                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5180                                           NULL,
5181                                           "meter action not supported");
5182         fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5183         if (!fm)
5184                 return rte_flow_error_set(error, EINVAL,
5185                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5186                                           "Meter not found");
5187         /* aso meter can always be shared by different domains */
5188         if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5189             !(fm->transfer == attr->transfer ||
5190               (!fm->ingress && !attr->ingress && attr->egress) ||
5191               (!fm->egress && !attr->egress && attr->ingress)))
5192                 return rte_flow_error_set(error, EINVAL,
5193                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5194                         "Flow attributes domain are either invalid "
5195                         "or have a domain conflict with current "
5196                         "meter attributes");
5197         if (fm->def_policy) {
5198                 if (!((attr->transfer &&
5199                         mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5200                         (attr->egress &&
5201                         mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5202                         (attr->ingress &&
5203                         mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5204                         return rte_flow_error_set(error, EINVAL,
5205                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5206                                           "Flow attributes domain "
5207                                           "have a conflict with current "
5208                                           "meter domain attributes");
5209                 *def_policy = true;
5210         } else {
5211                 mtr_policy = mlx5_flow_meter_policy_find(dev,
5212                                                 fm->policy_id, NULL);
5213                 if (!mtr_policy)
5214                         return rte_flow_error_set(error, EINVAL,
5215                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5216                                           "Invalid policy id for meter ");
5217                 if (!((attr->transfer && mtr_policy->transfer) ||
5218                         (attr->egress && mtr_policy->egress) ||
5219                         (attr->ingress && mtr_policy->ingress)))
5220                         return rte_flow_error_set(error, EINVAL,
5221                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5222                                           "Flow attributes domain "
5223                                           "have a conflict with current "
5224                                           "meter domain attributes");
5225                 if (attr->transfer && mtr_policy->dev) {
5226                         /**
5227                          * When policy has fate action of port_id,
5228                          * the flow should have the same src port as policy.
5229                          */
5230                         struct mlx5_priv *policy_port_priv =
5231                                         mtr_policy->dev->data->dev_private;
5232                         int32_t flow_src_port = priv->representor_id;
5233
5234                         if (port_id_item) {
5235                                 const struct rte_flow_item_port_id *spec =
5236                                                         port_id_item->spec;
5237                                 struct mlx5_priv *port_priv =
5238                                         mlx5_port_to_eswitch_info(spec->id,
5239                                                                   false);
5240                                 if (!port_priv)
5241                                         return rte_flow_error_set(error,
5242                                                 rte_errno,
5243                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5244                                                 spec,
5245                                                 "Failed to get port info.");
5246                                 flow_src_port = port_priv->representor_id;
5247                         }
5248                         if (flow_src_port != policy_port_priv->representor_id)
5249                                 return rte_flow_error_set(error,
5250                                                 rte_errno,
5251                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5252                                                 NULL,
5253                                                 "Flow and meter policy "
5254                                                 "have different src port.");
5255                 } else if (mtr_policy->is_rss) {
5256                         struct mlx5_flow_meter_policy *fp;
5257                         struct mlx5_meter_policy_action_container *acg;
5258                         struct mlx5_meter_policy_action_container *acy;
5259                         const struct rte_flow_action *rss_act;
5260                         int ret;
5261
5262                         fp = mlx5_flow_meter_hierarchy_get_final_policy(dev,
5263                                                                 mtr_policy);
5264                         if (fp == NULL)
5265                                 return rte_flow_error_set(error, EINVAL,
5266                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5267                                                   "Unable to get the final "
5268                                                   "policy in the hierarchy");
5269                         acg = &fp->act_cnt[RTE_COLOR_GREEN];
5270                         acy = &fp->act_cnt[RTE_COLOR_YELLOW];
5271                         MLX5_ASSERT(acg->fate_action ==
5272                                     MLX5_FLOW_FATE_SHARED_RSS ||
5273                                     acy->fate_action ==
5274                                     MLX5_FLOW_FATE_SHARED_RSS);
5275                         if (acg->fate_action == MLX5_FLOW_FATE_SHARED_RSS)
5276                                 rss_act = acg->rss;
5277                         else
5278                                 rss_act = acy->rss;
5279                         ret = mlx5_flow_validate_action_rss(rss_act,
5280                                         action_flags, dev, attr,
5281                                         item_flags, error);
5282                         if (ret)
5283                                 return ret;
5284                 }
5285                 *def_policy = false;
5286         }
5287         return 0;
5288 }
5289
5290 /**
5291  * Validate the age action.
5292  *
5293  * @param[in] action_flags
5294  *   Holds the actions detected until now.
5295  * @param[in] action
5296  *   Pointer to the age action.
5297  * @param[in] dev
5298  *   Pointer to the Ethernet device structure.
5299  * @param[out] error
5300  *   Pointer to error structure.
5301  *
5302  * @return
5303  *   0 on success, a negative errno value otherwise and rte_errno is set.
5304  */
5305 static int
5306 flow_dv_validate_action_age(uint64_t action_flags,
5307                             const struct rte_flow_action *action,
5308                             struct rte_eth_dev *dev,
5309                             struct rte_flow_error *error)
5310 {
5311         struct mlx5_priv *priv = dev->data->dev_private;
5312         const struct rte_flow_action_age *age = action->conf;
5313
5314         if (!priv->sh->cdev->config.devx ||
5315             (priv->sh->cmng.counter_fallback && !priv->sh->aso_age_mng))
5316                 return rte_flow_error_set(error, ENOTSUP,
5317                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5318                                           NULL,
5319                                           "age action not supported");
5320         if (!(action->conf))
5321                 return rte_flow_error_set(error, EINVAL,
5322                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5323                                           "configuration cannot be null");
5324         if (!(age->timeout))
5325                 return rte_flow_error_set(error, EINVAL,
5326                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5327                                           "invalid timeout value 0");
5328         if (action_flags & MLX5_FLOW_ACTION_AGE)
5329                 return rte_flow_error_set(error, EINVAL,
5330                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5331                                           "duplicate age actions set");
5332         return 0;
5333 }
5334
5335 /**
5336  * Validate the modify-header IPv4 DSCP actions.
5337  *
5338  * @param[in] action_flags
5339  *   Holds the actions detected until now.
5340  * @param[in] action
5341  *   Pointer to the modify action.
5342  * @param[in] item_flags
5343  *   Holds the items detected.
5344  * @param[out] error
5345  *   Pointer to error structure.
5346  *
5347  * @return
5348  *   0 on success, a negative errno value otherwise and rte_errno is set.
5349  */
5350 static int
5351 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5352                                          const struct rte_flow_action *action,
5353                                          const uint64_t item_flags,
5354                                          struct rte_flow_error *error)
5355 {
5356         int ret = 0;
5357
5358         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5359         if (!ret) {
5360                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5361                         return rte_flow_error_set(error, EINVAL,
5362                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5363                                                   NULL,
5364                                                   "no ipv4 item in pattern");
5365         }
5366         return ret;
5367 }
5368
5369 /**
5370  * Validate the modify-header IPv6 DSCP actions.
5371  *
5372  * @param[in] action_flags
5373  *   Holds the actions detected until now.
5374  * @param[in] action
5375  *   Pointer to the modify action.
5376  * @param[in] item_flags
5377  *   Holds the items detected.
5378  * @param[out] error
5379  *   Pointer to error structure.
5380  *
5381  * @return
5382  *   0 on success, a negative errno value otherwise and rte_errno is set.
5383  */
5384 static int
5385 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5386                                          const struct rte_flow_action *action,
5387                                          const uint64_t item_flags,
5388                                          struct rte_flow_error *error)
5389 {
5390         int ret = 0;
5391
5392         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5393         if (!ret) {
5394                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5395                         return rte_flow_error_set(error, EINVAL,
5396                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5397                                                   NULL,
5398                                                   "no ipv6 item in pattern");
5399         }
5400         return ret;
5401 }
5402
5403 int
5404 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5405                         struct mlx5_list_entry *entry, void *cb_ctx)
5406 {
5407         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5408         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5409         struct mlx5_flow_dv_modify_hdr_resource *resource =
5410                                   container_of(entry, typeof(*resource), entry);
5411         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5412
5413         key_len += ref->actions_num * sizeof(ref->actions[0]);
5414         return ref->actions_num != resource->actions_num ||
5415                memcmp(&ref->ft_type, &resource->ft_type, key_len);
5416 }
5417
5418 static struct mlx5_indexed_pool *
5419 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5420 {
5421         struct mlx5_indexed_pool *ipool = __atomic_load_n
5422                                      (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5423
5424         if (!ipool) {
5425                 struct mlx5_indexed_pool *expected = NULL;
5426                 struct mlx5_indexed_pool_config cfg =
5427                     (struct mlx5_indexed_pool_config) {
5428                        .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5429                                                                    (index + 1) *
5430                                            sizeof(struct mlx5_modification_cmd),
5431                        .trunk_size = 64,
5432                        .grow_trunk = 3,
5433                        .grow_shift = 2,
5434                        .need_lock = 1,
5435                        .release_mem_en = !!sh->config.reclaim_mode,
5436                        .per_core_cache =
5437                                        sh->config.reclaim_mode ? 0 : (1 << 16),
5438                        .malloc = mlx5_malloc,
5439                        .free = mlx5_free,
5440                        .type = "mlx5_modify_action_resource",
5441                 };
5442
5443                 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5444                 ipool = mlx5_ipool_create(&cfg);
5445                 if (!ipool)
5446                         return NULL;
5447                 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5448                                                  &expected, ipool, false,
5449                                                  __ATOMIC_SEQ_CST,
5450                                                  __ATOMIC_SEQ_CST)) {
5451                         mlx5_ipool_destroy(ipool);
5452                         ipool = __atomic_load_n(&sh->mdh_ipools[index],
5453                                                 __ATOMIC_SEQ_CST);
5454                 }
5455         }
5456         return ipool;
5457 }
5458
5459 struct mlx5_list_entry *
5460 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5461 {
5462         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5463         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5464         struct mlx5dv_dr_domain *ns;
5465         struct mlx5_flow_dv_modify_hdr_resource *entry;
5466         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5467         struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5468                                                           ref->actions_num - 1);
5469         int ret;
5470         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5471         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5472         uint32_t idx;
5473
5474         if (unlikely(!ipool)) {
5475                 rte_flow_error_set(ctx->error, ENOMEM,
5476                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5477                                    NULL, "cannot allocate modify ipool");
5478                 return NULL;
5479         }
5480         entry = mlx5_ipool_zmalloc(ipool, &idx);
5481         if (!entry) {
5482                 rte_flow_error_set(ctx->error, ENOMEM,
5483                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5484                                    "cannot allocate resource memory");
5485                 return NULL;
5486         }
5487         rte_memcpy(&entry->ft_type,
5488                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5489                    key_len + data_len);
5490         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5491                 ns = sh->fdb_domain;
5492         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5493                 ns = sh->tx_domain;
5494         else
5495                 ns = sh->rx_domain;
5496         ret = mlx5_flow_os_create_flow_action_modify_header
5497                                         (sh->cdev->ctx, ns, entry,
5498                                          data_len, &entry->action);
5499         if (ret) {
5500                 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5501                 rte_flow_error_set(ctx->error, ENOMEM,
5502                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5503                                    NULL, "cannot create modification action");
5504                 return NULL;
5505         }
5506         entry->idx = idx;
5507         return &entry->entry;
5508 }
5509
5510 struct mlx5_list_entry *
5511 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5512                         void *cb_ctx)
5513 {
5514         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5515         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5516         struct mlx5_flow_dv_modify_hdr_resource *entry;
5517         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5518         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5519         uint32_t idx;
5520
5521         entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5522                                   &idx);
5523         if (!entry) {
5524                 rte_flow_error_set(ctx->error, ENOMEM,
5525                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5526                                    "cannot allocate resource memory");
5527                 return NULL;
5528         }
5529         memcpy(entry, oentry, sizeof(*entry) + data_len);
5530         entry->idx = idx;
5531         return &entry->entry;
5532 }
5533
5534 void
5535 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5536 {
5537         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5538         struct mlx5_flow_dv_modify_hdr_resource *res =
5539                 container_of(entry, typeof(*res), entry);
5540
5541         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5542 }
5543
5544 /**
5545  * Validate the sample action.
5546  *
5547  * @param[in, out] action_flags
5548  *   Holds the actions detected until now.
5549  * @param[in] action
5550  *   Pointer to the sample action.
5551  * @param[in] dev
5552  *   Pointer to the Ethernet device structure.
5553  * @param[in] attr
5554  *   Attributes of flow that includes this action.
5555  * @param[in] item_flags
5556  *   Holds the items detected.
5557  * @param[in] rss
5558  *   Pointer to the RSS action.
5559  * @param[out] sample_rss
5560  *   Pointer to the RSS action in sample action list.
5561  * @param[out] count
5562  *   Pointer to the COUNT action in sample action list.
5563  * @param[out] fdb_mirror_limit
5564  *   Pointer to the FDB mirror limitation flag.
5565  * @param[out] error
5566  *   Pointer to error structure.
5567  *
5568  * @return
5569  *   0 on success, a negative errno value otherwise and rte_errno is set.
5570  */
5571 static int
5572 flow_dv_validate_action_sample(uint64_t *action_flags,
5573                                const struct rte_flow_action *action,
5574                                struct rte_eth_dev *dev,
5575                                const struct rte_flow_attr *attr,
5576                                uint64_t item_flags,
5577                                const struct rte_flow_action_rss *rss,
5578                                const struct rte_flow_action_rss **sample_rss,
5579                                const struct rte_flow_action_count **count,
5580                                int *fdb_mirror_limit,
5581                                struct rte_flow_error *error)
5582 {
5583         struct mlx5_priv *priv = dev->data->dev_private;
5584         struct mlx5_sh_config *dev_conf = &priv->sh->config;
5585         const struct rte_flow_action_sample *sample = action->conf;
5586         const struct rte_flow_action *act;
5587         uint64_t sub_action_flags = 0;
5588         uint16_t queue_index = 0xFFFF;
5589         int actions_n = 0;
5590         int ret;
5591
5592         if (!sample)
5593                 return rte_flow_error_set(error, EINVAL,
5594                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5595                                           "configuration cannot be NULL");
5596         if (sample->ratio == 0)
5597                 return rte_flow_error_set(error, EINVAL,
5598                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5599                                           "ratio value starts from 1");
5600         if (!priv->sh->cdev->config.devx ||
5601             (sample->ratio > 0 && !priv->sampler_en))
5602                 return rte_flow_error_set(error, ENOTSUP,
5603                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5604                                           NULL,
5605                                           "sample action not supported");
5606         if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5607                 return rte_flow_error_set(error, EINVAL,
5608                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5609                                           "Multiple sample actions not "
5610                                           "supported");
5611         if (*action_flags & MLX5_FLOW_ACTION_METER)
5612                 return rte_flow_error_set(error, EINVAL,
5613                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5614                                           "wrong action order, meter should "
5615                                           "be after sample action");
5616         if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5617                 return rte_flow_error_set(error, EINVAL,
5618                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5619                                           "wrong action order, jump should "
5620                                           "be after sample action");
5621         if (*action_flags & MLX5_FLOW_ACTION_CT)
5622                 return rte_flow_error_set(error, EINVAL,
5623                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5624                                           "Sample after CT not supported");
5625         act = sample->actions;
5626         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5627                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5628                         return rte_flow_error_set(error, ENOTSUP,
5629                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5630                                                   act, "too many actions");
5631                 switch (act->type) {
5632                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5633                         ret = mlx5_flow_validate_action_queue(act,
5634                                                               sub_action_flags,
5635                                                               dev,
5636                                                               attr, error);
5637                         if (ret < 0)
5638                                 return ret;
5639                         queue_index = ((const struct rte_flow_action_queue *)
5640                                                         (act->conf))->index;
5641                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5642                         ++actions_n;
5643                         break;
5644                 case RTE_FLOW_ACTION_TYPE_RSS:
5645                         *sample_rss = act->conf;
5646                         ret = mlx5_flow_validate_action_rss(act,
5647                                                             sub_action_flags,
5648                                                             dev, attr,
5649                                                             item_flags,
5650                                                             error);
5651                         if (ret < 0)
5652                                 return ret;
5653                         if (rss && *sample_rss &&
5654                             ((*sample_rss)->level != rss->level ||
5655                             (*sample_rss)->types != rss->types))
5656                                 return rte_flow_error_set(error, ENOTSUP,
5657                                         RTE_FLOW_ERROR_TYPE_ACTION,
5658                                         NULL,
5659                                         "Can't use the different RSS types "
5660                                         "or level in the same flow");
5661                         if (*sample_rss != NULL && (*sample_rss)->queue_num)
5662                                 queue_index = (*sample_rss)->queue[0];
5663                         sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5664                         ++actions_n;
5665                         break;
5666                 case RTE_FLOW_ACTION_TYPE_MARK:
5667                         ret = flow_dv_validate_action_mark(dev, act,
5668                                                            sub_action_flags,
5669                                                            attr, error);
5670                         if (ret < 0)
5671                                 return ret;
5672                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5673                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5674                                                 MLX5_FLOW_ACTION_MARK_EXT;
5675                         else
5676                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5677                         ++actions_n;
5678                         break;
5679                 case RTE_FLOW_ACTION_TYPE_COUNT:
5680                         ret = flow_dv_validate_action_count
5681                                 (dev, false, *action_flags | sub_action_flags,
5682                                  error);
5683                         if (ret < 0)
5684                                 return ret;
5685                         *count = act->conf;
5686                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5687                         *action_flags |= MLX5_FLOW_ACTION_COUNT;
5688                         ++actions_n;
5689                         break;
5690                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5691                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5692                         ret = flow_dv_validate_action_port_id(dev,
5693                                                               sub_action_flags,
5694                                                               act,
5695                                                               attr,
5696                                                               error);
5697                         if (ret)
5698                                 return ret;
5699                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5700                         ++actions_n;
5701                         break;
5702                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5703                         ret = flow_dv_validate_action_raw_encap_decap
5704                                 (dev, NULL, act->conf, attr, &sub_action_flags,
5705                                  &actions_n, action, item_flags, error);
5706                         if (ret < 0)
5707                                 return ret;
5708                         ++actions_n;
5709                         break;
5710                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5711                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5712                         ret = flow_dv_validate_action_l2_encap(dev,
5713                                                                sub_action_flags,
5714                                                                act, attr,
5715                                                                error);
5716                         if (ret < 0)
5717                                 return ret;
5718                         sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5719                         ++actions_n;
5720                         break;
5721                 default:
5722                         return rte_flow_error_set(error, ENOTSUP,
5723                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5724                                                   NULL,
5725                                                   "Doesn't support optional "
5726                                                   "action");
5727                 }
5728         }
5729         if (attr->ingress && !attr->transfer) {
5730                 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5731                                           MLX5_FLOW_ACTION_RSS)))
5732                         return rte_flow_error_set(error, EINVAL,
5733                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5734                                                   NULL,
5735                                                   "Ingress must has a dest "
5736                                                   "QUEUE for Sample");
5737         } else if (attr->egress && !attr->transfer) {
5738                 return rte_flow_error_set(error, ENOTSUP,
5739                                           RTE_FLOW_ERROR_TYPE_ACTION,
5740                                           NULL,
5741                                           "Sample Only support Ingress "
5742                                           "or E-Switch");
5743         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5744                 MLX5_ASSERT(attr->transfer);
5745                 if (sample->ratio > 1)
5746                         return rte_flow_error_set(error, ENOTSUP,
5747                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5748                                                   NULL,
5749                                                   "E-Switch doesn't support "
5750                                                   "any optional action "
5751                                                   "for sampling");
5752                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5753                         return rte_flow_error_set(error, ENOTSUP,
5754                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5755                                                   NULL,
5756                                                   "unsupported action QUEUE");
5757                 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5758                         return rte_flow_error_set(error, ENOTSUP,
5759                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5760                                                   NULL,
5761                                                   "unsupported action QUEUE");
5762                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5763                         return rte_flow_error_set(error, EINVAL,
5764                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5765                                                   NULL,
5766                                                   "E-Switch must has a dest "
5767                                                   "port for mirroring");
5768                 if (!priv->sh->cdev->config.hca_attr.reg_c_preserve &&
5769                      priv->representor_id != UINT16_MAX)
5770                         *fdb_mirror_limit = 1;
5771         }
5772         /* Continue validation for Xcap actions.*/
5773         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5774             (queue_index == 0xFFFF || !mlx5_rxq_is_hairpin(dev, queue_index))) {
5775                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5776                      MLX5_FLOW_XCAP_ACTIONS)
5777                         return rte_flow_error_set(error, ENOTSUP,
5778                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5779                                                   NULL, "encap and decap "
5780                                                   "combination aren't "
5781                                                   "supported");
5782                 if (!attr->transfer && attr->ingress && (sub_action_flags &
5783                                                         MLX5_FLOW_ACTION_ENCAP))
5784                         return rte_flow_error_set(error, ENOTSUP,
5785                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5786                                                   NULL, "encap is not supported"
5787                                                   " for ingress traffic");
5788         }
5789         return 0;
5790 }
5791
5792 /**
5793  * Find existing modify-header resource or create and register a new one.
5794  *
5795  * @param dev[in, out]
5796  *   Pointer to rte_eth_dev structure.
5797  * @param[in, out] resource
5798  *   Pointer to modify-header resource.
5799  * @parm[in, out] dev_flow
5800  *   Pointer to the dev_flow.
5801  * @param[out] error
5802  *   pointer to error structure.
5803  *
5804  * @return
5805  *   0 on success otherwise -errno and errno is set.
5806  */
5807 static int
5808 flow_dv_modify_hdr_resource_register
5809                         (struct rte_eth_dev *dev,
5810                          struct mlx5_flow_dv_modify_hdr_resource *resource,
5811                          struct mlx5_flow *dev_flow,
5812                          struct rte_flow_error *error)
5813 {
5814         struct mlx5_priv *priv = dev->data->dev_private;
5815         struct mlx5_dev_ctx_shared *sh = priv->sh;
5816         uint32_t key_len = sizeof(*resource) -
5817                            offsetof(typeof(*resource), ft_type) +
5818                            resource->actions_num * sizeof(resource->actions[0]);
5819         struct mlx5_list_entry *entry;
5820         struct mlx5_flow_cb_ctx ctx = {
5821                 .error = error,
5822                 .data = resource,
5823         };
5824         struct mlx5_hlist *modify_cmds;
5825         uint64_t key64;
5826
5827         modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5828                                 "hdr_modify",
5829                                 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5830                                 true, false, sh,
5831                                 flow_dv_modify_create_cb,
5832                                 flow_dv_modify_match_cb,
5833                                 flow_dv_modify_remove_cb,
5834                                 flow_dv_modify_clone_cb,
5835                                 flow_dv_modify_clone_free_cb,
5836                                 error);
5837         if (unlikely(!modify_cmds))
5838                 return -rte_errno;
5839         resource->root = !dev_flow->dv.group;
5840         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5841                                                                 resource->root))
5842                 return rte_flow_error_set(error, EOVERFLOW,
5843                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5844                                           "too many modify header items");
5845         key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5846         entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5847         if (!entry)
5848                 return -rte_errno;
5849         resource = container_of(entry, typeof(*resource), entry);
5850         dev_flow->handle->dvh.modify_hdr = resource;
5851         return 0;
5852 }
5853
5854 /**
5855  * Get DV flow counter by index.
5856  *
5857  * @param[in] dev
5858  *   Pointer to the Ethernet device structure.
5859  * @param[in] idx
5860  *   mlx5 flow counter index in the container.
5861  * @param[out] ppool
5862  *   mlx5 flow counter pool in the container.
5863  *
5864  * @return
5865  *   Pointer to the counter, NULL otherwise.
5866  */
5867 static struct mlx5_flow_counter *
5868 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5869                            uint32_t idx,
5870                            struct mlx5_flow_counter_pool **ppool)
5871 {
5872         struct mlx5_priv *priv = dev->data->dev_private;
5873         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5874         struct mlx5_flow_counter_pool *pool;
5875
5876         /* Decrease to original index and clear shared bit. */
5877         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5878         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5879         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5880         MLX5_ASSERT(pool);
5881         if (ppool)
5882                 *ppool = pool;
5883         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5884 }
5885
5886 /**
5887  * Check the devx counter belongs to the pool.
5888  *
5889  * @param[in] pool
5890  *   Pointer to the counter pool.
5891  * @param[in] id
5892  *   The counter devx ID.
5893  *
5894  * @return
5895  *   True if counter belongs to the pool, false otherwise.
5896  */
5897 static bool
5898 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5899 {
5900         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5901                    MLX5_COUNTERS_PER_POOL;
5902
5903         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5904                 return true;
5905         return false;
5906 }
5907
5908 /**
5909  * Get a pool by devx counter ID.
5910  *
5911  * @param[in] cmng
5912  *   Pointer to the counter management.
5913  * @param[in] id
5914  *   The counter devx ID.
5915  *
5916  * @return
5917  *   The counter pool pointer if exists, NULL otherwise,
5918  */
5919 static struct mlx5_flow_counter_pool *
5920 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5921 {
5922         uint32_t i;
5923         struct mlx5_flow_counter_pool *pool = NULL;
5924
5925         rte_spinlock_lock(&cmng->pool_update_sl);
5926         /* Check last used pool. */
5927         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5928             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5929                 pool = cmng->pools[cmng->last_pool_idx];
5930                 goto out;
5931         }
5932         /* ID out of range means no suitable pool in the container. */
5933         if (id > cmng->max_id || id < cmng->min_id)
5934                 goto out;
5935         /*
5936          * Find the pool from the end of the container, since mostly counter
5937          * ID is sequence increasing, and the last pool should be the needed
5938          * one.
5939          */
5940         i = cmng->n_valid;
5941         while (i--) {
5942                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5943
5944                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5945                         pool = pool_tmp;
5946                         break;
5947                 }
5948         }
5949 out:
5950         rte_spinlock_unlock(&cmng->pool_update_sl);
5951         return pool;
5952 }
5953
5954 /**
5955  * Resize a counter container.
5956  *
5957  * @param[in] dev
5958  *   Pointer to the Ethernet device structure.
5959  *
5960  * @return
5961  *   0 on success, otherwise negative errno value and rte_errno is set.
5962  */
5963 static int
5964 flow_dv_container_resize(struct rte_eth_dev *dev)
5965 {
5966         struct mlx5_priv *priv = dev->data->dev_private;
5967         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5968         void *old_pools = cmng->pools;
5969         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5970         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5971         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5972
5973         if (!pools) {
5974                 rte_errno = ENOMEM;
5975                 return -ENOMEM;
5976         }
5977         if (old_pools)
5978                 memcpy(pools, old_pools, cmng->n *
5979                                        sizeof(struct mlx5_flow_counter_pool *));
5980         cmng->n = resize;
5981         cmng->pools = pools;
5982         if (old_pools)
5983                 mlx5_free(old_pools);
5984         return 0;
5985 }
5986
5987 /**
5988  * Query a devx flow counter.
5989  *
5990  * @param[in] dev
5991  *   Pointer to the Ethernet device structure.
5992  * @param[in] counter
5993  *   Index to the flow counter.
5994  * @param[out] pkts
5995  *   The statistics value of packets.
5996  * @param[out] bytes
5997  *   The statistics value of bytes.
5998  *
5999  * @return
6000  *   0 on success, otherwise a negative errno value and rte_errno is set.
6001  */
6002 static inline int
6003 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
6004                      uint64_t *bytes)
6005 {
6006         struct mlx5_priv *priv = dev->data->dev_private;
6007         struct mlx5_flow_counter_pool *pool = NULL;
6008         struct mlx5_flow_counter *cnt;
6009         int offset;
6010
6011         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6012         MLX5_ASSERT(pool);
6013         if (priv->sh->cmng.counter_fallback)
6014                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
6015                                         0, pkts, bytes, 0, NULL, NULL, 0);
6016         rte_spinlock_lock(&pool->sl);
6017         if (!pool->raw) {
6018                 *pkts = 0;
6019                 *bytes = 0;
6020         } else {
6021                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
6022                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
6023                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
6024         }
6025         rte_spinlock_unlock(&pool->sl);
6026         return 0;
6027 }
6028
6029 /**
6030  * Create and initialize a new counter pool.
6031  *
6032  * @param[in] dev
6033  *   Pointer to the Ethernet device structure.
6034  * @param[out] dcs
6035  *   The devX counter handle.
6036  * @param[in] age
6037  *   Whether the pool is for counter that was allocated for aging.
6038  * @param[in/out] cont_cur
6039  *   Pointer to the container pointer, it will be update in pool resize.
6040  *
6041  * @return
6042  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
6043  */
6044 static struct mlx5_flow_counter_pool *
6045 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6046                     uint32_t age)
6047 {
6048         struct mlx5_priv *priv = dev->data->dev_private;
6049         struct mlx5_flow_counter_pool *pool;
6050         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6051         bool fallback = priv->sh->cmng.counter_fallback;
6052         uint32_t size = sizeof(*pool);
6053
6054         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6055         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6056         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6057         if (!pool) {
6058                 rte_errno = ENOMEM;
6059                 return NULL;
6060         }
6061         pool->raw = NULL;
6062         pool->is_aged = !!age;
6063         pool->query_gen = 0;
6064         pool->min_dcs = dcs;
6065         rte_spinlock_init(&pool->sl);
6066         rte_spinlock_init(&pool->csl);
6067         TAILQ_INIT(&pool->counters[0]);
6068         TAILQ_INIT(&pool->counters[1]);
6069         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6070         rte_spinlock_lock(&cmng->pool_update_sl);
6071         pool->index = cmng->n_valid;
6072         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6073                 mlx5_free(pool);
6074                 rte_spinlock_unlock(&cmng->pool_update_sl);
6075                 return NULL;
6076         }
6077         cmng->pools[pool->index] = pool;
6078         cmng->n_valid++;
6079         if (unlikely(fallback)) {
6080                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6081
6082                 if (base < cmng->min_id)
6083                         cmng->min_id = base;
6084                 if (base > cmng->max_id)
6085                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6086                 cmng->last_pool_idx = pool->index;
6087         }
6088         rte_spinlock_unlock(&cmng->pool_update_sl);
6089         return pool;
6090 }
6091
6092 /**
6093  * Prepare a new counter and/or a new counter pool.
6094  *
6095  * @param[in] dev
6096  *   Pointer to the Ethernet device structure.
6097  * @param[out] cnt_free
6098  *   Where to put the pointer of a new counter.
6099  * @param[in] age
6100  *   Whether the pool is for counter that was allocated for aging.
6101  *
6102  * @return
6103  *   The counter pool pointer and @p cnt_free is set on success,
6104  *   NULL otherwise and rte_errno is set.
6105  */
6106 static struct mlx5_flow_counter_pool *
6107 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6108                              struct mlx5_flow_counter **cnt_free,
6109                              uint32_t age)
6110 {
6111         struct mlx5_priv *priv = dev->data->dev_private;
6112         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6113         struct mlx5_flow_counter_pool *pool;
6114         struct mlx5_counters tmp_tq;
6115         struct mlx5_devx_obj *dcs = NULL;
6116         struct mlx5_flow_counter *cnt;
6117         enum mlx5_counter_type cnt_type =
6118                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6119         bool fallback = priv->sh->cmng.counter_fallback;
6120         uint32_t i;
6121
6122         if (fallback) {
6123                 /* bulk_bitmap must be 0 for single counter allocation. */
6124                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0);
6125                 if (!dcs)
6126                         return NULL;
6127                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6128                 if (!pool) {
6129                         pool = flow_dv_pool_create(dev, dcs, age);
6130                         if (!pool) {
6131                                 mlx5_devx_cmd_destroy(dcs);
6132                                 return NULL;
6133                         }
6134                 }
6135                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6136                 cnt = MLX5_POOL_GET_CNT(pool, i);
6137                 cnt->pool = pool;
6138                 cnt->dcs_when_free = dcs;
6139                 *cnt_free = cnt;
6140                 return pool;
6141         }
6142         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
6143         if (!dcs) {
6144                 rte_errno = ENODATA;
6145                 return NULL;
6146         }
6147         pool = flow_dv_pool_create(dev, dcs, age);
6148         if (!pool) {
6149                 mlx5_devx_cmd_destroy(dcs);
6150                 return NULL;
6151         }
6152         TAILQ_INIT(&tmp_tq);
6153         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6154                 cnt = MLX5_POOL_GET_CNT(pool, i);
6155                 cnt->pool = pool;
6156                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6157         }
6158         rte_spinlock_lock(&cmng->csl[cnt_type]);
6159         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6160         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6161         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6162         (*cnt_free)->pool = pool;
6163         return pool;
6164 }
6165
6166 /**
6167  * Allocate a flow counter.
6168  *
6169  * @param[in] dev
6170  *   Pointer to the Ethernet device structure.
6171  * @param[in] age
6172  *   Whether the counter was allocated for aging.
6173  *
6174  * @return
6175  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6176  */
6177 static uint32_t
6178 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6179 {
6180         struct mlx5_priv *priv = dev->data->dev_private;
6181         struct mlx5_flow_counter_pool *pool = NULL;
6182         struct mlx5_flow_counter *cnt_free = NULL;
6183         bool fallback = priv->sh->cmng.counter_fallback;
6184         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6185         enum mlx5_counter_type cnt_type =
6186                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6187         uint32_t cnt_idx;
6188
6189         if (!priv->sh->cdev->config.devx) {
6190                 rte_errno = ENOTSUP;
6191                 return 0;
6192         }
6193         /* Get free counters from container. */
6194         rte_spinlock_lock(&cmng->csl[cnt_type]);
6195         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6196         if (cnt_free)
6197                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6198         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6199         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6200                 goto err;
6201         pool = cnt_free->pool;
6202         if (fallback)
6203                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6204         /* Create a DV counter action only in the first time usage. */
6205         if (!cnt_free->action) {
6206                 uint16_t offset;
6207                 struct mlx5_devx_obj *dcs;
6208                 int ret;
6209
6210                 if (!fallback) {
6211                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6212                         dcs = pool->min_dcs;
6213                 } else {
6214                         offset = 0;
6215                         dcs = cnt_free->dcs_when_free;
6216                 }
6217                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6218                                                             &cnt_free->action);
6219                 if (ret) {
6220                         rte_errno = errno;
6221                         goto err;
6222                 }
6223         }
6224         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6225                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6226         /* Update the counter reset values. */
6227         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6228                                  &cnt_free->bytes))
6229                 goto err;
6230         if (!fallback && !priv->sh->cmng.query_thread_on)
6231                 /* Start the asynchronous batch query by the host thread. */
6232                 mlx5_set_query_alarm(priv->sh);
6233         /*
6234          * When the count action isn't shared (by ID), shared_info field is
6235          * used for indirect action API's refcnt.
6236          * When the counter action is not shared neither by ID nor by indirect
6237          * action API, shared info must be 1.
6238          */
6239         cnt_free->shared_info.refcnt = 1;
6240         return cnt_idx;
6241 err:
6242         if (cnt_free) {
6243                 cnt_free->pool = pool;
6244                 if (fallback)
6245                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6246                 rte_spinlock_lock(&cmng->csl[cnt_type]);
6247                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6248                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6249         }
6250         return 0;
6251 }
6252
6253 /**
6254  * Get age param from counter index.
6255  *
6256  * @param[in] dev
6257  *   Pointer to the Ethernet device structure.
6258  * @param[in] counter
6259  *   Index to the counter handler.
6260  *
6261  * @return
6262  *   The aging parameter specified for the counter index.
6263  */
6264 static struct mlx5_age_param*
6265 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6266                                 uint32_t counter)
6267 {
6268         struct mlx5_flow_counter *cnt;
6269         struct mlx5_flow_counter_pool *pool = NULL;
6270
6271         flow_dv_counter_get_by_idx(dev, counter, &pool);
6272         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6273         cnt = MLX5_POOL_GET_CNT(pool, counter);
6274         return MLX5_CNT_TO_AGE(cnt);
6275 }
6276
6277 /**
6278  * Remove a flow counter from aged counter list.
6279  *
6280  * @param[in] dev
6281  *   Pointer to the Ethernet device structure.
6282  * @param[in] counter
6283  *   Index to the counter handler.
6284  * @param[in] cnt
6285  *   Pointer to the counter handler.
6286  */
6287 static void
6288 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6289                                 uint32_t counter, struct mlx5_flow_counter *cnt)
6290 {
6291         struct mlx5_age_info *age_info;
6292         struct mlx5_age_param *age_param;
6293         struct mlx5_priv *priv = dev->data->dev_private;
6294         uint16_t expected = AGE_CANDIDATE;
6295
6296         age_info = GET_PORT_AGE_INFO(priv);
6297         age_param = flow_dv_counter_idx_get_age(dev, counter);
6298         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6299                                          AGE_FREE, false, __ATOMIC_RELAXED,
6300                                          __ATOMIC_RELAXED)) {
6301                 /**
6302                  * We need the lock even it is age timeout,
6303                  * since counter may still in process.
6304                  */
6305                 rte_spinlock_lock(&age_info->aged_sl);
6306                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6307                 rte_spinlock_unlock(&age_info->aged_sl);
6308                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6309         }
6310 }
6311
6312 /**
6313  * Release a flow counter.
6314  *
6315  * @param[in] dev
6316  *   Pointer to the Ethernet device structure.
6317  * @param[in] counter
6318  *   Index to the counter handler.
6319  */
6320 static void
6321 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6322 {
6323         struct mlx5_priv *priv = dev->data->dev_private;
6324         struct mlx5_flow_counter_pool *pool = NULL;
6325         struct mlx5_flow_counter *cnt;
6326         enum mlx5_counter_type cnt_type;
6327
6328         if (!counter)
6329                 return;
6330         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6331         MLX5_ASSERT(pool);
6332         if (pool->is_aged) {
6333                 flow_dv_counter_remove_from_age(dev, counter, cnt);
6334         } else {
6335                 /*
6336                  * If the counter action is shared by indirect action API,
6337                  * the atomic function reduces its references counter.
6338                  * If after the reduction the action is still referenced, the
6339                  * function returns here and does not release it.
6340                  * When the counter action is not shared by
6341                  * indirect action API, shared info is 1 before the reduction,
6342                  * so this condition is failed and function doesn't return here.
6343                  */
6344                 if (__atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6345                                        __ATOMIC_RELAXED))
6346                         return;
6347         }
6348         cnt->pool = pool;
6349         /*
6350          * Put the counter back to list to be updated in none fallback mode.
6351          * Currently, we are using two list alternately, while one is in query,
6352          * add the freed counter to the other list based on the pool query_gen
6353          * value. After query finishes, add counter the list to the global
6354          * container counter list. The list changes while query starts. In
6355          * this case, lock will not be needed as query callback and release
6356          * function both operate with the different list.
6357          */
6358         if (!priv->sh->cmng.counter_fallback) {
6359                 rte_spinlock_lock(&pool->csl);
6360                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6361                 rte_spinlock_unlock(&pool->csl);
6362         } else {
6363                 cnt->dcs_when_free = cnt->dcs_when_active;
6364                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6365                                            MLX5_COUNTER_TYPE_ORIGIN;
6366                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6367                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6368                                   cnt, next);
6369                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6370         }
6371 }
6372
6373 /**
6374  * Resize a meter id container.
6375  *
6376  * @param[in] dev
6377  *   Pointer to the Ethernet device structure.
6378  *
6379  * @return
6380  *   0 on success, otherwise negative errno value and rte_errno is set.
6381  */
6382 static int
6383 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6384 {
6385         struct mlx5_priv *priv = dev->data->dev_private;
6386         struct mlx5_aso_mtr_pools_mng *pools_mng =
6387                                 &priv->sh->mtrmng->pools_mng;
6388         void *old_pools = pools_mng->pools;
6389         uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6390         uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6391         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6392
6393         if (!pools) {
6394                 rte_errno = ENOMEM;
6395                 return -ENOMEM;
6396         }
6397         if (!pools_mng->n)
6398                 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6399                         mlx5_free(pools);
6400                         return -ENOMEM;
6401                 }
6402         if (old_pools)
6403                 memcpy(pools, old_pools, pools_mng->n *
6404                                        sizeof(struct mlx5_aso_mtr_pool *));
6405         pools_mng->n = resize;
6406         pools_mng->pools = pools;
6407         if (old_pools)
6408                 mlx5_free(old_pools);
6409         return 0;
6410 }
6411
6412 /**
6413  * Prepare a new meter and/or a new meter pool.
6414  *
6415  * @param[in] dev
6416  *   Pointer to the Ethernet device structure.
6417  * @param[out] mtr_free
6418  *   Where to put the pointer of a new meter.g.
6419  *
6420  * @return
6421  *   The meter pool pointer and @mtr_free is set on success,
6422  *   NULL otherwise and rte_errno is set.
6423  */
6424 static struct mlx5_aso_mtr_pool *
6425 flow_dv_mtr_pool_create(struct rte_eth_dev *dev, struct mlx5_aso_mtr **mtr_free)
6426 {
6427         struct mlx5_priv *priv = dev->data->dev_private;
6428         struct mlx5_aso_mtr_pools_mng *pools_mng = &priv->sh->mtrmng->pools_mng;
6429         struct mlx5_aso_mtr_pool *pool = NULL;
6430         struct mlx5_devx_obj *dcs = NULL;
6431         uint32_t i;
6432         uint32_t log_obj_size;
6433
6434         log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6435         dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->cdev->ctx,
6436                                                       priv->sh->cdev->pdn,
6437                                                       log_obj_size);
6438         if (!dcs) {
6439                 rte_errno = ENODATA;
6440                 return NULL;
6441         }
6442         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6443         if (!pool) {
6444                 rte_errno = ENOMEM;
6445                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6446                 return NULL;
6447         }
6448         pool->devx_obj = dcs;
6449         rte_rwlock_write_lock(&pools_mng->resize_mtrwl);
6450         pool->index = pools_mng->n_valid;
6451         if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6452                 mlx5_free(pool);
6453                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6454                 rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6455                 return NULL;
6456         }
6457         pools_mng->pools[pool->index] = pool;
6458         pools_mng->n_valid++;
6459         rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6460         for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6461                 pool->mtrs[i].offset = i;
6462                 LIST_INSERT_HEAD(&pools_mng->meters, &pool->mtrs[i], next);
6463         }
6464         pool->mtrs[0].offset = 0;
6465         *mtr_free = &pool->mtrs[0];
6466         return pool;
6467 }
6468
6469 /**
6470  * Release a flow meter into pool.
6471  *
6472  * @param[in] dev
6473  *   Pointer to the Ethernet device structure.
6474  * @param[in] mtr_idx
6475  *   Index to aso flow meter.
6476  */
6477 static void
6478 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6479 {
6480         struct mlx5_priv *priv = dev->data->dev_private;
6481         struct mlx5_aso_mtr_pools_mng *pools_mng =
6482                                 &priv->sh->mtrmng->pools_mng;
6483         struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6484
6485         MLX5_ASSERT(aso_mtr);
6486         rte_spinlock_lock(&pools_mng->mtrsl);
6487         memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6488         aso_mtr->state = ASO_METER_FREE;
6489         LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6490         rte_spinlock_unlock(&pools_mng->mtrsl);
6491 }
6492
6493 /**
6494  * Allocate a aso flow meter.
6495  *
6496  * @param[in] dev
6497  *   Pointer to the Ethernet device structure.
6498  *
6499  * @return
6500  *   Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6501  */
6502 static uint32_t
6503 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6504 {
6505         struct mlx5_priv *priv = dev->data->dev_private;
6506         struct mlx5_aso_mtr *mtr_free = NULL;
6507         struct mlx5_aso_mtr_pools_mng *pools_mng =
6508                                 &priv->sh->mtrmng->pools_mng;
6509         struct mlx5_aso_mtr_pool *pool;
6510         uint32_t mtr_idx = 0;
6511
6512         if (!priv->sh->cdev->config.devx) {
6513                 rte_errno = ENOTSUP;
6514                 return 0;
6515         }
6516         /* Allocate the flow meter memory. */
6517         /* Get free meters from management. */
6518         rte_spinlock_lock(&pools_mng->mtrsl);
6519         mtr_free = LIST_FIRST(&pools_mng->meters);
6520         if (mtr_free)
6521                 LIST_REMOVE(mtr_free, next);
6522         if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6523                 rte_spinlock_unlock(&pools_mng->mtrsl);
6524                 return 0;
6525         }
6526         mtr_free->state = ASO_METER_WAIT;
6527         rte_spinlock_unlock(&pools_mng->mtrsl);
6528         pool = container_of(mtr_free,
6529                         struct mlx5_aso_mtr_pool,
6530                         mtrs[mtr_free->offset]);
6531         mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6532         if (!mtr_free->fm.meter_action) {
6533 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6534                 struct rte_flow_error error;
6535                 uint8_t reg_id;
6536
6537                 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6538                 mtr_free->fm.meter_action =
6539                         mlx5_glue->dv_create_flow_action_aso
6540                                                 (priv->sh->rx_domain,
6541                                                  pool->devx_obj->obj,
6542                                                  mtr_free->offset,
6543                                                  (1 << MLX5_FLOW_COLOR_GREEN),
6544                                                  reg_id - REG_C_0);
6545 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6546                 if (!mtr_free->fm.meter_action) {
6547                         flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6548                         return 0;
6549                 }
6550         }
6551         return mtr_idx;
6552 }
6553
6554 /**
6555  * Verify the @p attributes will be correctly understood by the NIC and store
6556  * them in the @p flow if everything is correct.
6557  *
6558  * @param[in] dev
6559  *   Pointer to dev struct.
6560  * @param[in] attributes
6561  *   Pointer to flow attributes
6562  * @param[in] external
6563  *   This flow rule is created by request external to PMD.
6564  * @param[out] error
6565  *   Pointer to error structure.
6566  *
6567  * @return
6568  *   - 0 on success and non root table.
6569  *   - 1 on success and root table.
6570  *   - a negative errno value otherwise and rte_errno is set.
6571  */
6572 static int
6573 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6574                             const struct mlx5_flow_tunnel *tunnel,
6575                             const struct rte_flow_attr *attributes,
6576                             const struct flow_grp_info *grp_info,
6577                             struct rte_flow_error *error)
6578 {
6579         struct mlx5_priv *priv = dev->data->dev_private;
6580         uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6581         int ret = 0;
6582
6583 #ifndef HAVE_MLX5DV_DR
6584         RTE_SET_USED(tunnel);
6585         RTE_SET_USED(grp_info);
6586         if (attributes->group)
6587                 return rte_flow_error_set(error, ENOTSUP,
6588                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6589                                           NULL,
6590                                           "groups are not supported");
6591 #else
6592         uint32_t table = 0;
6593
6594         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6595                                        grp_info, error);
6596         if (ret)
6597                 return ret;
6598         if (!table)
6599                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6600 #endif
6601         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6602             attributes->priority > lowest_priority)
6603                 return rte_flow_error_set(error, ENOTSUP,
6604                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6605                                           NULL,
6606                                           "priority out of range");
6607         if (attributes->transfer) {
6608                 if (!priv->sh->config.dv_esw_en)
6609                         return rte_flow_error_set
6610                                 (error, ENOTSUP,
6611                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6612                                  "E-Switch dr is not supported");
6613                 if (attributes->egress)
6614                         return rte_flow_error_set
6615                                 (error, ENOTSUP,
6616                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6617                                  "egress is not supported");
6618         }
6619         if (!(attributes->egress ^ attributes->ingress))
6620                 return rte_flow_error_set(error, ENOTSUP,
6621                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6622                                           "must specify exactly one of "
6623                                           "ingress or egress");
6624         return ret;
6625 }
6626
6627 static int
6628 validate_integrity_bits(const struct rte_flow_item_integrity *mask,
6629                         int64_t pattern_flags, uint64_t l3_flags,
6630                         uint64_t l4_flags, uint64_t ip4_flag,
6631                         struct rte_flow_error *error)
6632 {
6633         if (mask->l3_ok && !(pattern_flags & l3_flags))
6634                 return rte_flow_error_set(error, EINVAL,
6635                                           RTE_FLOW_ERROR_TYPE_ITEM,
6636                                           NULL, "missing L3 protocol");
6637
6638         if (mask->ipv4_csum_ok && !(pattern_flags & ip4_flag))
6639                 return rte_flow_error_set(error, EINVAL,
6640                                           RTE_FLOW_ERROR_TYPE_ITEM,
6641                                           NULL, "missing IPv4 protocol");
6642
6643         if ((mask->l4_ok || mask->l4_csum_ok) && !(pattern_flags & l4_flags))
6644                 return rte_flow_error_set(error, EINVAL,
6645                                           RTE_FLOW_ERROR_TYPE_ITEM,
6646                                           NULL, "missing L4 protocol");
6647
6648         return 0;
6649 }
6650
6651 static int
6652 flow_dv_validate_item_integrity_post(const struct
6653                                      rte_flow_item *integrity_items[2],
6654                                      int64_t pattern_flags,
6655                                      struct rte_flow_error *error)
6656 {
6657         const struct rte_flow_item_integrity *mask;
6658         int ret;
6659
6660         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
6661                 mask = (typeof(mask))integrity_items[0]->mask;
6662                 ret = validate_integrity_bits(mask, pattern_flags,
6663                                               MLX5_FLOW_LAYER_OUTER_L3,
6664                                               MLX5_FLOW_LAYER_OUTER_L4,
6665                                               MLX5_FLOW_LAYER_OUTER_L3_IPV4,
6666                                               error);
6667                 if (ret)
6668                         return ret;
6669         }
6670         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
6671                 mask = (typeof(mask))integrity_items[1]->mask;
6672                 ret = validate_integrity_bits(mask, pattern_flags,
6673                                               MLX5_FLOW_LAYER_INNER_L3,
6674                                               MLX5_FLOW_LAYER_INNER_L4,
6675                                               MLX5_FLOW_LAYER_INNER_L3_IPV4,
6676                                               error);
6677                 if (ret)
6678                         return ret;
6679         }
6680         return 0;
6681 }
6682
6683 static int
6684 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6685                                 const struct rte_flow_item *integrity_item,
6686                                 uint64_t pattern_flags, uint64_t *last_item,
6687                                 const struct rte_flow_item *integrity_items[2],
6688                                 struct rte_flow_error *error)
6689 {
6690         struct mlx5_priv *priv = dev->data->dev_private;
6691         const struct rte_flow_item_integrity *mask = (typeof(mask))
6692                                                      integrity_item->mask;
6693         const struct rte_flow_item_integrity *spec = (typeof(spec))
6694                                                      integrity_item->spec;
6695
6696         if (!priv->sh->cdev->config.hca_attr.pkt_integrity_match)
6697                 return rte_flow_error_set(error, ENOTSUP,
6698                                           RTE_FLOW_ERROR_TYPE_ITEM,
6699                                           integrity_item,
6700                                           "packet integrity integrity_item not supported");
6701         if (!spec)
6702                 return rte_flow_error_set(error, ENOTSUP,
6703                                           RTE_FLOW_ERROR_TYPE_ITEM,
6704                                           integrity_item,
6705                                           "no spec for integrity item");
6706         if (!mask)
6707                 mask = &rte_flow_item_integrity_mask;
6708         if (!mlx5_validate_integrity_item(mask))
6709                 return rte_flow_error_set(error, ENOTSUP,
6710                                           RTE_FLOW_ERROR_TYPE_ITEM,
6711                                           integrity_item,
6712                                           "unsupported integrity filter");
6713         if (spec->level > 1) {
6714                 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY)
6715                         return rte_flow_error_set
6716                                 (error, ENOTSUP,
6717                                  RTE_FLOW_ERROR_TYPE_ITEM,
6718                                  NULL, "multiple inner integrity items not supported");
6719                 integrity_items[1] = integrity_item;
6720                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
6721         } else {
6722                 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY)
6723                         return rte_flow_error_set
6724                                 (error, ENOTSUP,
6725                                  RTE_FLOW_ERROR_TYPE_ITEM,
6726                                  NULL, "multiple outer integrity items not supported");
6727                 integrity_items[0] = integrity_item;
6728                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
6729         }
6730         return 0;
6731 }
6732
6733 static int
6734 flow_dv_validate_item_flex(struct rte_eth_dev *dev,
6735                            const struct rte_flow_item *item,
6736                            uint64_t item_flags,
6737                            uint64_t *last_item,
6738                            bool is_inner,
6739                            struct rte_flow_error *error)
6740 {
6741         const struct rte_flow_item_flex *flow_spec = item->spec;
6742         const struct rte_flow_item_flex *flow_mask = item->mask;
6743         struct mlx5_flex_item *flex;
6744
6745         if (!flow_spec)
6746                 return rte_flow_error_set(error, EINVAL,
6747                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6748                                           "flex flow item spec cannot be NULL");
6749         if (!flow_mask)
6750                 return rte_flow_error_set(error, EINVAL,
6751                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6752                                           "flex flow item mask cannot be NULL");
6753         if (item->last)
6754                 return rte_flow_error_set(error, ENOTSUP,
6755                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6756                                           "flex flow item last not supported");
6757         if (mlx5_flex_acquire_index(dev, flow_spec->handle, false) < 0)
6758                 return rte_flow_error_set(error, EINVAL,
6759                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6760                                           "invalid flex flow item handle");
6761         flex = (struct mlx5_flex_item *)flow_spec->handle;
6762         switch (flex->tunnel_mode) {
6763         case FLEX_TUNNEL_MODE_SINGLE:
6764                 if (item_flags &
6765                     (MLX5_FLOW_ITEM_OUTER_FLEX | MLX5_FLOW_ITEM_INNER_FLEX))
6766                         rte_flow_error_set(error, EINVAL,
6767                                            RTE_FLOW_ERROR_TYPE_ITEM,
6768                                            NULL, "multiple flex items not supported");
6769                 break;
6770         case FLEX_TUNNEL_MODE_OUTER:
6771                 if (is_inner)
6772                         rte_flow_error_set(error, EINVAL,
6773                                            RTE_FLOW_ERROR_TYPE_ITEM,
6774                                            NULL, "inner flex item was not configured");
6775                 if (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX)
6776                         rte_flow_error_set(error, ENOTSUP,
6777                                            RTE_FLOW_ERROR_TYPE_ITEM,
6778                                            NULL, "multiple flex items not supported");
6779                 break;
6780         case FLEX_TUNNEL_MODE_INNER:
6781                 if (!is_inner)
6782                         rte_flow_error_set(error, EINVAL,
6783                                            RTE_FLOW_ERROR_TYPE_ITEM,
6784                                            NULL, "outer flex item was not configured");
6785                 if (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)
6786                         rte_flow_error_set(error, EINVAL,
6787                                            RTE_FLOW_ERROR_TYPE_ITEM,
6788                                            NULL, "multiple flex items not supported");
6789                 break;
6790         case FLEX_TUNNEL_MODE_MULTI:
6791                 if ((is_inner && (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)) ||
6792                     (!is_inner && (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX))) {
6793                         rte_flow_error_set(error, EINVAL,
6794                                            RTE_FLOW_ERROR_TYPE_ITEM,
6795                                            NULL, "multiple flex items not supported");
6796                 }
6797                 break;
6798         case FLEX_TUNNEL_MODE_TUNNEL:
6799                 if (is_inner || (item_flags & MLX5_FLOW_ITEM_FLEX_TUNNEL))
6800                         rte_flow_error_set(error, EINVAL,
6801                                            RTE_FLOW_ERROR_TYPE_ITEM,
6802                                            NULL, "multiple flex tunnel items not supported");
6803                 break;
6804         default:
6805                 rte_flow_error_set(error, EINVAL,
6806                                    RTE_FLOW_ERROR_TYPE_ITEM,
6807                                    NULL, "invalid flex item configuration");
6808         }
6809         *last_item = flex->tunnel_mode == FLEX_TUNNEL_MODE_TUNNEL ?
6810                      MLX5_FLOW_ITEM_FLEX_TUNNEL : is_inner ?
6811                      MLX5_FLOW_ITEM_INNER_FLEX : MLX5_FLOW_ITEM_OUTER_FLEX;
6812         return 0;
6813 }
6814
6815 /**
6816  * Internal validation function. For validating both actions and items.
6817  *
6818  * @param[in] dev
6819  *   Pointer to the rte_eth_dev structure.
6820  * @param[in] attr
6821  *   Pointer to the flow attributes.
6822  * @param[in] items
6823  *   Pointer to the list of items.
6824  * @param[in] actions
6825  *   Pointer to the list of actions.
6826  * @param[in] external
6827  *   This flow rule is created by request external to PMD.
6828  * @param[in] hairpin
6829  *   Number of hairpin TX actions, 0 means classic flow.
6830  * @param[out] error
6831  *   Pointer to the error structure.
6832  *
6833  * @return
6834  *   0 on success, a negative errno value otherwise and rte_errno is set.
6835  */
6836 static int
6837 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6838                  const struct rte_flow_item items[],
6839                  const struct rte_flow_action actions[],
6840                  bool external, int hairpin, struct rte_flow_error *error)
6841 {
6842         int ret;
6843         uint64_t action_flags = 0;
6844         uint64_t item_flags = 0;
6845         uint64_t last_item = 0;
6846         uint8_t next_protocol = 0xff;
6847         uint16_t ether_type = 0;
6848         int actions_n = 0;
6849         uint8_t item_ipv6_proto = 0;
6850         int fdb_mirror_limit = 0;
6851         int modify_after_mirror = 0;
6852         const struct rte_flow_item *geneve_item = NULL;
6853         const struct rte_flow_item *gre_item = NULL;
6854         const struct rte_flow_item *gtp_item = NULL;
6855         const struct rte_flow_action_raw_decap *decap;
6856         const struct rte_flow_action_raw_encap *encap;
6857         const struct rte_flow_action_rss *rss = NULL;
6858         const struct rte_flow_action_rss *sample_rss = NULL;
6859         const struct rte_flow_action_count *sample_count = NULL;
6860         const struct rte_flow_item_tcp nic_tcp_mask = {
6861                 .hdr = {
6862                         .tcp_flags = 0xFF,
6863                         .src_port = RTE_BE16(UINT16_MAX),
6864                         .dst_port = RTE_BE16(UINT16_MAX),
6865                 }
6866         };
6867         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6868                 .hdr = {
6869                         .src_addr =
6870                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6871                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6872                         .dst_addr =
6873                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6874                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6875                         .vtc_flow = RTE_BE32(0xffffffff),
6876                         .proto = 0xff,
6877                         .hop_limits = 0xff,
6878                 },
6879                 .has_frag_ext = 1,
6880         };
6881         const struct rte_flow_item_ecpri nic_ecpri_mask = {
6882                 .hdr = {
6883                         .common = {
6884                                 .u32 =
6885                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6886                                         .type = 0xFF,
6887                                         }).u32),
6888                         },
6889                         .dummy[0] = 0xffffffff,
6890                 },
6891         };
6892         struct mlx5_priv *priv = dev->data->dev_private;
6893         struct mlx5_sh_config *dev_conf = &priv->sh->config;
6894         uint16_t queue_index = 0xFFFF;
6895         const struct rte_flow_item_vlan *vlan_m = NULL;
6896         uint32_t rw_act_num = 0;
6897         uint64_t is_root;
6898         const struct mlx5_flow_tunnel *tunnel;
6899         enum mlx5_tof_rule_type tof_rule_type;
6900         struct flow_grp_info grp_info = {
6901                 .external = !!external,
6902                 .transfer = !!attr->transfer,
6903                 .fdb_def_rule = !!priv->fdb_def_rule,
6904                 .std_tbl_fix = true,
6905         };
6906         const struct rte_eth_hairpin_conf *conf;
6907         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
6908         const struct rte_flow_item *port_id_item = NULL;
6909         bool def_policy = false;
6910         uint16_t udp_dport = 0;
6911
6912         if (items == NULL)
6913                 return -1;
6914         tunnel = is_tunnel_offload_active(dev) ?
6915                  mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6916         if (tunnel) {
6917                 if (!dev_conf->dv_flow_en)
6918                         return rte_flow_error_set
6919                                 (error, ENOTSUP,
6920                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6921                                  NULL, "tunnel offload requires DV flow interface");
6922                 if (priv->representor)
6923                         return rte_flow_error_set
6924                                 (error, ENOTSUP,
6925                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6926                                  NULL, "decap not supported for VF representor");
6927                 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6928                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6929                 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6930                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6931                                         MLX5_FLOW_ACTION_DECAP;
6932                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6933                                         (dev, attr, tunnel, tof_rule_type);
6934         }
6935         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6936         if (ret < 0)
6937                 return ret;
6938         is_root = (uint64_t)ret;
6939         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6940                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6941                 int type = items->type;
6942
6943                 if (!mlx5_flow_os_item_supported(type))
6944                         return rte_flow_error_set(error, ENOTSUP,
6945                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6946                                                   NULL, "item not supported");
6947                 switch (type) {
6948                 case RTE_FLOW_ITEM_TYPE_VOID:
6949                         break;
6950                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6951                         ret = flow_dv_validate_item_port_id
6952                                         (dev, items, attr, item_flags, error);
6953                         if (ret < 0)
6954                                 return ret;
6955                         last_item = MLX5_FLOW_ITEM_PORT_ID;
6956                         port_id_item = items;
6957                         break;
6958                 case RTE_FLOW_ITEM_TYPE_ETH:
6959                         ret = mlx5_flow_validate_item_eth(items, item_flags,
6960                                                           true, error);
6961                         if (ret < 0)
6962                                 return ret;
6963                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6964                                              MLX5_FLOW_LAYER_OUTER_L2;
6965                         if (items->mask != NULL && items->spec != NULL) {
6966                                 ether_type =
6967                                         ((const struct rte_flow_item_eth *)
6968                                          items->spec)->type;
6969                                 ether_type &=
6970                                         ((const struct rte_flow_item_eth *)
6971                                          items->mask)->type;
6972                                 ether_type = rte_be_to_cpu_16(ether_type);
6973                         } else {
6974                                 ether_type = 0;
6975                         }
6976                         break;
6977                 case RTE_FLOW_ITEM_TYPE_VLAN:
6978                         ret = flow_dv_validate_item_vlan(items, item_flags,
6979                                                          dev, error);
6980                         if (ret < 0)
6981                                 return ret;
6982                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6983                                              MLX5_FLOW_LAYER_OUTER_VLAN;
6984                         if (items->mask != NULL && items->spec != NULL) {
6985                                 ether_type =
6986                                         ((const struct rte_flow_item_vlan *)
6987                                          items->spec)->inner_type;
6988                                 ether_type &=
6989                                         ((const struct rte_flow_item_vlan *)
6990                                          items->mask)->inner_type;
6991                                 ether_type = rte_be_to_cpu_16(ether_type);
6992                         } else {
6993                                 ether_type = 0;
6994                         }
6995                         /* Store outer VLAN mask for of_push_vlan action. */
6996                         if (!tunnel)
6997                                 vlan_m = items->mask;
6998                         break;
6999                 case RTE_FLOW_ITEM_TYPE_IPV4:
7000                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7001                                                   &item_flags, &tunnel);
7002                         ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
7003                                                          last_item, ether_type,
7004                                                          error);
7005                         if (ret < 0)
7006                                 return ret;
7007                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7008                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7009                         if (items->mask != NULL &&
7010                             ((const struct rte_flow_item_ipv4 *)
7011                              items->mask)->hdr.next_proto_id) {
7012                                 next_protocol =
7013                                         ((const struct rte_flow_item_ipv4 *)
7014                                          (items->spec))->hdr.next_proto_id;
7015                                 next_protocol &=
7016                                         ((const struct rte_flow_item_ipv4 *)
7017                                          (items->mask))->hdr.next_proto_id;
7018                         } else {
7019                                 /* Reset for inner layer. */
7020                                 next_protocol = 0xff;
7021                         }
7022                         break;
7023                 case RTE_FLOW_ITEM_TYPE_IPV6:
7024                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7025                                                   &item_flags, &tunnel);
7026                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
7027                                                            last_item,
7028                                                            ether_type,
7029                                                            &nic_ipv6_mask,
7030                                                            error);
7031                         if (ret < 0)
7032                                 return ret;
7033                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7034                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7035                         if (items->mask != NULL &&
7036                             ((const struct rte_flow_item_ipv6 *)
7037                              items->mask)->hdr.proto) {
7038                                 item_ipv6_proto =
7039                                         ((const struct rte_flow_item_ipv6 *)
7040                                          items->spec)->hdr.proto;
7041                                 next_protocol =
7042                                         ((const struct rte_flow_item_ipv6 *)
7043                                          items->spec)->hdr.proto;
7044                                 next_protocol &=
7045                                         ((const struct rte_flow_item_ipv6 *)
7046                                          items->mask)->hdr.proto;
7047                         } else {
7048                                 /* Reset for inner layer. */
7049                                 next_protocol = 0xff;
7050                         }
7051                         break;
7052                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
7053                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
7054                                                                   item_flags,
7055                                                                   error);
7056                         if (ret < 0)
7057                                 return ret;
7058                         last_item = tunnel ?
7059                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
7060                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
7061                         if (items->mask != NULL &&
7062                             ((const struct rte_flow_item_ipv6_frag_ext *)
7063                              items->mask)->hdr.next_header) {
7064                                 next_protocol =
7065                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7066                                  items->spec)->hdr.next_header;
7067                                 next_protocol &=
7068                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7069                                  items->mask)->hdr.next_header;
7070                         } else {
7071                                 /* Reset for inner layer. */
7072                                 next_protocol = 0xff;
7073                         }
7074                         break;
7075                 case RTE_FLOW_ITEM_TYPE_TCP:
7076                         ret = mlx5_flow_validate_item_tcp
7077                                                 (items, item_flags,
7078                                                  next_protocol,
7079                                                  &nic_tcp_mask,
7080                                                  error);
7081                         if (ret < 0)
7082                                 return ret;
7083                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7084                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7085                         break;
7086                 case RTE_FLOW_ITEM_TYPE_UDP:
7087                         ret = mlx5_flow_validate_item_udp(items, item_flags,
7088                                                           next_protocol,
7089                                                           error);
7090                         const struct rte_flow_item_udp *spec = items->spec;
7091                         const struct rte_flow_item_udp *mask = items->mask;
7092                         if (!mask)
7093                                 mask = &rte_flow_item_udp_mask;
7094                         if (spec != NULL)
7095                                 udp_dport = rte_be_to_cpu_16
7096                                                 (spec->hdr.dst_port &
7097                                                  mask->hdr.dst_port);
7098                         if (ret < 0)
7099                                 return ret;
7100                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7101                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7102                         break;
7103                 case RTE_FLOW_ITEM_TYPE_GRE:
7104                         ret = mlx5_flow_validate_item_gre(items, item_flags,
7105                                                           next_protocol, error);
7106                         if (ret < 0)
7107                                 return ret;
7108                         gre_item = items;
7109                         last_item = MLX5_FLOW_LAYER_GRE;
7110                         break;
7111                 case RTE_FLOW_ITEM_TYPE_GRE_OPTION:
7112                         ret = mlx5_flow_validate_item_gre_option(dev, items, item_flags,
7113                                                           attr, gre_item, error);
7114                         if (ret < 0)
7115                                 return ret;
7116                         last_item = MLX5_FLOW_LAYER_GRE;
7117                         break;
7118                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7119                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7120                                                             next_protocol,
7121                                                             error);
7122                         if (ret < 0)
7123                                 return ret;
7124                         last_item = MLX5_FLOW_LAYER_NVGRE;
7125                         break;
7126                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7127                         ret = mlx5_flow_validate_item_gre_key
7128                                 (items, item_flags, gre_item, error);
7129                         if (ret < 0)
7130                                 return ret;
7131                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7132                         break;
7133                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7134                         ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
7135                                                             items, item_flags,
7136                                                             attr, error);
7137                         if (ret < 0)
7138                                 return ret;
7139                         last_item = MLX5_FLOW_LAYER_VXLAN;
7140                         break;
7141                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7142                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
7143                                                                 item_flags, dev,
7144                                                                 error);
7145                         if (ret < 0)
7146                                 return ret;
7147                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7148                         break;
7149                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7150                         ret = mlx5_flow_validate_item_geneve(items,
7151                                                              item_flags, dev,
7152                                                              error);
7153                         if (ret < 0)
7154                                 return ret;
7155                         geneve_item = items;
7156                         last_item = MLX5_FLOW_LAYER_GENEVE;
7157                         break;
7158                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7159                         ret = mlx5_flow_validate_item_geneve_opt(items,
7160                                                                  last_item,
7161                                                                  geneve_item,
7162                                                                  dev,
7163                                                                  error);
7164                         if (ret < 0)
7165                                 return ret;
7166                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7167                         break;
7168                 case RTE_FLOW_ITEM_TYPE_MPLS:
7169                         ret = mlx5_flow_validate_item_mpls(dev, items,
7170                                                            item_flags,
7171                                                            last_item, error);
7172                         if (ret < 0)
7173                                 return ret;
7174                         last_item = MLX5_FLOW_LAYER_MPLS;
7175                         break;
7176
7177                 case RTE_FLOW_ITEM_TYPE_MARK:
7178                         ret = flow_dv_validate_item_mark(dev, items, attr,
7179                                                          error);
7180                         if (ret < 0)
7181                                 return ret;
7182                         last_item = MLX5_FLOW_ITEM_MARK;
7183                         break;
7184                 case RTE_FLOW_ITEM_TYPE_META:
7185                         ret = flow_dv_validate_item_meta(dev, items, attr,
7186                                                          error);
7187                         if (ret < 0)
7188                                 return ret;
7189                         last_item = MLX5_FLOW_ITEM_METADATA;
7190                         break;
7191                 case RTE_FLOW_ITEM_TYPE_ICMP:
7192                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
7193                                                            next_protocol,
7194                                                            error);
7195                         if (ret < 0)
7196                                 return ret;
7197                         last_item = MLX5_FLOW_LAYER_ICMP;
7198                         break;
7199                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7200                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7201                                                             next_protocol,
7202                                                             error);
7203                         if (ret < 0)
7204                                 return ret;
7205                         item_ipv6_proto = IPPROTO_ICMPV6;
7206                         last_item = MLX5_FLOW_LAYER_ICMP6;
7207                         break;
7208                 case RTE_FLOW_ITEM_TYPE_TAG:
7209                         ret = flow_dv_validate_item_tag(dev, items,
7210                                                         attr, error);
7211                         if (ret < 0)
7212                                 return ret;
7213                         last_item = MLX5_FLOW_ITEM_TAG;
7214                         break;
7215                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7216                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7217                         break;
7218                 case RTE_FLOW_ITEM_TYPE_GTP:
7219                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7220                                                         error);
7221                         if (ret < 0)
7222                                 return ret;
7223                         gtp_item = items;
7224                         last_item = MLX5_FLOW_LAYER_GTP;
7225                         break;
7226                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7227                         ret = flow_dv_validate_item_gtp_psc(items, last_item,
7228                                                             gtp_item, attr,
7229                                                             error);
7230                         if (ret < 0)
7231                                 return ret;
7232                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
7233                         break;
7234                 case RTE_FLOW_ITEM_TYPE_ECPRI:
7235                         /* Capacity will be checked in the translate stage. */
7236                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7237                                                             last_item,
7238                                                             ether_type,
7239                                                             &nic_ecpri_mask,
7240                                                             error);
7241                         if (ret < 0)
7242                                 return ret;
7243                         last_item = MLX5_FLOW_LAYER_ECPRI;
7244                         break;
7245                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7246                         ret = flow_dv_validate_item_integrity(dev, items,
7247                                                               item_flags,
7248                                                               &last_item,
7249                                                               integrity_items,
7250                                                               error);
7251                         if (ret < 0)
7252                                 return ret;
7253                         break;
7254                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7255                         ret = flow_dv_validate_item_aso_ct(dev, items,
7256                                                            &item_flags, error);
7257                         if (ret < 0)
7258                                 return ret;
7259                         break;
7260                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7261                         /* tunnel offload item was processed before
7262                          * list it here as a supported type
7263                          */
7264                         break;
7265                 case RTE_FLOW_ITEM_TYPE_FLEX:
7266                         ret = flow_dv_validate_item_flex(dev, items, item_flags,
7267                                                          &last_item,
7268                                                          tunnel != 0, error);
7269                         if (ret < 0)
7270                                 return ret;
7271                         break;
7272                 default:
7273                         return rte_flow_error_set(error, ENOTSUP,
7274                                                   RTE_FLOW_ERROR_TYPE_ITEM,
7275                                                   NULL, "item not supported");
7276                 }
7277                 item_flags |= last_item;
7278         }
7279         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
7280                 ret = flow_dv_validate_item_integrity_post(integrity_items,
7281                                                            item_flags, error);
7282                 if (ret)
7283                         return ret;
7284         }
7285         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7286                 int type = actions->type;
7287                 bool shared_count = false;
7288
7289                 if (!mlx5_flow_os_action_supported(type))
7290                         return rte_flow_error_set(error, ENOTSUP,
7291                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7292                                                   actions,
7293                                                   "action not supported");
7294                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7295                         return rte_flow_error_set(error, ENOTSUP,
7296                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7297                                                   actions, "too many actions");
7298                 if (action_flags &
7299                         MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7300                         return rte_flow_error_set(error, ENOTSUP,
7301                                 RTE_FLOW_ERROR_TYPE_ACTION,
7302                                 NULL, "meter action with policy "
7303                                 "must be the last action");
7304                 switch (type) {
7305                 case RTE_FLOW_ACTION_TYPE_VOID:
7306                         break;
7307                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7308                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
7309                         ret = flow_dv_validate_action_port_id(dev,
7310                                                               action_flags,
7311                                                               actions,
7312                                                               attr,
7313                                                               error);
7314                         if (ret)
7315                                 return ret;
7316                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7317                         ++actions_n;
7318                         break;
7319                 case RTE_FLOW_ACTION_TYPE_FLAG:
7320                         ret = flow_dv_validate_action_flag(dev, action_flags,
7321                                                            attr, error);
7322                         if (ret < 0)
7323                                 return ret;
7324                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7325                                 /* Count all modify-header actions as one. */
7326                                 if (!(action_flags &
7327                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7328                                         ++actions_n;
7329                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
7330                                                 MLX5_FLOW_ACTION_MARK_EXT;
7331                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7332                                         modify_after_mirror = 1;
7333
7334                         } else {
7335                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
7336                                 ++actions_n;
7337                         }
7338                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7339                         break;
7340                 case RTE_FLOW_ACTION_TYPE_MARK:
7341                         ret = flow_dv_validate_action_mark(dev, actions,
7342                                                            action_flags,
7343                                                            attr, error);
7344                         if (ret < 0)
7345                                 return ret;
7346                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7347                                 /* Count all modify-header actions as one. */
7348                                 if (!(action_flags &
7349                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7350                                         ++actions_n;
7351                                 action_flags |= MLX5_FLOW_ACTION_MARK |
7352                                                 MLX5_FLOW_ACTION_MARK_EXT;
7353                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7354                                         modify_after_mirror = 1;
7355                         } else {
7356                                 action_flags |= MLX5_FLOW_ACTION_MARK;
7357                                 ++actions_n;
7358                         }
7359                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7360                         break;
7361                 case RTE_FLOW_ACTION_TYPE_SET_META:
7362                         ret = flow_dv_validate_action_set_meta(dev, actions,
7363                                                                action_flags,
7364                                                                attr, error);
7365                         if (ret < 0)
7366                                 return ret;
7367                         /* Count all modify-header actions as one action. */
7368                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7369                                 ++actions_n;
7370                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7371                                 modify_after_mirror = 1;
7372                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7373                         rw_act_num += MLX5_ACT_NUM_SET_META;
7374                         break;
7375                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7376                         ret = flow_dv_validate_action_set_tag(dev, actions,
7377                                                               action_flags,
7378                                                               attr, error);
7379                         if (ret < 0)
7380                                 return ret;
7381                         /* Count all modify-header actions as one action. */
7382                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7383                                 ++actions_n;
7384                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7385                                 modify_after_mirror = 1;
7386                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7387                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7388                         break;
7389                 case RTE_FLOW_ACTION_TYPE_DROP:
7390                         ret = mlx5_flow_validate_action_drop(action_flags,
7391                                                              attr, error);
7392                         if (ret < 0)
7393                                 return ret;
7394                         action_flags |= MLX5_FLOW_ACTION_DROP;
7395                         ++actions_n;
7396                         break;
7397                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7398                         ret = mlx5_flow_validate_action_queue(actions,
7399                                                               action_flags, dev,
7400                                                               attr, error);
7401                         if (ret < 0)
7402                                 return ret;
7403                         queue_index = ((const struct rte_flow_action_queue *)
7404                                                         (actions->conf))->index;
7405                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7406                         ++actions_n;
7407                         break;
7408                 case RTE_FLOW_ACTION_TYPE_RSS:
7409                         rss = actions->conf;
7410                         ret = mlx5_flow_validate_action_rss(actions,
7411                                                             action_flags, dev,
7412                                                             attr, item_flags,
7413                                                             error);
7414                         if (ret < 0)
7415                                 return ret;
7416                         if (rss && sample_rss &&
7417                             (sample_rss->level != rss->level ||
7418                             sample_rss->types != rss->types))
7419                                 return rte_flow_error_set(error, ENOTSUP,
7420                                         RTE_FLOW_ERROR_TYPE_ACTION,
7421                                         NULL,
7422                                         "Can't use the different RSS types "
7423                                         "or level in the same flow");
7424                         if (rss != NULL && rss->queue_num)
7425                                 queue_index = rss->queue[0];
7426                         action_flags |= MLX5_FLOW_ACTION_RSS;
7427                         ++actions_n;
7428                         break;
7429                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7430                         ret =
7431                         mlx5_flow_validate_action_default_miss(action_flags,
7432                                         attr, error);
7433                         if (ret < 0)
7434                                 return ret;
7435                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7436                         ++actions_n;
7437                         break;
7438                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7439                         shared_count = true;
7440                         /* fall-through. */
7441                 case RTE_FLOW_ACTION_TYPE_COUNT:
7442                         ret = flow_dv_validate_action_count(dev, shared_count,
7443                                                             action_flags,
7444                                                             error);
7445                         if (ret < 0)
7446                                 return ret;
7447                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7448                         ++actions_n;
7449                         break;
7450                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7451                         if (flow_dv_validate_action_pop_vlan(dev,
7452                                                              action_flags,
7453                                                              actions,
7454                                                              item_flags, attr,
7455                                                              error))
7456                                 return -rte_errno;
7457                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7458                                 modify_after_mirror = 1;
7459                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7460                         ++actions_n;
7461                         break;
7462                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7463                         ret = flow_dv_validate_action_push_vlan(dev,
7464                                                                 action_flags,
7465                                                                 vlan_m,
7466                                                                 actions, attr,
7467                                                                 error);
7468                         if (ret < 0)
7469                                 return ret;
7470                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7471                                 modify_after_mirror = 1;
7472                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7473                         ++actions_n;
7474                         break;
7475                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7476                         ret = flow_dv_validate_action_set_vlan_pcp
7477                                                 (action_flags, actions, error);
7478                         if (ret < 0)
7479                                 return ret;
7480                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7481                                 modify_after_mirror = 1;
7482                         /* Count PCP with push_vlan command. */
7483                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7484                         break;
7485                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7486                         ret = flow_dv_validate_action_set_vlan_vid
7487                                                 (item_flags, action_flags,
7488                                                  actions, error);
7489                         if (ret < 0)
7490                                 return ret;
7491                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7492                                 modify_after_mirror = 1;
7493                         /* Count VID with push_vlan command. */
7494                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7495                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
7496                         break;
7497                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7498                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7499                         ret = flow_dv_validate_action_l2_encap(dev,
7500                                                                action_flags,
7501                                                                actions, attr,
7502                                                                error);
7503                         if (ret < 0)
7504                                 return ret;
7505                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7506                         ++actions_n;
7507                         break;
7508                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7509                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7510                         ret = flow_dv_validate_action_decap(dev, action_flags,
7511                                                             actions, item_flags,
7512                                                             attr, error);
7513                         if (ret < 0)
7514                                 return ret;
7515                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7516                                 modify_after_mirror = 1;
7517                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7518                         ++actions_n;
7519                         break;
7520                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7521                         ret = flow_dv_validate_action_raw_encap_decap
7522                                 (dev, NULL, actions->conf, attr, &action_flags,
7523                                  &actions_n, actions, item_flags, error);
7524                         if (ret < 0)
7525                                 return ret;
7526                         break;
7527                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7528                         decap = actions->conf;
7529                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7530                                 ;
7531                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7532                                 encap = NULL;
7533                                 actions--;
7534                         } else {
7535                                 encap = actions->conf;
7536                         }
7537                         ret = flow_dv_validate_action_raw_encap_decap
7538                                            (dev,
7539                                             decap ? decap : &empty_decap, encap,
7540                                             attr, &action_flags, &actions_n,
7541                                             actions, item_flags, error);
7542                         if (ret < 0)
7543                                 return ret;
7544                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7545                             (action_flags & MLX5_FLOW_ACTION_DECAP))
7546                                 modify_after_mirror = 1;
7547                         break;
7548                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7549                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7550                         ret = flow_dv_validate_action_modify_mac(action_flags,
7551                                                                  actions,
7552                                                                  item_flags,
7553                                                                  error);
7554                         if (ret < 0)
7555                                 return ret;
7556                         /* Count all modify-header actions as one action. */
7557                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7558                                 ++actions_n;
7559                         action_flags |= actions->type ==
7560                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7561                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
7562                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
7563                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7564                                 modify_after_mirror = 1;
7565                         /*
7566                          * Even if the source and destination MAC addresses have
7567                          * overlap in the header with 4B alignment, the convert
7568                          * function will handle them separately and 4 SW actions
7569                          * will be created. And 2 actions will be added each
7570                          * time no matter how many bytes of address will be set.
7571                          */
7572                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7573                         break;
7574                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7575                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7576                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
7577                                                                   actions,
7578                                                                   item_flags,
7579                                                                   error);
7580                         if (ret < 0)
7581                                 return ret;
7582                         /* Count all modify-header actions as one action. */
7583                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7584                                 ++actions_n;
7585                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7586                                 modify_after_mirror = 1;
7587                         action_flags |= actions->type ==
7588                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7589                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7590                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
7591                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7592                         break;
7593                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7594                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7595                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
7596                                                                   actions,
7597                                                                   item_flags,
7598                                                                   error);
7599                         if (ret < 0)
7600                                 return ret;
7601                         if (item_ipv6_proto == IPPROTO_ICMPV6)
7602                                 return rte_flow_error_set(error, ENOTSUP,
7603                                         RTE_FLOW_ERROR_TYPE_ACTION,
7604                                         actions,
7605                                         "Can't change header "
7606                                         "with ICMPv6 proto");
7607                         /* Count all modify-header actions as one action. */
7608                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7609                                 ++actions_n;
7610                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7611                                 modify_after_mirror = 1;
7612                         action_flags |= actions->type ==
7613                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7614                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7615                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
7616                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7617                         break;
7618                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7619                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7620                         ret = flow_dv_validate_action_modify_tp(action_flags,
7621                                                                 actions,
7622                                                                 item_flags,
7623                                                                 error);
7624                         if (ret < 0)
7625                                 return ret;
7626                         /* Count all modify-header actions as one action. */
7627                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7628                                 ++actions_n;
7629                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7630                                 modify_after_mirror = 1;
7631                         action_flags |= actions->type ==
7632                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7633                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
7634                                                 MLX5_FLOW_ACTION_SET_TP_DST;
7635                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7636                         break;
7637                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7638                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7639                         ret = flow_dv_validate_action_modify_ttl(action_flags,
7640                                                                  actions,
7641                                                                  item_flags,
7642                                                                  error);
7643                         if (ret < 0)
7644                                 return ret;
7645                         /* Count all modify-header actions as one action. */
7646                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7647                                 ++actions_n;
7648                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7649                                 modify_after_mirror = 1;
7650                         action_flags |= actions->type ==
7651                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
7652                                                 MLX5_FLOW_ACTION_SET_TTL :
7653                                                 MLX5_FLOW_ACTION_DEC_TTL;
7654                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7655                         break;
7656                 case RTE_FLOW_ACTION_TYPE_JUMP:
7657                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7658                                                            action_flags,
7659                                                            attr, external,
7660                                                            error);
7661                         if (ret)
7662                                 return ret;
7663                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7664                             fdb_mirror_limit)
7665                                 return rte_flow_error_set(error, EINVAL,
7666                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7667                                                   NULL,
7668                                                   "sample and jump action combination is not supported");
7669                         ++actions_n;
7670                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7671                         break;
7672                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7673                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7674                         ret = flow_dv_validate_action_modify_tcp_seq
7675                                                                 (action_flags,
7676                                                                  actions,
7677                                                                  item_flags,
7678                                                                  error);
7679                         if (ret < 0)
7680                                 return ret;
7681                         /* Count all modify-header actions as one action. */
7682                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7683                                 ++actions_n;
7684                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7685                                 modify_after_mirror = 1;
7686                         action_flags |= actions->type ==
7687                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7688                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7689                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7690                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7691                         break;
7692                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7693                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7694                         ret = flow_dv_validate_action_modify_tcp_ack
7695                                                                 (action_flags,
7696                                                                  actions,
7697                                                                  item_flags,
7698                                                                  error);
7699                         if (ret < 0)
7700                                 return ret;
7701                         /* Count all modify-header actions as one action. */
7702                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7703                                 ++actions_n;
7704                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7705                                 modify_after_mirror = 1;
7706                         action_flags |= actions->type ==
7707                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7708                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
7709                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7710                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7711                         break;
7712                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7713                         break;
7714                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7715                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7716                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7717                         break;
7718                 case RTE_FLOW_ACTION_TYPE_METER:
7719                         ret = mlx5_flow_validate_action_meter(dev,
7720                                                               action_flags,
7721                                                               item_flags,
7722                                                               actions, attr,
7723                                                               port_id_item,
7724                                                               &def_policy,
7725                                                               error);
7726                         if (ret < 0)
7727                                 return ret;
7728                         action_flags |= MLX5_FLOW_ACTION_METER;
7729                         if (!def_policy)
7730                                 action_flags |=
7731                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7732                         ++actions_n;
7733                         /* Meter action will add one more TAG action. */
7734                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7735                         break;
7736                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7737                         if (!attr->transfer && !attr->group)
7738                                 return rte_flow_error_set(error, ENOTSUP,
7739                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7740                                                                            NULL,
7741                           "Shared ASO age action is not supported for group 0");
7742                         if (action_flags & MLX5_FLOW_ACTION_AGE)
7743                                 return rte_flow_error_set
7744                                                   (error, EINVAL,
7745                                                    RTE_FLOW_ERROR_TYPE_ACTION,
7746                                                    NULL,
7747                                                    "duplicate age actions set");
7748                         action_flags |= MLX5_FLOW_ACTION_AGE;
7749                         ++actions_n;
7750                         break;
7751                 case RTE_FLOW_ACTION_TYPE_AGE:
7752                         ret = flow_dv_validate_action_age(action_flags,
7753                                                           actions, dev,
7754                                                           error);
7755                         if (ret < 0)
7756                                 return ret;
7757                         /*
7758                          * Validate the regular AGE action (using counter)
7759                          * mutual exclusion with share counter actions.
7760                          */
7761                         if (!priv->sh->flow_hit_aso_en) {
7762                                 if (shared_count)
7763                                         return rte_flow_error_set
7764                                                 (error, EINVAL,
7765                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7766                                                 NULL,
7767                                                 "old age and shared count combination is not supported");
7768                                 if (sample_count)
7769                                         return rte_flow_error_set
7770                                                 (error, EINVAL,
7771                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7772                                                 NULL,
7773                                                 "old age action and count must be in the same sub flow");
7774                         }
7775                         action_flags |= MLX5_FLOW_ACTION_AGE;
7776                         ++actions_n;
7777                         break;
7778                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7779                         ret = flow_dv_validate_action_modify_ipv4_dscp
7780                                                          (action_flags,
7781                                                           actions,
7782                                                           item_flags,
7783                                                           error);
7784                         if (ret < 0)
7785                                 return ret;
7786                         /* Count all modify-header actions as one action. */
7787                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7788                                 ++actions_n;
7789                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7790                                 modify_after_mirror = 1;
7791                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7792                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7793                         break;
7794                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7795                         ret = flow_dv_validate_action_modify_ipv6_dscp
7796                                                                 (action_flags,
7797                                                                  actions,
7798                                                                  item_flags,
7799                                                                  error);
7800                         if (ret < 0)
7801                                 return ret;
7802                         /* Count all modify-header actions as one action. */
7803                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7804                                 ++actions_n;
7805                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7806                                 modify_after_mirror = 1;
7807                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7808                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7809                         break;
7810                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7811                         ret = flow_dv_validate_action_sample(&action_flags,
7812                                                              actions, dev,
7813                                                              attr, item_flags,
7814                                                              rss, &sample_rss,
7815                                                              &sample_count,
7816                                                              &fdb_mirror_limit,
7817                                                              error);
7818                         if (ret < 0)
7819                                 return ret;
7820                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7821                         ++actions_n;
7822                         break;
7823                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7824                         ret = flow_dv_validate_action_modify_field(dev,
7825                                                                    action_flags,
7826                                                                    actions,
7827                                                                    attr,
7828                                                                    error);
7829                         if (ret < 0)
7830                                 return ret;
7831                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7832                                 modify_after_mirror = 1;
7833                         /* Count all modify-header actions as one action. */
7834                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7835                                 ++actions_n;
7836                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7837                         rw_act_num += ret;
7838                         break;
7839                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7840                         ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7841                                                              item_flags, attr,
7842                                                              error);
7843                         if (ret < 0)
7844                                 return ret;
7845                         action_flags |= MLX5_FLOW_ACTION_CT;
7846                         break;
7847                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7848                         /* tunnel offload action was processed before
7849                          * list it here as a supported type
7850                          */
7851                         break;
7852                 default:
7853                         return rte_flow_error_set(error, ENOTSUP,
7854                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7855                                                   actions,
7856                                                   "action not supported");
7857                 }
7858         }
7859         /*
7860          * Validate actions in flow rules
7861          * - Explicit decap action is prohibited by the tunnel offload API.
7862          * - Drop action in tunnel steer rule is prohibited by the API.
7863          * - Application cannot use MARK action because it's value can mask
7864          *   tunnel default miss notification.
7865          * - JUMP in tunnel match rule has no support in current PMD
7866          *   implementation.
7867          * - TAG & META are reserved for future uses.
7868          */
7869         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7870                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
7871                                             MLX5_FLOW_ACTION_MARK     |
7872                                             MLX5_FLOW_ACTION_SET_TAG  |
7873                                             MLX5_FLOW_ACTION_SET_META |
7874                                             MLX5_FLOW_ACTION_DROP;
7875
7876                 if (action_flags & bad_actions_mask)
7877                         return rte_flow_error_set
7878                                         (error, EINVAL,
7879                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7880                                         "Invalid RTE action in tunnel "
7881                                         "set decap rule");
7882                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7883                         return rte_flow_error_set
7884                                         (error, EINVAL,
7885                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7886                                         "tunnel set decap rule must terminate "
7887                                         "with JUMP");
7888                 if (!attr->ingress)
7889                         return rte_flow_error_set
7890                                         (error, EINVAL,
7891                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7892                                         "tunnel flows for ingress traffic only");
7893         }
7894         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7895                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
7896                                             MLX5_FLOW_ACTION_MARK    |
7897                                             MLX5_FLOW_ACTION_SET_TAG |
7898                                             MLX5_FLOW_ACTION_SET_META;
7899
7900                 if (action_flags & bad_actions_mask)
7901                         return rte_flow_error_set
7902                                         (error, EINVAL,
7903                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7904                                         "Invalid RTE action in tunnel "
7905                                         "set match rule");
7906         }
7907         /*
7908          * Validate the drop action mutual exclusion with other actions.
7909          * Drop action is mutually-exclusive with any other action, except for
7910          * Count action.
7911          * Drop action compatibility with tunnel offload was already validated.
7912          */
7913         if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7914                             MLX5_FLOW_ACTION_TUNNEL_MATCH));
7915         else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7916             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7917                 return rte_flow_error_set(error, EINVAL,
7918                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7919                                           "Drop action is mutually-exclusive "
7920                                           "with any other action, except for "
7921                                           "Count action");
7922         /* Eswitch has few restrictions on using items and actions */
7923         if (attr->transfer) {
7924                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7925                     action_flags & MLX5_FLOW_ACTION_FLAG)
7926                         return rte_flow_error_set(error, ENOTSUP,
7927                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7928                                                   NULL,
7929                                                   "unsupported action FLAG");
7930                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7931                     action_flags & MLX5_FLOW_ACTION_MARK)
7932                         return rte_flow_error_set(error, ENOTSUP,
7933                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7934                                                   NULL,
7935                                                   "unsupported action MARK");
7936                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7937                         return rte_flow_error_set(error, ENOTSUP,
7938                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7939                                                   NULL,
7940                                                   "unsupported action QUEUE");
7941                 if (action_flags & MLX5_FLOW_ACTION_RSS)
7942                         return rte_flow_error_set(error, ENOTSUP,
7943                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7944                                                   NULL,
7945                                                   "unsupported action RSS");
7946                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7947                         return rte_flow_error_set(error, EINVAL,
7948                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7949                                                   actions,
7950                                                   "no fate action is found");
7951         } else {
7952                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7953                         return rte_flow_error_set(error, EINVAL,
7954                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7955                                                   actions,
7956                                                   "no fate action is found");
7957         }
7958         /*
7959          * Continue validation for Xcap and VLAN actions.
7960          * If hairpin is working in explicit TX rule mode, there is no actions
7961          * splitting and the validation of hairpin ingress flow should be the
7962          * same as other standard flows.
7963          */
7964         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7965                              MLX5_FLOW_VLAN_ACTIONS)) &&
7966             (queue_index == 0xFFFF || !mlx5_rxq_is_hairpin(dev, queue_index) ||
7967              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7968              conf->tx_explicit != 0))) {
7969                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7970                     MLX5_FLOW_XCAP_ACTIONS)
7971                         return rte_flow_error_set(error, ENOTSUP,
7972                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7973                                                   NULL, "encap and decap "
7974                                                   "combination aren't supported");
7975                 if (!attr->transfer && attr->ingress) {
7976                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7977                                 return rte_flow_error_set
7978                                                 (error, ENOTSUP,
7979                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7980                                                  NULL, "encap is not supported"
7981                                                  " for ingress traffic");
7982                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7983                                 return rte_flow_error_set
7984                                                 (error, ENOTSUP,
7985                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7986                                                  NULL, "push VLAN action not "
7987                                                  "supported for ingress");
7988                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7989                                         MLX5_FLOW_VLAN_ACTIONS)
7990                                 return rte_flow_error_set
7991                                                 (error, ENOTSUP,
7992                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7993                                                  NULL, "no support for "
7994                                                  "multiple VLAN actions");
7995                 }
7996         }
7997         if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7998                 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7999                         ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
8000                         attr->ingress)
8001                         return rte_flow_error_set
8002                                 (error, ENOTSUP,
8003                                 RTE_FLOW_ERROR_TYPE_ACTION,
8004                                 NULL, "fate action not supported for "
8005                                 "meter with policy");
8006                 if (attr->egress) {
8007                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
8008                                 return rte_flow_error_set
8009                                         (error, ENOTSUP,
8010                                         RTE_FLOW_ERROR_TYPE_ACTION,
8011                                         NULL, "modify header action in egress "
8012                                         "cannot be done before meter action");
8013                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
8014                                 return rte_flow_error_set
8015                                         (error, ENOTSUP,
8016                                         RTE_FLOW_ERROR_TYPE_ACTION,
8017                                         NULL, "encap action in egress "
8018                                         "cannot be done before meter action");
8019                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
8020                                 return rte_flow_error_set
8021                                         (error, ENOTSUP,
8022                                         RTE_FLOW_ERROR_TYPE_ACTION,
8023                                         NULL, "push vlan action in egress "
8024                                         "cannot be done before meter action");
8025                 }
8026         }
8027         /*
8028          * Hairpin flow will add one more TAG action in TX implicit mode.
8029          * In TX explicit mode, there will be no hairpin flow ID.
8030          */
8031         if (hairpin > 0)
8032                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8033         /* extra metadata enabled: one more TAG action will be add. */
8034         if (dev_conf->dv_flow_en &&
8035             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
8036             mlx5_flow_ext_mreg_supported(dev))
8037                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8038         if (rw_act_num >
8039                         flow_dv_modify_hdr_action_max(dev, is_root)) {
8040                 return rte_flow_error_set(error, ENOTSUP,
8041                                           RTE_FLOW_ERROR_TYPE_ACTION,
8042                                           NULL, "too many header modify"
8043                                           " actions to support");
8044         }
8045         /* Eswitch egress mirror and modify flow has limitation on CX5 */
8046         if (fdb_mirror_limit && modify_after_mirror)
8047                 return rte_flow_error_set(error, EINVAL,
8048                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8049                                 "sample before modify action is not supported");
8050         return 0;
8051 }
8052
8053 /**
8054  * Internal preparation function. Allocates the DV flow size,
8055  * this size is constant.
8056  *
8057  * @param[in] dev
8058  *   Pointer to the rte_eth_dev structure.
8059  * @param[in] attr
8060  *   Pointer to the flow attributes.
8061  * @param[in] items
8062  *   Pointer to the list of items.
8063  * @param[in] actions
8064  *   Pointer to the list of actions.
8065  * @param[out] error
8066  *   Pointer to the error structure.
8067  *
8068  * @return
8069  *   Pointer to mlx5_flow object on success,
8070  *   otherwise NULL and rte_errno is set.
8071  */
8072 static struct mlx5_flow *
8073 flow_dv_prepare(struct rte_eth_dev *dev,
8074                 const struct rte_flow_attr *attr __rte_unused,
8075                 const struct rte_flow_item items[] __rte_unused,
8076                 const struct rte_flow_action actions[] __rte_unused,
8077                 struct rte_flow_error *error)
8078 {
8079         uint32_t handle_idx = 0;
8080         struct mlx5_flow *dev_flow;
8081         struct mlx5_flow_handle *dev_handle;
8082         struct mlx5_priv *priv = dev->data->dev_private;
8083         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8084
8085         MLX5_ASSERT(wks);
8086         wks->skip_matcher_reg = 0;
8087         wks->policy = NULL;
8088         wks->final_policy = NULL;
8089         /* In case of corrupting the memory. */
8090         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8091                 rte_flow_error_set(error, ENOSPC,
8092                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8093                                    "not free temporary device flow");
8094                 return NULL;
8095         }
8096         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8097                                    &handle_idx);
8098         if (!dev_handle) {
8099                 rte_flow_error_set(error, ENOMEM,
8100                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8101                                    "not enough memory to create flow handle");
8102                 return NULL;
8103         }
8104         MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8105         dev_flow = &wks->flows[wks->flow_idx++];
8106         memset(dev_flow, 0, sizeof(*dev_flow));
8107         dev_flow->handle = dev_handle;
8108         dev_flow->handle_idx = handle_idx;
8109         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8110         dev_flow->ingress = attr->ingress;
8111         dev_flow->dv.transfer = attr->transfer;
8112         return dev_flow;
8113 }
8114
8115 #ifdef RTE_LIBRTE_MLX5_DEBUG
8116 /**
8117  * Sanity check for match mask and value. Similar to check_valid_spec() in
8118  * kernel driver. If unmasked bit is present in value, it returns failure.
8119  *
8120  * @param match_mask
8121  *   pointer to match mask buffer.
8122  * @param match_value
8123  *   pointer to match value buffer.
8124  *
8125  * @return
8126  *   0 if valid, -EINVAL otherwise.
8127  */
8128 static int
8129 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8130 {
8131         uint8_t *m = match_mask;
8132         uint8_t *v = match_value;
8133         unsigned int i;
8134
8135         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8136                 if (v[i] & ~m[i]) {
8137                         DRV_LOG(ERR,
8138                                 "match_value differs from match_criteria"
8139                                 " %p[%u] != %p[%u]",
8140                                 match_value, i, match_mask, i);
8141                         return -EINVAL;
8142                 }
8143         }
8144         return 0;
8145 }
8146 #endif
8147
8148 /**
8149  * Add match of ip_version.
8150  *
8151  * @param[in] group
8152  *   Flow group.
8153  * @param[in] headers_v
8154  *   Values header pointer.
8155  * @param[in] headers_m
8156  *   Masks header pointer.
8157  * @param[in] ip_version
8158  *   The IP version to set.
8159  */
8160 static inline void
8161 flow_dv_set_match_ip_version(uint32_t group,
8162                              void *headers_v,
8163                              void *headers_m,
8164                              uint8_t ip_version)
8165 {
8166         if (group == 0)
8167                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8168         else
8169                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8170                          ip_version);
8171         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8172         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8173         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8174 }
8175
8176 /**
8177  * Add Ethernet item to matcher and to the value.
8178  *
8179  * @param[in, out] matcher
8180  *   Flow matcher.
8181  * @param[in, out] key
8182  *   Flow matcher value.
8183  * @param[in] item
8184  *   Flow pattern to translate.
8185  * @param[in] inner
8186  *   Item is inner pattern.
8187  */
8188 static void
8189 flow_dv_translate_item_eth(void *matcher, void *key,
8190                            const struct rte_flow_item *item, int inner,
8191                            uint32_t group)
8192 {
8193         const struct rte_flow_item_eth *eth_m = item->mask;
8194         const struct rte_flow_item_eth *eth_v = item->spec;
8195         const struct rte_flow_item_eth nic_mask = {
8196                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8197                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8198                 .type = RTE_BE16(0xffff),
8199                 .has_vlan = 0,
8200         };
8201         void *hdrs_m;
8202         void *hdrs_v;
8203         char *l24_v;
8204         unsigned int i;
8205
8206         if (!eth_v)
8207                 return;
8208         if (!eth_m)
8209                 eth_m = &nic_mask;
8210         if (inner) {
8211                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8212                                          inner_headers);
8213                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8214         } else {
8215                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8216                                          outer_headers);
8217                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8218         }
8219         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8220                &eth_m->dst, sizeof(eth_m->dst));
8221         /* The value must be in the range of the mask. */
8222         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8223         for (i = 0; i < sizeof(eth_m->dst); ++i)
8224                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8225         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8226                &eth_m->src, sizeof(eth_m->src));
8227         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8228         /* The value must be in the range of the mask. */
8229         for (i = 0; i < sizeof(eth_m->dst); ++i)
8230                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8231         /*
8232          * HW supports match on one Ethertype, the Ethertype following the last
8233          * VLAN tag of the packet (see PRM).
8234          * Set match on ethertype only if ETH header is not followed by VLAN.
8235          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8236          * ethertype, and use ip_version field instead.
8237          * eCPRI over Ether layer will use type value 0xAEFE.
8238          */
8239         if (eth_m->type == 0xFFFF) {
8240                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8241                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8242                 switch (eth_v->type) {
8243                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8244                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8245                         return;
8246                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8247                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8248                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8249                         return;
8250                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8251                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8252                         return;
8253                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8254                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8255                         return;
8256                 default:
8257                         break;
8258                 }
8259         }
8260         if (eth_m->has_vlan) {
8261                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8262                 if (eth_v->has_vlan) {
8263                         /*
8264                          * Here, when also has_more_vlan field in VLAN item is
8265                          * not set, only single-tagged packets will be matched.
8266                          */
8267                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8268                         return;
8269                 }
8270         }
8271         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8272                  rte_be_to_cpu_16(eth_m->type));
8273         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8274         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8275 }
8276
8277 /**
8278  * Add VLAN item to matcher and to the value.
8279  *
8280  * @param[in, out] dev_flow
8281  *   Flow descriptor.
8282  * @param[in, out] matcher
8283  *   Flow matcher.
8284  * @param[in, out] key
8285  *   Flow matcher value.
8286  * @param[in] item
8287  *   Flow pattern to translate.
8288  * @param[in] inner
8289  *   Item is inner pattern.
8290  */
8291 static void
8292 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8293                             void *matcher, void *key,
8294                             const struct rte_flow_item *item,
8295                             int inner, uint32_t group)
8296 {
8297         const struct rte_flow_item_vlan *vlan_m = item->mask;
8298         const struct rte_flow_item_vlan *vlan_v = item->spec;
8299         void *hdrs_m;
8300         void *hdrs_v;
8301         uint16_t tci_m;
8302         uint16_t tci_v;
8303
8304         if (inner) {
8305                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8306                                          inner_headers);
8307                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8308         } else {
8309                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8310                                          outer_headers);
8311                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8312                 /*
8313                  * This is workaround, masks are not supported,
8314                  * and pre-validated.
8315                  */
8316                 if (vlan_v)
8317                         dev_flow->handle->vf_vlan.tag =
8318                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8319         }
8320         /*
8321          * When VLAN item exists in flow, mark packet as tagged,
8322          * even if TCI is not specified.
8323          */
8324         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8325                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8326                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8327         }
8328         if (!vlan_v)
8329                 return;
8330         if (!vlan_m)
8331                 vlan_m = &rte_flow_item_vlan_mask;
8332         tci_m = rte_be_to_cpu_16(vlan_m->tci);
8333         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8334         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8335         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8336         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8337         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8338         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8339         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8340         /*
8341          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8342          * ethertype, and use ip_version field instead.
8343          */
8344         if (vlan_m->inner_type == 0xFFFF) {
8345                 switch (vlan_v->inner_type) {
8346                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8347                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8348                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8349                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8350                         return;
8351                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8352                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8353                         return;
8354                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8355                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8356                         return;
8357                 default:
8358                         break;
8359                 }
8360         }
8361         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8362                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8363                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8364                 /* Only one vlan_tag bit can be set. */
8365                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8366                 return;
8367         }
8368         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8369                  rte_be_to_cpu_16(vlan_m->inner_type));
8370         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8371                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8372 }
8373
8374 /**
8375  * Add IPV4 item to matcher and to the value.
8376  *
8377  * @param[in, out] matcher
8378  *   Flow matcher.
8379  * @param[in, out] key
8380  *   Flow matcher value.
8381  * @param[in] item
8382  *   Flow pattern to translate.
8383  * @param[in] inner
8384  *   Item is inner pattern.
8385  * @param[in] group
8386  *   The group to insert the rule.
8387  */
8388 static void
8389 flow_dv_translate_item_ipv4(void *matcher, void *key,
8390                             const struct rte_flow_item *item,
8391                             int inner, uint32_t group)
8392 {
8393         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8394         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8395         const struct rte_flow_item_ipv4 nic_mask = {
8396                 .hdr = {
8397                         .src_addr = RTE_BE32(0xffffffff),
8398                         .dst_addr = RTE_BE32(0xffffffff),
8399                         .type_of_service = 0xff,
8400                         .next_proto_id = 0xff,
8401                         .time_to_live = 0xff,
8402                 },
8403         };
8404         void *headers_m;
8405         void *headers_v;
8406         char *l24_m;
8407         char *l24_v;
8408         uint8_t tos, ihl_m, ihl_v;
8409
8410         if (inner) {
8411                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8412                                          inner_headers);
8413                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8414         } else {
8415                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8416                                          outer_headers);
8417                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8418         }
8419         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8420         if (!ipv4_v)
8421                 return;
8422         if (!ipv4_m)
8423                 ipv4_m = &nic_mask;
8424         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8425                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8426         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8427                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8428         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8429         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8430         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8431                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8432         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8433                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8434         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8435         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8436         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8437         ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8438         ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8439         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8440         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8441         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8442                  ipv4_m->hdr.type_of_service);
8443         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8444         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8445                  ipv4_m->hdr.type_of_service >> 2);
8446         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8447         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8448                  ipv4_m->hdr.next_proto_id);
8449         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8450                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8451         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8452                  ipv4_m->hdr.time_to_live);
8453         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8454                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8455         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8456                  !!(ipv4_m->hdr.fragment_offset));
8457         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8458                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8459 }
8460
8461 /**
8462  * Add IPV6 item to matcher and to the value.
8463  *
8464  * @param[in, out] matcher
8465  *   Flow matcher.
8466  * @param[in, out] key
8467  *   Flow matcher value.
8468  * @param[in] item
8469  *   Flow pattern to translate.
8470  * @param[in] inner
8471  *   Item is inner pattern.
8472  * @param[in] group
8473  *   The group to insert the rule.
8474  */
8475 static void
8476 flow_dv_translate_item_ipv6(void *matcher, void *key,
8477                             const struct rte_flow_item *item,
8478                             int inner, uint32_t group)
8479 {
8480         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8481         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8482         const struct rte_flow_item_ipv6 nic_mask = {
8483                 .hdr = {
8484                         .src_addr =
8485                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8486                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8487                         .dst_addr =
8488                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8489                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8490                         .vtc_flow = RTE_BE32(0xffffffff),
8491                         .proto = 0xff,
8492                         .hop_limits = 0xff,
8493                 },
8494         };
8495         void *headers_m;
8496         void *headers_v;
8497         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8498         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8499         char *l24_m;
8500         char *l24_v;
8501         uint32_t vtc_m;
8502         uint32_t vtc_v;
8503         int i;
8504         int size;
8505
8506         if (inner) {
8507                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8508                                          inner_headers);
8509                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8510         } else {
8511                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8512                                          outer_headers);
8513                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8514         }
8515         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8516         if (!ipv6_v)
8517                 return;
8518         if (!ipv6_m)
8519                 ipv6_m = &nic_mask;
8520         size = sizeof(ipv6_m->hdr.dst_addr);
8521         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8522                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8523         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8524                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8525         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8526         for (i = 0; i < size; ++i)
8527                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8528         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8529                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8530         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8531                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8532         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8533         for (i = 0; i < size; ++i)
8534                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8535         /* TOS. */
8536         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8537         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8538         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8539         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8540         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8541         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8542         /* Label. */
8543         if (inner) {
8544                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8545                          vtc_m);
8546                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8547                          vtc_v);
8548         } else {
8549                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8550                          vtc_m);
8551                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8552                          vtc_v);
8553         }
8554         /* Protocol. */
8555         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8556                  ipv6_m->hdr.proto);
8557         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8558                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8559         /* Hop limit. */
8560         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8561                  ipv6_m->hdr.hop_limits);
8562         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8563                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8564         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8565                  !!(ipv6_m->has_frag_ext));
8566         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8567                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8568 }
8569
8570 /**
8571  * Add IPV6 fragment extension item to matcher and to the value.
8572  *
8573  * @param[in, out] matcher
8574  *   Flow matcher.
8575  * @param[in, out] key
8576  *   Flow matcher value.
8577  * @param[in] item
8578  *   Flow pattern to translate.
8579  * @param[in] inner
8580  *   Item is inner pattern.
8581  */
8582 static void
8583 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8584                                      const struct rte_flow_item *item,
8585                                      int inner)
8586 {
8587         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8588         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8589         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8590                 .hdr = {
8591                         .next_header = 0xff,
8592                         .frag_data = RTE_BE16(0xffff),
8593                 },
8594         };
8595         void *headers_m;
8596         void *headers_v;
8597
8598         if (inner) {
8599                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8600                                          inner_headers);
8601                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8602         } else {
8603                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8604                                          outer_headers);
8605                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8606         }
8607         /* IPv6 fragment extension item exists, so packet is IP fragment. */
8608         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8609         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8610         if (!ipv6_frag_ext_v)
8611                 return;
8612         if (!ipv6_frag_ext_m)
8613                 ipv6_frag_ext_m = &nic_mask;
8614         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8615                  ipv6_frag_ext_m->hdr.next_header);
8616         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8617                  ipv6_frag_ext_v->hdr.next_header &
8618                  ipv6_frag_ext_m->hdr.next_header);
8619 }
8620
8621 /**
8622  * Add TCP item to matcher and to the value.
8623  *
8624  * @param[in, out] matcher
8625  *   Flow matcher.
8626  * @param[in, out] key
8627  *   Flow matcher value.
8628  * @param[in] item
8629  *   Flow pattern to translate.
8630  * @param[in] inner
8631  *   Item is inner pattern.
8632  */
8633 static void
8634 flow_dv_translate_item_tcp(void *matcher, void *key,
8635                            const struct rte_flow_item *item,
8636                            int inner)
8637 {
8638         const struct rte_flow_item_tcp *tcp_m = item->mask;
8639         const struct rte_flow_item_tcp *tcp_v = item->spec;
8640         void *headers_m;
8641         void *headers_v;
8642
8643         if (inner) {
8644                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8645                                          inner_headers);
8646                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8647         } else {
8648                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8649                                          outer_headers);
8650                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8651         }
8652         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8653         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8654         if (!tcp_v)
8655                 return;
8656         if (!tcp_m)
8657                 tcp_m = &rte_flow_item_tcp_mask;
8658         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8659                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
8660         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8661                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8662         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8663                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8664         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8665                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8666         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8667                  tcp_m->hdr.tcp_flags);
8668         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8669                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8670 }
8671
8672 /**
8673  * Add UDP item to matcher and to the value.
8674  *
8675  * @param[in, out] matcher
8676  *   Flow matcher.
8677  * @param[in, out] key
8678  *   Flow matcher value.
8679  * @param[in] item
8680  *   Flow pattern to translate.
8681  * @param[in] inner
8682  *   Item is inner pattern.
8683  */
8684 static void
8685 flow_dv_translate_item_udp(void *matcher, void *key,
8686                            const struct rte_flow_item *item,
8687                            int inner)
8688 {
8689         const struct rte_flow_item_udp *udp_m = item->mask;
8690         const struct rte_flow_item_udp *udp_v = item->spec;
8691         void *headers_m;
8692         void *headers_v;
8693
8694         if (inner) {
8695                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8696                                          inner_headers);
8697                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8698         } else {
8699                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8700                                          outer_headers);
8701                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8702         }
8703         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8704         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8705         if (!udp_v)
8706                 return;
8707         if (!udp_m)
8708                 udp_m = &rte_flow_item_udp_mask;
8709         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8710                  rte_be_to_cpu_16(udp_m->hdr.src_port));
8711         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8712                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8713         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8714                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
8715         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8716                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8717 }
8718
8719 /**
8720  * Add GRE optional Key item to matcher and to the value.
8721  *
8722  * @param[in, out] matcher
8723  *   Flow matcher.
8724  * @param[in, out] key
8725  *   Flow matcher value.
8726  * @param[in] item
8727  *   Flow pattern to translate.
8728  * @param[in] inner
8729  *   Item is inner pattern.
8730  */
8731 static void
8732 flow_dv_translate_item_gre_key(void *matcher, void *key,
8733                                    const struct rte_flow_item *item)
8734 {
8735         const rte_be32_t *key_m = item->mask;
8736         const rte_be32_t *key_v = item->spec;
8737         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8738         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8739         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8740
8741         /* GRE K bit must be on and should already be validated */
8742         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8743         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8744         if (!key_v)
8745                 return;
8746         if (!key_m)
8747                 key_m = &gre_key_default_mask;
8748         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8749                  rte_be_to_cpu_32(*key_m) >> 8);
8750         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8751                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8752         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8753                  rte_be_to_cpu_32(*key_m) & 0xFF);
8754         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8755                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8756 }
8757
8758 /**
8759  * Add GRE item to matcher and to the value.
8760  *
8761  * @param[in, out] matcher
8762  *   Flow matcher.
8763  * @param[in, out] key
8764  *   Flow matcher value.
8765  * @param[in] item
8766  *   Flow pattern to translate.
8767  * @param[in] pattern_flags
8768  *   Accumulated pattern flags.
8769  */
8770 static void
8771 flow_dv_translate_item_gre(void *matcher, void *key,
8772                            const struct rte_flow_item *item,
8773                            uint64_t pattern_flags)
8774 {
8775         static const struct rte_flow_item_gre empty_gre = {0,};
8776         const struct rte_flow_item_gre *gre_m = item->mask;
8777         const struct rte_flow_item_gre *gre_v = item->spec;
8778         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
8779         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8780         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8781         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8782         struct {
8783                 union {
8784                         __extension__
8785                         struct {
8786                                 uint16_t version:3;
8787                                 uint16_t rsvd0:9;
8788                                 uint16_t s_present:1;
8789                                 uint16_t k_present:1;
8790                                 uint16_t rsvd_bit1:1;
8791                                 uint16_t c_present:1;
8792                         };
8793                         uint16_t value;
8794                 };
8795         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8796         uint16_t protocol_m, protocol_v;
8797
8798         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8799         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8800         if (!gre_v) {
8801                 gre_v = &empty_gre;
8802                 gre_m = &empty_gre;
8803         } else {
8804                 if (!gre_m)
8805                         gre_m = &rte_flow_item_gre_mask;
8806         }
8807         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8808         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8809         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8810                  gre_crks_rsvd0_ver_m.c_present);
8811         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8812                  gre_crks_rsvd0_ver_v.c_present &
8813                  gre_crks_rsvd0_ver_m.c_present);
8814         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8815                  gre_crks_rsvd0_ver_m.k_present);
8816         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8817                  gre_crks_rsvd0_ver_v.k_present &
8818                  gre_crks_rsvd0_ver_m.k_present);
8819         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8820                  gre_crks_rsvd0_ver_m.s_present);
8821         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8822                  gre_crks_rsvd0_ver_v.s_present &
8823                  gre_crks_rsvd0_ver_m.s_present);
8824         protocol_m = rte_be_to_cpu_16(gre_m->protocol);
8825         protocol_v = rte_be_to_cpu_16(gre_v->protocol);
8826         if (!protocol_m) {
8827                 /* Force next protocol to prevent matchers duplication */
8828                 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
8829                 if (protocol_v)
8830                         protocol_m = 0xFFFF;
8831         }
8832         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, protocol_m);
8833         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8834                  protocol_m & protocol_v);
8835 }
8836
8837 /**
8838  * Add GRE optional items to matcher and to the value.
8839  *
8840  * @param[in, out] matcher
8841  *   Flow matcher.
8842  * @param[in, out] key
8843  *   Flow matcher value.
8844  * @param[in] item
8845  *   Flow pattern to translate.
8846  * @param[in] gre_item
8847  *   Pointer to gre_item.
8848  * @param[in] pattern_flags
8849  *   Accumulated pattern flags.
8850  */
8851 static void
8852 flow_dv_translate_item_gre_option(void *matcher, void *key,
8853                                   const struct rte_flow_item *item,
8854                                   const struct rte_flow_item *gre_item,
8855                                   uint64_t pattern_flags)
8856 {
8857         const struct rte_flow_item_gre_opt *option_m = item->mask;
8858         const struct rte_flow_item_gre_opt *option_v = item->spec;
8859         const struct rte_flow_item_gre *gre_m = gre_item->mask;
8860         const struct rte_flow_item_gre *gre_v = gre_item->spec;
8861         static const struct rte_flow_item_gre empty_gre = {0};
8862         struct rte_flow_item gre_key_item;
8863         uint16_t c_rsvd0_ver_m, c_rsvd0_ver_v;
8864         uint16_t protocol_m, protocol_v;
8865         void *misc5_m;
8866         void *misc5_v;
8867
8868         /*
8869          * If only match key field, keep using misc for matching.
8870          * If need to match checksum or sequence, using misc5 and do
8871          * not need using misc.
8872          */
8873         if (!(option_m->sequence.sequence ||
8874               option_m->checksum_rsvd.checksum)) {
8875                 flow_dv_translate_item_gre(matcher, key, gre_item,
8876                                            pattern_flags);
8877                 gre_key_item.spec = &option_v->key.key;
8878                 gre_key_item.mask = &option_m->key.key;
8879                 flow_dv_translate_item_gre_key(matcher, key, &gre_key_item);
8880                 return;
8881         }
8882         if (!gre_v) {
8883                 gre_v = &empty_gre;
8884                 gre_m = &empty_gre;
8885         } else {
8886                 if (!gre_m)
8887                         gre_m = &rte_flow_item_gre_mask;
8888         }
8889         protocol_v = gre_v->protocol;
8890         protocol_m = gre_m->protocol;
8891         if (!protocol_m) {
8892                 /* Force next protocol to prevent matchers duplication */
8893                 uint16_t ether_type =
8894                         mlx5_translate_tunnel_etypes(pattern_flags);
8895                 if (ether_type) {
8896                         protocol_v = rte_be_to_cpu_16(ether_type);
8897                         protocol_m = UINT16_MAX;
8898                 }
8899         }
8900         c_rsvd0_ver_v = gre_v->c_rsvd0_ver;
8901         c_rsvd0_ver_m = gre_m->c_rsvd0_ver;
8902         if (option_m->sequence.sequence) {
8903                 c_rsvd0_ver_v |= RTE_BE16(0x1000);
8904                 c_rsvd0_ver_m |= RTE_BE16(0x1000);
8905         }
8906         if (option_m->key.key) {
8907                 c_rsvd0_ver_v |= RTE_BE16(0x2000);
8908                 c_rsvd0_ver_m |= RTE_BE16(0x2000);
8909         }
8910         if (option_m->checksum_rsvd.checksum) {
8911                 c_rsvd0_ver_v |= RTE_BE16(0x8000);
8912                 c_rsvd0_ver_m |= RTE_BE16(0x8000);
8913         }
8914         /*
8915          * Hardware parses GRE optional field into the fixed location,
8916          * do not need to adjust the tunnel dword indices.
8917          */
8918         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8919         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8920         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_0,
8921                  rte_be_to_cpu_32((c_rsvd0_ver_v | protocol_v << 16) &
8922                                   (c_rsvd0_ver_m | protocol_m << 16)));
8923         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_0,
8924                  rte_be_to_cpu_32(c_rsvd0_ver_m | protocol_m << 16));
8925         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_1,
8926                  rte_be_to_cpu_32(option_v->checksum_rsvd.checksum &
8927                                   option_m->checksum_rsvd.checksum));
8928         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_1,
8929                  rte_be_to_cpu_32(option_m->checksum_rsvd.checksum));
8930         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_2,
8931                  rte_be_to_cpu_32(option_v->key.key & option_m->key.key));
8932         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_2,
8933                  rte_be_to_cpu_32(option_m->key.key));
8934         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_3,
8935                  rte_be_to_cpu_32(option_v->sequence.sequence &
8936                                   option_m->sequence.sequence));
8937         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_3,
8938                  rte_be_to_cpu_32(option_m->sequence.sequence));
8939 }
8940
8941 /**
8942  * Add NVGRE item to matcher and to the value.
8943  *
8944  * @param[in, out] matcher
8945  *   Flow matcher.
8946  * @param[in, out] key
8947  *   Flow matcher value.
8948  * @param[in] item
8949  *   Flow pattern to translate.
8950  * @param[in] pattern_flags
8951  *   Accumulated pattern flags.
8952  */
8953 static void
8954 flow_dv_translate_item_nvgre(void *matcher, void *key,
8955                              const struct rte_flow_item *item,
8956                              unsigned long pattern_flags)
8957 {
8958         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8959         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8960         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8961         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8962         const char *tni_flow_id_m;
8963         const char *tni_flow_id_v;
8964         char *gre_key_m;
8965         char *gre_key_v;
8966         int size;
8967         int i;
8968
8969         /* For NVGRE, GRE header fields must be set with defined values. */
8970         const struct rte_flow_item_gre gre_spec = {
8971                 .c_rsvd0_ver = RTE_BE16(0x2000),
8972                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8973         };
8974         const struct rte_flow_item_gre gre_mask = {
8975                 .c_rsvd0_ver = RTE_BE16(0xB000),
8976                 .protocol = RTE_BE16(UINT16_MAX),
8977         };
8978         const struct rte_flow_item gre_item = {
8979                 .spec = &gre_spec,
8980                 .mask = &gre_mask,
8981                 .last = NULL,
8982         };
8983         flow_dv_translate_item_gre(matcher, key, &gre_item, pattern_flags);
8984         if (!nvgre_v)
8985                 return;
8986         if (!nvgre_m)
8987                 nvgre_m = &rte_flow_item_nvgre_mask;
8988         tni_flow_id_m = (const char *)nvgre_m->tni;
8989         tni_flow_id_v = (const char *)nvgre_v->tni;
8990         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8991         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8992         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8993         memcpy(gre_key_m, tni_flow_id_m, size);
8994         for (i = 0; i < size; ++i)
8995                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8996 }
8997
8998 /**
8999  * Add VXLAN item to matcher and to the value.
9000  *
9001  * @param[in] dev
9002  *   Pointer to the Ethernet device structure.
9003  * @param[in] attr
9004  *   Flow rule attributes.
9005  * @param[in, out] matcher
9006  *   Flow matcher.
9007  * @param[in, out] key
9008  *   Flow matcher value.
9009  * @param[in] item
9010  *   Flow pattern to translate.
9011  * @param[in] inner
9012  *   Item is inner pattern.
9013  */
9014 static void
9015 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
9016                              const struct rte_flow_attr *attr,
9017                              void *matcher, void *key,
9018                              const struct rte_flow_item *item,
9019                              int inner)
9020 {
9021         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
9022         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
9023         void *headers_m;
9024         void *headers_v;
9025         void *misc5_m;
9026         void *misc5_v;
9027         uint32_t *tunnel_header_v;
9028         uint32_t *tunnel_header_m;
9029         uint16_t dport;
9030         struct mlx5_priv *priv = dev->data->dev_private;
9031         const struct rte_flow_item_vxlan nic_mask = {
9032                 .vni = "\xff\xff\xff",
9033                 .rsvd1 = 0xff,
9034         };
9035
9036         if (inner) {
9037                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9038                                          inner_headers);
9039                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9040         } else {
9041                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9042                                          outer_headers);
9043                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9044         }
9045         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
9046                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
9047         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9048                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9049                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9050         }
9051         dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
9052         if (!vxlan_v)
9053                 return;
9054         if (!vxlan_m) {
9055                 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
9056                     (attr->group && !priv->sh->misc5_cap))
9057                         vxlan_m = &rte_flow_item_vxlan_mask;
9058                 else
9059                         vxlan_m = &nic_mask;
9060         }
9061         if ((priv->sh->steering_format_version ==
9062             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
9063             dport != MLX5_UDP_PORT_VXLAN) ||
9064             (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
9065             ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
9066                 void *misc_m;
9067                 void *misc_v;
9068                 char *vni_m;
9069                 char *vni_v;
9070                 int size;
9071                 int i;
9072                 misc_m = MLX5_ADDR_OF(fte_match_param,
9073                                       matcher, misc_parameters);
9074                 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9075                 size = sizeof(vxlan_m->vni);
9076                 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
9077                 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
9078                 memcpy(vni_m, vxlan_m->vni, size);
9079                 for (i = 0; i < size; ++i)
9080                         vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9081                 return;
9082         }
9083         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
9084         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
9085         tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
9086                                                    misc5_v,
9087                                                    tunnel_header_1);
9088         tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
9089                                                    misc5_m,
9090                                                    tunnel_header_1);
9091         *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
9092                            (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
9093                            (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
9094         if (*tunnel_header_v)
9095                 *tunnel_header_m = vxlan_m->vni[0] |
9096                         vxlan_m->vni[1] << 8 |
9097                         vxlan_m->vni[2] << 16;
9098         else
9099                 *tunnel_header_m = 0x0;
9100         *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
9101         if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
9102                 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
9103 }
9104
9105 /**
9106  * Add VXLAN-GPE item to matcher and to the value.
9107  *
9108  * @param[in, out] matcher
9109  *   Flow matcher.
9110  * @param[in, out] key
9111  *   Flow matcher value.
9112  * @param[in] item
9113  *   Flow pattern to translate.
9114  * @param[in] inner
9115  *   Item is inner pattern.
9116  */
9117
9118 static void
9119 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
9120                                  const struct rte_flow_item *item,
9121                                  const uint64_t pattern_flags)
9122 {
9123         static const struct rte_flow_item_vxlan_gpe dummy_vxlan_gpe_hdr = {0, };
9124         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
9125         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
9126         /* The item was validated to be on the outer side */
9127         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9128         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9129         void *misc_m =
9130                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
9131         void *misc_v =
9132                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9133         char *vni_m =
9134                 MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
9135         char *vni_v =
9136                 MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
9137         int i, size = sizeof(vxlan_m->vni);
9138         uint8_t flags_m = 0xff;
9139         uint8_t flags_v = 0xc;
9140         uint8_t m_protocol, v_protocol;
9141
9142         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9143                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9144                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9145                          MLX5_UDP_PORT_VXLAN_GPE);
9146         }
9147         if (!vxlan_v) {
9148                 vxlan_v = &dummy_vxlan_gpe_hdr;
9149                 vxlan_m = &dummy_vxlan_gpe_hdr;
9150         } else {
9151                 if (!vxlan_m)
9152                         vxlan_m = &rte_flow_item_vxlan_gpe_mask;
9153         }
9154         memcpy(vni_m, vxlan_m->vni, size);
9155         for (i = 0; i < size; ++i)
9156                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9157         if (vxlan_m->flags) {
9158                 flags_m = vxlan_m->flags;
9159                 flags_v = vxlan_v->flags;
9160         }
9161         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
9162         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
9163         m_protocol = vxlan_m->protocol;
9164         v_protocol = vxlan_v->protocol;
9165         if (!m_protocol) {
9166                 /* Force next protocol to ensure next headers parsing. */
9167                 if (pattern_flags & MLX5_FLOW_LAYER_INNER_L2)
9168                         v_protocol = RTE_VXLAN_GPE_TYPE_ETH;
9169                 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4)
9170                         v_protocol = RTE_VXLAN_GPE_TYPE_IPV4;
9171                 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)
9172                         v_protocol = RTE_VXLAN_GPE_TYPE_IPV6;
9173                 if (v_protocol)
9174                         m_protocol = 0xFF;
9175         }
9176         MLX5_SET(fte_match_set_misc3, misc_m,
9177                  outer_vxlan_gpe_next_protocol, m_protocol);
9178         MLX5_SET(fte_match_set_misc3, misc_v,
9179                  outer_vxlan_gpe_next_protocol, m_protocol & v_protocol);
9180 }
9181
9182 /**
9183  * Add Geneve item to matcher and to the value.
9184  *
9185  * @param[in, out] matcher
9186  *   Flow matcher.
9187  * @param[in, out] key
9188  *   Flow matcher value.
9189  * @param[in] item
9190  *   Flow pattern to translate.
9191  * @param[in] inner
9192  *   Item is inner pattern.
9193  */
9194
9195 static void
9196 flow_dv_translate_item_geneve(void *matcher, void *key,
9197                               const struct rte_flow_item *item,
9198                               uint64_t pattern_flags)
9199 {
9200         static const struct rte_flow_item_geneve empty_geneve = {0,};
9201         const struct rte_flow_item_geneve *geneve_m = item->mask;
9202         const struct rte_flow_item_geneve *geneve_v = item->spec;
9203         /* GENEVE flow item validation allows single tunnel item */
9204         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9205         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9206         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9207         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9208         uint16_t gbhdr_m;
9209         uint16_t gbhdr_v;
9210         char *vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9211         char *vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9212         size_t size = sizeof(geneve_m->vni), i;
9213         uint16_t protocol_m, protocol_v;
9214
9215         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9216                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9217                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9218                          MLX5_UDP_PORT_GENEVE);
9219         }
9220         if (!geneve_v) {
9221                 geneve_v = &empty_geneve;
9222                 geneve_m = &empty_geneve;
9223         } else {
9224                 if (!geneve_m)
9225                         geneve_m = &rte_flow_item_geneve_mask;
9226         }
9227         memcpy(vni_m, geneve_m->vni, size);
9228         for (i = 0; i < size; ++i)
9229                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9230         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9231         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9232         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9233                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9234         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9235                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9236         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9237                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9238         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9239                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9240                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9241         protocol_m = rte_be_to_cpu_16(geneve_m->protocol);
9242         protocol_v = rte_be_to_cpu_16(geneve_v->protocol);
9243         if (!protocol_m) {
9244                 /* Force next protocol to prevent matchers duplication */
9245                 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
9246                 if (protocol_v)
9247                         protocol_m = 0xFFFF;
9248         }
9249         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type, protocol_m);
9250         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9251                  protocol_m & protocol_v);
9252 }
9253
9254 /**
9255  * Create Geneve TLV option resource.
9256  *
9257  * @param dev[in, out]
9258  *   Pointer to rte_eth_dev structure.
9259  * @param[in, out] tag_be24
9260  *   Tag value in big endian then R-shift 8.
9261  * @parm[in, out] dev_flow
9262  *   Pointer to the dev_flow.
9263  * @param[out] error
9264  *   pointer to error structure.
9265  *
9266  * @return
9267  *   0 on success otherwise -errno and errno is set.
9268  */
9269
9270 int
9271 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9272                                              const struct rte_flow_item *item,
9273                                              struct rte_flow_error *error)
9274 {
9275         struct mlx5_priv *priv = dev->data->dev_private;
9276         struct mlx5_dev_ctx_shared *sh = priv->sh;
9277         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9278                         sh->geneve_tlv_option_resource;
9279         struct mlx5_devx_obj *obj;
9280         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9281         int ret = 0;
9282
9283         if (!geneve_opt_v)
9284                 return -1;
9285         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9286         if (geneve_opt_resource != NULL) {
9287                 if (geneve_opt_resource->option_class ==
9288                         geneve_opt_v->option_class &&
9289                         geneve_opt_resource->option_type ==
9290                         geneve_opt_v->option_type &&
9291                         geneve_opt_resource->length ==
9292                         geneve_opt_v->option_len) {
9293                         /* We already have GENEVE TLV option obj allocated. */
9294                         __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9295                                            __ATOMIC_RELAXED);
9296                 } else {
9297                         ret = rte_flow_error_set(error, ENOMEM,
9298                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9299                                 "Only one GENEVE TLV option supported");
9300                         goto exit;
9301                 }
9302         } else {
9303                 /* Create a GENEVE TLV object and resource. */
9304                 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->cdev->ctx,
9305                                 geneve_opt_v->option_class,
9306                                 geneve_opt_v->option_type,
9307                                 geneve_opt_v->option_len);
9308                 if (!obj) {
9309                         ret = rte_flow_error_set(error, ENODATA,
9310                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9311                                 "Failed to create GENEVE TLV Devx object");
9312                         goto exit;
9313                 }
9314                 sh->geneve_tlv_option_resource =
9315                                 mlx5_malloc(MLX5_MEM_ZERO,
9316                                                 sizeof(*geneve_opt_resource),
9317                                                 0, SOCKET_ID_ANY);
9318                 if (!sh->geneve_tlv_option_resource) {
9319                         claim_zero(mlx5_devx_cmd_destroy(obj));
9320                         ret = rte_flow_error_set(error, ENOMEM,
9321                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9322                                 "GENEVE TLV object memory allocation failed");
9323                         goto exit;
9324                 }
9325                 geneve_opt_resource = sh->geneve_tlv_option_resource;
9326                 geneve_opt_resource->obj = obj;
9327                 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9328                 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9329                 geneve_opt_resource->length = geneve_opt_v->option_len;
9330                 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9331                                 __ATOMIC_RELAXED);
9332         }
9333 exit:
9334         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9335         return ret;
9336 }
9337
9338 /**
9339  * Add Geneve TLV option item to matcher.
9340  *
9341  * @param[in, out] dev
9342  *   Pointer to rte_eth_dev structure.
9343  * @param[in, out] matcher
9344  *   Flow matcher.
9345  * @param[in, out] key
9346  *   Flow matcher value.
9347  * @param[in] item
9348  *   Flow pattern to translate.
9349  * @param[out] error
9350  *   Pointer to error structure.
9351  */
9352 static int
9353 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9354                                   void *key, const struct rte_flow_item *item,
9355                                   struct rte_flow_error *error)
9356 {
9357         const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9358         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9359         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9360         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9361         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9362                         misc_parameters_3);
9363         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9364         rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9365         int ret = 0;
9366
9367         if (!geneve_opt_v)
9368                 return -1;
9369         if (!geneve_opt_m)
9370                 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9371         ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9372                                                            error);
9373         if (ret) {
9374                 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9375                 return ret;
9376         }
9377         /*
9378          * Set the option length in GENEVE header if not requested.
9379          * The GENEVE TLV option length is expressed by the option length field
9380          * in the GENEVE header.
9381          * If the option length was not requested but the GENEVE TLV option item
9382          * is present we set the option length field implicitly.
9383          */
9384         if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9385                 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9386                          MLX5_GENEVE_OPTLEN_MASK);
9387                 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9388                          geneve_opt_v->option_len + 1);
9389         }
9390         MLX5_SET(fte_match_set_misc, misc_m, geneve_tlv_option_0_exist, 1);
9391         MLX5_SET(fte_match_set_misc, misc_v, geneve_tlv_option_0_exist, 1);
9392         /* Set the data. */
9393         if (geneve_opt_v->data) {
9394                 memcpy(&opt_data_key, geneve_opt_v->data,
9395                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9396                                 sizeof(opt_data_key)));
9397                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9398                                 sizeof(opt_data_key));
9399                 memcpy(&opt_data_mask, geneve_opt_m->data,
9400                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9401                                 sizeof(opt_data_mask)));
9402                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9403                                 sizeof(opt_data_mask));
9404                 MLX5_SET(fte_match_set_misc3, misc3_m,
9405                                 geneve_tlv_option_0_data,
9406                                 rte_be_to_cpu_32(opt_data_mask));
9407                 MLX5_SET(fte_match_set_misc3, misc3_v,
9408                                 geneve_tlv_option_0_data,
9409                         rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9410         }
9411         return ret;
9412 }
9413
9414 /**
9415  * Add MPLS item to matcher and to the value.
9416  *
9417  * @param[in, out] matcher
9418  *   Flow matcher.
9419  * @param[in, out] key
9420  *   Flow matcher value.
9421  * @param[in] item
9422  *   Flow pattern to translate.
9423  * @param[in] prev_layer
9424  *   The protocol layer indicated in previous item.
9425  * @param[in] inner
9426  *   Item is inner pattern.
9427  */
9428 static void
9429 flow_dv_translate_item_mpls(void *matcher, void *key,
9430                             const struct rte_flow_item *item,
9431                             uint64_t prev_layer,
9432                             int inner)
9433 {
9434         const uint32_t *in_mpls_m = item->mask;
9435         const uint32_t *in_mpls_v = item->spec;
9436         uint32_t *out_mpls_m = 0;
9437         uint32_t *out_mpls_v = 0;
9438         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9439         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9440         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9441                                      misc_parameters_2);
9442         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9443         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9444         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9445
9446         switch (prev_layer) {
9447         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9448                 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9449                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
9450                                  0xffff);
9451                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9452                                  MLX5_UDP_PORT_MPLS);
9453                 }
9454                 break;
9455         case MLX5_FLOW_LAYER_GRE:
9456                 /* Fall-through. */
9457         case MLX5_FLOW_LAYER_GRE_KEY:
9458                 if (!MLX5_GET16(fte_match_set_misc, misc_v, gre_protocol)) {
9459                         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
9460                                  0xffff);
9461                         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9462                                  RTE_ETHER_TYPE_MPLS);
9463                 }
9464                 break;
9465         default:
9466                 break;
9467         }
9468         if (!in_mpls_v)
9469                 return;
9470         if (!in_mpls_m)
9471                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9472         switch (prev_layer) {
9473         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9474                 out_mpls_m =
9475                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9476                                                  outer_first_mpls_over_udp);
9477                 out_mpls_v =
9478                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9479                                                  outer_first_mpls_over_udp);
9480                 break;
9481         case MLX5_FLOW_LAYER_GRE:
9482                 out_mpls_m =
9483                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9484                                                  outer_first_mpls_over_gre);
9485                 out_mpls_v =
9486                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9487                                                  outer_first_mpls_over_gre);
9488                 break;
9489         default:
9490                 /* Inner MPLS not over GRE is not supported. */
9491                 if (!inner) {
9492                         out_mpls_m =
9493                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9494                                                          misc2_m,
9495                                                          outer_first_mpls);
9496                         out_mpls_v =
9497                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9498                                                          misc2_v,
9499                                                          outer_first_mpls);
9500                 }
9501                 break;
9502         }
9503         if (out_mpls_m && out_mpls_v) {
9504                 *out_mpls_m = *in_mpls_m;
9505                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9506         }
9507 }
9508
9509 /**
9510  * Add metadata register item to matcher
9511  *
9512  * @param[in, out] matcher
9513  *   Flow matcher.
9514  * @param[in, out] key
9515  *   Flow matcher value.
9516  * @param[in] reg_type
9517  *   Type of device metadata register
9518  * @param[in] value
9519  *   Register value
9520  * @param[in] mask
9521  *   Register mask
9522  */
9523 static void
9524 flow_dv_match_meta_reg(void *matcher, void *key,
9525                        enum modify_reg reg_type,
9526                        uint32_t data, uint32_t mask)
9527 {
9528         void *misc2_m =
9529                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9530         void *misc2_v =
9531                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9532         uint32_t temp;
9533
9534         data &= mask;
9535         switch (reg_type) {
9536         case REG_A:
9537                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9538                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9539                 break;
9540         case REG_B:
9541                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9542                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9543                 break;
9544         case REG_C_0:
9545                 /*
9546                  * The metadata register C0 field might be divided into
9547                  * source vport index and META item value, we should set
9548                  * this field according to specified mask, not as whole one.
9549                  */
9550                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9551                 temp |= mask;
9552                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9553                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9554                 temp &= ~mask;
9555                 temp |= data;
9556                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9557                 break;
9558         case REG_C_1:
9559                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9560                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9561                 break;
9562         case REG_C_2:
9563                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9564                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9565                 break;
9566         case REG_C_3:
9567                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9568                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9569                 break;
9570         case REG_C_4:
9571                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9572                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9573                 break;
9574         case REG_C_5:
9575                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9576                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9577                 break;
9578         case REG_C_6:
9579                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9580                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9581                 break;
9582         case REG_C_7:
9583                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9584                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9585                 break;
9586         default:
9587                 MLX5_ASSERT(false);
9588                 break;
9589         }
9590 }
9591
9592 /**
9593  * Add MARK item to matcher
9594  *
9595  * @param[in] dev
9596  *   The device to configure through.
9597  * @param[in, out] matcher
9598  *   Flow matcher.
9599  * @param[in, out] key
9600  *   Flow matcher value.
9601  * @param[in] item
9602  *   Flow pattern to translate.
9603  */
9604 static void
9605 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9606                             void *matcher, void *key,
9607                             const struct rte_flow_item *item)
9608 {
9609         struct mlx5_priv *priv = dev->data->dev_private;
9610         const struct rte_flow_item_mark *mark;
9611         uint32_t value;
9612         uint32_t mask;
9613
9614         mark = item->mask ? (const void *)item->mask :
9615                             &rte_flow_item_mark_mask;
9616         mask = mark->id & priv->sh->dv_mark_mask;
9617         mark = (const void *)item->spec;
9618         MLX5_ASSERT(mark);
9619         value = mark->id & priv->sh->dv_mark_mask & mask;
9620         if (mask) {
9621                 enum modify_reg reg;
9622
9623                 /* Get the metadata register index for the mark. */
9624                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9625                 MLX5_ASSERT(reg > 0);
9626                 if (reg == REG_C_0) {
9627                         struct mlx5_priv *priv = dev->data->dev_private;
9628                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9629                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9630
9631                         mask &= msk_c0;
9632                         mask <<= shl_c0;
9633                         value <<= shl_c0;
9634                 }
9635                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9636         }
9637 }
9638
9639 /**
9640  * Add META item to matcher
9641  *
9642  * @param[in] dev
9643  *   The devich to configure through.
9644  * @param[in, out] matcher
9645  *   Flow matcher.
9646  * @param[in, out] key
9647  *   Flow matcher value.
9648  * @param[in] attr
9649  *   Attributes of flow that includes this item.
9650  * @param[in] item
9651  *   Flow pattern to translate.
9652  */
9653 static void
9654 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9655                             void *matcher, void *key,
9656                             const struct rte_flow_attr *attr,
9657                             const struct rte_flow_item *item)
9658 {
9659         const struct rte_flow_item_meta *meta_m;
9660         const struct rte_flow_item_meta *meta_v;
9661
9662         meta_m = (const void *)item->mask;
9663         if (!meta_m)
9664                 meta_m = &rte_flow_item_meta_mask;
9665         meta_v = (const void *)item->spec;
9666         if (meta_v) {
9667                 int reg;
9668                 uint32_t value = meta_v->data;
9669                 uint32_t mask = meta_m->data;
9670
9671                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9672                 if (reg < 0)
9673                         return;
9674                 MLX5_ASSERT(reg != REG_NON);
9675                 if (reg == REG_C_0) {
9676                         struct mlx5_priv *priv = dev->data->dev_private;
9677                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9678                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9679
9680                         mask &= msk_c0;
9681                         mask <<= shl_c0;
9682                         value <<= shl_c0;
9683                 }
9684                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9685         }
9686 }
9687
9688 /**
9689  * Add vport metadata Reg C0 item to matcher
9690  *
9691  * @param[in, out] matcher
9692  *   Flow matcher.
9693  * @param[in, out] key
9694  *   Flow matcher value.
9695  * @param[in] reg
9696  *   Flow pattern to translate.
9697  */
9698 static void
9699 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9700                                   uint32_t value, uint32_t mask)
9701 {
9702         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9703 }
9704
9705 /**
9706  * Add tag item to matcher
9707  *
9708  * @param[in] dev
9709  *   The devich to configure through.
9710  * @param[in, out] matcher
9711  *   Flow matcher.
9712  * @param[in, out] key
9713  *   Flow matcher value.
9714  * @param[in] item
9715  *   Flow pattern to translate.
9716  */
9717 static void
9718 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9719                                 void *matcher, void *key,
9720                                 const struct rte_flow_item *item)
9721 {
9722         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9723         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9724         uint32_t mask, value;
9725
9726         MLX5_ASSERT(tag_v);
9727         value = tag_v->data;
9728         mask = tag_m ? tag_m->data : UINT32_MAX;
9729         if (tag_v->id == REG_C_0) {
9730                 struct mlx5_priv *priv = dev->data->dev_private;
9731                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9732                 uint32_t shl_c0 = rte_bsf32(msk_c0);
9733
9734                 mask &= msk_c0;
9735                 mask <<= shl_c0;
9736                 value <<= shl_c0;
9737         }
9738         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9739 }
9740
9741 /**
9742  * Add TAG item to matcher
9743  *
9744  * @param[in] dev
9745  *   The devich to configure through.
9746  * @param[in, out] matcher
9747  *   Flow matcher.
9748  * @param[in, out] key
9749  *   Flow matcher value.
9750  * @param[in] item
9751  *   Flow pattern to translate.
9752  */
9753 static void
9754 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9755                            void *matcher, void *key,
9756                            const struct rte_flow_item *item)
9757 {
9758         const struct rte_flow_item_tag *tag_v = item->spec;
9759         const struct rte_flow_item_tag *tag_m = item->mask;
9760         enum modify_reg reg;
9761
9762         MLX5_ASSERT(tag_v);
9763         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9764         /* Get the metadata register index for the tag. */
9765         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9766         MLX5_ASSERT(reg > 0);
9767         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9768 }
9769
9770 /**
9771  * Add source vport match to the specified matcher.
9772  *
9773  * @param[in, out] matcher
9774  *   Flow matcher.
9775  * @param[in, out] key
9776  *   Flow matcher value.
9777  * @param[in] port
9778  *   Source vport value to match
9779  * @param[in] mask
9780  *   Mask
9781  */
9782 static void
9783 flow_dv_translate_item_source_vport(void *matcher, void *key,
9784                                     int16_t port, uint16_t mask)
9785 {
9786         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9787         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9788
9789         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9790         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9791 }
9792
9793 /**
9794  * Translate port-id item to eswitch match on  port-id.
9795  *
9796  * @param[in] dev
9797  *   The devich to configure through.
9798  * @param[in, out] matcher
9799  *   Flow matcher.
9800  * @param[in, out] key
9801  *   Flow matcher value.
9802  * @param[in] item
9803  *   Flow pattern to translate.
9804  * @param[in]
9805  *   Flow attributes.
9806  *
9807  * @return
9808  *   0 on success, a negative errno value otherwise.
9809  */
9810 static int
9811 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9812                                void *key, const struct rte_flow_item *item,
9813                                const struct rte_flow_attr *attr)
9814 {
9815         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9816         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9817         struct mlx5_priv *priv;
9818         uint16_t mask, id;
9819
9820         if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
9821                 flow_dv_translate_item_source_vport(matcher, key,
9822                         flow_dv_get_esw_manager_vport_id(dev), 0xffff);
9823                 return 0;
9824         }
9825         mask = pid_m ? pid_m->id : 0xffff;
9826         id = pid_v ? pid_v->id : dev->data->port_id;
9827         priv = mlx5_port_to_eswitch_info(id, item == NULL);
9828         if (!priv)
9829                 return -rte_errno;
9830         /*
9831          * Translate to vport field or to metadata, depending on mode.
9832          * Kernel can use either misc.source_port or half of C0 metadata
9833          * register.
9834          */
9835         if (priv->vport_meta_mask) {
9836                 /*
9837                  * Provide the hint for SW steering library
9838                  * to insert the flow into ingress domain and
9839                  * save the extra vport match.
9840                  */
9841                 if (mask == 0xffff && priv->vport_id == 0xffff &&
9842                     priv->pf_bond < 0 && attr->transfer)
9843                         flow_dv_translate_item_source_vport
9844                                 (matcher, key, priv->vport_id, mask);
9845                 /*
9846                  * We should always set the vport metadata register,
9847                  * otherwise the SW steering library can drop
9848                  * the rule if wire vport metadata value is not zero,
9849                  * it depends on kernel configuration.
9850                  */
9851                 flow_dv_translate_item_meta_vport(matcher, key,
9852                                                   priv->vport_meta_tag,
9853                                                   priv->vport_meta_mask);
9854         } else {
9855                 flow_dv_translate_item_source_vport(matcher, key,
9856                                                     priv->vport_id, mask);
9857         }
9858         return 0;
9859 }
9860
9861 /**
9862  * Add ICMP6 item to matcher and to the value.
9863  *
9864  * @param[in, out] matcher
9865  *   Flow matcher.
9866  * @param[in, out] key
9867  *   Flow matcher value.
9868  * @param[in] item
9869  *   Flow pattern to translate.
9870  * @param[in] inner
9871  *   Item is inner pattern.
9872  */
9873 static void
9874 flow_dv_translate_item_icmp6(void *matcher, void *key,
9875                               const struct rte_flow_item *item,
9876                               int inner)
9877 {
9878         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9879         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9880         void *headers_m;
9881         void *headers_v;
9882         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9883                                      misc_parameters_3);
9884         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9885         if (inner) {
9886                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9887                                          inner_headers);
9888                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9889         } else {
9890                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9891                                          outer_headers);
9892                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9893         }
9894         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9895         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9896         if (!icmp6_v)
9897                 return;
9898         if (!icmp6_m)
9899                 icmp6_m = &rte_flow_item_icmp6_mask;
9900         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9901         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9902                  icmp6_v->type & icmp6_m->type);
9903         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9904         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9905                  icmp6_v->code & icmp6_m->code);
9906 }
9907
9908 /**
9909  * Add ICMP item to matcher and to the value.
9910  *
9911  * @param[in, out] matcher
9912  *   Flow matcher.
9913  * @param[in, out] key
9914  *   Flow matcher value.
9915  * @param[in] item
9916  *   Flow pattern to translate.
9917  * @param[in] inner
9918  *   Item is inner pattern.
9919  */
9920 static void
9921 flow_dv_translate_item_icmp(void *matcher, void *key,
9922                             const struct rte_flow_item *item,
9923                             int inner)
9924 {
9925         const struct rte_flow_item_icmp *icmp_m = item->mask;
9926         const struct rte_flow_item_icmp *icmp_v = item->spec;
9927         uint32_t icmp_header_data_m = 0;
9928         uint32_t icmp_header_data_v = 0;
9929         void *headers_m;
9930         void *headers_v;
9931         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9932                                      misc_parameters_3);
9933         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9934         if (inner) {
9935                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9936                                          inner_headers);
9937                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9938         } else {
9939                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9940                                          outer_headers);
9941                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9942         }
9943         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9944         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9945         if (!icmp_v)
9946                 return;
9947         if (!icmp_m)
9948                 icmp_m = &rte_flow_item_icmp_mask;
9949         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9950                  icmp_m->hdr.icmp_type);
9951         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9952                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9953         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9954                  icmp_m->hdr.icmp_code);
9955         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9956                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9957         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9958         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9959         if (icmp_header_data_m) {
9960                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9961                 icmp_header_data_v |=
9962                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9963                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9964                          icmp_header_data_m);
9965                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9966                          icmp_header_data_v & icmp_header_data_m);
9967         }
9968 }
9969
9970 /**
9971  * Add GTP item to matcher and to the value.
9972  *
9973  * @param[in, out] matcher
9974  *   Flow matcher.
9975  * @param[in, out] key
9976  *   Flow matcher value.
9977  * @param[in] item
9978  *   Flow pattern to translate.
9979  * @param[in] inner
9980  *   Item is inner pattern.
9981  */
9982 static void
9983 flow_dv_translate_item_gtp(void *matcher, void *key,
9984                            const struct rte_flow_item *item, int inner)
9985 {
9986         const struct rte_flow_item_gtp *gtp_m = item->mask;
9987         const struct rte_flow_item_gtp *gtp_v = item->spec;
9988         void *headers_m;
9989         void *headers_v;
9990         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9991                                      misc_parameters_3);
9992         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9993         uint16_t dport = RTE_GTPU_UDP_PORT;
9994
9995         if (inner) {
9996                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9997                                          inner_headers);
9998                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9999         } else {
10000                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
10001                                          outer_headers);
10002                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
10003         }
10004         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
10005                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
10006                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
10007         }
10008         if (!gtp_v)
10009                 return;
10010         if (!gtp_m)
10011                 gtp_m = &rte_flow_item_gtp_mask;
10012         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
10013                  gtp_m->v_pt_rsv_flags);
10014         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
10015                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
10016         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
10017         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
10018                  gtp_v->msg_type & gtp_m->msg_type);
10019         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
10020                  rte_be_to_cpu_32(gtp_m->teid));
10021         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
10022                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
10023 }
10024
10025 /**
10026  * Add GTP PSC item to matcher.
10027  *
10028  * @param[in, out] matcher
10029  *   Flow matcher.
10030  * @param[in, out] key
10031  *   Flow matcher value.
10032  * @param[in] item
10033  *   Flow pattern to translate.
10034  */
10035 static int
10036 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
10037                                const struct rte_flow_item *item)
10038 {
10039         const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
10040         const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
10041         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
10042                         misc_parameters_3);
10043         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
10044         union {
10045                 uint32_t w32;
10046                 struct {
10047                         uint16_t seq_num;
10048                         uint8_t npdu_num;
10049                         uint8_t next_ext_header_type;
10050                 };
10051         } dw_2;
10052         uint8_t gtp_flags;
10053
10054         /* Always set E-flag match on one, regardless of GTP item settings. */
10055         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
10056         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
10057         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
10058         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
10059         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
10060         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
10061         /*Set next extension header type. */
10062         dw_2.seq_num = 0;
10063         dw_2.npdu_num = 0;
10064         dw_2.next_ext_header_type = 0xff;
10065         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
10066                  rte_cpu_to_be_32(dw_2.w32));
10067         dw_2.seq_num = 0;
10068         dw_2.npdu_num = 0;
10069         dw_2.next_ext_header_type = 0x85;
10070         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
10071                  rte_cpu_to_be_32(dw_2.w32));
10072         if (gtp_psc_v) {
10073                 union {
10074                         uint32_t w32;
10075                         struct {
10076                                 uint8_t len;
10077                                 uint8_t type_flags;
10078                                 uint8_t qfi;
10079                                 uint8_t reserved;
10080                         };
10081                 } dw_0;
10082
10083                 /*Set extension header PDU type and Qos. */
10084                 if (!gtp_psc_m)
10085                         gtp_psc_m = &rte_flow_item_gtp_psc_mask;
10086                 dw_0.w32 = 0;
10087                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->hdr.type);
10088                 dw_0.qfi = gtp_psc_m->hdr.qfi;
10089                 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
10090                          rte_cpu_to_be_32(dw_0.w32));
10091                 dw_0.w32 = 0;
10092                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->hdr.type &
10093                                                         gtp_psc_m->hdr.type);
10094                 dw_0.qfi = gtp_psc_v->hdr.qfi & gtp_psc_m->hdr.qfi;
10095                 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
10096                          rte_cpu_to_be_32(dw_0.w32));
10097         }
10098         return 0;
10099 }
10100
10101 /**
10102  * Add eCPRI item to matcher and to the value.
10103  *
10104  * @param[in] dev
10105  *   The devich to configure through.
10106  * @param[in, out] matcher
10107  *   Flow matcher.
10108  * @param[in, out] key
10109  *   Flow matcher value.
10110  * @param[in] item
10111  *   Flow pattern to translate.
10112  * @param[in] last_item
10113  *   Last item flags.
10114  */
10115 static void
10116 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
10117                              void *key, const struct rte_flow_item *item,
10118                              uint64_t last_item)
10119 {
10120         struct mlx5_priv *priv = dev->data->dev_private;
10121         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
10122         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
10123         struct rte_ecpri_common_hdr common;
10124         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
10125                                      misc_parameters_4);
10126         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
10127         uint32_t *samples;
10128         void *dw_m;
10129         void *dw_v;
10130
10131         /*
10132          * In case of eCPRI over Ethernet, if EtherType is not specified,
10133          * match on eCPRI EtherType implicitly.
10134          */
10135         if (last_item & MLX5_FLOW_LAYER_OUTER_L2) {
10136                 void *hdrs_m, *hdrs_v, *l2m, *l2v;
10137
10138                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
10139                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
10140                 l2m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, ethertype);
10141                 l2v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
10142                 if (*(uint16_t *)l2m == 0 && *(uint16_t *)l2v == 0) {
10143                         *(uint16_t *)l2m = UINT16_MAX;
10144                         *(uint16_t *)l2v = RTE_BE16(RTE_ETHER_TYPE_ECPRI);
10145                 }
10146         }
10147         if (!ecpri_v)
10148                 return;
10149         if (!ecpri_m)
10150                 ecpri_m = &rte_flow_item_ecpri_mask;
10151         /*
10152          * Maximal four DW samples are supported in a single matching now.
10153          * Two are used now for a eCPRI matching:
10154          * 1. Type: one byte, mask should be 0x00ff0000 in network order
10155          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
10156          *    if any.
10157          */
10158         if (!ecpri_m->hdr.common.u32)
10159                 return;
10160         samples = priv->sh->ecpri_parser.ids;
10161         /* Need to take the whole DW as the mask to fill the entry. */
10162         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10163                             prog_sample_field_value_0);
10164         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10165                             prog_sample_field_value_0);
10166         /* Already big endian (network order) in the header. */
10167         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
10168         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
10169         /* Sample#0, used for matching type, offset 0. */
10170         MLX5_SET(fte_match_set_misc4, misc4_m,
10171                  prog_sample_field_id_0, samples[0]);
10172         /* It makes no sense to set the sample ID in the mask field. */
10173         MLX5_SET(fte_match_set_misc4, misc4_v,
10174                  prog_sample_field_id_0, samples[0]);
10175         /*
10176          * Checking if message body part needs to be matched.
10177          * Some wildcard rules only matching type field should be supported.
10178          */
10179         if (ecpri_m->hdr.dummy[0]) {
10180                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
10181                 switch (common.type) {
10182                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
10183                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
10184                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
10185                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10186                                             prog_sample_field_value_1);
10187                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10188                                             prog_sample_field_value_1);
10189                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
10190                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
10191                                             ecpri_m->hdr.dummy[0];
10192                         /* Sample#1, to match message body, offset 4. */
10193                         MLX5_SET(fte_match_set_misc4, misc4_m,
10194                                  prog_sample_field_id_1, samples[1]);
10195                         MLX5_SET(fte_match_set_misc4, misc4_v,
10196                                  prog_sample_field_id_1, samples[1]);
10197                         break;
10198                 default:
10199                         /* Others, do not match any sample ID. */
10200                         break;
10201                 }
10202         }
10203 }
10204
10205 /*
10206  * Add connection tracking status item to matcher
10207  *
10208  * @param[in] dev
10209  *   The devich to configure through.
10210  * @param[in, out] matcher
10211  *   Flow matcher.
10212  * @param[in, out] key
10213  *   Flow matcher value.
10214  * @param[in] item
10215  *   Flow pattern to translate.
10216  */
10217 static void
10218 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
10219                               void *matcher, void *key,
10220                               const struct rte_flow_item *item)
10221 {
10222         uint32_t reg_value = 0;
10223         int reg_id;
10224         /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10225         uint32_t reg_mask = 0;
10226         const struct rte_flow_item_conntrack *spec = item->spec;
10227         const struct rte_flow_item_conntrack *mask = item->mask;
10228         uint32_t flags;
10229         struct rte_flow_error error;
10230
10231         if (!mask)
10232                 mask = &rte_flow_item_conntrack_mask;
10233         if (!spec || !mask->flags)
10234                 return;
10235         flags = spec->flags & mask->flags;
10236         /* The conflict should be checked in the validation. */
10237         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10238                 reg_value |= MLX5_CT_SYNDROME_VALID;
10239         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10240                 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10241         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10242                 reg_value |= MLX5_CT_SYNDROME_INVALID;
10243         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10244                 reg_value |= MLX5_CT_SYNDROME_TRAP;
10245         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10246                 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10247         if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10248                            RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10249                            RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10250                 reg_mask |= 0xc0;
10251         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10252                 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10253         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10254                 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10255         /* The REG_C_x value could be saved during startup. */
10256         reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10257         if (reg_id == REG_NON)
10258                 return;
10259         flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10260                                reg_value, reg_mask);
10261 }
10262
10263 static void
10264 flow_dv_translate_item_flex(struct rte_eth_dev *dev, void *matcher, void *key,
10265                             const struct rte_flow_item *item,
10266                             struct mlx5_flow *dev_flow, bool is_inner)
10267 {
10268         const struct rte_flow_item_flex *spec =
10269                 (const struct rte_flow_item_flex *)item->spec;
10270         int index = mlx5_flex_acquire_index(dev, spec->handle, false);
10271
10272         MLX5_ASSERT(index >= 0 && index <= (int)(sizeof(uint32_t) * CHAR_BIT));
10273         if (index < 0)
10274                 return;
10275         if (!(dev_flow->handle->flex_item & RTE_BIT32(index))) {
10276                 /* Don't count both inner and outer flex items in one rule. */
10277                 if (mlx5_flex_acquire_index(dev, spec->handle, true) != index)
10278                         MLX5_ASSERT(false);
10279                 dev_flow->handle->flex_item |= RTE_BIT32(index);
10280         }
10281         mlx5_flex_flow_translate_item(dev, matcher, key, item, is_inner);
10282 }
10283
10284 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10285
10286 #define HEADER_IS_ZERO(match_criteria, headers)                              \
10287         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
10288                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10289
10290 /**
10291  * Calculate flow matcher enable bitmap.
10292  *
10293  * @param match_criteria
10294  *   Pointer to flow matcher criteria.
10295  *
10296  * @return
10297  *   Bitmap of enabled fields.
10298  */
10299 static uint8_t
10300 flow_dv_matcher_enable(uint32_t *match_criteria)
10301 {
10302         uint8_t match_criteria_enable;
10303
10304         match_criteria_enable =
10305                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10306                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10307         match_criteria_enable |=
10308                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10309                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10310         match_criteria_enable |=
10311                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10312                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10313         match_criteria_enable |=
10314                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10315                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10316         match_criteria_enable |=
10317                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10318                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10319         match_criteria_enable |=
10320                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10321                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10322         match_criteria_enable |=
10323                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10324                 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10325         return match_criteria_enable;
10326 }
10327
10328 static void
10329 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10330 {
10331         /*
10332          * Check flow matching criteria first, subtract misc5/4 length if flow
10333          * doesn't own misc5/4 parameters. In some old rdma-core releases,
10334          * misc5/4 are not supported, and matcher creation failure is expected
10335          * w/o subtraction. If misc5 is provided, misc4 must be counted in since
10336          * misc5 is right after misc4.
10337          */
10338         if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10339                 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10340                         MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10341                 if (!(match_criteria & (1 <<
10342                         MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10343                         *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10344                 }
10345         }
10346 }
10347
10348 static struct mlx5_list_entry *
10349 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10350                          struct mlx5_list_entry *entry, void *cb_ctx)
10351 {
10352         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10353         struct mlx5_flow_dv_matcher *ref = ctx->data;
10354         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10355                                                             typeof(*tbl), tbl);
10356         struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10357                                                             sizeof(*resource),
10358                                                             0, SOCKET_ID_ANY);
10359
10360         if (!resource) {
10361                 rte_flow_error_set(ctx->error, ENOMEM,
10362                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10363                                    "cannot create matcher");
10364                 return NULL;
10365         }
10366         memcpy(resource, entry, sizeof(*resource));
10367         resource->tbl = &tbl->tbl;
10368         return &resource->entry;
10369 }
10370
10371 static void
10372 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10373                              struct mlx5_list_entry *entry)
10374 {
10375         mlx5_free(entry);
10376 }
10377
10378 struct mlx5_list_entry *
10379 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10380 {
10381         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10382         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10383         struct rte_eth_dev *dev = ctx->dev;
10384         struct mlx5_flow_tbl_data_entry *tbl_data;
10385         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10386         struct rte_flow_error *error = ctx->error;
10387         union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10388         struct mlx5_flow_tbl_resource *tbl;
10389         void *domain;
10390         uint32_t idx = 0;
10391         int ret;
10392
10393         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10394         if (!tbl_data) {
10395                 rte_flow_error_set(error, ENOMEM,
10396                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10397                                    NULL,
10398                                    "cannot allocate flow table data entry");
10399                 return NULL;
10400         }
10401         tbl_data->idx = idx;
10402         tbl_data->tunnel = tt_prm->tunnel;
10403         tbl_data->group_id = tt_prm->group_id;
10404         tbl_data->external = !!tt_prm->external;
10405         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10406         tbl_data->is_egress = !!key.is_egress;
10407         tbl_data->is_transfer = !!key.is_fdb;
10408         tbl_data->dummy = !!key.dummy;
10409         tbl_data->level = key.level;
10410         tbl_data->id = key.id;
10411         tbl = &tbl_data->tbl;
10412         if (key.dummy)
10413                 return &tbl_data->entry;
10414         if (key.is_fdb)
10415                 domain = sh->fdb_domain;
10416         else if (key.is_egress)
10417                 domain = sh->tx_domain;
10418         else
10419                 domain = sh->rx_domain;
10420         ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10421         if (ret) {
10422                 rte_flow_error_set(error, ENOMEM,
10423                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10424                                    NULL, "cannot create flow table object");
10425                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10426                 return NULL;
10427         }
10428         if (key.level != 0) {
10429                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10430                                         (tbl->obj, &tbl_data->jump.action);
10431                 if (ret) {
10432                         rte_flow_error_set(error, ENOMEM,
10433                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10434                                            NULL,
10435                                            "cannot create flow jump action");
10436                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10437                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10438                         return NULL;
10439                 }
10440         }
10441         MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10442               key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10443               key.level, key.id);
10444         tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10445                                               flow_dv_matcher_create_cb,
10446                                               flow_dv_matcher_match_cb,
10447                                               flow_dv_matcher_remove_cb,
10448                                               flow_dv_matcher_clone_cb,
10449                                               flow_dv_matcher_clone_free_cb);
10450         if (!tbl_data->matchers) {
10451                 rte_flow_error_set(error, ENOMEM,
10452                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10453                                    NULL,
10454                                    "cannot create tbl matcher list");
10455                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10456                 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10457                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10458                 return NULL;
10459         }
10460         return &tbl_data->entry;
10461 }
10462
10463 int
10464 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10465                      void *cb_ctx)
10466 {
10467         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10468         struct mlx5_flow_tbl_data_entry *tbl_data =
10469                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10470         union mlx5_flow_tbl_key key = { .v64 =  *(uint64_t *)(ctx->data) };
10471
10472         return tbl_data->level != key.level ||
10473                tbl_data->id != key.id ||
10474                tbl_data->dummy != key.dummy ||
10475                tbl_data->is_transfer != !!key.is_fdb ||
10476                tbl_data->is_egress != !!key.is_egress;
10477 }
10478
10479 struct mlx5_list_entry *
10480 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10481                       void *cb_ctx)
10482 {
10483         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10484         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10485         struct mlx5_flow_tbl_data_entry *tbl_data;
10486         struct rte_flow_error *error = ctx->error;
10487         uint32_t idx = 0;
10488
10489         tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10490         if (!tbl_data) {
10491                 rte_flow_error_set(error, ENOMEM,
10492                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10493                                    NULL,
10494                                    "cannot allocate flow table data entry");
10495                 return NULL;
10496         }
10497         memcpy(tbl_data, oentry, sizeof(*tbl_data));
10498         tbl_data->idx = idx;
10499         return &tbl_data->entry;
10500 }
10501
10502 void
10503 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10504 {
10505         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10506         struct mlx5_flow_tbl_data_entry *tbl_data =
10507                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10508
10509         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10510 }
10511
10512 /**
10513  * Get a flow table.
10514  *
10515  * @param[in, out] dev
10516  *   Pointer to rte_eth_dev structure.
10517  * @param[in] table_level
10518  *   Table level to use.
10519  * @param[in] egress
10520  *   Direction of the table.
10521  * @param[in] transfer
10522  *   E-Switch or NIC flow.
10523  * @param[in] dummy
10524  *   Dummy entry for dv API.
10525  * @param[in] table_id
10526  *   Table id to use.
10527  * @param[out] error
10528  *   pointer to error structure.
10529  *
10530  * @return
10531  *   Returns tables resource based on the index, NULL in case of failed.
10532  */
10533 struct mlx5_flow_tbl_resource *
10534 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10535                          uint32_t table_level, uint8_t egress,
10536                          uint8_t transfer,
10537                          bool external,
10538                          const struct mlx5_flow_tunnel *tunnel,
10539                          uint32_t group_id, uint8_t dummy,
10540                          uint32_t table_id,
10541                          struct rte_flow_error *error)
10542 {
10543         struct mlx5_priv *priv = dev->data->dev_private;
10544         union mlx5_flow_tbl_key table_key = {
10545                 {
10546                         .level = table_level,
10547                         .id = table_id,
10548                         .reserved = 0,
10549                         .dummy = !!dummy,
10550                         .is_fdb = !!transfer,
10551                         .is_egress = !!egress,
10552                 }
10553         };
10554         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10555                 .tunnel = tunnel,
10556                 .group_id = group_id,
10557                 .external = external,
10558         };
10559         struct mlx5_flow_cb_ctx ctx = {
10560                 .dev = dev,
10561                 .error = error,
10562                 .data = &table_key.v64,
10563                 .data2 = &tt_prm,
10564         };
10565         struct mlx5_list_entry *entry;
10566         struct mlx5_flow_tbl_data_entry *tbl_data;
10567
10568         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10569         if (!entry) {
10570                 rte_flow_error_set(error, ENOMEM,
10571                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10572                                    "cannot get table");
10573                 return NULL;
10574         }
10575         DRV_LOG(DEBUG, "table_level %u table_id %u "
10576                 "tunnel %u group %u registered.",
10577                 table_level, table_id,
10578                 tunnel ? tunnel->tunnel_id : 0, group_id);
10579         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10580         return &tbl_data->tbl;
10581 }
10582
10583 void
10584 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10585 {
10586         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10587         struct mlx5_flow_tbl_data_entry *tbl_data =
10588                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10589
10590         MLX5_ASSERT(entry && sh);
10591         if (tbl_data->jump.action)
10592                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10593         if (tbl_data->tbl.obj)
10594                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10595         if (tbl_data->tunnel_offload && tbl_data->external) {
10596                 struct mlx5_list_entry *he;
10597                 struct mlx5_hlist *tunnel_grp_hash;
10598                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10599                 union tunnel_tbl_key tunnel_key = {
10600                         .tunnel_id = tbl_data->tunnel ?
10601                                         tbl_data->tunnel->tunnel_id : 0,
10602                         .group = tbl_data->group_id
10603                 };
10604                 uint32_t table_level = tbl_data->level;
10605                 struct mlx5_flow_cb_ctx ctx = {
10606                         .data = (void *)&tunnel_key.val,
10607                 };
10608
10609                 tunnel_grp_hash = tbl_data->tunnel ?
10610                                         tbl_data->tunnel->groups :
10611                                         thub->groups;
10612                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10613                 if (he)
10614                         mlx5_hlist_unregister(tunnel_grp_hash, he);
10615                 DRV_LOG(DEBUG,
10616                         "table_level %u id %u tunnel %u group %u released.",
10617                         table_level,
10618                         tbl_data->id,
10619                         tbl_data->tunnel ?
10620                         tbl_data->tunnel->tunnel_id : 0,
10621                         tbl_data->group_id);
10622         }
10623         mlx5_list_destroy(tbl_data->matchers);
10624         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10625 }
10626
10627 /**
10628  * Release a flow table.
10629  *
10630  * @param[in] sh
10631  *   Pointer to device shared structure.
10632  * @param[in] tbl
10633  *   Table resource to be released.
10634  *
10635  * @return
10636  *   Returns 0 if table was released, else return 1;
10637  */
10638 static int
10639 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10640                              struct mlx5_flow_tbl_resource *tbl)
10641 {
10642         struct mlx5_flow_tbl_data_entry *tbl_data =
10643                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10644
10645         if (!tbl)
10646                 return 0;
10647         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10648 }
10649
10650 int
10651 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10652                          struct mlx5_list_entry *entry, void *cb_ctx)
10653 {
10654         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10655         struct mlx5_flow_dv_matcher *ref = ctx->data;
10656         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10657                                                         entry);
10658
10659         return cur->crc != ref->crc ||
10660                cur->priority != ref->priority ||
10661                memcmp((const void *)cur->mask.buf,
10662                       (const void *)ref->mask.buf, ref->mask.size);
10663 }
10664
10665 struct mlx5_list_entry *
10666 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10667 {
10668         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10669         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10670         struct mlx5_flow_dv_matcher *ref = ctx->data;
10671         struct mlx5_flow_dv_matcher *resource;
10672         struct mlx5dv_flow_matcher_attr dv_attr = {
10673                 .type = IBV_FLOW_ATTR_NORMAL,
10674                 .match_mask = (void *)&ref->mask,
10675         };
10676         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10677                                                             typeof(*tbl), tbl);
10678         int ret;
10679
10680         resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10681                                SOCKET_ID_ANY);
10682         if (!resource) {
10683                 rte_flow_error_set(ctx->error, ENOMEM,
10684                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10685                                    "cannot create matcher");
10686                 return NULL;
10687         }
10688         *resource = *ref;
10689         dv_attr.match_criteria_enable =
10690                 flow_dv_matcher_enable(resource->mask.buf);
10691         __flow_dv_adjust_buf_size(&ref->mask.size,
10692                                   dv_attr.match_criteria_enable);
10693         dv_attr.priority = ref->priority;
10694         if (tbl->is_egress)
10695                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10696         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
10697                                                tbl->tbl.obj,
10698                                                &resource->matcher_object);
10699         if (ret) {
10700                 mlx5_free(resource);
10701                 rte_flow_error_set(ctx->error, ENOMEM,
10702                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10703                                    "cannot create matcher");
10704                 return NULL;
10705         }
10706         return &resource->entry;
10707 }
10708
10709 /**
10710  * Register the flow matcher.
10711  *
10712  * @param[in, out] dev
10713  *   Pointer to rte_eth_dev structure.
10714  * @param[in, out] matcher
10715  *   Pointer to flow matcher.
10716  * @param[in, out] key
10717  *   Pointer to flow table key.
10718  * @parm[in, out] dev_flow
10719  *   Pointer to the dev_flow.
10720  * @param[out] error
10721  *   pointer to error structure.
10722  *
10723  * @return
10724  *   0 on success otherwise -errno and errno is set.
10725  */
10726 static int
10727 flow_dv_matcher_register(struct rte_eth_dev *dev,
10728                          struct mlx5_flow_dv_matcher *ref,
10729                          union mlx5_flow_tbl_key *key,
10730                          struct mlx5_flow *dev_flow,
10731                          const struct mlx5_flow_tunnel *tunnel,
10732                          uint32_t group_id,
10733                          struct rte_flow_error *error)
10734 {
10735         struct mlx5_list_entry *entry;
10736         struct mlx5_flow_dv_matcher *resource;
10737         struct mlx5_flow_tbl_resource *tbl;
10738         struct mlx5_flow_tbl_data_entry *tbl_data;
10739         struct mlx5_flow_cb_ctx ctx = {
10740                 .error = error,
10741                 .data = ref,
10742         };
10743         /**
10744          * tunnel offload API requires this registration for cases when
10745          * tunnel match rule was inserted before tunnel set rule.
10746          */
10747         tbl = flow_dv_tbl_resource_get(dev, key->level,
10748                                        key->is_egress, key->is_fdb,
10749                                        dev_flow->external, tunnel,
10750                                        group_id, 0, key->id, error);
10751         if (!tbl)
10752                 return -rte_errno;      /* No need to refill the error info */
10753         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10754         ref->tbl = tbl;
10755         entry = mlx5_list_register(tbl_data->matchers, &ctx);
10756         if (!entry) {
10757                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10758                 return rte_flow_error_set(error, ENOMEM,
10759                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10760                                           "cannot allocate ref memory");
10761         }
10762         resource = container_of(entry, typeof(*resource), entry);
10763         dev_flow->handle->dvh.matcher = resource;
10764         return 0;
10765 }
10766
10767 struct mlx5_list_entry *
10768 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10769 {
10770         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10771         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10772         struct mlx5_flow_dv_tag_resource *entry;
10773         uint32_t idx = 0;
10774         int ret;
10775
10776         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10777         if (!entry) {
10778                 rte_flow_error_set(ctx->error, ENOMEM,
10779                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10780                                    "cannot allocate resource memory");
10781                 return NULL;
10782         }
10783         entry->idx = idx;
10784         entry->tag_id = *(uint32_t *)(ctx->data);
10785         ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10786                                                   &entry->action);
10787         if (ret) {
10788                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10789                 rte_flow_error_set(ctx->error, ENOMEM,
10790                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10791                                    NULL, "cannot create action");
10792                 return NULL;
10793         }
10794         return &entry->entry;
10795 }
10796
10797 int
10798 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10799                      void *cb_ctx)
10800 {
10801         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10802         struct mlx5_flow_dv_tag_resource *tag =
10803                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10804
10805         return *(uint32_t *)(ctx->data) != tag->tag_id;
10806 }
10807
10808 struct mlx5_list_entry *
10809 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10810                      void *cb_ctx)
10811 {
10812         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10813         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10814         struct mlx5_flow_dv_tag_resource *entry;
10815         uint32_t idx = 0;
10816
10817         entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10818         if (!entry) {
10819                 rte_flow_error_set(ctx->error, ENOMEM,
10820                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10821                                    "cannot allocate tag resource memory");
10822                 return NULL;
10823         }
10824         memcpy(entry, oentry, sizeof(*entry));
10825         entry->idx = idx;
10826         return &entry->entry;
10827 }
10828
10829 void
10830 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10831 {
10832         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10833         struct mlx5_flow_dv_tag_resource *tag =
10834                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10835
10836         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10837 }
10838
10839 /**
10840  * Find existing tag resource or create and register a new one.
10841  *
10842  * @param dev[in, out]
10843  *   Pointer to rte_eth_dev structure.
10844  * @param[in, out] tag_be24
10845  *   Tag value in big endian then R-shift 8.
10846  * @parm[in, out] dev_flow
10847  *   Pointer to the dev_flow.
10848  * @param[out] error
10849  *   pointer to error structure.
10850  *
10851  * @return
10852  *   0 on success otherwise -errno and errno is set.
10853  */
10854 static int
10855 flow_dv_tag_resource_register
10856                         (struct rte_eth_dev *dev,
10857                          uint32_t tag_be24,
10858                          struct mlx5_flow *dev_flow,
10859                          struct rte_flow_error *error)
10860 {
10861         struct mlx5_priv *priv = dev->data->dev_private;
10862         struct mlx5_flow_dv_tag_resource *resource;
10863         struct mlx5_list_entry *entry;
10864         struct mlx5_flow_cb_ctx ctx = {
10865                                         .error = error,
10866                                         .data = &tag_be24,
10867                                         };
10868         struct mlx5_hlist *tag_table;
10869
10870         tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10871                                       "tags",
10872                                       MLX5_TAGS_HLIST_ARRAY_SIZE,
10873                                       false, false, priv->sh,
10874                                       flow_dv_tag_create_cb,
10875                                       flow_dv_tag_match_cb,
10876                                       flow_dv_tag_remove_cb,
10877                                       flow_dv_tag_clone_cb,
10878                                       flow_dv_tag_clone_free_cb,
10879                                       error);
10880         if (unlikely(!tag_table))
10881                 return -rte_errno;
10882         entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10883         if (entry) {
10884                 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10885                                         entry);
10886                 dev_flow->handle->dvh.rix_tag = resource->idx;
10887                 dev_flow->dv.tag_resource = resource;
10888                 return 0;
10889         }
10890         return -rte_errno;
10891 }
10892
10893 void
10894 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10895 {
10896         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10897         struct mlx5_flow_dv_tag_resource *tag =
10898                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10899
10900         MLX5_ASSERT(tag && sh && tag->action);
10901         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10902         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10903         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10904 }
10905
10906 /**
10907  * Release the tag.
10908  *
10909  * @param dev
10910  *   Pointer to Ethernet device.
10911  * @param tag_idx
10912  *   Tag index.
10913  *
10914  * @return
10915  *   1 while a reference on it exists, 0 when freed.
10916  */
10917 static int
10918 flow_dv_tag_release(struct rte_eth_dev *dev,
10919                     uint32_t tag_idx)
10920 {
10921         struct mlx5_priv *priv = dev->data->dev_private;
10922         struct mlx5_flow_dv_tag_resource *tag;
10923
10924         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10925         if (!tag)
10926                 return 0;
10927         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10928                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10929         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10930 }
10931
10932 /**
10933  * Translate action PORT_ID / REPRESENTED_PORT to vport.
10934  *
10935  * @param[in] dev
10936  *   Pointer to rte_eth_dev structure.
10937  * @param[in] action
10938  *   Pointer to action PORT_ID / REPRESENTED_PORT.
10939  * @param[out] dst_port_id
10940  *   The target port ID.
10941  * @param[out] error
10942  *   Pointer to the error structure.
10943  *
10944  * @return
10945  *   0 on success, a negative errno value otherwise and rte_errno is set.
10946  */
10947 static int
10948 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10949                                  const struct rte_flow_action *action,
10950                                  uint32_t *dst_port_id,
10951                                  struct rte_flow_error *error)
10952 {
10953         uint32_t port;
10954         struct mlx5_priv *priv;
10955
10956         switch (action->type) {
10957         case RTE_FLOW_ACTION_TYPE_PORT_ID: {
10958                 const struct rte_flow_action_port_id *conf;
10959
10960                 conf = (const struct rte_flow_action_port_id *)action->conf;
10961                 port = conf->original ? dev->data->port_id : conf->id;
10962                 break;
10963         }
10964         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: {
10965                 const struct rte_flow_action_ethdev *ethdev;
10966
10967                 ethdev = (const struct rte_flow_action_ethdev *)action->conf;
10968                 port = ethdev->port_id;
10969                 break;
10970         }
10971         default:
10972                 MLX5_ASSERT(false);
10973                 return rte_flow_error_set(error, EINVAL,
10974                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
10975                                           "unknown E-Switch action");
10976         }
10977
10978         priv = mlx5_port_to_eswitch_info(port, false);
10979         if (!priv)
10980                 return rte_flow_error_set(error, -rte_errno,
10981                                           RTE_FLOW_ERROR_TYPE_ACTION,
10982                                           NULL,
10983                                           "No eswitch info was found for port");
10984 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10985         /*
10986          * This parameter is transferred to
10987          * mlx5dv_dr_action_create_dest_ib_port().
10988          */
10989         *dst_port_id = priv->dev_port;
10990 #else
10991         /*
10992          * Legacy mode, no LAG configurations is supported.
10993          * This parameter is transferred to
10994          * mlx5dv_dr_action_create_dest_vport().
10995          */
10996         *dst_port_id = priv->vport_id;
10997 #endif
10998         return 0;
10999 }
11000
11001 /**
11002  * Create a counter with aging configuration.
11003  *
11004  * @param[in] dev
11005  *   Pointer to rte_eth_dev structure.
11006  * @param[in] dev_flow
11007  *   Pointer to the mlx5_flow.
11008  * @param[out] count
11009  *   Pointer to the counter action configuration.
11010  * @param[in] age
11011  *   Pointer to the aging action configuration.
11012  *
11013  * @return
11014  *   Index to flow counter on success, 0 otherwise.
11015  */
11016 static uint32_t
11017 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
11018                                 struct mlx5_flow *dev_flow,
11019                                 const struct rte_flow_action_count *count
11020                                         __rte_unused,
11021                                 const struct rte_flow_action_age *age)
11022 {
11023         uint32_t counter;
11024         struct mlx5_age_param *age_param;
11025
11026         counter = flow_dv_counter_alloc(dev, !!age);
11027         if (!counter || age == NULL)
11028                 return counter;
11029         age_param = flow_dv_counter_idx_get_age(dev, counter);
11030         age_param->context = age->context ? age->context :
11031                 (void *)(uintptr_t)(dev_flow->flow_idx);
11032         age_param->timeout = age->timeout;
11033         age_param->port_id = dev->data->port_id;
11034         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
11035         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
11036         return counter;
11037 }
11038
11039 /**
11040  * Add Tx queue matcher
11041  *
11042  * @param[in] dev
11043  *   Pointer to the dev struct.
11044  * @param[in, out] matcher
11045  *   Flow matcher.
11046  * @param[in, out] key
11047  *   Flow matcher value.
11048  * @param[in] item
11049  *   Flow pattern to translate.
11050  * @param[in] inner
11051  *   Item is inner pattern.
11052  */
11053 static void
11054 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
11055                                 void *matcher, void *key,
11056                                 const struct rte_flow_item *item)
11057 {
11058         const struct mlx5_rte_flow_item_tx_queue *queue_m;
11059         const struct mlx5_rte_flow_item_tx_queue *queue_v;
11060         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
11061         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
11062         struct mlx5_txq_ctrl *txq;
11063         uint32_t queue, mask;
11064
11065         queue_m = (const void *)item->mask;
11066         queue_v = (const void *)item->spec;
11067         if (!queue_v)
11068                 return;
11069         txq = mlx5_txq_get(dev, queue_v->queue);
11070         if (!txq)
11071                 return;
11072         if (txq->is_hairpin)
11073                 queue = txq->obj->sq->id;
11074         else
11075                 queue = txq->obj->sq_obj.sq->id;
11076         mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
11077         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
11078         MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
11079         mlx5_txq_release(dev, queue_v->queue);
11080 }
11081
11082 /**
11083  * Set the hash fields according to the @p flow information.
11084  *
11085  * @param[in] item_flags
11086  *   The match pattern item flags.
11087  * @param[in] rss_desc
11088  *   Pointer to the mlx5_flow_rss_desc.
11089  * @param[out] hash_fields
11090  *   Pointer to the RSS hash fields.
11091  */
11092 void
11093 flow_dv_hashfields_set(uint64_t item_flags,
11094                        struct mlx5_flow_rss_desc *rss_desc,
11095                        uint64_t *hash_fields)
11096 {
11097         uint64_t items = item_flags;
11098         uint64_t fields = 0;
11099         int rss_inner = 0;
11100         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
11101
11102         *hash_fields = 0;
11103 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
11104         if (rss_desc->level >= 2)
11105                 rss_inner = 1;
11106 #endif
11107         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
11108             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4)) ||
11109              !items) {
11110                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
11111                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
11112                                 fields |= IBV_RX_HASH_SRC_IPV4;
11113                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
11114                                 fields |= IBV_RX_HASH_DST_IPV4;
11115                         else
11116                                 fields |= MLX5_IPV4_IBV_RX_HASH;
11117                 }
11118         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
11119                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6)) ||
11120                    !items) {
11121                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
11122                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
11123                                 fields |= IBV_RX_HASH_SRC_IPV6;
11124                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
11125                                 fields |= IBV_RX_HASH_DST_IPV6;
11126                         else
11127                                 fields |= MLX5_IPV6_IBV_RX_HASH;
11128                 }
11129         }
11130         if (fields == 0)
11131                 /*
11132                  * There is no match between the RSS types and the
11133                  * L3 protocol (IPv4/IPv6) defined in the flow rule.
11134                  */
11135                 return;
11136         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
11137             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP)) ||
11138             !items) {
11139                 if (rss_types & RTE_ETH_RSS_UDP) {
11140                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
11141                                 fields |= IBV_RX_HASH_SRC_PORT_UDP;
11142                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11143                                 fields |= IBV_RX_HASH_DST_PORT_UDP;
11144                         else
11145                                 fields |= MLX5_UDP_IBV_RX_HASH;
11146                 }
11147         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
11148                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP)) ||
11149                    !items) {
11150                 if (rss_types & RTE_ETH_RSS_TCP) {
11151                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
11152                                 fields |= IBV_RX_HASH_SRC_PORT_TCP;
11153                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11154                                 fields |= IBV_RX_HASH_DST_PORT_TCP;
11155                         else
11156                                 fields |= MLX5_TCP_IBV_RX_HASH;
11157                 }
11158         }
11159         if (rss_inner)
11160                 fields |= IBV_RX_HASH_INNER;
11161         *hash_fields = fields;
11162 }
11163
11164 /**
11165  * Prepare an Rx Hash queue.
11166  *
11167  * @param dev
11168  *   Pointer to Ethernet device.
11169  * @param[in] dev_flow
11170  *   Pointer to the mlx5_flow.
11171  * @param[in] rss_desc
11172  *   Pointer to the mlx5_flow_rss_desc.
11173  * @param[out] hrxq_idx
11174  *   Hash Rx queue index.
11175  *
11176  * @return
11177  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
11178  */
11179 static struct mlx5_hrxq *
11180 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
11181                      struct mlx5_flow *dev_flow,
11182                      struct mlx5_flow_rss_desc *rss_desc,
11183                      uint32_t *hrxq_idx)
11184 {
11185         struct mlx5_flow_handle *dh = dev_flow->handle;
11186         struct mlx5_hrxq *hrxq;
11187
11188         MLX5_ASSERT(rss_desc->queue_num);
11189         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
11190         rss_desc->hash_fields = dev_flow->hash_fields;
11191         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
11192         rss_desc->shared_rss = 0;
11193         if (rss_desc->hash_fields == 0)
11194                 rss_desc->queue_num = 1;
11195         hrxq = mlx5_hrxq_get(dev, rss_desc);
11196         *hrxq_idx = hrxq ? hrxq->idx : 0;
11197         return hrxq;
11198 }
11199
11200 /**
11201  * Release sample sub action resource.
11202  *
11203  * @param[in, out] dev
11204  *   Pointer to rte_eth_dev structure.
11205  * @param[in] act_res
11206  *   Pointer to sample sub action resource.
11207  */
11208 static void
11209 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
11210                                    struct mlx5_flow_sub_actions_idx *act_res)
11211 {
11212         if (act_res->rix_hrxq) {
11213                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
11214                 act_res->rix_hrxq = 0;
11215         }
11216         if (act_res->rix_encap_decap) {
11217                 flow_dv_encap_decap_resource_release(dev,
11218                                                      act_res->rix_encap_decap);
11219                 act_res->rix_encap_decap = 0;
11220         }
11221         if (act_res->rix_port_id_action) {
11222                 flow_dv_port_id_action_resource_release(dev,
11223                                                 act_res->rix_port_id_action);
11224                 act_res->rix_port_id_action = 0;
11225         }
11226         if (act_res->rix_tag) {
11227                 flow_dv_tag_release(dev, act_res->rix_tag);
11228                 act_res->rix_tag = 0;
11229         }
11230         if (act_res->rix_jump) {
11231                 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
11232                 act_res->rix_jump = 0;
11233         }
11234 }
11235
11236 int
11237 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
11238                         struct mlx5_list_entry *entry, void *cb_ctx)
11239 {
11240         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11241         struct rte_eth_dev *dev = ctx->dev;
11242         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11243         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11244                                                               typeof(*resource),
11245                                                               entry);
11246
11247         if (ctx_resource->ratio == resource->ratio &&
11248             ctx_resource->ft_type == resource->ft_type &&
11249             ctx_resource->ft_id == resource->ft_id &&
11250             ctx_resource->set_action == resource->set_action &&
11251             !memcmp((void *)&ctx_resource->sample_act,
11252                     (void *)&resource->sample_act,
11253                     sizeof(struct mlx5_flow_sub_actions_list))) {
11254                 /*
11255                  * Existing sample action should release the prepared
11256                  * sub-actions reference counter.
11257                  */
11258                 flow_dv_sample_sub_actions_release(dev,
11259                                                    &ctx_resource->sample_idx);
11260                 return 0;
11261         }
11262         return 1;
11263 }
11264
11265 struct mlx5_list_entry *
11266 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11267 {
11268         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11269         struct rte_eth_dev *dev = ctx->dev;
11270         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11271         void **sample_dv_actions = ctx_resource->sub_actions;
11272         struct mlx5_flow_dv_sample_resource *resource;
11273         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11274         struct mlx5_priv *priv = dev->data->dev_private;
11275         struct mlx5_dev_ctx_shared *sh = priv->sh;
11276         struct mlx5_flow_tbl_resource *tbl;
11277         uint32_t idx = 0;
11278         const uint32_t next_ft_step = 1;
11279         uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11280         uint8_t is_egress = 0;
11281         uint8_t is_transfer = 0;
11282         struct rte_flow_error *error = ctx->error;
11283
11284         /* Register new sample resource. */
11285         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11286         if (!resource) {
11287                 rte_flow_error_set(error, ENOMEM,
11288                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11289                                           NULL,
11290                                           "cannot allocate resource memory");
11291                 return NULL;
11292         }
11293         *resource = *ctx_resource;
11294         /* Create normal path table level */
11295         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11296                 is_transfer = 1;
11297         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11298                 is_egress = 1;
11299         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11300                                         is_egress, is_transfer,
11301                                         true, NULL, 0, 0, 0, error);
11302         if (!tbl) {
11303                 rte_flow_error_set(error, ENOMEM,
11304                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11305                                           NULL,
11306                                           "fail to create normal path table "
11307                                           "for sample");
11308                 goto error;
11309         }
11310         resource->normal_path_tbl = tbl;
11311         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11312                 if (!sh->default_miss_action) {
11313                         rte_flow_error_set(error, ENOMEM,
11314                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11315                                                 NULL,
11316                                                 "default miss action was not "
11317                                                 "created");
11318                         goto error;
11319                 }
11320                 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11321                                                 sh->default_miss_action;
11322         }
11323         /* Create a DR sample action */
11324         sampler_attr.sample_ratio = resource->ratio;
11325         sampler_attr.default_next_table = tbl->obj;
11326         sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11327         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11328                                                         &sample_dv_actions[0];
11329         sampler_attr.action = resource->set_action;
11330         if (mlx5_os_flow_dr_create_flow_action_sampler
11331                         (&sampler_attr, &resource->verbs_action)) {
11332                 rte_flow_error_set(error, ENOMEM,
11333                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11334                                         NULL, "cannot create sample action");
11335                 goto error;
11336         }
11337         resource->idx = idx;
11338         resource->dev = dev;
11339         return &resource->entry;
11340 error:
11341         if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11342                 flow_dv_sample_sub_actions_release(dev,
11343                                                    &resource->sample_idx);
11344         if (resource->normal_path_tbl)
11345                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11346                                 resource->normal_path_tbl);
11347         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11348         return NULL;
11349
11350 }
11351
11352 struct mlx5_list_entry *
11353 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11354                          struct mlx5_list_entry *entry __rte_unused,
11355                          void *cb_ctx)
11356 {
11357         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11358         struct rte_eth_dev *dev = ctx->dev;
11359         struct mlx5_flow_dv_sample_resource *resource;
11360         struct mlx5_priv *priv = dev->data->dev_private;
11361         struct mlx5_dev_ctx_shared *sh = priv->sh;
11362         uint32_t idx = 0;
11363
11364         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11365         if (!resource) {
11366                 rte_flow_error_set(ctx->error, ENOMEM,
11367                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11368                                           NULL,
11369                                           "cannot allocate resource memory");
11370                 return NULL;
11371         }
11372         memcpy(resource, entry, sizeof(*resource));
11373         resource->idx = idx;
11374         resource->dev = dev;
11375         return &resource->entry;
11376 }
11377
11378 void
11379 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11380                              struct mlx5_list_entry *entry)
11381 {
11382         struct mlx5_flow_dv_sample_resource *resource =
11383                                   container_of(entry, typeof(*resource), entry);
11384         struct rte_eth_dev *dev = resource->dev;
11385         struct mlx5_priv *priv = dev->data->dev_private;
11386
11387         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11388 }
11389
11390 /**
11391  * Find existing sample resource or create and register a new one.
11392  *
11393  * @param[in, out] dev
11394  *   Pointer to rte_eth_dev structure.
11395  * @param[in] ref
11396  *   Pointer to sample resource reference.
11397  * @parm[in, out] dev_flow
11398  *   Pointer to the dev_flow.
11399  * @param[out] error
11400  *   pointer to error structure.
11401  *
11402  * @return
11403  *   0 on success otherwise -errno and errno is set.
11404  */
11405 static int
11406 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11407                          struct mlx5_flow_dv_sample_resource *ref,
11408                          struct mlx5_flow *dev_flow,
11409                          struct rte_flow_error *error)
11410 {
11411         struct mlx5_flow_dv_sample_resource *resource;
11412         struct mlx5_list_entry *entry;
11413         struct mlx5_priv *priv = dev->data->dev_private;
11414         struct mlx5_flow_cb_ctx ctx = {
11415                 .dev = dev,
11416                 .error = error,
11417                 .data = ref,
11418         };
11419
11420         entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11421         if (!entry)
11422                 return -rte_errno;
11423         resource = container_of(entry, typeof(*resource), entry);
11424         dev_flow->handle->dvh.rix_sample = resource->idx;
11425         dev_flow->dv.sample_res = resource;
11426         return 0;
11427 }
11428
11429 int
11430 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11431                             struct mlx5_list_entry *entry, void *cb_ctx)
11432 {
11433         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11434         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11435         struct rte_eth_dev *dev = ctx->dev;
11436         struct mlx5_flow_dv_dest_array_resource *resource =
11437                                   container_of(entry, typeof(*resource), entry);
11438         uint32_t idx = 0;
11439
11440         if (ctx_resource->num_of_dest == resource->num_of_dest &&
11441             ctx_resource->ft_type == resource->ft_type &&
11442             !memcmp((void *)resource->sample_act,
11443                     (void *)ctx_resource->sample_act,
11444                    (ctx_resource->num_of_dest *
11445                    sizeof(struct mlx5_flow_sub_actions_list)))) {
11446                 /*
11447                  * Existing sample action should release the prepared
11448                  * sub-actions reference counter.
11449                  */
11450                 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11451                         flow_dv_sample_sub_actions_release(dev,
11452                                         &ctx_resource->sample_idx[idx]);
11453                 return 0;
11454         }
11455         return 1;
11456 }
11457
11458 struct mlx5_list_entry *
11459 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11460 {
11461         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11462         struct rte_eth_dev *dev = ctx->dev;
11463         struct mlx5_flow_dv_dest_array_resource *resource;
11464         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11465         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11466         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11467         struct mlx5_priv *priv = dev->data->dev_private;
11468         struct mlx5_dev_ctx_shared *sh = priv->sh;
11469         struct mlx5_flow_sub_actions_list *sample_act;
11470         struct mlx5dv_dr_domain *domain;
11471         uint32_t idx = 0, res_idx = 0;
11472         struct rte_flow_error *error = ctx->error;
11473         uint64_t action_flags;
11474         int ret;
11475
11476         /* Register new destination array resource. */
11477         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11478                                             &res_idx);
11479         if (!resource) {
11480                 rte_flow_error_set(error, ENOMEM,
11481                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11482                                           NULL,
11483                                           "cannot allocate resource memory");
11484                 return NULL;
11485         }
11486         *resource = *ctx_resource;
11487         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11488                 domain = sh->fdb_domain;
11489         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11490                 domain = sh->rx_domain;
11491         else
11492                 domain = sh->tx_domain;
11493         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11494                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11495                                  mlx5_malloc(MLX5_MEM_ZERO,
11496                                  sizeof(struct mlx5dv_dr_action_dest_attr),
11497                                  0, SOCKET_ID_ANY);
11498                 if (!dest_attr[idx]) {
11499                         rte_flow_error_set(error, ENOMEM,
11500                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11501                                            NULL,
11502                                            "cannot allocate resource memory");
11503                         goto error;
11504                 }
11505                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11506                 sample_act = &ctx_resource->sample_act[idx];
11507                 action_flags = sample_act->action_flags;
11508                 switch (action_flags) {
11509                 case MLX5_FLOW_ACTION_QUEUE:
11510                         dest_attr[idx]->dest = sample_act->dr_queue_action;
11511                         break;
11512                 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11513                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11514                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11515                         dest_attr[idx]->dest_reformat->reformat =
11516                                         sample_act->dr_encap_action;
11517                         dest_attr[idx]->dest_reformat->dest =
11518                                         sample_act->dr_port_id_action;
11519                         break;
11520                 case MLX5_FLOW_ACTION_PORT_ID:
11521                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
11522                         break;
11523                 case MLX5_FLOW_ACTION_JUMP:
11524                         dest_attr[idx]->dest = sample_act->dr_jump_action;
11525                         break;
11526                 default:
11527                         rte_flow_error_set(error, EINVAL,
11528                                            RTE_FLOW_ERROR_TYPE_ACTION,
11529                                            NULL,
11530                                            "unsupported actions type");
11531                         goto error;
11532                 }
11533         }
11534         /* create a dest array action */
11535         ret = mlx5_os_flow_dr_create_flow_action_dest_array
11536                                                 (domain,
11537                                                  resource->num_of_dest,
11538                                                  dest_attr,
11539                                                  &resource->action);
11540         if (ret) {
11541                 rte_flow_error_set(error, ENOMEM,
11542                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11543                                    NULL,
11544                                    "cannot create destination array action");
11545                 goto error;
11546         }
11547         resource->idx = res_idx;
11548         resource->dev = dev;
11549         for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11550                 mlx5_free(dest_attr[idx]);
11551         return &resource->entry;
11552 error:
11553         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11554                 flow_dv_sample_sub_actions_release(dev,
11555                                                    &resource->sample_idx[idx]);
11556                 if (dest_attr[idx])
11557                         mlx5_free(dest_attr[idx]);
11558         }
11559         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11560         return NULL;
11561 }
11562
11563 struct mlx5_list_entry *
11564 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11565                             struct mlx5_list_entry *entry __rte_unused,
11566                             void *cb_ctx)
11567 {
11568         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11569         struct rte_eth_dev *dev = ctx->dev;
11570         struct mlx5_flow_dv_dest_array_resource *resource;
11571         struct mlx5_priv *priv = dev->data->dev_private;
11572         struct mlx5_dev_ctx_shared *sh = priv->sh;
11573         uint32_t res_idx = 0;
11574         struct rte_flow_error *error = ctx->error;
11575
11576         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11577                                       &res_idx);
11578         if (!resource) {
11579                 rte_flow_error_set(error, ENOMEM,
11580                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11581                                           NULL,
11582                                           "cannot allocate dest-array memory");
11583                 return NULL;
11584         }
11585         memcpy(resource, entry, sizeof(*resource));
11586         resource->idx = res_idx;
11587         resource->dev = dev;
11588         return &resource->entry;
11589 }
11590
11591 void
11592 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11593                                  struct mlx5_list_entry *entry)
11594 {
11595         struct mlx5_flow_dv_dest_array_resource *resource =
11596                         container_of(entry, typeof(*resource), entry);
11597         struct rte_eth_dev *dev = resource->dev;
11598         struct mlx5_priv *priv = dev->data->dev_private;
11599
11600         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11601 }
11602
11603 /**
11604  * Find existing destination array resource or create and register a new one.
11605  *
11606  * @param[in, out] dev
11607  *   Pointer to rte_eth_dev structure.
11608  * @param[in] ref
11609  *   Pointer to destination array resource reference.
11610  * @parm[in, out] dev_flow
11611  *   Pointer to the dev_flow.
11612  * @param[out] error
11613  *   pointer to error structure.
11614  *
11615  * @return
11616  *   0 on success otherwise -errno and errno is set.
11617  */
11618 static int
11619 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11620                          struct mlx5_flow_dv_dest_array_resource *ref,
11621                          struct mlx5_flow *dev_flow,
11622                          struct rte_flow_error *error)
11623 {
11624         struct mlx5_flow_dv_dest_array_resource *resource;
11625         struct mlx5_priv *priv = dev->data->dev_private;
11626         struct mlx5_list_entry *entry;
11627         struct mlx5_flow_cb_ctx ctx = {
11628                 .dev = dev,
11629                 .error = error,
11630                 .data = ref,
11631         };
11632
11633         entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11634         if (!entry)
11635                 return -rte_errno;
11636         resource = container_of(entry, typeof(*resource), entry);
11637         dev_flow->handle->dvh.rix_dest_array = resource->idx;
11638         dev_flow->dv.dest_array_res = resource;
11639         return 0;
11640 }
11641
11642 /**
11643  * Convert Sample action to DV specification.
11644  *
11645  * @param[in] dev
11646  *   Pointer to rte_eth_dev structure.
11647  * @param[in] action
11648  *   Pointer to sample action structure.
11649  * @param[in, out] dev_flow
11650  *   Pointer to the mlx5_flow.
11651  * @param[in] attr
11652  *   Pointer to the flow attributes.
11653  * @param[in, out] num_of_dest
11654  *   Pointer to the num of destination.
11655  * @param[in, out] sample_actions
11656  *   Pointer to sample actions list.
11657  * @param[in, out] res
11658  *   Pointer to sample resource.
11659  * @param[out] error
11660  *   Pointer to the error structure.
11661  *
11662  * @return
11663  *   0 on success, a negative errno value otherwise and rte_errno is set.
11664  */
11665 static int
11666 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11667                                 const struct rte_flow_action_sample *action,
11668                                 struct mlx5_flow *dev_flow,
11669                                 const struct rte_flow_attr *attr,
11670                                 uint32_t *num_of_dest,
11671                                 void **sample_actions,
11672                                 struct mlx5_flow_dv_sample_resource *res,
11673                                 struct rte_flow_error *error)
11674 {
11675         struct mlx5_priv *priv = dev->data->dev_private;
11676         const struct rte_flow_action *sub_actions;
11677         struct mlx5_flow_sub_actions_list *sample_act;
11678         struct mlx5_flow_sub_actions_idx *sample_idx;
11679         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11680         struct rte_flow *flow = dev_flow->flow;
11681         struct mlx5_flow_rss_desc *rss_desc;
11682         uint64_t action_flags = 0;
11683
11684         MLX5_ASSERT(wks);
11685         rss_desc = &wks->rss_desc;
11686         sample_act = &res->sample_act;
11687         sample_idx = &res->sample_idx;
11688         res->ratio = action->ratio;
11689         sub_actions = action->actions;
11690         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11691                 int type = sub_actions->type;
11692                 uint32_t pre_rix = 0;
11693                 void *pre_r;
11694                 switch (type) {
11695                 case RTE_FLOW_ACTION_TYPE_QUEUE:
11696                 {
11697                         const struct rte_flow_action_queue *queue;
11698                         struct mlx5_hrxq *hrxq;
11699                         uint32_t hrxq_idx;
11700
11701                         queue = sub_actions->conf;
11702                         rss_desc->queue_num = 1;
11703                         rss_desc->queue[0] = queue->index;
11704                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11705                                                     rss_desc, &hrxq_idx);
11706                         if (!hrxq)
11707                                 return rte_flow_error_set
11708                                         (error, rte_errno,
11709                                          RTE_FLOW_ERROR_TYPE_ACTION,
11710                                          NULL,
11711                                          "cannot create fate queue");
11712                         sample_act->dr_queue_action = hrxq->action;
11713                         sample_idx->rix_hrxq = hrxq_idx;
11714                         sample_actions[sample_act->actions_num++] =
11715                                                 hrxq->action;
11716                         (*num_of_dest)++;
11717                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
11718                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11719                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11720                         dev_flow->handle->fate_action =
11721                                         MLX5_FLOW_FATE_QUEUE;
11722                         break;
11723                 }
11724                 case RTE_FLOW_ACTION_TYPE_RSS:
11725                 {
11726                         struct mlx5_hrxq *hrxq;
11727                         uint32_t hrxq_idx;
11728                         const struct rte_flow_action_rss *rss;
11729                         const uint8_t *rss_key;
11730
11731                         rss = sub_actions->conf;
11732                         memcpy(rss_desc->queue, rss->queue,
11733                                rss->queue_num * sizeof(uint16_t));
11734                         rss_desc->queue_num = rss->queue_num;
11735                         /* NULL RSS key indicates default RSS key. */
11736                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
11737                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11738                         /*
11739                          * rss->level and rss.types should be set in advance
11740                          * when expanding items for RSS.
11741                          */
11742                         flow_dv_hashfields_set(dev_flow->handle->layers,
11743                                                rss_desc,
11744                                                &dev_flow->hash_fields);
11745                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11746                                                     rss_desc, &hrxq_idx);
11747                         if (!hrxq)
11748                                 return rte_flow_error_set
11749                                         (error, rte_errno,
11750                                          RTE_FLOW_ERROR_TYPE_ACTION,
11751                                          NULL,
11752                                          "cannot create fate queue");
11753                         sample_act->dr_queue_action = hrxq->action;
11754                         sample_idx->rix_hrxq = hrxq_idx;
11755                         sample_actions[sample_act->actions_num++] =
11756                                                 hrxq->action;
11757                         (*num_of_dest)++;
11758                         action_flags |= MLX5_FLOW_ACTION_RSS;
11759                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11760                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11761                         dev_flow->handle->fate_action =
11762                                         MLX5_FLOW_FATE_QUEUE;
11763                         break;
11764                 }
11765                 case RTE_FLOW_ACTION_TYPE_MARK:
11766                 {
11767                         uint32_t tag_be = mlx5_flow_mark_set
11768                                 (((const struct rte_flow_action_mark *)
11769                                 (sub_actions->conf))->id);
11770
11771                         wks->mark = 1;
11772                         pre_rix = dev_flow->handle->dvh.rix_tag;
11773                         /* Save the mark resource before sample */
11774                         pre_r = dev_flow->dv.tag_resource;
11775                         if (flow_dv_tag_resource_register(dev, tag_be,
11776                                                   dev_flow, error))
11777                                 return -rte_errno;
11778                         MLX5_ASSERT(dev_flow->dv.tag_resource);
11779                         sample_act->dr_tag_action =
11780                                 dev_flow->dv.tag_resource->action;
11781                         sample_idx->rix_tag =
11782                                 dev_flow->handle->dvh.rix_tag;
11783                         sample_actions[sample_act->actions_num++] =
11784                                                 sample_act->dr_tag_action;
11785                         /* Recover the mark resource after sample */
11786                         dev_flow->dv.tag_resource = pre_r;
11787                         dev_flow->handle->dvh.rix_tag = pre_rix;
11788                         action_flags |= MLX5_FLOW_ACTION_MARK;
11789                         break;
11790                 }
11791                 case RTE_FLOW_ACTION_TYPE_COUNT:
11792                 {
11793                         if (!flow->counter) {
11794                                 flow->counter =
11795                                         flow_dv_translate_create_counter(dev,
11796                                                 dev_flow, sub_actions->conf,
11797                                                 0);
11798                                 if (!flow->counter)
11799                                         return rte_flow_error_set
11800                                                 (error, rte_errno,
11801                                                 RTE_FLOW_ERROR_TYPE_ACTION,
11802                                                 NULL,
11803                                                 "cannot create counter"
11804                                                 " object.");
11805                         }
11806                         sample_act->dr_cnt_action =
11807                                   (flow_dv_counter_get_by_idx(dev,
11808                                   flow->counter, NULL))->action;
11809                         sample_actions[sample_act->actions_num++] =
11810                                                 sample_act->dr_cnt_action;
11811                         action_flags |= MLX5_FLOW_ACTION_COUNT;
11812                         break;
11813                 }
11814                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11815                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
11816                 {
11817                         struct mlx5_flow_dv_port_id_action_resource
11818                                         port_id_resource;
11819                         uint32_t port_id = 0;
11820
11821                         memset(&port_id_resource, 0, sizeof(port_id_resource));
11822                         /* Save the port id resource before sample */
11823                         pre_rix = dev_flow->handle->rix_port_id_action;
11824                         pre_r = dev_flow->dv.port_id_action;
11825                         if (flow_dv_translate_action_port_id(dev, sub_actions,
11826                                                              &port_id, error))
11827                                 return -rte_errno;
11828                         port_id_resource.port_id = port_id;
11829                         if (flow_dv_port_id_action_resource_register
11830                             (dev, &port_id_resource, dev_flow, error))
11831                                 return -rte_errno;
11832                         sample_act->dr_port_id_action =
11833                                 dev_flow->dv.port_id_action->action;
11834                         sample_idx->rix_port_id_action =
11835                                 dev_flow->handle->rix_port_id_action;
11836                         sample_actions[sample_act->actions_num++] =
11837                                                 sample_act->dr_port_id_action;
11838                         /* Recover the port id resource after sample */
11839                         dev_flow->dv.port_id_action = pre_r;
11840                         dev_flow->handle->rix_port_id_action = pre_rix;
11841                         (*num_of_dest)++;
11842                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11843                         break;
11844                 }
11845                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11846                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11847                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11848                         /* Save the encap resource before sample */
11849                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11850                         pre_r = dev_flow->dv.encap_decap;
11851                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
11852                                                            dev_flow,
11853                                                            attr->transfer,
11854                                                            error))
11855                                 return -rte_errno;
11856                         sample_act->dr_encap_action =
11857                                 dev_flow->dv.encap_decap->action;
11858                         sample_idx->rix_encap_decap =
11859                                 dev_flow->handle->dvh.rix_encap_decap;
11860                         sample_actions[sample_act->actions_num++] =
11861                                                 sample_act->dr_encap_action;
11862                         /* Recover the encap resource after sample */
11863                         dev_flow->dv.encap_decap = pre_r;
11864                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11865                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
11866                         break;
11867                 default:
11868                         return rte_flow_error_set(error, EINVAL,
11869                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11870                                 NULL,
11871                                 "Not support for sampler action");
11872                 }
11873         }
11874         sample_act->action_flags = action_flags;
11875         res->ft_id = dev_flow->dv.group;
11876         if (attr->transfer) {
11877                 union {
11878                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11879                         uint64_t set_action;
11880                 } action_ctx = { .set_action = 0 };
11881
11882                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11883                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11884                          MLX5_MODIFICATION_TYPE_SET);
11885                 MLX5_SET(set_action_in, action_ctx.action_in, field,
11886                          MLX5_MODI_META_REG_C_0);
11887                 MLX5_SET(set_action_in, action_ctx.action_in, data,
11888                          priv->vport_meta_tag);
11889                 res->set_action = action_ctx.set_action;
11890         } else if (attr->ingress) {
11891                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11892         } else {
11893                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11894         }
11895         return 0;
11896 }
11897
11898 /**
11899  * Convert Sample action to DV specification.
11900  *
11901  * @param[in] dev
11902  *   Pointer to rte_eth_dev structure.
11903  * @param[in, out] dev_flow
11904  *   Pointer to the mlx5_flow.
11905  * @param[in] num_of_dest
11906  *   The num of destination.
11907  * @param[in, out] res
11908  *   Pointer to sample resource.
11909  * @param[in, out] mdest_res
11910  *   Pointer to destination array resource.
11911  * @param[in] sample_actions
11912  *   Pointer to sample path actions list.
11913  * @param[in] action_flags
11914  *   Holds the actions detected until now.
11915  * @param[out] error
11916  *   Pointer to the error structure.
11917  *
11918  * @return
11919  *   0 on success, a negative errno value otherwise and rte_errno is set.
11920  */
11921 static int
11922 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11923                              struct mlx5_flow *dev_flow,
11924                              uint32_t num_of_dest,
11925                              struct mlx5_flow_dv_sample_resource *res,
11926                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
11927                              void **sample_actions,
11928                              uint64_t action_flags,
11929                              struct rte_flow_error *error)
11930 {
11931         /* update normal path action resource into last index of array */
11932         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11933         struct mlx5_flow_sub_actions_list *sample_act =
11934                                         &mdest_res->sample_act[dest_index];
11935         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11936         struct mlx5_flow_rss_desc *rss_desc;
11937         uint32_t normal_idx = 0;
11938         struct mlx5_hrxq *hrxq;
11939         uint32_t hrxq_idx;
11940
11941         MLX5_ASSERT(wks);
11942         rss_desc = &wks->rss_desc;
11943         if (num_of_dest > 1) {
11944                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11945                         /* Handle QP action for mirroring */
11946                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11947                                                     rss_desc, &hrxq_idx);
11948                         if (!hrxq)
11949                                 return rte_flow_error_set
11950                                      (error, rte_errno,
11951                                       RTE_FLOW_ERROR_TYPE_ACTION,
11952                                       NULL,
11953                                       "cannot create rx queue");
11954                         normal_idx++;
11955                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11956                         sample_act->dr_queue_action = hrxq->action;
11957                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11958                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11959                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11960                 }
11961                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11962                         normal_idx++;
11963                         mdest_res->sample_idx[dest_index].rix_encap_decap =
11964                                 dev_flow->handle->dvh.rix_encap_decap;
11965                         sample_act->dr_encap_action =
11966                                 dev_flow->dv.encap_decap->action;
11967                         dev_flow->handle->dvh.rix_encap_decap = 0;
11968                 }
11969                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11970                         normal_idx++;
11971                         mdest_res->sample_idx[dest_index].rix_port_id_action =
11972                                 dev_flow->handle->rix_port_id_action;
11973                         sample_act->dr_port_id_action =
11974                                 dev_flow->dv.port_id_action->action;
11975                         dev_flow->handle->rix_port_id_action = 0;
11976                 }
11977                 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11978                         normal_idx++;
11979                         mdest_res->sample_idx[dest_index].rix_jump =
11980                                 dev_flow->handle->rix_jump;
11981                         sample_act->dr_jump_action =
11982                                 dev_flow->dv.jump->action;
11983                         dev_flow->handle->rix_jump = 0;
11984                 }
11985                 sample_act->actions_num = normal_idx;
11986                 /* update sample action resource into first index of array */
11987                 mdest_res->ft_type = res->ft_type;
11988                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11989                                 sizeof(struct mlx5_flow_sub_actions_idx));
11990                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11991                                 sizeof(struct mlx5_flow_sub_actions_list));
11992                 mdest_res->num_of_dest = num_of_dest;
11993                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11994                                                          dev_flow, error))
11995                         return rte_flow_error_set(error, EINVAL,
11996                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11997                                                   NULL, "can't create sample "
11998                                                   "action");
11999         } else {
12000                 res->sub_actions = sample_actions;
12001                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
12002                         return rte_flow_error_set(error, EINVAL,
12003                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12004                                                   NULL,
12005                                                   "can't create sample action");
12006         }
12007         return 0;
12008 }
12009
12010 /**
12011  * Remove an ASO age action from age actions list.
12012  *
12013  * @param[in] dev
12014  *   Pointer to the Ethernet device structure.
12015  * @param[in] age
12016  *   Pointer to the aso age action handler.
12017  */
12018 static void
12019 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
12020                                 struct mlx5_aso_age_action *age)
12021 {
12022         struct mlx5_age_info *age_info;
12023         struct mlx5_age_param *age_param = &age->age_params;
12024         struct mlx5_priv *priv = dev->data->dev_private;
12025         uint16_t expected = AGE_CANDIDATE;
12026
12027         age_info = GET_PORT_AGE_INFO(priv);
12028         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
12029                                          AGE_FREE, false, __ATOMIC_RELAXED,
12030                                          __ATOMIC_RELAXED)) {
12031                 /**
12032                  * We need the lock even it is age timeout,
12033                  * since age action may still in process.
12034                  */
12035                 rte_spinlock_lock(&age_info->aged_sl);
12036                 LIST_REMOVE(age, next);
12037                 rte_spinlock_unlock(&age_info->aged_sl);
12038                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
12039         }
12040 }
12041
12042 /**
12043  * Release an ASO age action.
12044  *
12045  * @param[in] dev
12046  *   Pointer to the Ethernet device structure.
12047  * @param[in] age_idx
12048  *   Index of ASO age action to release.
12049  * @param[in] flow
12050  *   True if the release operation is during flow destroy operation.
12051  *   False if the release operation is during action destroy operation.
12052  *
12053  * @return
12054  *   0 when age action was removed, otherwise the number of references.
12055  */
12056 static int
12057 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
12058 {
12059         struct mlx5_priv *priv = dev->data->dev_private;
12060         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12061         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
12062         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
12063
12064         if (!ret) {
12065                 flow_dv_aso_age_remove_from_age(dev, age);
12066                 rte_spinlock_lock(&mng->free_sl);
12067                 LIST_INSERT_HEAD(&mng->free, age, next);
12068                 rte_spinlock_unlock(&mng->free_sl);
12069         }
12070         return ret;
12071 }
12072
12073 /**
12074  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
12075  *
12076  * @param[in] dev
12077  *   Pointer to the Ethernet device structure.
12078  *
12079  * @return
12080  *   0 on success, otherwise negative errno value and rte_errno is set.
12081  */
12082 static int
12083 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
12084 {
12085         struct mlx5_priv *priv = dev->data->dev_private;
12086         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12087         void *old_pools = mng->pools;
12088         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
12089         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
12090         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12091
12092         if (!pools) {
12093                 rte_errno = ENOMEM;
12094                 return -ENOMEM;
12095         }
12096         if (old_pools) {
12097                 memcpy(pools, old_pools,
12098                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
12099                 mlx5_free(old_pools);
12100         } else {
12101                 /* First ASO flow hit allocation - starting ASO data-path. */
12102                 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
12103
12104                 if (ret) {
12105                         mlx5_free(pools);
12106                         return ret;
12107                 }
12108         }
12109         mng->n = resize;
12110         mng->pools = pools;
12111         return 0;
12112 }
12113
12114 /**
12115  * Create and initialize a new ASO aging pool.
12116  *
12117  * @param[in] dev
12118  *   Pointer to the Ethernet device structure.
12119  * @param[out] age_free
12120  *   Where to put the pointer of a new age action.
12121  *
12122  * @return
12123  *   The age actions pool pointer and @p age_free is set on success,
12124  *   NULL otherwise and rte_errno is set.
12125  */
12126 static struct mlx5_aso_age_pool *
12127 flow_dv_age_pool_create(struct rte_eth_dev *dev,
12128                         struct mlx5_aso_age_action **age_free)
12129 {
12130         struct mlx5_priv *priv = dev->data->dev_private;
12131         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12132         struct mlx5_aso_age_pool *pool = NULL;
12133         struct mlx5_devx_obj *obj = NULL;
12134         uint32_t i;
12135
12136         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->cdev->ctx,
12137                                                     priv->sh->cdev->pdn);
12138         if (!obj) {
12139                 rte_errno = ENODATA;
12140                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
12141                 return NULL;
12142         }
12143         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12144         if (!pool) {
12145                 claim_zero(mlx5_devx_cmd_destroy(obj));
12146                 rte_errno = ENOMEM;
12147                 return NULL;
12148         }
12149         pool->flow_hit_aso_obj = obj;
12150         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
12151         rte_rwlock_write_lock(&mng->resize_rwl);
12152         pool->index = mng->next;
12153         /* Resize pools array if there is no room for the new pool in it. */
12154         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
12155                 claim_zero(mlx5_devx_cmd_destroy(obj));
12156                 mlx5_free(pool);
12157                 rte_rwlock_write_unlock(&mng->resize_rwl);
12158                 return NULL;
12159         }
12160         mng->pools[pool->index] = pool;
12161         mng->next++;
12162         rte_rwlock_write_unlock(&mng->resize_rwl);
12163         /* Assign the first action in the new pool, the rest go to free list. */
12164         *age_free = &pool->actions[0];
12165         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
12166                 pool->actions[i].offset = i;
12167                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
12168         }
12169         return pool;
12170 }
12171
12172 /**
12173  * Allocate a ASO aging bit.
12174  *
12175  * @param[in] dev
12176  *   Pointer to the Ethernet device structure.
12177  * @param[out] error
12178  *   Pointer to the error structure.
12179  *
12180  * @return
12181  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
12182  */
12183 static uint32_t
12184 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12185 {
12186         struct mlx5_priv *priv = dev->data->dev_private;
12187         const struct mlx5_aso_age_pool *pool;
12188         struct mlx5_aso_age_action *age_free = NULL;
12189         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12190
12191         MLX5_ASSERT(mng);
12192         /* Try to get the next free age action bit. */
12193         rte_spinlock_lock(&mng->free_sl);
12194         age_free = LIST_FIRST(&mng->free);
12195         if (age_free) {
12196                 LIST_REMOVE(age_free, next);
12197         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
12198                 rte_spinlock_unlock(&mng->free_sl);
12199                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12200                                    NULL, "failed to create ASO age pool");
12201                 return 0; /* 0 is an error. */
12202         }
12203         rte_spinlock_unlock(&mng->free_sl);
12204         pool = container_of
12205           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
12206                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
12207                                                                        actions);
12208         if (!age_free->dr_action) {
12209                 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
12210                                                  error);
12211
12212                 if (reg_c < 0) {
12213                         rte_flow_error_set(error, rte_errno,
12214                                            RTE_FLOW_ERROR_TYPE_ACTION,
12215                                            NULL, "failed to get reg_c "
12216                                            "for ASO flow hit");
12217                         return 0; /* 0 is an error. */
12218                 }
12219 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
12220                 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
12221                                 (priv->sh->rx_domain,
12222                                  pool->flow_hit_aso_obj->obj, age_free->offset,
12223                                  MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
12224                                  (reg_c - REG_C_0));
12225 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
12226                 if (!age_free->dr_action) {
12227                         rte_errno = errno;
12228                         rte_spinlock_lock(&mng->free_sl);
12229                         LIST_INSERT_HEAD(&mng->free, age_free, next);
12230                         rte_spinlock_unlock(&mng->free_sl);
12231                         rte_flow_error_set(error, rte_errno,
12232                                            RTE_FLOW_ERROR_TYPE_ACTION,
12233                                            NULL, "failed to create ASO "
12234                                            "flow hit action");
12235                         return 0; /* 0 is an error. */
12236                 }
12237         }
12238         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
12239         return pool->index | ((age_free->offset + 1) << 16);
12240 }
12241
12242 /**
12243  * Initialize flow ASO age parameters.
12244  *
12245  * @param[in] dev
12246  *   Pointer to rte_eth_dev structure.
12247  * @param[in] age_idx
12248  *   Index of ASO age action.
12249  * @param[in] context
12250  *   Pointer to flow counter age context.
12251  * @param[in] timeout
12252  *   Aging timeout in seconds.
12253  *
12254  */
12255 static void
12256 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12257                             uint32_t age_idx,
12258                             void *context,
12259                             uint32_t timeout)
12260 {
12261         struct mlx5_aso_age_action *aso_age;
12262
12263         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12264         MLX5_ASSERT(aso_age);
12265         aso_age->age_params.context = context;
12266         aso_age->age_params.timeout = timeout;
12267         aso_age->age_params.port_id = dev->data->port_id;
12268         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12269                          __ATOMIC_RELAXED);
12270         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12271                          __ATOMIC_RELAXED);
12272 }
12273
12274 static void
12275 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12276                                const struct rte_flow_item_integrity *value,
12277                                void *headers_m, void *headers_v)
12278 {
12279         if (mask->l4_ok) {
12280                 /* RTE l4_ok filter aggregates hardware l4_ok and
12281                  * l4_checksum_ok filters.
12282                  * Positive RTE l4_ok match requires hardware match on both L4
12283                  * hardware integrity bits.
12284                  * For negative match, check hardware l4_checksum_ok bit only,
12285                  * because hardware sets that bit to 0 for all packets
12286                  * with bad L4.
12287                  */
12288                 if (value->l4_ok) {
12289                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok, 1);
12290                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok, 1);
12291                 }
12292                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12293                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12294                          !!value->l4_ok);
12295         }
12296         if (mask->l4_csum_ok) {
12297                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12298                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12299                          value->l4_csum_ok);
12300         }
12301 }
12302
12303 static void
12304 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12305                                const struct rte_flow_item_integrity *value,
12306                                void *headers_m, void *headers_v, bool is_ipv4)
12307 {
12308         if (mask->l3_ok) {
12309                 /* RTE l3_ok filter aggregates for IPv4 hardware l3_ok and
12310                  * ipv4_csum_ok filters.
12311                  * Positive RTE l3_ok match requires hardware match on both L3
12312                  * hardware integrity bits.
12313                  * For negative match, check hardware l3_csum_ok bit only,
12314                  * because hardware sets that bit to 0 for all packets
12315                  * with bad L3.
12316                  */
12317                 if (is_ipv4) {
12318                         if (value->l3_ok) {
12319                                 MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12320                                          l3_ok, 1);
12321                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12322                                          l3_ok, 1);
12323                         }
12324                         MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12325                                  ipv4_checksum_ok, 1);
12326                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12327                                  ipv4_checksum_ok, !!value->l3_ok);
12328                 } else {
12329                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok, 1);
12330                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12331                                  value->l3_ok);
12332                 }
12333         }
12334         if (mask->ipv4_csum_ok) {
12335                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok, 1);
12336                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12337                          value->ipv4_csum_ok);
12338         }
12339 }
12340
12341 static void
12342 set_integrity_bits(void *headers_m, void *headers_v,
12343                    const struct rte_flow_item *integrity_item, bool is_l3_ip4)
12344 {
12345         const struct rte_flow_item_integrity *spec = integrity_item->spec;
12346         const struct rte_flow_item_integrity *mask = integrity_item->mask;
12347
12348         /* Integrity bits validation cleared spec pointer */
12349         MLX5_ASSERT(spec != NULL);
12350         if (!mask)
12351                 mask = &rte_flow_item_integrity_mask;
12352         flow_dv_translate_integrity_l3(mask, spec, headers_m, headers_v,
12353                                        is_l3_ip4);
12354         flow_dv_translate_integrity_l4(mask, spec, headers_m, headers_v);
12355 }
12356
12357 static void
12358 flow_dv_translate_item_integrity_post(void *matcher, void *key,
12359                                       const
12360                                       struct rte_flow_item *integrity_items[2],
12361                                       uint64_t pattern_flags)
12362 {
12363         void *headers_m, *headers_v;
12364         bool is_l3_ip4;
12365
12366         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
12367                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12368                                          inner_headers);
12369                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12370                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4) !=
12371                             0;
12372                 set_integrity_bits(headers_m, headers_v,
12373                                    integrity_items[1], is_l3_ip4);
12374         }
12375         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
12376                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12377                                          outer_headers);
12378                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12379                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV4) !=
12380                             0;
12381                 set_integrity_bits(headers_m, headers_v,
12382                                    integrity_items[0], is_l3_ip4);
12383         }
12384 }
12385
12386 static void
12387 flow_dv_translate_item_integrity(const struct rte_flow_item *item,
12388                                  const struct rte_flow_item *integrity_items[2],
12389                                  uint64_t *last_item)
12390 {
12391         const struct rte_flow_item_integrity *spec = (typeof(spec))item->spec;
12392
12393         /* integrity bits validation cleared spec pointer */
12394         MLX5_ASSERT(spec != NULL);
12395         if (spec->level > 1) {
12396                 integrity_items[1] = item;
12397                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
12398         } else {
12399                 integrity_items[0] = item;
12400                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
12401         }
12402 }
12403
12404 /**
12405  * Prepares DV flow counter with aging configuration.
12406  * Gets it by index when exists, creates a new one when doesn't.
12407  *
12408  * @param[in] dev
12409  *   Pointer to rte_eth_dev structure.
12410  * @param[in] dev_flow
12411  *   Pointer to the mlx5_flow.
12412  * @param[in, out] flow
12413  *   Pointer to the sub flow.
12414  * @param[in] count
12415  *   Pointer to the counter action configuration.
12416  * @param[in] age
12417  *   Pointer to the aging action configuration.
12418  * @param[out] error
12419  *   Pointer to the error structure.
12420  *
12421  * @return
12422  *   Pointer to the counter, NULL otherwise.
12423  */
12424 static struct mlx5_flow_counter *
12425 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12426                         struct mlx5_flow *dev_flow,
12427                         struct rte_flow *flow,
12428                         const struct rte_flow_action_count *count,
12429                         const struct rte_flow_action_age *age,
12430                         struct rte_flow_error *error)
12431 {
12432         if (!flow->counter) {
12433                 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12434                                                                  count, age);
12435                 if (!flow->counter) {
12436                         rte_flow_error_set(error, rte_errno,
12437                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12438                                            "cannot create counter object.");
12439                         return NULL;
12440                 }
12441         }
12442         return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12443 }
12444
12445 /*
12446  * Release an ASO CT action by its own device.
12447  *
12448  * @param[in] dev
12449  *   Pointer to the Ethernet device structure.
12450  * @param[in] idx
12451  *   Index of ASO CT action to release.
12452  *
12453  * @return
12454  *   0 when CT action was removed, otherwise the number of references.
12455  */
12456 static inline int
12457 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12458 {
12459         struct mlx5_priv *priv = dev->data->dev_private;
12460         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12461         uint32_t ret;
12462         struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12463         enum mlx5_aso_ct_state state =
12464                         __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12465
12466         /* Cannot release when CT is in the ASO SQ. */
12467         if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12468                 return -1;
12469         ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12470         if (!ret) {
12471                 if (ct->dr_action_orig) {
12472 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12473                         claim_zero(mlx5_glue->destroy_flow_action
12474                                         (ct->dr_action_orig));
12475 #endif
12476                         ct->dr_action_orig = NULL;
12477                 }
12478                 if (ct->dr_action_rply) {
12479 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12480                         claim_zero(mlx5_glue->destroy_flow_action
12481                                         (ct->dr_action_rply));
12482 #endif
12483                         ct->dr_action_rply = NULL;
12484                 }
12485                 /* Clear the state to free, no need in 1st allocation. */
12486                 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12487                 rte_spinlock_lock(&mng->ct_sl);
12488                 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12489                 rte_spinlock_unlock(&mng->ct_sl);
12490         }
12491         return (int)ret;
12492 }
12493
12494 static inline int
12495 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx,
12496                        struct rte_flow_error *error)
12497 {
12498         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12499         uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12500         struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12501         int ret;
12502
12503         MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12504         if (dev->data->dev_started != 1)
12505                 return rte_flow_error_set(error, EAGAIN,
12506                                           RTE_FLOW_ERROR_TYPE_ACTION,
12507                                           NULL,
12508                                           "Indirect CT action cannot be destroyed when the port is stopped");
12509         ret = flow_dv_aso_ct_dev_release(owndev, idx);
12510         if (ret < 0)
12511                 return rte_flow_error_set(error, EAGAIN,
12512                                           RTE_FLOW_ERROR_TYPE_ACTION,
12513                                           NULL,
12514                                           "Current state prevents indirect CT action from being destroyed");
12515         return ret;
12516 }
12517
12518 /*
12519  * Resize the ASO CT pools array by 64 pools.
12520  *
12521  * @param[in] dev
12522  *   Pointer to the Ethernet device structure.
12523  *
12524  * @return
12525  *   0 on success, otherwise negative errno value and rte_errno is set.
12526  */
12527 static int
12528 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12529 {
12530         struct mlx5_priv *priv = dev->data->dev_private;
12531         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12532         void *old_pools = mng->pools;
12533         /* Magic number now, need a macro. */
12534         uint32_t resize = mng->n + 64;
12535         uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12536         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12537
12538         if (!pools) {
12539                 rte_errno = ENOMEM;
12540                 return -rte_errno;
12541         }
12542         rte_rwlock_write_lock(&mng->resize_rwl);
12543         /* ASO SQ/QP was already initialized in the startup. */
12544         if (old_pools) {
12545                 /* Realloc could be an alternative choice. */
12546                 rte_memcpy(pools, old_pools,
12547                            mng->n * sizeof(struct mlx5_aso_ct_pool *));
12548                 mlx5_free(old_pools);
12549         }
12550         mng->n = resize;
12551         mng->pools = pools;
12552         rte_rwlock_write_unlock(&mng->resize_rwl);
12553         return 0;
12554 }
12555
12556 /*
12557  * Create and initialize a new ASO CT pool.
12558  *
12559  * @param[in] dev
12560  *   Pointer to the Ethernet device structure.
12561  * @param[out] ct_free
12562  *   Where to put the pointer of a new CT action.
12563  *
12564  * @return
12565  *   The CT actions pool pointer and @p ct_free is set on success,
12566  *   NULL otherwise and rte_errno is set.
12567  */
12568 static struct mlx5_aso_ct_pool *
12569 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12570                        struct mlx5_aso_ct_action **ct_free)
12571 {
12572         struct mlx5_priv *priv = dev->data->dev_private;
12573         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12574         struct mlx5_aso_ct_pool *pool = NULL;
12575         struct mlx5_devx_obj *obj = NULL;
12576         uint32_t i;
12577         uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12578
12579         obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->cdev->ctx,
12580                                                           priv->sh->cdev->pdn,
12581                                                           log_obj_size);
12582         if (!obj) {
12583                 rte_errno = ENODATA;
12584                 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12585                 return NULL;
12586         }
12587         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12588         if (!pool) {
12589                 rte_errno = ENOMEM;
12590                 claim_zero(mlx5_devx_cmd_destroy(obj));
12591                 return NULL;
12592         }
12593         pool->devx_obj = obj;
12594         pool->index = mng->next;
12595         /* Resize pools array if there is no room for the new pool in it. */
12596         if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12597                 claim_zero(mlx5_devx_cmd_destroy(obj));
12598                 mlx5_free(pool);
12599                 return NULL;
12600         }
12601         mng->pools[pool->index] = pool;
12602         mng->next++;
12603         /* Assign the first action in the new pool, the rest go to free list. */
12604         *ct_free = &pool->actions[0];
12605         /* Lock outside, the list operation is safe here. */
12606         for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12607                 /* refcnt is 0 when allocating the memory. */
12608                 pool->actions[i].offset = i;
12609                 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12610         }
12611         return pool;
12612 }
12613
12614 /*
12615  * Allocate a ASO CT action from free list.
12616  *
12617  * @param[in] dev
12618  *   Pointer to the Ethernet device structure.
12619  * @param[out] error
12620  *   Pointer to the error structure.
12621  *
12622  * @return
12623  *   Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12624  */
12625 static uint32_t
12626 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12627 {
12628         struct mlx5_priv *priv = dev->data->dev_private;
12629         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12630         struct mlx5_aso_ct_action *ct = NULL;
12631         struct mlx5_aso_ct_pool *pool;
12632         uint8_t reg_c;
12633         uint32_t ct_idx;
12634
12635         MLX5_ASSERT(mng);
12636         if (!priv->sh->cdev->config.devx) {
12637                 rte_errno = ENOTSUP;
12638                 return 0;
12639         }
12640         /* Get a free CT action, if no, a new pool will be created. */
12641         rte_spinlock_lock(&mng->ct_sl);
12642         ct = LIST_FIRST(&mng->free_cts);
12643         if (ct) {
12644                 LIST_REMOVE(ct, next);
12645         } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12646                 rte_spinlock_unlock(&mng->ct_sl);
12647                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12648                                    NULL, "failed to create ASO CT pool");
12649                 return 0;
12650         }
12651         rte_spinlock_unlock(&mng->ct_sl);
12652         pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12653         ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12654         /* 0: inactive, 1: created, 2+: used by flows. */
12655         __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12656         reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12657         if (!ct->dr_action_orig) {
12658 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12659                 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12660                         (priv->sh->rx_domain, pool->devx_obj->obj,
12661                          ct->offset,
12662                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12663                          reg_c - REG_C_0);
12664 #else
12665                 RTE_SET_USED(reg_c);
12666 #endif
12667                 if (!ct->dr_action_orig) {
12668                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12669                         rte_flow_error_set(error, rte_errno,
12670                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12671                                            "failed to create ASO CT action");
12672                         return 0;
12673                 }
12674         }
12675         if (!ct->dr_action_rply) {
12676 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12677                 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12678                         (priv->sh->rx_domain, pool->devx_obj->obj,
12679                          ct->offset,
12680                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12681                          reg_c - REG_C_0);
12682 #endif
12683                 if (!ct->dr_action_rply) {
12684                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12685                         rte_flow_error_set(error, rte_errno,
12686                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12687                                            "failed to create ASO CT action");
12688                         return 0;
12689                 }
12690         }
12691         return ct_idx;
12692 }
12693
12694 /*
12695  * Create a conntrack object with context and actions by using ASO mechanism.
12696  *
12697  * @param[in] dev
12698  *   Pointer to rte_eth_dev structure.
12699  * @param[in] pro
12700  *   Pointer to conntrack information profile.
12701  * @param[out] error
12702  *   Pointer to the error structure.
12703  *
12704  * @return
12705  *   Index to conntrack object on success, 0 otherwise.
12706  */
12707 static uint32_t
12708 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12709                                    const struct rte_flow_action_conntrack *pro,
12710                                    struct rte_flow_error *error)
12711 {
12712         struct mlx5_priv *priv = dev->data->dev_private;
12713         struct mlx5_dev_ctx_shared *sh = priv->sh;
12714         struct mlx5_aso_ct_action *ct;
12715         uint32_t idx;
12716
12717         if (!sh->ct_aso_en)
12718                 return rte_flow_error_set(error, ENOTSUP,
12719                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12720                                           "Connection is not supported");
12721         idx = flow_dv_aso_ct_alloc(dev, error);
12722         if (!idx)
12723                 return rte_flow_error_set(error, rte_errno,
12724                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12725                                           "Failed to allocate CT object");
12726         ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12727         if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12728                 return rte_flow_error_set(error, EBUSY,
12729                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12730                                           "Failed to update CT");
12731         ct->is_original = !!pro->is_original_dir;
12732         ct->peer = pro->peer_port;
12733         return idx;
12734 }
12735
12736 /**
12737  * Fill the flow with DV spec, lock free
12738  * (mutex should be acquired by caller).
12739  *
12740  * @param[in] dev
12741  *   Pointer to rte_eth_dev structure.
12742  * @param[in, out] dev_flow
12743  *   Pointer to the sub flow.
12744  * @param[in] attr
12745  *   Pointer to the flow attributes.
12746  * @param[in] items
12747  *   Pointer to the list of items.
12748  * @param[in] actions
12749  *   Pointer to the list of actions.
12750  * @param[out] error
12751  *   Pointer to the error structure.
12752  *
12753  * @return
12754  *   0 on success, a negative errno value otherwise and rte_errno is set.
12755  */
12756 static int
12757 flow_dv_translate(struct rte_eth_dev *dev,
12758                   struct mlx5_flow *dev_flow,
12759                   const struct rte_flow_attr *attr,
12760                   const struct rte_flow_item items[],
12761                   const struct rte_flow_action actions[],
12762                   struct rte_flow_error *error)
12763 {
12764         struct mlx5_priv *priv = dev->data->dev_private;
12765         struct mlx5_sh_config *dev_conf = &priv->sh->config;
12766         struct rte_flow *flow = dev_flow->flow;
12767         struct mlx5_flow_handle *handle = dev_flow->handle;
12768         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12769         struct mlx5_flow_rss_desc *rss_desc;
12770         uint64_t item_flags = 0;
12771         uint64_t last_item = 0;
12772         uint64_t action_flags = 0;
12773         struct mlx5_flow_dv_matcher matcher = {
12774                 .mask = {
12775                         .size = sizeof(matcher.mask.buf),
12776                 },
12777         };
12778         int actions_n = 0;
12779         bool actions_end = false;
12780         union {
12781                 struct mlx5_flow_dv_modify_hdr_resource res;
12782                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12783                             sizeof(struct mlx5_modification_cmd) *
12784                             (MLX5_MAX_MODIFY_NUM + 1)];
12785         } mhdr_dummy;
12786         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12787         const struct rte_flow_action_count *count = NULL;
12788         const struct rte_flow_action_age *non_shared_age = NULL;
12789         union flow_dv_attr flow_attr = { .attr = 0 };
12790         uint32_t tag_be;
12791         union mlx5_flow_tbl_key tbl_key;
12792         uint32_t modify_action_position = UINT32_MAX;
12793         void *match_mask = matcher.mask.buf;
12794         void *match_value = dev_flow->dv.value.buf;
12795         uint8_t next_protocol = 0xff;
12796         struct rte_vlan_hdr vlan = { 0 };
12797         struct mlx5_flow_dv_dest_array_resource mdest_res;
12798         struct mlx5_flow_dv_sample_resource sample_res;
12799         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12800         const struct rte_flow_action_sample *sample = NULL;
12801         struct mlx5_flow_sub_actions_list *sample_act;
12802         uint32_t sample_act_pos = UINT32_MAX;
12803         uint32_t age_act_pos = UINT32_MAX;
12804         uint32_t num_of_dest = 0;
12805         int tmp_actions_n = 0;
12806         uint32_t table;
12807         int ret = 0;
12808         const struct mlx5_flow_tunnel *tunnel = NULL;
12809         struct flow_grp_info grp_info = {
12810                 .external = !!dev_flow->external,
12811                 .transfer = !!attr->transfer,
12812                 .fdb_def_rule = !!priv->fdb_def_rule,
12813                 .skip_scale = dev_flow->skip_scale &
12814                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12815                 .std_tbl_fix = true,
12816         };
12817         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
12818         const struct rte_flow_item *tunnel_item = NULL;
12819         const struct rte_flow_item *gre_item = NULL;
12820
12821         if (!wks)
12822                 return rte_flow_error_set(error, ENOMEM,
12823                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12824                                           NULL,
12825                                           "failed to push flow workspace");
12826         rss_desc = &wks->rss_desc;
12827         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12828         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12829         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12830                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12831         /* update normal path action resource into last index of array */
12832         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12833         if (is_tunnel_offload_active(dev)) {
12834                 if (dev_flow->tunnel) {
12835                         RTE_VERIFY(dev_flow->tof_type ==
12836                                    MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12837                         tunnel = dev_flow->tunnel;
12838                 } else {
12839                         tunnel = mlx5_get_tof(items, actions,
12840                                               &dev_flow->tof_type);
12841                         dev_flow->tunnel = tunnel;
12842                 }
12843                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12844                                         (dev, attr, tunnel, dev_flow->tof_type);
12845         }
12846         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12847                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12848         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12849                                        &grp_info, error);
12850         if (ret)
12851                 return ret;
12852         dev_flow->dv.group = table;
12853         if (attr->transfer)
12854                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12855         /* number of actions must be set to 0 in case of dirty stack. */
12856         mhdr_res->actions_num = 0;
12857         if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12858                 /*
12859                  * do not add decap action if match rule drops packet
12860                  * HW rejects rules with decap & drop
12861                  *
12862                  * if tunnel match rule was inserted before matching tunnel set
12863                  * rule flow table used in the match rule must be registered.
12864                  * current implementation handles that in the
12865                  * flow_dv_match_register() at the function end.
12866                  */
12867                 bool add_decap = true;
12868                 const struct rte_flow_action *ptr = actions;
12869
12870                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12871                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12872                                 add_decap = false;
12873                                 break;
12874                         }
12875                 }
12876                 if (add_decap) {
12877                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12878                                                            attr->transfer,
12879                                                            error))
12880                                 return -rte_errno;
12881                         dev_flow->dv.actions[actions_n++] =
12882                                         dev_flow->dv.encap_decap->action;
12883                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12884                 }
12885         }
12886         for (; !actions_end ; actions++) {
12887                 const struct rte_flow_action_queue *queue;
12888                 const struct rte_flow_action_rss *rss;
12889                 const struct rte_flow_action *action = actions;
12890                 const uint8_t *rss_key;
12891                 struct mlx5_flow_tbl_resource *tbl;
12892                 struct mlx5_aso_age_action *age_act;
12893                 struct mlx5_flow_counter *cnt_act;
12894                 uint32_t port_id = 0;
12895                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12896                 int action_type = actions->type;
12897                 const struct rte_flow_action *found_action = NULL;
12898                 uint32_t jump_group = 0;
12899                 uint32_t owner_idx;
12900                 struct mlx5_aso_ct_action *ct;
12901
12902                 if (!mlx5_flow_os_action_supported(action_type))
12903                         return rte_flow_error_set(error, ENOTSUP,
12904                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12905                                                   actions,
12906                                                   "action not supported");
12907                 switch (action_type) {
12908                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12909                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12910                         break;
12911                 case RTE_FLOW_ACTION_TYPE_VOID:
12912                         break;
12913                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12914                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
12915                         if (flow_dv_translate_action_port_id(dev, action,
12916                                                              &port_id, error))
12917                                 return -rte_errno;
12918                         port_id_resource.port_id = port_id;
12919                         MLX5_ASSERT(!handle->rix_port_id_action);
12920                         if (flow_dv_port_id_action_resource_register
12921                             (dev, &port_id_resource, dev_flow, error))
12922                                 return -rte_errno;
12923                         dev_flow->dv.actions[actions_n++] =
12924                                         dev_flow->dv.port_id_action->action;
12925                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12926                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12927                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12928                         num_of_dest++;
12929                         break;
12930                 case RTE_FLOW_ACTION_TYPE_FLAG:
12931                         action_flags |= MLX5_FLOW_ACTION_FLAG;
12932                         wks->mark = 1;
12933                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12934                                 struct rte_flow_action_mark mark = {
12935                                         .id = MLX5_FLOW_MARK_DEFAULT,
12936                                 };
12937
12938                                 if (flow_dv_convert_action_mark(dev, &mark,
12939                                                                 mhdr_res,
12940                                                                 error))
12941                                         return -rte_errno;
12942                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12943                                 break;
12944                         }
12945                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12946                         /*
12947                          * Only one FLAG or MARK is supported per device flow
12948                          * right now. So the pointer to the tag resource must be
12949                          * zero before the register process.
12950                          */
12951                         MLX5_ASSERT(!handle->dvh.rix_tag);
12952                         if (flow_dv_tag_resource_register(dev, tag_be,
12953                                                           dev_flow, error))
12954                                 return -rte_errno;
12955                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12956                         dev_flow->dv.actions[actions_n++] =
12957                                         dev_flow->dv.tag_resource->action;
12958                         break;
12959                 case RTE_FLOW_ACTION_TYPE_MARK:
12960                         action_flags |= MLX5_FLOW_ACTION_MARK;
12961                         wks->mark = 1;
12962                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12963                                 const struct rte_flow_action_mark *mark =
12964                                         (const struct rte_flow_action_mark *)
12965                                                 actions->conf;
12966
12967                                 if (flow_dv_convert_action_mark(dev, mark,
12968                                                                 mhdr_res,
12969                                                                 error))
12970                                         return -rte_errno;
12971                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12972                                 break;
12973                         }
12974                         /* Fall-through */
12975                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12976                         /* Legacy (non-extensive) MARK action. */
12977                         tag_be = mlx5_flow_mark_set
12978                               (((const struct rte_flow_action_mark *)
12979                                (actions->conf))->id);
12980                         MLX5_ASSERT(!handle->dvh.rix_tag);
12981                         if (flow_dv_tag_resource_register(dev, tag_be,
12982                                                           dev_flow, error))
12983                                 return -rte_errno;
12984                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12985                         dev_flow->dv.actions[actions_n++] =
12986                                         dev_flow->dv.tag_resource->action;
12987                         break;
12988                 case RTE_FLOW_ACTION_TYPE_SET_META:
12989                         if (flow_dv_convert_action_set_meta
12990                                 (dev, mhdr_res, attr,
12991                                  (const struct rte_flow_action_set_meta *)
12992                                   actions->conf, error))
12993                                 return -rte_errno;
12994                         action_flags |= MLX5_FLOW_ACTION_SET_META;
12995                         break;
12996                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12997                         if (flow_dv_convert_action_set_tag
12998                                 (dev, mhdr_res,
12999                                  (const struct rte_flow_action_set_tag *)
13000                                   actions->conf, error))
13001                                 return -rte_errno;
13002                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13003                         break;
13004                 case RTE_FLOW_ACTION_TYPE_DROP:
13005                         action_flags |= MLX5_FLOW_ACTION_DROP;
13006                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
13007                         break;
13008                 case RTE_FLOW_ACTION_TYPE_QUEUE:
13009                         queue = actions->conf;
13010                         rss_desc->queue_num = 1;
13011                         rss_desc->queue[0] = queue->index;
13012                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
13013                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
13014                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
13015                         num_of_dest++;
13016                         break;
13017                 case RTE_FLOW_ACTION_TYPE_RSS:
13018                         rss = actions->conf;
13019                         memcpy(rss_desc->queue, rss->queue,
13020                                rss->queue_num * sizeof(uint16_t));
13021                         rss_desc->queue_num = rss->queue_num;
13022                         /* NULL RSS key indicates default RSS key. */
13023                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
13024                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
13025                         /*
13026                          * rss->level and rss.types should be set in advance
13027                          * when expanding items for RSS.
13028                          */
13029                         action_flags |= MLX5_FLOW_ACTION_RSS;
13030                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
13031                                 MLX5_FLOW_FATE_SHARED_RSS :
13032                                 MLX5_FLOW_FATE_QUEUE;
13033                         break;
13034                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
13035                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13036                         age_act = flow_aso_age_get_by_idx(dev, owner_idx);
13037                         if (flow->age == 0) {
13038                                 flow->age = owner_idx;
13039                                 __atomic_fetch_add(&age_act->refcnt, 1,
13040                                                    __ATOMIC_RELAXED);
13041                         }
13042                         age_act_pos = actions_n++;
13043                         action_flags |= MLX5_FLOW_ACTION_AGE;
13044                         break;
13045                 case RTE_FLOW_ACTION_TYPE_AGE:
13046                         non_shared_age = action->conf;
13047                         age_act_pos = actions_n++;
13048                         action_flags |= MLX5_FLOW_ACTION_AGE;
13049                         break;
13050                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
13051                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13052                         cnt_act = flow_dv_counter_get_by_idx(dev, owner_idx,
13053                                                              NULL);
13054                         MLX5_ASSERT(cnt_act != NULL);
13055                         /**
13056                          * When creating meter drop flow in drop table, the
13057                          * counter should not overwrite the rte flow counter.
13058                          */
13059                         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13060                             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP) {
13061                                 dev_flow->dv.actions[actions_n++] =
13062                                                         cnt_act->action;
13063                         } else {
13064                                 if (flow->counter == 0) {
13065                                         flow->counter = owner_idx;
13066                                         __atomic_fetch_add
13067                                                 (&cnt_act->shared_info.refcnt,
13068                                                  1, __ATOMIC_RELAXED);
13069                                 }
13070                                 /* Save information first, will apply later. */
13071                                 action_flags |= MLX5_FLOW_ACTION_COUNT;
13072                         }
13073                         break;
13074                 case RTE_FLOW_ACTION_TYPE_COUNT:
13075                         if (!priv->sh->cdev->config.devx) {
13076                                 return rte_flow_error_set
13077                                               (error, ENOTSUP,
13078                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13079                                                NULL,
13080                                                "count action not supported");
13081                         }
13082                         /* Save information first, will apply later. */
13083                         count = action->conf;
13084                         action_flags |= MLX5_FLOW_ACTION_COUNT;
13085                         break;
13086                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
13087                         dev_flow->dv.actions[actions_n++] =
13088                                                 priv->sh->pop_vlan_action;
13089                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
13090                         break;
13091                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
13092                         if (!(action_flags &
13093                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
13094                                 flow_dev_get_vlan_info_from_items(items, &vlan);
13095                         vlan.eth_proto = rte_be_to_cpu_16
13096                              ((((const struct rte_flow_action_of_push_vlan *)
13097                                                    actions->conf)->ethertype));
13098                         found_action = mlx5_flow_find_action
13099                                         (actions + 1,
13100                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
13101                         if (found_action)
13102                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
13103                         found_action = mlx5_flow_find_action
13104                                         (actions + 1,
13105                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
13106                         if (found_action)
13107                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
13108                         if (flow_dv_create_action_push_vlan
13109                                             (dev, attr, &vlan, dev_flow, error))
13110                                 return -rte_errno;
13111                         dev_flow->dv.actions[actions_n++] =
13112                                         dev_flow->dv.push_vlan_res->action;
13113                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
13114                         break;
13115                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
13116                         /* of_vlan_push action handled this action */
13117                         MLX5_ASSERT(action_flags &
13118                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
13119                         break;
13120                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
13121                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
13122                                 break;
13123                         flow_dev_get_vlan_info_from_items(items, &vlan);
13124                         mlx5_update_vlan_vid_pcp(actions, &vlan);
13125                         /* If no VLAN push - this is a modify header action */
13126                         if (flow_dv_convert_action_modify_vlan_vid
13127                                                 (mhdr_res, actions, error))
13128                                 return -rte_errno;
13129                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
13130                         break;
13131                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
13132                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
13133                         if (flow_dv_create_action_l2_encap(dev, actions,
13134                                                            dev_flow,
13135                                                            attr->transfer,
13136                                                            error))
13137                                 return -rte_errno;
13138                         dev_flow->dv.actions[actions_n++] =
13139                                         dev_flow->dv.encap_decap->action;
13140                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
13141                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13142                                 sample_act->action_flags |=
13143                                                         MLX5_FLOW_ACTION_ENCAP;
13144                         break;
13145                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
13146                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
13147                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
13148                                                            attr->transfer,
13149                                                            error))
13150                                 return -rte_errno;
13151                         dev_flow->dv.actions[actions_n++] =
13152                                         dev_flow->dv.encap_decap->action;
13153                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13154                         break;
13155                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
13156                         /* Handle encap with preceding decap. */
13157                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
13158                                 if (flow_dv_create_action_raw_encap
13159                                         (dev, actions, dev_flow, attr, error))
13160                                         return -rte_errno;
13161                                 dev_flow->dv.actions[actions_n++] =
13162                                         dev_flow->dv.encap_decap->action;
13163                         } else {
13164                                 /* Handle encap without preceding decap. */
13165                                 if (flow_dv_create_action_l2_encap
13166                                     (dev, actions, dev_flow, attr->transfer,
13167                                      error))
13168                                         return -rte_errno;
13169                                 dev_flow->dv.actions[actions_n++] =
13170                                         dev_flow->dv.encap_decap->action;
13171                         }
13172                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
13173                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13174                                 sample_act->action_flags |=
13175                                                         MLX5_FLOW_ACTION_ENCAP;
13176                         break;
13177                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
13178                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
13179                                 ;
13180                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
13181                                 if (flow_dv_create_action_l2_decap
13182                                     (dev, dev_flow, attr->transfer, error))
13183                                         return -rte_errno;
13184                                 dev_flow->dv.actions[actions_n++] =
13185                                         dev_flow->dv.encap_decap->action;
13186                         }
13187                         /* If decap is followed by encap, handle it at encap. */
13188                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13189                         break;
13190                 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
13191                         dev_flow->dv.actions[actions_n++] =
13192                                 (void *)(uintptr_t)action->conf;
13193                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13194                         break;
13195                 case RTE_FLOW_ACTION_TYPE_JUMP:
13196                         jump_group = ((const struct rte_flow_action_jump *)
13197                                                         action->conf)->group;
13198                         grp_info.std_tbl_fix = 0;
13199                         if (dev_flow->skip_scale &
13200                                 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
13201                                 grp_info.skip_scale = 1;
13202                         else
13203                                 grp_info.skip_scale = 0;
13204                         ret = mlx5_flow_group_to_table(dev, tunnel,
13205                                                        jump_group,
13206                                                        &table,
13207                                                        &grp_info, error);
13208                         if (ret)
13209                                 return ret;
13210                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
13211                                                        attr->transfer,
13212                                                        !!dev_flow->external,
13213                                                        tunnel, jump_group, 0,
13214                                                        0, error);
13215                         if (!tbl)
13216                                 return rte_flow_error_set
13217                                                 (error, errno,
13218                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13219                                                  NULL,
13220                                                  "cannot create jump action.");
13221                         if (flow_dv_jump_tbl_resource_register
13222                             (dev, tbl, dev_flow, error)) {
13223                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
13224                                 return rte_flow_error_set
13225                                                 (error, errno,
13226                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13227                                                  NULL,
13228                                                  "cannot create jump action.");
13229                         }
13230                         dev_flow->dv.actions[actions_n++] =
13231                                         dev_flow->dv.jump->action;
13232                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13233                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
13234                         sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
13235                         num_of_dest++;
13236                         break;
13237                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
13238                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
13239                         if (flow_dv_convert_action_modify_mac
13240                                         (mhdr_res, actions, error))
13241                                 return -rte_errno;
13242                         action_flags |= actions->type ==
13243                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
13244                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
13245                                         MLX5_FLOW_ACTION_SET_MAC_DST;
13246                         break;
13247                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
13248                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
13249                         if (flow_dv_convert_action_modify_ipv4
13250                                         (mhdr_res, actions, error))
13251                                 return -rte_errno;
13252                         action_flags |= actions->type ==
13253                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
13254                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
13255                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
13256                         break;
13257                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
13258                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
13259                         if (flow_dv_convert_action_modify_ipv6
13260                                         (mhdr_res, actions, error))
13261                                 return -rte_errno;
13262                         action_flags |= actions->type ==
13263                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13264                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
13265                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
13266                         break;
13267                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13268                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13269                         if (flow_dv_convert_action_modify_tp
13270                                         (mhdr_res, actions, items,
13271                                          &flow_attr, dev_flow, !!(action_flags &
13272                                          MLX5_FLOW_ACTION_DECAP), error))
13273                                 return -rte_errno;
13274                         action_flags |= actions->type ==
13275                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13276                                         MLX5_FLOW_ACTION_SET_TP_SRC :
13277                                         MLX5_FLOW_ACTION_SET_TP_DST;
13278                         break;
13279                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13280                         if (flow_dv_convert_action_modify_dec_ttl
13281                                         (mhdr_res, items, &flow_attr, dev_flow,
13282                                          !!(action_flags &
13283                                          MLX5_FLOW_ACTION_DECAP), error))
13284                                 return -rte_errno;
13285                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13286                         break;
13287                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13288                         if (flow_dv_convert_action_modify_ttl
13289                                         (mhdr_res, actions, items, &flow_attr,
13290                                          dev_flow, !!(action_flags &
13291                                          MLX5_FLOW_ACTION_DECAP), error))
13292                                 return -rte_errno;
13293                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13294                         break;
13295                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13296                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13297                         if (flow_dv_convert_action_modify_tcp_seq
13298                                         (mhdr_res, actions, error))
13299                                 return -rte_errno;
13300                         action_flags |= actions->type ==
13301                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13302                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
13303                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13304                         break;
13305
13306                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13307                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13308                         if (flow_dv_convert_action_modify_tcp_ack
13309                                         (mhdr_res, actions, error))
13310                                 return -rte_errno;
13311                         action_flags |= actions->type ==
13312                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13313                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
13314                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
13315                         break;
13316                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13317                         if (flow_dv_convert_action_set_reg
13318                                         (mhdr_res, actions, error))
13319                                 return -rte_errno;
13320                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13321                         break;
13322                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13323                         if (flow_dv_convert_action_copy_mreg
13324                                         (dev, mhdr_res, actions, error))
13325                                 return -rte_errno;
13326                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13327                         break;
13328                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13329                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13330                         dev_flow->handle->fate_action =
13331                                         MLX5_FLOW_FATE_DEFAULT_MISS;
13332                         break;
13333                 case RTE_FLOW_ACTION_TYPE_METER:
13334                         if (!wks->fm)
13335                                 return rte_flow_error_set(error, rte_errno,
13336                                         RTE_FLOW_ERROR_TYPE_ACTION,
13337                                         NULL, "Failed to get meter in flow.");
13338                         /* Set the meter action. */
13339                         dev_flow->dv.actions[actions_n++] =
13340                                 wks->fm->meter_action;
13341                         action_flags |= MLX5_FLOW_ACTION_METER;
13342                         break;
13343                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13344                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13345                                                               actions, error))
13346                                 return -rte_errno;
13347                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13348                         break;
13349                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13350                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13351                                                               actions, error))
13352                                 return -rte_errno;
13353                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13354                         break;
13355                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13356                         sample_act_pos = actions_n;
13357                         sample = (const struct rte_flow_action_sample *)
13358                                  action->conf;
13359                         actions_n++;
13360                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13361                         /* put encap action into group if work with port id */
13362                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13363                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13364                                 sample_act->action_flags |=
13365                                                         MLX5_FLOW_ACTION_ENCAP;
13366                         break;
13367                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13368                         if (flow_dv_convert_action_modify_field
13369                                         (dev, mhdr_res, actions, attr, error))
13370                                 return -rte_errno;
13371                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13372                         break;
13373                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13374                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13375                         ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13376                         if (!ct)
13377                                 return rte_flow_error_set(error, EINVAL,
13378                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13379                                                 NULL,
13380                                                 "Failed to get CT object.");
13381                         if (mlx5_aso_ct_available(priv->sh, ct))
13382                                 return rte_flow_error_set(error, rte_errno,
13383                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13384                                                 NULL,
13385                                                 "CT is unavailable.");
13386                         if (ct->is_original)
13387                                 dev_flow->dv.actions[actions_n] =
13388                                                         ct->dr_action_orig;
13389                         else
13390                                 dev_flow->dv.actions[actions_n] =
13391                                                         ct->dr_action_rply;
13392                         if (flow->ct == 0) {
13393                                 flow->indirect_type =
13394                                                 MLX5_INDIRECT_ACTION_TYPE_CT;
13395                                 flow->ct = owner_idx;
13396                                 __atomic_fetch_add(&ct->refcnt, 1,
13397                                                    __ATOMIC_RELAXED);
13398                         }
13399                         actions_n++;
13400                         action_flags |= MLX5_FLOW_ACTION_CT;
13401                         break;
13402                 case RTE_FLOW_ACTION_TYPE_END:
13403                         actions_end = true;
13404                         if (mhdr_res->actions_num) {
13405                                 /* create modify action if needed. */
13406                                 if (flow_dv_modify_hdr_resource_register
13407                                         (dev, mhdr_res, dev_flow, error))
13408                                         return -rte_errno;
13409                                 dev_flow->dv.actions[modify_action_position] =
13410                                         handle->dvh.modify_hdr->action;
13411                         }
13412                         /*
13413                          * Handle AGE and COUNT action by single HW counter
13414                          * when they are not shared.
13415                          */
13416                         if (action_flags & MLX5_FLOW_ACTION_AGE) {
13417                                 if ((non_shared_age && count) ||
13418                                     !(priv->sh->flow_hit_aso_en &&
13419                                       (attr->group || attr->transfer))) {
13420                                         /* Creates age by counters. */
13421                                         cnt_act = flow_dv_prepare_counter
13422                                                                 (dev, dev_flow,
13423                                                                  flow, count,
13424                                                                  non_shared_age,
13425                                                                  error);
13426                                         if (!cnt_act)
13427                                                 return -rte_errno;
13428                                         dev_flow->dv.actions[age_act_pos] =
13429                                                                 cnt_act->action;
13430                                         break;
13431                                 }
13432                                 if (!flow->age && non_shared_age) {
13433                                         flow->age = flow_dv_aso_age_alloc
13434                                                                 (dev, error);
13435                                         if (!flow->age)
13436                                                 return -rte_errno;
13437                                         flow_dv_aso_age_params_init
13438                                                     (dev, flow->age,
13439                                                      non_shared_age->context ?
13440                                                      non_shared_age->context :
13441                                                      (void *)(uintptr_t)
13442                                                      (dev_flow->flow_idx),
13443                                                      non_shared_age->timeout);
13444                                 }
13445                                 age_act = flow_aso_age_get_by_idx(dev,
13446                                                                   flow->age);
13447                                 dev_flow->dv.actions[age_act_pos] =
13448                                                              age_act->dr_action;
13449                         }
13450                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13451                                 /*
13452                                  * Create one count action, to be used
13453                                  * by all sub-flows.
13454                                  */
13455                                 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13456                                                                   flow, count,
13457                                                                   NULL, error);
13458                                 if (!cnt_act)
13459                                         return -rte_errno;
13460                                 dev_flow->dv.actions[actions_n++] =
13461                                                                 cnt_act->action;
13462                         }
13463                 default:
13464                         break;
13465                 }
13466                 if (mhdr_res->actions_num &&
13467                     modify_action_position == UINT32_MAX)
13468                         modify_action_position = actions_n++;
13469         }
13470         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13471                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13472                 int item_type = items->type;
13473
13474                 if (!mlx5_flow_os_item_supported(item_type))
13475                         return rte_flow_error_set(error, ENOTSUP,
13476                                                   RTE_FLOW_ERROR_TYPE_ITEM,
13477                                                   NULL, "item not supported");
13478                 switch (item_type) {
13479                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13480                         flow_dv_translate_item_port_id
13481                                 (dev, match_mask, match_value, items, attr);
13482                         last_item = MLX5_FLOW_ITEM_PORT_ID;
13483                         break;
13484                 case RTE_FLOW_ITEM_TYPE_ETH:
13485                         flow_dv_translate_item_eth(match_mask, match_value,
13486                                                    items, tunnel,
13487                                                    dev_flow->dv.group);
13488                         matcher.priority = action_flags &
13489                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
13490                                         !dev_flow->external ?
13491                                         MLX5_PRIORITY_MAP_L3 :
13492                                         MLX5_PRIORITY_MAP_L2;
13493                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13494                                              MLX5_FLOW_LAYER_OUTER_L2;
13495                         break;
13496                 case RTE_FLOW_ITEM_TYPE_VLAN:
13497                         flow_dv_translate_item_vlan(dev_flow,
13498                                                     match_mask, match_value,
13499                                                     items, tunnel,
13500                                                     dev_flow->dv.group);
13501                         matcher.priority = MLX5_PRIORITY_MAP_L2;
13502                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13503                                               MLX5_FLOW_LAYER_INNER_VLAN) :
13504                                              (MLX5_FLOW_LAYER_OUTER_L2 |
13505                                               MLX5_FLOW_LAYER_OUTER_VLAN);
13506                         break;
13507                 case RTE_FLOW_ITEM_TYPE_IPV4:
13508                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13509                                                   &item_flags, &tunnel);
13510                         flow_dv_translate_item_ipv4(match_mask, match_value,
13511                                                     items, tunnel,
13512                                                     dev_flow->dv.group);
13513                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13514                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13515                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13516                         if (items->mask != NULL &&
13517                             ((const struct rte_flow_item_ipv4 *)
13518                              items->mask)->hdr.next_proto_id) {
13519                                 next_protocol =
13520                                         ((const struct rte_flow_item_ipv4 *)
13521                                          (items->spec))->hdr.next_proto_id;
13522                                 next_protocol &=
13523                                         ((const struct rte_flow_item_ipv4 *)
13524                                          (items->mask))->hdr.next_proto_id;
13525                         } else {
13526                                 /* Reset for inner layer. */
13527                                 next_protocol = 0xff;
13528                         }
13529                         break;
13530                 case RTE_FLOW_ITEM_TYPE_IPV6:
13531                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13532                                                   &item_flags, &tunnel);
13533                         flow_dv_translate_item_ipv6(match_mask, match_value,
13534                                                     items, tunnel,
13535                                                     dev_flow->dv.group);
13536                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13537                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13538                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13539                         if (items->mask != NULL &&
13540                             ((const struct rte_flow_item_ipv6 *)
13541                              items->mask)->hdr.proto) {
13542                                 next_protocol =
13543                                         ((const struct rte_flow_item_ipv6 *)
13544                                          items->spec)->hdr.proto;
13545                                 next_protocol &=
13546                                         ((const struct rte_flow_item_ipv6 *)
13547                                          items->mask)->hdr.proto;
13548                         } else {
13549                                 /* Reset for inner layer. */
13550                                 next_protocol = 0xff;
13551                         }
13552                         break;
13553                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13554                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
13555                                                              match_value,
13556                                                              items, tunnel);
13557                         last_item = tunnel ?
13558                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13559                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13560                         if (items->mask != NULL &&
13561                             ((const struct rte_flow_item_ipv6_frag_ext *)
13562                              items->mask)->hdr.next_header) {
13563                                 next_protocol =
13564                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13565                                  items->spec)->hdr.next_header;
13566                                 next_protocol &=
13567                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13568                                  items->mask)->hdr.next_header;
13569                         } else {
13570                                 /* Reset for inner layer. */
13571                                 next_protocol = 0xff;
13572                         }
13573                         break;
13574                 case RTE_FLOW_ITEM_TYPE_TCP:
13575                         flow_dv_translate_item_tcp(match_mask, match_value,
13576                                                    items, tunnel);
13577                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13578                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13579                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
13580                         break;
13581                 case RTE_FLOW_ITEM_TYPE_UDP:
13582                         flow_dv_translate_item_udp(match_mask, match_value,
13583                                                    items, tunnel);
13584                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13585                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13586                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
13587                         break;
13588                 case RTE_FLOW_ITEM_TYPE_GRE:
13589                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13590                         last_item = MLX5_FLOW_LAYER_GRE;
13591                         tunnel_item = items;
13592                         gre_item = items;
13593                         break;
13594                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13595                         flow_dv_translate_item_gre_key(match_mask,
13596                                                        match_value, items);
13597                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
13598                         break;
13599                 case RTE_FLOW_ITEM_TYPE_GRE_OPTION:
13600                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13601                         last_item = MLX5_FLOW_LAYER_GRE;
13602                         tunnel_item = items;
13603                         break;
13604                 case RTE_FLOW_ITEM_TYPE_NVGRE:
13605                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13606                         last_item = MLX5_FLOW_LAYER_GRE;
13607                         tunnel_item = items;
13608                         break;
13609                 case RTE_FLOW_ITEM_TYPE_VXLAN:
13610                         flow_dv_translate_item_vxlan(dev, attr,
13611                                                      match_mask, match_value,
13612                                                      items, tunnel);
13613                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13614                         last_item = MLX5_FLOW_LAYER_VXLAN;
13615                         break;
13616                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13617                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13618                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13619                         tunnel_item = items;
13620                         break;
13621                 case RTE_FLOW_ITEM_TYPE_GENEVE:
13622                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13623                         last_item = MLX5_FLOW_LAYER_GENEVE;
13624                         tunnel_item = items;
13625                         break;
13626                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13627                         ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13628                                                           match_value,
13629                                                           items, error);
13630                         if (ret)
13631                                 return rte_flow_error_set(error, -ret,
13632                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13633                                         "cannot create GENEVE TLV option");
13634                         flow->geneve_tlv_option = 1;
13635                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13636                         break;
13637                 case RTE_FLOW_ITEM_TYPE_MPLS:
13638                         flow_dv_translate_item_mpls(match_mask, match_value,
13639                                                     items, last_item, tunnel);
13640                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13641                         last_item = MLX5_FLOW_LAYER_MPLS;
13642                         break;
13643                 case RTE_FLOW_ITEM_TYPE_MARK:
13644                         flow_dv_translate_item_mark(dev, match_mask,
13645                                                     match_value, items);
13646                         last_item = MLX5_FLOW_ITEM_MARK;
13647                         break;
13648                 case RTE_FLOW_ITEM_TYPE_META:
13649                         flow_dv_translate_item_meta(dev, match_mask,
13650                                                     match_value, attr, items);
13651                         last_item = MLX5_FLOW_ITEM_METADATA;
13652                         break;
13653                 case RTE_FLOW_ITEM_TYPE_ICMP:
13654                         flow_dv_translate_item_icmp(match_mask, match_value,
13655                                                     items, tunnel);
13656                         last_item = MLX5_FLOW_LAYER_ICMP;
13657                         break;
13658                 case RTE_FLOW_ITEM_TYPE_ICMP6:
13659                         flow_dv_translate_item_icmp6(match_mask, match_value,
13660                                                       items, tunnel);
13661                         last_item = MLX5_FLOW_LAYER_ICMP6;
13662                         break;
13663                 case RTE_FLOW_ITEM_TYPE_TAG:
13664                         flow_dv_translate_item_tag(dev, match_mask,
13665                                                    match_value, items);
13666                         last_item = MLX5_FLOW_ITEM_TAG;
13667                         break;
13668                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13669                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
13670                                                         match_value, items);
13671                         last_item = MLX5_FLOW_ITEM_TAG;
13672                         break;
13673                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13674                         flow_dv_translate_item_tx_queue(dev, match_mask,
13675                                                         match_value,
13676                                                         items);
13677                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13678                         break;
13679                 case RTE_FLOW_ITEM_TYPE_GTP:
13680                         flow_dv_translate_item_gtp(match_mask, match_value,
13681                                                    items, tunnel);
13682                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13683                         last_item = MLX5_FLOW_LAYER_GTP;
13684                         break;
13685                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13686                         ret = flow_dv_translate_item_gtp_psc(match_mask,
13687                                                           match_value,
13688                                                           items);
13689                         if (ret)
13690                                 return rte_flow_error_set(error, -ret,
13691                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13692                                         "cannot create GTP PSC item");
13693                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
13694                         break;
13695                 case RTE_FLOW_ITEM_TYPE_ECPRI:
13696                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
13697                                 /* Create it only the first time to be used. */
13698                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
13699                                 if (ret)
13700                                         return rte_flow_error_set
13701                                                 (error, -ret,
13702                                                 RTE_FLOW_ERROR_TYPE_ITEM,
13703                                                 NULL,
13704                                                 "cannot create eCPRI parser");
13705                         }
13706                         flow_dv_translate_item_ecpri(dev, match_mask,
13707                                                      match_value, items,
13708                                                      last_item);
13709                         /* No other protocol should follow eCPRI layer. */
13710                         last_item = MLX5_FLOW_LAYER_ECPRI;
13711                         break;
13712                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13713                         flow_dv_translate_item_integrity(items, integrity_items,
13714                                                          &last_item);
13715                         break;
13716                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13717                         flow_dv_translate_item_aso_ct(dev, match_mask,
13718                                                       match_value, items);
13719                         break;
13720                 case RTE_FLOW_ITEM_TYPE_FLEX:
13721                         flow_dv_translate_item_flex(dev, match_mask,
13722                                                     match_value, items,
13723                                                     dev_flow, tunnel != 0);
13724                         last_item = tunnel ? MLX5_FLOW_ITEM_INNER_FLEX :
13725                                     MLX5_FLOW_ITEM_OUTER_FLEX;
13726                         break;
13727                 default:
13728                         break;
13729                 }
13730                 item_flags |= last_item;
13731         }
13732         /*
13733          * When E-Switch mode is enabled, we have two cases where we need to
13734          * set the source port manually.
13735          * The first one, is in case of Nic steering rule, and the second is
13736          * E-Switch rule where no port_id item was found. In both cases
13737          * the source port is set according the current port in use.
13738          */
13739         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) && priv->sh->esw_mode) {
13740                 if (flow_dv_translate_item_port_id(dev, match_mask,
13741                                                    match_value, NULL, attr))
13742                         return -rte_errno;
13743         }
13744         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
13745                 flow_dv_translate_item_integrity_post(match_mask, match_value,
13746                                                       integrity_items,
13747                                                       item_flags);
13748         }
13749         if (item_flags & MLX5_FLOW_LAYER_VXLAN_GPE)
13750                 flow_dv_translate_item_vxlan_gpe(match_mask, match_value,
13751                                                  tunnel_item, item_flags);
13752         else if (item_flags & MLX5_FLOW_LAYER_GENEVE)
13753                 flow_dv_translate_item_geneve(match_mask, match_value,
13754                                               tunnel_item, item_flags);
13755         else if (item_flags & MLX5_FLOW_LAYER_GRE) {
13756                 if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_GRE)
13757                         flow_dv_translate_item_gre(match_mask, match_value,
13758                                                    tunnel_item, item_flags);
13759                 else if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_NVGRE)
13760                         flow_dv_translate_item_nvgre(match_mask, match_value,
13761                                                      tunnel_item, item_flags);
13762                 else if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_GRE_OPTION)
13763                         flow_dv_translate_item_gre_option(match_mask, match_value,
13764                                         tunnel_item, gre_item, item_flags);
13765                 else
13766                         MLX5_ASSERT(false);
13767         }
13768 #ifdef RTE_LIBRTE_MLX5_DEBUG
13769         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13770                                               dev_flow->dv.value.buf));
13771 #endif
13772         /*
13773          * Layers may be already initialized from prefix flow if this dev_flow
13774          * is the suffix flow.
13775          */
13776         handle->layers |= item_flags;
13777         if (action_flags & MLX5_FLOW_ACTION_RSS)
13778                 flow_dv_hashfields_set(dev_flow->handle->layers,
13779                                        rss_desc,
13780                                        &dev_flow->hash_fields);
13781         /* If has RSS action in the sample action, the Sample/Mirror resource
13782          * should be registered after the hash filed be update.
13783          */
13784         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13785                 ret = flow_dv_translate_action_sample(dev,
13786                                                       sample,
13787                                                       dev_flow, attr,
13788                                                       &num_of_dest,
13789                                                       sample_actions,
13790                                                       &sample_res,
13791                                                       error);
13792                 if (ret < 0)
13793                         return ret;
13794                 ret = flow_dv_create_action_sample(dev,
13795                                                    dev_flow,
13796                                                    num_of_dest,
13797                                                    &sample_res,
13798                                                    &mdest_res,
13799                                                    sample_actions,
13800                                                    action_flags,
13801                                                    error);
13802                 if (ret < 0)
13803                         return rte_flow_error_set
13804                                                 (error, rte_errno,
13805                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13806                                                 NULL,
13807                                                 "cannot create sample action");
13808                 if (num_of_dest > 1) {
13809                         dev_flow->dv.actions[sample_act_pos] =
13810                         dev_flow->dv.dest_array_res->action;
13811                 } else {
13812                         dev_flow->dv.actions[sample_act_pos] =
13813                         dev_flow->dv.sample_res->verbs_action;
13814                 }
13815         }
13816         /*
13817          * For multiple destination (sample action with ratio=1), the encap
13818          * action and port id action will be combined into group action.
13819          * So need remove the original these actions in the flow and only
13820          * use the sample action instead of.
13821          */
13822         if (num_of_dest > 1 &&
13823             (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13824                 int i;
13825                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13826
13827                 for (i = 0; i < actions_n; i++) {
13828                         if ((sample_act->dr_encap_action &&
13829                                 sample_act->dr_encap_action ==
13830                                 dev_flow->dv.actions[i]) ||
13831                                 (sample_act->dr_port_id_action &&
13832                                 sample_act->dr_port_id_action ==
13833                                 dev_flow->dv.actions[i]) ||
13834                                 (sample_act->dr_jump_action &&
13835                                 sample_act->dr_jump_action ==
13836                                 dev_flow->dv.actions[i]))
13837                                 continue;
13838                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13839                 }
13840                 memcpy((void *)dev_flow->dv.actions,
13841                                 (void *)temp_actions,
13842                                 tmp_actions_n * sizeof(void *));
13843                 actions_n = tmp_actions_n;
13844         }
13845         dev_flow->dv.actions_n = actions_n;
13846         dev_flow->act_flags = action_flags;
13847         if (wks->skip_matcher_reg)
13848                 return 0;
13849         /* Register matcher. */
13850         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13851                                     matcher.mask.size);
13852         matcher.priority = mlx5_get_matcher_priority(dev, attr,
13853                                                      matcher.priority,
13854                                                      dev_flow->external);
13855         /**
13856          * When creating meter drop flow in drop table, using original
13857          * 5-tuple match, the matcher priority should be lower than
13858          * mtr_id matcher.
13859          */
13860         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13861             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13862             matcher.priority <= MLX5_REG_BITS)
13863                 matcher.priority += MLX5_REG_BITS;
13864         /* reserved field no needs to be set to 0 here. */
13865         tbl_key.is_fdb = attr->transfer;
13866         tbl_key.is_egress = attr->egress;
13867         tbl_key.level = dev_flow->dv.group;
13868         tbl_key.id = dev_flow->dv.table_id;
13869         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13870                                      tunnel, attr->group, error))
13871                 return -rte_errno;
13872         return 0;
13873 }
13874
13875 /**
13876  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13877  * and tunnel.
13878  *
13879  * @param[in, out] action
13880  *   Shred RSS action holding hash RX queue objects.
13881  * @param[in] hash_fields
13882  *   Defines combination of packet fields to participate in RX hash.
13883  * @param[in] tunnel
13884  *   Tunnel type
13885  * @param[in] hrxq_idx
13886  *   Hash RX queue index to set.
13887  *
13888  * @return
13889  *   0 on success, otherwise negative errno value.
13890  */
13891 static int
13892 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13893                               const uint64_t hash_fields,
13894                               uint32_t hrxq_idx)
13895 {
13896         uint32_t *hrxqs = action->hrxq;
13897
13898         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13899         case MLX5_RSS_HASH_IPV4:
13900                 /* fall-through. */
13901         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13902                 /* fall-through. */
13903         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13904                 hrxqs[0] = hrxq_idx;
13905                 return 0;
13906         case MLX5_RSS_HASH_IPV4_TCP:
13907                 /* fall-through. */
13908         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13909                 /* fall-through. */
13910         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13911                 hrxqs[1] = hrxq_idx;
13912                 return 0;
13913         case MLX5_RSS_HASH_IPV4_UDP:
13914                 /* fall-through. */
13915         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13916                 /* fall-through. */
13917         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13918                 hrxqs[2] = hrxq_idx;
13919                 return 0;
13920         case MLX5_RSS_HASH_IPV6:
13921                 /* fall-through. */
13922         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13923                 /* fall-through. */
13924         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13925                 hrxqs[3] = hrxq_idx;
13926                 return 0;
13927         case MLX5_RSS_HASH_IPV6_TCP:
13928                 /* fall-through. */
13929         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13930                 /* fall-through. */
13931         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13932                 hrxqs[4] = hrxq_idx;
13933                 return 0;
13934         case MLX5_RSS_HASH_IPV6_UDP:
13935                 /* fall-through. */
13936         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13937                 /* fall-through. */
13938         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13939                 hrxqs[5] = hrxq_idx;
13940                 return 0;
13941         case MLX5_RSS_HASH_NONE:
13942                 hrxqs[6] = hrxq_idx;
13943                 return 0;
13944         default:
13945                 return -1;
13946         }
13947 }
13948
13949 /**
13950  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13951  * and tunnel.
13952  *
13953  * @param[in] dev
13954  *   Pointer to the Ethernet device structure.
13955  * @param[in] idx
13956  *   Shared RSS action ID holding hash RX queue objects.
13957  * @param[in] hash_fields
13958  *   Defines combination of packet fields to participate in RX hash.
13959  * @param[in] tunnel
13960  *   Tunnel type
13961  *
13962  * @return
13963  *   Valid hash RX queue index, otherwise 0.
13964  */
13965 uint32_t
13966 flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13967                                const uint64_t hash_fields)
13968 {
13969         struct mlx5_priv *priv = dev->data->dev_private;
13970         struct mlx5_shared_action_rss *shared_rss =
13971             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13972         const uint32_t *hrxqs = shared_rss->hrxq;
13973
13974         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13975         case MLX5_RSS_HASH_IPV4:
13976                 /* fall-through. */
13977         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13978                 /* fall-through. */
13979         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13980                 return hrxqs[0];
13981         case MLX5_RSS_HASH_IPV4_TCP:
13982                 /* fall-through. */
13983         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13984                 /* fall-through. */
13985         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13986                 return hrxqs[1];
13987         case MLX5_RSS_HASH_IPV4_UDP:
13988                 /* fall-through. */
13989         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13990                 /* fall-through. */
13991         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13992                 return hrxqs[2];
13993         case MLX5_RSS_HASH_IPV6:
13994                 /* fall-through. */
13995         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13996                 /* fall-through. */
13997         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13998                 return hrxqs[3];
13999         case MLX5_RSS_HASH_IPV6_TCP:
14000                 /* fall-through. */
14001         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
14002                 /* fall-through. */
14003         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
14004                 return hrxqs[4];
14005         case MLX5_RSS_HASH_IPV6_UDP:
14006                 /* fall-through. */
14007         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
14008                 /* fall-through. */
14009         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
14010                 return hrxqs[5];
14011         case MLX5_RSS_HASH_NONE:
14012                 return hrxqs[6];
14013         default:
14014                 return 0;
14015         }
14016
14017 }
14018
14019 /**
14020  * Apply the flow to the NIC, lock free,
14021  * (mutex should be acquired by caller).
14022  *
14023  * @param[in] dev
14024  *   Pointer to the Ethernet device structure.
14025  * @param[in, out] flow
14026  *   Pointer to flow structure.
14027  * @param[out] error
14028  *   Pointer to error structure.
14029  *
14030  * @return
14031  *   0 on success, a negative errno value otherwise and rte_errno is set.
14032  */
14033 static int
14034 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
14035               struct rte_flow_error *error)
14036 {
14037         struct mlx5_flow_dv_workspace *dv;
14038         struct mlx5_flow_handle *dh;
14039         struct mlx5_flow_handle_dv *dv_h;
14040         struct mlx5_flow *dev_flow;
14041         struct mlx5_priv *priv = dev->data->dev_private;
14042         uint32_t handle_idx;
14043         int n;
14044         int err;
14045         int idx;
14046         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
14047         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
14048         uint8_t misc_mask;
14049
14050         MLX5_ASSERT(wks);
14051         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
14052                 dev_flow = &wks->flows[idx];
14053                 dv = &dev_flow->dv;
14054                 dh = dev_flow->handle;
14055                 dv_h = &dh->dvh;
14056                 n = dv->actions_n;
14057                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
14058                         if (dv->transfer) {
14059                                 MLX5_ASSERT(priv->sh->dr_drop_action);
14060                                 dv->actions[n++] = priv->sh->dr_drop_action;
14061                         } else {
14062 #ifdef HAVE_MLX5DV_DR
14063                                 /* DR supports drop action placeholder. */
14064                                 MLX5_ASSERT(priv->sh->dr_drop_action);
14065                                 dv->actions[n++] = dv->group ?
14066                                         priv->sh->dr_drop_action :
14067                                         priv->root_drop_action;
14068 #else
14069                                 /* For DV we use the explicit drop queue. */
14070                                 MLX5_ASSERT(priv->drop_queue.hrxq);
14071                                 dv->actions[n++] =
14072                                                 priv->drop_queue.hrxq->action;
14073 #endif
14074                         }
14075                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
14076                            !dv_h->rix_sample && !dv_h->rix_dest_array)) {
14077                         struct mlx5_hrxq *hrxq;
14078                         uint32_t hrxq_idx;
14079
14080                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
14081                                                     &hrxq_idx);
14082                         if (!hrxq) {
14083                                 rte_flow_error_set
14084                                         (error, rte_errno,
14085                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14086                                          "cannot get hash queue");
14087                                 goto error;
14088                         }
14089                         dh->rix_hrxq = hrxq_idx;
14090                         dv->actions[n++] = hrxq->action;
14091                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
14092                         struct mlx5_hrxq *hrxq = NULL;
14093                         uint32_t hrxq_idx;
14094
14095                         hrxq_idx = flow_dv_action_rss_hrxq_lookup(dev,
14096                                                 rss_desc->shared_rss,
14097                                                 dev_flow->hash_fields);
14098                         if (hrxq_idx)
14099                                 hrxq = mlx5_ipool_get
14100                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
14101                                          hrxq_idx);
14102                         if (!hrxq) {
14103                                 rte_flow_error_set
14104                                         (error, rte_errno,
14105                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14106                                          "cannot get hash queue");
14107                                 goto error;
14108                         }
14109                         dh->rix_srss = rss_desc->shared_rss;
14110                         dv->actions[n++] = hrxq->action;
14111                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
14112                         if (!priv->sh->default_miss_action) {
14113                                 rte_flow_error_set
14114                                         (error, rte_errno,
14115                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14116                                          "default miss action not be created.");
14117                                 goto error;
14118                         }
14119                         dv->actions[n++] = priv->sh->default_miss_action;
14120                 }
14121                 misc_mask = flow_dv_matcher_enable(dv->value.buf);
14122                 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
14123                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
14124                                                (void *)&dv->value, n,
14125                                                dv->actions, &dh->drv_flow);
14126                 if (err) {
14127                         rte_flow_error_set
14128                                 (error, errno,
14129                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14130                                 NULL,
14131                                 (!priv->sh->config.allow_duplicate_pattern &&
14132                                 errno == EEXIST) ?
14133                                 "duplicating pattern is not allowed" :
14134                                 "hardware refuses to create flow");
14135                         goto error;
14136                 }
14137                 if (priv->vmwa_context &&
14138                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
14139                         /*
14140                          * The rule contains the VLAN pattern.
14141                          * For VF we are going to create VLAN
14142                          * interface to make hypervisor set correct
14143                          * e-Switch vport context.
14144                          */
14145                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
14146                 }
14147         }
14148         return 0;
14149 error:
14150         err = rte_errno; /* Save rte_errno before cleanup. */
14151         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
14152                        handle_idx, dh, next) {
14153                 /* hrxq is union, don't clear it if the flag is not set. */
14154                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
14155                         mlx5_hrxq_release(dev, dh->rix_hrxq);
14156                         dh->rix_hrxq = 0;
14157                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
14158                         dh->rix_srss = 0;
14159                 }
14160                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14161                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14162         }
14163         rte_errno = err; /* Restore rte_errno. */
14164         return -rte_errno;
14165 }
14166
14167 void
14168 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
14169                           struct mlx5_list_entry *entry)
14170 {
14171         struct mlx5_flow_dv_matcher *resource = container_of(entry,
14172                                                              typeof(*resource),
14173                                                              entry);
14174
14175         claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
14176         mlx5_free(resource);
14177 }
14178
14179 /**
14180  * Release the flow matcher.
14181  *
14182  * @param dev
14183  *   Pointer to Ethernet device.
14184  * @param port_id
14185  *   Index to port ID action resource.
14186  *
14187  * @return
14188  *   1 while a reference on it exists, 0 when freed.
14189  */
14190 static int
14191 flow_dv_matcher_release(struct rte_eth_dev *dev,
14192                         struct mlx5_flow_handle *handle)
14193 {
14194         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
14195         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
14196                                                             typeof(*tbl), tbl);
14197         int ret;
14198
14199         MLX5_ASSERT(matcher->matcher_object);
14200         ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
14201         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
14202         return ret;
14203 }
14204
14205 void
14206 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14207 {
14208         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14209         struct mlx5_flow_dv_encap_decap_resource *res =
14210                                        container_of(entry, typeof(*res), entry);
14211
14212         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14213         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
14214 }
14215
14216 /**
14217  * Release an encap/decap resource.
14218  *
14219  * @param dev
14220  *   Pointer to Ethernet device.
14221  * @param encap_decap_idx
14222  *   Index of encap decap resource.
14223  *
14224  * @return
14225  *   1 while a reference on it exists, 0 when freed.
14226  */
14227 static int
14228 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
14229                                      uint32_t encap_decap_idx)
14230 {
14231         struct mlx5_priv *priv = dev->data->dev_private;
14232         struct mlx5_flow_dv_encap_decap_resource *resource;
14233
14234         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
14235                                   encap_decap_idx);
14236         if (!resource)
14237                 return 0;
14238         MLX5_ASSERT(resource->action);
14239         return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
14240 }
14241
14242 /**
14243  * Release an jump to table action resource.
14244  *
14245  * @param dev
14246  *   Pointer to Ethernet device.
14247  * @param rix_jump
14248  *   Index to the jump action resource.
14249  *
14250  * @return
14251  *   1 while a reference on it exists, 0 when freed.
14252  */
14253 static int
14254 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
14255                                   uint32_t rix_jump)
14256 {
14257         struct mlx5_priv *priv = dev->data->dev_private;
14258         struct mlx5_flow_tbl_data_entry *tbl_data;
14259
14260         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
14261                                   rix_jump);
14262         if (!tbl_data)
14263                 return 0;
14264         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
14265 }
14266
14267 void
14268 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14269 {
14270         struct mlx5_flow_dv_modify_hdr_resource *res =
14271                 container_of(entry, typeof(*res), entry);
14272         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14273
14274         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14275         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
14276 }
14277
14278 /**
14279  * Release a modify-header resource.
14280  *
14281  * @param dev
14282  *   Pointer to Ethernet device.
14283  * @param handle
14284  *   Pointer to mlx5_flow_handle.
14285  *
14286  * @return
14287  *   1 while a reference on it exists, 0 when freed.
14288  */
14289 static int
14290 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
14291                                     struct mlx5_flow_handle *handle)
14292 {
14293         struct mlx5_priv *priv = dev->data->dev_private;
14294         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
14295
14296         MLX5_ASSERT(entry->action);
14297         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14298 }
14299
14300 void
14301 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14302 {
14303         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14304         struct mlx5_flow_dv_port_id_action_resource *resource =
14305                                   container_of(entry, typeof(*resource), entry);
14306
14307         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14308         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14309 }
14310
14311 /**
14312  * Release port ID action resource.
14313  *
14314  * @param dev
14315  *   Pointer to Ethernet device.
14316  * @param handle
14317  *   Pointer to mlx5_flow_handle.
14318  *
14319  * @return
14320  *   1 while a reference on it exists, 0 when freed.
14321  */
14322 static int
14323 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14324                                         uint32_t port_id)
14325 {
14326         struct mlx5_priv *priv = dev->data->dev_private;
14327         struct mlx5_flow_dv_port_id_action_resource *resource;
14328
14329         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14330         if (!resource)
14331                 return 0;
14332         MLX5_ASSERT(resource->action);
14333         return mlx5_list_unregister(priv->sh->port_id_action_list,
14334                                     &resource->entry);
14335 }
14336
14337 /**
14338  * Release shared RSS action resource.
14339  *
14340  * @param dev
14341  *   Pointer to Ethernet device.
14342  * @param srss
14343  *   Shared RSS action index.
14344  */
14345 static void
14346 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14347 {
14348         struct mlx5_priv *priv = dev->data->dev_private;
14349         struct mlx5_shared_action_rss *shared_rss;
14350
14351         shared_rss = mlx5_ipool_get
14352                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14353         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14354 }
14355
14356 void
14357 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14358 {
14359         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14360         struct mlx5_flow_dv_push_vlan_action_resource *resource =
14361                         container_of(entry, typeof(*resource), entry);
14362
14363         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14364         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14365 }
14366
14367 /**
14368  * Release push vlan action resource.
14369  *
14370  * @param dev
14371  *   Pointer to Ethernet device.
14372  * @param handle
14373  *   Pointer to mlx5_flow_handle.
14374  *
14375  * @return
14376  *   1 while a reference on it exists, 0 when freed.
14377  */
14378 static int
14379 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14380                                           struct mlx5_flow_handle *handle)
14381 {
14382         struct mlx5_priv *priv = dev->data->dev_private;
14383         struct mlx5_flow_dv_push_vlan_action_resource *resource;
14384         uint32_t idx = handle->dvh.rix_push_vlan;
14385
14386         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14387         if (!resource)
14388                 return 0;
14389         MLX5_ASSERT(resource->action);
14390         return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14391                                     &resource->entry);
14392 }
14393
14394 /**
14395  * Release the fate resource.
14396  *
14397  * @param dev
14398  *   Pointer to Ethernet device.
14399  * @param handle
14400  *   Pointer to mlx5_flow_handle.
14401  */
14402 static void
14403 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14404                                struct mlx5_flow_handle *handle)
14405 {
14406         if (!handle->rix_fate)
14407                 return;
14408         switch (handle->fate_action) {
14409         case MLX5_FLOW_FATE_QUEUE:
14410                 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14411                         mlx5_hrxq_release(dev, handle->rix_hrxq);
14412                 break;
14413         case MLX5_FLOW_FATE_JUMP:
14414                 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14415                 break;
14416         case MLX5_FLOW_FATE_PORT_ID:
14417                 flow_dv_port_id_action_resource_release(dev,
14418                                 handle->rix_port_id_action);
14419                 break;
14420         default:
14421                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14422                 break;
14423         }
14424         handle->rix_fate = 0;
14425 }
14426
14427 void
14428 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14429                          struct mlx5_list_entry *entry)
14430 {
14431         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14432                                                               typeof(*resource),
14433                                                               entry);
14434         struct rte_eth_dev *dev = resource->dev;
14435         struct mlx5_priv *priv = dev->data->dev_private;
14436
14437         if (resource->verbs_action)
14438                 claim_zero(mlx5_flow_os_destroy_flow_action
14439                                                       (resource->verbs_action));
14440         if (resource->normal_path_tbl)
14441                 flow_dv_tbl_resource_release(MLX5_SH(dev),
14442                                              resource->normal_path_tbl);
14443         flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14444         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14445         DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14446 }
14447
14448 /**
14449  * Release an sample resource.
14450  *
14451  * @param dev
14452  *   Pointer to Ethernet device.
14453  * @param handle
14454  *   Pointer to mlx5_flow_handle.
14455  *
14456  * @return
14457  *   1 while a reference on it exists, 0 when freed.
14458  */
14459 static int
14460 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14461                                      struct mlx5_flow_handle *handle)
14462 {
14463         struct mlx5_priv *priv = dev->data->dev_private;
14464         struct mlx5_flow_dv_sample_resource *resource;
14465
14466         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14467                                   handle->dvh.rix_sample);
14468         if (!resource)
14469                 return 0;
14470         MLX5_ASSERT(resource->verbs_action);
14471         return mlx5_list_unregister(priv->sh->sample_action_list,
14472                                     &resource->entry);
14473 }
14474
14475 void
14476 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14477                              struct mlx5_list_entry *entry)
14478 {
14479         struct mlx5_flow_dv_dest_array_resource *resource =
14480                         container_of(entry, typeof(*resource), entry);
14481         struct rte_eth_dev *dev = resource->dev;
14482         struct mlx5_priv *priv = dev->data->dev_private;
14483         uint32_t i = 0;
14484
14485         MLX5_ASSERT(resource->action);
14486         if (resource->action)
14487                 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14488         for (; i < resource->num_of_dest; i++)
14489                 flow_dv_sample_sub_actions_release(dev,
14490                                                    &resource->sample_idx[i]);
14491         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14492         DRV_LOG(DEBUG, "destination array resource %p: removed",
14493                 (void *)resource);
14494 }
14495
14496 /**
14497  * Release an destination array resource.
14498  *
14499  * @param dev
14500  *   Pointer to Ethernet device.
14501  * @param handle
14502  *   Pointer to mlx5_flow_handle.
14503  *
14504  * @return
14505  *   1 while a reference on it exists, 0 when freed.
14506  */
14507 static int
14508 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14509                                     struct mlx5_flow_handle *handle)
14510 {
14511         struct mlx5_priv *priv = dev->data->dev_private;
14512         struct mlx5_flow_dv_dest_array_resource *resource;
14513
14514         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14515                                   handle->dvh.rix_dest_array);
14516         if (!resource)
14517                 return 0;
14518         MLX5_ASSERT(resource->action);
14519         return mlx5_list_unregister(priv->sh->dest_array_list,
14520                                     &resource->entry);
14521 }
14522
14523 static void
14524 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14525 {
14526         struct mlx5_priv *priv = dev->data->dev_private;
14527         struct mlx5_dev_ctx_shared *sh = priv->sh;
14528         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14529                                 sh->geneve_tlv_option_resource;
14530         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14531         if (geneve_opt_resource) {
14532                 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14533                                          __ATOMIC_RELAXED))) {
14534                         claim_zero(mlx5_devx_cmd_destroy
14535                                         (geneve_opt_resource->obj));
14536                         mlx5_free(sh->geneve_tlv_option_resource);
14537                         sh->geneve_tlv_option_resource = NULL;
14538                 }
14539         }
14540         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14541 }
14542
14543 /**
14544  * Remove the flow from the NIC but keeps it in memory.
14545  * Lock free, (mutex should be acquired by caller).
14546  *
14547  * @param[in] dev
14548  *   Pointer to Ethernet device.
14549  * @param[in, out] flow
14550  *   Pointer to flow structure.
14551  */
14552 static void
14553 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14554 {
14555         struct mlx5_flow_handle *dh;
14556         uint32_t handle_idx;
14557         struct mlx5_priv *priv = dev->data->dev_private;
14558
14559         if (!flow)
14560                 return;
14561         handle_idx = flow->dev_handles;
14562         while (handle_idx) {
14563                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14564                                     handle_idx);
14565                 if (!dh)
14566                         return;
14567                 if (dh->drv_flow) {
14568                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14569                         dh->drv_flow = NULL;
14570                 }
14571                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14572                         flow_dv_fate_resource_release(dev, dh);
14573                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14574                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14575                 handle_idx = dh->next.next;
14576         }
14577 }
14578
14579 /**
14580  * Remove the flow from the NIC and the memory.
14581  * Lock free, (mutex should be acquired by caller).
14582  *
14583  * @param[in] dev
14584  *   Pointer to the Ethernet device structure.
14585  * @param[in, out] flow
14586  *   Pointer to flow structure.
14587  */
14588 static void
14589 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14590 {
14591         struct mlx5_flow_handle *dev_handle;
14592         struct mlx5_priv *priv = dev->data->dev_private;
14593         struct mlx5_flow_meter_info *fm = NULL;
14594         uint32_t srss = 0;
14595
14596         if (!flow)
14597                 return;
14598         flow_dv_remove(dev, flow);
14599         if (flow->counter) {
14600                 flow_dv_counter_free(dev, flow->counter);
14601                 flow->counter = 0;
14602         }
14603         if (flow->meter) {
14604                 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14605                 if (fm)
14606                         mlx5_flow_meter_detach(priv, fm);
14607                 flow->meter = 0;
14608         }
14609         /* Keep the current age handling by default. */
14610         if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14611                 flow_dv_aso_ct_release(dev, flow->ct, NULL);
14612         else if (flow->age)
14613                 flow_dv_aso_age_release(dev, flow->age);
14614         if (flow->geneve_tlv_option) {
14615                 flow_dv_geneve_tlv_option_resource_release(dev);
14616                 flow->geneve_tlv_option = 0;
14617         }
14618         while (flow->dev_handles) {
14619                 uint32_t tmp_idx = flow->dev_handles;
14620
14621                 dev_handle = mlx5_ipool_get(priv->sh->ipool
14622                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14623                 if (!dev_handle)
14624                         return;
14625                 flow->dev_handles = dev_handle->next.next;
14626                 while (dev_handle->flex_item) {
14627                         int index = rte_bsf32(dev_handle->flex_item);
14628
14629                         mlx5_flex_release_index(dev, index);
14630                         dev_handle->flex_item &= ~RTE_BIT32(index);
14631                 }
14632                 if (dev_handle->dvh.matcher)
14633                         flow_dv_matcher_release(dev, dev_handle);
14634                 if (dev_handle->dvh.rix_sample)
14635                         flow_dv_sample_resource_release(dev, dev_handle);
14636                 if (dev_handle->dvh.rix_dest_array)
14637                         flow_dv_dest_array_resource_release(dev, dev_handle);
14638                 if (dev_handle->dvh.rix_encap_decap)
14639                         flow_dv_encap_decap_resource_release(dev,
14640                                 dev_handle->dvh.rix_encap_decap);
14641                 if (dev_handle->dvh.modify_hdr)
14642                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
14643                 if (dev_handle->dvh.rix_push_vlan)
14644                         flow_dv_push_vlan_action_resource_release(dev,
14645                                                                   dev_handle);
14646                 if (dev_handle->dvh.rix_tag)
14647                         flow_dv_tag_release(dev,
14648                                             dev_handle->dvh.rix_tag);
14649                 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14650                         flow_dv_fate_resource_release(dev, dev_handle);
14651                 else if (!srss)
14652                         srss = dev_handle->rix_srss;
14653                 if (fm && dev_handle->is_meter_flow_id &&
14654                     dev_handle->split_flow_id)
14655                         mlx5_ipool_free(fm->flow_ipool,
14656                                         dev_handle->split_flow_id);
14657                 else if (dev_handle->split_flow_id &&
14658                     !dev_handle->is_meter_flow_id)
14659                         mlx5_ipool_free(priv->sh->ipool
14660                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14661                                         dev_handle->split_flow_id);
14662                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14663                            tmp_idx);
14664         }
14665         if (srss)
14666                 flow_dv_shared_rss_action_release(dev, srss);
14667 }
14668
14669 /**
14670  * Release array of hash RX queue objects.
14671  * Helper function.
14672  *
14673  * @param[in] dev
14674  *   Pointer to the Ethernet device structure.
14675  * @param[in, out] hrxqs
14676  *   Array of hash RX queue objects.
14677  *
14678  * @return
14679  *   Total number of references to hash RX queue objects in *hrxqs* array
14680  *   after this operation.
14681  */
14682 static int
14683 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14684                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14685 {
14686         size_t i;
14687         int remaining = 0;
14688
14689         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14690                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14691
14692                 if (!ret)
14693                         (*hrxqs)[i] = 0;
14694                 remaining += ret;
14695         }
14696         return remaining;
14697 }
14698
14699 /**
14700  * Release all hash RX queue objects representing shared RSS action.
14701  *
14702  * @param[in] dev
14703  *   Pointer to the Ethernet device structure.
14704  * @param[in, out] action
14705  *   Shared RSS action to remove hash RX queue objects from.
14706  *
14707  * @return
14708  *   Total number of references to hash RX queue objects stored in *action*
14709  *   after this operation.
14710  *   Expected to be 0 if no external references held.
14711  */
14712 static int
14713 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14714                                  struct mlx5_shared_action_rss *shared_rss)
14715 {
14716         return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14717 }
14718
14719 /**
14720  * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14721  * user input.
14722  *
14723  * Only one hash value is available for one L3+L4 combination:
14724  * for example:
14725  * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14726  * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14727  * same slot in mlx5_rss_hash_fields.
14728  *
14729  * @param[in] rss_types
14730  *   RSS type.
14731  * @param[in, out] hash_field
14732  *   hash_field variable needed to be adjusted.
14733  *
14734  * @return
14735  *   void
14736  */
14737 void
14738 flow_dv_action_rss_l34_hash_adjust(uint64_t rss_types,
14739                                    uint64_t *hash_field)
14740 {
14741         switch (*hash_field & ~IBV_RX_HASH_INNER) {
14742         case MLX5_RSS_HASH_IPV4:
14743                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14744                         *hash_field &= ~MLX5_RSS_HASH_IPV4;
14745                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14746                                 *hash_field |= IBV_RX_HASH_DST_IPV4;
14747                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14748                                 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14749                         else
14750                                 *hash_field |= MLX5_RSS_HASH_IPV4;
14751                 }
14752                 return;
14753         case MLX5_RSS_HASH_IPV6:
14754                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14755                         *hash_field &= ~MLX5_RSS_HASH_IPV6;
14756                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14757                                 *hash_field |= IBV_RX_HASH_DST_IPV6;
14758                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14759                                 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14760                         else
14761                                 *hash_field |= MLX5_RSS_HASH_IPV6;
14762                 }
14763                 return;
14764         case MLX5_RSS_HASH_IPV4_UDP:
14765                 /* fall-through. */
14766         case MLX5_RSS_HASH_IPV6_UDP:
14767                 if (rss_types & RTE_ETH_RSS_UDP) {
14768                         *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14769                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14770                                 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14771                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14772                                 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14773                         else
14774                                 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14775                 }
14776                 return;
14777         case MLX5_RSS_HASH_IPV4_TCP:
14778                 /* fall-through. */
14779         case MLX5_RSS_HASH_IPV6_TCP:
14780                 if (rss_types & RTE_ETH_RSS_TCP) {
14781                         *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14782                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14783                                 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14784                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14785                                 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14786                         else
14787                                 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14788                 }
14789                 return;
14790         default:
14791                 return;
14792         }
14793 }
14794
14795 /**
14796  * Setup shared RSS action.
14797  * Prepare set of hash RX queue objects sufficient to handle all valid
14798  * hash_fields combinations (see enum ibv_rx_hash_fields).
14799  *
14800  * @param[in] dev
14801  *   Pointer to the Ethernet device structure.
14802  * @param[in] action_idx
14803  *   Shared RSS action ipool index.
14804  * @param[in, out] action
14805  *   Partially initialized shared RSS action.
14806  * @param[out] error
14807  *   Perform verbose error reporting if not NULL. Initialized in case of
14808  *   error only.
14809  *
14810  * @return
14811  *   0 on success, otherwise negative errno value.
14812  */
14813 static int
14814 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14815                            uint32_t action_idx,
14816                            struct mlx5_shared_action_rss *shared_rss,
14817                            struct rte_flow_error *error)
14818 {
14819         struct mlx5_priv *priv = dev->data->dev_private;
14820         struct mlx5_flow_rss_desc rss_desc = { 0 };
14821         size_t i;
14822         int err;
14823
14824         shared_rss->ind_tbl = mlx5_ind_table_obj_new
14825                               (dev, shared_rss->origin.queue,
14826                                shared_rss->origin.queue_num,
14827                                true,
14828                                !!dev->data->dev_started);
14829         if (!shared_rss->ind_tbl)
14830                 return rte_flow_error_set(error, rte_errno,
14831                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14832                                           "cannot setup indirection table");
14833         memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14834         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14835         rss_desc.const_q = shared_rss->origin.queue;
14836         rss_desc.queue_num = shared_rss->origin.queue_num;
14837         /* Set non-zero value to indicate a shared RSS. */
14838         rss_desc.shared_rss = action_idx;
14839         rss_desc.ind_tbl = shared_rss->ind_tbl;
14840         if (priv->sh->config.dv_flow_en == 2)
14841                 rss_desc.hws_flags = MLX5DR_ACTION_FLAG_HWS_RX;
14842         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14843                 struct mlx5_hrxq *hrxq;
14844                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14845                 int tunnel = 0;
14846
14847                 flow_dv_action_rss_l34_hash_adjust(shared_rss->origin.types,
14848                                                    &hash_fields);
14849                 if (shared_rss->origin.level > 1) {
14850                         hash_fields |= IBV_RX_HASH_INNER;
14851                         tunnel = 1;
14852                 }
14853                 rss_desc.tunnel = tunnel;
14854                 rss_desc.hash_fields = hash_fields;
14855                 hrxq = mlx5_hrxq_get(dev, &rss_desc);
14856                 if (!hrxq) {
14857                         rte_flow_error_set
14858                                 (error, rte_errno,
14859                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14860                                  "cannot get hash queue");
14861                         goto error_hrxq_new;
14862                 }
14863                 err = __flow_dv_action_rss_hrxq_set
14864                         (shared_rss, hash_fields, hrxq->idx);
14865                 MLX5_ASSERT(!err);
14866         }
14867         return 0;
14868 error_hrxq_new:
14869         err = rte_errno;
14870         __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14871         if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14872                 shared_rss->ind_tbl = NULL;
14873         rte_errno = err;
14874         return -rte_errno;
14875 }
14876
14877 /**
14878  * Create shared RSS action.
14879  *
14880  * @param[in] dev
14881  *   Pointer to the Ethernet device structure.
14882  * @param[in] conf
14883  *   Shared action configuration.
14884  * @param[in] rss
14885  *   RSS action specification used to create shared action.
14886  * @param[out] error
14887  *   Perform verbose error reporting if not NULL. Initialized in case of
14888  *   error only.
14889  *
14890  * @return
14891  *   A valid shared action ID in case of success, 0 otherwise and
14892  *   rte_errno is set.
14893  */
14894 static uint32_t
14895 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14896                             const struct rte_flow_indir_action_conf *conf,
14897                             const struct rte_flow_action_rss *rss,
14898                             struct rte_flow_error *error)
14899 {
14900         struct mlx5_priv *priv = dev->data->dev_private;
14901         struct mlx5_shared_action_rss *shared_rss = NULL;
14902         struct rte_flow_action_rss *origin;
14903         const uint8_t *rss_key;
14904         uint32_t idx;
14905
14906         RTE_SET_USED(conf);
14907         shared_rss = mlx5_ipool_zmalloc
14908                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14909         if (!shared_rss) {
14910                 rte_flow_error_set(error, ENOMEM,
14911                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14912                                    "cannot allocate resource memory");
14913                 goto error_rss_init;
14914         }
14915         if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14916                 rte_flow_error_set(error, E2BIG,
14917                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14918                                    "rss action number out of range");
14919                 goto error_rss_init;
14920         }
14921         origin = &shared_rss->origin;
14922         origin->func = rss->func;
14923         origin->level = rss->level;
14924         /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
14925         origin->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
14926         /* NULL RSS key indicates default RSS key. */
14927         rss_key = !rss->key ? rss_hash_default_key : rss->key;
14928         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14929         origin->key = &shared_rss->key[0];
14930         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14931         origin->queue = rss->queue;
14932         origin->queue_num = rss->queue_num;
14933         if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14934                 goto error_rss_init;
14935         /* Update queue with indirect table queue memoyr. */
14936         origin->queue = shared_rss->ind_tbl->queues;
14937         rte_spinlock_init(&shared_rss->action_rss_sl);
14938         __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14939         rte_spinlock_lock(&priv->shared_act_sl);
14940         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14941                      &priv->rss_shared_actions, idx, shared_rss, next);
14942         rte_spinlock_unlock(&priv->shared_act_sl);
14943         return idx;
14944 error_rss_init:
14945         if (shared_rss) {
14946                 if (shared_rss->ind_tbl)
14947                         mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl,
14948                                                    !!dev->data->dev_started);
14949                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14950                                 idx);
14951         }
14952         return 0;
14953 }
14954
14955 /**
14956  * Destroy the shared RSS action.
14957  * Release related hash RX queue objects.
14958  *
14959  * @param[in] dev
14960  *   Pointer to the Ethernet device structure.
14961  * @param[in] idx
14962  *   The shared RSS action object ID to be removed.
14963  * @param[out] error
14964  *   Perform verbose error reporting if not NULL. Initialized in case of
14965  *   error only.
14966  *
14967  * @return
14968  *   0 on success, otherwise negative errno value.
14969  */
14970 static int
14971 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14972                              struct rte_flow_error *error)
14973 {
14974         struct mlx5_priv *priv = dev->data->dev_private;
14975         struct mlx5_shared_action_rss *shared_rss =
14976             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14977         uint32_t old_refcnt = 1;
14978         int remaining;
14979
14980         if (!shared_rss)
14981                 return rte_flow_error_set(error, EINVAL,
14982                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14983                                           "invalid shared action");
14984         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14985                                          0, 0, __ATOMIC_ACQUIRE,
14986                                          __ATOMIC_RELAXED))
14987                 return rte_flow_error_set(error, EBUSY,
14988                                           RTE_FLOW_ERROR_TYPE_ACTION,
14989                                           NULL,
14990                                           "shared rss has references");
14991         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14992         if (remaining)
14993                 return rte_flow_error_set(error, EBUSY,
14994                                           RTE_FLOW_ERROR_TYPE_ACTION,
14995                                           NULL,
14996                                           "shared rss hrxq has references");
14997         remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl,
14998                                                !!dev->data->dev_started);
14999         if (remaining)
15000                 return rte_flow_error_set(error, EBUSY,
15001                                           RTE_FLOW_ERROR_TYPE_ACTION,
15002                                           NULL,
15003                                           "shared rss indirection table has"
15004                                           " references");
15005         rte_spinlock_lock(&priv->shared_act_sl);
15006         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
15007                      &priv->rss_shared_actions, idx, shared_rss, next);
15008         rte_spinlock_unlock(&priv->shared_act_sl);
15009         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
15010                         idx);
15011         return 0;
15012 }
15013
15014 /**
15015  * Create indirect action, lock free,
15016  * (mutex should be acquired by caller).
15017  * Dispatcher for action type specific call.
15018  *
15019  * @param[in] dev
15020  *   Pointer to the Ethernet device structure.
15021  * @param[in] conf
15022  *   Shared action configuration.
15023  * @param[in] action
15024  *   Action specification used to create indirect action.
15025  * @param[out] error
15026  *   Perform verbose error reporting if not NULL. Initialized in case of
15027  *   error only.
15028  *
15029  * @return
15030  *   A valid shared action handle in case of success, NULL otherwise and
15031  *   rte_errno is set.
15032  */
15033 struct rte_flow_action_handle *
15034 flow_dv_action_create(struct rte_eth_dev *dev,
15035                       const struct rte_flow_indir_action_conf *conf,
15036                       const struct rte_flow_action *action,
15037                       struct rte_flow_error *err)
15038 {
15039         struct mlx5_priv *priv = dev->data->dev_private;
15040         uint32_t age_idx = 0;
15041         uint32_t idx = 0;
15042         uint32_t ret = 0;
15043
15044         switch (action->type) {
15045         case RTE_FLOW_ACTION_TYPE_RSS:
15046                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
15047                 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
15048                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
15049                 break;
15050         case RTE_FLOW_ACTION_TYPE_AGE:
15051                 age_idx = flow_dv_aso_age_alloc(dev, err);
15052                 if (!age_idx) {
15053                         ret = -rte_errno;
15054                         break;
15055                 }
15056                 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
15057                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
15058                 flow_dv_aso_age_params_init(dev, age_idx,
15059                                         ((const struct rte_flow_action_age *)
15060                                                 action->conf)->context ?
15061                                         ((const struct rte_flow_action_age *)
15062                                                 action->conf)->context :
15063                                         (void *)(uintptr_t)idx,
15064                                         ((const struct rte_flow_action_age *)
15065                                                 action->conf)->timeout);
15066                 ret = age_idx;
15067                 break;
15068         case RTE_FLOW_ACTION_TYPE_COUNT:
15069                 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
15070                 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
15071                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
15072                 break;
15073         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
15074                 ret = flow_dv_translate_create_conntrack(dev, action->conf,
15075                                                          err);
15076                 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
15077                 break;
15078         default:
15079                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
15080                                    NULL, "action type not supported");
15081                 break;
15082         }
15083         return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
15084 }
15085
15086 /**
15087  * Destroy the indirect action.
15088  * Release action related resources on the NIC and the memory.
15089  * Lock free, (mutex should be acquired by caller).
15090  * Dispatcher for action type specific call.
15091  *
15092  * @param[in] dev
15093  *   Pointer to the Ethernet device structure.
15094  * @param[in] handle
15095  *   The indirect action object handle to be removed.
15096  * @param[out] error
15097  *   Perform verbose error reporting if not NULL. Initialized in case of
15098  *   error only.
15099  *
15100  * @return
15101  *   0 on success, otherwise negative errno value.
15102  */
15103 int
15104 flow_dv_action_destroy(struct rte_eth_dev *dev,
15105                        struct rte_flow_action_handle *handle,
15106                        struct rte_flow_error *error)
15107 {
15108         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15109         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15110         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15111         struct mlx5_flow_counter *cnt;
15112         uint32_t no_flow_refcnt = 1;
15113         int ret;
15114
15115         switch (type) {
15116         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15117                 return __flow_dv_action_rss_release(dev, idx, error);
15118         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15119                 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
15120                 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
15121                                                  &no_flow_refcnt, 1, false,
15122                                                  __ATOMIC_ACQUIRE,
15123                                                  __ATOMIC_RELAXED))
15124                         return rte_flow_error_set(error, EBUSY,
15125                                                   RTE_FLOW_ERROR_TYPE_ACTION,
15126                                                   NULL,
15127                                                   "Indirect count action has references");
15128                 flow_dv_counter_free(dev, idx);
15129                 return 0;
15130         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15131                 ret = flow_dv_aso_age_release(dev, idx);
15132                 if (ret)
15133                         /*
15134                          * In this case, the last flow has a reference will
15135                          * actually release the age action.
15136                          */
15137                         DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
15138                                 " released with references %d.", idx, ret);
15139                 return 0;
15140         case MLX5_INDIRECT_ACTION_TYPE_CT:
15141                 ret = flow_dv_aso_ct_release(dev, idx, error);
15142                 if (ret < 0)
15143                         return ret;
15144                 if (ret > 0)
15145                         DRV_LOG(DEBUG, "Connection tracking object %u still "
15146                                 "has references %d.", idx, ret);
15147                 return 0;
15148         default:
15149                 return rte_flow_error_set(error, ENOTSUP,
15150                                           RTE_FLOW_ERROR_TYPE_ACTION,
15151                                           NULL,
15152                                           "action type not supported");
15153         }
15154 }
15155
15156 /**
15157  * Updates in place shared RSS action configuration.
15158  *
15159  * @param[in] dev
15160  *   Pointer to the Ethernet device structure.
15161  * @param[in] idx
15162  *   The shared RSS action object ID to be updated.
15163  * @param[in] action_conf
15164  *   RSS action specification used to modify *shared_rss*.
15165  * @param[out] error
15166  *   Perform verbose error reporting if not NULL. Initialized in case of
15167  *   error only.
15168  *
15169  * @return
15170  *   0 on success, otherwise negative errno value.
15171  * @note: currently only support update of RSS queues.
15172  */
15173 static int
15174 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
15175                             const struct rte_flow_action_rss *action_conf,
15176                             struct rte_flow_error *error)
15177 {
15178         struct mlx5_priv *priv = dev->data->dev_private;
15179         struct mlx5_shared_action_rss *shared_rss =
15180             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
15181         int ret = 0;
15182         void *queue = NULL;
15183         void *queue_i = NULL;
15184         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
15185         bool dev_started = !!dev->data->dev_started;
15186
15187         if (!shared_rss)
15188                 return rte_flow_error_set(error, EINVAL,
15189                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15190                                           "invalid shared action to update");
15191         if (priv->obj_ops.ind_table_modify == NULL)
15192                 return rte_flow_error_set(error, ENOTSUP,
15193                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15194                                           "cannot modify indirection table");
15195         queue = mlx5_malloc(MLX5_MEM_ZERO,
15196                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
15197                             0, SOCKET_ID_ANY);
15198         if (!queue)
15199                 return rte_flow_error_set(error, ENOMEM,
15200                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15201                                           NULL,
15202                                           "cannot allocate resource memory");
15203         memcpy(queue, action_conf->queue, queue_size);
15204         MLX5_ASSERT(shared_rss->ind_tbl);
15205         rte_spinlock_lock(&shared_rss->action_rss_sl);
15206         queue_i = shared_rss->ind_tbl->queues;
15207         ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
15208                                         queue, action_conf->queue_num,
15209                                         true /* standalone */,
15210                                         dev_started /* ref_new_qs */,
15211                                         dev_started /* deref_old_qs */);
15212         if (ret) {
15213                 ret = rte_flow_error_set(error, rte_errno,
15214                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15215                                           "cannot update indirection table");
15216         } else {
15217                 /* Restore the queue to indirect table internal queue. */
15218                 memcpy(queue_i, queue, queue_size);
15219                 shared_rss->ind_tbl->queues = queue_i;
15220                 shared_rss->origin.queue_num = action_conf->queue_num;
15221         }
15222         mlx5_free(queue);
15223         rte_spinlock_unlock(&shared_rss->action_rss_sl);
15224         return ret;
15225 }
15226
15227 /*
15228  * Updates in place conntrack context or direction.
15229  * Context update should be synchronized.
15230  *
15231  * @param[in] dev
15232  *   Pointer to the Ethernet device structure.
15233  * @param[in] idx
15234  *   The conntrack object ID to be updated.
15235  * @param[in] update
15236  *   Pointer to the structure of information to update.
15237  * @param[out] error
15238  *   Perform verbose error reporting if not NULL. Initialized in case of
15239  *   error only.
15240  *
15241  * @return
15242  *   0 on success, otherwise negative errno value.
15243  */
15244 static int
15245 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
15246                            const struct rte_flow_modify_conntrack *update,
15247                            struct rte_flow_error *error)
15248 {
15249         struct mlx5_priv *priv = dev->data->dev_private;
15250         struct mlx5_aso_ct_action *ct;
15251         const struct rte_flow_action_conntrack *new_prf;
15252         int ret = 0;
15253         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15254         uint32_t dev_idx;
15255
15256         if (PORT_ID(priv) != owner)
15257                 return rte_flow_error_set(error, EACCES,
15258                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15259                                           NULL,
15260                                           "CT object owned by another port");
15261         dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15262         ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15263         if (!ct->refcnt)
15264                 return rte_flow_error_set(error, ENOMEM,
15265                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15266                                           NULL,
15267                                           "CT object is inactive");
15268         new_prf = &update->new_ct;
15269         if (update->direction)
15270                 ct->is_original = !!new_prf->is_original_dir;
15271         if (update->state) {
15272                 /* Only validate the profile when it needs to be updated. */
15273                 ret = mlx5_validate_action_ct(dev, new_prf, error);
15274                 if (ret)
15275                         return ret;
15276                 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
15277                 if (ret)
15278                         return rte_flow_error_set(error, EIO,
15279                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15280                                         NULL,
15281                                         "Failed to send CT context update WQE");
15282                 /* Block until ready or a failure. */
15283                 ret = mlx5_aso_ct_available(priv->sh, ct);
15284                 if (ret)
15285                         rte_flow_error_set(error, rte_errno,
15286                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15287                                            NULL,
15288                                            "Timeout to get the CT update");
15289         }
15290         return ret;
15291 }
15292
15293 /**
15294  * Updates in place shared action configuration, lock free,
15295  * (mutex should be acquired by caller).
15296  *
15297  * @param[in] dev
15298  *   Pointer to the Ethernet device structure.
15299  * @param[in] handle
15300  *   The indirect action object handle to be updated.
15301  * @param[in] update
15302  *   Action specification used to modify the action pointed by *handle*.
15303  *   *update* could be of same type with the action pointed by the *handle*
15304  *   handle argument, or some other structures like a wrapper, depending on
15305  *   the indirect action type.
15306  * @param[out] error
15307  *   Perform verbose error reporting if not NULL. Initialized in case of
15308  *   error only.
15309  *
15310  * @return
15311  *   0 on success, otherwise negative errno value.
15312  */
15313 int
15314 flow_dv_action_update(struct rte_eth_dev *dev,
15315                         struct rte_flow_action_handle *handle,
15316                         const void *update,
15317                         struct rte_flow_error *err)
15318 {
15319         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15320         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15321         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15322         const void *action_conf;
15323
15324         switch (type) {
15325         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15326                 action_conf = ((const struct rte_flow_action *)update)->conf;
15327                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15328         case MLX5_INDIRECT_ACTION_TYPE_CT:
15329                 return __flow_dv_action_ct_update(dev, idx, update, err);
15330         default:
15331                 return rte_flow_error_set(err, ENOTSUP,
15332                                           RTE_FLOW_ERROR_TYPE_ACTION,
15333                                           NULL,
15334                                           "action type update not supported");
15335         }
15336 }
15337
15338 /**
15339  * Destroy the meter sub policy table rules.
15340  * Lock free, (mutex should be acquired by caller).
15341  *
15342  * @param[in] dev
15343  *   Pointer to Ethernet device.
15344  * @param[in] sub_policy
15345  *   Pointer to meter sub policy table.
15346  */
15347 static void
15348 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15349                              struct mlx5_flow_meter_sub_policy *sub_policy)
15350 {
15351         struct mlx5_priv *priv = dev->data->dev_private;
15352         struct mlx5_flow_tbl_data_entry *tbl;
15353         struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15354         struct mlx5_flow_meter_info *next_fm;
15355         struct mlx5_sub_policy_color_rule *color_rule;
15356         void *tmp;
15357         uint32_t i;
15358
15359         for (i = 0; i < RTE_COLORS; i++) {
15360                 next_fm = NULL;
15361                 if (i == RTE_COLOR_GREEN && policy &&
15362                     policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15363                         next_fm = mlx5_flow_meter_find(priv,
15364                                         policy->act_cnt[i].next_mtr_id, NULL);
15365                 RTE_TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15366                                    next_port, tmp) {
15367                         claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15368                         tbl = container_of(color_rule->matcher->tbl,
15369                                            typeof(*tbl), tbl);
15370                         mlx5_list_unregister(tbl->matchers,
15371                                              &color_rule->matcher->entry);
15372                         TAILQ_REMOVE(&sub_policy->color_rules[i],
15373                                      color_rule, next_port);
15374                         mlx5_free(color_rule);
15375                         if (next_fm)
15376                                 mlx5_flow_meter_detach(priv, next_fm);
15377                 }
15378         }
15379         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15380                 if (sub_policy->rix_hrxq[i]) {
15381                         if (policy && !policy->is_hierarchy)
15382                                 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15383                         sub_policy->rix_hrxq[i] = 0;
15384                 }
15385                 if (sub_policy->jump_tbl[i]) {
15386                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15387                                                      sub_policy->jump_tbl[i]);
15388                         sub_policy->jump_tbl[i] = NULL;
15389                 }
15390         }
15391         if (sub_policy->tbl_rsc) {
15392                 flow_dv_tbl_resource_release(MLX5_SH(dev),
15393                                              sub_policy->tbl_rsc);
15394                 sub_policy->tbl_rsc = NULL;
15395         }
15396 }
15397
15398 /**
15399  * Destroy policy rules, lock free,
15400  * (mutex should be acquired by caller).
15401  * Dispatcher for action type specific call.
15402  *
15403  * @param[in] dev
15404  *   Pointer to the Ethernet device structure.
15405  * @param[in] mtr_policy
15406  *   Meter policy struct.
15407  */
15408 static void
15409 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15410                              struct mlx5_flow_meter_policy *mtr_policy)
15411 {
15412         uint32_t i, j;
15413         struct mlx5_flow_meter_sub_policy *sub_policy;
15414         uint16_t sub_policy_num;
15415
15416         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15417                 sub_policy_num = (mtr_policy->sub_policy_num >>
15418                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15419                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15420                 for (j = 0; j < sub_policy_num; j++) {
15421                         sub_policy = mtr_policy->sub_policys[i][j];
15422                         if (sub_policy)
15423                                 __flow_dv_destroy_sub_policy_rules(dev,
15424                                                                    sub_policy);
15425                 }
15426         }
15427 }
15428
15429 /**
15430  * Destroy policy action, lock free,
15431  * (mutex should be acquired by caller).
15432  * Dispatcher for action type specific call.
15433  *
15434  * @param[in] dev
15435  *   Pointer to the Ethernet device structure.
15436  * @param[in] mtr_policy
15437  *   Meter policy struct.
15438  */
15439 static void
15440 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15441                       struct mlx5_flow_meter_policy *mtr_policy)
15442 {
15443         struct rte_flow_action *rss_action;
15444         struct mlx5_flow_handle dev_handle;
15445         uint32_t i, j;
15446
15447         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15448                 if (mtr_policy->act_cnt[i].rix_mark) {
15449                         flow_dv_tag_release(dev,
15450                                 mtr_policy->act_cnt[i].rix_mark);
15451                         mtr_policy->act_cnt[i].rix_mark = 0;
15452                 }
15453                 if (mtr_policy->act_cnt[i].modify_hdr) {
15454                         dev_handle.dvh.modify_hdr =
15455                                 mtr_policy->act_cnt[i].modify_hdr;
15456                         flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15457                 }
15458                 switch (mtr_policy->act_cnt[i].fate_action) {
15459                 case MLX5_FLOW_FATE_SHARED_RSS:
15460                         rss_action = mtr_policy->act_cnt[i].rss;
15461                         mlx5_free(rss_action);
15462                         break;
15463                 case MLX5_FLOW_FATE_PORT_ID:
15464                         if (mtr_policy->act_cnt[i].rix_port_id_action) {
15465                                 flow_dv_port_id_action_resource_release(dev,
15466                                 mtr_policy->act_cnt[i].rix_port_id_action);
15467                                 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15468                         }
15469                         break;
15470                 case MLX5_FLOW_FATE_DROP:
15471                 case MLX5_FLOW_FATE_JUMP:
15472                         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15473                                 mtr_policy->act_cnt[i].dr_jump_action[j] =
15474                                                 NULL;
15475                         break;
15476                 default:
15477                         /*Queue action do nothing*/
15478                         break;
15479                 }
15480         }
15481         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15482                 mtr_policy->dr_drop_action[j] = NULL;
15483 }
15484
15485 /**
15486  * Create policy action per domain, lock free,
15487  * (mutex should be acquired by caller).
15488  * Dispatcher for action type specific call.
15489  *
15490  * @param[in] dev
15491  *   Pointer to the Ethernet device structure.
15492  * @param[in] mtr_policy
15493  *   Meter policy struct.
15494  * @param[in] action
15495  *   Action specification used to create meter actions.
15496  * @param[out] error
15497  *   Perform verbose error reporting if not NULL. Initialized in case of
15498  *   error only.
15499  *
15500  * @return
15501  *   0 on success, otherwise negative errno value.
15502  */
15503 static int
15504 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15505                         struct mlx5_flow_meter_policy *mtr_policy,
15506                         const struct rte_flow_action *actions[RTE_COLORS],
15507                         enum mlx5_meter_domain domain,
15508                         struct rte_mtr_error *error)
15509 {
15510         struct mlx5_priv *priv = dev->data->dev_private;
15511         struct rte_flow_error flow_err;
15512         const struct rte_flow_action *act;
15513         uint64_t action_flags;
15514         struct mlx5_flow_handle dh;
15515         struct mlx5_flow dev_flow;
15516         struct mlx5_flow_dv_port_id_action_resource port_id_action;
15517         int i, ret;
15518         uint8_t egress, transfer;
15519         struct mlx5_meter_policy_action_container *act_cnt = NULL;
15520         union {
15521                 struct mlx5_flow_dv_modify_hdr_resource res;
15522                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15523                             sizeof(struct mlx5_modification_cmd) *
15524                             (MLX5_MAX_MODIFY_NUM + 1)];
15525         } mhdr_dummy;
15526         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15527         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
15528
15529         MLX5_ASSERT(wks);
15530         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15531         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15532         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15533         memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15534         memset(&port_id_action, 0,
15535                sizeof(struct mlx5_flow_dv_port_id_action_resource));
15536         memset(mhdr_res, 0, sizeof(*mhdr_res));
15537         mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15538                                        (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15539                                         MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15540         dev_flow.handle = &dh;
15541         dev_flow.dv.port_id_action = &port_id_action;
15542         dev_flow.external = true;
15543         for (i = 0; i < RTE_COLORS; i++) {
15544                 if (i < MLX5_MTR_RTE_COLORS)
15545                         act_cnt = &mtr_policy->act_cnt[i];
15546                 /* Skip the color policy actions creation. */
15547                 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15548                     (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15549                         continue;
15550                 action_flags = 0;
15551                 for (act = actions[i];
15552                      act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15553                         switch (act->type) {
15554                         case RTE_FLOW_ACTION_TYPE_MARK:
15555                         {
15556                                 uint32_t tag_be = mlx5_flow_mark_set
15557                                         (((const struct rte_flow_action_mark *)
15558                                         (act->conf))->id);
15559
15560                                 if (i >= MLX5_MTR_RTE_COLORS)
15561                                         return -rte_mtr_error_set(error,
15562                                           ENOTSUP,
15563                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15564                                           NULL,
15565                                           "cannot create policy "
15566                                           "mark action for this color");
15567                                 wks->mark = 1;
15568                                 if (flow_dv_tag_resource_register(dev, tag_be,
15569                                                   &dev_flow, &flow_err))
15570                                         return -rte_mtr_error_set(error,
15571                                         ENOTSUP,
15572                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15573                                         NULL,
15574                                         "cannot setup policy mark action");
15575                                 MLX5_ASSERT(dev_flow.dv.tag_resource);
15576                                 act_cnt->rix_mark =
15577                                         dev_flow.handle->dvh.rix_tag;
15578                                 action_flags |= MLX5_FLOW_ACTION_MARK;
15579                                 break;
15580                         }
15581                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
15582                                 if (i >= MLX5_MTR_RTE_COLORS)
15583                                         return -rte_mtr_error_set(error,
15584                                           ENOTSUP,
15585                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15586                                           NULL,
15587                                           "cannot create policy "
15588                                           "set tag action for this color");
15589                                 if (flow_dv_convert_action_set_tag
15590                                 (dev, mhdr_res,
15591                                 (const struct rte_flow_action_set_tag *)
15592                                 act->conf,  &flow_err))
15593                                         return -rte_mtr_error_set(error,
15594                                         ENOTSUP,
15595                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15596                                         NULL, "cannot convert policy "
15597                                         "set tag action");
15598                                 if (!mhdr_res->actions_num)
15599                                         return -rte_mtr_error_set(error,
15600                                         ENOTSUP,
15601                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15602                                         NULL, "cannot find policy "
15603                                         "set tag action");
15604                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15605                                 break;
15606                         case RTE_FLOW_ACTION_TYPE_DROP:
15607                         {
15608                                 struct mlx5_flow_mtr_mng *mtrmng =
15609                                                 priv->sh->mtrmng;
15610                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15611
15612                                 /*
15613                                  * Create the drop table with
15614                                  * METER DROP level.
15615                                  */
15616                                 if (!mtrmng->drop_tbl[domain]) {
15617                                         mtrmng->drop_tbl[domain] =
15618                                         flow_dv_tbl_resource_get(dev,
15619                                         MLX5_FLOW_TABLE_LEVEL_METER,
15620                                         egress, transfer, false, NULL, 0,
15621                                         0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15622                                         if (!mtrmng->drop_tbl[domain])
15623                                                 return -rte_mtr_error_set
15624                                         (error, ENOTSUP,
15625                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15626                                         NULL,
15627                                         "Failed to create meter drop table");
15628                                 }
15629                                 tbl_data = container_of
15630                                 (mtrmng->drop_tbl[domain],
15631                                 struct mlx5_flow_tbl_data_entry, tbl);
15632                                 if (i < MLX5_MTR_RTE_COLORS) {
15633                                         act_cnt->dr_jump_action[domain] =
15634                                                 tbl_data->jump.action;
15635                                         act_cnt->fate_action =
15636                                                 MLX5_FLOW_FATE_DROP;
15637                                 }
15638                                 if (i == RTE_COLOR_RED)
15639                                         mtr_policy->dr_drop_action[domain] =
15640                                                 tbl_data->jump.action;
15641                                 action_flags |= MLX5_FLOW_ACTION_DROP;
15642                                 break;
15643                         }
15644                         case RTE_FLOW_ACTION_TYPE_QUEUE:
15645                         {
15646                                 if (i >= MLX5_MTR_RTE_COLORS)
15647                                         return -rte_mtr_error_set(error,
15648                                         ENOTSUP,
15649                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15650                                         NULL, "cannot create policy "
15651                                         "fate queue for this color");
15652                                 act_cnt->queue =
15653                                 ((const struct rte_flow_action_queue *)
15654                                         (act->conf))->index;
15655                                 act_cnt->fate_action =
15656                                         MLX5_FLOW_FATE_QUEUE;
15657                                 dev_flow.handle->fate_action =
15658                                         MLX5_FLOW_FATE_QUEUE;
15659                                 mtr_policy->is_queue = 1;
15660                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15661                                 break;
15662                         }
15663                         case RTE_FLOW_ACTION_TYPE_RSS:
15664                         {
15665                                 int rss_size;
15666
15667                                 if (i >= MLX5_MTR_RTE_COLORS)
15668                                         return -rte_mtr_error_set(error,
15669                                           ENOTSUP,
15670                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15671                                           NULL,
15672                                           "cannot create policy "
15673                                           "rss action for this color");
15674                                 /*
15675                                  * Save RSS conf into policy struct
15676                                  * for translate stage.
15677                                  */
15678                                 rss_size = (int)rte_flow_conv
15679                                         (RTE_FLOW_CONV_OP_ACTION,
15680                                         NULL, 0, act, &flow_err);
15681                                 if (rss_size <= 0)
15682                                         return -rte_mtr_error_set(error,
15683                                           ENOTSUP,
15684                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15685                                           NULL, "Get the wrong "
15686                                           "rss action struct size");
15687                                 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15688                                                 rss_size, 0, SOCKET_ID_ANY);
15689                                 if (!act_cnt->rss)
15690                                         return -rte_mtr_error_set(error,
15691                                           ENOTSUP,
15692                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15693                                           NULL,
15694                                           "Fail to malloc rss action memory");
15695                                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15696                                         act_cnt->rss, rss_size,
15697                                         act, &flow_err);
15698                                 if (ret < 0)
15699                                         return -rte_mtr_error_set(error,
15700                                           ENOTSUP,
15701                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15702                                           NULL, "Fail to save "
15703                                           "rss action into policy struct");
15704                                 act_cnt->fate_action =
15705                                         MLX5_FLOW_FATE_SHARED_RSS;
15706                                 action_flags |= MLX5_FLOW_ACTION_RSS;
15707                                 break;
15708                         }
15709                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
15710                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
15711                         {
15712                                 struct mlx5_flow_dv_port_id_action_resource
15713                                         port_id_resource;
15714                                 uint32_t port_id = 0;
15715
15716                                 if (i >= MLX5_MTR_RTE_COLORS)
15717                                         return -rte_mtr_error_set(error,
15718                                         ENOTSUP,
15719                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15720                                         NULL, "cannot create policy "
15721                                         "port action for this color");
15722                                 memset(&port_id_resource, 0,
15723                                         sizeof(port_id_resource));
15724                                 if (flow_dv_translate_action_port_id(dev, act,
15725                                                 &port_id, &flow_err))
15726                                         return -rte_mtr_error_set(error,
15727                                         ENOTSUP,
15728                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15729                                         NULL, "cannot translate "
15730                                         "policy port action");
15731                                 port_id_resource.port_id = port_id;
15732                                 if (flow_dv_port_id_action_resource_register
15733                                         (dev, &port_id_resource,
15734                                         &dev_flow, &flow_err))
15735                                         return -rte_mtr_error_set(error,
15736                                         ENOTSUP,
15737                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15738                                         NULL, "cannot setup "
15739                                         "policy port action");
15740                                 act_cnt->rix_port_id_action =
15741                                         dev_flow.handle->rix_port_id_action;
15742                                 act_cnt->fate_action =
15743                                         MLX5_FLOW_FATE_PORT_ID;
15744                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15745                                 break;
15746                         }
15747                         case RTE_FLOW_ACTION_TYPE_JUMP:
15748                         {
15749                                 uint32_t jump_group = 0;
15750                                 uint32_t table = 0;
15751                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15752                                 struct flow_grp_info grp_info = {
15753                                         .external = !!dev_flow.external,
15754                                         .transfer = !!transfer,
15755                                         .fdb_def_rule = !!priv->fdb_def_rule,
15756                                         .std_tbl_fix = 0,
15757                                         .skip_scale = dev_flow.skip_scale &
15758                                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15759                                 };
15760                                 struct mlx5_flow_meter_sub_policy *sub_policy =
15761                                         mtr_policy->sub_policys[domain][0];
15762
15763                                 if (i >= MLX5_MTR_RTE_COLORS)
15764                                         return -rte_mtr_error_set(error,
15765                                           ENOTSUP,
15766                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15767                                           NULL,
15768                                           "cannot create policy "
15769                                           "jump action for this color");
15770                                 jump_group =
15771                                 ((const struct rte_flow_action_jump *)
15772                                                         act->conf)->group;
15773                                 if (mlx5_flow_group_to_table(dev, NULL,
15774                                                        jump_group,
15775                                                        &table,
15776                                                        &grp_info, &flow_err))
15777                                         return -rte_mtr_error_set(error,
15778                                         ENOTSUP,
15779                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15780                                         NULL, "cannot setup "
15781                                         "policy jump action");
15782                                 sub_policy->jump_tbl[i] =
15783                                 flow_dv_tbl_resource_get(dev,
15784                                         table, egress,
15785                                         transfer,
15786                                         !!dev_flow.external,
15787                                         NULL, jump_group, 0,
15788                                         0, &flow_err);
15789                                 if
15790                                 (!sub_policy->jump_tbl[i])
15791                                         return  -rte_mtr_error_set(error,
15792                                         ENOTSUP,
15793                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15794                                         NULL, "cannot create jump action.");
15795                                 tbl_data = container_of
15796                                 (sub_policy->jump_tbl[i],
15797                                 struct mlx5_flow_tbl_data_entry, tbl);
15798                                 act_cnt->dr_jump_action[domain] =
15799                                         tbl_data->jump.action;
15800                                 act_cnt->fate_action =
15801                                         MLX5_FLOW_FATE_JUMP;
15802                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
15803                                 break;
15804                         }
15805                         /*
15806                          * No need to check meter hierarchy for Y or R colors
15807                          * here since it is done in the validation stage.
15808                          */
15809                         case RTE_FLOW_ACTION_TYPE_METER:
15810                         {
15811                                 const struct rte_flow_action_meter *mtr;
15812                                 struct mlx5_flow_meter_info *next_fm;
15813                                 struct mlx5_flow_meter_policy *next_policy;
15814                                 struct rte_flow_action tag_action;
15815                                 struct mlx5_rte_flow_action_set_tag set_tag;
15816                                 uint32_t next_mtr_idx = 0;
15817
15818                                 mtr = act->conf;
15819                                 next_fm = mlx5_flow_meter_find(priv,
15820                                                         mtr->mtr_id,
15821                                                         &next_mtr_idx);
15822                                 if (!next_fm)
15823                                         return -rte_mtr_error_set(error, EINVAL,
15824                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15825                                                 "Fail to find next meter.");
15826                                 if (next_fm->def_policy)
15827                                         return -rte_mtr_error_set(error, EINVAL,
15828                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15829                                 "Hierarchy only supports termination meter.");
15830                                 next_policy = mlx5_flow_meter_policy_find(dev,
15831                                                 next_fm->policy_id, NULL);
15832                                 MLX5_ASSERT(next_policy);
15833                                 if (next_fm->drop_cnt) {
15834                                         set_tag.id =
15835                                                 (enum modify_reg)
15836                                                 mlx5_flow_get_reg_id(dev,
15837                                                 MLX5_MTR_ID,
15838                                                 0,
15839                                                 (struct rte_flow_error *)error);
15840                                         set_tag.offset = (priv->mtr_reg_share ?
15841                                                 MLX5_MTR_COLOR_BITS : 0);
15842                                         set_tag.length = (priv->mtr_reg_share ?
15843                                                MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15844                                                MLX5_REG_BITS);
15845                                         set_tag.data = next_mtr_idx;
15846                                         tag_action.type =
15847                                                 (enum rte_flow_action_type)
15848                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15849                                         tag_action.conf = &set_tag;
15850                                         if (flow_dv_convert_action_set_reg
15851                                                 (mhdr_res, &tag_action,
15852                                                 (struct rte_flow_error *)error))
15853                                                 return -rte_errno;
15854                                         action_flags |=
15855                                                 MLX5_FLOW_ACTION_SET_TAG;
15856                                 }
15857                                 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15858                                 act_cnt->next_mtr_id = next_fm->meter_id;
15859                                 act_cnt->next_sub_policy = NULL;
15860                                 mtr_policy->is_hierarchy = 1;
15861                                 mtr_policy->dev = next_policy->dev;
15862                                 action_flags |=
15863                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15864                                 break;
15865                         }
15866                         default:
15867                                 return -rte_mtr_error_set(error, ENOTSUP,
15868                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15869                                           NULL, "action type not supported");
15870                         }
15871                         if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15872                                 /* create modify action if needed. */
15873                                 dev_flow.dv.group = 1;
15874                                 if (flow_dv_modify_hdr_resource_register
15875                                         (dev, mhdr_res, &dev_flow, &flow_err))
15876                                         return -rte_mtr_error_set(error,
15877                                                 ENOTSUP,
15878                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
15879                                                 NULL, "cannot register policy "
15880                                                 "set tag action");
15881                                 act_cnt->modify_hdr =
15882                                         dev_flow.handle->dvh.modify_hdr;
15883                         }
15884                 }
15885         }
15886         return 0;
15887 }
15888
15889 /**
15890  * Create policy action per domain, lock free,
15891  * (mutex should be acquired by caller).
15892  * Dispatcher for action type specific call.
15893  *
15894  * @param[in] dev
15895  *   Pointer to the Ethernet device structure.
15896  * @param[in] mtr_policy
15897  *   Meter policy struct.
15898  * @param[in] action
15899  *   Action specification used to create meter actions.
15900  * @param[out] error
15901  *   Perform verbose error reporting if not NULL. Initialized in case of
15902  *   error only.
15903  *
15904  * @return
15905  *   0 on success, otherwise negative errno value.
15906  */
15907 static int
15908 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15909                       struct mlx5_flow_meter_policy *mtr_policy,
15910                       const struct rte_flow_action *actions[RTE_COLORS],
15911                       struct rte_mtr_error *error)
15912 {
15913         int ret, i;
15914         uint16_t sub_policy_num;
15915
15916         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15917                 sub_policy_num = (mtr_policy->sub_policy_num >>
15918                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15919                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15920                 if (sub_policy_num) {
15921                         ret = __flow_dv_create_domain_policy_acts(dev,
15922                                 mtr_policy, actions,
15923                                 (enum mlx5_meter_domain)i, error);
15924                         /* Cleaning resource is done in the caller level. */
15925                         if (ret)
15926                                 return ret;
15927                 }
15928         }
15929         return 0;
15930 }
15931
15932 /**
15933  * Query a DV flow rule for its statistics via DevX.
15934  *
15935  * @param[in] dev
15936  *   Pointer to Ethernet device.
15937  * @param[in] cnt_idx
15938  *   Index to the flow counter.
15939  * @param[out] data
15940  *   Data retrieved by the query.
15941  * @param[out] error
15942  *   Perform verbose error reporting if not NULL.
15943  *
15944  * @return
15945  *   0 on success, a negative errno value otherwise and rte_errno is set.
15946  */
15947 static int
15948 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15949                     struct rte_flow_error *error)
15950 {
15951         struct mlx5_priv *priv = dev->data->dev_private;
15952         struct rte_flow_query_count *qc = data;
15953
15954         if (!priv->sh->cdev->config.devx)
15955                 return rte_flow_error_set(error, ENOTSUP,
15956                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15957                                           NULL,
15958                                           "counters are not supported");
15959         if (cnt_idx) {
15960                 uint64_t pkts, bytes;
15961                 struct mlx5_flow_counter *cnt;
15962                 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15963
15964                 if (err)
15965                         return rte_flow_error_set(error, -err,
15966                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15967                                         NULL, "cannot read counters");
15968                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15969                 qc->hits_set = 1;
15970                 qc->bytes_set = 1;
15971                 qc->hits = pkts - cnt->hits;
15972                 qc->bytes = bytes - cnt->bytes;
15973                 if (qc->reset) {
15974                         cnt->hits = pkts;
15975                         cnt->bytes = bytes;
15976                 }
15977                 return 0;
15978         }
15979         return rte_flow_error_set(error, EINVAL,
15980                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15981                                   NULL,
15982                                   "counters are not available");
15983 }
15984
15985 int
15986 flow_dv_action_query(struct rte_eth_dev *dev,
15987                      const struct rte_flow_action_handle *handle, void *data,
15988                      struct rte_flow_error *error)
15989 {
15990         struct mlx5_age_param *age_param;
15991         struct rte_flow_query_age *resp;
15992         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15993         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15994         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15995         struct mlx5_priv *priv = dev->data->dev_private;
15996         struct mlx5_aso_ct_action *ct;
15997         uint16_t owner;
15998         uint32_t dev_idx;
15999
16000         switch (type) {
16001         case MLX5_INDIRECT_ACTION_TYPE_AGE:
16002                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
16003                 resp = data;
16004                 resp->aged = __atomic_load_n(&age_param->state,
16005                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
16006                                                                           1 : 0;
16007                 resp->sec_since_last_hit_valid = !resp->aged;
16008                 if (resp->sec_since_last_hit_valid)
16009                         resp->sec_since_last_hit = __atomic_load_n
16010                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
16011                 return 0;
16012         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
16013                 return flow_dv_query_count(dev, idx, data, error);
16014         case MLX5_INDIRECT_ACTION_TYPE_CT:
16015                 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
16016                 if (owner != PORT_ID(priv))
16017                         return rte_flow_error_set(error, EACCES,
16018                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16019                                         NULL,
16020                                         "CT object owned by another port");
16021                 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
16022                 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
16023                 MLX5_ASSERT(ct);
16024                 if (!ct->refcnt)
16025                         return rte_flow_error_set(error, EFAULT,
16026                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16027                                         NULL,
16028                                         "CT object is inactive");
16029                 ((struct rte_flow_action_conntrack *)data)->peer_port =
16030                                                         ct->peer;
16031                 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
16032                                                         ct->is_original;
16033                 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
16034                         return rte_flow_error_set(error, EIO,
16035                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16036                                         NULL,
16037                                         "Failed to query CT context");
16038                 return 0;
16039         default:
16040                 return rte_flow_error_set(error, ENOTSUP,
16041                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16042                                           "action type query not supported");
16043         }
16044 }
16045
16046 /**
16047  * Query a flow rule AGE action for aging information.
16048  *
16049  * @param[in] dev
16050  *   Pointer to Ethernet device.
16051  * @param[in] flow
16052  *   Pointer to the sub flow.
16053  * @param[out] data
16054  *   data retrieved by the query.
16055  * @param[out] error
16056  *   Perform verbose error reporting if not NULL.
16057  *
16058  * @return
16059  *   0 on success, a negative errno value otherwise and rte_errno is set.
16060  */
16061 static int
16062 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
16063                   void *data, struct rte_flow_error *error)
16064 {
16065         struct rte_flow_query_age *resp = data;
16066         struct mlx5_age_param *age_param;
16067
16068         if (flow->age) {
16069                 struct mlx5_aso_age_action *act =
16070                                      flow_aso_age_get_by_idx(dev, flow->age);
16071
16072                 age_param = &act->age_params;
16073         } else if (flow->counter) {
16074                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
16075
16076                 if (!age_param || !age_param->timeout)
16077                         return rte_flow_error_set
16078                                         (error, EINVAL,
16079                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16080                                          NULL, "cannot read age data");
16081         } else {
16082                 return rte_flow_error_set(error, EINVAL,
16083                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16084                                           NULL, "age data not available");
16085         }
16086         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
16087                                      AGE_TMOUT ? 1 : 0;
16088         resp->sec_since_last_hit_valid = !resp->aged;
16089         if (resp->sec_since_last_hit_valid)
16090                 resp->sec_since_last_hit = __atomic_load_n
16091                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
16092         return 0;
16093 }
16094
16095 /**
16096  * Query a flow.
16097  *
16098  * @see rte_flow_query()
16099  * @see rte_flow_ops
16100  */
16101 static int
16102 flow_dv_query(struct rte_eth_dev *dev,
16103               struct rte_flow *flow __rte_unused,
16104               const struct rte_flow_action *actions __rte_unused,
16105               void *data __rte_unused,
16106               struct rte_flow_error *error __rte_unused)
16107 {
16108         int ret = -EINVAL;
16109
16110         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
16111                 switch (actions->type) {
16112                 case RTE_FLOW_ACTION_TYPE_VOID:
16113                         break;
16114                 case RTE_FLOW_ACTION_TYPE_COUNT:
16115                         ret = flow_dv_query_count(dev, flow->counter, data,
16116                                                   error);
16117                         break;
16118                 case RTE_FLOW_ACTION_TYPE_AGE:
16119                         ret = flow_dv_query_age(dev, flow, data, error);
16120                         break;
16121                 default:
16122                         return rte_flow_error_set(error, ENOTSUP,
16123                                                   RTE_FLOW_ERROR_TYPE_ACTION,
16124                                                   actions,
16125                                                   "action not supported");
16126                 }
16127         }
16128         return ret;
16129 }
16130
16131 /**
16132  * Destroy the meter table set.
16133  * Lock free, (mutex should be acquired by caller).
16134  *
16135  * @param[in] dev
16136  *   Pointer to Ethernet device.
16137  * @param[in] fm
16138  *   Meter information table.
16139  */
16140 static void
16141 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
16142                         struct mlx5_flow_meter_info *fm)
16143 {
16144         struct mlx5_priv *priv = dev->data->dev_private;
16145         int i;
16146
16147         if (!fm || !priv->sh->config.dv_flow_en)
16148                 return;
16149         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16150                 if (fm->drop_rule[i]) {
16151                         claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
16152                         fm->drop_rule[i] = NULL;
16153                 }
16154         }
16155 }
16156
16157 static void
16158 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
16159 {
16160         struct mlx5_priv *priv = dev->data->dev_private;
16161         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16162         struct mlx5_flow_tbl_data_entry *tbl;
16163         int i, j;
16164
16165         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16166                 if (mtrmng->def_rule[i]) {
16167                         claim_zero(mlx5_flow_os_destroy_flow
16168                                         (mtrmng->def_rule[i]));
16169                         mtrmng->def_rule[i] = NULL;
16170                 }
16171                 if (mtrmng->def_matcher[i]) {
16172                         tbl = container_of(mtrmng->def_matcher[i]->tbl,
16173                                 struct mlx5_flow_tbl_data_entry, tbl);
16174                         mlx5_list_unregister(tbl->matchers,
16175                                              &mtrmng->def_matcher[i]->entry);
16176                         mtrmng->def_matcher[i] = NULL;
16177                 }
16178                 for (j = 0; j < MLX5_REG_BITS; j++) {
16179                         if (mtrmng->drop_matcher[i][j]) {
16180                                 tbl =
16181                                 container_of(mtrmng->drop_matcher[i][j]->tbl,
16182                                              struct mlx5_flow_tbl_data_entry,
16183                                              tbl);
16184                                 mlx5_list_unregister(tbl->matchers,
16185                                             &mtrmng->drop_matcher[i][j]->entry);
16186                                 mtrmng->drop_matcher[i][j] = NULL;
16187                         }
16188                 }
16189                 if (mtrmng->drop_tbl[i]) {
16190                         flow_dv_tbl_resource_release(MLX5_SH(dev),
16191                                 mtrmng->drop_tbl[i]);
16192                         mtrmng->drop_tbl[i] = NULL;
16193                 }
16194         }
16195 }
16196
16197 /* Number of meter flow actions, count and jump or count and drop. */
16198 #define METER_ACTIONS 2
16199
16200 static void
16201 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
16202                                     enum mlx5_meter_domain domain)
16203 {
16204         struct mlx5_priv *priv = dev->data->dev_private;
16205         struct mlx5_flow_meter_def_policy *def_policy =
16206                         priv->sh->mtrmng->def_policy[domain];
16207
16208         __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
16209         mlx5_free(def_policy);
16210         priv->sh->mtrmng->def_policy[domain] = NULL;
16211 }
16212
16213 /**
16214  * Destroy the default policy table set.
16215  *
16216  * @param[in] dev
16217  *   Pointer to Ethernet device.
16218  */
16219 static void
16220 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
16221 {
16222         struct mlx5_priv *priv = dev->data->dev_private;
16223         int i;
16224
16225         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
16226                 if (priv->sh->mtrmng->def_policy[i])
16227                         __flow_dv_destroy_domain_def_policy(dev,
16228                                         (enum mlx5_meter_domain)i);
16229         priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
16230 }
16231
16232 static int
16233 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
16234                         uint32_t color_reg_c_idx,
16235                         enum rte_color color, void *matcher_object,
16236                         int actions_n, void *actions,
16237                         bool match_src_port, const struct rte_flow_item *item,
16238                         void **rule, const struct rte_flow_attr *attr)
16239 {
16240         int ret;
16241         struct mlx5_flow_dv_match_params value = {
16242                 .size = sizeof(value.buf),
16243         };
16244         struct mlx5_flow_dv_match_params matcher = {
16245                 .size = sizeof(matcher.buf),
16246         };
16247         struct mlx5_priv *priv = dev->data->dev_private;
16248         uint8_t misc_mask;
16249
16250         if (match_src_port && priv->sh->esw_mode) {
16251                 if (flow_dv_translate_item_port_id(dev, matcher.buf,
16252                                                    value.buf, item, attr)) {
16253                         DRV_LOG(ERR, "Failed to create meter policy%d flow's"
16254                                 " value with port.", color);
16255                         return -1;
16256                 }
16257         }
16258         flow_dv_match_meta_reg(matcher.buf, value.buf,
16259                                (enum modify_reg)color_reg_c_idx,
16260                                rte_col_2_mlx5_col(color), UINT32_MAX);
16261         misc_mask = flow_dv_matcher_enable(value.buf);
16262         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16263         ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
16264                                        actions_n, actions, rule);
16265         if (ret) {
16266                 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
16267                 return -1;
16268         }
16269         return 0;
16270 }
16271
16272 static int
16273 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
16274                         uint32_t color_reg_c_idx,
16275                         uint16_t priority,
16276                         struct mlx5_flow_meter_sub_policy *sub_policy,
16277                         const struct rte_flow_attr *attr,
16278                         bool match_src_port,
16279                         const struct rte_flow_item *item,
16280                         struct mlx5_flow_dv_matcher **policy_matcher,
16281                         struct rte_flow_error *error)
16282 {
16283         struct mlx5_list_entry *entry;
16284         struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
16285         struct mlx5_flow_dv_matcher matcher = {
16286                 .mask = {
16287                         .size = sizeof(matcher.mask.buf),
16288                 },
16289                 .tbl = tbl_rsc,
16290         };
16291         struct mlx5_flow_dv_match_params value = {
16292                 .size = sizeof(value.buf),
16293         };
16294         struct mlx5_flow_cb_ctx ctx = {
16295                 .error = error,
16296                 .data = &matcher,
16297         };
16298         struct mlx5_flow_tbl_data_entry *tbl_data;
16299         struct mlx5_priv *priv = dev->data->dev_private;
16300         const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16301
16302         if (match_src_port && priv->sh->esw_mode) {
16303                 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16304                                                    value.buf, item, attr)) {
16305                         DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16306                                 " with port.", priority);
16307                         return -1;
16308                 }
16309         }
16310         tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16311         if (priority < RTE_COLOR_RED)
16312                 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16313                         (enum modify_reg)color_reg_c_idx, 0, color_mask);
16314         matcher.priority = priority;
16315         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16316                                     matcher.mask.size);
16317         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16318         if (!entry) {
16319                 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16320                 return -1;
16321         }
16322         *policy_matcher =
16323                 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16324         return 0;
16325 }
16326
16327 /**
16328  * Create the policy rules per domain.
16329  *
16330  * @param[in] dev
16331  *   Pointer to Ethernet device.
16332  * @param[in] sub_policy
16333  *    Pointer to sub policy table..
16334  * @param[in] egress
16335  *   Direction of the table.
16336  * @param[in] transfer
16337  *   E-Switch or NIC flow.
16338  * @param[in] acts
16339  *   Pointer to policy action list per color.
16340  *
16341  * @return
16342  *   0 on success, -1 otherwise.
16343  */
16344 static int
16345 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16346                 struct mlx5_flow_meter_sub_policy *sub_policy,
16347                 uint8_t egress, uint8_t transfer, bool match_src_port,
16348                 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16349 {
16350         struct mlx5_priv *priv = dev->data->dev_private;
16351         struct rte_flow_error flow_err;
16352         uint32_t color_reg_c_idx;
16353         struct rte_flow_attr attr = {
16354                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16355                 .priority = 0,
16356                 .ingress = 0,
16357                 .egress = !!egress,
16358                 .transfer = !!transfer,
16359                 .reserved = 0,
16360         };
16361         int i;
16362         int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16363         struct mlx5_sub_policy_color_rule *color_rule;
16364         bool svport_match;
16365         struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16366
16367         if (ret < 0)
16368                 return -1;
16369         /* Create policy table with POLICY level. */
16370         if (!sub_policy->tbl_rsc)
16371                 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16372                                 MLX5_FLOW_TABLE_LEVEL_POLICY,
16373                                 egress, transfer, false, NULL, 0, 0,
16374                                 sub_policy->idx, &flow_err);
16375         if (!sub_policy->tbl_rsc) {
16376                 DRV_LOG(ERR,
16377                         "Failed to create meter sub policy table.");
16378                 return -1;
16379         }
16380         /* Prepare matchers. */
16381         color_reg_c_idx = ret;
16382         for (i = 0; i < RTE_COLORS; i++) {
16383                 TAILQ_INIT(&sub_policy->color_rules[i]);
16384                 if (!acts[i].actions_n)
16385                         continue;
16386                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16387                                 sizeof(struct mlx5_sub_policy_color_rule),
16388                                 0, SOCKET_ID_ANY);
16389                 if (!color_rule) {
16390                         DRV_LOG(ERR, "No memory to create color rule.");
16391                         goto err_exit;
16392                 }
16393                 tmp_rules[i] = color_rule;
16394                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16395                                   color_rule, next_port);
16396                 color_rule->src_port = priv->representor_id;
16397                 /* No use. */
16398                 attr.priority = i;
16399                 /* Create matchers for colors. */
16400                 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16401                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16402                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16403                                 &attr, svport_match, NULL,
16404                                 &color_rule->matcher, &flow_err)) {
16405                         DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16406                         goto err_exit;
16407                 }
16408                 /* Create flow, matching color. */
16409                 if (__flow_dv_create_policy_flow(dev,
16410                                 color_reg_c_idx, (enum rte_color)i,
16411                                 color_rule->matcher->matcher_object,
16412                                 acts[i].actions_n, acts[i].dv_actions,
16413                                 svport_match, NULL, &color_rule->rule,
16414                                 &attr)) {
16415                         DRV_LOG(ERR, "Failed to create color%u rule.", i);
16416                         goto err_exit;
16417                 }
16418         }
16419         return 0;
16420 err_exit:
16421         /* All the policy rules will be cleared. */
16422         do {
16423                 color_rule = tmp_rules[i];
16424                 if (color_rule) {
16425                         if (color_rule->rule)
16426                                 mlx5_flow_os_destroy_flow(color_rule->rule);
16427                         if (color_rule->matcher) {
16428                                 struct mlx5_flow_tbl_data_entry *tbl =
16429                                         container_of(color_rule->matcher->tbl,
16430                                                      typeof(*tbl), tbl);
16431                                 mlx5_list_unregister(tbl->matchers,
16432                                                 &color_rule->matcher->entry);
16433                         }
16434                         TAILQ_REMOVE(&sub_policy->color_rules[i],
16435                                      color_rule, next_port);
16436                         mlx5_free(color_rule);
16437                 }
16438         } while (i--);
16439         return -1;
16440 }
16441
16442 static int
16443 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16444                         struct mlx5_flow_meter_policy *mtr_policy,
16445                         struct mlx5_flow_meter_sub_policy *sub_policy,
16446                         uint32_t domain)
16447 {
16448         struct mlx5_priv *priv = dev->data->dev_private;
16449         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16450         struct mlx5_flow_dv_tag_resource *tag;
16451         struct mlx5_flow_dv_port_id_action_resource *port_action;
16452         struct mlx5_hrxq *hrxq;
16453         struct mlx5_flow_meter_info *next_fm = NULL;
16454         struct mlx5_flow_meter_policy *next_policy;
16455         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16456         struct mlx5_flow_tbl_data_entry *tbl_data;
16457         struct rte_flow_error error;
16458         uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16459         uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16460         bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16461         bool match_src_port = false;
16462         int i;
16463
16464         /* If RSS or Queue, no previous actions / rules is created. */
16465         for (i = 0; i < RTE_COLORS; i++) {
16466                 acts[i].actions_n = 0;
16467                 if (i == RTE_COLOR_RED) {
16468                         /* Only support drop on red. */
16469                         acts[i].dv_actions[0] =
16470                                 mtr_policy->dr_drop_action[domain];
16471                         acts[i].actions_n = 1;
16472                         continue;
16473                 }
16474                 if (i == RTE_COLOR_GREEN &&
16475                     mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16476                         struct rte_flow_attr attr = {
16477                                 .transfer = transfer
16478                         };
16479
16480                         next_fm = mlx5_flow_meter_find(priv,
16481                                         mtr_policy->act_cnt[i].next_mtr_id,
16482                                         NULL);
16483                         if (!next_fm) {
16484                                 DRV_LOG(ERR,
16485                                         "Failed to get next hierarchy meter.");
16486                                 goto err_exit;
16487                         }
16488                         if (mlx5_flow_meter_attach(priv, next_fm,
16489                                                    &attr, &error)) {
16490                                 DRV_LOG(ERR, "%s", error.message);
16491                                 next_fm = NULL;
16492                                 goto err_exit;
16493                         }
16494                         /* Meter action must be the first for TX. */
16495                         if (mtr_first) {
16496                                 acts[i].dv_actions[acts[i].actions_n] =
16497                                         next_fm->meter_action;
16498                                 acts[i].actions_n++;
16499                         }
16500                 }
16501                 if (mtr_policy->act_cnt[i].rix_mark) {
16502                         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16503                                         mtr_policy->act_cnt[i].rix_mark);
16504                         if (!tag) {
16505                                 DRV_LOG(ERR, "Failed to find "
16506                                 "mark action for policy.");
16507                                 goto err_exit;
16508                         }
16509                         acts[i].dv_actions[acts[i].actions_n] = tag->action;
16510                         acts[i].actions_n++;
16511                 }
16512                 if (mtr_policy->act_cnt[i].modify_hdr) {
16513                         acts[i].dv_actions[acts[i].actions_n] =
16514                                 mtr_policy->act_cnt[i].modify_hdr->action;
16515                         acts[i].actions_n++;
16516                 }
16517                 if (mtr_policy->act_cnt[i].fate_action) {
16518                         switch (mtr_policy->act_cnt[i].fate_action) {
16519                         case MLX5_FLOW_FATE_PORT_ID:
16520                                 port_action = mlx5_ipool_get
16521                                         (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16522                                 mtr_policy->act_cnt[i].rix_port_id_action);
16523                                 if (!port_action) {
16524                                         DRV_LOG(ERR, "Failed to find "
16525                                                 "port action for policy.");
16526                                         goto err_exit;
16527                                 }
16528                                 acts[i].dv_actions[acts[i].actions_n] =
16529                                         port_action->action;
16530                                 acts[i].actions_n++;
16531                                 mtr_policy->dev = dev;
16532                                 match_src_port = true;
16533                                 break;
16534                         case MLX5_FLOW_FATE_DROP:
16535                         case MLX5_FLOW_FATE_JUMP:
16536                                 acts[i].dv_actions[acts[i].actions_n] =
16537                                 mtr_policy->act_cnt[i].dr_jump_action[domain];
16538                                 acts[i].actions_n++;
16539                                 break;
16540                         case MLX5_FLOW_FATE_SHARED_RSS:
16541                         case MLX5_FLOW_FATE_QUEUE:
16542                                 hrxq = mlx5_ipool_get
16543                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16544                                          sub_policy->rix_hrxq[i]);
16545                                 if (!hrxq) {
16546                                         DRV_LOG(ERR, "Failed to find "
16547                                                 "queue action for policy.");
16548                                         goto err_exit;
16549                                 }
16550                                 acts[i].dv_actions[acts[i].actions_n] =
16551                                         hrxq->action;
16552                                 acts[i].actions_n++;
16553                                 break;
16554                         case MLX5_FLOW_FATE_MTR:
16555                                 if (!next_fm) {
16556                                         DRV_LOG(ERR,
16557                                                 "No next hierarchy meter.");
16558                                         goto err_exit;
16559                                 }
16560                                 if (!mtr_first) {
16561                                         acts[i].dv_actions[acts[i].actions_n] =
16562                                                         next_fm->meter_action;
16563                                         acts[i].actions_n++;
16564                                 }
16565                                 if (mtr_policy->act_cnt[i].next_sub_policy) {
16566                                         next_sub_policy =
16567                                         mtr_policy->act_cnt[i].next_sub_policy;
16568                                 } else {
16569                                         next_policy =
16570                                                 mlx5_flow_meter_policy_find(dev,
16571                                                 next_fm->policy_id, NULL);
16572                                         MLX5_ASSERT(next_policy);
16573                                         next_sub_policy =
16574                                         next_policy->sub_policys[domain][0];
16575                                 }
16576                                 tbl_data =
16577                                         container_of(next_sub_policy->tbl_rsc,
16578                                         struct mlx5_flow_tbl_data_entry, tbl);
16579                                 acts[i].dv_actions[acts[i].actions_n++] =
16580                                                         tbl_data->jump.action;
16581                                 if (mtr_policy->act_cnt[i].modify_hdr)
16582                                         match_src_port = !!transfer;
16583                                 break;
16584                         default:
16585                                 /*Queue action do nothing*/
16586                                 break;
16587                         }
16588                 }
16589         }
16590         if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16591                                 egress, transfer, match_src_port, acts)) {
16592                 DRV_LOG(ERR,
16593                         "Failed to create policy rules per domain.");
16594                 goto err_exit;
16595         }
16596         return 0;
16597 err_exit:
16598         if (next_fm)
16599                 mlx5_flow_meter_detach(priv, next_fm);
16600         return -1;
16601 }
16602
16603 /**
16604  * Create the policy rules.
16605  *
16606  * @param[in] dev
16607  *   Pointer to Ethernet device.
16608  * @param[in,out] mtr_policy
16609  *   Pointer to meter policy table.
16610  *
16611  * @return
16612  *   0 on success, -1 otherwise.
16613  */
16614 static int
16615 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16616                              struct mlx5_flow_meter_policy *mtr_policy)
16617 {
16618         int i;
16619         uint16_t sub_policy_num;
16620
16621         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16622                 sub_policy_num = (mtr_policy->sub_policy_num >>
16623                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16624                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16625                 if (!sub_policy_num)
16626                         continue;
16627                 /* Prepare actions list and create policy rules. */
16628                 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16629                         mtr_policy->sub_policys[i][0], i)) {
16630                         DRV_LOG(ERR, "Failed to create policy action "
16631                                 "list per domain.");
16632                         return -1;
16633                 }
16634         }
16635         return 0;
16636 }
16637
16638 static int
16639 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16640 {
16641         struct mlx5_priv *priv = dev->data->dev_private;
16642         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16643         struct mlx5_flow_meter_def_policy *def_policy;
16644         struct mlx5_flow_tbl_resource *jump_tbl;
16645         struct mlx5_flow_tbl_data_entry *tbl_data;
16646         uint8_t egress, transfer;
16647         struct rte_flow_error error;
16648         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16649         int ret;
16650
16651         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16652         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16653         def_policy = mtrmng->def_policy[domain];
16654         if (!def_policy) {
16655                 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16656                         sizeof(struct mlx5_flow_meter_def_policy),
16657                         RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16658                 if (!def_policy) {
16659                         DRV_LOG(ERR, "Failed to alloc default policy table.");
16660                         goto def_policy_error;
16661                 }
16662                 mtrmng->def_policy[domain] = def_policy;
16663                 /* Create the meter suffix table with SUFFIX level. */
16664                 jump_tbl = flow_dv_tbl_resource_get(dev,
16665                                 MLX5_FLOW_TABLE_LEVEL_METER,
16666                                 egress, transfer, false, NULL, 0,
16667                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16668                 if (!jump_tbl) {
16669                         DRV_LOG(ERR,
16670                                 "Failed to create meter suffix table.");
16671                         goto def_policy_error;
16672                 }
16673                 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16674                 tbl_data = container_of(jump_tbl,
16675                                         struct mlx5_flow_tbl_data_entry, tbl);
16676                 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16677                                                 tbl_data->jump.action;
16678                 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16679                 acts[RTE_COLOR_GREEN].actions_n = 1;
16680                 /*
16681                  * YELLOW has the same default policy as GREEN does.
16682                  * G & Y share the same table and action. The 2nd time of table
16683                  * resource getting is just to update the reference count for
16684                  * the releasing stage.
16685                  */
16686                 jump_tbl = flow_dv_tbl_resource_get(dev,
16687                                 MLX5_FLOW_TABLE_LEVEL_METER,
16688                                 egress, transfer, false, NULL, 0,
16689                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16690                 if (!jump_tbl) {
16691                         DRV_LOG(ERR,
16692                                 "Failed to get meter suffix table.");
16693                         goto def_policy_error;
16694                 }
16695                 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16696                 tbl_data = container_of(jump_tbl,
16697                                         struct mlx5_flow_tbl_data_entry, tbl);
16698                 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16699                                                 tbl_data->jump.action;
16700                 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16701                 acts[RTE_COLOR_YELLOW].actions_n = 1;
16702                 /* Create jump action to the drop table. */
16703                 if (!mtrmng->drop_tbl[domain]) {
16704                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16705                                 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16706                                  egress, transfer, false, NULL, 0,
16707                                  0, MLX5_MTR_TABLE_ID_DROP, &error);
16708                         if (!mtrmng->drop_tbl[domain]) {
16709                                 DRV_LOG(ERR, "Failed to create meter "
16710                                         "drop table for default policy.");
16711                                 goto def_policy_error;
16712                         }
16713                 }
16714                 /* all RED: unique Drop table for jump action. */
16715                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16716                                         struct mlx5_flow_tbl_data_entry, tbl);
16717                 def_policy->dr_jump_action[RTE_COLOR_RED] =
16718                                                 tbl_data->jump.action;
16719                 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16720                 acts[RTE_COLOR_RED].actions_n = 1;
16721                 /* Create default policy rules. */
16722                 ret = __flow_dv_create_domain_policy_rules(dev,
16723                                         &def_policy->sub_policy,
16724                                         egress, transfer, false, acts);
16725                 if (ret) {
16726                         DRV_LOG(ERR, "Failed to create default policy rules.");
16727                         goto def_policy_error;
16728                 }
16729         }
16730         return 0;
16731 def_policy_error:
16732         __flow_dv_destroy_domain_def_policy(dev,
16733                                             (enum mlx5_meter_domain)domain);
16734         return -1;
16735 }
16736
16737 /**
16738  * Create the default policy table set.
16739  *
16740  * @param[in] dev
16741  *   Pointer to Ethernet device.
16742  * @return
16743  *   0 on success, -1 otherwise.
16744  */
16745 static int
16746 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16747 {
16748         struct mlx5_priv *priv = dev->data->dev_private;
16749         int i;
16750
16751         /* Non-termination policy table. */
16752         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16753                 if (!priv->sh->config.dv_esw_en &&
16754                     i == MLX5_MTR_DOMAIN_TRANSFER)
16755                         continue;
16756                 if (__flow_dv_create_domain_def_policy(dev, i)) {
16757                         DRV_LOG(ERR, "Failed to create default policy");
16758                         /* Rollback the created default policies for others. */
16759                         flow_dv_destroy_def_policy(dev);
16760                         return -1;
16761                 }
16762         }
16763         return 0;
16764 }
16765
16766 /**
16767  * Create the needed meter tables.
16768  * Lock free, (mutex should be acquired by caller).
16769  *
16770  * @param[in] dev
16771  *   Pointer to Ethernet device.
16772  * @param[in] fm
16773  *   Meter information table.
16774  * @param[in] mtr_idx
16775  *   Meter index.
16776  * @param[in] domain_bitmap
16777  *   Domain bitmap.
16778  * @return
16779  *   0 on success, -1 otherwise.
16780  */
16781 static int
16782 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16783                         struct mlx5_flow_meter_info *fm,
16784                         uint32_t mtr_idx,
16785                         uint8_t domain_bitmap)
16786 {
16787         struct mlx5_priv *priv = dev->data->dev_private;
16788         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16789         struct rte_flow_error error;
16790         struct mlx5_flow_tbl_data_entry *tbl_data;
16791         uint8_t egress, transfer;
16792         void *actions[METER_ACTIONS];
16793         int domain, ret, i;
16794         struct mlx5_flow_counter *cnt;
16795         struct mlx5_flow_dv_match_params value = {
16796                 .size = sizeof(value.buf),
16797         };
16798         struct mlx5_flow_dv_match_params matcher_para = {
16799                 .size = sizeof(matcher_para.buf),
16800         };
16801         int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16802                                                      0, &error);
16803         uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16804         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16805         struct mlx5_list_entry *entry;
16806         struct mlx5_flow_dv_matcher matcher = {
16807                 .mask = {
16808                         .size = sizeof(matcher.mask.buf),
16809                 },
16810         };
16811         struct mlx5_flow_dv_matcher *drop_matcher;
16812         struct mlx5_flow_cb_ctx ctx = {
16813                 .error = &error,
16814                 .data = &matcher,
16815         };
16816         uint8_t misc_mask;
16817
16818         if (!priv->mtr_en || mtr_id_reg_c < 0) {
16819                 rte_errno = ENOTSUP;
16820                 return -1;
16821         }
16822         for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16823                 if (!(domain_bitmap & (1 << domain)) ||
16824                         (mtrmng->def_rule[domain] && !fm->drop_cnt))
16825                         continue;
16826                 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16827                 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16828                 /* Create the drop table with METER DROP level. */
16829                 if (!mtrmng->drop_tbl[domain]) {
16830                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16831                                         MLX5_FLOW_TABLE_LEVEL_METER,
16832                                         egress, transfer, false, NULL, 0,
16833                                         0, MLX5_MTR_TABLE_ID_DROP, &error);
16834                         if (!mtrmng->drop_tbl[domain]) {
16835                                 DRV_LOG(ERR, "Failed to create meter drop table.");
16836                                 goto policy_error;
16837                         }
16838                 }
16839                 /* Create default matcher in drop table. */
16840                 matcher.tbl = mtrmng->drop_tbl[domain],
16841                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16842                                 struct mlx5_flow_tbl_data_entry, tbl);
16843                 if (!mtrmng->def_matcher[domain]) {
16844                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16845                                        (enum modify_reg)mtr_id_reg_c,
16846                                        0, 0);
16847                         matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16848                         matcher.crc = rte_raw_cksum
16849                                         ((const void *)matcher.mask.buf,
16850                                         matcher.mask.size);
16851                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16852                         if (!entry) {
16853                                 DRV_LOG(ERR, "Failed to register meter "
16854                                 "drop default matcher.");
16855                                 goto policy_error;
16856                         }
16857                         mtrmng->def_matcher[domain] = container_of(entry,
16858                         struct mlx5_flow_dv_matcher, entry);
16859                 }
16860                 /* Create default rule in drop table. */
16861                 if (!mtrmng->def_rule[domain]) {
16862                         i = 0;
16863                         actions[i++] = priv->sh->dr_drop_action;
16864                         flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16865                                 (enum modify_reg)mtr_id_reg_c, 0, 0);
16866                         misc_mask = flow_dv_matcher_enable(value.buf);
16867                         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16868                         ret = mlx5_flow_os_create_flow
16869                                 (mtrmng->def_matcher[domain]->matcher_object,
16870                                 (void *)&value, i, actions,
16871                                 &mtrmng->def_rule[domain]);
16872                         if (ret) {
16873                                 DRV_LOG(ERR, "Failed to create meter "
16874                                 "default drop rule for drop table.");
16875                                 goto policy_error;
16876                         }
16877                 }
16878                 if (!fm->drop_cnt)
16879                         continue;
16880                 MLX5_ASSERT(mtrmng->max_mtr_bits);
16881                 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16882                         /* Create matchers for Drop. */
16883                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16884                                         (enum modify_reg)mtr_id_reg_c, 0,
16885                                         (mtr_id_mask << mtr_id_offset));
16886                         matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16887                         matcher.crc = rte_raw_cksum
16888                                         ((const void *)matcher.mask.buf,
16889                                         matcher.mask.size);
16890                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16891                         if (!entry) {
16892                                 DRV_LOG(ERR,
16893                                 "Failed to register meter drop matcher.");
16894                                 goto policy_error;
16895                         }
16896                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16897                                 container_of(entry, struct mlx5_flow_dv_matcher,
16898                                              entry);
16899                 }
16900                 drop_matcher =
16901                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16902                 /* Create drop rule, matching meter_id only. */
16903                 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16904                                 (enum modify_reg)mtr_id_reg_c,
16905                                 (mtr_idx << mtr_id_offset), UINT32_MAX);
16906                 i = 0;
16907                 cnt = flow_dv_counter_get_by_idx(dev,
16908                                         fm->drop_cnt, NULL);
16909                 actions[i++] = cnt->action;
16910                 actions[i++] = priv->sh->dr_drop_action;
16911                 misc_mask = flow_dv_matcher_enable(value.buf);
16912                 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16913                 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16914                                                (void *)&value, i, actions,
16915                                                &fm->drop_rule[domain]);
16916                 if (ret) {
16917                         DRV_LOG(ERR, "Failed to create meter "
16918                                 "drop rule for drop table.");
16919                                 goto policy_error;
16920                 }
16921         }
16922         return 0;
16923 policy_error:
16924         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16925                 if (fm->drop_rule[i]) {
16926                         claim_zero(mlx5_flow_os_destroy_flow
16927                                 (fm->drop_rule[i]));
16928                         fm->drop_rule[i] = NULL;
16929                 }
16930         }
16931         return -1;
16932 }
16933
16934 static struct mlx5_flow_meter_sub_policy *
16935 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16936                 struct mlx5_flow_meter_policy *mtr_policy,
16937                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16938                 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16939                 bool *is_reuse)
16940 {
16941         struct mlx5_priv *priv = dev->data->dev_private;
16942         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16943         uint32_t sub_policy_idx = 0;
16944         uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16945         uint32_t i, j;
16946         struct mlx5_hrxq *hrxq;
16947         struct mlx5_flow_handle dh;
16948         struct mlx5_meter_policy_action_container *act_cnt;
16949         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16950         uint16_t sub_policy_num;
16951         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
16952
16953         MLX5_ASSERT(wks);
16954         rte_spinlock_lock(&mtr_policy->sl);
16955         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16956                 if (!rss_desc[i])
16957                         continue;
16958                 hrxq = mlx5_hrxq_get(dev, rss_desc[i]);
16959                 if (!hrxq) {
16960                         rte_spinlock_unlock(&mtr_policy->sl);
16961                         return NULL;
16962                 }
16963                 hrxq_idx[i] = hrxq->idx;
16964         }
16965         sub_policy_num = (mtr_policy->sub_policy_num >>
16966                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16967                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16968         for (j = 0; j < sub_policy_num; j++) {
16969                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16970                         if (rss_desc[i] &&
16971                             hrxq_idx[i] !=
16972                             mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16973                                 break;
16974                 }
16975                 if (i >= MLX5_MTR_RTE_COLORS) {
16976                         /*
16977                          * Found the sub policy table with
16978                          * the same queue per color.
16979                          */
16980                         rte_spinlock_unlock(&mtr_policy->sl);
16981                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16982                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
16983                         *is_reuse = true;
16984                         return mtr_policy->sub_policys[domain][j];
16985                 }
16986         }
16987         /* Create sub policy. */
16988         if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16989                 /* Reuse the first pre-allocated sub_policy. */
16990                 sub_policy = mtr_policy->sub_policys[domain][0];
16991                 sub_policy_idx = sub_policy->idx;
16992         } else {
16993                 sub_policy = mlx5_ipool_zmalloc
16994                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16995                                  &sub_policy_idx);
16996                 if (!sub_policy ||
16997                     sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16998                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16999                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
17000                         goto rss_sub_policy_error;
17001                 }
17002                 sub_policy->idx = sub_policy_idx;
17003                 sub_policy->main_policy = mtr_policy;
17004         }
17005         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17006                 if (!rss_desc[i])
17007                         continue;
17008                 sub_policy->rix_hrxq[i] = hrxq_idx[i];
17009                 if (mtr_policy->is_hierarchy) {
17010                         act_cnt = &mtr_policy->act_cnt[i];
17011                         act_cnt->next_sub_policy = next_sub_policy;
17012                         mlx5_hrxq_release(dev, hrxq_idx[i]);
17013                 } else {
17014                         /*
17015                          * Overwrite the last action from
17016                          * RSS action to Queue action.
17017                          */
17018                         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
17019                                               hrxq_idx[i]);
17020                         if (!hrxq) {
17021                                 DRV_LOG(ERR, "Failed to get policy hrxq");
17022                                 goto rss_sub_policy_error;
17023                         }
17024                         act_cnt = &mtr_policy->act_cnt[i];
17025                         if (act_cnt->rix_mark || act_cnt->modify_hdr) {
17026                                 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
17027                                 if (act_cnt->rix_mark)
17028                                         wks->mark = 1;
17029                                 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
17030                                 dh.rix_hrxq = hrxq_idx[i];
17031                                 flow_drv_rxq_flags_set(dev, &dh);
17032                         }
17033                 }
17034         }
17035         if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
17036                                                sub_policy, domain)) {
17037                 DRV_LOG(ERR, "Failed to create policy "
17038                         "rules for ingress domain.");
17039                 goto rss_sub_policy_error;
17040         }
17041         if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17042                 i = (mtr_policy->sub_policy_num >>
17043                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17044                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17045                 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
17046                         DRV_LOG(ERR, "No free sub-policy slot.");
17047                         goto rss_sub_policy_error;
17048                 }
17049                 mtr_policy->sub_policys[domain][i] = sub_policy;
17050                 i++;
17051                 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17052                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17053                 mtr_policy->sub_policy_num |=
17054                         (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17055                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17056         }
17057         rte_spinlock_unlock(&mtr_policy->sl);
17058         *is_reuse = false;
17059         return sub_policy;
17060 rss_sub_policy_error:
17061         if (sub_policy) {
17062                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
17063                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17064                         i = (mtr_policy->sub_policy_num >>
17065                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17066                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17067                         mtr_policy->sub_policys[domain][i] = NULL;
17068                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17069                                         sub_policy->idx);
17070                 }
17071         }
17072         rte_spinlock_unlock(&mtr_policy->sl);
17073         return NULL;
17074 }
17075
17076 /**
17077  * Find the policy table for prefix table with RSS.
17078  *
17079  * @param[in] dev
17080  *   Pointer to Ethernet device.
17081  * @param[in] mtr_policy
17082  *   Pointer to meter policy table.
17083  * @param[in] rss_desc
17084  *   Pointer to rss_desc
17085  * @return
17086  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
17087  */
17088 static struct mlx5_flow_meter_sub_policy *
17089 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
17090                 struct mlx5_flow_meter_policy *mtr_policy,
17091                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
17092 {
17093         struct mlx5_priv *priv = dev->data->dev_private;
17094         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17095         struct mlx5_flow_meter_info *next_fm;
17096         struct mlx5_flow_meter_policy *next_policy;
17097         struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
17098         struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
17099         struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
17100         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17101         bool reuse_sub_policy;
17102         uint32_t i = 0;
17103         uint32_t j = 0;
17104
17105         while (true) {
17106                 /* Iterate hierarchy to get all policies in this hierarchy. */
17107                 policies[i++] = mtr_policy;
17108                 if (!mtr_policy->is_hierarchy)
17109                         break;
17110                 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
17111                         DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
17112                         return NULL;
17113                 }
17114                 next_fm = mlx5_flow_meter_find(priv,
17115                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
17116                 if (!next_fm) {
17117                         DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
17118                         return NULL;
17119                 }
17120                 next_policy =
17121                         mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
17122                                                     NULL);
17123                 MLX5_ASSERT(next_policy);
17124                 mtr_policy = next_policy;
17125         }
17126         while (i) {
17127                 /**
17128                  * From last policy to the first one in hierarchy,
17129                  * create / get the sub policy for each of them.
17130                  */
17131                 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
17132                                                         policies[--i],
17133                                                         rss_desc,
17134                                                         next_sub_policy,
17135                                                         &reuse_sub_policy);
17136                 if (!sub_policy) {
17137                         DRV_LOG(ERR, "Failed to get the sub policy.");
17138                         goto err_exit;
17139                 }
17140                 if (!reuse_sub_policy)
17141                         sub_policies[j++] = sub_policy;
17142                 next_sub_policy = sub_policy;
17143         }
17144         return sub_policy;
17145 err_exit:
17146         while (j) {
17147                 uint16_t sub_policy_num;
17148
17149                 sub_policy = sub_policies[--j];
17150                 mtr_policy = sub_policy->main_policy;
17151                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
17152                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17153                         sub_policy_num = (mtr_policy->sub_policy_num >>
17154                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17155                                 MLX5_MTR_SUB_POLICY_NUM_MASK;
17156                         mtr_policy->sub_policys[domain][sub_policy_num - 1] =
17157                                                                         NULL;
17158                         sub_policy_num--;
17159                         mtr_policy->sub_policy_num &=
17160                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17161                                   (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
17162                         mtr_policy->sub_policy_num |=
17163                         (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17164                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
17165                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17166                                         sub_policy->idx);
17167                 }
17168         }
17169         return NULL;
17170 }
17171
17172 /**
17173  * Create the sub policy tag rule for all meters in hierarchy.
17174  *
17175  * @param[in] dev
17176  *   Pointer to Ethernet device.
17177  * @param[in] fm
17178  *   Meter information table.
17179  * @param[in] src_port
17180  *   The src port this extra rule should use.
17181  * @param[in] item
17182  *   The src port match item.
17183  * @param[out] error
17184  *   Perform verbose error reporting if not NULL.
17185  * @return
17186  *   0 on success, a negative errno value otherwise and rte_errno is set.
17187  */
17188 static int
17189 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
17190                                 struct mlx5_flow_meter_info *fm,
17191                                 int32_t src_port,
17192                                 const struct rte_flow_item *item,
17193                                 struct rte_flow_error *error)
17194 {
17195         struct mlx5_priv *priv = dev->data->dev_private;
17196         struct mlx5_flow_meter_policy *mtr_policy;
17197         struct mlx5_flow_meter_sub_policy *sub_policy;
17198         struct mlx5_flow_meter_info *next_fm = NULL;
17199         struct mlx5_flow_meter_policy *next_policy;
17200         struct mlx5_flow_meter_sub_policy *next_sub_policy;
17201         struct mlx5_flow_tbl_data_entry *tbl_data;
17202         struct mlx5_sub_policy_color_rule *color_rule;
17203         struct mlx5_meter_policy_acts acts;
17204         uint32_t color_reg_c_idx;
17205         bool mtr_first = (src_port != UINT16_MAX) ? true : false;
17206         struct rte_flow_attr attr = {
17207                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
17208                 .priority = 0,
17209                 .ingress = 0,
17210                 .egress = 0,
17211                 .transfer = 1,
17212                 .reserved = 0,
17213         };
17214         uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
17215         int i;
17216
17217         mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17218         MLX5_ASSERT(mtr_policy);
17219         if (!mtr_policy->is_hierarchy)
17220                 return 0;
17221         next_fm = mlx5_flow_meter_find(priv,
17222                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
17223         if (!next_fm) {
17224                 return rte_flow_error_set(error, EINVAL,
17225                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
17226                                 "Failed to find next meter in hierarchy.");
17227         }
17228         if (!next_fm->drop_cnt)
17229                 goto exit;
17230         color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
17231         sub_policy = mtr_policy->sub_policys[domain][0];
17232         for (i = 0; i < RTE_COLORS; i++) {
17233                 bool rule_exist = false;
17234                 struct mlx5_meter_policy_action_container *act_cnt;
17235
17236                 if (i >= RTE_COLOR_YELLOW)
17237                         break;
17238                 TAILQ_FOREACH(color_rule,
17239                               &sub_policy->color_rules[i], next_port)
17240                         if (color_rule->src_port == src_port) {
17241                                 rule_exist = true;
17242                                 break;
17243                         }
17244                 if (rule_exist)
17245                         continue;
17246                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
17247                                 sizeof(struct mlx5_sub_policy_color_rule),
17248                                 0, SOCKET_ID_ANY);
17249                 if (!color_rule)
17250                         return rte_flow_error_set(error, ENOMEM,
17251                                 RTE_FLOW_ERROR_TYPE_ACTION,
17252                                 NULL, "No memory to create tag color rule.");
17253                 color_rule->src_port = src_port;
17254                 attr.priority = i;
17255                 next_policy = mlx5_flow_meter_policy_find(dev,
17256                                                 next_fm->policy_id, NULL);
17257                 MLX5_ASSERT(next_policy);
17258                 next_sub_policy = next_policy->sub_policys[domain][0];
17259                 tbl_data = container_of(next_sub_policy->tbl_rsc,
17260                                         struct mlx5_flow_tbl_data_entry, tbl);
17261                 act_cnt = &mtr_policy->act_cnt[i];
17262                 if (mtr_first) {
17263                         acts.dv_actions[0] = next_fm->meter_action;
17264                         acts.dv_actions[1] = act_cnt->modify_hdr->action;
17265                 } else {
17266                         acts.dv_actions[0] = act_cnt->modify_hdr->action;
17267                         acts.dv_actions[1] = next_fm->meter_action;
17268                 }
17269                 acts.dv_actions[2] = tbl_data->jump.action;
17270                 acts.actions_n = 3;
17271                 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
17272                         next_fm = NULL;
17273                         goto err_exit;
17274                 }
17275                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
17276                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
17277                                 &attr, true, item,
17278                                 &color_rule->matcher, error)) {
17279                         rte_flow_error_set(error, errno,
17280                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17281                                 "Failed to create hierarchy meter matcher.");
17282                         goto err_exit;
17283                 }
17284                 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
17285                                         (enum rte_color)i,
17286                                         color_rule->matcher->matcher_object,
17287                                         acts.actions_n, acts.dv_actions,
17288                                         true, item,
17289                                         &color_rule->rule, &attr)) {
17290                         rte_flow_error_set(error, errno,
17291                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17292                                 "Failed to create hierarchy meter rule.");
17293                         goto err_exit;
17294                 }
17295                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
17296                                   color_rule, next_port);
17297         }
17298 exit:
17299         /**
17300          * Recursive call to iterate all meters in hierarchy and
17301          * create needed rules.
17302          */
17303         return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17304                                                 src_port, item, error);
17305 err_exit:
17306         if (color_rule) {
17307                 if (color_rule->rule)
17308                         mlx5_flow_os_destroy_flow(color_rule->rule);
17309                 if (color_rule->matcher) {
17310                         struct mlx5_flow_tbl_data_entry *tbl =
17311                                 container_of(color_rule->matcher->tbl,
17312                                                 typeof(*tbl), tbl);
17313                         mlx5_list_unregister(tbl->matchers,
17314                                                 &color_rule->matcher->entry);
17315                 }
17316                 mlx5_free(color_rule);
17317         }
17318         if (next_fm)
17319                 mlx5_flow_meter_detach(priv, next_fm);
17320         return -rte_errno;
17321 }
17322
17323 /**
17324  * Destroy the sub policy table with RX queue.
17325  *
17326  * @param[in] dev
17327  *   Pointer to Ethernet device.
17328  * @param[in] mtr_policy
17329  *   Pointer to meter policy table.
17330  */
17331 static void
17332 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17333                                     struct mlx5_flow_meter_policy *mtr_policy)
17334 {
17335         struct mlx5_priv *priv = dev->data->dev_private;
17336         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17337         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17338         uint32_t i, j;
17339         uint16_t sub_policy_num, new_policy_num;
17340
17341         rte_spinlock_lock(&mtr_policy->sl);
17342         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17343                 switch (mtr_policy->act_cnt[i].fate_action) {
17344                 case MLX5_FLOW_FATE_SHARED_RSS:
17345                         sub_policy_num = (mtr_policy->sub_policy_num >>
17346                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17347                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17348                         new_policy_num = sub_policy_num;
17349                         for (j = 0; j < sub_policy_num; j++) {
17350                                 sub_policy =
17351                                         mtr_policy->sub_policys[domain][j];
17352                                 if (sub_policy) {
17353                                         __flow_dv_destroy_sub_policy_rules(dev,
17354                                                 sub_policy);
17355                                 if (sub_policy !=
17356                                         mtr_policy->sub_policys[domain][0]) {
17357                                         mtr_policy->sub_policys[domain][j] =
17358                                                                 NULL;
17359                                         mlx5_ipool_free
17360                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17361                                                 sub_policy->idx);
17362                                                 new_policy_num--;
17363                                         }
17364                                 }
17365                         }
17366                         if (new_policy_num != sub_policy_num) {
17367                                 mtr_policy->sub_policy_num &=
17368                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17369                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17370                                 mtr_policy->sub_policy_num |=
17371                                 (new_policy_num &
17372                                         MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17373                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17374                         }
17375                         break;
17376                 case MLX5_FLOW_FATE_QUEUE:
17377                         sub_policy = mtr_policy->sub_policys[domain][0];
17378                         __flow_dv_destroy_sub_policy_rules(dev,
17379                                                            sub_policy);
17380                         break;
17381                 default:
17382                         /*Other actions without queue and do nothing*/
17383                         break;
17384                 }
17385         }
17386         rte_spinlock_unlock(&mtr_policy->sl);
17387 }
17388 /**
17389  * Check whether the DR drop action is supported on the root table or not.
17390  *
17391  * Create a simple flow with DR drop action on root table to validate
17392  * if DR drop action on root table is supported or not.
17393  *
17394  * @param[in] dev
17395  *   Pointer to rte_eth_dev structure.
17396  *
17397  * @return
17398  *   0 on success, a negative errno value otherwise and rte_errno is set.
17399  */
17400 int
17401 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17402 {
17403         struct mlx5_priv *priv = dev->data->dev_private;
17404         struct mlx5_dev_ctx_shared *sh = priv->sh;
17405         struct mlx5_flow_dv_match_params mask = {
17406                 .size = sizeof(mask.buf),
17407         };
17408         struct mlx5_flow_dv_match_params value = {
17409                 .size = sizeof(value.buf),
17410         };
17411         struct mlx5dv_flow_matcher_attr dv_attr = {
17412                 .type = IBV_FLOW_ATTR_NORMAL,
17413                 .priority = 0,
17414                 .match_criteria_enable = 0,
17415                 .match_mask = (void *)&mask,
17416         };
17417         struct mlx5_flow_tbl_resource *tbl = NULL;
17418         void *matcher = NULL;
17419         void *flow = NULL;
17420         int ret = -1;
17421
17422         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17423                                         0, 0, 0, NULL);
17424         if (!tbl)
17425                 goto err;
17426         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17427         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17428         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17429                                                tbl->obj, &matcher);
17430         if (ret)
17431                 goto err;
17432         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17433         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17434                                        &sh->dr_drop_action, &flow);
17435 err:
17436         /*
17437          * If DR drop action is not supported on root table, flow create will
17438          * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17439          */
17440         if (!flow) {
17441                 if (matcher &&
17442                     (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17443                         DRV_LOG(INFO, "DR drop action is not supported in root table.");
17444                 else
17445                         DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17446                 ret = -1;
17447         } else {
17448                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17449         }
17450         if (matcher)
17451                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17452         if (tbl)
17453                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17454         return ret;
17455 }
17456
17457 /**
17458  * Validate the batch counter support in root table.
17459  *
17460  * Create a simple flow with invalid counter and drop action on root table to
17461  * validate if batch counter with offset on root table is supported or not.
17462  *
17463  * @param[in] dev
17464  *   Pointer to rte_eth_dev structure.
17465  *
17466  * @return
17467  *   0 on success, a negative errno value otherwise and rte_errno is set.
17468  */
17469 int
17470 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17471 {
17472         struct mlx5_priv *priv = dev->data->dev_private;
17473         struct mlx5_dev_ctx_shared *sh = priv->sh;
17474         struct mlx5_flow_dv_match_params mask = {
17475                 .size = sizeof(mask.buf),
17476         };
17477         struct mlx5_flow_dv_match_params value = {
17478                 .size = sizeof(value.buf),
17479         };
17480         struct mlx5dv_flow_matcher_attr dv_attr = {
17481                 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17482                 .priority = 0,
17483                 .match_criteria_enable = 0,
17484                 .match_mask = (void *)&mask,
17485         };
17486         void *actions[2] = { 0 };
17487         struct mlx5_flow_tbl_resource *tbl = NULL;
17488         struct mlx5_devx_obj *dcs = NULL;
17489         void *matcher = NULL;
17490         void *flow = NULL;
17491         int ret = -1;
17492
17493         tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17494                                         0, 0, 0, NULL);
17495         if (!tbl)
17496                 goto err;
17497         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
17498         if (!dcs)
17499                 goto err;
17500         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17501                                                     &actions[0]);
17502         if (ret)
17503                 goto err;
17504         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17505         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17506         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17507                                                tbl->obj, &matcher);
17508         if (ret)
17509                 goto err;
17510         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17511         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17512                                        actions, &flow);
17513 err:
17514         /*
17515          * If batch counter with offset is not supported, the driver will not
17516          * validate the invalid offset value, flow create should success.
17517          * In this case, it means batch counter is not supported in root table.
17518          *
17519          * Otherwise, if flow create is failed, counter offset is supported.
17520          */
17521         if (flow) {
17522                 DRV_LOG(INFO, "Batch counter is not supported in root "
17523                               "table. Switch to fallback mode.");
17524                 rte_errno = ENOTSUP;
17525                 ret = -rte_errno;
17526                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17527         } else {
17528                 /* Check matcher to make sure validate fail at flow create. */
17529                 if (!matcher || (matcher && errno != EINVAL))
17530                         DRV_LOG(ERR, "Unexpected error in counter offset "
17531                                      "support detection");
17532                 ret = 0;
17533         }
17534         if (actions[0])
17535                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17536         if (matcher)
17537                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17538         if (tbl)
17539                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17540         if (dcs)
17541                 claim_zero(mlx5_devx_cmd_destroy(dcs));
17542         return ret;
17543 }
17544
17545 /**
17546  * Query a devx counter.
17547  *
17548  * @param[in] dev
17549  *   Pointer to the Ethernet device structure.
17550  * @param[in] cnt
17551  *   Index to the flow counter.
17552  * @param[in] clear
17553  *   Set to clear the counter statistics.
17554  * @param[out] pkts
17555  *   The statistics value of packets.
17556  * @param[out] bytes
17557  *   The statistics value of bytes.
17558  *
17559  * @return
17560  *   0 on success, otherwise return -1.
17561  */
17562 static int
17563 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17564                       uint64_t *pkts, uint64_t *bytes, void **action)
17565 {
17566         struct mlx5_priv *priv = dev->data->dev_private;
17567         struct mlx5_flow_counter *cnt;
17568         uint64_t inn_pkts, inn_bytes;
17569         int ret;
17570
17571         if (!priv->sh->cdev->config.devx)
17572                 return -1;
17573
17574         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17575         if (ret)
17576                 return -1;
17577         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17578         if (cnt && action)
17579                 *action = cnt->action;
17580
17581         *pkts = inn_pkts - cnt->hits;
17582         *bytes = inn_bytes - cnt->bytes;
17583         if (clear) {
17584                 cnt->hits = inn_pkts;
17585                 cnt->bytes = inn_bytes;
17586         }
17587         return 0;
17588 }
17589
17590 /**
17591  * Get aged-out flows.
17592  *
17593  * @param[in] dev
17594  *   Pointer to the Ethernet device structure.
17595  * @param[in] context
17596  *   The address of an array of pointers to the aged-out flows contexts.
17597  * @param[in] nb_contexts
17598  *   The length of context array pointers.
17599  * @param[out] error
17600  *   Perform verbose error reporting if not NULL. Initialized in case of
17601  *   error only.
17602  *
17603  * @return
17604  *   how many contexts get in success, otherwise negative errno value.
17605  *   if nb_contexts is 0, return the amount of all aged contexts.
17606  *   if nb_contexts is not 0 , return the amount of aged flows reported
17607  *   in the context array.
17608  * @note: only stub for now
17609  */
17610 static int
17611 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17612                     void **context,
17613                     uint32_t nb_contexts,
17614                     struct rte_flow_error *error)
17615 {
17616         struct mlx5_priv *priv = dev->data->dev_private;
17617         struct mlx5_age_info *age_info;
17618         struct mlx5_age_param *age_param;
17619         struct mlx5_flow_counter *counter;
17620         struct mlx5_aso_age_action *act;
17621         int nb_flows = 0;
17622
17623         if (nb_contexts && !context)
17624                 return rte_flow_error_set(error, EINVAL,
17625                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17626                                           NULL, "empty context");
17627         age_info = GET_PORT_AGE_INFO(priv);
17628         rte_spinlock_lock(&age_info->aged_sl);
17629         LIST_FOREACH(act, &age_info->aged_aso, next) {
17630                 nb_flows++;
17631                 if (nb_contexts) {
17632                         context[nb_flows - 1] =
17633                                                 act->age_params.context;
17634                         if (!(--nb_contexts))
17635                                 break;
17636                 }
17637         }
17638         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17639                 nb_flows++;
17640                 if (nb_contexts) {
17641                         age_param = MLX5_CNT_TO_AGE(counter);
17642                         context[nb_flows - 1] = age_param->context;
17643                         if (!(--nb_contexts))
17644                                 break;
17645                 }
17646         }
17647         rte_spinlock_unlock(&age_info->aged_sl);
17648         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17649         return nb_flows;
17650 }
17651
17652 /*
17653  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17654  */
17655 static uint32_t
17656 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17657 {
17658         return flow_dv_counter_alloc(dev, 0);
17659 }
17660
17661 /**
17662  * Validate indirect action.
17663  * Dispatcher for action type specific validation.
17664  *
17665  * @param[in] dev
17666  *   Pointer to the Ethernet device structure.
17667  * @param[in] conf
17668  *   Indirect action configuration.
17669  * @param[in] action
17670  *   The indirect action object to validate.
17671  * @param[out] error
17672  *   Perform verbose error reporting if not NULL. Initialized in case of
17673  *   error only.
17674  *
17675  * @return
17676  *   0 on success, otherwise negative errno value.
17677  */
17678 int
17679 flow_dv_action_validate(struct rte_eth_dev *dev,
17680                         const struct rte_flow_indir_action_conf *conf,
17681                         const struct rte_flow_action *action,
17682                         struct rte_flow_error *err)
17683 {
17684         struct mlx5_priv *priv = dev->data->dev_private;
17685
17686         RTE_SET_USED(conf);
17687         switch (action->type) {
17688         case RTE_FLOW_ACTION_TYPE_RSS:
17689                 /*
17690                  * priv->obj_ops is set according to driver capabilities.
17691                  * When DevX capabilities are
17692                  * sufficient, it is set to devx_obj_ops.
17693                  * Otherwise, it is set to ibv_obj_ops.
17694                  * ibv_obj_ops doesn't support ind_table_modify operation.
17695                  * In this case the indirect RSS action can't be used.
17696                  */
17697                 if (priv->obj_ops.ind_table_modify == NULL)
17698                         return rte_flow_error_set
17699                                         (err, ENOTSUP,
17700                                          RTE_FLOW_ERROR_TYPE_ACTION,
17701                                          NULL,
17702                                          "Indirect RSS action not supported");
17703                 return mlx5_validate_action_rss(dev, action, err);
17704         case RTE_FLOW_ACTION_TYPE_AGE:
17705                 if (!priv->sh->aso_age_mng)
17706                         return rte_flow_error_set(err, ENOTSUP,
17707                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17708                                                 NULL,
17709                                                 "Indirect age action not supported");
17710                 return flow_dv_validate_action_age(0, action, dev, err);
17711         case RTE_FLOW_ACTION_TYPE_COUNT:
17712                 return flow_dv_validate_action_count(dev, true, 0, err);
17713         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17714                 if (!priv->sh->ct_aso_en)
17715                         return rte_flow_error_set(err, ENOTSUP,
17716                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17717                                         "ASO CT is not supported");
17718                 return mlx5_validate_action_ct(dev, action->conf, err);
17719         default:
17720                 return rte_flow_error_set(err, ENOTSUP,
17721                                           RTE_FLOW_ERROR_TYPE_ACTION,
17722                                           NULL,
17723                                           "action type not supported");
17724         }
17725 }
17726
17727 /*
17728  * Check if the RSS configurations for colors of a meter policy match
17729  * each other, except the queues.
17730  *
17731  * @param[in] r1
17732  *   Pointer to the first RSS flow action.
17733  * @param[in] r2
17734  *   Pointer to the second RSS flow action.
17735  *
17736  * @return
17737  *   0 on match, 1 on conflict.
17738  */
17739 static inline int
17740 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17741                                const struct rte_flow_action_rss *r2)
17742 {
17743         if (r1 == NULL || r2 == NULL)
17744                 return 0;
17745         if (!(r1->level <= 1 && r2->level <= 1) &&
17746             !(r1->level > 1 && r2->level > 1))
17747                 return 1;
17748         if (r1->types != r2->types &&
17749             !((r1->types == 0 || r1->types == RTE_ETH_RSS_IP) &&
17750               (r2->types == 0 || r2->types == RTE_ETH_RSS_IP)))
17751                 return 1;
17752         if (r1->key || r2->key) {
17753                 const void *key1 = r1->key ? r1->key : rss_hash_default_key;
17754                 const void *key2 = r2->key ? r2->key : rss_hash_default_key;
17755
17756                 if (memcmp(key1, key2, MLX5_RSS_HASH_KEY_LEN))
17757                         return 1;
17758         }
17759         return 0;
17760 }
17761
17762 /**
17763  * Validate the meter hierarchy chain for meter policy.
17764  *
17765  * @param[in] dev
17766  *   Pointer to the Ethernet device structure.
17767  * @param[in] meter_id
17768  *   Meter id.
17769  * @param[in] action_flags
17770  *   Holds the actions detected until now.
17771  * @param[out] is_rss
17772  *   Is RSS or not.
17773  * @param[out] hierarchy_domain
17774  *   The domain bitmap for hierarchy policy.
17775  * @param[out] error
17776  *   Perform verbose error reporting if not NULL. Initialized in case of
17777  *   error only.
17778  *
17779  * @return
17780  *   0 on success, otherwise negative errno value with error set.
17781  */
17782 static int
17783 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17784                                   uint32_t meter_id,
17785                                   uint64_t action_flags,
17786                                   bool *is_rss,
17787                                   uint8_t *hierarchy_domain,
17788                                   struct rte_mtr_error *error)
17789 {
17790         struct mlx5_priv *priv = dev->data->dev_private;
17791         struct mlx5_flow_meter_info *fm;
17792         struct mlx5_flow_meter_policy *policy;
17793         uint8_t cnt = 1;
17794
17795         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17796                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17797                 return -rte_mtr_error_set(error, EINVAL,
17798                                         RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17799                                         NULL,
17800                                         "Multiple fate actions not supported.");
17801         *hierarchy_domain = 0;
17802         while (true) {
17803                 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17804                 if (!fm)
17805                         return -rte_mtr_error_set(error, EINVAL,
17806                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17807                                         "Meter not found in meter hierarchy.");
17808                 if (fm->def_policy)
17809                         return -rte_mtr_error_set(error, EINVAL,
17810                                         RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17811                         "Non termination meter not supported in hierarchy.");
17812                 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17813                 MLX5_ASSERT(policy);
17814                 /**
17815                  * Only inherit the supported domains of the first meter in
17816                  * hierarchy.
17817                  * One meter supports at least one domain.
17818                  */
17819                 if (!*hierarchy_domain) {
17820                         if (policy->transfer)
17821                                 *hierarchy_domain |=
17822                                                 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17823                         if (policy->ingress)
17824                                 *hierarchy_domain |=
17825                                                 MLX5_MTR_DOMAIN_INGRESS_BIT;
17826                         if (policy->egress)
17827                                 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17828                 }
17829                 if (!policy->is_hierarchy) {
17830                         *is_rss = policy->is_rss;
17831                         break;
17832                 }
17833                 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17834                 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17835                         return -rte_mtr_error_set(error, EINVAL,
17836                                         RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17837                                         "Exceed max hierarchy meter number.");
17838         }
17839         return 0;
17840 }
17841
17842 /**
17843  * Validate meter policy actions.
17844  * Dispatcher for action type specific validation.
17845  *
17846  * @param[in] dev
17847  *   Pointer to the Ethernet device structure.
17848  * @param[in] action
17849  *   The meter policy action object to validate.
17850  * @param[in] attr
17851  *   Attributes of flow to determine steering domain.
17852  * @param[out] error
17853  *   Perform verbose error reporting if not NULL. Initialized in case of
17854  *   error only.
17855  *
17856  * @return
17857  *   0 on success, otherwise negative errno value.
17858  */
17859 static int
17860 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17861                         const struct rte_flow_action *actions[RTE_COLORS],
17862                         struct rte_flow_attr *attr,
17863                         bool *is_rss,
17864                         uint8_t *domain_bitmap,
17865                         uint8_t *policy_mode,
17866                         struct rte_mtr_error *error)
17867 {
17868         struct mlx5_priv *priv = dev->data->dev_private;
17869         struct mlx5_sh_config *dev_conf = &priv->sh->config;
17870         const struct rte_flow_action *act;
17871         uint64_t action_flags[RTE_COLORS] = {0};
17872         int actions_n;
17873         int i, ret;
17874         struct rte_flow_error flow_err;
17875         uint8_t domain_color[RTE_COLORS] = {0};
17876         uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17877         uint8_t hierarchy_domain = 0;
17878         const struct rte_flow_action_meter *mtr;
17879         bool def_green = false;
17880         bool def_yellow = false;
17881         const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17882
17883         if (!dev_conf->dv_esw_en)
17884                 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17885         *domain_bitmap = def_domain;
17886         /* Red color could only support DROP action. */
17887         if (!actions[RTE_COLOR_RED] ||
17888             actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17889                 return -rte_mtr_error_set(error, ENOTSUP,
17890                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17891                                 NULL, "Red color only supports drop action.");
17892         /*
17893          * Check default policy actions:
17894          * Green / Yellow: no action, Red: drop action
17895          * Either G or Y will trigger default policy actions to be created.
17896          */
17897         if (!actions[RTE_COLOR_GREEN] ||
17898             actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17899                 def_green = true;
17900         if (!actions[RTE_COLOR_YELLOW] ||
17901             actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17902                 def_yellow = true;
17903         if (def_green && def_yellow) {
17904                 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17905                 return 0;
17906         } else if (!def_green && def_yellow) {
17907                 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17908         } else if (def_green && !def_yellow) {
17909                 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17910         } else {
17911                 *policy_mode = MLX5_MTR_POLICY_MODE_ALL;
17912         }
17913         /* Set to empty string in case of NULL pointer access by user. */
17914         flow_err.message = "";
17915         for (i = 0; i < RTE_COLORS; i++) {
17916                 act = actions[i];
17917                 for (action_flags[i] = 0, actions_n = 0;
17918                      act && act->type != RTE_FLOW_ACTION_TYPE_END;
17919                      act++) {
17920                         if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17921                                 return -rte_mtr_error_set(error, ENOTSUP,
17922                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17923                                           NULL, "too many actions");
17924                         switch (act->type) {
17925                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
17926                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
17927                                 if (!dev_conf->dv_esw_en)
17928                                         return -rte_mtr_error_set(error,
17929                                         ENOTSUP,
17930                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17931                                         NULL, "PORT action validate check"
17932                                         " fail for ESW disable");
17933                                 ret = flow_dv_validate_action_port_id(dev,
17934                                                 action_flags[i],
17935                                                 act, attr, &flow_err);
17936                                 if (ret)
17937                                         return -rte_mtr_error_set(error,
17938                                         ENOTSUP,
17939                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17940                                         NULL, flow_err.message ?
17941                                         flow_err.message :
17942                                         "PORT action validate check fail");
17943                                 ++actions_n;
17944                                 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17945                                 break;
17946                         case RTE_FLOW_ACTION_TYPE_MARK:
17947                                 ret = flow_dv_validate_action_mark(dev, act,
17948                                                            action_flags[i],
17949                                                            attr, &flow_err);
17950                                 if (ret < 0)
17951                                         return -rte_mtr_error_set(error,
17952                                         ENOTSUP,
17953                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17954                                         NULL, flow_err.message ?
17955                                         flow_err.message :
17956                                         "Mark action validate check fail");
17957                                 if (dev_conf->dv_xmeta_en !=
17958                                         MLX5_XMETA_MODE_LEGACY)
17959                                         return -rte_mtr_error_set(error,
17960                                         ENOTSUP,
17961                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17962                                         NULL, "Extend MARK action is "
17963                                         "not supported. Please try use "
17964                                         "default policy for meter.");
17965                                 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17966                                 ++actions_n;
17967                                 break;
17968                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
17969                                 ret = flow_dv_validate_action_set_tag(dev,
17970                                                         act, action_flags[i],
17971                                                         attr, &flow_err);
17972                                 if (ret)
17973                                         return -rte_mtr_error_set(error,
17974                                         ENOTSUP,
17975                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17976                                         NULL, flow_err.message ?
17977                                         flow_err.message :
17978                                         "Set tag action validate check fail");
17979                                 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17980                                 ++actions_n;
17981                                 break;
17982                         case RTE_FLOW_ACTION_TYPE_DROP:
17983                                 ret = mlx5_flow_validate_action_drop
17984                                         (action_flags[i], attr, &flow_err);
17985                                 if (ret < 0)
17986                                         return -rte_mtr_error_set(error,
17987                                         ENOTSUP,
17988                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17989                                         NULL, flow_err.message ?
17990                                         flow_err.message :
17991                                         "Drop action validate check fail");
17992                                 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17993                                 ++actions_n;
17994                                 break;
17995                         case RTE_FLOW_ACTION_TYPE_QUEUE:
17996                                 /*
17997                                  * Check whether extensive
17998                                  * metadata feature is engaged.
17999                                  */
18000                                 if (dev_conf->dv_flow_en &&
18001                                     (dev_conf->dv_xmeta_en !=
18002                                      MLX5_XMETA_MODE_LEGACY) &&
18003                                     mlx5_flow_ext_mreg_supported(dev))
18004                                         return -rte_mtr_error_set(error,
18005                                           ENOTSUP,
18006                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18007                                           NULL, "Queue action with meta "
18008                                           "is not supported. Please try use "
18009                                           "default policy for meter.");
18010                                 ret = mlx5_flow_validate_action_queue(act,
18011                                                         action_flags[i], dev,
18012                                                         attr, &flow_err);
18013                                 if (ret < 0)
18014                                         return -rte_mtr_error_set(error,
18015                                           ENOTSUP,
18016                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18017                                           NULL, flow_err.message ?
18018                                           flow_err.message :
18019                                           "Queue action validate check fail");
18020                                 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
18021                                 ++actions_n;
18022                                 break;
18023                         case RTE_FLOW_ACTION_TYPE_RSS:
18024                                 if (dev_conf->dv_flow_en &&
18025                                     (dev_conf->dv_xmeta_en !=
18026                                      MLX5_XMETA_MODE_LEGACY) &&
18027                                     mlx5_flow_ext_mreg_supported(dev))
18028                                         return -rte_mtr_error_set(error,
18029                                           ENOTSUP,
18030                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18031                                           NULL, "RSS action with meta "
18032                                           "is not supported. Please try use "
18033                                           "default policy for meter.");
18034                                 ret = mlx5_validate_action_rss(dev, act,
18035                                                                &flow_err);
18036                                 if (ret < 0)
18037                                         return -rte_mtr_error_set(error,
18038                                           ENOTSUP,
18039                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18040                                           NULL, flow_err.message ?
18041                                           flow_err.message :
18042                                           "RSS action validate check fail");
18043                                 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
18044                                 ++actions_n;
18045                                 /* Either G or Y will set the RSS. */
18046                                 rss_color[i] = act->conf;
18047                                 break;
18048                         case RTE_FLOW_ACTION_TYPE_JUMP:
18049                                 ret = flow_dv_validate_action_jump(dev,
18050                                         NULL, act, action_flags[i],
18051                                         attr, true, &flow_err);
18052                                 if (ret)
18053                                         return -rte_mtr_error_set(error,
18054                                           ENOTSUP,
18055                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18056                                           NULL, flow_err.message ?
18057                                           flow_err.message :
18058                                           "Jump action validate check fail");
18059                                 ++actions_n;
18060                                 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
18061                                 break;
18062                         /*
18063                          * Only the last meter in the hierarchy will support
18064                          * the YELLOW color steering. Then in the meter policy
18065                          * actions list, there should be no other meter inside.
18066                          */
18067                         case RTE_FLOW_ACTION_TYPE_METER:
18068                                 if (i != RTE_COLOR_GREEN)
18069                                         return -rte_mtr_error_set(error,
18070                                                 ENOTSUP,
18071                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18072                                                 NULL,
18073                                                 "Meter hierarchy only supports GREEN color.");
18074                                 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
18075                                         return -rte_mtr_error_set(error,
18076                                                 ENOTSUP,
18077                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18078                                                 NULL,
18079                                                 "No yellow policy should be provided in meter hierarchy.");
18080                                 mtr = act->conf;
18081                                 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
18082                                                         mtr->mtr_id,
18083                                                         action_flags[i],
18084                                                         is_rss,
18085                                                         &hierarchy_domain,
18086                                                         error);
18087                                 if (ret)
18088                                         return ret;
18089                                 ++actions_n;
18090                                 action_flags[i] |=
18091                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
18092                                 break;
18093                         default:
18094                                 return -rte_mtr_error_set(error, ENOTSUP,
18095                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18096                                         NULL,
18097                                         "Doesn't support optional action");
18098                         }
18099                 }
18100                 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID) {
18101                         domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
18102                 } else if ((action_flags[i] &
18103                           (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
18104                           (action_flags[i] & MLX5_FLOW_ACTION_MARK)) {
18105                         /*
18106                          * Only support MLX5_XMETA_MODE_LEGACY
18107                          * so MARK action is only in ingress domain.
18108                          */
18109                         domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
18110                 } else {
18111                         domain_color[i] = def_domain;
18112                         if (action_flags[i] &&
18113                             !(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18114                                 domain_color[i] &=
18115                                 ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
18116                 }
18117                 if (action_flags[i] &
18118                     MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
18119                         domain_color[i] &= hierarchy_domain;
18120                 /*
18121                  * Non-termination actions only support NIC Tx domain.
18122                  * The adjustion should be skipped when there is no
18123                  * action or only END is provided. The default domains
18124                  * bit-mask is set to find the MIN intersection.
18125                  * The action flags checking should also be skipped.
18126                  */
18127                 if ((def_green && i == RTE_COLOR_GREEN) ||
18128                     (def_yellow && i == RTE_COLOR_YELLOW))
18129                         continue;
18130                 /*
18131                  * Validate the drop action mutual exclusion
18132                  * with other actions. Drop action is mutually-exclusive
18133                  * with any other action, except for Count action.
18134                  */
18135                 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
18136                     (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
18137                         return -rte_mtr_error_set(error, ENOTSUP,
18138                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18139                                 NULL, "Drop action is mutually-exclusive "
18140                                 "with any other action");
18141                 }
18142                 /* Eswitch has few restrictions on using items and actions */
18143                 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
18144                         if (!mlx5_flow_ext_mreg_supported(dev) &&
18145                             action_flags[i] & MLX5_FLOW_ACTION_MARK)
18146                                 return -rte_mtr_error_set(error, ENOTSUP,
18147                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18148                                         NULL, "unsupported action MARK");
18149                         if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
18150                                 return -rte_mtr_error_set(error, ENOTSUP,
18151                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18152                                         NULL, "unsupported action QUEUE");
18153                         if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
18154                                 return -rte_mtr_error_set(error, ENOTSUP,
18155                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18156                                         NULL, "unsupported action RSS");
18157                         if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18158                                 return -rte_mtr_error_set(error, ENOTSUP,
18159                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18160                                         NULL, "no fate action is found");
18161                 } else {
18162                         if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
18163                             (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
18164                                 if ((domain_color[i] &
18165                                      MLX5_MTR_DOMAIN_EGRESS_BIT))
18166                                         domain_color[i] =
18167                                                 MLX5_MTR_DOMAIN_EGRESS_BIT;
18168                                 else
18169                                         return -rte_mtr_error_set(error,
18170                                                 ENOTSUP,
18171                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18172                                                 NULL,
18173                                                 "no fate action is found");
18174                         }
18175                 }
18176         }
18177         /* If both colors have RSS, the attributes should be the same. */
18178         if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
18179                                            rss_color[RTE_COLOR_YELLOW]))
18180                 return -rte_mtr_error_set(error, EINVAL,
18181                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18182                                           NULL, "policy RSS attr conflict");
18183         if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
18184                 *is_rss = true;
18185         /* "domain_color[C]" is non-zero for each color, default is ALL. */
18186         if (!def_green && !def_yellow &&
18187             domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
18188             !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
18189             !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
18190                 return -rte_mtr_error_set(error, EINVAL,
18191                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18192                                           NULL, "policy domains conflict");
18193         /*
18194          * At least one color policy is listed in the actions, the domains
18195          * to be supported should be the intersection.
18196          */
18197         *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
18198                          domain_color[RTE_COLOR_YELLOW];
18199         return 0;
18200 }
18201
18202 static int
18203 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
18204 {
18205         struct mlx5_priv *priv = dev->data->dev_private;
18206         int ret = 0;
18207
18208         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
18209                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
18210                                                 flags);
18211                 if (ret != 0)
18212                         return ret;
18213         }
18214         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
18215                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
18216                 if (ret != 0)
18217                         return ret;
18218         }
18219         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
18220                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
18221                 if (ret != 0)
18222                         return ret;
18223         }
18224         return 0;
18225 }
18226
18227 /**
18228  * Discover the number of available flow priorities
18229  * by trying to create a flow with the highest priority value
18230  * for each possible number.
18231  *
18232  * @param[in] dev
18233  *   Ethernet device.
18234  * @param[in] vprio
18235  *   List of possible number of available priorities.
18236  * @param[in] vprio_n
18237  *   Size of @p vprio array.
18238  * @return
18239  *   On success, number of available flow priorities.
18240  *   On failure, a negative errno-style code and rte_errno is set.
18241  */
18242 static int
18243 flow_dv_discover_priorities(struct rte_eth_dev *dev,
18244                             const uint16_t *vprio, int vprio_n)
18245 {
18246         struct mlx5_priv *priv = dev->data->dev_private;
18247         struct mlx5_indexed_pool *pool = priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW];
18248         struct rte_flow_item_eth eth;
18249         struct rte_flow_item item = {
18250                 .type = RTE_FLOW_ITEM_TYPE_ETH,
18251                 .spec = &eth,
18252                 .mask = &eth,
18253         };
18254         struct mlx5_flow_dv_matcher matcher = {
18255                 .mask = {
18256                         .size = sizeof(matcher.mask.buf),
18257                 },
18258         };
18259         union mlx5_flow_tbl_key tbl_key;
18260         struct mlx5_flow flow;
18261         void *action;
18262         struct rte_flow_error error;
18263         uint8_t misc_mask;
18264         int i, err, ret = -ENOTSUP;
18265
18266         /*
18267          * Prepare a flow with a catch-all pattern and a drop action.
18268          * Use drop queue, because shared drop action may be unavailable.
18269          */
18270         action = priv->drop_queue.hrxq->action;
18271         if (action == NULL) {
18272                 DRV_LOG(ERR, "Priority discovery requires a drop action");
18273                 rte_errno = ENOTSUP;
18274                 return -rte_errno;
18275         }
18276         memset(&flow, 0, sizeof(flow));
18277         flow.handle = mlx5_ipool_zmalloc(pool, &flow.handle_idx);
18278         if (flow.handle == NULL) {
18279                 DRV_LOG(ERR, "Cannot create flow handle");
18280                 rte_errno = ENOMEM;
18281                 return -rte_errno;
18282         }
18283         flow.ingress = true;
18284         flow.dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
18285         flow.dv.actions[0] = action;
18286         flow.dv.actions_n = 1;
18287         memset(&eth, 0, sizeof(eth));
18288         flow_dv_translate_item_eth(matcher.mask.buf, flow.dv.value.buf,
18289                                    &item, /* inner */ false, /* group */ 0);
18290         matcher.crc = rte_raw_cksum(matcher.mask.buf, matcher.mask.size);
18291         for (i = 0; i < vprio_n; i++) {
18292                 /* Configure the next proposed maximum priority. */
18293                 matcher.priority = vprio[i] - 1;
18294                 memset(&tbl_key, 0, sizeof(tbl_key));
18295                 err = flow_dv_matcher_register(dev, &matcher, &tbl_key, &flow,
18296                                                /* tunnel */ NULL,
18297                                                /* group */ 0,
18298                                                &error);
18299                 if (err != 0) {
18300                         /* This action is pure SW and must always succeed. */
18301                         DRV_LOG(ERR, "Cannot register matcher");
18302                         ret = -rte_errno;
18303                         break;
18304                 }
18305                 /* Try to apply the flow to HW. */
18306                 misc_mask = flow_dv_matcher_enable(flow.dv.value.buf);
18307                 __flow_dv_adjust_buf_size(&flow.dv.value.size, misc_mask);
18308                 err = mlx5_flow_os_create_flow
18309                                 (flow.handle->dvh.matcher->matcher_object,
18310                                  (void *)&flow.dv.value, flow.dv.actions_n,
18311                                  flow.dv.actions, &flow.handle->drv_flow);
18312                 if (err == 0) {
18313                         claim_zero(mlx5_flow_os_destroy_flow
18314                                                 (flow.handle->drv_flow));
18315                         flow.handle->drv_flow = NULL;
18316                 }
18317                 claim_zero(flow_dv_matcher_release(dev, flow.handle));
18318                 if (err != 0)
18319                         break;
18320                 ret = vprio[i];
18321         }
18322         mlx5_ipool_free(pool, flow.handle_idx);
18323         /* Set rte_errno if no expected priority value matched. */
18324         if (ret < 0)
18325                 rte_errno = -ret;
18326         return ret;
18327 }
18328
18329 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
18330         .validate = flow_dv_validate,
18331         .prepare = flow_dv_prepare,
18332         .translate = flow_dv_translate,
18333         .apply = flow_dv_apply,
18334         .remove = flow_dv_remove,
18335         .destroy = flow_dv_destroy,
18336         .query = flow_dv_query,
18337         .create_mtr_tbls = flow_dv_create_mtr_tbls,
18338         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
18339         .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
18340         .create_meter = flow_dv_mtr_alloc,
18341         .free_meter = flow_dv_aso_mtr_release_to_pool,
18342         .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
18343         .create_mtr_acts = flow_dv_create_mtr_policy_acts,
18344         .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
18345         .create_policy_rules = flow_dv_create_policy_rules,
18346         .destroy_policy_rules = flow_dv_destroy_policy_rules,
18347         .create_def_policy = flow_dv_create_def_policy,
18348         .destroy_def_policy = flow_dv_destroy_def_policy,
18349         .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
18350         .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
18351         .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
18352         .counter_alloc = flow_dv_counter_allocate,
18353         .counter_free = flow_dv_counter_free,
18354         .counter_query = flow_dv_counter_query,
18355         .get_aged_flows = flow_dv_get_aged_flows,
18356         .action_validate = flow_dv_action_validate,
18357         .action_create = flow_dv_action_create,
18358         .action_destroy = flow_dv_action_destroy,
18359         .action_update = flow_dv_action_update,
18360         .action_query = flow_dv_action_query,
18361         .sync_domain = flow_dv_sync_domain,
18362         .discover_priorities = flow_dv_discover_priorities,
18363         .item_create = flow_dv_item_create,
18364         .item_release = flow_dv_item_release,
18365 };
18366
18367 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
18368