1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018 Mellanox Technologies, Ltd
11 #include <rte_common.h>
12 #include <rte_ether.h>
13 #include <ethdev_driver.h>
15 #include <rte_flow_driver.h>
16 #include <rte_malloc.h>
17 #include <rte_cycles.h>
18 #include <rte_bus_pci.h>
21 #include <rte_vxlan.h>
23 #include <rte_eal_paging.h>
26 #include <rte_mtr_driver.h>
27 #include <rte_tailq.h>
29 #include <mlx5_glue.h>
30 #include <mlx5_devx_cmds.h>
32 #include <mlx5_malloc.h>
34 #include "mlx5_defs.h"
36 #include "mlx5_common_os.h"
37 #include "mlx5_flow.h"
38 #include "mlx5_flow_os.h"
41 #include "rte_pmd_mlx5.h"
43 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
45 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
46 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
49 #ifndef HAVE_MLX5DV_DR_ESWITCH
50 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
51 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
55 #ifndef HAVE_MLX5DV_DR
56 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
59 /* VLAN header definitions */
60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
79 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
80 struct mlx5_flow_tbl_resource *tbl);
83 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
84 uint32_t encap_decap_idx);
87 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
90 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
93 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
97 flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
99 struct mlx5_priv *priv = dev->data->dev_private;
101 if (priv->pci_dev == NULL)
103 switch (priv->pci_dev->id.device_id) {
104 case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
105 case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
106 case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
107 return (int16_t)0xfffe;
114 * Initialize flow attributes structure according to flow items' types.
116 * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
117 * mode. For tunnel mode, the items to be modified are the outermost ones.
120 * Pointer to item specification.
122 * Pointer to flow attributes structure.
123 * @param[in] dev_flow
124 * Pointer to the sub flow.
125 * @param[in] tunnel_decap
126 * Whether action is after tunnel decapsulation.
129 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
130 struct mlx5_flow *dev_flow, bool tunnel_decap)
132 uint64_t layers = dev_flow->handle->layers;
135 * If layers is already initialized, it means this dev_flow is the
136 * suffix flow, the layers flags is set by the prefix flow. Need to
137 * use the layer flags from prefix flow as the suffix flow may not
138 * have the user defined items as the flow is split.
141 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
143 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
145 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
147 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
152 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
153 uint8_t next_protocol = 0xff;
154 switch (item->type) {
155 case RTE_FLOW_ITEM_TYPE_GRE:
156 case RTE_FLOW_ITEM_TYPE_NVGRE:
157 case RTE_FLOW_ITEM_TYPE_VXLAN:
158 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
159 case RTE_FLOW_ITEM_TYPE_GENEVE:
160 case RTE_FLOW_ITEM_TYPE_MPLS:
164 case RTE_FLOW_ITEM_TYPE_IPV4:
167 if (item->mask != NULL &&
168 ((const struct rte_flow_item_ipv4 *)
169 item->mask)->hdr.next_proto_id)
171 ((const struct rte_flow_item_ipv4 *)
172 (item->spec))->hdr.next_proto_id &
173 ((const struct rte_flow_item_ipv4 *)
174 (item->mask))->hdr.next_proto_id;
175 if ((next_protocol == IPPROTO_IPIP ||
176 next_protocol == IPPROTO_IPV6) && tunnel_decap)
179 case RTE_FLOW_ITEM_TYPE_IPV6:
182 if (item->mask != NULL &&
183 ((const struct rte_flow_item_ipv6 *)
184 item->mask)->hdr.proto)
186 ((const struct rte_flow_item_ipv6 *)
187 (item->spec))->hdr.proto &
188 ((const struct rte_flow_item_ipv6 *)
189 (item->mask))->hdr.proto;
190 if ((next_protocol == IPPROTO_IPIP ||
191 next_protocol == IPPROTO_IPV6) && tunnel_decap)
194 case RTE_FLOW_ITEM_TYPE_UDP:
198 case RTE_FLOW_ITEM_TYPE_TCP:
210 * Convert rte_mtr_color to mlx5 color.
219 rte_col_2_mlx5_col(enum rte_color rcol)
222 case RTE_COLOR_GREEN:
223 return MLX5_FLOW_COLOR_GREEN;
224 case RTE_COLOR_YELLOW:
225 return MLX5_FLOW_COLOR_YELLOW;
227 return MLX5_FLOW_COLOR_RED;
231 return MLX5_FLOW_COLOR_UNDEFINED;
234 struct field_modify_info {
235 uint32_t size; /* Size of field in protocol header, in bytes. */
236 uint32_t offset; /* Offset of field in protocol header, in bytes. */
237 enum mlx5_modification_field id;
240 struct field_modify_info modify_eth[] = {
241 {4, 0, MLX5_MODI_OUT_DMAC_47_16},
242 {2, 4, MLX5_MODI_OUT_DMAC_15_0},
243 {4, 6, MLX5_MODI_OUT_SMAC_47_16},
244 {2, 10, MLX5_MODI_OUT_SMAC_15_0},
248 struct field_modify_info modify_vlan_out_first_vid[] = {
249 /* Size in bits !!! */
250 {12, 0, MLX5_MODI_OUT_FIRST_VID},
254 struct field_modify_info modify_ipv4[] = {
255 {1, 1, MLX5_MODI_OUT_IP_DSCP},
256 {1, 8, MLX5_MODI_OUT_IPV4_TTL},
257 {4, 12, MLX5_MODI_OUT_SIPV4},
258 {4, 16, MLX5_MODI_OUT_DIPV4},
262 struct field_modify_info modify_ipv6[] = {
263 {1, 0, MLX5_MODI_OUT_IP_DSCP},
264 {1, 7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
265 {4, 8, MLX5_MODI_OUT_SIPV6_127_96},
266 {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
267 {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
268 {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
269 {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
270 {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
271 {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
272 {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
276 struct field_modify_info modify_udp[] = {
277 {2, 0, MLX5_MODI_OUT_UDP_SPORT},
278 {2, 2, MLX5_MODI_OUT_UDP_DPORT},
282 struct field_modify_info modify_tcp[] = {
283 {2, 0, MLX5_MODI_OUT_TCP_SPORT},
284 {2, 2, MLX5_MODI_OUT_TCP_DPORT},
285 {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
286 {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
291 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
292 uint8_t next_protocol, uint64_t *item_flags,
295 MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
296 item->type == RTE_FLOW_ITEM_TYPE_IPV6);
297 if (next_protocol == IPPROTO_IPIP) {
298 *item_flags |= MLX5_FLOW_LAYER_IPIP;
301 if (next_protocol == IPPROTO_IPV6) {
302 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
307 static inline struct mlx5_hlist *
308 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
309 const char *name, uint32_t size, bool direct_key,
310 bool lcores_share, void *ctx,
311 mlx5_list_create_cb cb_create,
312 mlx5_list_match_cb cb_match,
313 mlx5_list_remove_cb cb_remove,
314 mlx5_list_clone_cb cb_clone,
315 mlx5_list_clone_free_cb cb_clone_free)
317 struct mlx5_hlist *hl;
318 struct mlx5_hlist *expected = NULL;
319 char s[MLX5_NAME_SIZE];
321 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
324 snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
325 hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
326 ctx, cb_create, cb_match, cb_remove, cb_clone,
329 DRV_LOG(ERR, "%s hash creation failed", name);
333 if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
336 mlx5_hlist_destroy(hl);
337 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
342 /* Update VLAN's VID/PCP based on input rte_flow_action.
345 * Pointer to struct rte_flow_action.
347 * Pointer to struct rte_vlan_hdr.
350 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
351 struct rte_vlan_hdr *vlan)
354 if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
356 ((const struct rte_flow_action_of_set_vlan_pcp *)
357 action->conf)->vlan_pcp;
358 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
359 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
360 vlan->vlan_tci |= vlan_tci;
361 } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
362 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
363 vlan->vlan_tci |= rte_be_to_cpu_16
364 (((const struct rte_flow_action_of_set_vlan_vid *)
365 action->conf)->vlan_vid);
370 * Fetch 1, 2, 3 or 4 byte field from the byte array
371 * and return as unsigned integer in host-endian format.
374 * Pointer to data array.
376 * Size of field to extract.
379 * converted field in host endian format.
381 static inline uint32_t
382 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
391 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
394 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
395 ret = (ret << 8) | *(data + sizeof(uint16_t));
398 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
409 * Convert modify-header action to DV specification.
411 * Data length of each action is determined by provided field description
412 * and the item mask. Data bit offset and width of each action is determined
413 * by provided item mask.
416 * Pointer to item specification.
418 * Pointer to field modification information.
419 * For MLX5_MODIFICATION_TYPE_SET specifies destination field.
420 * For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
421 * For MLX5_MODIFICATION_TYPE_COPY specifies source field.
423 * Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
424 * Negative offset value sets the same offset as source offset.
425 * size field is ignored, value is taken from source field.
426 * @param[in,out] resource
427 * Pointer to the modify-header resource.
429 * Type of modification.
431 * Pointer to the error structure.
434 * 0 on success, a negative errno value otherwise and rte_errno is set.
437 flow_dv_convert_modify_action(struct rte_flow_item *item,
438 struct field_modify_info *field,
439 struct field_modify_info *dcopy,
440 struct mlx5_flow_dv_modify_hdr_resource *resource,
441 uint32_t type, struct rte_flow_error *error)
443 uint32_t i = resource->actions_num;
444 struct mlx5_modification_cmd *actions = resource->actions;
445 uint32_t carry_b = 0;
448 * The item and mask are provided in big-endian format.
449 * The fields should be presented as in big-endian format either.
450 * Mask must be always present, it defines the actual field width.
452 MLX5_ASSERT(item->mask);
453 MLX5_ASSERT(field->size);
459 bool next_field = true;
460 bool next_dcopy = true;
462 if (i >= MLX5_MAX_MODIFY_NUM)
463 return rte_flow_error_set(error, EINVAL,
464 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
465 "too many items to modify");
466 /* Fetch variable byte size mask from the array. */
467 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
468 field->offset, field->size);
473 /* Deduce actual data width in bits from mask value. */
474 off_b = rte_bsf32(mask) + carry_b;
475 size_b = sizeof(uint32_t) * CHAR_BIT -
476 off_b - __builtin_clz(mask);
478 actions[i] = (struct mlx5_modification_cmd) {
482 .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
485 if (type == MLX5_MODIFICATION_TYPE_COPY) {
487 actions[i].dst_field = dcopy->id;
488 actions[i].dst_offset =
489 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
490 /* Convert entire record to big-endian format. */
491 actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
493 * Destination field overflow. Copy leftovers of
494 * a source field to the next destination field.
497 if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
500 dcopy->size * CHAR_BIT - dcopy->offset;
501 carry_b = actions[i].length;
505 * Not enough bits in a source filed to fill a
506 * destination field. Switch to the next source.
508 if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
509 (size_b == field->size * CHAR_BIT - off_b)) {
511 field->size * CHAR_BIT - off_b;
512 dcopy->offset += actions[i].length;
518 MLX5_ASSERT(item->spec);
519 data = flow_dv_fetch_field((const uint8_t *)item->spec +
520 field->offset, field->size);
521 /* Shift out the trailing masked bits from data. */
522 data = (data & mask) >> off_b;
523 actions[i].data1 = rte_cpu_to_be_32(data);
525 /* Convert entire record to expected big-endian format. */
526 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
530 } while (field->size);
531 if (resource->actions_num == i)
532 return rte_flow_error_set(error, EINVAL,
533 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
534 "invalid modification flow item");
535 resource->actions_num = i;
540 * Convert modify-header set IPv4 address action to DV specification.
542 * @param[in,out] resource
543 * Pointer to the modify-header resource.
545 * Pointer to action specification.
547 * Pointer to the error structure.
550 * 0 on success, a negative errno value otherwise and rte_errno is set.
553 flow_dv_convert_action_modify_ipv4
554 (struct mlx5_flow_dv_modify_hdr_resource *resource,
555 const struct rte_flow_action *action,
556 struct rte_flow_error *error)
558 const struct rte_flow_action_set_ipv4 *conf =
559 (const struct rte_flow_action_set_ipv4 *)(action->conf);
560 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
561 struct rte_flow_item_ipv4 ipv4;
562 struct rte_flow_item_ipv4 ipv4_mask;
564 memset(&ipv4, 0, sizeof(ipv4));
565 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
566 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
567 ipv4.hdr.src_addr = conf->ipv4_addr;
568 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
570 ipv4.hdr.dst_addr = conf->ipv4_addr;
571 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
574 item.mask = &ipv4_mask;
575 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
576 MLX5_MODIFICATION_TYPE_SET, error);
580 * Convert modify-header set IPv6 address action to DV specification.
582 * @param[in,out] resource
583 * Pointer to the modify-header resource.
585 * Pointer to action specification.
587 * Pointer to the error structure.
590 * 0 on success, a negative errno value otherwise and rte_errno is set.
593 flow_dv_convert_action_modify_ipv6
594 (struct mlx5_flow_dv_modify_hdr_resource *resource,
595 const struct rte_flow_action *action,
596 struct rte_flow_error *error)
598 const struct rte_flow_action_set_ipv6 *conf =
599 (const struct rte_flow_action_set_ipv6 *)(action->conf);
600 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
601 struct rte_flow_item_ipv6 ipv6;
602 struct rte_flow_item_ipv6 ipv6_mask;
604 memset(&ipv6, 0, sizeof(ipv6));
605 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
606 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
607 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
608 sizeof(ipv6.hdr.src_addr));
609 memcpy(&ipv6_mask.hdr.src_addr,
610 &rte_flow_item_ipv6_mask.hdr.src_addr,
611 sizeof(ipv6.hdr.src_addr));
613 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
614 sizeof(ipv6.hdr.dst_addr));
615 memcpy(&ipv6_mask.hdr.dst_addr,
616 &rte_flow_item_ipv6_mask.hdr.dst_addr,
617 sizeof(ipv6.hdr.dst_addr));
620 item.mask = &ipv6_mask;
621 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
622 MLX5_MODIFICATION_TYPE_SET, error);
626 * Convert modify-header set MAC address action to DV specification.
628 * @param[in,out] resource
629 * Pointer to the modify-header resource.
631 * Pointer to action specification.
633 * Pointer to the error structure.
636 * 0 on success, a negative errno value otherwise and rte_errno is set.
639 flow_dv_convert_action_modify_mac
640 (struct mlx5_flow_dv_modify_hdr_resource *resource,
641 const struct rte_flow_action *action,
642 struct rte_flow_error *error)
644 const struct rte_flow_action_set_mac *conf =
645 (const struct rte_flow_action_set_mac *)(action->conf);
646 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
647 struct rte_flow_item_eth eth;
648 struct rte_flow_item_eth eth_mask;
650 memset(ð, 0, sizeof(eth));
651 memset(ð_mask, 0, sizeof(eth_mask));
652 if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
653 memcpy(ð.src.addr_bytes, &conf->mac_addr,
654 sizeof(eth.src.addr_bytes));
655 memcpy(ð_mask.src.addr_bytes,
656 &rte_flow_item_eth_mask.src.addr_bytes,
657 sizeof(eth_mask.src.addr_bytes));
659 memcpy(ð.dst.addr_bytes, &conf->mac_addr,
660 sizeof(eth.dst.addr_bytes));
661 memcpy(ð_mask.dst.addr_bytes,
662 &rte_flow_item_eth_mask.dst.addr_bytes,
663 sizeof(eth_mask.dst.addr_bytes));
666 item.mask = ð_mask;
667 return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
668 MLX5_MODIFICATION_TYPE_SET, error);
672 * Convert modify-header set VLAN VID action to DV specification.
674 * @param[in,out] resource
675 * Pointer to the modify-header resource.
677 * Pointer to action specification.
679 * Pointer to the error structure.
682 * 0 on success, a negative errno value otherwise and rte_errno is set.
685 flow_dv_convert_action_modify_vlan_vid
686 (struct mlx5_flow_dv_modify_hdr_resource *resource,
687 const struct rte_flow_action *action,
688 struct rte_flow_error *error)
690 const struct rte_flow_action_of_set_vlan_vid *conf =
691 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
692 int i = resource->actions_num;
693 struct mlx5_modification_cmd *actions = resource->actions;
694 struct field_modify_info *field = modify_vlan_out_first_vid;
696 if (i >= MLX5_MAX_MODIFY_NUM)
697 return rte_flow_error_set(error, EINVAL,
698 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
699 "too many items to modify");
700 actions[i] = (struct mlx5_modification_cmd) {
701 .action_type = MLX5_MODIFICATION_TYPE_SET,
703 .length = field->size,
704 .offset = field->offset,
706 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
707 actions[i].data1 = conf->vlan_vid;
708 actions[i].data1 = actions[i].data1 << 16;
709 resource->actions_num = ++i;
714 * Convert modify-header set TP action to DV specification.
716 * @param[in,out] resource
717 * Pointer to the modify-header resource.
719 * Pointer to action specification.
721 * Pointer to rte_flow_item objects list.
723 * Pointer to flow attributes structure.
724 * @param[in] dev_flow
725 * Pointer to the sub flow.
726 * @param[in] tunnel_decap
727 * Whether action is after tunnel decapsulation.
729 * Pointer to the error structure.
732 * 0 on success, a negative errno value otherwise and rte_errno is set.
735 flow_dv_convert_action_modify_tp
736 (struct mlx5_flow_dv_modify_hdr_resource *resource,
737 const struct rte_flow_action *action,
738 const struct rte_flow_item *items,
739 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
740 bool tunnel_decap, struct rte_flow_error *error)
742 const struct rte_flow_action_set_tp *conf =
743 (const struct rte_flow_action_set_tp *)(action->conf);
744 struct rte_flow_item item;
745 struct rte_flow_item_udp udp;
746 struct rte_flow_item_udp udp_mask;
747 struct rte_flow_item_tcp tcp;
748 struct rte_flow_item_tcp tcp_mask;
749 struct field_modify_info *field;
752 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
754 memset(&udp, 0, sizeof(udp));
755 memset(&udp_mask, 0, sizeof(udp_mask));
756 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
757 udp.hdr.src_port = conf->port;
758 udp_mask.hdr.src_port =
759 rte_flow_item_udp_mask.hdr.src_port;
761 udp.hdr.dst_port = conf->port;
762 udp_mask.hdr.dst_port =
763 rte_flow_item_udp_mask.hdr.dst_port;
765 item.type = RTE_FLOW_ITEM_TYPE_UDP;
767 item.mask = &udp_mask;
770 MLX5_ASSERT(attr->tcp);
771 memset(&tcp, 0, sizeof(tcp));
772 memset(&tcp_mask, 0, sizeof(tcp_mask));
773 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
774 tcp.hdr.src_port = conf->port;
775 tcp_mask.hdr.src_port =
776 rte_flow_item_tcp_mask.hdr.src_port;
778 tcp.hdr.dst_port = conf->port;
779 tcp_mask.hdr.dst_port =
780 rte_flow_item_tcp_mask.hdr.dst_port;
782 item.type = RTE_FLOW_ITEM_TYPE_TCP;
784 item.mask = &tcp_mask;
787 return flow_dv_convert_modify_action(&item, field, NULL, resource,
788 MLX5_MODIFICATION_TYPE_SET, error);
792 * Convert modify-header set TTL action to DV specification.
794 * @param[in,out] resource
795 * Pointer to the modify-header resource.
797 * Pointer to action specification.
799 * Pointer to rte_flow_item objects list.
801 * Pointer to flow attributes structure.
802 * @param[in] dev_flow
803 * Pointer to the sub flow.
804 * @param[in] tunnel_decap
805 * Whether action is after tunnel decapsulation.
807 * Pointer to the error structure.
810 * 0 on success, a negative errno value otherwise and rte_errno is set.
813 flow_dv_convert_action_modify_ttl
814 (struct mlx5_flow_dv_modify_hdr_resource *resource,
815 const struct rte_flow_action *action,
816 const struct rte_flow_item *items,
817 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
818 bool tunnel_decap, struct rte_flow_error *error)
820 const struct rte_flow_action_set_ttl *conf =
821 (const struct rte_flow_action_set_ttl *)(action->conf);
822 struct rte_flow_item item;
823 struct rte_flow_item_ipv4 ipv4;
824 struct rte_flow_item_ipv4 ipv4_mask;
825 struct rte_flow_item_ipv6 ipv6;
826 struct rte_flow_item_ipv6 ipv6_mask;
827 struct field_modify_info *field;
830 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
832 memset(&ipv4, 0, sizeof(ipv4));
833 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
834 ipv4.hdr.time_to_live = conf->ttl_value;
835 ipv4_mask.hdr.time_to_live = 0xFF;
836 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
838 item.mask = &ipv4_mask;
841 MLX5_ASSERT(attr->ipv6);
842 memset(&ipv6, 0, sizeof(ipv6));
843 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
844 ipv6.hdr.hop_limits = conf->ttl_value;
845 ipv6_mask.hdr.hop_limits = 0xFF;
846 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
848 item.mask = &ipv6_mask;
851 return flow_dv_convert_modify_action(&item, field, NULL, resource,
852 MLX5_MODIFICATION_TYPE_SET, error);
856 * Convert modify-header decrement TTL action to DV specification.
858 * @param[in,out] resource
859 * Pointer to the modify-header resource.
861 * Pointer to action specification.
863 * Pointer to rte_flow_item objects list.
865 * Pointer to flow attributes structure.
866 * @param[in] dev_flow
867 * Pointer to the sub flow.
868 * @param[in] tunnel_decap
869 * Whether action is after tunnel decapsulation.
871 * Pointer to the error structure.
874 * 0 on success, a negative errno value otherwise and rte_errno is set.
877 flow_dv_convert_action_modify_dec_ttl
878 (struct mlx5_flow_dv_modify_hdr_resource *resource,
879 const struct rte_flow_item *items,
880 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
881 bool tunnel_decap, struct rte_flow_error *error)
883 struct rte_flow_item item;
884 struct rte_flow_item_ipv4 ipv4;
885 struct rte_flow_item_ipv4 ipv4_mask;
886 struct rte_flow_item_ipv6 ipv6;
887 struct rte_flow_item_ipv6 ipv6_mask;
888 struct field_modify_info *field;
891 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
893 memset(&ipv4, 0, sizeof(ipv4));
894 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
895 ipv4.hdr.time_to_live = 0xFF;
896 ipv4_mask.hdr.time_to_live = 0xFF;
897 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
899 item.mask = &ipv4_mask;
902 MLX5_ASSERT(attr->ipv6);
903 memset(&ipv6, 0, sizeof(ipv6));
904 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
905 ipv6.hdr.hop_limits = 0xFF;
906 ipv6_mask.hdr.hop_limits = 0xFF;
907 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
909 item.mask = &ipv6_mask;
912 return flow_dv_convert_modify_action(&item, field, NULL, resource,
913 MLX5_MODIFICATION_TYPE_ADD, error);
917 * Convert modify-header increment/decrement TCP Sequence number
918 * to DV specification.
920 * @param[in,out] resource
921 * Pointer to the modify-header resource.
923 * Pointer to action specification.
925 * Pointer to the error structure.
928 * 0 on success, a negative errno value otherwise and rte_errno is set.
931 flow_dv_convert_action_modify_tcp_seq
932 (struct mlx5_flow_dv_modify_hdr_resource *resource,
933 const struct rte_flow_action *action,
934 struct rte_flow_error *error)
936 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
937 uint64_t value = rte_be_to_cpu_32(*conf);
938 struct rte_flow_item item;
939 struct rte_flow_item_tcp tcp;
940 struct rte_flow_item_tcp tcp_mask;
942 memset(&tcp, 0, sizeof(tcp));
943 memset(&tcp_mask, 0, sizeof(tcp_mask));
944 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
946 * The HW has no decrement operation, only increment operation.
947 * To simulate decrement X from Y using increment operation
948 * we need to add UINT32_MAX X times to Y.
949 * Each adding of UINT32_MAX decrements Y by 1.
952 tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
953 tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
954 item.type = RTE_FLOW_ITEM_TYPE_TCP;
956 item.mask = &tcp_mask;
957 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
958 MLX5_MODIFICATION_TYPE_ADD, error);
962 * Convert modify-header increment/decrement TCP Acknowledgment number
963 * to DV specification.
965 * @param[in,out] resource
966 * Pointer to the modify-header resource.
968 * Pointer to action specification.
970 * Pointer to the error structure.
973 * 0 on success, a negative errno value otherwise and rte_errno is set.
976 flow_dv_convert_action_modify_tcp_ack
977 (struct mlx5_flow_dv_modify_hdr_resource *resource,
978 const struct rte_flow_action *action,
979 struct rte_flow_error *error)
981 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
982 uint64_t value = rte_be_to_cpu_32(*conf);
983 struct rte_flow_item item;
984 struct rte_flow_item_tcp tcp;
985 struct rte_flow_item_tcp tcp_mask;
987 memset(&tcp, 0, sizeof(tcp));
988 memset(&tcp_mask, 0, sizeof(tcp_mask));
989 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
991 * The HW has no decrement operation, only increment operation.
992 * To simulate decrement X from Y using increment operation
993 * we need to add UINT32_MAX X times to Y.
994 * Each adding of UINT32_MAX decrements Y by 1.
997 tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
998 tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
999 item.type = RTE_FLOW_ITEM_TYPE_TCP;
1001 item.mask = &tcp_mask;
1002 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1003 MLX5_MODIFICATION_TYPE_ADD, error);
1006 static enum mlx5_modification_field reg_to_field[] = {
1007 [REG_NON] = MLX5_MODI_OUT_NONE,
1008 [REG_A] = MLX5_MODI_META_DATA_REG_A,
1009 [REG_B] = MLX5_MODI_META_DATA_REG_B,
1010 [REG_C_0] = MLX5_MODI_META_REG_C_0,
1011 [REG_C_1] = MLX5_MODI_META_REG_C_1,
1012 [REG_C_2] = MLX5_MODI_META_REG_C_2,
1013 [REG_C_3] = MLX5_MODI_META_REG_C_3,
1014 [REG_C_4] = MLX5_MODI_META_REG_C_4,
1015 [REG_C_5] = MLX5_MODI_META_REG_C_5,
1016 [REG_C_6] = MLX5_MODI_META_REG_C_6,
1017 [REG_C_7] = MLX5_MODI_META_REG_C_7,
1021 * Convert register set to DV specification.
1023 * @param[in,out] resource
1024 * Pointer to the modify-header resource.
1026 * Pointer to action specification.
1028 * Pointer to the error structure.
1031 * 0 on success, a negative errno value otherwise and rte_errno is set.
1034 flow_dv_convert_action_set_reg
1035 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1036 const struct rte_flow_action *action,
1037 struct rte_flow_error *error)
1039 const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1040 struct mlx5_modification_cmd *actions = resource->actions;
1041 uint32_t i = resource->actions_num;
1043 if (i >= MLX5_MAX_MODIFY_NUM)
1044 return rte_flow_error_set(error, EINVAL,
1045 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1046 "too many items to modify");
1047 MLX5_ASSERT(conf->id != REG_NON);
1048 MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1049 actions[i] = (struct mlx5_modification_cmd) {
1050 .action_type = MLX5_MODIFICATION_TYPE_SET,
1051 .field = reg_to_field[conf->id],
1052 .offset = conf->offset,
1053 .length = conf->length,
1055 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1056 actions[i].data1 = rte_cpu_to_be_32(conf->data);
1058 resource->actions_num = i;
1063 * Convert SET_TAG action to DV specification.
1066 * Pointer to the rte_eth_dev structure.
1067 * @param[in,out] resource
1068 * Pointer to the modify-header resource.
1070 * Pointer to action specification.
1072 * Pointer to the error structure.
1075 * 0 on success, a negative errno value otherwise and rte_errno is set.
1078 flow_dv_convert_action_set_tag
1079 (struct rte_eth_dev *dev,
1080 struct mlx5_flow_dv_modify_hdr_resource *resource,
1081 const struct rte_flow_action_set_tag *conf,
1082 struct rte_flow_error *error)
1084 rte_be32_t data = rte_cpu_to_be_32(conf->data);
1085 rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1086 struct rte_flow_item item = {
1090 struct field_modify_info reg_c_x[] = {
1093 enum mlx5_modification_field reg_type;
1096 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1099 MLX5_ASSERT(ret != REG_NON);
1100 MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1101 reg_type = reg_to_field[ret];
1102 MLX5_ASSERT(reg_type > 0);
1103 reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1104 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1105 MLX5_MODIFICATION_TYPE_SET, error);
1109 * Convert internal COPY_REG action to DV specification.
1112 * Pointer to the rte_eth_dev structure.
1113 * @param[in,out] res
1114 * Pointer to the modify-header resource.
1116 * Pointer to action specification.
1118 * Pointer to the error structure.
1121 * 0 on success, a negative errno value otherwise and rte_errno is set.
1124 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1125 struct mlx5_flow_dv_modify_hdr_resource *res,
1126 const struct rte_flow_action *action,
1127 struct rte_flow_error *error)
1129 const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1130 rte_be32_t mask = RTE_BE32(UINT32_MAX);
1131 struct rte_flow_item item = {
1135 struct field_modify_info reg_src[] = {
1136 {4, 0, reg_to_field[conf->src]},
1139 struct field_modify_info reg_dst = {
1141 .id = reg_to_field[conf->dst],
1143 /* Adjust reg_c[0] usage according to reported mask. */
1144 if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1145 struct mlx5_priv *priv = dev->data->dev_private;
1146 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1148 MLX5_ASSERT(reg_c0);
1149 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1150 if (conf->dst == REG_C_0) {
1151 /* Copy to reg_c[0], within mask only. */
1152 reg_dst.offset = rte_bsf32(reg_c0);
1153 mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1156 mask = rte_cpu_to_be_32(reg_c0);
1159 return flow_dv_convert_modify_action(&item,
1160 reg_src, ®_dst, res,
1161 MLX5_MODIFICATION_TYPE_COPY,
1166 * Convert MARK action to DV specification. This routine is used
1167 * in extensive metadata only and requires metadata register to be
1168 * handled. In legacy mode hardware tag resource is engaged.
1171 * Pointer to the rte_eth_dev structure.
1173 * Pointer to MARK action specification.
1174 * @param[in,out] resource
1175 * Pointer to the modify-header resource.
1177 * Pointer to the error structure.
1180 * 0 on success, a negative errno value otherwise and rte_errno is set.
1183 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1184 const struct rte_flow_action_mark *conf,
1185 struct mlx5_flow_dv_modify_hdr_resource *resource,
1186 struct rte_flow_error *error)
1188 struct mlx5_priv *priv = dev->data->dev_private;
1189 rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1190 priv->sh->dv_mark_mask);
1191 rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1192 struct rte_flow_item item = {
1196 struct field_modify_info reg_c_x[] = {
1202 return rte_flow_error_set(error, EINVAL,
1203 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1204 NULL, "zero mark action mask");
1205 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1208 MLX5_ASSERT(reg > 0);
1209 if (reg == REG_C_0) {
1210 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1211 uint32_t shl_c0 = rte_bsf32(msk_c0);
1213 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1214 mask = rte_cpu_to_be_32(mask) & msk_c0;
1215 mask = rte_cpu_to_be_32(mask << shl_c0);
1217 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1218 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1219 MLX5_MODIFICATION_TYPE_SET, error);
1223 * Get metadata register index for specified steering domain.
1226 * Pointer to the rte_eth_dev structure.
1228 * Attributes of flow to determine steering domain.
1230 * Pointer to the error structure.
1233 * positive index on success, a negative errno value otherwise
1234 * and rte_errno is set.
1236 static enum modify_reg
1237 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1238 const struct rte_flow_attr *attr,
1239 struct rte_flow_error *error)
1242 mlx5_flow_get_reg_id(dev, attr->transfer ?
1246 MLX5_METADATA_RX, 0, error);
1248 return rte_flow_error_set(error,
1249 ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1250 NULL, "unavailable "
1251 "metadata register");
1256 * Convert SET_META action to DV specification.
1259 * Pointer to the rte_eth_dev structure.
1260 * @param[in,out] resource
1261 * Pointer to the modify-header resource.
1263 * Attributes of flow that includes this item.
1265 * Pointer to action specification.
1267 * Pointer to the error structure.
1270 * 0 on success, a negative errno value otherwise and rte_errno is set.
1273 flow_dv_convert_action_set_meta
1274 (struct rte_eth_dev *dev,
1275 struct mlx5_flow_dv_modify_hdr_resource *resource,
1276 const struct rte_flow_attr *attr,
1277 const struct rte_flow_action_set_meta *conf,
1278 struct rte_flow_error *error)
1280 uint32_t mask = rte_cpu_to_be_32(conf->mask);
1281 uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1282 struct rte_flow_item item = {
1286 struct field_modify_info reg_c_x[] = {
1289 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1293 MLX5_ASSERT(reg != REG_NON);
1294 if (reg == REG_C_0) {
1295 struct mlx5_priv *priv = dev->data->dev_private;
1296 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1297 uint32_t shl_c0 = rte_bsf32(msk_c0);
1299 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1300 mask = rte_cpu_to_be_32(mask) & msk_c0;
1301 mask = rte_cpu_to_be_32(mask << shl_c0);
1303 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1304 /* The routine expects parameters in memory as big-endian ones. */
1305 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1306 MLX5_MODIFICATION_TYPE_SET, error);
1310 * Convert modify-header set IPv4 DSCP action to DV specification.
1312 * @param[in,out] resource
1313 * Pointer to the modify-header resource.
1315 * Pointer to action specification.
1317 * Pointer to the error structure.
1320 * 0 on success, a negative errno value otherwise and rte_errno is set.
1323 flow_dv_convert_action_modify_ipv4_dscp
1324 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1325 const struct rte_flow_action *action,
1326 struct rte_flow_error *error)
1328 const struct rte_flow_action_set_dscp *conf =
1329 (const struct rte_flow_action_set_dscp *)(action->conf);
1330 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1331 struct rte_flow_item_ipv4 ipv4;
1332 struct rte_flow_item_ipv4 ipv4_mask;
1334 memset(&ipv4, 0, sizeof(ipv4));
1335 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1336 ipv4.hdr.type_of_service = conf->dscp;
1337 ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1339 item.mask = &ipv4_mask;
1340 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1341 MLX5_MODIFICATION_TYPE_SET, error);
1345 * Convert modify-header set IPv6 DSCP action to DV specification.
1347 * @param[in,out] resource
1348 * Pointer to the modify-header resource.
1350 * Pointer to action specification.
1352 * Pointer to the error structure.
1355 * 0 on success, a negative errno value otherwise and rte_errno is set.
1358 flow_dv_convert_action_modify_ipv6_dscp
1359 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1360 const struct rte_flow_action *action,
1361 struct rte_flow_error *error)
1363 const struct rte_flow_action_set_dscp *conf =
1364 (const struct rte_flow_action_set_dscp *)(action->conf);
1365 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1366 struct rte_flow_item_ipv6 ipv6;
1367 struct rte_flow_item_ipv6 ipv6_mask;
1369 memset(&ipv6, 0, sizeof(ipv6));
1370 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1372 * Even though the DSCP bits offset of IPv6 is not byte aligned,
1373 * rdma-core only accept the DSCP bits byte aligned start from
1374 * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1375 * bits in IPv6 case as rdma-core requires byte aligned value.
1377 ipv6.hdr.vtc_flow = conf->dscp;
1378 ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1380 item.mask = &ipv6_mask;
1381 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1382 MLX5_MODIFICATION_TYPE_SET, error);
1386 mlx5_flow_item_field_width(struct rte_eth_dev *dev,
1387 enum rte_flow_field_id field, int inherit,
1388 const struct rte_flow_attr *attr,
1389 struct rte_flow_error *error)
1391 struct mlx5_priv *priv = dev->data->dev_private;
1394 case RTE_FLOW_FIELD_START:
1396 case RTE_FLOW_FIELD_MAC_DST:
1397 case RTE_FLOW_FIELD_MAC_SRC:
1399 case RTE_FLOW_FIELD_VLAN_TYPE:
1401 case RTE_FLOW_FIELD_VLAN_ID:
1403 case RTE_FLOW_FIELD_MAC_TYPE:
1405 case RTE_FLOW_FIELD_IPV4_DSCP:
1407 case RTE_FLOW_FIELD_IPV4_TTL:
1409 case RTE_FLOW_FIELD_IPV4_SRC:
1410 case RTE_FLOW_FIELD_IPV4_DST:
1412 case RTE_FLOW_FIELD_IPV6_DSCP:
1414 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1416 case RTE_FLOW_FIELD_IPV6_SRC:
1417 case RTE_FLOW_FIELD_IPV6_DST:
1419 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1420 case RTE_FLOW_FIELD_TCP_PORT_DST:
1422 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1423 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1425 case RTE_FLOW_FIELD_TCP_FLAGS:
1427 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1428 case RTE_FLOW_FIELD_UDP_PORT_DST:
1430 case RTE_FLOW_FIELD_VXLAN_VNI:
1431 case RTE_FLOW_FIELD_GENEVE_VNI:
1433 case RTE_FLOW_FIELD_GTP_TEID:
1434 case RTE_FLOW_FIELD_TAG:
1436 case RTE_FLOW_FIELD_MARK:
1437 return __builtin_popcount(priv->sh->dv_mark_mask);
1438 case RTE_FLOW_FIELD_META:
1439 return (flow_dv_get_metadata_reg(dev, attr, error) == REG_C_0) ?
1440 __builtin_popcount(priv->sh->dv_meta_mask) : 32;
1441 case RTE_FLOW_FIELD_POINTER:
1442 case RTE_FLOW_FIELD_VALUE:
1443 return inherit < 0 ? 0 : inherit;
1451 mlx5_flow_field_id_to_modify_info
1452 (const struct rte_flow_action_modify_data *data,
1453 struct field_modify_info *info, uint32_t *mask,
1454 uint32_t width, uint32_t *shift, struct rte_eth_dev *dev,
1455 const struct rte_flow_attr *attr, struct rte_flow_error *error)
1457 struct mlx5_priv *priv = dev->data->dev_private;
1461 switch (data->field) {
1462 case RTE_FLOW_FIELD_START:
1463 /* not supported yet */
1466 case RTE_FLOW_FIELD_MAC_DST:
1467 off = data->offset > 16 ? data->offset - 16 : 0;
1469 if (data->offset < 16) {
1470 info[idx] = (struct field_modify_info){2, 4,
1471 MLX5_MODI_OUT_DMAC_15_0};
1473 mask[idx] = rte_cpu_to_be_16(0xffff >>
1477 mask[idx] = RTE_BE16(0xffff);
1484 info[idx] = (struct field_modify_info){4, 0,
1485 MLX5_MODI_OUT_DMAC_47_16};
1486 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1487 (32 - width)) << off);
1489 if (data->offset < 16)
1490 info[idx++] = (struct field_modify_info){2, 4,
1491 MLX5_MODI_OUT_DMAC_15_0};
1492 info[idx] = (struct field_modify_info){4, 0,
1493 MLX5_MODI_OUT_DMAC_47_16};
1496 case RTE_FLOW_FIELD_MAC_SRC:
1497 off = data->offset > 16 ? data->offset - 16 : 0;
1499 if (data->offset < 16) {
1500 info[idx] = (struct field_modify_info){2, 4,
1501 MLX5_MODI_OUT_SMAC_15_0};
1503 mask[idx] = rte_cpu_to_be_16(0xffff >>
1507 mask[idx] = RTE_BE16(0xffff);
1514 info[idx] = (struct field_modify_info){4, 0,
1515 MLX5_MODI_OUT_SMAC_47_16};
1516 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1517 (32 - width)) << off);
1519 if (data->offset < 16)
1520 info[idx++] = (struct field_modify_info){2, 4,
1521 MLX5_MODI_OUT_SMAC_15_0};
1522 info[idx] = (struct field_modify_info){4, 0,
1523 MLX5_MODI_OUT_SMAC_47_16};
1526 case RTE_FLOW_FIELD_VLAN_TYPE:
1527 /* not supported yet */
1529 case RTE_FLOW_FIELD_VLAN_ID:
1530 info[idx] = (struct field_modify_info){2, 0,
1531 MLX5_MODI_OUT_FIRST_VID};
1533 mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1535 case RTE_FLOW_FIELD_MAC_TYPE:
1536 info[idx] = (struct field_modify_info){2, 0,
1537 MLX5_MODI_OUT_ETHERTYPE};
1539 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1541 case RTE_FLOW_FIELD_IPV4_DSCP:
1542 info[idx] = (struct field_modify_info){1, 0,
1543 MLX5_MODI_OUT_IP_DSCP};
1545 mask[idx] = 0x3f >> (6 - width);
1547 case RTE_FLOW_FIELD_IPV4_TTL:
1548 info[idx] = (struct field_modify_info){1, 0,
1549 MLX5_MODI_OUT_IPV4_TTL};
1551 mask[idx] = 0xff >> (8 - width);
1553 case RTE_FLOW_FIELD_IPV4_SRC:
1554 info[idx] = (struct field_modify_info){4, 0,
1555 MLX5_MODI_OUT_SIPV4};
1557 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1560 case RTE_FLOW_FIELD_IPV4_DST:
1561 info[idx] = (struct field_modify_info){4, 0,
1562 MLX5_MODI_OUT_DIPV4};
1564 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1567 case RTE_FLOW_FIELD_IPV6_DSCP:
1568 info[idx] = (struct field_modify_info){1, 0,
1569 MLX5_MODI_OUT_IP_DSCP};
1571 mask[idx] = 0x3f >> (6 - width);
1573 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1574 info[idx] = (struct field_modify_info){1, 0,
1575 MLX5_MODI_OUT_IPV6_HOPLIMIT};
1577 mask[idx] = 0xff >> (8 - width);
1579 case RTE_FLOW_FIELD_IPV6_SRC:
1581 if (data->offset < 32) {
1582 info[idx] = (struct field_modify_info){4, 12,
1583 MLX5_MODI_OUT_SIPV6_31_0};
1586 rte_cpu_to_be_32(0xffffffff >>
1590 mask[idx] = RTE_BE32(0xffffffff);
1597 if (data->offset < 64) {
1598 info[idx] = (struct field_modify_info){4, 8,
1599 MLX5_MODI_OUT_SIPV6_63_32};
1602 rte_cpu_to_be_32(0xffffffff >>
1606 mask[idx] = RTE_BE32(0xffffffff);
1613 if (data->offset < 96) {
1614 info[idx] = (struct field_modify_info){4, 4,
1615 MLX5_MODI_OUT_SIPV6_95_64};
1618 rte_cpu_to_be_32(0xffffffff >>
1622 mask[idx] = RTE_BE32(0xffffffff);
1629 info[idx] = (struct field_modify_info){4, 0,
1630 MLX5_MODI_OUT_SIPV6_127_96};
1631 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1634 if (data->offset < 32)
1635 info[idx++] = (struct field_modify_info){4, 12,
1636 MLX5_MODI_OUT_SIPV6_31_0};
1637 if (data->offset < 64)
1638 info[idx++] = (struct field_modify_info){4, 8,
1639 MLX5_MODI_OUT_SIPV6_63_32};
1640 if (data->offset < 96)
1641 info[idx++] = (struct field_modify_info){4, 4,
1642 MLX5_MODI_OUT_SIPV6_95_64};
1643 if (data->offset < 128)
1644 info[idx++] = (struct field_modify_info){4, 0,
1645 MLX5_MODI_OUT_SIPV6_127_96};
1648 case RTE_FLOW_FIELD_IPV6_DST:
1650 if (data->offset < 32) {
1651 info[idx] = (struct field_modify_info){4, 12,
1652 MLX5_MODI_OUT_DIPV6_31_0};
1655 rte_cpu_to_be_32(0xffffffff >>
1659 mask[idx] = RTE_BE32(0xffffffff);
1666 if (data->offset < 64) {
1667 info[idx] = (struct field_modify_info){4, 8,
1668 MLX5_MODI_OUT_DIPV6_63_32};
1671 rte_cpu_to_be_32(0xffffffff >>
1675 mask[idx] = RTE_BE32(0xffffffff);
1682 if (data->offset < 96) {
1683 info[idx] = (struct field_modify_info){4, 4,
1684 MLX5_MODI_OUT_DIPV6_95_64};
1687 rte_cpu_to_be_32(0xffffffff >>
1691 mask[idx] = RTE_BE32(0xffffffff);
1698 info[idx] = (struct field_modify_info){4, 0,
1699 MLX5_MODI_OUT_DIPV6_127_96};
1700 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1703 if (data->offset < 32)
1704 info[idx++] = (struct field_modify_info){4, 12,
1705 MLX5_MODI_OUT_DIPV6_31_0};
1706 if (data->offset < 64)
1707 info[idx++] = (struct field_modify_info){4, 8,
1708 MLX5_MODI_OUT_DIPV6_63_32};
1709 if (data->offset < 96)
1710 info[idx++] = (struct field_modify_info){4, 4,
1711 MLX5_MODI_OUT_DIPV6_95_64};
1712 if (data->offset < 128)
1713 info[idx++] = (struct field_modify_info){4, 0,
1714 MLX5_MODI_OUT_DIPV6_127_96};
1717 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1718 info[idx] = (struct field_modify_info){2, 0,
1719 MLX5_MODI_OUT_TCP_SPORT};
1721 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1723 case RTE_FLOW_FIELD_TCP_PORT_DST:
1724 info[idx] = (struct field_modify_info){2, 0,
1725 MLX5_MODI_OUT_TCP_DPORT};
1727 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1729 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1730 info[idx] = (struct field_modify_info){4, 0,
1731 MLX5_MODI_OUT_TCP_SEQ_NUM};
1733 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1736 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1737 info[idx] = (struct field_modify_info){4, 0,
1738 MLX5_MODI_OUT_TCP_ACK_NUM};
1740 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1743 case RTE_FLOW_FIELD_TCP_FLAGS:
1744 info[idx] = (struct field_modify_info){2, 0,
1745 MLX5_MODI_OUT_TCP_FLAGS};
1747 mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1749 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1750 info[idx] = (struct field_modify_info){2, 0,
1751 MLX5_MODI_OUT_UDP_SPORT};
1753 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1755 case RTE_FLOW_FIELD_UDP_PORT_DST:
1756 info[idx] = (struct field_modify_info){2, 0,
1757 MLX5_MODI_OUT_UDP_DPORT};
1759 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1761 case RTE_FLOW_FIELD_VXLAN_VNI:
1762 /* not supported yet */
1764 case RTE_FLOW_FIELD_GENEVE_VNI:
1765 /* not supported yet*/
1767 case RTE_FLOW_FIELD_GTP_TEID:
1768 info[idx] = (struct field_modify_info){4, 0,
1769 MLX5_MODI_GTP_TEID};
1771 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1774 case RTE_FLOW_FIELD_TAG:
1776 int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1777 data->level, error);
1780 MLX5_ASSERT(reg != REG_NON);
1781 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1782 info[idx] = (struct field_modify_info){4, 0,
1786 rte_cpu_to_be_32(0xffffffff >>
1790 case RTE_FLOW_FIELD_MARK:
1792 uint32_t mark_mask = priv->sh->dv_mark_mask;
1793 uint32_t mark_count = __builtin_popcount(mark_mask);
1794 int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1798 MLX5_ASSERT(reg != REG_NON);
1799 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1800 info[idx] = (struct field_modify_info){4, 0,
1803 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1804 (mark_count - width)) & mark_mask);
1807 case RTE_FLOW_FIELD_META:
1809 uint32_t meta_mask = priv->sh->dv_meta_mask;
1810 uint32_t meta_count = __builtin_popcount(meta_mask);
1812 rte_cpu_to_be_32(priv->sh->dv_regc0_mask);
1813 uint32_t shl_c0 = rte_bsf32(msk_c0);
1814 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1817 MLX5_ASSERT(reg != REG_NON);
1818 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1821 info[idx] = (struct field_modify_info){4, 0,
1824 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1825 (meta_count - width)) & meta_mask);
1828 case RTE_FLOW_FIELD_POINTER:
1829 case RTE_FLOW_FIELD_VALUE:
1837 * Convert modify_field action to DV specification.
1840 * Pointer to the rte_eth_dev structure.
1841 * @param[in,out] resource
1842 * Pointer to the modify-header resource.
1844 * Pointer to action specification.
1846 * Attributes of flow that includes this item.
1848 * Pointer to the error structure.
1851 * 0 on success, a negative errno value otherwise and rte_errno is set.
1854 flow_dv_convert_action_modify_field
1855 (struct rte_eth_dev *dev,
1856 struct mlx5_flow_dv_modify_hdr_resource *resource,
1857 const struct rte_flow_action *action,
1858 const struct rte_flow_attr *attr,
1859 struct rte_flow_error *error)
1861 const struct rte_flow_action_modify_field *conf =
1862 (const struct rte_flow_action_modify_field *)(action->conf);
1863 struct rte_flow_item item = {
1867 struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1869 struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1871 uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1875 if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1876 conf->src.field == RTE_FLOW_FIELD_VALUE) {
1877 type = MLX5_MODIFICATION_TYPE_SET;
1878 /** For SET fill the destination field (field) first. */
1879 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1880 conf->width, &shift, dev,
1882 item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?
1883 (void *)(uintptr_t)conf->src.pvalue :
1884 (void *)(uintptr_t)&conf->src.value;
1886 type = MLX5_MODIFICATION_TYPE_COPY;
1887 /** For COPY fill the destination field (dcopy) without mask. */
1888 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1889 conf->width, &shift, dev,
1891 /** Then construct the source field (field) with mask. */
1892 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1893 conf->width, &shift,
1897 return flow_dv_convert_modify_action(&item,
1898 field, dcopy, resource, type, error);
1902 * Validate MARK item.
1905 * Pointer to the rte_eth_dev structure.
1907 * Item specification.
1909 * Attributes of flow that includes this item.
1911 * Pointer to error structure.
1914 * 0 on success, a negative errno value otherwise and rte_errno is set.
1917 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1918 const struct rte_flow_item *item,
1919 const struct rte_flow_attr *attr __rte_unused,
1920 struct rte_flow_error *error)
1922 struct mlx5_priv *priv = dev->data->dev_private;
1923 struct mlx5_dev_config *config = &priv->config;
1924 const struct rte_flow_item_mark *spec = item->spec;
1925 const struct rte_flow_item_mark *mask = item->mask;
1926 const struct rte_flow_item_mark nic_mask = {
1927 .id = priv->sh->dv_mark_mask,
1931 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1932 return rte_flow_error_set(error, ENOTSUP,
1933 RTE_FLOW_ERROR_TYPE_ITEM, item,
1934 "extended metadata feature"
1936 if (!mlx5_flow_ext_mreg_supported(dev))
1937 return rte_flow_error_set(error, ENOTSUP,
1938 RTE_FLOW_ERROR_TYPE_ITEM, item,
1939 "extended metadata register"
1940 " isn't supported");
1942 return rte_flow_error_set(error, ENOTSUP,
1943 RTE_FLOW_ERROR_TYPE_ITEM, item,
1944 "extended metadata register"
1945 " isn't available");
1946 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1950 return rte_flow_error_set(error, EINVAL,
1951 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1953 "data cannot be empty");
1954 if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1955 return rte_flow_error_set(error, EINVAL,
1956 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1958 "mark id exceeds the limit");
1962 return rte_flow_error_set(error, EINVAL,
1963 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1964 "mask cannot be zero");
1966 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1967 (const uint8_t *)&nic_mask,
1968 sizeof(struct rte_flow_item_mark),
1969 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1976 * Validate META item.
1979 * Pointer to the rte_eth_dev structure.
1981 * Item specification.
1983 * Attributes of flow that includes this item.
1985 * Pointer to error structure.
1988 * 0 on success, a negative errno value otherwise and rte_errno is set.
1991 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1992 const struct rte_flow_item *item,
1993 const struct rte_flow_attr *attr,
1994 struct rte_flow_error *error)
1996 struct mlx5_priv *priv = dev->data->dev_private;
1997 struct mlx5_dev_config *config = &priv->config;
1998 const struct rte_flow_item_meta *spec = item->spec;
1999 const struct rte_flow_item_meta *mask = item->mask;
2000 struct rte_flow_item_meta nic_mask = {
2007 return rte_flow_error_set(error, EINVAL,
2008 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2010 "data cannot be empty");
2011 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2012 if (!mlx5_flow_ext_mreg_supported(dev))
2013 return rte_flow_error_set(error, ENOTSUP,
2014 RTE_FLOW_ERROR_TYPE_ITEM, item,
2015 "extended metadata register"
2016 " isn't supported");
2017 reg = flow_dv_get_metadata_reg(dev, attr, error);
2021 return rte_flow_error_set(error, ENOTSUP,
2022 RTE_FLOW_ERROR_TYPE_ITEM, item,
2023 "unavalable extended metadata register");
2025 return rte_flow_error_set(error, ENOTSUP,
2026 RTE_FLOW_ERROR_TYPE_ITEM, item,
2030 nic_mask.data = priv->sh->dv_meta_mask;
2033 return rte_flow_error_set(error, ENOTSUP,
2034 RTE_FLOW_ERROR_TYPE_ITEM, item,
2035 "extended metadata feature "
2036 "should be enabled when "
2037 "meta item is requested "
2038 "with e-switch mode ");
2040 return rte_flow_error_set(error, ENOTSUP,
2041 RTE_FLOW_ERROR_TYPE_ITEM, item,
2042 "match on metadata for ingress "
2043 "is not supported in legacy "
2047 mask = &rte_flow_item_meta_mask;
2049 return rte_flow_error_set(error, EINVAL,
2050 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2051 "mask cannot be zero");
2053 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2054 (const uint8_t *)&nic_mask,
2055 sizeof(struct rte_flow_item_meta),
2056 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2061 * Validate TAG item.
2064 * Pointer to the rte_eth_dev structure.
2066 * Item specification.
2068 * Attributes of flow that includes this item.
2070 * Pointer to error structure.
2073 * 0 on success, a negative errno value otherwise and rte_errno is set.
2076 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2077 const struct rte_flow_item *item,
2078 const struct rte_flow_attr *attr __rte_unused,
2079 struct rte_flow_error *error)
2081 const struct rte_flow_item_tag *spec = item->spec;
2082 const struct rte_flow_item_tag *mask = item->mask;
2083 const struct rte_flow_item_tag nic_mask = {
2084 .data = RTE_BE32(UINT32_MAX),
2089 if (!mlx5_flow_ext_mreg_supported(dev))
2090 return rte_flow_error_set(error, ENOTSUP,
2091 RTE_FLOW_ERROR_TYPE_ITEM, item,
2092 "extensive metadata register"
2093 " isn't supported");
2095 return rte_flow_error_set(error, EINVAL,
2096 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2098 "data cannot be empty");
2100 mask = &rte_flow_item_tag_mask;
2102 return rte_flow_error_set(error, EINVAL,
2103 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2104 "mask cannot be zero");
2106 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2107 (const uint8_t *)&nic_mask,
2108 sizeof(struct rte_flow_item_tag),
2109 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2112 if (mask->index != 0xff)
2113 return rte_flow_error_set(error, EINVAL,
2114 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2115 "partial mask for tag index"
2116 " is not supported");
2117 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2120 MLX5_ASSERT(ret != REG_NON);
2125 * Validate vport item.
2128 * Pointer to the rte_eth_dev structure.
2130 * Item specification.
2132 * Attributes of flow that includes this item.
2133 * @param[in] item_flags
2134 * Bit-fields that holds the items detected until now.
2136 * Pointer to error structure.
2139 * 0 on success, a negative errno value otherwise and rte_errno is set.
2142 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2143 const struct rte_flow_item *item,
2144 const struct rte_flow_attr *attr,
2145 uint64_t item_flags,
2146 struct rte_flow_error *error)
2148 const struct rte_flow_item_port_id *spec = item->spec;
2149 const struct rte_flow_item_port_id *mask = item->mask;
2150 const struct rte_flow_item_port_id switch_mask = {
2153 struct mlx5_priv *esw_priv;
2154 struct mlx5_priv *dev_priv;
2157 if (!attr->transfer)
2158 return rte_flow_error_set(error, EINVAL,
2159 RTE_FLOW_ERROR_TYPE_ITEM,
2161 "match on port id is valid only"
2162 " when transfer flag is enabled");
2163 if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2164 return rte_flow_error_set(error, ENOTSUP,
2165 RTE_FLOW_ERROR_TYPE_ITEM, item,
2166 "multiple source ports are not"
2169 mask = &switch_mask;
2170 if (mask->id != 0xffffffff)
2171 return rte_flow_error_set(error, ENOTSUP,
2172 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2174 "no support for partial mask on"
2176 ret = mlx5_flow_item_acceptable
2177 (item, (const uint8_t *)mask,
2178 (const uint8_t *)&rte_flow_item_port_id_mask,
2179 sizeof(struct rte_flow_item_port_id),
2180 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2185 if (spec->id == MLX5_PORT_ESW_MGR)
2187 esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2189 return rte_flow_error_set(error, rte_errno,
2190 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2191 "failed to obtain E-Switch info for"
2193 dev_priv = mlx5_dev_to_eswitch_info(dev);
2195 return rte_flow_error_set(error, rte_errno,
2196 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2198 "failed to obtain E-Switch info");
2199 if (esw_priv->domain_id != dev_priv->domain_id)
2200 return rte_flow_error_set(error, EINVAL,
2201 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2202 "cannot match on a port from a"
2203 " different E-Switch");
2208 * Validate VLAN item.
2211 * Item specification.
2212 * @param[in] item_flags
2213 * Bit-fields that holds the items detected until now.
2215 * Ethernet device flow is being created on.
2217 * Pointer to error structure.
2220 * 0 on success, a negative errno value otherwise and rte_errno is set.
2223 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2224 uint64_t item_flags,
2225 struct rte_eth_dev *dev,
2226 struct rte_flow_error *error)
2228 const struct rte_flow_item_vlan *mask = item->mask;
2229 const struct rte_flow_item_vlan nic_mask = {
2230 .tci = RTE_BE16(UINT16_MAX),
2231 .inner_type = RTE_BE16(UINT16_MAX),
2234 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2236 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2237 MLX5_FLOW_LAYER_INNER_L4) :
2238 (MLX5_FLOW_LAYER_OUTER_L3 |
2239 MLX5_FLOW_LAYER_OUTER_L4);
2240 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2241 MLX5_FLOW_LAYER_OUTER_VLAN;
2243 if (item_flags & vlanm)
2244 return rte_flow_error_set(error, EINVAL,
2245 RTE_FLOW_ERROR_TYPE_ITEM, item,
2246 "multiple VLAN layers not supported");
2247 else if ((item_flags & l34m) != 0)
2248 return rte_flow_error_set(error, EINVAL,
2249 RTE_FLOW_ERROR_TYPE_ITEM, item,
2250 "VLAN cannot follow L3/L4 layer");
2252 mask = &rte_flow_item_vlan_mask;
2253 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2254 (const uint8_t *)&nic_mask,
2255 sizeof(struct rte_flow_item_vlan),
2256 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2259 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2260 struct mlx5_priv *priv = dev->data->dev_private;
2262 if (priv->vmwa_context) {
2264 * Non-NULL context means we have a virtual machine
2265 * and SR-IOV enabled, we have to create VLAN interface
2266 * to make hypervisor to setup E-Switch vport
2267 * context correctly. We avoid creating the multiple
2268 * VLAN interfaces, so we cannot support VLAN tag mask.
2270 return rte_flow_error_set(error, EINVAL,
2271 RTE_FLOW_ERROR_TYPE_ITEM,
2273 "VLAN tag mask is not"
2274 " supported in virtual"
2282 * GTP flags are contained in 1 byte of the format:
2283 * -------------------------------------------
2284 * | bit | 0 - 2 | 3 | 4 | 5 | 6 | 7 |
2285 * |-----------------------------------------|
2286 * | value | Version | PT | Res | E | S | PN |
2287 * -------------------------------------------
2289 * Matching is supported only for GTP flags E, S, PN.
2291 #define MLX5_GTP_FLAGS_MASK 0x07
2294 * Validate GTP item.
2297 * Pointer to the rte_eth_dev structure.
2299 * Item specification.
2300 * @param[in] item_flags
2301 * Bit-fields that holds the items detected until now.
2303 * Pointer to error structure.
2306 * 0 on success, a negative errno value otherwise and rte_errno is set.
2309 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2310 const struct rte_flow_item *item,
2311 uint64_t item_flags,
2312 struct rte_flow_error *error)
2314 struct mlx5_priv *priv = dev->data->dev_private;
2315 const struct rte_flow_item_gtp *spec = item->spec;
2316 const struct rte_flow_item_gtp *mask = item->mask;
2317 const struct rte_flow_item_gtp nic_mask = {
2318 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2320 .teid = RTE_BE32(0xffffffff),
2323 if (!priv->config.hca_attr.tunnel_stateless_gtp)
2324 return rte_flow_error_set(error, ENOTSUP,
2325 RTE_FLOW_ERROR_TYPE_ITEM, item,
2326 "GTP support is not enabled");
2327 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2328 return rte_flow_error_set(error, ENOTSUP,
2329 RTE_FLOW_ERROR_TYPE_ITEM, item,
2330 "multiple tunnel layers not"
2332 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2333 return rte_flow_error_set(error, EINVAL,
2334 RTE_FLOW_ERROR_TYPE_ITEM, item,
2335 "no outer UDP layer found");
2337 mask = &rte_flow_item_gtp_mask;
2338 if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2339 return rte_flow_error_set(error, ENOTSUP,
2340 RTE_FLOW_ERROR_TYPE_ITEM, item,
2341 "Match is supported for GTP"
2343 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2344 (const uint8_t *)&nic_mask,
2345 sizeof(struct rte_flow_item_gtp),
2346 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2350 * Validate GTP PSC item.
2353 * Item specification.
2354 * @param[in] last_item
2355 * Previous validated item in the pattern items.
2356 * @param[in] gtp_item
2357 * Previous GTP item specification.
2359 * Pointer to flow attributes.
2361 * Pointer to error structure.
2364 * 0 on success, a negative errno value otherwise and rte_errno is set.
2367 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2369 const struct rte_flow_item *gtp_item,
2370 const struct rte_flow_attr *attr,
2371 struct rte_flow_error *error)
2373 const struct rte_flow_item_gtp *gtp_spec;
2374 const struct rte_flow_item_gtp *gtp_mask;
2375 const struct rte_flow_item_gtp_psc *mask;
2376 const struct rte_flow_item_gtp_psc nic_mask = {
2381 if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2382 return rte_flow_error_set
2383 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2384 "GTP PSC item must be preceded with GTP item");
2385 gtp_spec = gtp_item->spec;
2386 gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2387 /* GTP spec and E flag is requested to match zero. */
2389 (gtp_mask->v_pt_rsv_flags &
2390 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2391 return rte_flow_error_set
2392 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2393 "GTP E flag must be 1 to match GTP PSC");
2394 /* Check the flow is not created in group zero. */
2395 if (!attr->transfer && !attr->group)
2396 return rte_flow_error_set
2397 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2398 "GTP PSC is not supported for group 0");
2399 /* GTP spec is here and E flag is requested to match zero. */
2402 mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2403 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2404 (const uint8_t *)&nic_mask,
2405 sizeof(struct rte_flow_item_gtp_psc),
2406 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2410 * Validate IPV4 item.
2411 * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2412 * add specific validation of fragment_offset field,
2415 * Item specification.
2416 * @param[in] item_flags
2417 * Bit-fields that holds the items detected until now.
2419 * Pointer to error structure.
2422 * 0 on success, a negative errno value otherwise and rte_errno is set.
2425 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2426 const struct rte_flow_item *item,
2427 uint64_t item_flags, uint64_t last_item,
2428 uint16_t ether_type, struct rte_flow_error *error)
2431 struct mlx5_priv *priv = dev->data->dev_private;
2432 const struct rte_flow_item_ipv4 *spec = item->spec;
2433 const struct rte_flow_item_ipv4 *last = item->last;
2434 const struct rte_flow_item_ipv4 *mask = item->mask;
2435 rte_be16_t fragment_offset_spec = 0;
2436 rte_be16_t fragment_offset_last = 0;
2437 struct rte_flow_item_ipv4 nic_ipv4_mask = {
2439 .src_addr = RTE_BE32(0xffffffff),
2440 .dst_addr = RTE_BE32(0xffffffff),
2441 .type_of_service = 0xff,
2442 .fragment_offset = RTE_BE16(0xffff),
2443 .next_proto_id = 0xff,
2444 .time_to_live = 0xff,
2448 if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2449 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2450 bool ihl_cap = !tunnel ? priv->config.hca_attr.outer_ipv4_ihl :
2451 priv->config.hca_attr.inner_ipv4_ihl;
2453 return rte_flow_error_set(error, ENOTSUP,
2454 RTE_FLOW_ERROR_TYPE_ITEM,
2456 "IPV4 ihl offload not supported");
2457 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2459 ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2460 ether_type, &nic_ipv4_mask,
2461 MLX5_ITEM_RANGE_ACCEPTED, error);
2465 fragment_offset_spec = spec->hdr.fragment_offset &
2466 mask->hdr.fragment_offset;
2467 if (!fragment_offset_spec)
2470 * spec and mask are valid, enforce using full mask to make sure the
2471 * complete value is used correctly.
2473 if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2474 != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2475 return rte_flow_error_set(error, EINVAL,
2476 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2477 item, "must use full mask for"
2478 " fragment_offset");
2480 * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2481 * indicating this is 1st fragment of fragmented packet.
2482 * This is not yet supported in MLX5, return appropriate error message.
2484 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2485 return rte_flow_error_set(error, ENOTSUP,
2486 RTE_FLOW_ERROR_TYPE_ITEM, item,
2487 "match on first fragment not "
2489 if (fragment_offset_spec && !last)
2490 return rte_flow_error_set(error, ENOTSUP,
2491 RTE_FLOW_ERROR_TYPE_ITEM, item,
2492 "specified value not supported");
2493 /* spec and last are valid, validate the specified range. */
2494 fragment_offset_last = last->hdr.fragment_offset &
2495 mask->hdr.fragment_offset;
2497 * Match on fragment_offset spec 0x2001 and last 0x3fff
2498 * means MF is 1 and frag-offset is > 0.
2499 * This packet is fragment 2nd and onward, excluding last.
2500 * This is not yet supported in MLX5, return appropriate
2503 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2504 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2505 return rte_flow_error_set(error, ENOTSUP,
2506 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2507 last, "match on following "
2508 "fragments not supported");
2510 * Match on fragment_offset spec 0x0001 and last 0x1fff
2511 * means MF is 0 and frag-offset is > 0.
2512 * This packet is last fragment of fragmented packet.
2513 * This is not yet supported in MLX5, return appropriate
2516 if (fragment_offset_spec == RTE_BE16(1) &&
2517 fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2518 return rte_flow_error_set(error, ENOTSUP,
2519 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2520 last, "match on last "
2521 "fragment not supported");
2523 * Match on fragment_offset spec 0x0001 and last 0x3fff
2524 * means MF and/or frag-offset is not 0.
2525 * This is a fragmented packet.
2526 * Other range values are invalid and rejected.
2528 if (!(fragment_offset_spec == RTE_BE16(1) &&
2529 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2530 return rte_flow_error_set(error, ENOTSUP,
2531 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2532 "specified range not supported");
2537 * Validate IPV6 fragment extension item.
2540 * Item specification.
2541 * @param[in] item_flags
2542 * Bit-fields that holds the items detected until now.
2544 * Pointer to error structure.
2547 * 0 on success, a negative errno value otherwise and rte_errno is set.
2550 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2551 uint64_t item_flags,
2552 struct rte_flow_error *error)
2554 const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2555 const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2556 const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2557 rte_be16_t frag_data_spec = 0;
2558 rte_be16_t frag_data_last = 0;
2559 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2560 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2561 MLX5_FLOW_LAYER_OUTER_L4;
2563 struct rte_flow_item_ipv6_frag_ext nic_mask = {
2565 .next_header = 0xff,
2566 .frag_data = RTE_BE16(0xffff),
2570 if (item_flags & l4m)
2571 return rte_flow_error_set(error, EINVAL,
2572 RTE_FLOW_ERROR_TYPE_ITEM, item,
2573 "ipv6 fragment extension item cannot "
2575 if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2576 (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2577 return rte_flow_error_set(error, EINVAL,
2578 RTE_FLOW_ERROR_TYPE_ITEM, item,
2579 "ipv6 fragment extension item must "
2580 "follow ipv6 item");
2582 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2583 if (!frag_data_spec)
2586 * spec and mask are valid, enforce using full mask to make sure the
2587 * complete value is used correctly.
2589 if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2590 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2591 return rte_flow_error_set(error, EINVAL,
2592 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2593 item, "must use full mask for"
2596 * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2597 * This is 1st fragment of fragmented packet.
2599 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2600 return rte_flow_error_set(error, ENOTSUP,
2601 RTE_FLOW_ERROR_TYPE_ITEM, item,
2602 "match on first fragment not "
2604 if (frag_data_spec && !last)
2605 return rte_flow_error_set(error, EINVAL,
2606 RTE_FLOW_ERROR_TYPE_ITEM, item,
2607 "specified value not supported");
2608 ret = mlx5_flow_item_acceptable
2609 (item, (const uint8_t *)mask,
2610 (const uint8_t *)&nic_mask,
2611 sizeof(struct rte_flow_item_ipv6_frag_ext),
2612 MLX5_ITEM_RANGE_ACCEPTED, error);
2615 /* spec and last are valid, validate the specified range. */
2616 frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2618 * Match on frag_data spec 0x0009 and last 0xfff9
2619 * means M is 1 and frag-offset is > 0.
2620 * This packet is fragment 2nd and onward, excluding last.
2621 * This is not yet supported in MLX5, return appropriate
2624 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2625 RTE_IPV6_EHDR_MF_MASK) &&
2626 frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2627 return rte_flow_error_set(error, ENOTSUP,
2628 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2629 last, "match on following "
2630 "fragments not supported");
2632 * Match on frag_data spec 0x0008 and last 0xfff8
2633 * means M is 0 and frag-offset is > 0.
2634 * This packet is last fragment of fragmented packet.
2635 * This is not yet supported in MLX5, return appropriate
2638 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2639 frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2640 return rte_flow_error_set(error, ENOTSUP,
2641 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2642 last, "match on last "
2643 "fragment not supported");
2644 /* Other range values are invalid and rejected. */
2645 return rte_flow_error_set(error, EINVAL,
2646 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2647 "specified range not supported");
2651 * Validate ASO CT item.
2654 * Pointer to the rte_eth_dev structure.
2656 * Item specification.
2657 * @param[in] item_flags
2658 * Pointer to bit-fields that holds the items detected until now.
2660 * Pointer to error structure.
2663 * 0 on success, a negative errno value otherwise and rte_errno is set.
2666 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2667 const struct rte_flow_item *item,
2668 uint64_t *item_flags,
2669 struct rte_flow_error *error)
2671 const struct rte_flow_item_conntrack *spec = item->spec;
2672 const struct rte_flow_item_conntrack *mask = item->mask;
2676 if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2677 return rte_flow_error_set(error, EINVAL,
2678 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2679 "Only one CT is supported");
2681 mask = &rte_flow_item_conntrack_mask;
2682 flags = spec->flags & mask->flags;
2683 if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2684 ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2685 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2686 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2687 return rte_flow_error_set(error, EINVAL,
2688 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2689 "Conflict status bits");
2690 /* State change also needs to be considered. */
2691 *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2696 * Validate the pop VLAN action.
2699 * Pointer to the rte_eth_dev structure.
2700 * @param[in] action_flags
2701 * Holds the actions detected until now.
2703 * Pointer to the pop vlan action.
2704 * @param[in] item_flags
2705 * The items found in this flow rule.
2707 * Pointer to flow attributes.
2709 * Pointer to error structure.
2712 * 0 on success, a negative errno value otherwise and rte_errno is set.
2715 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2716 uint64_t action_flags,
2717 const struct rte_flow_action *action,
2718 uint64_t item_flags,
2719 const struct rte_flow_attr *attr,
2720 struct rte_flow_error *error)
2722 const struct mlx5_priv *priv = dev->data->dev_private;
2723 struct mlx5_dev_ctx_shared *sh = priv->sh;
2724 bool direction_error = false;
2726 if (!priv->sh->pop_vlan_action)
2727 return rte_flow_error_set(error, ENOTSUP,
2728 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2730 "pop vlan action is not supported");
2731 /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2732 if (attr->transfer) {
2733 bool fdb_tx = priv->representor_id != UINT16_MAX;
2734 bool is_cx5 = sh->steering_format_version ==
2735 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2737 if (fdb_tx && is_cx5)
2738 direction_error = true;
2739 } else if (attr->egress) {
2740 direction_error = true;
2742 if (direction_error)
2743 return rte_flow_error_set(error, ENOTSUP,
2744 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2746 "pop vlan action not supported for egress");
2747 if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2748 return rte_flow_error_set(error, ENOTSUP,
2749 RTE_FLOW_ERROR_TYPE_ACTION, action,
2750 "no support for multiple VLAN "
2752 /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2753 if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2754 !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2755 return rte_flow_error_set(error, ENOTSUP,
2756 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2758 "cannot pop vlan after decap without "
2759 "match on inner vlan in the flow");
2760 /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2761 if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2762 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2763 return rte_flow_error_set(error, ENOTSUP,
2764 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2766 "cannot pop vlan without a "
2767 "match on (outer) vlan in the flow");
2768 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2769 return rte_flow_error_set(error, EINVAL,
2770 RTE_FLOW_ERROR_TYPE_ACTION, action,
2771 "wrong action order, port_id should "
2772 "be after pop VLAN action");
2773 if (!attr->transfer && priv->representor)
2774 return rte_flow_error_set(error, ENOTSUP,
2775 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2776 "pop vlan action for VF representor "
2777 "not supported on NIC table");
2782 * Get VLAN default info from vlan match info.
2785 * the list of item specifications.
2787 * pointer VLAN info to fill to.
2790 * 0 on success, a negative errno value otherwise and rte_errno is set.
2793 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2794 struct rte_vlan_hdr *vlan)
2796 const struct rte_flow_item_vlan nic_mask = {
2797 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2798 MLX5DV_FLOW_VLAN_VID_MASK),
2799 .inner_type = RTE_BE16(0xffff),
2804 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2805 int type = items->type;
2807 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2808 type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2811 if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2812 const struct rte_flow_item_vlan *vlan_m = items->mask;
2813 const struct rte_flow_item_vlan *vlan_v = items->spec;
2815 /* If VLAN item in pattern doesn't contain data, return here. */
2820 /* Only full match values are accepted */
2821 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2822 MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2823 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2825 rte_be_to_cpu_16(vlan_v->tci &
2826 MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2828 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2829 MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2830 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2832 rte_be_to_cpu_16(vlan_v->tci &
2833 MLX5DV_FLOW_VLAN_VID_MASK_BE);
2835 if (vlan_m->inner_type == nic_mask.inner_type)
2836 vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2837 vlan_m->inner_type);
2842 * Validate the push VLAN action.
2845 * Pointer to the rte_eth_dev structure.
2846 * @param[in] action_flags
2847 * Holds the actions detected until now.
2848 * @param[in] item_flags
2849 * The items found in this flow rule.
2851 * Pointer to the action structure.
2853 * Pointer to flow attributes
2855 * Pointer to error structure.
2858 * 0 on success, a negative errno value otherwise and rte_errno is set.
2861 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2862 uint64_t action_flags,
2863 const struct rte_flow_item_vlan *vlan_m,
2864 const struct rte_flow_action *action,
2865 const struct rte_flow_attr *attr,
2866 struct rte_flow_error *error)
2868 const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2869 const struct mlx5_priv *priv = dev->data->dev_private;
2870 struct mlx5_dev_ctx_shared *sh = priv->sh;
2871 bool direction_error = false;
2873 if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2874 push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2875 return rte_flow_error_set(error, EINVAL,
2876 RTE_FLOW_ERROR_TYPE_ACTION, action,
2877 "invalid vlan ethertype");
2878 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2879 return rte_flow_error_set(error, EINVAL,
2880 RTE_FLOW_ERROR_TYPE_ACTION, action,
2881 "wrong action order, port_id should "
2882 "be after push VLAN");
2883 /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2884 if (attr->transfer) {
2885 bool fdb_tx = priv->representor_id != UINT16_MAX;
2886 bool is_cx5 = sh->steering_format_version ==
2887 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2889 if (!fdb_tx && is_cx5)
2890 direction_error = true;
2891 } else if (attr->ingress) {
2892 direction_error = true;
2894 if (direction_error)
2895 return rte_flow_error_set(error, ENOTSUP,
2896 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2898 "push vlan action not supported for ingress");
2899 if (!attr->transfer && priv->representor)
2900 return rte_flow_error_set(error, ENOTSUP,
2901 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2902 "push vlan action for VF representor "
2903 "not supported on NIC table");
2905 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2906 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2907 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2908 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2909 !(mlx5_flow_find_action
2910 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2911 return rte_flow_error_set(error, EINVAL,
2912 RTE_FLOW_ERROR_TYPE_ACTION, action,
2913 "not full match mask on VLAN PCP and "
2914 "there is no of_set_vlan_pcp action, "
2915 "push VLAN action cannot figure out "
2918 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2919 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2920 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2921 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2922 !(mlx5_flow_find_action
2923 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2924 return rte_flow_error_set(error, EINVAL,
2925 RTE_FLOW_ERROR_TYPE_ACTION, action,
2926 "not full match mask on VLAN VID and "
2927 "there is no of_set_vlan_vid action, "
2928 "push VLAN action cannot figure out "
2935 * Validate the set VLAN PCP.
2937 * @param[in] action_flags
2938 * Holds the actions detected until now.
2939 * @param[in] actions
2940 * Pointer to the list of actions remaining in the flow rule.
2942 * Pointer to error structure.
2945 * 0 on success, a negative errno value otherwise and rte_errno is set.
2948 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2949 const struct rte_flow_action actions[],
2950 struct rte_flow_error *error)
2952 const struct rte_flow_action *action = actions;
2953 const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2955 if (conf->vlan_pcp > 7)
2956 return rte_flow_error_set(error, EINVAL,
2957 RTE_FLOW_ERROR_TYPE_ACTION, action,
2958 "VLAN PCP value is too big");
2959 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2960 return rte_flow_error_set(error, ENOTSUP,
2961 RTE_FLOW_ERROR_TYPE_ACTION, action,
2962 "set VLAN PCP action must follow "
2963 "the push VLAN action");
2964 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2965 return rte_flow_error_set(error, ENOTSUP,
2966 RTE_FLOW_ERROR_TYPE_ACTION, action,
2967 "Multiple VLAN PCP modification are "
2969 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2970 return rte_flow_error_set(error, EINVAL,
2971 RTE_FLOW_ERROR_TYPE_ACTION, action,
2972 "wrong action order, port_id should "
2973 "be after set VLAN PCP");
2978 * Validate the set VLAN VID.
2980 * @param[in] item_flags
2981 * Holds the items detected in this rule.
2982 * @param[in] action_flags
2983 * Holds the actions detected until now.
2984 * @param[in] actions
2985 * Pointer to the list of actions remaining in the flow rule.
2987 * Pointer to error structure.
2990 * 0 on success, a negative errno value otherwise and rte_errno is set.
2993 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
2994 uint64_t action_flags,
2995 const struct rte_flow_action actions[],
2996 struct rte_flow_error *error)
2998 const struct rte_flow_action *action = actions;
2999 const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3001 if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3002 return rte_flow_error_set(error, EINVAL,
3003 RTE_FLOW_ERROR_TYPE_ACTION, action,
3004 "VLAN VID value is too big");
3005 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3006 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3007 return rte_flow_error_set(error, ENOTSUP,
3008 RTE_FLOW_ERROR_TYPE_ACTION, action,
3009 "set VLAN VID action must follow push"
3010 " VLAN action or match on VLAN item");
3011 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3012 return rte_flow_error_set(error, ENOTSUP,
3013 RTE_FLOW_ERROR_TYPE_ACTION, action,
3014 "Multiple VLAN VID modifications are "
3016 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3017 return rte_flow_error_set(error, EINVAL,
3018 RTE_FLOW_ERROR_TYPE_ACTION, action,
3019 "wrong action order, port_id should "
3020 "be after set VLAN VID");
3025 * Validate the FLAG action.
3028 * Pointer to the rte_eth_dev structure.
3029 * @param[in] action_flags
3030 * Holds the actions detected until now.
3032 * Pointer to flow attributes
3034 * Pointer to error structure.
3037 * 0 on success, a negative errno value otherwise and rte_errno is set.
3040 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3041 uint64_t action_flags,
3042 const struct rte_flow_attr *attr,
3043 struct rte_flow_error *error)
3045 struct mlx5_priv *priv = dev->data->dev_private;
3046 struct mlx5_dev_config *config = &priv->config;
3049 /* Fall back if no extended metadata register support. */
3050 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3051 return mlx5_flow_validate_action_flag(action_flags, attr,
3053 /* Extensive metadata mode requires registers. */
3054 if (!mlx5_flow_ext_mreg_supported(dev))
3055 return rte_flow_error_set(error, ENOTSUP,
3056 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3057 "no metadata registers "
3058 "to support flag action");
3059 if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3060 return rte_flow_error_set(error, ENOTSUP,
3061 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3062 "extended metadata register"
3063 " isn't available");
3064 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3067 MLX5_ASSERT(ret > 0);
3068 if (action_flags & MLX5_FLOW_ACTION_MARK)
3069 return rte_flow_error_set(error, EINVAL,
3070 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3071 "can't mark and flag in same flow");
3072 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3073 return rte_flow_error_set(error, EINVAL,
3074 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3076 " actions in same flow");
3081 * Validate MARK action.
3084 * Pointer to the rte_eth_dev structure.
3086 * Pointer to action.
3087 * @param[in] action_flags
3088 * Holds the actions detected until now.
3090 * Pointer to flow attributes
3092 * Pointer to error structure.
3095 * 0 on success, a negative errno value otherwise and rte_errno is set.
3098 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3099 const struct rte_flow_action *action,
3100 uint64_t action_flags,
3101 const struct rte_flow_attr *attr,
3102 struct rte_flow_error *error)
3104 struct mlx5_priv *priv = dev->data->dev_private;
3105 struct mlx5_dev_config *config = &priv->config;
3106 const struct rte_flow_action_mark *mark = action->conf;
3109 if (is_tunnel_offload_active(dev))
3110 return rte_flow_error_set(error, ENOTSUP,
3111 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3113 "if tunnel offload active");
3114 /* Fall back if no extended metadata register support. */
3115 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3116 return mlx5_flow_validate_action_mark(action, action_flags,
3118 /* Extensive metadata mode requires registers. */
3119 if (!mlx5_flow_ext_mreg_supported(dev))
3120 return rte_flow_error_set(error, ENOTSUP,
3121 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3122 "no metadata registers "
3123 "to support mark action");
3124 if (!priv->sh->dv_mark_mask)
3125 return rte_flow_error_set(error, ENOTSUP,
3126 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3127 "extended metadata register"
3128 " isn't available");
3129 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3132 MLX5_ASSERT(ret > 0);
3134 return rte_flow_error_set(error, EINVAL,
3135 RTE_FLOW_ERROR_TYPE_ACTION, action,
3136 "configuration cannot be null");
3137 if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3138 return rte_flow_error_set(error, EINVAL,
3139 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3141 "mark id exceeds the limit");
3142 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3143 return rte_flow_error_set(error, EINVAL,
3144 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3145 "can't flag and mark in same flow");
3146 if (action_flags & MLX5_FLOW_ACTION_MARK)
3147 return rte_flow_error_set(error, EINVAL,
3148 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3149 "can't have 2 mark actions in same"
3155 * Validate SET_META action.
3158 * Pointer to the rte_eth_dev structure.
3160 * Pointer to the action structure.
3161 * @param[in] action_flags
3162 * Holds the actions detected until now.
3164 * Pointer to flow attributes
3166 * Pointer to error structure.
3169 * 0 on success, a negative errno value otherwise and rte_errno is set.
3172 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3173 const struct rte_flow_action *action,
3174 uint64_t action_flags __rte_unused,
3175 const struct rte_flow_attr *attr,
3176 struct rte_flow_error *error)
3178 struct mlx5_priv *priv = dev->data->dev_private;
3179 struct mlx5_dev_config *config = &priv->config;
3180 const struct rte_flow_action_set_meta *conf;
3181 uint32_t nic_mask = UINT32_MAX;
3184 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
3185 !mlx5_flow_ext_mreg_supported(dev))
3186 return rte_flow_error_set(error, ENOTSUP,
3187 RTE_FLOW_ERROR_TYPE_ACTION, action,
3188 "extended metadata register"
3189 " isn't supported");
3190 reg = flow_dv_get_metadata_reg(dev, attr, error);
3194 return rte_flow_error_set(error, ENOTSUP,
3195 RTE_FLOW_ERROR_TYPE_ACTION, action,
3196 "unavalable extended metadata register");
3197 if (reg != REG_A && reg != REG_B) {
3198 struct mlx5_priv *priv = dev->data->dev_private;
3200 nic_mask = priv->sh->dv_meta_mask;
3202 if (!(action->conf))
3203 return rte_flow_error_set(error, EINVAL,
3204 RTE_FLOW_ERROR_TYPE_ACTION, action,
3205 "configuration cannot be null");
3206 conf = (const struct rte_flow_action_set_meta *)action->conf;
3208 return rte_flow_error_set(error, EINVAL,
3209 RTE_FLOW_ERROR_TYPE_ACTION, action,
3210 "zero mask doesn't have any effect");
3211 if (conf->mask & ~nic_mask)
3212 return rte_flow_error_set(error, EINVAL,
3213 RTE_FLOW_ERROR_TYPE_ACTION, action,
3214 "meta data must be within reg C0");
3219 * Validate SET_TAG action.
3222 * Pointer to the rte_eth_dev structure.
3224 * Pointer to the action structure.
3225 * @param[in] action_flags
3226 * Holds the actions detected until now.
3228 * Pointer to flow attributes
3230 * Pointer to error structure.
3233 * 0 on success, a negative errno value otherwise and rte_errno is set.
3236 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3237 const struct rte_flow_action *action,
3238 uint64_t action_flags,
3239 const struct rte_flow_attr *attr,
3240 struct rte_flow_error *error)
3242 const struct rte_flow_action_set_tag *conf;
3243 const uint64_t terminal_action_flags =
3244 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3245 MLX5_FLOW_ACTION_RSS;
3248 if (!mlx5_flow_ext_mreg_supported(dev))
3249 return rte_flow_error_set(error, ENOTSUP,
3250 RTE_FLOW_ERROR_TYPE_ACTION, action,
3251 "extensive metadata register"
3252 " isn't supported");
3253 if (!(action->conf))
3254 return rte_flow_error_set(error, EINVAL,
3255 RTE_FLOW_ERROR_TYPE_ACTION, action,
3256 "configuration cannot be null");
3257 conf = (const struct rte_flow_action_set_tag *)action->conf;
3259 return rte_flow_error_set(error, EINVAL,
3260 RTE_FLOW_ERROR_TYPE_ACTION, action,
3261 "zero mask doesn't have any effect");
3262 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3265 if (!attr->transfer && attr->ingress &&
3266 (action_flags & terminal_action_flags))
3267 return rte_flow_error_set(error, EINVAL,
3268 RTE_FLOW_ERROR_TYPE_ACTION, action,
3269 "set_tag has no effect"
3270 " with terminal actions");
3275 * Validate count action.
3278 * Pointer to rte_eth_dev structure.
3280 * Indicator if action is shared.
3281 * @param[in] action_flags
3282 * Holds the actions detected until now.
3284 * Pointer to error structure.
3287 * 0 on success, a negative errno value otherwise and rte_errno is set.
3290 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3291 uint64_t action_flags,
3292 struct rte_flow_error *error)
3294 struct mlx5_priv *priv = dev->data->dev_private;
3296 if (!priv->sh->devx)
3298 if (action_flags & MLX5_FLOW_ACTION_COUNT)
3299 return rte_flow_error_set(error, EINVAL,
3300 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3301 "duplicate count actions set");
3302 if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3303 !priv->sh->flow_hit_aso_en)
3304 return rte_flow_error_set(error, EINVAL,
3305 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3306 "old age and shared count combination is not supported");
3307 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3311 return rte_flow_error_set
3313 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3315 "count action not supported");
3319 * Validate the L2 encap action.
3322 * Pointer to the rte_eth_dev structure.
3323 * @param[in] action_flags
3324 * Holds the actions detected until now.
3326 * Pointer to the action structure.
3328 * Pointer to flow attributes.
3330 * Pointer to error structure.
3333 * 0 on success, a negative errno value otherwise and rte_errno is set.
3336 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3337 uint64_t action_flags,
3338 const struct rte_flow_action *action,
3339 const struct rte_flow_attr *attr,
3340 struct rte_flow_error *error)
3342 const struct mlx5_priv *priv = dev->data->dev_private;
3344 if (!(action->conf))
3345 return rte_flow_error_set(error, EINVAL,
3346 RTE_FLOW_ERROR_TYPE_ACTION, action,
3347 "configuration cannot be null");
3348 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3349 return rte_flow_error_set(error, EINVAL,
3350 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3351 "can only have a single encap action "
3353 if (!attr->transfer && priv->representor)
3354 return rte_flow_error_set(error, ENOTSUP,
3355 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3356 "encap action for VF representor "
3357 "not supported on NIC table");
3362 * Validate a decap action.
3365 * Pointer to the rte_eth_dev structure.
3366 * @param[in] action_flags
3367 * Holds the actions detected until now.
3369 * Pointer to the action structure.
3370 * @param[in] item_flags
3371 * Holds the items detected.
3373 * Pointer to flow attributes
3375 * Pointer to error structure.
3378 * 0 on success, a negative errno value otherwise and rte_errno is set.
3381 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3382 uint64_t action_flags,
3383 const struct rte_flow_action *action,
3384 const uint64_t item_flags,
3385 const struct rte_flow_attr *attr,
3386 struct rte_flow_error *error)
3388 const struct mlx5_priv *priv = dev->data->dev_private;
3390 if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3391 !priv->config.decap_en)
3392 return rte_flow_error_set(error, ENOTSUP,
3393 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3394 "decap is not enabled");
3395 if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3396 return rte_flow_error_set(error, ENOTSUP,
3397 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3399 MLX5_FLOW_ACTION_DECAP ? "can only "
3400 "have a single decap action" : "decap "
3401 "after encap is not supported");
3402 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3403 return rte_flow_error_set(error, EINVAL,
3404 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3405 "can't have decap action after"
3408 return rte_flow_error_set(error, ENOTSUP,
3409 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3411 "decap action not supported for "
3413 if (!attr->transfer && priv->representor)
3414 return rte_flow_error_set(error, ENOTSUP,
3415 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3416 "decap action for VF representor "
3417 "not supported on NIC table");
3418 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3419 !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3420 return rte_flow_error_set(error, ENOTSUP,
3421 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3422 "VXLAN item should be present for VXLAN decap");
3426 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3429 * Validate the raw encap and decap actions.
3432 * Pointer to the rte_eth_dev structure.
3434 * Pointer to the decap action.
3436 * Pointer to the encap action.
3438 * Pointer to flow attributes
3439 * @param[in/out] action_flags
3440 * Holds the actions detected until now.
3441 * @param[out] actions_n
3442 * pointer to the number of actions counter.
3444 * Pointer to the action structure.
3445 * @param[in] item_flags
3446 * Holds the items detected.
3448 * Pointer to error structure.
3451 * 0 on success, a negative errno value otherwise and rte_errno is set.
3454 flow_dv_validate_action_raw_encap_decap
3455 (struct rte_eth_dev *dev,
3456 const struct rte_flow_action_raw_decap *decap,
3457 const struct rte_flow_action_raw_encap *encap,
3458 const struct rte_flow_attr *attr, uint64_t *action_flags,
3459 int *actions_n, const struct rte_flow_action *action,
3460 uint64_t item_flags, struct rte_flow_error *error)
3462 const struct mlx5_priv *priv = dev->data->dev_private;
3465 if (encap && (!encap->size || !encap->data))
3466 return rte_flow_error_set(error, EINVAL,
3467 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3468 "raw encap data cannot be empty");
3469 if (decap && encap) {
3470 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3471 encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3474 else if (encap->size <=
3475 MLX5_ENCAPSULATION_DECISION_SIZE &&
3477 MLX5_ENCAPSULATION_DECISION_SIZE)
3480 else if (encap->size >
3481 MLX5_ENCAPSULATION_DECISION_SIZE &&
3483 MLX5_ENCAPSULATION_DECISION_SIZE)
3484 /* 2 L2 actions: encap and decap. */
3487 return rte_flow_error_set(error,
3489 RTE_FLOW_ERROR_TYPE_ACTION,
3490 NULL, "unsupported too small "
3491 "raw decap and too small raw "
3492 "encap combination");
3495 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3496 item_flags, attr, error);
3499 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3503 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3504 return rte_flow_error_set(error, ENOTSUP,
3505 RTE_FLOW_ERROR_TYPE_ACTION,
3507 "small raw encap size");
3508 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3509 return rte_flow_error_set(error, EINVAL,
3510 RTE_FLOW_ERROR_TYPE_ACTION,
3512 "more than one encap action");
3513 if (!attr->transfer && priv->representor)
3514 return rte_flow_error_set
3516 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3517 "encap action for VF representor "
3518 "not supported on NIC table");
3519 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3526 * Validate the ASO CT action.
3529 * Pointer to the rte_eth_dev structure.
3530 * @param[in] action_flags
3531 * Holds the actions detected until now.
3532 * @param[in] item_flags
3533 * The items found in this flow rule.
3535 * Pointer to flow attributes.
3537 * Pointer to error structure.
3540 * 0 on success, a negative errno value otherwise and rte_errno is set.
3543 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3544 uint64_t action_flags,
3545 uint64_t item_flags,
3546 const struct rte_flow_attr *attr,
3547 struct rte_flow_error *error)
3551 if (attr->group == 0 && !attr->transfer)
3552 return rte_flow_error_set(error, ENOTSUP,
3553 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3555 "Only support non-root table");
3556 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3557 return rte_flow_error_set(error, ENOTSUP,
3558 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3559 "CT cannot follow a fate action");
3560 if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3561 (action_flags & MLX5_FLOW_ACTION_AGE))
3562 return rte_flow_error_set(error, EINVAL,
3563 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3564 "Only one ASO action is supported");
3565 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3566 return rte_flow_error_set(error, EINVAL,
3567 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3568 "Encap cannot exist before CT");
3569 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3570 return rte_flow_error_set(error, EINVAL,
3571 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3572 "Not a outer TCP packet");
3577 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3578 struct mlx5_list_entry *entry, void *cb_ctx)
3580 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3581 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3582 struct mlx5_flow_dv_encap_decap_resource *resource;
3584 resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3586 if (resource->reformat_type == ctx_resource->reformat_type &&
3587 resource->ft_type == ctx_resource->ft_type &&
3588 resource->flags == ctx_resource->flags &&
3589 resource->size == ctx_resource->size &&
3590 !memcmp((const void *)resource->buf,
3591 (const void *)ctx_resource->buf,
3597 struct mlx5_list_entry *
3598 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3600 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3601 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3602 struct mlx5dv_dr_domain *domain;
3603 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3604 struct mlx5_flow_dv_encap_decap_resource *resource;
3608 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3609 domain = sh->fdb_domain;
3610 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3611 domain = sh->rx_domain;
3613 domain = sh->tx_domain;
3614 /* Register new encap/decap resource. */
3615 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3617 rte_flow_error_set(ctx->error, ENOMEM,
3618 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3619 "cannot allocate resource memory");
3622 *resource = *ctx_resource;
3623 resource->idx = idx;
3624 ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->cdev->ctx,
3628 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3629 rte_flow_error_set(ctx->error, ENOMEM,
3630 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3631 NULL, "cannot create action");
3635 return &resource->entry;
3638 struct mlx5_list_entry *
3639 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3642 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3643 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3644 struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3647 cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3649 if (!cache_resource) {
3650 rte_flow_error_set(ctx->error, ENOMEM,
3651 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3652 "cannot allocate resource memory");
3655 memcpy(cache_resource, oentry, sizeof(*cache_resource));
3656 cache_resource->idx = idx;
3657 return &cache_resource->entry;
3661 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3663 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3664 struct mlx5_flow_dv_encap_decap_resource *res =
3665 container_of(entry, typeof(*res), entry);
3667 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3671 * Find existing encap/decap resource or create and register a new one.
3673 * @param[in, out] dev
3674 * Pointer to rte_eth_dev structure.
3675 * @param[in, out] resource
3676 * Pointer to encap/decap resource.
3677 * @parm[in, out] dev_flow
3678 * Pointer to the dev_flow.
3680 * pointer to error structure.
3683 * 0 on success otherwise -errno and errno is set.
3686 flow_dv_encap_decap_resource_register
3687 (struct rte_eth_dev *dev,
3688 struct mlx5_flow_dv_encap_decap_resource *resource,
3689 struct mlx5_flow *dev_flow,
3690 struct rte_flow_error *error)
3692 struct mlx5_priv *priv = dev->data->dev_private;
3693 struct mlx5_dev_ctx_shared *sh = priv->sh;
3694 struct mlx5_list_entry *entry;
3698 uint32_t refmt_type:8;
3700 * Header reformat actions can be shared between
3701 * non-root tables. One bit to indicate non-root
3705 uint32_t reserve:15;
3708 } encap_decap_key = {
3710 .ft_type = resource->ft_type,
3711 .refmt_type = resource->reformat_type,
3712 .is_root = !!dev_flow->dv.group,
3716 struct mlx5_flow_cb_ctx ctx = {
3720 struct mlx5_hlist *encaps_decaps;
3723 encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3725 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3727 flow_dv_encap_decap_create_cb,
3728 flow_dv_encap_decap_match_cb,
3729 flow_dv_encap_decap_remove_cb,
3730 flow_dv_encap_decap_clone_cb,
3731 flow_dv_encap_decap_clone_free_cb);
3732 if (unlikely(!encaps_decaps))
3734 resource->flags = dev_flow->dv.group ? 0 : 1;
3735 key64 = __rte_raw_cksum(&encap_decap_key.v32,
3736 sizeof(encap_decap_key.v32), 0);
3737 if (resource->reformat_type !=
3738 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3740 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3741 entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3744 resource = container_of(entry, typeof(*resource), entry);
3745 dev_flow->dv.encap_decap = resource;
3746 dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3751 * Find existing table jump resource or create and register a new one.
3753 * @param[in, out] dev
3754 * Pointer to rte_eth_dev structure.
3755 * @param[in, out] tbl
3756 * Pointer to flow table resource.
3757 * @parm[in, out] dev_flow
3758 * Pointer to the dev_flow.
3760 * pointer to error structure.
3763 * 0 on success otherwise -errno and errno is set.
3766 flow_dv_jump_tbl_resource_register
3767 (struct rte_eth_dev *dev __rte_unused,
3768 struct mlx5_flow_tbl_resource *tbl,
3769 struct mlx5_flow *dev_flow,
3770 struct rte_flow_error *error __rte_unused)
3772 struct mlx5_flow_tbl_data_entry *tbl_data =
3773 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3776 MLX5_ASSERT(tbl_data->jump.action);
3777 dev_flow->handle->rix_jump = tbl_data->idx;
3778 dev_flow->dv.jump = &tbl_data->jump;
3783 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3784 struct mlx5_list_entry *entry, void *cb_ctx)
3786 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3787 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3788 struct mlx5_flow_dv_port_id_action_resource *res =
3789 container_of(entry, typeof(*res), entry);
3791 return ref->port_id != res->port_id;
3794 struct mlx5_list_entry *
3795 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3797 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3798 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3799 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3800 struct mlx5_flow_dv_port_id_action_resource *resource;
3804 /* Register new port id action resource. */
3805 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3807 rte_flow_error_set(ctx->error, ENOMEM,
3808 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3809 "cannot allocate port_id action memory");
3813 ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3817 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3818 rte_flow_error_set(ctx->error, ENOMEM,
3819 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3820 "cannot create action");
3823 resource->idx = idx;
3824 return &resource->entry;
3827 struct mlx5_list_entry *
3828 flow_dv_port_id_clone_cb(void *tool_ctx,
3829 struct mlx5_list_entry *entry __rte_unused,
3832 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3833 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3834 struct mlx5_flow_dv_port_id_action_resource *resource;
3837 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3839 rte_flow_error_set(ctx->error, ENOMEM,
3840 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3841 "cannot allocate port_id action memory");
3844 memcpy(resource, entry, sizeof(*resource));
3845 resource->idx = idx;
3846 return &resource->entry;
3850 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3852 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3853 struct mlx5_flow_dv_port_id_action_resource *resource =
3854 container_of(entry, typeof(*resource), entry);
3856 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3860 * Find existing table port ID resource or create and register a new one.
3862 * @param[in, out] dev
3863 * Pointer to rte_eth_dev structure.
3864 * @param[in, out] ref
3865 * Pointer to port ID action resource reference.
3866 * @parm[in, out] dev_flow
3867 * Pointer to the dev_flow.
3869 * pointer to error structure.
3872 * 0 on success otherwise -errno and errno is set.
3875 flow_dv_port_id_action_resource_register
3876 (struct rte_eth_dev *dev,
3877 struct mlx5_flow_dv_port_id_action_resource *ref,
3878 struct mlx5_flow *dev_flow,
3879 struct rte_flow_error *error)
3881 struct mlx5_priv *priv = dev->data->dev_private;
3882 struct mlx5_list_entry *entry;
3883 struct mlx5_flow_dv_port_id_action_resource *resource;
3884 struct mlx5_flow_cb_ctx ctx = {
3889 entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3892 resource = container_of(entry, typeof(*resource), entry);
3893 dev_flow->dv.port_id_action = resource;
3894 dev_flow->handle->rix_port_id_action = resource->idx;
3899 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3900 struct mlx5_list_entry *entry, void *cb_ctx)
3902 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3903 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3904 struct mlx5_flow_dv_push_vlan_action_resource *res =
3905 container_of(entry, typeof(*res), entry);
3907 return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3910 struct mlx5_list_entry *
3911 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3913 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3914 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3915 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3916 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3917 struct mlx5dv_dr_domain *domain;
3921 /* Register new port id action resource. */
3922 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3924 rte_flow_error_set(ctx->error, ENOMEM,
3925 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3926 "cannot allocate push_vlan action memory");
3930 if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3931 domain = sh->fdb_domain;
3932 else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3933 domain = sh->rx_domain;
3935 domain = sh->tx_domain;
3936 ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3939 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3940 rte_flow_error_set(ctx->error, ENOMEM,
3941 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3942 "cannot create push vlan action");
3945 resource->idx = idx;
3946 return &resource->entry;
3949 struct mlx5_list_entry *
3950 flow_dv_push_vlan_clone_cb(void *tool_ctx,
3951 struct mlx5_list_entry *entry __rte_unused,
3954 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3955 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3956 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3959 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3961 rte_flow_error_set(ctx->error, ENOMEM,
3962 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3963 "cannot allocate push_vlan action memory");
3966 memcpy(resource, entry, sizeof(*resource));
3967 resource->idx = idx;
3968 return &resource->entry;
3972 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3974 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3975 struct mlx5_flow_dv_push_vlan_action_resource *resource =
3976 container_of(entry, typeof(*resource), entry);
3978 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
3982 * Find existing push vlan resource or create and register a new one.
3984 * @param [in, out] dev
3985 * Pointer to rte_eth_dev structure.
3986 * @param[in, out] ref
3987 * Pointer to port ID action resource reference.
3988 * @parm[in, out] dev_flow
3989 * Pointer to the dev_flow.
3991 * pointer to error structure.
3994 * 0 on success otherwise -errno and errno is set.
3997 flow_dv_push_vlan_action_resource_register
3998 (struct rte_eth_dev *dev,
3999 struct mlx5_flow_dv_push_vlan_action_resource *ref,
4000 struct mlx5_flow *dev_flow,
4001 struct rte_flow_error *error)
4003 struct mlx5_priv *priv = dev->data->dev_private;
4004 struct mlx5_flow_dv_push_vlan_action_resource *resource;
4005 struct mlx5_list_entry *entry;
4006 struct mlx5_flow_cb_ctx ctx = {
4011 entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4014 resource = container_of(entry, typeof(*resource), entry);
4016 dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4017 dev_flow->dv.push_vlan_res = resource;
4022 * Get the size of specific rte_flow_item_type hdr size
4024 * @param[in] item_type
4025 * Tested rte_flow_item_type.
4028 * sizeof struct item_type, 0 if void or irrelevant.
4031 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4035 switch (item_type) {
4036 case RTE_FLOW_ITEM_TYPE_ETH:
4037 retval = sizeof(struct rte_ether_hdr);
4039 case RTE_FLOW_ITEM_TYPE_VLAN:
4040 retval = sizeof(struct rte_vlan_hdr);
4042 case RTE_FLOW_ITEM_TYPE_IPV4:
4043 retval = sizeof(struct rte_ipv4_hdr);
4045 case RTE_FLOW_ITEM_TYPE_IPV6:
4046 retval = sizeof(struct rte_ipv6_hdr);
4048 case RTE_FLOW_ITEM_TYPE_UDP:
4049 retval = sizeof(struct rte_udp_hdr);
4051 case RTE_FLOW_ITEM_TYPE_TCP:
4052 retval = sizeof(struct rte_tcp_hdr);
4054 case RTE_FLOW_ITEM_TYPE_VXLAN:
4055 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4056 retval = sizeof(struct rte_vxlan_hdr);
4058 case RTE_FLOW_ITEM_TYPE_GRE:
4059 case RTE_FLOW_ITEM_TYPE_NVGRE:
4060 retval = sizeof(struct rte_gre_hdr);
4062 case RTE_FLOW_ITEM_TYPE_MPLS:
4063 retval = sizeof(struct rte_mpls_hdr);
4065 case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4073 #define MLX5_ENCAP_IPV4_VERSION 0x40
4074 #define MLX5_ENCAP_IPV4_IHL_MIN 0x05
4075 #define MLX5_ENCAP_IPV4_TTL_DEF 0x40
4076 #define MLX5_ENCAP_IPV6_VTC_FLOW 0x60000000
4077 #define MLX5_ENCAP_IPV6_HOP_LIMIT 0xff
4078 #define MLX5_ENCAP_VXLAN_FLAGS 0x08000000
4079 #define MLX5_ENCAP_VXLAN_GPE_FLAGS 0x04
4082 * Convert the encap action data from list of rte_flow_item to raw buffer
4085 * Pointer to rte_flow_item objects list.
4087 * Pointer to the output buffer.
4089 * Pointer to the output buffer size.
4091 * Pointer to the error structure.
4094 * 0 on success, a negative errno value otherwise and rte_errno is set.
4097 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4098 size_t *size, struct rte_flow_error *error)
4100 struct rte_ether_hdr *eth = NULL;
4101 struct rte_vlan_hdr *vlan = NULL;
4102 struct rte_ipv4_hdr *ipv4 = NULL;
4103 struct rte_ipv6_hdr *ipv6 = NULL;
4104 struct rte_udp_hdr *udp = NULL;
4105 struct rte_vxlan_hdr *vxlan = NULL;
4106 struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4107 struct rte_gre_hdr *gre = NULL;
4109 size_t temp_size = 0;
4112 return rte_flow_error_set(error, EINVAL,
4113 RTE_FLOW_ERROR_TYPE_ACTION,
4114 NULL, "invalid empty data");
4115 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4116 len = flow_dv_get_item_hdr_len(items->type);
4117 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4118 return rte_flow_error_set(error, EINVAL,
4119 RTE_FLOW_ERROR_TYPE_ACTION,
4120 (void *)items->type,
4121 "items total size is too big"
4122 " for encap action");
4123 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4124 switch (items->type) {
4125 case RTE_FLOW_ITEM_TYPE_ETH:
4126 eth = (struct rte_ether_hdr *)&buf[temp_size];
4128 case RTE_FLOW_ITEM_TYPE_VLAN:
4129 vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4131 return rte_flow_error_set(error, EINVAL,
4132 RTE_FLOW_ERROR_TYPE_ACTION,
4133 (void *)items->type,
4134 "eth header not found");
4135 if (!eth->ether_type)
4136 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4138 case RTE_FLOW_ITEM_TYPE_IPV4:
4139 ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4141 return rte_flow_error_set(error, EINVAL,
4142 RTE_FLOW_ERROR_TYPE_ACTION,
4143 (void *)items->type,
4144 "neither eth nor vlan"
4146 if (vlan && !vlan->eth_proto)
4147 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4148 else if (eth && !eth->ether_type)
4149 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4150 if (!ipv4->version_ihl)
4151 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4152 MLX5_ENCAP_IPV4_IHL_MIN;
4153 if (!ipv4->time_to_live)
4154 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4156 case RTE_FLOW_ITEM_TYPE_IPV6:
4157 ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4159 return rte_flow_error_set(error, EINVAL,
4160 RTE_FLOW_ERROR_TYPE_ACTION,
4161 (void *)items->type,
4162 "neither eth nor vlan"
4164 if (vlan && !vlan->eth_proto)
4165 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4166 else if (eth && !eth->ether_type)
4167 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4168 if (!ipv6->vtc_flow)
4170 RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4171 if (!ipv6->hop_limits)
4172 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4174 case RTE_FLOW_ITEM_TYPE_UDP:
4175 udp = (struct rte_udp_hdr *)&buf[temp_size];
4177 return rte_flow_error_set(error, EINVAL,
4178 RTE_FLOW_ERROR_TYPE_ACTION,
4179 (void *)items->type,
4180 "ip header not found");
4181 if (ipv4 && !ipv4->next_proto_id)
4182 ipv4->next_proto_id = IPPROTO_UDP;
4183 else if (ipv6 && !ipv6->proto)
4184 ipv6->proto = IPPROTO_UDP;
4186 case RTE_FLOW_ITEM_TYPE_VXLAN:
4187 vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4189 return rte_flow_error_set(error, EINVAL,
4190 RTE_FLOW_ERROR_TYPE_ACTION,
4191 (void *)items->type,
4192 "udp header not found");
4194 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4195 if (!vxlan->vx_flags)
4197 RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4199 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4200 vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4202 return rte_flow_error_set(error, EINVAL,
4203 RTE_FLOW_ERROR_TYPE_ACTION,
4204 (void *)items->type,
4205 "udp header not found");
4206 if (!vxlan_gpe->proto)
4207 return rte_flow_error_set(error, EINVAL,
4208 RTE_FLOW_ERROR_TYPE_ACTION,
4209 (void *)items->type,
4210 "next protocol not found");
4213 RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4214 if (!vxlan_gpe->vx_flags)
4215 vxlan_gpe->vx_flags =
4216 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4218 case RTE_FLOW_ITEM_TYPE_GRE:
4219 case RTE_FLOW_ITEM_TYPE_NVGRE:
4220 gre = (struct rte_gre_hdr *)&buf[temp_size];
4222 return rte_flow_error_set(error, EINVAL,
4223 RTE_FLOW_ERROR_TYPE_ACTION,
4224 (void *)items->type,
4225 "next protocol not found");
4227 return rte_flow_error_set(error, EINVAL,
4228 RTE_FLOW_ERROR_TYPE_ACTION,
4229 (void *)items->type,
4230 "ip header not found");
4231 if (ipv4 && !ipv4->next_proto_id)
4232 ipv4->next_proto_id = IPPROTO_GRE;
4233 else if (ipv6 && !ipv6->proto)
4234 ipv6->proto = IPPROTO_GRE;
4236 case RTE_FLOW_ITEM_TYPE_VOID:
4239 return rte_flow_error_set(error, EINVAL,
4240 RTE_FLOW_ERROR_TYPE_ACTION,
4241 (void *)items->type,
4242 "unsupported item type");
4252 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4254 struct rte_ether_hdr *eth = NULL;
4255 struct rte_vlan_hdr *vlan = NULL;
4256 struct rte_ipv6_hdr *ipv6 = NULL;
4257 struct rte_udp_hdr *udp = NULL;
4261 eth = (struct rte_ether_hdr *)data;
4262 next_hdr = (char *)(eth + 1);
4263 proto = RTE_BE16(eth->ether_type);
4266 while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4267 vlan = (struct rte_vlan_hdr *)next_hdr;
4268 proto = RTE_BE16(vlan->eth_proto);
4269 next_hdr += sizeof(struct rte_vlan_hdr);
4272 /* HW calculates IPv4 csum. no need to proceed */
4273 if (proto == RTE_ETHER_TYPE_IPV4)
4276 /* non IPv4/IPv6 header. not supported */
4277 if (proto != RTE_ETHER_TYPE_IPV6) {
4278 return rte_flow_error_set(error, ENOTSUP,
4279 RTE_FLOW_ERROR_TYPE_ACTION,
4280 NULL, "Cannot offload non IPv4/IPv6");
4283 ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4285 /* ignore non UDP */
4286 if (ipv6->proto != IPPROTO_UDP)
4289 udp = (struct rte_udp_hdr *)(ipv6 + 1);
4290 udp->dgram_cksum = 0;
4296 * Convert L2 encap action to DV specification.
4299 * Pointer to rte_eth_dev structure.
4301 * Pointer to action structure.
4302 * @param[in, out] dev_flow
4303 * Pointer to the mlx5_flow.
4304 * @param[in] transfer
4305 * Mark if the flow is E-Switch flow.
4307 * Pointer to the error structure.
4310 * 0 on success, a negative errno value otherwise and rte_errno is set.
4313 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4314 const struct rte_flow_action *action,
4315 struct mlx5_flow *dev_flow,
4317 struct rte_flow_error *error)
4319 const struct rte_flow_item *encap_data;
4320 const struct rte_flow_action_raw_encap *raw_encap_data;
4321 struct mlx5_flow_dv_encap_decap_resource res = {
4323 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4324 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4325 MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4328 if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4330 (const struct rte_flow_action_raw_encap *)action->conf;
4331 res.size = raw_encap_data->size;
4332 memcpy(res.buf, raw_encap_data->data, res.size);
4334 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4336 ((const struct rte_flow_action_vxlan_encap *)
4337 action->conf)->definition;
4340 ((const struct rte_flow_action_nvgre_encap *)
4341 action->conf)->definition;
4342 if (flow_dv_convert_encap_data(encap_data, res.buf,
4346 if (flow_dv_zero_encap_udp_csum(res.buf, error))
4348 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4349 return rte_flow_error_set(error, EINVAL,
4350 RTE_FLOW_ERROR_TYPE_ACTION,
4351 NULL, "can't create L2 encap action");
4356 * Convert L2 decap action to DV specification.
4359 * Pointer to rte_eth_dev structure.
4360 * @param[in, out] dev_flow
4361 * Pointer to the mlx5_flow.
4362 * @param[in] transfer
4363 * Mark if the flow is E-Switch flow.
4365 * Pointer to the error structure.
4368 * 0 on success, a negative errno value otherwise and rte_errno is set.
4371 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4372 struct mlx5_flow *dev_flow,
4374 struct rte_flow_error *error)
4376 struct mlx5_flow_dv_encap_decap_resource res = {
4379 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4380 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4381 MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4384 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4385 return rte_flow_error_set(error, EINVAL,
4386 RTE_FLOW_ERROR_TYPE_ACTION,
4387 NULL, "can't create L2 decap action");
4392 * Convert raw decap/encap (L3 tunnel) action to DV specification.
4395 * Pointer to rte_eth_dev structure.
4397 * Pointer to action structure.
4398 * @param[in, out] dev_flow
4399 * Pointer to the mlx5_flow.
4401 * Pointer to the flow attributes.
4403 * Pointer to the error structure.
4406 * 0 on success, a negative errno value otherwise and rte_errno is set.
4409 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4410 const struct rte_flow_action *action,
4411 struct mlx5_flow *dev_flow,
4412 const struct rte_flow_attr *attr,
4413 struct rte_flow_error *error)
4415 const struct rte_flow_action_raw_encap *encap_data;
4416 struct mlx5_flow_dv_encap_decap_resource res;
4418 memset(&res, 0, sizeof(res));
4419 encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4420 res.size = encap_data->size;
4421 memcpy(res.buf, encap_data->data, res.size);
4422 res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4423 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4424 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4426 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4428 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4429 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4430 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4431 return rte_flow_error_set(error, EINVAL,
4432 RTE_FLOW_ERROR_TYPE_ACTION,
4433 NULL, "can't create encap action");
4438 * Create action push VLAN.
4441 * Pointer to rte_eth_dev structure.
4443 * Pointer to the flow attributes.
4445 * Pointer to the vlan to push to the Ethernet header.
4446 * @param[in, out] dev_flow
4447 * Pointer to the mlx5_flow.
4449 * Pointer to the error structure.
4452 * 0 on success, a negative errno value otherwise and rte_errno is set.
4455 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4456 const struct rte_flow_attr *attr,
4457 const struct rte_vlan_hdr *vlan,
4458 struct mlx5_flow *dev_flow,
4459 struct rte_flow_error *error)
4461 struct mlx5_flow_dv_push_vlan_action_resource res;
4463 memset(&res, 0, sizeof(res));
4465 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4468 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4470 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4471 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4472 return flow_dv_push_vlan_action_resource_register
4473 (dev, &res, dev_flow, error);
4477 * Validate the modify-header actions.
4479 * @param[in] action_flags
4480 * Holds the actions detected until now.
4482 * Pointer to the modify action.
4484 * Pointer to error structure.
4487 * 0 on success, a negative errno value otherwise and rte_errno is set.
4490 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4491 const struct rte_flow_action *action,
4492 struct rte_flow_error *error)
4494 if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4495 return rte_flow_error_set(error, EINVAL,
4496 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4497 NULL, "action configuration not set");
4498 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4499 return rte_flow_error_set(error, EINVAL,
4500 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4501 "can't have encap action before"
4507 * Validate the modify-header MAC address actions.
4509 * @param[in] action_flags
4510 * Holds the actions detected until now.
4512 * Pointer to the modify action.
4513 * @param[in] item_flags
4514 * Holds the items detected.
4516 * Pointer to error structure.
4519 * 0 on success, a negative errno value otherwise and rte_errno is set.
4522 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4523 const struct rte_flow_action *action,
4524 const uint64_t item_flags,
4525 struct rte_flow_error *error)
4529 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4531 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4532 return rte_flow_error_set(error, EINVAL,
4533 RTE_FLOW_ERROR_TYPE_ACTION,
4535 "no L2 item in pattern");
4541 * Validate the modify-header IPv4 address actions.
4543 * @param[in] action_flags
4544 * Holds the actions detected until now.
4546 * Pointer to the modify action.
4547 * @param[in] item_flags
4548 * Holds the items detected.
4550 * Pointer to error structure.
4553 * 0 on success, a negative errno value otherwise and rte_errno is set.
4556 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4557 const struct rte_flow_action *action,
4558 const uint64_t item_flags,
4559 struct rte_flow_error *error)
4564 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4566 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4567 MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4568 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4569 if (!(item_flags & layer))
4570 return rte_flow_error_set(error, EINVAL,
4571 RTE_FLOW_ERROR_TYPE_ACTION,
4573 "no ipv4 item in pattern");
4579 * Validate the modify-header IPv6 address actions.
4581 * @param[in] action_flags
4582 * Holds the actions detected until now.
4584 * Pointer to the modify action.
4585 * @param[in] item_flags
4586 * Holds the items detected.
4588 * Pointer to error structure.
4591 * 0 on success, a negative errno value otherwise and rte_errno is set.
4594 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4595 const struct rte_flow_action *action,
4596 const uint64_t item_flags,
4597 struct rte_flow_error *error)
4602 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4604 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4605 MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4606 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4607 if (!(item_flags & layer))
4608 return rte_flow_error_set(error, EINVAL,
4609 RTE_FLOW_ERROR_TYPE_ACTION,
4611 "no ipv6 item in pattern");
4617 * Validate the modify-header TP actions.
4619 * @param[in] action_flags
4620 * Holds the actions detected until now.
4622 * Pointer to the modify action.
4623 * @param[in] item_flags
4624 * Holds the items detected.
4626 * Pointer to error structure.
4629 * 0 on success, a negative errno value otherwise and rte_errno is set.
4632 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4633 const struct rte_flow_action *action,
4634 const uint64_t item_flags,
4635 struct rte_flow_error *error)
4640 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4642 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4643 MLX5_FLOW_LAYER_INNER_L4 :
4644 MLX5_FLOW_LAYER_OUTER_L4;
4645 if (!(item_flags & layer))
4646 return rte_flow_error_set(error, EINVAL,
4647 RTE_FLOW_ERROR_TYPE_ACTION,
4648 NULL, "no transport layer "
4655 * Validate the modify-header actions of increment/decrement
4656 * TCP Sequence-number.
4658 * @param[in] action_flags
4659 * Holds the actions detected until now.
4661 * Pointer to the modify action.
4662 * @param[in] item_flags
4663 * Holds the items detected.
4665 * Pointer to error structure.
4668 * 0 on success, a negative errno value otherwise and rte_errno is set.
4671 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4672 const struct rte_flow_action *action,
4673 const uint64_t item_flags,
4674 struct rte_flow_error *error)
4679 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4681 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4682 MLX5_FLOW_LAYER_INNER_L4_TCP :
4683 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4684 if (!(item_flags & layer))
4685 return rte_flow_error_set(error, EINVAL,
4686 RTE_FLOW_ERROR_TYPE_ACTION,
4687 NULL, "no TCP item in"
4689 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4690 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4691 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4692 (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4693 return rte_flow_error_set(error, EINVAL,
4694 RTE_FLOW_ERROR_TYPE_ACTION,
4696 "cannot decrease and increase"
4697 " TCP sequence number"
4698 " at the same time");
4704 * Validate the modify-header actions of increment/decrement
4705 * TCP Acknowledgment number.
4707 * @param[in] action_flags
4708 * Holds the actions detected until now.
4710 * Pointer to the modify action.
4711 * @param[in] item_flags
4712 * Holds the items detected.
4714 * Pointer to error structure.
4717 * 0 on success, a negative errno value otherwise and rte_errno is set.
4720 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4721 const struct rte_flow_action *action,
4722 const uint64_t item_flags,
4723 struct rte_flow_error *error)
4728 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4730 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4731 MLX5_FLOW_LAYER_INNER_L4_TCP :
4732 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4733 if (!(item_flags & layer))
4734 return rte_flow_error_set(error, EINVAL,
4735 RTE_FLOW_ERROR_TYPE_ACTION,
4736 NULL, "no TCP item in"
4738 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4739 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4740 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4741 (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4742 return rte_flow_error_set(error, EINVAL,
4743 RTE_FLOW_ERROR_TYPE_ACTION,
4745 "cannot decrease and increase"
4746 " TCP acknowledgment number"
4747 " at the same time");
4753 * Validate the modify-header TTL actions.
4755 * @param[in] action_flags
4756 * Holds the actions detected until now.
4758 * Pointer to the modify action.
4759 * @param[in] item_flags
4760 * Holds the items detected.
4762 * Pointer to error structure.
4765 * 0 on success, a negative errno value otherwise and rte_errno is set.
4768 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4769 const struct rte_flow_action *action,
4770 const uint64_t item_flags,
4771 struct rte_flow_error *error)
4776 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4778 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4779 MLX5_FLOW_LAYER_INNER_L3 :
4780 MLX5_FLOW_LAYER_OUTER_L3;
4781 if (!(item_flags & layer))
4782 return rte_flow_error_set(error, EINVAL,
4783 RTE_FLOW_ERROR_TYPE_ACTION,
4785 "no IP protocol in pattern");
4791 * Validate the generic modify field actions.
4793 * Pointer to the rte_eth_dev structure.
4794 * @param[in] action_flags
4795 * Holds the actions detected until now.
4797 * Pointer to the modify action.
4799 * Pointer to the flow attributes.
4801 * Pointer to error structure.
4804 * Number of header fields to modify (0 or more) on success,
4805 * a negative errno value otherwise and rte_errno is set.
4808 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4809 const uint64_t action_flags,
4810 const struct rte_flow_action *action,
4811 const struct rte_flow_attr *attr,
4812 struct rte_flow_error *error)
4815 struct mlx5_priv *priv = dev->data->dev_private;
4816 struct mlx5_dev_config *config = &priv->config;
4817 const struct rte_flow_action_modify_field *action_modify_field =
4819 uint32_t dst_width = mlx5_flow_item_field_width(dev,
4820 action_modify_field->dst.field,
4822 uint32_t src_width = mlx5_flow_item_field_width(dev,
4823 action_modify_field->src.field,
4824 dst_width, attr, error);
4826 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4830 if (action_modify_field->width == 0)
4831 return rte_flow_error_set(error, EINVAL,
4832 RTE_FLOW_ERROR_TYPE_ACTION, action,
4833 "no bits are requested to be modified");
4834 else if (action_modify_field->width > dst_width ||
4835 action_modify_field->width > src_width)
4836 return rte_flow_error_set(error, EINVAL,
4837 RTE_FLOW_ERROR_TYPE_ACTION, action,
4838 "cannot modify more bits than"
4839 " the width of a field");
4840 if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4841 action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4842 if ((action_modify_field->dst.offset +
4843 action_modify_field->width > dst_width) ||
4844 (action_modify_field->dst.offset % 32))
4845 return rte_flow_error_set(error, EINVAL,
4846 RTE_FLOW_ERROR_TYPE_ACTION, action,
4847 "destination offset is too big"
4848 " or not aligned to 4 bytes");
4849 if (action_modify_field->dst.level &&
4850 action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4851 return rte_flow_error_set(error, ENOTSUP,
4852 RTE_FLOW_ERROR_TYPE_ACTION, action,
4853 "inner header fields modification"
4854 " is not supported");
4856 if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4857 action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4858 if (!attr->transfer && !attr->group)
4859 return rte_flow_error_set(error, ENOTSUP,
4860 RTE_FLOW_ERROR_TYPE_ACTION, action,
4861 "modify field action is not"
4862 " supported for group 0");
4863 if ((action_modify_field->src.offset +
4864 action_modify_field->width > src_width) ||
4865 (action_modify_field->src.offset % 32))
4866 return rte_flow_error_set(error, EINVAL,
4867 RTE_FLOW_ERROR_TYPE_ACTION, action,
4868 "source offset is too big"
4869 " or not aligned to 4 bytes");
4870 if (action_modify_field->src.level &&
4871 action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4872 return rte_flow_error_set(error, ENOTSUP,
4873 RTE_FLOW_ERROR_TYPE_ACTION, action,
4874 "inner header fields modification"
4875 " is not supported");
4877 if ((action_modify_field->dst.field ==
4878 action_modify_field->src.field) &&
4879 (action_modify_field->dst.level ==
4880 action_modify_field->src.level))
4881 return rte_flow_error_set(error, EINVAL,
4882 RTE_FLOW_ERROR_TYPE_ACTION, action,
4883 "source and destination fields"
4884 " cannot be the same");
4885 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4886 action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4887 action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4888 return rte_flow_error_set(error, EINVAL,
4889 RTE_FLOW_ERROR_TYPE_ACTION, action,
4890 "mark, immediate value or a pointer to it"
4891 " cannot be used as a destination");
4892 if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4893 action_modify_field->src.field == RTE_FLOW_FIELD_START)
4894 return rte_flow_error_set(error, ENOTSUP,
4895 RTE_FLOW_ERROR_TYPE_ACTION, action,
4896 "modifications of an arbitrary"
4897 " place in a packet is not supported");
4898 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4899 action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4900 return rte_flow_error_set(error, ENOTSUP,
4901 RTE_FLOW_ERROR_TYPE_ACTION, action,
4902 "modifications of the 802.1Q Tag"
4903 " Identifier is not supported");
4904 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4905 action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4906 return rte_flow_error_set(error, ENOTSUP,
4907 RTE_FLOW_ERROR_TYPE_ACTION, action,
4908 "modifications of the VXLAN Network"
4909 " Identifier is not supported");
4910 if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4911 action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4912 return rte_flow_error_set(error, ENOTSUP,
4913 RTE_FLOW_ERROR_TYPE_ACTION, action,
4914 "modifications of the GENEVE Network"
4915 " Identifier is not supported");
4916 if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4917 action_modify_field->src.field == RTE_FLOW_FIELD_MARK)
4918 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4919 !mlx5_flow_ext_mreg_supported(dev))
4920 return rte_flow_error_set(error, ENOTSUP,
4921 RTE_FLOW_ERROR_TYPE_ACTION, action,
4922 "cannot modify mark in legacy mode"
4923 " or without extensive registers");
4924 if (action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4925 action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4926 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
4927 !mlx5_flow_ext_mreg_supported(dev))
4928 return rte_flow_error_set(error, ENOTSUP,
4929 RTE_FLOW_ERROR_TYPE_ACTION, action,
4930 "cannot modify meta without"
4931 " extensive registers support");
4932 ret = flow_dv_get_metadata_reg(dev, attr, error);
4933 if (ret < 0 || ret == REG_NON)
4934 return rte_flow_error_set(error, ENOTSUP,
4935 RTE_FLOW_ERROR_TYPE_ACTION, action,
4936 "cannot modify meta without"
4937 " extensive registers available");
4939 if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4940 return rte_flow_error_set(error, ENOTSUP,
4941 RTE_FLOW_ERROR_TYPE_ACTION, action,
4942 "add and sub operations"
4943 " are not supported");
4944 return (action_modify_field->width / 32) +
4945 !!(action_modify_field->width % 32);
4949 * Validate jump action.
4952 * Pointer to the jump action.
4953 * @param[in] action_flags
4954 * Holds the actions detected until now.
4955 * @param[in] attributes
4956 * Pointer to flow attributes
4957 * @param[in] external
4958 * Action belongs to flow rule created by request external to PMD.
4960 * Pointer to error structure.
4963 * 0 on success, a negative errno value otherwise and rte_errno is set.
4966 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4967 const struct mlx5_flow_tunnel *tunnel,
4968 const struct rte_flow_action *action,
4969 uint64_t action_flags,
4970 const struct rte_flow_attr *attributes,
4971 bool external, struct rte_flow_error *error)
4973 uint32_t target_group, table;
4975 struct flow_grp_info grp_info = {
4976 .external = !!external,
4977 .transfer = !!attributes->transfer,
4981 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4982 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4983 return rte_flow_error_set(error, EINVAL,
4984 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4985 "can't have 2 fate actions in"
4988 return rte_flow_error_set(error, EINVAL,
4989 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4990 NULL, "action configuration not set");
4992 ((const struct rte_flow_action_jump *)action->conf)->group;
4993 ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
4997 if (attributes->group == target_group &&
4998 !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
4999 MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5000 return rte_flow_error_set(error, EINVAL,
5001 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5002 "target group must be other than"
5003 " the current flow group");
5008 * Validate action PORT_ID / REPRESENTED_PORT.
5011 * Pointer to rte_eth_dev structure.
5012 * @param[in] action_flags
5013 * Bit-fields that holds the actions detected until now.
5015 * PORT_ID / REPRESENTED_PORT action structure.
5017 * Attributes of flow that includes this action.
5019 * Pointer to error structure.
5022 * 0 on success, a negative errno value otherwise and rte_errno is set.
5025 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5026 uint64_t action_flags,
5027 const struct rte_flow_action *action,
5028 const struct rte_flow_attr *attr,
5029 struct rte_flow_error *error)
5031 const struct rte_flow_action_port_id *port_id;
5032 const struct rte_flow_action_ethdev *ethdev;
5033 struct mlx5_priv *act_priv;
5034 struct mlx5_priv *dev_priv;
5037 if (!attr->transfer)
5038 return rte_flow_error_set(error, ENOTSUP,
5039 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5041 "port action is valid in transfer"
5043 if (!action || !action->conf)
5044 return rte_flow_error_set(error, ENOTSUP,
5045 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5047 "port action parameters must be"
5049 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5050 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5051 return rte_flow_error_set(error, EINVAL,
5052 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5053 "can have only one fate actions in"
5055 dev_priv = mlx5_dev_to_eswitch_info(dev);
5057 return rte_flow_error_set(error, rte_errno,
5058 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5060 "failed to obtain E-Switch info");
5061 switch (action->type) {
5062 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5063 port_id = action->conf;
5064 port = port_id->original ? dev->data->port_id : port_id->id;
5066 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5067 ethdev = action->conf;
5068 port = ethdev->port_id;
5072 return rte_flow_error_set
5074 RTE_FLOW_ERROR_TYPE_ACTION, action,
5075 "unknown E-Switch action");
5077 act_priv = mlx5_port_to_eswitch_info(port, false);
5079 return rte_flow_error_set
5081 RTE_FLOW_ERROR_TYPE_ACTION_CONF, action->conf,
5082 "failed to obtain E-Switch port id for port");
5083 if (act_priv->domain_id != dev_priv->domain_id)
5084 return rte_flow_error_set
5086 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5087 "port does not belong to"
5088 " E-Switch being configured");
5093 * Get the maximum number of modify header actions.
5096 * Pointer to rte_eth_dev structure.
5098 * Whether action is on root table.
5101 * Max number of modify header actions device can support.
5103 static inline unsigned int
5104 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5108 * There's no way to directly query the max capacity from FW.
5109 * The maximal value on root table should be assumed to be supported.
5112 return MLX5_MAX_MODIFY_NUM;
5114 return MLX5_ROOT_TBL_MODIFY_NUM;
5118 * Validate the meter action.
5121 * Pointer to rte_eth_dev structure.
5122 * @param[in] action_flags
5123 * Bit-fields that holds the actions detected until now.
5125 * Pointer to the meter action.
5127 * Attributes of flow that includes this action.
5128 * @param[in] port_id_item
5129 * Pointer to item indicating port id.
5131 * Pointer to error structure.
5134 * 0 on success, a negative errno value otherwise and rte_ernno is set.
5137 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5138 uint64_t action_flags,
5139 const struct rte_flow_action *action,
5140 const struct rte_flow_attr *attr,
5141 const struct rte_flow_item *port_id_item,
5143 struct rte_flow_error *error)
5145 struct mlx5_priv *priv = dev->data->dev_private;
5146 const struct rte_flow_action_meter *am = action->conf;
5147 struct mlx5_flow_meter_info *fm;
5148 struct mlx5_flow_meter_policy *mtr_policy;
5149 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5152 return rte_flow_error_set(error, EINVAL,
5153 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5154 "meter action conf is NULL");
5156 if (action_flags & MLX5_FLOW_ACTION_METER)
5157 return rte_flow_error_set(error, ENOTSUP,
5158 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5159 "meter chaining not support");
5160 if (action_flags & MLX5_FLOW_ACTION_JUMP)
5161 return rte_flow_error_set(error, ENOTSUP,
5162 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5163 "meter with jump not support");
5165 return rte_flow_error_set(error, ENOTSUP,
5166 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5168 "meter action not supported");
5169 fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5171 return rte_flow_error_set(error, EINVAL,
5172 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5174 /* aso meter can always be shared by different domains */
5175 if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5176 !(fm->transfer == attr->transfer ||
5177 (!fm->ingress && !attr->ingress && attr->egress) ||
5178 (!fm->egress && !attr->egress && attr->ingress)))
5179 return rte_flow_error_set(error, EINVAL,
5180 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5181 "Flow attributes domain are either invalid "
5182 "or have a domain conflict with current "
5183 "meter attributes");
5184 if (fm->def_policy) {
5185 if (!((attr->transfer &&
5186 mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5188 mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5190 mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5191 return rte_flow_error_set(error, EINVAL,
5192 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5193 "Flow attributes domain "
5194 "have a conflict with current "
5195 "meter domain attributes");
5198 mtr_policy = mlx5_flow_meter_policy_find(dev,
5199 fm->policy_id, NULL);
5201 return rte_flow_error_set(error, EINVAL,
5202 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5203 "Invalid policy id for meter ");
5204 if (!((attr->transfer && mtr_policy->transfer) ||
5205 (attr->egress && mtr_policy->egress) ||
5206 (attr->ingress && mtr_policy->ingress)))
5207 return rte_flow_error_set(error, EINVAL,
5208 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5209 "Flow attributes domain "
5210 "have a conflict with current "
5211 "meter domain attributes");
5212 if (attr->transfer && mtr_policy->dev) {
5214 * When policy has fate action of port_id,
5215 * the flow should have the same src port as policy.
5217 struct mlx5_priv *policy_port_priv =
5218 mtr_policy->dev->data->dev_private;
5219 int32_t flow_src_port = priv->representor_id;
5222 const struct rte_flow_item_port_id *spec =
5224 struct mlx5_priv *port_priv =
5225 mlx5_port_to_eswitch_info(spec->id,
5228 return rte_flow_error_set(error,
5230 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5232 "Failed to get port info.");
5233 flow_src_port = port_priv->representor_id;
5235 if (flow_src_port != policy_port_priv->representor_id)
5236 return rte_flow_error_set(error,
5238 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5240 "Flow and meter policy "
5241 "have different src port.");
5243 *def_policy = false;
5249 * Validate the age action.
5251 * @param[in] action_flags
5252 * Holds the actions detected until now.
5254 * Pointer to the age action.
5256 * Pointer to the Ethernet device structure.
5258 * Pointer to error structure.
5261 * 0 on success, a negative errno value otherwise and rte_errno is set.
5264 flow_dv_validate_action_age(uint64_t action_flags,
5265 const struct rte_flow_action *action,
5266 struct rte_eth_dev *dev,
5267 struct rte_flow_error *error)
5269 struct mlx5_priv *priv = dev->data->dev_private;
5270 const struct rte_flow_action_age *age = action->conf;
5272 if (!priv->sh->devx || (priv->sh->cmng.counter_fallback &&
5273 !priv->sh->aso_age_mng))
5274 return rte_flow_error_set(error, ENOTSUP,
5275 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5277 "age action not supported");
5278 if (!(action->conf))
5279 return rte_flow_error_set(error, EINVAL,
5280 RTE_FLOW_ERROR_TYPE_ACTION, action,
5281 "configuration cannot be null");
5282 if (!(age->timeout))
5283 return rte_flow_error_set(error, EINVAL,
5284 RTE_FLOW_ERROR_TYPE_ACTION, action,
5285 "invalid timeout value 0");
5286 if (action_flags & MLX5_FLOW_ACTION_AGE)
5287 return rte_flow_error_set(error, EINVAL,
5288 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5289 "duplicate age actions set");
5294 * Validate the modify-header IPv4 DSCP actions.
5296 * @param[in] action_flags
5297 * Holds the actions detected until now.
5299 * Pointer to the modify action.
5300 * @param[in] item_flags
5301 * Holds the items detected.
5303 * Pointer to error structure.
5306 * 0 on success, a negative errno value otherwise and rte_errno is set.
5309 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5310 const struct rte_flow_action *action,
5311 const uint64_t item_flags,
5312 struct rte_flow_error *error)
5316 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5318 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5319 return rte_flow_error_set(error, EINVAL,
5320 RTE_FLOW_ERROR_TYPE_ACTION,
5322 "no ipv4 item in pattern");
5328 * Validate the modify-header IPv6 DSCP actions.
5330 * @param[in] action_flags
5331 * Holds the actions detected until now.
5333 * Pointer to the modify action.
5334 * @param[in] item_flags
5335 * Holds the items detected.
5337 * Pointer to error structure.
5340 * 0 on success, a negative errno value otherwise and rte_errno is set.
5343 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5344 const struct rte_flow_action *action,
5345 const uint64_t item_flags,
5346 struct rte_flow_error *error)
5350 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5352 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5353 return rte_flow_error_set(error, EINVAL,
5354 RTE_FLOW_ERROR_TYPE_ACTION,
5356 "no ipv6 item in pattern");
5362 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5363 struct mlx5_list_entry *entry, void *cb_ctx)
5365 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5366 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5367 struct mlx5_flow_dv_modify_hdr_resource *resource =
5368 container_of(entry, typeof(*resource), entry);
5369 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5371 key_len += ref->actions_num * sizeof(ref->actions[0]);
5372 return ref->actions_num != resource->actions_num ||
5373 memcmp(&ref->ft_type, &resource->ft_type, key_len);
5376 static struct mlx5_indexed_pool *
5377 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5379 struct mlx5_indexed_pool *ipool = __atomic_load_n
5380 (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5383 struct mlx5_indexed_pool *expected = NULL;
5384 struct mlx5_indexed_pool_config cfg =
5385 (struct mlx5_indexed_pool_config) {
5386 .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5388 sizeof(struct mlx5_modification_cmd),
5393 .release_mem_en = !!sh->reclaim_mode,
5394 .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),
5395 .malloc = mlx5_malloc,
5397 .type = "mlx5_modify_action_resource",
5400 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5401 ipool = mlx5_ipool_create(&cfg);
5404 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5405 &expected, ipool, false,
5407 __ATOMIC_SEQ_CST)) {
5408 mlx5_ipool_destroy(ipool);
5409 ipool = __atomic_load_n(&sh->mdh_ipools[index],
5416 struct mlx5_list_entry *
5417 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5419 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5420 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5421 struct mlx5dv_dr_domain *ns;
5422 struct mlx5_flow_dv_modify_hdr_resource *entry;
5423 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5424 struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5425 ref->actions_num - 1);
5427 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5428 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5431 if (unlikely(!ipool)) {
5432 rte_flow_error_set(ctx->error, ENOMEM,
5433 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5434 NULL, "cannot allocate modify ipool");
5437 entry = mlx5_ipool_zmalloc(ipool, &idx);
5439 rte_flow_error_set(ctx->error, ENOMEM,
5440 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5441 "cannot allocate resource memory");
5444 rte_memcpy(&entry->ft_type,
5445 RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5446 key_len + data_len);
5447 if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5448 ns = sh->fdb_domain;
5449 else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5453 ret = mlx5_flow_os_create_flow_action_modify_header
5454 (sh->cdev->ctx, ns, entry,
5455 data_len, &entry->action);
5457 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5458 rte_flow_error_set(ctx->error, ENOMEM,
5459 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5460 NULL, "cannot create modification action");
5464 return &entry->entry;
5467 struct mlx5_list_entry *
5468 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5471 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5472 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5473 struct mlx5_flow_dv_modify_hdr_resource *entry;
5474 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5475 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5478 entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5481 rte_flow_error_set(ctx->error, ENOMEM,
5482 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5483 "cannot allocate resource memory");
5486 memcpy(entry, oentry, sizeof(*entry) + data_len);
5488 return &entry->entry;
5492 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5494 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5495 struct mlx5_flow_dv_modify_hdr_resource *res =
5496 container_of(entry, typeof(*res), entry);
5498 mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5502 * Validate the sample action.
5504 * @param[in, out] action_flags
5505 * Holds the actions detected until now.
5507 * Pointer to the sample action.
5509 * Pointer to the Ethernet device structure.
5511 * Attributes of flow that includes this action.
5512 * @param[in] item_flags
5513 * Holds the items detected.
5515 * Pointer to the RSS action.
5516 * @param[out] sample_rss
5517 * Pointer to the RSS action in sample action list.
5519 * Pointer to the COUNT action in sample action list.
5520 * @param[out] fdb_mirror_limit
5521 * Pointer to the FDB mirror limitation flag.
5523 * Pointer to error structure.
5526 * 0 on success, a negative errno value otherwise and rte_errno is set.
5529 flow_dv_validate_action_sample(uint64_t *action_flags,
5530 const struct rte_flow_action *action,
5531 struct rte_eth_dev *dev,
5532 const struct rte_flow_attr *attr,
5533 uint64_t item_flags,
5534 const struct rte_flow_action_rss *rss,
5535 const struct rte_flow_action_rss **sample_rss,
5536 const struct rte_flow_action_count **count,
5537 int *fdb_mirror_limit,
5538 struct rte_flow_error *error)
5540 struct mlx5_priv *priv = dev->data->dev_private;
5541 struct mlx5_dev_config *dev_conf = &priv->config;
5542 const struct rte_flow_action_sample *sample = action->conf;
5543 const struct rte_flow_action *act;
5544 uint64_t sub_action_flags = 0;
5545 uint16_t queue_index = 0xFFFF;
5550 return rte_flow_error_set(error, EINVAL,
5551 RTE_FLOW_ERROR_TYPE_ACTION, action,
5552 "configuration cannot be NULL");
5553 if (sample->ratio == 0)
5554 return rte_flow_error_set(error, EINVAL,
5555 RTE_FLOW_ERROR_TYPE_ACTION, action,
5556 "ratio value starts from 1");
5557 if (!priv->sh->devx || (sample->ratio > 0 && !priv->sampler_en))
5558 return rte_flow_error_set(error, ENOTSUP,
5559 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5561 "sample action not supported");
5562 if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5563 return rte_flow_error_set(error, EINVAL,
5564 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5565 "Multiple sample actions not "
5567 if (*action_flags & MLX5_FLOW_ACTION_METER)
5568 return rte_flow_error_set(error, EINVAL,
5569 RTE_FLOW_ERROR_TYPE_ACTION, action,
5570 "wrong action order, meter should "
5571 "be after sample action");
5572 if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5573 return rte_flow_error_set(error, EINVAL,
5574 RTE_FLOW_ERROR_TYPE_ACTION, action,
5575 "wrong action order, jump should "
5576 "be after sample action");
5577 act = sample->actions;
5578 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5579 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5580 return rte_flow_error_set(error, ENOTSUP,
5581 RTE_FLOW_ERROR_TYPE_ACTION,
5582 act, "too many actions");
5583 switch (act->type) {
5584 case RTE_FLOW_ACTION_TYPE_QUEUE:
5585 ret = mlx5_flow_validate_action_queue(act,
5591 queue_index = ((const struct rte_flow_action_queue *)
5592 (act->conf))->index;
5593 sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5596 case RTE_FLOW_ACTION_TYPE_RSS:
5597 *sample_rss = act->conf;
5598 ret = mlx5_flow_validate_action_rss(act,
5605 if (rss && *sample_rss &&
5606 ((*sample_rss)->level != rss->level ||
5607 (*sample_rss)->types != rss->types))
5608 return rte_flow_error_set(error, ENOTSUP,
5609 RTE_FLOW_ERROR_TYPE_ACTION,
5611 "Can't use the different RSS types "
5612 "or level in the same flow");
5613 if (*sample_rss != NULL && (*sample_rss)->queue_num)
5614 queue_index = (*sample_rss)->queue[0];
5615 sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5618 case RTE_FLOW_ACTION_TYPE_MARK:
5619 ret = flow_dv_validate_action_mark(dev, act,
5624 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5625 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5626 MLX5_FLOW_ACTION_MARK_EXT;
5628 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5631 case RTE_FLOW_ACTION_TYPE_COUNT:
5632 ret = flow_dv_validate_action_count
5633 (dev, false, *action_flags | sub_action_flags,
5638 sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5639 *action_flags |= MLX5_FLOW_ACTION_COUNT;
5642 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5643 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5644 ret = flow_dv_validate_action_port_id(dev,
5651 sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5654 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5655 ret = flow_dv_validate_action_raw_encap_decap
5656 (dev, NULL, act->conf, attr, &sub_action_flags,
5657 &actions_n, action, item_flags, error);
5662 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5663 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5664 ret = flow_dv_validate_action_l2_encap(dev,
5670 sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5674 return rte_flow_error_set(error, ENOTSUP,
5675 RTE_FLOW_ERROR_TYPE_ACTION,
5677 "Doesn't support optional "
5681 if (attr->ingress && !attr->transfer) {
5682 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5683 MLX5_FLOW_ACTION_RSS)))
5684 return rte_flow_error_set(error, EINVAL,
5685 RTE_FLOW_ERROR_TYPE_ACTION,
5687 "Ingress must has a dest "
5688 "QUEUE for Sample");
5689 } else if (attr->egress && !attr->transfer) {
5690 return rte_flow_error_set(error, ENOTSUP,
5691 RTE_FLOW_ERROR_TYPE_ACTION,
5693 "Sample Only support Ingress "
5695 } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5696 MLX5_ASSERT(attr->transfer);
5697 if (sample->ratio > 1)
5698 return rte_flow_error_set(error, ENOTSUP,
5699 RTE_FLOW_ERROR_TYPE_ACTION,
5701 "E-Switch doesn't support "
5702 "any optional action "
5704 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5705 return rte_flow_error_set(error, ENOTSUP,
5706 RTE_FLOW_ERROR_TYPE_ACTION,
5708 "unsupported action QUEUE");
5709 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5710 return rte_flow_error_set(error, ENOTSUP,
5711 RTE_FLOW_ERROR_TYPE_ACTION,
5713 "unsupported action QUEUE");
5714 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5715 return rte_flow_error_set(error, EINVAL,
5716 RTE_FLOW_ERROR_TYPE_ACTION,
5718 "E-Switch must has a dest "
5719 "port for mirroring");
5720 if (!priv->config.hca_attr.reg_c_preserve &&
5721 priv->representor_id != UINT16_MAX)
5722 *fdb_mirror_limit = 1;
5724 /* Continue validation for Xcap actions.*/
5725 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5726 (queue_index == 0xFFFF ||
5727 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5728 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5729 MLX5_FLOW_XCAP_ACTIONS)
5730 return rte_flow_error_set(error, ENOTSUP,
5731 RTE_FLOW_ERROR_TYPE_ACTION,
5732 NULL, "encap and decap "
5733 "combination aren't "
5735 if (!attr->transfer && attr->ingress && (sub_action_flags &
5736 MLX5_FLOW_ACTION_ENCAP))
5737 return rte_flow_error_set(error, ENOTSUP,
5738 RTE_FLOW_ERROR_TYPE_ACTION,
5739 NULL, "encap is not supported"
5740 " for ingress traffic");
5746 * Find existing modify-header resource or create and register a new one.
5748 * @param dev[in, out]
5749 * Pointer to rte_eth_dev structure.
5750 * @param[in, out] resource
5751 * Pointer to modify-header resource.
5752 * @parm[in, out] dev_flow
5753 * Pointer to the dev_flow.
5755 * pointer to error structure.
5758 * 0 on success otherwise -errno and errno is set.
5761 flow_dv_modify_hdr_resource_register
5762 (struct rte_eth_dev *dev,
5763 struct mlx5_flow_dv_modify_hdr_resource *resource,
5764 struct mlx5_flow *dev_flow,
5765 struct rte_flow_error *error)
5767 struct mlx5_priv *priv = dev->data->dev_private;
5768 struct mlx5_dev_ctx_shared *sh = priv->sh;
5769 uint32_t key_len = sizeof(*resource) -
5770 offsetof(typeof(*resource), ft_type) +
5771 resource->actions_num * sizeof(resource->actions[0]);
5772 struct mlx5_list_entry *entry;
5773 struct mlx5_flow_cb_ctx ctx = {
5777 struct mlx5_hlist *modify_cmds;
5780 modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5782 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5784 flow_dv_modify_create_cb,
5785 flow_dv_modify_match_cb,
5786 flow_dv_modify_remove_cb,
5787 flow_dv_modify_clone_cb,
5788 flow_dv_modify_clone_free_cb);
5789 if (unlikely(!modify_cmds))
5791 resource->root = !dev_flow->dv.group;
5792 if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5794 return rte_flow_error_set(error, EOVERFLOW,
5795 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5796 "too many modify header items");
5797 key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5798 entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5801 resource = container_of(entry, typeof(*resource), entry);
5802 dev_flow->handle->dvh.modify_hdr = resource;
5807 * Get DV flow counter by index.
5810 * Pointer to the Ethernet device structure.
5812 * mlx5 flow counter index in the container.
5814 * mlx5 flow counter pool in the container.
5817 * Pointer to the counter, NULL otherwise.
5819 static struct mlx5_flow_counter *
5820 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5822 struct mlx5_flow_counter_pool **ppool)
5824 struct mlx5_priv *priv = dev->data->dev_private;
5825 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5826 struct mlx5_flow_counter_pool *pool;
5828 /* Decrease to original index and clear shared bit. */
5829 idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5830 MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5831 pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5835 return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5839 * Check the devx counter belongs to the pool.
5842 * Pointer to the counter pool.
5844 * The counter devx ID.
5847 * True if counter belongs to the pool, false otherwise.
5850 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5852 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5853 MLX5_COUNTERS_PER_POOL;
5855 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5861 * Get a pool by devx counter ID.
5864 * Pointer to the counter management.
5866 * The counter devx ID.
5869 * The counter pool pointer if exists, NULL otherwise,
5871 static struct mlx5_flow_counter_pool *
5872 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5875 struct mlx5_flow_counter_pool *pool = NULL;
5877 rte_spinlock_lock(&cmng->pool_update_sl);
5878 /* Check last used pool. */
5879 if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5880 flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5881 pool = cmng->pools[cmng->last_pool_idx];
5884 /* ID out of range means no suitable pool in the container. */
5885 if (id > cmng->max_id || id < cmng->min_id)
5888 * Find the pool from the end of the container, since mostly counter
5889 * ID is sequence increasing, and the last pool should be the needed
5894 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5896 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5902 rte_spinlock_unlock(&cmng->pool_update_sl);
5907 * Resize a counter container.
5910 * Pointer to the Ethernet device structure.
5913 * 0 on success, otherwise negative errno value and rte_errno is set.
5916 flow_dv_container_resize(struct rte_eth_dev *dev)
5918 struct mlx5_priv *priv = dev->data->dev_private;
5919 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5920 void *old_pools = cmng->pools;
5921 uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5922 uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5923 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5930 memcpy(pools, old_pools, cmng->n *
5931 sizeof(struct mlx5_flow_counter_pool *));
5933 cmng->pools = pools;
5935 mlx5_free(old_pools);
5940 * Query a devx flow counter.
5943 * Pointer to the Ethernet device structure.
5944 * @param[in] counter
5945 * Index to the flow counter.
5947 * The statistics value of packets.
5949 * The statistics value of bytes.
5952 * 0 on success, otherwise a negative errno value and rte_errno is set.
5955 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5958 struct mlx5_priv *priv = dev->data->dev_private;
5959 struct mlx5_flow_counter_pool *pool = NULL;
5960 struct mlx5_flow_counter *cnt;
5963 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5965 if (priv->sh->cmng.counter_fallback)
5966 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
5967 0, pkts, bytes, 0, NULL, NULL, 0);
5968 rte_spinlock_lock(&pool->sl);
5973 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
5974 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
5975 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
5977 rte_spinlock_unlock(&pool->sl);
5982 * Create and initialize a new counter pool.
5985 * Pointer to the Ethernet device structure.
5987 * The devX counter handle.
5989 * Whether the pool is for counter that was allocated for aging.
5990 * @param[in/out] cont_cur
5991 * Pointer to the container pointer, it will be update in pool resize.
5994 * The pool container pointer on success, NULL otherwise and rte_errno is set.
5996 static struct mlx5_flow_counter_pool *
5997 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6000 struct mlx5_priv *priv = dev->data->dev_private;
6001 struct mlx5_flow_counter_pool *pool;
6002 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6003 bool fallback = priv->sh->cmng.counter_fallback;
6004 uint32_t size = sizeof(*pool);
6006 size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6007 size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6008 pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6014 pool->is_aged = !!age;
6015 pool->query_gen = 0;
6016 pool->min_dcs = dcs;
6017 rte_spinlock_init(&pool->sl);
6018 rte_spinlock_init(&pool->csl);
6019 TAILQ_INIT(&pool->counters[0]);
6020 TAILQ_INIT(&pool->counters[1]);
6021 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6022 rte_spinlock_lock(&cmng->pool_update_sl);
6023 pool->index = cmng->n_valid;
6024 if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6026 rte_spinlock_unlock(&cmng->pool_update_sl);
6029 cmng->pools[pool->index] = pool;
6031 if (unlikely(fallback)) {
6032 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6034 if (base < cmng->min_id)
6035 cmng->min_id = base;
6036 if (base > cmng->max_id)
6037 cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6038 cmng->last_pool_idx = pool->index;
6040 rte_spinlock_unlock(&cmng->pool_update_sl);
6045 * Prepare a new counter and/or a new counter pool.
6048 * Pointer to the Ethernet device structure.
6049 * @param[out] cnt_free
6050 * Where to put the pointer of a new counter.
6052 * Whether the pool is for counter that was allocated for aging.
6055 * The counter pool pointer and @p cnt_free is set on success,
6056 * NULL otherwise and rte_errno is set.
6058 static struct mlx5_flow_counter_pool *
6059 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6060 struct mlx5_flow_counter **cnt_free,
6063 struct mlx5_priv *priv = dev->data->dev_private;
6064 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6065 struct mlx5_flow_counter_pool *pool;
6066 struct mlx5_counters tmp_tq;
6067 struct mlx5_devx_obj *dcs = NULL;
6068 struct mlx5_flow_counter *cnt;
6069 enum mlx5_counter_type cnt_type =
6070 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6071 bool fallback = priv->sh->cmng.counter_fallback;
6075 /* bulk_bitmap must be 0 for single counter allocation. */
6076 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0);
6079 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6081 pool = flow_dv_pool_create(dev, dcs, age);
6083 mlx5_devx_cmd_destroy(dcs);
6087 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6088 cnt = MLX5_POOL_GET_CNT(pool, i);
6090 cnt->dcs_when_free = dcs;
6094 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
6096 rte_errno = ENODATA;
6099 pool = flow_dv_pool_create(dev, dcs, age);
6101 mlx5_devx_cmd_destroy(dcs);
6104 TAILQ_INIT(&tmp_tq);
6105 for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6106 cnt = MLX5_POOL_GET_CNT(pool, i);
6108 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6110 rte_spinlock_lock(&cmng->csl[cnt_type]);
6111 TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6112 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6113 *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6114 (*cnt_free)->pool = pool;
6119 * Allocate a flow counter.
6122 * Pointer to the Ethernet device structure.
6124 * Whether the counter was allocated for aging.
6127 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6130 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6132 struct mlx5_priv *priv = dev->data->dev_private;
6133 struct mlx5_flow_counter_pool *pool = NULL;
6134 struct mlx5_flow_counter *cnt_free = NULL;
6135 bool fallback = priv->sh->cmng.counter_fallback;
6136 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6137 enum mlx5_counter_type cnt_type =
6138 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6141 if (!priv->sh->devx) {
6142 rte_errno = ENOTSUP;
6145 /* Get free counters from container. */
6146 rte_spinlock_lock(&cmng->csl[cnt_type]);
6147 cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6149 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6150 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6151 if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6153 pool = cnt_free->pool;
6155 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6156 /* Create a DV counter action only in the first time usage. */
6157 if (!cnt_free->action) {
6159 struct mlx5_devx_obj *dcs;
6163 offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6164 dcs = pool->min_dcs;
6167 dcs = cnt_free->dcs_when_free;
6169 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6176 cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6177 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6178 /* Update the counter reset values. */
6179 if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6182 if (!fallback && !priv->sh->cmng.query_thread_on)
6183 /* Start the asynchronous batch query by the host thread. */
6184 mlx5_set_query_alarm(priv->sh);
6186 * When the count action isn't shared (by ID), shared_info field is
6187 * used for indirect action API's refcnt.
6188 * When the counter action is not shared neither by ID nor by indirect
6189 * action API, shared info must be 1.
6191 cnt_free->shared_info.refcnt = 1;
6195 cnt_free->pool = pool;
6197 cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6198 rte_spinlock_lock(&cmng->csl[cnt_type]);
6199 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6200 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6206 * Get age param from counter index.
6209 * Pointer to the Ethernet device structure.
6210 * @param[in] counter
6211 * Index to the counter handler.
6214 * The aging parameter specified for the counter index.
6216 static struct mlx5_age_param*
6217 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6220 struct mlx5_flow_counter *cnt;
6221 struct mlx5_flow_counter_pool *pool = NULL;
6223 flow_dv_counter_get_by_idx(dev, counter, &pool);
6224 counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6225 cnt = MLX5_POOL_GET_CNT(pool, counter);
6226 return MLX5_CNT_TO_AGE(cnt);
6230 * Remove a flow counter from aged counter list.
6233 * Pointer to the Ethernet device structure.
6234 * @param[in] counter
6235 * Index to the counter handler.
6237 * Pointer to the counter handler.
6240 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6241 uint32_t counter, struct mlx5_flow_counter *cnt)
6243 struct mlx5_age_info *age_info;
6244 struct mlx5_age_param *age_param;
6245 struct mlx5_priv *priv = dev->data->dev_private;
6246 uint16_t expected = AGE_CANDIDATE;
6248 age_info = GET_PORT_AGE_INFO(priv);
6249 age_param = flow_dv_counter_idx_get_age(dev, counter);
6250 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6251 AGE_FREE, false, __ATOMIC_RELAXED,
6252 __ATOMIC_RELAXED)) {
6254 * We need the lock even it is age timeout,
6255 * since counter may still in process.
6257 rte_spinlock_lock(&age_info->aged_sl);
6258 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6259 rte_spinlock_unlock(&age_info->aged_sl);
6260 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6265 * Release a flow counter.
6268 * Pointer to the Ethernet device structure.
6269 * @param[in] counter
6270 * Index to the counter handler.
6273 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6275 struct mlx5_priv *priv = dev->data->dev_private;
6276 struct mlx5_flow_counter_pool *pool = NULL;
6277 struct mlx5_flow_counter *cnt;
6278 enum mlx5_counter_type cnt_type;
6282 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6284 if (pool->is_aged) {
6285 flow_dv_counter_remove_from_age(dev, counter, cnt);
6288 * If the counter action is shared by indirect action API,
6289 * the atomic function reduces its references counter.
6290 * If after the reduction the action is still referenced, the
6291 * function returns here and does not release it.
6292 * When the counter action is not shared by
6293 * indirect action API, shared info is 1 before the reduction,
6294 * so this condition is failed and function doesn't return here.
6296 if (__atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6302 * Put the counter back to list to be updated in none fallback mode.
6303 * Currently, we are using two list alternately, while one is in query,
6304 * add the freed counter to the other list based on the pool query_gen
6305 * value. After query finishes, add counter the list to the global
6306 * container counter list. The list changes while query starts. In
6307 * this case, lock will not be needed as query callback and release
6308 * function both operate with the different list.
6310 if (!priv->sh->cmng.counter_fallback) {
6311 rte_spinlock_lock(&pool->csl);
6312 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6313 rte_spinlock_unlock(&pool->csl);
6315 cnt->dcs_when_free = cnt->dcs_when_active;
6316 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6317 MLX5_COUNTER_TYPE_ORIGIN;
6318 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6319 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6321 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6326 * Resize a meter id container.
6329 * Pointer to the Ethernet device structure.
6332 * 0 on success, otherwise negative errno value and rte_errno is set.
6335 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6337 struct mlx5_priv *priv = dev->data->dev_private;
6338 struct mlx5_aso_mtr_pools_mng *pools_mng =
6339 &priv->sh->mtrmng->pools_mng;
6340 void *old_pools = pools_mng->pools;
6341 uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6342 uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6343 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6350 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6355 memcpy(pools, old_pools, pools_mng->n *
6356 sizeof(struct mlx5_aso_mtr_pool *));
6357 pools_mng->n = resize;
6358 pools_mng->pools = pools;
6360 mlx5_free(old_pools);
6365 * Prepare a new meter and/or a new meter pool.
6368 * Pointer to the Ethernet device structure.
6369 * @param[out] mtr_free
6370 * Where to put the pointer of a new meter.g.
6373 * The meter pool pointer and @mtr_free is set on success,
6374 * NULL otherwise and rte_errno is set.
6376 static struct mlx5_aso_mtr_pool *
6377 flow_dv_mtr_pool_create(struct rte_eth_dev *dev, struct mlx5_aso_mtr **mtr_free)
6379 struct mlx5_priv *priv = dev->data->dev_private;
6380 struct mlx5_aso_mtr_pools_mng *pools_mng = &priv->sh->mtrmng->pools_mng;
6381 struct mlx5_aso_mtr_pool *pool = NULL;
6382 struct mlx5_devx_obj *dcs = NULL;
6384 uint32_t log_obj_size;
6386 log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6387 dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->cdev->ctx,
6388 priv->sh->cdev->pdn,
6391 rte_errno = ENODATA;
6394 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6397 claim_zero(mlx5_devx_cmd_destroy(dcs));
6400 pool->devx_obj = dcs;
6401 pool->index = pools_mng->n_valid;
6402 if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6404 claim_zero(mlx5_devx_cmd_destroy(dcs));
6407 pools_mng->pools[pool->index] = pool;
6408 pools_mng->n_valid++;
6409 for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6410 pool->mtrs[i].offset = i;
6411 LIST_INSERT_HEAD(&pools_mng->meters, &pool->mtrs[i], next);
6413 pool->mtrs[0].offset = 0;
6414 *mtr_free = &pool->mtrs[0];
6419 * Release a flow meter into pool.
6422 * Pointer to the Ethernet device structure.
6423 * @param[in] mtr_idx
6424 * Index to aso flow meter.
6427 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6429 struct mlx5_priv *priv = dev->data->dev_private;
6430 struct mlx5_aso_mtr_pools_mng *pools_mng =
6431 &priv->sh->mtrmng->pools_mng;
6432 struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6434 MLX5_ASSERT(aso_mtr);
6435 rte_spinlock_lock(&pools_mng->mtrsl);
6436 memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6437 aso_mtr->state = ASO_METER_FREE;
6438 LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6439 rte_spinlock_unlock(&pools_mng->mtrsl);
6443 * Allocate a aso flow meter.
6446 * Pointer to the Ethernet device structure.
6449 * Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6452 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6454 struct mlx5_priv *priv = dev->data->dev_private;
6455 struct mlx5_aso_mtr *mtr_free = NULL;
6456 struct mlx5_aso_mtr_pools_mng *pools_mng =
6457 &priv->sh->mtrmng->pools_mng;
6458 struct mlx5_aso_mtr_pool *pool;
6459 uint32_t mtr_idx = 0;
6461 if (!priv->sh->devx) {
6462 rte_errno = ENOTSUP;
6465 /* Allocate the flow meter memory. */
6466 /* Get free meters from management. */
6467 rte_spinlock_lock(&pools_mng->mtrsl);
6468 mtr_free = LIST_FIRST(&pools_mng->meters);
6470 LIST_REMOVE(mtr_free, next);
6471 if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6472 rte_spinlock_unlock(&pools_mng->mtrsl);
6475 mtr_free->state = ASO_METER_WAIT;
6476 rte_spinlock_unlock(&pools_mng->mtrsl);
6477 pool = container_of(mtr_free,
6478 struct mlx5_aso_mtr_pool,
6479 mtrs[mtr_free->offset]);
6480 mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6481 if (!mtr_free->fm.meter_action) {
6482 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6483 struct rte_flow_error error;
6486 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6487 mtr_free->fm.meter_action =
6488 mlx5_glue->dv_create_flow_action_aso
6489 (priv->sh->rx_domain,
6490 pool->devx_obj->obj,
6492 (1 << MLX5_FLOW_COLOR_GREEN),
6494 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6495 if (!mtr_free->fm.meter_action) {
6496 flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6504 * Verify the @p attributes will be correctly understood by the NIC and store
6505 * them in the @p flow if everything is correct.
6508 * Pointer to dev struct.
6509 * @param[in] attributes
6510 * Pointer to flow attributes
6511 * @param[in] external
6512 * This flow rule is created by request external to PMD.
6514 * Pointer to error structure.
6517 * - 0 on success and non root table.
6518 * - 1 on success and root table.
6519 * - a negative errno value otherwise and rte_errno is set.
6522 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6523 const struct mlx5_flow_tunnel *tunnel,
6524 const struct rte_flow_attr *attributes,
6525 const struct flow_grp_info *grp_info,
6526 struct rte_flow_error *error)
6528 struct mlx5_priv *priv = dev->data->dev_private;
6529 uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6532 #ifndef HAVE_MLX5DV_DR
6533 RTE_SET_USED(tunnel);
6534 RTE_SET_USED(grp_info);
6535 if (attributes->group)
6536 return rte_flow_error_set(error, ENOTSUP,
6537 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6539 "groups are not supported");
6543 ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6548 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6550 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6551 attributes->priority > lowest_priority)
6552 return rte_flow_error_set(error, ENOTSUP,
6553 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6555 "priority out of range");
6556 if (attributes->transfer) {
6557 if (!priv->config.dv_esw_en)
6558 return rte_flow_error_set
6560 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6561 "E-Switch dr is not supported");
6562 if (!(priv->representor || priv->master))
6563 return rte_flow_error_set
6564 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6565 NULL, "E-Switch configuration can only be"
6566 " done by a master or a representor device");
6567 if (attributes->egress)
6568 return rte_flow_error_set
6570 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6571 "egress is not supported");
6573 if (!(attributes->egress ^ attributes->ingress))
6574 return rte_flow_error_set(error, ENOTSUP,
6575 RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6576 "must specify exactly one of "
6577 "ingress or egress");
6582 validate_integrity_bits(const struct rte_flow_item_integrity *mask,
6583 int64_t pattern_flags, uint64_t l3_flags,
6584 uint64_t l4_flags, uint64_t ip4_flag,
6585 struct rte_flow_error *error)
6587 if (mask->l3_ok && !(pattern_flags & l3_flags))
6588 return rte_flow_error_set(error, EINVAL,
6589 RTE_FLOW_ERROR_TYPE_ITEM,
6590 NULL, "missing L3 protocol");
6592 if (mask->ipv4_csum_ok && !(pattern_flags & ip4_flag))
6593 return rte_flow_error_set(error, EINVAL,
6594 RTE_FLOW_ERROR_TYPE_ITEM,
6595 NULL, "missing IPv4 protocol");
6597 if ((mask->l4_ok || mask->l4_csum_ok) && !(pattern_flags & l4_flags))
6598 return rte_flow_error_set(error, EINVAL,
6599 RTE_FLOW_ERROR_TYPE_ITEM,
6600 NULL, "missing L4 protocol");
6606 flow_dv_validate_item_integrity_post(const struct
6607 rte_flow_item *integrity_items[2],
6608 int64_t pattern_flags,
6609 struct rte_flow_error *error)
6611 const struct rte_flow_item_integrity *mask;
6614 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
6615 mask = (typeof(mask))integrity_items[0]->mask;
6616 ret = validate_integrity_bits(mask, pattern_flags,
6617 MLX5_FLOW_LAYER_OUTER_L3,
6618 MLX5_FLOW_LAYER_OUTER_L4,
6619 MLX5_FLOW_LAYER_OUTER_L3_IPV4,
6624 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
6625 mask = (typeof(mask))integrity_items[1]->mask;
6626 ret = validate_integrity_bits(mask, pattern_flags,
6627 MLX5_FLOW_LAYER_INNER_L3,
6628 MLX5_FLOW_LAYER_INNER_L4,
6629 MLX5_FLOW_LAYER_INNER_L3_IPV4,
6638 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6639 const struct rte_flow_item *integrity_item,
6640 uint64_t pattern_flags, uint64_t *last_item,
6641 const struct rte_flow_item *integrity_items[2],
6642 struct rte_flow_error *error)
6644 struct mlx5_priv *priv = dev->data->dev_private;
6645 const struct rte_flow_item_integrity *mask = (typeof(mask))
6646 integrity_item->mask;
6647 const struct rte_flow_item_integrity *spec = (typeof(spec))
6648 integrity_item->spec;
6650 if (!priv->config.hca_attr.pkt_integrity_match)
6651 return rte_flow_error_set(error, ENOTSUP,
6652 RTE_FLOW_ERROR_TYPE_ITEM,
6654 "packet integrity integrity_item not supported");
6656 return rte_flow_error_set(error, ENOTSUP,
6657 RTE_FLOW_ERROR_TYPE_ITEM,
6659 "no spec for integrity item");
6661 mask = &rte_flow_item_integrity_mask;
6662 if (!mlx5_validate_integrity_item(mask))
6663 return rte_flow_error_set(error, ENOTSUP,
6664 RTE_FLOW_ERROR_TYPE_ITEM,
6666 "unsupported integrity filter");
6667 if (spec->level > 1) {
6668 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY)
6669 return rte_flow_error_set
6671 RTE_FLOW_ERROR_TYPE_ITEM,
6672 NULL, "multiple inner integrity items not supported");
6673 integrity_items[1] = integrity_item;
6674 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
6676 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY)
6677 return rte_flow_error_set
6679 RTE_FLOW_ERROR_TYPE_ITEM,
6680 NULL, "multiple outer integrity items not supported");
6681 integrity_items[0] = integrity_item;
6682 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
6688 * Internal validation function. For validating both actions and items.
6691 * Pointer to the rte_eth_dev structure.
6693 * Pointer to the flow attributes.
6695 * Pointer to the list of items.
6696 * @param[in] actions
6697 * Pointer to the list of actions.
6698 * @param[in] external
6699 * This flow rule is created by request external to PMD.
6700 * @param[in] hairpin
6701 * Number of hairpin TX actions, 0 means classic flow.
6703 * Pointer to the error structure.
6706 * 0 on success, a negative errno value otherwise and rte_errno is set.
6709 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6710 const struct rte_flow_item items[],
6711 const struct rte_flow_action actions[],
6712 bool external, int hairpin, struct rte_flow_error *error)
6715 uint64_t action_flags = 0;
6716 uint64_t item_flags = 0;
6717 uint64_t last_item = 0;
6718 uint8_t next_protocol = 0xff;
6719 uint16_t ether_type = 0;
6721 uint8_t item_ipv6_proto = 0;
6722 int fdb_mirror_limit = 0;
6723 int modify_after_mirror = 0;
6724 const struct rte_flow_item *geneve_item = NULL;
6725 const struct rte_flow_item *gre_item = NULL;
6726 const struct rte_flow_item *gtp_item = NULL;
6727 const struct rte_flow_action_raw_decap *decap;
6728 const struct rte_flow_action_raw_encap *encap;
6729 const struct rte_flow_action_rss *rss = NULL;
6730 const struct rte_flow_action_rss *sample_rss = NULL;
6731 const struct rte_flow_action_count *sample_count = NULL;
6732 const struct rte_flow_item_tcp nic_tcp_mask = {
6735 .src_port = RTE_BE16(UINT16_MAX),
6736 .dst_port = RTE_BE16(UINT16_MAX),
6739 const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6742 "\xff\xff\xff\xff\xff\xff\xff\xff"
6743 "\xff\xff\xff\xff\xff\xff\xff\xff",
6745 "\xff\xff\xff\xff\xff\xff\xff\xff"
6746 "\xff\xff\xff\xff\xff\xff\xff\xff",
6747 .vtc_flow = RTE_BE32(0xffffffff),
6753 const struct rte_flow_item_ecpri nic_ecpri_mask = {
6757 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6761 .dummy[0] = 0xffffffff,
6764 struct mlx5_priv *priv = dev->data->dev_private;
6765 struct mlx5_dev_config *dev_conf = &priv->config;
6766 uint16_t queue_index = 0xFFFF;
6767 const struct rte_flow_item_vlan *vlan_m = NULL;
6768 uint32_t rw_act_num = 0;
6770 const struct mlx5_flow_tunnel *tunnel;
6771 enum mlx5_tof_rule_type tof_rule_type;
6772 struct flow_grp_info grp_info = {
6773 .external = !!external,
6774 .transfer = !!attr->transfer,
6775 .fdb_def_rule = !!priv->fdb_def_rule,
6776 .std_tbl_fix = true,
6778 const struct rte_eth_hairpin_conf *conf;
6779 const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
6780 const struct rte_flow_item *port_id_item = NULL;
6781 bool def_policy = false;
6782 uint16_t udp_dport = 0;
6786 tunnel = is_tunnel_offload_active(dev) ?
6787 mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6789 if (priv->representor)
6790 return rte_flow_error_set
6792 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6793 NULL, "decap not supported for VF representor");
6794 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6795 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6796 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6797 action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6798 MLX5_FLOW_ACTION_DECAP;
6799 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6800 (dev, attr, tunnel, tof_rule_type);
6802 ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6805 is_root = (uint64_t)ret;
6806 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6807 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6808 int type = items->type;
6810 if (!mlx5_flow_os_item_supported(type))
6811 return rte_flow_error_set(error, ENOTSUP,
6812 RTE_FLOW_ERROR_TYPE_ITEM,
6813 NULL, "item not supported");
6815 case RTE_FLOW_ITEM_TYPE_VOID:
6817 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6818 ret = flow_dv_validate_item_port_id
6819 (dev, items, attr, item_flags, error);
6822 last_item = MLX5_FLOW_ITEM_PORT_ID;
6823 port_id_item = items;
6825 case RTE_FLOW_ITEM_TYPE_ETH:
6826 ret = mlx5_flow_validate_item_eth(items, item_flags,
6830 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6831 MLX5_FLOW_LAYER_OUTER_L2;
6832 if (items->mask != NULL && items->spec != NULL) {
6834 ((const struct rte_flow_item_eth *)
6837 ((const struct rte_flow_item_eth *)
6839 ether_type = rte_be_to_cpu_16(ether_type);
6844 case RTE_FLOW_ITEM_TYPE_VLAN:
6845 ret = flow_dv_validate_item_vlan(items, item_flags,
6849 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6850 MLX5_FLOW_LAYER_OUTER_VLAN;
6851 if (items->mask != NULL && items->spec != NULL) {
6853 ((const struct rte_flow_item_vlan *)
6854 items->spec)->inner_type;
6856 ((const struct rte_flow_item_vlan *)
6857 items->mask)->inner_type;
6858 ether_type = rte_be_to_cpu_16(ether_type);
6862 /* Store outer VLAN mask for of_push_vlan action. */
6864 vlan_m = items->mask;
6866 case RTE_FLOW_ITEM_TYPE_IPV4:
6867 mlx5_flow_tunnel_ip_check(items, next_protocol,
6868 &item_flags, &tunnel);
6869 ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
6870 last_item, ether_type,
6874 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
6875 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
6876 if (items->mask != NULL &&
6877 ((const struct rte_flow_item_ipv4 *)
6878 items->mask)->hdr.next_proto_id) {
6880 ((const struct rte_flow_item_ipv4 *)
6881 (items->spec))->hdr.next_proto_id;
6883 ((const struct rte_flow_item_ipv4 *)
6884 (items->mask))->hdr.next_proto_id;
6886 /* Reset for inner layer. */
6887 next_protocol = 0xff;
6890 case RTE_FLOW_ITEM_TYPE_IPV6:
6891 mlx5_flow_tunnel_ip_check(items, next_protocol,
6892 &item_flags, &tunnel);
6893 ret = mlx5_flow_validate_item_ipv6(items, item_flags,
6900 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
6901 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
6902 if (items->mask != NULL &&
6903 ((const struct rte_flow_item_ipv6 *)
6904 items->mask)->hdr.proto) {
6906 ((const struct rte_flow_item_ipv6 *)
6907 items->spec)->hdr.proto;
6909 ((const struct rte_flow_item_ipv6 *)
6910 items->spec)->hdr.proto;
6912 ((const struct rte_flow_item_ipv6 *)
6913 items->mask)->hdr.proto;
6915 /* Reset for inner layer. */
6916 next_protocol = 0xff;
6919 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
6920 ret = flow_dv_validate_item_ipv6_frag_ext(items,
6925 last_item = tunnel ?
6926 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
6927 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
6928 if (items->mask != NULL &&
6929 ((const struct rte_flow_item_ipv6_frag_ext *)
6930 items->mask)->hdr.next_header) {
6932 ((const struct rte_flow_item_ipv6_frag_ext *)
6933 items->spec)->hdr.next_header;
6935 ((const struct rte_flow_item_ipv6_frag_ext *)
6936 items->mask)->hdr.next_header;
6938 /* Reset for inner layer. */
6939 next_protocol = 0xff;
6942 case RTE_FLOW_ITEM_TYPE_TCP:
6943 ret = mlx5_flow_validate_item_tcp
6950 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
6951 MLX5_FLOW_LAYER_OUTER_L4_TCP;
6953 case RTE_FLOW_ITEM_TYPE_UDP:
6954 ret = mlx5_flow_validate_item_udp(items, item_flags,
6957 const struct rte_flow_item_udp *spec = items->spec;
6958 const struct rte_flow_item_udp *mask = items->mask;
6960 mask = &rte_flow_item_udp_mask;
6962 udp_dport = rte_be_to_cpu_16
6963 (spec->hdr.dst_port &
6964 mask->hdr.dst_port);
6967 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
6968 MLX5_FLOW_LAYER_OUTER_L4_UDP;
6970 case RTE_FLOW_ITEM_TYPE_GRE:
6971 ret = mlx5_flow_validate_item_gre(items, item_flags,
6972 next_protocol, error);
6976 last_item = MLX5_FLOW_LAYER_GRE;
6978 case RTE_FLOW_ITEM_TYPE_NVGRE:
6979 ret = mlx5_flow_validate_item_nvgre(items, item_flags,
6984 last_item = MLX5_FLOW_LAYER_NVGRE;
6986 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
6987 ret = mlx5_flow_validate_item_gre_key
6988 (items, item_flags, gre_item, error);
6991 last_item = MLX5_FLOW_LAYER_GRE_KEY;
6993 case RTE_FLOW_ITEM_TYPE_VXLAN:
6994 ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
6999 last_item = MLX5_FLOW_LAYER_VXLAN;
7001 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7002 ret = mlx5_flow_validate_item_vxlan_gpe(items,
7007 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7009 case RTE_FLOW_ITEM_TYPE_GENEVE:
7010 ret = mlx5_flow_validate_item_geneve(items,
7015 geneve_item = items;
7016 last_item = MLX5_FLOW_LAYER_GENEVE;
7018 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7019 ret = mlx5_flow_validate_item_geneve_opt(items,
7026 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7028 case RTE_FLOW_ITEM_TYPE_MPLS:
7029 ret = mlx5_flow_validate_item_mpls(dev, items,
7034 last_item = MLX5_FLOW_LAYER_MPLS;
7037 case RTE_FLOW_ITEM_TYPE_MARK:
7038 ret = flow_dv_validate_item_mark(dev, items, attr,
7042 last_item = MLX5_FLOW_ITEM_MARK;
7044 case RTE_FLOW_ITEM_TYPE_META:
7045 ret = flow_dv_validate_item_meta(dev, items, attr,
7049 last_item = MLX5_FLOW_ITEM_METADATA;
7051 case RTE_FLOW_ITEM_TYPE_ICMP:
7052 ret = mlx5_flow_validate_item_icmp(items, item_flags,
7057 last_item = MLX5_FLOW_LAYER_ICMP;
7059 case RTE_FLOW_ITEM_TYPE_ICMP6:
7060 ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7065 item_ipv6_proto = IPPROTO_ICMPV6;
7066 last_item = MLX5_FLOW_LAYER_ICMP6;
7068 case RTE_FLOW_ITEM_TYPE_TAG:
7069 ret = flow_dv_validate_item_tag(dev, items,
7073 last_item = MLX5_FLOW_ITEM_TAG;
7075 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7076 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7078 case RTE_FLOW_ITEM_TYPE_GTP:
7079 ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7084 last_item = MLX5_FLOW_LAYER_GTP;
7086 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7087 ret = flow_dv_validate_item_gtp_psc(items, last_item,
7092 last_item = MLX5_FLOW_LAYER_GTP_PSC;
7094 case RTE_FLOW_ITEM_TYPE_ECPRI:
7095 /* Capacity will be checked in the translate stage. */
7096 ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7103 last_item = MLX5_FLOW_LAYER_ECPRI;
7105 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7106 ret = flow_dv_validate_item_integrity(dev, items,
7114 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7115 ret = flow_dv_validate_item_aso_ct(dev, items,
7116 &item_flags, error);
7120 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7121 /* tunnel offload item was processed before
7122 * list it here as a supported type
7126 return rte_flow_error_set(error, ENOTSUP,
7127 RTE_FLOW_ERROR_TYPE_ITEM,
7128 NULL, "item not supported");
7130 item_flags |= last_item;
7132 if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
7133 ret = flow_dv_validate_item_integrity_post(integrity_items,
7138 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7139 int type = actions->type;
7140 bool shared_count = false;
7142 if (!mlx5_flow_os_action_supported(type))
7143 return rte_flow_error_set(error, ENOTSUP,
7144 RTE_FLOW_ERROR_TYPE_ACTION,
7146 "action not supported");
7147 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7148 return rte_flow_error_set(error, ENOTSUP,
7149 RTE_FLOW_ERROR_TYPE_ACTION,
7150 actions, "too many actions");
7152 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7153 return rte_flow_error_set(error, ENOTSUP,
7154 RTE_FLOW_ERROR_TYPE_ACTION,
7155 NULL, "meter action with policy "
7156 "must be the last action");
7158 case RTE_FLOW_ACTION_TYPE_VOID:
7160 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7161 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
7162 ret = flow_dv_validate_action_port_id(dev,
7169 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7172 case RTE_FLOW_ACTION_TYPE_FLAG:
7173 ret = flow_dv_validate_action_flag(dev, action_flags,
7177 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7178 /* Count all modify-header actions as one. */
7179 if (!(action_flags &
7180 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7182 action_flags |= MLX5_FLOW_ACTION_FLAG |
7183 MLX5_FLOW_ACTION_MARK_EXT;
7184 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7185 modify_after_mirror = 1;
7188 action_flags |= MLX5_FLOW_ACTION_FLAG;
7191 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7193 case RTE_FLOW_ACTION_TYPE_MARK:
7194 ret = flow_dv_validate_action_mark(dev, actions,
7199 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7200 /* Count all modify-header actions as one. */
7201 if (!(action_flags &
7202 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7204 action_flags |= MLX5_FLOW_ACTION_MARK |
7205 MLX5_FLOW_ACTION_MARK_EXT;
7206 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7207 modify_after_mirror = 1;
7209 action_flags |= MLX5_FLOW_ACTION_MARK;
7212 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7214 case RTE_FLOW_ACTION_TYPE_SET_META:
7215 ret = flow_dv_validate_action_set_meta(dev, actions,
7220 /* Count all modify-header actions as one action. */
7221 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7223 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7224 modify_after_mirror = 1;
7225 action_flags |= MLX5_FLOW_ACTION_SET_META;
7226 rw_act_num += MLX5_ACT_NUM_SET_META;
7228 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7229 ret = flow_dv_validate_action_set_tag(dev, actions,
7234 /* Count all modify-header actions as one action. */
7235 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7237 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7238 modify_after_mirror = 1;
7239 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7240 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7242 case RTE_FLOW_ACTION_TYPE_DROP:
7243 ret = mlx5_flow_validate_action_drop(action_flags,
7247 action_flags |= MLX5_FLOW_ACTION_DROP;
7250 case RTE_FLOW_ACTION_TYPE_QUEUE:
7251 ret = mlx5_flow_validate_action_queue(actions,
7256 queue_index = ((const struct rte_flow_action_queue *)
7257 (actions->conf))->index;
7258 action_flags |= MLX5_FLOW_ACTION_QUEUE;
7261 case RTE_FLOW_ACTION_TYPE_RSS:
7262 rss = actions->conf;
7263 ret = mlx5_flow_validate_action_rss(actions,
7269 if (rss && sample_rss &&
7270 (sample_rss->level != rss->level ||
7271 sample_rss->types != rss->types))
7272 return rte_flow_error_set(error, ENOTSUP,
7273 RTE_FLOW_ERROR_TYPE_ACTION,
7275 "Can't use the different RSS types "
7276 "or level in the same flow");
7277 if (rss != NULL && rss->queue_num)
7278 queue_index = rss->queue[0];
7279 action_flags |= MLX5_FLOW_ACTION_RSS;
7282 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7284 mlx5_flow_validate_action_default_miss(action_flags,
7288 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7291 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7292 shared_count = true;
7294 case RTE_FLOW_ACTION_TYPE_COUNT:
7295 ret = flow_dv_validate_action_count(dev, shared_count,
7300 action_flags |= MLX5_FLOW_ACTION_COUNT;
7303 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7304 if (flow_dv_validate_action_pop_vlan(dev,
7310 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7311 modify_after_mirror = 1;
7312 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7315 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7316 ret = flow_dv_validate_action_push_vlan(dev,
7323 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7324 modify_after_mirror = 1;
7325 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7328 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7329 ret = flow_dv_validate_action_set_vlan_pcp
7330 (action_flags, actions, error);
7333 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7334 modify_after_mirror = 1;
7335 /* Count PCP with push_vlan command. */
7336 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7338 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7339 ret = flow_dv_validate_action_set_vlan_vid
7340 (item_flags, action_flags,
7344 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7345 modify_after_mirror = 1;
7346 /* Count VID with push_vlan command. */
7347 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7348 rw_act_num += MLX5_ACT_NUM_MDF_VID;
7350 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7351 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7352 ret = flow_dv_validate_action_l2_encap(dev,
7358 action_flags |= MLX5_FLOW_ACTION_ENCAP;
7361 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7362 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7363 ret = flow_dv_validate_action_decap(dev, action_flags,
7364 actions, item_flags,
7368 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7369 modify_after_mirror = 1;
7370 action_flags |= MLX5_FLOW_ACTION_DECAP;
7373 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7374 ret = flow_dv_validate_action_raw_encap_decap
7375 (dev, NULL, actions->conf, attr, &action_flags,
7376 &actions_n, actions, item_flags, error);
7380 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7381 decap = actions->conf;
7382 while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7384 if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7388 encap = actions->conf;
7390 ret = flow_dv_validate_action_raw_encap_decap
7392 decap ? decap : &empty_decap, encap,
7393 attr, &action_flags, &actions_n,
7394 actions, item_flags, error);
7397 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7398 (action_flags & MLX5_FLOW_ACTION_DECAP))
7399 modify_after_mirror = 1;
7401 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7402 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7403 ret = flow_dv_validate_action_modify_mac(action_flags,
7409 /* Count all modify-header actions as one action. */
7410 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7412 action_flags |= actions->type ==
7413 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7414 MLX5_FLOW_ACTION_SET_MAC_SRC :
7415 MLX5_FLOW_ACTION_SET_MAC_DST;
7416 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7417 modify_after_mirror = 1;
7419 * Even if the source and destination MAC addresses have
7420 * overlap in the header with 4B alignment, the convert
7421 * function will handle them separately and 4 SW actions
7422 * will be created. And 2 actions will be added each
7423 * time no matter how many bytes of address will be set.
7425 rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7427 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7428 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7429 ret = flow_dv_validate_action_modify_ipv4(action_flags,
7435 /* Count all modify-header actions as one action. */
7436 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7438 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7439 modify_after_mirror = 1;
7440 action_flags |= actions->type ==
7441 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7442 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7443 MLX5_FLOW_ACTION_SET_IPV4_DST;
7444 rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7446 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7447 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7448 ret = flow_dv_validate_action_modify_ipv6(action_flags,
7454 if (item_ipv6_proto == IPPROTO_ICMPV6)
7455 return rte_flow_error_set(error, ENOTSUP,
7456 RTE_FLOW_ERROR_TYPE_ACTION,
7458 "Can't change header "
7459 "with ICMPv6 proto");
7460 /* Count all modify-header actions as one action. */
7461 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7463 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7464 modify_after_mirror = 1;
7465 action_flags |= actions->type ==
7466 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7467 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7468 MLX5_FLOW_ACTION_SET_IPV6_DST;
7469 rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7471 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7472 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7473 ret = flow_dv_validate_action_modify_tp(action_flags,
7479 /* Count all modify-header actions as one action. */
7480 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7482 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7483 modify_after_mirror = 1;
7484 action_flags |= actions->type ==
7485 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7486 MLX5_FLOW_ACTION_SET_TP_SRC :
7487 MLX5_FLOW_ACTION_SET_TP_DST;
7488 rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7490 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7491 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7492 ret = flow_dv_validate_action_modify_ttl(action_flags,
7498 /* Count all modify-header actions as one action. */
7499 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7501 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7502 modify_after_mirror = 1;
7503 action_flags |= actions->type ==
7504 RTE_FLOW_ACTION_TYPE_SET_TTL ?
7505 MLX5_FLOW_ACTION_SET_TTL :
7506 MLX5_FLOW_ACTION_DEC_TTL;
7507 rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7509 case RTE_FLOW_ACTION_TYPE_JUMP:
7510 ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7516 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7518 return rte_flow_error_set(error, EINVAL,
7519 RTE_FLOW_ERROR_TYPE_ACTION,
7521 "sample and jump action combination is not supported");
7523 action_flags |= MLX5_FLOW_ACTION_JUMP;
7525 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7526 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7527 ret = flow_dv_validate_action_modify_tcp_seq
7534 /* Count all modify-header actions as one action. */
7535 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7537 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7538 modify_after_mirror = 1;
7539 action_flags |= actions->type ==
7540 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7541 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7542 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7543 rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7545 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7546 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7547 ret = flow_dv_validate_action_modify_tcp_ack
7554 /* Count all modify-header actions as one action. */
7555 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7557 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7558 modify_after_mirror = 1;
7559 action_flags |= actions->type ==
7560 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7561 MLX5_FLOW_ACTION_INC_TCP_ACK :
7562 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7563 rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7565 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7567 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7568 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7569 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7571 case RTE_FLOW_ACTION_TYPE_METER:
7572 ret = mlx5_flow_validate_action_meter(dev,
7580 action_flags |= MLX5_FLOW_ACTION_METER;
7583 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7585 /* Meter action will add one more TAG action. */
7586 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7588 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7589 if (!attr->transfer && !attr->group)
7590 return rte_flow_error_set(error, ENOTSUP,
7591 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7593 "Shared ASO age action is not supported for group 0");
7594 if (action_flags & MLX5_FLOW_ACTION_AGE)
7595 return rte_flow_error_set
7597 RTE_FLOW_ERROR_TYPE_ACTION,
7599 "duplicate age actions set");
7600 action_flags |= MLX5_FLOW_ACTION_AGE;
7603 case RTE_FLOW_ACTION_TYPE_AGE:
7604 ret = flow_dv_validate_action_age(action_flags,
7610 * Validate the regular AGE action (using counter)
7611 * mutual exclusion with share counter actions.
7613 if (!priv->sh->flow_hit_aso_en) {
7615 return rte_flow_error_set
7617 RTE_FLOW_ERROR_TYPE_ACTION,
7619 "old age and shared count combination is not supported");
7621 return rte_flow_error_set
7623 RTE_FLOW_ERROR_TYPE_ACTION,
7625 "old age action and count must be in the same sub flow");
7627 action_flags |= MLX5_FLOW_ACTION_AGE;
7630 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7631 ret = flow_dv_validate_action_modify_ipv4_dscp
7638 /* Count all modify-header actions as one action. */
7639 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7641 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7642 modify_after_mirror = 1;
7643 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7644 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7646 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7647 ret = flow_dv_validate_action_modify_ipv6_dscp
7654 /* Count all modify-header actions as one action. */
7655 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7657 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7658 modify_after_mirror = 1;
7659 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7660 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7662 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7663 ret = flow_dv_validate_action_sample(&action_flags,
7672 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7675 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7676 ret = flow_dv_validate_action_modify_field(dev,
7683 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7684 modify_after_mirror = 1;
7685 /* Count all modify-header actions as one action. */
7686 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7688 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7691 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7692 ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7697 action_flags |= MLX5_FLOW_ACTION_CT;
7699 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7700 /* tunnel offload action was processed before
7701 * list it here as a supported type
7705 return rte_flow_error_set(error, ENOTSUP,
7706 RTE_FLOW_ERROR_TYPE_ACTION,
7708 "action not supported");
7712 * Validate actions in flow rules
7713 * - Explicit decap action is prohibited by the tunnel offload API.
7714 * - Drop action in tunnel steer rule is prohibited by the API.
7715 * - Application cannot use MARK action because it's value can mask
7716 * tunnel default miss nitification.
7717 * - JUMP in tunnel match rule has no support in current PMD
7719 * - TAG & META are reserved for future uses.
7721 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7722 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP |
7723 MLX5_FLOW_ACTION_MARK |
7724 MLX5_FLOW_ACTION_SET_TAG |
7725 MLX5_FLOW_ACTION_SET_META |
7726 MLX5_FLOW_ACTION_DROP;
7728 if (action_flags & bad_actions_mask)
7729 return rte_flow_error_set
7731 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7732 "Invalid RTE action in tunnel "
7734 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7735 return rte_flow_error_set
7737 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7738 "tunnel set decap rule must terminate "
7741 return rte_flow_error_set
7743 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7744 "tunnel flows for ingress traffic only");
7746 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7747 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP |
7748 MLX5_FLOW_ACTION_MARK |
7749 MLX5_FLOW_ACTION_SET_TAG |
7750 MLX5_FLOW_ACTION_SET_META;
7752 if (action_flags & bad_actions_mask)
7753 return rte_flow_error_set
7755 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7756 "Invalid RTE action in tunnel "
7760 * Validate the drop action mutual exclusion with other actions.
7761 * Drop action is mutually-exclusive with any other action, except for
7763 * Drop action compatibility with tunnel offload was already validated.
7765 if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7766 MLX5_FLOW_ACTION_TUNNEL_MATCH));
7767 else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7768 (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7769 return rte_flow_error_set(error, EINVAL,
7770 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7771 "Drop action is mutually-exclusive "
7772 "with any other action, except for "
7774 /* Eswitch has few restrictions on using items and actions */
7775 if (attr->transfer) {
7776 if (!mlx5_flow_ext_mreg_supported(dev) &&
7777 action_flags & MLX5_FLOW_ACTION_FLAG)
7778 return rte_flow_error_set(error, ENOTSUP,
7779 RTE_FLOW_ERROR_TYPE_ACTION,
7781 "unsupported action FLAG");
7782 if (!mlx5_flow_ext_mreg_supported(dev) &&
7783 action_flags & MLX5_FLOW_ACTION_MARK)
7784 return rte_flow_error_set(error, ENOTSUP,
7785 RTE_FLOW_ERROR_TYPE_ACTION,
7787 "unsupported action MARK");
7788 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7789 return rte_flow_error_set(error, ENOTSUP,
7790 RTE_FLOW_ERROR_TYPE_ACTION,
7792 "unsupported action QUEUE");
7793 if (action_flags & MLX5_FLOW_ACTION_RSS)
7794 return rte_flow_error_set(error, ENOTSUP,
7795 RTE_FLOW_ERROR_TYPE_ACTION,
7797 "unsupported action RSS");
7798 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7799 return rte_flow_error_set(error, EINVAL,
7800 RTE_FLOW_ERROR_TYPE_ACTION,
7802 "no fate action is found");
7804 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7805 return rte_flow_error_set(error, EINVAL,
7806 RTE_FLOW_ERROR_TYPE_ACTION,
7808 "no fate action is found");
7811 * Continue validation for Xcap and VLAN actions.
7812 * If hairpin is working in explicit TX rule mode, there is no actions
7813 * splitting and the validation of hairpin ingress flow should be the
7814 * same as other standard flows.
7816 if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7817 MLX5_FLOW_VLAN_ACTIONS)) &&
7818 (queue_index == 0xFFFF ||
7819 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7820 ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7821 conf->tx_explicit != 0))) {
7822 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7823 MLX5_FLOW_XCAP_ACTIONS)
7824 return rte_flow_error_set(error, ENOTSUP,
7825 RTE_FLOW_ERROR_TYPE_ACTION,
7826 NULL, "encap and decap "
7827 "combination aren't supported");
7828 if (!attr->transfer && attr->ingress) {
7829 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7830 return rte_flow_error_set
7832 RTE_FLOW_ERROR_TYPE_ACTION,
7833 NULL, "encap is not supported"
7834 " for ingress traffic");
7835 else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7836 return rte_flow_error_set
7838 RTE_FLOW_ERROR_TYPE_ACTION,
7839 NULL, "push VLAN action not "
7840 "supported for ingress");
7841 else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7842 MLX5_FLOW_VLAN_ACTIONS)
7843 return rte_flow_error_set
7845 RTE_FLOW_ERROR_TYPE_ACTION,
7846 NULL, "no support for "
7847 "multiple VLAN actions");
7850 if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7851 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7852 ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7854 return rte_flow_error_set
7856 RTE_FLOW_ERROR_TYPE_ACTION,
7857 NULL, "fate action not supported for "
7858 "meter with policy");
7860 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7861 return rte_flow_error_set
7863 RTE_FLOW_ERROR_TYPE_ACTION,
7864 NULL, "modify header action in egress "
7865 "cannot be done before meter action");
7866 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7867 return rte_flow_error_set
7869 RTE_FLOW_ERROR_TYPE_ACTION,
7870 NULL, "encap action in egress "
7871 "cannot be done before meter action");
7872 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7873 return rte_flow_error_set
7875 RTE_FLOW_ERROR_TYPE_ACTION,
7876 NULL, "push vlan action in egress "
7877 "cannot be done before meter action");
7881 * Hairpin flow will add one more TAG action in TX implicit mode.
7882 * In TX explicit mode, there will be no hairpin flow ID.
7885 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7886 /* extra metadata enabled: one more TAG action will be add. */
7887 if (dev_conf->dv_flow_en &&
7888 dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
7889 mlx5_flow_ext_mreg_supported(dev))
7890 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7892 flow_dv_modify_hdr_action_max(dev, is_root)) {
7893 return rte_flow_error_set(error, ENOTSUP,
7894 RTE_FLOW_ERROR_TYPE_ACTION,
7895 NULL, "too many header modify"
7896 " actions to support");
7898 /* Eswitch egress mirror and modify flow has limitation on CX5 */
7899 if (fdb_mirror_limit && modify_after_mirror)
7900 return rte_flow_error_set(error, EINVAL,
7901 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7902 "sample before modify action is not supported");
7907 * Internal preparation function. Allocates the DV flow size,
7908 * this size is constant.
7911 * Pointer to the rte_eth_dev structure.
7913 * Pointer to the flow attributes.
7915 * Pointer to the list of items.
7916 * @param[in] actions
7917 * Pointer to the list of actions.
7919 * Pointer to the error structure.
7922 * Pointer to mlx5_flow object on success,
7923 * otherwise NULL and rte_errno is set.
7925 static struct mlx5_flow *
7926 flow_dv_prepare(struct rte_eth_dev *dev,
7927 const struct rte_flow_attr *attr __rte_unused,
7928 const struct rte_flow_item items[] __rte_unused,
7929 const struct rte_flow_action actions[] __rte_unused,
7930 struct rte_flow_error *error)
7932 uint32_t handle_idx = 0;
7933 struct mlx5_flow *dev_flow;
7934 struct mlx5_flow_handle *dev_handle;
7935 struct mlx5_priv *priv = dev->data->dev_private;
7936 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
7939 wks->skip_matcher_reg = 0;
7941 wks->final_policy = NULL;
7942 /* In case of corrupting the memory. */
7943 if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
7944 rte_flow_error_set(error, ENOSPC,
7945 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7946 "not free temporary device flow");
7949 dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
7952 rte_flow_error_set(error, ENOMEM,
7953 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7954 "not enough memory to create flow handle");
7957 MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
7958 dev_flow = &wks->flows[wks->flow_idx++];
7959 memset(dev_flow, 0, sizeof(*dev_flow));
7960 dev_flow->handle = dev_handle;
7961 dev_flow->handle_idx = handle_idx;
7962 dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
7963 dev_flow->ingress = attr->ingress;
7964 dev_flow->dv.transfer = attr->transfer;
7968 #ifdef RTE_LIBRTE_MLX5_DEBUG
7970 * Sanity check for match mask and value. Similar to check_valid_spec() in
7971 * kernel driver. If unmasked bit is present in value, it returns failure.
7974 * pointer to match mask buffer.
7975 * @param match_value
7976 * pointer to match value buffer.
7979 * 0 if valid, -EINVAL otherwise.
7982 flow_dv_check_valid_spec(void *match_mask, void *match_value)
7984 uint8_t *m = match_mask;
7985 uint8_t *v = match_value;
7988 for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
7991 "match_value differs from match_criteria"
7992 " %p[%u] != %p[%u]",
7993 match_value, i, match_mask, i);
8002 * Add match of ip_version.
8006 * @param[in] headers_v
8007 * Values header pointer.
8008 * @param[in] headers_m
8009 * Masks header pointer.
8010 * @param[in] ip_version
8011 * The IP version to set.
8014 flow_dv_set_match_ip_version(uint32_t group,
8020 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8022 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8024 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8025 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8026 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8030 * Add Ethernet item to matcher and to the value.
8032 * @param[in, out] matcher
8034 * @param[in, out] key
8035 * Flow matcher value.
8037 * Flow pattern to translate.
8039 * Item is inner pattern.
8042 flow_dv_translate_item_eth(void *matcher, void *key,
8043 const struct rte_flow_item *item, int inner,
8046 const struct rte_flow_item_eth *eth_m = item->mask;
8047 const struct rte_flow_item_eth *eth_v = item->spec;
8048 const struct rte_flow_item_eth nic_mask = {
8049 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8050 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8051 .type = RTE_BE16(0xffff),
8064 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8066 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8068 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8070 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8072 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8073 ð_m->dst, sizeof(eth_m->dst));
8074 /* The value must be in the range of the mask. */
8075 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8076 for (i = 0; i < sizeof(eth_m->dst); ++i)
8077 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8078 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8079 ð_m->src, sizeof(eth_m->src));
8080 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8081 /* The value must be in the range of the mask. */
8082 for (i = 0; i < sizeof(eth_m->dst); ++i)
8083 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8085 * HW supports match on one Ethertype, the Ethertype following the last
8086 * VLAN tag of the packet (see PRM).
8087 * Set match on ethertype only if ETH header is not followed by VLAN.
8088 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8089 * ethertype, and use ip_version field instead.
8090 * eCPRI over Ether layer will use type value 0xAEFE.
8092 if (eth_m->type == 0xFFFF) {
8093 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8094 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8095 switch (eth_v->type) {
8096 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8097 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8099 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8100 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8101 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8103 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8104 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8106 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8107 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8113 if (eth_m->has_vlan) {
8114 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8115 if (eth_v->has_vlan) {
8117 * Here, when also has_more_vlan field in VLAN item is
8118 * not set, only single-tagged packets will be matched.
8120 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8124 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8125 rte_be_to_cpu_16(eth_m->type));
8126 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8127 *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8131 * Add VLAN item to matcher and to the value.
8133 * @param[in, out] dev_flow
8135 * @param[in, out] matcher
8137 * @param[in, out] key
8138 * Flow matcher value.
8140 * Flow pattern to translate.
8142 * Item is inner pattern.
8145 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8146 void *matcher, void *key,
8147 const struct rte_flow_item *item,
8148 int inner, uint32_t group)
8150 const struct rte_flow_item_vlan *vlan_m = item->mask;
8151 const struct rte_flow_item_vlan *vlan_v = item->spec;
8158 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8160 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8162 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8164 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8166 * This is workaround, masks are not supported,
8167 * and pre-validated.
8170 dev_flow->handle->vf_vlan.tag =
8171 rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8174 * When VLAN item exists in flow, mark packet as tagged,
8175 * even if TCI is not specified.
8177 if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8178 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8179 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8184 vlan_m = &rte_flow_item_vlan_mask;
8185 tci_m = rte_be_to_cpu_16(vlan_m->tci);
8186 tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8187 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8188 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8189 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8190 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8191 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8192 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8194 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8195 * ethertype, and use ip_version field instead.
8197 if (vlan_m->inner_type == 0xFFFF) {
8198 switch (vlan_v->inner_type) {
8199 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8200 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8201 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8202 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8204 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8205 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8207 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8208 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8214 if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8215 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8216 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8217 /* Only one vlan_tag bit can be set. */
8218 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8221 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8222 rte_be_to_cpu_16(vlan_m->inner_type));
8223 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8224 rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8228 * Add IPV4 item to matcher and to the value.
8230 * @param[in, out] matcher
8232 * @param[in, out] key
8233 * Flow matcher value.
8235 * Flow pattern to translate.
8237 * Item is inner pattern.
8239 * The group to insert the rule.
8242 flow_dv_translate_item_ipv4(void *matcher, void *key,
8243 const struct rte_flow_item *item,
8244 int inner, uint32_t group)
8246 const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8247 const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8248 const struct rte_flow_item_ipv4 nic_mask = {
8250 .src_addr = RTE_BE32(0xffffffff),
8251 .dst_addr = RTE_BE32(0xffffffff),
8252 .type_of_service = 0xff,
8253 .next_proto_id = 0xff,
8254 .time_to_live = 0xff,
8261 uint8_t tos, ihl_m, ihl_v;
8264 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8266 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8268 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8270 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8272 flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8277 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8278 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8279 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8280 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8281 *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8282 *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8283 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8284 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8285 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8286 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8287 *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8288 *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8289 tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8290 ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8291 ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8292 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8293 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8294 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8295 ipv4_m->hdr.type_of_service);
8296 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8297 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8298 ipv4_m->hdr.type_of_service >> 2);
8299 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8300 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8301 ipv4_m->hdr.next_proto_id);
8302 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8303 ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8304 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8305 ipv4_m->hdr.time_to_live);
8306 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8307 ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8308 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8309 !!(ipv4_m->hdr.fragment_offset));
8310 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8311 !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8315 * Add IPV6 item to matcher and to the value.
8317 * @param[in, out] matcher
8319 * @param[in, out] key
8320 * Flow matcher value.
8322 * Flow pattern to translate.
8324 * Item is inner pattern.
8326 * The group to insert the rule.
8329 flow_dv_translate_item_ipv6(void *matcher, void *key,
8330 const struct rte_flow_item *item,
8331 int inner, uint32_t group)
8333 const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8334 const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8335 const struct rte_flow_item_ipv6 nic_mask = {
8338 "\xff\xff\xff\xff\xff\xff\xff\xff"
8339 "\xff\xff\xff\xff\xff\xff\xff\xff",
8341 "\xff\xff\xff\xff\xff\xff\xff\xff"
8342 "\xff\xff\xff\xff\xff\xff\xff\xff",
8343 .vtc_flow = RTE_BE32(0xffffffff),
8350 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8351 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8360 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8362 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8364 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8366 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8368 flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8373 size = sizeof(ipv6_m->hdr.dst_addr);
8374 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8375 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8376 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8377 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8378 memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8379 for (i = 0; i < size; ++i)
8380 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8381 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8382 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8383 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8384 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8385 memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8386 for (i = 0; i < size; ++i)
8387 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8389 vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8390 vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8391 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8392 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8393 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8394 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8397 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8399 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8402 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8404 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8408 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8410 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8411 ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8413 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8414 ipv6_m->hdr.hop_limits);
8415 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8416 ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8417 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8418 !!(ipv6_m->has_frag_ext));
8419 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8420 !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8424 * Add IPV6 fragment extension item to matcher and to the value.
8426 * @param[in, out] matcher
8428 * @param[in, out] key
8429 * Flow matcher value.
8431 * Flow pattern to translate.
8433 * Item is inner pattern.
8436 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8437 const struct rte_flow_item *item,
8440 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8441 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8442 const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8444 .next_header = 0xff,
8445 .frag_data = RTE_BE16(0xffff),
8452 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8454 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8456 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8458 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8460 /* IPv6 fragment extension item exists, so packet is IP fragment. */
8461 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8462 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8463 if (!ipv6_frag_ext_v)
8465 if (!ipv6_frag_ext_m)
8466 ipv6_frag_ext_m = &nic_mask;
8467 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8468 ipv6_frag_ext_m->hdr.next_header);
8469 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8470 ipv6_frag_ext_v->hdr.next_header &
8471 ipv6_frag_ext_m->hdr.next_header);
8475 * Add TCP item to matcher and to the value.
8477 * @param[in, out] matcher
8479 * @param[in, out] key
8480 * Flow matcher value.
8482 * Flow pattern to translate.
8484 * Item is inner pattern.
8487 flow_dv_translate_item_tcp(void *matcher, void *key,
8488 const struct rte_flow_item *item,
8491 const struct rte_flow_item_tcp *tcp_m = item->mask;
8492 const struct rte_flow_item_tcp *tcp_v = item->spec;
8497 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8499 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8501 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8503 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8505 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8506 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8510 tcp_m = &rte_flow_item_tcp_mask;
8511 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8512 rte_be_to_cpu_16(tcp_m->hdr.src_port));
8513 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8514 rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8515 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8516 rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8517 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8518 rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8519 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8520 tcp_m->hdr.tcp_flags);
8521 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8522 (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8526 * Add UDP item to matcher and to the value.
8528 * @param[in, out] matcher
8530 * @param[in, out] key
8531 * Flow matcher value.
8533 * Flow pattern to translate.
8535 * Item is inner pattern.
8538 flow_dv_translate_item_udp(void *matcher, void *key,
8539 const struct rte_flow_item *item,
8542 const struct rte_flow_item_udp *udp_m = item->mask;
8543 const struct rte_flow_item_udp *udp_v = item->spec;
8548 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8550 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8552 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8554 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8556 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8557 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8561 udp_m = &rte_flow_item_udp_mask;
8562 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8563 rte_be_to_cpu_16(udp_m->hdr.src_port));
8564 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8565 rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8566 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8567 rte_be_to_cpu_16(udp_m->hdr.dst_port));
8568 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8569 rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8573 * Add GRE optional Key item to matcher and to the value.
8575 * @param[in, out] matcher
8577 * @param[in, out] key
8578 * Flow matcher value.
8580 * Flow pattern to translate.
8582 * Item is inner pattern.
8585 flow_dv_translate_item_gre_key(void *matcher, void *key,
8586 const struct rte_flow_item *item)
8588 const rte_be32_t *key_m = item->mask;
8589 const rte_be32_t *key_v = item->spec;
8590 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8591 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8592 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8594 /* GRE K bit must be on and should already be validated */
8595 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8596 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8600 key_m = &gre_key_default_mask;
8601 MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8602 rte_be_to_cpu_32(*key_m) >> 8);
8603 MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8604 rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8605 MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8606 rte_be_to_cpu_32(*key_m) & 0xFF);
8607 MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8608 rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8612 * Add GRE item to matcher and to the value.
8614 * @param[in, out] matcher
8616 * @param[in, out] key
8617 * Flow matcher value.
8619 * Flow pattern to translate.
8621 * Item is inner pattern.
8624 flow_dv_translate_item_gre(void *matcher, void *key,
8625 const struct rte_flow_item *item,
8628 const struct rte_flow_item_gre *gre_m = item->mask;
8629 const struct rte_flow_item_gre *gre_v = item->spec;
8632 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8633 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8640 uint16_t s_present:1;
8641 uint16_t k_present:1;
8642 uint16_t rsvd_bit1:1;
8643 uint16_t c_present:1;
8647 } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8650 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8652 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8654 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8656 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8658 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8659 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8663 gre_m = &rte_flow_item_gre_mask;
8664 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8665 rte_be_to_cpu_16(gre_m->protocol));
8666 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8667 rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8668 gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8669 gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8670 MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8671 gre_crks_rsvd0_ver_m.c_present);
8672 MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8673 gre_crks_rsvd0_ver_v.c_present &
8674 gre_crks_rsvd0_ver_m.c_present);
8675 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8676 gre_crks_rsvd0_ver_m.k_present);
8677 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8678 gre_crks_rsvd0_ver_v.k_present &
8679 gre_crks_rsvd0_ver_m.k_present);
8680 MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8681 gre_crks_rsvd0_ver_m.s_present);
8682 MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8683 gre_crks_rsvd0_ver_v.s_present &
8684 gre_crks_rsvd0_ver_m.s_present);
8688 * Add NVGRE item to matcher and to the value.
8690 * @param[in, out] matcher
8692 * @param[in, out] key
8693 * Flow matcher value.
8695 * Flow pattern to translate.
8697 * Item is inner pattern.
8700 flow_dv_translate_item_nvgre(void *matcher, void *key,
8701 const struct rte_flow_item *item,
8704 const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8705 const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8706 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8707 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8708 const char *tni_flow_id_m;
8709 const char *tni_flow_id_v;
8715 /* For NVGRE, GRE header fields must be set with defined values. */
8716 const struct rte_flow_item_gre gre_spec = {
8717 .c_rsvd0_ver = RTE_BE16(0x2000),
8718 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8720 const struct rte_flow_item_gre gre_mask = {
8721 .c_rsvd0_ver = RTE_BE16(0xB000),
8722 .protocol = RTE_BE16(UINT16_MAX),
8724 const struct rte_flow_item gre_item = {
8729 flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8733 nvgre_m = &rte_flow_item_nvgre_mask;
8734 tni_flow_id_m = (const char *)nvgre_m->tni;
8735 tni_flow_id_v = (const char *)nvgre_v->tni;
8736 size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8737 gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8738 gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8739 memcpy(gre_key_m, tni_flow_id_m, size);
8740 for (i = 0; i < size; ++i)
8741 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8745 * Add VXLAN item to matcher and to the value.
8748 * Pointer to the Ethernet device structure.
8750 * Flow rule attributes.
8751 * @param[in, out] matcher
8753 * @param[in, out] key
8754 * Flow matcher value.
8756 * Flow pattern to translate.
8758 * Item is inner pattern.
8761 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8762 const struct rte_flow_attr *attr,
8763 void *matcher, void *key,
8764 const struct rte_flow_item *item,
8767 const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8768 const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8773 uint32_t *tunnel_header_v;
8774 uint32_t *tunnel_header_m;
8776 struct mlx5_priv *priv = dev->data->dev_private;
8777 const struct rte_flow_item_vxlan nic_mask = {
8778 .vni = "\xff\xff\xff",
8783 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8785 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8787 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8789 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8791 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8792 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8793 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8794 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8795 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8797 dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
8801 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8802 (attr->group && !priv->sh->misc5_cap))
8803 vxlan_m = &rte_flow_item_vxlan_mask;
8805 vxlan_m = &nic_mask;
8807 if ((priv->sh->steering_format_version ==
8808 MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
8809 dport != MLX5_UDP_PORT_VXLAN) ||
8810 (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8811 ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8818 misc_m = MLX5_ADDR_OF(fte_match_param,
8819 matcher, misc_parameters);
8820 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8821 size = sizeof(vxlan_m->vni);
8822 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8823 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8824 memcpy(vni_m, vxlan_m->vni, size);
8825 for (i = 0; i < size; ++i)
8826 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8829 misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8830 misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8831 tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8834 tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8837 *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8838 (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8839 (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8840 if (*tunnel_header_v)
8841 *tunnel_header_m = vxlan_m->vni[0] |
8842 vxlan_m->vni[1] << 8 |
8843 vxlan_m->vni[2] << 16;
8845 *tunnel_header_m = 0x0;
8846 *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8847 if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8848 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8852 * Add VXLAN-GPE item to matcher and to the value.
8854 * @param[in, out] matcher
8856 * @param[in, out] key
8857 * Flow matcher value.
8859 * Flow pattern to translate.
8861 * Item is inner pattern.
8865 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
8866 const struct rte_flow_item *item, int inner)
8868 const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
8869 const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
8873 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
8875 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
8881 uint8_t flags_m = 0xff;
8882 uint8_t flags_v = 0xc;
8885 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8887 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8889 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8891 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8893 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8894 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8895 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8896 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8897 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8902 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
8903 size = sizeof(vxlan_m->vni);
8904 vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
8905 vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
8906 memcpy(vni_m, vxlan_m->vni, size);
8907 for (i = 0; i < size; ++i)
8908 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8909 if (vxlan_m->flags) {
8910 flags_m = vxlan_m->flags;
8911 flags_v = vxlan_v->flags;
8913 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
8914 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
8915 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
8917 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
8922 * Add Geneve item to matcher and to the value.
8924 * @param[in, out] matcher
8926 * @param[in, out] key
8927 * Flow matcher value.
8929 * Flow pattern to translate.
8931 * Item is inner pattern.
8935 flow_dv_translate_item_geneve(void *matcher, void *key,
8936 const struct rte_flow_item *item, int inner)
8938 const struct rte_flow_item_geneve *geneve_m = item->mask;
8939 const struct rte_flow_item_geneve *geneve_v = item->spec;
8942 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8943 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8952 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8954 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8956 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8958 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8960 dport = MLX5_UDP_PORT_GENEVE;
8961 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8962 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8963 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8968 geneve_m = &rte_flow_item_geneve_mask;
8969 size = sizeof(geneve_m->vni);
8970 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
8971 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
8972 memcpy(vni_m, geneve_m->vni, size);
8973 for (i = 0; i < size; ++i)
8974 vni_v[i] = vni_m[i] & geneve_v->vni[i];
8975 MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
8976 rte_be_to_cpu_16(geneve_m->protocol));
8977 MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
8978 rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
8979 gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
8980 gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
8981 MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
8982 MLX5_GENEVE_OAMF_VAL(gbhdr_m));
8983 MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
8984 MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
8985 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
8986 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
8987 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
8988 MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
8989 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
8993 * Create Geneve TLV option resource.
8995 * @param dev[in, out]
8996 * Pointer to rte_eth_dev structure.
8997 * @param[in, out] tag_be24
8998 * Tag value in big endian then R-shift 8.
8999 * @parm[in, out] dev_flow
9000 * Pointer to the dev_flow.
9002 * pointer to error structure.
9005 * 0 on success otherwise -errno and errno is set.
9009 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9010 const struct rte_flow_item *item,
9011 struct rte_flow_error *error)
9013 struct mlx5_priv *priv = dev->data->dev_private;
9014 struct mlx5_dev_ctx_shared *sh = priv->sh;
9015 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9016 sh->geneve_tlv_option_resource;
9017 struct mlx5_devx_obj *obj;
9018 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9023 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9024 if (geneve_opt_resource != NULL) {
9025 if (geneve_opt_resource->option_class ==
9026 geneve_opt_v->option_class &&
9027 geneve_opt_resource->option_type ==
9028 geneve_opt_v->option_type &&
9029 geneve_opt_resource->length ==
9030 geneve_opt_v->option_len) {
9031 /* We already have GENVE TLV option obj allocated. */
9032 __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9035 ret = rte_flow_error_set(error, ENOMEM,
9036 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9037 "Only one GENEVE TLV option supported");
9041 /* Create a GENEVE TLV object and resource. */
9042 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->cdev->ctx,
9043 geneve_opt_v->option_class,
9044 geneve_opt_v->option_type,
9045 geneve_opt_v->option_len);
9047 ret = rte_flow_error_set(error, ENODATA,
9048 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9049 "Failed to create GENEVE TLV Devx object");
9052 sh->geneve_tlv_option_resource =
9053 mlx5_malloc(MLX5_MEM_ZERO,
9054 sizeof(*geneve_opt_resource),
9056 if (!sh->geneve_tlv_option_resource) {
9057 claim_zero(mlx5_devx_cmd_destroy(obj));
9058 ret = rte_flow_error_set(error, ENOMEM,
9059 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9060 "GENEVE TLV object memory allocation failed");
9063 geneve_opt_resource = sh->geneve_tlv_option_resource;
9064 geneve_opt_resource->obj = obj;
9065 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9066 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9067 geneve_opt_resource->length = geneve_opt_v->option_len;
9068 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9072 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9077 * Add Geneve TLV option item to matcher.
9079 * @param[in, out] dev
9080 * Pointer to rte_eth_dev structure.
9081 * @param[in, out] matcher
9083 * @param[in, out] key
9084 * Flow matcher value.
9086 * Flow pattern to translate.
9088 * Pointer to error structure.
9091 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9092 void *key, const struct rte_flow_item *item,
9093 struct rte_flow_error *error)
9095 const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9096 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9097 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9098 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9099 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9101 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9102 rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9108 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9109 ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9112 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9116 * Set the option length in GENEVE header if not requested.
9117 * The GENEVE TLV option length is expressed by the option length field
9118 * in the GENEVE header.
9119 * If the option length was not requested but the GENEVE TLV option item
9120 * is present we set the option length field implicitly.
9122 if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9123 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9124 MLX5_GENEVE_OPTLEN_MASK);
9125 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9126 geneve_opt_v->option_len + 1);
9128 MLX5_SET(fte_match_set_misc, misc_m, geneve_tlv_option_0_exist, 1);
9129 MLX5_SET(fte_match_set_misc, misc_v, geneve_tlv_option_0_exist, 1);
9131 if (geneve_opt_v->data) {
9132 memcpy(&opt_data_key, geneve_opt_v->data,
9133 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9134 sizeof(opt_data_key)));
9135 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9136 sizeof(opt_data_key));
9137 memcpy(&opt_data_mask, geneve_opt_m->data,
9138 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9139 sizeof(opt_data_mask)));
9140 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9141 sizeof(opt_data_mask));
9142 MLX5_SET(fte_match_set_misc3, misc3_m,
9143 geneve_tlv_option_0_data,
9144 rte_be_to_cpu_32(opt_data_mask));
9145 MLX5_SET(fte_match_set_misc3, misc3_v,
9146 geneve_tlv_option_0_data,
9147 rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9153 * Add MPLS item to matcher and to the value.
9155 * @param[in, out] matcher
9157 * @param[in, out] key
9158 * Flow matcher value.
9160 * Flow pattern to translate.
9161 * @param[in] prev_layer
9162 * The protocol layer indicated in previous item.
9164 * Item is inner pattern.
9167 flow_dv_translate_item_mpls(void *matcher, void *key,
9168 const struct rte_flow_item *item,
9169 uint64_t prev_layer,
9172 const uint32_t *in_mpls_m = item->mask;
9173 const uint32_t *in_mpls_v = item->spec;
9174 uint32_t *out_mpls_m = 0;
9175 uint32_t *out_mpls_v = 0;
9176 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9177 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9178 void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9180 void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9181 void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9182 void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9184 switch (prev_layer) {
9185 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9186 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
9187 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9188 MLX5_UDP_PORT_MPLS);
9190 case MLX5_FLOW_LAYER_GRE:
9192 case MLX5_FLOW_LAYER_GRE_KEY:
9193 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
9194 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9195 RTE_ETHER_TYPE_MPLS);
9203 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9204 switch (prev_layer) {
9205 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9207 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9208 outer_first_mpls_over_udp);
9210 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9211 outer_first_mpls_over_udp);
9213 case MLX5_FLOW_LAYER_GRE:
9215 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9216 outer_first_mpls_over_gre);
9218 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9219 outer_first_mpls_over_gre);
9222 /* Inner MPLS not over GRE is not supported. */
9225 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9229 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9235 if (out_mpls_m && out_mpls_v) {
9236 *out_mpls_m = *in_mpls_m;
9237 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9242 * Add metadata register item to matcher
9244 * @param[in, out] matcher
9246 * @param[in, out] key
9247 * Flow matcher value.
9248 * @param[in] reg_type
9249 * Type of device metadata register
9256 flow_dv_match_meta_reg(void *matcher, void *key,
9257 enum modify_reg reg_type,
9258 uint32_t data, uint32_t mask)
9261 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9263 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9269 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9270 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9273 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9274 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9278 * The metadata register C0 field might be divided into
9279 * source vport index and META item value, we should set
9280 * this field according to specified mask, not as whole one.
9282 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9284 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9285 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9288 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9291 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9292 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9295 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9296 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9299 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9300 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9303 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9304 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9307 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9308 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9311 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9312 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9315 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9316 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9325 * Add MARK item to matcher
9328 * The device to configure through.
9329 * @param[in, out] matcher
9331 * @param[in, out] key
9332 * Flow matcher value.
9334 * Flow pattern to translate.
9337 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9338 void *matcher, void *key,
9339 const struct rte_flow_item *item)
9341 struct mlx5_priv *priv = dev->data->dev_private;
9342 const struct rte_flow_item_mark *mark;
9346 mark = item->mask ? (const void *)item->mask :
9347 &rte_flow_item_mark_mask;
9348 mask = mark->id & priv->sh->dv_mark_mask;
9349 mark = (const void *)item->spec;
9351 value = mark->id & priv->sh->dv_mark_mask & mask;
9353 enum modify_reg reg;
9355 /* Get the metadata register index for the mark. */
9356 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9357 MLX5_ASSERT(reg > 0);
9358 if (reg == REG_C_0) {
9359 struct mlx5_priv *priv = dev->data->dev_private;
9360 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9361 uint32_t shl_c0 = rte_bsf32(msk_c0);
9367 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9372 * Add META item to matcher
9375 * The devich to configure through.
9376 * @param[in, out] matcher
9378 * @param[in, out] key
9379 * Flow matcher value.
9381 * Attributes of flow that includes this item.
9383 * Flow pattern to translate.
9386 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9387 void *matcher, void *key,
9388 const struct rte_flow_attr *attr,
9389 const struct rte_flow_item *item)
9391 const struct rte_flow_item_meta *meta_m;
9392 const struct rte_flow_item_meta *meta_v;
9394 meta_m = (const void *)item->mask;
9396 meta_m = &rte_flow_item_meta_mask;
9397 meta_v = (const void *)item->spec;
9400 uint32_t value = meta_v->data;
9401 uint32_t mask = meta_m->data;
9403 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9406 MLX5_ASSERT(reg != REG_NON);
9407 if (reg == REG_C_0) {
9408 struct mlx5_priv *priv = dev->data->dev_private;
9409 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9410 uint32_t shl_c0 = rte_bsf32(msk_c0);
9416 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9421 * Add vport metadata Reg C0 item to matcher
9423 * @param[in, out] matcher
9425 * @param[in, out] key
9426 * Flow matcher value.
9428 * Flow pattern to translate.
9431 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9432 uint32_t value, uint32_t mask)
9434 flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9438 * Add tag item to matcher
9441 * The devich to configure through.
9442 * @param[in, out] matcher
9444 * @param[in, out] key
9445 * Flow matcher value.
9447 * Flow pattern to translate.
9450 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9451 void *matcher, void *key,
9452 const struct rte_flow_item *item)
9454 const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9455 const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9456 uint32_t mask, value;
9459 value = tag_v->data;
9460 mask = tag_m ? tag_m->data : UINT32_MAX;
9461 if (tag_v->id == REG_C_0) {
9462 struct mlx5_priv *priv = dev->data->dev_private;
9463 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9464 uint32_t shl_c0 = rte_bsf32(msk_c0);
9470 flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9474 * Add TAG item to matcher
9477 * The devich to configure through.
9478 * @param[in, out] matcher
9480 * @param[in, out] key
9481 * Flow matcher value.
9483 * Flow pattern to translate.
9486 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9487 void *matcher, void *key,
9488 const struct rte_flow_item *item)
9490 const struct rte_flow_item_tag *tag_v = item->spec;
9491 const struct rte_flow_item_tag *tag_m = item->mask;
9492 enum modify_reg reg;
9495 tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9496 /* Get the metadata register index for the tag. */
9497 reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9498 MLX5_ASSERT(reg > 0);
9499 flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9503 * Add source vport match to the specified matcher.
9505 * @param[in, out] matcher
9507 * @param[in, out] key
9508 * Flow matcher value.
9510 * Source vport value to match
9515 flow_dv_translate_item_source_vport(void *matcher, void *key,
9516 int16_t port, uint16_t mask)
9518 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9519 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9521 MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9522 MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9526 * Translate port-id item to eswitch match on port-id.
9529 * The devich to configure through.
9530 * @param[in, out] matcher
9532 * @param[in, out] key
9533 * Flow matcher value.
9535 * Flow pattern to translate.
9540 * 0 on success, a negative errno value otherwise.
9543 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9544 void *key, const struct rte_flow_item *item,
9545 const struct rte_flow_attr *attr)
9547 const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9548 const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9549 struct mlx5_priv *priv;
9552 if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
9553 flow_dv_translate_item_source_vport(matcher, key,
9554 flow_dv_get_esw_manager_vport_id(dev), 0xffff);
9557 mask = pid_m ? pid_m->id : 0xffff;
9558 id = pid_v ? pid_v->id : dev->data->port_id;
9559 priv = mlx5_port_to_eswitch_info(id, item == NULL);
9563 * Translate to vport field or to metadata, depending on mode.
9564 * Kernel can use either misc.source_port or half of C0 metadata
9567 if (priv->vport_meta_mask) {
9569 * Provide the hint for SW steering library
9570 * to insert the flow into ingress domain and
9571 * save the extra vport match.
9573 if (mask == 0xffff && priv->vport_id == 0xffff &&
9574 priv->pf_bond < 0 && attr->transfer)
9575 flow_dv_translate_item_source_vport
9576 (matcher, key, priv->vport_id, mask);
9578 * We should always set the vport metadata register,
9579 * otherwise the SW steering library can drop
9580 * the rule if wire vport metadata value is not zero,
9581 * it depends on kernel configuration.
9583 flow_dv_translate_item_meta_vport(matcher, key,
9584 priv->vport_meta_tag,
9585 priv->vport_meta_mask);
9587 flow_dv_translate_item_source_vport(matcher, key,
9588 priv->vport_id, mask);
9594 * Add ICMP6 item to matcher and to the value.
9596 * @param[in, out] matcher
9598 * @param[in, out] key
9599 * Flow matcher value.
9601 * Flow pattern to translate.
9603 * Item is inner pattern.
9606 flow_dv_translate_item_icmp6(void *matcher, void *key,
9607 const struct rte_flow_item *item,
9610 const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9611 const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9614 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9616 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9618 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9620 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9622 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9624 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9626 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9627 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9631 icmp6_m = &rte_flow_item_icmp6_mask;
9632 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9633 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9634 icmp6_v->type & icmp6_m->type);
9635 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9636 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9637 icmp6_v->code & icmp6_m->code);
9641 * Add ICMP item to matcher and to the value.
9643 * @param[in, out] matcher
9645 * @param[in, out] key
9646 * Flow matcher value.
9648 * Flow pattern to translate.
9650 * Item is inner pattern.
9653 flow_dv_translate_item_icmp(void *matcher, void *key,
9654 const struct rte_flow_item *item,
9657 const struct rte_flow_item_icmp *icmp_m = item->mask;
9658 const struct rte_flow_item_icmp *icmp_v = item->spec;
9659 uint32_t icmp_header_data_m = 0;
9660 uint32_t icmp_header_data_v = 0;
9663 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9665 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9667 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9669 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9671 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9673 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9675 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9676 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9680 icmp_m = &rte_flow_item_icmp_mask;
9681 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9682 icmp_m->hdr.icmp_type);
9683 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9684 icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9685 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9686 icmp_m->hdr.icmp_code);
9687 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9688 icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9689 icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9690 icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9691 if (icmp_header_data_m) {
9692 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9693 icmp_header_data_v |=
9694 rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9695 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9696 icmp_header_data_m);
9697 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9698 icmp_header_data_v & icmp_header_data_m);
9703 * Add GTP item to matcher and to the value.
9705 * @param[in, out] matcher
9707 * @param[in, out] key
9708 * Flow matcher value.
9710 * Flow pattern to translate.
9712 * Item is inner pattern.
9715 flow_dv_translate_item_gtp(void *matcher, void *key,
9716 const struct rte_flow_item *item, int inner)
9718 const struct rte_flow_item_gtp *gtp_m = item->mask;
9719 const struct rte_flow_item_gtp *gtp_v = item->spec;
9722 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9724 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9725 uint16_t dport = RTE_GTPU_UDP_PORT;
9728 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9730 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9732 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9734 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9736 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9737 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9738 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9743 gtp_m = &rte_flow_item_gtp_mask;
9744 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9745 gtp_m->v_pt_rsv_flags);
9746 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9747 gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9748 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9749 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9750 gtp_v->msg_type & gtp_m->msg_type);
9751 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9752 rte_be_to_cpu_32(gtp_m->teid));
9753 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9754 rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9758 * Add GTP PSC item to matcher.
9760 * @param[in, out] matcher
9762 * @param[in, out] key
9763 * Flow matcher value.
9765 * Flow pattern to translate.
9768 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9769 const struct rte_flow_item *item)
9771 const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9772 const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9773 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9775 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9781 uint8_t next_ext_header_type;
9786 /* Always set E-flag match on one, regardless of GTP item settings. */
9787 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9788 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9789 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9790 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9791 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9792 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9793 /*Set next extension header type. */
9796 dw_2.next_ext_header_type = 0xff;
9797 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9798 rte_cpu_to_be_32(dw_2.w32));
9801 dw_2.next_ext_header_type = 0x85;
9802 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9803 rte_cpu_to_be_32(dw_2.w32));
9815 /*Set extension header PDU type and Qos. */
9817 gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9819 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->hdr.type);
9820 dw_0.qfi = gtp_psc_m->hdr.qfi;
9821 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9822 rte_cpu_to_be_32(dw_0.w32));
9824 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->hdr.type &
9825 gtp_psc_m->hdr.type);
9826 dw_0.qfi = gtp_psc_v->hdr.qfi & gtp_psc_m->hdr.qfi;
9827 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9828 rte_cpu_to_be_32(dw_0.w32));
9834 * Add eCPRI item to matcher and to the value.
9837 * The devich to configure through.
9838 * @param[in, out] matcher
9840 * @param[in, out] key
9841 * Flow matcher value.
9843 * Flow pattern to translate.
9844 * @param[in] last_item
9848 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9849 void *key, const struct rte_flow_item *item,
9852 struct mlx5_priv *priv = dev->data->dev_private;
9853 const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9854 const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9855 struct rte_ecpri_common_hdr common;
9856 void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9858 void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9864 * In case of eCPRI over Ethernet, if EtherType is not specified,
9865 * match on eCPRI EtherType implicitly.
9867 if (last_item & MLX5_FLOW_LAYER_OUTER_L2) {
9868 void *hdrs_m, *hdrs_v, *l2m, *l2v;
9870 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9871 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9872 l2m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, ethertype);
9873 l2v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
9874 if (*(uint16_t *)l2m == 0 && *(uint16_t *)l2v == 0) {
9875 *(uint16_t *)l2m = UINT16_MAX;
9876 *(uint16_t *)l2v = RTE_BE16(RTE_ETHER_TYPE_ECPRI);
9882 ecpri_m = &rte_flow_item_ecpri_mask;
9884 * Maximal four DW samples are supported in a single matching now.
9885 * Two are used now for a eCPRI matching:
9886 * 1. Type: one byte, mask should be 0x00ff0000 in network order
9887 * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
9890 if (!ecpri_m->hdr.common.u32)
9892 samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
9893 /* Need to take the whole DW as the mask to fill the entry. */
9894 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9895 prog_sample_field_value_0);
9896 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9897 prog_sample_field_value_0);
9898 /* Already big endian (network order) in the header. */
9899 *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
9900 *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
9901 /* Sample#0, used for matching type, offset 0. */
9902 MLX5_SET(fte_match_set_misc4, misc4_m,
9903 prog_sample_field_id_0, samples[0]);
9904 /* It makes no sense to set the sample ID in the mask field. */
9905 MLX5_SET(fte_match_set_misc4, misc4_v,
9906 prog_sample_field_id_0, samples[0]);
9908 * Checking if message body part needs to be matched.
9909 * Some wildcard rules only matching type field should be supported.
9911 if (ecpri_m->hdr.dummy[0]) {
9912 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
9913 switch (common.type) {
9914 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
9915 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
9916 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
9917 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9918 prog_sample_field_value_1);
9919 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9920 prog_sample_field_value_1);
9921 *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
9922 *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
9923 ecpri_m->hdr.dummy[0];
9924 /* Sample#1, to match message body, offset 4. */
9925 MLX5_SET(fte_match_set_misc4, misc4_m,
9926 prog_sample_field_id_1, samples[1]);
9927 MLX5_SET(fte_match_set_misc4, misc4_v,
9928 prog_sample_field_id_1, samples[1]);
9931 /* Others, do not match any sample ID. */
9938 * Add connection tracking status item to matcher
9941 * The devich to configure through.
9942 * @param[in, out] matcher
9944 * @param[in, out] key
9945 * Flow matcher value.
9947 * Flow pattern to translate.
9950 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
9951 void *matcher, void *key,
9952 const struct rte_flow_item *item)
9954 uint32_t reg_value = 0;
9956 /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
9957 uint32_t reg_mask = 0;
9958 const struct rte_flow_item_conntrack *spec = item->spec;
9959 const struct rte_flow_item_conntrack *mask = item->mask;
9961 struct rte_flow_error error;
9964 mask = &rte_flow_item_conntrack_mask;
9965 if (!spec || !mask->flags)
9967 flags = spec->flags & mask->flags;
9968 /* The conflict should be checked in the validation. */
9969 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
9970 reg_value |= MLX5_CT_SYNDROME_VALID;
9971 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
9972 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
9973 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
9974 reg_value |= MLX5_CT_SYNDROME_INVALID;
9975 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
9976 reg_value |= MLX5_CT_SYNDROME_TRAP;
9977 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
9978 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
9979 if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
9980 RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
9981 RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
9983 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
9984 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
9985 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
9986 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
9987 /* The REG_C_x value could be saved during startup. */
9988 reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
9989 if (reg_id == REG_NON)
9991 flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
9992 reg_value, reg_mask);
9995 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
9997 #define HEADER_IS_ZERO(match_criteria, headers) \
9998 !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers), \
9999 matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10002 * Calculate flow matcher enable bitmap.
10004 * @param match_criteria
10005 * Pointer to flow matcher criteria.
10008 * Bitmap of enabled fields.
10011 flow_dv_matcher_enable(uint32_t *match_criteria)
10013 uint8_t match_criteria_enable;
10015 match_criteria_enable =
10016 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10017 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10018 match_criteria_enable |=
10019 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10020 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10021 match_criteria_enable |=
10022 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10023 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10024 match_criteria_enable |=
10025 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10026 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10027 match_criteria_enable |=
10028 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10029 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10030 match_criteria_enable |=
10031 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10032 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10033 match_criteria_enable |=
10034 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10035 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10036 return match_criteria_enable;
10040 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10043 * Check flow matching criteria first, subtract misc5/4 length if flow
10044 * doesn't own misc5/4 parameters. In some old rdma-core releases,
10045 * misc5/4 are not supported, and matcher creation failure is expected
10046 * w/o subtration. If misc5 is provided, misc4 must be counted in since
10047 * misc5 is right after misc4.
10049 if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10050 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10051 MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10052 if (!(match_criteria & (1 <<
10053 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10054 *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10059 static struct mlx5_list_entry *
10060 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10061 struct mlx5_list_entry *entry, void *cb_ctx)
10063 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10064 struct mlx5_flow_dv_matcher *ref = ctx->data;
10065 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10066 typeof(*tbl), tbl);
10067 struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10072 rte_flow_error_set(ctx->error, ENOMEM,
10073 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10074 "cannot create matcher");
10077 memcpy(resource, entry, sizeof(*resource));
10078 resource->tbl = &tbl->tbl;
10079 return &resource->entry;
10083 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10084 struct mlx5_list_entry *entry)
10089 struct mlx5_list_entry *
10090 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10092 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10093 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10094 struct rte_eth_dev *dev = ctx->dev;
10095 struct mlx5_flow_tbl_data_entry *tbl_data;
10096 struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10097 struct rte_flow_error *error = ctx->error;
10098 union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10099 struct mlx5_flow_tbl_resource *tbl;
10104 tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10106 rte_flow_error_set(error, ENOMEM,
10107 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10109 "cannot allocate flow table data entry");
10112 tbl_data->idx = idx;
10113 tbl_data->tunnel = tt_prm->tunnel;
10114 tbl_data->group_id = tt_prm->group_id;
10115 tbl_data->external = !!tt_prm->external;
10116 tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10117 tbl_data->is_egress = !!key.is_egress;
10118 tbl_data->is_transfer = !!key.is_fdb;
10119 tbl_data->dummy = !!key.dummy;
10120 tbl_data->level = key.level;
10121 tbl_data->id = key.id;
10122 tbl = &tbl_data->tbl;
10124 return &tbl_data->entry;
10126 domain = sh->fdb_domain;
10127 else if (key.is_egress)
10128 domain = sh->tx_domain;
10130 domain = sh->rx_domain;
10131 ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10133 rte_flow_error_set(error, ENOMEM,
10134 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10135 NULL, "cannot create flow table object");
10136 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10139 if (key.level != 0) {
10140 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10141 (tbl->obj, &tbl_data->jump.action);
10143 rte_flow_error_set(error, ENOMEM,
10144 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10146 "cannot create flow jump action");
10147 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10148 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10152 MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10153 key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10154 key.level, key.id);
10155 tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10156 flow_dv_matcher_create_cb,
10157 flow_dv_matcher_match_cb,
10158 flow_dv_matcher_remove_cb,
10159 flow_dv_matcher_clone_cb,
10160 flow_dv_matcher_clone_free_cb);
10161 if (!tbl_data->matchers) {
10162 rte_flow_error_set(error, ENOMEM,
10163 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10165 "cannot create tbl matcher list");
10166 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10167 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10168 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10171 return &tbl_data->entry;
10175 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10178 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10179 struct mlx5_flow_tbl_data_entry *tbl_data =
10180 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10181 union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10183 return tbl_data->level != key.level ||
10184 tbl_data->id != key.id ||
10185 tbl_data->dummy != key.dummy ||
10186 tbl_data->is_transfer != !!key.is_fdb ||
10187 tbl_data->is_egress != !!key.is_egress;
10190 struct mlx5_list_entry *
10191 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10194 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10195 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10196 struct mlx5_flow_tbl_data_entry *tbl_data;
10197 struct rte_flow_error *error = ctx->error;
10200 tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10202 rte_flow_error_set(error, ENOMEM,
10203 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10205 "cannot allocate flow table data entry");
10208 memcpy(tbl_data, oentry, sizeof(*tbl_data));
10209 tbl_data->idx = idx;
10210 return &tbl_data->entry;
10214 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10216 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10217 struct mlx5_flow_tbl_data_entry *tbl_data =
10218 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10220 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10224 * Get a flow table.
10226 * @param[in, out] dev
10227 * Pointer to rte_eth_dev structure.
10228 * @param[in] table_level
10229 * Table level to use.
10230 * @param[in] egress
10231 * Direction of the table.
10232 * @param[in] transfer
10233 * E-Switch or NIC flow.
10235 * Dummy entry for dv API.
10236 * @param[in] table_id
10238 * @param[out] error
10239 * pointer to error structure.
10242 * Returns tables resource based on the index, NULL in case of failed.
10244 struct mlx5_flow_tbl_resource *
10245 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10246 uint32_t table_level, uint8_t egress,
10249 const struct mlx5_flow_tunnel *tunnel,
10250 uint32_t group_id, uint8_t dummy,
10252 struct rte_flow_error *error)
10254 struct mlx5_priv *priv = dev->data->dev_private;
10255 union mlx5_flow_tbl_key table_key = {
10257 .level = table_level,
10261 .is_fdb = !!transfer,
10262 .is_egress = !!egress,
10265 struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10267 .group_id = group_id,
10268 .external = external,
10270 struct mlx5_flow_cb_ctx ctx = {
10273 .data = &table_key.v64,
10276 struct mlx5_list_entry *entry;
10277 struct mlx5_flow_tbl_data_entry *tbl_data;
10279 entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10281 rte_flow_error_set(error, ENOMEM,
10282 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10283 "cannot get table");
10286 DRV_LOG(DEBUG, "table_level %u table_id %u "
10287 "tunnel %u group %u registered.",
10288 table_level, table_id,
10289 tunnel ? tunnel->tunnel_id : 0, group_id);
10290 tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10291 return &tbl_data->tbl;
10295 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10297 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10298 struct mlx5_flow_tbl_data_entry *tbl_data =
10299 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10301 MLX5_ASSERT(entry && sh);
10302 if (tbl_data->jump.action)
10303 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10304 if (tbl_data->tbl.obj)
10305 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10306 if (tbl_data->tunnel_offload && tbl_data->external) {
10307 struct mlx5_list_entry *he;
10308 struct mlx5_hlist *tunnel_grp_hash;
10309 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10310 union tunnel_tbl_key tunnel_key = {
10311 .tunnel_id = tbl_data->tunnel ?
10312 tbl_data->tunnel->tunnel_id : 0,
10313 .group = tbl_data->group_id
10315 uint32_t table_level = tbl_data->level;
10316 struct mlx5_flow_cb_ctx ctx = {
10317 .data = (void *)&tunnel_key.val,
10320 tunnel_grp_hash = tbl_data->tunnel ?
10321 tbl_data->tunnel->groups :
10323 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10325 mlx5_hlist_unregister(tunnel_grp_hash, he);
10327 "table_level %u id %u tunnel %u group %u released.",
10331 tbl_data->tunnel->tunnel_id : 0,
10332 tbl_data->group_id);
10334 mlx5_list_destroy(tbl_data->matchers);
10335 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10339 * Release a flow table.
10342 * Pointer to device shared structure.
10344 * Table resource to be released.
10347 * Returns 0 if table was released, else return 1;
10350 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10351 struct mlx5_flow_tbl_resource *tbl)
10353 struct mlx5_flow_tbl_data_entry *tbl_data =
10354 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10358 return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10362 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10363 struct mlx5_list_entry *entry, void *cb_ctx)
10365 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10366 struct mlx5_flow_dv_matcher *ref = ctx->data;
10367 struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10370 return cur->crc != ref->crc ||
10371 cur->priority != ref->priority ||
10372 memcmp((const void *)cur->mask.buf,
10373 (const void *)ref->mask.buf, ref->mask.size);
10376 struct mlx5_list_entry *
10377 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10379 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10380 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10381 struct mlx5_flow_dv_matcher *ref = ctx->data;
10382 struct mlx5_flow_dv_matcher *resource;
10383 struct mlx5dv_flow_matcher_attr dv_attr = {
10384 .type = IBV_FLOW_ATTR_NORMAL,
10385 .match_mask = (void *)&ref->mask,
10387 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10388 typeof(*tbl), tbl);
10391 resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10394 rte_flow_error_set(ctx->error, ENOMEM,
10395 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10396 "cannot create matcher");
10400 dv_attr.match_criteria_enable =
10401 flow_dv_matcher_enable(resource->mask.buf);
10402 __flow_dv_adjust_buf_size(&ref->mask.size,
10403 dv_attr.match_criteria_enable);
10404 dv_attr.priority = ref->priority;
10405 if (tbl->is_egress)
10406 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10407 ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
10409 &resource->matcher_object);
10411 mlx5_free(resource);
10412 rte_flow_error_set(ctx->error, ENOMEM,
10413 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10414 "cannot create matcher");
10417 return &resource->entry;
10421 * Register the flow matcher.
10423 * @param[in, out] dev
10424 * Pointer to rte_eth_dev structure.
10425 * @param[in, out] matcher
10426 * Pointer to flow matcher.
10427 * @param[in, out] key
10428 * Pointer to flow table key.
10429 * @parm[in, out] dev_flow
10430 * Pointer to the dev_flow.
10431 * @param[out] error
10432 * pointer to error structure.
10435 * 0 on success otherwise -errno and errno is set.
10438 flow_dv_matcher_register(struct rte_eth_dev *dev,
10439 struct mlx5_flow_dv_matcher *ref,
10440 union mlx5_flow_tbl_key *key,
10441 struct mlx5_flow *dev_flow,
10442 const struct mlx5_flow_tunnel *tunnel,
10444 struct rte_flow_error *error)
10446 struct mlx5_list_entry *entry;
10447 struct mlx5_flow_dv_matcher *resource;
10448 struct mlx5_flow_tbl_resource *tbl;
10449 struct mlx5_flow_tbl_data_entry *tbl_data;
10450 struct mlx5_flow_cb_ctx ctx = {
10455 * tunnel offload API requires this registration for cases when
10456 * tunnel match rule was inserted before tunnel set rule.
10458 tbl = flow_dv_tbl_resource_get(dev, key->level,
10459 key->is_egress, key->is_fdb,
10460 dev_flow->external, tunnel,
10461 group_id, 0, key->id, error);
10463 return -rte_errno; /* No need to refill the error info */
10464 tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10466 entry = mlx5_list_register(tbl_data->matchers, &ctx);
10468 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10469 return rte_flow_error_set(error, ENOMEM,
10470 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10471 "cannot allocate ref memory");
10473 resource = container_of(entry, typeof(*resource), entry);
10474 dev_flow->handle->dvh.matcher = resource;
10478 struct mlx5_list_entry *
10479 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10481 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10482 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10483 struct mlx5_flow_dv_tag_resource *entry;
10487 entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10489 rte_flow_error_set(ctx->error, ENOMEM,
10490 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10491 "cannot allocate resource memory");
10495 entry->tag_id = *(uint32_t *)(ctx->data);
10496 ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10499 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10500 rte_flow_error_set(ctx->error, ENOMEM,
10501 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10502 NULL, "cannot create action");
10505 return &entry->entry;
10509 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10512 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10513 struct mlx5_flow_dv_tag_resource *tag =
10514 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10516 return *(uint32_t *)(ctx->data) != tag->tag_id;
10519 struct mlx5_list_entry *
10520 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10523 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10524 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10525 struct mlx5_flow_dv_tag_resource *entry;
10528 entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10530 rte_flow_error_set(ctx->error, ENOMEM,
10531 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10532 "cannot allocate tag resource memory");
10535 memcpy(entry, oentry, sizeof(*entry));
10537 return &entry->entry;
10541 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10543 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10544 struct mlx5_flow_dv_tag_resource *tag =
10545 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10547 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10551 * Find existing tag resource or create and register a new one.
10553 * @param dev[in, out]
10554 * Pointer to rte_eth_dev structure.
10555 * @param[in, out] tag_be24
10556 * Tag value in big endian then R-shift 8.
10557 * @parm[in, out] dev_flow
10558 * Pointer to the dev_flow.
10559 * @param[out] error
10560 * pointer to error structure.
10563 * 0 on success otherwise -errno and errno is set.
10566 flow_dv_tag_resource_register
10567 (struct rte_eth_dev *dev,
10569 struct mlx5_flow *dev_flow,
10570 struct rte_flow_error *error)
10572 struct mlx5_priv *priv = dev->data->dev_private;
10573 struct mlx5_flow_dv_tag_resource *resource;
10574 struct mlx5_list_entry *entry;
10575 struct mlx5_flow_cb_ctx ctx = {
10579 struct mlx5_hlist *tag_table;
10581 tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10583 MLX5_TAGS_HLIST_ARRAY_SIZE,
10584 false, false, priv->sh,
10585 flow_dv_tag_create_cb,
10586 flow_dv_tag_match_cb,
10587 flow_dv_tag_remove_cb,
10588 flow_dv_tag_clone_cb,
10589 flow_dv_tag_clone_free_cb);
10590 if (unlikely(!tag_table))
10592 entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10594 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10596 dev_flow->handle->dvh.rix_tag = resource->idx;
10597 dev_flow->dv.tag_resource = resource;
10604 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10606 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10607 struct mlx5_flow_dv_tag_resource *tag =
10608 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10610 MLX5_ASSERT(tag && sh && tag->action);
10611 claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10612 DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10613 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10620 * Pointer to Ethernet device.
10625 * 1 while a reference on it exists, 0 when freed.
10628 flow_dv_tag_release(struct rte_eth_dev *dev,
10631 struct mlx5_priv *priv = dev->data->dev_private;
10632 struct mlx5_flow_dv_tag_resource *tag;
10634 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10637 DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10638 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10639 return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10643 * Translate action PORT_ID / REPRESENTED_PORT to vport.
10646 * Pointer to rte_eth_dev structure.
10647 * @param[in] action
10648 * Pointer to action PORT_ID / REPRESENTED_PORT.
10649 * @param[out] dst_port_id
10650 * The target port ID.
10651 * @param[out] error
10652 * Pointer to the error structure.
10655 * 0 on success, a negative errno value otherwise and rte_errno is set.
10658 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10659 const struct rte_flow_action *action,
10660 uint32_t *dst_port_id,
10661 struct rte_flow_error *error)
10664 struct mlx5_priv *priv;
10666 switch (action->type) {
10667 case RTE_FLOW_ACTION_TYPE_PORT_ID: {
10668 const struct rte_flow_action_port_id *conf;
10670 conf = (const struct rte_flow_action_port_id *)action->conf;
10671 port = conf->original ? dev->data->port_id : conf->id;
10674 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: {
10675 const struct rte_flow_action_ethdev *ethdev;
10677 ethdev = (const struct rte_flow_action_ethdev *)action->conf;
10678 port = ethdev->port_id;
10682 MLX5_ASSERT(false);
10683 return rte_flow_error_set(error, EINVAL,
10684 RTE_FLOW_ERROR_TYPE_ACTION, action,
10685 "unknown E-Switch action");
10688 priv = mlx5_port_to_eswitch_info(port, false);
10690 return rte_flow_error_set(error, -rte_errno,
10691 RTE_FLOW_ERROR_TYPE_ACTION,
10693 "No eswitch info was found for port");
10694 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10696 * This parameter is transferred to
10697 * mlx5dv_dr_action_create_dest_ib_port().
10699 *dst_port_id = priv->dev_port;
10702 * Legacy mode, no LAG configurations is supported.
10703 * This parameter is transferred to
10704 * mlx5dv_dr_action_create_dest_vport().
10706 *dst_port_id = priv->vport_id;
10712 * Create a counter with aging configuration.
10715 * Pointer to rte_eth_dev structure.
10716 * @param[in] dev_flow
10717 * Pointer to the mlx5_flow.
10718 * @param[out] count
10719 * Pointer to the counter action configuration.
10721 * Pointer to the aging action configuration.
10724 * Index to flow counter on success, 0 otherwise.
10727 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10728 struct mlx5_flow *dev_flow,
10729 const struct rte_flow_action_count *count
10731 const struct rte_flow_action_age *age)
10734 struct mlx5_age_param *age_param;
10736 counter = flow_dv_counter_alloc(dev, !!age);
10737 if (!counter || age == NULL)
10739 age_param = flow_dv_counter_idx_get_age(dev, counter);
10740 age_param->context = age->context ? age->context :
10741 (void *)(uintptr_t)(dev_flow->flow_idx);
10742 age_param->timeout = age->timeout;
10743 age_param->port_id = dev->data->port_id;
10744 __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10745 __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10750 * Add Tx queue matcher
10753 * Pointer to the dev struct.
10754 * @param[in, out] matcher
10756 * @param[in, out] key
10757 * Flow matcher value.
10759 * Flow pattern to translate.
10761 * Item is inner pattern.
10764 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10765 void *matcher, void *key,
10766 const struct rte_flow_item *item)
10768 const struct mlx5_rte_flow_item_tx_queue *queue_m;
10769 const struct mlx5_rte_flow_item_tx_queue *queue_v;
10771 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10773 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10774 struct mlx5_txq_ctrl *txq;
10775 uint32_t queue, mask;
10777 queue_m = (const void *)item->mask;
10778 queue_v = (const void *)item->spec;
10781 txq = mlx5_txq_get(dev, queue_v->queue);
10784 if (txq->type == MLX5_TXQ_TYPE_HAIRPIN)
10785 queue = txq->obj->sq->id;
10787 queue = txq->obj->sq_obj.sq->id;
10788 mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
10789 MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
10790 MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
10791 mlx5_txq_release(dev, queue_v->queue);
10795 * Set the hash fields according to the @p flow information.
10797 * @param[in] dev_flow
10798 * Pointer to the mlx5_flow.
10799 * @param[in] rss_desc
10800 * Pointer to the mlx5_flow_rss_desc.
10803 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10804 struct mlx5_flow_rss_desc *rss_desc)
10806 uint64_t items = dev_flow->handle->layers;
10808 uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10810 dev_flow->hash_fields = 0;
10811 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10812 if (rss_desc->level >= 2)
10815 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10816 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10817 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10818 if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
10819 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10820 else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
10821 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10823 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10825 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10826 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10827 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10828 if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
10829 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10830 else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
10831 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10833 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10836 if (dev_flow->hash_fields == 0)
10838 * There is no match between the RSS types and the
10839 * L3 protocol (IPv4/IPv6) defined in the flow rule.
10842 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10843 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10844 if (rss_types & RTE_ETH_RSS_UDP) {
10845 if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
10846 dev_flow->hash_fields |=
10847 IBV_RX_HASH_SRC_PORT_UDP;
10848 else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
10849 dev_flow->hash_fields |=
10850 IBV_RX_HASH_DST_PORT_UDP;
10852 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10854 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10855 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10856 if (rss_types & RTE_ETH_RSS_TCP) {
10857 if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
10858 dev_flow->hash_fields |=
10859 IBV_RX_HASH_SRC_PORT_TCP;
10860 else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
10861 dev_flow->hash_fields |=
10862 IBV_RX_HASH_DST_PORT_TCP;
10864 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10868 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10872 * Prepare an Rx Hash queue.
10875 * Pointer to Ethernet device.
10876 * @param[in] dev_flow
10877 * Pointer to the mlx5_flow.
10878 * @param[in] rss_desc
10879 * Pointer to the mlx5_flow_rss_desc.
10880 * @param[out] hrxq_idx
10881 * Hash Rx queue index.
10884 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10886 static struct mlx5_hrxq *
10887 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
10888 struct mlx5_flow *dev_flow,
10889 struct mlx5_flow_rss_desc *rss_desc,
10890 uint32_t *hrxq_idx)
10892 struct mlx5_priv *priv = dev->data->dev_private;
10893 struct mlx5_flow_handle *dh = dev_flow->handle;
10894 struct mlx5_hrxq *hrxq;
10896 MLX5_ASSERT(rss_desc->queue_num);
10897 rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
10898 rss_desc->hash_fields = dev_flow->hash_fields;
10899 rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
10900 rss_desc->shared_rss = 0;
10901 if (rss_desc->hash_fields == 0)
10902 rss_desc->queue_num = 1;
10903 *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
10906 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10912 * Release sample sub action resource.
10914 * @param[in, out] dev
10915 * Pointer to rte_eth_dev structure.
10916 * @param[in] act_res
10917 * Pointer to sample sub action resource.
10920 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
10921 struct mlx5_flow_sub_actions_idx *act_res)
10923 if (act_res->rix_hrxq) {
10924 mlx5_hrxq_release(dev, act_res->rix_hrxq);
10925 act_res->rix_hrxq = 0;
10927 if (act_res->rix_encap_decap) {
10928 flow_dv_encap_decap_resource_release(dev,
10929 act_res->rix_encap_decap);
10930 act_res->rix_encap_decap = 0;
10932 if (act_res->rix_port_id_action) {
10933 flow_dv_port_id_action_resource_release(dev,
10934 act_res->rix_port_id_action);
10935 act_res->rix_port_id_action = 0;
10937 if (act_res->rix_tag) {
10938 flow_dv_tag_release(dev, act_res->rix_tag);
10939 act_res->rix_tag = 0;
10941 if (act_res->rix_jump) {
10942 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
10943 act_res->rix_jump = 0;
10948 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
10949 struct mlx5_list_entry *entry, void *cb_ctx)
10951 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10952 struct rte_eth_dev *dev = ctx->dev;
10953 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
10954 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
10958 if (ctx_resource->ratio == resource->ratio &&
10959 ctx_resource->ft_type == resource->ft_type &&
10960 ctx_resource->ft_id == resource->ft_id &&
10961 ctx_resource->set_action == resource->set_action &&
10962 !memcmp((void *)&ctx_resource->sample_act,
10963 (void *)&resource->sample_act,
10964 sizeof(struct mlx5_flow_sub_actions_list))) {
10966 * Existing sample action should release the prepared
10967 * sub-actions reference counter.
10969 flow_dv_sample_sub_actions_release(dev,
10970 &ctx_resource->sample_idx);
10976 struct mlx5_list_entry *
10977 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
10979 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10980 struct rte_eth_dev *dev = ctx->dev;
10981 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
10982 void **sample_dv_actions = ctx_resource->sub_actions;
10983 struct mlx5_flow_dv_sample_resource *resource;
10984 struct mlx5dv_dr_flow_sampler_attr sampler_attr;
10985 struct mlx5_priv *priv = dev->data->dev_private;
10986 struct mlx5_dev_ctx_shared *sh = priv->sh;
10987 struct mlx5_flow_tbl_resource *tbl;
10989 const uint32_t next_ft_step = 1;
10990 uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
10991 uint8_t is_egress = 0;
10992 uint8_t is_transfer = 0;
10993 struct rte_flow_error *error = ctx->error;
10995 /* Register new sample resource. */
10996 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
10998 rte_flow_error_set(error, ENOMEM,
10999 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11001 "cannot allocate resource memory");
11004 *resource = *ctx_resource;
11005 /* Create normal path table level */
11006 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11008 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11010 tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11011 is_egress, is_transfer,
11012 true, NULL, 0, 0, 0, error);
11014 rte_flow_error_set(error, ENOMEM,
11015 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11017 "fail to create normal path table "
11021 resource->normal_path_tbl = tbl;
11022 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11023 if (!sh->default_miss_action) {
11024 rte_flow_error_set(error, ENOMEM,
11025 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11027 "default miss action was not "
11031 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11032 sh->default_miss_action;
11034 /* Create a DR sample action */
11035 sampler_attr.sample_ratio = resource->ratio;
11036 sampler_attr.default_next_table = tbl->obj;
11037 sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11038 sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11039 &sample_dv_actions[0];
11040 sampler_attr.action = resource->set_action;
11041 if (mlx5_os_flow_dr_create_flow_action_sampler
11042 (&sampler_attr, &resource->verbs_action)) {
11043 rte_flow_error_set(error, ENOMEM,
11044 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11045 NULL, "cannot create sample action");
11048 resource->idx = idx;
11049 resource->dev = dev;
11050 return &resource->entry;
11052 if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11053 flow_dv_sample_sub_actions_release(dev,
11054 &resource->sample_idx);
11055 if (resource->normal_path_tbl)
11056 flow_dv_tbl_resource_release(MLX5_SH(dev),
11057 resource->normal_path_tbl);
11058 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11063 struct mlx5_list_entry *
11064 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11065 struct mlx5_list_entry *entry __rte_unused,
11068 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11069 struct rte_eth_dev *dev = ctx->dev;
11070 struct mlx5_flow_dv_sample_resource *resource;
11071 struct mlx5_priv *priv = dev->data->dev_private;
11072 struct mlx5_dev_ctx_shared *sh = priv->sh;
11075 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11077 rte_flow_error_set(ctx->error, ENOMEM,
11078 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11080 "cannot allocate resource memory");
11083 memcpy(resource, entry, sizeof(*resource));
11084 resource->idx = idx;
11085 resource->dev = dev;
11086 return &resource->entry;
11090 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11091 struct mlx5_list_entry *entry)
11093 struct mlx5_flow_dv_sample_resource *resource =
11094 container_of(entry, typeof(*resource), entry);
11095 struct rte_eth_dev *dev = resource->dev;
11096 struct mlx5_priv *priv = dev->data->dev_private;
11098 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11102 * Find existing sample resource or create and register a new one.
11104 * @param[in, out] dev
11105 * Pointer to rte_eth_dev structure.
11107 * Pointer to sample resource reference.
11108 * @parm[in, out] dev_flow
11109 * Pointer to the dev_flow.
11110 * @param[out] error
11111 * pointer to error structure.
11114 * 0 on success otherwise -errno and errno is set.
11117 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11118 struct mlx5_flow_dv_sample_resource *ref,
11119 struct mlx5_flow *dev_flow,
11120 struct rte_flow_error *error)
11122 struct mlx5_flow_dv_sample_resource *resource;
11123 struct mlx5_list_entry *entry;
11124 struct mlx5_priv *priv = dev->data->dev_private;
11125 struct mlx5_flow_cb_ctx ctx = {
11131 entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11134 resource = container_of(entry, typeof(*resource), entry);
11135 dev_flow->handle->dvh.rix_sample = resource->idx;
11136 dev_flow->dv.sample_res = resource;
11141 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11142 struct mlx5_list_entry *entry, void *cb_ctx)
11144 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11145 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11146 struct rte_eth_dev *dev = ctx->dev;
11147 struct mlx5_flow_dv_dest_array_resource *resource =
11148 container_of(entry, typeof(*resource), entry);
11151 if (ctx_resource->num_of_dest == resource->num_of_dest &&
11152 ctx_resource->ft_type == resource->ft_type &&
11153 !memcmp((void *)resource->sample_act,
11154 (void *)ctx_resource->sample_act,
11155 (ctx_resource->num_of_dest *
11156 sizeof(struct mlx5_flow_sub_actions_list)))) {
11158 * Existing sample action should release the prepared
11159 * sub-actions reference counter.
11161 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11162 flow_dv_sample_sub_actions_release(dev,
11163 &ctx_resource->sample_idx[idx]);
11169 struct mlx5_list_entry *
11170 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11172 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11173 struct rte_eth_dev *dev = ctx->dev;
11174 struct mlx5_flow_dv_dest_array_resource *resource;
11175 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11176 struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11177 struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11178 struct mlx5_priv *priv = dev->data->dev_private;
11179 struct mlx5_dev_ctx_shared *sh = priv->sh;
11180 struct mlx5_flow_sub_actions_list *sample_act;
11181 struct mlx5dv_dr_domain *domain;
11182 uint32_t idx = 0, res_idx = 0;
11183 struct rte_flow_error *error = ctx->error;
11184 uint64_t action_flags;
11187 /* Register new destination array resource. */
11188 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11191 rte_flow_error_set(error, ENOMEM,
11192 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11194 "cannot allocate resource memory");
11197 *resource = *ctx_resource;
11198 if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11199 domain = sh->fdb_domain;
11200 else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11201 domain = sh->rx_domain;
11203 domain = sh->tx_domain;
11204 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11205 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11206 mlx5_malloc(MLX5_MEM_ZERO,
11207 sizeof(struct mlx5dv_dr_action_dest_attr),
11209 if (!dest_attr[idx]) {
11210 rte_flow_error_set(error, ENOMEM,
11211 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11213 "cannot allocate resource memory");
11216 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11217 sample_act = &ctx_resource->sample_act[idx];
11218 action_flags = sample_act->action_flags;
11219 switch (action_flags) {
11220 case MLX5_FLOW_ACTION_QUEUE:
11221 dest_attr[idx]->dest = sample_act->dr_queue_action;
11223 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11224 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11225 dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11226 dest_attr[idx]->dest_reformat->reformat =
11227 sample_act->dr_encap_action;
11228 dest_attr[idx]->dest_reformat->dest =
11229 sample_act->dr_port_id_action;
11231 case MLX5_FLOW_ACTION_PORT_ID:
11232 dest_attr[idx]->dest = sample_act->dr_port_id_action;
11234 case MLX5_FLOW_ACTION_JUMP:
11235 dest_attr[idx]->dest = sample_act->dr_jump_action;
11238 rte_flow_error_set(error, EINVAL,
11239 RTE_FLOW_ERROR_TYPE_ACTION,
11241 "unsupported actions type");
11245 /* create a dest array actioin */
11246 ret = mlx5_os_flow_dr_create_flow_action_dest_array
11248 resource->num_of_dest,
11250 &resource->action);
11252 rte_flow_error_set(error, ENOMEM,
11253 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11255 "cannot create destination array action");
11258 resource->idx = res_idx;
11259 resource->dev = dev;
11260 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11261 mlx5_free(dest_attr[idx]);
11262 return &resource->entry;
11264 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11265 flow_dv_sample_sub_actions_release(dev,
11266 &resource->sample_idx[idx]);
11267 if (dest_attr[idx])
11268 mlx5_free(dest_attr[idx]);
11270 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11274 struct mlx5_list_entry *
11275 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11276 struct mlx5_list_entry *entry __rte_unused,
11279 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11280 struct rte_eth_dev *dev = ctx->dev;
11281 struct mlx5_flow_dv_dest_array_resource *resource;
11282 struct mlx5_priv *priv = dev->data->dev_private;
11283 struct mlx5_dev_ctx_shared *sh = priv->sh;
11284 uint32_t res_idx = 0;
11285 struct rte_flow_error *error = ctx->error;
11287 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11290 rte_flow_error_set(error, ENOMEM,
11291 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11293 "cannot allocate dest-array memory");
11296 memcpy(resource, entry, sizeof(*resource));
11297 resource->idx = res_idx;
11298 resource->dev = dev;
11299 return &resource->entry;
11303 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11304 struct mlx5_list_entry *entry)
11306 struct mlx5_flow_dv_dest_array_resource *resource =
11307 container_of(entry, typeof(*resource), entry);
11308 struct rte_eth_dev *dev = resource->dev;
11309 struct mlx5_priv *priv = dev->data->dev_private;
11311 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11315 * Find existing destination array resource or create and register a new one.
11317 * @param[in, out] dev
11318 * Pointer to rte_eth_dev structure.
11320 * Pointer to destination array resource reference.
11321 * @parm[in, out] dev_flow
11322 * Pointer to the dev_flow.
11323 * @param[out] error
11324 * pointer to error structure.
11327 * 0 on success otherwise -errno and errno is set.
11330 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11331 struct mlx5_flow_dv_dest_array_resource *ref,
11332 struct mlx5_flow *dev_flow,
11333 struct rte_flow_error *error)
11335 struct mlx5_flow_dv_dest_array_resource *resource;
11336 struct mlx5_priv *priv = dev->data->dev_private;
11337 struct mlx5_list_entry *entry;
11338 struct mlx5_flow_cb_ctx ctx = {
11344 entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11347 resource = container_of(entry, typeof(*resource), entry);
11348 dev_flow->handle->dvh.rix_dest_array = resource->idx;
11349 dev_flow->dv.dest_array_res = resource;
11354 * Convert Sample action to DV specification.
11357 * Pointer to rte_eth_dev structure.
11358 * @param[in] action
11359 * Pointer to sample action structure.
11360 * @param[in, out] dev_flow
11361 * Pointer to the mlx5_flow.
11363 * Pointer to the flow attributes.
11364 * @param[in, out] num_of_dest
11365 * Pointer to the num of destination.
11366 * @param[in, out] sample_actions
11367 * Pointer to sample actions list.
11368 * @param[in, out] res
11369 * Pointer to sample resource.
11370 * @param[out] error
11371 * Pointer to the error structure.
11374 * 0 on success, a negative errno value otherwise and rte_errno is set.
11377 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11378 const struct rte_flow_action_sample *action,
11379 struct mlx5_flow *dev_flow,
11380 const struct rte_flow_attr *attr,
11381 uint32_t *num_of_dest,
11382 void **sample_actions,
11383 struct mlx5_flow_dv_sample_resource *res,
11384 struct rte_flow_error *error)
11386 struct mlx5_priv *priv = dev->data->dev_private;
11387 const struct rte_flow_action *sub_actions;
11388 struct mlx5_flow_sub_actions_list *sample_act;
11389 struct mlx5_flow_sub_actions_idx *sample_idx;
11390 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11391 struct rte_flow *flow = dev_flow->flow;
11392 struct mlx5_flow_rss_desc *rss_desc;
11393 uint64_t action_flags = 0;
11396 rss_desc = &wks->rss_desc;
11397 sample_act = &res->sample_act;
11398 sample_idx = &res->sample_idx;
11399 res->ratio = action->ratio;
11400 sub_actions = action->actions;
11401 for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11402 int type = sub_actions->type;
11403 uint32_t pre_rix = 0;
11406 case RTE_FLOW_ACTION_TYPE_QUEUE:
11408 const struct rte_flow_action_queue *queue;
11409 struct mlx5_hrxq *hrxq;
11412 queue = sub_actions->conf;
11413 rss_desc->queue_num = 1;
11414 rss_desc->queue[0] = queue->index;
11415 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11416 rss_desc, &hrxq_idx);
11418 return rte_flow_error_set
11420 RTE_FLOW_ERROR_TYPE_ACTION,
11422 "cannot create fate queue");
11423 sample_act->dr_queue_action = hrxq->action;
11424 sample_idx->rix_hrxq = hrxq_idx;
11425 sample_actions[sample_act->actions_num++] =
11428 action_flags |= MLX5_FLOW_ACTION_QUEUE;
11429 if (action_flags & MLX5_FLOW_ACTION_MARK)
11430 dev_flow->handle->rix_hrxq = hrxq_idx;
11431 dev_flow->handle->fate_action =
11432 MLX5_FLOW_FATE_QUEUE;
11435 case RTE_FLOW_ACTION_TYPE_RSS:
11437 struct mlx5_hrxq *hrxq;
11439 const struct rte_flow_action_rss *rss;
11440 const uint8_t *rss_key;
11442 rss = sub_actions->conf;
11443 memcpy(rss_desc->queue, rss->queue,
11444 rss->queue_num * sizeof(uint16_t));
11445 rss_desc->queue_num = rss->queue_num;
11446 /* NULL RSS key indicates default RSS key. */
11447 rss_key = !rss->key ? rss_hash_default_key : rss->key;
11448 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11450 * rss->level and rss.types should be set in advance
11451 * when expanding items for RSS.
11453 flow_dv_hashfields_set(dev_flow, rss_desc);
11454 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11455 rss_desc, &hrxq_idx);
11457 return rte_flow_error_set
11459 RTE_FLOW_ERROR_TYPE_ACTION,
11461 "cannot create fate queue");
11462 sample_act->dr_queue_action = hrxq->action;
11463 sample_idx->rix_hrxq = hrxq_idx;
11464 sample_actions[sample_act->actions_num++] =
11467 action_flags |= MLX5_FLOW_ACTION_RSS;
11468 if (action_flags & MLX5_FLOW_ACTION_MARK)
11469 dev_flow->handle->rix_hrxq = hrxq_idx;
11470 dev_flow->handle->fate_action =
11471 MLX5_FLOW_FATE_QUEUE;
11474 case RTE_FLOW_ACTION_TYPE_MARK:
11476 uint32_t tag_be = mlx5_flow_mark_set
11477 (((const struct rte_flow_action_mark *)
11478 (sub_actions->conf))->id);
11480 dev_flow->handle->mark = 1;
11481 pre_rix = dev_flow->handle->dvh.rix_tag;
11482 /* Save the mark resource before sample */
11483 pre_r = dev_flow->dv.tag_resource;
11484 if (flow_dv_tag_resource_register(dev, tag_be,
11487 MLX5_ASSERT(dev_flow->dv.tag_resource);
11488 sample_act->dr_tag_action =
11489 dev_flow->dv.tag_resource->action;
11490 sample_idx->rix_tag =
11491 dev_flow->handle->dvh.rix_tag;
11492 sample_actions[sample_act->actions_num++] =
11493 sample_act->dr_tag_action;
11494 /* Recover the mark resource after sample */
11495 dev_flow->dv.tag_resource = pre_r;
11496 dev_flow->handle->dvh.rix_tag = pre_rix;
11497 action_flags |= MLX5_FLOW_ACTION_MARK;
11500 case RTE_FLOW_ACTION_TYPE_COUNT:
11502 if (!flow->counter) {
11504 flow_dv_translate_create_counter(dev,
11505 dev_flow, sub_actions->conf,
11507 if (!flow->counter)
11508 return rte_flow_error_set
11510 RTE_FLOW_ERROR_TYPE_ACTION,
11512 "cannot create counter"
11515 sample_act->dr_cnt_action =
11516 (flow_dv_counter_get_by_idx(dev,
11517 flow->counter, NULL))->action;
11518 sample_actions[sample_act->actions_num++] =
11519 sample_act->dr_cnt_action;
11520 action_flags |= MLX5_FLOW_ACTION_COUNT;
11523 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11524 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
11526 struct mlx5_flow_dv_port_id_action_resource
11528 uint32_t port_id = 0;
11530 memset(&port_id_resource, 0, sizeof(port_id_resource));
11531 /* Save the port id resource before sample */
11532 pre_rix = dev_flow->handle->rix_port_id_action;
11533 pre_r = dev_flow->dv.port_id_action;
11534 if (flow_dv_translate_action_port_id(dev, sub_actions,
11537 port_id_resource.port_id = port_id;
11538 if (flow_dv_port_id_action_resource_register
11539 (dev, &port_id_resource, dev_flow, error))
11541 sample_act->dr_port_id_action =
11542 dev_flow->dv.port_id_action->action;
11543 sample_idx->rix_port_id_action =
11544 dev_flow->handle->rix_port_id_action;
11545 sample_actions[sample_act->actions_num++] =
11546 sample_act->dr_port_id_action;
11547 /* Recover the port id resource after sample */
11548 dev_flow->dv.port_id_action = pre_r;
11549 dev_flow->handle->rix_port_id_action = pre_rix;
11551 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11554 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11555 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11556 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11557 /* Save the encap resource before sample */
11558 pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11559 pre_r = dev_flow->dv.encap_decap;
11560 if (flow_dv_create_action_l2_encap(dev, sub_actions,
11565 sample_act->dr_encap_action =
11566 dev_flow->dv.encap_decap->action;
11567 sample_idx->rix_encap_decap =
11568 dev_flow->handle->dvh.rix_encap_decap;
11569 sample_actions[sample_act->actions_num++] =
11570 sample_act->dr_encap_action;
11571 /* Recover the encap resource after sample */
11572 dev_flow->dv.encap_decap = pre_r;
11573 dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11574 action_flags |= MLX5_FLOW_ACTION_ENCAP;
11577 return rte_flow_error_set(error, EINVAL,
11578 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11580 "Not support for sampler action");
11583 sample_act->action_flags = action_flags;
11584 res->ft_id = dev_flow->dv.group;
11585 if (attr->transfer) {
11587 uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11588 uint64_t set_action;
11589 } action_ctx = { .set_action = 0 };
11591 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11592 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11593 MLX5_MODIFICATION_TYPE_SET);
11594 MLX5_SET(set_action_in, action_ctx.action_in, field,
11595 MLX5_MODI_META_REG_C_0);
11596 MLX5_SET(set_action_in, action_ctx.action_in, data,
11597 priv->vport_meta_tag);
11598 res->set_action = action_ctx.set_action;
11599 } else if (attr->ingress) {
11600 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11602 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11608 * Convert Sample action to DV specification.
11611 * Pointer to rte_eth_dev structure.
11612 * @param[in, out] dev_flow
11613 * Pointer to the mlx5_flow.
11614 * @param[in] num_of_dest
11615 * The num of destination.
11616 * @param[in, out] res
11617 * Pointer to sample resource.
11618 * @param[in, out] mdest_res
11619 * Pointer to destination array resource.
11620 * @param[in] sample_actions
11621 * Pointer to sample path actions list.
11622 * @param[in] action_flags
11623 * Holds the actions detected until now.
11624 * @param[out] error
11625 * Pointer to the error structure.
11628 * 0 on success, a negative errno value otherwise and rte_errno is set.
11631 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11632 struct mlx5_flow *dev_flow,
11633 uint32_t num_of_dest,
11634 struct mlx5_flow_dv_sample_resource *res,
11635 struct mlx5_flow_dv_dest_array_resource *mdest_res,
11636 void **sample_actions,
11637 uint64_t action_flags,
11638 struct rte_flow_error *error)
11640 /* update normal path action resource into last index of array */
11641 uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11642 struct mlx5_flow_sub_actions_list *sample_act =
11643 &mdest_res->sample_act[dest_index];
11644 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11645 struct mlx5_flow_rss_desc *rss_desc;
11646 uint32_t normal_idx = 0;
11647 struct mlx5_hrxq *hrxq;
11651 rss_desc = &wks->rss_desc;
11652 if (num_of_dest > 1) {
11653 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11654 /* Handle QP action for mirroring */
11655 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11656 rss_desc, &hrxq_idx);
11658 return rte_flow_error_set
11660 RTE_FLOW_ERROR_TYPE_ACTION,
11662 "cannot create rx queue");
11664 mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11665 sample_act->dr_queue_action = hrxq->action;
11666 if (action_flags & MLX5_FLOW_ACTION_MARK)
11667 dev_flow->handle->rix_hrxq = hrxq_idx;
11668 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11670 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11672 mdest_res->sample_idx[dest_index].rix_encap_decap =
11673 dev_flow->handle->dvh.rix_encap_decap;
11674 sample_act->dr_encap_action =
11675 dev_flow->dv.encap_decap->action;
11676 dev_flow->handle->dvh.rix_encap_decap = 0;
11678 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11680 mdest_res->sample_idx[dest_index].rix_port_id_action =
11681 dev_flow->handle->rix_port_id_action;
11682 sample_act->dr_port_id_action =
11683 dev_flow->dv.port_id_action->action;
11684 dev_flow->handle->rix_port_id_action = 0;
11686 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11688 mdest_res->sample_idx[dest_index].rix_jump =
11689 dev_flow->handle->rix_jump;
11690 sample_act->dr_jump_action =
11691 dev_flow->dv.jump->action;
11692 dev_flow->handle->rix_jump = 0;
11694 sample_act->actions_num = normal_idx;
11695 /* update sample action resource into first index of array */
11696 mdest_res->ft_type = res->ft_type;
11697 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11698 sizeof(struct mlx5_flow_sub_actions_idx));
11699 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11700 sizeof(struct mlx5_flow_sub_actions_list));
11701 mdest_res->num_of_dest = num_of_dest;
11702 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11704 return rte_flow_error_set(error, EINVAL,
11705 RTE_FLOW_ERROR_TYPE_ACTION,
11706 NULL, "can't create sample "
11709 res->sub_actions = sample_actions;
11710 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11711 return rte_flow_error_set(error, EINVAL,
11712 RTE_FLOW_ERROR_TYPE_ACTION,
11714 "can't create sample action");
11720 * Remove an ASO age action from age actions list.
11723 * Pointer to the Ethernet device structure.
11725 * Pointer to the aso age action handler.
11728 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11729 struct mlx5_aso_age_action *age)
11731 struct mlx5_age_info *age_info;
11732 struct mlx5_age_param *age_param = &age->age_params;
11733 struct mlx5_priv *priv = dev->data->dev_private;
11734 uint16_t expected = AGE_CANDIDATE;
11736 age_info = GET_PORT_AGE_INFO(priv);
11737 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11738 AGE_FREE, false, __ATOMIC_RELAXED,
11739 __ATOMIC_RELAXED)) {
11741 * We need the lock even it is age timeout,
11742 * since age action may still in process.
11744 rte_spinlock_lock(&age_info->aged_sl);
11745 LIST_REMOVE(age, next);
11746 rte_spinlock_unlock(&age_info->aged_sl);
11747 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11752 * Release an ASO age action.
11755 * Pointer to the Ethernet device structure.
11756 * @param[in] age_idx
11757 * Index of ASO age action to release.
11759 * True if the release operation is during flow destroy operation.
11760 * False if the release operation is during action destroy operation.
11763 * 0 when age action was removed, otherwise the number of references.
11766 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11768 struct mlx5_priv *priv = dev->data->dev_private;
11769 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11770 struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11771 uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11774 flow_dv_aso_age_remove_from_age(dev, age);
11775 rte_spinlock_lock(&mng->free_sl);
11776 LIST_INSERT_HEAD(&mng->free, age, next);
11777 rte_spinlock_unlock(&mng->free_sl);
11783 * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11786 * Pointer to the Ethernet device structure.
11789 * 0 on success, otherwise negative errno value and rte_errno is set.
11792 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11794 struct mlx5_priv *priv = dev->data->dev_private;
11795 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11796 void *old_pools = mng->pools;
11797 uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11798 uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11799 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11802 rte_errno = ENOMEM;
11806 memcpy(pools, old_pools,
11807 mng->n * sizeof(struct mlx5_flow_counter_pool *));
11808 mlx5_free(old_pools);
11810 /* First ASO flow hit allocation - starting ASO data-path. */
11811 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11819 mng->pools = pools;
11824 * Create and initialize a new ASO aging pool.
11827 * Pointer to the Ethernet device structure.
11828 * @param[out] age_free
11829 * Where to put the pointer of a new age action.
11832 * The age actions pool pointer and @p age_free is set on success,
11833 * NULL otherwise and rte_errno is set.
11835 static struct mlx5_aso_age_pool *
11836 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11837 struct mlx5_aso_age_action **age_free)
11839 struct mlx5_priv *priv = dev->data->dev_private;
11840 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11841 struct mlx5_aso_age_pool *pool = NULL;
11842 struct mlx5_devx_obj *obj = NULL;
11845 obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->cdev->ctx,
11846 priv->sh->cdev->pdn);
11848 rte_errno = ENODATA;
11849 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11852 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11854 claim_zero(mlx5_devx_cmd_destroy(obj));
11855 rte_errno = ENOMEM;
11858 pool->flow_hit_aso_obj = obj;
11859 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11860 rte_rwlock_write_lock(&mng->resize_rwl);
11861 pool->index = mng->next;
11862 /* Resize pools array if there is no room for the new pool in it. */
11863 if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11864 claim_zero(mlx5_devx_cmd_destroy(obj));
11866 rte_rwlock_write_unlock(&mng->resize_rwl);
11869 mng->pools[pool->index] = pool;
11871 rte_rwlock_write_unlock(&mng->resize_rwl);
11872 /* Assign the first action in the new pool, the rest go to free list. */
11873 *age_free = &pool->actions[0];
11874 for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11875 pool->actions[i].offset = i;
11876 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11882 * Allocate a ASO aging bit.
11885 * Pointer to the Ethernet device structure.
11886 * @param[out] error
11887 * Pointer to the error structure.
11890 * Index to ASO age action on success, 0 otherwise and rte_errno is set.
11893 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11895 struct mlx5_priv *priv = dev->data->dev_private;
11896 const struct mlx5_aso_age_pool *pool;
11897 struct mlx5_aso_age_action *age_free = NULL;
11898 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11901 /* Try to get the next free age action bit. */
11902 rte_spinlock_lock(&mng->free_sl);
11903 age_free = LIST_FIRST(&mng->free);
11905 LIST_REMOVE(age_free, next);
11906 } else if (!flow_dv_age_pool_create(dev, &age_free)) {
11907 rte_spinlock_unlock(&mng->free_sl);
11908 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11909 NULL, "failed to create ASO age pool");
11910 return 0; /* 0 is an error. */
11912 rte_spinlock_unlock(&mng->free_sl);
11913 pool = container_of
11914 ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
11915 (age_free - age_free->offset), const struct mlx5_aso_age_pool,
11917 if (!age_free->dr_action) {
11918 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
11922 rte_flow_error_set(error, rte_errno,
11923 RTE_FLOW_ERROR_TYPE_ACTION,
11924 NULL, "failed to get reg_c "
11925 "for ASO flow hit");
11926 return 0; /* 0 is an error. */
11928 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
11929 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
11930 (priv->sh->rx_domain,
11931 pool->flow_hit_aso_obj->obj, age_free->offset,
11932 MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
11933 (reg_c - REG_C_0));
11934 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
11935 if (!age_free->dr_action) {
11937 rte_spinlock_lock(&mng->free_sl);
11938 LIST_INSERT_HEAD(&mng->free, age_free, next);
11939 rte_spinlock_unlock(&mng->free_sl);
11940 rte_flow_error_set(error, rte_errno,
11941 RTE_FLOW_ERROR_TYPE_ACTION,
11942 NULL, "failed to create ASO "
11943 "flow hit action");
11944 return 0; /* 0 is an error. */
11947 __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
11948 return pool->index | ((age_free->offset + 1) << 16);
11952 * Initialize flow ASO age parameters.
11955 * Pointer to rte_eth_dev structure.
11956 * @param[in] age_idx
11957 * Index of ASO age action.
11958 * @param[in] context
11959 * Pointer to flow counter age context.
11960 * @param[in] timeout
11961 * Aging timeout in seconds.
11965 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
11970 struct mlx5_aso_age_action *aso_age;
11972 aso_age = flow_aso_age_get_by_idx(dev, age_idx);
11973 MLX5_ASSERT(aso_age);
11974 aso_age->age_params.context = context;
11975 aso_age->age_params.timeout = timeout;
11976 aso_age->age_params.port_id = dev->data->port_id;
11977 __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
11979 __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
11984 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
11985 const struct rte_flow_item_integrity *value,
11986 void *headers_m, void *headers_v)
11989 /* application l4_ok filter aggregates all hardware l4 filters
11990 * therefore hw l4_checksum_ok must be implicitly added here.
11992 struct rte_flow_item_integrity local_item;
11994 local_item.l4_csum_ok = 1;
11995 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
11996 local_item.l4_csum_ok);
11997 if (value->l4_ok) {
11998 /* application l4_ok = 1 matches sets both hw flags
11999 * l4_ok and l4_checksum_ok flags to 1.
12001 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12002 l4_checksum_ok, local_item.l4_csum_ok);
12003 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
12005 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
12008 /* application l4_ok = 0 matches on hw flag
12009 * l4_checksum_ok = 0 only.
12011 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12012 l4_checksum_ok, 0);
12014 } else if (mask->l4_csum_ok) {
12015 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12017 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12018 value->l4_csum_ok);
12023 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12024 const struct rte_flow_item_integrity *value,
12025 void *headers_m, void *headers_v, bool is_ipv4)
12028 /* application l3_ok filter aggregates all hardware l3 filters
12029 * therefore hw ipv4_checksum_ok must be implicitly added here.
12031 struct rte_flow_item_integrity local_item;
12033 local_item.ipv4_csum_ok = !!is_ipv4;
12034 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12035 local_item.ipv4_csum_ok);
12036 if (value->l3_ok) {
12037 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12038 ipv4_checksum_ok, local_item.ipv4_csum_ok);
12039 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
12041 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12044 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12045 ipv4_checksum_ok, 0);
12047 } else if (mask->ipv4_csum_ok) {
12048 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12049 mask->ipv4_csum_ok);
12050 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12051 value->ipv4_csum_ok);
12056 set_integrity_bits(void *headers_m, void *headers_v,
12057 const struct rte_flow_item *integrity_item, bool is_l3_ip4)
12059 const struct rte_flow_item_integrity *spec = integrity_item->spec;
12060 const struct rte_flow_item_integrity *mask = integrity_item->mask;
12062 /* Integrity bits validation cleared spec pointer */
12063 MLX5_ASSERT(spec != NULL);
12065 mask = &rte_flow_item_integrity_mask;
12066 flow_dv_translate_integrity_l3(mask, spec, headers_m, headers_v,
12068 flow_dv_translate_integrity_l4(mask, spec, headers_m, headers_v);
12072 flow_dv_translate_item_integrity_post(void *matcher, void *key,
12074 struct rte_flow_item *integrity_items[2],
12075 uint64_t pattern_flags)
12077 void *headers_m, *headers_v;
12080 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
12081 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12083 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12084 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4) !=
12086 set_integrity_bits(headers_m, headers_v,
12087 integrity_items[1], is_l3_ip4);
12089 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
12090 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12092 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12093 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV4) !=
12095 set_integrity_bits(headers_m, headers_v,
12096 integrity_items[0], is_l3_ip4);
12101 flow_dv_translate_item_integrity(const struct rte_flow_item *item,
12102 const struct rte_flow_item *integrity_items[2],
12103 uint64_t *last_item)
12105 const struct rte_flow_item_integrity *spec = (typeof(spec))item->spec;
12107 /* integrity bits validation cleared spec pointer */
12108 MLX5_ASSERT(spec != NULL);
12109 if (spec->level > 1) {
12110 integrity_items[1] = item;
12111 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
12113 integrity_items[0] = item;
12114 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
12119 * Prepares DV flow counter with aging configuration.
12120 * Gets it by index when exists, creates a new one when doesn't.
12123 * Pointer to rte_eth_dev structure.
12124 * @param[in] dev_flow
12125 * Pointer to the mlx5_flow.
12126 * @param[in, out] flow
12127 * Pointer to the sub flow.
12129 * Pointer to the counter action configuration.
12131 * Pointer to the aging action configuration.
12132 * @param[out] error
12133 * Pointer to the error structure.
12136 * Pointer to the counter, NULL otherwise.
12138 static struct mlx5_flow_counter *
12139 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12140 struct mlx5_flow *dev_flow,
12141 struct rte_flow *flow,
12142 const struct rte_flow_action_count *count,
12143 const struct rte_flow_action_age *age,
12144 struct rte_flow_error *error)
12146 if (!flow->counter) {
12147 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12149 if (!flow->counter) {
12150 rte_flow_error_set(error, rte_errno,
12151 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12152 "cannot create counter object.");
12156 return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12160 * Release an ASO CT action by its own device.
12163 * Pointer to the Ethernet device structure.
12165 * Index of ASO CT action to release.
12168 * 0 when CT action was removed, otherwise the number of references.
12171 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12173 struct mlx5_priv *priv = dev->data->dev_private;
12174 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12176 struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12177 enum mlx5_aso_ct_state state =
12178 __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12180 /* Cannot release when CT is in the ASO SQ. */
12181 if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12183 ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12185 if (ct->dr_action_orig) {
12186 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12187 claim_zero(mlx5_glue->destroy_flow_action
12188 (ct->dr_action_orig));
12190 ct->dr_action_orig = NULL;
12192 if (ct->dr_action_rply) {
12193 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12194 claim_zero(mlx5_glue->destroy_flow_action
12195 (ct->dr_action_rply));
12197 ct->dr_action_rply = NULL;
12199 /* Clear the state to free, no need in 1st allocation. */
12200 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12201 rte_spinlock_lock(&mng->ct_sl);
12202 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12203 rte_spinlock_unlock(&mng->ct_sl);
12209 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx,
12210 struct rte_flow_error *error)
12212 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12213 uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12214 struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12217 MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12218 if (dev->data->dev_started != 1)
12219 return rte_flow_error_set(error, EAGAIN,
12220 RTE_FLOW_ERROR_TYPE_ACTION,
12222 "Indirect CT action cannot be destroyed when the port is stopped");
12223 ret = flow_dv_aso_ct_dev_release(owndev, idx);
12225 return rte_flow_error_set(error, EAGAIN,
12226 RTE_FLOW_ERROR_TYPE_ACTION,
12228 "Current state prevents indirect CT action from being destroyed");
12233 * Resize the ASO CT pools array by 64 pools.
12236 * Pointer to the Ethernet device structure.
12239 * 0 on success, otherwise negative errno value and rte_errno is set.
12242 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12244 struct mlx5_priv *priv = dev->data->dev_private;
12245 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12246 void *old_pools = mng->pools;
12247 /* Magic number now, need a macro. */
12248 uint32_t resize = mng->n + 64;
12249 uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12250 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12253 rte_errno = ENOMEM;
12256 rte_rwlock_write_lock(&mng->resize_rwl);
12257 /* ASO SQ/QP was already initialized in the startup. */
12259 /* Realloc could be an alternative choice. */
12260 rte_memcpy(pools, old_pools,
12261 mng->n * sizeof(struct mlx5_aso_ct_pool *));
12262 mlx5_free(old_pools);
12265 mng->pools = pools;
12266 rte_rwlock_write_unlock(&mng->resize_rwl);
12271 * Create and initialize a new ASO CT pool.
12274 * Pointer to the Ethernet device structure.
12275 * @param[out] ct_free
12276 * Where to put the pointer of a new CT action.
12279 * The CT actions pool pointer and @p ct_free is set on success,
12280 * NULL otherwise and rte_errno is set.
12282 static struct mlx5_aso_ct_pool *
12283 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12284 struct mlx5_aso_ct_action **ct_free)
12286 struct mlx5_priv *priv = dev->data->dev_private;
12287 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12288 struct mlx5_aso_ct_pool *pool = NULL;
12289 struct mlx5_devx_obj *obj = NULL;
12291 uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12293 obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->cdev->ctx,
12294 priv->sh->cdev->pdn,
12297 rte_errno = ENODATA;
12298 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12301 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12303 rte_errno = ENOMEM;
12304 claim_zero(mlx5_devx_cmd_destroy(obj));
12307 pool->devx_obj = obj;
12308 pool->index = mng->next;
12309 /* Resize pools array if there is no room for the new pool in it. */
12310 if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12311 claim_zero(mlx5_devx_cmd_destroy(obj));
12315 mng->pools[pool->index] = pool;
12317 /* Assign the first action in the new pool, the rest go to free list. */
12318 *ct_free = &pool->actions[0];
12319 /* Lock outside, the list operation is safe here. */
12320 for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12321 /* refcnt is 0 when allocating the memory. */
12322 pool->actions[i].offset = i;
12323 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12329 * Allocate a ASO CT action from free list.
12332 * Pointer to the Ethernet device structure.
12333 * @param[out] error
12334 * Pointer to the error structure.
12337 * Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12340 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12342 struct mlx5_priv *priv = dev->data->dev_private;
12343 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12344 struct mlx5_aso_ct_action *ct = NULL;
12345 struct mlx5_aso_ct_pool *pool;
12350 if (!priv->sh->devx) {
12351 rte_errno = ENOTSUP;
12354 /* Get a free CT action, if no, a new pool will be created. */
12355 rte_spinlock_lock(&mng->ct_sl);
12356 ct = LIST_FIRST(&mng->free_cts);
12358 LIST_REMOVE(ct, next);
12359 } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12360 rte_spinlock_unlock(&mng->ct_sl);
12361 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12362 NULL, "failed to create ASO CT pool");
12365 rte_spinlock_unlock(&mng->ct_sl);
12366 pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12367 ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12368 /* 0: inactive, 1: created, 2+: used by flows. */
12369 __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12370 reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12371 if (!ct->dr_action_orig) {
12372 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12373 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12374 (priv->sh->rx_domain, pool->devx_obj->obj,
12376 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12379 RTE_SET_USED(reg_c);
12381 if (!ct->dr_action_orig) {
12382 flow_dv_aso_ct_dev_release(dev, ct_idx);
12383 rte_flow_error_set(error, rte_errno,
12384 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12385 "failed to create ASO CT action");
12389 if (!ct->dr_action_rply) {
12390 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12391 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12392 (priv->sh->rx_domain, pool->devx_obj->obj,
12394 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12397 if (!ct->dr_action_rply) {
12398 flow_dv_aso_ct_dev_release(dev, ct_idx);
12399 rte_flow_error_set(error, rte_errno,
12400 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12401 "failed to create ASO CT action");
12409 * Create a conntrack object with context and actions by using ASO mechanism.
12412 * Pointer to rte_eth_dev structure.
12414 * Pointer to conntrack information profile.
12415 * @param[out] error
12416 * Pointer to the error structure.
12419 * Index to conntrack object on success, 0 otherwise.
12422 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12423 const struct rte_flow_action_conntrack *pro,
12424 struct rte_flow_error *error)
12426 struct mlx5_priv *priv = dev->data->dev_private;
12427 struct mlx5_dev_ctx_shared *sh = priv->sh;
12428 struct mlx5_aso_ct_action *ct;
12431 if (!sh->ct_aso_en)
12432 return rte_flow_error_set(error, ENOTSUP,
12433 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12434 "Connection is not supported");
12435 idx = flow_dv_aso_ct_alloc(dev, error);
12437 return rte_flow_error_set(error, rte_errno,
12438 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12439 "Failed to allocate CT object");
12440 ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12441 if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12442 return rte_flow_error_set(error, EBUSY,
12443 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12444 "Failed to update CT");
12445 ct->is_original = !!pro->is_original_dir;
12446 ct->peer = pro->peer_port;
12451 * Fill the flow with DV spec, lock free
12452 * (mutex should be acquired by caller).
12455 * Pointer to rte_eth_dev structure.
12456 * @param[in, out] dev_flow
12457 * Pointer to the sub flow.
12459 * Pointer to the flow attributes.
12461 * Pointer to the list of items.
12462 * @param[in] actions
12463 * Pointer to the list of actions.
12464 * @param[out] error
12465 * Pointer to the error structure.
12468 * 0 on success, a negative errno value otherwise and rte_errno is set.
12471 flow_dv_translate(struct rte_eth_dev *dev,
12472 struct mlx5_flow *dev_flow,
12473 const struct rte_flow_attr *attr,
12474 const struct rte_flow_item items[],
12475 const struct rte_flow_action actions[],
12476 struct rte_flow_error *error)
12478 struct mlx5_priv *priv = dev->data->dev_private;
12479 struct mlx5_dev_config *dev_conf = &priv->config;
12480 struct rte_flow *flow = dev_flow->flow;
12481 struct mlx5_flow_handle *handle = dev_flow->handle;
12482 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12483 struct mlx5_flow_rss_desc *rss_desc;
12484 uint64_t item_flags = 0;
12485 uint64_t last_item = 0;
12486 uint64_t action_flags = 0;
12487 struct mlx5_flow_dv_matcher matcher = {
12489 .size = sizeof(matcher.mask.buf),
12493 bool actions_end = false;
12495 struct mlx5_flow_dv_modify_hdr_resource res;
12496 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12497 sizeof(struct mlx5_modification_cmd) *
12498 (MLX5_MAX_MODIFY_NUM + 1)];
12500 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12501 const struct rte_flow_action_count *count = NULL;
12502 const struct rte_flow_action_age *non_shared_age = NULL;
12503 union flow_dv_attr flow_attr = { .attr = 0 };
12505 union mlx5_flow_tbl_key tbl_key;
12506 uint32_t modify_action_position = UINT32_MAX;
12507 void *match_mask = matcher.mask.buf;
12508 void *match_value = dev_flow->dv.value.buf;
12509 uint8_t next_protocol = 0xff;
12510 struct rte_vlan_hdr vlan = { 0 };
12511 struct mlx5_flow_dv_dest_array_resource mdest_res;
12512 struct mlx5_flow_dv_sample_resource sample_res;
12513 void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12514 const struct rte_flow_action_sample *sample = NULL;
12515 struct mlx5_flow_sub_actions_list *sample_act;
12516 uint32_t sample_act_pos = UINT32_MAX;
12517 uint32_t age_act_pos = UINT32_MAX;
12518 uint32_t num_of_dest = 0;
12519 int tmp_actions_n = 0;
12522 const struct mlx5_flow_tunnel *tunnel = NULL;
12523 struct flow_grp_info grp_info = {
12524 .external = !!dev_flow->external,
12525 .transfer = !!attr->transfer,
12526 .fdb_def_rule = !!priv->fdb_def_rule,
12527 .skip_scale = dev_flow->skip_scale &
12528 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12529 .std_tbl_fix = true,
12531 const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
12534 return rte_flow_error_set(error, ENOMEM,
12535 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12537 "failed to push flow workspace");
12538 rss_desc = &wks->rss_desc;
12539 memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12540 memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12541 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12542 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12543 /* update normal path action resource into last index of array */
12544 sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12545 if (is_tunnel_offload_active(dev)) {
12546 if (dev_flow->tunnel) {
12547 RTE_VERIFY(dev_flow->tof_type ==
12548 MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12549 tunnel = dev_flow->tunnel;
12551 tunnel = mlx5_get_tof(items, actions,
12552 &dev_flow->tof_type);
12553 dev_flow->tunnel = tunnel;
12555 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12556 (dev, attr, tunnel, dev_flow->tof_type);
12558 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12559 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12560 ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12564 dev_flow->dv.group = table;
12565 if (attr->transfer)
12566 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12567 /* number of actions must be set to 0 in case of dirty stack. */
12568 mhdr_res->actions_num = 0;
12569 if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12571 * do not add decap action if match rule drops packet
12572 * HW rejects rules with decap & drop
12574 * if tunnel match rule was inserted before matching tunnel set
12575 * rule flow table used in the match rule must be registered.
12576 * current implementation handles that in the
12577 * flow_dv_match_register() at the function end.
12579 bool add_decap = true;
12580 const struct rte_flow_action *ptr = actions;
12582 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12583 if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12589 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12593 dev_flow->dv.actions[actions_n++] =
12594 dev_flow->dv.encap_decap->action;
12595 action_flags |= MLX5_FLOW_ACTION_DECAP;
12598 for (; !actions_end ; actions++) {
12599 const struct rte_flow_action_queue *queue;
12600 const struct rte_flow_action_rss *rss;
12601 const struct rte_flow_action *action = actions;
12602 const uint8_t *rss_key;
12603 struct mlx5_flow_tbl_resource *tbl;
12604 struct mlx5_aso_age_action *age_act;
12605 struct mlx5_flow_counter *cnt_act;
12606 uint32_t port_id = 0;
12607 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12608 int action_type = actions->type;
12609 const struct rte_flow_action *found_action = NULL;
12610 uint32_t jump_group = 0;
12611 uint32_t owner_idx;
12612 struct mlx5_aso_ct_action *ct;
12614 if (!mlx5_flow_os_action_supported(action_type))
12615 return rte_flow_error_set(error, ENOTSUP,
12616 RTE_FLOW_ERROR_TYPE_ACTION,
12618 "action not supported");
12619 switch (action_type) {
12620 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12621 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12623 case RTE_FLOW_ACTION_TYPE_VOID:
12625 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12626 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
12627 if (flow_dv_translate_action_port_id(dev, action,
12630 port_id_resource.port_id = port_id;
12631 MLX5_ASSERT(!handle->rix_port_id_action);
12632 if (flow_dv_port_id_action_resource_register
12633 (dev, &port_id_resource, dev_flow, error))
12635 dev_flow->dv.actions[actions_n++] =
12636 dev_flow->dv.port_id_action->action;
12637 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12638 dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12639 sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12642 case RTE_FLOW_ACTION_TYPE_FLAG:
12643 action_flags |= MLX5_FLOW_ACTION_FLAG;
12644 dev_flow->handle->mark = 1;
12645 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12646 struct rte_flow_action_mark mark = {
12647 .id = MLX5_FLOW_MARK_DEFAULT,
12650 if (flow_dv_convert_action_mark(dev, &mark,
12654 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12657 tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12659 * Only one FLAG or MARK is supported per device flow
12660 * right now. So the pointer to the tag resource must be
12661 * zero before the register process.
12663 MLX5_ASSERT(!handle->dvh.rix_tag);
12664 if (flow_dv_tag_resource_register(dev, tag_be,
12667 MLX5_ASSERT(dev_flow->dv.tag_resource);
12668 dev_flow->dv.actions[actions_n++] =
12669 dev_flow->dv.tag_resource->action;
12671 case RTE_FLOW_ACTION_TYPE_MARK:
12672 action_flags |= MLX5_FLOW_ACTION_MARK;
12673 dev_flow->handle->mark = 1;
12674 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12675 const struct rte_flow_action_mark *mark =
12676 (const struct rte_flow_action_mark *)
12679 if (flow_dv_convert_action_mark(dev, mark,
12683 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12687 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12688 /* Legacy (non-extensive) MARK action. */
12689 tag_be = mlx5_flow_mark_set
12690 (((const struct rte_flow_action_mark *)
12691 (actions->conf))->id);
12692 MLX5_ASSERT(!handle->dvh.rix_tag);
12693 if (flow_dv_tag_resource_register(dev, tag_be,
12696 MLX5_ASSERT(dev_flow->dv.tag_resource);
12697 dev_flow->dv.actions[actions_n++] =
12698 dev_flow->dv.tag_resource->action;
12700 case RTE_FLOW_ACTION_TYPE_SET_META:
12701 if (flow_dv_convert_action_set_meta
12702 (dev, mhdr_res, attr,
12703 (const struct rte_flow_action_set_meta *)
12704 actions->conf, error))
12706 action_flags |= MLX5_FLOW_ACTION_SET_META;
12708 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12709 if (flow_dv_convert_action_set_tag
12711 (const struct rte_flow_action_set_tag *)
12712 actions->conf, error))
12714 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12716 case RTE_FLOW_ACTION_TYPE_DROP:
12717 action_flags |= MLX5_FLOW_ACTION_DROP;
12718 dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12720 case RTE_FLOW_ACTION_TYPE_QUEUE:
12721 queue = actions->conf;
12722 rss_desc->queue_num = 1;
12723 rss_desc->queue[0] = queue->index;
12724 action_flags |= MLX5_FLOW_ACTION_QUEUE;
12725 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12726 sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12729 case RTE_FLOW_ACTION_TYPE_RSS:
12730 rss = actions->conf;
12731 memcpy(rss_desc->queue, rss->queue,
12732 rss->queue_num * sizeof(uint16_t));
12733 rss_desc->queue_num = rss->queue_num;
12734 /* NULL RSS key indicates default RSS key. */
12735 rss_key = !rss->key ? rss_hash_default_key : rss->key;
12736 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12738 * rss->level and rss.types should be set in advance
12739 * when expanding items for RSS.
12741 action_flags |= MLX5_FLOW_ACTION_RSS;
12742 dev_flow->handle->fate_action = rss_desc->shared_rss ?
12743 MLX5_FLOW_FATE_SHARED_RSS :
12744 MLX5_FLOW_FATE_QUEUE;
12746 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12747 owner_idx = (uint32_t)(uintptr_t)action->conf;
12748 age_act = flow_aso_age_get_by_idx(dev, owner_idx);
12749 if (flow->age == 0) {
12750 flow->age = owner_idx;
12751 __atomic_fetch_add(&age_act->refcnt, 1,
12754 age_act_pos = actions_n++;
12755 action_flags |= MLX5_FLOW_ACTION_AGE;
12757 case RTE_FLOW_ACTION_TYPE_AGE:
12758 non_shared_age = action->conf;
12759 age_act_pos = actions_n++;
12760 action_flags |= MLX5_FLOW_ACTION_AGE;
12762 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12763 owner_idx = (uint32_t)(uintptr_t)action->conf;
12764 cnt_act = flow_dv_counter_get_by_idx(dev, owner_idx,
12766 MLX5_ASSERT(cnt_act != NULL);
12768 * When creating meter drop flow in drop table, the
12769 * counter should not overwrite the rte flow counter.
12771 if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
12772 dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP) {
12773 dev_flow->dv.actions[actions_n++] =
12776 if (flow->counter == 0) {
12777 flow->counter = owner_idx;
12779 (&cnt_act->shared_info.refcnt,
12780 1, __ATOMIC_RELAXED);
12782 /* Save information first, will apply later. */
12783 action_flags |= MLX5_FLOW_ACTION_COUNT;
12786 case RTE_FLOW_ACTION_TYPE_COUNT:
12787 if (!priv->sh->devx) {
12788 return rte_flow_error_set
12790 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12792 "count action not supported");
12794 /* Save information first, will apply later. */
12795 count = action->conf;
12796 action_flags |= MLX5_FLOW_ACTION_COUNT;
12798 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12799 dev_flow->dv.actions[actions_n++] =
12800 priv->sh->pop_vlan_action;
12801 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12803 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12804 if (!(action_flags &
12805 MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12806 flow_dev_get_vlan_info_from_items(items, &vlan);
12807 vlan.eth_proto = rte_be_to_cpu_16
12808 ((((const struct rte_flow_action_of_push_vlan *)
12809 actions->conf)->ethertype));
12810 found_action = mlx5_flow_find_action
12812 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12814 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12815 found_action = mlx5_flow_find_action
12817 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12819 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12820 if (flow_dv_create_action_push_vlan
12821 (dev, attr, &vlan, dev_flow, error))
12823 dev_flow->dv.actions[actions_n++] =
12824 dev_flow->dv.push_vlan_res->action;
12825 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12827 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12828 /* of_vlan_push action handled this action */
12829 MLX5_ASSERT(action_flags &
12830 MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12832 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12833 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12835 flow_dev_get_vlan_info_from_items(items, &vlan);
12836 mlx5_update_vlan_vid_pcp(actions, &vlan);
12837 /* If no VLAN push - this is a modify header action */
12838 if (flow_dv_convert_action_modify_vlan_vid
12839 (mhdr_res, actions, error))
12841 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12843 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12844 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12845 if (flow_dv_create_action_l2_encap(dev, actions,
12850 dev_flow->dv.actions[actions_n++] =
12851 dev_flow->dv.encap_decap->action;
12852 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12853 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12854 sample_act->action_flags |=
12855 MLX5_FLOW_ACTION_ENCAP;
12857 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12858 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12859 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12863 dev_flow->dv.actions[actions_n++] =
12864 dev_flow->dv.encap_decap->action;
12865 action_flags |= MLX5_FLOW_ACTION_DECAP;
12867 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12868 /* Handle encap with preceding decap. */
12869 if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12870 if (flow_dv_create_action_raw_encap
12871 (dev, actions, dev_flow, attr, error))
12873 dev_flow->dv.actions[actions_n++] =
12874 dev_flow->dv.encap_decap->action;
12876 /* Handle encap without preceding decap. */
12877 if (flow_dv_create_action_l2_encap
12878 (dev, actions, dev_flow, attr->transfer,
12881 dev_flow->dv.actions[actions_n++] =
12882 dev_flow->dv.encap_decap->action;
12884 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12885 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12886 sample_act->action_flags |=
12887 MLX5_FLOW_ACTION_ENCAP;
12889 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
12890 while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
12892 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
12893 if (flow_dv_create_action_l2_decap
12894 (dev, dev_flow, attr->transfer, error))
12896 dev_flow->dv.actions[actions_n++] =
12897 dev_flow->dv.encap_decap->action;
12899 /* If decap is followed by encap, handle it at encap. */
12900 action_flags |= MLX5_FLOW_ACTION_DECAP;
12902 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
12903 dev_flow->dv.actions[actions_n++] =
12904 (void *)(uintptr_t)action->conf;
12905 action_flags |= MLX5_FLOW_ACTION_JUMP;
12907 case RTE_FLOW_ACTION_TYPE_JUMP:
12908 jump_group = ((const struct rte_flow_action_jump *)
12909 action->conf)->group;
12910 grp_info.std_tbl_fix = 0;
12911 if (dev_flow->skip_scale &
12912 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
12913 grp_info.skip_scale = 1;
12915 grp_info.skip_scale = 0;
12916 ret = mlx5_flow_group_to_table(dev, tunnel,
12922 tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
12924 !!dev_flow->external,
12925 tunnel, jump_group, 0,
12928 return rte_flow_error_set
12930 RTE_FLOW_ERROR_TYPE_ACTION,
12932 "cannot create jump action.");
12933 if (flow_dv_jump_tbl_resource_register
12934 (dev, tbl, dev_flow, error)) {
12935 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12936 return rte_flow_error_set
12938 RTE_FLOW_ERROR_TYPE_ACTION,
12940 "cannot create jump action.");
12942 dev_flow->dv.actions[actions_n++] =
12943 dev_flow->dv.jump->action;
12944 action_flags |= MLX5_FLOW_ACTION_JUMP;
12945 dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
12946 sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
12949 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
12950 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
12951 if (flow_dv_convert_action_modify_mac
12952 (mhdr_res, actions, error))
12954 action_flags |= actions->type ==
12955 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
12956 MLX5_FLOW_ACTION_SET_MAC_SRC :
12957 MLX5_FLOW_ACTION_SET_MAC_DST;
12959 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
12960 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
12961 if (flow_dv_convert_action_modify_ipv4
12962 (mhdr_res, actions, error))
12964 action_flags |= actions->type ==
12965 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
12966 MLX5_FLOW_ACTION_SET_IPV4_SRC :
12967 MLX5_FLOW_ACTION_SET_IPV4_DST;
12969 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
12970 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
12971 if (flow_dv_convert_action_modify_ipv6
12972 (mhdr_res, actions, error))
12974 action_flags |= actions->type ==
12975 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
12976 MLX5_FLOW_ACTION_SET_IPV6_SRC :
12977 MLX5_FLOW_ACTION_SET_IPV6_DST;
12979 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
12980 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
12981 if (flow_dv_convert_action_modify_tp
12982 (mhdr_res, actions, items,
12983 &flow_attr, dev_flow, !!(action_flags &
12984 MLX5_FLOW_ACTION_DECAP), error))
12986 action_flags |= actions->type ==
12987 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
12988 MLX5_FLOW_ACTION_SET_TP_SRC :
12989 MLX5_FLOW_ACTION_SET_TP_DST;
12991 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
12992 if (flow_dv_convert_action_modify_dec_ttl
12993 (mhdr_res, items, &flow_attr, dev_flow,
12995 MLX5_FLOW_ACTION_DECAP), error))
12997 action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
12999 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13000 if (flow_dv_convert_action_modify_ttl
13001 (mhdr_res, actions, items, &flow_attr,
13002 dev_flow, !!(action_flags &
13003 MLX5_FLOW_ACTION_DECAP), error))
13005 action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13007 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13008 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13009 if (flow_dv_convert_action_modify_tcp_seq
13010 (mhdr_res, actions, error))
13012 action_flags |= actions->type ==
13013 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13014 MLX5_FLOW_ACTION_INC_TCP_SEQ :
13015 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13018 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13019 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13020 if (flow_dv_convert_action_modify_tcp_ack
13021 (mhdr_res, actions, error))
13023 action_flags |= actions->type ==
13024 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13025 MLX5_FLOW_ACTION_INC_TCP_ACK :
13026 MLX5_FLOW_ACTION_DEC_TCP_ACK;
13028 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13029 if (flow_dv_convert_action_set_reg
13030 (mhdr_res, actions, error))
13032 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13034 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13035 if (flow_dv_convert_action_copy_mreg
13036 (dev, mhdr_res, actions, error))
13038 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13040 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13041 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13042 dev_flow->handle->fate_action =
13043 MLX5_FLOW_FATE_DEFAULT_MISS;
13045 case RTE_FLOW_ACTION_TYPE_METER:
13047 return rte_flow_error_set(error, rte_errno,
13048 RTE_FLOW_ERROR_TYPE_ACTION,
13049 NULL, "Failed to get meter in flow.");
13050 /* Set the meter action. */
13051 dev_flow->dv.actions[actions_n++] =
13052 wks->fm->meter_action;
13053 action_flags |= MLX5_FLOW_ACTION_METER;
13055 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13056 if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13059 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13061 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13062 if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13065 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13067 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13068 sample_act_pos = actions_n;
13069 sample = (const struct rte_flow_action_sample *)
13072 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13073 /* put encap action into group if work with port id */
13074 if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13075 (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13076 sample_act->action_flags |=
13077 MLX5_FLOW_ACTION_ENCAP;
13079 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13080 if (flow_dv_convert_action_modify_field
13081 (dev, mhdr_res, actions, attr, error))
13083 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13085 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13086 owner_idx = (uint32_t)(uintptr_t)action->conf;
13087 ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13089 return rte_flow_error_set(error, EINVAL,
13090 RTE_FLOW_ERROR_TYPE_ACTION,
13092 "Failed to get CT object.");
13093 if (mlx5_aso_ct_available(priv->sh, ct))
13094 return rte_flow_error_set(error, rte_errno,
13095 RTE_FLOW_ERROR_TYPE_ACTION,
13097 "CT is unavailable.");
13098 if (ct->is_original)
13099 dev_flow->dv.actions[actions_n] =
13100 ct->dr_action_orig;
13102 dev_flow->dv.actions[actions_n] =
13103 ct->dr_action_rply;
13104 if (flow->ct == 0) {
13105 flow->indirect_type =
13106 MLX5_INDIRECT_ACTION_TYPE_CT;
13107 flow->ct = owner_idx;
13108 __atomic_fetch_add(&ct->refcnt, 1,
13112 action_flags |= MLX5_FLOW_ACTION_CT;
13114 case RTE_FLOW_ACTION_TYPE_END:
13115 actions_end = true;
13116 if (mhdr_res->actions_num) {
13117 /* create modify action if needed. */
13118 if (flow_dv_modify_hdr_resource_register
13119 (dev, mhdr_res, dev_flow, error))
13121 dev_flow->dv.actions[modify_action_position] =
13122 handle->dvh.modify_hdr->action;
13125 * Handle AGE and COUNT action by single HW counter
13126 * when they are not shared.
13128 if (action_flags & MLX5_FLOW_ACTION_AGE) {
13129 if ((non_shared_age && count) ||
13130 !(priv->sh->flow_hit_aso_en &&
13131 (attr->group || attr->transfer))) {
13132 /* Creates age by counters. */
13133 cnt_act = flow_dv_prepare_counter
13140 dev_flow->dv.actions[age_act_pos] =
13144 if (!flow->age && non_shared_age) {
13145 flow->age = flow_dv_aso_age_alloc
13149 flow_dv_aso_age_params_init
13151 non_shared_age->context ?
13152 non_shared_age->context :
13153 (void *)(uintptr_t)
13154 (dev_flow->flow_idx),
13155 non_shared_age->timeout);
13157 age_act = flow_aso_age_get_by_idx(dev,
13159 dev_flow->dv.actions[age_act_pos] =
13160 age_act->dr_action;
13162 if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13164 * Create one count action, to be used
13165 * by all sub-flows.
13167 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13172 dev_flow->dv.actions[actions_n++] =
13178 if (mhdr_res->actions_num &&
13179 modify_action_position == UINT32_MAX)
13180 modify_action_position = actions_n++;
13182 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13183 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13184 int item_type = items->type;
13186 if (!mlx5_flow_os_item_supported(item_type))
13187 return rte_flow_error_set(error, ENOTSUP,
13188 RTE_FLOW_ERROR_TYPE_ITEM,
13189 NULL, "item not supported");
13190 switch (item_type) {
13191 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13192 flow_dv_translate_item_port_id
13193 (dev, match_mask, match_value, items, attr);
13194 last_item = MLX5_FLOW_ITEM_PORT_ID;
13196 case RTE_FLOW_ITEM_TYPE_ETH:
13197 flow_dv_translate_item_eth(match_mask, match_value,
13199 dev_flow->dv.group);
13200 matcher.priority = action_flags &
13201 MLX5_FLOW_ACTION_DEFAULT_MISS &&
13202 !dev_flow->external ?
13203 MLX5_PRIORITY_MAP_L3 :
13204 MLX5_PRIORITY_MAP_L2;
13205 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13206 MLX5_FLOW_LAYER_OUTER_L2;
13208 case RTE_FLOW_ITEM_TYPE_VLAN:
13209 flow_dv_translate_item_vlan(dev_flow,
13210 match_mask, match_value,
13212 dev_flow->dv.group);
13213 matcher.priority = MLX5_PRIORITY_MAP_L2;
13214 last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13215 MLX5_FLOW_LAYER_INNER_VLAN) :
13216 (MLX5_FLOW_LAYER_OUTER_L2 |
13217 MLX5_FLOW_LAYER_OUTER_VLAN);
13219 case RTE_FLOW_ITEM_TYPE_IPV4:
13220 mlx5_flow_tunnel_ip_check(items, next_protocol,
13221 &item_flags, &tunnel);
13222 flow_dv_translate_item_ipv4(match_mask, match_value,
13224 dev_flow->dv.group);
13225 matcher.priority = MLX5_PRIORITY_MAP_L3;
13226 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13227 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13228 if (items->mask != NULL &&
13229 ((const struct rte_flow_item_ipv4 *)
13230 items->mask)->hdr.next_proto_id) {
13232 ((const struct rte_flow_item_ipv4 *)
13233 (items->spec))->hdr.next_proto_id;
13235 ((const struct rte_flow_item_ipv4 *)
13236 (items->mask))->hdr.next_proto_id;
13238 /* Reset for inner layer. */
13239 next_protocol = 0xff;
13242 case RTE_FLOW_ITEM_TYPE_IPV6:
13243 mlx5_flow_tunnel_ip_check(items, next_protocol,
13244 &item_flags, &tunnel);
13245 flow_dv_translate_item_ipv6(match_mask, match_value,
13247 dev_flow->dv.group);
13248 matcher.priority = MLX5_PRIORITY_MAP_L3;
13249 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13250 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13251 if (items->mask != NULL &&
13252 ((const struct rte_flow_item_ipv6 *)
13253 items->mask)->hdr.proto) {
13255 ((const struct rte_flow_item_ipv6 *)
13256 items->spec)->hdr.proto;
13258 ((const struct rte_flow_item_ipv6 *)
13259 items->mask)->hdr.proto;
13261 /* Reset for inner layer. */
13262 next_protocol = 0xff;
13265 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13266 flow_dv_translate_item_ipv6_frag_ext(match_mask,
13269 last_item = tunnel ?
13270 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13271 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13272 if (items->mask != NULL &&
13273 ((const struct rte_flow_item_ipv6_frag_ext *)
13274 items->mask)->hdr.next_header) {
13276 ((const struct rte_flow_item_ipv6_frag_ext *)
13277 items->spec)->hdr.next_header;
13279 ((const struct rte_flow_item_ipv6_frag_ext *)
13280 items->mask)->hdr.next_header;
13282 /* Reset for inner layer. */
13283 next_protocol = 0xff;
13286 case RTE_FLOW_ITEM_TYPE_TCP:
13287 flow_dv_translate_item_tcp(match_mask, match_value,
13289 matcher.priority = MLX5_PRIORITY_MAP_L4;
13290 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13291 MLX5_FLOW_LAYER_OUTER_L4_TCP;
13293 case RTE_FLOW_ITEM_TYPE_UDP:
13294 flow_dv_translate_item_udp(match_mask, match_value,
13296 matcher.priority = MLX5_PRIORITY_MAP_L4;
13297 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13298 MLX5_FLOW_LAYER_OUTER_L4_UDP;
13300 case RTE_FLOW_ITEM_TYPE_GRE:
13301 flow_dv_translate_item_gre(match_mask, match_value,
13303 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13304 last_item = MLX5_FLOW_LAYER_GRE;
13306 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13307 flow_dv_translate_item_gre_key(match_mask,
13308 match_value, items);
13309 last_item = MLX5_FLOW_LAYER_GRE_KEY;
13311 case RTE_FLOW_ITEM_TYPE_NVGRE:
13312 flow_dv_translate_item_nvgre(match_mask, match_value,
13314 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13315 last_item = MLX5_FLOW_LAYER_GRE;
13317 case RTE_FLOW_ITEM_TYPE_VXLAN:
13318 flow_dv_translate_item_vxlan(dev, attr,
13319 match_mask, match_value,
13321 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13322 last_item = MLX5_FLOW_LAYER_VXLAN;
13324 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13325 flow_dv_translate_item_vxlan_gpe(match_mask,
13326 match_value, items,
13328 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13329 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13331 case RTE_FLOW_ITEM_TYPE_GENEVE:
13332 flow_dv_translate_item_geneve(match_mask, match_value,
13334 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13335 last_item = MLX5_FLOW_LAYER_GENEVE;
13337 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13338 ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13342 return rte_flow_error_set(error, -ret,
13343 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13344 "cannot create GENEVE TLV option");
13345 flow->geneve_tlv_option = 1;
13346 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13348 case RTE_FLOW_ITEM_TYPE_MPLS:
13349 flow_dv_translate_item_mpls(match_mask, match_value,
13350 items, last_item, tunnel);
13351 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13352 last_item = MLX5_FLOW_LAYER_MPLS;
13354 case RTE_FLOW_ITEM_TYPE_MARK:
13355 flow_dv_translate_item_mark(dev, match_mask,
13356 match_value, items);
13357 last_item = MLX5_FLOW_ITEM_MARK;
13359 case RTE_FLOW_ITEM_TYPE_META:
13360 flow_dv_translate_item_meta(dev, match_mask,
13361 match_value, attr, items);
13362 last_item = MLX5_FLOW_ITEM_METADATA;
13364 case RTE_FLOW_ITEM_TYPE_ICMP:
13365 flow_dv_translate_item_icmp(match_mask, match_value,
13367 last_item = MLX5_FLOW_LAYER_ICMP;
13369 case RTE_FLOW_ITEM_TYPE_ICMP6:
13370 flow_dv_translate_item_icmp6(match_mask, match_value,
13372 last_item = MLX5_FLOW_LAYER_ICMP6;
13374 case RTE_FLOW_ITEM_TYPE_TAG:
13375 flow_dv_translate_item_tag(dev, match_mask,
13376 match_value, items);
13377 last_item = MLX5_FLOW_ITEM_TAG;
13379 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13380 flow_dv_translate_mlx5_item_tag(dev, match_mask,
13381 match_value, items);
13382 last_item = MLX5_FLOW_ITEM_TAG;
13384 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13385 flow_dv_translate_item_tx_queue(dev, match_mask,
13388 last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13390 case RTE_FLOW_ITEM_TYPE_GTP:
13391 flow_dv_translate_item_gtp(match_mask, match_value,
13393 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13394 last_item = MLX5_FLOW_LAYER_GTP;
13396 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13397 ret = flow_dv_translate_item_gtp_psc(match_mask,
13401 return rte_flow_error_set(error, -ret,
13402 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13403 "cannot create GTP PSC item");
13404 last_item = MLX5_FLOW_LAYER_GTP_PSC;
13406 case RTE_FLOW_ITEM_TYPE_ECPRI:
13407 if (!mlx5_flex_parser_ecpri_exist(dev)) {
13408 /* Create it only the first time to be used. */
13409 ret = mlx5_flex_parser_ecpri_alloc(dev);
13411 return rte_flow_error_set
13413 RTE_FLOW_ERROR_TYPE_ITEM,
13415 "cannot create eCPRI parser");
13417 flow_dv_translate_item_ecpri(dev, match_mask,
13418 match_value, items,
13420 /* No other protocol should follow eCPRI layer. */
13421 last_item = MLX5_FLOW_LAYER_ECPRI;
13423 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13424 flow_dv_translate_item_integrity(items, integrity_items,
13427 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13428 flow_dv_translate_item_aso_ct(dev, match_mask,
13429 match_value, items);
13434 item_flags |= last_item;
13437 * When E-Switch mode is enabled, we have two cases where we need to
13438 * set the source port manually.
13439 * The first one, is in case of Nic steering rule, and the second is
13440 * E-Switch rule where no port_id item was found. In both cases
13441 * the source port is set according the current port in use.
13443 if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13444 (priv->representor || priv->master)) {
13445 if (flow_dv_translate_item_port_id(dev, match_mask,
13446 match_value, NULL, attr))
13449 if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
13450 flow_dv_translate_item_integrity_post(match_mask, match_value,
13454 #ifdef RTE_LIBRTE_MLX5_DEBUG
13455 MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13456 dev_flow->dv.value.buf));
13459 * Layers may be already initialized from prefix flow if this dev_flow
13460 * is the suffix flow.
13462 handle->layers |= item_flags;
13463 if (action_flags & MLX5_FLOW_ACTION_RSS)
13464 flow_dv_hashfields_set(dev_flow, rss_desc);
13465 /* If has RSS action in the sample action, the Sample/Mirror resource
13466 * should be registered after the hash filed be update.
13468 if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13469 ret = flow_dv_translate_action_sample(dev,
13478 ret = flow_dv_create_action_sample(dev,
13487 return rte_flow_error_set
13489 RTE_FLOW_ERROR_TYPE_ACTION,
13491 "cannot create sample action");
13492 if (num_of_dest > 1) {
13493 dev_flow->dv.actions[sample_act_pos] =
13494 dev_flow->dv.dest_array_res->action;
13496 dev_flow->dv.actions[sample_act_pos] =
13497 dev_flow->dv.sample_res->verbs_action;
13501 * For multiple destination (sample action with ratio=1), the encap
13502 * action and port id action will be combined into group action.
13503 * So need remove the original these actions in the flow and only
13504 * use the sample action instead of.
13506 if (num_of_dest > 1 &&
13507 (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13509 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13511 for (i = 0; i < actions_n; i++) {
13512 if ((sample_act->dr_encap_action &&
13513 sample_act->dr_encap_action ==
13514 dev_flow->dv.actions[i]) ||
13515 (sample_act->dr_port_id_action &&
13516 sample_act->dr_port_id_action ==
13517 dev_flow->dv.actions[i]) ||
13518 (sample_act->dr_jump_action &&
13519 sample_act->dr_jump_action ==
13520 dev_flow->dv.actions[i]))
13522 temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13524 memcpy((void *)dev_flow->dv.actions,
13525 (void *)temp_actions,
13526 tmp_actions_n * sizeof(void *));
13527 actions_n = tmp_actions_n;
13529 dev_flow->dv.actions_n = actions_n;
13530 dev_flow->act_flags = action_flags;
13531 if (wks->skip_matcher_reg)
13533 /* Register matcher. */
13534 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13535 matcher.mask.size);
13536 matcher.priority = mlx5_get_matcher_priority(dev, attr,
13538 dev_flow->external);
13540 * When creating meter drop flow in drop table, using original
13541 * 5-tuple match, the matcher priority should be lower than
13544 if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13545 dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13546 matcher.priority <= MLX5_REG_BITS)
13547 matcher.priority += MLX5_REG_BITS;
13548 /* reserved field no needs to be set to 0 here. */
13549 tbl_key.is_fdb = attr->transfer;
13550 tbl_key.is_egress = attr->egress;
13551 tbl_key.level = dev_flow->dv.group;
13552 tbl_key.id = dev_flow->dv.table_id;
13553 if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13554 tunnel, attr->group, error))
13560 * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13563 * @param[in, out] action
13564 * Shred RSS action holding hash RX queue objects.
13565 * @param[in] hash_fields
13566 * Defines combination of packet fields to participate in RX hash.
13567 * @param[in] tunnel
13569 * @param[in] hrxq_idx
13570 * Hash RX queue index to set.
13573 * 0 on success, otherwise negative errno value.
13576 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13577 const uint64_t hash_fields,
13580 uint32_t *hrxqs = action->hrxq;
13582 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13583 case MLX5_RSS_HASH_IPV4:
13584 /* fall-through. */
13585 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13586 /* fall-through. */
13587 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13588 hrxqs[0] = hrxq_idx;
13590 case MLX5_RSS_HASH_IPV4_TCP:
13591 /* fall-through. */
13592 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13593 /* fall-through. */
13594 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13595 hrxqs[1] = hrxq_idx;
13597 case MLX5_RSS_HASH_IPV4_UDP:
13598 /* fall-through. */
13599 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13600 /* fall-through. */
13601 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13602 hrxqs[2] = hrxq_idx;
13604 case MLX5_RSS_HASH_IPV6:
13605 /* fall-through. */
13606 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13607 /* fall-through. */
13608 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13609 hrxqs[3] = hrxq_idx;
13611 case MLX5_RSS_HASH_IPV6_TCP:
13612 /* fall-through. */
13613 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13614 /* fall-through. */
13615 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13616 hrxqs[4] = hrxq_idx;
13618 case MLX5_RSS_HASH_IPV6_UDP:
13619 /* fall-through. */
13620 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13621 /* fall-through. */
13622 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13623 hrxqs[5] = hrxq_idx;
13625 case MLX5_RSS_HASH_NONE:
13626 hrxqs[6] = hrxq_idx;
13634 * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13638 * Pointer to the Ethernet device structure.
13640 * Shared RSS action ID holding hash RX queue objects.
13641 * @param[in] hash_fields
13642 * Defines combination of packet fields to participate in RX hash.
13643 * @param[in] tunnel
13647 * Valid hash RX queue index, otherwise 0.
13650 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13651 const uint64_t hash_fields)
13653 struct mlx5_priv *priv = dev->data->dev_private;
13654 struct mlx5_shared_action_rss *shared_rss =
13655 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13656 const uint32_t *hrxqs = shared_rss->hrxq;
13658 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13659 case MLX5_RSS_HASH_IPV4:
13660 /* fall-through. */
13661 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13662 /* fall-through. */
13663 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13665 case MLX5_RSS_HASH_IPV4_TCP:
13666 /* fall-through. */
13667 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13668 /* fall-through. */
13669 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13671 case MLX5_RSS_HASH_IPV4_UDP:
13672 /* fall-through. */
13673 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13674 /* fall-through. */
13675 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13677 case MLX5_RSS_HASH_IPV6:
13678 /* fall-through. */
13679 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13680 /* fall-through. */
13681 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13683 case MLX5_RSS_HASH_IPV6_TCP:
13684 /* fall-through. */
13685 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13686 /* fall-through. */
13687 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13689 case MLX5_RSS_HASH_IPV6_UDP:
13690 /* fall-through. */
13691 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13692 /* fall-through. */
13693 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13695 case MLX5_RSS_HASH_NONE:
13704 * Apply the flow to the NIC, lock free,
13705 * (mutex should be acquired by caller).
13708 * Pointer to the Ethernet device structure.
13709 * @param[in, out] flow
13710 * Pointer to flow structure.
13711 * @param[out] error
13712 * Pointer to error structure.
13715 * 0 on success, a negative errno value otherwise and rte_errno is set.
13718 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13719 struct rte_flow_error *error)
13721 struct mlx5_flow_dv_workspace *dv;
13722 struct mlx5_flow_handle *dh;
13723 struct mlx5_flow_handle_dv *dv_h;
13724 struct mlx5_flow *dev_flow;
13725 struct mlx5_priv *priv = dev->data->dev_private;
13726 uint32_t handle_idx;
13730 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13731 struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13735 for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13736 dev_flow = &wks->flows[idx];
13737 dv = &dev_flow->dv;
13738 dh = dev_flow->handle;
13741 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13742 if (dv->transfer) {
13743 MLX5_ASSERT(priv->sh->dr_drop_action);
13744 dv->actions[n++] = priv->sh->dr_drop_action;
13746 #ifdef HAVE_MLX5DV_DR
13747 /* DR supports drop action placeholder. */
13748 MLX5_ASSERT(priv->sh->dr_drop_action);
13749 dv->actions[n++] = dv->group ?
13750 priv->sh->dr_drop_action :
13751 priv->root_drop_action;
13753 /* For DV we use the explicit drop queue. */
13754 MLX5_ASSERT(priv->drop_queue.hrxq);
13756 priv->drop_queue.hrxq->action;
13759 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13760 !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13761 struct mlx5_hrxq *hrxq;
13764 hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13769 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13770 "cannot get hash queue");
13773 dh->rix_hrxq = hrxq_idx;
13774 dv->actions[n++] = hrxq->action;
13775 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13776 struct mlx5_hrxq *hrxq = NULL;
13779 hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13780 rss_desc->shared_rss,
13781 dev_flow->hash_fields);
13783 hrxq = mlx5_ipool_get
13784 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13789 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13790 "cannot get hash queue");
13793 dh->rix_srss = rss_desc->shared_rss;
13794 dv->actions[n++] = hrxq->action;
13795 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13796 if (!priv->sh->default_miss_action) {
13799 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13800 "default miss action not be created.");
13803 dv->actions[n++] = priv->sh->default_miss_action;
13805 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13806 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13807 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13808 (void *)&dv->value, n,
13809 dv->actions, &dh->drv_flow);
13813 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13815 (!priv->config.allow_duplicate_pattern &&
13817 "duplicating pattern is not allowed" :
13818 "hardware refuses to create flow");
13821 if (priv->vmwa_context &&
13822 dh->vf_vlan.tag && !dh->vf_vlan.created) {
13824 * The rule contains the VLAN pattern.
13825 * For VF we are going to create VLAN
13826 * interface to make hypervisor set correct
13827 * e-Switch vport context.
13829 mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13834 err = rte_errno; /* Save rte_errno before cleanup. */
13835 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13836 handle_idx, dh, next) {
13837 /* hrxq is union, don't clear it if the flag is not set. */
13838 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13839 mlx5_hrxq_release(dev, dh->rix_hrxq);
13841 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13844 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13845 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13847 rte_errno = err; /* Restore rte_errno. */
13852 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
13853 struct mlx5_list_entry *entry)
13855 struct mlx5_flow_dv_matcher *resource = container_of(entry,
13859 claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
13860 mlx5_free(resource);
13864 * Release the flow matcher.
13867 * Pointer to Ethernet device.
13869 * Index to port ID action resource.
13872 * 1 while a reference on it exists, 0 when freed.
13875 flow_dv_matcher_release(struct rte_eth_dev *dev,
13876 struct mlx5_flow_handle *handle)
13878 struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13879 struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
13880 typeof(*tbl), tbl);
13883 MLX5_ASSERT(matcher->matcher_object);
13884 ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
13885 flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
13890 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13892 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13893 struct mlx5_flow_dv_encap_decap_resource *res =
13894 container_of(entry, typeof(*res), entry);
13896 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13897 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
13901 * Release an encap/decap resource.
13904 * Pointer to Ethernet device.
13905 * @param encap_decap_idx
13906 * Index of encap decap resource.
13909 * 1 while a reference on it exists, 0 when freed.
13912 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
13913 uint32_t encap_decap_idx)
13915 struct mlx5_priv *priv = dev->data->dev_private;
13916 struct mlx5_flow_dv_encap_decap_resource *resource;
13918 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
13922 MLX5_ASSERT(resource->action);
13923 return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
13927 * Release an jump to table action resource.
13930 * Pointer to Ethernet device.
13932 * Index to the jump action resource.
13935 * 1 while a reference on it exists, 0 when freed.
13938 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
13941 struct mlx5_priv *priv = dev->data->dev_private;
13942 struct mlx5_flow_tbl_data_entry *tbl_data;
13944 tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
13948 return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
13952 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13954 struct mlx5_flow_dv_modify_hdr_resource *res =
13955 container_of(entry, typeof(*res), entry);
13956 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13958 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13959 mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
13963 * Release a modify-header resource.
13966 * Pointer to Ethernet device.
13968 * Pointer to mlx5_flow_handle.
13971 * 1 while a reference on it exists, 0 when freed.
13974 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
13975 struct mlx5_flow_handle *handle)
13977 struct mlx5_priv *priv = dev->data->dev_private;
13978 struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
13980 MLX5_ASSERT(entry->action);
13981 return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
13985 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13987 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13988 struct mlx5_flow_dv_port_id_action_resource *resource =
13989 container_of(entry, typeof(*resource), entry);
13991 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
13992 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
13996 * Release port ID action resource.
13999 * Pointer to Ethernet device.
14001 * Pointer to mlx5_flow_handle.
14004 * 1 while a reference on it exists, 0 when freed.
14007 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14010 struct mlx5_priv *priv = dev->data->dev_private;
14011 struct mlx5_flow_dv_port_id_action_resource *resource;
14013 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14016 MLX5_ASSERT(resource->action);
14017 return mlx5_list_unregister(priv->sh->port_id_action_list,
14022 * Release shared RSS action resource.
14025 * Pointer to Ethernet device.
14027 * Shared RSS action index.
14030 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14032 struct mlx5_priv *priv = dev->data->dev_private;
14033 struct mlx5_shared_action_rss *shared_rss;
14035 shared_rss = mlx5_ipool_get
14036 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14037 __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14041 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14043 struct mlx5_dev_ctx_shared *sh = tool_ctx;
14044 struct mlx5_flow_dv_push_vlan_action_resource *resource =
14045 container_of(entry, typeof(*resource), entry);
14047 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14048 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14052 * Release push vlan action resource.
14055 * Pointer to Ethernet device.
14057 * Pointer to mlx5_flow_handle.
14060 * 1 while a reference on it exists, 0 when freed.
14063 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14064 struct mlx5_flow_handle *handle)
14066 struct mlx5_priv *priv = dev->data->dev_private;
14067 struct mlx5_flow_dv_push_vlan_action_resource *resource;
14068 uint32_t idx = handle->dvh.rix_push_vlan;
14070 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14073 MLX5_ASSERT(resource->action);
14074 return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14079 * Release the fate resource.
14082 * Pointer to Ethernet device.
14084 * Pointer to mlx5_flow_handle.
14087 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14088 struct mlx5_flow_handle *handle)
14090 if (!handle->rix_fate)
14092 switch (handle->fate_action) {
14093 case MLX5_FLOW_FATE_QUEUE:
14094 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14095 mlx5_hrxq_release(dev, handle->rix_hrxq);
14097 case MLX5_FLOW_FATE_JUMP:
14098 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14100 case MLX5_FLOW_FATE_PORT_ID:
14101 flow_dv_port_id_action_resource_release(dev,
14102 handle->rix_port_id_action);
14105 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14108 handle->rix_fate = 0;
14112 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14113 struct mlx5_list_entry *entry)
14115 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14118 struct rte_eth_dev *dev = resource->dev;
14119 struct mlx5_priv *priv = dev->data->dev_private;
14121 if (resource->verbs_action)
14122 claim_zero(mlx5_flow_os_destroy_flow_action
14123 (resource->verbs_action));
14124 if (resource->normal_path_tbl)
14125 flow_dv_tbl_resource_release(MLX5_SH(dev),
14126 resource->normal_path_tbl);
14127 flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14128 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14129 DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14133 * Release an sample resource.
14136 * Pointer to Ethernet device.
14138 * Pointer to mlx5_flow_handle.
14141 * 1 while a reference on it exists, 0 when freed.
14144 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14145 struct mlx5_flow_handle *handle)
14147 struct mlx5_priv *priv = dev->data->dev_private;
14148 struct mlx5_flow_dv_sample_resource *resource;
14150 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14151 handle->dvh.rix_sample);
14154 MLX5_ASSERT(resource->verbs_action);
14155 return mlx5_list_unregister(priv->sh->sample_action_list,
14160 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14161 struct mlx5_list_entry *entry)
14163 struct mlx5_flow_dv_dest_array_resource *resource =
14164 container_of(entry, typeof(*resource), entry);
14165 struct rte_eth_dev *dev = resource->dev;
14166 struct mlx5_priv *priv = dev->data->dev_private;
14169 MLX5_ASSERT(resource->action);
14170 if (resource->action)
14171 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14172 for (; i < resource->num_of_dest; i++)
14173 flow_dv_sample_sub_actions_release(dev,
14174 &resource->sample_idx[i]);
14175 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14176 DRV_LOG(DEBUG, "destination array resource %p: removed",
14181 * Release an destination array resource.
14184 * Pointer to Ethernet device.
14186 * Pointer to mlx5_flow_handle.
14189 * 1 while a reference on it exists, 0 when freed.
14192 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14193 struct mlx5_flow_handle *handle)
14195 struct mlx5_priv *priv = dev->data->dev_private;
14196 struct mlx5_flow_dv_dest_array_resource *resource;
14198 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14199 handle->dvh.rix_dest_array);
14202 MLX5_ASSERT(resource->action);
14203 return mlx5_list_unregister(priv->sh->dest_array_list,
14208 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14210 struct mlx5_priv *priv = dev->data->dev_private;
14211 struct mlx5_dev_ctx_shared *sh = priv->sh;
14212 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14213 sh->geneve_tlv_option_resource;
14214 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14215 if (geneve_opt_resource) {
14216 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14217 __ATOMIC_RELAXED))) {
14218 claim_zero(mlx5_devx_cmd_destroy
14219 (geneve_opt_resource->obj));
14220 mlx5_free(sh->geneve_tlv_option_resource);
14221 sh->geneve_tlv_option_resource = NULL;
14224 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14228 * Remove the flow from the NIC but keeps it in memory.
14229 * Lock free, (mutex should be acquired by caller).
14232 * Pointer to Ethernet device.
14233 * @param[in, out] flow
14234 * Pointer to flow structure.
14237 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14239 struct mlx5_flow_handle *dh;
14240 uint32_t handle_idx;
14241 struct mlx5_priv *priv = dev->data->dev_private;
14245 handle_idx = flow->dev_handles;
14246 while (handle_idx) {
14247 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14251 if (dh->drv_flow) {
14252 claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14253 dh->drv_flow = NULL;
14255 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14256 flow_dv_fate_resource_release(dev, dh);
14257 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14258 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14259 handle_idx = dh->next.next;
14264 * Remove the flow from the NIC and the memory.
14265 * Lock free, (mutex should be acquired by caller).
14268 * Pointer to the Ethernet device structure.
14269 * @param[in, out] flow
14270 * Pointer to flow structure.
14273 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14275 struct mlx5_flow_handle *dev_handle;
14276 struct mlx5_priv *priv = dev->data->dev_private;
14277 struct mlx5_flow_meter_info *fm = NULL;
14282 flow_dv_remove(dev, flow);
14283 if (flow->counter) {
14284 flow_dv_counter_free(dev, flow->counter);
14288 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14290 mlx5_flow_meter_detach(priv, fm);
14293 /* Keep the current age handling by default. */
14294 if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14295 flow_dv_aso_ct_release(dev, flow->ct, NULL);
14296 else if (flow->age)
14297 flow_dv_aso_age_release(dev, flow->age);
14298 if (flow->geneve_tlv_option) {
14299 flow_dv_geneve_tlv_option_resource_release(dev);
14300 flow->geneve_tlv_option = 0;
14302 while (flow->dev_handles) {
14303 uint32_t tmp_idx = flow->dev_handles;
14305 dev_handle = mlx5_ipool_get(priv->sh->ipool
14306 [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14309 flow->dev_handles = dev_handle->next.next;
14310 if (dev_handle->dvh.matcher)
14311 flow_dv_matcher_release(dev, dev_handle);
14312 if (dev_handle->dvh.rix_sample)
14313 flow_dv_sample_resource_release(dev, dev_handle);
14314 if (dev_handle->dvh.rix_dest_array)
14315 flow_dv_dest_array_resource_release(dev, dev_handle);
14316 if (dev_handle->dvh.rix_encap_decap)
14317 flow_dv_encap_decap_resource_release(dev,
14318 dev_handle->dvh.rix_encap_decap);
14319 if (dev_handle->dvh.modify_hdr)
14320 flow_dv_modify_hdr_resource_release(dev, dev_handle);
14321 if (dev_handle->dvh.rix_push_vlan)
14322 flow_dv_push_vlan_action_resource_release(dev,
14324 if (dev_handle->dvh.rix_tag)
14325 flow_dv_tag_release(dev,
14326 dev_handle->dvh.rix_tag);
14327 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14328 flow_dv_fate_resource_release(dev, dev_handle);
14330 srss = dev_handle->rix_srss;
14331 if (fm && dev_handle->is_meter_flow_id &&
14332 dev_handle->split_flow_id)
14333 mlx5_ipool_free(fm->flow_ipool,
14334 dev_handle->split_flow_id);
14335 else if (dev_handle->split_flow_id &&
14336 !dev_handle->is_meter_flow_id)
14337 mlx5_ipool_free(priv->sh->ipool
14338 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14339 dev_handle->split_flow_id);
14340 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14344 flow_dv_shared_rss_action_release(dev, srss);
14348 * Release array of hash RX queue objects.
14352 * Pointer to the Ethernet device structure.
14353 * @param[in, out] hrxqs
14354 * Array of hash RX queue objects.
14357 * Total number of references to hash RX queue objects in *hrxqs* array
14358 * after this operation.
14361 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14362 uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14367 for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14368 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14378 * Release all hash RX queue objects representing shared RSS action.
14381 * Pointer to the Ethernet device structure.
14382 * @param[in, out] action
14383 * Shared RSS action to remove hash RX queue objects from.
14386 * Total number of references to hash RX queue objects stored in *action*
14387 * after this operation.
14388 * Expected to be 0 if no external references held.
14391 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14392 struct mlx5_shared_action_rss *shared_rss)
14394 return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14398 * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14401 * Only one hash value is available for one L3+L4 combination:
14403 * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14404 * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14405 * same slot in mlx5_rss_hash_fields.
14408 * Pointer to the shared action RSS conf.
14409 * @param[in, out] hash_field
14410 * hash_field variable needed to be adjusted.
14416 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14417 uint64_t *hash_field)
14419 uint64_t rss_types = rss->origin.types;
14421 switch (*hash_field & ~IBV_RX_HASH_INNER) {
14422 case MLX5_RSS_HASH_IPV4:
14423 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14424 *hash_field &= ~MLX5_RSS_HASH_IPV4;
14425 if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14426 *hash_field |= IBV_RX_HASH_DST_IPV4;
14427 else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14428 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14430 *hash_field |= MLX5_RSS_HASH_IPV4;
14433 case MLX5_RSS_HASH_IPV6:
14434 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14435 *hash_field &= ~MLX5_RSS_HASH_IPV6;
14436 if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14437 *hash_field |= IBV_RX_HASH_DST_IPV6;
14438 else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14439 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14441 *hash_field |= MLX5_RSS_HASH_IPV6;
14444 case MLX5_RSS_HASH_IPV4_UDP:
14445 /* fall-through. */
14446 case MLX5_RSS_HASH_IPV6_UDP:
14447 if (rss_types & RTE_ETH_RSS_UDP) {
14448 *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14449 if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14450 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14451 else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14452 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14454 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14457 case MLX5_RSS_HASH_IPV4_TCP:
14458 /* fall-through. */
14459 case MLX5_RSS_HASH_IPV6_TCP:
14460 if (rss_types & RTE_ETH_RSS_TCP) {
14461 *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14462 if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14463 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14464 else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14465 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14467 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14476 * Setup shared RSS action.
14477 * Prepare set of hash RX queue objects sufficient to handle all valid
14478 * hash_fields combinations (see enum ibv_rx_hash_fields).
14481 * Pointer to the Ethernet device structure.
14482 * @param[in] action_idx
14483 * Shared RSS action ipool index.
14484 * @param[in, out] action
14485 * Partially initialized shared RSS action.
14486 * @param[out] error
14487 * Perform verbose error reporting if not NULL. Initialized in case of
14491 * 0 on success, otherwise negative errno value.
14494 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14495 uint32_t action_idx,
14496 struct mlx5_shared_action_rss *shared_rss,
14497 struct rte_flow_error *error)
14499 struct mlx5_flow_rss_desc rss_desc = { 0 };
14503 if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
14504 return rte_flow_error_set(error, rte_errno,
14505 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14506 "cannot setup indirection table");
14508 memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14509 rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14510 rss_desc.const_q = shared_rss->origin.queue;
14511 rss_desc.queue_num = shared_rss->origin.queue_num;
14512 /* Set non-zero value to indicate a shared RSS. */
14513 rss_desc.shared_rss = action_idx;
14514 rss_desc.ind_tbl = shared_rss->ind_tbl;
14515 for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14517 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14520 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14521 if (shared_rss->origin.level > 1) {
14522 hash_fields |= IBV_RX_HASH_INNER;
14525 rss_desc.tunnel = tunnel;
14526 rss_desc.hash_fields = hash_fields;
14527 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14531 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14532 "cannot get hash queue");
14533 goto error_hrxq_new;
14535 err = __flow_dv_action_rss_hrxq_set
14536 (shared_rss, hash_fields, hrxq_idx);
14542 __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14543 if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14544 shared_rss->ind_tbl = NULL;
14550 * Create shared RSS action.
14553 * Pointer to the Ethernet device structure.
14555 * Shared action configuration.
14557 * RSS action specification used to create shared action.
14558 * @param[out] error
14559 * Perform verbose error reporting if not NULL. Initialized in case of
14563 * A valid shared action ID in case of success, 0 otherwise and
14564 * rte_errno is set.
14567 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14568 const struct rte_flow_indir_action_conf *conf,
14569 const struct rte_flow_action_rss *rss,
14570 struct rte_flow_error *error)
14572 struct mlx5_priv *priv = dev->data->dev_private;
14573 struct mlx5_shared_action_rss *shared_rss = NULL;
14574 void *queue = NULL;
14575 struct rte_flow_action_rss *origin;
14576 const uint8_t *rss_key;
14577 uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14580 RTE_SET_USED(conf);
14581 queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14583 shared_rss = mlx5_ipool_zmalloc
14584 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14585 if (!shared_rss || !queue) {
14586 rte_flow_error_set(error, ENOMEM,
14587 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14588 "cannot allocate resource memory");
14589 goto error_rss_init;
14591 if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14592 rte_flow_error_set(error, E2BIG,
14593 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14594 "rss action number out of range");
14595 goto error_rss_init;
14597 shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14598 sizeof(*shared_rss->ind_tbl),
14600 if (!shared_rss->ind_tbl) {
14601 rte_flow_error_set(error, ENOMEM,
14602 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14603 "cannot allocate resource memory");
14604 goto error_rss_init;
14606 memcpy(queue, rss->queue, queue_size);
14607 shared_rss->ind_tbl->queues = queue;
14608 shared_rss->ind_tbl->queues_n = rss->queue_num;
14609 origin = &shared_rss->origin;
14610 origin->func = rss->func;
14611 origin->level = rss->level;
14612 /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
14613 origin->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
14614 /* NULL RSS key indicates default RSS key. */
14615 rss_key = !rss->key ? rss_hash_default_key : rss->key;
14616 memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14617 origin->key = &shared_rss->key[0];
14618 origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14619 origin->queue = queue;
14620 origin->queue_num = rss->queue_num;
14621 if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14622 goto error_rss_init;
14623 rte_spinlock_init(&shared_rss->action_rss_sl);
14624 __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14625 rte_spinlock_lock(&priv->shared_act_sl);
14626 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14627 &priv->rss_shared_actions, idx, shared_rss, next);
14628 rte_spinlock_unlock(&priv->shared_act_sl);
14632 if (shared_rss->ind_tbl)
14633 mlx5_free(shared_rss->ind_tbl);
14634 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14643 * Destroy the shared RSS action.
14644 * Release related hash RX queue objects.
14647 * Pointer to the Ethernet device structure.
14649 * The shared RSS action object ID to be removed.
14650 * @param[out] error
14651 * Perform verbose error reporting if not NULL. Initialized in case of
14655 * 0 on success, otherwise negative errno value.
14658 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14659 struct rte_flow_error *error)
14661 struct mlx5_priv *priv = dev->data->dev_private;
14662 struct mlx5_shared_action_rss *shared_rss =
14663 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14664 uint32_t old_refcnt = 1;
14666 uint16_t *queue = NULL;
14669 return rte_flow_error_set(error, EINVAL,
14670 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14671 "invalid shared action");
14672 if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14673 0, 0, __ATOMIC_ACQUIRE,
14675 return rte_flow_error_set(error, EBUSY,
14676 RTE_FLOW_ERROR_TYPE_ACTION,
14678 "shared rss has references");
14679 remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14681 return rte_flow_error_set(error, EBUSY,
14682 RTE_FLOW_ERROR_TYPE_ACTION,
14684 "shared rss hrxq has references");
14685 queue = shared_rss->ind_tbl->queues;
14686 remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14688 return rte_flow_error_set(error, EBUSY,
14689 RTE_FLOW_ERROR_TYPE_ACTION,
14691 "shared rss indirection table has"
14694 rte_spinlock_lock(&priv->shared_act_sl);
14695 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14696 &priv->rss_shared_actions, idx, shared_rss, next);
14697 rte_spinlock_unlock(&priv->shared_act_sl);
14698 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14704 * Create indirect action, lock free,
14705 * (mutex should be acquired by caller).
14706 * Dispatcher for action type specific call.
14709 * Pointer to the Ethernet device structure.
14711 * Shared action configuration.
14712 * @param[in] action
14713 * Action specification used to create indirect action.
14714 * @param[out] error
14715 * Perform verbose error reporting if not NULL. Initialized in case of
14719 * A valid shared action handle in case of success, NULL otherwise and
14720 * rte_errno is set.
14722 static struct rte_flow_action_handle *
14723 flow_dv_action_create(struct rte_eth_dev *dev,
14724 const struct rte_flow_indir_action_conf *conf,
14725 const struct rte_flow_action *action,
14726 struct rte_flow_error *err)
14728 struct mlx5_priv *priv = dev->data->dev_private;
14729 uint32_t age_idx = 0;
14733 switch (action->type) {
14734 case RTE_FLOW_ACTION_TYPE_RSS:
14735 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14736 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14737 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14739 case RTE_FLOW_ACTION_TYPE_AGE:
14740 age_idx = flow_dv_aso_age_alloc(dev, err);
14745 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14746 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14747 flow_dv_aso_age_params_init(dev, age_idx,
14748 ((const struct rte_flow_action_age *)
14749 action->conf)->context ?
14750 ((const struct rte_flow_action_age *)
14751 action->conf)->context :
14752 (void *)(uintptr_t)idx,
14753 ((const struct rte_flow_action_age *)
14754 action->conf)->timeout);
14757 case RTE_FLOW_ACTION_TYPE_COUNT:
14758 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14759 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14760 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14762 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14763 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14765 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14768 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14769 NULL, "action type not supported");
14772 return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14776 * Destroy the indirect action.
14777 * Release action related resources on the NIC and the memory.
14778 * Lock free, (mutex should be acquired by caller).
14779 * Dispatcher for action type specific call.
14782 * Pointer to the Ethernet device structure.
14783 * @param[in] handle
14784 * The indirect action object handle to be removed.
14785 * @param[out] error
14786 * Perform verbose error reporting if not NULL. Initialized in case of
14790 * 0 on success, otherwise negative errno value.
14793 flow_dv_action_destroy(struct rte_eth_dev *dev,
14794 struct rte_flow_action_handle *handle,
14795 struct rte_flow_error *error)
14797 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14798 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14799 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14800 struct mlx5_flow_counter *cnt;
14801 uint32_t no_flow_refcnt = 1;
14805 case MLX5_INDIRECT_ACTION_TYPE_RSS:
14806 return __flow_dv_action_rss_release(dev, idx, error);
14807 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14808 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14809 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14810 &no_flow_refcnt, 1, false,
14813 return rte_flow_error_set(error, EBUSY,
14814 RTE_FLOW_ERROR_TYPE_ACTION,
14816 "Indirect count action has references");
14817 flow_dv_counter_free(dev, idx);
14819 case MLX5_INDIRECT_ACTION_TYPE_AGE:
14820 ret = flow_dv_aso_age_release(dev, idx);
14823 * In this case, the last flow has a reference will
14824 * actually release the age action.
14826 DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14827 " released with references %d.", idx, ret);
14829 case MLX5_INDIRECT_ACTION_TYPE_CT:
14830 ret = flow_dv_aso_ct_release(dev, idx, error);
14834 DRV_LOG(DEBUG, "Connection tracking object %u still "
14835 "has references %d.", idx, ret);
14838 return rte_flow_error_set(error, ENOTSUP,
14839 RTE_FLOW_ERROR_TYPE_ACTION,
14841 "action type not supported");
14846 * Updates in place shared RSS action configuration.
14849 * Pointer to the Ethernet device structure.
14851 * The shared RSS action object ID to be updated.
14852 * @param[in] action_conf
14853 * RSS action specification used to modify *shared_rss*.
14854 * @param[out] error
14855 * Perform verbose error reporting if not NULL. Initialized in case of
14859 * 0 on success, otherwise negative errno value.
14860 * @note: currently only support update of RSS queues.
14863 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14864 const struct rte_flow_action_rss *action_conf,
14865 struct rte_flow_error *error)
14867 struct mlx5_priv *priv = dev->data->dev_private;
14868 struct mlx5_shared_action_rss *shared_rss =
14869 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14871 void *queue = NULL;
14872 uint16_t *queue_old = NULL;
14873 uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
14876 return rte_flow_error_set(error, EINVAL,
14877 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14878 "invalid shared action to update");
14879 if (priv->obj_ops.ind_table_modify == NULL)
14880 return rte_flow_error_set(error, ENOTSUP,
14881 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14882 "cannot modify indirection table");
14883 queue = mlx5_malloc(MLX5_MEM_ZERO,
14884 RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14887 return rte_flow_error_set(error, ENOMEM,
14888 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14890 "cannot allocate resource memory");
14891 memcpy(queue, action_conf->queue, queue_size);
14892 MLX5_ASSERT(shared_rss->ind_tbl);
14893 rte_spinlock_lock(&shared_rss->action_rss_sl);
14894 queue_old = shared_rss->ind_tbl->queues;
14895 ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
14896 queue, action_conf->queue_num, true);
14899 ret = rte_flow_error_set(error, rte_errno,
14900 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14901 "cannot update indirection table");
14903 mlx5_free(queue_old);
14904 shared_rss->origin.queue = queue;
14905 shared_rss->origin.queue_num = action_conf->queue_num;
14907 rte_spinlock_unlock(&shared_rss->action_rss_sl);
14912 * Updates in place conntrack context or direction.
14913 * Context update should be synchronized.
14916 * Pointer to the Ethernet device structure.
14918 * The conntrack object ID to be updated.
14919 * @param[in] update
14920 * Pointer to the structure of information to update.
14921 * @param[out] error
14922 * Perform verbose error reporting if not NULL. Initialized in case of
14926 * 0 on success, otherwise negative errno value.
14929 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
14930 const struct rte_flow_modify_conntrack *update,
14931 struct rte_flow_error *error)
14933 struct mlx5_priv *priv = dev->data->dev_private;
14934 struct mlx5_aso_ct_action *ct;
14935 const struct rte_flow_action_conntrack *new_prf;
14937 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
14940 if (PORT_ID(priv) != owner)
14941 return rte_flow_error_set(error, EACCES,
14942 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14944 "CT object owned by another port");
14945 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
14946 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
14948 return rte_flow_error_set(error, ENOMEM,
14949 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14951 "CT object is inactive");
14952 new_prf = &update->new_ct;
14953 if (update->direction)
14954 ct->is_original = !!new_prf->is_original_dir;
14955 if (update->state) {
14956 /* Only validate the profile when it needs to be updated. */
14957 ret = mlx5_validate_action_ct(dev, new_prf, error);
14960 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
14962 return rte_flow_error_set(error, EIO,
14963 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14965 "Failed to send CT context update WQE");
14966 /* Block until ready or a failure. */
14967 ret = mlx5_aso_ct_available(priv->sh, ct);
14969 rte_flow_error_set(error, rte_errno,
14970 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14972 "Timeout to get the CT update");
14978 * Updates in place shared action configuration, lock free,
14979 * (mutex should be acquired by caller).
14982 * Pointer to the Ethernet device structure.
14983 * @param[in] handle
14984 * The indirect action object handle to be updated.
14985 * @param[in] update
14986 * Action specification used to modify the action pointed by *handle*.
14987 * *update* could be of same type with the action pointed by the *handle*
14988 * handle argument, or some other structures like a wrapper, depending on
14989 * the indirect action type.
14990 * @param[out] error
14991 * Perform verbose error reporting if not NULL. Initialized in case of
14995 * 0 on success, otherwise negative errno value.
14998 flow_dv_action_update(struct rte_eth_dev *dev,
14999 struct rte_flow_action_handle *handle,
15000 const void *update,
15001 struct rte_flow_error *err)
15003 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15004 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15005 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15006 const void *action_conf;
15009 case MLX5_INDIRECT_ACTION_TYPE_RSS:
15010 action_conf = ((const struct rte_flow_action *)update)->conf;
15011 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15012 case MLX5_INDIRECT_ACTION_TYPE_CT:
15013 return __flow_dv_action_ct_update(dev, idx, update, err);
15015 return rte_flow_error_set(err, ENOTSUP,
15016 RTE_FLOW_ERROR_TYPE_ACTION,
15018 "action type update not supported");
15023 * Destroy the meter sub policy table rules.
15024 * Lock free, (mutex should be acquired by caller).
15027 * Pointer to Ethernet device.
15028 * @param[in] sub_policy
15029 * Pointer to meter sub policy table.
15032 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15033 struct mlx5_flow_meter_sub_policy *sub_policy)
15035 struct mlx5_priv *priv = dev->data->dev_private;
15036 struct mlx5_flow_tbl_data_entry *tbl;
15037 struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15038 struct mlx5_flow_meter_info *next_fm;
15039 struct mlx5_sub_policy_color_rule *color_rule;
15043 for (i = 0; i < RTE_COLORS; i++) {
15045 if (i == RTE_COLOR_GREEN && policy &&
15046 policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15047 next_fm = mlx5_flow_meter_find(priv,
15048 policy->act_cnt[i].next_mtr_id, NULL);
15049 RTE_TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15051 claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15052 tbl = container_of(color_rule->matcher->tbl,
15053 typeof(*tbl), tbl);
15054 mlx5_list_unregister(tbl->matchers,
15055 &color_rule->matcher->entry);
15056 TAILQ_REMOVE(&sub_policy->color_rules[i],
15057 color_rule, next_port);
15058 mlx5_free(color_rule);
15060 mlx5_flow_meter_detach(priv, next_fm);
15063 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15064 if (sub_policy->rix_hrxq[i]) {
15065 if (policy && !policy->is_hierarchy)
15066 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15067 sub_policy->rix_hrxq[i] = 0;
15069 if (sub_policy->jump_tbl[i]) {
15070 flow_dv_tbl_resource_release(MLX5_SH(dev),
15071 sub_policy->jump_tbl[i]);
15072 sub_policy->jump_tbl[i] = NULL;
15075 if (sub_policy->tbl_rsc) {
15076 flow_dv_tbl_resource_release(MLX5_SH(dev),
15077 sub_policy->tbl_rsc);
15078 sub_policy->tbl_rsc = NULL;
15083 * Destroy policy rules, lock free,
15084 * (mutex should be acquired by caller).
15085 * Dispatcher for action type specific call.
15088 * Pointer to the Ethernet device structure.
15089 * @param[in] mtr_policy
15090 * Meter policy struct.
15093 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15094 struct mlx5_flow_meter_policy *mtr_policy)
15097 struct mlx5_flow_meter_sub_policy *sub_policy;
15098 uint16_t sub_policy_num;
15100 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15101 sub_policy_num = (mtr_policy->sub_policy_num >>
15102 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15103 MLX5_MTR_SUB_POLICY_NUM_MASK;
15104 for (j = 0; j < sub_policy_num; j++) {
15105 sub_policy = mtr_policy->sub_policys[i][j];
15107 __flow_dv_destroy_sub_policy_rules(dev,
15114 * Destroy policy action, lock free,
15115 * (mutex should be acquired by caller).
15116 * Dispatcher for action type specific call.
15119 * Pointer to the Ethernet device structure.
15120 * @param[in] mtr_policy
15121 * Meter policy struct.
15124 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15125 struct mlx5_flow_meter_policy *mtr_policy)
15127 struct rte_flow_action *rss_action;
15128 struct mlx5_flow_handle dev_handle;
15131 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15132 if (mtr_policy->act_cnt[i].rix_mark) {
15133 flow_dv_tag_release(dev,
15134 mtr_policy->act_cnt[i].rix_mark);
15135 mtr_policy->act_cnt[i].rix_mark = 0;
15137 if (mtr_policy->act_cnt[i].modify_hdr) {
15138 dev_handle.dvh.modify_hdr =
15139 mtr_policy->act_cnt[i].modify_hdr;
15140 flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15142 switch (mtr_policy->act_cnt[i].fate_action) {
15143 case MLX5_FLOW_FATE_SHARED_RSS:
15144 rss_action = mtr_policy->act_cnt[i].rss;
15145 mlx5_free(rss_action);
15147 case MLX5_FLOW_FATE_PORT_ID:
15148 if (mtr_policy->act_cnt[i].rix_port_id_action) {
15149 flow_dv_port_id_action_resource_release(dev,
15150 mtr_policy->act_cnt[i].rix_port_id_action);
15151 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15154 case MLX5_FLOW_FATE_DROP:
15155 case MLX5_FLOW_FATE_JUMP:
15156 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15157 mtr_policy->act_cnt[i].dr_jump_action[j] =
15161 /*Queue action do nothing*/
15165 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15166 mtr_policy->dr_drop_action[j] = NULL;
15170 * Create policy action per domain, lock free,
15171 * (mutex should be acquired by caller).
15172 * Dispatcher for action type specific call.
15175 * Pointer to the Ethernet device structure.
15176 * @param[in] mtr_policy
15177 * Meter policy struct.
15178 * @param[in] action
15179 * Action specification used to create meter actions.
15180 * @param[out] error
15181 * Perform verbose error reporting if not NULL. Initialized in case of
15185 * 0 on success, otherwise negative errno value.
15188 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15189 struct mlx5_flow_meter_policy *mtr_policy,
15190 const struct rte_flow_action *actions[RTE_COLORS],
15191 enum mlx5_meter_domain domain,
15192 struct rte_mtr_error *error)
15194 struct mlx5_priv *priv = dev->data->dev_private;
15195 struct rte_flow_error flow_err;
15196 const struct rte_flow_action *act;
15197 uint64_t action_flags;
15198 struct mlx5_flow_handle dh;
15199 struct mlx5_flow dev_flow;
15200 struct mlx5_flow_dv_port_id_action_resource port_id_action;
15202 uint8_t egress, transfer;
15203 struct mlx5_meter_policy_action_container *act_cnt = NULL;
15205 struct mlx5_flow_dv_modify_hdr_resource res;
15206 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15207 sizeof(struct mlx5_modification_cmd) *
15208 (MLX5_MAX_MODIFY_NUM + 1)];
15210 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15212 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15213 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15214 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15215 memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15216 memset(&port_id_action, 0,
15217 sizeof(struct mlx5_flow_dv_port_id_action_resource));
15218 memset(mhdr_res, 0, sizeof(*mhdr_res));
15219 mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15220 (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15221 MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15222 dev_flow.handle = &dh;
15223 dev_flow.dv.port_id_action = &port_id_action;
15224 dev_flow.external = true;
15225 for (i = 0; i < RTE_COLORS; i++) {
15226 if (i < MLX5_MTR_RTE_COLORS)
15227 act_cnt = &mtr_policy->act_cnt[i];
15228 /* Skip the color policy actions creation. */
15229 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15230 (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15233 for (act = actions[i];
15234 act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15235 switch (act->type) {
15236 case RTE_FLOW_ACTION_TYPE_MARK:
15238 uint32_t tag_be = mlx5_flow_mark_set
15239 (((const struct rte_flow_action_mark *)
15242 if (i >= MLX5_MTR_RTE_COLORS)
15243 return -rte_mtr_error_set(error,
15245 RTE_MTR_ERROR_TYPE_METER_POLICY,
15247 "cannot create policy "
15248 "mark action for this color");
15249 dev_flow.handle->mark = 1;
15250 if (flow_dv_tag_resource_register(dev, tag_be,
15251 &dev_flow, &flow_err))
15252 return -rte_mtr_error_set(error,
15254 RTE_MTR_ERROR_TYPE_METER_POLICY,
15256 "cannot setup policy mark action");
15257 MLX5_ASSERT(dev_flow.dv.tag_resource);
15258 act_cnt->rix_mark =
15259 dev_flow.handle->dvh.rix_tag;
15260 action_flags |= MLX5_FLOW_ACTION_MARK;
15263 case RTE_FLOW_ACTION_TYPE_SET_TAG:
15264 if (i >= MLX5_MTR_RTE_COLORS)
15265 return -rte_mtr_error_set(error,
15267 RTE_MTR_ERROR_TYPE_METER_POLICY,
15269 "cannot create policy "
15270 "set tag action for this color");
15271 if (flow_dv_convert_action_set_tag
15273 (const struct rte_flow_action_set_tag *)
15274 act->conf, &flow_err))
15275 return -rte_mtr_error_set(error,
15277 RTE_MTR_ERROR_TYPE_METER_POLICY,
15278 NULL, "cannot convert policy "
15280 if (!mhdr_res->actions_num)
15281 return -rte_mtr_error_set(error,
15283 RTE_MTR_ERROR_TYPE_METER_POLICY,
15284 NULL, "cannot find policy "
15286 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15288 case RTE_FLOW_ACTION_TYPE_DROP:
15290 struct mlx5_flow_mtr_mng *mtrmng =
15292 struct mlx5_flow_tbl_data_entry *tbl_data;
15295 * Create the drop table with
15296 * METER DROP level.
15298 if (!mtrmng->drop_tbl[domain]) {
15299 mtrmng->drop_tbl[domain] =
15300 flow_dv_tbl_resource_get(dev,
15301 MLX5_FLOW_TABLE_LEVEL_METER,
15302 egress, transfer, false, NULL, 0,
15303 0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15304 if (!mtrmng->drop_tbl[domain])
15305 return -rte_mtr_error_set
15307 RTE_MTR_ERROR_TYPE_METER_POLICY,
15309 "Failed to create meter drop table");
15311 tbl_data = container_of
15312 (mtrmng->drop_tbl[domain],
15313 struct mlx5_flow_tbl_data_entry, tbl);
15314 if (i < MLX5_MTR_RTE_COLORS) {
15315 act_cnt->dr_jump_action[domain] =
15316 tbl_data->jump.action;
15317 act_cnt->fate_action =
15318 MLX5_FLOW_FATE_DROP;
15320 if (i == RTE_COLOR_RED)
15321 mtr_policy->dr_drop_action[domain] =
15322 tbl_data->jump.action;
15323 action_flags |= MLX5_FLOW_ACTION_DROP;
15326 case RTE_FLOW_ACTION_TYPE_QUEUE:
15328 if (i >= MLX5_MTR_RTE_COLORS)
15329 return -rte_mtr_error_set(error,
15331 RTE_MTR_ERROR_TYPE_METER_POLICY,
15332 NULL, "cannot create policy "
15333 "fate queue for this color");
15335 ((const struct rte_flow_action_queue *)
15336 (act->conf))->index;
15337 act_cnt->fate_action =
15338 MLX5_FLOW_FATE_QUEUE;
15339 dev_flow.handle->fate_action =
15340 MLX5_FLOW_FATE_QUEUE;
15341 mtr_policy->is_queue = 1;
15342 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15345 case RTE_FLOW_ACTION_TYPE_RSS:
15349 if (i >= MLX5_MTR_RTE_COLORS)
15350 return -rte_mtr_error_set(error,
15352 RTE_MTR_ERROR_TYPE_METER_POLICY,
15354 "cannot create policy "
15355 "rss action for this color");
15357 * Save RSS conf into policy struct
15358 * for translate stage.
15360 rss_size = (int)rte_flow_conv
15361 (RTE_FLOW_CONV_OP_ACTION,
15362 NULL, 0, act, &flow_err);
15364 return -rte_mtr_error_set(error,
15366 RTE_MTR_ERROR_TYPE_METER_POLICY,
15367 NULL, "Get the wrong "
15368 "rss action struct size");
15369 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15370 rss_size, 0, SOCKET_ID_ANY);
15372 return -rte_mtr_error_set(error,
15374 RTE_MTR_ERROR_TYPE_METER_POLICY,
15376 "Fail to malloc rss action memory");
15377 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15378 act_cnt->rss, rss_size,
15381 return -rte_mtr_error_set(error,
15383 RTE_MTR_ERROR_TYPE_METER_POLICY,
15384 NULL, "Fail to save "
15385 "rss action into policy struct");
15386 act_cnt->fate_action =
15387 MLX5_FLOW_FATE_SHARED_RSS;
15388 action_flags |= MLX5_FLOW_ACTION_RSS;
15391 case RTE_FLOW_ACTION_TYPE_PORT_ID:
15392 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
15394 struct mlx5_flow_dv_port_id_action_resource
15396 uint32_t port_id = 0;
15398 if (i >= MLX5_MTR_RTE_COLORS)
15399 return -rte_mtr_error_set(error,
15401 RTE_MTR_ERROR_TYPE_METER_POLICY,
15402 NULL, "cannot create policy "
15403 "port action for this color");
15404 memset(&port_id_resource, 0,
15405 sizeof(port_id_resource));
15406 if (flow_dv_translate_action_port_id(dev, act,
15407 &port_id, &flow_err))
15408 return -rte_mtr_error_set(error,
15410 RTE_MTR_ERROR_TYPE_METER_POLICY,
15411 NULL, "cannot translate "
15412 "policy port action");
15413 port_id_resource.port_id = port_id;
15414 if (flow_dv_port_id_action_resource_register
15415 (dev, &port_id_resource,
15416 &dev_flow, &flow_err))
15417 return -rte_mtr_error_set(error,
15419 RTE_MTR_ERROR_TYPE_METER_POLICY,
15420 NULL, "cannot setup "
15421 "policy port action");
15422 act_cnt->rix_port_id_action =
15423 dev_flow.handle->rix_port_id_action;
15424 act_cnt->fate_action =
15425 MLX5_FLOW_FATE_PORT_ID;
15426 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15429 case RTE_FLOW_ACTION_TYPE_JUMP:
15431 uint32_t jump_group = 0;
15432 uint32_t table = 0;
15433 struct mlx5_flow_tbl_data_entry *tbl_data;
15434 struct flow_grp_info grp_info = {
15435 .external = !!dev_flow.external,
15436 .transfer = !!transfer,
15437 .fdb_def_rule = !!priv->fdb_def_rule,
15439 .skip_scale = dev_flow.skip_scale &
15440 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15442 struct mlx5_flow_meter_sub_policy *sub_policy =
15443 mtr_policy->sub_policys[domain][0];
15445 if (i >= MLX5_MTR_RTE_COLORS)
15446 return -rte_mtr_error_set(error,
15448 RTE_MTR_ERROR_TYPE_METER_POLICY,
15450 "cannot create policy "
15451 "jump action for this color");
15453 ((const struct rte_flow_action_jump *)
15455 if (mlx5_flow_group_to_table(dev, NULL,
15458 &grp_info, &flow_err))
15459 return -rte_mtr_error_set(error,
15461 RTE_MTR_ERROR_TYPE_METER_POLICY,
15462 NULL, "cannot setup "
15463 "policy jump action");
15464 sub_policy->jump_tbl[i] =
15465 flow_dv_tbl_resource_get(dev,
15468 !!dev_flow.external,
15469 NULL, jump_group, 0,
15472 (!sub_policy->jump_tbl[i])
15473 return -rte_mtr_error_set(error,
15475 RTE_MTR_ERROR_TYPE_METER_POLICY,
15476 NULL, "cannot create jump action.");
15477 tbl_data = container_of
15478 (sub_policy->jump_tbl[i],
15479 struct mlx5_flow_tbl_data_entry, tbl);
15480 act_cnt->dr_jump_action[domain] =
15481 tbl_data->jump.action;
15482 act_cnt->fate_action =
15483 MLX5_FLOW_FATE_JUMP;
15484 action_flags |= MLX5_FLOW_ACTION_JUMP;
15488 * No need to check meter hierarchy for Y or R colors
15489 * here since it is done in the validation stage.
15491 case RTE_FLOW_ACTION_TYPE_METER:
15493 const struct rte_flow_action_meter *mtr;
15494 struct mlx5_flow_meter_info *next_fm;
15495 struct mlx5_flow_meter_policy *next_policy;
15496 struct rte_flow_action tag_action;
15497 struct mlx5_rte_flow_action_set_tag set_tag;
15498 uint32_t next_mtr_idx = 0;
15501 next_fm = mlx5_flow_meter_find(priv,
15505 return -rte_mtr_error_set(error, EINVAL,
15506 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15507 "Fail to find next meter.");
15508 if (next_fm->def_policy)
15509 return -rte_mtr_error_set(error, EINVAL,
15510 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15511 "Hierarchy only supports termination meter.");
15512 next_policy = mlx5_flow_meter_policy_find(dev,
15513 next_fm->policy_id, NULL);
15514 MLX5_ASSERT(next_policy);
15515 if (next_fm->drop_cnt) {
15518 mlx5_flow_get_reg_id(dev,
15521 (struct rte_flow_error *)error);
15522 set_tag.offset = (priv->mtr_reg_share ?
15523 MLX5_MTR_COLOR_BITS : 0);
15524 set_tag.length = (priv->mtr_reg_share ?
15525 MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15527 set_tag.data = next_mtr_idx;
15529 (enum rte_flow_action_type)
15530 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15531 tag_action.conf = &set_tag;
15532 if (flow_dv_convert_action_set_reg
15533 (mhdr_res, &tag_action,
15534 (struct rte_flow_error *)error))
15537 MLX5_FLOW_ACTION_SET_TAG;
15539 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15540 act_cnt->next_mtr_id = next_fm->meter_id;
15541 act_cnt->next_sub_policy = NULL;
15542 mtr_policy->is_hierarchy = 1;
15543 mtr_policy->dev = next_policy->dev;
15545 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15549 return -rte_mtr_error_set(error, ENOTSUP,
15550 RTE_MTR_ERROR_TYPE_METER_POLICY,
15551 NULL, "action type not supported");
15553 if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15554 /* create modify action if needed. */
15555 dev_flow.dv.group = 1;
15556 if (flow_dv_modify_hdr_resource_register
15557 (dev, mhdr_res, &dev_flow, &flow_err))
15558 return -rte_mtr_error_set(error,
15560 RTE_MTR_ERROR_TYPE_METER_POLICY,
15561 NULL, "cannot register policy "
15563 act_cnt->modify_hdr =
15564 dev_flow.handle->dvh.modify_hdr;
15572 * Create policy action per domain, lock free,
15573 * (mutex should be acquired by caller).
15574 * Dispatcher for action type specific call.
15577 * Pointer to the Ethernet device structure.
15578 * @param[in] mtr_policy
15579 * Meter policy struct.
15580 * @param[in] action
15581 * Action specification used to create meter actions.
15582 * @param[out] error
15583 * Perform verbose error reporting if not NULL. Initialized in case of
15587 * 0 on success, otherwise negative errno value.
15590 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15591 struct mlx5_flow_meter_policy *mtr_policy,
15592 const struct rte_flow_action *actions[RTE_COLORS],
15593 struct rte_mtr_error *error)
15596 uint16_t sub_policy_num;
15598 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15599 sub_policy_num = (mtr_policy->sub_policy_num >>
15600 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15601 MLX5_MTR_SUB_POLICY_NUM_MASK;
15602 if (sub_policy_num) {
15603 ret = __flow_dv_create_domain_policy_acts(dev,
15604 mtr_policy, actions,
15605 (enum mlx5_meter_domain)i, error);
15606 /* Cleaning resource is done in the caller level. */
15615 * Query a DV flow rule for its statistics via DevX.
15618 * Pointer to Ethernet device.
15619 * @param[in] cnt_idx
15620 * Index to the flow counter.
15622 * Data retrieved by the query.
15623 * @param[out] error
15624 * Perform verbose error reporting if not NULL.
15627 * 0 on success, a negative errno value otherwise and rte_errno is set.
15630 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15631 struct rte_flow_error *error)
15633 struct mlx5_priv *priv = dev->data->dev_private;
15634 struct rte_flow_query_count *qc = data;
15636 if (!priv->sh->devx)
15637 return rte_flow_error_set(error, ENOTSUP,
15638 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15640 "counters are not supported");
15642 uint64_t pkts, bytes;
15643 struct mlx5_flow_counter *cnt;
15644 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15647 return rte_flow_error_set(error, -err,
15648 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15649 NULL, "cannot read counters");
15650 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15653 qc->hits = pkts - cnt->hits;
15654 qc->bytes = bytes - cnt->bytes;
15657 cnt->bytes = bytes;
15661 return rte_flow_error_set(error, EINVAL,
15662 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15664 "counters are not available");
15669 * Query counter's action pointer for a DV flow rule via DevX.
15672 * Pointer to Ethernet device.
15673 * @param[in] cnt_idx
15674 * Index to the flow counter.
15675 * @param[out] action_ptr
15676 * Action pointer for counter.
15677 * @param[out] error
15678 * Perform verbose error reporting if not NULL.
15681 * 0 on success, a negative errno value otherwise and rte_errno is set.
15684 flow_dv_query_count_ptr(struct rte_eth_dev *dev, uint32_t cnt_idx,
15685 void **action_ptr, struct rte_flow_error *error)
15687 struct mlx5_priv *priv = dev->data->dev_private;
15689 if (!priv->sh->devx || !action_ptr)
15690 return rte_flow_error_set(error, ENOTSUP,
15691 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15693 "counters are not supported");
15696 struct mlx5_flow_counter *cnt = NULL;
15697 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15699 *action_ptr = cnt->action;
15703 return rte_flow_error_set(error, EINVAL,
15704 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15706 "counters are not available");
15710 flow_dv_action_query(struct rte_eth_dev *dev,
15711 const struct rte_flow_action_handle *handle, void *data,
15712 struct rte_flow_error *error)
15714 struct mlx5_age_param *age_param;
15715 struct rte_flow_query_age *resp;
15716 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15717 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15718 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15719 struct mlx5_priv *priv = dev->data->dev_private;
15720 struct mlx5_aso_ct_action *ct;
15725 case MLX5_INDIRECT_ACTION_TYPE_AGE:
15726 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15728 resp->aged = __atomic_load_n(&age_param->state,
15729 __ATOMIC_RELAXED) == AGE_TMOUT ?
15731 resp->sec_since_last_hit_valid = !resp->aged;
15732 if (resp->sec_since_last_hit_valid)
15733 resp->sec_since_last_hit = __atomic_load_n
15734 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15736 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15737 return flow_dv_query_count(dev, idx, data, error);
15738 case MLX5_INDIRECT_ACTION_TYPE_CT:
15739 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15740 if (owner != PORT_ID(priv))
15741 return rte_flow_error_set(error, EACCES,
15742 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15744 "CT object owned by another port");
15745 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15746 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15749 return rte_flow_error_set(error, EFAULT,
15750 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15752 "CT object is inactive");
15753 ((struct rte_flow_action_conntrack *)data)->peer_port =
15755 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15757 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15758 return rte_flow_error_set(error, EIO,
15759 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15761 "Failed to query CT context");
15764 return rte_flow_error_set(error, ENOTSUP,
15765 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15766 "action type query not supported");
15771 * Query a flow rule AGE action for aging information.
15774 * Pointer to Ethernet device.
15776 * Pointer to the sub flow.
15778 * data retrieved by the query.
15779 * @param[out] error
15780 * Perform verbose error reporting if not NULL.
15783 * 0 on success, a negative errno value otherwise and rte_errno is set.
15786 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15787 void *data, struct rte_flow_error *error)
15789 struct rte_flow_query_age *resp = data;
15790 struct mlx5_age_param *age_param;
15793 struct mlx5_aso_age_action *act =
15794 flow_aso_age_get_by_idx(dev, flow->age);
15796 age_param = &act->age_params;
15797 } else if (flow->counter) {
15798 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15800 if (!age_param || !age_param->timeout)
15801 return rte_flow_error_set
15803 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15804 NULL, "cannot read age data");
15806 return rte_flow_error_set(error, EINVAL,
15807 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15808 NULL, "age data not available");
15810 resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15812 resp->sec_since_last_hit_valid = !resp->aged;
15813 if (resp->sec_since_last_hit_valid)
15814 resp->sec_since_last_hit = __atomic_load_n
15815 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15822 * @see rte_flow_query()
15823 * @see rte_flow_ops
15826 flow_dv_query(struct rte_eth_dev *dev,
15827 struct rte_flow *flow __rte_unused,
15828 const struct rte_flow_action *actions __rte_unused,
15829 void *data __rte_unused,
15830 struct rte_flow_error *error __rte_unused)
15834 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15835 switch (actions->type) {
15836 case RTE_FLOW_ACTION_TYPE_VOID:
15838 case RTE_FLOW_ACTION_TYPE_COUNT:
15839 ret = flow_dv_query_count(dev, flow->counter, data,
15842 case RTE_FLOW_ACTION_TYPE_AGE:
15843 ret = flow_dv_query_age(dev, flow, data, error);
15846 return rte_flow_error_set(error, ENOTSUP,
15847 RTE_FLOW_ERROR_TYPE_ACTION,
15849 "action not supported");
15856 * Destroy the meter table set.
15857 * Lock free, (mutex should be acquired by caller).
15860 * Pointer to Ethernet device.
15862 * Meter information table.
15865 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
15866 struct mlx5_flow_meter_info *fm)
15868 struct mlx5_priv *priv = dev->data->dev_private;
15871 if (!fm || !priv->config.dv_flow_en)
15873 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15874 if (fm->drop_rule[i]) {
15875 claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
15876 fm->drop_rule[i] = NULL;
15882 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
15884 struct mlx5_priv *priv = dev->data->dev_private;
15885 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15886 struct mlx5_flow_tbl_data_entry *tbl;
15889 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15890 if (mtrmng->def_rule[i]) {
15891 claim_zero(mlx5_flow_os_destroy_flow
15892 (mtrmng->def_rule[i]));
15893 mtrmng->def_rule[i] = NULL;
15895 if (mtrmng->def_matcher[i]) {
15896 tbl = container_of(mtrmng->def_matcher[i]->tbl,
15897 struct mlx5_flow_tbl_data_entry, tbl);
15898 mlx5_list_unregister(tbl->matchers,
15899 &mtrmng->def_matcher[i]->entry);
15900 mtrmng->def_matcher[i] = NULL;
15902 for (j = 0; j < MLX5_REG_BITS; j++) {
15903 if (mtrmng->drop_matcher[i][j]) {
15905 container_of(mtrmng->drop_matcher[i][j]->tbl,
15906 struct mlx5_flow_tbl_data_entry,
15908 mlx5_list_unregister(tbl->matchers,
15909 &mtrmng->drop_matcher[i][j]->entry);
15910 mtrmng->drop_matcher[i][j] = NULL;
15913 if (mtrmng->drop_tbl[i]) {
15914 flow_dv_tbl_resource_release(MLX5_SH(dev),
15915 mtrmng->drop_tbl[i]);
15916 mtrmng->drop_tbl[i] = NULL;
15921 /* Number of meter flow actions, count and jump or count and drop. */
15922 #define METER_ACTIONS 2
15925 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
15926 enum mlx5_meter_domain domain)
15928 struct mlx5_priv *priv = dev->data->dev_private;
15929 struct mlx5_flow_meter_def_policy *def_policy =
15930 priv->sh->mtrmng->def_policy[domain];
15932 __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
15933 mlx5_free(def_policy);
15934 priv->sh->mtrmng->def_policy[domain] = NULL;
15938 * Destroy the default policy table set.
15941 * Pointer to Ethernet device.
15944 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
15946 struct mlx5_priv *priv = dev->data->dev_private;
15949 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
15950 if (priv->sh->mtrmng->def_policy[i])
15951 __flow_dv_destroy_domain_def_policy(dev,
15952 (enum mlx5_meter_domain)i);
15953 priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
15957 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
15958 uint32_t color_reg_c_idx,
15959 enum rte_color color, void *matcher_object,
15960 int actions_n, void *actions,
15961 bool match_src_port, const struct rte_flow_item *item,
15962 void **rule, const struct rte_flow_attr *attr)
15965 struct mlx5_flow_dv_match_params value = {
15966 .size = sizeof(value.buf),
15968 struct mlx5_flow_dv_match_params matcher = {
15969 .size = sizeof(matcher.buf),
15971 struct mlx5_priv *priv = dev->data->dev_private;
15974 if (match_src_port && (priv->representor || priv->master)) {
15975 if (flow_dv_translate_item_port_id(dev, matcher.buf,
15976 value.buf, item, attr)) {
15977 DRV_LOG(ERR, "Failed to create meter policy%d flow's"
15978 " value with port.", color);
15982 flow_dv_match_meta_reg(matcher.buf, value.buf,
15983 (enum modify_reg)color_reg_c_idx,
15984 rte_col_2_mlx5_col(color), UINT32_MAX);
15985 misc_mask = flow_dv_matcher_enable(value.buf);
15986 __flow_dv_adjust_buf_size(&value.size, misc_mask);
15987 ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
15988 actions_n, actions, rule);
15990 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
15997 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
15998 uint32_t color_reg_c_idx,
16000 struct mlx5_flow_meter_sub_policy *sub_policy,
16001 const struct rte_flow_attr *attr,
16002 bool match_src_port,
16003 const struct rte_flow_item *item,
16004 struct mlx5_flow_dv_matcher **policy_matcher,
16005 struct rte_flow_error *error)
16007 struct mlx5_list_entry *entry;
16008 struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
16009 struct mlx5_flow_dv_matcher matcher = {
16011 .size = sizeof(matcher.mask.buf),
16015 struct mlx5_flow_dv_match_params value = {
16016 .size = sizeof(value.buf),
16018 struct mlx5_flow_cb_ctx ctx = {
16022 struct mlx5_flow_tbl_data_entry *tbl_data;
16023 struct mlx5_priv *priv = dev->data->dev_private;
16024 const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16026 if (match_src_port && (priv->representor || priv->master)) {
16027 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16028 value.buf, item, attr)) {
16029 DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16030 " with port.", priority);
16034 tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16035 if (priority < RTE_COLOR_RED)
16036 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16037 (enum modify_reg)color_reg_c_idx, 0, color_mask);
16038 matcher.priority = priority;
16039 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16040 matcher.mask.size);
16041 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16043 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16047 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16052 * Create the policy rules per domain.
16055 * Pointer to Ethernet device.
16056 * @param[in] sub_policy
16057 * Pointer to sub policy table..
16058 * @param[in] egress
16059 * Direction of the table.
16060 * @param[in] transfer
16061 * E-Switch or NIC flow.
16063 * Pointer to policy action list per color.
16066 * 0 on success, -1 otherwise.
16069 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16070 struct mlx5_flow_meter_sub_policy *sub_policy,
16071 uint8_t egress, uint8_t transfer, bool match_src_port,
16072 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16074 struct mlx5_priv *priv = dev->data->dev_private;
16075 struct rte_flow_error flow_err;
16076 uint32_t color_reg_c_idx;
16077 struct rte_flow_attr attr = {
16078 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16081 .egress = !!egress,
16082 .transfer = !!transfer,
16086 int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16087 struct mlx5_sub_policy_color_rule *color_rule;
16089 struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16093 /* Create policy table with POLICY level. */
16094 if (!sub_policy->tbl_rsc)
16095 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16096 MLX5_FLOW_TABLE_LEVEL_POLICY,
16097 egress, transfer, false, NULL, 0, 0,
16098 sub_policy->idx, &flow_err);
16099 if (!sub_policy->tbl_rsc) {
16101 "Failed to create meter sub policy table.");
16104 /* Prepare matchers. */
16105 color_reg_c_idx = ret;
16106 for (i = 0; i < RTE_COLORS; i++) {
16107 TAILQ_INIT(&sub_policy->color_rules[i]);
16108 if (!acts[i].actions_n)
16110 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16111 sizeof(struct mlx5_sub_policy_color_rule),
16114 DRV_LOG(ERR, "No memory to create color rule.");
16117 tmp_rules[i] = color_rule;
16118 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16119 color_rule, next_port);
16120 color_rule->src_port = priv->representor_id;
16123 /* Create matchers for colors. */
16124 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16125 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16126 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16127 &attr, svport_match, NULL,
16128 &color_rule->matcher, &flow_err)) {
16129 DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16132 /* Create flow, matching color. */
16133 if (__flow_dv_create_policy_flow(dev,
16134 color_reg_c_idx, (enum rte_color)i,
16135 color_rule->matcher->matcher_object,
16136 acts[i].actions_n, acts[i].dv_actions,
16137 svport_match, NULL, &color_rule->rule,
16139 DRV_LOG(ERR, "Failed to create color%u rule.", i);
16145 /* All the policy rules will be cleared. */
16147 color_rule = tmp_rules[i];
16149 if (color_rule->rule)
16150 mlx5_flow_os_destroy_flow(color_rule->rule);
16151 if (color_rule->matcher) {
16152 struct mlx5_flow_tbl_data_entry *tbl =
16153 container_of(color_rule->matcher->tbl,
16154 typeof(*tbl), tbl);
16155 mlx5_list_unregister(tbl->matchers,
16156 &color_rule->matcher->entry);
16158 TAILQ_REMOVE(&sub_policy->color_rules[i],
16159 color_rule, next_port);
16160 mlx5_free(color_rule);
16167 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16168 struct mlx5_flow_meter_policy *mtr_policy,
16169 struct mlx5_flow_meter_sub_policy *sub_policy,
16172 struct mlx5_priv *priv = dev->data->dev_private;
16173 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16174 struct mlx5_flow_dv_tag_resource *tag;
16175 struct mlx5_flow_dv_port_id_action_resource *port_action;
16176 struct mlx5_hrxq *hrxq;
16177 struct mlx5_flow_meter_info *next_fm = NULL;
16178 struct mlx5_flow_meter_policy *next_policy;
16179 struct mlx5_flow_meter_sub_policy *next_sub_policy;
16180 struct mlx5_flow_tbl_data_entry *tbl_data;
16181 struct rte_flow_error error;
16182 uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16183 uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16184 bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16185 bool match_src_port = false;
16188 /* If RSS or Queue, no previous actions / rules is created. */
16189 for (i = 0; i < RTE_COLORS; i++) {
16190 acts[i].actions_n = 0;
16191 if (i == RTE_COLOR_RED) {
16192 /* Only support drop on red. */
16193 acts[i].dv_actions[0] =
16194 mtr_policy->dr_drop_action[domain];
16195 acts[i].actions_n = 1;
16198 if (i == RTE_COLOR_GREEN &&
16199 mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16200 struct rte_flow_attr attr = {
16201 .transfer = transfer
16204 next_fm = mlx5_flow_meter_find(priv,
16205 mtr_policy->act_cnt[i].next_mtr_id,
16209 "Failed to get next hierarchy meter.");
16212 if (mlx5_flow_meter_attach(priv, next_fm,
16214 DRV_LOG(ERR, "%s", error.message);
16218 /* Meter action must be the first for TX. */
16220 acts[i].dv_actions[acts[i].actions_n] =
16221 next_fm->meter_action;
16222 acts[i].actions_n++;
16225 if (mtr_policy->act_cnt[i].rix_mark) {
16226 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16227 mtr_policy->act_cnt[i].rix_mark);
16229 DRV_LOG(ERR, "Failed to find "
16230 "mark action for policy.");
16233 acts[i].dv_actions[acts[i].actions_n] = tag->action;
16234 acts[i].actions_n++;
16236 if (mtr_policy->act_cnt[i].modify_hdr) {
16237 acts[i].dv_actions[acts[i].actions_n] =
16238 mtr_policy->act_cnt[i].modify_hdr->action;
16239 acts[i].actions_n++;
16241 if (mtr_policy->act_cnt[i].fate_action) {
16242 switch (mtr_policy->act_cnt[i].fate_action) {
16243 case MLX5_FLOW_FATE_PORT_ID:
16244 port_action = mlx5_ipool_get
16245 (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16246 mtr_policy->act_cnt[i].rix_port_id_action);
16247 if (!port_action) {
16248 DRV_LOG(ERR, "Failed to find "
16249 "port action for policy.");
16252 acts[i].dv_actions[acts[i].actions_n] =
16253 port_action->action;
16254 acts[i].actions_n++;
16255 mtr_policy->dev = dev;
16256 match_src_port = true;
16258 case MLX5_FLOW_FATE_DROP:
16259 case MLX5_FLOW_FATE_JUMP:
16260 acts[i].dv_actions[acts[i].actions_n] =
16261 mtr_policy->act_cnt[i].dr_jump_action[domain];
16262 acts[i].actions_n++;
16264 case MLX5_FLOW_FATE_SHARED_RSS:
16265 case MLX5_FLOW_FATE_QUEUE:
16266 hrxq = mlx5_ipool_get
16267 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16268 sub_policy->rix_hrxq[i]);
16270 DRV_LOG(ERR, "Failed to find "
16271 "queue action for policy.");
16274 acts[i].dv_actions[acts[i].actions_n] =
16276 acts[i].actions_n++;
16278 case MLX5_FLOW_FATE_MTR:
16281 "No next hierarchy meter.");
16285 acts[i].dv_actions[acts[i].actions_n] =
16286 next_fm->meter_action;
16287 acts[i].actions_n++;
16289 if (mtr_policy->act_cnt[i].next_sub_policy) {
16291 mtr_policy->act_cnt[i].next_sub_policy;
16294 mlx5_flow_meter_policy_find(dev,
16295 next_fm->policy_id, NULL);
16296 MLX5_ASSERT(next_policy);
16298 next_policy->sub_policys[domain][0];
16301 container_of(next_sub_policy->tbl_rsc,
16302 struct mlx5_flow_tbl_data_entry, tbl);
16303 acts[i].dv_actions[acts[i].actions_n++] =
16304 tbl_data->jump.action;
16305 if (mtr_policy->act_cnt[i].modify_hdr)
16306 match_src_port = !!transfer;
16309 /*Queue action do nothing*/
16314 if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16315 egress, transfer, match_src_port, acts)) {
16317 "Failed to create policy rules per domain.");
16323 mlx5_flow_meter_detach(priv, next_fm);
16328 * Create the policy rules.
16331 * Pointer to Ethernet device.
16332 * @param[in,out] mtr_policy
16333 * Pointer to meter policy table.
16336 * 0 on success, -1 otherwise.
16339 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16340 struct mlx5_flow_meter_policy *mtr_policy)
16343 uint16_t sub_policy_num;
16345 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16346 sub_policy_num = (mtr_policy->sub_policy_num >>
16347 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16348 MLX5_MTR_SUB_POLICY_NUM_MASK;
16349 if (!sub_policy_num)
16351 /* Prepare actions list and create policy rules. */
16352 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16353 mtr_policy->sub_policys[i][0], i)) {
16354 DRV_LOG(ERR, "Failed to create policy action "
16355 "list per domain.");
16363 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16365 struct mlx5_priv *priv = dev->data->dev_private;
16366 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16367 struct mlx5_flow_meter_def_policy *def_policy;
16368 struct mlx5_flow_tbl_resource *jump_tbl;
16369 struct mlx5_flow_tbl_data_entry *tbl_data;
16370 uint8_t egress, transfer;
16371 struct rte_flow_error error;
16372 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16375 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16376 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16377 def_policy = mtrmng->def_policy[domain];
16379 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16380 sizeof(struct mlx5_flow_meter_def_policy),
16381 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16383 DRV_LOG(ERR, "Failed to alloc default policy table.");
16384 goto def_policy_error;
16386 mtrmng->def_policy[domain] = def_policy;
16387 /* Create the meter suffix table with SUFFIX level. */
16388 jump_tbl = flow_dv_tbl_resource_get(dev,
16389 MLX5_FLOW_TABLE_LEVEL_METER,
16390 egress, transfer, false, NULL, 0,
16391 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16394 "Failed to create meter suffix table.");
16395 goto def_policy_error;
16397 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16398 tbl_data = container_of(jump_tbl,
16399 struct mlx5_flow_tbl_data_entry, tbl);
16400 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16401 tbl_data->jump.action;
16402 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16403 acts[RTE_COLOR_GREEN].actions_n = 1;
16405 * YELLOW has the same default policy as GREEN does.
16406 * G & Y share the same table and action. The 2nd time of table
16407 * resource getting is just to update the reference count for
16408 * the releasing stage.
16410 jump_tbl = flow_dv_tbl_resource_get(dev,
16411 MLX5_FLOW_TABLE_LEVEL_METER,
16412 egress, transfer, false, NULL, 0,
16413 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16416 "Failed to get meter suffix table.");
16417 goto def_policy_error;
16419 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16420 tbl_data = container_of(jump_tbl,
16421 struct mlx5_flow_tbl_data_entry, tbl);
16422 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16423 tbl_data->jump.action;
16424 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16425 acts[RTE_COLOR_YELLOW].actions_n = 1;
16426 /* Create jump action to the drop table. */
16427 if (!mtrmng->drop_tbl[domain]) {
16428 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16429 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16430 egress, transfer, false, NULL, 0,
16431 0, MLX5_MTR_TABLE_ID_DROP, &error);
16432 if (!mtrmng->drop_tbl[domain]) {
16433 DRV_LOG(ERR, "Failed to create meter "
16434 "drop table for default policy.");
16435 goto def_policy_error;
16438 /* all RED: unique Drop table for jump action. */
16439 tbl_data = container_of(mtrmng->drop_tbl[domain],
16440 struct mlx5_flow_tbl_data_entry, tbl);
16441 def_policy->dr_jump_action[RTE_COLOR_RED] =
16442 tbl_data->jump.action;
16443 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16444 acts[RTE_COLOR_RED].actions_n = 1;
16445 /* Create default policy rules. */
16446 ret = __flow_dv_create_domain_policy_rules(dev,
16447 &def_policy->sub_policy,
16448 egress, transfer, false, acts);
16450 DRV_LOG(ERR, "Failed to create default policy rules.");
16451 goto def_policy_error;
16456 __flow_dv_destroy_domain_def_policy(dev,
16457 (enum mlx5_meter_domain)domain);
16462 * Create the default policy table set.
16465 * Pointer to Ethernet device.
16467 * 0 on success, -1 otherwise.
16470 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16472 struct mlx5_priv *priv = dev->data->dev_private;
16475 /* Non-termination policy table. */
16476 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16477 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16479 if (__flow_dv_create_domain_def_policy(dev, i)) {
16480 DRV_LOG(ERR, "Failed to create default policy");
16481 /* Rollback the created default policies for others. */
16482 flow_dv_destroy_def_policy(dev);
16490 * Create the needed meter tables.
16491 * Lock free, (mutex should be acquired by caller).
16494 * Pointer to Ethernet device.
16496 * Meter information table.
16497 * @param[in] mtr_idx
16499 * @param[in] domain_bitmap
16502 * 0 on success, -1 otherwise.
16505 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16506 struct mlx5_flow_meter_info *fm,
16508 uint8_t domain_bitmap)
16510 struct mlx5_priv *priv = dev->data->dev_private;
16511 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16512 struct rte_flow_error error;
16513 struct mlx5_flow_tbl_data_entry *tbl_data;
16514 uint8_t egress, transfer;
16515 void *actions[METER_ACTIONS];
16516 int domain, ret, i;
16517 struct mlx5_flow_counter *cnt;
16518 struct mlx5_flow_dv_match_params value = {
16519 .size = sizeof(value.buf),
16521 struct mlx5_flow_dv_match_params matcher_para = {
16522 .size = sizeof(matcher_para.buf),
16524 int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16526 uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16527 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16528 struct mlx5_list_entry *entry;
16529 struct mlx5_flow_dv_matcher matcher = {
16531 .size = sizeof(matcher.mask.buf),
16534 struct mlx5_flow_dv_matcher *drop_matcher;
16535 struct mlx5_flow_cb_ctx ctx = {
16541 if (!priv->mtr_en || mtr_id_reg_c < 0) {
16542 rte_errno = ENOTSUP;
16545 for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16546 if (!(domain_bitmap & (1 << domain)) ||
16547 (mtrmng->def_rule[domain] && !fm->drop_cnt))
16549 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16550 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16551 /* Create the drop table with METER DROP level. */
16552 if (!mtrmng->drop_tbl[domain]) {
16553 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16554 MLX5_FLOW_TABLE_LEVEL_METER,
16555 egress, transfer, false, NULL, 0,
16556 0, MLX5_MTR_TABLE_ID_DROP, &error);
16557 if (!mtrmng->drop_tbl[domain]) {
16558 DRV_LOG(ERR, "Failed to create meter drop table.");
16562 /* Create default matcher in drop table. */
16563 matcher.tbl = mtrmng->drop_tbl[domain],
16564 tbl_data = container_of(mtrmng->drop_tbl[domain],
16565 struct mlx5_flow_tbl_data_entry, tbl);
16566 if (!mtrmng->def_matcher[domain]) {
16567 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16568 (enum modify_reg)mtr_id_reg_c,
16570 matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16571 matcher.crc = rte_raw_cksum
16572 ((const void *)matcher.mask.buf,
16573 matcher.mask.size);
16574 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16576 DRV_LOG(ERR, "Failed to register meter "
16577 "drop default matcher.");
16580 mtrmng->def_matcher[domain] = container_of(entry,
16581 struct mlx5_flow_dv_matcher, entry);
16583 /* Create default rule in drop table. */
16584 if (!mtrmng->def_rule[domain]) {
16586 actions[i++] = priv->sh->dr_drop_action;
16587 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16588 (enum modify_reg)mtr_id_reg_c, 0, 0);
16589 misc_mask = flow_dv_matcher_enable(value.buf);
16590 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16591 ret = mlx5_flow_os_create_flow
16592 (mtrmng->def_matcher[domain]->matcher_object,
16593 (void *)&value, i, actions,
16594 &mtrmng->def_rule[domain]);
16596 DRV_LOG(ERR, "Failed to create meter "
16597 "default drop rule for drop table.");
16603 MLX5_ASSERT(mtrmng->max_mtr_bits);
16604 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16605 /* Create matchers for Drop. */
16606 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16607 (enum modify_reg)mtr_id_reg_c, 0,
16608 (mtr_id_mask << mtr_id_offset));
16609 matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16610 matcher.crc = rte_raw_cksum
16611 ((const void *)matcher.mask.buf,
16612 matcher.mask.size);
16613 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16616 "Failed to register meter drop matcher.");
16619 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16620 container_of(entry, struct mlx5_flow_dv_matcher,
16624 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16625 /* Create drop rule, matching meter_id only. */
16626 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16627 (enum modify_reg)mtr_id_reg_c,
16628 (mtr_idx << mtr_id_offset), UINT32_MAX);
16630 cnt = flow_dv_counter_get_by_idx(dev,
16631 fm->drop_cnt, NULL);
16632 actions[i++] = cnt->action;
16633 actions[i++] = priv->sh->dr_drop_action;
16634 misc_mask = flow_dv_matcher_enable(value.buf);
16635 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16636 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16637 (void *)&value, i, actions,
16638 &fm->drop_rule[domain]);
16640 DRV_LOG(ERR, "Failed to create meter "
16641 "drop rule for drop table.");
16647 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16648 if (fm->drop_rule[i]) {
16649 claim_zero(mlx5_flow_os_destroy_flow
16650 (fm->drop_rule[i]));
16651 fm->drop_rule[i] = NULL;
16657 static struct mlx5_flow_meter_sub_policy *
16658 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16659 struct mlx5_flow_meter_policy *mtr_policy,
16660 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16661 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16664 struct mlx5_priv *priv = dev->data->dev_private;
16665 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16666 uint32_t sub_policy_idx = 0;
16667 uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16669 struct mlx5_hrxq *hrxq;
16670 struct mlx5_flow_handle dh;
16671 struct mlx5_meter_policy_action_container *act_cnt;
16672 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16673 uint16_t sub_policy_num;
16675 rte_spinlock_lock(&mtr_policy->sl);
16676 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16679 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16680 if (!hrxq_idx[i]) {
16681 rte_spinlock_unlock(&mtr_policy->sl);
16685 sub_policy_num = (mtr_policy->sub_policy_num >>
16686 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16687 MLX5_MTR_SUB_POLICY_NUM_MASK;
16688 for (j = 0; j < sub_policy_num; j++) {
16689 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16692 mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16695 if (i >= MLX5_MTR_RTE_COLORS) {
16697 * Found the sub policy table with
16698 * the same queue per color.
16700 rte_spinlock_unlock(&mtr_policy->sl);
16701 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16702 mlx5_hrxq_release(dev, hrxq_idx[i]);
16704 return mtr_policy->sub_policys[domain][j];
16707 /* Create sub policy. */
16708 if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16709 /* Reuse the first pre-allocated sub_policy. */
16710 sub_policy = mtr_policy->sub_policys[domain][0];
16711 sub_policy_idx = sub_policy->idx;
16713 sub_policy = mlx5_ipool_zmalloc
16714 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16717 sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16718 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16719 mlx5_hrxq_release(dev, hrxq_idx[i]);
16720 goto rss_sub_policy_error;
16722 sub_policy->idx = sub_policy_idx;
16723 sub_policy->main_policy = mtr_policy;
16725 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16728 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16729 if (mtr_policy->is_hierarchy) {
16730 act_cnt = &mtr_policy->act_cnt[i];
16731 act_cnt->next_sub_policy = next_sub_policy;
16732 mlx5_hrxq_release(dev, hrxq_idx[i]);
16735 * Overwrite the last action from
16736 * RSS action to Queue action.
16738 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16741 DRV_LOG(ERR, "Failed to get policy hrxq");
16742 goto rss_sub_policy_error;
16744 act_cnt = &mtr_policy->act_cnt[i];
16745 if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16746 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16747 if (act_cnt->rix_mark)
16749 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16750 dh.rix_hrxq = hrxq_idx[i];
16751 flow_drv_rxq_flags_set(dev, &dh);
16755 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16756 sub_policy, domain)) {
16757 DRV_LOG(ERR, "Failed to create policy "
16758 "rules for ingress domain.");
16759 goto rss_sub_policy_error;
16761 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16762 i = (mtr_policy->sub_policy_num >>
16763 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16764 MLX5_MTR_SUB_POLICY_NUM_MASK;
16765 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
16766 DRV_LOG(ERR, "No free sub-policy slot.");
16767 goto rss_sub_policy_error;
16769 mtr_policy->sub_policys[domain][i] = sub_policy;
16771 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16772 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16773 mtr_policy->sub_policy_num |=
16774 (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16775 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16777 rte_spinlock_unlock(&mtr_policy->sl);
16780 rss_sub_policy_error:
16782 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16783 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16784 i = (mtr_policy->sub_policy_num >>
16785 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16786 MLX5_MTR_SUB_POLICY_NUM_MASK;
16787 mtr_policy->sub_policys[domain][i] = NULL;
16788 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16792 rte_spinlock_unlock(&mtr_policy->sl);
16797 * Find the policy table for prefix table with RSS.
16800 * Pointer to Ethernet device.
16801 * @param[in] mtr_policy
16802 * Pointer to meter policy table.
16803 * @param[in] rss_desc
16804 * Pointer to rss_desc
16806 * Pointer to table set on success, NULL otherwise and rte_errno is set.
16808 static struct mlx5_flow_meter_sub_policy *
16809 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
16810 struct mlx5_flow_meter_policy *mtr_policy,
16811 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
16813 struct mlx5_priv *priv = dev->data->dev_private;
16814 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16815 struct mlx5_flow_meter_info *next_fm;
16816 struct mlx5_flow_meter_policy *next_policy;
16817 struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
16818 struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
16819 struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
16820 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16821 bool reuse_sub_policy;
16826 /* Iterate hierarchy to get all policies in this hierarchy. */
16827 policies[i++] = mtr_policy;
16828 if (!mtr_policy->is_hierarchy)
16830 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
16831 DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
16834 next_fm = mlx5_flow_meter_find(priv,
16835 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16837 DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
16841 mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
16843 MLX5_ASSERT(next_policy);
16844 mtr_policy = next_policy;
16848 * From last policy to the first one in hierarchy,
16849 * create / get the sub policy for each of them.
16851 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
16855 &reuse_sub_policy);
16857 DRV_LOG(ERR, "Failed to get the sub policy.");
16860 if (!reuse_sub_policy)
16861 sub_policies[j++] = sub_policy;
16862 next_sub_policy = sub_policy;
16867 uint16_t sub_policy_num;
16869 sub_policy = sub_policies[--j];
16870 mtr_policy = sub_policy->main_policy;
16871 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16872 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16873 sub_policy_num = (mtr_policy->sub_policy_num >>
16874 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16875 MLX5_MTR_SUB_POLICY_NUM_MASK;
16876 mtr_policy->sub_policys[domain][sub_policy_num - 1] =
16879 mtr_policy->sub_policy_num &=
16880 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16881 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
16882 mtr_policy->sub_policy_num |=
16883 (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16884 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
16885 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16893 * Create the sub policy tag rule for all meters in hierarchy.
16896 * Pointer to Ethernet device.
16898 * Meter information table.
16899 * @param[in] src_port
16900 * The src port this extra rule should use.
16902 * The src port match item.
16903 * @param[out] error
16904 * Perform verbose error reporting if not NULL.
16906 * 0 on success, a negative errno value otherwise and rte_errno is set.
16909 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
16910 struct mlx5_flow_meter_info *fm,
16912 const struct rte_flow_item *item,
16913 struct rte_flow_error *error)
16915 struct mlx5_priv *priv = dev->data->dev_private;
16916 struct mlx5_flow_meter_policy *mtr_policy;
16917 struct mlx5_flow_meter_sub_policy *sub_policy;
16918 struct mlx5_flow_meter_info *next_fm = NULL;
16919 struct mlx5_flow_meter_policy *next_policy;
16920 struct mlx5_flow_meter_sub_policy *next_sub_policy;
16921 struct mlx5_flow_tbl_data_entry *tbl_data;
16922 struct mlx5_sub_policy_color_rule *color_rule;
16923 struct mlx5_meter_policy_acts acts;
16924 uint32_t color_reg_c_idx;
16925 bool mtr_first = (src_port != UINT16_MAX) ? true : false;
16926 struct rte_flow_attr attr = {
16927 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16934 uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
16937 mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
16938 MLX5_ASSERT(mtr_policy);
16939 if (!mtr_policy->is_hierarchy)
16941 next_fm = mlx5_flow_meter_find(priv,
16942 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16944 return rte_flow_error_set(error, EINVAL,
16945 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16946 "Failed to find next meter in hierarchy.");
16948 if (!next_fm->drop_cnt)
16950 color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
16951 sub_policy = mtr_policy->sub_policys[domain][0];
16952 for (i = 0; i < RTE_COLORS; i++) {
16953 bool rule_exist = false;
16954 struct mlx5_meter_policy_action_container *act_cnt;
16956 if (i >= RTE_COLOR_YELLOW)
16958 TAILQ_FOREACH(color_rule,
16959 &sub_policy->color_rules[i], next_port)
16960 if (color_rule->src_port == src_port) {
16966 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16967 sizeof(struct mlx5_sub_policy_color_rule),
16970 return rte_flow_error_set(error, ENOMEM,
16971 RTE_FLOW_ERROR_TYPE_ACTION,
16972 NULL, "No memory to create tag color rule.");
16973 color_rule->src_port = src_port;
16975 next_policy = mlx5_flow_meter_policy_find(dev,
16976 next_fm->policy_id, NULL);
16977 MLX5_ASSERT(next_policy);
16978 next_sub_policy = next_policy->sub_policys[domain][0];
16979 tbl_data = container_of(next_sub_policy->tbl_rsc,
16980 struct mlx5_flow_tbl_data_entry, tbl);
16981 act_cnt = &mtr_policy->act_cnt[i];
16983 acts.dv_actions[0] = next_fm->meter_action;
16984 acts.dv_actions[1] = act_cnt->modify_hdr->action;
16986 acts.dv_actions[0] = act_cnt->modify_hdr->action;
16987 acts.dv_actions[1] = next_fm->meter_action;
16989 acts.dv_actions[2] = tbl_data->jump.action;
16990 acts.actions_n = 3;
16991 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
16995 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16996 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16998 &color_rule->matcher, error)) {
16999 rte_flow_error_set(error, errno,
17000 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17001 "Failed to create hierarchy meter matcher.");
17004 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
17006 color_rule->matcher->matcher_object,
17007 acts.actions_n, acts.dv_actions,
17009 &color_rule->rule, &attr)) {
17010 rte_flow_error_set(error, errno,
17011 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17012 "Failed to create hierarchy meter rule.");
17015 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
17016 color_rule, next_port);
17020 * Recursive call to iterate all meters in hierarchy and
17021 * create needed rules.
17023 return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17024 src_port, item, error);
17027 if (color_rule->rule)
17028 mlx5_flow_os_destroy_flow(color_rule->rule);
17029 if (color_rule->matcher) {
17030 struct mlx5_flow_tbl_data_entry *tbl =
17031 container_of(color_rule->matcher->tbl,
17032 typeof(*tbl), tbl);
17033 mlx5_list_unregister(tbl->matchers,
17034 &color_rule->matcher->entry);
17036 mlx5_free(color_rule);
17039 mlx5_flow_meter_detach(priv, next_fm);
17044 * Destroy the sub policy table with RX queue.
17047 * Pointer to Ethernet device.
17048 * @param[in] mtr_policy
17049 * Pointer to meter policy table.
17052 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17053 struct mlx5_flow_meter_policy *mtr_policy)
17055 struct mlx5_priv *priv = dev->data->dev_private;
17056 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17057 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17059 uint16_t sub_policy_num, new_policy_num;
17061 rte_spinlock_lock(&mtr_policy->sl);
17062 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17063 switch (mtr_policy->act_cnt[i].fate_action) {
17064 case MLX5_FLOW_FATE_SHARED_RSS:
17065 sub_policy_num = (mtr_policy->sub_policy_num >>
17066 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17067 MLX5_MTR_SUB_POLICY_NUM_MASK;
17068 new_policy_num = sub_policy_num;
17069 for (j = 0; j < sub_policy_num; j++) {
17071 mtr_policy->sub_policys[domain][j];
17073 __flow_dv_destroy_sub_policy_rules(dev,
17076 mtr_policy->sub_policys[domain][0]) {
17077 mtr_policy->sub_policys[domain][j] =
17080 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17086 if (new_policy_num != sub_policy_num) {
17087 mtr_policy->sub_policy_num &=
17088 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17089 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17090 mtr_policy->sub_policy_num |=
17092 MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17093 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17096 case MLX5_FLOW_FATE_QUEUE:
17097 sub_policy = mtr_policy->sub_policys[domain][0];
17098 __flow_dv_destroy_sub_policy_rules(dev,
17102 /*Other actions without queue and do nothing*/
17106 rte_spinlock_unlock(&mtr_policy->sl);
17109 * Check whether the DR drop action is supported on the root table or not.
17111 * Create a simple flow with DR drop action on root table to validate
17112 * if DR drop action on root table is supported or not.
17115 * Pointer to rte_eth_dev structure.
17118 * 0 on success, a negative errno value otherwise and rte_errno is set.
17121 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17123 struct mlx5_priv *priv = dev->data->dev_private;
17124 struct mlx5_dev_ctx_shared *sh = priv->sh;
17125 struct mlx5_flow_dv_match_params mask = {
17126 .size = sizeof(mask.buf),
17128 struct mlx5_flow_dv_match_params value = {
17129 .size = sizeof(value.buf),
17131 struct mlx5dv_flow_matcher_attr dv_attr = {
17132 .type = IBV_FLOW_ATTR_NORMAL,
17134 .match_criteria_enable = 0,
17135 .match_mask = (void *)&mask,
17137 struct mlx5_flow_tbl_resource *tbl = NULL;
17138 void *matcher = NULL;
17142 tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17146 dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17147 __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17148 ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17149 tbl->obj, &matcher);
17152 __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17153 ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17154 &sh->dr_drop_action, &flow);
17157 * If DR drop action is not supported on root table, flow create will
17158 * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17162 (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17163 DRV_LOG(INFO, "DR drop action is not supported in root table.");
17165 DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17168 claim_zero(mlx5_flow_os_destroy_flow(flow));
17171 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17173 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17178 * Validate the batch counter support in root table.
17180 * Create a simple flow with invalid counter and drop action on root table to
17181 * validate if batch counter with offset on root table is supported or not.
17184 * Pointer to rte_eth_dev structure.
17187 * 0 on success, a negative errno value otherwise and rte_errno is set.
17190 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17192 struct mlx5_priv *priv = dev->data->dev_private;
17193 struct mlx5_dev_ctx_shared *sh = priv->sh;
17194 struct mlx5_flow_dv_match_params mask = {
17195 .size = sizeof(mask.buf),
17197 struct mlx5_flow_dv_match_params value = {
17198 .size = sizeof(value.buf),
17200 struct mlx5dv_flow_matcher_attr dv_attr = {
17201 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17203 .match_criteria_enable = 0,
17204 .match_mask = (void *)&mask,
17206 void *actions[2] = { 0 };
17207 struct mlx5_flow_tbl_resource *tbl = NULL;
17208 struct mlx5_devx_obj *dcs = NULL;
17209 void *matcher = NULL;
17213 tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17217 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
17220 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17224 dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17225 __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17226 ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17227 tbl->obj, &matcher);
17230 __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17231 ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17235 * If batch counter with offset is not supported, the driver will not
17236 * validate the invalid offset value, flow create should success.
17237 * In this case, it means batch counter is not supported in root table.
17239 * Otherwise, if flow create is failed, counter offset is supported.
17242 DRV_LOG(INFO, "Batch counter is not supported in root "
17243 "table. Switch to fallback mode.");
17244 rte_errno = ENOTSUP;
17246 claim_zero(mlx5_flow_os_destroy_flow(flow));
17248 /* Check matcher to make sure validate fail at flow create. */
17249 if (!matcher || (matcher && errno != EINVAL))
17250 DRV_LOG(ERR, "Unexpected error in counter offset "
17251 "support detection");
17255 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17257 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17259 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17261 claim_zero(mlx5_devx_cmd_destroy(dcs));
17266 * Query a devx counter.
17269 * Pointer to the Ethernet device structure.
17271 * Index to the flow counter.
17273 * Set to clear the counter statistics.
17275 * The statistics value of packets.
17276 * @param[out] bytes
17277 * The statistics value of bytes.
17280 * 0 on success, otherwise return -1.
17283 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17284 uint64_t *pkts, uint64_t *bytes)
17286 struct mlx5_priv *priv = dev->data->dev_private;
17287 struct mlx5_flow_counter *cnt;
17288 uint64_t inn_pkts, inn_bytes;
17291 if (!priv->sh->devx)
17294 ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17297 cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17298 *pkts = inn_pkts - cnt->hits;
17299 *bytes = inn_bytes - cnt->bytes;
17301 cnt->hits = inn_pkts;
17302 cnt->bytes = inn_bytes;
17308 * Get aged-out flows.
17311 * Pointer to the Ethernet device structure.
17312 * @param[in] context
17313 * The address of an array of pointers to the aged-out flows contexts.
17314 * @param[in] nb_contexts
17315 * The length of context array pointers.
17316 * @param[out] error
17317 * Perform verbose error reporting if not NULL. Initialized in case of
17321 * how many contexts get in success, otherwise negative errno value.
17322 * if nb_contexts is 0, return the amount of all aged contexts.
17323 * if nb_contexts is not 0 , return the amount of aged flows reported
17324 * in the context array.
17325 * @note: only stub for now
17328 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17330 uint32_t nb_contexts,
17331 struct rte_flow_error *error)
17333 struct mlx5_priv *priv = dev->data->dev_private;
17334 struct mlx5_age_info *age_info;
17335 struct mlx5_age_param *age_param;
17336 struct mlx5_flow_counter *counter;
17337 struct mlx5_aso_age_action *act;
17340 if (nb_contexts && !context)
17341 return rte_flow_error_set(error, EINVAL,
17342 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17343 NULL, "empty context");
17344 age_info = GET_PORT_AGE_INFO(priv);
17345 rte_spinlock_lock(&age_info->aged_sl);
17346 LIST_FOREACH(act, &age_info->aged_aso, next) {
17349 context[nb_flows - 1] =
17350 act->age_params.context;
17351 if (!(--nb_contexts))
17355 TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17358 age_param = MLX5_CNT_TO_AGE(counter);
17359 context[nb_flows - 1] = age_param->context;
17360 if (!(--nb_contexts))
17364 rte_spinlock_unlock(&age_info->aged_sl);
17365 MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17370 * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17373 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17375 return flow_dv_counter_alloc(dev, 0);
17379 * Validate indirect action.
17380 * Dispatcher for action type specific validation.
17383 * Pointer to the Ethernet device structure.
17385 * Indirect action configuration.
17386 * @param[in] action
17387 * The indirect action object to validate.
17388 * @param[out] error
17389 * Perform verbose error reporting if not NULL. Initialized in case of
17393 * 0 on success, otherwise negative errno value.
17396 flow_dv_action_validate(struct rte_eth_dev *dev,
17397 const struct rte_flow_indir_action_conf *conf,
17398 const struct rte_flow_action *action,
17399 struct rte_flow_error *err)
17401 struct mlx5_priv *priv = dev->data->dev_private;
17403 RTE_SET_USED(conf);
17404 switch (action->type) {
17405 case RTE_FLOW_ACTION_TYPE_RSS:
17407 * priv->obj_ops is set according to driver capabilities.
17408 * When DevX capabilities are
17409 * sufficient, it is set to devx_obj_ops.
17410 * Otherwise, it is set to ibv_obj_ops.
17411 * ibv_obj_ops doesn't support ind_table_modify operation.
17412 * In this case the indirect RSS action can't be used.
17414 if (priv->obj_ops.ind_table_modify == NULL)
17415 return rte_flow_error_set
17417 RTE_FLOW_ERROR_TYPE_ACTION,
17419 "Indirect RSS action not supported");
17420 return mlx5_validate_action_rss(dev, action, err);
17421 case RTE_FLOW_ACTION_TYPE_AGE:
17422 if (!priv->sh->aso_age_mng)
17423 return rte_flow_error_set(err, ENOTSUP,
17424 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17426 "Indirect age action not supported");
17427 return flow_dv_validate_action_age(0, action, dev, err);
17428 case RTE_FLOW_ACTION_TYPE_COUNT:
17429 return flow_dv_validate_action_count(dev, true, 0, err);
17430 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17431 if (!priv->sh->ct_aso_en)
17432 return rte_flow_error_set(err, ENOTSUP,
17433 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17434 "ASO CT is not supported");
17435 return mlx5_validate_action_ct(dev, action->conf, err);
17437 return rte_flow_error_set(err, ENOTSUP,
17438 RTE_FLOW_ERROR_TYPE_ACTION,
17440 "action type not supported");
17445 * Check if the RSS configurations for colors of a meter policy match
17446 * each other, except the queues.
17449 * Pointer to the first RSS flow action.
17451 * Pointer to the second RSS flow action.
17454 * 0 on match, 1 on conflict.
17457 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17458 const struct rte_flow_action_rss *r2)
17462 if (r1->func != r2->func || r1->level != r2->level ||
17463 r1->types != r2->types || r1->key_len != r2->key_len ||
17464 memcmp(r1->key, r2->key, r1->key_len))
17470 * Validate the meter hierarchy chain for meter policy.
17473 * Pointer to the Ethernet device structure.
17474 * @param[in] meter_id
17476 * @param[in] action_flags
17477 * Holds the actions detected until now.
17478 * @param[out] is_rss
17480 * @param[out] hierarchy_domain
17481 * The domain bitmap for hierarchy policy.
17482 * @param[out] error
17483 * Perform verbose error reporting if not NULL. Initialized in case of
17487 * 0 on success, otherwise negative errno value with error set.
17490 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17492 uint64_t action_flags,
17494 uint8_t *hierarchy_domain,
17495 struct rte_mtr_error *error)
17497 struct mlx5_priv *priv = dev->data->dev_private;
17498 struct mlx5_flow_meter_info *fm;
17499 struct mlx5_flow_meter_policy *policy;
17502 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17503 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17504 return -rte_mtr_error_set(error, EINVAL,
17505 RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17507 "Multiple fate actions not supported.");
17508 *hierarchy_domain = 0;
17510 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17512 return -rte_mtr_error_set(error, EINVAL,
17513 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17514 "Meter not found in meter hierarchy.");
17515 if (fm->def_policy)
17516 return -rte_mtr_error_set(error, EINVAL,
17517 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17518 "Non termination meter not supported in hierarchy.");
17519 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17520 MLX5_ASSERT(policy);
17522 * Only inherit the supported domains of the first meter in
17524 * One meter supports at least one domain.
17526 if (!*hierarchy_domain) {
17527 if (policy->transfer)
17528 *hierarchy_domain |=
17529 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17530 if (policy->ingress)
17531 *hierarchy_domain |=
17532 MLX5_MTR_DOMAIN_INGRESS_BIT;
17533 if (policy->egress)
17534 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17536 if (!policy->is_hierarchy) {
17537 *is_rss = policy->is_rss;
17540 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17541 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17542 return -rte_mtr_error_set(error, EINVAL,
17543 RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17544 "Exceed max hierarchy meter number.");
17550 * Validate meter policy actions.
17551 * Dispatcher for action type specific validation.
17554 * Pointer to the Ethernet device structure.
17555 * @param[in] action
17556 * The meter policy action object to validate.
17558 * Attributes of flow to determine steering domain.
17559 * @param[out] error
17560 * Perform verbose error reporting if not NULL. Initialized in case of
17564 * 0 on success, otherwise negative errno value.
17567 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17568 const struct rte_flow_action *actions[RTE_COLORS],
17569 struct rte_flow_attr *attr,
17571 uint8_t *domain_bitmap,
17572 uint8_t *policy_mode,
17573 struct rte_mtr_error *error)
17575 struct mlx5_priv *priv = dev->data->dev_private;
17576 struct mlx5_dev_config *dev_conf = &priv->config;
17577 const struct rte_flow_action *act;
17578 uint64_t action_flags[RTE_COLORS] = {0};
17581 struct rte_flow_error flow_err;
17582 uint8_t domain_color[RTE_COLORS] = {0};
17583 uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17584 uint8_t hierarchy_domain = 0;
17585 const struct rte_flow_action_meter *mtr;
17586 bool def_green = false;
17587 bool def_yellow = false;
17588 const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17590 if (!priv->config.dv_esw_en)
17591 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17592 *domain_bitmap = def_domain;
17593 /* Red color could only support DROP action. */
17594 if (!actions[RTE_COLOR_RED] ||
17595 actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17596 return -rte_mtr_error_set(error, ENOTSUP,
17597 RTE_MTR_ERROR_TYPE_METER_POLICY,
17598 NULL, "Red color only supports drop action.");
17600 * Check default policy actions:
17601 * Green / Yellow: no action, Red: drop action
17602 * Either G or Y will trigger default policy actions to be created.
17604 if (!actions[RTE_COLOR_GREEN] ||
17605 actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17607 if (!actions[RTE_COLOR_YELLOW] ||
17608 actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17610 if (def_green && def_yellow) {
17611 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17613 } else if (!def_green && def_yellow) {
17614 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17615 } else if (def_green && !def_yellow) {
17616 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17618 /* Set to empty string in case of NULL pointer access by user. */
17619 flow_err.message = "";
17620 for (i = 0; i < RTE_COLORS; i++) {
17622 for (action_flags[i] = 0, actions_n = 0;
17623 act && act->type != RTE_FLOW_ACTION_TYPE_END;
17625 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17626 return -rte_mtr_error_set(error, ENOTSUP,
17627 RTE_MTR_ERROR_TYPE_METER_POLICY,
17628 NULL, "too many actions");
17629 switch (act->type) {
17630 case RTE_FLOW_ACTION_TYPE_PORT_ID:
17631 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
17632 if (!priv->config.dv_esw_en)
17633 return -rte_mtr_error_set(error,
17635 RTE_MTR_ERROR_TYPE_METER_POLICY,
17636 NULL, "PORT action validate check"
17637 " fail for ESW disable");
17638 ret = flow_dv_validate_action_port_id(dev,
17640 act, attr, &flow_err);
17642 return -rte_mtr_error_set(error,
17644 RTE_MTR_ERROR_TYPE_METER_POLICY,
17645 NULL, flow_err.message ?
17647 "PORT action validate check fail");
17649 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17651 case RTE_FLOW_ACTION_TYPE_MARK:
17652 ret = flow_dv_validate_action_mark(dev, act,
17656 return -rte_mtr_error_set(error,
17658 RTE_MTR_ERROR_TYPE_METER_POLICY,
17659 NULL, flow_err.message ?
17661 "Mark action validate check fail");
17662 if (dev_conf->dv_xmeta_en !=
17663 MLX5_XMETA_MODE_LEGACY)
17664 return -rte_mtr_error_set(error,
17666 RTE_MTR_ERROR_TYPE_METER_POLICY,
17667 NULL, "Extend MARK action is "
17668 "not supported. Please try use "
17669 "default policy for meter.");
17670 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17673 case RTE_FLOW_ACTION_TYPE_SET_TAG:
17674 ret = flow_dv_validate_action_set_tag(dev,
17675 act, action_flags[i],
17678 return -rte_mtr_error_set(error,
17680 RTE_MTR_ERROR_TYPE_METER_POLICY,
17681 NULL, flow_err.message ?
17683 "Set tag action validate check fail");
17684 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
17687 case RTE_FLOW_ACTION_TYPE_DROP:
17688 ret = mlx5_flow_validate_action_drop
17689 (action_flags[i], attr, &flow_err);
17691 return -rte_mtr_error_set(error,
17693 RTE_MTR_ERROR_TYPE_METER_POLICY,
17694 NULL, flow_err.message ?
17696 "Drop action validate check fail");
17697 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
17700 case RTE_FLOW_ACTION_TYPE_QUEUE:
17702 * Check whether extensive
17703 * metadata feature is engaged.
17705 if (dev_conf->dv_flow_en &&
17706 (dev_conf->dv_xmeta_en !=
17707 MLX5_XMETA_MODE_LEGACY) &&
17708 mlx5_flow_ext_mreg_supported(dev))
17709 return -rte_mtr_error_set(error,
17711 RTE_MTR_ERROR_TYPE_METER_POLICY,
17712 NULL, "Queue action with meta "
17713 "is not supported. Please try use "
17714 "default policy for meter.");
17715 ret = mlx5_flow_validate_action_queue(act,
17716 action_flags[i], dev,
17719 return -rte_mtr_error_set(error,
17721 RTE_MTR_ERROR_TYPE_METER_POLICY,
17722 NULL, flow_err.message ?
17724 "Queue action validate check fail");
17725 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
17728 case RTE_FLOW_ACTION_TYPE_RSS:
17729 if (dev_conf->dv_flow_en &&
17730 (dev_conf->dv_xmeta_en !=
17731 MLX5_XMETA_MODE_LEGACY) &&
17732 mlx5_flow_ext_mreg_supported(dev))
17733 return -rte_mtr_error_set(error,
17735 RTE_MTR_ERROR_TYPE_METER_POLICY,
17736 NULL, "RSS action with meta "
17737 "is not supported. Please try use "
17738 "default policy for meter.");
17739 ret = mlx5_validate_action_rss(dev, act,
17742 return -rte_mtr_error_set(error,
17744 RTE_MTR_ERROR_TYPE_METER_POLICY,
17745 NULL, flow_err.message ?
17747 "RSS action validate check fail");
17748 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
17750 /* Either G or Y will set the RSS. */
17751 rss_color[i] = act->conf;
17753 case RTE_FLOW_ACTION_TYPE_JUMP:
17754 ret = flow_dv_validate_action_jump(dev,
17755 NULL, act, action_flags[i],
17756 attr, true, &flow_err);
17758 return -rte_mtr_error_set(error,
17760 RTE_MTR_ERROR_TYPE_METER_POLICY,
17761 NULL, flow_err.message ?
17763 "Jump action validate check fail");
17765 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
17768 * Only the last meter in the hierarchy will support
17769 * the YELLOW color steering. Then in the meter policy
17770 * actions list, there should be no other meter inside.
17772 case RTE_FLOW_ACTION_TYPE_METER:
17773 if (i != RTE_COLOR_GREEN)
17774 return -rte_mtr_error_set(error,
17776 RTE_MTR_ERROR_TYPE_METER_POLICY,
17778 "Meter hierarchy only supports GREEN color.");
17779 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
17780 return -rte_mtr_error_set(error,
17782 RTE_MTR_ERROR_TYPE_METER_POLICY,
17784 "No yellow policy should be provided in meter hierarchy.");
17786 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17796 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
17799 return -rte_mtr_error_set(error, ENOTSUP,
17800 RTE_MTR_ERROR_TYPE_METER_POLICY,
17802 "Doesn't support optional action");
17805 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID) {
17806 domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
17807 } else if ((action_flags[i] &
17808 (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
17809 (action_flags[i] & MLX5_FLOW_ACTION_MARK)) {
17811 * Only support MLX5_XMETA_MODE_LEGACY
17812 * so MARK action is only in ingress domain.
17814 domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
17816 domain_color[i] = def_domain;
17817 if (action_flags[i] &&
17818 !(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17820 ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17822 if (action_flags[i] &
17823 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
17824 domain_color[i] &= hierarchy_domain;
17826 * Non-termination actions only support NIC Tx domain.
17827 * The adjustion should be skipped when there is no
17828 * action or only END is provided. The default domains
17829 * bit-mask is set to find the MIN intersection.
17830 * The action flags checking should also be skipped.
17832 if ((def_green && i == RTE_COLOR_GREEN) ||
17833 (def_yellow && i == RTE_COLOR_YELLOW))
17836 * Validate the drop action mutual exclusion
17837 * with other actions. Drop action is mutually-exclusive
17838 * with any other action, except for Count action.
17840 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
17841 (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
17842 return -rte_mtr_error_set(error, ENOTSUP,
17843 RTE_MTR_ERROR_TYPE_METER_POLICY,
17844 NULL, "Drop action is mutually-exclusive "
17845 "with any other action");
17847 /* Eswitch has few restrictions on using items and actions */
17848 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
17849 if (!mlx5_flow_ext_mreg_supported(dev) &&
17850 action_flags[i] & MLX5_FLOW_ACTION_MARK)
17851 return -rte_mtr_error_set(error, ENOTSUP,
17852 RTE_MTR_ERROR_TYPE_METER_POLICY,
17853 NULL, "unsupported action MARK");
17854 if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
17855 return -rte_mtr_error_set(error, ENOTSUP,
17856 RTE_MTR_ERROR_TYPE_METER_POLICY,
17857 NULL, "unsupported action QUEUE");
17858 if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
17859 return -rte_mtr_error_set(error, ENOTSUP,
17860 RTE_MTR_ERROR_TYPE_METER_POLICY,
17861 NULL, "unsupported action RSS");
17862 if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17863 return -rte_mtr_error_set(error, ENOTSUP,
17864 RTE_MTR_ERROR_TYPE_METER_POLICY,
17865 NULL, "no fate action is found");
17867 if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
17868 (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
17869 if ((domain_color[i] &
17870 MLX5_MTR_DOMAIN_EGRESS_BIT))
17872 MLX5_MTR_DOMAIN_EGRESS_BIT;
17874 return -rte_mtr_error_set(error,
17876 RTE_MTR_ERROR_TYPE_METER_POLICY,
17878 "no fate action is found");
17882 /* If both colors have RSS, the attributes should be the same. */
17883 if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
17884 rss_color[RTE_COLOR_YELLOW]))
17885 return -rte_mtr_error_set(error, EINVAL,
17886 RTE_MTR_ERROR_TYPE_METER_POLICY,
17887 NULL, "policy RSS attr conflict");
17888 if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
17890 /* "domain_color[C]" is non-zero for each color, default is ALL. */
17891 if (!def_green && !def_yellow &&
17892 domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
17893 !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
17894 !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
17895 return -rte_mtr_error_set(error, EINVAL,
17896 RTE_MTR_ERROR_TYPE_METER_POLICY,
17897 NULL, "policy domains conflict");
17899 * At least one color policy is listed in the actions, the domains
17900 * to be supported should be the intersection.
17902 *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
17903 domain_color[RTE_COLOR_YELLOW];
17908 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
17910 struct mlx5_priv *priv = dev->data->dev_private;
17913 if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
17914 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
17919 if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
17920 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
17924 if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
17925 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
17932 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
17933 .validate = flow_dv_validate,
17934 .prepare = flow_dv_prepare,
17935 .translate = flow_dv_translate,
17936 .apply = flow_dv_apply,
17937 .remove = flow_dv_remove,
17938 .destroy = flow_dv_destroy,
17939 .query = flow_dv_query,
17940 .create_mtr_tbls = flow_dv_create_mtr_tbls,
17941 .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
17942 .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
17943 .create_meter = flow_dv_mtr_alloc,
17944 .free_meter = flow_dv_aso_mtr_release_to_pool,
17945 .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
17946 .create_mtr_acts = flow_dv_create_mtr_policy_acts,
17947 .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
17948 .create_policy_rules = flow_dv_create_policy_rules,
17949 .destroy_policy_rules = flow_dv_destroy_policy_rules,
17950 .create_def_policy = flow_dv_create_def_policy,
17951 .destroy_def_policy = flow_dv_destroy_def_policy,
17952 .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
17953 .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
17954 .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
17955 .counter_alloc = flow_dv_counter_allocate,
17956 .counter_free = flow_dv_counter_free,
17957 .counter_query = flow_dv_counter_query,
17958 .get_aged_flows = flow_dv_get_aged_flows,
17959 .action_validate = flow_dv_action_validate,
17960 .action_create = flow_dv_action_create,
17961 .action_destroy = flow_dv_action_destroy,
17962 .action_update = flow_dv_action_update,
17963 .action_query = flow_dv_action_query,
17964 .sync_domain = flow_dv_sync_domain,
17967 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */