drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 /* Verbs header. */
  12 /* ISO C doesn't support unnamed structs/unions, disabling -pedantic. */
  13 #ifdef PEDANTIC
  14 #pragma GCC diagnostic ignored "-Wpedantic"
  15 #endif
  16 #include <infiniband/verbs.h>
  17 #ifdef PEDANTIC
  18 #pragma GCC diagnostic error "-Wpedantic"
  19 #endif
  20
  21 #include <rte_common.h>
  22 #include <rte_ether.h>
  23 #include <rte_ethdev_driver.h>
  24 #include <rte_flow.h>
  25 #include <rte_flow_driver.h>
  26 #include <rte_malloc.h>
  27 #include <rte_ip.h>
  28 #include <rte_gre.h>
  29 #include <rte_vxlan.h>
  30
  31 #include "mlx5.h"
  32 #include "mlx5_defs.h"
  33 #include "mlx5_glue.h"
  34 #include "mlx5_flow.h"
  35 #include "mlx5_prm.h"
  36 #include "mlx5_rxtx.h"
  37
  38 #ifdef HAVE_IBV_FLOW_DV_SUPPORT
  39
  40 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  41 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  42 #endif
  43
  44 #ifndef HAVE_MLX5DV_DR_ESWITCH
  45 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  46 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  47 #endif
  48 #endif
  49
  50 #ifndef HAVE_MLX5DV_DR
  51 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  52 #endif
  53
  54 /* VLAN header definitions */
  55 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  56 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  57 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  58 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  59 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  60
  61 union flow_dv_attr {
  62         struct {
  63                 uint32_t valid:1;
  64                 uint32_t ipv4:1;
  65                 uint32_t ipv6:1;
  66                 uint32_t tcp:1;
  67                 uint32_t udp:1;
  68                 uint32_t reserved:27;
  69         };
  70         uint32_t attr;
  71 };
  72
  73 /**
  74  * Initialize flow attributes structure according to flow items' types.
  75  *
  76  * @param[in] item
  77  *   Pointer to item specification.
  78  * @param[out] attr
  79  *   Pointer to flow attributes structure.
  80  */
  81 static void
  82 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr)
  83 {
  84         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
  85                 switch (item->type) {
  86                 case RTE_FLOW_ITEM_TYPE_IPV4:
  87                         attr->ipv4 = 1;
  88                         break;
  89                 case RTE_FLOW_ITEM_TYPE_IPV6:
  90                         attr->ipv6 = 1;
  91                         break;
  92                 case RTE_FLOW_ITEM_TYPE_UDP:
  93                         attr->udp = 1;
  94                         break;
  95                 case RTE_FLOW_ITEM_TYPE_TCP:
  96                         attr->tcp = 1;
  97                         break;
  98                 default:
  99                         break;
 100                 }
 101         }
 102         attr->valid = 1;
 103 }
 104
 105 /**
 106  * Convert rte_mtr_color to mlx5 color.
 107  *
 108  * @param[in] rcol
 109  *   rte_mtr_color.
 110  *
 111  * @return
 112  *   mlx5 color.
 113  */
 114 static int
 115 rte_col_2_mlx5_col(enum rte_color rcol)
 116 {
 117         switch (rcol) {
 118         case RTE_COLOR_GREEN:
 119                 return MLX5_FLOW_COLOR_GREEN;
 120         case RTE_COLOR_YELLOW:
 121                 return MLX5_FLOW_COLOR_YELLOW;
 122         case RTE_COLOR_RED:
 123                 return MLX5_FLOW_COLOR_RED;
 124         default:
 125                 break;
 126         }
 127         return MLX5_FLOW_COLOR_UNDEFINED;
 128 }
 129
 130 struct field_modify_info {
 131         uint32_t size; /* Size of field in protocol header, in bytes. */
 132         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 133         enum mlx5_modification_field id;
 134 };
 135
 136 struct field_modify_info modify_eth[] = {
 137         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 138         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 139         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 140         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 141         {0, 0, 0},
 142 };
 143
 144 struct field_modify_info modify_vlan_out_first_vid[] = {
 145         /* Size in bits !!! */
 146         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 147         {0, 0, 0},
 148 };
 149
 150 struct field_modify_info modify_ipv4[] = {
 151         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 152         {4, 12, MLX5_MODI_OUT_SIPV4},
 153         {4, 16, MLX5_MODI_OUT_DIPV4},
 154         {0, 0, 0},
 155 };
 156
 157 struct field_modify_info modify_ipv6[] = {
 158         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 159         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 160         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 161         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 162         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 163         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 164         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 165         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 166         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 167         {0, 0, 0},
 168 };
 169
 170 struct field_modify_info modify_udp[] = {
 171         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 172         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 173         {0, 0, 0},
 174 };
 175
 176 struct field_modify_info modify_tcp[] = {
 177         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 178         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 179         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 180         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 181         {0, 0, 0},
 182 };
 183
 184 static void
 185 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 186                           uint8_t next_protocol, uint64_t *item_flags,
 187                           int *tunnel)
 188 {
 189         assert(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 190                item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 191         if (next_protocol == IPPROTO_IPIP) {
 192                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 193                 *tunnel = 1;
 194         }
 195         if (next_protocol == IPPROTO_IPV6) {
 196                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 197                 *tunnel = 1;
 198         }
 199 }
 200
 201 /**
 202  * Acquire the synchronizing object to protect multithreaded access
 203  * to shared dv context. Lock occurs only if context is actually
 204  * shared, i.e. we have multiport IB device and representors are
 205  * created.
 206  *
 207  * @param[in] dev
 208  *   Pointer to the rte_eth_dev structure.
 209  */
 210 static void
 211 flow_dv_shared_lock(struct rte_eth_dev *dev)
 212 {
 213         struct mlx5_priv *priv = dev->data->dev_private;
 214         struct mlx5_ibv_shared *sh = priv->sh;
 215
 216         if (sh->dv_refcnt > 1) {
 217                 int ret;
 218
 219                 ret = pthread_mutex_lock(&sh->dv_mutex);
 220                 assert(!ret);
 221                 (void)ret;
 222         }
 223 }
 224
 225 static void
 226 flow_dv_shared_unlock(struct rte_eth_dev *dev)
 227 {
 228         struct mlx5_priv *priv = dev->data->dev_private;
 229         struct mlx5_ibv_shared *sh = priv->sh;
 230
 231         if (sh->dv_refcnt > 1) {
 232                 int ret;
 233
 234                 ret = pthread_mutex_unlock(&sh->dv_mutex);
 235                 assert(!ret);
 236                 (void)ret;
 237         }
 238 }
 239
 240 /* Update VLAN's VID/PCP based on input rte_flow_action.
 241  *
 242  * @param[in] action
 243  *   Pointer to struct rte_flow_action.
 244  * @param[out] vlan
 245  *   Pointer to struct rte_vlan_hdr.
 246  */
 247 static void
 248 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 249                          struct rte_vlan_hdr *vlan)
 250 {
 251         uint16_t vlan_tci;
 252         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 253                 vlan_tci =
 254                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 255                                                action->conf)->vlan_pcp;
 256                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 257                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 258                 vlan->vlan_tci |= vlan_tci;
 259         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 260                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 261                 vlan->vlan_tci |= rte_be_to_cpu_16
 262                     (((const struct rte_flow_action_of_set_vlan_vid *)
 263                                              action->conf)->vlan_vid);
 264         }
 265 }
 266
 267 /**
 268  * Fetch 1, 2, 3 or 4 byte field from the byte array
 269  * and return as unsigned integer in host-endian format.
 270  *
 271  * @param[in] data
 272  *   Pointer to data array.
 273  * @param[in] size
 274  *   Size of field to extract.
 275  *
 276  * @return
 277  *   converted field in host endian format.
 278  */
 279 static inline uint32_t
 280 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 281 {
 282         uint32_t ret;
 283
 284         switch (size) {
 285         case 1:
 286                 ret = *data;
 287                 break;
 288         case 2:
 289                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 290                 break;
 291         case 3:
 292                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 293                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 294                 break;
 295         case 4:
 296                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 297                 break;
 298         default:
 299                 assert(false);
 300                 ret = 0;
 301                 break;
 302         }
 303         return ret;
 304 }
 305
 306 /**
 307  * Convert modify-header action to DV specification.
 308  *
 309  * Data length of each action is determined by provided field description
 310  * and the item mask. Data bit offset and width of each action is determined
 311  * by provided item mask.
 312  *
 313  * @param[in] item
 314  *   Pointer to item specification.
 315  * @param[in] field
 316  *   Pointer to field modification information.
 317  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 318  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 319  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 320  * @param[in] dcopy
 321  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 322  *   Negative offset value sets the same offset as source offset.
 323  *   size field is ignored, value is taken from source field.
 324  * @param[in,out] resource
 325  *   Pointer to the modify-header resource.
 326  * @param[in] type
 327  *   Type of modification.
 328  * @param[out] error
 329  *   Pointer to the error structure.
 330  *
 331  * @return
 332  *   0 on success, a negative errno value otherwise and rte_errno is set.
 333  */
 334 static int
 335 flow_dv_convert_modify_action(struct rte_flow_item *item,
 336                               struct field_modify_info *field,
 337                               struct field_modify_info *dcopy,
 338                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 339                               uint32_t type, struct rte_flow_error *error)
 340 {
 341         uint32_t i = resource->actions_num;
 342         struct mlx5_modification_cmd *actions = resource->actions;
 343
 344         /*
 345          * The item and mask are provided in big-endian format.
 346          * The fields should be presented as in big-endian format either.
 347          * Mask must be always present, it defines the actual field width.
 348          */
 349         assert(item->mask);
 350         assert(field->size);
 351         do {
 352                 unsigned int size_b;
 353                 unsigned int off_b;
 354                 uint32_t mask;
 355                 uint32_t data;
 356
 357                 if (i >= MLX5_MODIFY_NUM)
 358                         return rte_flow_error_set(error, EINVAL,
 359                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 360                                  "too many items to modify");
 361                 /* Fetch variable byte size mask from the array. */
 362                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 363                                            field->offset, field->size);
 364                 if (!mask) {
 365                         ++field;
 366                         continue;
 367                 }
 368                 /* Deduce actual data width in bits from mask value. */
 369                 off_b = rte_bsf32(mask);
 370                 size_b = sizeof(uint32_t) * CHAR_BIT -
 371                          off_b - __builtin_clz(mask);
 372                 assert(size_b);
 373                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 374                 actions[i].action_type = type;
 375                 actions[i].field = field->id;
 376                 actions[i].offset = off_b;
 377                 actions[i].length = size_b;
 378                 /* Convert entire record to expected big-endian format. */
 379                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 380                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 381                         assert(dcopy);
 382                         actions[i].dst_field = dcopy->id;
 383                         actions[i].dst_offset =
 384                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 385                         /* Convert entire record to big-endian format. */
 386                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 387                 } else {
 388                         assert(item->spec);
 389                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 390                                                    field->offset, field->size);
 391                         /* Shift out the trailing masked bits from data. */
 392                         data = (data & mask) >> off_b;
 393                         actions[i].data1 = rte_cpu_to_be_32(data);
 394                 }
 395                 ++i;
 396                 ++field;
 397         } while (field->size);
 398         resource->actions_num = i;
 399         if (!resource->actions_num)
 400                 return rte_flow_error_set(error, EINVAL,
 401                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 402                                           "invalid modification flow item");
 403         return 0;
 404 }
 405
 406 /**
 407  * Convert modify-header set IPv4 address action to DV specification.
 408  *
 409  * @param[in,out] resource
 410  *   Pointer to the modify-header resource.
 411  * @param[in] action
 412  *   Pointer to action specification.
 413  * @param[out] error
 414  *   Pointer to the error structure.
 415  *
 416  * @return
 417  *   0 on success, a negative errno value otherwise and rte_errno is set.
 418  */
 419 static int
 420 flow_dv_convert_action_modify_ipv4
 421                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 422                          const struct rte_flow_action *action,
 423                          struct rte_flow_error *error)
 424 {
 425         const struct rte_flow_action_set_ipv4 *conf =
 426                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 427         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 428         struct rte_flow_item_ipv4 ipv4;
 429         struct rte_flow_item_ipv4 ipv4_mask;
 430
 431         memset(&ipv4, 0, sizeof(ipv4));
 432         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 433         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 434                 ipv4.hdr.src_addr = conf->ipv4_addr;
 435                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 436         } else {
 437                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 438                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 439         }
 440         item.spec = &ipv4;
 441         item.mask = &ipv4_mask;
 442         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 443                                              MLX5_MODIFICATION_TYPE_SET, error);
 444 }
 445
 446 /**
 447  * Convert modify-header set IPv6 address action to DV specification.
 448  *
 449  * @param[in,out] resource
 450  *   Pointer to the modify-header resource.
 451  * @param[in] action
 452  *   Pointer to action specification.
 453  * @param[out] error
 454  *   Pointer to the error structure.
 455  *
 456  * @return
 457  *   0 on success, a negative errno value otherwise and rte_errno is set.
 458  */
 459 static int
 460 flow_dv_convert_action_modify_ipv6
 461                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 462                          const struct rte_flow_action *action,
 463                          struct rte_flow_error *error)
 464 {
 465         const struct rte_flow_action_set_ipv6 *conf =
 466                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 467         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 468         struct rte_flow_item_ipv6 ipv6;
 469         struct rte_flow_item_ipv6 ipv6_mask;
 470
 471         memset(&ipv6, 0, sizeof(ipv6));
 472         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 473         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 474                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 475                        sizeof(ipv6.hdr.src_addr));
 476                 memcpy(&ipv6_mask.hdr.src_addr,
 477                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 478                        sizeof(ipv6.hdr.src_addr));
 479         } else {
 480                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 481                        sizeof(ipv6.hdr.dst_addr));
 482                 memcpy(&ipv6_mask.hdr.dst_addr,
 483                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 484                        sizeof(ipv6.hdr.dst_addr));
 485         }
 486         item.spec = &ipv6;
 487         item.mask = &ipv6_mask;
 488         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 489                                              MLX5_MODIFICATION_TYPE_SET, error);
 490 }
 491
 492 /**
 493  * Convert modify-header set MAC address action to DV specification.
 494  *
 495  * @param[in,out] resource
 496  *   Pointer to the modify-header resource.
 497  * @param[in] action
 498  *   Pointer to action specification.
 499  * @param[out] error
 500  *   Pointer to the error structure.
 501  *
 502  * @return
 503  *   0 on success, a negative errno value otherwise and rte_errno is set.
 504  */
 505 static int
 506 flow_dv_convert_action_modify_mac
 507                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 508                          const struct rte_flow_action *action,
 509                          struct rte_flow_error *error)
 510 {
 511         const struct rte_flow_action_set_mac *conf =
 512                 (const struct rte_flow_action_set_mac *)(action->conf);
 513         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 514         struct rte_flow_item_eth eth;
 515         struct rte_flow_item_eth eth_mask;
 516
 517         memset(&eth, 0, sizeof(eth));
 518         memset(&eth_mask, 0, sizeof(eth_mask));
 519         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 520                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 521                        sizeof(eth.src.addr_bytes));
 522                 memcpy(&eth_mask.src.addr_bytes,
 523                        &rte_flow_item_eth_mask.src.addr_bytes,
 524                        sizeof(eth_mask.src.addr_bytes));
 525         } else {
 526                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 527                        sizeof(eth.dst.addr_bytes));
 528                 memcpy(&eth_mask.dst.addr_bytes,
 529                        &rte_flow_item_eth_mask.dst.addr_bytes,
 530                        sizeof(eth_mask.dst.addr_bytes));
 531         }
 532         item.spec = &eth;
 533         item.mask = &eth_mask;
 534         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 535                                              MLX5_MODIFICATION_TYPE_SET, error);
 536 }
 537
 538 /**
 539  * Convert modify-header set VLAN VID action to DV specification.
 540  *
 541  * @param[in,out] resource
 542  *   Pointer to the modify-header resource.
 543  * @param[in] action
 544  *   Pointer to action specification.
 545  * @param[out] error
 546  *   Pointer to the error structure.
 547  *
 548  * @return
 549  *   0 on success, a negative errno value otherwise and rte_errno is set.
 550  */
 551 static int
 552 flow_dv_convert_action_modify_vlan_vid
 553                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 554                          const struct rte_flow_action *action,
 555                          struct rte_flow_error *error)
 556 {
 557         const struct rte_flow_action_of_set_vlan_vid *conf =
 558                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 559         int i = resource->actions_num;
 560         struct mlx5_modification_cmd *actions = &resource->actions[i];
 561         struct field_modify_info *field = modify_vlan_out_first_vid;
 562
 563         if (i >= MLX5_MODIFY_NUM)
 564                 return rte_flow_error_set(error, EINVAL,
 565                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 566                          "too many items to modify");
 567         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 568         actions[i].field = field->id;
 569         actions[i].length = field->size;
 570         actions[i].offset = field->offset;
 571         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 572         actions[i].data1 = conf->vlan_vid;
 573         actions[i].data1 = actions[i].data1 << 16;
 574         resource->actions_num = ++i;
 575         return 0;
 576 }
 577
 578 /**
 579  * Convert modify-header set TP action to DV specification.
 580  *
 581  * @param[in,out] resource
 582  *   Pointer to the modify-header resource.
 583  * @param[in] action
 584  *   Pointer to action specification.
 585  * @param[in] items
 586  *   Pointer to rte_flow_item objects list.
 587  * @param[in] attr
 588  *   Pointer to flow attributes structure.
 589  * @param[out] error
 590  *   Pointer to the error structure.
 591  *
 592  * @return
 593  *   0 on success, a negative errno value otherwise and rte_errno is set.
 594  */
 595 static int
 596 flow_dv_convert_action_modify_tp
 597                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 598                          const struct rte_flow_action *action,
 599                          const struct rte_flow_item *items,
 600                          union flow_dv_attr *attr,
 601                          struct rte_flow_error *error)
 602 {
 603         const struct rte_flow_action_set_tp *conf =
 604                 (const struct rte_flow_action_set_tp *)(action->conf);
 605         struct rte_flow_item item;
 606         struct rte_flow_item_udp udp;
 607         struct rte_flow_item_udp udp_mask;
 608         struct rte_flow_item_tcp tcp;
 609         struct rte_flow_item_tcp tcp_mask;
 610         struct field_modify_info *field;
 611
 612         if (!attr->valid)
 613                 flow_dv_attr_init(items, attr);
 614         if (attr->udp) {
 615                 memset(&udp, 0, sizeof(udp));
 616                 memset(&udp_mask, 0, sizeof(udp_mask));
 617                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 618                         udp.hdr.src_port = conf->port;
 619                         udp_mask.hdr.src_port =
 620                                         rte_flow_item_udp_mask.hdr.src_port;
 621                 } else {
 622                         udp.hdr.dst_port = conf->port;
 623                         udp_mask.hdr.dst_port =
 624                                         rte_flow_item_udp_mask.hdr.dst_port;
 625                 }
 626                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 627                 item.spec = &udp;
 628                 item.mask = &udp_mask;
 629                 field = modify_udp;
 630         }
 631         if (attr->tcp) {
 632                 memset(&tcp, 0, sizeof(tcp));
 633                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 634                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 635                         tcp.hdr.src_port = conf->port;
 636                         tcp_mask.hdr.src_port =
 637                                         rte_flow_item_tcp_mask.hdr.src_port;
 638                 } else {
 639                         tcp.hdr.dst_port = conf->port;
 640                         tcp_mask.hdr.dst_port =
 641                                         rte_flow_item_tcp_mask.hdr.dst_port;
 642                 }
 643                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 644                 item.spec = &tcp;
 645                 item.mask = &tcp_mask;
 646                 field = modify_tcp;
 647         }
 648         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 649                                              MLX5_MODIFICATION_TYPE_SET, error);
 650 }
 651
 652 /**
 653  * Convert modify-header set TTL action to DV specification.
 654  *
 655  * @param[in,out] resource
 656  *   Pointer to the modify-header resource.
 657  * @param[in] action
 658  *   Pointer to action specification.
 659  * @param[in] items
 660  *   Pointer to rte_flow_item objects list.
 661  * @param[in] attr
 662  *   Pointer to flow attributes structure.
 663  * @param[out] error
 664  *   Pointer to the error structure.
 665  *
 666  * @return
 667  *   0 on success, a negative errno value otherwise and rte_errno is set.
 668  */
 669 static int
 670 flow_dv_convert_action_modify_ttl
 671                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 672                          const struct rte_flow_action *action,
 673                          const struct rte_flow_item *items,
 674                          union flow_dv_attr *attr,
 675                          struct rte_flow_error *error)
 676 {
 677         const struct rte_flow_action_set_ttl *conf =
 678                 (const struct rte_flow_action_set_ttl *)(action->conf);
 679         struct rte_flow_item item;
 680         struct rte_flow_item_ipv4 ipv4;
 681         struct rte_flow_item_ipv4 ipv4_mask;
 682         struct rte_flow_item_ipv6 ipv6;
 683         struct rte_flow_item_ipv6 ipv6_mask;
 684         struct field_modify_info *field;
 685
 686         if (!attr->valid)
 687                 flow_dv_attr_init(items, attr);
 688         if (attr->ipv4) {
 689                 memset(&ipv4, 0, sizeof(ipv4));
 690                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 691                 ipv4.hdr.time_to_live = conf->ttl_value;
 692                 ipv4_mask.hdr.time_to_live = 0xFF;
 693                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 694                 item.spec = &ipv4;
 695                 item.mask = &ipv4_mask;
 696                 field = modify_ipv4;
 697         }
 698         if (attr->ipv6) {
 699                 memset(&ipv6, 0, sizeof(ipv6));
 700                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 701                 ipv6.hdr.hop_limits = conf->ttl_value;
 702                 ipv6_mask.hdr.hop_limits = 0xFF;
 703                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 704                 item.spec = &ipv6;
 705                 item.mask = &ipv6_mask;
 706                 field = modify_ipv6;
 707         }
 708         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 709                                              MLX5_MODIFICATION_TYPE_SET, error);
 710 }
 711
 712 /**
 713  * Convert modify-header decrement TTL action to DV specification.
 714  *
 715  * @param[in,out] resource
 716  *   Pointer to the modify-header resource.
 717  * @param[in] action
 718  *   Pointer to action specification.
 719  * @param[in] items
 720  *   Pointer to rte_flow_item objects list.
 721  * @param[in] attr
 722  *   Pointer to flow attributes structure.
 723  * @param[out] error
 724  *   Pointer to the error structure.
 725  *
 726  * @return
 727  *   0 on success, a negative errno value otherwise and rte_errno is set.
 728  */
 729 static int
 730 flow_dv_convert_action_modify_dec_ttl
 731                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 732                          const struct rte_flow_item *items,
 733                          union flow_dv_attr *attr,
 734                          struct rte_flow_error *error)
 735 {
 736         struct rte_flow_item item;
 737         struct rte_flow_item_ipv4 ipv4;
 738         struct rte_flow_item_ipv4 ipv4_mask;
 739         struct rte_flow_item_ipv6 ipv6;
 740         struct rte_flow_item_ipv6 ipv6_mask;
 741         struct field_modify_info *field;
 742
 743         if (!attr->valid)
 744                 flow_dv_attr_init(items, attr);
 745         if (attr->ipv4) {
 746                 memset(&ipv4, 0, sizeof(ipv4));
 747                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 748                 ipv4.hdr.time_to_live = 0xFF;
 749                 ipv4_mask.hdr.time_to_live = 0xFF;
 750                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 751                 item.spec = &ipv4;
 752                 item.mask = &ipv4_mask;
 753                 field = modify_ipv4;
 754         }
 755         if (attr->ipv6) {
 756                 memset(&ipv6, 0, sizeof(ipv6));
 757                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 758                 ipv6.hdr.hop_limits = 0xFF;
 759                 ipv6_mask.hdr.hop_limits = 0xFF;
 760                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 761                 item.spec = &ipv6;
 762                 item.mask = &ipv6_mask;
 763                 field = modify_ipv6;
 764         }
 765         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 766                                              MLX5_MODIFICATION_TYPE_ADD, error);
 767 }
 768
 769 /**
 770  * Convert modify-header increment/decrement TCP Sequence number
 771  * to DV specification.
 772  *
 773  * @param[in,out] resource
 774  *   Pointer to the modify-header resource.
 775  * @param[in] action
 776  *   Pointer to action specification.
 777  * @param[out] error
 778  *   Pointer to the error structure.
 779  *
 780  * @return
 781  *   0 on success, a negative errno value otherwise and rte_errno is set.
 782  */
 783 static int
 784 flow_dv_convert_action_modify_tcp_seq
 785                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 786                          const struct rte_flow_action *action,
 787                          struct rte_flow_error *error)
 788 {
 789         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 790         uint64_t value = rte_be_to_cpu_32(*conf);
 791         struct rte_flow_item item;
 792         struct rte_flow_item_tcp tcp;
 793         struct rte_flow_item_tcp tcp_mask;
 794
 795         memset(&tcp, 0, sizeof(tcp));
 796         memset(&tcp_mask, 0, sizeof(tcp_mask));
 797         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 798                 /*
 799                  * The HW has no decrement operation, only increment operation.
 800                  * To simulate decrement X from Y using increment operation
 801                  * we need to add UINT32_MAX X times to Y.
 802                  * Each adding of UINT32_MAX decrements Y by 1.
 803                  */
 804                 value *= UINT32_MAX;
 805         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 806         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 807         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 808         item.spec = &tcp;
 809         item.mask = &tcp_mask;
 810         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 811                                              MLX5_MODIFICATION_TYPE_ADD, error);
 812 }
 813
 814 /**
 815  * Convert modify-header increment/decrement TCP Acknowledgment number
 816  * to DV specification.
 817  *
 818  * @param[in,out] resource
 819  *   Pointer to the modify-header resource.
 820  * @param[in] action
 821  *   Pointer to action specification.
 822  * @param[out] error
 823  *   Pointer to the error structure.
 824  *
 825  * @return
 826  *   0 on success, a negative errno value otherwise and rte_errno is set.
 827  */
 828 static int
 829 flow_dv_convert_action_modify_tcp_ack
 830                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 831                          const struct rte_flow_action *action,
 832                          struct rte_flow_error *error)
 833 {
 834         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 835         uint64_t value = rte_be_to_cpu_32(*conf);
 836         struct rte_flow_item item;
 837         struct rte_flow_item_tcp tcp;
 838         struct rte_flow_item_tcp tcp_mask;
 839
 840         memset(&tcp, 0, sizeof(tcp));
 841         memset(&tcp_mask, 0, sizeof(tcp_mask));
 842         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 843                 /*
 844                  * The HW has no decrement operation, only increment operation.
 845                  * To simulate decrement X from Y using increment operation
 846                  * we need to add UINT32_MAX X times to Y.
 847                  * Each adding of UINT32_MAX decrements Y by 1.
 848                  */
 849                 value *= UINT32_MAX;
 850         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 851         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 852         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 853         item.spec = &tcp;
 854         item.mask = &tcp_mask;
 855         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 856                                              MLX5_MODIFICATION_TYPE_ADD, error);
 857 }
 858
 859 static enum mlx5_modification_field reg_to_field[] = {
 860         [REG_NONE] = MLX5_MODI_OUT_NONE,
 861         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 862         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 863         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 864         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 865         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 866         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 867         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 868         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 869         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 870         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 871 };
 872
 873 /**
 874  * Convert register set to DV specification.
 875  *
 876  * @param[in,out] resource
 877  *   Pointer to the modify-header resource.
 878  * @param[in] action
 879  *   Pointer to action specification.
 880  * @param[out] error
 881  *   Pointer to the error structure.
 882  *
 883  * @return
 884  *   0 on success, a negative errno value otherwise and rte_errno is set.
 885  */
 886 static int
 887 flow_dv_convert_action_set_reg
 888                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 889                          const struct rte_flow_action *action,
 890                          struct rte_flow_error *error)
 891 {
 892         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 893         struct mlx5_modification_cmd *actions = resource->actions;
 894         uint32_t i = resource->actions_num;
 895
 896         if (i >= MLX5_MODIFY_NUM)
 897                 return rte_flow_error_set(error, EINVAL,
 898                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 899                                           "too many items to modify");
 900         assert(conf->id != REG_NONE);
 901         assert(conf->id < RTE_DIM(reg_to_field));
 902         actions[i].action_type = MLX5_MODIFICATION_TYPE_SET;
 903         actions[i].field = reg_to_field[conf->id];
 904         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 905         actions[i].data1 = rte_cpu_to_be_32(conf->data);
 906         ++i;
 907         resource->actions_num = i;
 908         if (!resource->actions_num)
 909                 return rte_flow_error_set(error, EINVAL,
 910                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 911                                           "invalid modification flow item");
 912         return 0;
 913 }
 914
 915 /**
 916  * Convert SET_TAG action to DV specification.
 917  *
 918  * @param[in] dev
 919  *   Pointer to the rte_eth_dev structure.
 920  * @param[in,out] resource
 921  *   Pointer to the modify-header resource.
 922  * @param[in] conf
 923  *   Pointer to action specification.
 924  * @param[out] error
 925  *   Pointer to the error structure.
 926  *
 927  * @return
 928  *   0 on success, a negative errno value otherwise and rte_errno is set.
 929  */
 930 static int
 931 flow_dv_convert_action_set_tag
 932                         (struct rte_eth_dev *dev,
 933                          struct mlx5_flow_dv_modify_hdr_resource *resource,
 934                          const struct rte_flow_action_set_tag *conf,
 935                          struct rte_flow_error *error)
 936 {
 937         rte_be32_t data = rte_cpu_to_be_32(conf->data);
 938         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
 939         struct rte_flow_item item = {
 940                 .spec = &data,
 941                 .mask = &mask,
 942         };
 943         struct field_modify_info reg_c_x[] = {
 944                 [1] = {0, 0, 0},
 945         };
 946         enum mlx5_modification_field reg_type;
 947         int ret;
 948
 949         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
 950         if (ret < 0)
 951                 return ret;
 952         assert(ret != REG_NONE);
 953         assert((unsigned int)ret < RTE_DIM(reg_to_field));
 954         reg_type = reg_to_field[ret];
 955         assert(reg_type > 0);
 956         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
 957         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
 958                                              MLX5_MODIFICATION_TYPE_SET, error);
 959 }
 960
 961 /**
 962  * Convert internal COPY_REG action to DV specification.
 963  *
 964  * @param[in] dev
 965  *   Pointer to the rte_eth_dev structure.
 966  * @param[in,out] res
 967  *   Pointer to the modify-header resource.
 968  * @param[in] action
 969  *   Pointer to action specification.
 970  * @param[out] error
 971  *   Pointer to the error structure.
 972  *
 973  * @return
 974  *   0 on success, a negative errno value otherwise and rte_errno is set.
 975  */
 976 static int
 977 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
 978                                  struct mlx5_flow_dv_modify_hdr_resource *res,
 979                                  const struct rte_flow_action *action,
 980                                  struct rte_flow_error *error)
 981 {
 982         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
 983         rte_be32_t mask = RTE_BE32(UINT32_MAX);
 984         struct rte_flow_item item = {
 985                 .spec = NULL,
 986                 .mask = &mask,
 987         };
 988         struct field_modify_info reg_src[] = {
 989                 {4, 0, reg_to_field[conf->src]},
 990                 {0, 0, 0},
 991         };
 992         struct field_modify_info reg_dst = {
 993                 .offset = 0,
 994                 .id = reg_to_field[conf->dst],
 995         };
 996         /* Adjust reg_c[0] usage according to reported mask. */
 997         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
 998                 struct mlx5_priv *priv = dev->data->dev_private;
 999                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1000
1001                 assert(reg_c0);
1002                 assert(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1003                 if (conf->dst == REG_C_0) {
1004                         /* Copy to reg_c[0], within mask only. */
1005                         reg_dst.offset = rte_bsf32(reg_c0);
1006                         /*
1007                          * Mask is ignoring the enianness, because
1008                          * there is no conversion in datapath.
1009                          */
1010 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1011                         /* Copy from destination lower bits to reg_c[0]. */
1012                         mask = reg_c0 >> reg_dst.offset;
1013 #else
1014                         /* Copy from destination upper bits to reg_c[0]. */
1015                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1016                                           rte_fls_u32(reg_c0));
1017 #endif
1018                 } else {
1019                         mask = rte_cpu_to_be_32(reg_c0);
1020 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1021                         /* Copy from reg_c[0] to destination lower bits. */
1022                         reg_dst.offset = 0;
1023 #else
1024                         /* Copy from reg_c[0] to destination upper bits. */
1025                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1026                                          (rte_fls_u32(reg_c0) -
1027                                           rte_bsf32(reg_c0));
1028 #endif
1029                 }
1030         }
1031         return flow_dv_convert_modify_action(&item,
1032                                              reg_src, &reg_dst, res,
1033                                              MLX5_MODIFICATION_TYPE_COPY,
1034                                              error);
1035 }
1036
1037 /**
1038  * Convert MARK action to DV specification. This routine is used
1039  * in extensive metadata only and requires metadata register to be
1040  * handled. In legacy mode hardware tag resource is engaged.
1041  *
1042  * @param[in] dev
1043  *   Pointer to the rte_eth_dev structure.
1044  * @param[in] conf
1045  *   Pointer to MARK action specification.
1046  * @param[in,out] resource
1047  *   Pointer to the modify-header resource.
1048  * @param[out] error
1049  *   Pointer to the error structure.
1050  *
1051  * @return
1052  *   0 on success, a negative errno value otherwise and rte_errno is set.
1053  */
1054 static int
1055 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1056                             const struct rte_flow_action_mark *conf,
1057                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1058                             struct rte_flow_error *error)
1059 {
1060         struct mlx5_priv *priv = dev->data->dev_private;
1061         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1062                                            priv->sh->dv_mark_mask);
1063         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1064         struct rte_flow_item item = {
1065                 .spec = &data,
1066                 .mask = &mask,
1067         };
1068         struct field_modify_info reg_c_x[] = {
1069                 {4, 0, 0}, /* dynamic instead of MLX5_MODI_META_REG_C_1. */
1070                 {0, 0, 0},
1071         };
1072         enum modify_reg reg;
1073
1074         if (!mask)
1075                 return rte_flow_error_set(error, EINVAL,
1076                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1077                                           NULL, "zero mark action mask");
1078         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1079         if (reg < 0)
1080                 return reg;
1081         assert(reg > 0);
1082         reg_c_x[0].id = reg_to_field[reg];
1083         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1084                                              MLX5_MODIFICATION_TYPE_SET, error);
1085 }
1086
1087 /**
1088  * Get metadata register index for specified steering domain.
1089  *
1090  * @param[in] dev
1091  *   Pointer to the rte_eth_dev structure.
1092  * @param[in] attr
1093  *   Attributes of flow to determine steering domain.
1094  * @param[out] error
1095  *   Pointer to the error structure.
1096  *
1097  * @return
1098  *   positive index on success, a negative errno value otherwise
1099  *   and rte_errno is set.
1100  */
1101 static enum modify_reg
1102 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1103                          const struct rte_flow_attr *attr,
1104                          struct rte_flow_error *error)
1105 {
1106         enum modify_reg reg =
1107                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1108                                           MLX5_METADATA_FDB :
1109                                             attr->egress ?
1110                                             MLX5_METADATA_TX :
1111                                             MLX5_METADATA_RX, 0, error);
1112         if (reg < 0)
1113                 return rte_flow_error_set(error,
1114                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1115                                           NULL, "unavailable "
1116                                           "metadata register");
1117         return reg;
1118 }
1119
1120 /**
1121  * Convert SET_META action to DV specification.
1122  *
1123  * @param[in] dev
1124  *   Pointer to the rte_eth_dev structure.
1125  * @param[in,out] resource
1126  *   Pointer to the modify-header resource.
1127  * @param[in] attr
1128  *   Attributes of flow that includes this item.
1129  * @param[in] conf
1130  *   Pointer to action specification.
1131  * @param[out] error
1132  *   Pointer to the error structure.
1133  *
1134  * @return
1135  *   0 on success, a negative errno value otherwise and rte_errno is set.
1136  */
1137 static int
1138 flow_dv_convert_action_set_meta
1139                         (struct rte_eth_dev *dev,
1140                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1141                          const struct rte_flow_attr *attr,
1142                          const struct rte_flow_action_set_meta *conf,
1143                          struct rte_flow_error *error)
1144 {
1145         uint32_t data = conf->data;
1146         uint32_t mask = conf->mask;
1147         struct rte_flow_item item = {
1148                 .spec = &data,
1149                 .mask = &mask,
1150         };
1151         struct field_modify_info reg_c_x[] = {
1152                 [1] = {0, 0, 0},
1153         };
1154         enum modify_reg reg = flow_dv_get_metadata_reg(dev, attr, error);
1155
1156         if (reg < 0)
1157                 return reg;
1158         /*
1159          * In datapath code there is no endianness
1160          * coversions for perfromance reasons, all
1161          * pattern conversions are done in rte_flow.
1162          */
1163         if (reg == REG_C_0) {
1164                 struct mlx5_priv *priv = dev->data->dev_private;
1165                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1166                 uint32_t shl_c0;
1167
1168                 assert(msk_c0);
1169 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1170                 shl_c0 = rte_bsf32(msk_c0);
1171 #else
1172                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1173 #endif
1174                 mask <<= shl_c0;
1175                 data <<= shl_c0;
1176                 assert(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1177         }
1178         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1179         /* The routine expects parameters in memory as big-endian ones. */
1180         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1181                                              MLX5_MODIFICATION_TYPE_SET, error);
1182 }
1183
1184 /**
1185  * Validate MARK item.
1186  *
1187  * @param[in] dev
1188  *   Pointer to the rte_eth_dev structure.
1189  * @param[in] item
1190  *   Item specification.
1191  * @param[in] attr
1192  *   Attributes of flow that includes this item.
1193  * @param[out] error
1194  *   Pointer to error structure.
1195  *
1196  * @return
1197  *   0 on success, a negative errno value otherwise and rte_errno is set.
1198  */
1199 static int
1200 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1201                            const struct rte_flow_item *item,
1202                            const struct rte_flow_attr *attr __rte_unused,
1203                            struct rte_flow_error *error)
1204 {
1205         struct mlx5_priv *priv = dev->data->dev_private;
1206         struct mlx5_dev_config *config = &priv->config;
1207         const struct rte_flow_item_mark *spec = item->spec;
1208         const struct rte_flow_item_mark *mask = item->mask;
1209         const struct rte_flow_item_mark nic_mask = {
1210                 .id = priv->sh->dv_mark_mask,
1211         };
1212         int ret;
1213
1214         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1215                 return rte_flow_error_set(error, ENOTSUP,
1216                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1217                                           "extended metadata feature"
1218                                           " isn't enabled");
1219         if (!mlx5_flow_ext_mreg_supported(dev))
1220                 return rte_flow_error_set(error, ENOTSUP,
1221                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1222                                           "extended metadata register"
1223                                           " isn't supported");
1224         if (!nic_mask.id)
1225                 return rte_flow_error_set(error, ENOTSUP,
1226                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1227                                           "extended metadata register"
1228                                           " isn't available");
1229         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1230         if (ret < 0)
1231                 return ret;
1232         if (!spec)
1233                 return rte_flow_error_set(error, EINVAL,
1234                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1235                                           item->spec,
1236                                           "data cannot be empty");
1237         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1238                 return rte_flow_error_set(error, EINVAL,
1239                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1240                                           &spec->id,
1241                                           "mark id exceeds the limit");
1242         if (!mask)
1243                 mask = &nic_mask;
1244         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1245                                         (const uint8_t *)&nic_mask,
1246                                         sizeof(struct rte_flow_item_mark),
1247                                         error);
1248         if (ret < 0)
1249                 return ret;
1250         return 0;
1251 }
1252
1253 /**
1254  * Validate META item.
1255  *
1256  * @param[in] dev
1257  *   Pointer to the rte_eth_dev structure.
1258  * @param[in] item
1259  *   Item specification.
1260  * @param[in] attr
1261  *   Attributes of flow that includes this item.
1262  * @param[out] error
1263  *   Pointer to error structure.
1264  *
1265  * @return
1266  *   0 on success, a negative errno value otherwise and rte_errno is set.
1267  */
1268 static int
1269 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1270                            const struct rte_flow_item *item,
1271                            const struct rte_flow_attr *attr,
1272                            struct rte_flow_error *error)
1273 {
1274         struct mlx5_priv *priv = dev->data->dev_private;
1275         struct mlx5_dev_config *config = &priv->config;
1276         const struct rte_flow_item_meta *spec = item->spec;
1277         const struct rte_flow_item_meta *mask = item->mask;
1278         struct rte_flow_item_meta nic_mask = {
1279                 .data = UINT32_MAX
1280         };
1281         enum modify_reg reg;
1282         int ret;
1283
1284         if (!spec)
1285                 return rte_flow_error_set(error, EINVAL,
1286                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1287                                           item->spec,
1288                                           "data cannot be empty");
1289         if (!spec->data)
1290                 return rte_flow_error_set(error, EINVAL,
1291                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1292                                           "data cannot be zero");
1293         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1294                 if (!mlx5_flow_ext_mreg_supported(dev))
1295                         return rte_flow_error_set(error, ENOTSUP,
1296                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1297                                           "extended metadata register"
1298                                           " isn't supported");
1299                 reg = flow_dv_get_metadata_reg(dev, attr, error);
1300                 if (reg < 0)
1301                         return reg;
1302                 if (reg == REG_B)
1303                         return rte_flow_error_set(error, ENOTSUP,
1304                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1305                                           "match on reg_b "
1306                                           "isn't supported");
1307                 if (reg != REG_A)
1308                         nic_mask.data = priv->sh->dv_meta_mask;
1309         }
1310         if (!mask)
1311                 mask = &rte_flow_item_meta_mask;
1312         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1313                                         (const uint8_t *)&nic_mask,
1314                                         sizeof(struct rte_flow_item_meta),
1315                                         error);
1316         return ret;
1317 }
1318
1319 /**
1320  * Validate TAG item.
1321  *
1322  * @param[in] dev
1323  *   Pointer to the rte_eth_dev structure.
1324  * @param[in] item
1325  *   Item specification.
1326  * @param[in] attr
1327  *   Attributes of flow that includes this item.
1328  * @param[out] error
1329  *   Pointer to error structure.
1330  *
1331  * @return
1332  *   0 on success, a negative errno value otherwise and rte_errno is set.
1333  */
1334 static int
1335 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
1336                           const struct rte_flow_item *item,
1337                           const struct rte_flow_attr *attr __rte_unused,
1338                           struct rte_flow_error *error)
1339 {
1340         const struct rte_flow_item_tag *spec = item->spec;
1341         const struct rte_flow_item_tag *mask = item->mask;
1342         const struct rte_flow_item_tag nic_mask = {
1343                 .data = RTE_BE32(UINT32_MAX),
1344                 .index = 0xff,
1345         };
1346         int ret;
1347
1348         if (!mlx5_flow_ext_mreg_supported(dev))
1349                 return rte_flow_error_set(error, ENOTSUP,
1350                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1351                                           "extensive metadata register"
1352                                           " isn't supported");
1353         if (!spec)
1354                 return rte_flow_error_set(error, EINVAL,
1355                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1356                                           item->spec,
1357                                           "data cannot be empty");
1358         if (!mask)
1359                 mask = &rte_flow_item_tag_mask;
1360         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1361                                         (const uint8_t *)&nic_mask,
1362                                         sizeof(struct rte_flow_item_tag),
1363                                         error);
1364         if (ret < 0)
1365                 return ret;
1366         if (mask->index != 0xff)
1367                 return rte_flow_error_set(error, EINVAL,
1368                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1369                                           "partial mask for tag index"
1370                                           " is not supported");
1371         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
1372         if (ret < 0)
1373                 return ret;
1374         assert(ret != REG_NONE);
1375         return 0;
1376 }
1377
1378 /**
1379  * Validate vport item.
1380  *
1381  * @param[in] dev
1382  *   Pointer to the rte_eth_dev structure.
1383  * @param[in] item
1384  *   Item specification.
1385  * @param[in] attr
1386  *   Attributes of flow that includes this item.
1387  * @param[in] item_flags
1388  *   Bit-fields that holds the items detected until now.
1389  * @param[out] error
1390  *   Pointer to error structure.
1391  *
1392  * @return
1393  *   0 on success, a negative errno value otherwise and rte_errno is set.
1394  */
1395 static int
1396 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
1397                               const struct rte_flow_item *item,
1398                               const struct rte_flow_attr *attr,
1399                               uint64_t item_flags,
1400                               struct rte_flow_error *error)
1401 {
1402         const struct rte_flow_item_port_id *spec = item->spec;
1403         const struct rte_flow_item_port_id *mask = item->mask;
1404         const struct rte_flow_item_port_id switch_mask = {
1405                         .id = 0xffffffff,
1406         };
1407         struct mlx5_priv *esw_priv;
1408         struct mlx5_priv *dev_priv;
1409         int ret;
1410
1411         if (!attr->transfer)
1412                 return rte_flow_error_set(error, EINVAL,
1413                                           RTE_FLOW_ERROR_TYPE_ITEM,
1414                                           NULL,
1415                                           "match on port id is valid only"
1416                                           " when transfer flag is enabled");
1417         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
1418                 return rte_flow_error_set(error, ENOTSUP,
1419                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1420                                           "multiple source ports are not"
1421                                           " supported");
1422         if (!mask)
1423                 mask = &switch_mask;
1424         if (mask->id != 0xffffffff)
1425                 return rte_flow_error_set(error, ENOTSUP,
1426                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
1427                                            mask,
1428                                            "no support for partial mask on"
1429                                            " \"id\" field");
1430         ret = mlx5_flow_item_acceptable
1431                                 (item, (const uint8_t *)mask,
1432                                  (const uint8_t *)&rte_flow_item_port_id_mask,
1433                                  sizeof(struct rte_flow_item_port_id),
1434                                  error);
1435         if (ret)
1436                 return ret;
1437         if (!spec)
1438                 return 0;
1439         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
1440         if (!esw_priv)
1441                 return rte_flow_error_set(error, rte_errno,
1442                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1443                                           "failed to obtain E-Switch info for"
1444                                           " port");
1445         dev_priv = mlx5_dev_to_eswitch_info(dev);
1446         if (!dev_priv)
1447                 return rte_flow_error_set(error, rte_errno,
1448                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1449                                           NULL,
1450                                           "failed to obtain E-Switch info");
1451         if (esw_priv->domain_id != dev_priv->domain_id)
1452                 return rte_flow_error_set(error, EINVAL,
1453                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
1454                                           "cannot match on a port from a"
1455                                           " different E-Switch");
1456         return 0;
1457 }
1458
1459 /**
1460  * Validate the pop VLAN action.
1461  *
1462  * @param[in] dev
1463  *   Pointer to the rte_eth_dev structure.
1464  * @param[in] action_flags
1465  *   Holds the actions detected until now.
1466  * @param[in] action
1467  *   Pointer to the pop vlan action.
1468  * @param[in] item_flags
1469  *   The items found in this flow rule.
1470  * @param[in] attr
1471  *   Pointer to flow attributes.
1472  * @param[out] error
1473  *   Pointer to error structure.
1474  *
1475  * @return
1476  *   0 on success, a negative errno value otherwise and rte_errno is set.
1477  */
1478 static int
1479 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
1480                                  uint64_t action_flags,
1481                                  const struct rte_flow_action *action,
1482                                  uint64_t item_flags,
1483                                  const struct rte_flow_attr *attr,
1484                                  struct rte_flow_error *error)
1485 {
1486         struct mlx5_priv *priv = dev->data->dev_private;
1487
1488         (void)action;
1489         (void)attr;
1490         if (!priv->sh->pop_vlan_action)
1491                 return rte_flow_error_set(error, ENOTSUP,
1492                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1493                                           NULL,
1494                                           "pop vlan action is not supported");
1495         /*
1496          * Check for inconsistencies:
1497          *  fail strip_vlan in a flow that matches packets without VLAN tags.
1498          *  fail strip_vlan in a flow that matches packets without explicitly a
1499          *  matching on VLAN tag ?
1500          */
1501         if (action_flags & MLX5_FLOW_ACTION_OF_POP_VLAN)
1502                 return rte_flow_error_set(error, ENOTSUP,
1503                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1504                                           NULL,
1505                                           "no support for multiple vlan pop "
1506                                           "actions");
1507         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1508                 return rte_flow_error_set(error, ENOTSUP,
1509                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1510                                           NULL,
1511                                           "cannot pop vlan without a "
1512                                           "match on (outer) vlan in the flow");
1513         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1514                 return rte_flow_error_set(error, EINVAL,
1515                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1516                                           "wrong action order, port_id should "
1517                                           "be after pop VLAN action");
1518         return 0;
1519 }
1520
1521 /**
1522  * Get VLAN default info from vlan match info.
1523  *
1524  * @param[in] dev
1525  *   Pointer to the rte_eth_dev structure.
1526  * @param[in] item
1527  *   the list of item specifications.
1528  * @param[out] vlan
1529  *   pointer VLAN info to fill to.
1530  * @param[out] error
1531  *   Pointer to error structure.
1532  *
1533  * @return
1534  *   0 on success, a negative errno value otherwise and rte_errno is set.
1535  */
1536 static void
1537 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
1538                                   struct rte_vlan_hdr *vlan)
1539 {
1540         const struct rte_flow_item_vlan nic_mask = {
1541                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
1542                                 MLX5DV_FLOW_VLAN_VID_MASK),
1543                 .inner_type = RTE_BE16(0xffff),
1544         };
1545
1546         if (items == NULL)
1547                 return;
1548         for (; items->type != RTE_FLOW_ITEM_TYPE_END &&
1549                items->type != RTE_FLOW_ITEM_TYPE_VLAN; items++)
1550                 ;
1551         if (items->type == RTE_FLOW_ITEM_TYPE_VLAN) {
1552                 const struct rte_flow_item_vlan *vlan_m = items->mask;
1553                 const struct rte_flow_item_vlan *vlan_v = items->spec;
1554
1555                 if (!vlan_m)
1556                         vlan_m = &nic_mask;
1557                 /* Only full match values are accepted */
1558                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
1559                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
1560                         vlan->vlan_tci &= MLX5DV_FLOW_VLAN_PCP_MASK;
1561                         vlan->vlan_tci |=
1562                                 rte_be_to_cpu_16(vlan_v->tci &
1563                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
1564                 }
1565                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
1566                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
1567                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
1568                         vlan->vlan_tci |=
1569                                 rte_be_to_cpu_16(vlan_v->tci &
1570                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
1571                 }
1572                 if (vlan_m->inner_type == nic_mask.inner_type)
1573                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
1574                                                            vlan_m->inner_type);
1575         }
1576 }
1577
1578 /**
1579  * Validate the push VLAN action.
1580  *
1581  * @param[in] action_flags
1582  *   Holds the actions detected until now.
1583  * @param[in] action
1584  *   Pointer to the encap action.
1585  * @param[in] attr
1586  *   Pointer to flow attributes
1587  * @param[out] error
1588  *   Pointer to error structure.
1589  *
1590  * @return
1591  *   0 on success, a negative errno value otherwise and rte_errno is set.
1592  */
1593 static int
1594 flow_dv_validate_action_push_vlan(uint64_t action_flags,
1595                                   uint64_t item_flags,
1596                                   const struct rte_flow_action *action,
1597                                   const struct rte_flow_attr *attr,
1598                                   struct rte_flow_error *error)
1599 {
1600         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
1601
1602         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
1603             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
1604                 return rte_flow_error_set(error, EINVAL,
1605                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1606                                           "invalid vlan ethertype");
1607         if (action_flags &
1608                 (MLX5_FLOW_ACTION_OF_POP_VLAN | MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1609                 return rte_flow_error_set(error, ENOTSUP,
1610                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1611                                           "no support for multiple VLAN "
1612                                           "actions");
1613         if (!mlx5_flow_find_action
1614                         (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) &&
1615             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1616                 return rte_flow_error_set(error, ENOTSUP,
1617                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
1618                                 "push VLAN needs to match on VLAN in order to "
1619                                 "get VLAN VID information because there is "
1620                                 "no followed set VLAN VID action");
1621         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1622                 return rte_flow_error_set(error, EINVAL,
1623                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1624                                           "wrong action order, port_id should "
1625                                           "be after push VLAN");
1626         (void)attr;
1627         return 0;
1628 }
1629
1630 /**
1631  * Validate the set VLAN PCP.
1632  *
1633  * @param[in] action_flags
1634  *   Holds the actions detected until now.
1635  * @param[in] actions
1636  *   Pointer to the list of actions remaining in the flow rule.
1637  * @param[in] attr
1638  *   Pointer to flow attributes
1639  * @param[out] error
1640  *   Pointer to error structure.
1641  *
1642  * @return
1643  *   0 on success, a negative errno value otherwise and rte_errno is set.
1644  */
1645 static int
1646 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
1647                                      const struct rte_flow_action actions[],
1648                                      struct rte_flow_error *error)
1649 {
1650         const struct rte_flow_action *action = actions;
1651         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
1652
1653         if (conf->vlan_pcp > 7)
1654                 return rte_flow_error_set(error, EINVAL,
1655                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1656                                           "VLAN PCP value is too big");
1657         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
1658                 return rte_flow_error_set(error, ENOTSUP,
1659                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1660                                           "set VLAN PCP action must follow "
1661                                           "the push VLAN action");
1662         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
1663                 return rte_flow_error_set(error, ENOTSUP,
1664                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1665                                           "Multiple VLAN PCP modification are "
1666                                           "not supported");
1667         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1668                 return rte_flow_error_set(error, EINVAL,
1669                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1670                                           "wrong action order, port_id should "
1671                                           "be after set VLAN PCP");
1672         return 0;
1673 }
1674
1675 /**
1676  * Validate the set VLAN VID.
1677  *
1678  * @param[in] item_flags
1679  *   Holds the items detected in this rule.
1680  * @param[in] actions
1681  *   Pointer to the list of actions remaining in the flow rule.
1682  * @param[in] attr
1683  *   Pointer to flow attributes
1684  * @param[out] error
1685  *   Pointer to error structure.
1686  *
1687  * @return
1688  *   0 on success, a negative errno value otherwise and rte_errno is set.
1689  */
1690 static int
1691 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
1692                                      uint64_t action_flags,
1693                                      const struct rte_flow_action actions[],
1694                                      struct rte_flow_error *error)
1695 {
1696         const struct rte_flow_action *action = actions;
1697         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
1698
1699         if (conf->vlan_vid > RTE_BE16(0xFFE))
1700                 return rte_flow_error_set(error, EINVAL,
1701                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1702                                           "VLAN VID value is too big");
1703         /* there is an of_push_vlan action before us */
1704         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) {
1705                 if (mlx5_flow_find_action(actions + 1,
1706                                           RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID))
1707                         return rte_flow_error_set(error, ENOTSUP,
1708                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
1709                                         "Multiple VLAN VID modifications are "
1710                                         "not supported");
1711                 else
1712                         return 0;
1713         }
1714
1715         /*
1716          * Action is on an existing VLAN header:
1717          *    Need to verify this is a single modify CID action.
1718          *   Rule mast include a match on outer VLAN.
1719          */
1720         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
1721                 return rte_flow_error_set(error, ENOTSUP,
1722                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1723                                           "Multiple VLAN VID modifications are "
1724                                           "not supported");
1725         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
1726                 return rte_flow_error_set(error, EINVAL,
1727                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1728                                           "match on VLAN is required in order "
1729                                           "to set VLAN VID");
1730         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
1731                 return rte_flow_error_set(error, EINVAL,
1732                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1733                                           "wrong action order, port_id should "
1734                                           "be after set VLAN VID");
1735         return 0;
1736 }
1737
1738 /*
1739  * Validate the FLAG action.
1740  *
1741  * @param[in] dev
1742  *   Pointer to the rte_eth_dev structure.
1743  * @param[in] action_flags
1744  *   Holds the actions detected until now.
1745  * @param[in] attr
1746  *   Pointer to flow attributes
1747  * @param[out] error
1748  *   Pointer to error structure.
1749  *
1750  * @return
1751  *   0 on success, a negative errno value otherwise and rte_errno is set.
1752  */
1753 static int
1754 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
1755                              uint64_t action_flags,
1756                              const struct rte_flow_attr *attr,
1757                              struct rte_flow_error *error)
1758 {
1759         struct mlx5_priv *priv = dev->data->dev_private;
1760         struct mlx5_dev_config *config = &priv->config;
1761         int ret;
1762
1763         /* Fall back if no extended metadata register support. */
1764         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1765                 return mlx5_flow_validate_action_flag(action_flags, attr,
1766                                                       error);
1767         /* Extensive metadata mode requires registers. */
1768         if (!mlx5_flow_ext_mreg_supported(dev))
1769                 return rte_flow_error_set(error, ENOTSUP,
1770                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1771                                           "no metadata registers "
1772                                           "to support flag action");
1773         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
1774                 return rte_flow_error_set(error, ENOTSUP,
1775                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1776                                           "extended metadata register"
1777                                           " isn't available");
1778         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1779         if (ret < 0)
1780                 return ret;
1781         assert(ret > 0);
1782         if (action_flags & MLX5_FLOW_ACTION_DROP)
1783                 return rte_flow_error_set(error, EINVAL,
1784                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1785                                           "can't drop and flag in same flow");
1786         if (action_flags & MLX5_FLOW_ACTION_MARK)
1787                 return rte_flow_error_set(error, EINVAL,
1788                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1789                                           "can't mark and flag in same flow");
1790         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1791                 return rte_flow_error_set(error, EINVAL,
1792                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1793                                           "can't have 2 flag"
1794                                           " actions in same flow");
1795         return 0;
1796 }
1797
1798 /**
1799  * Validate MARK action.
1800  *
1801  * @param[in] dev
1802  *   Pointer to the rte_eth_dev structure.
1803  * @param[in] action
1804  *   Pointer to action.
1805  * @param[in] action_flags
1806  *   Holds the actions detected until now.
1807  * @param[in] attr
1808  *   Pointer to flow attributes
1809  * @param[out] error
1810  *   Pointer to error structure.
1811  *
1812  * @return
1813  *   0 on success, a negative errno value otherwise and rte_errno is set.
1814  */
1815 static int
1816 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
1817                              const struct rte_flow_action *action,
1818                              uint64_t action_flags,
1819                              const struct rte_flow_attr *attr,
1820                              struct rte_flow_error *error)
1821 {
1822         struct mlx5_priv *priv = dev->data->dev_private;
1823         struct mlx5_dev_config *config = &priv->config;
1824         const struct rte_flow_action_mark *mark = action->conf;
1825         int ret;
1826
1827         /* Fall back if no extended metadata register support. */
1828         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1829                 return mlx5_flow_validate_action_mark(action, action_flags,
1830                                                       attr, error);
1831         /* Extensive metadata mode requires registers. */
1832         if (!mlx5_flow_ext_mreg_supported(dev))
1833                 return rte_flow_error_set(error, ENOTSUP,
1834                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1835                                           "no metadata registers "
1836                                           "to support mark action");
1837         if (!priv->sh->dv_mark_mask)
1838                 return rte_flow_error_set(error, ENOTSUP,
1839                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1840                                           "extended metadata register"
1841                                           " isn't available");
1842         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1843         if (ret < 0)
1844                 return ret;
1845         assert(ret > 0);
1846         if (!mark)
1847                 return rte_flow_error_set(error, EINVAL,
1848                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1849                                           "configuration cannot be null");
1850         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
1851                 return rte_flow_error_set(error, EINVAL,
1852                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1853                                           &mark->id,
1854                                           "mark id exceeds the limit");
1855         if (action_flags & MLX5_FLOW_ACTION_DROP)
1856                 return rte_flow_error_set(error, EINVAL,
1857                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1858                                           "can't drop and mark in same flow");
1859         if (action_flags & MLX5_FLOW_ACTION_FLAG)
1860                 return rte_flow_error_set(error, EINVAL,
1861                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1862                                           "can't flag and mark in same flow");
1863         if (action_flags & MLX5_FLOW_ACTION_MARK)
1864                 return rte_flow_error_set(error, EINVAL,
1865                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1866                                           "can't have 2 mark actions in same"
1867                                           " flow");
1868         return 0;
1869 }
1870
1871 /**
1872  * Validate SET_META action.
1873  *
1874  * @param[in] dev
1875  *   Pointer to the rte_eth_dev structure.
1876  * @param[in] action
1877  *   Pointer to the encap action.
1878  * @param[in] action_flags
1879  *   Holds the actions detected until now.
1880  * @param[in] attr
1881  *   Pointer to flow attributes
1882  * @param[out] error
1883  *   Pointer to error structure.
1884  *
1885  * @return
1886  *   0 on success, a negative errno value otherwise and rte_errno is set.
1887  */
1888 static int
1889 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
1890                                  const struct rte_flow_action *action,
1891                                  uint64_t action_flags __rte_unused,
1892                                  const struct rte_flow_attr *attr,
1893                                  struct rte_flow_error *error)
1894 {
1895         const struct rte_flow_action_set_meta *conf;
1896         uint32_t nic_mask = UINT32_MAX;
1897         enum modify_reg reg;
1898
1899         if (!mlx5_flow_ext_mreg_supported(dev))
1900                 return rte_flow_error_set(error, ENOTSUP,
1901                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1902                                           "extended metadata register"
1903                                           " isn't supported");
1904         reg = flow_dv_get_metadata_reg(dev, attr, error);
1905         if (reg < 0)
1906                 return reg;
1907         if (reg != REG_A && reg != REG_B) {
1908                 struct mlx5_priv *priv = dev->data->dev_private;
1909
1910                 nic_mask = priv->sh->dv_meta_mask;
1911         }
1912         if (!(action->conf))
1913                 return rte_flow_error_set(error, EINVAL,
1914                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1915                                           "configuration cannot be null");
1916         conf = (const struct rte_flow_action_set_meta *)action->conf;
1917         if (!conf->mask)
1918                 return rte_flow_error_set(error, EINVAL,
1919                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1920                                           "zero mask doesn't have any effect");
1921         if (conf->mask & ~nic_mask)
1922                 return rte_flow_error_set(error, EINVAL,
1923                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1924                                           "meta data must be within reg C0");
1925         if (!(conf->data & conf->mask))
1926                 return rte_flow_error_set(error, EINVAL,
1927                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1928                                           "zero value has no effect");
1929         return 0;
1930 }
1931
1932 /**
1933  * Validate SET_TAG action.
1934  *
1935  * @param[in] dev
1936  *   Pointer to the rte_eth_dev structure.
1937  * @param[in] action
1938  *   Pointer to the encap action.
1939  * @param[in] action_flags
1940  *   Holds the actions detected until now.
1941  * @param[in] attr
1942  *   Pointer to flow attributes
1943  * @param[out] error
1944  *   Pointer to error structure.
1945  *
1946  * @return
1947  *   0 on success, a negative errno value otherwise and rte_errno is set.
1948  */
1949 static int
1950 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
1951                                 const struct rte_flow_action *action,
1952                                 uint64_t action_flags,
1953                                 const struct rte_flow_attr *attr,
1954                                 struct rte_flow_error *error)
1955 {
1956         const struct rte_flow_action_set_tag *conf;
1957         const uint64_t terminal_action_flags =
1958                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
1959                 MLX5_FLOW_ACTION_RSS;
1960         int ret;
1961
1962         if (!mlx5_flow_ext_mreg_supported(dev))
1963                 return rte_flow_error_set(error, ENOTSUP,
1964                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1965                                           "extensive metadata register"
1966                                           " isn't supported");
1967         if (!(action->conf))
1968                 return rte_flow_error_set(error, EINVAL,
1969                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1970                                           "configuration cannot be null");
1971         conf = (const struct rte_flow_action_set_tag *)action->conf;
1972         if (!conf->mask)
1973                 return rte_flow_error_set(error, EINVAL,
1974                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1975                                           "zero mask doesn't have any effect");
1976         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1977         if (ret < 0)
1978                 return ret;
1979         if (!attr->transfer && attr->ingress &&
1980             (action_flags & terminal_action_flags))
1981                 return rte_flow_error_set(error, EINVAL,
1982                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
1983                                           "set_tag has no effect"
1984                                           " with terminal actions");
1985         return 0;
1986 }
1987
1988 /**
1989  * Validate count action.
1990  *
1991  * @param[in] dev
1992  *   device otr.
1993  * @param[out] error
1994  *   Pointer to error structure.
1995  *
1996  * @return
1997  *   0 on success, a negative errno value otherwise and rte_errno is set.
1998  */
1999 static int
2000 flow_dv_validate_action_count(struct rte_eth_dev *dev,
2001                               struct rte_flow_error *error)
2002 {
2003         struct mlx5_priv *priv = dev->data->dev_private;
2004
2005         if (!priv->config.devx)
2006                 goto notsup_err;
2007 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
2008         return 0;
2009 #endif
2010 notsup_err:
2011         return rte_flow_error_set
2012                       (error, ENOTSUP,
2013                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2014                        NULL,
2015                        "count action not supported");
2016 }
2017
2018 /**
2019  * Validate the L2 encap action.
2020  *
2021  * @param[in] action_flags
2022  *   Holds the actions detected until now.
2023  * @param[in] action
2024  *   Pointer to the encap action.
2025  * @param[in] attr
2026  *   Pointer to flow attributes
2027  * @param[out] error
2028  *   Pointer to error structure.
2029  *
2030  * @return
2031  *   0 on success, a negative errno value otherwise and rte_errno is set.
2032  */
2033 static int
2034 flow_dv_validate_action_l2_encap(uint64_t action_flags,
2035                                  const struct rte_flow_action *action,
2036                                  const struct rte_flow_attr *attr,
2037                                  struct rte_flow_error *error)
2038 {
2039         if (!(action->conf))
2040                 return rte_flow_error_set(error, EINVAL,
2041                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2042                                           "configuration cannot be null");
2043         if (action_flags & MLX5_FLOW_ACTION_DROP)
2044                 return rte_flow_error_set(error, EINVAL,
2045                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2046                                           "can't drop and encap in same flow");
2047         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2048                 return rte_flow_error_set(error, EINVAL,
2049                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2050                                           "can only have a single encap or"
2051                                           " decap action in a flow");
2052         if (!attr->transfer && attr->ingress)
2053                 return rte_flow_error_set(error, ENOTSUP,
2054                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2055                                           NULL,
2056                                           "encap action not supported for "
2057                                           "ingress");
2058         return 0;
2059 }
2060
2061 /**
2062  * Validate the L2 decap action.
2063  *
2064  * @param[in] action_flags
2065  *   Holds the actions detected until now.
2066  * @param[in] attr
2067  *   Pointer to flow attributes
2068  * @param[out] error
2069  *   Pointer to error structure.
2070  *
2071  * @return
2072  *   0 on success, a negative errno value otherwise and rte_errno is set.
2073  */
2074 static int
2075 flow_dv_validate_action_l2_decap(uint64_t action_flags,
2076                                  const struct rte_flow_attr *attr,
2077                                  struct rte_flow_error *error)
2078 {
2079         if (action_flags & MLX5_FLOW_ACTION_DROP)
2080                 return rte_flow_error_set(error, EINVAL,
2081                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2082                                           "can't drop and decap in same flow");
2083         if (action_flags & (MLX5_FLOW_ENCAP_ACTIONS | MLX5_FLOW_DECAP_ACTIONS))
2084                 return rte_flow_error_set(error, EINVAL,
2085                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2086                                           "can only have a single encap or"
2087                                           " decap action in a flow");
2088         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2089                 return rte_flow_error_set(error, EINVAL,
2090                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2091                                           "can't have decap action after"
2092                                           " modify action");
2093         if (attr->egress)
2094                 return rte_flow_error_set(error, ENOTSUP,
2095                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2096                                           NULL,
2097                                           "decap action not supported for "
2098                                           "egress");
2099         return 0;
2100 }
2101
2102 /**
2103  * Validate the raw encap action.
2104  *
2105  * @param[in] action_flags
2106  *   Holds the actions detected until now.
2107  * @param[in] action
2108  *   Pointer to the encap action.
2109  * @param[in] attr
2110  *   Pointer to flow attributes
2111  * @param[out] error
2112  *   Pointer to error structure.
2113  *
2114  * @return
2115  *   0 on success, a negative errno value otherwise and rte_errno is set.
2116  */
2117 static int
2118 flow_dv_validate_action_raw_encap(uint64_t action_flags,
2119                                   const struct rte_flow_action *action,
2120                                   const struct rte_flow_attr *attr,
2121                                   struct rte_flow_error *error)
2122 {
2123         const struct rte_flow_action_raw_encap *raw_encap =
2124                 (const struct rte_flow_action_raw_encap *)action->conf;
2125         if (!(action->conf))
2126                 return rte_flow_error_set(error, EINVAL,
2127                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2128                                           "configuration cannot be null");
2129         if (action_flags & MLX5_FLOW_ACTION_DROP)
2130                 return rte_flow_error_set(error, EINVAL,
2131                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2132                                           "can't drop and encap in same flow");
2133         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2134                 return rte_flow_error_set(error, EINVAL,
2135                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2136                                           "can only have a single encap"
2137                                           " action in a flow");
2138         /* encap without preceding decap is not supported for ingress */
2139         if (!attr->transfer &&  attr->ingress &&
2140             !(action_flags & MLX5_FLOW_ACTION_RAW_DECAP))
2141                 return rte_flow_error_set(error, ENOTSUP,
2142                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2143                                           NULL,
2144                                           "encap action not supported for "
2145                                           "ingress");
2146         if (!raw_encap->size || !raw_encap->data)
2147                 return rte_flow_error_set(error, EINVAL,
2148                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2149                                           "raw encap data cannot be empty");
2150         return 0;
2151 }
2152
2153 /**
2154  * Validate the raw decap action.
2155  *
2156  * @param[in] action_flags
2157  *   Holds the actions detected until now.
2158  * @param[in] action
2159  *   Pointer to the encap action.
2160  * @param[in] attr
2161  *   Pointer to flow attributes
2162  * @param[out] error
2163  *   Pointer to error structure.
2164  *
2165  * @return
2166  *   0 on success, a negative errno value otherwise and rte_errno is set.
2167  */
2168 static int
2169 flow_dv_validate_action_raw_decap(uint64_t action_flags,
2170                                   const struct rte_flow_action *action,
2171                                   const struct rte_flow_attr *attr,
2172                                   struct rte_flow_error *error)
2173 {
2174         if (action_flags & MLX5_FLOW_ACTION_DROP)
2175                 return rte_flow_error_set(error, EINVAL,
2176                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2177                                           "can't drop and decap in same flow");
2178         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2179                 return rte_flow_error_set(error, EINVAL,
2180                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2181                                           "can't have encap action before"
2182                                           " decap action");
2183         if (action_flags & MLX5_FLOW_DECAP_ACTIONS)
2184                 return rte_flow_error_set(error, EINVAL,
2185                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2186                                           "can only have a single decap"
2187                                           " action in a flow");
2188         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
2189                 return rte_flow_error_set(error, EINVAL,
2190                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2191                                           "can't have decap action after"
2192                                           " modify action");
2193         /* decap action is valid on egress only if it is followed by encap */
2194         if (attr->egress) {
2195                 for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
2196                        action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
2197                        action++) {
2198                 }
2199                 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP)
2200                         return rte_flow_error_set
2201                                         (error, ENOTSUP,
2202                                          RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2203                                          NULL, "decap action not supported"
2204                                          " for egress");
2205         }
2206         return 0;
2207 }
2208
2209 /**
2210  * Find existing encap/decap resource or create and register a new one.
2211  *
2212  * @param dev[in, out]
2213  *   Pointer to rte_eth_dev structure.
2214  * @param[in, out] resource
2215  *   Pointer to encap/decap resource.
2216  * @parm[in, out] dev_flow
2217  *   Pointer to the dev_flow.
2218  * @param[out] error
2219  *   pointer to error structure.
2220  *
2221  * @return
2222  *   0 on success otherwise -errno and errno is set.
2223  */
2224 static int
2225 flow_dv_encap_decap_resource_register
2226                         (struct rte_eth_dev *dev,
2227                          struct mlx5_flow_dv_encap_decap_resource *resource,
2228                          struct mlx5_flow *dev_flow,
2229                          struct rte_flow_error *error)
2230 {
2231         struct mlx5_priv *priv = dev->data->dev_private;
2232         struct mlx5_ibv_shared *sh = priv->sh;
2233         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
2234         struct mlx5dv_dr_domain *domain;
2235
2236         resource->flags = dev_flow->group ? 0 : 1;
2237         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2238                 domain = sh->fdb_domain;
2239         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2240                 domain = sh->rx_domain;
2241         else
2242                 domain = sh->tx_domain;
2243
2244         /* Lookup a matching resource from cache. */
2245         LIST_FOREACH(cache_resource, &sh->encaps_decaps, next) {
2246                 if (resource->reformat_type == cache_resource->reformat_type &&
2247                     resource->ft_type == cache_resource->ft_type &&
2248                     resource->flags == cache_resource->flags &&
2249                     resource->size == cache_resource->size &&
2250                     !memcmp((const void *)resource->buf,
2251                             (const void *)cache_resource->buf,
2252                             resource->size)) {
2253                         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d++",
2254                                 (void *)cache_resource,
2255                                 rte_atomic32_read(&cache_resource->refcnt));
2256                         rte_atomic32_inc(&cache_resource->refcnt);
2257                         dev_flow->dv.encap_decap = cache_resource;
2258                         return 0;
2259                 }
2260         }
2261         /* Register new encap/decap resource. */
2262         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2263         if (!cache_resource)
2264                 return rte_flow_error_set(error, ENOMEM,
2265                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2266                                           "cannot allocate resource memory");
2267         *cache_resource = *resource;
2268         cache_resource->verbs_action =
2269                 mlx5_glue->dv_create_flow_action_packet_reformat
2270                         (sh->ctx, cache_resource->reformat_type,
2271                          cache_resource->ft_type, domain, cache_resource->flags,
2272                          cache_resource->size,
2273                          (cache_resource->size ? cache_resource->buf : NULL));
2274         if (!cache_resource->verbs_action) {
2275                 rte_free(cache_resource);
2276                 return rte_flow_error_set(error, ENOMEM,
2277                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2278                                           NULL, "cannot create action");
2279         }
2280         rte_atomic32_init(&cache_resource->refcnt);
2281         rte_atomic32_inc(&cache_resource->refcnt);
2282         LIST_INSERT_HEAD(&sh->encaps_decaps, cache_resource, next);
2283         dev_flow->dv.encap_decap = cache_resource;
2284         DRV_LOG(DEBUG, "new encap/decap resource %p: refcnt %d++",
2285                 (void *)cache_resource,
2286                 rte_atomic32_read(&cache_resource->refcnt));
2287         return 0;
2288 }
2289
2290 /**
2291  * Find existing table jump resource or create and register a new one.
2292  *
2293  * @param dev[in, out]
2294  *   Pointer to rte_eth_dev structure.
2295  * @param[in, out] resource
2296  *   Pointer to jump table resource.
2297  * @parm[in, out] dev_flow
2298  *   Pointer to the dev_flow.
2299  * @param[out] error
2300  *   pointer to error structure.
2301  *
2302  * @return
2303  *   0 on success otherwise -errno and errno is set.
2304  */
2305 static int
2306 flow_dv_jump_tbl_resource_register
2307                         (struct rte_eth_dev *dev,
2308                          struct mlx5_flow_dv_jump_tbl_resource *resource,
2309                          struct mlx5_flow *dev_flow,
2310                          struct rte_flow_error *error)
2311 {
2312         struct mlx5_priv *priv = dev->data->dev_private;
2313         struct mlx5_ibv_shared *sh = priv->sh;
2314         struct mlx5_flow_dv_jump_tbl_resource *cache_resource;
2315
2316         /* Lookup a matching resource from cache. */
2317         LIST_FOREACH(cache_resource, &sh->jump_tbl, next) {
2318                 if (resource->tbl == cache_resource->tbl) {
2319                         DRV_LOG(DEBUG, "jump table resource resource %p: refcnt %d++",
2320                                 (void *)cache_resource,
2321                                 rte_atomic32_read(&cache_resource->refcnt));
2322                         rte_atomic32_inc(&cache_resource->refcnt);
2323                         dev_flow->dv.jump = cache_resource;
2324                         return 0;
2325                 }
2326         }
2327         /* Register new jump table resource. */
2328         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2329         if (!cache_resource)
2330                 return rte_flow_error_set(error, ENOMEM,
2331                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2332                                           "cannot allocate resource memory");
2333         *cache_resource = *resource;
2334         cache_resource->action =
2335                 mlx5_glue->dr_create_flow_action_dest_flow_tbl
2336                 (resource->tbl->obj);
2337         if (!cache_resource->action) {
2338                 rte_free(cache_resource);
2339                 return rte_flow_error_set(error, ENOMEM,
2340                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2341                                           NULL, "cannot create action");
2342         }
2343         rte_atomic32_init(&cache_resource->refcnt);
2344         rte_atomic32_inc(&cache_resource->refcnt);
2345         LIST_INSERT_HEAD(&sh->jump_tbl, cache_resource, next);
2346         dev_flow->dv.jump = cache_resource;
2347         DRV_LOG(DEBUG, "new jump table  resource %p: refcnt %d++",
2348                 (void *)cache_resource,
2349                 rte_atomic32_read(&cache_resource->refcnt));
2350         return 0;
2351 }
2352
2353 /**
2354  * Find existing table port ID resource or create and register a new one.
2355  *
2356  * @param dev[in, out]
2357  *   Pointer to rte_eth_dev structure.
2358  * @param[in, out] resource
2359  *   Pointer to port ID action resource.
2360  * @parm[in, out] dev_flow
2361  *   Pointer to the dev_flow.
2362  * @param[out] error
2363  *   pointer to error structure.
2364  *
2365  * @return
2366  *   0 on success otherwise -errno and errno is set.
2367  */
2368 static int
2369 flow_dv_port_id_action_resource_register
2370                         (struct rte_eth_dev *dev,
2371                          struct mlx5_flow_dv_port_id_action_resource *resource,
2372                          struct mlx5_flow *dev_flow,
2373                          struct rte_flow_error *error)
2374 {
2375         struct mlx5_priv *priv = dev->data->dev_private;
2376         struct mlx5_ibv_shared *sh = priv->sh;
2377         struct mlx5_flow_dv_port_id_action_resource *cache_resource;
2378
2379         /* Lookup a matching resource from cache. */
2380         LIST_FOREACH(cache_resource, &sh->port_id_action_list, next) {
2381                 if (resource->port_id == cache_resource->port_id) {
2382                         DRV_LOG(DEBUG, "port id action resource resource %p: "
2383                                 "refcnt %d++",
2384                                 (void *)cache_resource,
2385                                 rte_atomic32_read(&cache_resource->refcnt));
2386                         rte_atomic32_inc(&cache_resource->refcnt);
2387                         dev_flow->dv.port_id_action = cache_resource;
2388                         return 0;
2389                 }
2390         }
2391         /* Register new port id action resource. */
2392         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2393         if (!cache_resource)
2394                 return rte_flow_error_set(error, ENOMEM,
2395                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2396                                           "cannot allocate resource memory");
2397         *cache_resource = *resource;
2398         cache_resource->action =
2399                 mlx5_glue->dr_create_flow_action_dest_vport
2400                         (priv->sh->fdb_domain, resource->port_id);
2401         if (!cache_resource->action) {
2402                 rte_free(cache_resource);
2403                 return rte_flow_error_set(error, ENOMEM,
2404                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2405                                           NULL, "cannot create action");
2406         }
2407         rte_atomic32_init(&cache_resource->refcnt);
2408         rte_atomic32_inc(&cache_resource->refcnt);
2409         LIST_INSERT_HEAD(&sh->port_id_action_list, cache_resource, next);
2410         dev_flow->dv.port_id_action = cache_resource;
2411         DRV_LOG(DEBUG, "new port id action resource %p: refcnt %d++",
2412                 (void *)cache_resource,
2413                 rte_atomic32_read(&cache_resource->refcnt));
2414         return 0;
2415 }
2416
2417 /**
2418  * Find existing push vlan resource or create and register a new one.
2419  *
2420  * @param dev[in, out]
2421  *   Pointer to rte_eth_dev structure.
2422  * @param[in, out] resource
2423  *   Pointer to port ID action resource.
2424  * @parm[in, out] dev_flow
2425  *   Pointer to the dev_flow.
2426  * @param[out] error
2427  *   pointer to error structure.
2428  *
2429  * @return
2430  *   0 on success otherwise -errno and errno is set.
2431  */
2432 static int
2433 flow_dv_push_vlan_action_resource_register
2434                        (struct rte_eth_dev *dev,
2435                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
2436                         struct mlx5_flow *dev_flow,
2437                         struct rte_flow_error *error)
2438 {
2439         struct mlx5_priv *priv = dev->data->dev_private;
2440         struct mlx5_ibv_shared *sh = priv->sh;
2441         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource;
2442         struct mlx5dv_dr_domain *domain;
2443
2444         /* Lookup a matching resource from cache. */
2445         LIST_FOREACH(cache_resource, &sh->push_vlan_action_list, next) {
2446                 if (resource->vlan_tag == cache_resource->vlan_tag &&
2447                     resource->ft_type == cache_resource->ft_type) {
2448                         DRV_LOG(DEBUG, "push-VLAN action resource resource %p: "
2449                                 "refcnt %d++",
2450                                 (void *)cache_resource,
2451                                 rte_atomic32_read(&cache_resource->refcnt));
2452                         rte_atomic32_inc(&cache_resource->refcnt);
2453                         dev_flow->dv.push_vlan_res = cache_resource;
2454                         return 0;
2455                 }
2456         }
2457         /* Register new push_vlan action resource. */
2458         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
2459         if (!cache_resource)
2460                 return rte_flow_error_set(error, ENOMEM,
2461                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2462                                           "cannot allocate resource memory");
2463         *cache_resource = *resource;
2464         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
2465                 domain = sh->fdb_domain;
2466         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
2467                 domain = sh->rx_domain;
2468         else
2469                 domain = sh->tx_domain;
2470         cache_resource->action =
2471                 mlx5_glue->dr_create_flow_action_push_vlan(domain,
2472                                                            resource->vlan_tag);
2473         if (!cache_resource->action) {
2474                 rte_free(cache_resource);
2475                 return rte_flow_error_set(error, ENOMEM,
2476                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2477                                           NULL, "cannot create action");
2478         }
2479         rte_atomic32_init(&cache_resource->refcnt);
2480         rte_atomic32_inc(&cache_resource->refcnt);
2481         LIST_INSERT_HEAD(&sh->push_vlan_action_list, cache_resource, next);
2482         dev_flow->dv.push_vlan_res = cache_resource;
2483         DRV_LOG(DEBUG, "new push vlan action resource %p: refcnt %d++",
2484                 (void *)cache_resource,
2485                 rte_atomic32_read(&cache_resource->refcnt));
2486         return 0;
2487 }
2488 /**
2489  * Get the size of specific rte_flow_item_type
2490  *
2491  * @param[in] item_type
2492  *   Tested rte_flow_item_type.
2493  *
2494  * @return
2495  *   sizeof struct item_type, 0 if void or irrelevant.
2496  */
2497 static size_t
2498 flow_dv_get_item_len(const enum rte_flow_item_type item_type)
2499 {
2500         size_t retval;
2501
2502         switch (item_type) {
2503         case RTE_FLOW_ITEM_TYPE_ETH:
2504                 retval = sizeof(struct rte_flow_item_eth);
2505                 break;
2506         case RTE_FLOW_ITEM_TYPE_VLAN:
2507                 retval = sizeof(struct rte_flow_item_vlan);
2508                 break;
2509         case RTE_FLOW_ITEM_TYPE_IPV4:
2510                 retval = sizeof(struct rte_flow_item_ipv4);
2511                 break;
2512         case RTE_FLOW_ITEM_TYPE_IPV6:
2513                 retval = sizeof(struct rte_flow_item_ipv6);
2514                 break;
2515         case RTE_FLOW_ITEM_TYPE_UDP:
2516                 retval = sizeof(struct rte_flow_item_udp);
2517                 break;
2518         case RTE_FLOW_ITEM_TYPE_TCP:
2519                 retval = sizeof(struct rte_flow_item_tcp);
2520                 break;
2521         case RTE_FLOW_ITEM_TYPE_VXLAN:
2522                 retval = sizeof(struct rte_flow_item_vxlan);
2523                 break;
2524         case RTE_FLOW_ITEM_TYPE_GRE:
2525                 retval = sizeof(struct rte_flow_item_gre);
2526                 break;
2527         case RTE_FLOW_ITEM_TYPE_NVGRE:
2528                 retval = sizeof(struct rte_flow_item_nvgre);
2529                 break;
2530         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2531                 retval = sizeof(struct rte_flow_item_vxlan_gpe);
2532                 break;
2533         case RTE_FLOW_ITEM_TYPE_MPLS:
2534                 retval = sizeof(struct rte_flow_item_mpls);
2535                 break;
2536         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
2537         default:
2538                 retval = 0;
2539                 break;
2540         }
2541         return retval;
2542 }
2543
2544 #define MLX5_ENCAP_IPV4_VERSION         0x40
2545 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
2546 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
2547 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
2548 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
2549 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
2550 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
2551
2552 /**
2553  * Convert the encap action data from list of rte_flow_item to raw buffer
2554  *
2555  * @param[in] items
2556  *   Pointer to rte_flow_item objects list.
2557  * @param[out] buf
2558  *   Pointer to the output buffer.
2559  * @param[out] size
2560  *   Pointer to the output buffer size.
2561  * @param[out] error
2562  *   Pointer to the error structure.
2563  *
2564  * @return
2565  *   0 on success, a negative errno value otherwise and rte_errno is set.
2566  */
2567 static int
2568 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
2569                            size_t *size, struct rte_flow_error *error)
2570 {
2571         struct rte_ether_hdr *eth = NULL;
2572         struct rte_vlan_hdr *vlan = NULL;
2573         struct rte_ipv4_hdr *ipv4 = NULL;
2574         struct rte_ipv6_hdr *ipv6 = NULL;
2575         struct rte_udp_hdr *udp = NULL;
2576         struct rte_vxlan_hdr *vxlan = NULL;
2577         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
2578         struct rte_gre_hdr *gre = NULL;
2579         size_t len;
2580         size_t temp_size = 0;
2581
2582         if (!items)
2583                 return rte_flow_error_set(error, EINVAL,
2584                                           RTE_FLOW_ERROR_TYPE_ACTION,
2585                                           NULL, "invalid empty data");
2586         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2587                 len = flow_dv_get_item_len(items->type);
2588                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
2589                         return rte_flow_error_set(error, EINVAL,
2590                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2591                                                   (void *)items->type,
2592                                                   "items total size is too big"
2593                                                   " for encap action");
2594                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
2595                 switch (items->type) {
2596                 case RTE_FLOW_ITEM_TYPE_ETH:
2597                         eth = (struct rte_ether_hdr *)&buf[temp_size];
2598                         break;
2599                 case RTE_FLOW_ITEM_TYPE_VLAN:
2600                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
2601                         if (!eth)
2602                                 return rte_flow_error_set(error, EINVAL,
2603                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2604                                                 (void *)items->type,
2605                                                 "eth header not found");
2606                         if (!eth->ether_type)
2607                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
2608                         break;
2609                 case RTE_FLOW_ITEM_TYPE_IPV4:
2610                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
2611                         if (!vlan && !eth)
2612                                 return rte_flow_error_set(error, EINVAL,
2613                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2614                                                 (void *)items->type,
2615                                                 "neither eth nor vlan"
2616                                                 " header found");
2617                         if (vlan && !vlan->eth_proto)
2618                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2619                         else if (eth && !eth->ether_type)
2620                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
2621                         if (!ipv4->version_ihl)
2622                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
2623                                                     MLX5_ENCAP_IPV4_IHL_MIN;
2624                         if (!ipv4->time_to_live)
2625                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
2626                         break;
2627                 case RTE_FLOW_ITEM_TYPE_IPV6:
2628                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
2629                         if (!vlan && !eth)
2630                                 return rte_flow_error_set(error, EINVAL,
2631                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2632                                                 (void *)items->type,
2633                                                 "neither eth nor vlan"
2634                                                 " header found");
2635                         if (vlan && !vlan->eth_proto)
2636                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2637                         else if (eth && !eth->ether_type)
2638                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
2639                         if (!ipv6->vtc_flow)
2640                                 ipv6->vtc_flow =
2641                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
2642                         if (!ipv6->hop_limits)
2643                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
2644                         break;
2645                 case RTE_FLOW_ITEM_TYPE_UDP:
2646                         udp = (struct rte_udp_hdr *)&buf[temp_size];
2647                         if (!ipv4 && !ipv6)
2648                                 return rte_flow_error_set(error, EINVAL,
2649                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2650                                                 (void *)items->type,
2651                                                 "ip header not found");
2652                         if (ipv4 && !ipv4->next_proto_id)
2653                                 ipv4->next_proto_id = IPPROTO_UDP;
2654                         else if (ipv6 && !ipv6->proto)
2655                                 ipv6->proto = IPPROTO_UDP;
2656                         break;
2657                 case RTE_FLOW_ITEM_TYPE_VXLAN:
2658                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
2659                         if (!udp)
2660                                 return rte_flow_error_set(error, EINVAL,
2661                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2662                                                 (void *)items->type,
2663                                                 "udp header not found");
2664                         if (!udp->dst_port)
2665                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
2666                         if (!vxlan->vx_flags)
2667                                 vxlan->vx_flags =
2668                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
2669                         break;
2670                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
2671                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
2672                         if (!udp)
2673                                 return rte_flow_error_set(error, EINVAL,
2674                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2675                                                 (void *)items->type,
2676                                                 "udp header not found");
2677                         if (!vxlan_gpe->proto)
2678                                 return rte_flow_error_set(error, EINVAL,
2679                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2680                                                 (void *)items->type,
2681                                                 "next protocol not found");
2682                         if (!udp->dst_port)
2683                                 udp->dst_port =
2684                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
2685                         if (!vxlan_gpe->vx_flags)
2686                                 vxlan_gpe->vx_flags =
2687                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
2688                         break;
2689                 case RTE_FLOW_ITEM_TYPE_GRE:
2690                 case RTE_FLOW_ITEM_TYPE_NVGRE:
2691                         gre = (struct rte_gre_hdr *)&buf[temp_size];
2692                         if (!gre->proto)
2693                                 return rte_flow_error_set(error, EINVAL,
2694                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2695                                                 (void *)items->type,
2696                                                 "next protocol not found");
2697                         if (!ipv4 && !ipv6)
2698                                 return rte_flow_error_set(error, EINVAL,
2699                                                 RTE_FLOW_ERROR_TYPE_ACTION,
2700                                                 (void *)items->type,
2701                                                 "ip header not found");
2702                         if (ipv4 && !ipv4->next_proto_id)
2703                                 ipv4->next_proto_id = IPPROTO_GRE;
2704                         else if (ipv6 && !ipv6->proto)
2705                                 ipv6->proto = IPPROTO_GRE;
2706                         break;
2707                 case RTE_FLOW_ITEM_TYPE_VOID:
2708                         break;
2709                 default:
2710                         return rte_flow_error_set(error, EINVAL,
2711                                                   RTE_FLOW_ERROR_TYPE_ACTION,
2712                                                   (void *)items->type,
2713                                                   "unsupported item type");
2714                         break;
2715                 }
2716                 temp_size += len;
2717         }
2718         *size = temp_size;
2719         return 0;
2720 }
2721
2722 static int
2723 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
2724 {
2725         struct rte_ether_hdr *eth = NULL;
2726         struct rte_vlan_hdr *vlan = NULL;
2727         struct rte_ipv6_hdr *ipv6 = NULL;
2728         struct rte_udp_hdr *udp = NULL;
2729         char *next_hdr;
2730         uint16_t proto;
2731
2732         eth = (struct rte_ether_hdr *)data;
2733         next_hdr = (char *)(eth + 1);
2734         proto = RTE_BE16(eth->ether_type);
2735
2736         /* VLAN skipping */
2737         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
2738                 vlan = (struct rte_vlan_hdr *)next_hdr;
2739                 proto = RTE_BE16(vlan->eth_proto);
2740                 next_hdr += sizeof(struct rte_vlan_hdr);
2741         }
2742
2743         /* HW calculates IPv4 csum. no need to proceed */
2744         if (proto == RTE_ETHER_TYPE_IPV4)
2745                 return 0;
2746
2747         /* non IPv4/IPv6 header. not supported */
2748         if (proto != RTE_ETHER_TYPE_IPV6) {
2749                 return rte_flow_error_set(error, ENOTSUP,
2750                                           RTE_FLOW_ERROR_TYPE_ACTION,
2751                                           NULL, "Cannot offload non IPv4/IPv6");
2752         }
2753
2754         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
2755
2756         /* ignore non UDP */
2757         if (ipv6->proto != IPPROTO_UDP)
2758                 return 0;
2759
2760         udp = (struct rte_udp_hdr *)(ipv6 + 1);
2761         udp->dgram_cksum = 0;
2762
2763         return 0;
2764 }
2765
2766 /**
2767  * Convert L2 encap action to DV specification.
2768  *
2769  * @param[in] dev
2770  *   Pointer to rte_eth_dev structure.
2771  * @param[in] action
2772  *   Pointer to action structure.
2773  * @param[in, out] dev_flow
2774  *   Pointer to the mlx5_flow.
2775  * @param[in] transfer
2776  *   Mark if the flow is E-Switch flow.
2777  * @param[out] error
2778  *   Pointer to the error structure.
2779  *
2780  * @return
2781  *   0 on success, a negative errno value otherwise and rte_errno is set.
2782  */
2783 static int
2784 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
2785                                const struct rte_flow_action *action,
2786                                struct mlx5_flow *dev_flow,
2787                                uint8_t transfer,
2788                                struct rte_flow_error *error)
2789 {
2790         const struct rte_flow_item *encap_data;
2791         const struct rte_flow_action_raw_encap *raw_encap_data;
2792         struct mlx5_flow_dv_encap_decap_resource res = {
2793                 .reformat_type =
2794                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
2795                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2796                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
2797         };
2798
2799         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
2800                 raw_encap_data =
2801                         (const struct rte_flow_action_raw_encap *)action->conf;
2802                 res.size = raw_encap_data->size;
2803                 memcpy(res.buf, raw_encap_data->data, res.size);
2804                 if (flow_dv_zero_encap_udp_csum(res.buf, error))
2805                         return -rte_errno;
2806         } else {
2807                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
2808                         encap_data =
2809                                 ((const struct rte_flow_action_vxlan_encap *)
2810                                                 action->conf)->definition;
2811                 else
2812                         encap_data =
2813                                 ((const struct rte_flow_action_nvgre_encap *)
2814                                                 action->conf)->definition;
2815                 if (flow_dv_convert_encap_data(encap_data, res.buf,
2816                                                &res.size, error))
2817                         return -rte_errno;
2818         }
2819         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2820                 return rte_flow_error_set(error, EINVAL,
2821                                           RTE_FLOW_ERROR_TYPE_ACTION,
2822                                           NULL, "can't create L2 encap action");
2823         return 0;
2824 }
2825
2826 /**
2827  * Convert L2 decap action to DV specification.
2828  *
2829  * @param[in] dev
2830  *   Pointer to rte_eth_dev structure.
2831  * @param[in, out] dev_flow
2832  *   Pointer to the mlx5_flow.
2833  * @param[in] transfer
2834  *   Mark if the flow is E-Switch flow.
2835  * @param[out] error
2836  *   Pointer to the error structure.
2837  *
2838  * @return
2839  *   0 on success, a negative errno value otherwise and rte_errno is set.
2840  */
2841 static int
2842 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
2843                                struct mlx5_flow *dev_flow,
2844                                uint8_t transfer,
2845                                struct rte_flow_error *error)
2846 {
2847         struct mlx5_flow_dv_encap_decap_resource res = {
2848                 .size = 0,
2849                 .reformat_type =
2850                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
2851                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
2852                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
2853         };
2854
2855         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2856                 return rte_flow_error_set(error, EINVAL,
2857                                           RTE_FLOW_ERROR_TYPE_ACTION,
2858                                           NULL, "can't create L2 decap action");
2859         return 0;
2860 }
2861
2862 /**
2863  * Convert raw decap/encap (L3 tunnel) action to DV specification.
2864  *
2865  * @param[in] dev
2866  *   Pointer to rte_eth_dev structure.
2867  * @param[in] action
2868  *   Pointer to action structure.
2869  * @param[in, out] dev_flow
2870  *   Pointer to the mlx5_flow.
2871  * @param[in] attr
2872  *   Pointer to the flow attributes.
2873  * @param[out] error
2874  *   Pointer to the error structure.
2875  *
2876  * @return
2877  *   0 on success, a negative errno value otherwise and rte_errno is set.
2878  */
2879 static int
2880 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
2881                                 const struct rte_flow_action *action,
2882                                 struct mlx5_flow *dev_flow,
2883                                 const struct rte_flow_attr *attr,
2884                                 struct rte_flow_error *error)
2885 {
2886         const struct rte_flow_action_raw_encap *encap_data;
2887         struct mlx5_flow_dv_encap_decap_resource res;
2888
2889         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
2890         res.size = encap_data->size;
2891         memcpy(res.buf, encap_data->data, res.size);
2892         res.reformat_type = attr->egress ?
2893                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL :
2894                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2;
2895         if (attr->transfer)
2896                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2897         else
2898                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2899                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2900         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
2901                 return rte_flow_error_set(error, EINVAL,
2902                                           RTE_FLOW_ERROR_TYPE_ACTION,
2903                                           NULL, "can't create encap action");
2904         return 0;
2905 }
2906
2907 /**
2908  * Create action push VLAN.
2909  *
2910  * @param[in] dev
2911  *   Pointer to rte_eth_dev structure.
2912  * @param[in] vlan_tag
2913  *   the vlan tag to push to the Ethernet header.
2914  * @param[in, out] dev_flow
2915  *   Pointer to the mlx5_flow.
2916  * @param[in] attr
2917  *   Pointer to the flow attributes.
2918  * @param[out] error
2919  *   Pointer to the error structure.
2920  *
2921  * @return
2922  *   0 on success, a negative errno value otherwise and rte_errno is set.
2923  */
2924 static int
2925 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
2926                                 const struct rte_flow_attr *attr,
2927                                 const struct rte_vlan_hdr *vlan,
2928                                 struct mlx5_flow *dev_flow,
2929                                 struct rte_flow_error *error)
2930 {
2931         struct mlx5_flow_dv_push_vlan_action_resource res;
2932
2933         res.vlan_tag =
2934                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
2935                                  vlan->vlan_tci);
2936         if (attr->transfer)
2937                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
2938         else
2939                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
2940                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
2941         return flow_dv_push_vlan_action_resource_register
2942                                             (dev, &res, dev_flow, error);
2943 }
2944
2945 /**
2946  * Validate the modify-header actions.
2947  *
2948  * @param[in] action_flags
2949  *   Holds the actions detected until now.
2950  * @param[in] action
2951  *   Pointer to the modify action.
2952  * @param[out] error
2953  *   Pointer to error structure.
2954  *
2955  * @return
2956  *   0 on success, a negative errno value otherwise and rte_errno is set.
2957  */
2958 static int
2959 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
2960                                    const struct rte_flow_action *action,
2961                                    struct rte_flow_error *error)
2962 {
2963         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
2964                 return rte_flow_error_set(error, EINVAL,
2965                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
2966                                           NULL, "action configuration not set");
2967         if (action_flags & MLX5_FLOW_ENCAP_ACTIONS)
2968                 return rte_flow_error_set(error, EINVAL,
2969                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2970                                           "can't have encap action before"
2971                                           " modify action");
2972         return 0;
2973 }
2974
2975 /**
2976  * Validate the modify-header MAC address actions.
2977  *
2978  * @param[in] action_flags
2979  *   Holds the actions detected until now.
2980  * @param[in] action
2981  *   Pointer to the modify action.
2982  * @param[in] item_flags
2983  *   Holds the items detected.
2984  * @param[out] error
2985  *   Pointer to error structure.
2986  *
2987  * @return
2988  *   0 on success, a negative errno value otherwise and rte_errno is set.
2989  */
2990 static int
2991 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
2992                                    const struct rte_flow_action *action,
2993                                    const uint64_t item_flags,
2994                                    struct rte_flow_error *error)
2995 {
2996         int ret = 0;
2997
2998         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
2999         if (!ret) {
3000                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
3001                         return rte_flow_error_set(error, EINVAL,
3002                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3003                                                   NULL,
3004                                                   "no L2 item in pattern");
3005         }
3006         return ret;
3007 }
3008
3009 /**
3010  * Validate the modify-header IPv4 address actions.
3011  *
3012  * @param[in] action_flags
3013  *   Holds the actions detected until now.
3014  * @param[in] action
3015  *   Pointer to the modify action.
3016  * @param[in] item_flags
3017  *   Holds the items detected.
3018  * @param[out] error
3019  *   Pointer to error structure.
3020  *
3021  * @return
3022  *   0 on success, a negative errno value otherwise and rte_errno is set.
3023  */
3024 static int
3025 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
3026                                     const struct rte_flow_action *action,
3027                                     const uint64_t item_flags,
3028                                     struct rte_flow_error *error)
3029 {
3030         int ret = 0;
3031
3032         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3033         if (!ret) {
3034                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
3035                         return rte_flow_error_set(error, EINVAL,
3036                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3037                                                   NULL,
3038                                                   "no ipv4 item in pattern");
3039         }
3040         return ret;
3041 }
3042
3043 /**
3044  * Validate the modify-header IPv6 address actions.
3045  *
3046  * @param[in] action_flags
3047  *   Holds the actions detected until now.
3048  * @param[in] action
3049  *   Pointer to the modify action.
3050  * @param[in] item_flags
3051  *   Holds the items detected.
3052  * @param[out] error
3053  *   Pointer to error structure.
3054  *
3055  * @return
3056  *   0 on success, a negative errno value otherwise and rte_errno is set.
3057  */
3058 static int
3059 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
3060                                     const struct rte_flow_action *action,
3061                                     const uint64_t item_flags,
3062                                     struct rte_flow_error *error)
3063 {
3064         int ret = 0;
3065
3066         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3067         if (!ret) {
3068                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
3069                         return rte_flow_error_set(error, EINVAL,
3070                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3071                                                   NULL,
3072                                                   "no ipv6 item in pattern");
3073         }
3074         return ret;
3075 }
3076
3077 /**
3078  * Validate the modify-header TP actions.
3079  *
3080  * @param[in] action_flags
3081  *   Holds the actions detected until now.
3082  * @param[in] action
3083  *   Pointer to the modify action.
3084  * @param[in] item_flags
3085  *   Holds the items detected.
3086  * @param[out] error
3087  *   Pointer to error structure.
3088  *
3089  * @return
3090  *   0 on success, a negative errno value otherwise and rte_errno is set.
3091  */
3092 static int
3093 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
3094                                   const struct rte_flow_action *action,
3095                                   const uint64_t item_flags,
3096                                   struct rte_flow_error *error)
3097 {
3098         int ret = 0;
3099
3100         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3101         if (!ret) {
3102                 if (!(item_flags & MLX5_FLOW_LAYER_L4))
3103                         return rte_flow_error_set(error, EINVAL,
3104                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3105                                                   NULL, "no transport layer "
3106                                                   "in pattern");
3107         }
3108         return ret;
3109 }
3110
3111 /**
3112  * Validate the modify-header actions of increment/decrement
3113  * TCP Sequence-number.
3114  *
3115  * @param[in] action_flags
3116  *   Holds the actions detected until now.
3117  * @param[in] action
3118  *   Pointer to the modify action.
3119  * @param[in] item_flags
3120  *   Holds the items detected.
3121  * @param[out] error
3122  *   Pointer to error structure.
3123  *
3124  * @return
3125  *   0 on success, a negative errno value otherwise and rte_errno is set.
3126  */
3127 static int
3128 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
3129                                        const struct rte_flow_action *action,
3130                                        const uint64_t item_flags,
3131                                        struct rte_flow_error *error)
3132 {
3133         int ret = 0;
3134
3135         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3136         if (!ret) {
3137                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3138                         return rte_flow_error_set(error, EINVAL,
3139                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3140                                                   NULL, "no TCP item in"
3141                                                   " pattern");
3142                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
3143                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
3144                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
3145                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
3146                         return rte_flow_error_set(error, EINVAL,
3147                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3148                                                   NULL,
3149                                                   "cannot decrease and increase"
3150                                                   " TCP sequence number"
3151                                                   " at the same time");
3152         }
3153         return ret;
3154 }
3155
3156 /**
3157  * Validate the modify-header actions of increment/decrement
3158  * TCP Acknowledgment number.
3159  *
3160  * @param[in] action_flags
3161  *   Holds the actions detected until now.
3162  * @param[in] action
3163  *   Pointer to the modify action.
3164  * @param[in] item_flags
3165  *   Holds the items detected.
3166  * @param[out] error
3167  *   Pointer to error structure.
3168  *
3169  * @return
3170  *   0 on success, a negative errno value otherwise and rte_errno is set.
3171  */
3172 static int
3173 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
3174                                        const struct rte_flow_action *action,
3175                                        const uint64_t item_flags,
3176                                        struct rte_flow_error *error)
3177 {
3178         int ret = 0;
3179
3180         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3181         if (!ret) {
3182                 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3183                         return rte_flow_error_set(error, EINVAL,
3184                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3185                                                   NULL, "no TCP item in"
3186                                                   " pattern");
3187                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
3188                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
3189                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
3190                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
3191                         return rte_flow_error_set(error, EINVAL,
3192                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3193                                                   NULL,
3194                                                   "cannot decrease and increase"
3195                                                   " TCP acknowledgment number"
3196                                                   " at the same time");
3197         }
3198         return ret;
3199 }
3200
3201 /**
3202  * Validate the modify-header TTL actions.
3203  *
3204  * @param[in] action_flags
3205  *   Holds the actions detected until now.
3206  * @param[in] action
3207  *   Pointer to the modify action.
3208  * @param[in] item_flags
3209  *   Holds the items detected.
3210  * @param[out] error
3211  *   Pointer to error structure.
3212  *
3213  * @return
3214  *   0 on success, a negative errno value otherwise and rte_errno is set.
3215  */
3216 static int
3217 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
3218                                    const struct rte_flow_action *action,
3219                                    const uint64_t item_flags,
3220                                    struct rte_flow_error *error)
3221 {
3222         int ret = 0;
3223
3224         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
3225         if (!ret) {
3226                 if (!(item_flags & MLX5_FLOW_LAYER_L3))
3227                         return rte_flow_error_set(error, EINVAL,
3228                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3229                                                   NULL,
3230                                                   "no IP protocol in pattern");
3231         }
3232         return ret;
3233 }
3234
3235 /**
3236  * Validate jump action.
3237  *
3238  * @param[in] action
3239  *   Pointer to the jump action.
3240  * @param[in] action_flags
3241  *   Holds the actions detected until now.
3242  * @param[in] attributes
3243  *   Pointer to flow attributes
3244  * @param[in] external
3245  *   Action belongs to flow rule created by request external to PMD.
3246  * @param[out] error
3247  *   Pointer to error structure.
3248  *
3249  * @return
3250  *   0 on success, a negative errno value otherwise and rte_errno is set.
3251  */
3252 static int
3253 flow_dv_validate_action_jump(const struct rte_flow_action *action,
3254                              uint64_t action_flags,
3255                              const struct rte_flow_attr *attributes,
3256                              bool external, struct rte_flow_error *error)
3257 {
3258         uint32_t max_group = attributes->transfer ? MLX5_MAX_TABLES_FDB :
3259                                                     MLX5_MAX_TABLES;
3260         uint32_t target_group, table;
3261         int ret = 0;
3262
3263         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3264                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3265                 return rte_flow_error_set(error, EINVAL,
3266                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3267                                           "can't have 2 fate actions in"
3268                                           " same flow");
3269         if (action_flags & MLX5_FLOW_ACTION_METER)
3270                 return rte_flow_error_set(error, ENOTSUP,
3271                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3272                                           "jump with meter not support");
3273         if (!action->conf)
3274                 return rte_flow_error_set(error, EINVAL,
3275                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3276                                           NULL, "action configuration not set");
3277         target_group =
3278                 ((const struct rte_flow_action_jump *)action->conf)->group;
3279         ret = mlx5_flow_group_to_table(attributes, external, target_group,
3280                                        &table, error);
3281         if (ret)
3282                 return ret;
3283         if (table >= max_group)
3284                 return rte_flow_error_set(error, EINVAL,
3285                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
3286                                           "target group index out of range");
3287         if (attributes->group == target_group)
3288                 return rte_flow_error_set(error, EINVAL,
3289                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3290                                           "target group must be other than"
3291                                           " the current flow group");
3292         return 0;
3293 }
3294
3295 /*
3296  * Validate the port_id action.
3297  *
3298  * @param[in] dev
3299  *   Pointer to rte_eth_dev structure.
3300  * @param[in] action_flags
3301  *   Bit-fields that holds the actions detected until now.
3302  * @param[in] action
3303  *   Port_id RTE action structure.
3304  * @param[in] attr
3305  *   Attributes of flow that includes this action.
3306  * @param[out] error
3307  *   Pointer to error structure.
3308  *
3309  * @return
3310  *   0 on success, a negative errno value otherwise and rte_errno is set.
3311  */
3312 static int
3313 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
3314                                 uint64_t action_flags,
3315                                 const struct rte_flow_action *action,
3316                                 const struct rte_flow_attr *attr,
3317                                 struct rte_flow_error *error)
3318 {
3319         const struct rte_flow_action_port_id *port_id;
3320         struct mlx5_priv *act_priv;
3321         struct mlx5_priv *dev_priv;
3322         uint16_t port;
3323
3324         if (!attr->transfer)
3325                 return rte_flow_error_set(error, ENOTSUP,
3326                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3327                                           NULL,
3328                                           "port id action is valid in transfer"
3329                                           " mode only");
3330         if (!action || !action->conf)
3331                 return rte_flow_error_set(error, ENOTSUP,
3332                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3333                                           NULL,
3334                                           "port id action parameters must be"
3335                                           " specified");
3336         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
3337                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
3338                 return rte_flow_error_set(error, EINVAL,
3339                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3340                                           "can have only one fate actions in"
3341                                           " a flow");
3342         dev_priv = mlx5_dev_to_eswitch_info(dev);
3343         if (!dev_priv)
3344                 return rte_flow_error_set(error, rte_errno,
3345                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3346                                           NULL,
3347                                           "failed to obtain E-Switch info");
3348         port_id = action->conf;
3349         port = port_id->original ? dev->data->port_id : port_id->id;
3350         act_priv = mlx5_port_to_eswitch_info(port, false);
3351         if (!act_priv)
3352                 return rte_flow_error_set
3353                                 (error, rte_errno,
3354                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
3355                                  "failed to obtain E-Switch port id for port");
3356         if (act_priv->domain_id != dev_priv->domain_id)
3357                 return rte_flow_error_set
3358                                 (error, EINVAL,
3359                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3360                                  "port does not belong to"
3361                                  " E-Switch being configured");
3362         return 0;
3363 }
3364
3365 /**
3366  * Get the maximum number of modify header actions.
3367  *
3368  * @param dev
3369  *   Pointer to rte_eth_dev structure.
3370  *
3371  * @return
3372  *   Max number of modify header actions device can support.
3373  */
3374 static unsigned int
3375 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev)
3376 {
3377         /*
3378          * There's no way to directly query the max cap. Although it has to be
3379          * acquried by iterative trial, it is a safe assumption that more
3380          * actions are supported by FW if extensive metadata register is
3381          * supported.
3382          */
3383         return mlx5_flow_ext_mreg_supported(dev) ? MLX5_MODIFY_NUM :
3384                                                    MLX5_MODIFY_NUM_NO_MREG;
3385 }
3386
3387 /**
3388  * Validate the meter action.
3389  *
3390  * @param[in] dev
3391  *   Pointer to rte_eth_dev structure.
3392  * @param[in] action_flags
3393  *   Bit-fields that holds the actions detected until now.
3394  * @param[in] action
3395  *   Pointer to the meter action.
3396  * @param[in] attr
3397  *   Attributes of flow that includes this action.
3398  * @param[out] error
3399  *   Pointer to error structure.
3400  *
3401  * @return
3402  *   0 on success, a negative errno value otherwise and rte_ernno is set.
3403  */
3404 static int
3405 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
3406                                 uint64_t action_flags,
3407                                 const struct rte_flow_action *action,
3408                                 const struct rte_flow_attr *attr,
3409                                 struct rte_flow_error *error)
3410 {
3411         struct mlx5_priv *priv = dev->data->dev_private;
3412         const struct rte_flow_action_meter *am = action->conf;
3413         struct mlx5_flow_meter *fm = mlx5_flow_meter_find(priv, am->mtr_id);
3414
3415         if (action_flags & MLX5_FLOW_ACTION_METER)
3416                 return rte_flow_error_set(error, ENOTSUP,
3417                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3418                                           "meter chaining not support");
3419         if (action_flags & MLX5_FLOW_ACTION_JUMP)
3420                 return rte_flow_error_set(error, ENOTSUP,
3421                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3422                                           "meter with jump not support");
3423         if (!priv->mtr_en)
3424                 return rte_flow_error_set(error, ENOTSUP,
3425                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3426                                           NULL,
3427                                           "meter action not supported");
3428         if (!fm)
3429                 return rte_flow_error_set(error, EINVAL,
3430                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3431                                           "Meter not found");
3432         if (fm->ref_cnt && (!(fm->attr.transfer == attr->transfer ||
3433               (!fm->attr.ingress && !attr->ingress && attr->egress) ||
3434               (!fm->attr.egress && !attr->egress && attr->ingress))))
3435                 return rte_flow_error_set(error, EINVAL,
3436                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3437                                           "Flow attributes are either invalid "
3438                                           "or have a conflict with current "
3439                                           "meter attributes");
3440         return 0;
3441 }
3442
3443 /**
3444  * Find existing modify-header resource or create and register a new one.
3445  *
3446  * @param dev[in, out]
3447  *   Pointer to rte_eth_dev structure.
3448  * @param[in, out] resource
3449  *   Pointer to modify-header resource.
3450  * @parm[in, out] dev_flow
3451  *   Pointer to the dev_flow.
3452  * @param[out] error
3453  *   pointer to error structure.
3454  *
3455  * @return
3456  *   0 on success otherwise -errno and errno is set.
3457  */
3458 static int
3459 flow_dv_modify_hdr_resource_register
3460                         (struct rte_eth_dev *dev,
3461                          struct mlx5_flow_dv_modify_hdr_resource *resource,
3462                          struct mlx5_flow *dev_flow,
3463                          struct rte_flow_error *error)
3464 {
3465         struct mlx5_priv *priv = dev->data->dev_private;
3466         struct mlx5_ibv_shared *sh = priv->sh;
3467         struct mlx5_flow_dv_modify_hdr_resource *cache_resource;
3468         struct mlx5dv_dr_domain *ns;
3469
3470         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev))
3471                 return rte_flow_error_set(error, EOVERFLOW,
3472                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3473                                           "too many modify header items");
3474         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3475                 ns = sh->fdb_domain;
3476         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
3477                 ns = sh->tx_domain;
3478         else
3479                 ns = sh->rx_domain;
3480         resource->flags =
3481                 dev_flow->group ? 0 : MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
3482         /* Lookup a matching resource from cache. */
3483         LIST_FOREACH(cache_resource, &sh->modify_cmds, next) {
3484                 if (resource->ft_type == cache_resource->ft_type &&
3485                     resource->actions_num == cache_resource->actions_num &&
3486                     resource->flags == cache_resource->flags &&
3487                     !memcmp((const void *)resource->actions,
3488                             (const void *)cache_resource->actions,
3489                             (resource->actions_num *
3490                                             sizeof(resource->actions[0])))) {
3491                         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d++",
3492                                 (void *)cache_resource,
3493                                 rte_atomic32_read(&cache_resource->refcnt));
3494                         rte_atomic32_inc(&cache_resource->refcnt);
3495                         dev_flow->dv.modify_hdr = cache_resource;
3496                         return 0;
3497                 }
3498         }
3499         /* Register new modify-header resource. */
3500         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
3501         if (!cache_resource)
3502                 return rte_flow_error_set(error, ENOMEM,
3503                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3504                                           "cannot allocate resource memory");
3505         *cache_resource = *resource;
3506         cache_resource->verbs_action =
3507                 mlx5_glue->dv_create_flow_action_modify_header
3508                                         (sh->ctx, cache_resource->ft_type,
3509                                          ns, cache_resource->flags,
3510                                          cache_resource->actions_num *
3511                                          sizeof(cache_resource->actions[0]),
3512                                          (uint64_t *)cache_resource->actions);
3513         if (!cache_resource->verbs_action) {
3514                 rte_free(cache_resource);
3515                 return rte_flow_error_set(error, ENOMEM,
3516                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3517                                           NULL, "cannot create action");
3518         }
3519         rte_atomic32_init(&cache_resource->refcnt);
3520         rte_atomic32_inc(&cache_resource->refcnt);
3521         LIST_INSERT_HEAD(&sh->modify_cmds, cache_resource, next);
3522         dev_flow->dv.modify_hdr = cache_resource;
3523         DRV_LOG(DEBUG, "new modify-header resource %p: refcnt %d++",
3524                 (void *)cache_resource,
3525                 rte_atomic32_read(&cache_resource->refcnt));
3526         return 0;
3527 }
3528
3529 #define MLX5_CNT_CONTAINER_RESIZE 64
3530
3531 /**
3532  * Get or create a flow counter.
3533  *
3534  * @param[in] dev
3535  *   Pointer to the Ethernet device structure.
3536  * @param[in] shared
3537  *   Indicate if this counter is shared with other flows.
3538  * @param[in] id
3539  *   Counter identifier.
3540  *
3541  * @return
3542  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
3543  */
3544 static struct mlx5_flow_counter *
3545 flow_dv_counter_alloc_fallback(struct rte_eth_dev *dev, uint32_t shared,
3546                                uint32_t id)
3547 {
3548         struct mlx5_priv *priv = dev->data->dev_private;
3549         struct mlx5_flow_counter *cnt = NULL;
3550         struct mlx5_devx_obj *dcs = NULL;
3551
3552         if (!priv->config.devx) {
3553                 rte_errno = ENOTSUP;
3554                 return NULL;
3555         }
3556         if (shared) {
3557                 TAILQ_FOREACH(cnt, &priv->sh->cmng.flow_counters, next) {
3558                         if (cnt->shared && cnt->id == id) {
3559                                 cnt->ref_cnt++;
3560                                 return cnt;
3561                         }
3562                 }
3563         }
3564         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3565         if (!dcs)
3566                 return NULL;
3567         cnt = rte_calloc(__func__, 1, sizeof(*cnt), 0);
3568         if (!cnt) {
3569                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3570                 rte_errno = ENOMEM;
3571                 return NULL;
3572         }
3573         struct mlx5_flow_counter tmpl = {
3574                 .shared = shared,
3575                 .ref_cnt = 1,
3576                 .id = id,
3577                 .dcs = dcs,
3578         };
3579         tmpl.action = mlx5_glue->dv_create_flow_action_counter(dcs->obj, 0);
3580         if (!tmpl.action) {
3581                 claim_zero(mlx5_devx_cmd_destroy(cnt->dcs));
3582                 rte_errno = errno;
3583                 rte_free(cnt);
3584                 return NULL;
3585         }
3586         *cnt = tmpl;
3587         TAILQ_INSERT_HEAD(&priv->sh->cmng.flow_counters, cnt, next);
3588         return cnt;
3589 }
3590
3591 /**
3592  * Release a flow counter.
3593  *
3594  * @param[in] dev
3595  *   Pointer to the Ethernet device structure.
3596  * @param[in] counter
3597  *   Pointer to the counter handler.
3598  */
3599 static void
3600 flow_dv_counter_release_fallback(struct rte_eth_dev *dev,
3601                                  struct mlx5_flow_counter *counter)
3602 {
3603         struct mlx5_priv *priv = dev->data->dev_private;
3604
3605         if (!counter)
3606                 return;
3607         if (--counter->ref_cnt == 0) {
3608                 TAILQ_REMOVE(&priv->sh->cmng.flow_counters, counter, next);
3609                 claim_zero(mlx5_devx_cmd_destroy(counter->dcs));
3610                 rte_free(counter);
3611         }
3612 }
3613
3614 /**
3615  * Query a devx flow counter.
3616  *
3617  * @param[in] dev
3618  *   Pointer to the Ethernet device structure.
3619  * @param[in] cnt
3620  *   Pointer to the flow counter.
3621  * @param[out] pkts
3622  *   The statistics value of packets.
3623  * @param[out] bytes
3624  *   The statistics value of bytes.
3625  *
3626  * @return
3627  *   0 on success, otherwise a negative errno value and rte_errno is set.
3628  */
3629 static inline int
3630 _flow_dv_query_count_fallback(struct rte_eth_dev *dev __rte_unused,
3631                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3632                      uint64_t *bytes)
3633 {
3634         return mlx5_devx_cmd_flow_counter_query(cnt->dcs, 0, 0, pkts, bytes,
3635                                                 0, NULL, NULL, 0);
3636 }
3637
3638 /**
3639  * Get a pool by a counter.
3640  *
3641  * @param[in] cnt
3642  *   Pointer to the counter.
3643  *
3644  * @return
3645  *   The counter pool.
3646  */
3647 static struct mlx5_flow_counter_pool *
3648 flow_dv_counter_pool_get(struct mlx5_flow_counter *cnt)
3649 {
3650         if (!cnt->batch) {
3651                 cnt -= cnt->dcs->id % MLX5_COUNTERS_PER_POOL;
3652                 return (struct mlx5_flow_counter_pool *)cnt - 1;
3653         }
3654         return cnt->pool;
3655 }
3656
3657 /**
3658  * Get a pool by devx counter ID.
3659  *
3660  * @param[in] cont
3661  *   Pointer to the counter container.
3662  * @param[in] id
3663  *   The counter devx ID.
3664  *
3665  * @return
3666  *   The counter pool pointer if exists, NULL otherwise,
3667  */
3668 static struct mlx5_flow_counter_pool *
3669 flow_dv_find_pool_by_id(struct mlx5_pools_container *cont, int id)
3670 {
3671         struct mlx5_flow_counter_pool *pool;
3672
3673         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3674                 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
3675                                 MLX5_COUNTERS_PER_POOL;
3676
3677                 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
3678                         return pool;
3679         };
3680         return NULL;
3681 }
3682
3683 /**
3684  * Allocate a new memory for the counter values wrapped by all the needed
3685  * management.
3686  *
3687  * @param[in] dev
3688  *   Pointer to the Ethernet device structure.
3689  * @param[in] raws_n
3690  *   The raw memory areas - each one for MLX5_COUNTERS_PER_POOL counters.
3691  *
3692  * @return
3693  *   The new memory management pointer on success, otherwise NULL and rte_errno
3694  *   is set.
3695  */
3696 static struct mlx5_counter_stats_mem_mng *
3697 flow_dv_create_counter_stat_mem_mng(struct rte_eth_dev *dev, int raws_n)
3698 {
3699         struct mlx5_ibv_shared *sh = ((struct mlx5_priv *)
3700                                         (dev->data->dev_private))->sh;
3701         struct mlx5_devx_mkey_attr mkey_attr;
3702         struct mlx5_counter_stats_mem_mng *mem_mng;
3703         volatile struct flow_counter_stats *raw_data;
3704         int size = (sizeof(struct flow_counter_stats) *
3705                         MLX5_COUNTERS_PER_POOL +
3706                         sizeof(struct mlx5_counter_stats_raw)) * raws_n +
3707                         sizeof(struct mlx5_counter_stats_mem_mng);
3708         uint8_t *mem = rte_calloc(__func__, 1, size, sysconf(_SC_PAGESIZE));
3709         int i;
3710
3711         if (!mem) {
3712                 rte_errno = ENOMEM;
3713                 return NULL;
3714         }
3715         mem_mng = (struct mlx5_counter_stats_mem_mng *)(mem + size) - 1;
3716         size = sizeof(*raw_data) * MLX5_COUNTERS_PER_POOL * raws_n;
3717         mem_mng->umem = mlx5_glue->devx_umem_reg(sh->ctx, mem, size,
3718                                                  IBV_ACCESS_LOCAL_WRITE);
3719         if (!mem_mng->umem) {
3720                 rte_errno = errno;
3721                 rte_free(mem);
3722                 return NULL;
3723         }
3724         mkey_attr.addr = (uintptr_t)mem;
3725         mkey_attr.size = size;
3726         mkey_attr.umem_id = mem_mng->umem->umem_id;
3727         mkey_attr.pd = sh->pdn;
3728         mem_mng->dm = mlx5_devx_cmd_mkey_create(sh->ctx, &mkey_attr);
3729         if (!mem_mng->dm) {
3730                 mlx5_glue->devx_umem_dereg(mem_mng->umem);
3731                 rte_errno = errno;
3732                 rte_free(mem);
3733                 return NULL;
3734         }
3735         mem_mng->raws = (struct mlx5_counter_stats_raw *)(mem + size);
3736         raw_data = (volatile struct flow_counter_stats *)mem;
3737         for (i = 0; i < raws_n; ++i) {
3738                 mem_mng->raws[i].mem_mng = mem_mng;
3739                 mem_mng->raws[i].data = raw_data + i * MLX5_COUNTERS_PER_POOL;
3740         }
3741         LIST_INSERT_HEAD(&sh->cmng.mem_mngs, mem_mng, next);
3742         return mem_mng;
3743 }
3744
3745 /**
3746  * Resize a counter container.
3747  *
3748  * @param[in] dev
3749  *   Pointer to the Ethernet device structure.
3750  * @param[in] batch
3751  *   Whether the pool is for counter that was allocated by batch command.
3752  *
3753  * @return
3754  *   The new container pointer on success, otherwise NULL and rte_errno is set.
3755  */
3756 static struct mlx5_pools_container *
3757 flow_dv_container_resize(struct rte_eth_dev *dev, uint32_t batch)
3758 {
3759         struct mlx5_priv *priv = dev->data->dev_private;
3760         struct mlx5_pools_container *cont =
3761                         MLX5_CNT_CONTAINER(priv->sh, batch, 0);
3762         struct mlx5_pools_container *new_cont =
3763                         MLX5_CNT_CONTAINER_UNUSED(priv->sh, batch, 0);
3764         struct mlx5_counter_stats_mem_mng *mem_mng;
3765         uint32_t resize = cont->n + MLX5_CNT_CONTAINER_RESIZE;
3766         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
3767         int i;
3768
3769         if (cont != MLX5_CNT_CONTAINER(priv->sh, batch, 1)) {
3770                 /* The last resize still hasn't detected by the host thread. */
3771                 rte_errno = EAGAIN;
3772                 return NULL;
3773         }
3774         new_cont->pools = rte_calloc(__func__, 1, mem_size, 0);
3775         if (!new_cont->pools) {
3776                 rte_errno = ENOMEM;
3777                 return NULL;
3778         }
3779         if (cont->n)
3780                 memcpy(new_cont->pools, cont->pools, cont->n *
3781                        sizeof(struct mlx5_flow_counter_pool *));
3782         mem_mng = flow_dv_create_counter_stat_mem_mng(dev,
3783                 MLX5_CNT_CONTAINER_RESIZE + MLX5_MAX_PENDING_QUERIES);
3784         if (!mem_mng) {
3785                 rte_free(new_cont->pools);
3786                 return NULL;
3787         }
3788         for (i = 0; i < MLX5_MAX_PENDING_QUERIES; ++i)
3789                 LIST_INSERT_HEAD(&priv->sh->cmng.free_stat_raws,
3790                                  mem_mng->raws + MLX5_CNT_CONTAINER_RESIZE +
3791                                  i, next);
3792         new_cont->n = resize;
3793         rte_atomic16_set(&new_cont->n_valid, rte_atomic16_read(&cont->n_valid));
3794         TAILQ_INIT(&new_cont->pool_list);
3795         TAILQ_CONCAT(&new_cont->pool_list, &cont->pool_list, next);
3796         new_cont->init_mem_mng = mem_mng;
3797         rte_cio_wmb();
3798          /* Flip the master container. */
3799         priv->sh->cmng.mhi[batch] ^= (uint8_t)1;
3800         return new_cont;
3801 }
3802
3803 /**
3804  * Query a devx flow counter.
3805  *
3806  * @param[in] dev
3807  *   Pointer to the Ethernet device structure.
3808  * @param[in] cnt
3809  *   Pointer to the flow counter.
3810  * @param[out] pkts
3811  *   The statistics value of packets.
3812  * @param[out] bytes
3813  *   The statistics value of bytes.
3814  *
3815  * @return
3816  *   0 on success, otherwise a negative errno value and rte_errno is set.
3817  */
3818 static inline int
3819 _flow_dv_query_count(struct rte_eth_dev *dev,
3820                      struct mlx5_flow_counter *cnt, uint64_t *pkts,
3821                      uint64_t *bytes)
3822 {
3823         struct mlx5_priv *priv = dev->data->dev_private;
3824         struct mlx5_flow_counter_pool *pool =
3825                         flow_dv_counter_pool_get(cnt);
3826         int offset = cnt - &pool->counters_raw[0];
3827
3828         if (priv->counter_fallback)
3829                 return _flow_dv_query_count_fallback(dev, cnt, pkts, bytes);
3830
3831         rte_spinlock_lock(&pool->sl);
3832         /*
3833          * The single counters allocation may allocate smaller ID than the
3834          * current allocated in parallel to the host reading.
3835          * In this case the new counter values must be reported as 0.
3836          */
3837         if (unlikely(!cnt->batch && cnt->dcs->id < pool->raw->min_dcs_id)) {
3838                 *pkts = 0;
3839                 *bytes = 0;
3840         } else {
3841                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
3842                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
3843         }
3844         rte_spinlock_unlock(&pool->sl);
3845         return 0;
3846 }
3847
3848 /**
3849  * Create and initialize a new counter pool.
3850  *
3851  * @param[in] dev
3852  *   Pointer to the Ethernet device structure.
3853  * @param[out] dcs
3854  *   The devX counter handle.
3855  * @param[in] batch
3856  *   Whether the pool is for counter that was allocated by batch command.
3857  *
3858  * @return
3859  *   A new pool pointer on success, NULL otherwise and rte_errno is set.
3860  */
3861 static struct mlx5_flow_counter_pool *
3862 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
3863                     uint32_t batch)
3864 {
3865         struct mlx5_priv *priv = dev->data->dev_private;
3866         struct mlx5_flow_counter_pool *pool;
3867         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
3868                                                                0);
3869         int16_t n_valid = rte_atomic16_read(&cont->n_valid);
3870         uint32_t size;
3871
3872         if (cont->n == n_valid) {
3873                 cont = flow_dv_container_resize(dev, batch);
3874                 if (!cont)
3875                         return NULL;
3876         }
3877         size = sizeof(*pool) + MLX5_COUNTERS_PER_POOL *
3878                         sizeof(struct mlx5_flow_counter);
3879         pool = rte_calloc(__func__, 1, size, 0);
3880         if (!pool) {
3881                 rte_errno = ENOMEM;
3882                 return NULL;
3883         }
3884         pool->min_dcs = dcs;
3885         pool->raw = cont->init_mem_mng->raws + n_valid %
3886                                                      MLX5_CNT_CONTAINER_RESIZE;
3887         pool->raw_hw = NULL;
3888         rte_spinlock_init(&pool->sl);
3889         /*
3890          * The generation of the new allocated counters in this pool is 0, 2 in
3891          * the pool generation makes all the counters valid for allocation.
3892          */
3893         rte_atomic64_set(&pool->query_gen, 0x2);
3894         TAILQ_INIT(&pool->counters);
3895         TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
3896         cont->pools[n_valid] = pool;
3897         /* Pool initialization must be updated before host thread access. */
3898         rte_cio_wmb();
3899         rte_atomic16_add(&cont->n_valid, 1);
3900         return pool;
3901 }
3902
3903 /**
3904  * Prepare a new counter and/or a new counter pool.
3905  *
3906  * @param[in] dev
3907  *   Pointer to the Ethernet device structure.
3908  * @param[out] cnt_free
3909  *   Where to put the pointer of a new counter.
3910  * @param[in] batch
3911  *   Whether the pool is for counter that was allocated by batch command.
3912  *
3913  * @return
3914  *   The free counter pool pointer and @p cnt_free is set on success,
3915  *   NULL otherwise and rte_errno is set.
3916  */
3917 static struct mlx5_flow_counter_pool *
3918 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
3919                              struct mlx5_flow_counter **cnt_free,
3920                              uint32_t batch)
3921 {
3922         struct mlx5_priv *priv = dev->data->dev_private;
3923         struct mlx5_flow_counter_pool *pool;
3924         struct mlx5_devx_obj *dcs = NULL;
3925         struct mlx5_flow_counter *cnt;
3926         uint32_t i;
3927
3928         if (!batch) {
3929                 /* bulk_bitmap must be 0 for single counter allocation. */
3930                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
3931                 if (!dcs)
3932                         return NULL;
3933                 pool = flow_dv_find_pool_by_id
3934                         (MLX5_CNT_CONTAINER(priv->sh, batch, 0), dcs->id);
3935                 if (!pool) {
3936                         pool = flow_dv_pool_create(dev, dcs, batch);
3937                         if (!pool) {
3938                                 mlx5_devx_cmd_destroy(dcs);
3939                                 return NULL;
3940                         }
3941                 } else if (dcs->id < pool->min_dcs->id) {
3942                         rte_atomic64_set(&pool->a64_dcs,
3943                                          (int64_t)(uintptr_t)dcs);
3944                 }
3945                 cnt = &pool->counters_raw[dcs->id % MLX5_COUNTERS_PER_POOL];
3946                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3947                 cnt->dcs = dcs;
3948                 *cnt_free = cnt;
3949                 return pool;
3950         }
3951         /* bulk_bitmap is in 128 counters units. */
3952         if (priv->config.hca_attr.flow_counter_bulk_alloc_bitmap & 0x4)
3953                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
3954         if (!dcs) {
3955                 rte_errno = ENODATA;
3956                 return NULL;
3957         }
3958         pool = flow_dv_pool_create(dev, dcs, batch);
3959         if (!pool) {
3960                 mlx5_devx_cmd_destroy(dcs);
3961                 return NULL;
3962         }
3963         for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3964                 cnt = &pool->counters_raw[i];
3965                 cnt->pool = pool;
3966                 TAILQ_INSERT_HEAD(&pool->counters, cnt, next);
3967         }
3968         *cnt_free = &pool->counters_raw[0];
3969         return pool;
3970 }
3971
3972 /**
3973  * Search for existed shared counter.
3974  *
3975  * @param[in] cont
3976  *   Pointer to the relevant counter pool container.
3977  * @param[in] id
3978  *   The shared counter ID to search.
3979  *
3980  * @return
3981  *   NULL if not existed, otherwise pointer to the shared counter.
3982  */
3983 static struct mlx5_flow_counter *
3984 flow_dv_counter_shared_search(struct mlx5_pools_container *cont,
3985                               uint32_t id)
3986 {
3987         static struct mlx5_flow_counter *cnt;
3988         struct mlx5_flow_counter_pool *pool;
3989         int i;
3990
3991         TAILQ_FOREACH(pool, &cont->pool_list, next) {
3992                 for (i = 0; i < MLX5_COUNTERS_PER_POOL; ++i) {
3993                         cnt = &pool->counters_raw[i];
3994                         if (cnt->ref_cnt && cnt->shared && cnt->id == id)
3995                                 return cnt;
3996                 }
3997         }
3998         return NULL;
3999 }
4000
4001 /**
4002  * Allocate a flow counter.
4003  *
4004  * @param[in] dev
4005  *   Pointer to the Ethernet device structure.
4006  * @param[in] shared
4007  *   Indicate if this counter is shared with other flows.
4008  * @param[in] id
4009  *   Counter identifier.
4010  * @param[in] group
4011  *   Counter flow group.
4012  *
4013  * @return
4014  *   pointer to flow counter on success, NULL otherwise and rte_errno is set.
4015  */
4016 static struct mlx5_flow_counter *
4017 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t shared, uint32_t id,
4018                       uint16_t group)
4019 {
4020         struct mlx5_priv *priv = dev->data->dev_private;
4021         struct mlx5_flow_counter_pool *pool = NULL;
4022         struct mlx5_flow_counter *cnt_free = NULL;
4023         /*
4024          * Currently group 0 flow counter cannot be assigned to a flow if it is
4025          * not the first one in the batch counter allocation, so it is better
4026          * to allocate counters one by one for these flows in a separate
4027          * container.
4028          * A counter can be shared between different groups so need to take
4029          * shared counters from the single container.
4030          */
4031         uint32_t batch = (group && !shared) ? 1 : 0;
4032         struct mlx5_pools_container *cont = MLX5_CNT_CONTAINER(priv->sh, batch,
4033                                                                0);
4034
4035         if (priv->counter_fallback)
4036                 return flow_dv_counter_alloc_fallback(dev, shared, id);
4037         if (!priv->config.devx) {
4038                 rte_errno = ENOTSUP;
4039                 return NULL;
4040         }
4041         if (shared) {
4042                 cnt_free = flow_dv_counter_shared_search(cont, id);
4043                 if (cnt_free) {
4044                         if (cnt_free->ref_cnt + 1 == 0) {
4045                                 rte_errno = E2BIG;
4046                                 return NULL;
4047                         }
4048                         cnt_free->ref_cnt++;
4049                         return cnt_free;
4050                 }
4051         }
4052         /* Pools which has a free counters are in the start. */
4053         TAILQ_FOREACH(pool, &cont->pool_list, next) {
4054                 /*
4055                  * The free counter reset values must be updated between the
4056                  * counter release to the counter allocation, so, at least one
4057                  * query must be done in this time. ensure it by saving the
4058                  * query generation in the release time.
4059                  * The free list is sorted according to the generation - so if
4060                  * the first one is not updated, all the others are not
4061                  * updated too.
4062                  */
4063                 cnt_free = TAILQ_FIRST(&pool->counters);
4064                 if (cnt_free && cnt_free->query_gen + 1 <
4065                     rte_atomic64_read(&pool->query_gen))
4066                         break;
4067                 cnt_free = NULL;
4068         }
4069         if (!cnt_free) {
4070                 pool = flow_dv_counter_pool_prepare(dev, &cnt_free, batch);
4071                 if (!pool)
4072                         return NULL;
4073         }
4074         cnt_free->batch = batch;
4075         /* Create a DV counter action only in the first time usage. */
4076         if (!cnt_free->action) {
4077                 uint16_t offset;
4078                 struct mlx5_devx_obj *dcs;
4079
4080                 if (batch) {
4081                         offset = cnt_free - &pool->counters_raw[0];
4082                         dcs = pool->min_dcs;
4083                 } else {
4084                         offset = 0;
4085                         dcs = cnt_free->dcs;
4086                 }
4087                 cnt_free->action = mlx5_glue->dv_create_flow_action_counter
4088                                         (dcs->obj, offset);
4089                 if (!cnt_free->action) {
4090                         rte_errno = errno;
4091                         return NULL;
4092                 }
4093         }
4094         /* Update the counter reset values. */
4095         if (_flow_dv_query_count(dev, cnt_free, &cnt_free->hits,
4096                                  &cnt_free->bytes))
4097                 return NULL;
4098         cnt_free->shared = shared;
4099         cnt_free->ref_cnt = 1;
4100         cnt_free->id = id;
4101         if (!priv->sh->cmng.query_thread_on)
4102                 /* Start the asynchronous batch query by the host thread. */
4103                 mlx5_set_query_alarm(priv->sh);
4104         TAILQ_REMOVE(&pool->counters, cnt_free, next);
4105         if (TAILQ_EMPTY(&pool->counters)) {
4106                 /* Move the pool to the end of the container pool list. */
4107                 TAILQ_REMOVE(&cont->pool_list, pool, next);
4108                 TAILQ_INSERT_TAIL(&cont->pool_list, pool, next);
4109         }
4110         return cnt_free;
4111 }
4112
4113 /**
4114  * Release a flow counter.
4115  *
4116  * @param[in] dev
4117  *   Pointer to the Ethernet device structure.
4118  * @param[in] counter
4119  *   Pointer to the counter handler.
4120  */
4121 static void
4122 flow_dv_counter_release(struct rte_eth_dev *dev,
4123                         struct mlx5_flow_counter *counter)
4124 {
4125         struct mlx5_priv *priv = dev->data->dev_private;
4126
4127         if (!counter)
4128                 return;
4129         if (priv->counter_fallback) {
4130                 flow_dv_counter_release_fallback(dev, counter);
4131                 return;
4132         }
4133         if (--counter->ref_cnt == 0) {
4134                 struct mlx5_flow_counter_pool *pool =
4135                                 flow_dv_counter_pool_get(counter);
4136
4137                 /* Put the counter in the end - the last updated one. */
4138                 TAILQ_INSERT_TAIL(&pool->counters, counter, next);
4139                 counter->query_gen = rte_atomic64_read(&pool->query_gen);
4140         }
4141 }
4142
4143 /**
4144  * Verify the @p attributes will be correctly understood by the NIC and store
4145  * them in the @p flow if everything is correct.
4146  *
4147  * @param[in] dev
4148  *   Pointer to dev struct.
4149  * @param[in] attributes
4150  *   Pointer to flow attributes
4151  * @param[in] external
4152  *   This flow rule is created by request external to PMD.
4153  * @param[out] error
4154  *   Pointer to error structure.
4155  *
4156  * @return
4157  *   0 on success, a negative errno value otherwise and rte_errno is set.
4158  */
4159 static int
4160 flow_dv_validate_attributes(struct rte_eth_dev *dev,
4161                             const struct rte_flow_attr *attributes,
4162                             bool external __rte_unused,
4163                             struct rte_flow_error *error)
4164 {
4165         struct mlx5_priv *priv = dev->data->dev_private;
4166         uint32_t priority_max = priv->config.flow_prio - 1;
4167
4168 #ifndef HAVE_MLX5DV_DR
4169         if (attributes->group)
4170                 return rte_flow_error_set(error, ENOTSUP,
4171                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
4172                                           NULL,
4173                                           "groups are not supported");
4174 #else
4175         uint32_t max_group = attributes->transfer ?
4176                              MLX5_MAX_TABLES_FDB :
4177                                 external ?
4178                                 MLX5_MAX_TABLES_EXTERNAL :
4179                                 MLX5_MAX_TABLES;
4180         uint32_t table;
4181         int ret;
4182
4183         ret = mlx5_flow_group_to_table(attributes, external,
4184                                        attributes->group,
4185                                        &table, error);
4186         if (ret)
4187                 return ret;
4188         if (table >= max_group)
4189                 return rte_flow_error_set(error, EINVAL,
4190                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP, NULL,
4191                                           "group index out of range");
4192 #endif
4193         if (attributes->priority != MLX5_FLOW_PRIO_RSVD &&
4194             attributes->priority >= priority_max)
4195                 return rte_flow_error_set(error, ENOTSUP,
4196                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
4197                                           NULL,
4198                                           "priority out of range");
4199         if (attributes->transfer) {
4200                 if (!priv->config.dv_esw_en)
4201                         return rte_flow_error_set
4202                                 (error, ENOTSUP,
4203                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4204                                  "E-Switch dr is not supported");
4205                 if (!(priv->representor || priv->master))
4206                         return rte_flow_error_set
4207                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4208                                  NULL, "E-Switch configuration can only be"
4209                                  " done by a master or a representor device");
4210                 if (attributes->egress)
4211                         return rte_flow_error_set
4212                                 (error, ENOTSUP,
4213                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
4214                                  "egress is not supported");
4215         }
4216         if (!(attributes->egress ^ attributes->ingress))
4217                 return rte_flow_error_set(error, ENOTSUP,
4218                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
4219                                           "must specify exactly one of "
4220                                           "ingress or egress");
4221         return 0;
4222 }
4223
4224 /**
4225  * Internal validation function. For validating both actions and items.
4226  *
4227  * @param[in] dev
4228  *   Pointer to the rte_eth_dev structure.
4229  * @param[in] attr
4230  *   Pointer to the flow attributes.
4231  * @param[in] items
4232  *   Pointer to the list of items.
4233  * @param[in] actions
4234  *   Pointer to the list of actions.
4235  * @param[in] external
4236  *   This flow rule is created by request external to PMD.
4237  * @param[out] error
4238  *   Pointer to the error structure.
4239  *
4240  * @return
4241  *   0 on success, a negative errno value otherwise and rte_errno is set.
4242  */
4243 static int
4244 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
4245                  const struct rte_flow_item items[],
4246                  const struct rte_flow_action actions[],
4247                  bool external, struct rte_flow_error *error)
4248 {
4249         int ret;
4250         uint64_t action_flags = 0;
4251         uint64_t item_flags = 0;
4252         uint64_t last_item = 0;
4253         uint8_t next_protocol = 0xff;
4254         uint16_t ether_type = 0;
4255         int actions_n = 0;
4256         const struct rte_flow_item *gre_item = NULL;
4257         struct rte_flow_item_tcp nic_tcp_mask = {
4258                 .hdr = {
4259                         .tcp_flags = 0xFF,
4260                         .src_port = RTE_BE16(UINT16_MAX),
4261                         .dst_port = RTE_BE16(UINT16_MAX),
4262                 }
4263         };
4264         struct mlx5_priv *priv = dev->data->dev_private;
4265         struct mlx5_dev_config *dev_conf = &priv->config;
4266
4267         if (items == NULL)
4268                 return -1;
4269         ret = flow_dv_validate_attributes(dev, attr, external, error);
4270         if (ret < 0)
4271                 return ret;
4272         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4273                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
4274                 int type = items->type;
4275
4276                 switch (type) {
4277                 case RTE_FLOW_ITEM_TYPE_VOID:
4278                         break;
4279                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
4280                         ret = flow_dv_validate_item_port_id
4281                                         (dev, items, attr, item_flags, error);
4282                         if (ret < 0)
4283                                 return ret;
4284                         last_item = MLX5_FLOW_ITEM_PORT_ID;
4285                         break;
4286                 case RTE_FLOW_ITEM_TYPE_ETH:
4287                         ret = mlx5_flow_validate_item_eth(items, item_flags,
4288                                                           error);
4289                         if (ret < 0)
4290                                 return ret;
4291                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
4292                                              MLX5_FLOW_LAYER_OUTER_L2;
4293                         if (items->mask != NULL && items->spec != NULL) {
4294                                 ether_type =
4295                                         ((const struct rte_flow_item_eth *)
4296                                          items->spec)->type;
4297                                 ether_type &=
4298                                         ((const struct rte_flow_item_eth *)
4299                                          items->mask)->type;
4300                                 ether_type = rte_be_to_cpu_16(ether_type);
4301                         } else {
4302                                 ether_type = 0;
4303                         }
4304                         break;
4305                 case RTE_FLOW_ITEM_TYPE_VLAN:
4306                         ret = mlx5_flow_validate_item_vlan(items, item_flags,
4307                                                            dev, error);
4308                         if (ret < 0)
4309                                 return ret;
4310                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
4311                                              MLX5_FLOW_LAYER_OUTER_VLAN;
4312                         if (items->mask != NULL && items->spec != NULL) {
4313                                 ether_type =
4314                                         ((const struct rte_flow_item_vlan *)
4315                                          items->spec)->inner_type;
4316                                 ether_type &=
4317                                         ((const struct rte_flow_item_vlan *)
4318                                          items->mask)->inner_type;
4319                                 ether_type = rte_be_to_cpu_16(ether_type);
4320                         } else {
4321                                 ether_type = 0;
4322                         }
4323                         break;
4324                 case RTE_FLOW_ITEM_TYPE_IPV4:
4325                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4326                                                   &item_flags, &tunnel);
4327                         ret = mlx5_flow_validate_item_ipv4(items, item_flags,
4328                                                            last_item,
4329                                                            ether_type, NULL,
4330                                                            error);
4331                         if (ret < 0)
4332                                 return ret;
4333                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4334                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4335                         if (items->mask != NULL &&
4336                             ((const struct rte_flow_item_ipv4 *)
4337                              items->mask)->hdr.next_proto_id) {
4338                                 next_protocol =
4339                                         ((const struct rte_flow_item_ipv4 *)
4340                                          (items->spec))->hdr.next_proto_id;
4341                                 next_protocol &=
4342                                         ((const struct rte_flow_item_ipv4 *)
4343                                          (items->mask))->hdr.next_proto_id;
4344                         } else {
4345                                 /* Reset for inner layer. */
4346                                 next_protocol = 0xff;
4347                         }
4348                         break;
4349                 case RTE_FLOW_ITEM_TYPE_IPV6:
4350                         mlx5_flow_tunnel_ip_check(items, next_protocol,
4351                                                   &item_flags, &tunnel);
4352                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
4353                                                            last_item,
4354                                                            ether_type, NULL,
4355                                                            error);
4356                         if (ret < 0)
4357                                 return ret;
4358                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4359                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4360                         if (items->mask != NULL &&
4361                             ((const struct rte_flow_item_ipv6 *)
4362                              items->mask)->hdr.proto) {
4363                                 next_protocol =
4364                                         ((const struct rte_flow_item_ipv6 *)
4365                                          items->spec)->hdr.proto;
4366                                 next_protocol &=
4367                                         ((const struct rte_flow_item_ipv6 *)
4368                                          items->mask)->hdr.proto;
4369                         } else {
4370                                 /* Reset for inner layer. */
4371                                 next_protocol = 0xff;
4372                         }
4373                         break;
4374                 case RTE_FLOW_ITEM_TYPE_TCP:
4375                         ret = mlx5_flow_validate_item_tcp
4376                                                 (items, item_flags,
4377                                                  next_protocol,
4378                                                  &nic_tcp_mask,
4379                                                  error);
4380                         if (ret < 0)
4381                                 return ret;
4382                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
4383                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
4384                         break;
4385                 case RTE_FLOW_ITEM_TYPE_UDP:
4386                         ret = mlx5_flow_validate_item_udp(items, item_flags,
4387                                                           next_protocol,
4388                                                           error);
4389                         if (ret < 0)
4390                                 return ret;
4391                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
4392                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
4393                         break;
4394                 case RTE_FLOW_ITEM_TYPE_GRE:
4395                         ret = mlx5_flow_validate_item_gre(items, item_flags,
4396                                                           next_protocol, error);
4397                         if (ret < 0)
4398                                 return ret;
4399                         gre_item = items;
4400                         last_item = MLX5_FLOW_LAYER_GRE;
4401                         break;
4402                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4403                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
4404                                                             next_protocol,
4405                                                             error);
4406                         if (ret < 0)
4407                                 return ret;
4408                         last_item = MLX5_FLOW_LAYER_NVGRE;
4409                         break;
4410                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
4411                         ret = mlx5_flow_validate_item_gre_key
4412                                 (items, item_flags, gre_item, error);
4413                         if (ret < 0)
4414                                 return ret;
4415                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
4416                         break;
4417                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4418                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
4419                                                             error);
4420                         if (ret < 0)
4421                                 return ret;
4422                         last_item = MLX5_FLOW_LAYER_VXLAN;
4423                         break;
4424                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4425                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
4426                                                                 item_flags, dev,
4427                                                                 error);
4428                         if (ret < 0)
4429                                 return ret;
4430                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4431                         break;
4432                 case RTE_FLOW_ITEM_TYPE_GENEVE:
4433                         ret = mlx5_flow_validate_item_geneve(items,
4434                                                              item_flags, dev,
4435                                                              error);
4436                         if (ret < 0)
4437                                 return ret;
4438                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
4439                         break;
4440                 case RTE_FLOW_ITEM_TYPE_MPLS:
4441                         ret = mlx5_flow_validate_item_mpls(dev, items,
4442                                                            item_flags,
4443                                                            last_item, error);
4444                         if (ret < 0)
4445                                 return ret;
4446                         last_item = MLX5_FLOW_LAYER_MPLS;
4447                         break;
4448
4449                 case RTE_FLOW_ITEM_TYPE_MARK:
4450                         ret = flow_dv_validate_item_mark(dev, items, attr,
4451                                                          error);
4452                         if (ret < 0)
4453                                 return ret;
4454                         last_item = MLX5_FLOW_ITEM_MARK;
4455                         break;
4456                 case RTE_FLOW_ITEM_TYPE_META:
4457                         ret = flow_dv_validate_item_meta(dev, items, attr,
4458                                                          error);
4459                         if (ret < 0)
4460                                 return ret;
4461                         last_item = MLX5_FLOW_ITEM_METADATA;
4462                         break;
4463                 case RTE_FLOW_ITEM_TYPE_ICMP:
4464                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
4465                                                            next_protocol,
4466                                                            error);
4467                         if (ret < 0)
4468                                 return ret;
4469                         last_item = MLX5_FLOW_LAYER_ICMP;
4470                         break;
4471                 case RTE_FLOW_ITEM_TYPE_ICMP6:
4472                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
4473                                                             next_protocol,
4474                                                             error);
4475                         if (ret < 0)
4476                                 return ret;
4477                         last_item = MLX5_FLOW_LAYER_ICMP6;
4478                         break;
4479                 case RTE_FLOW_ITEM_TYPE_TAG:
4480                         ret = flow_dv_validate_item_tag(dev, items,
4481                                                         attr, error);
4482                         if (ret < 0)
4483                                 return ret;
4484                         last_item = MLX5_FLOW_ITEM_TAG;
4485                         break;
4486                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
4487                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
4488                         break;
4489                 default:
4490                         return rte_flow_error_set(error, ENOTSUP,
4491                                                   RTE_FLOW_ERROR_TYPE_ITEM,
4492                                                   NULL, "item not supported");
4493                 }
4494                 item_flags |= last_item;
4495         }
4496         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
4497                 int type = actions->type;
4498                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
4499                         return rte_flow_error_set(error, ENOTSUP,
4500                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4501                                                   actions, "too many actions");
4502                 switch (type) {
4503                 case RTE_FLOW_ACTION_TYPE_VOID:
4504                         break;
4505                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
4506                         ret = flow_dv_validate_action_port_id(dev,
4507                                                               action_flags,
4508                                                               actions,
4509                                                               attr,
4510                                                               error);
4511                         if (ret)
4512                                 return ret;
4513                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
4514                         ++actions_n;
4515                         break;
4516                 case RTE_FLOW_ACTION_TYPE_FLAG:
4517                         ret = flow_dv_validate_action_flag(dev, action_flags,
4518                                                            attr, error);
4519                         if (ret < 0)
4520                                 return ret;
4521                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4522                                 /* Count all modify-header actions as one. */
4523                                 if (!(action_flags &
4524                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4525                                         ++actions_n;
4526                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
4527                                                 MLX5_FLOW_ACTION_MARK_EXT;
4528                         } else {
4529                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
4530                                 ++actions_n;
4531                         }
4532                         break;
4533                 case RTE_FLOW_ACTION_TYPE_MARK:
4534                         ret = flow_dv_validate_action_mark(dev, actions,
4535                                                            action_flags,
4536                                                            attr, error);
4537                         if (ret < 0)
4538                                 return ret;
4539                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
4540                                 /* Count all modify-header actions as one. */
4541                                 if (!(action_flags &
4542                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
4543                                         ++actions_n;
4544                                 action_flags |= MLX5_FLOW_ACTION_MARK |
4545                                                 MLX5_FLOW_ACTION_MARK_EXT;
4546                         } else {
4547                                 action_flags |= MLX5_FLOW_ACTION_MARK;
4548                                 ++actions_n;
4549                         }
4550                         break;
4551                 case RTE_FLOW_ACTION_TYPE_SET_META:
4552                         ret = flow_dv_validate_action_set_meta(dev, actions,
4553                                                                action_flags,
4554                                                                attr, error);
4555                         if (ret < 0)
4556                                 return ret;
4557                         /* Count all modify-header actions as one action. */
4558                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4559                                 ++actions_n;
4560                         action_flags |= MLX5_FLOW_ACTION_SET_META;
4561                         break;
4562                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
4563                         ret = flow_dv_validate_action_set_tag(dev, actions,
4564                                                               action_flags,
4565                                                               attr, error);
4566                         if (ret < 0)
4567                                 return ret;
4568                         /* Count all modify-header actions as one action. */
4569                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4570                                 ++actions_n;
4571                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
4572                         break;
4573                 case RTE_FLOW_ACTION_TYPE_DROP:
4574                         ret = mlx5_flow_validate_action_drop(action_flags,
4575                                                              attr, error);
4576                         if (ret < 0)
4577                                 return ret;
4578                         action_flags |= MLX5_FLOW_ACTION_DROP;
4579                         ++actions_n;
4580                         break;
4581                 case RTE_FLOW_ACTION_TYPE_QUEUE:
4582                         ret = mlx5_flow_validate_action_queue(actions,
4583                                                               action_flags, dev,
4584                                                               attr, error);
4585                         if (ret < 0)
4586                                 return ret;
4587                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
4588                         ++actions_n;
4589                         break;
4590                 case RTE_FLOW_ACTION_TYPE_RSS:
4591                         ret = mlx5_flow_validate_action_rss(actions,
4592                                                             action_flags, dev,
4593                                                             attr, item_flags,
4594                                                             error);
4595                         if (ret < 0)
4596                                 return ret;
4597                         action_flags |= MLX5_FLOW_ACTION_RSS;
4598                         ++actions_n;
4599                         break;
4600                 case RTE_FLOW_ACTION_TYPE_COUNT:
4601                         ret = flow_dv_validate_action_count(dev, error);
4602                         if (ret < 0)
4603                                 return ret;
4604                         action_flags |= MLX5_FLOW_ACTION_COUNT;
4605                         ++actions_n;
4606                         break;
4607                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
4608                         if (flow_dv_validate_action_pop_vlan(dev,
4609                                                              action_flags,
4610                                                              actions,
4611                                                              item_flags, attr,
4612                                                              error))
4613                                 return -rte_errno;
4614                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
4615                         ++actions_n;
4616                         break;
4617                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
4618                         ret = flow_dv_validate_action_push_vlan(action_flags,
4619                                                                 item_flags,
4620                                                                 actions, attr,
4621                                                                 error);
4622                         if (ret < 0)
4623                                 return ret;
4624                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
4625                         ++actions_n;
4626                         break;
4627                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
4628                         ret = flow_dv_validate_action_set_vlan_pcp
4629                                                 (action_flags, actions, error);
4630                         if (ret < 0)
4631                                 return ret;
4632                         /* Count PCP with push_vlan command. */
4633                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
4634                         break;
4635                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
4636                         ret = flow_dv_validate_action_set_vlan_vid
4637                                                 (item_flags, action_flags,
4638                                                  actions, error);
4639                         if (ret < 0)
4640                                 return ret;
4641                         /* Count VID with push_vlan command. */
4642                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
4643                         break;
4644                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
4645                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
4646                         ret = flow_dv_validate_action_l2_encap(action_flags,
4647                                                                actions, attr,
4648                                                                error);
4649                         if (ret < 0)
4650                                 return ret;
4651                         action_flags |= actions->type ==
4652                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
4653                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
4654                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
4655                         ++actions_n;
4656                         break;
4657                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
4658                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
4659                         ret = flow_dv_validate_action_l2_decap(action_flags,
4660                                                                attr, error);
4661                         if (ret < 0)
4662                                 return ret;
4663                         action_flags |= actions->type ==
4664                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
4665                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
4666                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
4667                         ++actions_n;
4668                         break;
4669                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
4670                         ret = flow_dv_validate_action_raw_encap(action_flags,
4671                                                                 actions, attr,
4672                                                                 error);
4673                         if (ret < 0)
4674                                 return ret;
4675                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
4676                         ++actions_n;
4677                         break;
4678                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
4679                         ret = flow_dv_validate_action_raw_decap(action_flags,
4680                                                                 actions, attr,
4681                                                                 error);
4682                         if (ret < 0)
4683                                 return ret;
4684                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
4685                         ++actions_n;
4686                         break;
4687                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
4688                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
4689                         ret = flow_dv_validate_action_modify_mac(action_flags,
4690                                                                  actions,
4691                                                                  item_flags,
4692                                                                  error);
4693                         if (ret < 0)
4694                                 return ret;
4695                         /* Count all modify-header actions as one action. */
4696                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4697                                 ++actions_n;
4698                         action_flags |= actions->type ==
4699                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
4700                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
4701                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
4702                         break;
4703
4704                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
4705                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
4706                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
4707                                                                   actions,
4708                                                                   item_flags,
4709                                                                   error);
4710                         if (ret < 0)
4711                                 return ret;
4712                         /* Count all modify-header actions as one action. */
4713                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4714                                 ++actions_n;
4715                         action_flags |= actions->type ==
4716                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
4717                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
4718                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
4719                         break;
4720                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
4721                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
4722                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
4723                                                                   actions,
4724                                                                   item_flags,
4725                                                                   error);
4726                         if (ret < 0)
4727                                 return ret;
4728                         /* Count all modify-header actions as one action. */
4729                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4730                                 ++actions_n;
4731                         action_flags |= actions->type ==
4732                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
4733                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
4734                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
4735                         break;
4736                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
4737                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
4738                         ret = flow_dv_validate_action_modify_tp(action_flags,
4739                                                                 actions,
4740                                                                 item_flags,
4741                                                                 error);
4742                         if (ret < 0)
4743                                 return ret;
4744                         /* Count all modify-header actions as one action. */
4745                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4746                                 ++actions_n;
4747                         action_flags |= actions->type ==
4748                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
4749                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
4750                                                 MLX5_FLOW_ACTION_SET_TP_DST;
4751                         break;
4752                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
4753                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
4754                         ret = flow_dv_validate_action_modify_ttl(action_flags,
4755                                                                  actions,
4756                                                                  item_flags,
4757                                                                  error);
4758                         if (ret < 0)
4759                                 return ret;
4760                         /* Count all modify-header actions as one action. */
4761                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4762                                 ++actions_n;
4763                         action_flags |= actions->type ==
4764                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
4765                                                 MLX5_FLOW_ACTION_SET_TTL :
4766                                                 MLX5_FLOW_ACTION_DEC_TTL;
4767                         break;
4768                 case RTE_FLOW_ACTION_TYPE_JUMP:
4769                         ret = flow_dv_validate_action_jump(actions,
4770                                                            action_flags,
4771                                                            attr, external,
4772                                                            error);
4773                         if (ret)
4774                                 return ret;
4775                         ++actions_n;
4776                         action_flags |= MLX5_FLOW_ACTION_JUMP;
4777                         break;
4778                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
4779                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
4780                         ret = flow_dv_validate_action_modify_tcp_seq
4781                                                                 (action_flags,
4782                                                                  actions,
4783                                                                  item_flags,
4784                                                                  error);
4785                         if (ret < 0)
4786                                 return ret;
4787                         /* Count all modify-header actions as one action. */
4788                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4789                                 ++actions_n;
4790                         action_flags |= actions->type ==
4791                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
4792                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
4793                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
4794                         break;
4795                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
4796                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
4797                         ret = flow_dv_validate_action_modify_tcp_ack
4798                                                                 (action_flags,
4799                                                                  actions,
4800                                                                  item_flags,
4801                                                                  error);
4802                         if (ret < 0)
4803                                 return ret;
4804                         /* Count all modify-header actions as one action. */
4805                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
4806                                 ++actions_n;
4807                         action_flags |= actions->type ==
4808                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
4809                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
4810                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
4811                         break;
4812                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
4813                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
4814                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
4815                         break;
4816                 case RTE_FLOW_ACTION_TYPE_METER:
4817                         ret = mlx5_flow_validate_action_meter(dev,
4818                                                               action_flags,
4819                                                               actions, attr,
4820                                                               error);
4821                         if (ret < 0)
4822                                 return ret;
4823                         action_flags |= MLX5_FLOW_ACTION_METER;
4824                         ++actions_n;
4825                         break;
4826                 default:
4827                         return rte_flow_error_set(error, ENOTSUP,
4828                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4829                                                   actions,
4830                                                   "action not supported");
4831                 }
4832         }
4833         if ((action_flags & MLX5_FLOW_LAYER_TUNNEL) &&
4834             (action_flags & MLX5_FLOW_VLAN_ACTIONS))
4835                 return rte_flow_error_set(error, ENOTSUP,
4836                                           RTE_FLOW_ERROR_TYPE_ACTION,
4837                                           actions,
4838                                           "can't have vxlan and vlan"
4839                                           " actions in the same rule");
4840         /* Eswitch has few restrictions on using items and actions */
4841         if (attr->transfer) {
4842                 if (!mlx5_flow_ext_mreg_supported(dev) &&
4843                     action_flags & MLX5_FLOW_ACTION_FLAG)
4844                         return rte_flow_error_set(error, ENOTSUP,
4845                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4846                                                   NULL,
4847                                                   "unsupported action FLAG");
4848                 if (!mlx5_flow_ext_mreg_supported(dev) &&
4849                     action_flags & MLX5_FLOW_ACTION_MARK)
4850                         return rte_flow_error_set(error, ENOTSUP,
4851                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4852                                                   NULL,
4853                                                   "unsupported action MARK");
4854                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
4855                         return rte_flow_error_set(error, ENOTSUP,
4856                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4857                                                   NULL,
4858                                                   "unsupported action QUEUE");
4859                 if (action_flags & MLX5_FLOW_ACTION_RSS)
4860                         return rte_flow_error_set(error, ENOTSUP,
4861                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4862                                                   NULL,
4863                                                   "unsupported action RSS");
4864                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4865                         return rte_flow_error_set(error, EINVAL,
4866                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4867                                                   actions,
4868                                                   "no fate action is found");
4869         } else {
4870                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
4871                         return rte_flow_error_set(error, EINVAL,
4872                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4873                                                   actions,
4874                                                   "no fate action is found");
4875         }
4876         return 0;
4877 }
4878
4879 /**
4880  * Internal preparation function. Allocates the DV flow size,
4881  * this size is constant.
4882  *
4883  * @param[in] attr
4884  *   Pointer to the flow attributes.
4885  * @param[in] items
4886  *   Pointer to the list of items.
4887  * @param[in] actions
4888  *   Pointer to the list of actions.
4889  * @param[out] error
4890  *   Pointer to the error structure.
4891  *
4892  * @return
4893  *   Pointer to mlx5_flow object on success,
4894  *   otherwise NULL and rte_errno is set.
4895  */
4896 static struct mlx5_flow *
4897 flow_dv_prepare(const struct rte_flow_attr *attr __rte_unused,
4898                 const struct rte_flow_item items[] __rte_unused,
4899                 const struct rte_flow_action actions[] __rte_unused,
4900                 struct rte_flow_error *error)
4901 {
4902         size_t size = sizeof(struct mlx5_flow);
4903         struct mlx5_flow *dev_flow;
4904
4905         dev_flow = rte_calloc(__func__, 1, size, 0);
4906         if (!dev_flow) {
4907                 rte_flow_error_set(error, ENOMEM,
4908                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4909                                    "not enough memory to create flow");
4910                 return NULL;
4911         }
4912         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
4913         dev_flow->ingress = attr->ingress;
4914         dev_flow->transfer = attr->transfer;
4915         return dev_flow;
4916 }
4917
4918 #ifndef NDEBUG
4919 /**
4920  * Sanity check for match mask and value. Similar to check_valid_spec() in
4921  * kernel driver. If unmasked bit is present in value, it returns failure.
4922  *
4923  * @param match_mask
4924  *   pointer to match mask buffer.
4925  * @param match_value
4926  *   pointer to match value buffer.
4927  *
4928  * @return
4929  *   0 if valid, -EINVAL otherwise.
4930  */
4931 static int
4932 flow_dv_check_valid_spec(void *match_mask, void *match_value)
4933 {
4934         uint8_t *m = match_mask;
4935         uint8_t *v = match_value;
4936         unsigned int i;
4937
4938         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
4939                 if (v[i] & ~m[i]) {
4940                         DRV_LOG(ERR,
4941                                 "match_value differs from match_criteria"
4942                                 " %p[%u] != %p[%u]",
4943                                 match_value, i, match_mask, i);
4944                         return -EINVAL;
4945                 }
4946         }
4947         return 0;
4948 }
4949 #endif
4950
4951 /**
4952  * Add Ethernet item to matcher and to the value.
4953  *
4954  * @param[in, out] matcher
4955  *   Flow matcher.
4956  * @param[in, out] key
4957  *   Flow matcher value.
4958  * @param[in] item
4959  *   Flow pattern to translate.
4960  * @param[in] inner
4961  *   Item is inner pattern.
4962  */
4963 static void
4964 flow_dv_translate_item_eth(void *matcher, void *key,
4965                            const struct rte_flow_item *item, int inner)
4966 {
4967         const struct rte_flow_item_eth *eth_m = item->mask;
4968         const struct rte_flow_item_eth *eth_v = item->spec;
4969         const struct rte_flow_item_eth nic_mask = {
4970                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
4971                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
4972                 .type = RTE_BE16(0xffff),
4973         };
4974         void *headers_m;
4975         void *headers_v;
4976         char *l24_v;
4977         unsigned int i;
4978
4979         if (!eth_v)
4980                 return;
4981         if (!eth_m)
4982                 eth_m = &nic_mask;
4983         if (inner) {
4984                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4985                                          inner_headers);
4986                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
4987         } else {
4988                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
4989                                          outer_headers);
4990                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
4991         }
4992         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, dmac_47_16),
4993                &eth_m->dst, sizeof(eth_m->dst));
4994         /* The value must be in the range of the mask. */
4995         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, dmac_47_16);
4996         for (i = 0; i < sizeof(eth_m->dst); ++i)
4997                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
4998         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m, smac_47_16),
4999                &eth_m->src, sizeof(eth_m->src));
5000         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, smac_47_16);
5001         /* The value must be in the range of the mask. */
5002         for (i = 0; i < sizeof(eth_m->dst); ++i)
5003                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
5004         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5005                  rte_be_to_cpu_16(eth_m->type));
5006         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v, ethertype);
5007         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
5008 }
5009
5010 /**
5011  * Add VLAN item to matcher and to the value.
5012  *
5013  * @param[in, out] dev_flow
5014  *   Flow descriptor.
5015  * @param[in, out] matcher
5016  *   Flow matcher.
5017  * @param[in, out] key
5018  *   Flow matcher value.
5019  * @param[in] item
5020  *   Flow pattern to translate.
5021  * @param[in] inner
5022  *   Item is inner pattern.
5023  */
5024 static void
5025 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
5026                             void *matcher, void *key,
5027                             const struct rte_flow_item *item,
5028                             int inner)
5029 {
5030         const struct rte_flow_item_vlan *vlan_m = item->mask;
5031         const struct rte_flow_item_vlan *vlan_v = item->spec;
5032         void *headers_m;
5033         void *headers_v;
5034         uint16_t tci_m;
5035         uint16_t tci_v;
5036
5037         if (!vlan_v)
5038                 return;
5039         if (!vlan_m)
5040                 vlan_m = &rte_flow_item_vlan_mask;
5041         if (inner) {
5042                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5043                                          inner_headers);
5044                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5045         } else {
5046                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5047                                          outer_headers);
5048                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5049                 /*
5050                  * This is workaround, masks are not supported,
5051                  * and pre-validated.
5052                  */
5053                 dev_flow->dv.vf_vlan.tag =
5054                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
5055         }
5056         tci_m = rte_be_to_cpu_16(vlan_m->tci);
5057         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
5058         MLX5_SET(fte_match_set_lyr_2_4, headers_m, cvlan_tag, 1);
5059         MLX5_SET(fte_match_set_lyr_2_4, headers_v, cvlan_tag, 1);
5060         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_vid, tci_m);
5061         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_vid, tci_v);
5062         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_cfi, tci_m >> 12);
5063         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_cfi, tci_v >> 12);
5064         MLX5_SET(fte_match_set_lyr_2_4, headers_m, first_prio, tci_m >> 13);
5065         MLX5_SET(fte_match_set_lyr_2_4, headers_v, first_prio, tci_v >> 13);
5066         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype,
5067                  rte_be_to_cpu_16(vlan_m->inner_type));
5068         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype,
5069                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
5070 }
5071
5072 /**
5073  * Add IPV4 item to matcher and to the value.
5074  *
5075  * @param[in, out] matcher
5076  *   Flow matcher.
5077  * @param[in, out] key
5078  *   Flow matcher value.
5079  * @param[in] item
5080  *   Flow pattern to translate.
5081  * @param[in] inner
5082  *   Item is inner pattern.
5083  * @param[in] group
5084  *   The group to insert the rule.
5085  */
5086 static void
5087 flow_dv_translate_item_ipv4(void *matcher, void *key,
5088                             const struct rte_flow_item *item,
5089                             int inner, uint32_t group)
5090 {
5091         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
5092         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
5093         const struct rte_flow_item_ipv4 nic_mask = {
5094                 .hdr = {
5095                         .src_addr = RTE_BE32(0xffffffff),
5096                         .dst_addr = RTE_BE32(0xffffffff),
5097                         .type_of_service = 0xff,
5098                         .next_proto_id = 0xff,
5099                 },
5100         };
5101         void *headers_m;
5102         void *headers_v;
5103         char *l24_m;
5104         char *l24_v;
5105         uint8_t tos;
5106
5107         if (inner) {
5108                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5109                                          inner_headers);
5110                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5111         } else {
5112                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5113                                          outer_headers);
5114                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5115         }
5116         if (group == 0)
5117                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5118         else
5119                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x4);
5120         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 4);
5121         if (!ipv4_v)
5122                 return;
5123         if (!ipv4_m)
5124                 ipv4_m = &nic_mask;
5125         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5126                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5127         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5128                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
5129         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
5130         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
5131         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5132                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5133         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5134                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
5135         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
5136         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
5137         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
5138         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
5139                  ipv4_m->hdr.type_of_service);
5140         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
5141         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
5142                  ipv4_m->hdr.type_of_service >> 2);
5143         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
5144         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5145                  ipv4_m->hdr.next_proto_id);
5146         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5147                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
5148 }
5149
5150 /**
5151  * Add IPV6 item to matcher and to the value.
5152  *
5153  * @param[in, out] matcher
5154  *   Flow matcher.
5155  * @param[in, out] key
5156  *   Flow matcher value.
5157  * @param[in] item
5158  *   Flow pattern to translate.
5159  * @param[in] inner
5160  *   Item is inner pattern.
5161  * @param[in] group
5162  *   The group to insert the rule.
5163  */
5164 static void
5165 flow_dv_translate_item_ipv6(void *matcher, void *key,
5166                             const struct rte_flow_item *item,
5167                             int inner, uint32_t group)
5168 {
5169         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
5170         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
5171         const struct rte_flow_item_ipv6 nic_mask = {
5172                 .hdr = {
5173                         .src_addr =
5174                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5175                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5176                         .dst_addr =
5177                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
5178                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
5179                         .vtc_flow = RTE_BE32(0xffffffff),
5180                         .proto = 0xff,
5181                         .hop_limits = 0xff,
5182                 },
5183         };
5184         void *headers_m;
5185         void *headers_v;
5186         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5187         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5188         char *l24_m;
5189         char *l24_v;
5190         uint32_t vtc_m;
5191         uint32_t vtc_v;
5192         int i;
5193         int size;
5194
5195         if (inner) {
5196                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5197                                          inner_headers);
5198                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5199         } else {
5200                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5201                                          outer_headers);
5202                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5203         }
5204         if (group == 0)
5205                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
5206         else
5207                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0x6);
5208         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, 6);
5209         if (!ipv6_v)
5210                 return;
5211         if (!ipv6_m)
5212                 ipv6_m = &nic_mask;
5213         size = sizeof(ipv6_m->hdr.dst_addr);
5214         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5215                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5216         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5217                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
5218         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
5219         for (i = 0; i < size; ++i)
5220                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
5221         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
5222                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5223         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
5224                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
5225         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
5226         for (i = 0; i < size; ++i)
5227                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
5228         /* TOS. */
5229         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
5230         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
5231         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
5232         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
5233         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
5234         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
5235         /* Label. */
5236         if (inner) {
5237                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
5238                          vtc_m);
5239                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
5240                          vtc_v);
5241         } else {
5242                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
5243                          vtc_m);
5244                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
5245                          vtc_v);
5246         }
5247         /* Protocol. */
5248         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
5249                  ipv6_m->hdr.proto);
5250         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5251                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
5252 }
5253
5254 /**
5255  * Add TCP item to matcher and to the value.
5256  *
5257  * @param[in, out] matcher
5258  *   Flow matcher.
5259  * @param[in, out] key
5260  *   Flow matcher value.
5261  * @param[in] item
5262  *   Flow pattern to translate.
5263  * @param[in] inner
5264  *   Item is inner pattern.
5265  */
5266 static void
5267 flow_dv_translate_item_tcp(void *matcher, void *key,
5268                            const struct rte_flow_item *item,
5269                            int inner)
5270 {
5271         const struct rte_flow_item_tcp *tcp_m = item->mask;
5272         const struct rte_flow_item_tcp *tcp_v = item->spec;
5273         void *headers_m;
5274         void *headers_v;
5275
5276         if (inner) {
5277                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5278                                          inner_headers);
5279                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5280         } else {
5281                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5282                                          outer_headers);
5283                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5284         }
5285         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5286         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
5287         if (!tcp_v)
5288                 return;
5289         if (!tcp_m)
5290                 tcp_m = &rte_flow_item_tcp_mask;
5291         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
5292                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
5293         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
5294                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
5295         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
5296                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
5297         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
5298                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
5299         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
5300                  tcp_m->hdr.tcp_flags);
5301         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
5302                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
5303 }
5304
5305 /**
5306  * Add UDP item to matcher and to the value.
5307  *
5308  * @param[in, out] matcher
5309  *   Flow matcher.
5310  * @param[in, out] key
5311  *   Flow matcher value.
5312  * @param[in] item
5313  *   Flow pattern to translate.
5314  * @param[in] inner
5315  *   Item is inner pattern.
5316  */
5317 static void
5318 flow_dv_translate_item_udp(void *matcher, void *key,
5319                            const struct rte_flow_item *item,
5320                            int inner)
5321 {
5322         const struct rte_flow_item_udp *udp_m = item->mask;
5323         const struct rte_flow_item_udp *udp_v = item->spec;
5324         void *headers_m;
5325         void *headers_v;
5326
5327         if (inner) {
5328                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5329                                          inner_headers);
5330                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5331         } else {
5332                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5333                                          outer_headers);
5334                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5335         }
5336         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5337         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
5338         if (!udp_v)
5339                 return;
5340         if (!udp_m)
5341                 udp_m = &rte_flow_item_udp_mask;
5342         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
5343                  rte_be_to_cpu_16(udp_m->hdr.src_port));
5344         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
5345                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
5346         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
5347                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
5348         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5349                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
5350 }
5351
5352 /**
5353  * Add GRE optional Key item to matcher and to the value.
5354  *
5355  * @param[in, out] matcher
5356  *   Flow matcher.
5357  * @param[in, out] key
5358  *   Flow matcher value.
5359  * @param[in] item
5360  *   Flow pattern to translate.
5361  * @param[in] inner
5362  *   Item is inner pattern.
5363  */
5364 static void
5365 flow_dv_translate_item_gre_key(void *matcher, void *key,
5366                                    const struct rte_flow_item *item)
5367 {
5368         const rte_be32_t *key_m = item->mask;
5369         const rte_be32_t *key_v = item->spec;
5370         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5371         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5372         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
5373
5374         if (!key_v)
5375                 return;
5376         if (!key_m)
5377                 key_m = &gre_key_default_mask;
5378         /* GRE K bit must be on and should already be validated */
5379         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
5380         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
5381         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
5382                  rte_be_to_cpu_32(*key_m) >> 8);
5383         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
5384                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
5385         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
5386                  rte_be_to_cpu_32(*key_m) & 0xFF);
5387         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
5388                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
5389 }
5390
5391 /**
5392  * Add GRE item to matcher and to the value.
5393  *
5394  * @param[in, out] matcher
5395  *   Flow matcher.
5396  * @param[in, out] key
5397  *   Flow matcher value.
5398  * @param[in] item
5399  *   Flow pattern to translate.
5400  * @param[in] inner
5401  *   Item is inner pattern.
5402  */
5403 static void
5404 flow_dv_translate_item_gre(void *matcher, void *key,
5405                            const struct rte_flow_item *item,
5406                            int inner)
5407 {
5408         const struct rte_flow_item_gre *gre_m = item->mask;
5409         const struct rte_flow_item_gre *gre_v = item->spec;
5410         void *headers_m;
5411         void *headers_v;
5412         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5413         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5414         struct {
5415                 union {
5416                         __extension__
5417                         struct {
5418                                 uint16_t version:3;
5419                                 uint16_t rsvd0:9;
5420                                 uint16_t s_present:1;
5421                                 uint16_t k_present:1;
5422                                 uint16_t rsvd_bit1:1;
5423                                 uint16_t c_present:1;
5424                         };
5425                         uint16_t value;
5426                 };
5427         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
5428
5429         if (inner) {
5430                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5431                                          inner_headers);
5432                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5433         } else {
5434                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5435                                          outer_headers);
5436                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5437         }
5438         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5439         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
5440         if (!gre_v)
5441                 return;
5442         if (!gre_m)
5443                 gre_m = &rte_flow_item_gre_mask;
5444         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
5445                  rte_be_to_cpu_16(gre_m->protocol));
5446         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5447                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
5448         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
5449         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
5450         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
5451                  gre_crks_rsvd0_ver_m.c_present);
5452         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
5453                  gre_crks_rsvd0_ver_v.c_present &
5454                  gre_crks_rsvd0_ver_m.c_present);
5455         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
5456                  gre_crks_rsvd0_ver_m.k_present);
5457         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
5458                  gre_crks_rsvd0_ver_v.k_present &
5459                  gre_crks_rsvd0_ver_m.k_present);
5460         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
5461                  gre_crks_rsvd0_ver_m.s_present);
5462         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
5463                  gre_crks_rsvd0_ver_v.s_present &
5464                  gre_crks_rsvd0_ver_m.s_present);
5465 }
5466
5467 /**
5468  * Add NVGRE item to matcher and to the value.
5469  *
5470  * @param[in, out] matcher
5471  *   Flow matcher.
5472  * @param[in, out] key
5473  *   Flow matcher value.
5474  * @param[in] item
5475  *   Flow pattern to translate.
5476  * @param[in] inner
5477  *   Item is inner pattern.
5478  */
5479 static void
5480 flow_dv_translate_item_nvgre(void *matcher, void *key,
5481                              const struct rte_flow_item *item,
5482                              int inner)
5483 {
5484         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
5485         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
5486         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5487         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5488         const char *tni_flow_id_m = (const char *)nvgre_m->tni;
5489         const char *tni_flow_id_v = (const char *)nvgre_v->tni;
5490         char *gre_key_m;
5491         char *gre_key_v;
5492         int size;
5493         int i;
5494
5495         /* For NVGRE, GRE header fields must be set with defined values. */
5496         const struct rte_flow_item_gre gre_spec = {
5497                 .c_rsvd0_ver = RTE_BE16(0x2000),
5498                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
5499         };
5500         const struct rte_flow_item_gre gre_mask = {
5501                 .c_rsvd0_ver = RTE_BE16(0xB000),
5502                 .protocol = RTE_BE16(UINT16_MAX),
5503         };
5504         const struct rte_flow_item gre_item = {
5505                 .spec = &gre_spec,
5506                 .mask = &gre_mask,
5507                 .last = NULL,
5508         };
5509         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
5510         if (!nvgre_v)
5511                 return;
5512         if (!nvgre_m)
5513                 nvgre_m = &rte_flow_item_nvgre_mask;
5514         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
5515         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
5516         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
5517         memcpy(gre_key_m, tni_flow_id_m, size);
5518         for (i = 0; i < size; ++i)
5519                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
5520 }
5521
5522 /**
5523  * Add VXLAN item to matcher and to the value.
5524  *
5525  * @param[in, out] matcher
5526  *   Flow matcher.
5527  * @param[in, out] key
5528  *   Flow matcher value.
5529  * @param[in] item
5530  *   Flow pattern to translate.
5531  * @param[in] inner
5532  *   Item is inner pattern.
5533  */
5534 static void
5535 flow_dv_translate_item_vxlan(void *matcher, void *key,
5536                              const struct rte_flow_item *item,
5537                              int inner)
5538 {
5539         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
5540         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
5541         void *headers_m;
5542         void *headers_v;
5543         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5544         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5545         char *vni_m;
5546         char *vni_v;
5547         uint16_t dport;
5548         int size;
5549         int i;
5550
5551         if (inner) {
5552                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5553                                          inner_headers);
5554                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5555         } else {
5556                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5557                                          outer_headers);
5558                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5559         }
5560         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
5561                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
5562         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5563                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5564                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5565         }
5566         if (!vxlan_v)
5567                 return;
5568         if (!vxlan_m)
5569                 vxlan_m = &rte_flow_item_vxlan_mask;
5570         size = sizeof(vxlan_m->vni);
5571         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
5572         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
5573         memcpy(vni_m, vxlan_m->vni, size);
5574         for (i = 0; i < size; ++i)
5575                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
5576 }
5577
5578 /**
5579  * Add Geneve item to matcher and to the value.
5580  *
5581  * @param[in, out] matcher
5582  *   Flow matcher.
5583  * @param[in, out] key
5584  *   Flow matcher value.
5585  * @param[in] item
5586  *   Flow pattern to translate.
5587  * @param[in] inner
5588  *   Item is inner pattern.
5589  */
5590
5591 static void
5592 flow_dv_translate_item_geneve(void *matcher, void *key,
5593                               const struct rte_flow_item *item, int inner)
5594 {
5595         const struct rte_flow_item_geneve *geneve_m = item->mask;
5596         const struct rte_flow_item_geneve *geneve_v = item->spec;
5597         void *headers_m;
5598         void *headers_v;
5599         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5600         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5601         uint16_t dport;
5602         uint16_t gbhdr_m;
5603         uint16_t gbhdr_v;
5604         char *vni_m;
5605         char *vni_v;
5606         size_t size, i;
5607
5608         if (inner) {
5609                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5610                                          inner_headers);
5611                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
5612         } else {
5613                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
5614                                          outer_headers);
5615                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5616         }
5617         dport = MLX5_UDP_PORT_GENEVE;
5618         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
5619                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
5620                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
5621         }
5622         if (!geneve_v)
5623                 return;
5624         if (!geneve_m)
5625                 geneve_m = &rte_flow_item_geneve_mask;
5626         size = sizeof(geneve_m->vni);
5627         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
5628         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
5629         memcpy(vni_m, geneve_m->vni, size);
5630         for (i = 0; i < size; ++i)
5631                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
5632         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
5633                  rte_be_to_cpu_16(geneve_m->protocol));
5634         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
5635                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
5636         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
5637         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
5638         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
5639                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5640         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
5641                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
5642         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
5643                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5644         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
5645                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
5646                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
5647 }
5648
5649 /**
5650  * Add MPLS item to matcher and to the value.
5651  *
5652  * @param[in, out] matcher
5653  *   Flow matcher.
5654  * @param[in, out] key
5655  *   Flow matcher value.
5656  * @param[in] item
5657  *   Flow pattern to translate.
5658  * @param[in] prev_layer
5659  *   The protocol layer indicated in previous item.
5660  * @param[in] inner
5661  *   Item is inner pattern.
5662  */
5663 static void
5664 flow_dv_translate_item_mpls(void *matcher, void *key,
5665                             const struct rte_flow_item *item,
5666                             uint64_t prev_layer,
5667                             int inner)
5668 {
5669         const uint32_t *in_mpls_m = item->mask;
5670         const uint32_t *in_mpls_v = item->spec;
5671         uint32_t *out_mpls_m = 0;
5672         uint32_t *out_mpls_v = 0;
5673         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5674         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5675         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
5676                                      misc_parameters_2);
5677         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5678         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
5679         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
5680
5681         switch (prev_layer) {
5682         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5683                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
5684                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
5685                          MLX5_UDP_PORT_MPLS);
5686                 break;
5687         case MLX5_FLOW_LAYER_GRE:
5688                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
5689                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
5690                          RTE_ETHER_TYPE_MPLS);
5691                 break;
5692         default:
5693                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
5694                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
5695                          IPPROTO_MPLS);
5696                 break;
5697         }
5698         if (!in_mpls_v)
5699                 return;
5700         if (!in_mpls_m)
5701                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
5702         switch (prev_layer) {
5703         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
5704                 out_mpls_m =
5705                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5706                                                  outer_first_mpls_over_udp);
5707                 out_mpls_v =
5708                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5709                                                  outer_first_mpls_over_udp);
5710                 break;
5711         case MLX5_FLOW_LAYER_GRE:
5712                 out_mpls_m =
5713                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
5714                                                  outer_first_mpls_over_gre);
5715                 out_mpls_v =
5716                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
5717                                                  outer_first_mpls_over_gre);
5718                 break;
5719         default:
5720                 /* Inner MPLS not over GRE is not supported. */
5721                 if (!inner) {
5722                         out_mpls_m =
5723                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5724                                                          misc2_m,
5725                                                          outer_first_mpls);
5726                         out_mpls_v =
5727                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
5728                                                          misc2_v,
5729                                                          outer_first_mpls);
5730                 }
5731                 break;
5732         }
5733         if (out_mpls_m && out_mpls_v) {
5734                 *out_mpls_m = *in_mpls_m;
5735                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
5736         }
5737 }
5738
5739 /**
5740  * Add metadata register item to matcher
5741  *
5742  * @param[in, out] matcher
5743  *   Flow matcher.
5744  * @param[in, out] key
5745  *   Flow matcher value.
5746  * @param[in] reg_type
5747  *   Type of device metadata register
5748  * @param[in] value
5749  *   Register value
5750  * @param[in] mask
5751  *   Register mask
5752  */
5753 static void
5754 flow_dv_match_meta_reg(void *matcher, void *key,
5755                        enum modify_reg reg_type,
5756                        uint32_t data, uint32_t mask)
5757 {
5758         void *misc2_m =
5759                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
5760         void *misc2_v =
5761                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
5762
5763         data &= mask;
5764         switch (reg_type) {
5765         case REG_A:
5766                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
5767                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
5768                 break;
5769         case REG_B:
5770                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
5771                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
5772                 break;
5773         case REG_C_0:
5774                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, mask);
5775                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, data);
5776                 break;
5777         case REG_C_1:
5778                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
5779                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
5780                 break;
5781         case REG_C_2:
5782                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
5783                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
5784                 break;
5785         case REG_C_3:
5786                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
5787                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
5788                 break;
5789         case REG_C_4:
5790                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
5791                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
5792                 break;
5793         case REG_C_5:
5794                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
5795                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
5796                 break;
5797         case REG_C_6:
5798                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
5799                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
5800                 break;
5801         case REG_C_7:
5802                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
5803                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
5804                 break;
5805         default:
5806                 assert(false);
5807                 break;
5808         }
5809 }
5810
5811 /**
5812  * Add MARK item to matcher
5813  *
5814  * @param[in] dev
5815  *   The device to configure through.
5816  * @param[in, out] matcher
5817  *   Flow matcher.
5818  * @param[in, out] key
5819  *   Flow matcher value.
5820  * @param[in] item
5821  *   Flow pattern to translate.
5822  */
5823 static void
5824 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
5825                             void *matcher, void *key,
5826                             const struct rte_flow_item *item)
5827 {
5828         struct mlx5_priv *priv = dev->data->dev_private;
5829         const struct rte_flow_item_mark *mark;
5830         uint32_t value;
5831         uint32_t mask;
5832
5833         mark = item->mask ? (const void *)item->mask :
5834                             &rte_flow_item_mark_mask;
5835         mask = mark->id & priv->sh->dv_mark_mask;
5836         mark = (const void *)item->spec;
5837         assert(mark);
5838         value = mark->id & priv->sh->dv_mark_mask & mask;
5839         if (mask) {
5840                 enum modify_reg reg;
5841
5842                 /* Get the metadata register index for the mark. */
5843                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
5844                 assert(reg > 0);
5845                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
5846         }
5847 }
5848
5849 /**
5850  * Add META item to matcher
5851  *
5852  * @param[in] dev
5853  *   The devich to configure through.
5854  * @param[in, out] matcher
5855  *   Flow matcher.
5856  * @param[in, out] key
5857  *   Flow matcher value.
5858  * @param[in] attr
5859  *   Attributes of flow that includes this item.
5860  * @param[in] item
5861  *   Flow pattern to translate.
5862  */
5863 static void
5864 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
5865                             void *matcher, void *key,
5866                             const struct rte_flow_attr *attr,
5867                             const struct rte_flow_item *item)
5868 {
5869         const struct rte_flow_item_meta *meta_m;
5870         const struct rte_flow_item_meta *meta_v;
5871
5872         meta_m = (const void *)item->mask;
5873         if (!meta_m)
5874                 meta_m = &rte_flow_item_meta_mask;
5875         meta_v = (const void *)item->spec;
5876         if (meta_v) {
5877                 enum modify_reg reg;
5878                 uint32_t value = meta_v->data;
5879                 uint32_t mask = meta_m->data;
5880
5881                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
5882                 if (reg < 0)
5883                         return;
5884                 /*
5885                  * In datapath code there is no endianness
5886                  * coversions for perfromance reasons, all
5887                  * pattern conversions are done in rte_flow.
5888                  */
5889                 value = rte_cpu_to_be_32(value);
5890                 mask = rte_cpu_to_be_32(mask);
5891                 if (reg == REG_C_0) {
5892                         struct mlx5_priv *priv = dev->data->dev_private;
5893                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
5894                         uint32_t shl_c0 = rte_bsf32(msk_c0);
5895
5896                         msk_c0 = rte_cpu_to_be_32(msk_c0);
5897                         value <<= shl_c0;
5898                         mask <<= shl_c0;
5899                         assert(msk_c0);
5900                         assert(!(~msk_c0 & mask));
5901                 }
5902                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
5903         }
5904 }
5905
5906 /**
5907  * Add vport metadata Reg C0 item to matcher
5908  *
5909  * @param[in, out] matcher
5910  *   Flow matcher.
5911  * @param[in, out] key
5912  *   Flow matcher value.
5913  * @param[in] reg
5914  *   Flow pattern to translate.
5915  */
5916 static void
5917 flow_dv_translate_item_meta_vport(void *matcher, void *key,
5918                                   uint32_t value, uint32_t mask)
5919 {
5920         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
5921 }
5922
5923 /**
5924  * Add tag item to matcher
5925  *
5926  * @param[in, out] matcher
5927  *   Flow matcher.
5928  * @param[in, out] key
5929  *   Flow matcher value.
5930  * @param[in] item
5931  *   Flow pattern to translate.
5932  */
5933 static void
5934 flow_dv_translate_mlx5_item_tag(void *matcher, void *key,
5935                                 const struct rte_flow_item *item)
5936 {
5937         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
5938         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
5939
5940         assert(tag_v);
5941         flow_dv_match_meta_reg(matcher, key, tag_v->id, tag_v->data,
5942                                tag_m ? tag_m->data : UINT32_MAX);
5943 }
5944
5945 /**
5946  * Add TAG item to matcher
5947  *
5948  * @param[in] dev
5949  *   The devich to configure through.
5950  * @param[in, out] matcher
5951  *   Flow matcher.
5952  * @param[in, out] key
5953  *   Flow matcher value.
5954  * @param[in] item
5955  *   Flow pattern to translate.
5956  */
5957 static void
5958 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
5959                            void *matcher, void *key,
5960                            const struct rte_flow_item *item)
5961 {
5962         const struct rte_flow_item_tag *tag_v = item->spec;
5963         const struct rte_flow_item_tag *tag_m = item->mask;
5964         enum modify_reg reg;
5965
5966         assert(tag_v);
5967         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
5968         /* Get the metadata register index for the tag. */
5969         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
5970         assert(reg > 0);
5971         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
5972 }
5973
5974 /**
5975  * Add source vport match to the specified matcher.
5976  *
5977  * @param[in, out] matcher
5978  *   Flow matcher.
5979  * @param[in, out] key
5980  *   Flow matcher value.
5981  * @param[in] port
5982  *   Source vport value to match
5983  * @param[in] mask
5984  *   Mask
5985  */
5986 static void
5987 flow_dv_translate_item_source_vport(void *matcher, void *key,
5988                                     int16_t port, uint16_t mask)
5989 {
5990         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
5991         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
5992
5993         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
5994         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
5995 }
5996
5997 /**
5998  * Translate port-id item to eswitch match on  port-id.
5999  *
6000  * @param[in] dev
6001  *   The devich to configure through.
6002  * @param[in, out] matcher
6003  *   Flow matcher.
6004  * @param[in, out] key
6005  *   Flow matcher value.
6006  * @param[in] item
6007  *   Flow pattern to translate.
6008  *
6009  * @return
6010  *   0 on success, a negative errno value otherwise.
6011  */
6012 static int
6013 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
6014                                void *key, const struct rte_flow_item *item)
6015 {
6016         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
6017         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
6018         struct mlx5_priv *priv;
6019         uint16_t mask, id;
6020
6021         mask = pid_m ? pid_m->id : 0xffff;
6022         id = pid_v ? pid_v->id : dev->data->port_id;
6023         priv = mlx5_port_to_eswitch_info(id, item == NULL);
6024         if (!priv)
6025                 return -rte_errno;
6026         /* Translate to vport field or to metadata, depending on mode. */
6027         if (priv->vport_meta_mask)
6028                 flow_dv_translate_item_meta_vport(matcher, key,
6029                                                   priv->vport_meta_tag,
6030                                                   priv->vport_meta_mask);
6031         else
6032                 flow_dv_translate_item_source_vport(matcher, key,
6033                                                     priv->vport_id, mask);
6034         return 0;
6035 }
6036
6037 /**
6038  * Add ICMP6 item to matcher and to the value.
6039  *
6040  * @param[in, out] matcher
6041  *   Flow matcher.
6042  * @param[in, out] key
6043  *   Flow matcher value.
6044  * @param[in] item
6045  *   Flow pattern to translate.
6046  * @param[in] inner
6047  *   Item is inner pattern.
6048  */
6049 static void
6050 flow_dv_translate_item_icmp6(void *matcher, void *key,
6051                               const struct rte_flow_item *item,
6052                               int inner)
6053 {
6054         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
6055         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
6056         void *headers_m;
6057         void *headers_v;
6058         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6059                                      misc_parameters_3);
6060         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6061         if (inner) {
6062                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6063                                          inner_headers);
6064                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6065         } else {
6066                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6067                                          outer_headers);
6068                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6069         }
6070         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6071         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
6072         if (!icmp6_v)
6073                 return;
6074         if (!icmp6_m)
6075                 icmp6_m = &rte_flow_item_icmp6_mask;
6076         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
6077         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
6078                  icmp6_v->type & icmp6_m->type);
6079         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
6080         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
6081                  icmp6_v->code & icmp6_m->code);
6082 }
6083
6084 /**
6085  * Add ICMP item to matcher and to the value.
6086  *
6087  * @param[in, out] matcher
6088  *   Flow matcher.
6089  * @param[in, out] key
6090  *   Flow matcher value.
6091  * @param[in] item
6092  *   Flow pattern to translate.
6093  * @param[in] inner
6094  *   Item is inner pattern.
6095  */
6096 static void
6097 flow_dv_translate_item_icmp(void *matcher, void *key,
6098                             const struct rte_flow_item *item,
6099                             int inner)
6100 {
6101         const struct rte_flow_item_icmp *icmp_m = item->mask;
6102         const struct rte_flow_item_icmp *icmp_v = item->spec;
6103         void *headers_m;
6104         void *headers_v;
6105         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
6106                                      misc_parameters_3);
6107         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
6108         if (inner) {
6109                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6110                                          inner_headers);
6111                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
6112         } else {
6113                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
6114                                          outer_headers);
6115                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
6116         }
6117         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
6118         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
6119         if (!icmp_v)
6120                 return;
6121         if (!icmp_m)
6122                 icmp_m = &rte_flow_item_icmp_mask;
6123         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
6124                  icmp_m->hdr.icmp_type);
6125         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
6126                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
6127         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
6128                  icmp_m->hdr.icmp_code);
6129         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
6130                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
6131 }
6132
6133 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
6134
6135 #define HEADER_IS_ZERO(match_criteria, headers)                              \
6136         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
6137                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
6138
6139 /**
6140  * Calculate flow matcher enable bitmap.
6141  *
6142  * @param match_criteria
6143  *   Pointer to flow matcher criteria.
6144  *
6145  * @return
6146  *   Bitmap of enabled fields.
6147  */
6148 static uint8_t
6149 flow_dv_matcher_enable(uint32_t *match_criteria)
6150 {
6151         uint8_t match_criteria_enable;
6152
6153         match_criteria_enable =
6154                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
6155                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
6156         match_criteria_enable |=
6157                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
6158                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
6159         match_criteria_enable |=
6160                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
6161                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
6162         match_criteria_enable |=
6163                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
6164                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
6165         match_criteria_enable |=
6166                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
6167                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
6168         return match_criteria_enable;
6169 }
6170
6171
6172 /**
6173  * Get a flow table.
6174  *
6175  * @param dev[in, out]
6176  *   Pointer to rte_eth_dev structure.
6177  * @param[in] table_id
6178  *   Table id to use.
6179  * @param[in] egress
6180  *   Direction of the table.
6181  * @param[in] transfer
6182  *   E-Switch or NIC flow.
6183  * @param[out] error
6184  *   pointer to error structure.
6185  *
6186  * @return
6187  *   Returns tables resource based on the index, NULL in case of failed.
6188  */
6189 static struct mlx5_flow_tbl_resource *
6190 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
6191                          uint32_t table_id, uint8_t egress,
6192                          uint8_t transfer,
6193                          struct rte_flow_error *error)
6194 {
6195         struct mlx5_priv *priv = dev->data->dev_private;
6196         struct mlx5_ibv_shared *sh = priv->sh;
6197         struct mlx5_flow_tbl_resource *tbl;
6198
6199 #ifdef HAVE_MLX5DV_DR
6200         if (transfer) {
6201                 tbl = &sh->fdb_tbl[table_id];
6202                 if (!tbl->obj)
6203                         tbl->obj = mlx5_glue->dr_create_flow_tbl
6204                                 (sh->fdb_domain, table_id);
6205         } else if (egress) {
6206                 tbl = &sh->tx_tbl[table_id];
6207                 if (!tbl->obj)
6208                         tbl->obj = mlx5_glue->dr_create_flow_tbl
6209                                 (sh->tx_domain, table_id);
6210         } else {
6211                 tbl = &sh->rx_tbl[table_id];
6212                 if (!tbl->obj)
6213                         tbl->obj = mlx5_glue->dr_create_flow_tbl
6214                                 (sh->rx_domain, table_id);
6215         }
6216         if (!tbl->obj) {
6217                 rte_flow_error_set(error, ENOMEM,
6218                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6219                                    NULL, "cannot create table");
6220                 return NULL;
6221         }
6222         rte_atomic32_inc(&tbl->refcnt);
6223         return tbl;
6224 #else
6225         (void)error;
6226         (void)tbl;
6227         if (transfer)
6228                 return &sh->fdb_tbl[table_id];
6229         else if (egress)
6230                 return &sh->tx_tbl[table_id];
6231         else
6232                 return &sh->rx_tbl[table_id];
6233 #endif
6234 }
6235
6236 /**
6237  * Release a flow table.
6238  *
6239  * @param[in] tbl
6240  *   Table resource to be released.
6241  *
6242  * @return
6243  *   Returns 0 if table was released, else return 1;
6244  */
6245 static int
6246 flow_dv_tbl_resource_release(struct mlx5_flow_tbl_resource *tbl)
6247 {
6248         if (!tbl)
6249                 return 0;
6250         if (rte_atomic32_dec_and_test(&tbl->refcnt)) {
6251                 mlx5_glue->dr_destroy_flow_tbl(tbl->obj);
6252                 tbl->obj = NULL;
6253                 return 0;
6254         }
6255         return 1;
6256 }
6257
6258 /**
6259  * Register the flow matcher.
6260  *
6261  * @param dev[in, out]
6262  *   Pointer to rte_eth_dev structure.
6263  * @param[in, out] matcher
6264  *   Pointer to flow matcher.
6265  * @parm[in, out] dev_flow
6266  *   Pointer to the dev_flow.
6267  * @param[out] error
6268  *   pointer to error structure.
6269  *
6270  * @return
6271  *   0 on success otherwise -errno and errno is set.
6272  */
6273 static int
6274 flow_dv_matcher_register(struct rte_eth_dev *dev,
6275                          struct mlx5_flow_dv_matcher *matcher,
6276                          struct mlx5_flow *dev_flow,
6277                          struct rte_flow_error *error)
6278 {
6279         struct mlx5_priv *priv = dev->data->dev_private;
6280         struct mlx5_ibv_shared *sh = priv->sh;
6281         struct mlx5_flow_dv_matcher *cache_matcher;
6282         struct mlx5dv_flow_matcher_attr dv_attr = {
6283                 .type = IBV_FLOW_ATTR_NORMAL,
6284                 .match_mask = (void *)&matcher->mask,
6285         };
6286         struct mlx5_flow_tbl_resource *tbl = NULL;
6287
6288         /* Lookup from cache. */
6289         LIST_FOREACH(cache_matcher, &sh->matchers, next) {
6290                 if (matcher->crc == cache_matcher->crc &&
6291                     matcher->priority == cache_matcher->priority &&
6292                     matcher->egress == cache_matcher->egress &&
6293                     matcher->group == cache_matcher->group &&
6294                     matcher->transfer == cache_matcher->transfer &&
6295                     !memcmp((const void *)matcher->mask.buf,
6296                             (const void *)cache_matcher->mask.buf,
6297                             cache_matcher->mask.size)) {
6298                         DRV_LOG(DEBUG,
6299                                 "priority %hd use %s matcher %p: refcnt %d++",
6300                                 cache_matcher->priority,
6301                                 cache_matcher->egress ? "tx" : "rx",
6302                                 (void *)cache_matcher,
6303                                 rte_atomic32_read(&cache_matcher->refcnt));
6304                         rte_atomic32_inc(&cache_matcher->refcnt);
6305                         dev_flow->dv.matcher = cache_matcher;
6306                         return 0;
6307                 }
6308         }
6309         /* Register new matcher. */
6310         cache_matcher = rte_calloc(__func__, 1, sizeof(*cache_matcher), 0);
6311         if (!cache_matcher)
6312                 return rte_flow_error_set(error, ENOMEM,
6313                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6314                                           "cannot allocate matcher memory");
6315         tbl = flow_dv_tbl_resource_get(dev, matcher->group,
6316                                        matcher->egress, matcher->transfer,
6317                                        error);
6318         if (!tbl) {
6319                 rte_free(cache_matcher);
6320                 return rte_flow_error_set(error, ENOMEM,
6321                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6322                                           NULL, "cannot create table");
6323         }
6324         *cache_matcher = *matcher;
6325         dv_attr.match_criteria_enable =
6326                 flow_dv_matcher_enable(cache_matcher->mask.buf);
6327         dv_attr.priority = matcher->priority;
6328         if (matcher->egress)
6329                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
6330         cache_matcher->matcher_object =
6331                 mlx5_glue->dv_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj);
6332         if (!cache_matcher->matcher_object) {
6333                 rte_free(cache_matcher);
6334 #ifdef HAVE_MLX5DV_DR
6335                 flow_dv_tbl_resource_release(tbl);
6336 #endif
6337                 return rte_flow_error_set(error, ENOMEM,
6338                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6339                                           NULL, "cannot create matcher");
6340         }
6341         rte_atomic32_inc(&cache_matcher->refcnt);
6342         LIST_INSERT_HEAD(&sh->matchers, cache_matcher, next);
6343         dev_flow->dv.matcher = cache_matcher;
6344         DRV_LOG(DEBUG, "priority %hd new %s matcher %p: refcnt %d",
6345                 cache_matcher->priority,
6346                 cache_matcher->egress ? "tx" : "rx", (void *)cache_matcher,
6347                 rte_atomic32_read(&cache_matcher->refcnt));
6348         rte_atomic32_inc(&tbl->refcnt);
6349         return 0;
6350 }
6351
6352 /**
6353  * Find existing tag resource or create and register a new one.
6354  *
6355  * @param dev[in, out]
6356  *   Pointer to rte_eth_dev structure.
6357  * @param[in, out] resource
6358  *   Pointer to tag resource.
6359  * @parm[in, out] dev_flow
6360  *   Pointer to the dev_flow.
6361  * @param[out] error
6362  *   pointer to error structure.
6363  *
6364  * @return
6365  *   0 on success otherwise -errno and errno is set.
6366  */
6367 static int
6368 flow_dv_tag_resource_register
6369                         (struct rte_eth_dev *dev,
6370                          struct mlx5_flow_dv_tag_resource *resource,
6371                          struct mlx5_flow *dev_flow,
6372                          struct rte_flow_error *error)
6373 {
6374         struct mlx5_priv *priv = dev->data->dev_private;
6375         struct mlx5_ibv_shared *sh = priv->sh;
6376         struct mlx5_flow_dv_tag_resource *cache_resource;
6377
6378         /* Lookup a matching resource from cache. */
6379         LIST_FOREACH(cache_resource, &sh->tags, next) {
6380                 if (resource->tag == cache_resource->tag) {
6381                         DRV_LOG(DEBUG, "tag resource %p: refcnt %d++",
6382                                 (void *)cache_resource,
6383                                 rte_atomic32_read(&cache_resource->refcnt));
6384                         rte_atomic32_inc(&cache_resource->refcnt);
6385                         dev_flow->dv.tag_resource = cache_resource;
6386                         return 0;
6387                 }
6388         }
6389         /* Register new  resource. */
6390         cache_resource = rte_calloc(__func__, 1, sizeof(*cache_resource), 0);
6391         if (!cache_resource)
6392                 return rte_flow_error_set(error, ENOMEM,
6393                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6394                                           "cannot allocate resource memory");
6395         *cache_resource = *resource;
6396         cache_resource->action = mlx5_glue->dv_create_flow_action_tag
6397                 (resource->tag);
6398         if (!cache_resource->action) {
6399                 rte_free(cache_resource);
6400                 return rte_flow_error_set(error, ENOMEM,
6401                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6402                                           NULL, "cannot create action");
6403         }
6404         rte_atomic32_init(&cache_resource->refcnt);
6405         rte_atomic32_inc(&cache_resource->refcnt);
6406         LIST_INSERT_HEAD(&sh->tags, cache_resource, next);
6407         dev_flow->dv.tag_resource = cache_resource;
6408         DRV_LOG(DEBUG, "new tag resource %p: refcnt %d++",
6409                 (void *)cache_resource,
6410                 rte_atomic32_read(&cache_resource->refcnt));
6411         return 0;
6412 }
6413
6414 /**
6415  * Release the tag.
6416  *
6417  * @param dev
6418  *   Pointer to Ethernet device.
6419  * @param flow
6420  *   Pointer to mlx5_flow.
6421  *
6422  * @return
6423  *   1 while a reference on it exists, 0 when freed.
6424  */
6425 static int
6426 flow_dv_tag_release(struct rte_eth_dev *dev,
6427                     struct mlx5_flow_dv_tag_resource *tag)
6428 {
6429         assert(tag);
6430         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
6431                 dev->data->port_id, (void *)tag,
6432                 rte_atomic32_read(&tag->refcnt));
6433         if (rte_atomic32_dec_and_test(&tag->refcnt)) {
6434                 claim_zero(mlx5_glue->destroy_flow_action(tag->action));
6435                 LIST_REMOVE(tag, next);
6436                 DRV_LOG(DEBUG, "port %u tag %p: removed",
6437                         dev->data->port_id, (void *)tag);
6438                 rte_free(tag);
6439                 return 0;
6440         }
6441         return 1;
6442 }
6443
6444 /**
6445  * Translate port ID action to vport.
6446  *
6447  * @param[in] dev
6448  *   Pointer to rte_eth_dev structure.
6449  * @param[in] action
6450  *   Pointer to the port ID action.
6451  * @param[out] dst_port_id
6452  *   The target port ID.
6453  * @param[out] error
6454  *   Pointer to the error structure.
6455  *
6456  * @return
6457  *   0 on success, a negative errno value otherwise and rte_errno is set.
6458  */
6459 static int
6460 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
6461                                  const struct rte_flow_action *action,
6462                                  uint32_t *dst_port_id,
6463                                  struct rte_flow_error *error)
6464 {
6465         uint32_t port;
6466         struct mlx5_priv *priv;
6467         const struct rte_flow_action_port_id *conf =
6468                         (const struct rte_flow_action_port_id *)action->conf;
6469
6470         port = conf->original ? dev->data->port_id : conf->id;
6471         priv = mlx5_port_to_eswitch_info(port, false);
6472         if (!priv)
6473                 return rte_flow_error_set(error, -rte_errno,
6474                                           RTE_FLOW_ERROR_TYPE_ACTION,
6475                                           NULL,
6476                                           "No eswitch info was found for port");
6477         if (priv->vport_meta_mask)
6478                 *dst_port_id = priv->vport_meta_tag;
6479         else
6480                 *dst_port_id = priv->vport_id;
6481         return 0;
6482 }
6483
6484 /**
6485  * Add Tx queue matcher
6486  *
6487  * @param[in] dev
6488  *   Pointer to the dev struct.
6489  * @param[in, out] matcher
6490  *   Flow matcher.
6491  * @param[in, out] key
6492  *   Flow matcher value.
6493  * @param[in] item
6494  *   Flow pattern to translate.
6495  * @param[in] inner
6496  *   Item is inner pattern.
6497  */
6498 static void
6499 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
6500                                 void *matcher, void *key,
6501                                 const struct rte_flow_item *item)
6502 {
6503         const struct mlx5_rte_flow_item_tx_queue *queue_m;
6504         const struct mlx5_rte_flow_item_tx_queue *queue_v;
6505         void *misc_m =
6506                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
6507         void *misc_v =
6508                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
6509         struct mlx5_txq_ctrl *txq;
6510         uint32_t queue;
6511
6512
6513         queue_m = (const void *)item->mask;
6514         if (!queue_m)
6515                 return;
6516         queue_v = (const void *)item->spec;
6517         if (!queue_v)
6518                 return;
6519         txq = mlx5_txq_get(dev, queue_v->queue);
6520         if (!txq)
6521                 return;
6522         queue = txq->obj->sq->id;
6523         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
6524         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
6525                  queue & queue_m->queue);
6526         mlx5_txq_release(dev, queue_v->queue);
6527 }
6528
6529 /**
6530  * Fill the flow with DV spec, lock free
6531  * (mutex should be acquired by caller).
6532  *
6533  * @param[in] dev
6534  *   Pointer to rte_eth_dev structure.
6535  * @param[in, out] dev_flow
6536  *   Pointer to the sub flow.
6537  * @param[in] attr
6538  *   Pointer to the flow attributes.
6539  * @param[in] items
6540  *   Pointer to the list of items.
6541  * @param[in] actions
6542  *   Pointer to the list of actions.
6543  * @param[out] error
6544  *   Pointer to the error structure.
6545  *
6546  * @return
6547  *   0 on success, a negative errno value otherwise and rte_errno is set.
6548  */
6549 static int
6550 __flow_dv_translate(struct rte_eth_dev *dev,
6551                     struct mlx5_flow *dev_flow,
6552                     const struct rte_flow_attr *attr,
6553                     const struct rte_flow_item items[],
6554                     const struct rte_flow_action actions[],
6555                     struct rte_flow_error *error)
6556 {
6557         struct mlx5_priv *priv = dev->data->dev_private;
6558         struct mlx5_dev_config *dev_conf = &priv->config;
6559         struct rte_flow *flow = dev_flow->flow;
6560         uint64_t item_flags = 0;
6561         uint64_t last_item = 0;
6562         uint64_t action_flags = 0;
6563         uint64_t priority = attr->priority;
6564         struct mlx5_flow_dv_matcher matcher = {
6565                 .mask = {
6566                         .size = sizeof(matcher.mask.buf),
6567                 },
6568         };
6569         int actions_n = 0;
6570         bool actions_end = false;
6571         struct mlx5_flow_dv_modify_hdr_resource mhdr_res = {
6572                 .ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
6573                                           MLX5DV_FLOW_TABLE_TYPE_NIC_RX
6574         };
6575         union flow_dv_attr flow_attr = { .attr = 0 };
6576         struct mlx5_flow_dv_tag_resource tag_resource;
6577         uint32_t modify_action_position = UINT32_MAX;
6578         void *match_mask = matcher.mask.buf;
6579         void *match_value = dev_flow->dv.value.buf;
6580         uint8_t next_protocol = 0xff;
6581         struct rte_vlan_hdr vlan = { 0 };
6582         uint32_t table;
6583         int ret = 0;
6584
6585         ret = mlx5_flow_group_to_table(attr, dev_flow->external, attr->group,
6586                                        &table, error);
6587         if (ret)
6588                 return ret;
6589         dev_flow->group = table;
6590         if (attr->transfer)
6591                 mhdr_res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
6592         if (priority == MLX5_FLOW_PRIO_RSVD)
6593                 priority = dev_conf->flow_prio - 1;
6594         for (; !actions_end ; actions++) {
6595                 const struct rte_flow_action_queue *queue;
6596                 const struct rte_flow_action_rss *rss;
6597                 const struct rte_flow_action *action = actions;
6598                 const struct rte_flow_action_count *count = action->conf;
6599                 const uint8_t *rss_key;
6600                 const struct rte_flow_action_jump *jump_data;
6601                 const struct rte_flow_action_meter *mtr;
6602                 struct mlx5_flow_dv_jump_tbl_resource jump_tbl_resource;
6603                 struct mlx5_flow_tbl_resource *tbl;
6604                 uint32_t port_id = 0;
6605                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
6606                 int action_type = actions->type;
6607                 const struct rte_flow_action *found_action = NULL;
6608
6609                 switch (action_type) {
6610                 case RTE_FLOW_ACTION_TYPE_VOID:
6611                         break;
6612                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
6613                         if (flow_dv_translate_action_port_id(dev, action,
6614                                                              &port_id, error))
6615                                 return -rte_errno;
6616                         port_id_resource.port_id = port_id;
6617                         if (flow_dv_port_id_action_resource_register
6618                             (dev, &port_id_resource, dev_flow, error))
6619                                 return -rte_errno;
6620                         dev_flow->dv.actions[actions_n++] =
6621                                 dev_flow->dv.port_id_action->action;
6622                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
6623                         break;
6624                 case RTE_FLOW_ACTION_TYPE_FLAG:
6625                         action_flags |= MLX5_FLOW_ACTION_FLAG;
6626                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6627                                 struct rte_flow_action_mark mark = {
6628                                         .id = MLX5_FLOW_MARK_DEFAULT,
6629                                 };
6630
6631                                 if (flow_dv_convert_action_mark(dev, &mark,
6632                                                                 &mhdr_res,
6633                                                                 error))
6634                                         return -rte_errno;
6635                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6636                                 break;
6637                         }
6638                         tag_resource.tag =
6639                                 mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
6640                         if (!dev_flow->dv.tag_resource)
6641                                 if (flow_dv_tag_resource_register
6642                                     (dev, &tag_resource, dev_flow, error))
6643                                         return errno;
6644                         dev_flow->dv.actions[actions_n++] =
6645                                 dev_flow->dv.tag_resource->action;
6646                         break;
6647                 case RTE_FLOW_ACTION_TYPE_MARK:
6648                         action_flags |= MLX5_FLOW_ACTION_MARK;
6649                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6650                                 const struct rte_flow_action_mark *mark =
6651                                         (const struct rte_flow_action_mark *)
6652                                                 actions->conf;
6653
6654                                 if (flow_dv_convert_action_mark(dev, mark,
6655                                                                 &mhdr_res,
6656                                                                 error))
6657                                         return -rte_errno;
6658                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
6659                                 break;
6660                         }
6661                         /* Fall-through */
6662                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
6663                         /* Legacy (non-extensive) MARK action. */
6664                         tag_resource.tag = mlx5_flow_mark_set
6665                               (((const struct rte_flow_action_mark *)
6666                                (actions->conf))->id);
6667                         if (!dev_flow->dv.tag_resource)
6668                                 if (flow_dv_tag_resource_register
6669                                     (dev, &tag_resource, dev_flow, error))
6670                                         return errno;
6671                         dev_flow->dv.actions[actions_n++] =
6672                                 dev_flow->dv.tag_resource->action;
6673                         break;
6674                 case RTE_FLOW_ACTION_TYPE_SET_META:
6675                         if (flow_dv_convert_action_set_meta
6676                                 (dev, &mhdr_res, attr,
6677                                  (const struct rte_flow_action_set_meta *)
6678                                   actions->conf, error))
6679                                 return -rte_errno;
6680                         action_flags |= MLX5_FLOW_ACTION_SET_META;
6681                         break;
6682                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
6683                         if (flow_dv_convert_action_set_tag
6684                                 (dev, &mhdr_res,
6685                                  (const struct rte_flow_action_set_tag *)
6686                                   actions->conf, error))
6687                                 return -rte_errno;
6688                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6689                         break;
6690                 case RTE_FLOW_ACTION_TYPE_DROP:
6691                         action_flags |= MLX5_FLOW_ACTION_DROP;
6692                         break;
6693                 case RTE_FLOW_ACTION_TYPE_QUEUE:
6694                         assert(flow->rss.queue);
6695                         queue = actions->conf;
6696                         flow->rss.queue_num = 1;
6697                         (*flow->rss.queue)[0] = queue->index;
6698                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
6699                         break;
6700                 case RTE_FLOW_ACTION_TYPE_RSS:
6701                         assert(flow->rss.queue);
6702                         rss = actions->conf;
6703                         if (flow->rss.queue)
6704                                 memcpy((*flow->rss.queue), rss->queue,
6705                                        rss->queue_num * sizeof(uint16_t));
6706                         flow->rss.queue_num = rss->queue_num;
6707                         /* NULL RSS key indicates default RSS key. */
6708                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
6709                         memcpy(flow->rss.key, rss_key, MLX5_RSS_HASH_KEY_LEN);
6710                         /*
6711                          * rss->level and rss.types should be set in advance
6712                          * when expanding items for RSS.
6713                          */
6714                         action_flags |= MLX5_FLOW_ACTION_RSS;
6715                         break;
6716                 case RTE_FLOW_ACTION_TYPE_COUNT:
6717                         if (!dev_conf->devx) {
6718                                 rte_errno = ENOTSUP;
6719                                 goto cnt_err;
6720                         }
6721                         flow->counter = flow_dv_counter_alloc(dev,
6722                                                               count->shared,
6723                                                               count->id,
6724                                                               dev_flow->group);
6725                         if (flow->counter == NULL)
6726                                 goto cnt_err;
6727                         dev_flow->dv.actions[actions_n++] =
6728                                 flow->counter->action;
6729                         action_flags |= MLX5_FLOW_ACTION_COUNT;
6730                         break;
6731 cnt_err:
6732                         if (rte_errno == ENOTSUP)
6733                                 return rte_flow_error_set
6734                                               (error, ENOTSUP,
6735                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6736                                                NULL,
6737                                                "count action not supported");
6738                         else
6739                                 return rte_flow_error_set
6740                                                 (error, rte_errno,
6741                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6742                                                  action,
6743                                                  "cannot create counter"
6744                                                   " object.");
6745                         break;
6746                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
6747                         dev_flow->dv.actions[actions_n++] =
6748                                                 priv->sh->pop_vlan_action;
6749                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
6750                         break;
6751                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
6752                         flow_dev_get_vlan_info_from_items(items, &vlan);
6753                         vlan.eth_proto = rte_be_to_cpu_16
6754                              ((((const struct rte_flow_action_of_push_vlan *)
6755                                                    actions->conf)->ethertype));
6756                         found_action = mlx5_flow_find_action
6757                                         (actions + 1,
6758                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
6759                         if (found_action)
6760                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
6761                         found_action = mlx5_flow_find_action
6762                                         (actions + 1,
6763                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
6764                         if (found_action)
6765                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
6766                         if (flow_dv_create_action_push_vlan
6767                                             (dev, attr, &vlan, dev_flow, error))
6768                                 return -rte_errno;
6769                         dev_flow->dv.actions[actions_n++] =
6770                                            dev_flow->dv.push_vlan_res->action;
6771                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
6772                         break;
6773                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
6774                         /* of_vlan_push action handled this action */
6775                         assert(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN);
6776                         break;
6777                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
6778                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
6779                                 break;
6780                         flow_dev_get_vlan_info_from_items(items, &vlan);
6781                         mlx5_update_vlan_vid_pcp(actions, &vlan);
6782                         /* If no VLAN push - this is a modify header action */
6783                         if (flow_dv_convert_action_modify_vlan_vid
6784                                                 (&mhdr_res, actions, error))
6785                                 return -rte_errno;
6786                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
6787                         break;
6788                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
6789                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
6790                         if (flow_dv_create_action_l2_encap(dev, actions,
6791                                                            dev_flow,
6792                                                            attr->transfer,
6793                                                            error))
6794                                 return -rte_errno;
6795                         dev_flow->dv.actions[actions_n++] =
6796                                 dev_flow->dv.encap_decap->verbs_action;
6797                         action_flags |= actions->type ==
6798                                         RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP ?
6799                                         MLX5_FLOW_ACTION_VXLAN_ENCAP :
6800                                         MLX5_FLOW_ACTION_NVGRE_ENCAP;
6801                         break;
6802                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
6803                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
6804                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
6805                                                            attr->transfer,
6806                                                            error))
6807                                 return -rte_errno;
6808                         dev_flow->dv.actions[actions_n++] =
6809                                 dev_flow->dv.encap_decap->verbs_action;
6810                         action_flags |= actions->type ==
6811                                         RTE_FLOW_ACTION_TYPE_VXLAN_DECAP ?
6812                                         MLX5_FLOW_ACTION_VXLAN_DECAP :
6813                                         MLX5_FLOW_ACTION_NVGRE_DECAP;
6814                         break;
6815                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
6816                         /* Handle encap with preceding decap. */
6817                         if (action_flags & MLX5_FLOW_ACTION_RAW_DECAP) {
6818                                 if (flow_dv_create_action_raw_encap
6819                                         (dev, actions, dev_flow, attr, error))
6820                                         return -rte_errno;
6821                                 dev_flow->dv.actions[actions_n++] =
6822                                         dev_flow->dv.encap_decap->verbs_action;
6823                         } else {
6824                                 /* Handle encap without preceding decap. */
6825                                 if (flow_dv_create_action_l2_encap
6826                                     (dev, actions, dev_flow, attr->transfer,
6827                                      error))
6828                                         return -rte_errno;
6829                                 dev_flow->dv.actions[actions_n++] =
6830                                         dev_flow->dv.encap_decap->verbs_action;
6831                         }
6832                         action_flags |= MLX5_FLOW_ACTION_RAW_ENCAP;
6833                         break;
6834                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
6835                         /* Check if this decap is followed by encap. */
6836                         for (; action->type != RTE_FLOW_ACTION_TYPE_END &&
6837                                action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP;
6838                                action++) {
6839                         }
6840                         /* Handle decap only if it isn't followed by encap. */
6841                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
6842                                 if (flow_dv_create_action_l2_decap
6843                                     (dev, dev_flow, attr->transfer, error))
6844                                         return -rte_errno;
6845                                 dev_flow->dv.actions[actions_n++] =
6846                                         dev_flow->dv.encap_decap->verbs_action;
6847                         }
6848                         /* If decap is followed by encap, handle it at encap. */
6849                         action_flags |= MLX5_FLOW_ACTION_RAW_DECAP;
6850                         break;
6851                 case RTE_FLOW_ACTION_TYPE_JUMP:
6852                         jump_data = action->conf;
6853                         ret = mlx5_flow_group_to_table(attr, dev_flow->external,
6854                                                        jump_data->group, &table,
6855                                                        error);
6856                         if (ret)
6857                                 return ret;
6858                         tbl = flow_dv_tbl_resource_get(dev, table,
6859                                                        attr->egress,
6860                                                        attr->transfer, error);
6861                         if (!tbl)
6862                                 return rte_flow_error_set
6863                                                 (error, errno,
6864                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6865                                                  NULL,
6866                                                  "cannot create jump action.");
6867                         jump_tbl_resource.tbl = tbl;
6868                         if (flow_dv_jump_tbl_resource_register
6869                             (dev, &jump_tbl_resource, dev_flow, error)) {
6870                                 flow_dv_tbl_resource_release(tbl);
6871                                 return rte_flow_error_set
6872                                                 (error, errno,
6873                                                  RTE_FLOW_ERROR_TYPE_ACTION,
6874                                                  NULL,
6875                                                  "cannot create jump action.");
6876                         }
6877                         dev_flow->dv.actions[actions_n++] =
6878                                 dev_flow->dv.jump->action;
6879                         action_flags |= MLX5_FLOW_ACTION_JUMP;
6880                         break;
6881                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
6882                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
6883                         if (flow_dv_convert_action_modify_mac
6884                                         (&mhdr_res, actions, error))
6885                                 return -rte_errno;
6886                         action_flags |= actions->type ==
6887                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
6888                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
6889                                         MLX5_FLOW_ACTION_SET_MAC_DST;
6890                         break;
6891                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
6892                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
6893                         if (flow_dv_convert_action_modify_ipv4
6894                                         (&mhdr_res, actions, error))
6895                                 return -rte_errno;
6896                         action_flags |= actions->type ==
6897                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
6898                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
6899                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
6900                         break;
6901                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
6902                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
6903                         if (flow_dv_convert_action_modify_ipv6
6904                                         (&mhdr_res, actions, error))
6905                                 return -rte_errno;
6906                         action_flags |= actions->type ==
6907                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
6908                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
6909                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
6910                         break;
6911                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
6912                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
6913                         if (flow_dv_convert_action_modify_tp
6914                                         (&mhdr_res, actions, items,
6915                                          &flow_attr, error))
6916                                 return -rte_errno;
6917                         action_flags |= actions->type ==
6918                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
6919                                         MLX5_FLOW_ACTION_SET_TP_SRC :
6920                                         MLX5_FLOW_ACTION_SET_TP_DST;
6921                         break;
6922                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
6923                         if (flow_dv_convert_action_modify_dec_ttl
6924                                         (&mhdr_res, items, &flow_attr, error))
6925                                 return -rte_errno;
6926                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
6927                         break;
6928                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
6929                         if (flow_dv_convert_action_modify_ttl
6930                                         (&mhdr_res, actions, items,
6931                                          &flow_attr, error))
6932                                 return -rte_errno;
6933                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
6934                         break;
6935                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
6936                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
6937                         if (flow_dv_convert_action_modify_tcp_seq
6938                                         (&mhdr_res, actions, error))
6939                                 return -rte_errno;
6940                         action_flags |= actions->type ==
6941                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
6942                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
6943                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
6944                         break;
6945
6946                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
6947                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
6948                         if (flow_dv_convert_action_modify_tcp_ack
6949                                         (&mhdr_res, actions, error))
6950                                 return -rte_errno;
6951                         action_flags |= actions->type ==
6952                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
6953                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
6954                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
6955                         break;
6956                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
6957                         if (flow_dv_convert_action_set_reg
6958                                         (&mhdr_res, actions, error))
6959                                 return -rte_errno;
6960                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6961                         break;
6962                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
6963                         if (flow_dv_convert_action_copy_mreg
6964                                         (dev, &mhdr_res, actions, error))
6965                                 return -rte_errno;
6966                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6967                         break;
6968                 case RTE_FLOW_ACTION_TYPE_METER:
6969                         mtr = actions->conf;
6970                         if (!flow->meter) {
6971                                 flow->meter = mlx5_flow_meter_attach(priv,
6972                                                         mtr->mtr_id, attr,
6973                                                         error);
6974                                 if (!flow->meter)
6975                                         return rte_flow_error_set(error,
6976                                                 rte_errno,
6977                                                 RTE_FLOW_ERROR_TYPE_ACTION,
6978                                                 NULL,
6979                                                 "meter not found "
6980                                                 "or invalid parameters");
6981                         }
6982                         /* Set the meter action. */
6983                         dev_flow->dv.actions[actions_n++] =
6984                                 flow->meter->mfts->meter_action;
6985                         action_flags |= MLX5_FLOW_ACTION_METER;
6986                         break;
6987                 case RTE_FLOW_ACTION_TYPE_END:
6988                         actions_end = true;
6989                         if (mhdr_res.actions_num) {
6990                                 /* create modify action if needed. */
6991                                 if (flow_dv_modify_hdr_resource_register
6992                                         (dev, &mhdr_res, dev_flow, error))
6993                                         return -rte_errno;
6994                                 dev_flow->dv.actions[modify_action_position] =
6995                                         dev_flow->dv.modify_hdr->verbs_action;
6996                         }
6997                         break;
6998                 default:
6999                         break;
7000                 }
7001                 if (mhdr_res.actions_num &&
7002                     modify_action_position == UINT32_MAX)
7003                         modify_action_position = actions_n++;
7004         }
7005         dev_flow->dv.actions_n = actions_n;
7006         dev_flow->actions = action_flags;
7007         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7008                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7009                 int item_type = items->type;
7010
7011                 switch (item_type) {
7012                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7013                         flow_dv_translate_item_port_id(dev, match_mask,
7014                                                        match_value, items);
7015                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7016                         break;
7017                 case RTE_FLOW_ITEM_TYPE_ETH:
7018                         flow_dv_translate_item_eth(match_mask, match_value,
7019                                                    items, tunnel);
7020                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7021                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7022                                              MLX5_FLOW_LAYER_OUTER_L2;
7023                         break;
7024                 case RTE_FLOW_ITEM_TYPE_VLAN:
7025                         flow_dv_translate_item_vlan(dev_flow,
7026                                                     match_mask, match_value,
7027                                                     items, tunnel);
7028                         matcher.priority = MLX5_PRIORITY_MAP_L2;
7029                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
7030                                               MLX5_FLOW_LAYER_INNER_VLAN) :
7031                                              (MLX5_FLOW_LAYER_OUTER_L2 |
7032                                               MLX5_FLOW_LAYER_OUTER_VLAN);
7033                         break;
7034                 case RTE_FLOW_ITEM_TYPE_IPV4:
7035                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7036                                                   &item_flags, &tunnel);
7037                         flow_dv_translate_item_ipv4(match_mask, match_value,
7038                                                     items, tunnel,
7039                                                     dev_flow->group);
7040                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7041                         dev_flow->hash_fields |=
7042                                 mlx5_flow_hashfields_adjust
7043                                         (dev_flow, tunnel,
7044                                          MLX5_IPV4_LAYER_TYPES,
7045                                          MLX5_IPV4_IBV_RX_HASH);
7046                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7047                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7048                         if (items->mask != NULL &&
7049                             ((const struct rte_flow_item_ipv4 *)
7050                              items->mask)->hdr.next_proto_id) {
7051                                 next_protocol =
7052                                         ((const struct rte_flow_item_ipv4 *)
7053                                          (items->spec))->hdr.next_proto_id;
7054                                 next_protocol &=
7055                                         ((const struct rte_flow_item_ipv4 *)
7056                                          (items->mask))->hdr.next_proto_id;
7057                         } else {
7058                                 /* Reset for inner layer. */
7059                                 next_protocol = 0xff;
7060                         }
7061                         break;
7062                 case RTE_FLOW_ITEM_TYPE_IPV6:
7063                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7064                                                   &item_flags, &tunnel);
7065                         flow_dv_translate_item_ipv6(match_mask, match_value,
7066                                                     items, tunnel,
7067                                                     dev_flow->group);
7068                         matcher.priority = MLX5_PRIORITY_MAP_L3;
7069                         dev_flow->hash_fields |=
7070                                 mlx5_flow_hashfields_adjust
7071                                         (dev_flow, tunnel,
7072                                          MLX5_IPV6_LAYER_TYPES,
7073                                          MLX5_IPV6_IBV_RX_HASH);
7074                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7075                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7076                         if (items->mask != NULL &&
7077                             ((const struct rte_flow_item_ipv6 *)
7078                              items->mask)->hdr.proto) {
7079                                 next_protocol =
7080                                         ((const struct rte_flow_item_ipv6 *)
7081                                          items->spec)->hdr.proto;
7082                                 next_protocol &=
7083                                         ((const struct rte_flow_item_ipv6 *)
7084                                          items->mask)->hdr.proto;
7085                         } else {
7086                                 /* Reset for inner layer. */
7087                                 next_protocol = 0xff;
7088                         }
7089                         break;
7090                 case RTE_FLOW_ITEM_TYPE_TCP:
7091                         flow_dv_translate_item_tcp(match_mask, match_value,
7092                                                    items, tunnel);
7093                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7094                         dev_flow->hash_fields |=
7095                                 mlx5_flow_hashfields_adjust
7096                                         (dev_flow, tunnel, ETH_RSS_TCP,
7097                                          IBV_RX_HASH_SRC_PORT_TCP |
7098                                          IBV_RX_HASH_DST_PORT_TCP);
7099                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7100                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7101                         break;
7102                 case RTE_FLOW_ITEM_TYPE_UDP:
7103                         flow_dv_translate_item_udp(match_mask, match_value,
7104                                                    items, tunnel);
7105                         matcher.priority = MLX5_PRIORITY_MAP_L4;
7106                         dev_flow->hash_fields |=
7107                                 mlx5_flow_hashfields_adjust
7108                                         (dev_flow, tunnel, ETH_RSS_UDP,
7109                                          IBV_RX_HASH_SRC_PORT_UDP |
7110                                          IBV_RX_HASH_DST_PORT_UDP);
7111                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7112                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7113                         break;
7114                 case RTE_FLOW_ITEM_TYPE_GRE:
7115                         flow_dv_translate_item_gre(match_mask, match_value,
7116                                                    items, tunnel);
7117                         last_item = MLX5_FLOW_LAYER_GRE;
7118                         break;
7119                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7120                         flow_dv_translate_item_gre_key(match_mask,
7121                                                        match_value, items);
7122                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7123                         break;
7124                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7125                         flow_dv_translate_item_nvgre(match_mask, match_value,
7126                                                      items, tunnel);
7127                         last_item = MLX5_FLOW_LAYER_GRE;
7128                         break;
7129                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7130                         flow_dv_translate_item_vxlan(match_mask, match_value,
7131                                                      items, tunnel);
7132                         last_item = MLX5_FLOW_LAYER_VXLAN;
7133                         break;
7134                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7135                         flow_dv_translate_item_vxlan(match_mask, match_value,
7136                                                      items, tunnel);
7137                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7138                         break;
7139                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7140                         flow_dv_translate_item_geneve(match_mask, match_value,
7141                                                       items, tunnel);
7142                         last_item = MLX5_FLOW_LAYER_GENEVE;
7143                         break;
7144                 case RTE_FLOW_ITEM_TYPE_MPLS:
7145                         flow_dv_translate_item_mpls(match_mask, match_value,
7146                                                     items, last_item, tunnel);
7147                         last_item = MLX5_FLOW_LAYER_MPLS;
7148                         break;
7149                 case RTE_FLOW_ITEM_TYPE_MARK:
7150                         flow_dv_translate_item_mark(dev, match_mask,
7151                                                     match_value, items);
7152                         last_item = MLX5_FLOW_ITEM_MARK;
7153                         break;
7154                 case RTE_FLOW_ITEM_TYPE_META:
7155                         flow_dv_translate_item_meta(dev, match_mask,
7156                                                     match_value, attr, items);
7157                         last_item = MLX5_FLOW_ITEM_METADATA;
7158                         break;
7159                 case RTE_FLOW_ITEM_TYPE_ICMP:
7160                         flow_dv_translate_item_icmp(match_mask, match_value,
7161                                                     items, tunnel);
7162                         last_item = MLX5_FLOW_LAYER_ICMP;
7163                         break;
7164                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7165                         flow_dv_translate_item_icmp6(match_mask, match_value,
7166                                                       items, tunnel);
7167                         last_item = MLX5_FLOW_LAYER_ICMP6;
7168                         break;
7169                 case RTE_FLOW_ITEM_TYPE_TAG:
7170                         flow_dv_translate_item_tag(dev, match_mask,
7171                                                    match_value, items);
7172                         last_item = MLX5_FLOW_ITEM_TAG;
7173                         break;
7174                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7175                         flow_dv_translate_mlx5_item_tag(match_mask,
7176                                                         match_value, items);
7177                         last_item = MLX5_FLOW_ITEM_TAG;
7178                         break;
7179                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7180                         flow_dv_translate_item_tx_queue(dev, match_mask,
7181                                                         match_value,
7182                                                         items);
7183                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7184                         break;
7185                 default:
7186                         break;
7187                 }
7188                 item_flags |= last_item;
7189         }
7190         /*
7191          * In case of ingress traffic when E-Switch mode is enabled,
7192          * we have two cases where we need to set the source port manually.
7193          * The first one, is in case of Nic steering rule, and the second is
7194          * E-Switch rule where no port_id item was found. In both cases
7195          * the source port is set according the current port in use.
7196          */
7197         if ((attr->ingress && !(item_flags & MLX5_FLOW_ITEM_PORT_ID)) &&
7198             (priv->representor || priv->master)) {
7199                 if (flow_dv_translate_item_port_id(dev, match_mask,
7200                                                    match_value, NULL))
7201                         return -rte_errno;
7202         }
7203         assert(!flow_dv_check_valid_spec(matcher.mask.buf,
7204                                          dev_flow->dv.value.buf));
7205         dev_flow->layers = item_flags;
7206         /* Register matcher. */
7207         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
7208                                     matcher.mask.size);
7209         matcher.priority = mlx5_flow_adjust_priority(dev, priority,
7210                                                      matcher.priority);
7211         matcher.egress = attr->egress;
7212         matcher.group = dev_flow->group;
7213         matcher.transfer = attr->transfer;
7214         if (flow_dv_matcher_register(dev, &matcher, dev_flow, error))
7215                 return -rte_errno;
7216         return 0;
7217 }
7218
7219 /**
7220  * Apply the flow to the NIC, lock free,
7221  * (mutex should be acquired by caller).
7222  *
7223  * @param[in] dev
7224  *   Pointer to the Ethernet device structure.
7225  * @param[in, out] flow
7226  *   Pointer to flow structure.
7227  * @param[out] error
7228  *   Pointer to error structure.
7229  *
7230  * @return
7231  *   0 on success, a negative errno value otherwise and rte_errno is set.
7232  */
7233 static int
7234 __flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
7235                 struct rte_flow_error *error)
7236 {
7237         struct mlx5_flow_dv *dv;
7238         struct mlx5_flow *dev_flow;
7239         struct mlx5_priv *priv = dev->data->dev_private;
7240         int n;
7241         int err;
7242
7243         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7244                 dv = &dev_flow->dv;
7245                 n = dv->actions_n;
7246                 if (dev_flow->actions & MLX5_FLOW_ACTION_DROP) {
7247                         if (dev_flow->transfer) {
7248                                 dv->actions[n++] = priv->sh->esw_drop_action;
7249                         } else {
7250                                 dv->hrxq = mlx5_hrxq_drop_new(dev);
7251                                 if (!dv->hrxq) {
7252                                         rte_flow_error_set
7253                                                 (error, errno,
7254                                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7255                                                  NULL,
7256                                                  "cannot get drop hash queue");
7257                                         goto error;
7258                                 }
7259                                 dv->actions[n++] = dv->hrxq->action;
7260                         }
7261                 } else if (dev_flow->actions &
7262                            (MLX5_FLOW_ACTION_QUEUE | MLX5_FLOW_ACTION_RSS)) {
7263                         struct mlx5_hrxq *hrxq;
7264
7265                         assert(flow->rss.queue);
7266                         hrxq = mlx5_hrxq_get(dev, flow->rss.key,
7267                                              MLX5_RSS_HASH_KEY_LEN,
7268                                              dev_flow->hash_fields,
7269                                              (*flow->rss.queue),
7270                                              flow->rss.queue_num);
7271                         if (!hrxq) {
7272                                 hrxq = mlx5_hrxq_new
7273                                         (dev, flow->rss.key,
7274                                          MLX5_RSS_HASH_KEY_LEN,
7275                                          dev_flow->hash_fields,
7276                                          (*flow->rss.queue),
7277                                          flow->rss.queue_num,
7278                                          !!(dev_flow->layers &
7279                                             MLX5_FLOW_LAYER_TUNNEL));
7280                         }
7281                         if (!hrxq) {
7282                                 rte_flow_error_set
7283                                         (error, rte_errno,
7284                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7285                                          "cannot get hash queue");
7286                                 goto error;
7287                         }
7288                         dv->hrxq = hrxq;
7289                         dv->actions[n++] = dv->hrxq->action;
7290                 }
7291                 dv->flow =
7292                         mlx5_glue->dv_create_flow(dv->matcher->matcher_object,
7293                                                   (void *)&dv->value, n,
7294                                                   dv->actions);
7295                 if (!dv->flow) {
7296                         rte_flow_error_set(error, errno,
7297                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7298                                            NULL,
7299                                            "hardware refuses to create flow");
7300                         goto error;
7301                 }
7302                 if (priv->vmwa_context &&
7303                     dev_flow->dv.vf_vlan.tag &&
7304                     !dev_flow->dv.vf_vlan.created) {
7305                         /*
7306                          * The rule contains the VLAN pattern.
7307                          * For VF we are going to create VLAN
7308                          * interface to make hypervisor set correct
7309                          * e-Switch vport context.
7310                          */
7311                         mlx5_vlan_vmwa_acquire(dev, &dev_flow->dv.vf_vlan);
7312                 }
7313         }
7314         return 0;
7315 error:
7316         err = rte_errno; /* Save rte_errno before cleanup. */
7317         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7318                 struct mlx5_flow_dv *dv = &dev_flow->dv;
7319                 if (dv->hrxq) {
7320                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7321                                 mlx5_hrxq_drop_release(dev);
7322                         else
7323                                 mlx5_hrxq_release(dev, dv->hrxq);
7324                         dv->hrxq = NULL;
7325                 }
7326                 if (dev_flow->dv.vf_vlan.tag &&
7327                     dev_flow->dv.vf_vlan.created)
7328                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7329         }
7330         rte_errno = err; /* Restore rte_errno. */
7331         return -rte_errno;
7332 }
7333
7334 /**
7335  * Release the flow matcher.
7336  *
7337  * @param dev
7338  *   Pointer to Ethernet device.
7339  * @param flow
7340  *   Pointer to mlx5_flow.
7341  *
7342  * @return
7343  *   1 while a reference on it exists, 0 when freed.
7344  */
7345 static int
7346 flow_dv_matcher_release(struct rte_eth_dev *dev,
7347                         struct mlx5_flow *flow)
7348 {
7349         struct mlx5_flow_dv_matcher *matcher = flow->dv.matcher;
7350         struct mlx5_priv *priv = dev->data->dev_private;
7351         struct mlx5_ibv_shared *sh = priv->sh;
7352         struct mlx5_flow_tbl_resource *tbl;
7353
7354         assert(matcher->matcher_object);
7355         DRV_LOG(DEBUG, "port %u matcher %p: refcnt %d--",
7356                 dev->data->port_id, (void *)matcher,
7357                 rte_atomic32_read(&matcher->refcnt));
7358         if (rte_atomic32_dec_and_test(&matcher->refcnt)) {
7359                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7360                            (matcher->matcher_object));
7361                 LIST_REMOVE(matcher, next);
7362                 if (matcher->egress)
7363                         tbl = &sh->tx_tbl[matcher->group];
7364                 else
7365                         tbl = &sh->rx_tbl[matcher->group];
7366                 flow_dv_tbl_resource_release(tbl);
7367                 rte_free(matcher);
7368                 DRV_LOG(DEBUG, "port %u matcher %p: removed",
7369                         dev->data->port_id, (void *)matcher);
7370                 return 0;
7371         }
7372         return 1;
7373 }
7374
7375 /**
7376  * Release an encap/decap resource.
7377  *
7378  * @param flow
7379  *   Pointer to mlx5_flow.
7380  *
7381  * @return
7382  *   1 while a reference on it exists, 0 when freed.
7383  */
7384 static int
7385 flow_dv_encap_decap_resource_release(struct mlx5_flow *flow)
7386 {
7387         struct mlx5_flow_dv_encap_decap_resource *cache_resource =
7388                                                 flow->dv.encap_decap;
7389
7390         assert(cache_resource->verbs_action);
7391         DRV_LOG(DEBUG, "encap/decap resource %p: refcnt %d--",
7392                 (void *)cache_resource,
7393                 rte_atomic32_read(&cache_resource->refcnt));
7394         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7395                 claim_zero(mlx5_glue->destroy_flow_action
7396                                 (cache_resource->verbs_action));
7397                 LIST_REMOVE(cache_resource, next);
7398                 rte_free(cache_resource);
7399                 DRV_LOG(DEBUG, "encap/decap resource %p: removed",
7400                         (void *)cache_resource);
7401                 return 0;
7402         }
7403         return 1;
7404 }
7405
7406 /**
7407  * Release an jump to table action resource.
7408  *
7409  * @param flow
7410  *   Pointer to mlx5_flow.
7411  *
7412  * @return
7413  *   1 while a reference on it exists, 0 when freed.
7414  */
7415 static int
7416 flow_dv_jump_tbl_resource_release(struct mlx5_flow *flow)
7417 {
7418         struct mlx5_flow_dv_jump_tbl_resource *cache_resource =
7419                                                 flow->dv.jump;
7420
7421         assert(cache_resource->action);
7422         DRV_LOG(DEBUG, "jump table resource %p: refcnt %d--",
7423                 (void *)cache_resource,
7424                 rte_atomic32_read(&cache_resource->refcnt));
7425         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7426                 claim_zero(mlx5_glue->destroy_flow_action
7427                                 (cache_resource->action));
7428                 LIST_REMOVE(cache_resource, next);
7429                 flow_dv_tbl_resource_release(cache_resource->tbl);
7430                 rte_free(cache_resource);
7431                 DRV_LOG(DEBUG, "jump table resource %p: removed",
7432                         (void *)cache_resource);
7433                 return 0;
7434         }
7435         return 1;
7436 }
7437
7438 /**
7439  * Release a modify-header resource.
7440  *
7441  * @param flow
7442  *   Pointer to mlx5_flow.
7443  *
7444  * @return
7445  *   1 while a reference on it exists, 0 when freed.
7446  */
7447 static int
7448 flow_dv_modify_hdr_resource_release(struct mlx5_flow *flow)
7449 {
7450         struct mlx5_flow_dv_modify_hdr_resource *cache_resource =
7451                                                 flow->dv.modify_hdr;
7452
7453         assert(cache_resource->verbs_action);
7454         DRV_LOG(DEBUG, "modify-header resource %p: refcnt %d--",
7455                 (void *)cache_resource,
7456                 rte_atomic32_read(&cache_resource->refcnt));
7457         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7458                 claim_zero(mlx5_glue->destroy_flow_action
7459                                 (cache_resource->verbs_action));
7460                 LIST_REMOVE(cache_resource, next);
7461                 rte_free(cache_resource);
7462                 DRV_LOG(DEBUG, "modify-header resource %p: removed",
7463                         (void *)cache_resource);
7464                 return 0;
7465         }
7466         return 1;
7467 }
7468
7469 /**
7470  * Release port ID action resource.
7471  *
7472  * @param flow
7473  *   Pointer to mlx5_flow.
7474  *
7475  * @return
7476  *   1 while a reference on it exists, 0 when freed.
7477  */
7478 static int
7479 flow_dv_port_id_action_resource_release(struct mlx5_flow *flow)
7480 {
7481         struct mlx5_flow_dv_port_id_action_resource *cache_resource =
7482                 flow->dv.port_id_action;
7483
7484         assert(cache_resource->action);
7485         DRV_LOG(DEBUG, "port ID action resource %p: refcnt %d--",
7486                 (void *)cache_resource,
7487                 rte_atomic32_read(&cache_resource->refcnt));
7488         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7489                 claim_zero(mlx5_glue->destroy_flow_action
7490                                 (cache_resource->action));
7491                 LIST_REMOVE(cache_resource, next);
7492                 rte_free(cache_resource);
7493                 DRV_LOG(DEBUG, "port id action resource %p: removed",
7494                         (void *)cache_resource);
7495                 return 0;
7496         }
7497         return 1;
7498 }
7499
7500 /**
7501  * Release push vlan action resource.
7502  *
7503  * @param flow
7504  *   Pointer to mlx5_flow.
7505  *
7506  * @return
7507  *   1 while a reference on it exists, 0 when freed.
7508  */
7509 static int
7510 flow_dv_push_vlan_action_resource_release(struct mlx5_flow *flow)
7511 {
7512         struct mlx5_flow_dv_push_vlan_action_resource *cache_resource =
7513                 flow->dv.push_vlan_res;
7514
7515         assert(cache_resource->action);
7516         DRV_LOG(DEBUG, "push VLAN action resource %p: refcnt %d--",
7517                 (void *)cache_resource,
7518                 rte_atomic32_read(&cache_resource->refcnt));
7519         if (rte_atomic32_dec_and_test(&cache_resource->refcnt)) {
7520                 claim_zero(mlx5_glue->destroy_flow_action
7521                                 (cache_resource->action));
7522                 LIST_REMOVE(cache_resource, next);
7523                 rte_free(cache_resource);
7524                 DRV_LOG(DEBUG, "push vlan action resource %p: removed",
7525                         (void *)cache_resource);
7526                 return 0;
7527         }
7528         return 1;
7529 }
7530
7531 /**
7532  * Remove the flow from the NIC but keeps it in memory.
7533  * Lock free, (mutex should be acquired by caller).
7534  *
7535  * @param[in] dev
7536  *   Pointer to Ethernet device.
7537  * @param[in, out] flow
7538  *   Pointer to flow structure.
7539  */
7540 static void
7541 __flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
7542 {
7543         struct mlx5_flow_dv *dv;
7544         struct mlx5_flow *dev_flow;
7545
7546         if (!flow)
7547                 return;
7548         LIST_FOREACH(dev_flow, &flow->dev_flows, next) {
7549                 dv = &dev_flow->dv;
7550                 if (dv->flow) {
7551                         claim_zero(mlx5_glue->dv_destroy_flow(dv->flow));
7552                         dv->flow = NULL;
7553                 }
7554                 if (dv->hrxq) {
7555                         if (dev_flow->actions & MLX5_FLOW_ACTION_DROP)
7556                                 mlx5_hrxq_drop_release(dev);
7557                         else
7558                                 mlx5_hrxq_release(dev, dv->hrxq);
7559                         dv->hrxq = NULL;
7560                 }
7561                 if (dev_flow->dv.vf_vlan.tag &&
7562                     dev_flow->dv.vf_vlan.created)
7563                         mlx5_vlan_vmwa_release(dev, &dev_flow->dv.vf_vlan);
7564         }
7565 }
7566
7567 /**
7568  * Remove the flow from the NIC and the memory.
7569  * Lock free, (mutex should be acquired by caller).
7570  *
7571  * @param[in] dev
7572  *   Pointer to the Ethernet device structure.
7573  * @param[in, out] flow
7574  *   Pointer to flow structure.
7575  */
7576 static void
7577 __flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
7578 {
7579         struct mlx5_flow *dev_flow;
7580
7581         if (!flow)
7582                 return;
7583         __flow_dv_remove(dev, flow);
7584         if (flow->counter) {
7585                 flow_dv_counter_release(dev, flow->counter);
7586                 flow->counter = NULL;
7587         }
7588         if (flow->meter) {
7589                 mlx5_flow_meter_detach(flow->meter);
7590                 flow->meter = NULL;
7591         }
7592         while (!LIST_EMPTY(&flow->dev_flows)) {
7593                 dev_flow = LIST_FIRST(&flow->dev_flows);
7594                 LIST_REMOVE(dev_flow, next);
7595                 if (dev_flow->dv.matcher)
7596                         flow_dv_matcher_release(dev, dev_flow);
7597                 if (dev_flow->dv.encap_decap)
7598                         flow_dv_encap_decap_resource_release(dev_flow);
7599                 if (dev_flow->dv.modify_hdr)
7600                         flow_dv_modify_hdr_resource_release(dev_flow);
7601                 if (dev_flow->dv.jump)
7602                         flow_dv_jump_tbl_resource_release(dev_flow);
7603                 if (dev_flow->dv.port_id_action)
7604                         flow_dv_port_id_action_resource_release(dev_flow);
7605                 if (dev_flow->dv.push_vlan_res)
7606                         flow_dv_push_vlan_action_resource_release(dev_flow);
7607                 if (dev_flow->dv.tag_resource)
7608                         flow_dv_tag_release(dev, dev_flow->dv.tag_resource);
7609                 rte_free(dev_flow);
7610         }
7611 }
7612
7613 /**
7614  * Query a dv flow  rule for its statistics via devx.
7615  *
7616  * @param[in] dev
7617  *   Pointer to Ethernet device.
7618  * @param[in] flow
7619  *   Pointer to the sub flow.
7620  * @param[out] data
7621  *   data retrieved by the query.
7622  * @param[out] error
7623  *   Perform verbose error reporting if not NULL.
7624  *
7625  * @return
7626  *   0 on success, a negative errno value otherwise and rte_errno is set.
7627  */
7628 static int
7629 flow_dv_query_count(struct rte_eth_dev *dev, struct rte_flow *flow,
7630                     void *data, struct rte_flow_error *error)
7631 {
7632         struct mlx5_priv *priv = dev->data->dev_private;
7633         struct rte_flow_query_count *qc = data;
7634
7635         if (!priv->config.devx)
7636                 return rte_flow_error_set(error, ENOTSUP,
7637                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7638                                           NULL,
7639                                           "counters are not supported");
7640         if (flow->counter) {
7641                 uint64_t pkts, bytes;
7642                 int err = _flow_dv_query_count(dev, flow->counter, &pkts,
7643                                                &bytes);
7644
7645                 if (err)
7646                         return rte_flow_error_set(error, -err,
7647                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7648                                         NULL, "cannot read counters");
7649                 qc->hits_set = 1;
7650                 qc->bytes_set = 1;
7651                 qc->hits = pkts - flow->counter->hits;
7652                 qc->bytes = bytes - flow->counter->bytes;
7653                 if (qc->reset) {
7654                         flow->counter->hits = pkts;
7655                         flow->counter->bytes = bytes;
7656                 }
7657                 return 0;
7658         }
7659         return rte_flow_error_set(error, EINVAL,
7660                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7661                                   NULL,
7662                                   "counters are not available");
7663 }
7664
7665 /**
7666  * Query a flow.
7667  *
7668  * @see rte_flow_query()
7669  * @see rte_flow_ops
7670  */
7671 static int
7672 flow_dv_query(struct rte_eth_dev *dev,
7673               struct rte_flow *flow __rte_unused,
7674               const struct rte_flow_action *actions __rte_unused,
7675               void *data __rte_unused,
7676               struct rte_flow_error *error __rte_unused)
7677 {
7678         int ret = -EINVAL;
7679
7680         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7681                 switch (actions->type) {
7682                 case RTE_FLOW_ACTION_TYPE_VOID:
7683                         break;
7684                 case RTE_FLOW_ACTION_TYPE_COUNT:
7685                         ret = flow_dv_query_count(dev, flow, data, error);
7686                         break;
7687                 default:
7688                         return rte_flow_error_set(error, ENOTSUP,
7689                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7690                                                   actions,
7691                                                   "action not supported");
7692                 }
7693         }
7694         return ret;
7695 }
7696
7697 /**
7698  * Destroy the meter table set.
7699  * Lock free, (mutex should be acquired by caller).
7700  *
7701  * @param[in] dev
7702  *   Pointer to Ethernet device.
7703  * @param[in] tbl
7704  *   Pointer to the meter table set.
7705  *
7706  * @return
7707  *   Always 0.
7708  */
7709 static int
7710 flow_dv_destroy_mtr_tbl(struct rte_eth_dev *dev,
7711                         struct mlx5_meter_domains_infos *tbl)
7712 {
7713         struct mlx5_priv *priv = dev->data->dev_private;
7714         struct mlx5_meter_domains_infos *mtd =
7715                                 (struct mlx5_meter_domains_infos *)tbl;
7716
7717         if (!mtd || !priv->config.dv_flow_en)
7718                 return 0;
7719         if (mtd->ingress.policer_rules[RTE_MTR_DROPPED])
7720                 claim_zero(mlx5_glue->dv_destroy_flow
7721                           (mtd->ingress.policer_rules[RTE_MTR_DROPPED]));
7722         if (mtd->egress.policer_rules[RTE_MTR_DROPPED])
7723                 claim_zero(mlx5_glue->dv_destroy_flow
7724                           (mtd->egress.policer_rules[RTE_MTR_DROPPED]));
7725         if (mtd->transfer.policer_rules[RTE_MTR_DROPPED])
7726                 claim_zero(mlx5_glue->dv_destroy_flow
7727                           (mtd->transfer.policer_rules[RTE_MTR_DROPPED]));
7728         if (mtd->egress.color_matcher)
7729                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7730                           (mtd->egress.color_matcher));
7731         if (mtd->egress.any_matcher)
7732                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7733                           (mtd->egress.any_matcher));
7734         if (mtd->egress.tbl)
7735                 claim_zero(flow_dv_tbl_resource_release(mtd->egress.tbl));
7736         if (mtd->ingress.color_matcher)
7737                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7738                           (mtd->ingress.color_matcher));
7739         if (mtd->ingress.any_matcher)
7740                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7741                           (mtd->ingress.any_matcher));
7742         if (mtd->ingress.tbl)
7743                 claim_zero(flow_dv_tbl_resource_release(mtd->ingress.tbl));
7744         if (mtd->transfer.color_matcher)
7745                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7746                           (mtd->transfer.color_matcher));
7747         if (mtd->transfer.any_matcher)
7748                 claim_zero(mlx5_glue->dv_destroy_flow_matcher
7749                           (mtd->transfer.any_matcher));
7750         if (mtd->transfer.tbl)
7751                 claim_zero(flow_dv_tbl_resource_release(mtd->transfer.tbl));
7752         if (mtd->drop_actn)
7753                 claim_zero(mlx5_glue->destroy_flow_action(mtd->drop_actn));
7754         rte_free(mtd);
7755         return 0;
7756 }
7757
7758 /* Number of meter flow actions, count and jump or count and drop. */
7759 #define METER_ACTIONS 2
7760
7761 /**
7762  * Create specify domain meter table and suffix table.
7763  *
7764  * @param[in] dev
7765  *   Pointer to Ethernet device.
7766  * @param[in,out] mtb
7767  *   Pointer to DV meter table set.
7768  * @param[in] egress
7769  *   Table attribute.
7770  * @param[in] transfer
7771  *   Table attribute.
7772  * @param[in] color_reg_c_idx
7773  *   Reg C index for color match.
7774  *
7775  * @return
7776  *   0 on success, -1 otherwise and rte_errno is set.
7777  */
7778 static int
7779 flow_dv_prepare_mtr_tables(struct rte_eth_dev *dev,
7780                            struct mlx5_meter_domains_infos *mtb,
7781                            uint8_t egress, uint8_t transfer,
7782                            uint32_t color_reg_c_idx)
7783 {
7784         struct mlx5_priv *priv = dev->data->dev_private;
7785         struct mlx5_ibv_shared *sh = priv->sh;
7786         struct mlx5_flow_dv_match_params mask = {
7787                 .size = sizeof(mask.buf),
7788         };
7789         struct mlx5_flow_dv_match_params value = {
7790                 .size = sizeof(value.buf),
7791         };
7792         struct mlx5dv_flow_matcher_attr dv_attr = {
7793                 .type = IBV_FLOW_ATTR_NORMAL,
7794                 .priority = 0,
7795                 .match_criteria_enable = 0,
7796                 .match_mask = (void *)&mask,
7797         };
7798         void *actions[METER_ACTIONS];
7799         struct mlx5_flow_tbl_resource **sfx_tbl;
7800         struct mlx5_meter_domain_info *dtb;
7801         struct rte_flow_error error;
7802         int i = 0;
7803
7804         if (transfer) {
7805                 sfx_tbl = &sh->fdb_mtr_sfx_tbl;
7806                 dtb = &mtb->transfer;
7807         } else if (egress) {
7808                 sfx_tbl = &sh->tx_mtr_sfx_tbl;
7809                 dtb = &mtb->egress;
7810         } else {
7811                 sfx_tbl = &sh->rx_mtr_sfx_tbl;
7812                 dtb = &mtb->ingress;
7813         }
7814         /* If the suffix table in missing, create it. */
7815         if (!(*sfx_tbl)) {
7816                 *sfx_tbl = flow_dv_tbl_resource_get(dev,
7817                                                 MLX5_FLOW_TABLE_LEVEL_SUFFIX,
7818                                                 egress, transfer, &error);
7819                 if (!(*sfx_tbl)) {
7820                         DRV_LOG(ERR, "Failed to create meter suffix table.");
7821                         return -1;
7822                 }
7823         }
7824         /* Create the meter table with METER level. */
7825         dtb->tbl = flow_dv_tbl_resource_get(dev, MLX5_FLOW_TABLE_LEVEL_METER,
7826                                             egress, transfer, &error);
7827         if (!dtb->tbl) {
7828                 DRV_LOG(ERR, "Failed to create meter policer table.");
7829                 return -1;
7830         }
7831         /* Create matchers, Any and Color. */
7832         dv_attr.priority = 3;
7833         dv_attr.match_criteria_enable = 0;
7834         dtb->any_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
7835                                                              &dv_attr,
7836                                                              dtb->tbl->obj);
7837         if (!dtb->any_matcher) {
7838                 DRV_LOG(ERR, "Failed to create meter"
7839                              " policer default matcher.");
7840                 goto error_exit;
7841         }
7842         dv_attr.priority = 0;
7843         dv_attr.match_criteria_enable =
7844                                 1 << MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
7845         flow_dv_match_meta_reg(mask.buf, value.buf, color_reg_c_idx,
7846                                rte_col_2_mlx5_col(RTE_COLORS), UINT32_MAX);
7847         dtb->color_matcher = mlx5_glue->dv_create_flow_matcher(sh->ctx,
7848                                                                &dv_attr,
7849                                                                dtb->tbl->obj);
7850         if (!dtb->color_matcher) {
7851                 DRV_LOG(ERR, "Failed to create meter policer color matcher.");
7852                 goto error_exit;
7853         }
7854         if (mtb->count_actns[RTE_MTR_DROPPED])
7855                 actions[i++] = mtb->count_actns[RTE_MTR_DROPPED];
7856         actions[i++] = mtb->drop_actn;
7857         /* Default rule: lowest priority, match any, actions: drop. */
7858         dtb->policer_rules[RTE_MTR_DROPPED] =
7859                         mlx5_glue->dv_create_flow(dtb->any_matcher,
7860                                                  (void *)&value, i, actions);
7861         if (!dtb->policer_rules[RTE_MTR_DROPPED]) {
7862                 DRV_LOG(ERR, "Failed to create meter policer drop rule.");
7863                 goto error_exit;
7864         }
7865         return 0;
7866 error_exit:
7867         return -1;
7868 }
7869
7870 /**
7871  * Create the needed meter and suffix tables.
7872  * Lock free, (mutex should be acquired by caller).
7873  *
7874  * @param[in] dev
7875  *   Pointer to Ethernet device.
7876  * @param[in] fm
7877  *   Pointer to the flow meter.
7878  *
7879  * @return
7880  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
7881  */
7882 static struct mlx5_meter_domains_infos *
7883 flow_dv_create_mtr_tbl(struct rte_eth_dev *dev,
7884                        const struct mlx5_flow_meter *fm)
7885 {
7886         struct mlx5_priv *priv = dev->data->dev_private;
7887         struct mlx5_meter_domains_infos *mtb;
7888         int ret;
7889         int i;
7890
7891         if (!priv->mtr_en) {
7892                 rte_errno = ENOTSUP;
7893                 return NULL;
7894         }
7895         mtb = rte_calloc(__func__, 1, sizeof(*mtb), 0);
7896         if (!mtb) {
7897                 DRV_LOG(ERR, "Failed to allocate memory for meter.");
7898                 return NULL;
7899         }
7900         /* Create meter count actions */
7901         for (i = 0; i <= RTE_MTR_DROPPED; i++) {
7902                 if (!fm->policer_stats.cnt[i])
7903                         continue;
7904                 mtb->count_actns[i] = fm->policer_stats.cnt[i]->action;
7905         }
7906         /* Create drop action. */
7907         mtb->drop_actn = mlx5_glue->dr_create_flow_action_drop();
7908         if (!mtb->drop_actn) {
7909                 DRV_LOG(ERR, "Failed to create drop action.");
7910                 goto error_exit;
7911         }
7912         /* Egress meter table. */
7913         ret = flow_dv_prepare_mtr_tables(dev, mtb, 1, 0, priv->mtr_color_reg);
7914         if (ret) {
7915                 DRV_LOG(ERR, "Failed to prepare egress meter table.");
7916                 goto error_exit;
7917         }
7918         /* Ingress meter table. */
7919         ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 0, priv->mtr_color_reg);
7920         if (ret) {
7921                 DRV_LOG(ERR, "Failed to prepare ingress meter table.");
7922                 goto error_exit;
7923         }
7924         /* FDB meter table. */
7925         if (priv->config.dv_esw_en) {
7926                 ret = flow_dv_prepare_mtr_tables(dev, mtb, 0, 1,
7927                                                  priv->mtr_color_reg);
7928                 if (ret) {
7929                         DRV_LOG(ERR, "Failed to prepare fdb meter table.");
7930                         goto error_exit;
7931                 }
7932         }
7933         return mtb;
7934 error_exit:
7935         flow_dv_destroy_mtr_tbl(dev, mtb);
7936         return NULL;
7937 }
7938
7939 /**
7940  * Destroy domain policer rule.
7941  *
7942  * @param[in] dt
7943  *   Pointer to domain table.
7944  */
7945 static void
7946 flow_dv_destroy_domain_policer_rule(struct mlx5_meter_domain_info *dt)
7947 {
7948         int i;
7949
7950         for (i = 0; i < RTE_MTR_DROPPED; i++) {
7951                 if (dt->policer_rules[i]) {
7952                         claim_zero(mlx5_glue->dv_destroy_flow
7953                                   (dt->policer_rules[i]));
7954                         dt->policer_rules[i] = NULL;
7955                 }
7956         }
7957         if (dt->jump_actn) {
7958                 claim_zero(mlx5_glue->destroy_flow_action(dt->jump_actn));
7959                 dt->jump_actn = NULL;
7960         }
7961 }
7962
7963 /**
7964  * Destroy policer rules.
7965  *
7966  * @param[in] dev
7967  *   Pointer to Ethernet device.
7968  * @param[in] fm
7969  *   Pointer to flow meter structure.
7970  * @param[in] attr
7971  *   Pointer to flow attributes.
7972  *
7973  * @return
7974  *   Always 0.
7975  */
7976 static int
7977 flow_dv_destroy_policer_rules(struct rte_eth_dev *dev __rte_unused,
7978                               const struct mlx5_flow_meter *fm,
7979                               const struct rte_flow_attr *attr)
7980 {
7981         struct mlx5_meter_domains_infos *mtb = fm ? fm->mfts : NULL;
7982
7983         if (!mtb)
7984                 return 0;
7985         if (attr->egress)
7986                 flow_dv_destroy_domain_policer_rule(&mtb->egress);
7987         if (attr->ingress)
7988                 flow_dv_destroy_domain_policer_rule(&mtb->ingress);
7989         if (attr->transfer)
7990                 flow_dv_destroy_domain_policer_rule(&mtb->transfer);
7991         return 0;
7992 }
7993
7994 /**
7995  * Create specify domain meter policer rule.
7996  *
7997  * @param[in] fm
7998  *   Pointer to flow meter structure.
7999  * @param[in] mtb
8000  *   Pointer to DV meter table set.
8001  * @param[in] sfx_tb
8002  *   Pointer to suffix table.
8003  * @param[in] mtr_reg_c
8004  *   Color match REG_C.
8005  *
8006  * @return
8007  *   0 on success, -1 otherwise.
8008  */
8009 static int
8010 flow_dv_create_policer_forward_rule(struct mlx5_flow_meter *fm,
8011                                     struct mlx5_meter_domain_info *dtb,
8012                                     struct mlx5_flow_tbl_resource *sfx_tb,
8013                                     uint8_t mtr_reg_c)
8014 {
8015         struct mlx5_flow_dv_match_params matcher = {
8016                 .size = sizeof(matcher.buf),
8017         };
8018         struct mlx5_flow_dv_match_params value = {
8019                 .size = sizeof(value.buf),
8020         };
8021         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8022         void *actions[METER_ACTIONS];
8023         int i;
8024
8025         /* Create jump action. */
8026         if (!sfx_tb)
8027                 return -1;
8028         if (!dtb->jump_actn)
8029                 dtb->jump_actn =
8030                         mlx5_glue->dr_create_flow_action_dest_flow_tbl
8031                                                         (sfx_tb->obj);
8032         if (!dtb->jump_actn) {
8033                 DRV_LOG(ERR, "Failed to create policer jump action.");
8034                 goto error;
8035         }
8036         for (i = 0; i < RTE_MTR_DROPPED; i++) {
8037                 int j = 0;
8038
8039                 flow_dv_match_meta_reg(matcher.buf, value.buf, mtr_reg_c,
8040                                        rte_col_2_mlx5_col(i), UINT32_MAX);
8041                 if (mtb->count_actns[i])
8042                         actions[j++] = mtb->count_actns[i];
8043                 if (fm->params.action[i] == MTR_POLICER_ACTION_DROP)
8044                         actions[j++] = mtb->drop_actn;
8045                 else
8046                         actions[j++] = dtb->jump_actn;
8047                 dtb->policer_rules[i] =
8048                         mlx5_glue->dv_create_flow(dtb->color_matcher,
8049                                                  (void *)&value,
8050                                                   j, actions);
8051                 if (!dtb->policer_rules[i]) {
8052                         DRV_LOG(ERR, "Failed to create policer rule.");
8053                         goto error;
8054                 }
8055         }
8056         return 0;
8057 error:
8058         rte_errno = errno;
8059         return -1;
8060 }
8061
8062 /**
8063  * Create policer rules.
8064  *
8065  * @param[in] dev
8066  *   Pointer to Ethernet device.
8067  * @param[in] fm
8068  *   Pointer to flow meter structure.
8069  * @param[in] attr
8070  *   Pointer to flow attributes.
8071  *
8072  * @return
8073  *   0 on success, -1 otherwise.
8074  */
8075 static int
8076 flow_dv_create_policer_rules(struct rte_eth_dev *dev,
8077                              struct mlx5_flow_meter *fm,
8078                              const struct rte_flow_attr *attr)
8079 {
8080         struct mlx5_priv *priv = dev->data->dev_private;
8081         struct mlx5_meter_domains_infos *mtb = fm->mfts;
8082         int ret;
8083
8084         if (attr->egress) {
8085                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->egress,
8086                                                 priv->sh->tx_mtr_sfx_tbl,
8087                                                 priv->mtr_color_reg);
8088                 if (ret) {
8089                         DRV_LOG(ERR, "Failed to create egress policer.");
8090                         goto error;
8091                 }
8092         }
8093         if (attr->ingress) {
8094                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->ingress,
8095                                                 priv->sh->rx_mtr_sfx_tbl,
8096                                                 priv->mtr_color_reg);
8097                 if (ret) {
8098                         DRV_LOG(ERR, "Failed to create ingress policer.");
8099                         goto error;
8100                 }
8101         }
8102         if (attr->transfer) {
8103                 ret = flow_dv_create_policer_forward_rule(fm, &mtb->transfer,
8104                                                 priv->sh->fdb_mtr_sfx_tbl,
8105                                                 priv->mtr_color_reg);
8106                 if (ret) {
8107                         DRV_LOG(ERR, "Failed to create transfer policer.");
8108                         goto error;
8109                 }
8110         }
8111         return 0;
8112 error:
8113         flow_dv_destroy_policer_rules(dev, fm, attr);
8114         return -1;
8115 }
8116
8117 /**
8118  * Query a devx counter.
8119  *
8120  * @param[in] dev
8121  *   Pointer to the Ethernet device structure.
8122  * @param[in] cnt
8123  *   Pointer to the flow counter.
8124  * @param[in] clear
8125  *   Set to clear the counter statistics.
8126  * @param[out] pkts
8127  *   The statistics value of packets.
8128  * @param[out] bytes
8129  *   The statistics value of bytes.
8130  *
8131  * @return
8132  *   0 on success, otherwise return -1.
8133  */
8134 static int
8135 flow_dv_counter_query(struct rte_eth_dev *dev,
8136                       struct mlx5_flow_counter *cnt, bool clear,
8137                       uint64_t *pkts, uint64_t *bytes)
8138 {
8139         struct mlx5_priv *priv = dev->data->dev_private;
8140         uint64_t inn_pkts, inn_bytes;
8141         int ret;
8142
8143         if (!priv->config.devx)
8144                 return -1;
8145         ret = _flow_dv_query_count(dev, cnt, &inn_pkts, &inn_bytes);
8146         if (ret)
8147                 return -1;
8148         *pkts = inn_pkts - cnt->hits;
8149         *bytes = inn_bytes - cnt->bytes;
8150         if (clear) {
8151                 cnt->hits = inn_pkts;
8152                 cnt->bytes = inn_bytes;
8153         }
8154         return 0;
8155 }
8156
8157 /*
8158  * Mutex-protected thunk to lock-free  __flow_dv_translate().
8159  */
8160 static int
8161 flow_dv_translate(struct rte_eth_dev *dev,
8162                   struct mlx5_flow *dev_flow,
8163                   const struct rte_flow_attr *attr,
8164                   const struct rte_flow_item items[],
8165                   const struct rte_flow_action actions[],
8166                   struct rte_flow_error *error)
8167 {
8168         int ret;
8169
8170         flow_dv_shared_lock(dev);
8171         ret = __flow_dv_translate(dev, dev_flow, attr, items, actions, error);
8172         flow_dv_shared_unlock(dev);
8173         return ret;
8174 }
8175
8176 /*
8177  * Mutex-protected thunk to lock-free  __flow_dv_apply().
8178  */
8179 static int
8180 flow_dv_apply(struct rte_eth_dev *dev,
8181               struct rte_flow *flow,
8182               struct rte_flow_error *error)
8183 {
8184         int ret;
8185
8186         flow_dv_shared_lock(dev);
8187         ret = __flow_dv_apply(dev, flow, error);
8188         flow_dv_shared_unlock(dev);
8189         return ret;
8190 }
8191
8192 /*
8193  * Mutex-protected thunk to lock-free __flow_dv_remove().
8194  */
8195 static void
8196 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
8197 {
8198         flow_dv_shared_lock(dev);
8199         __flow_dv_remove(dev, flow);
8200         flow_dv_shared_unlock(dev);
8201 }
8202
8203 /*
8204  * Mutex-protected thunk to lock-free __flow_dv_destroy().
8205  */
8206 static void
8207 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
8208 {
8209         flow_dv_shared_lock(dev);
8210         __flow_dv_destroy(dev, flow);
8211         flow_dv_shared_unlock(dev);
8212 }
8213
8214 /*
8215  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
8216  */
8217 static struct mlx5_flow_counter *
8218 flow_dv_counter_allocate(struct rte_eth_dev *dev)
8219 {
8220         struct mlx5_flow_counter *cnt;
8221
8222         flow_dv_shared_lock(dev);
8223         cnt = flow_dv_counter_alloc(dev, 0, 0, 1);
8224         flow_dv_shared_unlock(dev);
8225         return cnt;
8226 }
8227
8228 /*
8229  * Mutex-protected thunk to lock-free flow_dv_counter_release().
8230  */
8231 static void
8232 flow_dv_counter_free(struct rte_eth_dev *dev, struct mlx5_flow_counter *cnt)
8233 {
8234         flow_dv_shared_lock(dev);
8235         flow_dv_counter_release(dev, cnt);
8236         flow_dv_shared_unlock(dev);
8237 }
8238
8239 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
8240         .validate = flow_dv_validate,
8241         .prepare = flow_dv_prepare,
8242         .translate = flow_dv_translate,
8243         .apply = flow_dv_apply,
8244         .remove = flow_dv_remove,
8245         .destroy = flow_dv_destroy,
8246         .query = flow_dv_query,
8247         .create_mtr_tbls = flow_dv_create_mtr_tbl,
8248         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbl,
8249         .create_policer_rules = flow_dv_create_policer_rules,
8250         .destroy_policer_rules = flow_dv_destroy_policer_rules,
8251         .counter_alloc = flow_dv_counter_allocate,
8252         .counter_free = flow_dv_counter_free,
8253         .counter_query = flow_dv_counter_query,
8254 };
8255
8256 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */