drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_bus_pci.h>
  19 #include <rte_ip.h>
  20 #include <rte_gre.h>
  21 #include <rte_vxlan.h>
  22 #include <rte_gtp.h>
  23 #include <rte_eal_paging.h>
  24 #include <rte_mpls.h>
  25 #include <rte_mtr.h>
  26 #include <rte_mtr_driver.h>
  27 #include <rte_tailq.h>
  28
  29 #include <mlx5_glue.h>
  30 #include <mlx5_devx_cmds.h>
  31 #include <mlx5_prm.h>
  32 #include <mlx5_malloc.h>
  33
  34 #include "mlx5_defs.h"
  35 #include "mlx5.h"
  36 #include "mlx5_common_os.h"
  37 #include "mlx5_flow.h"
  38 #include "mlx5_flow_os.h"
  39 #include "mlx5_rx.h"
  40 #include "mlx5_tx.h"
  41 #include "rte_pmd_mlx5.h"
  42
  43 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  44
  45 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  46 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  47 #endif
  48
  49 #ifndef HAVE_MLX5DV_DR_ESWITCH
  50 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  51 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  52 #endif
  53 #endif
  54
  55 #ifndef HAVE_MLX5DV_DR
  56 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  57 #endif
  58
  59 /* VLAN header definitions */
  60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  65
  66 union flow_dv_attr {
  67         struct {
  68                 uint32_t valid:1;
  69                 uint32_t ipv4:1;
  70                 uint32_t ipv6:1;
  71                 uint32_t tcp:1;
  72                 uint32_t udp:1;
  73                 uint32_t reserved:27;
  74         };
  75         uint32_t attr;
  76 };
  77
  78 static int
  79 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  80                              struct mlx5_flow_tbl_resource *tbl);
  81
  82 static int
  83 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  84                                      uint32_t encap_decap_idx);
  85
  86 static int
  87 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  88                                         uint32_t port_id);
  89 static void
  90 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  91
  92 static int
  93 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
  94                                   uint32_t rix_jump);
  95
  96 static int16_t
  97 flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
  98 {
  99         struct mlx5_priv *priv = dev->data->dev_private;
 100         struct mlx5_common_device *cdev = priv->sh->cdev;
 101
 102         if (cdev->config.hca_attr.esw_mgr_vport_id_valid)
 103                 return (int16_t)cdev->config.hca_attr.esw_mgr_vport_id;
 104
 105         if (priv->pci_dev == NULL)
 106                 return 0;
 107         switch (priv->pci_dev->id.device_id) {
 108         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
 109         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
 110         case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
 111                 return (int16_t)0xfffe;
 112         default:
 113                 return 0;
 114         }
 115 }
 116
 117 /**
 118  * Initialize flow attributes structure according to flow items' types.
 119  *
 120  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
 121  * mode. For tunnel mode, the items to be modified are the outermost ones.
 122  *
 123  * @param[in] item
 124  *   Pointer to item specification.
 125  * @param[out] attr
 126  *   Pointer to flow attributes structure.
 127  * @param[in] dev_flow
 128  *   Pointer to the sub flow.
 129  * @param[in] tunnel_decap
 130  *   Whether action is after tunnel decapsulation.
 131  */
 132 static void
 133 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 134                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 135 {
 136         uint64_t layers = dev_flow->handle->layers;
 137
 138         /*
 139          * If layers is already initialized, it means this dev_flow is the
 140          * suffix flow, the layers flags is set by the prefix flow. Need to
 141          * use the layer flags from prefix flow as the suffix flow may not
 142          * have the user defined items as the flow is split.
 143          */
 144         if (layers) {
 145                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 146                         attr->ipv4 = 1;
 147                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 148                         attr->ipv6 = 1;
 149                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 150                         attr->tcp = 1;
 151                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 152                         attr->udp = 1;
 153                 attr->valid = 1;
 154                 return;
 155         }
 156         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 157                 uint8_t next_protocol = 0xff;
 158                 switch (item->type) {
 159                 case RTE_FLOW_ITEM_TYPE_GRE:
 160                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 161                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 162                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 163                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 164                 case RTE_FLOW_ITEM_TYPE_MPLS:
 165                 case RTE_FLOW_ITEM_TYPE_GTP:
 166                         if (tunnel_decap)
 167                                 attr->attr = 0;
 168                         break;
 169                 case RTE_FLOW_ITEM_TYPE_IPV4:
 170                         if (!attr->ipv6)
 171                                 attr->ipv4 = 1;
 172                         if (item->mask != NULL &&
 173                             ((const struct rte_flow_item_ipv4 *)
 174                             item->mask)->hdr.next_proto_id)
 175                                 next_protocol =
 176                                     ((const struct rte_flow_item_ipv4 *)
 177                                       (item->spec))->hdr.next_proto_id &
 178                                     ((const struct rte_flow_item_ipv4 *)
 179                                       (item->mask))->hdr.next_proto_id;
 180                         if ((next_protocol == IPPROTO_IPIP ||
 181                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 182                                 attr->attr = 0;
 183                         break;
 184                 case RTE_FLOW_ITEM_TYPE_IPV6:
 185                         if (!attr->ipv4)
 186                                 attr->ipv6 = 1;
 187                         if (item->mask != NULL &&
 188                             ((const struct rte_flow_item_ipv6 *)
 189                             item->mask)->hdr.proto)
 190                                 next_protocol =
 191                                     ((const struct rte_flow_item_ipv6 *)
 192                                       (item->spec))->hdr.proto &
 193                                     ((const struct rte_flow_item_ipv6 *)
 194                                       (item->mask))->hdr.proto;
 195                         if ((next_protocol == IPPROTO_IPIP ||
 196                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 197                                 attr->attr = 0;
 198                         break;
 199                 case RTE_FLOW_ITEM_TYPE_UDP:
 200                         if (!attr->tcp)
 201                                 attr->udp = 1;
 202                         break;
 203                 case RTE_FLOW_ITEM_TYPE_TCP:
 204                         if (!attr->udp)
 205                                 attr->tcp = 1;
 206                         break;
 207                 default:
 208                         break;
 209                 }
 210         }
 211         attr->valid = 1;
 212 }
 213
 214 /*
 215  * Convert rte_mtr_color to mlx5 color.
 216  *
 217  * @param[in] rcol
 218  *   rte_mtr_color.
 219  *
 220  * @return
 221  *   mlx5 color.
 222  */
 223 static inline int
 224 rte_col_2_mlx5_col(enum rte_color rcol)
 225 {
 226         switch (rcol) {
 227         case RTE_COLOR_GREEN:
 228                 return MLX5_FLOW_COLOR_GREEN;
 229         case RTE_COLOR_YELLOW:
 230                 return MLX5_FLOW_COLOR_YELLOW;
 231         case RTE_COLOR_RED:
 232                 return MLX5_FLOW_COLOR_RED;
 233         default:
 234                 break;
 235         }
 236         return MLX5_FLOW_COLOR_UNDEFINED;
 237 }
 238
 239 struct field_modify_info {
 240         uint32_t size; /* Size of field in protocol header, in bytes. */
 241         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 242         enum mlx5_modification_field id;
 243 };
 244
 245 struct field_modify_info modify_eth[] = {
 246         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 247         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 248         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 249         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 250         {0, 0, 0},
 251 };
 252
 253 struct field_modify_info modify_vlan_out_first_vid[] = {
 254         /* Size in bits !!! */
 255         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 256         {0, 0, 0},
 257 };
 258
 259 struct field_modify_info modify_ipv4[] = {
 260         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 261         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 262         {4, 12, MLX5_MODI_OUT_SIPV4},
 263         {4, 16, MLX5_MODI_OUT_DIPV4},
 264         {0, 0, 0},
 265 };
 266
 267 struct field_modify_info modify_ipv6[] = {
 268         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 269         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 270         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 271         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 272         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 273         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 274         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 275         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 276         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 277         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 278         {0, 0, 0},
 279 };
 280
 281 struct field_modify_info modify_udp[] = {
 282         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 283         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 284         {0, 0, 0},
 285 };
 286
 287 struct field_modify_info modify_tcp[] = {
 288         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 289         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 290         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 291         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 292         {0, 0, 0},
 293 };
 294
 295 static void
 296 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 297                           uint8_t next_protocol, uint64_t *item_flags,
 298                           int *tunnel)
 299 {
 300         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 301                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 302         if (next_protocol == IPPROTO_IPIP) {
 303                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 304                 *tunnel = 1;
 305         }
 306         if (next_protocol == IPPROTO_IPV6) {
 307                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 308                 *tunnel = 1;
 309         }
 310 }
 311
 312 static inline struct mlx5_hlist *
 313 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
 314                      const char *name, uint32_t size, bool direct_key,
 315                      bool lcores_share, void *ctx,
 316                      mlx5_list_create_cb cb_create,
 317                      mlx5_list_match_cb cb_match,
 318                      mlx5_list_remove_cb cb_remove,
 319                      mlx5_list_clone_cb cb_clone,
 320                      mlx5_list_clone_free_cb cb_clone_free,
 321                      struct rte_flow_error *error)
 322 {
 323         struct mlx5_hlist *hl;
 324         struct mlx5_hlist *expected = NULL;
 325         char s[MLX5_NAME_SIZE];
 326
 327         hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 328         if (likely(hl))
 329                 return hl;
 330         snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
 331         hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
 332                         ctx, cb_create, cb_match, cb_remove, cb_clone,
 333                         cb_clone_free);
 334         if (!hl) {
 335                 DRV_LOG(ERR, "%s hash creation failed", name);
 336                 rte_flow_error_set(error, ENOMEM,
 337                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
 338                                    "cannot allocate resource memory");
 339                 return NULL;
 340         }
 341         if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
 342                                          __ATOMIC_SEQ_CST,
 343                                          __ATOMIC_SEQ_CST)) {
 344                 mlx5_hlist_destroy(hl);
 345                 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 346         }
 347         return hl;
 348 }
 349
 350 /* Update VLAN's VID/PCP based on input rte_flow_action.
 351  *
 352  * @param[in] action
 353  *   Pointer to struct rte_flow_action.
 354  * @param[out] vlan
 355  *   Pointer to struct rte_vlan_hdr.
 356  */
 357 static void
 358 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 359                          struct rte_vlan_hdr *vlan)
 360 {
 361         uint16_t vlan_tci;
 362         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 363                 vlan_tci =
 364                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 365                                                action->conf)->vlan_pcp;
 366                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 367                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 368                 vlan->vlan_tci |= vlan_tci;
 369         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 370                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 371                 vlan->vlan_tci |= rte_be_to_cpu_16
 372                     (((const struct rte_flow_action_of_set_vlan_vid *)
 373                                              action->conf)->vlan_vid);
 374         }
 375 }
 376
 377 /**
 378  * Fetch 1, 2, 3 or 4 byte field from the byte array
 379  * and return as unsigned integer in host-endian format.
 380  *
 381  * @param[in] data
 382  *   Pointer to data array.
 383  * @param[in] size
 384  *   Size of field to extract.
 385  *
 386  * @return
 387  *   converted field in host endian format.
 388  */
 389 static inline uint32_t
 390 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 391 {
 392         uint32_t ret;
 393
 394         switch (size) {
 395         case 1:
 396                 ret = *data;
 397                 break;
 398         case 2:
 399                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 400                 break;
 401         case 3:
 402                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 403                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 404                 break;
 405         case 4:
 406                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 407                 break;
 408         default:
 409                 MLX5_ASSERT(false);
 410                 ret = 0;
 411                 break;
 412         }
 413         return ret;
 414 }
 415
 416 /**
 417  * Convert modify-header action to DV specification.
 418  *
 419  * Data length of each action is determined by provided field description
 420  * and the item mask. Data bit offset and width of each action is determined
 421  * by provided item mask.
 422  *
 423  * @param[in] item
 424  *   Pointer to item specification.
 425  * @param[in] field
 426  *   Pointer to field modification information.
 427  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 428  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 429  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 430  * @param[in] dcopy
 431  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 432  *   Negative offset value sets the same offset as source offset.
 433  *   size field is ignored, value is taken from source field.
 434  * @param[in,out] resource
 435  *   Pointer to the modify-header resource.
 436  * @param[in] type
 437  *   Type of modification.
 438  * @param[out] error
 439  *   Pointer to the error structure.
 440  *
 441  * @return
 442  *   0 on success, a negative errno value otherwise and rte_errno is set.
 443  */
 444 static int
 445 flow_dv_convert_modify_action(struct rte_flow_item *item,
 446                               struct field_modify_info *field,
 447                               struct field_modify_info *dcopy,
 448                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 449                               uint32_t type, struct rte_flow_error *error)
 450 {
 451         uint32_t i = resource->actions_num;
 452         struct mlx5_modification_cmd *actions = resource->actions;
 453         uint32_t carry_b = 0;
 454
 455         /*
 456          * The item and mask are provided in big-endian format.
 457          * The fields should be presented as in big-endian format either.
 458          * Mask must be always present, it defines the actual field width.
 459          */
 460         MLX5_ASSERT(item->mask);
 461         MLX5_ASSERT(field->size);
 462         do {
 463                 uint32_t size_b;
 464                 uint32_t off_b;
 465                 uint32_t mask;
 466                 uint32_t data;
 467                 bool next_field = true;
 468                 bool next_dcopy = true;
 469
 470                 if (i >= MLX5_MAX_MODIFY_NUM)
 471                         return rte_flow_error_set(error, EINVAL,
 472                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 473                                  "too many items to modify");
 474                 /* Fetch variable byte size mask from the array. */
 475                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 476                                            field->offset, field->size);
 477                 if (!mask) {
 478                         ++field;
 479                         continue;
 480                 }
 481                 /* Deduce actual data width in bits from mask value. */
 482                 off_b = rte_bsf32(mask) + carry_b;
 483                 size_b = sizeof(uint32_t) * CHAR_BIT -
 484                          off_b - __builtin_clz(mask);
 485                 MLX5_ASSERT(size_b);
 486                 actions[i] = (struct mlx5_modification_cmd) {
 487                         .action_type = type,
 488                         .field = field->id,
 489                         .offset = off_b,
 490                         .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
 491                                 0 : size_b,
 492                 };
 493                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 494                         MLX5_ASSERT(dcopy);
 495                         actions[i].dst_field = dcopy->id;
 496                         actions[i].dst_offset =
 497                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 498                         /* Convert entire record to big-endian format. */
 499                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 500                         /*
 501                          * Destination field overflow. Copy leftovers of
 502                          * a source field to the next destination field.
 503                          */
 504                         carry_b = 0;
 505                         if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
 506                             dcopy->size != 0) {
 507                                 actions[i].length =
 508                                         dcopy->size * CHAR_BIT - dcopy->offset;
 509                                 carry_b = actions[i].length;
 510                                 next_field = false;
 511                         }
 512                         /*
 513                          * Not enough bits in a source filed to fill a
 514                          * destination field. Switch to the next source.
 515                          */
 516                         if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
 517                             (size_b == field->size * CHAR_BIT - off_b)) {
 518                                 actions[i].length =
 519                                         field->size * CHAR_BIT - off_b;
 520                                 dcopy->offset += actions[i].length;
 521                                 next_dcopy = false;
 522                         }
 523                         if (next_dcopy)
 524                                 ++dcopy;
 525                 } else {
 526                         MLX5_ASSERT(item->spec);
 527                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 528                                                    field->offset, field->size);
 529                         /* Shift out the trailing masked bits from data. */
 530                         data = (data & mask) >> off_b;
 531                         actions[i].data1 = rte_cpu_to_be_32(data);
 532                 }
 533                 /* Convert entire record to expected big-endian format. */
 534                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 535                 if (next_field)
 536                         ++field;
 537                 ++i;
 538         } while (field->size);
 539         if (resource->actions_num == i)
 540                 return rte_flow_error_set(error, EINVAL,
 541                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 542                                           "invalid modification flow item");
 543         resource->actions_num = i;
 544         return 0;
 545 }
 546
 547 /**
 548  * Convert modify-header set IPv4 address action to DV specification.
 549  *
 550  * @param[in,out] resource
 551  *   Pointer to the modify-header resource.
 552  * @param[in] action
 553  *   Pointer to action specification.
 554  * @param[out] error
 555  *   Pointer to the error structure.
 556  *
 557  * @return
 558  *   0 on success, a negative errno value otherwise and rte_errno is set.
 559  */
 560 static int
 561 flow_dv_convert_action_modify_ipv4
 562                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 563                          const struct rte_flow_action *action,
 564                          struct rte_flow_error *error)
 565 {
 566         const struct rte_flow_action_set_ipv4 *conf =
 567                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 568         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 569         struct rte_flow_item_ipv4 ipv4;
 570         struct rte_flow_item_ipv4 ipv4_mask;
 571
 572         memset(&ipv4, 0, sizeof(ipv4));
 573         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 574         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 575                 ipv4.hdr.src_addr = conf->ipv4_addr;
 576                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 577         } else {
 578                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 579                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 580         }
 581         item.spec = &ipv4;
 582         item.mask = &ipv4_mask;
 583         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 584                                              MLX5_MODIFICATION_TYPE_SET, error);
 585 }
 586
 587 /**
 588  * Convert modify-header set IPv6 address action to DV specification.
 589  *
 590  * @param[in,out] resource
 591  *   Pointer to the modify-header resource.
 592  * @param[in] action
 593  *   Pointer to action specification.
 594  * @param[out] error
 595  *   Pointer to the error structure.
 596  *
 597  * @return
 598  *   0 on success, a negative errno value otherwise and rte_errno is set.
 599  */
 600 static int
 601 flow_dv_convert_action_modify_ipv6
 602                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 603                          const struct rte_flow_action *action,
 604                          struct rte_flow_error *error)
 605 {
 606         const struct rte_flow_action_set_ipv6 *conf =
 607                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 608         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 609         struct rte_flow_item_ipv6 ipv6;
 610         struct rte_flow_item_ipv6 ipv6_mask;
 611
 612         memset(&ipv6, 0, sizeof(ipv6));
 613         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 614         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 615                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 616                        sizeof(ipv6.hdr.src_addr));
 617                 memcpy(&ipv6_mask.hdr.src_addr,
 618                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 619                        sizeof(ipv6.hdr.src_addr));
 620         } else {
 621                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 622                        sizeof(ipv6.hdr.dst_addr));
 623                 memcpy(&ipv6_mask.hdr.dst_addr,
 624                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 625                        sizeof(ipv6.hdr.dst_addr));
 626         }
 627         item.spec = &ipv6;
 628         item.mask = &ipv6_mask;
 629         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 630                                              MLX5_MODIFICATION_TYPE_SET, error);
 631 }
 632
 633 /**
 634  * Convert modify-header set MAC address action to DV specification.
 635  *
 636  * @param[in,out] resource
 637  *   Pointer to the modify-header resource.
 638  * @param[in] action
 639  *   Pointer to action specification.
 640  * @param[out] error
 641  *   Pointer to the error structure.
 642  *
 643  * @return
 644  *   0 on success, a negative errno value otherwise and rte_errno is set.
 645  */
 646 static int
 647 flow_dv_convert_action_modify_mac
 648                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 649                          const struct rte_flow_action *action,
 650                          struct rte_flow_error *error)
 651 {
 652         const struct rte_flow_action_set_mac *conf =
 653                 (const struct rte_flow_action_set_mac *)(action->conf);
 654         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 655         struct rte_flow_item_eth eth;
 656         struct rte_flow_item_eth eth_mask;
 657
 658         memset(&eth, 0, sizeof(eth));
 659         memset(&eth_mask, 0, sizeof(eth_mask));
 660         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 661                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 662                        sizeof(eth.src.addr_bytes));
 663                 memcpy(&eth_mask.src.addr_bytes,
 664                        &rte_flow_item_eth_mask.src.addr_bytes,
 665                        sizeof(eth_mask.src.addr_bytes));
 666         } else {
 667                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 668                        sizeof(eth.dst.addr_bytes));
 669                 memcpy(&eth_mask.dst.addr_bytes,
 670                        &rte_flow_item_eth_mask.dst.addr_bytes,
 671                        sizeof(eth_mask.dst.addr_bytes));
 672         }
 673         item.spec = &eth;
 674         item.mask = &eth_mask;
 675         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 676                                              MLX5_MODIFICATION_TYPE_SET, error);
 677 }
 678
 679 /**
 680  * Convert modify-header set VLAN VID action to DV specification.
 681  *
 682  * @param[in,out] resource
 683  *   Pointer to the modify-header resource.
 684  * @param[in] action
 685  *   Pointer to action specification.
 686  * @param[out] error
 687  *   Pointer to the error structure.
 688  *
 689  * @return
 690  *   0 on success, a negative errno value otherwise and rte_errno is set.
 691  */
 692 static int
 693 flow_dv_convert_action_modify_vlan_vid
 694                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 695                          const struct rte_flow_action *action,
 696                          struct rte_flow_error *error)
 697 {
 698         const struct rte_flow_action_of_set_vlan_vid *conf =
 699                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 700         int i = resource->actions_num;
 701         struct mlx5_modification_cmd *actions = resource->actions;
 702         struct field_modify_info *field = modify_vlan_out_first_vid;
 703
 704         if (i >= MLX5_MAX_MODIFY_NUM)
 705                 return rte_flow_error_set(error, EINVAL,
 706                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 707                          "too many items to modify");
 708         actions[i] = (struct mlx5_modification_cmd) {
 709                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 710                 .field = field->id,
 711                 .length = field->size,
 712                 .offset = field->offset,
 713         };
 714         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 715         actions[i].data1 = conf->vlan_vid;
 716         actions[i].data1 = actions[i].data1 << 16;
 717         resource->actions_num = ++i;
 718         return 0;
 719 }
 720
 721 /**
 722  * Convert modify-header set TP action to DV specification.
 723  *
 724  * @param[in,out] resource
 725  *   Pointer to the modify-header resource.
 726  * @param[in] action
 727  *   Pointer to action specification.
 728  * @param[in] items
 729  *   Pointer to rte_flow_item objects list.
 730  * @param[in] attr
 731  *   Pointer to flow attributes structure.
 732  * @param[in] dev_flow
 733  *   Pointer to the sub flow.
 734  * @param[in] tunnel_decap
 735  *   Whether action is after tunnel decapsulation.
 736  * @param[out] error
 737  *   Pointer to the error structure.
 738  *
 739  * @return
 740  *   0 on success, a negative errno value otherwise and rte_errno is set.
 741  */
 742 static int
 743 flow_dv_convert_action_modify_tp
 744                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 745                          const struct rte_flow_action *action,
 746                          const struct rte_flow_item *items,
 747                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 748                          bool tunnel_decap, struct rte_flow_error *error)
 749 {
 750         const struct rte_flow_action_set_tp *conf =
 751                 (const struct rte_flow_action_set_tp *)(action->conf);
 752         struct rte_flow_item item;
 753         struct rte_flow_item_udp udp;
 754         struct rte_flow_item_udp udp_mask;
 755         struct rte_flow_item_tcp tcp;
 756         struct rte_flow_item_tcp tcp_mask;
 757         struct field_modify_info *field;
 758
 759         if (!attr->valid)
 760                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 761         if (attr->udp) {
 762                 memset(&udp, 0, sizeof(udp));
 763                 memset(&udp_mask, 0, sizeof(udp_mask));
 764                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 765                         udp.hdr.src_port = conf->port;
 766                         udp_mask.hdr.src_port =
 767                                         rte_flow_item_udp_mask.hdr.src_port;
 768                 } else {
 769                         udp.hdr.dst_port = conf->port;
 770                         udp_mask.hdr.dst_port =
 771                                         rte_flow_item_udp_mask.hdr.dst_port;
 772                 }
 773                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 774                 item.spec = &udp;
 775                 item.mask = &udp_mask;
 776                 field = modify_udp;
 777         } else {
 778                 MLX5_ASSERT(attr->tcp);
 779                 memset(&tcp, 0, sizeof(tcp));
 780                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 781                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 782                         tcp.hdr.src_port = conf->port;
 783                         tcp_mask.hdr.src_port =
 784                                         rte_flow_item_tcp_mask.hdr.src_port;
 785                 } else {
 786                         tcp.hdr.dst_port = conf->port;
 787                         tcp_mask.hdr.dst_port =
 788                                         rte_flow_item_tcp_mask.hdr.dst_port;
 789                 }
 790                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 791                 item.spec = &tcp;
 792                 item.mask = &tcp_mask;
 793                 field = modify_tcp;
 794         }
 795         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 796                                              MLX5_MODIFICATION_TYPE_SET, error);
 797 }
 798
 799 /**
 800  * Convert modify-header set TTL action to DV specification.
 801  *
 802  * @param[in,out] resource
 803  *   Pointer to the modify-header resource.
 804  * @param[in] action
 805  *   Pointer to action specification.
 806  * @param[in] items
 807  *   Pointer to rte_flow_item objects list.
 808  * @param[in] attr
 809  *   Pointer to flow attributes structure.
 810  * @param[in] dev_flow
 811  *   Pointer to the sub flow.
 812  * @param[in] tunnel_decap
 813  *   Whether action is after tunnel decapsulation.
 814  * @param[out] error
 815  *   Pointer to the error structure.
 816  *
 817  * @return
 818  *   0 on success, a negative errno value otherwise and rte_errno is set.
 819  */
 820 static int
 821 flow_dv_convert_action_modify_ttl
 822                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 823                          const struct rte_flow_action *action,
 824                          const struct rte_flow_item *items,
 825                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 826                          bool tunnel_decap, struct rte_flow_error *error)
 827 {
 828         const struct rte_flow_action_set_ttl *conf =
 829                 (const struct rte_flow_action_set_ttl *)(action->conf);
 830         struct rte_flow_item item;
 831         struct rte_flow_item_ipv4 ipv4;
 832         struct rte_flow_item_ipv4 ipv4_mask;
 833         struct rte_flow_item_ipv6 ipv6;
 834         struct rte_flow_item_ipv6 ipv6_mask;
 835         struct field_modify_info *field;
 836
 837         if (!attr->valid)
 838                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 839         if (attr->ipv4) {
 840                 memset(&ipv4, 0, sizeof(ipv4));
 841                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 842                 ipv4.hdr.time_to_live = conf->ttl_value;
 843                 ipv4_mask.hdr.time_to_live = 0xFF;
 844                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 845                 item.spec = &ipv4;
 846                 item.mask = &ipv4_mask;
 847                 field = modify_ipv4;
 848         } else {
 849                 MLX5_ASSERT(attr->ipv6);
 850                 memset(&ipv6, 0, sizeof(ipv6));
 851                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 852                 ipv6.hdr.hop_limits = conf->ttl_value;
 853                 ipv6_mask.hdr.hop_limits = 0xFF;
 854                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 855                 item.spec = &ipv6;
 856                 item.mask = &ipv6_mask;
 857                 field = modify_ipv6;
 858         }
 859         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 860                                              MLX5_MODIFICATION_TYPE_SET, error);
 861 }
 862
 863 /**
 864  * Convert modify-header decrement TTL action to DV specification.
 865  *
 866  * @param[in,out] resource
 867  *   Pointer to the modify-header resource.
 868  * @param[in] action
 869  *   Pointer to action specification.
 870  * @param[in] items
 871  *   Pointer to rte_flow_item objects list.
 872  * @param[in] attr
 873  *   Pointer to flow attributes structure.
 874  * @param[in] dev_flow
 875  *   Pointer to the sub flow.
 876  * @param[in] tunnel_decap
 877  *   Whether action is after tunnel decapsulation.
 878  * @param[out] error
 879  *   Pointer to the error structure.
 880  *
 881  * @return
 882  *   0 on success, a negative errno value otherwise and rte_errno is set.
 883  */
 884 static int
 885 flow_dv_convert_action_modify_dec_ttl
 886                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 887                          const struct rte_flow_item *items,
 888                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 889                          bool tunnel_decap, struct rte_flow_error *error)
 890 {
 891         struct rte_flow_item item;
 892         struct rte_flow_item_ipv4 ipv4;
 893         struct rte_flow_item_ipv4 ipv4_mask;
 894         struct rte_flow_item_ipv6 ipv6;
 895         struct rte_flow_item_ipv6 ipv6_mask;
 896         struct field_modify_info *field;
 897
 898         if (!attr->valid)
 899                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 900         if (attr->ipv4) {
 901                 memset(&ipv4, 0, sizeof(ipv4));
 902                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 903                 ipv4.hdr.time_to_live = 0xFF;
 904                 ipv4_mask.hdr.time_to_live = 0xFF;
 905                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 906                 item.spec = &ipv4;
 907                 item.mask = &ipv4_mask;
 908                 field = modify_ipv4;
 909         } else {
 910                 MLX5_ASSERT(attr->ipv6);
 911                 memset(&ipv6, 0, sizeof(ipv6));
 912                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 913                 ipv6.hdr.hop_limits = 0xFF;
 914                 ipv6_mask.hdr.hop_limits = 0xFF;
 915                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 916                 item.spec = &ipv6;
 917                 item.mask = &ipv6_mask;
 918                 field = modify_ipv6;
 919         }
 920         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 921                                              MLX5_MODIFICATION_TYPE_ADD, error);
 922 }
 923
 924 /**
 925  * Convert modify-header increment/decrement TCP Sequence number
 926  * to DV specification.
 927  *
 928  * @param[in,out] resource
 929  *   Pointer to the modify-header resource.
 930  * @param[in] action
 931  *   Pointer to action specification.
 932  * @param[out] error
 933  *   Pointer to the error structure.
 934  *
 935  * @return
 936  *   0 on success, a negative errno value otherwise and rte_errno is set.
 937  */
 938 static int
 939 flow_dv_convert_action_modify_tcp_seq
 940                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 941                          const struct rte_flow_action *action,
 942                          struct rte_flow_error *error)
 943 {
 944         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 945         uint64_t value = rte_be_to_cpu_32(*conf);
 946         struct rte_flow_item item;
 947         struct rte_flow_item_tcp tcp;
 948         struct rte_flow_item_tcp tcp_mask;
 949
 950         memset(&tcp, 0, sizeof(tcp));
 951         memset(&tcp_mask, 0, sizeof(tcp_mask));
 952         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 953                 /*
 954                  * The HW has no decrement operation, only increment operation.
 955                  * To simulate decrement X from Y using increment operation
 956                  * we need to add UINT32_MAX X times to Y.
 957                  * Each adding of UINT32_MAX decrements Y by 1.
 958                  */
 959                 value *= UINT32_MAX;
 960         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 961         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 962         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 963         item.spec = &tcp;
 964         item.mask = &tcp_mask;
 965         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 966                                              MLX5_MODIFICATION_TYPE_ADD, error);
 967 }
 968
 969 /**
 970  * Convert modify-header increment/decrement TCP Acknowledgment number
 971  * to DV specification.
 972  *
 973  * @param[in,out] resource
 974  *   Pointer to the modify-header resource.
 975  * @param[in] action
 976  *   Pointer to action specification.
 977  * @param[out] error
 978  *   Pointer to the error structure.
 979  *
 980  * @return
 981  *   0 on success, a negative errno value otherwise and rte_errno is set.
 982  */
 983 static int
 984 flow_dv_convert_action_modify_tcp_ack
 985                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 986                          const struct rte_flow_action *action,
 987                          struct rte_flow_error *error)
 988 {
 989         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 990         uint64_t value = rte_be_to_cpu_32(*conf);
 991         struct rte_flow_item item;
 992         struct rte_flow_item_tcp tcp;
 993         struct rte_flow_item_tcp tcp_mask;
 994
 995         memset(&tcp, 0, sizeof(tcp));
 996         memset(&tcp_mask, 0, sizeof(tcp_mask));
 997         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 998                 /*
 999                  * The HW has no decrement operation, only increment operation.
1000                  * To simulate decrement X from Y using increment operation
1001                  * we need to add UINT32_MAX X times to Y.
1002                  * Each adding of UINT32_MAX decrements Y by 1.
1003                  */
1004                 value *= UINT32_MAX;
1005         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
1006         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
1007         item.type = RTE_FLOW_ITEM_TYPE_TCP;
1008         item.spec = &tcp;
1009         item.mask = &tcp_mask;
1010         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1011                                              MLX5_MODIFICATION_TYPE_ADD, error);
1012 }
1013
1014 static enum mlx5_modification_field reg_to_field[] = {
1015         [REG_NON] = MLX5_MODI_OUT_NONE,
1016         [REG_A] = MLX5_MODI_META_DATA_REG_A,
1017         [REG_B] = MLX5_MODI_META_DATA_REG_B,
1018         [REG_C_0] = MLX5_MODI_META_REG_C_0,
1019         [REG_C_1] = MLX5_MODI_META_REG_C_1,
1020         [REG_C_2] = MLX5_MODI_META_REG_C_2,
1021         [REG_C_3] = MLX5_MODI_META_REG_C_3,
1022         [REG_C_4] = MLX5_MODI_META_REG_C_4,
1023         [REG_C_5] = MLX5_MODI_META_REG_C_5,
1024         [REG_C_6] = MLX5_MODI_META_REG_C_6,
1025         [REG_C_7] = MLX5_MODI_META_REG_C_7,
1026 };
1027
1028 /**
1029  * Convert register set to DV specification.
1030  *
1031  * @param[in,out] resource
1032  *   Pointer to the modify-header resource.
1033  * @param[in] action
1034  *   Pointer to action specification.
1035  * @param[out] error
1036  *   Pointer to the error structure.
1037  *
1038  * @return
1039  *   0 on success, a negative errno value otherwise and rte_errno is set.
1040  */
1041 static int
1042 flow_dv_convert_action_set_reg
1043                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1044                          const struct rte_flow_action *action,
1045                          struct rte_flow_error *error)
1046 {
1047         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1048         struct mlx5_modification_cmd *actions = resource->actions;
1049         uint32_t i = resource->actions_num;
1050
1051         if (i >= MLX5_MAX_MODIFY_NUM)
1052                 return rte_flow_error_set(error, EINVAL,
1053                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1054                                           "too many items to modify");
1055         MLX5_ASSERT(conf->id != REG_NON);
1056         MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1057         actions[i] = (struct mlx5_modification_cmd) {
1058                 .action_type = MLX5_MODIFICATION_TYPE_SET,
1059                 .field = reg_to_field[conf->id],
1060                 .offset = conf->offset,
1061                 .length = conf->length,
1062         };
1063         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1064         actions[i].data1 = rte_cpu_to_be_32(conf->data);
1065         ++i;
1066         resource->actions_num = i;
1067         return 0;
1068 }
1069
1070 /**
1071  * Convert SET_TAG action to DV specification.
1072  *
1073  * @param[in] dev
1074  *   Pointer to the rte_eth_dev structure.
1075  * @param[in,out] resource
1076  *   Pointer to the modify-header resource.
1077  * @param[in] conf
1078  *   Pointer to action specification.
1079  * @param[out] error
1080  *   Pointer to the error structure.
1081  *
1082  * @return
1083  *   0 on success, a negative errno value otherwise and rte_errno is set.
1084  */
1085 static int
1086 flow_dv_convert_action_set_tag
1087                         (struct rte_eth_dev *dev,
1088                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1089                          const struct rte_flow_action_set_tag *conf,
1090                          struct rte_flow_error *error)
1091 {
1092         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1093         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1094         struct rte_flow_item item = {
1095                 .spec = &data,
1096                 .mask = &mask,
1097         };
1098         struct field_modify_info reg_c_x[] = {
1099                 [1] = {0, 0, 0},
1100         };
1101         enum mlx5_modification_field reg_type;
1102         int ret;
1103
1104         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1105         if (ret < 0)
1106                 return ret;
1107         MLX5_ASSERT(ret != REG_NON);
1108         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1109         reg_type = reg_to_field[ret];
1110         MLX5_ASSERT(reg_type > 0);
1111         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1112         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1113                                              MLX5_MODIFICATION_TYPE_SET, error);
1114 }
1115
1116 /**
1117  * Convert internal COPY_REG action to DV specification.
1118  *
1119  * @param[in] dev
1120  *   Pointer to the rte_eth_dev structure.
1121  * @param[in,out] res
1122  *   Pointer to the modify-header resource.
1123  * @param[in] action
1124  *   Pointer to action specification.
1125  * @param[out] error
1126  *   Pointer to the error structure.
1127  *
1128  * @return
1129  *   0 on success, a negative errno value otherwise and rte_errno is set.
1130  */
1131 static int
1132 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1133                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1134                                  const struct rte_flow_action *action,
1135                                  struct rte_flow_error *error)
1136 {
1137         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1138         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1139         struct rte_flow_item item = {
1140                 .spec = NULL,
1141                 .mask = &mask,
1142         };
1143         struct field_modify_info reg_src[] = {
1144                 {4, 0, reg_to_field[conf->src]},
1145                 {0, 0, 0},
1146         };
1147         struct field_modify_info reg_dst = {
1148                 .offset = 0,
1149                 .id = reg_to_field[conf->dst],
1150         };
1151         /* Adjust reg_c[0] usage according to reported mask. */
1152         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1153                 struct mlx5_priv *priv = dev->data->dev_private;
1154                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1155
1156                 MLX5_ASSERT(reg_c0);
1157                 MLX5_ASSERT(priv->sh->config.dv_xmeta_en !=
1158                             MLX5_XMETA_MODE_LEGACY);
1159                 if (conf->dst == REG_C_0) {
1160                         /* Copy to reg_c[0], within mask only. */
1161                         reg_dst.offset = rte_bsf32(reg_c0);
1162                         mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1163                 } else {
1164                         reg_dst.offset = 0;
1165                         mask = rte_cpu_to_be_32(reg_c0);
1166                 }
1167         }
1168         return flow_dv_convert_modify_action(&item,
1169                                              reg_src, &reg_dst, res,
1170                                              MLX5_MODIFICATION_TYPE_COPY,
1171                                              error);
1172 }
1173
1174 /**
1175  * Convert MARK action to DV specification. This routine is used
1176  * in extensive metadata only and requires metadata register to be
1177  * handled. In legacy mode hardware tag resource is engaged.
1178  *
1179  * @param[in] dev
1180  *   Pointer to the rte_eth_dev structure.
1181  * @param[in] conf
1182  *   Pointer to MARK action specification.
1183  * @param[in,out] resource
1184  *   Pointer to the modify-header resource.
1185  * @param[out] error
1186  *   Pointer to the error structure.
1187  *
1188  * @return
1189  *   0 on success, a negative errno value otherwise and rte_errno is set.
1190  */
1191 static int
1192 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1193                             const struct rte_flow_action_mark *conf,
1194                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1195                             struct rte_flow_error *error)
1196 {
1197         struct mlx5_priv *priv = dev->data->dev_private;
1198         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1199                                            priv->sh->dv_mark_mask);
1200         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1201         struct rte_flow_item item = {
1202                 .spec = &data,
1203                 .mask = &mask,
1204         };
1205         struct field_modify_info reg_c_x[] = {
1206                 [1] = {0, 0, 0},
1207         };
1208         int reg;
1209
1210         if (!mask)
1211                 return rte_flow_error_set(error, EINVAL,
1212                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1213                                           NULL, "zero mark action mask");
1214         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1215         if (reg < 0)
1216                 return reg;
1217         MLX5_ASSERT(reg > 0);
1218         if (reg == REG_C_0) {
1219                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1220                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1221
1222                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1223                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1224                 mask = rte_cpu_to_be_32(mask << shl_c0);
1225         }
1226         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1227         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1228                                              MLX5_MODIFICATION_TYPE_SET, error);
1229 }
1230
1231 /**
1232  * Get metadata register index for specified steering domain.
1233  *
1234  * @param[in] dev
1235  *   Pointer to the rte_eth_dev structure.
1236  * @param[in] attr
1237  *   Attributes of flow to determine steering domain.
1238  * @param[out] error
1239  *   Pointer to the error structure.
1240  *
1241  * @return
1242  *   positive index on success, a negative errno value otherwise
1243  *   and rte_errno is set.
1244  */
1245 static enum modify_reg
1246 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1247                          const struct rte_flow_attr *attr,
1248                          struct rte_flow_error *error)
1249 {
1250         int reg =
1251                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1252                                           MLX5_METADATA_FDB :
1253                                             attr->egress ?
1254                                             MLX5_METADATA_TX :
1255                                             MLX5_METADATA_RX, 0, error);
1256         if (reg < 0)
1257                 return rte_flow_error_set(error,
1258                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1259                                           NULL, "unavailable "
1260                                           "metadata register");
1261         return reg;
1262 }
1263
1264 /**
1265  * Convert SET_META action to DV specification.
1266  *
1267  * @param[in] dev
1268  *   Pointer to the rte_eth_dev structure.
1269  * @param[in,out] resource
1270  *   Pointer to the modify-header resource.
1271  * @param[in] attr
1272  *   Attributes of flow that includes this item.
1273  * @param[in] conf
1274  *   Pointer to action specification.
1275  * @param[out] error
1276  *   Pointer to the error structure.
1277  *
1278  * @return
1279  *   0 on success, a negative errno value otherwise and rte_errno is set.
1280  */
1281 static int
1282 flow_dv_convert_action_set_meta
1283                         (struct rte_eth_dev *dev,
1284                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1285                          const struct rte_flow_attr *attr,
1286                          const struct rte_flow_action_set_meta *conf,
1287                          struct rte_flow_error *error)
1288 {
1289         uint32_t mask = rte_cpu_to_be_32(conf->mask);
1290         uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1291         struct rte_flow_item item = {
1292                 .spec = &data,
1293                 .mask = &mask,
1294         };
1295         struct field_modify_info reg_c_x[] = {
1296                 [1] = {0, 0, 0},
1297         };
1298         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1299
1300         if (reg < 0)
1301                 return reg;
1302         MLX5_ASSERT(reg != REG_NON);
1303         if (reg == REG_C_0) {
1304                 struct mlx5_priv *priv = dev->data->dev_private;
1305                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1306                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1307
1308                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1309                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1310                 mask = rte_cpu_to_be_32(mask << shl_c0);
1311         }
1312         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1313         /* The routine expects parameters in memory as big-endian ones. */
1314         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1315                                              MLX5_MODIFICATION_TYPE_SET, error);
1316 }
1317
1318 /**
1319  * Convert modify-header set IPv4 DSCP action to DV specification.
1320  *
1321  * @param[in,out] resource
1322  *   Pointer to the modify-header resource.
1323  * @param[in] action
1324  *   Pointer to action specification.
1325  * @param[out] error
1326  *   Pointer to the error structure.
1327  *
1328  * @return
1329  *   0 on success, a negative errno value otherwise and rte_errno is set.
1330  */
1331 static int
1332 flow_dv_convert_action_modify_ipv4_dscp
1333                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1334                          const struct rte_flow_action *action,
1335                          struct rte_flow_error *error)
1336 {
1337         const struct rte_flow_action_set_dscp *conf =
1338                 (const struct rte_flow_action_set_dscp *)(action->conf);
1339         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1340         struct rte_flow_item_ipv4 ipv4;
1341         struct rte_flow_item_ipv4 ipv4_mask;
1342
1343         memset(&ipv4, 0, sizeof(ipv4));
1344         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1345         ipv4.hdr.type_of_service = conf->dscp;
1346         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1347         item.spec = &ipv4;
1348         item.mask = &ipv4_mask;
1349         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1350                                              MLX5_MODIFICATION_TYPE_SET, error);
1351 }
1352
1353 /**
1354  * Convert modify-header set IPv6 DSCP action to DV specification.
1355  *
1356  * @param[in,out] resource
1357  *   Pointer to the modify-header resource.
1358  * @param[in] action
1359  *   Pointer to action specification.
1360  * @param[out] error
1361  *   Pointer to the error structure.
1362  *
1363  * @return
1364  *   0 on success, a negative errno value otherwise and rte_errno is set.
1365  */
1366 static int
1367 flow_dv_convert_action_modify_ipv6_dscp
1368                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1369                          const struct rte_flow_action *action,
1370                          struct rte_flow_error *error)
1371 {
1372         const struct rte_flow_action_set_dscp *conf =
1373                 (const struct rte_flow_action_set_dscp *)(action->conf);
1374         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1375         struct rte_flow_item_ipv6 ipv6;
1376         struct rte_flow_item_ipv6 ipv6_mask;
1377
1378         memset(&ipv6, 0, sizeof(ipv6));
1379         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1380         /*
1381          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1382          * rdma-core only accept the DSCP bits byte aligned start from
1383          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1384          * bits in IPv6 case as rdma-core requires byte aligned value.
1385          */
1386         ipv6.hdr.vtc_flow = conf->dscp;
1387         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1388         item.spec = &ipv6;
1389         item.mask = &ipv6_mask;
1390         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1391                                              MLX5_MODIFICATION_TYPE_SET, error);
1392 }
1393
1394 static int
1395 mlx5_flow_item_field_width(struct rte_eth_dev *dev,
1396                            enum rte_flow_field_id field, int inherit,
1397                            const struct rte_flow_attr *attr,
1398                            struct rte_flow_error *error)
1399 {
1400         struct mlx5_priv *priv = dev->data->dev_private;
1401
1402         switch (field) {
1403         case RTE_FLOW_FIELD_START:
1404                 return 32;
1405         case RTE_FLOW_FIELD_MAC_DST:
1406         case RTE_FLOW_FIELD_MAC_SRC:
1407                 return 48;
1408         case RTE_FLOW_FIELD_VLAN_TYPE:
1409                 return 16;
1410         case RTE_FLOW_FIELD_VLAN_ID:
1411                 return 12;
1412         case RTE_FLOW_FIELD_MAC_TYPE:
1413                 return 16;
1414         case RTE_FLOW_FIELD_IPV4_DSCP:
1415                 return 6;
1416         case RTE_FLOW_FIELD_IPV4_TTL:
1417                 return 8;
1418         case RTE_FLOW_FIELD_IPV4_SRC:
1419         case RTE_FLOW_FIELD_IPV4_DST:
1420                 return 32;
1421         case RTE_FLOW_FIELD_IPV6_DSCP:
1422                 return 6;
1423         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1424                 return 8;
1425         case RTE_FLOW_FIELD_IPV6_SRC:
1426         case RTE_FLOW_FIELD_IPV6_DST:
1427                 return 128;
1428         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1429         case RTE_FLOW_FIELD_TCP_PORT_DST:
1430                 return 16;
1431         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1432         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1433                 return 32;
1434         case RTE_FLOW_FIELD_TCP_FLAGS:
1435                 return 9;
1436         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1437         case RTE_FLOW_FIELD_UDP_PORT_DST:
1438                 return 16;
1439         case RTE_FLOW_FIELD_VXLAN_VNI:
1440         case RTE_FLOW_FIELD_GENEVE_VNI:
1441                 return 24;
1442         case RTE_FLOW_FIELD_GTP_TEID:
1443         case RTE_FLOW_FIELD_TAG:
1444                 return 32;
1445         case RTE_FLOW_FIELD_MARK:
1446                 return __builtin_popcount(priv->sh->dv_mark_mask);
1447         case RTE_FLOW_FIELD_META:
1448                 return (flow_dv_get_metadata_reg(dev, attr, error) == REG_C_0) ?
1449                         __builtin_popcount(priv->sh->dv_meta_mask) : 32;
1450         case RTE_FLOW_FIELD_POINTER:
1451         case RTE_FLOW_FIELD_VALUE:
1452                 return inherit < 0 ? 0 : inherit;
1453         case RTE_FLOW_FIELD_IPV4_ECN:
1454         case RTE_FLOW_FIELD_IPV6_ECN:
1455                 return 2;
1456         default:
1457                 MLX5_ASSERT(false);
1458         }
1459         return 0;
1460 }
1461
1462 static void
1463 mlx5_flow_field_id_to_modify_info
1464                 (const struct rte_flow_action_modify_data *data,
1465                  struct field_modify_info *info, uint32_t *mask,
1466                  uint32_t width, struct rte_eth_dev *dev,
1467                  const struct rte_flow_attr *attr, struct rte_flow_error *error)
1468 {
1469         struct mlx5_priv *priv = dev->data->dev_private;
1470         uint32_t idx = 0;
1471         uint32_t off = 0;
1472
1473         switch (data->field) {
1474         case RTE_FLOW_FIELD_START:
1475                 /* not supported yet */
1476                 MLX5_ASSERT(false);
1477                 break;
1478         case RTE_FLOW_FIELD_MAC_DST:
1479                 off = data->offset > 16 ? data->offset - 16 : 0;
1480                 if (mask) {
1481                         if (data->offset < 16) {
1482                                 info[idx] = (struct field_modify_info){2, 4,
1483                                                 MLX5_MODI_OUT_DMAC_15_0};
1484                                 if (width < 16) {
1485                                         mask[1] = rte_cpu_to_be_16(0xffff >>
1486                                                                  (16 - width));
1487                                         width = 0;
1488                                 } else {
1489                                         mask[1] = RTE_BE16(0xffff);
1490                                         width -= 16;
1491                                 }
1492                                 if (!width)
1493                                         break;
1494                                 ++idx;
1495                         }
1496                         info[idx] = (struct field_modify_info){4, 0,
1497                                                 MLX5_MODI_OUT_DMAC_47_16};
1498                         mask[0] = rte_cpu_to_be_32((0xffffffff >>
1499                                                     (32 - width)) << off);
1500                 } else {
1501                         if (data->offset < 16)
1502                                 info[idx++] = (struct field_modify_info){2, 0,
1503                                                 MLX5_MODI_OUT_DMAC_15_0};
1504                         info[idx] = (struct field_modify_info){4, off,
1505                                                 MLX5_MODI_OUT_DMAC_47_16};
1506                 }
1507                 break;
1508         case RTE_FLOW_FIELD_MAC_SRC:
1509                 off = data->offset > 16 ? data->offset - 16 : 0;
1510                 if (mask) {
1511                         if (data->offset < 16) {
1512                                 info[idx] = (struct field_modify_info){2, 4,
1513                                                 MLX5_MODI_OUT_SMAC_15_0};
1514                                 if (width < 16) {
1515                                         mask[1] = rte_cpu_to_be_16(0xffff >>
1516                                                                  (16 - width));
1517                                         width = 0;
1518                                 } else {
1519                                         mask[1] = RTE_BE16(0xffff);
1520                                         width -= 16;
1521                                 }
1522                                 if (!width)
1523                                         break;
1524                                 ++idx;
1525                         }
1526                         info[idx] = (struct field_modify_info){4, 0,
1527                                                 MLX5_MODI_OUT_SMAC_47_16};
1528                         mask[0] = rte_cpu_to_be_32((0xffffffff >>
1529                                                     (32 - width)) << off);
1530                 } else {
1531                         if (data->offset < 16)
1532                                 info[idx++] = (struct field_modify_info){2, 0,
1533                                                 MLX5_MODI_OUT_SMAC_15_0};
1534                         info[idx] = (struct field_modify_info){4, off,
1535                                                 MLX5_MODI_OUT_SMAC_47_16};
1536                 }
1537                 break;
1538         case RTE_FLOW_FIELD_VLAN_TYPE:
1539                 /* not supported yet */
1540                 break;
1541         case RTE_FLOW_FIELD_VLAN_ID:
1542                 info[idx] = (struct field_modify_info){2, 0,
1543                                         MLX5_MODI_OUT_FIRST_VID};
1544                 if (mask)
1545                         mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1546                 break;
1547         case RTE_FLOW_FIELD_MAC_TYPE:
1548                 info[idx] = (struct field_modify_info){2, 0,
1549                                         MLX5_MODI_OUT_ETHERTYPE};
1550                 if (mask)
1551                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1552                 break;
1553         case RTE_FLOW_FIELD_IPV4_DSCP:
1554                 info[idx] = (struct field_modify_info){1, 0,
1555                                         MLX5_MODI_OUT_IP_DSCP};
1556                 if (mask)
1557                         mask[idx] = 0x3f >> (6 - width);
1558                 break;
1559         case RTE_FLOW_FIELD_IPV4_TTL:
1560                 info[idx] = (struct field_modify_info){1, 0,
1561                                         MLX5_MODI_OUT_IPV4_TTL};
1562                 if (mask)
1563                         mask[idx] = 0xff >> (8 - width);
1564                 break;
1565         case RTE_FLOW_FIELD_IPV4_SRC:
1566                 info[idx] = (struct field_modify_info){4, 0,
1567                                         MLX5_MODI_OUT_SIPV4};
1568                 if (mask)
1569                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1570                                                      (32 - width));
1571                 break;
1572         case RTE_FLOW_FIELD_IPV4_DST:
1573                 info[idx] = (struct field_modify_info){4, 0,
1574                                         MLX5_MODI_OUT_DIPV4};
1575                 if (mask)
1576                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1577                                                      (32 - width));
1578                 break;
1579         case RTE_FLOW_FIELD_IPV6_DSCP:
1580                 info[idx] = (struct field_modify_info){1, 0,
1581                                         MLX5_MODI_OUT_IP_DSCP};
1582                 if (mask)
1583                         mask[idx] = 0x3f >> (6 - width);
1584                 break;
1585         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1586                 info[idx] = (struct field_modify_info){1, 0,
1587                                         MLX5_MODI_OUT_IPV6_HOPLIMIT};
1588                 if (mask)
1589                         mask[idx] = 0xff >> (8 - width);
1590                 break;
1591         case RTE_FLOW_FIELD_IPV6_SRC:
1592                 if (mask) {
1593                         if (data->offset < 32) {
1594                                 info[idx] = (struct field_modify_info){4, 12,
1595                                                 MLX5_MODI_OUT_SIPV6_31_0};
1596                                 if (width < 32) {
1597                                         mask[3] =
1598                                                 rte_cpu_to_be_32(0xffffffff >>
1599                                                                  (32 - width));
1600                                         width = 0;
1601                                 } else {
1602                                         mask[3] = RTE_BE32(0xffffffff);
1603                                         width -= 32;
1604                                 }
1605                                 if (!width)
1606                                         break;
1607                                 ++idx;
1608                         }
1609                         if (data->offset < 64) {
1610                                 info[idx] = (struct field_modify_info){4, 8,
1611                                                 MLX5_MODI_OUT_SIPV6_63_32};
1612                                 if (width < 32) {
1613                                         mask[2] =
1614                                                 rte_cpu_to_be_32(0xffffffff >>
1615                                                                  (32 - width));
1616                                         width = 0;
1617                                 } else {
1618                                         mask[2] = RTE_BE32(0xffffffff);
1619                                         width -= 32;
1620                                 }
1621                                 if (!width)
1622                                         break;
1623                                 ++idx;
1624                         }
1625                         if (data->offset < 96) {
1626                                 info[idx] = (struct field_modify_info){4, 4,
1627                                                 MLX5_MODI_OUT_SIPV6_95_64};
1628                                 if (width < 32) {
1629                                         mask[1] =
1630                                                 rte_cpu_to_be_32(0xffffffff >>
1631                                                                  (32 - width));
1632                                         width = 0;
1633                                 } else {
1634                                         mask[1] = RTE_BE32(0xffffffff);
1635                                         width -= 32;
1636                                 }
1637                                 if (!width)
1638                                         break;
1639                                 ++idx;
1640                         }
1641                         info[idx] = (struct field_modify_info){4, 0,
1642                                                 MLX5_MODI_OUT_SIPV6_127_96};
1643                         mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1644                 } else {
1645                         if (data->offset < 32)
1646                                 info[idx++] = (struct field_modify_info){4, 0,
1647                                                 MLX5_MODI_OUT_SIPV6_31_0};
1648                         if (data->offset < 64)
1649                                 info[idx++] = (struct field_modify_info){4, 0,
1650                                                 MLX5_MODI_OUT_SIPV6_63_32};
1651                         if (data->offset < 96)
1652                                 info[idx++] = (struct field_modify_info){4, 0,
1653                                                 MLX5_MODI_OUT_SIPV6_95_64};
1654                         if (data->offset < 128)
1655                                 info[idx++] = (struct field_modify_info){4, 0,
1656                                                 MLX5_MODI_OUT_SIPV6_127_96};
1657                 }
1658                 break;
1659         case RTE_FLOW_FIELD_IPV6_DST:
1660                 if (mask) {
1661                         if (data->offset < 32) {
1662                                 info[idx] = (struct field_modify_info){4, 12,
1663                                                 MLX5_MODI_OUT_DIPV6_31_0};
1664                                 if (width < 32) {
1665                                         mask[3] =
1666                                                 rte_cpu_to_be_32(0xffffffff >>
1667                                                                  (32 - width));
1668                                         width = 0;
1669                                 } else {
1670                                         mask[3] = RTE_BE32(0xffffffff);
1671                                         width -= 32;
1672                                 }
1673                                 if (!width)
1674                                         break;
1675                                 ++idx;
1676                         }
1677                         if (data->offset < 64) {
1678                                 info[idx] = (struct field_modify_info){4, 8,
1679                                                 MLX5_MODI_OUT_DIPV6_63_32};
1680                                 if (width < 32) {
1681                                         mask[2] =
1682                                                 rte_cpu_to_be_32(0xffffffff >>
1683                                                                  (32 - width));
1684                                         width = 0;
1685                                 } else {
1686                                         mask[2] = RTE_BE32(0xffffffff);
1687                                         width -= 32;
1688                                 }
1689                                 if (!width)
1690                                         break;
1691                                 ++idx;
1692                         }
1693                         if (data->offset < 96) {
1694                                 info[idx] = (struct field_modify_info){4, 4,
1695                                                 MLX5_MODI_OUT_DIPV6_95_64};
1696                                 if (width < 32) {
1697                                         mask[1] =
1698                                                 rte_cpu_to_be_32(0xffffffff >>
1699                                                                  (32 - width));
1700                                         width = 0;
1701                                 } else {
1702                                         mask[1] = RTE_BE32(0xffffffff);
1703                                         width -= 32;
1704                                 }
1705                                 if (!width)
1706                                         break;
1707                                 ++idx;
1708                         }
1709                         info[idx] = (struct field_modify_info){4, 0,
1710                                                 MLX5_MODI_OUT_DIPV6_127_96};
1711                         mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1712                 } else {
1713                         if (data->offset < 32)
1714                                 info[idx++] = (struct field_modify_info){4, 0,
1715                                                 MLX5_MODI_OUT_DIPV6_31_0};
1716                         if (data->offset < 64)
1717                                 info[idx++] = (struct field_modify_info){4, 0,
1718                                                 MLX5_MODI_OUT_DIPV6_63_32};
1719                         if (data->offset < 96)
1720                                 info[idx++] = (struct field_modify_info){4, 0,
1721                                                 MLX5_MODI_OUT_DIPV6_95_64};
1722                         if (data->offset < 128)
1723                                 info[idx++] = (struct field_modify_info){4, 0,
1724                                                 MLX5_MODI_OUT_DIPV6_127_96};
1725                 }
1726                 break;
1727         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1728                 info[idx] = (struct field_modify_info){2, 0,
1729                                         MLX5_MODI_OUT_TCP_SPORT};
1730                 if (mask)
1731                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1732                 break;
1733         case RTE_FLOW_FIELD_TCP_PORT_DST:
1734                 info[idx] = (struct field_modify_info){2, 0,
1735                                         MLX5_MODI_OUT_TCP_DPORT};
1736                 if (mask)
1737                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1738                 break;
1739         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1740                 info[idx] = (struct field_modify_info){4, 0,
1741                                         MLX5_MODI_OUT_TCP_SEQ_NUM};
1742                 if (mask)
1743                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1744                                                      (32 - width));
1745                 break;
1746         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1747                 info[idx] = (struct field_modify_info){4, 0,
1748                                         MLX5_MODI_OUT_TCP_ACK_NUM};
1749                 if (mask)
1750                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1751                                                      (32 - width));
1752                 break;
1753         case RTE_FLOW_FIELD_TCP_FLAGS:
1754                 info[idx] = (struct field_modify_info){2, 0,
1755                                         MLX5_MODI_OUT_TCP_FLAGS};
1756                 if (mask)
1757                         mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1758                 break;
1759         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1760                 info[idx] = (struct field_modify_info){2, 0,
1761                                         MLX5_MODI_OUT_UDP_SPORT};
1762                 if (mask)
1763                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1764                 break;
1765         case RTE_FLOW_FIELD_UDP_PORT_DST:
1766                 info[idx] = (struct field_modify_info){2, 0,
1767                                         MLX5_MODI_OUT_UDP_DPORT};
1768                 if (mask)
1769                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1770                 break;
1771         case RTE_FLOW_FIELD_VXLAN_VNI:
1772                 /* not supported yet */
1773                 break;
1774         case RTE_FLOW_FIELD_GENEVE_VNI:
1775                 /* not supported yet*/
1776                 break;
1777         case RTE_FLOW_FIELD_GTP_TEID:
1778                 info[idx] = (struct field_modify_info){4, 0,
1779                                         MLX5_MODI_GTP_TEID};
1780                 if (mask)
1781                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1782                                                      (32 - width));
1783                 break;
1784         case RTE_FLOW_FIELD_TAG:
1785                 {
1786                         int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1787                                                    data->level, error);
1788                         if (reg < 0)
1789                                 return;
1790                         MLX5_ASSERT(reg != REG_NON);
1791                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1792                         info[idx] = (struct field_modify_info){4, 0,
1793                                                 reg_to_field[reg]};
1794                         if (mask)
1795                                 mask[idx] =
1796                                         rte_cpu_to_be_32(0xffffffff >>
1797                                                          (32 - width));
1798                 }
1799                 break;
1800         case RTE_FLOW_FIELD_MARK:
1801                 {
1802                         uint32_t mark_mask = priv->sh->dv_mark_mask;
1803                         uint32_t mark_count = __builtin_popcount(mark_mask);
1804                         int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1805                                                        0, error);
1806                         if (reg < 0)
1807                                 return;
1808                         MLX5_ASSERT(reg != REG_NON);
1809                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1810                         info[idx] = (struct field_modify_info){4, 0,
1811                                                 reg_to_field[reg]};
1812                         if (mask)
1813                                 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1814                                          (mark_count - width)) & mark_mask);
1815                 }
1816                 break;
1817         case RTE_FLOW_FIELD_META:
1818                 {
1819                         uint32_t meta_mask = priv->sh->dv_meta_mask;
1820                         uint32_t meta_count = __builtin_popcount(meta_mask);
1821                         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1822                         if (reg < 0)
1823                                 return;
1824                         MLX5_ASSERT(reg != REG_NON);
1825                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1826                         info[idx] = (struct field_modify_info){4, 0,
1827                                                 reg_to_field[reg]};
1828                         if (mask)
1829                                 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1830                                         (meta_count - width)) & meta_mask);
1831                 }
1832                 break;
1833         case RTE_FLOW_FIELD_IPV4_ECN:
1834         case RTE_FLOW_FIELD_IPV6_ECN:
1835                 info[idx] = (struct field_modify_info){1, 0,
1836                                         MLX5_MODI_OUT_IP_ECN};
1837                 if (mask)
1838                         mask[idx] = 0x3 >> (2 - width);
1839                 break;
1840         case RTE_FLOW_FIELD_POINTER:
1841         case RTE_FLOW_FIELD_VALUE:
1842         default:
1843                 MLX5_ASSERT(false);
1844                 break;
1845         }
1846 }
1847
1848 /**
1849  * Convert modify_field action to DV specification.
1850  *
1851  * @param[in] dev
1852  *   Pointer to the rte_eth_dev structure.
1853  * @param[in,out] resource
1854  *   Pointer to the modify-header resource.
1855  * @param[in] action
1856  *   Pointer to action specification.
1857  * @param[in] attr
1858  *   Attributes of flow that includes this item.
1859  * @param[out] error
1860  *   Pointer to the error structure.
1861  *
1862  * @return
1863  *   0 on success, a negative errno value otherwise and rte_errno is set.
1864  */
1865 static int
1866 flow_dv_convert_action_modify_field
1867                         (struct rte_eth_dev *dev,
1868                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1869                          const struct rte_flow_action *action,
1870                          const struct rte_flow_attr *attr,
1871                          struct rte_flow_error *error)
1872 {
1873         const struct rte_flow_action_modify_field *conf =
1874                 (const struct rte_flow_action_modify_field *)(action->conf);
1875         struct rte_flow_item item = {
1876                 .spec = NULL,
1877                 .mask = NULL
1878         };
1879         struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1880                                                                 {0, 0, 0} };
1881         struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1882                                                                 {0, 0, 0} };
1883         uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1884         uint32_t type, meta = 0;
1885
1886         if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1887             conf->src.field == RTE_FLOW_FIELD_VALUE) {
1888                 type = MLX5_MODIFICATION_TYPE_SET;
1889                 /** For SET fill the destination field (field) first. */
1890                 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1891                                                   conf->width, dev,
1892                                                   attr, error);
1893                 item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?
1894                                         (void *)(uintptr_t)conf->src.pvalue :
1895                                         (void *)(uintptr_t)&conf->src.value;
1896                 if (conf->dst.field == RTE_FLOW_FIELD_META) {
1897                         meta = *(const unaligned_uint32_t *)item.spec;
1898                         meta = rte_cpu_to_be_32(meta);
1899                         item.spec = &meta;
1900                 }
1901         } else {
1902                 type = MLX5_MODIFICATION_TYPE_COPY;
1903                 /** For COPY fill the destination field (dcopy) without mask. */
1904                 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1905                                                   conf->width, dev,
1906                                                   attr, error);
1907                 /** Then construct the source field (field) with mask. */
1908                 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1909                                                   conf->width, dev,
1910                                                   attr, error);
1911         }
1912         item.mask = &mask;
1913         return flow_dv_convert_modify_action(&item,
1914                         field, dcopy, resource, type, error);
1915 }
1916
1917 /**
1918  * Validate MARK item.
1919  *
1920  * @param[in] dev
1921  *   Pointer to the rte_eth_dev structure.
1922  * @param[in] item
1923  *   Item specification.
1924  * @param[in] attr
1925  *   Attributes of flow that includes this item.
1926  * @param[out] error
1927  *   Pointer to error structure.
1928  *
1929  * @return
1930  *   0 on success, a negative errno value otherwise and rte_errno is set.
1931  */
1932 static int
1933 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1934                            const struct rte_flow_item *item,
1935                            const struct rte_flow_attr *attr __rte_unused,
1936                            struct rte_flow_error *error)
1937 {
1938         struct mlx5_priv *priv = dev->data->dev_private;
1939         struct mlx5_sh_config *config = &priv->sh->config;
1940         const struct rte_flow_item_mark *spec = item->spec;
1941         const struct rte_flow_item_mark *mask = item->mask;
1942         const struct rte_flow_item_mark nic_mask = {
1943                 .id = priv->sh->dv_mark_mask,
1944         };
1945         int ret;
1946
1947         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1948                 return rte_flow_error_set(error, ENOTSUP,
1949                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1950                                           "extended metadata feature"
1951                                           " isn't enabled");
1952         if (!mlx5_flow_ext_mreg_supported(dev))
1953                 return rte_flow_error_set(error, ENOTSUP,
1954                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1955                                           "extended metadata register"
1956                                           " isn't supported");
1957         if (!nic_mask.id)
1958                 return rte_flow_error_set(error, ENOTSUP,
1959                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1960                                           "extended metadata register"
1961                                           " isn't available");
1962         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1963         if (ret < 0)
1964                 return ret;
1965         if (!spec)
1966                 return rte_flow_error_set(error, EINVAL,
1967                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1968                                           item->spec,
1969                                           "data cannot be empty");
1970         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1971                 return rte_flow_error_set(error, EINVAL,
1972                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1973                                           &spec->id,
1974                                           "mark id exceeds the limit");
1975         if (!mask)
1976                 mask = &nic_mask;
1977         if (!mask->id)
1978                 return rte_flow_error_set(error, EINVAL,
1979                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1980                                         "mask cannot be zero");
1981
1982         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1983                                         (const uint8_t *)&nic_mask,
1984                                         sizeof(struct rte_flow_item_mark),
1985                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1986         if (ret < 0)
1987                 return ret;
1988         return 0;
1989 }
1990
1991 /**
1992  * Validate META item.
1993  *
1994  * @param[in] dev
1995  *   Pointer to the rte_eth_dev structure.
1996  * @param[in] item
1997  *   Item specification.
1998  * @param[in] attr
1999  *   Attributes of flow that includes this item.
2000  * @param[out] error
2001  *   Pointer to error structure.
2002  *
2003  * @return
2004  *   0 on success, a negative errno value otherwise and rte_errno is set.
2005  */
2006 static int
2007 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
2008                            const struct rte_flow_item *item,
2009                            const struct rte_flow_attr *attr,
2010                            struct rte_flow_error *error)
2011 {
2012         struct mlx5_priv *priv = dev->data->dev_private;
2013         struct mlx5_sh_config *config = &priv->sh->config;
2014         const struct rte_flow_item_meta *spec = item->spec;
2015         const struct rte_flow_item_meta *mask = item->mask;
2016         struct rte_flow_item_meta nic_mask = {
2017                 .data = UINT32_MAX
2018         };
2019         int reg;
2020         int ret;
2021
2022         if (!spec)
2023                 return rte_flow_error_set(error, EINVAL,
2024                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2025                                           item->spec,
2026                                           "data cannot be empty");
2027         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2028                 if (!mlx5_flow_ext_mreg_supported(dev))
2029                         return rte_flow_error_set(error, ENOTSUP,
2030                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2031                                           "extended metadata register"
2032                                           " isn't supported");
2033                 reg = flow_dv_get_metadata_reg(dev, attr, error);
2034                 if (reg < 0)
2035                         return reg;
2036                 if (reg == REG_NON)
2037                         return rte_flow_error_set(error, ENOTSUP,
2038                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2039                                         "unavailable extended metadata register");
2040                 if (reg == REG_B)
2041                         return rte_flow_error_set(error, ENOTSUP,
2042                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2043                                           "match on reg_b "
2044                                           "isn't supported");
2045                 if (reg != REG_A)
2046                         nic_mask.data = priv->sh->dv_meta_mask;
2047         } else {
2048                 if (attr->transfer)
2049                         return rte_flow_error_set(error, ENOTSUP,
2050                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2051                                         "extended metadata feature "
2052                                         "should be enabled when "
2053                                         "meta item is requested "
2054                                         "with e-switch mode ");
2055                 if (attr->ingress)
2056                         return rte_flow_error_set(error, ENOTSUP,
2057                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2058                                         "match on metadata for ingress "
2059                                         "is not supported in legacy "
2060                                         "metadata mode");
2061         }
2062         if (!mask)
2063                 mask = &rte_flow_item_meta_mask;
2064         if (!mask->data)
2065                 return rte_flow_error_set(error, EINVAL,
2066                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2067                                         "mask cannot be zero");
2068
2069         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2070                                         (const uint8_t *)&nic_mask,
2071                                         sizeof(struct rte_flow_item_meta),
2072                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2073         return ret;
2074 }
2075
2076 /**
2077  * Validate TAG item.
2078  *
2079  * @param[in] dev
2080  *   Pointer to the rte_eth_dev structure.
2081  * @param[in] item
2082  *   Item specification.
2083  * @param[in] attr
2084  *   Attributes of flow that includes this item.
2085  * @param[out] error
2086  *   Pointer to error structure.
2087  *
2088  * @return
2089  *   0 on success, a negative errno value otherwise and rte_errno is set.
2090  */
2091 static int
2092 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2093                           const struct rte_flow_item *item,
2094                           const struct rte_flow_attr *attr __rte_unused,
2095                           struct rte_flow_error *error)
2096 {
2097         const struct rte_flow_item_tag *spec = item->spec;
2098         const struct rte_flow_item_tag *mask = item->mask;
2099         const struct rte_flow_item_tag nic_mask = {
2100                 .data = RTE_BE32(UINT32_MAX),
2101                 .index = 0xff,
2102         };
2103         int ret;
2104
2105         if (!mlx5_flow_ext_mreg_supported(dev))
2106                 return rte_flow_error_set(error, ENOTSUP,
2107                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2108                                           "extensive metadata register"
2109                                           " isn't supported");
2110         if (!spec)
2111                 return rte_flow_error_set(error, EINVAL,
2112                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2113                                           item->spec,
2114                                           "data cannot be empty");
2115         if (!mask)
2116                 mask = &rte_flow_item_tag_mask;
2117         if (!mask->data)
2118                 return rte_flow_error_set(error, EINVAL,
2119                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2120                                         "mask cannot be zero");
2121
2122         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2123                                         (const uint8_t *)&nic_mask,
2124                                         sizeof(struct rte_flow_item_tag),
2125                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2126         if (ret < 0)
2127                 return ret;
2128         if (mask->index != 0xff)
2129                 return rte_flow_error_set(error, EINVAL,
2130                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2131                                           "partial mask for tag index"
2132                                           " is not supported");
2133         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2134         if (ret < 0)
2135                 return ret;
2136         MLX5_ASSERT(ret != REG_NON);
2137         return 0;
2138 }
2139
2140 /**
2141  * Validate vport item.
2142  *
2143  * @param[in] dev
2144  *   Pointer to the rte_eth_dev structure.
2145  * @param[in] item
2146  *   Item specification.
2147  * @param[in] attr
2148  *   Attributes of flow that includes this item.
2149  * @param[in] item_flags
2150  *   Bit-fields that holds the items detected until now.
2151  * @param[out] error
2152  *   Pointer to error structure.
2153  *
2154  * @return
2155  *   0 on success, a negative errno value otherwise and rte_errno is set.
2156  */
2157 static int
2158 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2159                               const struct rte_flow_item *item,
2160                               const struct rte_flow_attr *attr,
2161                               uint64_t item_flags,
2162                               struct rte_flow_error *error)
2163 {
2164         const struct rte_flow_item_port_id *spec = item->spec;
2165         const struct rte_flow_item_port_id *mask = item->mask;
2166         const struct rte_flow_item_port_id switch_mask = {
2167                         .id = 0xffffffff,
2168         };
2169         struct mlx5_priv *esw_priv;
2170         struct mlx5_priv *dev_priv;
2171         int ret;
2172
2173         if (!attr->transfer)
2174                 return rte_flow_error_set(error, EINVAL,
2175                                           RTE_FLOW_ERROR_TYPE_ITEM,
2176                                           NULL,
2177                                           "match on port id is valid only"
2178                                           " when transfer flag is enabled");
2179         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2180                 return rte_flow_error_set(error, ENOTSUP,
2181                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2182                                           "multiple source ports are not"
2183                                           " supported");
2184         if (!mask)
2185                 mask = &switch_mask;
2186         if (mask->id != 0xffffffff)
2187                 return rte_flow_error_set(error, ENOTSUP,
2188                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2189                                            mask,
2190                                            "no support for partial mask on"
2191                                            " \"id\" field");
2192         ret = mlx5_flow_item_acceptable
2193                                 (item, (const uint8_t *)mask,
2194                                  (const uint8_t *)&rte_flow_item_port_id_mask,
2195                                  sizeof(struct rte_flow_item_port_id),
2196                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2197         if (ret)
2198                 return ret;
2199         if (!spec)
2200                 return 0;
2201         if (spec->id == MLX5_PORT_ESW_MGR)
2202                 return 0;
2203         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2204         if (!esw_priv)
2205                 return rte_flow_error_set(error, rte_errno,
2206                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2207                                           "failed to obtain E-Switch info for"
2208                                           " port");
2209         dev_priv = mlx5_dev_to_eswitch_info(dev);
2210         if (!dev_priv)
2211                 return rte_flow_error_set(error, rte_errno,
2212                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2213                                           NULL,
2214                                           "failed to obtain E-Switch info");
2215         if (esw_priv->domain_id != dev_priv->domain_id)
2216                 return rte_flow_error_set(error, EINVAL,
2217                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2218                                           "cannot match on a port from a"
2219                                           " different E-Switch");
2220         return 0;
2221 }
2222
2223 /**
2224  * Validate represented port item.
2225  *
2226  * @param[in] dev
2227  *   Pointer to the rte_eth_dev structure.
2228  * @param[in] item
2229  *   Item specification.
2230  * @param[in] attr
2231  *   Attributes of flow that includes this item.
2232  * @param[in] item_flags
2233  *   Bit-fields that holds the items detected until now.
2234  * @param[out] error
2235  *   Pointer to error structure.
2236  *
2237  * @return
2238  *   0 on success, a negative errno value otherwise and rte_errno is set.
2239  */
2240 static int
2241 flow_dv_validate_item_represented_port(struct rte_eth_dev *dev,
2242                                        const struct rte_flow_item *item,
2243                                        const struct rte_flow_attr *attr,
2244                                        uint64_t item_flags,
2245                                        struct rte_flow_error *error)
2246 {
2247         const struct rte_flow_item_ethdev *spec = item->spec;
2248         const struct rte_flow_item_ethdev *mask = item->mask;
2249         const struct rte_flow_item_ethdev switch_mask = {
2250                         .port_id = UINT16_MAX,
2251         };
2252         struct mlx5_priv *esw_priv;
2253         struct mlx5_priv *dev_priv;
2254         int ret;
2255
2256         if (!attr->transfer)
2257                 return rte_flow_error_set(error, EINVAL,
2258                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2259                                           "match on port id is valid only when transfer flag is enabled");
2260         if (item_flags & MLX5_FLOW_ITEM_REPRESENTED_PORT)
2261                 return rte_flow_error_set(error, ENOTSUP,
2262                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2263                                           "multiple source ports are not supported");
2264         if (!mask)
2265                 mask = &switch_mask;
2266         if (mask->port_id != UINT16_MAX)
2267                 return rte_flow_error_set(error, ENOTSUP,
2268                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK, mask,
2269                                            "no support for partial mask on \"id\" field");
2270         ret = mlx5_flow_item_acceptable
2271                                 (item, (const uint8_t *)mask,
2272                                  (const uint8_t *)&rte_flow_item_ethdev_mask,
2273                                  sizeof(struct rte_flow_item_ethdev),
2274                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2275         if (ret)
2276                 return ret;
2277         if (!spec || spec->port_id == UINT16_MAX)
2278                 return 0;
2279         esw_priv = mlx5_port_to_eswitch_info(spec->port_id, false);
2280         if (!esw_priv)
2281                 return rte_flow_error_set(error, rte_errno,
2282                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2283                                           "failed to obtain E-Switch info for port");
2284         dev_priv = mlx5_dev_to_eswitch_info(dev);
2285         if (!dev_priv)
2286                 return rte_flow_error_set(error, rte_errno,
2287                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2288                                           NULL,
2289                                           "failed to obtain E-Switch info");
2290         if (esw_priv->domain_id != dev_priv->domain_id)
2291                 return rte_flow_error_set(error, EINVAL,
2292                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2293                                           "cannot match on a port from a different E-Switch");
2294         return 0;
2295 }
2296
2297 /**
2298  * Validate VLAN item.
2299  *
2300  * @param[in] item
2301  *   Item specification.
2302  * @param[in] item_flags
2303  *   Bit-fields that holds the items detected until now.
2304  * @param[in] dev
2305  *   Ethernet device flow is being created on.
2306  * @param[out] error
2307  *   Pointer to error structure.
2308  *
2309  * @return
2310  *   0 on success, a negative errno value otherwise and rte_errno is set.
2311  */
2312 static int
2313 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2314                            uint64_t item_flags,
2315                            struct rte_eth_dev *dev,
2316                            struct rte_flow_error *error)
2317 {
2318         const struct rte_flow_item_vlan *mask = item->mask;
2319         const struct rte_flow_item_vlan nic_mask = {
2320                 .tci = RTE_BE16(UINT16_MAX),
2321                 .inner_type = RTE_BE16(UINT16_MAX),
2322                 .has_more_vlan = 1,
2323         };
2324         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2325         int ret;
2326         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2327                                         MLX5_FLOW_LAYER_INNER_L4) :
2328                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2329                                         MLX5_FLOW_LAYER_OUTER_L4);
2330         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2331                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2332
2333         if (item_flags & vlanm)
2334                 return rte_flow_error_set(error, EINVAL,
2335                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2336                                           "multiple VLAN layers not supported");
2337         else if ((item_flags & l34m) != 0)
2338                 return rte_flow_error_set(error, EINVAL,
2339                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2340                                           "VLAN cannot follow L3/L4 layer");
2341         if (!mask)
2342                 mask = &rte_flow_item_vlan_mask;
2343         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2344                                         (const uint8_t *)&nic_mask,
2345                                         sizeof(struct rte_flow_item_vlan),
2346                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2347         if (ret)
2348                 return ret;
2349         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2350                 struct mlx5_priv *priv = dev->data->dev_private;
2351
2352                 if (priv->vmwa_context) {
2353                         /*
2354                          * Non-NULL context means we have a virtual machine
2355                          * and SR-IOV enabled, we have to create VLAN interface
2356                          * to make hypervisor to setup E-Switch vport
2357                          * context correctly. We avoid creating the multiple
2358                          * VLAN interfaces, so we cannot support VLAN tag mask.
2359                          */
2360                         return rte_flow_error_set(error, EINVAL,
2361                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2362                                                   item,
2363                                                   "VLAN tag mask is not"
2364                                                   " supported in virtual"
2365                                                   " environment");
2366                 }
2367         }
2368         return 0;
2369 }
2370
2371 /*
2372  * GTP flags are contained in 1 byte of the format:
2373  * -------------------------------------------
2374  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
2375  * |-----------------------------------------|
2376  * | value | Version | PT | Res | E | S | PN |
2377  * -------------------------------------------
2378  *
2379  * Matching is supported only for GTP flags E, S, PN.
2380  */
2381 #define MLX5_GTP_FLAGS_MASK     0x07
2382
2383 /**
2384  * Validate GTP item.
2385  *
2386  * @param[in] dev
2387  *   Pointer to the rte_eth_dev structure.
2388  * @param[in] item
2389  *   Item specification.
2390  * @param[in] item_flags
2391  *   Bit-fields that holds the items detected until now.
2392  * @param[out] error
2393  *   Pointer to error structure.
2394  *
2395  * @return
2396  *   0 on success, a negative errno value otherwise and rte_errno is set.
2397  */
2398 static int
2399 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2400                           const struct rte_flow_item *item,
2401                           uint64_t item_flags,
2402                           struct rte_flow_error *error)
2403 {
2404         struct mlx5_priv *priv = dev->data->dev_private;
2405         const struct rte_flow_item_gtp *spec = item->spec;
2406         const struct rte_flow_item_gtp *mask = item->mask;
2407         const struct rte_flow_item_gtp nic_mask = {
2408                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2409                 .msg_type = 0xff,
2410                 .teid = RTE_BE32(0xffffffff),
2411         };
2412
2413         if (!priv->sh->cdev->config.hca_attr.tunnel_stateless_gtp)
2414                 return rte_flow_error_set(error, ENOTSUP,
2415                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2416                                           "GTP support is not enabled");
2417         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2418                 return rte_flow_error_set(error, ENOTSUP,
2419                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2420                                           "multiple tunnel layers not"
2421                                           " supported");
2422         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2423                 return rte_flow_error_set(error, EINVAL,
2424                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2425                                           "no outer UDP layer found");
2426         if (!mask)
2427                 mask = &rte_flow_item_gtp_mask;
2428         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2429                 return rte_flow_error_set(error, ENOTSUP,
2430                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2431                                           "Match is supported for GTP"
2432                                           " flags only");
2433         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2434                                          (const uint8_t *)&nic_mask,
2435                                          sizeof(struct rte_flow_item_gtp),
2436                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2437 }
2438
2439 /**
2440  * Validate GTP PSC item.
2441  *
2442  * @param[in] item
2443  *   Item specification.
2444  * @param[in] last_item
2445  *   Previous validated item in the pattern items.
2446  * @param[in] gtp_item
2447  *   Previous GTP item specification.
2448  * @param[in] attr
2449  *   Pointer to flow attributes.
2450  * @param[out] error
2451  *   Pointer to error structure.
2452  *
2453  * @return
2454  *   0 on success, a negative errno value otherwise and rte_errno is set.
2455  */
2456 static int
2457 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2458                               uint64_t last_item,
2459                               const struct rte_flow_item *gtp_item,
2460                               const struct rte_flow_attr *attr,
2461                               struct rte_flow_error *error)
2462 {
2463         const struct rte_flow_item_gtp *gtp_spec;
2464         const struct rte_flow_item_gtp *gtp_mask;
2465         const struct rte_flow_item_gtp_psc *mask;
2466         const struct rte_flow_item_gtp_psc nic_mask = {
2467                 .hdr.type = 0xF,
2468                 .hdr.qfi = 0x3F,
2469         };
2470
2471         if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2472                 return rte_flow_error_set
2473                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2474                          "GTP PSC item must be preceded with GTP item");
2475         gtp_spec = gtp_item->spec;
2476         gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2477         /* GTP spec and E flag is requested to match zero. */
2478         if (gtp_spec &&
2479                 (gtp_mask->v_pt_rsv_flags &
2480                 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2481                 return rte_flow_error_set
2482                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2483                          "GTP E flag must be 1 to match GTP PSC");
2484         /* Check the flow is not created in group zero. */
2485         if (!attr->transfer && !attr->group)
2486                 return rte_flow_error_set
2487                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2488                          "GTP PSC is not supported for group 0");
2489         /* GTP spec is here and E flag is requested to match zero. */
2490         if (!item->spec)
2491                 return 0;
2492         mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2493         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2494                                          (const uint8_t *)&nic_mask,
2495                                          sizeof(struct rte_flow_item_gtp_psc),
2496                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2497 }
2498
2499 /**
2500  * Validate IPV4 item.
2501  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2502  * add specific validation of fragment_offset field,
2503  *
2504  * @param[in] item
2505  *   Item specification.
2506  * @param[in] item_flags
2507  *   Bit-fields that holds the items detected until now.
2508  * @param[out] error
2509  *   Pointer to error structure.
2510  *
2511  * @return
2512  *   0 on success, a negative errno value otherwise and rte_errno is set.
2513  */
2514 static int
2515 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2516                            const struct rte_flow_item *item,
2517                            uint64_t item_flags, uint64_t last_item,
2518                            uint16_t ether_type, struct rte_flow_error *error)
2519 {
2520         int ret;
2521         struct mlx5_priv *priv = dev->data->dev_private;
2522         struct mlx5_hca_attr *attr = &priv->sh->cdev->config.hca_attr;
2523         const struct rte_flow_item_ipv4 *spec = item->spec;
2524         const struct rte_flow_item_ipv4 *last = item->last;
2525         const struct rte_flow_item_ipv4 *mask = item->mask;
2526         rte_be16_t fragment_offset_spec = 0;
2527         rte_be16_t fragment_offset_last = 0;
2528         struct rte_flow_item_ipv4 nic_ipv4_mask = {
2529                 .hdr = {
2530                         .src_addr = RTE_BE32(0xffffffff),
2531                         .dst_addr = RTE_BE32(0xffffffff),
2532                         .type_of_service = 0xff,
2533                         .fragment_offset = RTE_BE16(0xffff),
2534                         .next_proto_id = 0xff,
2535                         .time_to_live = 0xff,
2536                 },
2537         };
2538
2539         if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2540                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2541                 bool ihl_cap = !tunnel ?
2542                                attr->outer_ipv4_ihl : attr->inner_ipv4_ihl;
2543                 if (!ihl_cap)
2544                         return rte_flow_error_set(error, ENOTSUP,
2545                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2546                                                   item,
2547                                                   "IPV4 ihl offload not supported");
2548                 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2549         }
2550         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2551                                            ether_type, &nic_ipv4_mask,
2552                                            MLX5_ITEM_RANGE_ACCEPTED, error);
2553         if (ret < 0)
2554                 return ret;
2555         if (spec && mask)
2556                 fragment_offset_spec = spec->hdr.fragment_offset &
2557                                        mask->hdr.fragment_offset;
2558         if (!fragment_offset_spec)
2559                 return 0;
2560         /*
2561          * spec and mask are valid, enforce using full mask to make sure the
2562          * complete value is used correctly.
2563          */
2564         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2565                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2566                 return rte_flow_error_set(error, EINVAL,
2567                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2568                                           item, "must use full mask for"
2569                                           " fragment_offset");
2570         /*
2571          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2572          * indicating this is 1st fragment of fragmented packet.
2573          * This is not yet supported in MLX5, return appropriate error message.
2574          */
2575         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2576                 return rte_flow_error_set(error, ENOTSUP,
2577                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2578                                           "match on first fragment not "
2579                                           "supported");
2580         if (fragment_offset_spec && !last)
2581                 return rte_flow_error_set(error, ENOTSUP,
2582                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2583                                           "specified value not supported");
2584         /* spec and last are valid, validate the specified range. */
2585         fragment_offset_last = last->hdr.fragment_offset &
2586                                mask->hdr.fragment_offset;
2587         /*
2588          * Match on fragment_offset spec 0x2001 and last 0x3fff
2589          * means MF is 1 and frag-offset is > 0.
2590          * This packet is fragment 2nd and onward, excluding last.
2591          * This is not yet supported in MLX5, return appropriate
2592          * error message.
2593          */
2594         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2595             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2596                 return rte_flow_error_set(error, ENOTSUP,
2597                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2598                                           last, "match on following "
2599                                           "fragments not supported");
2600         /*
2601          * Match on fragment_offset spec 0x0001 and last 0x1fff
2602          * means MF is 0 and frag-offset is > 0.
2603          * This packet is last fragment of fragmented packet.
2604          * This is not yet supported in MLX5, return appropriate
2605          * error message.
2606          */
2607         if (fragment_offset_spec == RTE_BE16(1) &&
2608             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2609                 return rte_flow_error_set(error, ENOTSUP,
2610                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2611                                           last, "match on last "
2612                                           "fragment not supported");
2613         /*
2614          * Match on fragment_offset spec 0x0001 and last 0x3fff
2615          * means MF and/or frag-offset is not 0.
2616          * This is a fragmented packet.
2617          * Other range values are invalid and rejected.
2618          */
2619         if (!(fragment_offset_spec == RTE_BE16(1) &&
2620               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2621                 return rte_flow_error_set(error, ENOTSUP,
2622                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2623                                           "specified range not supported");
2624         return 0;
2625 }
2626
2627 /**
2628  * Validate IPV6 fragment extension item.
2629  *
2630  * @param[in] item
2631  *   Item specification.
2632  * @param[in] item_flags
2633  *   Bit-fields that holds the items detected until now.
2634  * @param[out] error
2635  *   Pointer to error structure.
2636  *
2637  * @return
2638  *   0 on success, a negative errno value otherwise and rte_errno is set.
2639  */
2640 static int
2641 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2642                                     uint64_t item_flags,
2643                                     struct rte_flow_error *error)
2644 {
2645         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2646         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2647         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2648         rte_be16_t frag_data_spec = 0;
2649         rte_be16_t frag_data_last = 0;
2650         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2651         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2652                                       MLX5_FLOW_LAYER_OUTER_L4;
2653         int ret = 0;
2654         struct rte_flow_item_ipv6_frag_ext nic_mask = {
2655                 .hdr = {
2656                         .next_header = 0xff,
2657                         .frag_data = RTE_BE16(0xffff),
2658                 },
2659         };
2660
2661         if (item_flags & l4m)
2662                 return rte_flow_error_set(error, EINVAL,
2663                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2664                                           "ipv6 fragment extension item cannot "
2665                                           "follow L4 item.");
2666         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2667             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2668                 return rte_flow_error_set(error, EINVAL,
2669                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2670                                           "ipv6 fragment extension item must "
2671                                           "follow ipv6 item");
2672         if (spec && mask)
2673                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2674         if (!frag_data_spec)
2675                 return 0;
2676         /*
2677          * spec and mask are valid, enforce using full mask to make sure the
2678          * complete value is used correctly.
2679          */
2680         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2681                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2682                 return rte_flow_error_set(error, EINVAL,
2683                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2684                                           item, "must use full mask for"
2685                                           " frag_data");
2686         /*
2687          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2688          * This is 1st fragment of fragmented packet.
2689          */
2690         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2691                 return rte_flow_error_set(error, ENOTSUP,
2692                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2693                                           "match on first fragment not "
2694                                           "supported");
2695         if (frag_data_spec && !last)
2696                 return rte_flow_error_set(error, EINVAL,
2697                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2698                                           "specified value not supported");
2699         ret = mlx5_flow_item_acceptable
2700                                 (item, (const uint8_t *)mask,
2701                                  (const uint8_t *)&nic_mask,
2702                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
2703                                  MLX5_ITEM_RANGE_ACCEPTED, error);
2704         if (ret)
2705                 return ret;
2706         /* spec and last are valid, validate the specified range. */
2707         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2708         /*
2709          * Match on frag_data spec 0x0009 and last 0xfff9
2710          * means M is 1 and frag-offset is > 0.
2711          * This packet is fragment 2nd and onward, excluding last.
2712          * This is not yet supported in MLX5, return appropriate
2713          * error message.
2714          */
2715         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2716                                        RTE_IPV6_EHDR_MF_MASK) &&
2717             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2718                 return rte_flow_error_set(error, ENOTSUP,
2719                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2720                                           last, "match on following "
2721                                           "fragments not supported");
2722         /*
2723          * Match on frag_data spec 0x0008 and last 0xfff8
2724          * means M is 0 and frag-offset is > 0.
2725          * This packet is last fragment of fragmented packet.
2726          * This is not yet supported in MLX5, return appropriate
2727          * error message.
2728          */
2729         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2730             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2731                 return rte_flow_error_set(error, ENOTSUP,
2732                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2733                                           last, "match on last "
2734                                           "fragment not supported");
2735         /* Other range values are invalid and rejected. */
2736         return rte_flow_error_set(error, EINVAL,
2737                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2738                                   "specified range not supported");
2739 }
2740
2741 /*
2742  * Validate ASO CT item.
2743  *
2744  * @param[in] dev
2745  *   Pointer to the rte_eth_dev structure.
2746  * @param[in] item
2747  *   Item specification.
2748  * @param[in] item_flags
2749  *   Pointer to bit-fields that holds the items detected until now.
2750  * @param[out] error
2751  *   Pointer to error structure.
2752  *
2753  * @return
2754  *   0 on success, a negative errno value otherwise and rte_errno is set.
2755  */
2756 static int
2757 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2758                              const struct rte_flow_item *item,
2759                              uint64_t *item_flags,
2760                              struct rte_flow_error *error)
2761 {
2762         const struct rte_flow_item_conntrack *spec = item->spec;
2763         const struct rte_flow_item_conntrack *mask = item->mask;
2764         RTE_SET_USED(dev);
2765         uint32_t flags;
2766
2767         if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2768                 return rte_flow_error_set(error, EINVAL,
2769                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2770                                           "Only one CT is supported");
2771         if (!mask)
2772                 mask = &rte_flow_item_conntrack_mask;
2773         flags = spec->flags & mask->flags;
2774         if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2775             ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2776              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2777              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2778                 return rte_flow_error_set(error, EINVAL,
2779                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2780                                           "Conflict status bits");
2781         /* State change also needs to be considered. */
2782         *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2783         return 0;
2784 }
2785
2786 /**
2787  * Validate the pop VLAN action.
2788  *
2789  * @param[in] dev
2790  *   Pointer to the rte_eth_dev structure.
2791  * @param[in] action_flags
2792  *   Holds the actions detected until now.
2793  * @param[in] action
2794  *   Pointer to the pop vlan action.
2795  * @param[in] item_flags
2796  *   The items found in this flow rule.
2797  * @param[in] attr
2798  *   Pointer to flow attributes.
2799  * @param[out] error
2800  *   Pointer to error structure.
2801  *
2802  * @return
2803  *   0 on success, a negative errno value otherwise and rte_errno is set.
2804  */
2805 static int
2806 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2807                                  uint64_t action_flags,
2808                                  const struct rte_flow_action *action,
2809                                  uint64_t item_flags,
2810                                  const struct rte_flow_attr *attr,
2811                                  struct rte_flow_error *error)
2812 {
2813         const struct mlx5_priv *priv = dev->data->dev_private;
2814         struct mlx5_dev_ctx_shared *sh = priv->sh;
2815         bool direction_error = false;
2816
2817         if (!priv->sh->pop_vlan_action)
2818                 return rte_flow_error_set(error, ENOTSUP,
2819                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2820                                           NULL,
2821                                           "pop vlan action is not supported");
2822         /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2823         if (attr->transfer) {
2824                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2825                 bool is_cx5 = sh->steering_format_version ==
2826                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2827
2828                 if (fdb_tx && is_cx5)
2829                         direction_error = true;
2830         } else if (attr->egress) {
2831                 direction_error = true;
2832         }
2833         if (direction_error)
2834                 return rte_flow_error_set(error, ENOTSUP,
2835                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2836                                           NULL,
2837                                           "pop vlan action not supported for egress");
2838         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2839                 return rte_flow_error_set(error, ENOTSUP,
2840                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2841                                           "no support for multiple VLAN "
2842                                           "actions");
2843         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2844         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2845             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2846                 return rte_flow_error_set(error, ENOTSUP,
2847                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2848                                           NULL,
2849                                           "cannot pop vlan after decap without "
2850                                           "match on inner vlan in the flow");
2851         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2852         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2853             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2854                 return rte_flow_error_set(error, ENOTSUP,
2855                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2856                                           NULL,
2857                                           "cannot pop vlan without a "
2858                                           "match on (outer) vlan in the flow");
2859         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2860                 return rte_flow_error_set(error, EINVAL,
2861                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2862                                           "wrong action order, port_id should "
2863                                           "be after pop VLAN action");
2864         if (!attr->transfer && priv->representor)
2865                 return rte_flow_error_set(error, ENOTSUP,
2866                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2867                                           "pop vlan action for VF representor "
2868                                           "not supported on NIC table");
2869         return 0;
2870 }
2871
2872 /**
2873  * Get VLAN default info from vlan match info.
2874  *
2875  * @param[in] items
2876  *   the list of item specifications.
2877  * @param[out] vlan
2878  *   pointer VLAN info to fill to.
2879  *
2880  * @return
2881  *   0 on success, a negative errno value otherwise and rte_errno is set.
2882  */
2883 static void
2884 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2885                                   struct rte_vlan_hdr *vlan)
2886 {
2887         const struct rte_flow_item_vlan nic_mask = {
2888                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2889                                 MLX5DV_FLOW_VLAN_VID_MASK),
2890                 .inner_type = RTE_BE16(0xffff),
2891         };
2892
2893         if (items == NULL)
2894                 return;
2895         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2896                 int type = items->type;
2897
2898                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2899                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2900                         break;
2901         }
2902         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2903                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2904                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2905
2906                 /* If VLAN item in pattern doesn't contain data, return here. */
2907                 if (!vlan_v)
2908                         return;
2909                 if (!vlan_m)
2910                         vlan_m = &nic_mask;
2911                 /* Only full match values are accepted */
2912                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2913                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2914                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2915                         vlan->vlan_tci |=
2916                                 rte_be_to_cpu_16(vlan_v->tci &
2917                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2918                 }
2919                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2920                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2921                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2922                         vlan->vlan_tci |=
2923                                 rte_be_to_cpu_16(vlan_v->tci &
2924                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2925                 }
2926                 if (vlan_m->inner_type == nic_mask.inner_type)
2927                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2928                                                            vlan_m->inner_type);
2929         }
2930 }
2931
2932 /**
2933  * Validate the push VLAN action.
2934  *
2935  * @param[in] dev
2936  *   Pointer to the rte_eth_dev structure.
2937  * @param[in] action_flags
2938  *   Holds the actions detected until now.
2939  * @param[in] item_flags
2940  *   The items found in this flow rule.
2941  * @param[in] action
2942  *   Pointer to the action structure.
2943  * @param[in] attr
2944  *   Pointer to flow attributes
2945  * @param[out] error
2946  *   Pointer to error structure.
2947  *
2948  * @return
2949  *   0 on success, a negative errno value otherwise and rte_errno is set.
2950  */
2951 static int
2952 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2953                                   uint64_t action_flags,
2954                                   const struct rte_flow_item_vlan *vlan_m,
2955                                   const struct rte_flow_action *action,
2956                                   const struct rte_flow_attr *attr,
2957                                   struct rte_flow_error *error)
2958 {
2959         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2960         const struct mlx5_priv *priv = dev->data->dev_private;
2961
2962         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2963             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2964                 return rte_flow_error_set(error, EINVAL,
2965                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2966                                           "invalid vlan ethertype");
2967         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2968                 return rte_flow_error_set(error, EINVAL,
2969                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2970                                           "wrong action order, port_id should "
2971                                           "be after push VLAN");
2972         if (!attr->transfer && priv->representor)
2973                 return rte_flow_error_set(error, ENOTSUP,
2974                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2975                                           "push vlan action for VF representor "
2976                                           "not supported on NIC table");
2977         if (vlan_m &&
2978             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2979             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2980                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2981             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2982             !(mlx5_flow_find_action
2983                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2984                 return rte_flow_error_set(error, EINVAL,
2985                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2986                                           "not full match mask on VLAN PCP and "
2987                                           "there is no of_set_vlan_pcp action, "
2988                                           "push VLAN action cannot figure out "
2989                                           "PCP value");
2990         if (vlan_m &&
2991             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2992             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2993                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2994             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2995             !(mlx5_flow_find_action
2996                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2997                 return rte_flow_error_set(error, EINVAL,
2998                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2999                                           "not full match mask on VLAN VID and "
3000                                           "there is no of_set_vlan_vid action, "
3001                                           "push VLAN action cannot figure out "
3002                                           "VID value");
3003         (void)attr;
3004         return 0;
3005 }
3006
3007 /**
3008  * Validate the set VLAN PCP.
3009  *
3010  * @param[in] action_flags
3011  *   Holds the actions detected until now.
3012  * @param[in] actions
3013  *   Pointer to the list of actions remaining in the flow rule.
3014  * @param[out] error
3015  *   Pointer to error structure.
3016  *
3017  * @return
3018  *   0 on success, a negative errno value otherwise and rte_errno is set.
3019  */
3020 static int
3021 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
3022                                      const struct rte_flow_action actions[],
3023                                      struct rte_flow_error *error)
3024 {
3025         const struct rte_flow_action *action = actions;
3026         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
3027
3028         if (conf->vlan_pcp > 7)
3029                 return rte_flow_error_set(error, EINVAL,
3030                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3031                                           "VLAN PCP value is too big");
3032         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
3033                 return rte_flow_error_set(error, ENOTSUP,
3034                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3035                                           "set VLAN PCP action must follow "
3036                                           "the push VLAN action");
3037         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
3038                 return rte_flow_error_set(error, ENOTSUP,
3039                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3040                                           "Multiple VLAN PCP modification are "
3041                                           "not supported");
3042         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3043                 return rte_flow_error_set(error, EINVAL,
3044                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3045                                           "wrong action order, port_id should "
3046                                           "be after set VLAN PCP");
3047         return 0;
3048 }
3049
3050 /**
3051  * Validate the set VLAN VID.
3052  *
3053  * @param[in] item_flags
3054  *   Holds the items detected in this rule.
3055  * @param[in] action_flags
3056  *   Holds the actions detected until now.
3057  * @param[in] actions
3058  *   Pointer to the list of actions remaining in the flow rule.
3059  * @param[out] error
3060  *   Pointer to error structure.
3061  *
3062  * @return
3063  *   0 on success, a negative errno value otherwise and rte_errno is set.
3064  */
3065 static int
3066 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
3067                                      uint64_t action_flags,
3068                                      const struct rte_flow_action actions[],
3069                                      struct rte_flow_error *error)
3070 {
3071         const struct rte_flow_action *action = actions;
3072         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3073
3074         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3075                 return rte_flow_error_set(error, EINVAL,
3076                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3077                                           "VLAN VID value is too big");
3078         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3079             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3080                 return rte_flow_error_set(error, ENOTSUP,
3081                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3082                                           "set VLAN VID action must follow push"
3083                                           " VLAN action or match on VLAN item");
3084         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3085                 return rte_flow_error_set(error, ENOTSUP,
3086                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3087                                           "Multiple VLAN VID modifications are "
3088                                           "not supported");
3089         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3090                 return rte_flow_error_set(error, EINVAL,
3091                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3092                                           "wrong action order, port_id should "
3093                                           "be after set VLAN VID");
3094         return 0;
3095 }
3096
3097 /*
3098  * Validate the FLAG action.
3099  *
3100  * @param[in] dev
3101  *   Pointer to the rte_eth_dev structure.
3102  * @param[in] action_flags
3103  *   Holds the actions detected until now.
3104  * @param[in] attr
3105  *   Pointer to flow attributes
3106  * @param[out] error
3107  *   Pointer to error structure.
3108  *
3109  * @return
3110  *   0 on success, a negative errno value otherwise and rte_errno is set.
3111  */
3112 static int
3113 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3114                              uint64_t action_flags,
3115                              const struct rte_flow_attr *attr,
3116                              struct rte_flow_error *error)
3117 {
3118         struct mlx5_priv *priv = dev->data->dev_private;
3119         struct mlx5_sh_config *config = &priv->sh->config;
3120         int ret;
3121
3122         /* Fall back if no extended metadata register support. */
3123         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3124                 return mlx5_flow_validate_action_flag(action_flags, attr,
3125                                                       error);
3126         /* Extensive metadata mode requires registers. */
3127         if (!mlx5_flow_ext_mreg_supported(dev))
3128                 return rte_flow_error_set(error, ENOTSUP,
3129                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3130                                           "no metadata registers "
3131                                           "to support flag action");
3132         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3133                 return rte_flow_error_set(error, ENOTSUP,
3134                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3135                                           "extended metadata register"
3136                                           " isn't available");
3137         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3138         if (ret < 0)
3139                 return ret;
3140         MLX5_ASSERT(ret > 0);
3141         if (action_flags & MLX5_FLOW_ACTION_MARK)
3142                 return rte_flow_error_set(error, EINVAL,
3143                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3144                                           "can't mark and flag in same flow");
3145         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3146                 return rte_flow_error_set(error, EINVAL,
3147                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3148                                           "can't have 2 flag"
3149                                           " actions in same flow");
3150         return 0;
3151 }
3152
3153 /**
3154  * Validate MARK action.
3155  *
3156  * @param[in] dev
3157  *   Pointer to the rte_eth_dev structure.
3158  * @param[in] action
3159  *   Pointer to action.
3160  * @param[in] action_flags
3161  *   Holds the actions detected until now.
3162  * @param[in] attr
3163  *   Pointer to flow attributes
3164  * @param[out] error
3165  *   Pointer to error structure.
3166  *
3167  * @return
3168  *   0 on success, a negative errno value otherwise and rte_errno is set.
3169  */
3170 static int
3171 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3172                              const struct rte_flow_action *action,
3173                              uint64_t action_flags,
3174                              const struct rte_flow_attr *attr,
3175                              struct rte_flow_error *error)
3176 {
3177         struct mlx5_priv *priv = dev->data->dev_private;
3178         struct mlx5_sh_config *config = &priv->sh->config;
3179         const struct rte_flow_action_mark *mark = action->conf;
3180         int ret;
3181
3182         if (is_tunnel_offload_active(dev))
3183                 return rte_flow_error_set(error, ENOTSUP,
3184                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3185                                           "no mark action "
3186                                           "if tunnel offload active");
3187         /* Fall back if no extended metadata register support. */
3188         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3189                 return mlx5_flow_validate_action_mark(action, action_flags,
3190                                                       attr, error);
3191         /* Extensive metadata mode requires registers. */
3192         if (!mlx5_flow_ext_mreg_supported(dev))
3193                 return rte_flow_error_set(error, ENOTSUP,
3194                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3195                                           "no metadata registers "
3196                                           "to support mark action");
3197         if (!priv->sh->dv_mark_mask)
3198                 return rte_flow_error_set(error, ENOTSUP,
3199                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3200                                           "extended metadata register"
3201                                           " isn't available");
3202         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3203         if (ret < 0)
3204                 return ret;
3205         MLX5_ASSERT(ret > 0);
3206         if (!mark)
3207                 return rte_flow_error_set(error, EINVAL,
3208                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3209                                           "configuration cannot be null");
3210         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3211                 return rte_flow_error_set(error, EINVAL,
3212                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3213                                           &mark->id,
3214                                           "mark id exceeds the limit");
3215         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3216                 return rte_flow_error_set(error, EINVAL,
3217                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3218                                           "can't flag and mark in same flow");
3219         if (action_flags & MLX5_FLOW_ACTION_MARK)
3220                 return rte_flow_error_set(error, EINVAL,
3221                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3222                                           "can't have 2 mark actions in same"
3223                                           " flow");
3224         return 0;
3225 }
3226
3227 /**
3228  * Validate SET_META action.
3229  *
3230  * @param[in] dev
3231  *   Pointer to the rte_eth_dev structure.
3232  * @param[in] action
3233  *   Pointer to the action structure.
3234  * @param[in] action_flags
3235  *   Holds the actions detected until now.
3236  * @param[in] attr
3237  *   Pointer to flow attributes
3238  * @param[out] error
3239  *   Pointer to error structure.
3240  *
3241  * @return
3242  *   0 on success, a negative errno value otherwise and rte_errno is set.
3243  */
3244 static int
3245 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3246                                  const struct rte_flow_action *action,
3247                                  uint64_t action_flags __rte_unused,
3248                                  const struct rte_flow_attr *attr,
3249                                  struct rte_flow_error *error)
3250 {
3251         struct mlx5_priv *priv = dev->data->dev_private;
3252         struct mlx5_sh_config *config = &priv->sh->config;
3253         const struct rte_flow_action_set_meta *conf;
3254         uint32_t nic_mask = UINT32_MAX;
3255         int reg;
3256
3257         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
3258             !mlx5_flow_ext_mreg_supported(dev))
3259                 return rte_flow_error_set(error, ENOTSUP,
3260                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3261                                           "extended metadata register"
3262                                           " isn't supported");
3263         reg = flow_dv_get_metadata_reg(dev, attr, error);
3264         if (reg < 0)
3265                 return reg;
3266         if (reg == REG_NON)
3267                 return rte_flow_error_set(error, ENOTSUP,
3268                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3269                                           "unavailable extended metadata register");
3270         if (reg != REG_A && reg != REG_B) {
3271                 struct mlx5_priv *priv = dev->data->dev_private;
3272
3273                 nic_mask = priv->sh->dv_meta_mask;
3274         }
3275         if (!(action->conf))
3276                 return rte_flow_error_set(error, EINVAL,
3277                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3278                                           "configuration cannot be null");
3279         conf = (const struct rte_flow_action_set_meta *)action->conf;
3280         if (!conf->mask)
3281                 return rte_flow_error_set(error, EINVAL,
3282                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3283                                           "zero mask doesn't have any effect");
3284         if (conf->mask & ~nic_mask)
3285                 return rte_flow_error_set(error, EINVAL,
3286                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3287                                           "meta data must be within reg C0");
3288         return 0;
3289 }
3290
3291 /**
3292  * Validate SET_TAG action.
3293  *
3294  * @param[in] dev
3295  *   Pointer to the rte_eth_dev structure.
3296  * @param[in] action
3297  *   Pointer to the action structure.
3298  * @param[in] action_flags
3299  *   Holds the actions detected until now.
3300  * @param[in] attr
3301  *   Pointer to flow attributes
3302  * @param[out] error
3303  *   Pointer to error structure.
3304  *
3305  * @return
3306  *   0 on success, a negative errno value otherwise and rte_errno is set.
3307  */
3308 static int
3309 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3310                                 const struct rte_flow_action *action,
3311                                 uint64_t action_flags,
3312                                 const struct rte_flow_attr *attr,
3313                                 struct rte_flow_error *error)
3314 {
3315         const struct rte_flow_action_set_tag *conf;
3316         const uint64_t terminal_action_flags =
3317                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3318                 MLX5_FLOW_ACTION_RSS;
3319         int ret;
3320
3321         if (!mlx5_flow_ext_mreg_supported(dev))
3322                 return rte_flow_error_set(error, ENOTSUP,
3323                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3324                                           "extensive metadata register"
3325                                           " isn't supported");
3326         if (!(action->conf))
3327                 return rte_flow_error_set(error, EINVAL,
3328                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3329                                           "configuration cannot be null");
3330         conf = (const struct rte_flow_action_set_tag *)action->conf;
3331         if (!conf->mask)
3332                 return rte_flow_error_set(error, EINVAL,
3333                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3334                                           "zero mask doesn't have any effect");
3335         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3336         if (ret < 0)
3337                 return ret;
3338         if (!attr->transfer && attr->ingress &&
3339             (action_flags & terminal_action_flags))
3340                 return rte_flow_error_set(error, EINVAL,
3341                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3342                                           "set_tag has no effect"
3343                                           " with terminal actions");
3344         return 0;
3345 }
3346
3347 /**
3348  * Indicates whether ASO aging is supported.
3349  *
3350  * @param[in] sh
3351  *   Pointer to shared device context structure.
3352  * @param[in] attr
3353  *   Attributes of flow that includes AGE action.
3354  *
3355  * @return
3356  *   True when ASO aging is supported, false otherwise.
3357  */
3358 static inline bool
3359 flow_hit_aso_supported(const struct mlx5_dev_ctx_shared *sh,
3360                 const struct rte_flow_attr *attr)
3361 {
3362         MLX5_ASSERT(sh && attr);
3363         return (sh->flow_hit_aso_en && (attr->transfer || attr->group));
3364 }
3365
3366 /**
3367  * Validate count action.
3368  *
3369  * @param[in] dev
3370  *   Pointer to rte_eth_dev structure.
3371  * @param[in] shared
3372  *   Indicator if action is shared.
3373  * @param[in] action_flags
3374  *   Holds the actions detected until now.
3375  * @param[in] attr
3376  *   Attributes of flow that includes this action.
3377  * @param[out] error
3378  *   Pointer to error structure.
3379  *
3380  * @return
3381  *   0 on success, a negative errno value otherwise and rte_errno is set.
3382  */
3383 static int
3384 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3385                               uint64_t action_flags,
3386                               const struct rte_flow_attr *attr,
3387                               struct rte_flow_error *error)
3388 {
3389         struct mlx5_priv *priv = dev->data->dev_private;
3390
3391         if (!priv->sh->cdev->config.devx)
3392                 goto notsup_err;
3393         if (action_flags & MLX5_FLOW_ACTION_COUNT)
3394                 return rte_flow_error_set(error, EINVAL,
3395                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3396                                           "duplicate count actions set");
3397         if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3398             !flow_hit_aso_supported(priv->sh, attr))
3399                 return rte_flow_error_set(error, EINVAL,
3400                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3401                                           "old age and indirect count combination is not supported");
3402 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3403         return 0;
3404 #endif
3405 notsup_err:
3406         return rte_flow_error_set
3407                       (error, ENOTSUP,
3408                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3409                        NULL,
3410                        "count action not supported");
3411 }
3412
3413 /**
3414  * Validate the L2 encap action.
3415  *
3416  * @param[in] dev
3417  *   Pointer to the rte_eth_dev structure.
3418  * @param[in] action_flags
3419  *   Holds the actions detected until now.
3420  * @param[in] action
3421  *   Pointer to the action structure.
3422  * @param[in] attr
3423  *   Pointer to flow attributes.
3424  * @param[out] error
3425  *   Pointer to error structure.
3426  *
3427  * @return
3428  *   0 on success, a negative errno value otherwise and rte_errno is set.
3429  */
3430 static int
3431 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3432                                  uint64_t action_flags,
3433                                  const struct rte_flow_action *action,
3434                                  const struct rte_flow_attr *attr,
3435                                  struct rte_flow_error *error)
3436 {
3437         const struct mlx5_priv *priv = dev->data->dev_private;
3438
3439         if (!(action->conf))
3440                 return rte_flow_error_set(error, EINVAL,
3441                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3442                                           "configuration cannot be null");
3443         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3444                 return rte_flow_error_set(error, EINVAL,
3445                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3446                                           "can only have a single encap action "
3447                                           "in a flow");
3448         if (!attr->transfer && priv->representor)
3449                 return rte_flow_error_set(error, ENOTSUP,
3450                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3451                                           "encap action for VF representor "
3452                                           "not supported on NIC table");
3453         return 0;
3454 }
3455
3456 /**
3457  * Validate a decap action.
3458  *
3459  * @param[in] dev
3460  *   Pointer to the rte_eth_dev structure.
3461  * @param[in] action_flags
3462  *   Holds the actions detected until now.
3463  * @param[in] action
3464  *   Pointer to the action structure.
3465  * @param[in] item_flags
3466  *   Holds the items detected.
3467  * @param[in] attr
3468  *   Pointer to flow attributes
3469  * @param[out] error
3470  *   Pointer to error structure.
3471  *
3472  * @return
3473  *   0 on success, a negative errno value otherwise and rte_errno is set.
3474  */
3475 static int
3476 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3477                               uint64_t action_flags,
3478                               const struct rte_flow_action *action,
3479                               const uint64_t item_flags,
3480                               const struct rte_flow_attr *attr,
3481                               struct rte_flow_error *error)
3482 {
3483         const struct mlx5_priv *priv = dev->data->dev_private;
3484
3485         if (priv->sh->cdev->config.hca_attr.scatter_fcs_w_decap_disable &&
3486             !priv->sh->config.decap_en)
3487                 return rte_flow_error_set(error, ENOTSUP,
3488                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3489                                           "decap is not enabled");
3490         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3491                 return rte_flow_error_set(error, ENOTSUP,
3492                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3493                                           action_flags &
3494                                           MLX5_FLOW_ACTION_DECAP ? "can only "
3495                                           "have a single decap action" : "decap "
3496                                           "after encap is not supported");
3497         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3498                 return rte_flow_error_set(error, EINVAL,
3499                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3500                                           "can't have decap action after"
3501                                           " modify action");
3502         if (attr->egress)
3503                 return rte_flow_error_set(error, ENOTSUP,
3504                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3505                                           NULL,
3506                                           "decap action not supported for "
3507                                           "egress");
3508         if (!attr->transfer && priv->representor)
3509                 return rte_flow_error_set(error, ENOTSUP,
3510                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3511                                           "decap action for VF representor "
3512                                           "not supported on NIC table");
3513         if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3514             !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3515                 return rte_flow_error_set(error, ENOTSUP,
3516                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3517                                 "VXLAN item should be present for VXLAN decap");
3518         return 0;
3519 }
3520
3521 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3522
3523 /**
3524  * Validate the raw encap and decap actions.
3525  *
3526  * @param[in] dev
3527  *   Pointer to the rte_eth_dev structure.
3528  * @param[in] decap
3529  *   Pointer to the decap action.
3530  * @param[in] encap
3531  *   Pointer to the encap action.
3532  * @param[in] attr
3533  *   Pointer to flow attributes
3534  * @param[in/out] action_flags
3535  *   Holds the actions detected until now.
3536  * @param[out] actions_n
3537  *   pointer to the number of actions counter.
3538  * @param[in] action
3539  *   Pointer to the action structure.
3540  * @param[in] item_flags
3541  *   Holds the items detected.
3542  * @param[out] error
3543  *   Pointer to error structure.
3544  *
3545  * @return
3546  *   0 on success, a negative errno value otherwise and rte_errno is set.
3547  */
3548 static int
3549 flow_dv_validate_action_raw_encap_decap
3550         (struct rte_eth_dev *dev,
3551          const struct rte_flow_action_raw_decap *decap,
3552          const struct rte_flow_action_raw_encap *encap,
3553          const struct rte_flow_attr *attr, uint64_t *action_flags,
3554          int *actions_n, const struct rte_flow_action *action,
3555          uint64_t item_flags, struct rte_flow_error *error)
3556 {
3557         const struct mlx5_priv *priv = dev->data->dev_private;
3558         int ret;
3559
3560         if (encap && (!encap->size || !encap->data))
3561                 return rte_flow_error_set(error, EINVAL,
3562                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3563                                           "raw encap data cannot be empty");
3564         if (decap && encap) {
3565                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3566                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3567                         /* L3 encap. */
3568                         decap = NULL;
3569                 else if (encap->size <=
3570                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3571                            decap->size >
3572                            MLX5_ENCAPSULATION_DECISION_SIZE)
3573                         /* L3 decap. */
3574                         encap = NULL;
3575                 else if (encap->size >
3576                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3577                            decap->size >
3578                            MLX5_ENCAPSULATION_DECISION_SIZE)
3579                         /* 2 L2 actions: encap and decap. */
3580                         ;
3581                 else
3582                         return rte_flow_error_set(error,
3583                                 ENOTSUP,
3584                                 RTE_FLOW_ERROR_TYPE_ACTION,
3585                                 NULL, "unsupported too small "
3586                                 "raw decap and too small raw "
3587                                 "encap combination");
3588         }
3589         if (decap) {
3590                 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3591                                                     item_flags, attr, error);
3592                 if (ret < 0)
3593                         return ret;
3594                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3595                 ++(*actions_n);
3596         }
3597         if (encap) {
3598                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3599                         return rte_flow_error_set(error, ENOTSUP,
3600                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3601                                                   NULL,
3602                                                   "small raw encap size");
3603                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3604                         return rte_flow_error_set(error, EINVAL,
3605                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3606                                                   NULL,
3607                                                   "more than one encap action");
3608                 if (!attr->transfer && priv->representor)
3609                         return rte_flow_error_set
3610                                         (error, ENOTSUP,
3611                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3612                                          "encap action for VF representor "
3613                                          "not supported on NIC table");
3614                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3615                 ++(*actions_n);
3616         }
3617         return 0;
3618 }
3619
3620 /*
3621  * Validate the ASO CT action.
3622  *
3623  * @param[in] dev
3624  *   Pointer to the rte_eth_dev structure.
3625  * @param[in] action_flags
3626  *   Holds the actions detected until now.
3627  * @param[in] item_flags
3628  *   The items found in this flow rule.
3629  * @param[in] attr
3630  *   Pointer to flow attributes.
3631  * @param[out] error
3632  *   Pointer to error structure.
3633  *
3634  * @return
3635  *   0 on success, a negative errno value otherwise and rte_errno is set.
3636  */
3637 static int
3638 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3639                                uint64_t action_flags,
3640                                uint64_t item_flags,
3641                                const struct rte_flow_attr *attr,
3642                                struct rte_flow_error *error)
3643 {
3644         RTE_SET_USED(dev);
3645
3646         if (attr->group == 0 && !attr->transfer)
3647                 return rte_flow_error_set(error, ENOTSUP,
3648                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3649                                           NULL,
3650                                           "Only support non-root table");
3651         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3652                 return rte_flow_error_set(error, ENOTSUP,
3653                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3654                                           "CT cannot follow a fate action");
3655         if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3656             (action_flags & MLX5_FLOW_ACTION_AGE))
3657                 return rte_flow_error_set(error, EINVAL,
3658                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3659                                           "Only one ASO action is supported");
3660         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3661                 return rte_flow_error_set(error, EINVAL,
3662                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3663                                           "Encap cannot exist before CT");
3664         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3665                 return rte_flow_error_set(error, EINVAL,
3666                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3667                                           "Not a outer TCP packet");
3668         return 0;
3669 }
3670
3671 int
3672 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3673                              struct mlx5_list_entry *entry, void *cb_ctx)
3674 {
3675         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3676         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3677         struct mlx5_flow_dv_encap_decap_resource *resource;
3678
3679         resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3680                                 entry);
3681         if (resource->reformat_type == ctx_resource->reformat_type &&
3682             resource->ft_type == ctx_resource->ft_type &&
3683             resource->flags == ctx_resource->flags &&
3684             resource->size == ctx_resource->size &&
3685             !memcmp((const void *)resource->buf,
3686                     (const void *)ctx_resource->buf,
3687                     resource->size))
3688                 return 0;
3689         return -1;
3690 }
3691
3692 struct mlx5_list_entry *
3693 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3694 {
3695         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3696         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3697         struct mlx5dv_dr_domain *domain;
3698         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3699         struct mlx5_flow_dv_encap_decap_resource *resource;
3700         uint32_t idx;
3701         int ret;
3702
3703         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3704                 domain = sh->fdb_domain;
3705         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3706                 domain = sh->rx_domain;
3707         else
3708                 domain = sh->tx_domain;
3709         /* Register new encap/decap resource. */
3710         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3711         if (!resource) {
3712                 rte_flow_error_set(ctx->error, ENOMEM,
3713                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3714                                    "cannot allocate resource memory");
3715                 return NULL;
3716         }
3717         *resource = *ctx_resource;
3718         resource->idx = idx;
3719         ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->cdev->ctx,
3720                                                               domain, resource,
3721                                                              &resource->action);
3722         if (ret) {
3723                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3724                 rte_flow_error_set(ctx->error, ENOMEM,
3725                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3726                                    NULL, "cannot create action");
3727                 return NULL;
3728         }
3729
3730         return &resource->entry;
3731 }
3732
3733 struct mlx5_list_entry *
3734 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3735                              void *cb_ctx)
3736 {
3737         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3738         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3739         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3740         uint32_t idx;
3741
3742         cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3743                                            &idx);
3744         if (!cache_resource) {
3745                 rte_flow_error_set(ctx->error, ENOMEM,
3746                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3747                                    "cannot allocate resource memory");
3748                 return NULL;
3749         }
3750         memcpy(cache_resource, oentry, sizeof(*cache_resource));
3751         cache_resource->idx = idx;
3752         return &cache_resource->entry;
3753 }
3754
3755 void
3756 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3757 {
3758         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3759         struct mlx5_flow_dv_encap_decap_resource *res =
3760                                        container_of(entry, typeof(*res), entry);
3761
3762         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3763 }
3764
3765 /**
3766  * Find existing encap/decap resource or create and register a new one.
3767  *
3768  * @param[in, out] dev
3769  *   Pointer to rte_eth_dev structure.
3770  * @param[in, out] resource
3771  *   Pointer to encap/decap resource.
3772  * @parm[in, out] dev_flow
3773  *   Pointer to the dev_flow.
3774  * @param[out] error
3775  *   pointer to error structure.
3776  *
3777  * @return
3778  *   0 on success otherwise -errno and errno is set.
3779  */
3780 static int
3781 flow_dv_encap_decap_resource_register
3782                         (struct rte_eth_dev *dev,
3783                          struct mlx5_flow_dv_encap_decap_resource *resource,
3784                          struct mlx5_flow *dev_flow,
3785                          struct rte_flow_error *error)
3786 {
3787         struct mlx5_priv *priv = dev->data->dev_private;
3788         struct mlx5_dev_ctx_shared *sh = priv->sh;
3789         struct mlx5_list_entry *entry;
3790         union {
3791                 struct {
3792                         uint32_t ft_type:8;
3793                         uint32_t refmt_type:8;
3794                         /*
3795                          * Header reformat actions can be shared between
3796                          * non-root tables. One bit to indicate non-root
3797                          * table or not.
3798                          */
3799                         uint32_t is_root:1;
3800                         uint32_t reserve:15;
3801                 };
3802                 uint32_t v32;
3803         } encap_decap_key = {
3804                 {
3805                         .ft_type = resource->ft_type,
3806                         .refmt_type = resource->reformat_type,
3807                         .is_root = !!dev_flow->dv.group,
3808                         .reserve = 0,
3809                 }
3810         };
3811         struct mlx5_flow_cb_ctx ctx = {
3812                 .error = error,
3813                 .data = resource,
3814         };
3815         struct mlx5_hlist *encaps_decaps;
3816         uint64_t key64;
3817
3818         encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3819                                 "encaps_decaps",
3820                                 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3821                                 true, true, sh,
3822                                 flow_dv_encap_decap_create_cb,
3823                                 flow_dv_encap_decap_match_cb,
3824                                 flow_dv_encap_decap_remove_cb,
3825                                 flow_dv_encap_decap_clone_cb,
3826                                 flow_dv_encap_decap_clone_free_cb,
3827                                 error);
3828         if (unlikely(!encaps_decaps))
3829                 return -rte_errno;
3830         resource->flags = dev_flow->dv.group ? 0 : 1;
3831         key64 =  __rte_raw_cksum(&encap_decap_key.v32,
3832                                  sizeof(encap_decap_key.v32), 0);
3833         if (resource->reformat_type !=
3834             MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3835             resource->size)
3836                 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3837         entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3838         if (!entry)
3839                 return -rte_errno;
3840         resource = container_of(entry, typeof(*resource), entry);
3841         dev_flow->dv.encap_decap = resource;
3842         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3843         return 0;
3844 }
3845
3846 /**
3847  * Find existing table jump resource or create and register a new one.
3848  *
3849  * @param[in, out] dev
3850  *   Pointer to rte_eth_dev structure.
3851  * @param[in, out] tbl
3852  *   Pointer to flow table resource.
3853  * @parm[in, out] dev_flow
3854  *   Pointer to the dev_flow.
3855  * @param[out] error
3856  *   pointer to error structure.
3857  *
3858  * @return
3859  *   0 on success otherwise -errno and errno is set.
3860  */
3861 static int
3862 flow_dv_jump_tbl_resource_register
3863                         (struct rte_eth_dev *dev __rte_unused,
3864                          struct mlx5_flow_tbl_resource *tbl,
3865                          struct mlx5_flow *dev_flow,
3866                          struct rte_flow_error *error __rte_unused)
3867 {
3868         struct mlx5_flow_tbl_data_entry *tbl_data =
3869                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3870
3871         MLX5_ASSERT(tbl);
3872         MLX5_ASSERT(tbl_data->jump.action);
3873         dev_flow->handle->rix_jump = tbl_data->idx;
3874         dev_flow->dv.jump = &tbl_data->jump;
3875         return 0;
3876 }
3877
3878 int
3879 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3880                          struct mlx5_list_entry *entry, void *cb_ctx)
3881 {
3882         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3883         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3884         struct mlx5_flow_dv_port_id_action_resource *res =
3885                                        container_of(entry, typeof(*res), entry);
3886
3887         return ref->port_id != res->port_id;
3888 }
3889
3890 struct mlx5_list_entry *
3891 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3892 {
3893         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3894         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3895         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3896         struct mlx5_flow_dv_port_id_action_resource *resource;
3897         uint32_t idx;
3898         int ret;
3899
3900         /* Register new port id action resource. */
3901         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3902         if (!resource) {
3903                 rte_flow_error_set(ctx->error, ENOMEM,
3904                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3905                                    "cannot allocate port_id action memory");
3906                 return NULL;
3907         }
3908         *resource = *ref;
3909         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3910                                                         ref->port_id,
3911                                                         &resource->action);
3912         if (ret) {
3913                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3914                 rte_flow_error_set(ctx->error, ENOMEM,
3915                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3916                                    "cannot create action");
3917                 return NULL;
3918         }
3919         resource->idx = idx;
3920         return &resource->entry;
3921 }
3922
3923 struct mlx5_list_entry *
3924 flow_dv_port_id_clone_cb(void *tool_ctx,
3925                          struct mlx5_list_entry *entry __rte_unused,
3926                          void *cb_ctx)
3927 {
3928         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3929         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3930         struct mlx5_flow_dv_port_id_action_resource *resource;
3931         uint32_t idx;
3932
3933         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3934         if (!resource) {
3935                 rte_flow_error_set(ctx->error, ENOMEM,
3936                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3937                                    "cannot allocate port_id action memory");
3938                 return NULL;
3939         }
3940         memcpy(resource, entry, sizeof(*resource));
3941         resource->idx = idx;
3942         return &resource->entry;
3943 }
3944
3945 void
3946 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3947 {
3948         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3949         struct mlx5_flow_dv_port_id_action_resource *resource =
3950                                   container_of(entry, typeof(*resource), entry);
3951
3952         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3953 }
3954
3955 /**
3956  * Find existing table port ID resource or create and register a new one.
3957  *
3958  * @param[in, out] dev
3959  *   Pointer to rte_eth_dev structure.
3960  * @param[in, out] ref
3961  *   Pointer to port ID action resource reference.
3962  * @parm[in, out] dev_flow
3963  *   Pointer to the dev_flow.
3964  * @param[out] error
3965  *   pointer to error structure.
3966  *
3967  * @return
3968  *   0 on success otherwise -errno and errno is set.
3969  */
3970 static int
3971 flow_dv_port_id_action_resource_register
3972                         (struct rte_eth_dev *dev,
3973                          struct mlx5_flow_dv_port_id_action_resource *ref,
3974                          struct mlx5_flow *dev_flow,
3975                          struct rte_flow_error *error)
3976 {
3977         struct mlx5_priv *priv = dev->data->dev_private;
3978         struct mlx5_list_entry *entry;
3979         struct mlx5_flow_dv_port_id_action_resource *resource;
3980         struct mlx5_flow_cb_ctx ctx = {
3981                 .error = error,
3982                 .data = ref,
3983         };
3984
3985         entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3986         if (!entry)
3987                 return -rte_errno;
3988         resource = container_of(entry, typeof(*resource), entry);
3989         dev_flow->dv.port_id_action = resource;
3990         dev_flow->handle->rix_port_id_action = resource->idx;
3991         return 0;
3992 }
3993
3994 int
3995 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3996                            struct mlx5_list_entry *entry, void *cb_ctx)
3997 {
3998         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3999         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
4000         struct mlx5_flow_dv_push_vlan_action_resource *res =
4001                                        container_of(entry, typeof(*res), entry);
4002
4003         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
4004 }
4005
4006 struct mlx5_list_entry *
4007 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
4008 {
4009         struct mlx5_dev_ctx_shared *sh = tool_ctx;
4010         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4011         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
4012         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4013         struct mlx5dv_dr_domain *domain;
4014         uint32_t idx;
4015         int ret;
4016
4017         /* Register new port id action resource. */
4018         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
4019         if (!resource) {
4020                 rte_flow_error_set(ctx->error, ENOMEM,
4021                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4022                                    "cannot allocate push_vlan action memory");
4023                 return NULL;
4024         }
4025         *resource = *ref;
4026         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
4027                 domain = sh->fdb_domain;
4028         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
4029                 domain = sh->rx_domain;
4030         else
4031                 domain = sh->tx_domain;
4032         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
4033                                                         &resource->action);
4034         if (ret) {
4035                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
4036                 rte_flow_error_set(ctx->error, ENOMEM,
4037                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4038                                    "cannot create push vlan action");
4039                 return NULL;
4040         }
4041         resource->idx = idx;
4042         return &resource->entry;
4043 }
4044
4045 struct mlx5_list_entry *
4046 flow_dv_push_vlan_clone_cb(void *tool_ctx,
4047                            struct mlx5_list_entry *entry __rte_unused,
4048                            void *cb_ctx)
4049 {
4050         struct mlx5_dev_ctx_shared *sh = tool_ctx;
4051         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
4052         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4053         uint32_t idx;
4054
4055         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
4056         if (!resource) {
4057                 rte_flow_error_set(ctx->error, ENOMEM,
4058                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
4059                                    "cannot allocate push_vlan action memory");
4060                 return NULL;
4061         }
4062         memcpy(resource, entry, sizeof(*resource));
4063         resource->idx = idx;
4064         return &resource->entry;
4065 }
4066
4067 void
4068 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4069 {
4070         struct mlx5_dev_ctx_shared *sh = tool_ctx;
4071         struct mlx5_flow_dv_push_vlan_action_resource *resource =
4072                                   container_of(entry, typeof(*resource), entry);
4073
4074         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
4075 }
4076
4077 /**
4078  * Find existing push vlan resource or create and register a new one.
4079  *
4080  * @param [in, out] dev
4081  *   Pointer to rte_eth_dev structure.
4082  * @param[in, out] ref
4083  *   Pointer to port ID action resource reference.
4084  * @parm[in, out] dev_flow
4085  *   Pointer to the dev_flow.
4086  * @param[out] error
4087  *   pointer to error structure.
4088  *
4089  * @return
4090  *   0 on success otherwise -errno and errno is set.
4091  */
4092 static int
4093 flow_dv_push_vlan_action_resource_register
4094                        (struct rte_eth_dev *dev,
4095                         struct mlx5_flow_dv_push_vlan_action_resource *ref,
4096                         struct mlx5_flow *dev_flow,
4097                         struct rte_flow_error *error)
4098 {
4099         struct mlx5_priv *priv = dev->data->dev_private;
4100         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4101         struct mlx5_list_entry *entry;
4102         struct mlx5_flow_cb_ctx ctx = {
4103                 .error = error,
4104                 .data = ref,
4105         };
4106
4107         entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4108         if (!entry)
4109                 return -rte_errno;
4110         resource = container_of(entry, typeof(*resource), entry);
4111
4112         dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4113         dev_flow->dv.push_vlan_res = resource;
4114         return 0;
4115 }
4116
4117 /**
4118  * Get the size of specific rte_flow_item_type hdr size
4119  *
4120  * @param[in] item_type
4121  *   Tested rte_flow_item_type.
4122  *
4123  * @return
4124  *   sizeof struct item_type, 0 if void or irrelevant.
4125  */
4126 size_t
4127 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4128 {
4129         size_t retval;
4130
4131         switch (item_type) {
4132         case RTE_FLOW_ITEM_TYPE_ETH:
4133                 retval = sizeof(struct rte_ether_hdr);
4134                 break;
4135         case RTE_FLOW_ITEM_TYPE_VLAN:
4136                 retval = sizeof(struct rte_vlan_hdr);
4137                 break;
4138         case RTE_FLOW_ITEM_TYPE_IPV4:
4139                 retval = sizeof(struct rte_ipv4_hdr);
4140                 break;
4141         case RTE_FLOW_ITEM_TYPE_IPV6:
4142                 retval = sizeof(struct rte_ipv6_hdr);
4143                 break;
4144         case RTE_FLOW_ITEM_TYPE_UDP:
4145                 retval = sizeof(struct rte_udp_hdr);
4146                 break;
4147         case RTE_FLOW_ITEM_TYPE_TCP:
4148                 retval = sizeof(struct rte_tcp_hdr);
4149                 break;
4150         case RTE_FLOW_ITEM_TYPE_VXLAN:
4151         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4152                 retval = sizeof(struct rte_vxlan_hdr);
4153                 break;
4154         case RTE_FLOW_ITEM_TYPE_GRE:
4155         case RTE_FLOW_ITEM_TYPE_NVGRE:
4156                 retval = sizeof(struct rte_gre_hdr);
4157                 break;
4158         case RTE_FLOW_ITEM_TYPE_MPLS:
4159                 retval = sizeof(struct rte_mpls_hdr);
4160                 break;
4161         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4162         default:
4163                 retval = 0;
4164                 break;
4165         }
4166         return retval;
4167 }
4168
4169 #define MLX5_ENCAP_IPV4_VERSION         0x40
4170 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
4171 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
4172 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
4173 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
4174 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
4175 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
4176
4177 /**
4178  * Convert the encap action data from list of rte_flow_item to raw buffer
4179  *
4180  * @param[in] items
4181  *   Pointer to rte_flow_item objects list.
4182  * @param[out] buf
4183  *   Pointer to the output buffer.
4184  * @param[out] size
4185  *   Pointer to the output buffer size.
4186  * @param[out] error
4187  *   Pointer to the error structure.
4188  *
4189  * @return
4190  *   0 on success, a negative errno value otherwise and rte_errno is set.
4191  */
4192 int
4193 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4194                            size_t *size, struct rte_flow_error *error)
4195 {
4196         struct rte_ether_hdr *eth = NULL;
4197         struct rte_vlan_hdr *vlan = NULL;
4198         struct rte_ipv4_hdr *ipv4 = NULL;
4199         struct rte_ipv6_hdr *ipv6 = NULL;
4200         struct rte_udp_hdr *udp = NULL;
4201         struct rte_vxlan_hdr *vxlan = NULL;
4202         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4203         struct rte_gre_hdr *gre = NULL;
4204         size_t len;
4205         size_t temp_size = 0;
4206
4207         if (!items)
4208                 return rte_flow_error_set(error, EINVAL,
4209                                           RTE_FLOW_ERROR_TYPE_ACTION,
4210                                           NULL, "invalid empty data");
4211         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4212                 len = flow_dv_get_item_hdr_len(items->type);
4213                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4214                         return rte_flow_error_set(error, EINVAL,
4215                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4216                                                   (void *)items->type,
4217                                                   "items total size is too big"
4218                                                   " for encap action");
4219                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4220                 switch (items->type) {
4221                 case RTE_FLOW_ITEM_TYPE_ETH:
4222                         eth = (struct rte_ether_hdr *)&buf[temp_size];
4223                         break;
4224                 case RTE_FLOW_ITEM_TYPE_VLAN:
4225                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4226                         if (!eth)
4227                                 return rte_flow_error_set(error, EINVAL,
4228                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4229                                                 (void *)items->type,
4230                                                 "eth header not found");
4231                         if (!eth->ether_type)
4232                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4233                         break;
4234                 case RTE_FLOW_ITEM_TYPE_IPV4:
4235                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4236                         if (!vlan && !eth)
4237                                 return rte_flow_error_set(error, EINVAL,
4238                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4239                                                 (void *)items->type,
4240                                                 "neither eth nor vlan"
4241                                                 " header found");
4242                         if (vlan && !vlan->eth_proto)
4243                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4244                         else if (eth && !eth->ether_type)
4245                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4246                         if (!ipv4->version_ihl)
4247                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4248                                                     MLX5_ENCAP_IPV4_IHL_MIN;
4249                         if (!ipv4->time_to_live)
4250                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4251                         break;
4252                 case RTE_FLOW_ITEM_TYPE_IPV6:
4253                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4254                         if (!vlan && !eth)
4255                                 return rte_flow_error_set(error, EINVAL,
4256                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4257                                                 (void *)items->type,
4258                                                 "neither eth nor vlan"
4259                                                 " header found");
4260                         if (vlan && !vlan->eth_proto)
4261                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4262                         else if (eth && !eth->ether_type)
4263                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4264                         if (!ipv6->vtc_flow)
4265                                 ipv6->vtc_flow =
4266                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4267                         if (!ipv6->hop_limits)
4268                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4269                         break;
4270                 case RTE_FLOW_ITEM_TYPE_UDP:
4271                         udp = (struct rte_udp_hdr *)&buf[temp_size];
4272                         if (!ipv4 && !ipv6)
4273                                 return rte_flow_error_set(error, EINVAL,
4274                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4275                                                 (void *)items->type,
4276                                                 "ip header not found");
4277                         if (ipv4 && !ipv4->next_proto_id)
4278                                 ipv4->next_proto_id = IPPROTO_UDP;
4279                         else if (ipv6 && !ipv6->proto)
4280                                 ipv6->proto = IPPROTO_UDP;
4281                         break;
4282                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4283                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4284                         if (!udp)
4285                                 return rte_flow_error_set(error, EINVAL,
4286                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4287                                                 (void *)items->type,
4288                                                 "udp header not found");
4289                         if (!udp->dst_port)
4290                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4291                         if (!vxlan->vx_flags)
4292                                 vxlan->vx_flags =
4293                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4294                         break;
4295                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4296                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4297                         if (!udp)
4298                                 return rte_flow_error_set(error, EINVAL,
4299                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4300                                                 (void *)items->type,
4301                                                 "udp header not found");
4302                         if (!vxlan_gpe->proto)
4303                                 return rte_flow_error_set(error, EINVAL,
4304                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4305                                                 (void *)items->type,
4306                                                 "next protocol not found");
4307                         if (!udp->dst_port)
4308                                 udp->dst_port =
4309                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4310                         if (!vxlan_gpe->vx_flags)
4311                                 vxlan_gpe->vx_flags =
4312                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4313                         break;
4314                 case RTE_FLOW_ITEM_TYPE_GRE:
4315                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4316                         gre = (struct rte_gre_hdr *)&buf[temp_size];
4317                         if (!gre->proto)
4318                                 return rte_flow_error_set(error, EINVAL,
4319                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4320                                                 (void *)items->type,
4321                                                 "next protocol not found");
4322                         if (!ipv4 && !ipv6)
4323                                 return rte_flow_error_set(error, EINVAL,
4324                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4325                                                 (void *)items->type,
4326                                                 "ip header not found");
4327                         if (ipv4 && !ipv4->next_proto_id)
4328                                 ipv4->next_proto_id = IPPROTO_GRE;
4329                         else if (ipv6 && !ipv6->proto)
4330                                 ipv6->proto = IPPROTO_GRE;
4331                         break;
4332                 case RTE_FLOW_ITEM_TYPE_VOID:
4333                         break;
4334                 default:
4335                         return rte_flow_error_set(error, EINVAL,
4336                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4337                                                   (void *)items->type,
4338                                                   "unsupported item type");
4339                         break;
4340                 }
4341                 temp_size += len;
4342         }
4343         *size = temp_size;
4344         return 0;
4345 }
4346
4347 static int
4348 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4349 {
4350         struct rte_ether_hdr *eth = NULL;
4351         struct rte_vlan_hdr *vlan = NULL;
4352         struct rte_ipv6_hdr *ipv6 = NULL;
4353         struct rte_udp_hdr *udp = NULL;
4354         char *next_hdr;
4355         uint16_t proto;
4356
4357         eth = (struct rte_ether_hdr *)data;
4358         next_hdr = (char *)(eth + 1);
4359         proto = RTE_BE16(eth->ether_type);
4360
4361         /* VLAN skipping */
4362         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4363                 vlan = (struct rte_vlan_hdr *)next_hdr;
4364                 proto = RTE_BE16(vlan->eth_proto);
4365                 next_hdr += sizeof(struct rte_vlan_hdr);
4366         }
4367
4368         /* HW calculates IPv4 csum. no need to proceed */
4369         if (proto == RTE_ETHER_TYPE_IPV4)
4370                 return 0;
4371
4372         /* non IPv4/IPv6 header. not supported */
4373         if (proto != RTE_ETHER_TYPE_IPV6) {
4374                 return rte_flow_error_set(error, ENOTSUP,
4375                                           RTE_FLOW_ERROR_TYPE_ACTION,
4376                                           NULL, "Cannot offload non IPv4/IPv6");
4377         }
4378
4379         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4380
4381         /* ignore non UDP */
4382         if (ipv6->proto != IPPROTO_UDP)
4383                 return 0;
4384
4385         udp = (struct rte_udp_hdr *)(ipv6 + 1);
4386         udp->dgram_cksum = 0;
4387
4388         return 0;
4389 }
4390
4391 /**
4392  * Convert L2 encap action to DV specification.
4393  *
4394  * @param[in] dev
4395  *   Pointer to rte_eth_dev structure.
4396  * @param[in] action
4397  *   Pointer to action structure.
4398  * @param[in, out] dev_flow
4399  *   Pointer to the mlx5_flow.
4400  * @param[in] transfer
4401  *   Mark if the flow is E-Switch flow.
4402  * @param[out] error
4403  *   Pointer to the error structure.
4404  *
4405  * @return
4406  *   0 on success, a negative errno value otherwise and rte_errno is set.
4407  */
4408 static int
4409 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4410                                const struct rte_flow_action *action,
4411                                struct mlx5_flow *dev_flow,
4412                                uint8_t transfer,
4413                                struct rte_flow_error *error)
4414 {
4415         const struct rte_flow_item *encap_data;
4416         const struct rte_flow_action_raw_encap *raw_encap_data;
4417         struct mlx5_flow_dv_encap_decap_resource res = {
4418                 .reformat_type =
4419                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4420                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4421                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4422         };
4423
4424         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4425                 raw_encap_data =
4426                         (const struct rte_flow_action_raw_encap *)action->conf;
4427                 res.size = raw_encap_data->size;
4428                 memcpy(res.buf, raw_encap_data->data, res.size);
4429         } else {
4430                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4431                         encap_data =
4432                                 ((const struct rte_flow_action_vxlan_encap *)
4433                                                 action->conf)->definition;
4434                 else
4435                         encap_data =
4436                                 ((const struct rte_flow_action_nvgre_encap *)
4437                                                 action->conf)->definition;
4438                 if (flow_dv_convert_encap_data(encap_data, res.buf,
4439                                                &res.size, error))
4440                         return -rte_errno;
4441         }
4442         if (flow_dv_zero_encap_udp_csum(res.buf, error))
4443                 return -rte_errno;
4444         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4445                 return rte_flow_error_set(error, EINVAL,
4446                                           RTE_FLOW_ERROR_TYPE_ACTION,
4447                                           NULL, "can't create L2 encap action");
4448         return 0;
4449 }
4450
4451 /**
4452  * Convert L2 decap action to DV specification.
4453  *
4454  * @param[in] dev
4455  *   Pointer to rte_eth_dev structure.
4456  * @param[in, out] dev_flow
4457  *   Pointer to the mlx5_flow.
4458  * @param[in] transfer
4459  *   Mark if the flow is E-Switch flow.
4460  * @param[out] error
4461  *   Pointer to the error structure.
4462  *
4463  * @return
4464  *   0 on success, a negative errno value otherwise and rte_errno is set.
4465  */
4466 static int
4467 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4468                                struct mlx5_flow *dev_flow,
4469                                uint8_t transfer,
4470                                struct rte_flow_error *error)
4471 {
4472         struct mlx5_flow_dv_encap_decap_resource res = {
4473                 .size = 0,
4474                 .reformat_type =
4475                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4476                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4477                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4478         };
4479
4480         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4481                 return rte_flow_error_set(error, EINVAL,
4482                                           RTE_FLOW_ERROR_TYPE_ACTION,
4483                                           NULL, "can't create L2 decap action");
4484         return 0;
4485 }
4486
4487 /**
4488  * Convert raw decap/encap (L3 tunnel) action to DV specification.
4489  *
4490  * @param[in] dev
4491  *   Pointer to rte_eth_dev structure.
4492  * @param[in] action
4493  *   Pointer to action structure.
4494  * @param[in, out] dev_flow
4495  *   Pointer to the mlx5_flow.
4496  * @param[in] attr
4497  *   Pointer to the flow attributes.
4498  * @param[out] error
4499  *   Pointer to the error structure.
4500  *
4501  * @return
4502  *   0 on success, a negative errno value otherwise and rte_errno is set.
4503  */
4504 static int
4505 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4506                                 const struct rte_flow_action *action,
4507                                 struct mlx5_flow *dev_flow,
4508                                 const struct rte_flow_attr *attr,
4509                                 struct rte_flow_error *error)
4510 {
4511         const struct rte_flow_action_raw_encap *encap_data;
4512         struct mlx5_flow_dv_encap_decap_resource res;
4513
4514         memset(&res, 0, sizeof(res));
4515         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4516         res.size = encap_data->size;
4517         memcpy(res.buf, encap_data->data, res.size);
4518         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4519                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4520                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4521         if (attr->transfer)
4522                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4523         else
4524                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4525                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4526         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4527                 return rte_flow_error_set(error, EINVAL,
4528                                           RTE_FLOW_ERROR_TYPE_ACTION,
4529                                           NULL, "can't create encap action");
4530         return 0;
4531 }
4532
4533 /**
4534  * Create action push VLAN.
4535  *
4536  * @param[in] dev
4537  *   Pointer to rte_eth_dev structure.
4538  * @param[in] attr
4539  *   Pointer to the flow attributes.
4540  * @param[in] vlan
4541  *   Pointer to the vlan to push to the Ethernet header.
4542  * @param[in, out] dev_flow
4543  *   Pointer to the mlx5_flow.
4544  * @param[out] error
4545  *   Pointer to the error structure.
4546  *
4547  * @return
4548  *   0 on success, a negative errno value otherwise and rte_errno is set.
4549  */
4550 static int
4551 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4552                                 const struct rte_flow_attr *attr,
4553                                 const struct rte_vlan_hdr *vlan,
4554                                 struct mlx5_flow *dev_flow,
4555                                 struct rte_flow_error *error)
4556 {
4557         struct mlx5_flow_dv_push_vlan_action_resource res;
4558
4559         memset(&res, 0, sizeof(res));
4560         res.vlan_tag =
4561                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4562                                  vlan->vlan_tci);
4563         if (attr->transfer)
4564                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4565         else
4566                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4567                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4568         return flow_dv_push_vlan_action_resource_register
4569                                             (dev, &res, dev_flow, error);
4570 }
4571
4572 /**
4573  * Validate the modify-header actions.
4574  *
4575  * @param[in] action_flags
4576  *   Holds the actions detected until now.
4577  * @param[in] action
4578  *   Pointer to the modify action.
4579  * @param[out] error
4580  *   Pointer to error structure.
4581  *
4582  * @return
4583  *   0 on success, a negative errno value otherwise and rte_errno is set.
4584  */
4585 static int
4586 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4587                                    const struct rte_flow_action *action,
4588                                    struct rte_flow_error *error)
4589 {
4590         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4591                 return rte_flow_error_set(error, EINVAL,
4592                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4593                                           NULL, "action configuration not set");
4594         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4595                 return rte_flow_error_set(error, EINVAL,
4596                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4597                                           "can't have encap action before"
4598                                           " modify action");
4599         return 0;
4600 }
4601
4602 /**
4603  * Validate the modify-header MAC address actions.
4604  *
4605  * @param[in] action_flags
4606  *   Holds the actions detected until now.
4607  * @param[in] action
4608  *   Pointer to the modify action.
4609  * @param[in] item_flags
4610  *   Holds the items detected.
4611  * @param[out] error
4612  *   Pointer to error structure.
4613  *
4614  * @return
4615  *   0 on success, a negative errno value otherwise and rte_errno is set.
4616  */
4617 static int
4618 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4619                                    const struct rte_flow_action *action,
4620                                    const uint64_t item_flags,
4621                                    struct rte_flow_error *error)
4622 {
4623         int ret = 0;
4624
4625         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4626         if (!ret) {
4627                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4628                         return rte_flow_error_set(error, EINVAL,
4629                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4630                                                   NULL,
4631                                                   "no L2 item in pattern");
4632         }
4633         return ret;
4634 }
4635
4636 /**
4637  * Validate the modify-header IPv4 address actions.
4638  *
4639  * @param[in] action_flags
4640  *   Holds the actions detected until now.
4641  * @param[in] action
4642  *   Pointer to the modify action.
4643  * @param[in] item_flags
4644  *   Holds the items detected.
4645  * @param[out] error
4646  *   Pointer to error structure.
4647  *
4648  * @return
4649  *   0 on success, a negative errno value otherwise and rte_errno is set.
4650  */
4651 static int
4652 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4653                                     const struct rte_flow_action *action,
4654                                     const uint64_t item_flags,
4655                                     struct rte_flow_error *error)
4656 {
4657         int ret = 0;
4658         uint64_t layer;
4659
4660         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4661         if (!ret) {
4662                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4663                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4664                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4665                 if (!(item_flags & layer))
4666                         return rte_flow_error_set(error, EINVAL,
4667                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4668                                                   NULL,
4669                                                   "no ipv4 item in pattern");
4670         }
4671         return ret;
4672 }
4673
4674 /**
4675  * Validate the modify-header IPv6 address actions.
4676  *
4677  * @param[in] action_flags
4678  *   Holds the actions detected until now.
4679  * @param[in] action
4680  *   Pointer to the modify action.
4681  * @param[in] item_flags
4682  *   Holds the items detected.
4683  * @param[out] error
4684  *   Pointer to error structure.
4685  *
4686  * @return
4687  *   0 on success, a negative errno value otherwise and rte_errno is set.
4688  */
4689 static int
4690 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4691                                     const struct rte_flow_action *action,
4692                                     const uint64_t item_flags,
4693                                     struct rte_flow_error *error)
4694 {
4695         int ret = 0;
4696         uint64_t layer;
4697
4698         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4699         if (!ret) {
4700                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4701                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4702                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4703                 if (!(item_flags & layer))
4704                         return rte_flow_error_set(error, EINVAL,
4705                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4706                                                   NULL,
4707                                                   "no ipv6 item in pattern");
4708         }
4709         return ret;
4710 }
4711
4712 /**
4713  * Validate the modify-header TP actions.
4714  *
4715  * @param[in] action_flags
4716  *   Holds the actions detected until now.
4717  * @param[in] action
4718  *   Pointer to the modify action.
4719  * @param[in] item_flags
4720  *   Holds the items detected.
4721  * @param[out] error
4722  *   Pointer to error structure.
4723  *
4724  * @return
4725  *   0 on success, a negative errno value otherwise and rte_errno is set.
4726  */
4727 static int
4728 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4729                                   const struct rte_flow_action *action,
4730                                   const uint64_t item_flags,
4731                                   struct rte_flow_error *error)
4732 {
4733         int ret = 0;
4734         uint64_t layer;
4735
4736         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4737         if (!ret) {
4738                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4739                                  MLX5_FLOW_LAYER_INNER_L4 :
4740                                  MLX5_FLOW_LAYER_OUTER_L4;
4741                 if (!(item_flags & layer))
4742                         return rte_flow_error_set(error, EINVAL,
4743                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4744                                                   NULL, "no transport layer "
4745                                                   "in pattern");
4746         }
4747         return ret;
4748 }
4749
4750 /**
4751  * Validate the modify-header actions of increment/decrement
4752  * TCP Sequence-number.
4753  *
4754  * @param[in] action_flags
4755  *   Holds the actions detected until now.
4756  * @param[in] action
4757  *   Pointer to the modify action.
4758  * @param[in] item_flags
4759  *   Holds the items detected.
4760  * @param[out] error
4761  *   Pointer to error structure.
4762  *
4763  * @return
4764  *   0 on success, a negative errno value otherwise and rte_errno is set.
4765  */
4766 static int
4767 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4768                                        const struct rte_flow_action *action,
4769                                        const uint64_t item_flags,
4770                                        struct rte_flow_error *error)
4771 {
4772         int ret = 0;
4773         uint64_t layer;
4774
4775         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4776         if (!ret) {
4777                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4778                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4779                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4780                 if (!(item_flags & layer))
4781                         return rte_flow_error_set(error, EINVAL,
4782                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4783                                                   NULL, "no TCP item in"
4784                                                   " pattern");
4785                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4786                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4787                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4788                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4789                         return rte_flow_error_set(error, EINVAL,
4790                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4791                                                   NULL,
4792                                                   "cannot decrease and increase"
4793                                                   " TCP sequence number"
4794                                                   " at the same time");
4795         }
4796         return ret;
4797 }
4798
4799 /**
4800  * Validate the modify-header actions of increment/decrement
4801  * TCP Acknowledgment number.
4802  *
4803  * @param[in] action_flags
4804  *   Holds the actions detected until now.
4805  * @param[in] action
4806  *   Pointer to the modify action.
4807  * @param[in] item_flags
4808  *   Holds the items detected.
4809  * @param[out] error
4810  *   Pointer to error structure.
4811  *
4812  * @return
4813  *   0 on success, a negative errno value otherwise and rte_errno is set.
4814  */
4815 static int
4816 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4817                                        const struct rte_flow_action *action,
4818                                        const uint64_t item_flags,
4819                                        struct rte_flow_error *error)
4820 {
4821         int ret = 0;
4822         uint64_t layer;
4823
4824         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4825         if (!ret) {
4826                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4827                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4828                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4829                 if (!(item_flags & layer))
4830                         return rte_flow_error_set(error, EINVAL,
4831                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4832                                                   NULL, "no TCP item in"
4833                                                   " pattern");
4834                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4835                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4836                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4837                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4838                         return rte_flow_error_set(error, EINVAL,
4839                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4840                                                   NULL,
4841                                                   "cannot decrease and increase"
4842                                                   " TCP acknowledgment number"
4843                                                   " at the same time");
4844         }
4845         return ret;
4846 }
4847
4848 /**
4849  * Validate the modify-header TTL actions.
4850  *
4851  * @param[in] action_flags
4852  *   Holds the actions detected until now.
4853  * @param[in] action
4854  *   Pointer to the modify action.
4855  * @param[in] item_flags
4856  *   Holds the items detected.
4857  * @param[out] error
4858  *   Pointer to error structure.
4859  *
4860  * @return
4861  *   0 on success, a negative errno value otherwise and rte_errno is set.
4862  */
4863 static int
4864 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4865                                    const struct rte_flow_action *action,
4866                                    const uint64_t item_flags,
4867                                    struct rte_flow_error *error)
4868 {
4869         int ret = 0;
4870         uint64_t layer;
4871
4872         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4873         if (!ret) {
4874                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4875                                  MLX5_FLOW_LAYER_INNER_L3 :
4876                                  MLX5_FLOW_LAYER_OUTER_L3;
4877                 if (!(item_flags & layer))
4878                         return rte_flow_error_set(error, EINVAL,
4879                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4880                                                   NULL,
4881                                                   "no IP protocol in pattern");
4882         }
4883         return ret;
4884 }
4885
4886 /**
4887  * Validate the generic modify field actions.
4888  * @param[in] dev
4889  *   Pointer to the rte_eth_dev structure.
4890  * @param[in] action_flags
4891  *   Holds the actions detected until now.
4892  * @param[in] action
4893  *   Pointer to the modify action.
4894  * @param[in] attr
4895  *   Pointer to the flow attributes.
4896  * @param[out] error
4897  *   Pointer to error structure.
4898  *
4899  * @return
4900  *   Number of header fields to modify (0 or more) on success,
4901  *   a negative errno value otherwise and rte_errno is set.
4902  */
4903 static int
4904 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4905                                    const uint64_t action_flags,
4906                                    const struct rte_flow_action *action,
4907                                    const struct rte_flow_attr *attr,
4908                                    struct rte_flow_error *error)
4909 {
4910         int ret = 0;
4911         struct mlx5_priv *priv = dev->data->dev_private;
4912         struct mlx5_sh_config *config = &priv->sh->config;
4913         struct mlx5_hca_attr *hca_attr = &priv->sh->cdev->config.hca_attr;
4914         const struct rte_flow_action_modify_field *action_modify_field =
4915                 action->conf;
4916         uint32_t dst_width = mlx5_flow_item_field_width(dev,
4917                                 action_modify_field->dst.field,
4918                                 -1, attr, error);
4919         uint32_t src_width = mlx5_flow_item_field_width(dev,
4920                                 action_modify_field->src.field,
4921                                 dst_width, attr, error);
4922
4923         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4924         if (ret)
4925                 return ret;
4926
4927         if (action_modify_field->width == 0)
4928                 return rte_flow_error_set(error, EINVAL,
4929                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4930                                 "no bits are requested to be modified");
4931         else if (action_modify_field->width > dst_width ||
4932                  action_modify_field->width > src_width)
4933                 return rte_flow_error_set(error, EINVAL,
4934                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4935                                 "cannot modify more bits than"
4936                                 " the width of a field");
4937         if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4938             action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4939                 if ((action_modify_field->dst.offset +
4940                      action_modify_field->width > dst_width) ||
4941                     (action_modify_field->dst.offset % 32))
4942                         return rte_flow_error_set(error, EINVAL,
4943                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4944                                         "destination offset is too big"
4945                                         " or not aligned to 4 bytes");
4946                 if (action_modify_field->dst.level &&
4947                     action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4948                         return rte_flow_error_set(error, ENOTSUP,
4949                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4950                                         "inner header fields modification"
4951                                         " is not supported");
4952         }
4953         if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4954             action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4955                 if (!attr->transfer && !attr->group)
4956                         return rte_flow_error_set(error, ENOTSUP,
4957                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4958                                         "modify field action is not"
4959                                         " supported for group 0");
4960                 if ((action_modify_field->src.offset +
4961                      action_modify_field->width > src_width) ||
4962                     (action_modify_field->src.offset % 32))
4963                         return rte_flow_error_set(error, EINVAL,
4964                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4965                                         "source offset is too big"
4966                                         " or not aligned to 4 bytes");
4967                 if (action_modify_field->src.level &&
4968                     action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4969                         return rte_flow_error_set(error, ENOTSUP,
4970                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4971                                         "inner header fields modification"
4972                                         " is not supported");
4973         }
4974         if ((action_modify_field->dst.field ==
4975              action_modify_field->src.field) &&
4976             (action_modify_field->dst.level ==
4977              action_modify_field->src.level))
4978                 return rte_flow_error_set(error, EINVAL,
4979                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4980                                 "source and destination fields"
4981                                 " cannot be the same");
4982         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4983             action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4984             action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4985                 return rte_flow_error_set(error, EINVAL,
4986                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4987                                 "mark, immediate value or a pointer to it"
4988                                 " cannot be used as a destination");
4989         if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4990             action_modify_field->src.field == RTE_FLOW_FIELD_START)
4991                 return rte_flow_error_set(error, ENOTSUP,
4992                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4993                                 "modifications of an arbitrary"
4994                                 " place in a packet is not supported");
4995         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4996             action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4997                 return rte_flow_error_set(error, ENOTSUP,
4998                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4999                                 "modifications of the 802.1Q Tag"
5000                                 " Identifier is not supported");
5001         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
5002             action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
5003                 return rte_flow_error_set(error, ENOTSUP,
5004                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
5005                                 "modifications of the VXLAN Network"
5006                                 " Identifier is not supported");
5007         if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
5008             action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
5009                 return rte_flow_error_set(error, ENOTSUP,
5010                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
5011                                 "modifications of the GENEVE Network"
5012                                 " Identifier is not supported");
5013         if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
5014             action_modify_field->src.field == RTE_FLOW_FIELD_MARK)
5015                 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
5016                     !mlx5_flow_ext_mreg_supported(dev))
5017                         return rte_flow_error_set(error, ENOTSUP,
5018                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
5019                                         "cannot modify mark in legacy mode"
5020                                         " or without extensive registers");
5021         if (action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
5022             action_modify_field->src.field == RTE_FLOW_FIELD_META) {
5023                 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
5024                     !mlx5_flow_ext_mreg_supported(dev))
5025                         return rte_flow_error_set(error, ENOTSUP,
5026                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
5027                                         "cannot modify meta without"
5028                                         " extensive registers support");
5029                 ret = flow_dv_get_metadata_reg(dev, attr, error);
5030                 if (ret < 0 || ret == REG_NON)
5031                         return rte_flow_error_set(error, ENOTSUP,
5032                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
5033                                         "cannot modify meta without"
5034                                         " extensive registers available");
5035         }
5036         if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
5037                 return rte_flow_error_set(error, ENOTSUP,
5038                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
5039                                 "add and sub operations"
5040                                 " are not supported");
5041         if (action_modify_field->dst.field == RTE_FLOW_FIELD_IPV4_ECN ||
5042             action_modify_field->src.field == RTE_FLOW_FIELD_IPV4_ECN ||
5043             action_modify_field->dst.field == RTE_FLOW_FIELD_IPV6_ECN ||
5044             action_modify_field->src.field == RTE_FLOW_FIELD_IPV6_ECN)
5045                 if (!hca_attr->modify_outer_ip_ecn &&
5046                     !attr->transfer && !attr->group)
5047                         return rte_flow_error_set(error, ENOTSUP,
5048                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
5049                                 "modifications of the ECN for current firmware is not supported");
5050         return (action_modify_field->width / 32) +
5051                !!(action_modify_field->width % 32);
5052 }
5053
5054 /**
5055  * Validate jump action.
5056  *
5057  * @param[in] action
5058  *   Pointer to the jump action.
5059  * @param[in] action_flags
5060  *   Holds the actions detected until now.
5061  * @param[in] attributes
5062  *   Pointer to flow attributes
5063  * @param[in] external
5064  *   Action belongs to flow rule created by request external to PMD.
5065  * @param[out] error
5066  *   Pointer to error structure.
5067  *
5068  * @return
5069  *   0 on success, a negative errno value otherwise and rte_errno is set.
5070  */
5071 static int
5072 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
5073                              const struct mlx5_flow_tunnel *tunnel,
5074                              const struct rte_flow_action *action,
5075                              uint64_t action_flags,
5076                              const struct rte_flow_attr *attributes,
5077                              bool external, struct rte_flow_error *error)
5078 {
5079         uint32_t target_group, table = 0;
5080         int ret = 0;
5081         struct flow_grp_info grp_info = {
5082                 .external = !!external,
5083                 .transfer = !!attributes->transfer,
5084                 .fdb_def_rule = 1,
5085                 .std_tbl_fix = 0
5086         };
5087         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5088                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5089                 return rte_flow_error_set(error, EINVAL,
5090                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5091                                           "can't have 2 fate actions in"
5092                                           " same flow");
5093         if (!action->conf)
5094                 return rte_flow_error_set(error, EINVAL,
5095                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5096                                           NULL, "action configuration not set");
5097         target_group =
5098                 ((const struct rte_flow_action_jump *)action->conf)->group;
5099         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
5100                                        &grp_info, error);
5101         if (ret)
5102                 return ret;
5103         if (attributes->group == target_group &&
5104             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
5105                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5106                 return rte_flow_error_set(error, EINVAL,
5107                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5108                                           "target group must be other than"
5109                                           " the current flow group");
5110         if (table == 0)
5111                 return rte_flow_error_set(error, EINVAL,
5112                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5113                                           NULL, "root table shouldn't be destination");
5114         return 0;
5115 }
5116
5117 /*
5118  * Validate action PORT_ID / REPRESENTED_PORT.
5119  *
5120  * @param[in] dev
5121  *   Pointer to rte_eth_dev structure.
5122  * @param[in] action_flags
5123  *   Bit-fields that holds the actions detected until now.
5124  * @param[in] action
5125  *   PORT_ID / REPRESENTED_PORT action structure.
5126  * @param[in] attr
5127  *   Attributes of flow that includes this action.
5128  * @param[out] error
5129  *   Pointer to error structure.
5130  *
5131  * @return
5132  *   0 on success, a negative errno value otherwise and rte_errno is set.
5133  */
5134 static int
5135 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5136                                 uint64_t action_flags,
5137                                 const struct rte_flow_action *action,
5138                                 const struct rte_flow_attr *attr,
5139                                 struct rte_flow_error *error)
5140 {
5141         const struct rte_flow_action_port_id *port_id;
5142         const struct rte_flow_action_ethdev *ethdev;
5143         struct mlx5_priv *act_priv;
5144         struct mlx5_priv *dev_priv;
5145         uint16_t port;
5146
5147         if (!attr->transfer)
5148                 return rte_flow_error_set(error, ENOTSUP,
5149                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5150                                           NULL,
5151                                           "port action is valid in transfer"
5152                                           " mode only");
5153         if (!action || !action->conf)
5154                 return rte_flow_error_set(error, ENOTSUP,
5155                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5156                                           NULL,
5157                                           "port action parameters must be"
5158                                           " specified");
5159         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5160                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5161                 return rte_flow_error_set(error, EINVAL,
5162                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5163                                           "can have only one fate actions in"
5164                                           " a flow");
5165         dev_priv = mlx5_dev_to_eswitch_info(dev);
5166         if (!dev_priv)
5167                 return rte_flow_error_set(error, rte_errno,
5168                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5169                                           NULL,
5170                                           "failed to obtain E-Switch info");
5171         switch (action->type) {
5172         case RTE_FLOW_ACTION_TYPE_PORT_ID:
5173                 port_id = action->conf;
5174                 port = port_id->original ? dev->data->port_id : port_id->id;
5175                 break;
5176         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5177                 ethdev = action->conf;
5178                 port = ethdev->port_id;
5179                 break;
5180         default:
5181                 MLX5_ASSERT(false);
5182                 return rte_flow_error_set
5183                                 (error, EINVAL,
5184                                  RTE_FLOW_ERROR_TYPE_ACTION, action,
5185                                  "unknown E-Switch action");
5186         }
5187         act_priv = mlx5_port_to_eswitch_info(port, false);
5188         if (!act_priv)
5189                 return rte_flow_error_set
5190                                 (error, rte_errno,
5191                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, action->conf,
5192                                  "failed to obtain E-Switch port id for port");
5193         if (act_priv->domain_id != dev_priv->domain_id)
5194                 return rte_flow_error_set
5195                                 (error, EINVAL,
5196                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5197                                  "port does not belong to"
5198                                  " E-Switch being configured");
5199         return 0;
5200 }
5201
5202 /**
5203  * Get the maximum number of modify header actions.
5204  *
5205  * @param dev
5206  *   Pointer to rte_eth_dev structure.
5207  * @param root
5208  *   Whether action is on root table.
5209  *
5210  * @return
5211  *   Max number of modify header actions device can support.
5212  */
5213 static inline unsigned int
5214 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5215                               bool root)
5216 {
5217         /*
5218          * There's no way to directly query the max capacity from FW.
5219          * The maximal value on root table should be assumed to be supported.
5220          */
5221         if (!root)
5222                 return MLX5_MAX_MODIFY_NUM;
5223         else
5224                 return MLX5_ROOT_TBL_MODIFY_NUM;
5225 }
5226
5227 /**
5228  * Validate the meter action.
5229  *
5230  * @param[in] dev
5231  *   Pointer to rte_eth_dev structure.
5232  * @param[in] action_flags
5233  *   Bit-fields that holds the actions detected until now.
5234  * @param[in] item_flags
5235  *   Holds the items detected.
5236  * @param[in] action
5237  *   Pointer to the meter action.
5238  * @param[in] attr
5239  *   Attributes of flow that includes this action.
5240  * @param[in] port_id_item
5241  *   Pointer to item indicating port id.
5242  * @param[out] error
5243  *   Pointer to error structure.
5244  *
5245  * @return
5246  *   0 on success, a negative errno value otherwise and rte_errno is set.
5247  */
5248 static int
5249 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5250                                 uint64_t action_flags, uint64_t item_flags,
5251                                 const struct rte_flow_action *action,
5252                                 const struct rte_flow_attr *attr,
5253                                 const struct rte_flow_item *port_id_item,
5254                                 bool *def_policy,
5255                                 struct rte_flow_error *error)
5256 {
5257         struct mlx5_priv *priv = dev->data->dev_private;
5258         const struct rte_flow_action_meter *am = action->conf;
5259         struct mlx5_flow_meter_info *fm;
5260         struct mlx5_flow_meter_policy *mtr_policy;
5261         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5262
5263         if (!am)
5264                 return rte_flow_error_set(error, EINVAL,
5265                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5266                                           "meter action conf is NULL");
5267
5268         if (action_flags & MLX5_FLOW_ACTION_METER)
5269                 return rte_flow_error_set(error, ENOTSUP,
5270                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5271                                           "meter chaining not support");
5272         if (action_flags & MLX5_FLOW_ACTION_JUMP)
5273                 return rte_flow_error_set(error, ENOTSUP,
5274                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5275                                           "meter with jump not support");
5276         if (!priv->mtr_en)
5277                 return rte_flow_error_set(error, ENOTSUP,
5278                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5279                                           NULL,
5280                                           "meter action not supported");
5281         fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5282         if (!fm)
5283                 return rte_flow_error_set(error, EINVAL,
5284                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5285                                           "Meter not found");
5286         /* aso meter can always be shared by different domains */
5287         if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5288             !(fm->transfer == attr->transfer ||
5289               (!fm->ingress && !attr->ingress && attr->egress) ||
5290               (!fm->egress && !attr->egress && attr->ingress)))
5291                 return rte_flow_error_set(error, EINVAL,
5292                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5293                         "Flow attributes domain are either invalid "
5294                         "or have a domain conflict with current "
5295                         "meter attributes");
5296         if (fm->def_policy) {
5297                 if (!((attr->transfer &&
5298                         mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5299                         (attr->egress &&
5300                         mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5301                         (attr->ingress &&
5302                         mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5303                         return rte_flow_error_set(error, EINVAL,
5304                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5305                                           "Flow attributes domain "
5306                                           "have a conflict with current "
5307                                           "meter domain attributes");
5308                 *def_policy = true;
5309         } else {
5310                 mtr_policy = mlx5_flow_meter_policy_find(dev,
5311                                                 fm->policy_id, NULL);
5312                 if (!mtr_policy)
5313                         return rte_flow_error_set(error, EINVAL,
5314                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5315                                           "Invalid policy id for meter ");
5316                 if (!((attr->transfer && mtr_policy->transfer) ||
5317                         (attr->egress && mtr_policy->egress) ||
5318                         (attr->ingress && mtr_policy->ingress)))
5319                         return rte_flow_error_set(error, EINVAL,
5320                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5321                                           "Flow attributes domain "
5322                                           "have a conflict with current "
5323                                           "meter domain attributes");
5324                 if (attr->transfer && mtr_policy->dev) {
5325                         /**
5326                          * When policy has fate action of port_id,
5327                          * the flow should have the same src port as policy.
5328                          */
5329                         struct mlx5_priv *policy_port_priv =
5330                                         mtr_policy->dev->data->dev_private;
5331                         int32_t flow_src_port = priv->representor_id;
5332
5333                         if (port_id_item) {
5334                                 const struct rte_flow_item_port_id *spec =
5335                                                         port_id_item->spec;
5336                                 struct mlx5_priv *port_priv =
5337                                         mlx5_port_to_eswitch_info(spec->id,
5338                                                                   false);
5339                                 if (!port_priv)
5340                                         return rte_flow_error_set(error,
5341                                                 rte_errno,
5342                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5343                                                 spec,
5344                                                 "Failed to get port info.");
5345                                 flow_src_port = port_priv->representor_id;
5346                         }
5347                         if (flow_src_port != policy_port_priv->representor_id)
5348                                 return rte_flow_error_set(error,
5349                                                 rte_errno,
5350                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5351                                                 NULL,
5352                                                 "Flow and meter policy "
5353                                                 "have different src port.");
5354                 } else if (mtr_policy->is_rss) {
5355                         struct mlx5_flow_meter_policy *fp;
5356                         struct mlx5_meter_policy_action_container *acg;
5357                         struct mlx5_meter_policy_action_container *acy;
5358                         const struct rte_flow_action *rss_act;
5359                         int ret;
5360
5361                         fp = mlx5_flow_meter_hierarchy_get_final_policy(dev,
5362                                                                 mtr_policy);
5363                         if (fp == NULL)
5364                                 return rte_flow_error_set(error, EINVAL,
5365                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5366                                                   "Unable to get the final "
5367                                                   "policy in the hierarchy");
5368                         acg = &fp->act_cnt[RTE_COLOR_GREEN];
5369                         acy = &fp->act_cnt[RTE_COLOR_YELLOW];
5370                         MLX5_ASSERT(acg->fate_action ==
5371                                     MLX5_FLOW_FATE_SHARED_RSS ||
5372                                     acy->fate_action ==
5373                                     MLX5_FLOW_FATE_SHARED_RSS);
5374                         if (acg->fate_action == MLX5_FLOW_FATE_SHARED_RSS)
5375                                 rss_act = acg->rss;
5376                         else
5377                                 rss_act = acy->rss;
5378                         ret = mlx5_flow_validate_action_rss(rss_act,
5379                                         action_flags, dev, attr,
5380                                         item_flags, error);
5381                         if (ret)
5382                                 return ret;
5383                 }
5384                 *def_policy = false;
5385         }
5386         return 0;
5387 }
5388
5389 /**
5390  * Validate the age action.
5391  *
5392  * @param[in] action_flags
5393  *   Holds the actions detected until now.
5394  * @param[in] action
5395  *   Pointer to the age action.
5396  * @param[in] dev
5397  *   Pointer to the Ethernet device structure.
5398  * @param[out] error
5399  *   Pointer to error structure.
5400  *
5401  * @return
5402  *   0 on success, a negative errno value otherwise and rte_errno is set.
5403  */
5404 static int
5405 flow_dv_validate_action_age(uint64_t action_flags,
5406                             const struct rte_flow_action *action,
5407                             struct rte_eth_dev *dev,
5408                             struct rte_flow_error *error)
5409 {
5410         struct mlx5_priv *priv = dev->data->dev_private;
5411         const struct rte_flow_action_age *age = action->conf;
5412
5413         if (!priv->sh->cdev->config.devx ||
5414             (priv->sh->cmng.counter_fallback && !priv->sh->aso_age_mng))
5415                 return rte_flow_error_set(error, ENOTSUP,
5416                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5417                                           NULL,
5418                                           "age action not supported");
5419         if (!(action->conf))
5420                 return rte_flow_error_set(error, EINVAL,
5421                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5422                                           "configuration cannot be null");
5423         if (!(age->timeout))
5424                 return rte_flow_error_set(error, EINVAL,
5425                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5426                                           "invalid timeout value 0");
5427         if (action_flags & MLX5_FLOW_ACTION_AGE)
5428                 return rte_flow_error_set(error, EINVAL,
5429                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5430                                           "duplicate age actions set");
5431         return 0;
5432 }
5433
5434 /**
5435  * Validate the modify-header IPv4 DSCP actions.
5436  *
5437  * @param[in] action_flags
5438  *   Holds the actions detected until now.
5439  * @param[in] action
5440  *   Pointer to the modify action.
5441  * @param[in] item_flags
5442  *   Holds the items detected.
5443  * @param[out] error
5444  *   Pointer to error structure.
5445  *
5446  * @return
5447  *   0 on success, a negative errno value otherwise and rte_errno is set.
5448  */
5449 static int
5450 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5451                                          const struct rte_flow_action *action,
5452                                          const uint64_t item_flags,
5453                                          struct rte_flow_error *error)
5454 {
5455         int ret = 0;
5456
5457         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5458         if (!ret) {
5459                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5460                         return rte_flow_error_set(error, EINVAL,
5461                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5462                                                   NULL,
5463                                                   "no ipv4 item in pattern");
5464         }
5465         return ret;
5466 }
5467
5468 /**
5469  * Validate the modify-header IPv6 DSCP actions.
5470  *
5471  * @param[in] action_flags
5472  *   Holds the actions detected until now.
5473  * @param[in] action
5474  *   Pointer to the modify action.
5475  * @param[in] item_flags
5476  *   Holds the items detected.
5477  * @param[out] error
5478  *   Pointer to error structure.
5479  *
5480  * @return
5481  *   0 on success, a negative errno value otherwise and rte_errno is set.
5482  */
5483 static int
5484 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5485                                          const struct rte_flow_action *action,
5486                                          const uint64_t item_flags,
5487                                          struct rte_flow_error *error)
5488 {
5489         int ret = 0;
5490
5491         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5492         if (!ret) {
5493                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5494                         return rte_flow_error_set(error, EINVAL,
5495                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5496                                                   NULL,
5497                                                   "no ipv6 item in pattern");
5498         }
5499         return ret;
5500 }
5501
5502 int
5503 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5504                         struct mlx5_list_entry *entry, void *cb_ctx)
5505 {
5506         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5507         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5508         struct mlx5_flow_dv_modify_hdr_resource *resource =
5509                                   container_of(entry, typeof(*resource), entry);
5510         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5511
5512         key_len += ref->actions_num * sizeof(ref->actions[0]);
5513         return ref->actions_num != resource->actions_num ||
5514                memcmp(&ref->ft_type, &resource->ft_type, key_len);
5515 }
5516
5517 static struct mlx5_indexed_pool *
5518 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5519 {
5520         struct mlx5_indexed_pool *ipool = __atomic_load_n
5521                                      (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5522
5523         if (!ipool) {
5524                 struct mlx5_indexed_pool *expected = NULL;
5525                 struct mlx5_indexed_pool_config cfg =
5526                     (struct mlx5_indexed_pool_config) {
5527                        .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5528                                                                    (index + 1) *
5529                                            sizeof(struct mlx5_modification_cmd),
5530                        .trunk_size = 64,
5531                        .grow_trunk = 3,
5532                        .grow_shift = 2,
5533                        .need_lock = 1,
5534                        .release_mem_en = !!sh->config.reclaim_mode,
5535                        .per_core_cache =
5536                                        sh->config.reclaim_mode ? 0 : (1 << 16),
5537                        .malloc = mlx5_malloc,
5538                        .free = mlx5_free,
5539                        .type = "mlx5_modify_action_resource",
5540                 };
5541
5542                 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5543                 ipool = mlx5_ipool_create(&cfg);
5544                 if (!ipool)
5545                         return NULL;
5546                 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5547                                                  &expected, ipool, false,
5548                                                  __ATOMIC_SEQ_CST,
5549                                                  __ATOMIC_SEQ_CST)) {
5550                         mlx5_ipool_destroy(ipool);
5551                         ipool = __atomic_load_n(&sh->mdh_ipools[index],
5552                                                 __ATOMIC_SEQ_CST);
5553                 }
5554         }
5555         return ipool;
5556 }
5557
5558 struct mlx5_list_entry *
5559 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5560 {
5561         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5562         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5563         struct mlx5dv_dr_domain *ns;
5564         struct mlx5_flow_dv_modify_hdr_resource *entry;
5565         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5566         struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5567                                                           ref->actions_num - 1);
5568         int ret;
5569         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5570         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5571         uint32_t idx;
5572
5573         if (unlikely(!ipool)) {
5574                 rte_flow_error_set(ctx->error, ENOMEM,
5575                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5576                                    NULL, "cannot allocate modify ipool");
5577                 return NULL;
5578         }
5579         entry = mlx5_ipool_zmalloc(ipool, &idx);
5580         if (!entry) {
5581                 rte_flow_error_set(ctx->error, ENOMEM,
5582                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5583                                    "cannot allocate resource memory");
5584                 return NULL;
5585         }
5586         rte_memcpy(&entry->ft_type,
5587                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5588                    key_len + data_len);
5589         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5590                 ns = sh->fdb_domain;
5591         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5592                 ns = sh->tx_domain;
5593         else
5594                 ns = sh->rx_domain;
5595         ret = mlx5_flow_os_create_flow_action_modify_header
5596                                         (sh->cdev->ctx, ns, entry,
5597                                          data_len, &entry->action);
5598         if (ret) {
5599                 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5600                 rte_flow_error_set(ctx->error, ENOMEM,
5601                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5602                                    NULL, "cannot create modification action");
5603                 return NULL;
5604         }
5605         entry->idx = idx;
5606         return &entry->entry;
5607 }
5608
5609 struct mlx5_list_entry *
5610 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5611                         void *cb_ctx)
5612 {
5613         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5614         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5615         struct mlx5_flow_dv_modify_hdr_resource *entry;
5616         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5617         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5618         uint32_t idx;
5619
5620         entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5621                                   &idx);
5622         if (!entry) {
5623                 rte_flow_error_set(ctx->error, ENOMEM,
5624                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5625                                    "cannot allocate resource memory");
5626                 return NULL;
5627         }
5628         memcpy(entry, oentry, sizeof(*entry) + data_len);
5629         entry->idx = idx;
5630         return &entry->entry;
5631 }
5632
5633 void
5634 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5635 {
5636         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5637         struct mlx5_flow_dv_modify_hdr_resource *res =
5638                 container_of(entry, typeof(*res), entry);
5639
5640         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5641 }
5642
5643 /**
5644  * Validate the sample action.
5645  *
5646  * @param[in, out] action_flags
5647  *   Holds the actions detected until now.
5648  * @param[in] action
5649  *   Pointer to the sample action.
5650  * @param[in] dev
5651  *   Pointer to the Ethernet device structure.
5652  * @param[in] attr
5653  *   Attributes of flow that includes this action.
5654  * @param[in] item_flags
5655  *   Holds the items detected.
5656  * @param[in] rss
5657  *   Pointer to the RSS action.
5658  * @param[out] sample_rss
5659  *   Pointer to the RSS action in sample action list.
5660  * @param[out] count
5661  *   Pointer to the COUNT action in sample action list.
5662  * @param[out] fdb_mirror_limit
5663  *   Pointer to the FDB mirror limitation flag.
5664  * @param[out] error
5665  *   Pointer to error structure.
5666  *
5667  * @return
5668  *   0 on success, a negative errno value otherwise and rte_errno is set.
5669  */
5670 static int
5671 flow_dv_validate_action_sample(uint64_t *action_flags,
5672                                const struct rte_flow_action *action,
5673                                struct rte_eth_dev *dev,
5674                                const struct rte_flow_attr *attr,
5675                                uint64_t item_flags,
5676                                const struct rte_flow_action_rss *rss,
5677                                const struct rte_flow_action_rss **sample_rss,
5678                                const struct rte_flow_action_count **count,
5679                                int *fdb_mirror_limit,
5680                                struct rte_flow_error *error)
5681 {
5682         struct mlx5_priv *priv = dev->data->dev_private;
5683         struct mlx5_sh_config *dev_conf = &priv->sh->config;
5684         const struct rte_flow_action_sample *sample = action->conf;
5685         const struct rte_flow_action *act;
5686         uint64_t sub_action_flags = 0;
5687         uint16_t queue_index = 0xFFFF;
5688         int actions_n = 0;
5689         int ret;
5690
5691         if (!sample)
5692                 return rte_flow_error_set(error, EINVAL,
5693                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5694                                           "configuration cannot be NULL");
5695         if (sample->ratio == 0)
5696                 return rte_flow_error_set(error, EINVAL,
5697                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5698                                           "ratio value starts from 1");
5699         if (!priv->sh->cdev->config.devx ||
5700             (sample->ratio > 0 && !priv->sampler_en))
5701                 return rte_flow_error_set(error, ENOTSUP,
5702                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5703                                           NULL,
5704                                           "sample action not supported");
5705         if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5706                 return rte_flow_error_set(error, EINVAL,
5707                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5708                                           "Multiple sample actions not "
5709                                           "supported");
5710         if (*action_flags & MLX5_FLOW_ACTION_METER)
5711                 return rte_flow_error_set(error, EINVAL,
5712                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5713                                           "wrong action order, meter should "
5714                                           "be after sample action");
5715         if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5716                 return rte_flow_error_set(error, EINVAL,
5717                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5718                                           "wrong action order, jump should "
5719                                           "be after sample action");
5720         if (*action_flags & MLX5_FLOW_ACTION_CT)
5721                 return rte_flow_error_set(error, EINVAL,
5722                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5723                                           "Sample after CT not supported");
5724         act = sample->actions;
5725         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5726                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5727                         return rte_flow_error_set(error, ENOTSUP,
5728                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5729                                                   act, "too many actions");
5730                 switch (act->type) {
5731                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5732                         ret = mlx5_flow_validate_action_queue(act,
5733                                                               sub_action_flags,
5734                                                               dev,
5735                                                               attr, error);
5736                         if (ret < 0)
5737                                 return ret;
5738                         queue_index = ((const struct rte_flow_action_queue *)
5739                                                         (act->conf))->index;
5740                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5741                         ++actions_n;
5742                         break;
5743                 case RTE_FLOW_ACTION_TYPE_RSS:
5744                         *sample_rss = act->conf;
5745                         ret = mlx5_flow_validate_action_rss(act,
5746                                                             sub_action_flags,
5747                                                             dev, attr,
5748                                                             item_flags,
5749                                                             error);
5750                         if (ret < 0)
5751                                 return ret;
5752                         if (rss && *sample_rss &&
5753                             ((*sample_rss)->level != rss->level ||
5754                             (*sample_rss)->types != rss->types))
5755                                 return rte_flow_error_set(error, ENOTSUP,
5756                                         RTE_FLOW_ERROR_TYPE_ACTION,
5757                                         NULL,
5758                                         "Can't use the different RSS types "
5759                                         "or level in the same flow");
5760                         if (*sample_rss != NULL && (*sample_rss)->queue_num)
5761                                 queue_index = (*sample_rss)->queue[0];
5762                         sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5763                         ++actions_n;
5764                         break;
5765                 case RTE_FLOW_ACTION_TYPE_MARK:
5766                         ret = flow_dv_validate_action_mark(dev, act,
5767                                                            sub_action_flags,
5768                                                            attr, error);
5769                         if (ret < 0)
5770                                 return ret;
5771                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5772                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5773                                                 MLX5_FLOW_ACTION_MARK_EXT;
5774                         else
5775                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5776                         ++actions_n;
5777                         break;
5778                 case RTE_FLOW_ACTION_TYPE_COUNT:
5779                         ret = flow_dv_validate_action_count
5780                                 (dev, false, *action_flags | sub_action_flags,
5781                                  attr, error);
5782                         if (ret < 0)
5783                                 return ret;
5784                         *count = act->conf;
5785                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5786                         *action_flags |= MLX5_FLOW_ACTION_COUNT;
5787                         ++actions_n;
5788                         break;
5789                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5790                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5791                         ret = flow_dv_validate_action_port_id(dev,
5792                                                               sub_action_flags,
5793                                                               act,
5794                                                               attr,
5795                                                               error);
5796                         if (ret)
5797                                 return ret;
5798                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5799                         ++actions_n;
5800                         break;
5801                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5802                         ret = flow_dv_validate_action_raw_encap_decap
5803                                 (dev, NULL, act->conf, attr, &sub_action_flags,
5804                                  &actions_n, action, item_flags, error);
5805                         if (ret < 0)
5806                                 return ret;
5807                         ++actions_n;
5808                         break;
5809                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5810                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5811                         ret = flow_dv_validate_action_l2_encap(dev,
5812                                                                sub_action_flags,
5813                                                                act, attr,
5814                                                                error);
5815                         if (ret < 0)
5816                                 return ret;
5817                         sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5818                         ++actions_n;
5819                         break;
5820                 default:
5821                         return rte_flow_error_set(error, ENOTSUP,
5822                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5823                                                   NULL,
5824                                                   "Doesn't support optional "
5825                                                   "action");
5826                 }
5827         }
5828         if (attr->ingress && !attr->transfer) {
5829                 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5830                                           MLX5_FLOW_ACTION_RSS)))
5831                         return rte_flow_error_set(error, EINVAL,
5832                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5833                                                   NULL,
5834                                                   "Ingress must has a dest "
5835                                                   "QUEUE for Sample");
5836         } else if (attr->egress && !attr->transfer) {
5837                 return rte_flow_error_set(error, ENOTSUP,
5838                                           RTE_FLOW_ERROR_TYPE_ACTION,
5839                                           NULL,
5840                                           "Sample Only support Ingress "
5841                                           "or E-Switch");
5842         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5843                 MLX5_ASSERT(attr->transfer);
5844                 if (sample->ratio > 1)
5845                         return rte_flow_error_set(error, ENOTSUP,
5846                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5847                                                   NULL,
5848                                                   "E-Switch doesn't support "
5849                                                   "any optional action "
5850                                                   "for sampling");
5851                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5852                         return rte_flow_error_set(error, ENOTSUP,
5853                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5854                                                   NULL,
5855                                                   "unsupported action QUEUE");
5856                 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5857                         return rte_flow_error_set(error, ENOTSUP,
5858                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5859                                                   NULL,
5860                                                   "unsupported action QUEUE");
5861                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5862                         return rte_flow_error_set(error, EINVAL,
5863                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5864                                                   NULL,
5865                                                   "E-Switch must has a dest "
5866                                                   "port for mirroring");
5867                 if (!priv->sh->cdev->config.hca_attr.reg_c_preserve &&
5868                      priv->representor_id != UINT16_MAX)
5869                         *fdb_mirror_limit = 1;
5870         }
5871         /* Continue validation for Xcap actions.*/
5872         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5873             (queue_index == 0xFFFF || !mlx5_rxq_is_hairpin(dev, queue_index))) {
5874                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5875                      MLX5_FLOW_XCAP_ACTIONS)
5876                         return rte_flow_error_set(error, ENOTSUP,
5877                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5878                                                   NULL, "encap and decap "
5879                                                   "combination aren't "
5880                                                   "supported");
5881                 if (!attr->transfer && attr->ingress && (sub_action_flags &
5882                                                         MLX5_FLOW_ACTION_ENCAP))
5883                         return rte_flow_error_set(error, ENOTSUP,
5884                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5885                                                   NULL, "encap is not supported"
5886                                                   " for ingress traffic");
5887         }
5888         return 0;
5889 }
5890
5891 /**
5892  * Find existing modify-header resource or create and register a new one.
5893  *
5894  * @param dev[in, out]
5895  *   Pointer to rte_eth_dev structure.
5896  * @param[in, out] resource
5897  *   Pointer to modify-header resource.
5898  * @parm[in, out] dev_flow
5899  *   Pointer to the dev_flow.
5900  * @param[out] error
5901  *   pointer to error structure.
5902  *
5903  * @return
5904  *   0 on success otherwise -errno and errno is set.
5905  */
5906 static int
5907 flow_dv_modify_hdr_resource_register
5908                         (struct rte_eth_dev *dev,
5909                          struct mlx5_flow_dv_modify_hdr_resource *resource,
5910                          struct mlx5_flow *dev_flow,
5911                          struct rte_flow_error *error)
5912 {
5913         struct mlx5_priv *priv = dev->data->dev_private;
5914         struct mlx5_dev_ctx_shared *sh = priv->sh;
5915         uint32_t key_len = sizeof(*resource) -
5916                            offsetof(typeof(*resource), ft_type) +
5917                            resource->actions_num * sizeof(resource->actions[0]);
5918         struct mlx5_list_entry *entry;
5919         struct mlx5_flow_cb_ctx ctx = {
5920                 .error = error,
5921                 .data = resource,
5922         };
5923         struct mlx5_hlist *modify_cmds;
5924         uint64_t key64;
5925
5926         modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5927                                 "hdr_modify",
5928                                 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5929                                 true, false, sh,
5930                                 flow_dv_modify_create_cb,
5931                                 flow_dv_modify_match_cb,
5932                                 flow_dv_modify_remove_cb,
5933                                 flow_dv_modify_clone_cb,
5934                                 flow_dv_modify_clone_free_cb,
5935                                 error);
5936         if (unlikely(!modify_cmds))
5937                 return -rte_errno;
5938         resource->root = !dev_flow->dv.group;
5939         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5940                                                                 resource->root))
5941                 return rte_flow_error_set(error, EOVERFLOW,
5942                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5943                                           "too many modify header items");
5944         key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5945         entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5946         if (!entry)
5947                 return -rte_errno;
5948         resource = container_of(entry, typeof(*resource), entry);
5949         dev_flow->handle->dvh.modify_hdr = resource;
5950         return 0;
5951 }
5952
5953 /**
5954  * Get DV flow counter by index.
5955  *
5956  * @param[in] dev
5957  *   Pointer to the Ethernet device structure.
5958  * @param[in] idx
5959  *   mlx5 flow counter index in the container.
5960  * @param[out] ppool
5961  *   mlx5 flow counter pool in the container.
5962  *
5963  * @return
5964  *   Pointer to the counter, NULL otherwise.
5965  */
5966 static struct mlx5_flow_counter *
5967 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5968                            uint32_t idx,
5969                            struct mlx5_flow_counter_pool **ppool)
5970 {
5971         struct mlx5_priv *priv = dev->data->dev_private;
5972         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5973         struct mlx5_flow_counter_pool *pool;
5974
5975         /* Decrease to original index and clear shared bit. */
5976         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5977         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5978         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5979         MLX5_ASSERT(pool);
5980         if (ppool)
5981                 *ppool = pool;
5982         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5983 }
5984
5985 /**
5986  * Check the devx counter belongs to the pool.
5987  *
5988  * @param[in] pool
5989  *   Pointer to the counter pool.
5990  * @param[in] id
5991  *   The counter devx ID.
5992  *
5993  * @return
5994  *   True if counter belongs to the pool, false otherwise.
5995  */
5996 static bool
5997 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5998 {
5999         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
6000                    MLX5_COUNTERS_PER_POOL;
6001
6002         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
6003                 return true;
6004         return false;
6005 }
6006
6007 /**
6008  * Get a pool by devx counter ID.
6009  *
6010  * @param[in] cmng
6011  *   Pointer to the counter management.
6012  * @param[in] id
6013  *   The counter devx ID.
6014  *
6015  * @return
6016  *   The counter pool pointer if exists, NULL otherwise,
6017  */
6018 static struct mlx5_flow_counter_pool *
6019 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
6020 {
6021         uint32_t i;
6022         struct mlx5_flow_counter_pool *pool = NULL;
6023
6024         rte_spinlock_lock(&cmng->pool_update_sl);
6025         /* Check last used pool. */
6026         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
6027             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
6028                 pool = cmng->pools[cmng->last_pool_idx];
6029                 goto out;
6030         }
6031         /* ID out of range means no suitable pool in the container. */
6032         if (id > cmng->max_id || id < cmng->min_id)
6033                 goto out;
6034         /*
6035          * Find the pool from the end of the container, since mostly counter
6036          * ID is sequence increasing, and the last pool should be the needed
6037          * one.
6038          */
6039         i = cmng->n_valid;
6040         while (i--) {
6041                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
6042
6043                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
6044                         pool = pool_tmp;
6045                         break;
6046                 }
6047         }
6048 out:
6049         rte_spinlock_unlock(&cmng->pool_update_sl);
6050         return pool;
6051 }
6052
6053 /**
6054  * Resize a counter container.
6055  *
6056  * @param[in] dev
6057  *   Pointer to the Ethernet device structure.
6058  *
6059  * @return
6060  *   0 on success, otherwise negative errno value and rte_errno is set.
6061  */
6062 static int
6063 flow_dv_container_resize(struct rte_eth_dev *dev)
6064 {
6065         struct mlx5_priv *priv = dev->data->dev_private;
6066         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6067         void *old_pools = cmng->pools;
6068         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
6069         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
6070         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6071
6072         if (!pools) {
6073                 rte_errno = ENOMEM;
6074                 return -ENOMEM;
6075         }
6076         if (old_pools)
6077                 memcpy(pools, old_pools, cmng->n *
6078                                        sizeof(struct mlx5_flow_counter_pool *));
6079         cmng->n = resize;
6080         cmng->pools = pools;
6081         if (old_pools)
6082                 mlx5_free(old_pools);
6083         return 0;
6084 }
6085
6086 /**
6087  * Query a devx flow counter.
6088  *
6089  * @param[in] dev
6090  *   Pointer to the Ethernet device structure.
6091  * @param[in] counter
6092  *   Index to the flow counter.
6093  * @param[out] pkts
6094  *   The statistics value of packets.
6095  * @param[out] bytes
6096  *   The statistics value of bytes.
6097  *
6098  * @return
6099  *   0 on success, otherwise a negative errno value and rte_errno is set.
6100  */
6101 static inline int
6102 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
6103                      uint64_t *bytes)
6104 {
6105         struct mlx5_priv *priv = dev->data->dev_private;
6106         struct mlx5_flow_counter_pool *pool = NULL;
6107         struct mlx5_flow_counter *cnt;
6108         int offset;
6109
6110         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6111         MLX5_ASSERT(pool);
6112         if (priv->sh->cmng.counter_fallback)
6113                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
6114                                         0, pkts, bytes, 0, NULL, NULL, 0);
6115         rte_spinlock_lock(&pool->sl);
6116         if (!pool->raw) {
6117                 *pkts = 0;
6118                 *bytes = 0;
6119         } else {
6120                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
6121                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
6122                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
6123         }
6124         rte_spinlock_unlock(&pool->sl);
6125         return 0;
6126 }
6127
6128 /**
6129  * Create and initialize a new counter pool.
6130  *
6131  * @param[in] dev
6132  *   Pointer to the Ethernet device structure.
6133  * @param[out] dcs
6134  *   The devX counter handle.
6135  * @param[in] age
6136  *   Whether the pool is for counter that was allocated for aging.
6137  * @param[in/out] cont_cur
6138  *   Pointer to the container pointer, it will be update in pool resize.
6139  *
6140  * @return
6141  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
6142  */
6143 static struct mlx5_flow_counter_pool *
6144 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6145                     uint32_t age)
6146 {
6147         struct mlx5_priv *priv = dev->data->dev_private;
6148         struct mlx5_flow_counter_pool *pool;
6149         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6150         bool fallback = priv->sh->cmng.counter_fallback;
6151         uint32_t size = sizeof(*pool);
6152
6153         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6154         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6155         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6156         if (!pool) {
6157                 rte_errno = ENOMEM;
6158                 return NULL;
6159         }
6160         pool->raw = NULL;
6161         pool->is_aged = !!age;
6162         pool->query_gen = 0;
6163         pool->min_dcs = dcs;
6164         rte_spinlock_init(&pool->sl);
6165         rte_spinlock_init(&pool->csl);
6166         TAILQ_INIT(&pool->counters[0]);
6167         TAILQ_INIT(&pool->counters[1]);
6168         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6169         rte_spinlock_lock(&cmng->pool_update_sl);
6170         pool->index = cmng->n_valid;
6171         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6172                 mlx5_free(pool);
6173                 rte_spinlock_unlock(&cmng->pool_update_sl);
6174                 return NULL;
6175         }
6176         cmng->pools[pool->index] = pool;
6177         cmng->n_valid++;
6178         if (unlikely(fallback)) {
6179                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6180
6181                 if (base < cmng->min_id)
6182                         cmng->min_id = base;
6183                 if (base > cmng->max_id)
6184                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6185                 cmng->last_pool_idx = pool->index;
6186         }
6187         rte_spinlock_unlock(&cmng->pool_update_sl);
6188         return pool;
6189 }
6190
6191 /**
6192  * Prepare a new counter and/or a new counter pool.
6193  *
6194  * @param[in] dev
6195  *   Pointer to the Ethernet device structure.
6196  * @param[out] cnt_free
6197  *   Where to put the pointer of a new counter.
6198  * @param[in] age
6199  *   Whether the pool is for counter that was allocated for aging.
6200  *
6201  * @return
6202  *   The counter pool pointer and @p cnt_free is set on success,
6203  *   NULL otherwise and rte_errno is set.
6204  */
6205 static struct mlx5_flow_counter_pool *
6206 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6207                              struct mlx5_flow_counter **cnt_free,
6208                              uint32_t age)
6209 {
6210         struct mlx5_priv *priv = dev->data->dev_private;
6211         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6212         struct mlx5_flow_counter_pool *pool;
6213         struct mlx5_counters tmp_tq;
6214         struct mlx5_devx_obj *dcs = NULL;
6215         struct mlx5_flow_counter *cnt;
6216         enum mlx5_counter_type cnt_type =
6217                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6218         bool fallback = priv->sh->cmng.counter_fallback;
6219         uint32_t i;
6220
6221         if (fallback) {
6222                 /* bulk_bitmap must be 0 for single counter allocation. */
6223                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0);
6224                 if (!dcs)
6225                         return NULL;
6226                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6227                 if (!pool) {
6228                         pool = flow_dv_pool_create(dev, dcs, age);
6229                         if (!pool) {
6230                                 mlx5_devx_cmd_destroy(dcs);
6231                                 return NULL;
6232                         }
6233                 }
6234                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6235                 cnt = MLX5_POOL_GET_CNT(pool, i);
6236                 cnt->pool = pool;
6237                 cnt->dcs_when_free = dcs;
6238                 *cnt_free = cnt;
6239                 return pool;
6240         }
6241         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
6242         if (!dcs) {
6243                 rte_errno = ENODATA;
6244                 return NULL;
6245         }
6246         pool = flow_dv_pool_create(dev, dcs, age);
6247         if (!pool) {
6248                 mlx5_devx_cmd_destroy(dcs);
6249                 return NULL;
6250         }
6251         TAILQ_INIT(&tmp_tq);
6252         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6253                 cnt = MLX5_POOL_GET_CNT(pool, i);
6254                 cnt->pool = pool;
6255                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6256         }
6257         rte_spinlock_lock(&cmng->csl[cnt_type]);
6258         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6259         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6260         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6261         (*cnt_free)->pool = pool;
6262         return pool;
6263 }
6264
6265 /**
6266  * Allocate a flow counter.
6267  *
6268  * @param[in] dev
6269  *   Pointer to the Ethernet device structure.
6270  * @param[in] age
6271  *   Whether the counter was allocated for aging.
6272  *
6273  * @return
6274  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6275  */
6276 static uint32_t
6277 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6278 {
6279         struct mlx5_priv *priv = dev->data->dev_private;
6280         struct mlx5_flow_counter_pool *pool = NULL;
6281         struct mlx5_flow_counter *cnt_free = NULL;
6282         bool fallback = priv->sh->cmng.counter_fallback;
6283         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6284         enum mlx5_counter_type cnt_type =
6285                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6286         uint32_t cnt_idx;
6287
6288         if (!priv->sh->cdev->config.devx) {
6289                 rte_errno = ENOTSUP;
6290                 return 0;
6291         }
6292         /* Get free counters from container. */
6293         rte_spinlock_lock(&cmng->csl[cnt_type]);
6294         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6295         if (cnt_free)
6296                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6297         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6298         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6299                 goto err;
6300         pool = cnt_free->pool;
6301         if (fallback)
6302                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6303         /* Create a DV counter action only in the first time usage. */
6304         if (!cnt_free->action) {
6305                 uint16_t offset;
6306                 struct mlx5_devx_obj *dcs;
6307                 int ret;
6308
6309                 if (!fallback) {
6310                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6311                         dcs = pool->min_dcs;
6312                 } else {
6313                         offset = 0;
6314                         dcs = cnt_free->dcs_when_free;
6315                 }
6316                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6317                                                             &cnt_free->action);
6318                 if (ret) {
6319                         rte_errno = errno;
6320                         goto err;
6321                 }
6322         }
6323         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6324                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6325         /* Update the counter reset values. */
6326         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6327                                  &cnt_free->bytes))
6328                 goto err;
6329         if (!fallback && !priv->sh->cmng.query_thread_on)
6330                 /* Start the asynchronous batch query by the host thread. */
6331                 mlx5_set_query_alarm(priv->sh);
6332         /*
6333          * When the count action isn't shared (by ID), shared_info field is
6334          * used for indirect action API's refcnt.
6335          * When the counter action is not shared neither by ID nor by indirect
6336          * action API, shared info must be 1.
6337          */
6338         cnt_free->shared_info.refcnt = 1;
6339         return cnt_idx;
6340 err:
6341         if (cnt_free) {
6342                 cnt_free->pool = pool;
6343                 if (fallback)
6344                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6345                 rte_spinlock_lock(&cmng->csl[cnt_type]);
6346                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6347                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6348         }
6349         return 0;
6350 }
6351
6352 /**
6353  * Get age param from counter index.
6354  *
6355  * @param[in] dev
6356  *   Pointer to the Ethernet device structure.
6357  * @param[in] counter
6358  *   Index to the counter handler.
6359  *
6360  * @return
6361  *   The aging parameter specified for the counter index.
6362  */
6363 static struct mlx5_age_param*
6364 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6365                                 uint32_t counter)
6366 {
6367         struct mlx5_flow_counter *cnt;
6368         struct mlx5_flow_counter_pool *pool = NULL;
6369
6370         flow_dv_counter_get_by_idx(dev, counter, &pool);
6371         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6372         cnt = MLX5_POOL_GET_CNT(pool, counter);
6373         return MLX5_CNT_TO_AGE(cnt);
6374 }
6375
6376 /**
6377  * Remove a flow counter from aged counter list.
6378  *
6379  * @param[in] dev
6380  *   Pointer to the Ethernet device structure.
6381  * @param[in] counter
6382  *   Index to the counter handler.
6383  * @param[in] cnt
6384  *   Pointer to the counter handler.
6385  */
6386 static void
6387 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6388                                 uint32_t counter, struct mlx5_flow_counter *cnt)
6389 {
6390         struct mlx5_age_info *age_info;
6391         struct mlx5_age_param *age_param;
6392         struct mlx5_priv *priv = dev->data->dev_private;
6393         uint16_t expected = AGE_CANDIDATE;
6394
6395         age_info = GET_PORT_AGE_INFO(priv);
6396         age_param = flow_dv_counter_idx_get_age(dev, counter);
6397         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6398                                          AGE_FREE, false, __ATOMIC_RELAXED,
6399                                          __ATOMIC_RELAXED)) {
6400                 /**
6401                  * We need the lock even it is age timeout,
6402                  * since counter may still in process.
6403                  */
6404                 rte_spinlock_lock(&age_info->aged_sl);
6405                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6406                 rte_spinlock_unlock(&age_info->aged_sl);
6407                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6408         }
6409 }
6410
6411 /**
6412  * Release a flow counter.
6413  *
6414  * @param[in] dev
6415  *   Pointer to the Ethernet device structure.
6416  * @param[in] counter
6417  *   Index to the counter handler.
6418  */
6419 static void
6420 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6421 {
6422         struct mlx5_priv *priv = dev->data->dev_private;
6423         struct mlx5_flow_counter_pool *pool = NULL;
6424         struct mlx5_flow_counter *cnt;
6425         enum mlx5_counter_type cnt_type;
6426
6427         if (!counter)
6428                 return;
6429         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6430         MLX5_ASSERT(pool);
6431         if (pool->is_aged) {
6432                 flow_dv_counter_remove_from_age(dev, counter, cnt);
6433         } else {
6434                 /*
6435                  * If the counter action is shared by indirect action API,
6436                  * the atomic function reduces its references counter.
6437                  * If after the reduction the action is still referenced, the
6438                  * function returns here and does not release it.
6439                  * When the counter action is not shared by
6440                  * indirect action API, shared info is 1 before the reduction,
6441                  * so this condition is failed and function doesn't return here.
6442                  */
6443                 if (__atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6444                                        __ATOMIC_RELAXED))
6445                         return;
6446         }
6447         cnt->pool = pool;
6448         /*
6449          * Put the counter back to list to be updated in none fallback mode.
6450          * Currently, we are using two list alternately, while one is in query,
6451          * add the freed counter to the other list based on the pool query_gen
6452          * value. After query finishes, add counter the list to the global
6453          * container counter list. The list changes while query starts. In
6454          * this case, lock will not be needed as query callback and release
6455          * function both operate with the different list.
6456          */
6457         if (!priv->sh->cmng.counter_fallback) {
6458                 rte_spinlock_lock(&pool->csl);
6459                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6460                 rte_spinlock_unlock(&pool->csl);
6461         } else {
6462                 cnt->dcs_when_free = cnt->dcs_when_active;
6463                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6464                                            MLX5_COUNTER_TYPE_ORIGIN;
6465                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6466                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6467                                   cnt, next);
6468                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6469         }
6470 }
6471
6472 /**
6473  * Resize a meter id container.
6474  *
6475  * @param[in] dev
6476  *   Pointer to the Ethernet device structure.
6477  *
6478  * @return
6479  *   0 on success, otherwise negative errno value and rte_errno is set.
6480  */
6481 static int
6482 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6483 {
6484         struct mlx5_priv *priv = dev->data->dev_private;
6485         struct mlx5_aso_mtr_pools_mng *pools_mng =
6486                                 &priv->sh->mtrmng->pools_mng;
6487         void *old_pools = pools_mng->pools;
6488         uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6489         uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6490         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6491
6492         if (!pools) {
6493                 rte_errno = ENOMEM;
6494                 return -ENOMEM;
6495         }
6496         if (!pools_mng->n)
6497                 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6498                         mlx5_free(pools);
6499                         return -ENOMEM;
6500                 }
6501         if (old_pools)
6502                 memcpy(pools, old_pools, pools_mng->n *
6503                                        sizeof(struct mlx5_aso_mtr_pool *));
6504         pools_mng->n = resize;
6505         pools_mng->pools = pools;
6506         if (old_pools)
6507                 mlx5_free(old_pools);
6508         return 0;
6509 }
6510
6511 /**
6512  * Prepare a new meter and/or a new meter pool.
6513  *
6514  * @param[in] dev
6515  *   Pointer to the Ethernet device structure.
6516  * @param[out] mtr_free
6517  *   Where to put the pointer of a new meter.g.
6518  *
6519  * @return
6520  *   The meter pool pointer and @mtr_free is set on success,
6521  *   NULL otherwise and rte_errno is set.
6522  */
6523 static struct mlx5_aso_mtr_pool *
6524 flow_dv_mtr_pool_create(struct rte_eth_dev *dev, struct mlx5_aso_mtr **mtr_free)
6525 {
6526         struct mlx5_priv *priv = dev->data->dev_private;
6527         struct mlx5_aso_mtr_pools_mng *pools_mng = &priv->sh->mtrmng->pools_mng;
6528         struct mlx5_aso_mtr_pool *pool = NULL;
6529         struct mlx5_devx_obj *dcs = NULL;
6530         uint32_t i;
6531         uint32_t log_obj_size;
6532
6533         log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6534         dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->cdev->ctx,
6535                                                       priv->sh->cdev->pdn,
6536                                                       log_obj_size);
6537         if (!dcs) {
6538                 rte_errno = ENODATA;
6539                 return NULL;
6540         }
6541         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6542         if (!pool) {
6543                 rte_errno = ENOMEM;
6544                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6545                 return NULL;
6546         }
6547         pool->devx_obj = dcs;
6548         rte_rwlock_write_lock(&pools_mng->resize_mtrwl);
6549         pool->index = pools_mng->n_valid;
6550         if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6551                 mlx5_free(pool);
6552                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6553                 rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6554                 return NULL;
6555         }
6556         pools_mng->pools[pool->index] = pool;
6557         pools_mng->n_valid++;
6558         rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6559         for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6560                 pool->mtrs[i].offset = i;
6561                 LIST_INSERT_HEAD(&pools_mng->meters, &pool->mtrs[i], next);
6562         }
6563         pool->mtrs[0].offset = 0;
6564         *mtr_free = &pool->mtrs[0];
6565         return pool;
6566 }
6567
6568 /**
6569  * Release a flow meter into pool.
6570  *
6571  * @param[in] dev
6572  *   Pointer to the Ethernet device structure.
6573  * @param[in] mtr_idx
6574  *   Index to aso flow meter.
6575  */
6576 static void
6577 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6578 {
6579         struct mlx5_priv *priv = dev->data->dev_private;
6580         struct mlx5_aso_mtr_pools_mng *pools_mng =
6581                                 &priv->sh->mtrmng->pools_mng;
6582         struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6583
6584         MLX5_ASSERT(aso_mtr);
6585         rte_spinlock_lock(&pools_mng->mtrsl);
6586         memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6587         aso_mtr->state = ASO_METER_FREE;
6588         LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6589         rte_spinlock_unlock(&pools_mng->mtrsl);
6590 }
6591
6592 /**
6593  * Allocate a aso flow meter.
6594  *
6595  * @param[in] dev
6596  *   Pointer to the Ethernet device structure.
6597  *
6598  * @return
6599  *   Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6600  */
6601 static uint32_t
6602 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6603 {
6604         struct mlx5_priv *priv = dev->data->dev_private;
6605         struct mlx5_aso_mtr *mtr_free = NULL;
6606         struct mlx5_aso_mtr_pools_mng *pools_mng =
6607                                 &priv->sh->mtrmng->pools_mng;
6608         struct mlx5_aso_mtr_pool *pool;
6609         uint32_t mtr_idx = 0;
6610
6611         if (!priv->sh->cdev->config.devx) {
6612                 rte_errno = ENOTSUP;
6613                 return 0;
6614         }
6615         /* Allocate the flow meter memory. */
6616         /* Get free meters from management. */
6617         rte_spinlock_lock(&pools_mng->mtrsl);
6618         mtr_free = LIST_FIRST(&pools_mng->meters);
6619         if (mtr_free)
6620                 LIST_REMOVE(mtr_free, next);
6621         if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6622                 rte_spinlock_unlock(&pools_mng->mtrsl);
6623                 return 0;
6624         }
6625         mtr_free->state = ASO_METER_WAIT;
6626         rte_spinlock_unlock(&pools_mng->mtrsl);
6627         pool = container_of(mtr_free,
6628                         struct mlx5_aso_mtr_pool,
6629                         mtrs[mtr_free->offset]);
6630         mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6631         if (!mtr_free->fm.meter_action_g) {
6632 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6633                 struct rte_flow_error error;
6634                 uint8_t reg_id;
6635
6636                 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6637                 mtr_free->fm.meter_action_g =
6638                         mlx5_glue->dv_create_flow_action_aso
6639                                                 (priv->sh->rx_domain,
6640                                                  pool->devx_obj->obj,
6641                                                  mtr_free->offset,
6642                                                  (1 << MLX5_FLOW_COLOR_GREEN),
6643                                                  reg_id - REG_C_0);
6644 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6645                 if (!mtr_free->fm.meter_action_g) {
6646                         flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6647                         return 0;
6648                 }
6649         }
6650         return mtr_idx;
6651 }
6652
6653 /**
6654  * Verify the @p attributes will be correctly understood by the NIC and store
6655  * them in the @p flow if everything is correct.
6656  *
6657  * @param[in] dev
6658  *   Pointer to dev struct.
6659  * @param[in] attributes
6660  *   Pointer to flow attributes
6661  * @param[in] external
6662  *   This flow rule is created by request external to PMD.
6663  * @param[out] error
6664  *   Pointer to error structure.
6665  *
6666  * @return
6667  *   - 0 on success and non root table.
6668  *   - 1 on success and root table.
6669  *   - a negative errno value otherwise and rte_errno is set.
6670  */
6671 static int
6672 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6673                             const struct mlx5_flow_tunnel *tunnel,
6674                             const struct rte_flow_attr *attributes,
6675                             const struct flow_grp_info *grp_info,
6676                             struct rte_flow_error *error)
6677 {
6678         struct mlx5_priv *priv = dev->data->dev_private;
6679         uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6680         int ret = 0;
6681
6682 #ifndef HAVE_MLX5DV_DR
6683         RTE_SET_USED(tunnel);
6684         RTE_SET_USED(grp_info);
6685         if (attributes->group)
6686                 return rte_flow_error_set(error, ENOTSUP,
6687                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6688                                           NULL,
6689                                           "groups are not supported");
6690 #else
6691         uint32_t table = 0;
6692
6693         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6694                                        grp_info, error);
6695         if (ret)
6696                 return ret;
6697         if (!table)
6698                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6699 #endif
6700         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6701             attributes->priority > lowest_priority)
6702                 return rte_flow_error_set(error, ENOTSUP,
6703                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6704                                           NULL,
6705                                           "priority out of range");
6706         if (attributes->transfer) {
6707                 if (!priv->sh->config.dv_esw_en)
6708                         return rte_flow_error_set
6709                                 (error, ENOTSUP,
6710                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6711                                  "E-Switch dr is not supported");
6712                 if (attributes->egress)
6713                         return rte_flow_error_set
6714                                 (error, ENOTSUP,
6715                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6716                                  "egress is not supported");
6717         }
6718         if (!(attributes->egress ^ attributes->ingress))
6719                 return rte_flow_error_set(error, ENOTSUP,
6720                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6721                                           "must specify exactly one of "
6722                                           "ingress or egress");
6723         return ret;
6724 }
6725
6726 static int
6727 validate_integrity_bits(const struct rte_flow_item_integrity *mask,
6728                         int64_t pattern_flags, uint64_t l3_flags,
6729                         uint64_t l4_flags, uint64_t ip4_flag,
6730                         struct rte_flow_error *error)
6731 {
6732         if (mask->l3_ok && !(pattern_flags & l3_flags))
6733                 return rte_flow_error_set(error, EINVAL,
6734                                           RTE_FLOW_ERROR_TYPE_ITEM,
6735                                           NULL, "missing L3 protocol");
6736
6737         if (mask->ipv4_csum_ok && !(pattern_flags & ip4_flag))
6738                 return rte_flow_error_set(error, EINVAL,
6739                                           RTE_FLOW_ERROR_TYPE_ITEM,
6740                                           NULL, "missing IPv4 protocol");
6741
6742         if ((mask->l4_ok || mask->l4_csum_ok) && !(pattern_flags & l4_flags))
6743                 return rte_flow_error_set(error, EINVAL,
6744                                           RTE_FLOW_ERROR_TYPE_ITEM,
6745                                           NULL, "missing L4 protocol");
6746
6747         return 0;
6748 }
6749
6750 static int
6751 flow_dv_validate_item_integrity_post(const struct
6752                                      rte_flow_item *integrity_items[2],
6753                                      int64_t pattern_flags,
6754                                      struct rte_flow_error *error)
6755 {
6756         const struct rte_flow_item_integrity *mask;
6757         int ret;
6758
6759         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
6760                 mask = (typeof(mask))integrity_items[0]->mask;
6761                 ret = validate_integrity_bits(mask, pattern_flags,
6762                                               MLX5_FLOW_LAYER_OUTER_L3,
6763                                               MLX5_FLOW_LAYER_OUTER_L4,
6764                                               MLX5_FLOW_LAYER_OUTER_L3_IPV4,
6765                                               error);
6766                 if (ret)
6767                         return ret;
6768         }
6769         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
6770                 mask = (typeof(mask))integrity_items[1]->mask;
6771                 ret = validate_integrity_bits(mask, pattern_flags,
6772                                               MLX5_FLOW_LAYER_INNER_L3,
6773                                               MLX5_FLOW_LAYER_INNER_L4,
6774                                               MLX5_FLOW_LAYER_INNER_L3_IPV4,
6775                                               error);
6776                 if (ret)
6777                         return ret;
6778         }
6779         return 0;
6780 }
6781
6782 static int
6783 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6784                                 const struct rte_flow_item *integrity_item,
6785                                 uint64_t pattern_flags, uint64_t *last_item,
6786                                 const struct rte_flow_item *integrity_items[2],
6787                                 struct rte_flow_error *error)
6788 {
6789         struct mlx5_priv *priv = dev->data->dev_private;
6790         const struct rte_flow_item_integrity *mask = (typeof(mask))
6791                                                      integrity_item->mask;
6792         const struct rte_flow_item_integrity *spec = (typeof(spec))
6793                                                      integrity_item->spec;
6794
6795         if (!priv->sh->cdev->config.hca_attr.pkt_integrity_match)
6796                 return rte_flow_error_set(error, ENOTSUP,
6797                                           RTE_FLOW_ERROR_TYPE_ITEM,
6798                                           integrity_item,
6799                                           "packet integrity integrity_item not supported");
6800         if (!spec)
6801                 return rte_flow_error_set(error, ENOTSUP,
6802                                           RTE_FLOW_ERROR_TYPE_ITEM,
6803                                           integrity_item,
6804                                           "no spec for integrity item");
6805         if (!mask)
6806                 mask = &rte_flow_item_integrity_mask;
6807         if (!mlx5_validate_integrity_item(mask))
6808                 return rte_flow_error_set(error, ENOTSUP,
6809                                           RTE_FLOW_ERROR_TYPE_ITEM,
6810                                           integrity_item,
6811                                           "unsupported integrity filter");
6812         if (spec->level > 1) {
6813                 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY)
6814                         return rte_flow_error_set
6815                                 (error, ENOTSUP,
6816                                  RTE_FLOW_ERROR_TYPE_ITEM,
6817                                  NULL, "multiple inner integrity items not supported");
6818                 integrity_items[1] = integrity_item;
6819                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
6820         } else {
6821                 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY)
6822                         return rte_flow_error_set
6823                                 (error, ENOTSUP,
6824                                  RTE_FLOW_ERROR_TYPE_ITEM,
6825                                  NULL, "multiple outer integrity items not supported");
6826                 integrity_items[0] = integrity_item;
6827                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
6828         }
6829         return 0;
6830 }
6831
6832 static int
6833 flow_dv_validate_item_flex(struct rte_eth_dev *dev,
6834                            const struct rte_flow_item *item,
6835                            uint64_t item_flags,
6836                            uint64_t *last_item,
6837                            bool is_inner,
6838                            struct rte_flow_error *error)
6839 {
6840         const struct rte_flow_item_flex *flow_spec = item->spec;
6841         const struct rte_flow_item_flex *flow_mask = item->mask;
6842         struct mlx5_flex_item *flex;
6843
6844         if (!flow_spec)
6845                 return rte_flow_error_set(error, EINVAL,
6846                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6847                                           "flex flow item spec cannot be NULL");
6848         if (!flow_mask)
6849                 return rte_flow_error_set(error, EINVAL,
6850                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6851                                           "flex flow item mask cannot be NULL");
6852         if (item->last)
6853                 return rte_flow_error_set(error, ENOTSUP,
6854                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6855                                           "flex flow item last not supported");
6856         if (mlx5_flex_acquire_index(dev, flow_spec->handle, false) < 0)
6857                 return rte_flow_error_set(error, EINVAL,
6858                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6859                                           "invalid flex flow item handle");
6860         flex = (struct mlx5_flex_item *)flow_spec->handle;
6861         switch (flex->tunnel_mode) {
6862         case FLEX_TUNNEL_MODE_SINGLE:
6863                 if (item_flags &
6864                     (MLX5_FLOW_ITEM_OUTER_FLEX | MLX5_FLOW_ITEM_INNER_FLEX))
6865                         rte_flow_error_set(error, EINVAL,
6866                                            RTE_FLOW_ERROR_TYPE_ITEM,
6867                                            NULL, "multiple flex items not supported");
6868                 break;
6869         case FLEX_TUNNEL_MODE_OUTER:
6870                 if (is_inner)
6871                         rte_flow_error_set(error, EINVAL,
6872                                            RTE_FLOW_ERROR_TYPE_ITEM,
6873                                            NULL, "inner flex item was not configured");
6874                 if (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX)
6875                         rte_flow_error_set(error, ENOTSUP,
6876                                            RTE_FLOW_ERROR_TYPE_ITEM,
6877                                            NULL, "multiple flex items not supported");
6878                 break;
6879         case FLEX_TUNNEL_MODE_INNER:
6880                 if (!is_inner)
6881                         rte_flow_error_set(error, EINVAL,
6882                                            RTE_FLOW_ERROR_TYPE_ITEM,
6883                                            NULL, "outer flex item was not configured");
6884                 if (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)
6885                         rte_flow_error_set(error, EINVAL,
6886                                            RTE_FLOW_ERROR_TYPE_ITEM,
6887                                            NULL, "multiple flex items not supported");
6888                 break;
6889         case FLEX_TUNNEL_MODE_MULTI:
6890                 if ((is_inner && (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)) ||
6891                     (!is_inner && (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX))) {
6892                         rte_flow_error_set(error, EINVAL,
6893                                            RTE_FLOW_ERROR_TYPE_ITEM,
6894                                            NULL, "multiple flex items not supported");
6895                 }
6896                 break;
6897         case FLEX_TUNNEL_MODE_TUNNEL:
6898                 if (is_inner || (item_flags & MLX5_FLOW_ITEM_FLEX_TUNNEL))
6899                         rte_flow_error_set(error, EINVAL,
6900                                            RTE_FLOW_ERROR_TYPE_ITEM,
6901                                            NULL, "multiple flex tunnel items not supported");
6902                 break;
6903         default:
6904                 rte_flow_error_set(error, EINVAL,
6905                                    RTE_FLOW_ERROR_TYPE_ITEM,
6906                                    NULL, "invalid flex item configuration");
6907         }
6908         *last_item = flex->tunnel_mode == FLEX_TUNNEL_MODE_TUNNEL ?
6909                      MLX5_FLOW_ITEM_FLEX_TUNNEL : is_inner ?
6910                      MLX5_FLOW_ITEM_INNER_FLEX : MLX5_FLOW_ITEM_OUTER_FLEX;
6911         return 0;
6912 }
6913
6914 /**
6915  * Internal validation function. For validating both actions and items.
6916  *
6917  * @param[in] dev
6918  *   Pointer to the rte_eth_dev structure.
6919  * @param[in] attr
6920  *   Pointer to the flow attributes.
6921  * @param[in] items
6922  *   Pointer to the list of items.
6923  * @param[in] actions
6924  *   Pointer to the list of actions.
6925  * @param[in] external
6926  *   This flow rule is created by request external to PMD.
6927  * @param[in] hairpin
6928  *   Number of hairpin TX actions, 0 means classic flow.
6929  * @param[out] error
6930  *   Pointer to the error structure.
6931  *
6932  * @return
6933  *   0 on success, a negative errno value otherwise and rte_errno is set.
6934  */
6935 static int
6936 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6937                  const struct rte_flow_item items[],
6938                  const struct rte_flow_action actions[],
6939                  bool external, int hairpin, struct rte_flow_error *error)
6940 {
6941         int ret;
6942         uint64_t aso_mask, action_flags = 0;
6943         uint64_t item_flags = 0;
6944         uint64_t last_item = 0;
6945         uint8_t next_protocol = 0xff;
6946         uint16_t ether_type = 0;
6947         int actions_n = 0;
6948         uint8_t item_ipv6_proto = 0;
6949         int fdb_mirror_limit = 0;
6950         int modify_after_mirror = 0;
6951         const struct rte_flow_item *geneve_item = NULL;
6952         const struct rte_flow_item *gre_item = NULL;
6953         const struct rte_flow_item *gtp_item = NULL;
6954         const struct rte_flow_action_raw_decap *decap;
6955         const struct rte_flow_action_raw_encap *encap;
6956         const struct rte_flow_action_rss *rss = NULL;
6957         const struct rte_flow_action_rss *sample_rss = NULL;
6958         const struct rte_flow_action_count *sample_count = NULL;
6959         const struct rte_flow_item_tcp nic_tcp_mask = {
6960                 .hdr = {
6961                         .tcp_flags = 0xFF,
6962                         .src_port = RTE_BE16(UINT16_MAX),
6963                         .dst_port = RTE_BE16(UINT16_MAX),
6964                 }
6965         };
6966         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6967                 .hdr = {
6968                         .src_addr =
6969                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6970                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6971                         .dst_addr =
6972                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6973                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6974                         .vtc_flow = RTE_BE32(0xffffffff),
6975                         .proto = 0xff,
6976                         .hop_limits = 0xff,
6977                 },
6978                 .has_frag_ext = 1,
6979         };
6980         const struct rte_flow_item_ecpri nic_ecpri_mask = {
6981                 .hdr = {
6982                         .common = {
6983                                 .u32 =
6984                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6985                                         .type = 0xFF,
6986                                         }).u32),
6987                         },
6988                         .dummy[0] = 0xffffffff,
6989                 },
6990         };
6991         struct mlx5_priv *priv = dev->data->dev_private;
6992         struct mlx5_sh_config *dev_conf = &priv->sh->config;
6993         uint16_t queue_index = 0xFFFF;
6994         const struct rte_flow_item_vlan *vlan_m = NULL;
6995         uint32_t rw_act_num = 0;
6996         uint64_t is_root;
6997         const struct mlx5_flow_tunnel *tunnel;
6998         enum mlx5_tof_rule_type tof_rule_type;
6999         struct flow_grp_info grp_info = {
7000                 .external = !!external,
7001                 .transfer = !!attr->transfer,
7002                 .fdb_def_rule = !!priv->fdb_def_rule,
7003                 .std_tbl_fix = true,
7004         };
7005         const struct rte_eth_hairpin_conf *conf;
7006         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
7007         const struct rte_flow_item *port_id_item = NULL;
7008         bool def_policy = false;
7009         bool shared_count = false;
7010         uint16_t udp_dport = 0;
7011         uint32_t tag_id = 0;
7012         const struct rte_flow_action_age *non_shared_age = NULL;
7013         const struct rte_flow_action_count *count = NULL;
7014
7015         if (items == NULL)
7016                 return -1;
7017         tunnel = is_tunnel_offload_active(dev) ?
7018                  mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
7019         if (tunnel) {
7020                 if (!dev_conf->dv_flow_en)
7021                         return rte_flow_error_set
7022                                 (error, ENOTSUP,
7023                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7024                                  NULL, "tunnel offload requires DV flow interface");
7025                 if (priv->representor)
7026                         return rte_flow_error_set
7027                                 (error, ENOTSUP,
7028                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7029                                  NULL, "decap not supported for VF representor");
7030                 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
7031                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
7032                 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
7033                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
7034                                         MLX5_FLOW_ACTION_DECAP;
7035                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
7036                                         (dev, attr, tunnel, tof_rule_type);
7037         }
7038         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
7039         if (ret < 0)
7040                 return ret;
7041         is_root = (uint64_t)ret;
7042         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
7043                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
7044                 int type = items->type;
7045
7046                 if (!mlx5_flow_os_item_supported(type))
7047                         return rte_flow_error_set(error, ENOTSUP,
7048                                                   RTE_FLOW_ERROR_TYPE_ITEM,
7049                                                   NULL, "item not supported");
7050                 switch (type) {
7051                 case RTE_FLOW_ITEM_TYPE_VOID:
7052                         break;
7053                 case RTE_FLOW_ITEM_TYPE_ESP:
7054                         ret = mlx5_flow_os_validate_item_esp(items, item_flags,
7055                                                           next_protocol,
7056                                                           error);
7057                         if (ret < 0)
7058                                 return ret;
7059                         last_item = MLX5_FLOW_ITEM_ESP;
7060                         break;
7061                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
7062                         ret = flow_dv_validate_item_port_id
7063                                         (dev, items, attr, item_flags, error);
7064                         if (ret < 0)
7065                                 return ret;
7066                         last_item = MLX5_FLOW_ITEM_PORT_ID;
7067                         port_id_item = items;
7068                         break;
7069                 case RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT:
7070                         ret = flow_dv_validate_item_represented_port
7071                                         (dev, items, attr, item_flags, error);
7072                         if (ret < 0)
7073                                 return ret;
7074                         last_item = MLX5_FLOW_ITEM_REPRESENTED_PORT;
7075                         break;
7076                 case RTE_FLOW_ITEM_TYPE_ETH:
7077                         ret = mlx5_flow_validate_item_eth(items, item_flags,
7078                                                           true, error);
7079                         if (ret < 0)
7080                                 return ret;
7081                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
7082                                              MLX5_FLOW_LAYER_OUTER_L2;
7083                         if (items->mask != NULL && items->spec != NULL) {
7084                                 ether_type =
7085                                         ((const struct rte_flow_item_eth *)
7086                                          items->spec)->type;
7087                                 ether_type &=
7088                                         ((const struct rte_flow_item_eth *)
7089                                          items->mask)->type;
7090                                 ether_type = rte_be_to_cpu_16(ether_type);
7091                         } else {
7092                                 ether_type = 0;
7093                         }
7094                         break;
7095                 case RTE_FLOW_ITEM_TYPE_VLAN:
7096                         ret = flow_dv_validate_item_vlan(items, item_flags,
7097                                                          dev, error);
7098                         if (ret < 0)
7099                                 return ret;
7100                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
7101                                              MLX5_FLOW_LAYER_OUTER_VLAN;
7102                         if (items->mask != NULL && items->spec != NULL) {
7103                                 ether_type =
7104                                         ((const struct rte_flow_item_vlan *)
7105                                          items->spec)->inner_type;
7106                                 ether_type &=
7107                                         ((const struct rte_flow_item_vlan *)
7108                                          items->mask)->inner_type;
7109                                 ether_type = rte_be_to_cpu_16(ether_type);
7110                         } else {
7111                                 ether_type = 0;
7112                         }
7113                         /* Store outer VLAN mask for of_push_vlan action. */
7114                         if (!tunnel)
7115                                 vlan_m = items->mask;
7116                         break;
7117                 case RTE_FLOW_ITEM_TYPE_IPV4:
7118                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7119                                                   &item_flags, &tunnel);
7120                         ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
7121                                                          last_item, ether_type,
7122                                                          error);
7123                         if (ret < 0)
7124                                 return ret;
7125                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7126                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7127                         if (items->mask != NULL &&
7128                             ((const struct rte_flow_item_ipv4 *)
7129                              items->mask)->hdr.next_proto_id) {
7130                                 next_protocol =
7131                                         ((const struct rte_flow_item_ipv4 *)
7132                                          (items->spec))->hdr.next_proto_id;
7133                                 next_protocol &=
7134                                         ((const struct rte_flow_item_ipv4 *)
7135                                          (items->mask))->hdr.next_proto_id;
7136                         } else {
7137                                 /* Reset for inner layer. */
7138                                 next_protocol = 0xff;
7139                         }
7140                         break;
7141                 case RTE_FLOW_ITEM_TYPE_IPV6:
7142                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7143                                                   &item_flags, &tunnel);
7144                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
7145                                                            last_item,
7146                                                            ether_type,
7147                                                            &nic_ipv6_mask,
7148                                                            error);
7149                         if (ret < 0)
7150                                 return ret;
7151                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7152                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7153                         if (items->mask != NULL &&
7154                             ((const struct rte_flow_item_ipv6 *)
7155                              items->mask)->hdr.proto) {
7156                                 item_ipv6_proto =
7157                                         ((const struct rte_flow_item_ipv6 *)
7158                                          items->spec)->hdr.proto;
7159                                 next_protocol =
7160                                         ((const struct rte_flow_item_ipv6 *)
7161                                          items->spec)->hdr.proto;
7162                                 next_protocol &=
7163                                         ((const struct rte_flow_item_ipv6 *)
7164                                          items->mask)->hdr.proto;
7165                         } else {
7166                                 /* Reset for inner layer. */
7167                                 next_protocol = 0xff;
7168                         }
7169                         break;
7170                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
7171                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
7172                                                                   item_flags,
7173                                                                   error);
7174                         if (ret < 0)
7175                                 return ret;
7176                         last_item = tunnel ?
7177                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
7178                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
7179                         if (items->mask != NULL &&
7180                             ((const struct rte_flow_item_ipv6_frag_ext *)
7181                              items->mask)->hdr.next_header) {
7182                                 next_protocol =
7183                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7184                                  items->spec)->hdr.next_header;
7185                                 next_protocol &=
7186                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7187                                  items->mask)->hdr.next_header;
7188                         } else {
7189                                 /* Reset for inner layer. */
7190                                 next_protocol = 0xff;
7191                         }
7192                         break;
7193                 case RTE_FLOW_ITEM_TYPE_TCP:
7194                         ret = mlx5_flow_validate_item_tcp
7195                                                 (items, item_flags,
7196                                                  next_protocol,
7197                                                  &nic_tcp_mask,
7198                                                  error);
7199                         if (ret < 0)
7200                                 return ret;
7201                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7202                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7203                         break;
7204                 case RTE_FLOW_ITEM_TYPE_UDP:
7205                         ret = mlx5_flow_validate_item_udp(items, item_flags,
7206                                                           next_protocol,
7207                                                           error);
7208                         const struct rte_flow_item_udp *spec = items->spec;
7209                         const struct rte_flow_item_udp *mask = items->mask;
7210                         if (!mask)
7211                                 mask = &rte_flow_item_udp_mask;
7212                         if (spec != NULL)
7213                                 udp_dport = rte_be_to_cpu_16
7214                                                 (spec->hdr.dst_port &
7215                                                  mask->hdr.dst_port);
7216                         if (ret < 0)
7217                                 return ret;
7218                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7219                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7220                         break;
7221                 case RTE_FLOW_ITEM_TYPE_GRE:
7222                         ret = mlx5_flow_validate_item_gre(items, item_flags,
7223                                                           next_protocol, error);
7224                         if (ret < 0)
7225                                 return ret;
7226                         gre_item = items;
7227                         last_item = MLX5_FLOW_LAYER_GRE;
7228                         break;
7229                 case RTE_FLOW_ITEM_TYPE_GRE_OPTION:
7230                         ret = mlx5_flow_validate_item_gre_option(dev, items, item_flags,
7231                                                           attr, gre_item, error);
7232                         if (ret < 0)
7233                                 return ret;
7234                         last_item = MLX5_FLOW_LAYER_GRE;
7235                         break;
7236                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7237                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7238                                                             next_protocol,
7239                                                             error);
7240                         if (ret < 0)
7241                                 return ret;
7242                         last_item = MLX5_FLOW_LAYER_NVGRE;
7243                         break;
7244                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7245                         ret = mlx5_flow_validate_item_gre_key
7246                                 (items, item_flags, gre_item, error);
7247                         if (ret < 0)
7248                                 return ret;
7249                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7250                         break;
7251                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7252                         ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
7253                                                             items, item_flags,
7254                                                             attr, error);
7255                         if (ret < 0)
7256                                 return ret;
7257                         last_item = MLX5_FLOW_LAYER_VXLAN;
7258                         break;
7259                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7260                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
7261                                                                 item_flags, dev,
7262                                                                 error);
7263                         if (ret < 0)
7264                                 return ret;
7265                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7266                         break;
7267                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7268                         ret = mlx5_flow_validate_item_geneve(items,
7269                                                              item_flags, dev,
7270                                                              error);
7271                         if (ret < 0)
7272                                 return ret;
7273                         geneve_item = items;
7274                         last_item = MLX5_FLOW_LAYER_GENEVE;
7275                         break;
7276                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7277                         ret = mlx5_flow_validate_item_geneve_opt(items,
7278                                                                  last_item,
7279                                                                  geneve_item,
7280                                                                  dev,
7281                                                                  error);
7282                         if (ret < 0)
7283                                 return ret;
7284                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7285                         break;
7286                 case RTE_FLOW_ITEM_TYPE_MPLS:
7287                         ret = mlx5_flow_validate_item_mpls(dev, items,
7288                                                            item_flags,
7289                                                            last_item, error);
7290                         if (ret < 0)
7291                                 return ret;
7292                         last_item = MLX5_FLOW_LAYER_MPLS;
7293                         break;
7294
7295                 case RTE_FLOW_ITEM_TYPE_MARK:
7296                         ret = flow_dv_validate_item_mark(dev, items, attr,
7297                                                          error);
7298                         if (ret < 0)
7299                                 return ret;
7300                         last_item = MLX5_FLOW_ITEM_MARK;
7301                         break;
7302                 case RTE_FLOW_ITEM_TYPE_META:
7303                         ret = flow_dv_validate_item_meta(dev, items, attr,
7304                                                          error);
7305                         if (ret < 0)
7306                                 return ret;
7307                         last_item = MLX5_FLOW_ITEM_METADATA;
7308                         break;
7309                 case RTE_FLOW_ITEM_TYPE_ICMP:
7310                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
7311                                                            next_protocol,
7312                                                            error);
7313                         if (ret < 0)
7314                                 return ret;
7315                         last_item = MLX5_FLOW_LAYER_ICMP;
7316                         break;
7317                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7318                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7319                                                             next_protocol,
7320                                                             error);
7321                         if (ret < 0)
7322                                 return ret;
7323                         item_ipv6_proto = IPPROTO_ICMPV6;
7324                         last_item = MLX5_FLOW_LAYER_ICMP6;
7325                         break;
7326                 case RTE_FLOW_ITEM_TYPE_TAG:
7327                         ret = flow_dv_validate_item_tag(dev, items,
7328                                                         attr, error);
7329                         if (ret < 0)
7330                                 return ret;
7331                         last_item = MLX5_FLOW_ITEM_TAG;
7332                         break;
7333                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7334                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
7335                         break;
7336                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7337                         break;
7338                 case RTE_FLOW_ITEM_TYPE_GTP:
7339                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7340                                                         error);
7341                         if (ret < 0)
7342                                 return ret;
7343                         gtp_item = items;
7344                         last_item = MLX5_FLOW_LAYER_GTP;
7345                         break;
7346                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7347                         ret = flow_dv_validate_item_gtp_psc(items, last_item,
7348                                                             gtp_item, attr,
7349                                                             error);
7350                         if (ret < 0)
7351                                 return ret;
7352                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
7353                         break;
7354                 case RTE_FLOW_ITEM_TYPE_ECPRI:
7355                         /* Capacity will be checked in the translate stage. */
7356                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7357                                                             last_item,
7358                                                             ether_type,
7359                                                             &nic_ecpri_mask,
7360                                                             error);
7361                         if (ret < 0)
7362                                 return ret;
7363                         last_item = MLX5_FLOW_LAYER_ECPRI;
7364                         break;
7365                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7366                         ret = flow_dv_validate_item_integrity(dev, items,
7367                                                               item_flags,
7368                                                               &last_item,
7369                                                               integrity_items,
7370                                                               error);
7371                         if (ret < 0)
7372                                 return ret;
7373                         break;
7374                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7375                         ret = flow_dv_validate_item_aso_ct(dev, items,
7376                                                            &item_flags, error);
7377                         if (ret < 0)
7378                                 return ret;
7379                         break;
7380                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7381                         /* tunnel offload item was processed before
7382                          * list it here as a supported type
7383                          */
7384                         break;
7385                 case RTE_FLOW_ITEM_TYPE_FLEX:
7386                         ret = flow_dv_validate_item_flex(dev, items, item_flags,
7387                                                          &last_item,
7388                                                          tunnel != 0, error);
7389                         if (ret < 0)
7390                                 return ret;
7391                         break;
7392                 default:
7393                         return rte_flow_error_set(error, ENOTSUP,
7394                                                   RTE_FLOW_ERROR_TYPE_ITEM,
7395                                                   NULL, "item not supported");
7396                 }
7397                 item_flags |= last_item;
7398         }
7399         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
7400                 ret = flow_dv_validate_item_integrity_post(integrity_items,
7401                                                            item_flags, error);
7402                 if (ret)
7403                         return ret;
7404         }
7405         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7406                 int type = actions->type;
7407
7408                 if (!mlx5_flow_os_action_supported(type))
7409                         return rte_flow_error_set(error, ENOTSUP,
7410                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7411                                                   actions,
7412                                                   "action not supported");
7413                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7414                         return rte_flow_error_set(error, ENOTSUP,
7415                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7416                                                   actions, "too many actions");
7417                 if (action_flags &
7418                         MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7419                         return rte_flow_error_set(error, ENOTSUP,
7420                                 RTE_FLOW_ERROR_TYPE_ACTION,
7421                                 NULL, "meter action with policy "
7422                                 "must be the last action");
7423                 switch (type) {
7424                 case RTE_FLOW_ACTION_TYPE_VOID:
7425                         break;
7426                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7427                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
7428                         ret = flow_dv_validate_action_port_id(dev,
7429                                                               action_flags,
7430                                                               actions,
7431                                                               attr,
7432                                                               error);
7433                         if (ret)
7434                                 return ret;
7435                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7436                         ++actions_n;
7437                         break;
7438                 case RTE_FLOW_ACTION_TYPE_FLAG:
7439                         ret = flow_dv_validate_action_flag(dev, action_flags,
7440                                                            attr, error);
7441                         if (ret < 0)
7442                                 return ret;
7443                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7444                                 /* Count all modify-header actions as one. */
7445                                 if (!(action_flags &
7446                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7447                                         ++actions_n;
7448                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
7449                                                 MLX5_FLOW_ACTION_MARK_EXT;
7450                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7451                                         modify_after_mirror = 1;
7452
7453                         } else {
7454                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
7455                                 ++actions_n;
7456                         }
7457                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7458                         break;
7459                 case RTE_FLOW_ACTION_TYPE_MARK:
7460                         ret = flow_dv_validate_action_mark(dev, actions,
7461                                                            action_flags,
7462                                                            attr, error);
7463                         if (ret < 0)
7464                                 return ret;
7465                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7466                                 /* Count all modify-header actions as one. */
7467                                 if (!(action_flags &
7468                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7469                                         ++actions_n;
7470                                 action_flags |= MLX5_FLOW_ACTION_MARK |
7471                                                 MLX5_FLOW_ACTION_MARK_EXT;
7472                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7473                                         modify_after_mirror = 1;
7474                         } else {
7475                                 action_flags |= MLX5_FLOW_ACTION_MARK;
7476                                 ++actions_n;
7477                         }
7478                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7479                         break;
7480                 case RTE_FLOW_ACTION_TYPE_SET_META:
7481                         ret = flow_dv_validate_action_set_meta(dev, actions,
7482                                                                action_flags,
7483                                                                attr, error);
7484                         if (ret < 0)
7485                                 return ret;
7486                         /* Count all modify-header actions as one action. */
7487                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7488                                 ++actions_n;
7489                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7490                                 modify_after_mirror = 1;
7491                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7492                         rw_act_num += MLX5_ACT_NUM_SET_META;
7493                         break;
7494                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7495                         ret = flow_dv_validate_action_set_tag(dev, actions,
7496                                                               action_flags,
7497                                                               attr, error);
7498                         if (ret < 0)
7499                                 return ret;
7500                         /* Count all modify-header actions as one action. */
7501                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7502                                 ++actions_n;
7503                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7504                                 modify_after_mirror = 1;
7505                         tag_id = ((const struct rte_flow_action_set_tag *)
7506                                   actions->conf)->index;
7507                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7508                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7509                         break;
7510                 case RTE_FLOW_ACTION_TYPE_DROP:
7511                         ret = mlx5_flow_validate_action_drop(action_flags,
7512                                                              attr, error);
7513                         if (ret < 0)
7514                                 return ret;
7515                         action_flags |= MLX5_FLOW_ACTION_DROP;
7516                         ++actions_n;
7517                         break;
7518                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7519                         ret = mlx5_flow_validate_action_queue(actions,
7520                                                               action_flags, dev,
7521                                                               attr, error);
7522                         if (ret < 0)
7523                                 return ret;
7524                         queue_index = ((const struct rte_flow_action_queue *)
7525                                                         (actions->conf))->index;
7526                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7527                         ++actions_n;
7528                         break;
7529                 case RTE_FLOW_ACTION_TYPE_RSS:
7530                         rss = actions->conf;
7531                         ret = mlx5_flow_validate_action_rss(actions,
7532                                                             action_flags, dev,
7533                                                             attr, item_flags,
7534                                                             error);
7535                         if (ret < 0)
7536                                 return ret;
7537                         if (rss && sample_rss &&
7538                             (sample_rss->level != rss->level ||
7539                             sample_rss->types != rss->types))
7540                                 return rte_flow_error_set(error, ENOTSUP,
7541                                         RTE_FLOW_ERROR_TYPE_ACTION,
7542                                         NULL,
7543                                         "Can't use the different RSS types "
7544                                         "or level in the same flow");
7545                         if (rss != NULL && rss->queue_num)
7546                                 queue_index = rss->queue[0];
7547                         action_flags |= MLX5_FLOW_ACTION_RSS;
7548                         ++actions_n;
7549                         break;
7550                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7551                         ret =
7552                         mlx5_flow_validate_action_default_miss(action_flags,
7553                                         attr, error);
7554                         if (ret < 0)
7555                                 return ret;
7556                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7557                         ++actions_n;
7558                         break;
7559                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7560                         shared_count = true;
7561                         /* fall-through. */
7562                 case RTE_FLOW_ACTION_TYPE_COUNT:
7563                         ret = flow_dv_validate_action_count(dev, shared_count,
7564                                                             action_flags,
7565                                                             attr, error);
7566                         if (ret < 0)
7567                                 return ret;
7568                         count = actions->conf;
7569                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7570                         ++actions_n;
7571                         break;
7572                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7573                         if (flow_dv_validate_action_pop_vlan(dev,
7574                                                              action_flags,
7575                                                              actions,
7576                                                              item_flags, attr,
7577                                                              error))
7578                                 return -rte_errno;
7579                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7580                                 modify_after_mirror = 1;
7581                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7582                         ++actions_n;
7583                         break;
7584                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7585                         ret = flow_dv_validate_action_push_vlan(dev,
7586                                                                 action_flags,
7587                                                                 vlan_m,
7588                                                                 actions, attr,
7589                                                                 error);
7590                         if (ret < 0)
7591                                 return ret;
7592                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7593                                 modify_after_mirror = 1;
7594                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7595                         ++actions_n;
7596                         break;
7597                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7598                         ret = flow_dv_validate_action_set_vlan_pcp
7599                                                 (action_flags, actions, error);
7600                         if (ret < 0)
7601                                 return ret;
7602                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7603                                 modify_after_mirror = 1;
7604                         /* Count PCP with push_vlan command. */
7605                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7606                         break;
7607                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7608                         ret = flow_dv_validate_action_set_vlan_vid
7609                                                 (item_flags, action_flags,
7610                                                  actions, error);
7611                         if (ret < 0)
7612                                 return ret;
7613                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7614                                 modify_after_mirror = 1;
7615                         /* Count VID with push_vlan command. */
7616                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7617                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
7618                         break;
7619                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7620                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7621                         ret = flow_dv_validate_action_l2_encap(dev,
7622                                                                action_flags,
7623                                                                actions, attr,
7624                                                                error);
7625                         if (ret < 0)
7626                                 return ret;
7627                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7628                         ++actions_n;
7629                         break;
7630                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7631                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7632                         ret = flow_dv_validate_action_decap(dev, action_flags,
7633                                                             actions, item_flags,
7634                                                             attr, error);
7635                         if (ret < 0)
7636                                 return ret;
7637                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7638                                 modify_after_mirror = 1;
7639                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7640                         ++actions_n;
7641                         break;
7642                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7643                         ret = flow_dv_validate_action_raw_encap_decap
7644                                 (dev, NULL, actions->conf, attr, &action_flags,
7645                                  &actions_n, actions, item_flags, error);
7646                         if (ret < 0)
7647                                 return ret;
7648                         break;
7649                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7650                         decap = actions->conf;
7651                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7652                                 ;
7653                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7654                                 encap = NULL;
7655                                 actions--;
7656                         } else {
7657                                 encap = actions->conf;
7658                         }
7659                         ret = flow_dv_validate_action_raw_encap_decap
7660                                            (dev,
7661                                             decap ? decap : &empty_decap, encap,
7662                                             attr, &action_flags, &actions_n,
7663                                             actions, item_flags, error);
7664                         if (ret < 0)
7665                                 return ret;
7666                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7667                             (action_flags & MLX5_FLOW_ACTION_DECAP))
7668                                 modify_after_mirror = 1;
7669                         break;
7670                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7671                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7672                         ret = flow_dv_validate_action_modify_mac(action_flags,
7673                                                                  actions,
7674                                                                  item_flags,
7675                                                                  error);
7676                         if (ret < 0)
7677                                 return ret;
7678                         /* Count all modify-header actions as one action. */
7679                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7680                                 ++actions_n;
7681                         action_flags |= actions->type ==
7682                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7683                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
7684                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
7685                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7686                                 modify_after_mirror = 1;
7687                         /*
7688                          * Even if the source and destination MAC addresses have
7689                          * overlap in the header with 4B alignment, the convert
7690                          * function will handle them separately and 4 SW actions
7691                          * will be created. And 2 actions will be added each
7692                          * time no matter how many bytes of address will be set.
7693                          */
7694                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7695                         break;
7696                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7697                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7698                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
7699                                                                   actions,
7700                                                                   item_flags,
7701                                                                   error);
7702                         if (ret < 0)
7703                                 return ret;
7704                         /* Count all modify-header actions as one action. */
7705                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7706                                 ++actions_n;
7707                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7708                                 modify_after_mirror = 1;
7709                         action_flags |= actions->type ==
7710                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7711                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7712                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
7713                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7714                         break;
7715                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7716                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7717                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
7718                                                                   actions,
7719                                                                   item_flags,
7720                                                                   error);
7721                         if (ret < 0)
7722                                 return ret;
7723                         if (item_ipv6_proto == IPPROTO_ICMPV6)
7724                                 return rte_flow_error_set(error, ENOTSUP,
7725                                         RTE_FLOW_ERROR_TYPE_ACTION,
7726                                         actions,
7727                                         "Can't change header "
7728                                         "with ICMPv6 proto");
7729                         /* Count all modify-header actions as one action. */
7730                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7731                                 ++actions_n;
7732                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7733                                 modify_after_mirror = 1;
7734                         action_flags |= actions->type ==
7735                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7736                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7737                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
7738                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7739                         break;
7740                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7741                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7742                         ret = flow_dv_validate_action_modify_tp(action_flags,
7743                                                                 actions,
7744                                                                 item_flags,
7745                                                                 error);
7746                         if (ret < 0)
7747                                 return ret;
7748                         /* Count all modify-header actions as one action. */
7749                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7750                                 ++actions_n;
7751                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7752                                 modify_after_mirror = 1;
7753                         action_flags |= actions->type ==
7754                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7755                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
7756                                                 MLX5_FLOW_ACTION_SET_TP_DST;
7757                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7758                         break;
7759                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7760                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7761                         ret = flow_dv_validate_action_modify_ttl(action_flags,
7762                                                                  actions,
7763                                                                  item_flags,
7764                                                                  error);
7765                         if (ret < 0)
7766                                 return ret;
7767                         /* Count all modify-header actions as one action. */
7768                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7769                                 ++actions_n;
7770                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7771                                 modify_after_mirror = 1;
7772                         action_flags |= actions->type ==
7773                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
7774                                                 MLX5_FLOW_ACTION_SET_TTL :
7775                                                 MLX5_FLOW_ACTION_DEC_TTL;
7776                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7777                         break;
7778                 case RTE_FLOW_ACTION_TYPE_JUMP:
7779                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7780                                                            action_flags,
7781                                                            attr, external,
7782                                                            error);
7783                         if (ret)
7784                                 return ret;
7785                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7786                             fdb_mirror_limit)
7787                                 return rte_flow_error_set(error, EINVAL,
7788                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7789                                                   NULL,
7790                                                   "sample and jump action combination is not supported");
7791                         ++actions_n;
7792                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7793                         break;
7794                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7795                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7796                         ret = flow_dv_validate_action_modify_tcp_seq
7797                                                                 (action_flags,
7798                                                                  actions,
7799                                                                  item_flags,
7800                                                                  error);
7801                         if (ret < 0)
7802                                 return ret;
7803                         /* Count all modify-header actions as one action. */
7804                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7805                                 ++actions_n;
7806                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7807                                 modify_after_mirror = 1;
7808                         action_flags |= actions->type ==
7809                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7810                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7811                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7812                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7813                         break;
7814                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7815                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7816                         ret = flow_dv_validate_action_modify_tcp_ack
7817                                                                 (action_flags,
7818                                                                  actions,
7819                                                                  item_flags,
7820                                                                  error);
7821                         if (ret < 0)
7822                                 return ret;
7823                         /* Count all modify-header actions as one action. */
7824                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7825                                 ++actions_n;
7826                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7827                                 modify_after_mirror = 1;
7828                         action_flags |= actions->type ==
7829                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7830                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
7831                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7832                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7833                         break;
7834                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7835                         break;
7836                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7837                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7838                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7839                         break;
7840                 case RTE_FLOW_ACTION_TYPE_METER:
7841                         ret = mlx5_flow_validate_action_meter(dev,
7842                                                               action_flags,
7843                                                               item_flags,
7844                                                               actions, attr,
7845                                                               port_id_item,
7846                                                               &def_policy,
7847                                                               error);
7848                         if (ret < 0)
7849                                 return ret;
7850                         action_flags |= MLX5_FLOW_ACTION_METER;
7851                         if (!def_policy)
7852                                 action_flags |=
7853                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7854                         ++actions_n;
7855                         /* Meter action will add one more TAG action. */
7856                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7857                         break;
7858                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7859                         if (!attr->transfer && !attr->group)
7860                                 return rte_flow_error_set(error, ENOTSUP,
7861                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7862                                                                            NULL,
7863                           "Shared ASO age action is not supported for group 0");
7864                         if (action_flags & MLX5_FLOW_ACTION_AGE)
7865                                 return rte_flow_error_set
7866                                                   (error, EINVAL,
7867                                                    RTE_FLOW_ERROR_TYPE_ACTION,
7868                                                    NULL,
7869                                                    "duplicate age actions set");
7870                         action_flags |= MLX5_FLOW_ACTION_AGE;
7871                         ++actions_n;
7872                         break;
7873                 case RTE_FLOW_ACTION_TYPE_AGE:
7874                         non_shared_age = actions->conf;
7875                         ret = flow_dv_validate_action_age(action_flags,
7876                                                           actions, dev,
7877                                                           error);
7878                         if (ret < 0)
7879                                 return ret;
7880                         /*
7881                          * Validate the regular AGE action (using counter)
7882                          * mutual exclusion with indirect counter actions.
7883                          */
7884                         if (!flow_hit_aso_supported(priv->sh, attr)) {
7885                                 if (shared_count)
7886                                         return rte_flow_error_set
7887                                                 (error, EINVAL,
7888                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7889                                                 NULL,
7890                                                 "old age and indirect count combination is not supported");
7891                                 if (sample_count)
7892                                         return rte_flow_error_set
7893                                                 (error, EINVAL,
7894                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7895                                                 NULL,
7896                                                 "old age action and count must be in the same sub flow");
7897                         }
7898                         action_flags |= MLX5_FLOW_ACTION_AGE;
7899                         ++actions_n;
7900                         break;
7901                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7902                         ret = flow_dv_validate_action_modify_ipv4_dscp
7903                                                          (action_flags,
7904                                                           actions,
7905                                                           item_flags,
7906                                                           error);
7907                         if (ret < 0)
7908                                 return ret;
7909                         /* Count all modify-header actions as one action. */
7910                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7911                                 ++actions_n;
7912                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7913                                 modify_after_mirror = 1;
7914                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7915                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7916                         break;
7917                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7918                         ret = flow_dv_validate_action_modify_ipv6_dscp
7919                                                                 (action_flags,
7920                                                                  actions,
7921                                                                  item_flags,
7922                                                                  error);
7923                         if (ret < 0)
7924                                 return ret;
7925                         /* Count all modify-header actions as one action. */
7926                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7927                                 ++actions_n;
7928                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7929                                 modify_after_mirror = 1;
7930                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7931                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7932                         break;
7933                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7934                         ret = flow_dv_validate_action_sample(&action_flags,
7935                                                              actions, dev,
7936                                                              attr, item_flags,
7937                                                              rss, &sample_rss,
7938                                                              &sample_count,
7939                                                              &fdb_mirror_limit,
7940                                                              error);
7941                         if (ret < 0)
7942                                 return ret;
7943                         if ((action_flags & MLX5_FLOW_ACTION_SET_TAG) &&
7944                             tag_id == 0 && priv->mtr_color_reg == REG_NON)
7945                                 return rte_flow_error_set(error, EINVAL,
7946                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7947                                         "sample after tag action causes metadata tag index 0 corruption");
7948                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7949                         ++actions_n;
7950                         break;
7951                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7952                         ret = flow_dv_validate_action_modify_field(dev,
7953                                                                    action_flags,
7954                                                                    actions,
7955                                                                    attr,
7956                                                                    error);
7957                         if (ret < 0)
7958                                 return ret;
7959                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7960                                 modify_after_mirror = 1;
7961                         /* Count all modify-header actions as one action. */
7962                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7963                                 ++actions_n;
7964                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7965                         rw_act_num += ret;
7966                         break;
7967                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7968                         ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7969                                                              item_flags, attr,
7970                                                              error);
7971                         if (ret < 0)
7972                                 return ret;
7973                         action_flags |= MLX5_FLOW_ACTION_CT;
7974                         break;
7975                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7976                         /* tunnel offload action was processed before
7977                          * list it here as a supported type
7978                          */
7979                         break;
7980                 default:
7981                         return rte_flow_error_set(error, ENOTSUP,
7982                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7983                                                   actions,
7984                                                   "action not supported");
7985                 }
7986         }
7987         /*
7988          * Validate actions in flow rules
7989          * - Explicit decap action is prohibited by the tunnel offload API.
7990          * - Drop action in tunnel steer rule is prohibited by the API.
7991          * - Application cannot use MARK action because it's value can mask
7992          *   tunnel default miss notification.
7993          * - JUMP in tunnel match rule has no support in current PMD
7994          *   implementation.
7995          * - TAG & META are reserved for future uses.
7996          */
7997         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7998                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
7999                                             MLX5_FLOW_ACTION_MARK     |
8000                                             MLX5_FLOW_ACTION_SET_TAG  |
8001                                             MLX5_FLOW_ACTION_SET_META |
8002                                             MLX5_FLOW_ACTION_DROP;
8003
8004                 if (action_flags & bad_actions_mask)
8005                         return rte_flow_error_set
8006                                         (error, EINVAL,
8007                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8008                                         "Invalid RTE action in tunnel "
8009                                         "set decap rule");
8010                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
8011                         return rte_flow_error_set
8012                                         (error, EINVAL,
8013                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8014                                         "tunnel set decap rule must terminate "
8015                                         "with JUMP");
8016                 if (!attr->ingress)
8017                         return rte_flow_error_set
8018                                         (error, EINVAL,
8019                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8020                                         "tunnel flows for ingress traffic only");
8021         }
8022         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
8023                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
8024                                             MLX5_FLOW_ACTION_MARK    |
8025                                             MLX5_FLOW_ACTION_SET_TAG |
8026                                             MLX5_FLOW_ACTION_SET_META;
8027
8028                 if (action_flags & bad_actions_mask)
8029                         return rte_flow_error_set
8030                                         (error, EINVAL,
8031                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8032                                         "Invalid RTE action in tunnel "
8033                                         "set match rule");
8034         }
8035         /*
8036          * Validate the drop action mutual exclusion with other actions.
8037          * Drop action is mutually-exclusive with any other action, except for
8038          * Count action.
8039          * Drop action compatibility with tunnel offload was already validated.
8040          */
8041         if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
8042                             MLX5_FLOW_ACTION_TUNNEL_MATCH));
8043         else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
8044             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
8045                 return rte_flow_error_set(error, EINVAL,
8046                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8047                                           "Drop action is mutually-exclusive "
8048                                           "with any other action, except for "
8049                                           "Count action");
8050         /* Eswitch has few restrictions on using items and actions */
8051         if (attr->transfer) {
8052                 if (!mlx5_flow_ext_mreg_supported(dev) &&
8053                     action_flags & MLX5_FLOW_ACTION_FLAG)
8054                         return rte_flow_error_set(error, ENOTSUP,
8055                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8056                                                   NULL,
8057                                                   "unsupported action FLAG");
8058                 if (!mlx5_flow_ext_mreg_supported(dev) &&
8059                     action_flags & MLX5_FLOW_ACTION_MARK)
8060                         return rte_flow_error_set(error, ENOTSUP,
8061                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8062                                                   NULL,
8063                                                   "unsupported action MARK");
8064                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
8065                         return rte_flow_error_set(error, ENOTSUP,
8066                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8067                                                   NULL,
8068                                                   "unsupported action QUEUE");
8069                 if (action_flags & MLX5_FLOW_ACTION_RSS)
8070                         return rte_flow_error_set(error, ENOTSUP,
8071                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8072                                                   NULL,
8073                                                   "unsupported action RSS");
8074                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
8075                         return rte_flow_error_set(error, EINVAL,
8076                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8077                                                   actions,
8078                                                   "no fate action is found");
8079         } else {
8080                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
8081                         return rte_flow_error_set(error, EINVAL,
8082                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8083                                                   actions,
8084                                                   "no fate action is found");
8085         }
8086         /*
8087          * Continue validation for Xcap and VLAN actions.
8088          * If hairpin is working in explicit TX rule mode, there is no actions
8089          * splitting and the validation of hairpin ingress flow should be the
8090          * same as other standard flows.
8091          */
8092         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
8093                              MLX5_FLOW_VLAN_ACTIONS)) &&
8094             (queue_index == 0xFFFF || !mlx5_rxq_is_hairpin(dev, queue_index) ||
8095              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
8096              conf->tx_explicit != 0))) {
8097                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
8098                     MLX5_FLOW_XCAP_ACTIONS)
8099                         return rte_flow_error_set(error, ENOTSUP,
8100                                                   RTE_FLOW_ERROR_TYPE_ACTION,
8101                                                   NULL, "encap and decap "
8102                                                   "combination aren't supported");
8103                 /* Push VLAN is not supported in ingress except for NICs newer than CX5. */
8104                 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) {
8105                         struct mlx5_dev_ctx_shared *sh = priv->sh;
8106                         bool direction_error = false;
8107
8108                         if (attr->transfer) {
8109                                 bool fdb_tx = priv->representor_id != UINT16_MAX;
8110                                 bool is_cx5 = sh->steering_format_version ==
8111                                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
8112
8113                                 if (!fdb_tx && is_cx5)
8114                                         direction_error = true;
8115                         } else if (attr->ingress) {
8116                                 direction_error = true;
8117                         }
8118                         if (direction_error)
8119                                 return rte_flow_error_set(error, ENOTSUP,
8120                                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
8121                                                           NULL,
8122                                                           "push VLAN action not supported "
8123                                                           "for ingress");
8124                 }
8125                 if (!attr->transfer && attr->ingress) {
8126                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
8127                                 return rte_flow_error_set
8128                                                 (error, ENOTSUP,
8129                                                  RTE_FLOW_ERROR_TYPE_ACTION,
8130                                                  NULL, "encap is not supported"
8131                                                  " for ingress traffic");
8132                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
8133                                         MLX5_FLOW_VLAN_ACTIONS)
8134                                 return rte_flow_error_set
8135                                                 (error, ENOTSUP,
8136                                                  RTE_FLOW_ERROR_TYPE_ACTION,
8137                                                  NULL, "no support for "
8138                                                  "multiple VLAN actions");
8139                 }
8140         }
8141         if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
8142                 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
8143                         ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
8144                         attr->ingress)
8145                         return rte_flow_error_set
8146                                 (error, ENOTSUP,
8147                                 RTE_FLOW_ERROR_TYPE_ACTION,
8148                                 NULL, "fate action not supported for "
8149                                 "meter with policy");
8150                 if (attr->egress) {
8151                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
8152                                 return rte_flow_error_set
8153                                         (error, ENOTSUP,
8154                                         RTE_FLOW_ERROR_TYPE_ACTION,
8155                                         NULL, "modify header action in egress "
8156                                         "cannot be done before meter action");
8157                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
8158                                 return rte_flow_error_set
8159                                         (error, ENOTSUP,
8160                                         RTE_FLOW_ERROR_TYPE_ACTION,
8161                                         NULL, "encap action in egress "
8162                                         "cannot be done before meter action");
8163                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
8164                                 return rte_flow_error_set
8165                                         (error, ENOTSUP,
8166                                         RTE_FLOW_ERROR_TYPE_ACTION,
8167                                         NULL, "push vlan action in egress "
8168                                         "cannot be done before meter action");
8169                 }
8170         }
8171         /*
8172          * Only support one ASO action in a single flow rule.
8173          * non-shared AGE + counter will fallback to use HW counter, no ASO hit object.
8174          * Group 0 uses HW counter for AGE too even if no counter action.
8175          */
8176         aso_mask = (action_flags & MLX5_FLOW_ACTION_METER && priv->sh->meter_aso_en) << 2 |
8177                    (action_flags & MLX5_FLOW_ACTION_CT && priv->sh->ct_aso_en) << 1 |
8178                    (action_flags & MLX5_FLOW_ACTION_AGE &&
8179                     !(non_shared_age && count) &&
8180                     (attr->group || (attr->transfer && priv->fdb_def_rule)) &&
8181                     priv->sh->flow_hit_aso_en);
8182         if (__builtin_popcountl(aso_mask) > 1)
8183                 return rte_flow_error_set(error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
8184                                           NULL, "unsupported combining AGE, METER, CT ASO actions in a single rule");
8185         /*
8186          * Hairpin flow will add one more TAG action in TX implicit mode.
8187          * In TX explicit mode, there will be no hairpin flow ID.
8188          */
8189         if (hairpin > 0)
8190                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8191         /* extra metadata enabled: one more TAG action will be add. */
8192         if (dev_conf->dv_flow_en &&
8193             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
8194             mlx5_flow_ext_mreg_supported(dev))
8195                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8196         if (rw_act_num >
8197                         flow_dv_modify_hdr_action_max(dev, is_root)) {
8198                 return rte_flow_error_set(error, ENOTSUP,
8199                                           RTE_FLOW_ERROR_TYPE_ACTION,
8200                                           NULL, "too many header modify"
8201                                           " actions to support");
8202         }
8203         /* Eswitch egress mirror and modify flow has limitation on CX5 */
8204         if (fdb_mirror_limit && modify_after_mirror)
8205                 return rte_flow_error_set(error, EINVAL,
8206                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8207                                 "sample before modify action is not supported");
8208         /*
8209          * Validation the NIC Egress flow on representor, except implicit
8210          * hairpin default egress flow with TX_QUEUE item, other flows not
8211          * work due to metadata regC0 mismatch.
8212          */
8213         if ((!attr->transfer && attr->egress) && priv->representor &&
8214             !(item_flags & MLX5_FLOW_ITEM_TX_QUEUE))
8215                 return rte_flow_error_set(error, EINVAL,
8216                                           RTE_FLOW_ERROR_TYPE_ITEM,
8217                                           NULL,
8218                                           "NIC egress rules on representors"
8219                                           " is not supported");
8220         return 0;
8221 }
8222
8223 /**
8224  * Internal preparation function. Allocates the DV flow size,
8225  * this size is constant.
8226  *
8227  * @param[in] dev
8228  *   Pointer to the rte_eth_dev structure.
8229  * @param[in] attr
8230  *   Pointer to the flow attributes.
8231  * @param[in] items
8232  *   Pointer to the list of items.
8233  * @param[in] actions
8234  *   Pointer to the list of actions.
8235  * @param[out] error
8236  *   Pointer to the error structure.
8237  *
8238  * @return
8239  *   Pointer to mlx5_flow object on success,
8240  *   otherwise NULL and rte_errno is set.
8241  */
8242 static struct mlx5_flow *
8243 flow_dv_prepare(struct rte_eth_dev *dev,
8244                 const struct rte_flow_attr *attr __rte_unused,
8245                 const struct rte_flow_item items[] __rte_unused,
8246                 const struct rte_flow_action actions[] __rte_unused,
8247                 struct rte_flow_error *error)
8248 {
8249         uint32_t handle_idx = 0;
8250         struct mlx5_flow *dev_flow;
8251         struct mlx5_flow_handle *dev_handle;
8252         struct mlx5_priv *priv = dev->data->dev_private;
8253         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8254
8255         MLX5_ASSERT(wks);
8256         wks->skip_matcher_reg = 0;
8257         wks->policy = NULL;
8258         wks->final_policy = NULL;
8259         /* In case of corrupting the memory. */
8260         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8261                 rte_flow_error_set(error, ENOSPC,
8262                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8263                                    "not free temporary device flow");
8264                 return NULL;
8265         }
8266         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8267                                    &handle_idx);
8268         if (!dev_handle) {
8269                 rte_flow_error_set(error, ENOMEM,
8270                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8271                                    "not enough memory to create flow handle");
8272                 return NULL;
8273         }
8274         MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8275         dev_flow = &wks->flows[wks->flow_idx++];
8276         memset(dev_flow, 0, sizeof(*dev_flow));
8277         dev_flow->handle = dev_handle;
8278         dev_flow->handle_idx = handle_idx;
8279         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8280         dev_flow->ingress = attr->ingress;
8281         dev_flow->dv.transfer = attr->transfer;
8282         return dev_flow;
8283 }
8284
8285 #ifdef RTE_LIBRTE_MLX5_DEBUG
8286 /**
8287  * Sanity check for match mask and value. Similar to check_valid_spec() in
8288  * kernel driver. If unmasked bit is present in value, it returns failure.
8289  *
8290  * @param match_mask
8291  *   pointer to match mask buffer.
8292  * @param match_value
8293  *   pointer to match value buffer.
8294  *
8295  * @return
8296  *   0 if valid, -EINVAL otherwise.
8297  */
8298 static int
8299 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8300 {
8301         uint8_t *m = match_mask;
8302         uint8_t *v = match_value;
8303         unsigned int i;
8304
8305         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8306                 if (v[i] & ~m[i]) {
8307                         DRV_LOG(ERR,
8308                                 "match_value differs from match_criteria"
8309                                 " %p[%u] != %p[%u]",
8310                                 match_value, i, match_mask, i);
8311                         return -EINVAL;
8312                 }
8313         }
8314         return 0;
8315 }
8316 #endif
8317
8318 /**
8319  * Add match of ip_version.
8320  *
8321  * @param[in] group
8322  *   Flow group.
8323  * @param[in] headers_v
8324  *   Values header pointer.
8325  * @param[in] headers_m
8326  *   Masks header pointer.
8327  * @param[in] ip_version
8328  *   The IP version to set.
8329  */
8330 static inline void
8331 flow_dv_set_match_ip_version(uint32_t group,
8332                              void *headers_v,
8333                              void *headers_m,
8334                              uint8_t ip_version)
8335 {
8336         if (group == 0)
8337                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8338         else
8339                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8340                          ip_version);
8341         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8342         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8343         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8344 }
8345
8346 /**
8347  * Add Ethernet item to matcher and to the value.
8348  *
8349  * @param[in, out] matcher
8350  *   Flow matcher.
8351  * @param[in, out] key
8352  *   Flow matcher value.
8353  * @param[in] item
8354  *   Flow pattern to translate.
8355  * @param[in] inner
8356  *   Item is inner pattern.
8357  */
8358 static void
8359 flow_dv_translate_item_eth(void *matcher, void *key,
8360                            const struct rte_flow_item *item, int inner,
8361                            uint32_t group)
8362 {
8363         const struct rte_flow_item_eth *eth_m = item->mask;
8364         const struct rte_flow_item_eth *eth_v = item->spec;
8365         const struct rte_flow_item_eth nic_mask = {
8366                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8367                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8368                 .type = RTE_BE16(0xffff),
8369                 .has_vlan = 0,
8370         };
8371         void *hdrs_m;
8372         void *hdrs_v;
8373         char *l24_v;
8374         unsigned int i;
8375
8376         if (!eth_v)
8377                 return;
8378         if (!eth_m)
8379                 eth_m = &nic_mask;
8380         if (inner) {
8381                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8382                                          inner_headers);
8383                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8384         } else {
8385                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8386                                          outer_headers);
8387                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8388         }
8389         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8390                &eth_m->dst, sizeof(eth_m->dst));
8391         /* The value must be in the range of the mask. */
8392         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8393         for (i = 0; i < sizeof(eth_m->dst); ++i)
8394                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8395         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8396                &eth_m->src, sizeof(eth_m->src));
8397         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8398         /* The value must be in the range of the mask. */
8399         for (i = 0; i < sizeof(eth_m->dst); ++i)
8400                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8401         /*
8402          * HW supports match on one Ethertype, the Ethertype following the last
8403          * VLAN tag of the packet (see PRM).
8404          * Set match on ethertype only if ETH header is not followed by VLAN.
8405          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8406          * ethertype, and use ip_version field instead.
8407          * eCPRI over Ether layer will use type value 0xAEFE.
8408          */
8409         if (eth_m->type == 0xFFFF) {
8410                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8411                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8412                 switch (eth_v->type) {
8413                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8414                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8415                         return;
8416                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8417                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8418                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8419                         return;
8420                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8421                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8422                         return;
8423                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8424                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8425                         return;
8426                 default:
8427                         break;
8428                 }
8429         }
8430         if (eth_m->has_vlan) {
8431                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8432                 if (eth_v->has_vlan) {
8433                         /*
8434                          * Here, when also has_more_vlan field in VLAN item is
8435                          * not set, only single-tagged packets will be matched.
8436                          */
8437                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8438                         return;
8439                 }
8440         }
8441         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8442                  rte_be_to_cpu_16(eth_m->type));
8443         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8444         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8445 }
8446
8447 /**
8448  * Add VLAN item to matcher and to the value.
8449  *
8450  * @param[in, out] dev_flow
8451  *   Flow descriptor.
8452  * @param[in, out] matcher
8453  *   Flow matcher.
8454  * @param[in, out] key
8455  *   Flow matcher value.
8456  * @param[in] item
8457  *   Flow pattern to translate.
8458  * @param[in] inner
8459  *   Item is inner pattern.
8460  */
8461 static void
8462 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8463                             void *matcher, void *key,
8464                             const struct rte_flow_item *item,
8465                             int inner, uint32_t group)
8466 {
8467         const struct rte_flow_item_vlan *vlan_m = item->mask;
8468         const struct rte_flow_item_vlan *vlan_v = item->spec;
8469         void *hdrs_m;
8470         void *hdrs_v;
8471         uint16_t tci_m;
8472         uint16_t tci_v;
8473
8474         if (inner) {
8475                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8476                                          inner_headers);
8477                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8478         } else {
8479                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8480                                          outer_headers);
8481                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8482                 /*
8483                  * This is workaround, masks are not supported,
8484                  * and pre-validated.
8485                  */
8486                 if (vlan_v)
8487                         dev_flow->handle->vf_vlan.tag =
8488                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8489         }
8490         /*
8491          * When VLAN item exists in flow, mark packet as tagged,
8492          * even if TCI is not specified.
8493          */
8494         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8495                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8496                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8497         }
8498         if (!vlan_v)
8499                 return;
8500         if (!vlan_m)
8501                 vlan_m = &rte_flow_item_vlan_mask;
8502         tci_m = rte_be_to_cpu_16(vlan_m->tci);
8503         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8504         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8505         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8506         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8507         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8508         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8509         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8510         /*
8511          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8512          * ethertype, and use ip_version field instead.
8513          */
8514         if (vlan_m->inner_type == 0xFFFF) {
8515                 switch (vlan_v->inner_type) {
8516                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8517                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8518                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8519                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8520                         return;
8521                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8522                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8523                         return;
8524                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8525                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8526                         return;
8527                 default:
8528                         break;
8529                 }
8530         }
8531         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8532                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8533                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8534                 /* Only one vlan_tag bit can be set. */
8535                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8536                 return;
8537         }
8538         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8539                  rte_be_to_cpu_16(vlan_m->inner_type));
8540         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8541                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8542 }
8543
8544 /**
8545  * Add IPV4 item to matcher and to the value.
8546  *
8547  * @param[in, out] matcher
8548  *   Flow matcher.
8549  * @param[in, out] key
8550  *   Flow matcher value.
8551  * @param[in] item
8552  *   Flow pattern to translate.
8553  * @param[in] inner
8554  *   Item is inner pattern.
8555  * @param[in] group
8556  *   The group to insert the rule.
8557  */
8558 static void
8559 flow_dv_translate_item_ipv4(void *matcher, void *key,
8560                             const struct rte_flow_item *item,
8561                             int inner, uint32_t group)
8562 {
8563         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8564         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8565         const struct rte_flow_item_ipv4 nic_mask = {
8566                 .hdr = {
8567                         .src_addr = RTE_BE32(0xffffffff),
8568                         .dst_addr = RTE_BE32(0xffffffff),
8569                         .type_of_service = 0xff,
8570                         .next_proto_id = 0xff,
8571                         .time_to_live = 0xff,
8572                 },
8573         };
8574         void *headers_m;
8575         void *headers_v;
8576         char *l24_m;
8577         char *l24_v;
8578         uint8_t tos, ihl_m, ihl_v;
8579
8580         if (inner) {
8581                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8582                                          inner_headers);
8583                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8584         } else {
8585                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8586                                          outer_headers);
8587                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8588         }
8589         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8590         if (!ipv4_v)
8591                 return;
8592         if (!ipv4_m)
8593                 ipv4_m = &nic_mask;
8594         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8595                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8596         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8597                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8598         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8599         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8600         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8601                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8602         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8603                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8604         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8605         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8606         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8607         ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8608         ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8609         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8610         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8611         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8612                  ipv4_m->hdr.type_of_service);
8613         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8614         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8615                  ipv4_m->hdr.type_of_service >> 2);
8616         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8617         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8618                  ipv4_m->hdr.next_proto_id);
8619         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8620                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8621         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8622                  ipv4_m->hdr.time_to_live);
8623         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8624                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8625         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8626                  !!(ipv4_m->hdr.fragment_offset));
8627         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8628                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8629 }
8630
8631 /**
8632  * Add IPV6 item to matcher and to the value.
8633  *
8634  * @param[in, out] matcher
8635  *   Flow matcher.
8636  * @param[in, out] key
8637  *   Flow matcher value.
8638  * @param[in] item
8639  *   Flow pattern to translate.
8640  * @param[in] inner
8641  *   Item is inner pattern.
8642  * @param[in] group
8643  *   The group to insert the rule.
8644  */
8645 static void
8646 flow_dv_translate_item_ipv6(void *matcher, void *key,
8647                             const struct rte_flow_item *item,
8648                             int inner, uint32_t group)
8649 {
8650         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8651         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8652         const struct rte_flow_item_ipv6 nic_mask = {
8653                 .hdr = {
8654                         .src_addr =
8655                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8656                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8657                         .dst_addr =
8658                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8659                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8660                         .vtc_flow = RTE_BE32(0xffffffff),
8661                         .proto = 0xff,
8662                         .hop_limits = 0xff,
8663                 },
8664         };
8665         void *headers_m;
8666         void *headers_v;
8667         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8668         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8669         char *l24_m;
8670         char *l24_v;
8671         uint32_t vtc_m;
8672         uint32_t vtc_v;
8673         int i;
8674         int size;
8675
8676         if (inner) {
8677                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8678                                          inner_headers);
8679                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8680         } else {
8681                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8682                                          outer_headers);
8683                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8684         }
8685         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8686         if (!ipv6_v)
8687                 return;
8688         if (!ipv6_m)
8689                 ipv6_m = &nic_mask;
8690         size = sizeof(ipv6_m->hdr.dst_addr);
8691         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8692                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8693         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8694                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8695         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8696         for (i = 0; i < size; ++i)
8697                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8698         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8699                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8700         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8701                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8702         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8703         for (i = 0; i < size; ++i)
8704                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8705         /* TOS. */
8706         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8707         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8708         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8709         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8710         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8711         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8712         /* Label. */
8713         if (inner) {
8714                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8715                          vtc_m);
8716                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8717                          vtc_v);
8718         } else {
8719                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8720                          vtc_m);
8721                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8722                          vtc_v);
8723         }
8724         /* Protocol. */
8725         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8726                  ipv6_m->hdr.proto);
8727         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8728                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8729         /* Hop limit. */
8730         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8731                  ipv6_m->hdr.hop_limits);
8732         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8733                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8734         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8735                  !!(ipv6_m->has_frag_ext));
8736         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8737                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8738 }
8739
8740 /**
8741  * Add IPV6 fragment extension item to matcher and to the value.
8742  *
8743  * @param[in, out] matcher
8744  *   Flow matcher.
8745  * @param[in, out] key
8746  *   Flow matcher value.
8747  * @param[in] item
8748  *   Flow pattern to translate.
8749  * @param[in] inner
8750  *   Item is inner pattern.
8751  */
8752 static void
8753 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8754                                      const struct rte_flow_item *item,
8755                                      int inner)
8756 {
8757         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8758         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8759         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8760                 .hdr = {
8761                         .next_header = 0xff,
8762                         .frag_data = RTE_BE16(0xffff),
8763                 },
8764         };
8765         void *headers_m;
8766         void *headers_v;
8767
8768         if (inner) {
8769                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8770                                          inner_headers);
8771                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8772         } else {
8773                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8774                                          outer_headers);
8775                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8776         }
8777         /* IPv6 fragment extension item exists, so packet is IP fragment. */
8778         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8779         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8780         if (!ipv6_frag_ext_v)
8781                 return;
8782         if (!ipv6_frag_ext_m)
8783                 ipv6_frag_ext_m = &nic_mask;
8784         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8785                  ipv6_frag_ext_m->hdr.next_header);
8786         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8787                  ipv6_frag_ext_v->hdr.next_header &
8788                  ipv6_frag_ext_m->hdr.next_header);
8789 }
8790
8791 /**
8792  * Add TCP item to matcher and to the value.
8793  *
8794  * @param[in, out] matcher
8795  *   Flow matcher.
8796  * @param[in, out] key
8797  *   Flow matcher value.
8798  * @param[in] item
8799  *   Flow pattern to translate.
8800  * @param[in] inner
8801  *   Item is inner pattern.
8802  */
8803 static void
8804 flow_dv_translate_item_tcp(void *matcher, void *key,
8805                            const struct rte_flow_item *item,
8806                            int inner)
8807 {
8808         const struct rte_flow_item_tcp *tcp_m = item->mask;
8809         const struct rte_flow_item_tcp *tcp_v = item->spec;
8810         void *headers_m;
8811         void *headers_v;
8812
8813         if (inner) {
8814                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8815                                          inner_headers);
8816                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8817         } else {
8818                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8819                                          outer_headers);
8820                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8821         }
8822         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8823         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8824         if (!tcp_v)
8825                 return;
8826         if (!tcp_m)
8827                 tcp_m = &rte_flow_item_tcp_mask;
8828         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8829                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
8830         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8831                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8832         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8833                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8834         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8835                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8836         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8837                  tcp_m->hdr.tcp_flags);
8838         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8839                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8840 }
8841
8842 /**
8843  * Add ESP item to matcher and to the value.
8844  *
8845  * @param[in, out] matcher
8846  *   Flow matcher.
8847  * @param[in, out] key
8848  *   Flow matcher value.
8849  * @param[in] item
8850  *   Flow pattern to translate.
8851  * @param[in] inner
8852  *   Item is inner pattern.
8853  */
8854 static void
8855 flow_dv_translate_item_esp(void *matcher, void *key,
8856                            const struct rte_flow_item *item,
8857                            int inner)
8858 {
8859         const struct rte_flow_item_esp *esp_m = item->mask;
8860         const struct rte_flow_item_esp *esp_v = item->spec;
8861         void *headers_m;
8862         void *headers_v;
8863         char *spi_m;
8864         char *spi_v;
8865
8866         if (inner) {
8867                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8868                                          inner_headers);
8869                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8870         } else {
8871                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8872                                          outer_headers);
8873                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8874         }
8875         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8876         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ESP);
8877         if (!esp_v)
8878                 return;
8879         if (!esp_m)
8880                 esp_m = &rte_flow_item_esp_mask;
8881         headers_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8882         headers_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8883         if (inner) {
8884                 spi_m = MLX5_ADDR_OF(fte_match_set_misc, headers_m, inner_esp_spi);
8885                 spi_v = MLX5_ADDR_OF(fte_match_set_misc, headers_v, inner_esp_spi);
8886         } else {
8887                 spi_m = MLX5_ADDR_OF(fte_match_set_misc, headers_m, outer_esp_spi);
8888                 spi_v = MLX5_ADDR_OF(fte_match_set_misc, headers_v, outer_esp_spi);
8889         }
8890         *(uint32_t *)spi_m = esp_m->hdr.spi;
8891         *(uint32_t *)spi_v = esp_m->hdr.spi & esp_v->hdr.spi;
8892 }
8893
8894 /**
8895  * Add UDP item to matcher and to the value.
8896  *
8897  * @param[in, out] matcher
8898  *   Flow matcher.
8899  * @param[in, out] key
8900  *   Flow matcher value.
8901  * @param[in] item
8902  *   Flow pattern to translate.
8903  * @param[in] inner
8904  *   Item is inner pattern.
8905  */
8906 static void
8907 flow_dv_translate_item_udp(void *matcher, void *key,
8908                            const struct rte_flow_item *item,
8909                            int inner)
8910 {
8911         const struct rte_flow_item_udp *udp_m = item->mask;
8912         const struct rte_flow_item_udp *udp_v = item->spec;
8913         void *headers_m;
8914         void *headers_v;
8915
8916         if (inner) {
8917                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8918                                          inner_headers);
8919                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8920         } else {
8921                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8922                                          outer_headers);
8923                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8924         }
8925         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8926         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8927         if (!udp_v)
8928                 return;
8929         if (!udp_m)
8930                 udp_m = &rte_flow_item_udp_mask;
8931         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8932                  rte_be_to_cpu_16(udp_m->hdr.src_port));
8933         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8934                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8935         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8936                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
8937         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8938                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8939 }
8940
8941 /**
8942  * Add GRE optional Key item to matcher and to the value.
8943  *
8944  * @param[in, out] matcher
8945  *   Flow matcher.
8946  * @param[in, out] key
8947  *   Flow matcher value.
8948  * @param[in] item
8949  *   Flow pattern to translate.
8950  * @param[in] inner
8951  *   Item is inner pattern.
8952  */
8953 static void
8954 flow_dv_translate_item_gre_key(void *matcher, void *key,
8955                                    const struct rte_flow_item *item)
8956 {
8957         const rte_be32_t *key_m = item->mask;
8958         const rte_be32_t *key_v = item->spec;
8959         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8960         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8961         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8962
8963         /* GRE K bit must be on and should already be validated */
8964         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8965         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8966         if (!key_v)
8967                 return;
8968         if (!key_m)
8969                 key_m = &gre_key_default_mask;
8970         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8971                  rte_be_to_cpu_32(*key_m) >> 8);
8972         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8973                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8974         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8975                  rte_be_to_cpu_32(*key_m) & 0xFF);
8976         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8977                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8978 }
8979
8980 /**
8981  * Add GRE item to matcher and to the value.
8982  *
8983  * @param[in, out] matcher
8984  *   Flow matcher.
8985  * @param[in, out] key
8986  *   Flow matcher value.
8987  * @param[in] item
8988  *   Flow pattern to translate.
8989  * @param[in] pattern_flags
8990  *   Accumulated pattern flags.
8991  */
8992 static void
8993 flow_dv_translate_item_gre(void *matcher, void *key,
8994                            const struct rte_flow_item *item,
8995                            uint64_t pattern_flags)
8996 {
8997         static const struct rte_flow_item_gre empty_gre = {0,};
8998         const struct rte_flow_item_gre *gre_m = item->mask;
8999         const struct rte_flow_item_gre *gre_v = item->spec;
9000         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9001         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9002         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9003         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9004         struct {
9005                 union {
9006                         __extension__
9007                         struct {
9008                                 uint16_t version:3;
9009                                 uint16_t rsvd0:9;
9010                                 uint16_t s_present:1;
9011                                 uint16_t k_present:1;
9012                                 uint16_t rsvd_bit1:1;
9013                                 uint16_t c_present:1;
9014                         };
9015                         uint16_t value;
9016                 };
9017         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
9018         uint16_t protocol_m, protocol_v;
9019
9020         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
9021         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
9022         if (!gre_v) {
9023                 gre_v = &empty_gre;
9024                 gre_m = &empty_gre;
9025         } else {
9026                 if (!gre_m)
9027                         gre_m = &rte_flow_item_gre_mask;
9028         }
9029         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
9030         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
9031         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
9032                  gre_crks_rsvd0_ver_m.c_present);
9033         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
9034                  gre_crks_rsvd0_ver_v.c_present &
9035                  gre_crks_rsvd0_ver_m.c_present);
9036         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
9037                  gre_crks_rsvd0_ver_m.k_present);
9038         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
9039                  gre_crks_rsvd0_ver_v.k_present &
9040                  gre_crks_rsvd0_ver_m.k_present);
9041         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
9042                  gre_crks_rsvd0_ver_m.s_present);
9043         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
9044                  gre_crks_rsvd0_ver_v.s_present &
9045                  gre_crks_rsvd0_ver_m.s_present);
9046         protocol_m = rte_be_to_cpu_16(gre_m->protocol);
9047         protocol_v = rte_be_to_cpu_16(gre_v->protocol);
9048         if (!protocol_m) {
9049                 /* Force next protocol to prevent matchers duplication */
9050                 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
9051                 if (protocol_v)
9052                         protocol_m = 0xFFFF;
9053         }
9054         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, protocol_m);
9055         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9056                  protocol_m & protocol_v);
9057 }
9058
9059 /**
9060  * Add GRE optional items to matcher and to the value.
9061  *
9062  * @param[in, out] matcher
9063  *   Flow matcher.
9064  * @param[in, out] key
9065  *   Flow matcher value.
9066  * @param[in] item
9067  *   Flow pattern to translate.
9068  * @param[in] gre_item
9069  *   Pointer to gre_item.
9070  * @param[in] pattern_flags
9071  *   Accumulated pattern flags.
9072  */
9073 static void
9074 flow_dv_translate_item_gre_option(void *matcher, void *key,
9075                                   const struct rte_flow_item *item,
9076                                   const struct rte_flow_item *gre_item,
9077                                   uint64_t pattern_flags)
9078 {
9079         const struct rte_flow_item_gre_opt *option_m = item->mask;
9080         const struct rte_flow_item_gre_opt *option_v = item->spec;
9081         const struct rte_flow_item_gre *gre_m = gre_item->mask;
9082         const struct rte_flow_item_gre *gre_v = gre_item->spec;
9083         static const struct rte_flow_item_gre empty_gre = {0};
9084         struct rte_flow_item gre_key_item;
9085         uint16_t c_rsvd0_ver_m, c_rsvd0_ver_v;
9086         uint16_t protocol_m, protocol_v;
9087         void *misc5_m;
9088         void *misc5_v;
9089
9090         /*
9091          * If only match key field, keep using misc for matching.
9092          * If need to match checksum or sequence, using misc5 and do
9093          * not need using misc.
9094          */
9095         if (!(option_m->sequence.sequence ||
9096               option_m->checksum_rsvd.checksum)) {
9097                 flow_dv_translate_item_gre(matcher, key, gre_item,
9098                                            pattern_flags);
9099                 gre_key_item.spec = &option_v->key.key;
9100                 gre_key_item.mask = &option_m->key.key;
9101                 flow_dv_translate_item_gre_key(matcher, key, &gre_key_item);
9102                 return;
9103         }
9104         if (!gre_v) {
9105                 gre_v = &empty_gre;
9106                 gre_m = &empty_gre;
9107         } else {
9108                 if (!gre_m)
9109                         gre_m = &rte_flow_item_gre_mask;
9110         }
9111         protocol_v = gre_v->protocol;
9112         protocol_m = gre_m->protocol;
9113         if (!protocol_m) {
9114                 /* Force next protocol to prevent matchers duplication */
9115                 uint16_t ether_type =
9116                         mlx5_translate_tunnel_etypes(pattern_flags);
9117                 if (ether_type) {
9118                         protocol_v = rte_be_to_cpu_16(ether_type);
9119                         protocol_m = UINT16_MAX;
9120                 }
9121         }
9122         c_rsvd0_ver_v = gre_v->c_rsvd0_ver;
9123         c_rsvd0_ver_m = gre_m->c_rsvd0_ver;
9124         if (option_m->sequence.sequence) {
9125                 c_rsvd0_ver_v |= RTE_BE16(0x1000);
9126                 c_rsvd0_ver_m |= RTE_BE16(0x1000);
9127         }
9128         if (option_m->key.key) {
9129                 c_rsvd0_ver_v |= RTE_BE16(0x2000);
9130                 c_rsvd0_ver_m |= RTE_BE16(0x2000);
9131         }
9132         if (option_m->checksum_rsvd.checksum) {
9133                 c_rsvd0_ver_v |= RTE_BE16(0x8000);
9134                 c_rsvd0_ver_m |= RTE_BE16(0x8000);
9135         }
9136         /*
9137          * Hardware parses GRE optional field into the fixed location,
9138          * do not need to adjust the tunnel dword indices.
9139          */
9140         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
9141         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
9142         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_0,
9143                  rte_be_to_cpu_32((c_rsvd0_ver_v | protocol_v << 16) &
9144                                   (c_rsvd0_ver_m | protocol_m << 16)));
9145         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_0,
9146                  rte_be_to_cpu_32(c_rsvd0_ver_m | protocol_m << 16));
9147         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_1,
9148                  rte_be_to_cpu_32(option_v->checksum_rsvd.checksum &
9149                                   option_m->checksum_rsvd.checksum));
9150         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_1,
9151                  rte_be_to_cpu_32(option_m->checksum_rsvd.checksum));
9152         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_2,
9153                  rte_be_to_cpu_32(option_v->key.key & option_m->key.key));
9154         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_2,
9155                  rte_be_to_cpu_32(option_m->key.key));
9156         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_3,
9157                  rte_be_to_cpu_32(option_v->sequence.sequence &
9158                                   option_m->sequence.sequence));
9159         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_3,
9160                  rte_be_to_cpu_32(option_m->sequence.sequence));
9161 }
9162
9163 /**
9164  * Add NVGRE item to matcher and to the value.
9165  *
9166  * @param[in, out] matcher
9167  *   Flow matcher.
9168  * @param[in, out] key
9169  *   Flow matcher value.
9170  * @param[in] item
9171  *   Flow pattern to translate.
9172  * @param[in] pattern_flags
9173  *   Accumulated pattern flags.
9174  */
9175 static void
9176 flow_dv_translate_item_nvgre(void *matcher, void *key,
9177                              const struct rte_flow_item *item,
9178                              unsigned long pattern_flags)
9179 {
9180         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
9181         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
9182         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9183         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9184         const char *tni_flow_id_m;
9185         const char *tni_flow_id_v;
9186         char *gre_key_m;
9187         char *gre_key_v;
9188         int size;
9189         int i;
9190
9191         /* For NVGRE, GRE header fields must be set with defined values. */
9192         const struct rte_flow_item_gre gre_spec = {
9193                 .c_rsvd0_ver = RTE_BE16(0x2000),
9194                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
9195         };
9196         const struct rte_flow_item_gre gre_mask = {
9197                 .c_rsvd0_ver = RTE_BE16(0xB000),
9198                 .protocol = RTE_BE16(UINT16_MAX),
9199         };
9200         const struct rte_flow_item gre_item = {
9201                 .spec = &gre_spec,
9202                 .mask = &gre_mask,
9203                 .last = NULL,
9204         };
9205         flow_dv_translate_item_gre(matcher, key, &gre_item, pattern_flags);
9206         if (!nvgre_v)
9207                 return;
9208         if (!nvgre_m)
9209                 nvgre_m = &rte_flow_item_nvgre_mask;
9210         tni_flow_id_m = (const char *)nvgre_m->tni;
9211         tni_flow_id_v = (const char *)nvgre_v->tni;
9212         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
9213         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
9214         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
9215         memcpy(gre_key_m, tni_flow_id_m, size);
9216         for (i = 0; i < size; ++i)
9217                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
9218 }
9219
9220 /**
9221  * Add VXLAN item to matcher and to the value.
9222  *
9223  * @param[in] dev
9224  *   Pointer to the Ethernet device structure.
9225  * @param[in] attr
9226  *   Flow rule attributes.
9227  * @param[in, out] matcher
9228  *   Flow matcher.
9229  * @param[in, out] key
9230  *   Flow matcher value.
9231  * @param[in] item
9232  *   Flow pattern to translate.
9233  * @param[in] inner
9234  *   Item is inner pattern.
9235  */
9236 static void
9237 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
9238                              const struct rte_flow_attr *attr,
9239                              void *matcher, void *key,
9240                              const struct rte_flow_item *item,
9241                              int inner)
9242 {
9243         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
9244         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
9245         void *headers_m;
9246         void *headers_v;
9247         void *misc5_m;
9248         void *misc5_v;
9249         uint32_t *tunnel_header_v;
9250         uint32_t *tunnel_header_m;
9251         uint16_t dport;
9252         struct mlx5_priv *priv = dev->data->dev_private;
9253         const struct rte_flow_item_vxlan nic_mask = {
9254                 .vni = "\xff\xff\xff",
9255                 .rsvd1 = 0xff,
9256         };
9257
9258         if (inner) {
9259                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9260                                          inner_headers);
9261                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9262         } else {
9263                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9264                                          outer_headers);
9265                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9266         }
9267         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
9268                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
9269         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9270                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9271                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9272         }
9273         dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
9274         if (!vxlan_v)
9275                 return;
9276         if (!vxlan_m) {
9277                 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
9278                     (attr->group && !priv->sh->misc5_cap))
9279                         vxlan_m = &rte_flow_item_vxlan_mask;
9280                 else
9281                         vxlan_m = &nic_mask;
9282         }
9283         if ((priv->sh->steering_format_version ==
9284             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
9285             dport != MLX5_UDP_PORT_VXLAN) ||
9286             (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
9287             ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
9288                 void *misc_m;
9289                 void *misc_v;
9290                 char *vni_m;
9291                 char *vni_v;
9292                 int size;
9293                 int i;
9294                 misc_m = MLX5_ADDR_OF(fte_match_param,
9295                                       matcher, misc_parameters);
9296                 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9297                 size = sizeof(vxlan_m->vni);
9298                 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
9299                 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
9300                 memcpy(vni_m, vxlan_m->vni, size);
9301                 for (i = 0; i < size; ++i)
9302                         vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9303                 return;
9304         }
9305         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
9306         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
9307         tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
9308                                                    misc5_v,
9309                                                    tunnel_header_1);
9310         tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
9311                                                    misc5_m,
9312                                                    tunnel_header_1);
9313         *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
9314                            (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
9315                            (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
9316         if (*tunnel_header_v)
9317                 *tunnel_header_m = vxlan_m->vni[0] |
9318                         vxlan_m->vni[1] << 8 |
9319                         vxlan_m->vni[2] << 16;
9320         else
9321                 *tunnel_header_m = 0x0;
9322         *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
9323         if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
9324                 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
9325 }
9326
9327 /**
9328  * Add VXLAN-GPE item to matcher and to the value.
9329  *
9330  * @param[in, out] matcher
9331  *   Flow matcher.
9332  * @param[in, out] key
9333  *   Flow matcher value.
9334  * @param[in] item
9335  *   Flow pattern to translate.
9336  * @param[in] inner
9337  *   Item is inner pattern.
9338  */
9339
9340 static void
9341 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
9342                                  const struct rte_flow_item *item,
9343                                  const uint64_t pattern_flags)
9344 {
9345         static const struct rte_flow_item_vxlan_gpe dummy_vxlan_gpe_hdr = {0, };
9346         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
9347         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
9348         /* The item was validated to be on the outer side */
9349         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9350         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9351         void *misc_m =
9352                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
9353         void *misc_v =
9354                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9355         char *vni_m =
9356                 MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
9357         char *vni_v =
9358                 MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
9359         int i, size = sizeof(vxlan_m->vni);
9360         uint8_t flags_m = 0xff;
9361         uint8_t flags_v = 0xc;
9362         uint8_t m_protocol, v_protocol;
9363
9364         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9365                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9366                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9367                          MLX5_UDP_PORT_VXLAN_GPE);
9368         }
9369         if (!vxlan_v) {
9370                 vxlan_v = &dummy_vxlan_gpe_hdr;
9371                 vxlan_m = &dummy_vxlan_gpe_hdr;
9372         } else {
9373                 if (!vxlan_m)
9374                         vxlan_m = &rte_flow_item_vxlan_gpe_mask;
9375         }
9376         memcpy(vni_m, vxlan_m->vni, size);
9377         for (i = 0; i < size; ++i)
9378                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9379         if (vxlan_m->flags) {
9380                 flags_m = vxlan_m->flags;
9381                 flags_v = vxlan_v->flags;
9382         }
9383         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
9384         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
9385         m_protocol = vxlan_m->protocol;
9386         v_protocol = vxlan_v->protocol;
9387         if (!m_protocol) {
9388                 /* Force next protocol to ensure next headers parsing. */
9389                 if (pattern_flags & MLX5_FLOW_LAYER_INNER_L2)
9390                         v_protocol = RTE_VXLAN_GPE_TYPE_ETH;
9391                 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4)
9392                         v_protocol = RTE_VXLAN_GPE_TYPE_IPV4;
9393                 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)
9394                         v_protocol = RTE_VXLAN_GPE_TYPE_IPV6;
9395                 if (v_protocol)
9396                         m_protocol = 0xFF;
9397         }
9398         MLX5_SET(fte_match_set_misc3, misc_m,
9399                  outer_vxlan_gpe_next_protocol, m_protocol);
9400         MLX5_SET(fte_match_set_misc3, misc_v,
9401                  outer_vxlan_gpe_next_protocol, m_protocol & v_protocol);
9402 }
9403
9404 /**
9405  * Add Geneve item to matcher and to the value.
9406  *
9407  * @param[in, out] matcher
9408  *   Flow matcher.
9409  * @param[in, out] key
9410  *   Flow matcher value.
9411  * @param[in] item
9412  *   Flow pattern to translate.
9413  * @param[in] inner
9414  *   Item is inner pattern.
9415  */
9416
9417 static void
9418 flow_dv_translate_item_geneve(void *matcher, void *key,
9419                               const struct rte_flow_item *item,
9420                               uint64_t pattern_flags)
9421 {
9422         static const struct rte_flow_item_geneve empty_geneve = {0,};
9423         const struct rte_flow_item_geneve *geneve_m = item->mask;
9424         const struct rte_flow_item_geneve *geneve_v = item->spec;
9425         /* GENEVE flow item validation allows single tunnel item */
9426         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9427         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9428         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9429         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9430         uint16_t gbhdr_m;
9431         uint16_t gbhdr_v;
9432         char *vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9433         char *vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9434         size_t size = sizeof(geneve_m->vni), i;
9435         uint16_t protocol_m, protocol_v;
9436
9437         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9438                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9439                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9440                          MLX5_UDP_PORT_GENEVE);
9441         }
9442         if (!geneve_v) {
9443                 geneve_v = &empty_geneve;
9444                 geneve_m = &empty_geneve;
9445         } else {
9446                 if (!geneve_m)
9447                         geneve_m = &rte_flow_item_geneve_mask;
9448         }
9449         memcpy(vni_m, geneve_m->vni, size);
9450         for (i = 0; i < size; ++i)
9451                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9452         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9453         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9454         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9455                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9456         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9457                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9458         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9459                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9460         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9461                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9462                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9463         protocol_m = rte_be_to_cpu_16(geneve_m->protocol);
9464         protocol_v = rte_be_to_cpu_16(geneve_v->protocol);
9465         if (!protocol_m) {
9466                 /* Force next protocol to prevent matchers duplication */
9467                 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
9468                 if (protocol_v)
9469                         protocol_m = 0xFFFF;
9470         }
9471         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type, protocol_m);
9472         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9473                  protocol_m & protocol_v);
9474 }
9475
9476 /**
9477  * Create Geneve TLV option resource.
9478  *
9479  * @param dev[in, out]
9480  *   Pointer to rte_eth_dev structure.
9481  * @param[in, out] tag_be24
9482  *   Tag value in big endian then R-shift 8.
9483  * @parm[in, out] dev_flow
9484  *   Pointer to the dev_flow.
9485  * @param[out] error
9486  *   pointer to error structure.
9487  *
9488  * @return
9489  *   0 on success otherwise -errno and errno is set.
9490  */
9491
9492 int
9493 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9494                                              const struct rte_flow_item *item,
9495                                              struct rte_flow_error *error)
9496 {
9497         struct mlx5_priv *priv = dev->data->dev_private;
9498         struct mlx5_dev_ctx_shared *sh = priv->sh;
9499         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9500                         sh->geneve_tlv_option_resource;
9501         struct mlx5_devx_obj *obj;
9502         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9503         int ret = 0;
9504
9505         if (!geneve_opt_v)
9506                 return -1;
9507         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9508         if (geneve_opt_resource != NULL) {
9509                 if (geneve_opt_resource->option_class ==
9510                         geneve_opt_v->option_class &&
9511                         geneve_opt_resource->option_type ==
9512                         geneve_opt_v->option_type &&
9513                         geneve_opt_resource->length ==
9514                         geneve_opt_v->option_len) {
9515                         /* We already have GENEVE TLV option obj allocated. */
9516                         __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9517                                            __ATOMIC_RELAXED);
9518                 } else {
9519                         ret = rte_flow_error_set(error, ENOMEM,
9520                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9521                                 "Only one GENEVE TLV option supported");
9522                         goto exit;
9523                 }
9524         } else {
9525                 /* Create a GENEVE TLV object and resource. */
9526                 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->cdev->ctx,
9527                                 geneve_opt_v->option_class,
9528                                 geneve_opt_v->option_type,
9529                                 geneve_opt_v->option_len);
9530                 if (!obj) {
9531                         ret = rte_flow_error_set(error, ENODATA,
9532                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9533                                 "Failed to create GENEVE TLV Devx object");
9534                         goto exit;
9535                 }
9536                 sh->geneve_tlv_option_resource =
9537                                 mlx5_malloc(MLX5_MEM_ZERO,
9538                                                 sizeof(*geneve_opt_resource),
9539                                                 0, SOCKET_ID_ANY);
9540                 if (!sh->geneve_tlv_option_resource) {
9541                         claim_zero(mlx5_devx_cmd_destroy(obj));
9542                         ret = rte_flow_error_set(error, ENOMEM,
9543                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9544                                 "GENEVE TLV object memory allocation failed");
9545                         goto exit;
9546                 }
9547                 geneve_opt_resource = sh->geneve_tlv_option_resource;
9548                 geneve_opt_resource->obj = obj;
9549                 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9550                 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9551                 geneve_opt_resource->length = geneve_opt_v->option_len;
9552                 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9553                                 __ATOMIC_RELAXED);
9554         }
9555 exit:
9556         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9557         return ret;
9558 }
9559
9560 /**
9561  * Add Geneve TLV option item to matcher.
9562  *
9563  * @param[in, out] dev
9564  *   Pointer to rte_eth_dev structure.
9565  * @param[in, out] matcher
9566  *   Flow matcher.
9567  * @param[in, out] key
9568  *   Flow matcher value.
9569  * @param[in] item
9570  *   Flow pattern to translate.
9571  * @param[out] error
9572  *   Pointer to error structure.
9573  */
9574 static int
9575 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9576                                   void *key, const struct rte_flow_item *item,
9577                                   struct rte_flow_error *error)
9578 {
9579         const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9580         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9581         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9582         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9583         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9584                         misc_parameters_3);
9585         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9586         rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9587         int ret = 0;
9588
9589         if (!geneve_opt_v)
9590                 return -1;
9591         if (!geneve_opt_m)
9592                 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9593         ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9594                                                            error);
9595         if (ret) {
9596                 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9597                 return ret;
9598         }
9599         /*
9600          * Set the option length in GENEVE header if not requested.
9601          * The GENEVE TLV option length is expressed by the option length field
9602          * in the GENEVE header.
9603          * If the option length was not requested but the GENEVE TLV option item
9604          * is present we set the option length field implicitly.
9605          */
9606         if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9607                 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9608                          MLX5_GENEVE_OPTLEN_MASK);
9609                 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9610                          geneve_opt_v->option_len + 1);
9611         }
9612         MLX5_SET(fte_match_set_misc, misc_m, geneve_tlv_option_0_exist, 1);
9613         MLX5_SET(fte_match_set_misc, misc_v, geneve_tlv_option_0_exist, 1);
9614         /* Set the data. */
9615         if (geneve_opt_v->data) {
9616                 memcpy(&opt_data_key, geneve_opt_v->data,
9617                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9618                                 sizeof(opt_data_key)));
9619                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9620                                 sizeof(opt_data_key));
9621                 memcpy(&opt_data_mask, geneve_opt_m->data,
9622                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9623                                 sizeof(opt_data_mask)));
9624                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9625                                 sizeof(opt_data_mask));
9626                 MLX5_SET(fte_match_set_misc3, misc3_m,
9627                                 geneve_tlv_option_0_data,
9628                                 rte_be_to_cpu_32(opt_data_mask));
9629                 MLX5_SET(fte_match_set_misc3, misc3_v,
9630                                 geneve_tlv_option_0_data,
9631                         rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9632         }
9633         return ret;
9634 }
9635
9636 /**
9637  * Add MPLS item to matcher and to the value.
9638  *
9639  * @param[in, out] matcher
9640  *   Flow matcher.
9641  * @param[in, out] key
9642  *   Flow matcher value.
9643  * @param[in] item
9644  *   Flow pattern to translate.
9645  * @param[in] prev_layer
9646  *   The protocol layer indicated in previous item.
9647  * @param[in] inner
9648  *   Item is inner pattern.
9649  */
9650 static void
9651 flow_dv_translate_item_mpls(void *matcher, void *key,
9652                             const struct rte_flow_item *item,
9653                             uint64_t prev_layer,
9654                             int inner)
9655 {
9656         const uint32_t *in_mpls_m = item->mask;
9657         const uint32_t *in_mpls_v = item->spec;
9658         uint32_t *out_mpls_m = 0;
9659         uint32_t *out_mpls_v = 0;
9660         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9661         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9662         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9663                                      misc_parameters_2);
9664         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9665         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9666         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9667
9668         switch (prev_layer) {
9669         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9670                 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9671                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
9672                                  0xffff);
9673                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9674                                  MLX5_UDP_PORT_MPLS);
9675                 }
9676                 break;
9677         case MLX5_FLOW_LAYER_GRE:
9678                 /* Fall-through. */
9679         case MLX5_FLOW_LAYER_GRE_KEY:
9680                 if (!MLX5_GET16(fte_match_set_misc, misc_v, gre_protocol)) {
9681                         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
9682                                  0xffff);
9683                         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9684                                  RTE_ETHER_TYPE_MPLS);
9685                 }
9686                 break;
9687         default:
9688                 break;
9689         }
9690         if (!in_mpls_v)
9691                 return;
9692         if (!in_mpls_m)
9693                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9694         switch (prev_layer) {
9695         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9696                 out_mpls_m =
9697                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9698                                                  outer_first_mpls_over_udp);
9699                 out_mpls_v =
9700                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9701                                                  outer_first_mpls_over_udp);
9702                 break;
9703         case MLX5_FLOW_LAYER_GRE:
9704                 out_mpls_m =
9705                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9706                                                  outer_first_mpls_over_gre);
9707                 out_mpls_v =
9708                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9709                                                  outer_first_mpls_over_gre);
9710                 break;
9711         default:
9712                 /* Inner MPLS not over GRE is not supported. */
9713                 if (!inner) {
9714                         out_mpls_m =
9715                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9716                                                          misc2_m,
9717                                                          outer_first_mpls);
9718                         out_mpls_v =
9719                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9720                                                          misc2_v,
9721                                                          outer_first_mpls);
9722                 }
9723                 break;
9724         }
9725         if (out_mpls_m && out_mpls_v) {
9726                 *out_mpls_m = *in_mpls_m;
9727                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9728         }
9729 }
9730
9731 /**
9732  * Add metadata register item to matcher
9733  *
9734  * @param[in, out] matcher
9735  *   Flow matcher.
9736  * @param[in, out] key
9737  *   Flow matcher value.
9738  * @param[in] reg_type
9739  *   Type of device metadata register
9740  * @param[in] value
9741  *   Register value
9742  * @param[in] mask
9743  *   Register mask
9744  */
9745 static void
9746 flow_dv_match_meta_reg(void *matcher, void *key,
9747                        enum modify_reg reg_type,
9748                        uint32_t data, uint32_t mask)
9749 {
9750         void *misc2_m =
9751                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9752         void *misc2_v =
9753                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9754         uint32_t temp;
9755
9756         data &= mask;
9757         switch (reg_type) {
9758         case REG_A:
9759                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9760                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9761                 break;
9762         case REG_B:
9763                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9764                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9765                 break;
9766         case REG_C_0:
9767                 /*
9768                  * The metadata register C0 field might be divided into
9769                  * source vport index and META item value, we should set
9770                  * this field according to specified mask, not as whole one.
9771                  */
9772                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9773                 temp |= mask;
9774                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9775                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9776                 temp &= ~mask;
9777                 temp |= data;
9778                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9779                 break;
9780         case REG_C_1:
9781                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9782                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9783                 break;
9784         case REG_C_2:
9785                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9786                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9787                 break;
9788         case REG_C_3:
9789                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9790                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9791                 break;
9792         case REG_C_4:
9793                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9794                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9795                 break;
9796         case REG_C_5:
9797                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9798                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9799                 break;
9800         case REG_C_6:
9801                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9802                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9803                 break;
9804         case REG_C_7:
9805                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9806                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9807                 break;
9808         default:
9809                 MLX5_ASSERT(false);
9810                 break;
9811         }
9812 }
9813
9814 /**
9815  * Add MARK item to matcher
9816  *
9817  * @param[in] dev
9818  *   The device to configure through.
9819  * @param[in, out] matcher
9820  *   Flow matcher.
9821  * @param[in, out] key
9822  *   Flow matcher value.
9823  * @param[in] item
9824  *   Flow pattern to translate.
9825  */
9826 static void
9827 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9828                             void *matcher, void *key,
9829                             const struct rte_flow_item *item)
9830 {
9831         struct mlx5_priv *priv = dev->data->dev_private;
9832         const struct rte_flow_item_mark *mark;
9833         uint32_t value;
9834         uint32_t mask;
9835
9836         mark = item->mask ? (const void *)item->mask :
9837                             &rte_flow_item_mark_mask;
9838         mask = mark->id & priv->sh->dv_mark_mask;
9839         mark = (const void *)item->spec;
9840         MLX5_ASSERT(mark);
9841         value = mark->id & priv->sh->dv_mark_mask & mask;
9842         if (mask) {
9843                 enum modify_reg reg;
9844
9845                 /* Get the metadata register index for the mark. */
9846                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9847                 MLX5_ASSERT(reg > 0);
9848                 if (reg == REG_C_0) {
9849                         struct mlx5_priv *priv = dev->data->dev_private;
9850                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9851                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9852
9853                         mask &= msk_c0;
9854                         mask <<= shl_c0;
9855                         value <<= shl_c0;
9856                 }
9857                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9858         }
9859 }
9860
9861 /**
9862  * Add META item to matcher
9863  *
9864  * @param[in] dev
9865  *   The devich to configure through.
9866  * @param[in, out] matcher
9867  *   Flow matcher.
9868  * @param[in, out] key
9869  *   Flow matcher value.
9870  * @param[in] attr
9871  *   Attributes of flow that includes this item.
9872  * @param[in] item
9873  *   Flow pattern to translate.
9874  */
9875 static void
9876 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9877                             void *matcher, void *key,
9878                             const struct rte_flow_attr *attr,
9879                             const struct rte_flow_item *item)
9880 {
9881         const struct rte_flow_item_meta *meta_m;
9882         const struct rte_flow_item_meta *meta_v;
9883
9884         meta_m = (const void *)item->mask;
9885         if (!meta_m)
9886                 meta_m = &rte_flow_item_meta_mask;
9887         meta_v = (const void *)item->spec;
9888         if (meta_v) {
9889                 int reg;
9890                 uint32_t value = meta_v->data;
9891                 uint32_t mask = meta_m->data;
9892
9893                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9894                 if (reg < 0)
9895                         return;
9896                 MLX5_ASSERT(reg != REG_NON);
9897                 if (reg == REG_C_0) {
9898                         struct mlx5_priv *priv = dev->data->dev_private;
9899                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9900                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9901
9902                         mask &= msk_c0;
9903                         mask <<= shl_c0;
9904                         value <<= shl_c0;
9905                 }
9906                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9907         }
9908 }
9909
9910 /**
9911  * Add vport metadata Reg C0 item to matcher
9912  *
9913  * @param[in, out] matcher
9914  *   Flow matcher.
9915  * @param[in, out] key
9916  *   Flow matcher value.
9917  * @param[in] reg
9918  *   Flow pattern to translate.
9919  */
9920 static void
9921 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9922                                   uint32_t value, uint32_t mask)
9923 {
9924         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9925 }
9926
9927 /**
9928  * Add tag item to matcher
9929  *
9930  * @param[in] dev
9931  *   The devich to configure through.
9932  * @param[in, out] matcher
9933  *   Flow matcher.
9934  * @param[in, out] key
9935  *   Flow matcher value.
9936  * @param[in] item
9937  *   Flow pattern to translate.
9938  */
9939 static void
9940 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9941                                 void *matcher, void *key,
9942                                 const struct rte_flow_item *item)
9943 {
9944         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9945         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9946         uint32_t mask, value;
9947
9948         MLX5_ASSERT(tag_v);
9949         value = tag_v->data;
9950         mask = tag_m ? tag_m->data : UINT32_MAX;
9951         if (tag_v->id == REG_C_0) {
9952                 struct mlx5_priv *priv = dev->data->dev_private;
9953                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9954                 uint32_t shl_c0 = rte_bsf32(msk_c0);
9955
9956                 mask &= msk_c0;
9957                 mask <<= shl_c0;
9958                 value <<= shl_c0;
9959         }
9960         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9961 }
9962
9963 /**
9964  * Add TAG item to matcher
9965  *
9966  * @param[in] dev
9967  *   The devich to configure through.
9968  * @param[in, out] matcher
9969  *   Flow matcher.
9970  * @param[in, out] key
9971  *   Flow matcher value.
9972  * @param[in] item
9973  *   Flow pattern to translate.
9974  */
9975 static void
9976 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9977                            void *matcher, void *key,
9978                            const struct rte_flow_item *item)
9979 {
9980         const struct rte_flow_item_tag *tag_v = item->spec;
9981         const struct rte_flow_item_tag *tag_m = item->mask;
9982         enum modify_reg reg;
9983
9984         MLX5_ASSERT(tag_v);
9985         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9986         /* Get the metadata register index for the tag. */
9987         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9988         MLX5_ASSERT(reg > 0);
9989         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9990 }
9991
9992 /**
9993  * Add source vport match to the specified matcher.
9994  *
9995  * @param[in, out] matcher
9996  *   Flow matcher.
9997  * @param[in, out] key
9998  *   Flow matcher value.
9999  * @param[in] port
10000  *   Source vport value to match
10001  * @param[in] mask
10002  *   Mask
10003  */
10004 static void
10005 flow_dv_translate_item_source_vport(void *matcher, void *key,
10006                                     int16_t port, uint16_t mask)
10007 {
10008         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10009         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10010
10011         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
10012         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
10013 }
10014
10015 /**
10016  * Translate port-id item to eswitch match on  port-id.
10017  *
10018  * @param[in] dev
10019  *   The devich to configure through.
10020  * @param[in, out] matcher
10021  *   Flow matcher.
10022  * @param[in, out] key
10023  *   Flow matcher value.
10024  * @param[in] item
10025  *   Flow pattern to translate.
10026  * @param[in]
10027  *   Flow attributes.
10028  *
10029  * @return
10030  *   0 on success, a negative errno value otherwise.
10031  */
10032 static int
10033 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
10034                                void *key, const struct rte_flow_item *item,
10035                                const struct rte_flow_attr *attr)
10036 {
10037         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
10038         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
10039         struct mlx5_priv *priv;
10040         uint16_t mask, id;
10041
10042         if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
10043                 flow_dv_translate_item_source_vport(matcher, key,
10044                         flow_dv_get_esw_manager_vport_id(dev), 0xffff);
10045                 return 0;
10046         }
10047         mask = pid_m ? pid_m->id : 0xffff;
10048         id = pid_v ? pid_v->id : dev->data->port_id;
10049         priv = mlx5_port_to_eswitch_info(id, item == NULL);
10050         if (!priv)
10051                 return -rte_errno;
10052         /*
10053          * Translate to vport field or to metadata, depending on mode.
10054          * Kernel can use either misc.source_port or half of C0 metadata
10055          * register.
10056          */
10057         if (priv->vport_meta_mask) {
10058                 /*
10059                  * Provide the hint for SW steering library
10060                  * to insert the flow into ingress domain and
10061                  * save the extra vport match.
10062                  */
10063                 if (mask == 0xffff && priv->vport_id == 0xffff &&
10064                     priv->pf_bond < 0 && attr->transfer)
10065                         flow_dv_translate_item_source_vport
10066                                 (matcher, key, priv->vport_id, mask);
10067                 /*
10068                  * We should always set the vport metadata register,
10069                  * otherwise the SW steering library can drop
10070                  * the rule if wire vport metadata value is not zero,
10071                  * it depends on kernel configuration.
10072                  */
10073                 flow_dv_translate_item_meta_vport(matcher, key,
10074                                                   priv->vport_meta_tag,
10075                                                   priv->vport_meta_mask);
10076         } else {
10077                 flow_dv_translate_item_source_vport(matcher, key,
10078                                                     priv->vport_id, mask);
10079         }
10080         return 0;
10081 }
10082
10083 /**
10084  * Translate represented port item to eswitch match on port id.
10085  *
10086  * @param[in] dev
10087  *   The devich to configure through.
10088  * @param[in, out] matcher
10089  *   Flow matcher.
10090  * @param[in, out] key
10091  *   Flow matcher value.
10092  * @param[in] item
10093  *   Flow pattern to translate.
10094  * @param[in]
10095  *   Flow attributes.
10096  *
10097  * @return
10098  *   0 on success, a negative errno value otherwise.
10099  */
10100 static int
10101 flow_dv_translate_item_represented_port(struct rte_eth_dev *dev, void *matcher,
10102                                         void *key,
10103                                         const struct rte_flow_item *item,
10104                                         const struct rte_flow_attr *attr)
10105 {
10106         const struct rte_flow_item_ethdev *pid_m = item ? item->mask : NULL;
10107         const struct rte_flow_item_ethdev *pid_v = item ? item->spec : NULL;
10108         struct mlx5_priv *priv;
10109         uint16_t mask, id;
10110
10111         if (!pid_m && !pid_v)
10112                 return 0;
10113         if (pid_v && pid_v->port_id == UINT16_MAX) {
10114                 flow_dv_translate_item_source_vport(matcher, key,
10115                         flow_dv_get_esw_manager_vport_id(dev), UINT16_MAX);
10116                 return 0;
10117         }
10118         mask = pid_m ? pid_m->port_id : UINT16_MAX;
10119         id = pid_v ? pid_v->port_id : dev->data->port_id;
10120         priv = mlx5_port_to_eswitch_info(id, item == NULL);
10121         if (!priv)
10122                 return -rte_errno;
10123         /*
10124          * Translate to vport field or to metadata, depending on mode.
10125          * Kernel can use either misc.source_port or half of C0 metadata
10126          * register.
10127          */
10128         if (priv->vport_meta_mask) {
10129                 /*
10130                  * Provide the hint for SW steering library
10131                  * to insert the flow into ingress domain and
10132                  * save the extra vport match.
10133                  */
10134                 if (mask == UINT16_MAX && priv->vport_id == UINT16_MAX &&
10135                     priv->pf_bond < 0 && attr->transfer)
10136                         flow_dv_translate_item_source_vport
10137                                 (matcher, key, priv->vport_id, mask);
10138                 /*
10139                  * We should always set the vport metadata register,
10140                  * otherwise the SW steering library can drop
10141                  * the rule if wire vport metadata value is not zero,
10142                  * it depends on kernel configuration.
10143                  */
10144                 flow_dv_translate_item_meta_vport(matcher, key,
10145                                                   priv->vport_meta_tag,
10146                                                   priv->vport_meta_mask);
10147         } else {
10148                 flow_dv_translate_item_source_vport(matcher, key,
10149                                                     priv->vport_id, mask);
10150         }
10151         return 0;
10152 }
10153
10154 /**
10155  * Add ICMP6 item to matcher and to the value.
10156  *
10157  * @param[in, out] matcher
10158  *   Flow matcher.
10159  * @param[in, out] key
10160  *   Flow matcher value.
10161  * @param[in] item
10162  *   Flow pattern to translate.
10163  * @param[in] inner
10164  *   Item is inner pattern.
10165  */
10166 static void
10167 flow_dv_translate_item_icmp6(void *matcher, void *key,
10168                               const struct rte_flow_item *item,
10169                               int inner)
10170 {
10171         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
10172         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
10173         void *headers_m;
10174         void *headers_v;
10175         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
10176                                      misc_parameters_3);
10177         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
10178         if (inner) {
10179                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
10180                                          inner_headers);
10181                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
10182         } else {
10183                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
10184                                          outer_headers);
10185                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
10186         }
10187         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
10188         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
10189         if (!icmp6_v)
10190                 return;
10191         if (!icmp6_m)
10192                 icmp6_m = &rte_flow_item_icmp6_mask;
10193         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
10194         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
10195                  icmp6_v->type & icmp6_m->type);
10196         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
10197         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
10198                  icmp6_v->code & icmp6_m->code);
10199 }
10200
10201 /**
10202  * Add ICMP item to matcher and to the value.
10203  *
10204  * @param[in, out] matcher
10205  *   Flow matcher.
10206  * @param[in, out] key
10207  *   Flow matcher value.
10208  * @param[in] item
10209  *   Flow pattern to translate.
10210  * @param[in] inner
10211  *   Item is inner pattern.
10212  */
10213 static void
10214 flow_dv_translate_item_icmp(void *matcher, void *key,
10215                             const struct rte_flow_item *item,
10216                             int inner)
10217 {
10218         const struct rte_flow_item_icmp *icmp_m = item->mask;
10219         const struct rte_flow_item_icmp *icmp_v = item->spec;
10220         uint32_t icmp_header_data_m = 0;
10221         uint32_t icmp_header_data_v = 0;
10222         void *headers_m;
10223         void *headers_v;
10224         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
10225                                      misc_parameters_3);
10226         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
10227         if (inner) {
10228                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
10229                                          inner_headers);
10230                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
10231         } else {
10232                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
10233                                          outer_headers);
10234                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
10235         }
10236         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
10237         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
10238         if (!icmp_v)
10239                 return;
10240         if (!icmp_m)
10241                 icmp_m = &rte_flow_item_icmp_mask;
10242         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
10243                  icmp_m->hdr.icmp_type);
10244         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
10245                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
10246         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
10247                  icmp_m->hdr.icmp_code);
10248         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
10249                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
10250         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
10251         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
10252         if (icmp_header_data_m) {
10253                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
10254                 icmp_header_data_v |=
10255                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
10256                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
10257                          icmp_header_data_m);
10258                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
10259                          icmp_header_data_v & icmp_header_data_m);
10260         }
10261 }
10262
10263 /**
10264  * Add GTP item to matcher and to the value.
10265  *
10266  * @param[in, out] matcher
10267  *   Flow matcher.
10268  * @param[in, out] key
10269  *   Flow matcher value.
10270  * @param[in] item
10271  *   Flow pattern to translate.
10272  * @param[in] inner
10273  *   Item is inner pattern.
10274  */
10275 static void
10276 flow_dv_translate_item_gtp(void *matcher, void *key,
10277                            const struct rte_flow_item *item, int inner)
10278 {
10279         const struct rte_flow_item_gtp *gtp_m = item->mask;
10280         const struct rte_flow_item_gtp *gtp_v = item->spec;
10281         void *headers_m;
10282         void *headers_v;
10283         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
10284                                      misc_parameters_3);
10285         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
10286         uint16_t dport = RTE_GTPU_UDP_PORT;
10287
10288         if (inner) {
10289                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
10290                                          inner_headers);
10291                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
10292         } else {
10293                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
10294                                          outer_headers);
10295                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
10296         }
10297         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
10298                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
10299                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
10300         }
10301         if (!gtp_v)
10302                 return;
10303         if (!gtp_m)
10304                 gtp_m = &rte_flow_item_gtp_mask;
10305         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
10306                  gtp_m->v_pt_rsv_flags);
10307         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
10308                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
10309         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
10310         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
10311                  gtp_v->msg_type & gtp_m->msg_type);
10312         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
10313                  rte_be_to_cpu_32(gtp_m->teid));
10314         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
10315                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
10316 }
10317
10318 /**
10319  * Add GTP PSC item to matcher.
10320  *
10321  * @param[in, out] matcher
10322  *   Flow matcher.
10323  * @param[in, out] key
10324  *   Flow matcher value.
10325  * @param[in] item
10326  *   Flow pattern to translate.
10327  */
10328 static int
10329 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
10330                                const struct rte_flow_item *item)
10331 {
10332         const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
10333         const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
10334         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
10335                         misc_parameters_3);
10336         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
10337         union {
10338                 uint32_t w32;
10339                 struct {
10340                         uint16_t seq_num;
10341                         uint8_t npdu_num;
10342                         uint8_t next_ext_header_type;
10343                 };
10344         } dw_2;
10345         uint8_t gtp_flags;
10346
10347         /* Always set E-flag match on one, regardless of GTP item settings. */
10348         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
10349         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
10350         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
10351         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
10352         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
10353         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
10354         /*Set next extension header type. */
10355         dw_2.seq_num = 0;
10356         dw_2.npdu_num = 0;
10357         dw_2.next_ext_header_type = 0xff;
10358         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
10359                  rte_cpu_to_be_32(dw_2.w32));
10360         dw_2.seq_num = 0;
10361         dw_2.npdu_num = 0;
10362         dw_2.next_ext_header_type = 0x85;
10363         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
10364                  rte_cpu_to_be_32(dw_2.w32));
10365         if (gtp_psc_v) {
10366                 union {
10367                         uint32_t w32;
10368                         struct {
10369                                 uint8_t len;
10370                                 uint8_t type_flags;
10371                                 uint8_t qfi;
10372                                 uint8_t reserved;
10373                         };
10374                 } dw_0;
10375
10376                 /*Set extension header PDU type and Qos. */
10377                 if (!gtp_psc_m)
10378                         gtp_psc_m = &rte_flow_item_gtp_psc_mask;
10379                 dw_0.w32 = 0;
10380                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->hdr.type);
10381                 dw_0.qfi = gtp_psc_m->hdr.qfi;
10382                 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
10383                          rte_cpu_to_be_32(dw_0.w32));
10384                 dw_0.w32 = 0;
10385                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->hdr.type &
10386                                                         gtp_psc_m->hdr.type);
10387                 dw_0.qfi = gtp_psc_v->hdr.qfi & gtp_psc_m->hdr.qfi;
10388                 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
10389                          rte_cpu_to_be_32(dw_0.w32));
10390         }
10391         return 0;
10392 }
10393
10394 /**
10395  * Add eCPRI item to matcher and to the value.
10396  *
10397  * @param[in] dev
10398  *   The devich to configure through.
10399  * @param[in, out] matcher
10400  *   Flow matcher.
10401  * @param[in, out] key
10402  *   Flow matcher value.
10403  * @param[in] item
10404  *   Flow pattern to translate.
10405  * @param[in] last_item
10406  *   Last item flags.
10407  */
10408 static void
10409 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
10410                              void *key, const struct rte_flow_item *item,
10411                              uint64_t last_item)
10412 {
10413         struct mlx5_priv *priv = dev->data->dev_private;
10414         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
10415         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
10416         struct rte_ecpri_common_hdr common;
10417         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
10418                                      misc_parameters_4);
10419         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
10420         uint32_t *samples;
10421         void *dw_m;
10422         void *dw_v;
10423
10424         /*
10425          * In case of eCPRI over Ethernet, if EtherType is not specified,
10426          * match on eCPRI EtherType implicitly.
10427          */
10428         if (last_item & MLX5_FLOW_LAYER_OUTER_L2) {
10429                 void *hdrs_m, *hdrs_v, *l2m, *l2v;
10430
10431                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
10432                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
10433                 l2m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, ethertype);
10434                 l2v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
10435                 if (*(uint16_t *)l2m == 0 && *(uint16_t *)l2v == 0) {
10436                         *(uint16_t *)l2m = UINT16_MAX;
10437                         *(uint16_t *)l2v = RTE_BE16(RTE_ETHER_TYPE_ECPRI);
10438                 }
10439         }
10440         if (!ecpri_v)
10441                 return;
10442         if (!ecpri_m)
10443                 ecpri_m = &rte_flow_item_ecpri_mask;
10444         /*
10445          * Maximal four DW samples are supported in a single matching now.
10446          * Two are used now for a eCPRI matching:
10447          * 1. Type: one byte, mask should be 0x00ff0000 in network order
10448          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
10449          *    if any.
10450          */
10451         if (!ecpri_m->hdr.common.u32)
10452                 return;
10453         samples = priv->sh->ecpri_parser.ids;
10454         /* Need to take the whole DW as the mask to fill the entry. */
10455         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10456                             prog_sample_field_value_0);
10457         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10458                             prog_sample_field_value_0);
10459         /* Already big endian (network order) in the header. */
10460         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
10461         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
10462         /* Sample#0, used for matching type, offset 0. */
10463         MLX5_SET(fte_match_set_misc4, misc4_m,
10464                  prog_sample_field_id_0, samples[0]);
10465         /* It makes no sense to set the sample ID in the mask field. */
10466         MLX5_SET(fte_match_set_misc4, misc4_v,
10467                  prog_sample_field_id_0, samples[0]);
10468         /*
10469          * Checking if message body part needs to be matched.
10470          * Some wildcard rules only matching type field should be supported.
10471          */
10472         if (ecpri_m->hdr.dummy[0]) {
10473                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
10474                 switch (common.type) {
10475                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
10476                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
10477                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
10478                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10479                                             prog_sample_field_value_1);
10480                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10481                                             prog_sample_field_value_1);
10482                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
10483                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
10484                                             ecpri_m->hdr.dummy[0];
10485                         /* Sample#1, to match message body, offset 4. */
10486                         MLX5_SET(fte_match_set_misc4, misc4_m,
10487                                  prog_sample_field_id_1, samples[1]);
10488                         MLX5_SET(fte_match_set_misc4, misc4_v,
10489                                  prog_sample_field_id_1, samples[1]);
10490                         break;
10491                 default:
10492                         /* Others, do not match any sample ID. */
10493                         break;
10494                 }
10495         }
10496 }
10497
10498 /*
10499  * Add connection tracking status item to matcher
10500  *
10501  * @param[in] dev
10502  *   The devich to configure through.
10503  * @param[in, out] matcher
10504  *   Flow matcher.
10505  * @param[in, out] key
10506  *   Flow matcher value.
10507  * @param[in] item
10508  *   Flow pattern to translate.
10509  */
10510 static void
10511 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
10512                               void *matcher, void *key,
10513                               const struct rte_flow_item *item)
10514 {
10515         uint32_t reg_value = 0;
10516         int reg_id;
10517         /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10518         uint32_t reg_mask = 0;
10519         const struct rte_flow_item_conntrack *spec = item->spec;
10520         const struct rte_flow_item_conntrack *mask = item->mask;
10521         uint32_t flags;
10522         struct rte_flow_error error;
10523
10524         if (!mask)
10525                 mask = &rte_flow_item_conntrack_mask;
10526         if (!spec || !mask->flags)
10527                 return;
10528         flags = spec->flags & mask->flags;
10529         /* The conflict should be checked in the validation. */
10530         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10531                 reg_value |= MLX5_CT_SYNDROME_VALID;
10532         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10533                 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10534         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10535                 reg_value |= MLX5_CT_SYNDROME_INVALID;
10536         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10537                 reg_value |= MLX5_CT_SYNDROME_TRAP;
10538         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10539                 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10540         if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10541                            RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10542                            RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10543                 reg_mask |= 0xc0;
10544         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10545                 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10546         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10547                 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10548         /* The REG_C_x value could be saved during startup. */
10549         reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10550         if (reg_id == REG_NON)
10551                 return;
10552         flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10553                                reg_value, reg_mask);
10554 }
10555
10556 static void
10557 flow_dv_translate_item_flex(struct rte_eth_dev *dev, void *matcher, void *key,
10558                             const struct rte_flow_item *item,
10559                             struct mlx5_flow *dev_flow, bool is_inner)
10560 {
10561         const struct rte_flow_item_flex *spec =
10562                 (const struct rte_flow_item_flex *)item->spec;
10563         int index = mlx5_flex_acquire_index(dev, spec->handle, false);
10564
10565         MLX5_ASSERT(index >= 0 && index <= (int)(sizeof(uint32_t) * CHAR_BIT));
10566         if (index < 0)
10567                 return;
10568         if (!(dev_flow->handle->flex_item & RTE_BIT32(index))) {
10569                 /* Don't count both inner and outer flex items in one rule. */
10570                 if (mlx5_flex_acquire_index(dev, spec->handle, true) != index)
10571                         MLX5_ASSERT(false);
10572                 dev_flow->handle->flex_item |= (uint8_t)RTE_BIT32(index);
10573         }
10574         mlx5_flex_flow_translate_item(dev, matcher, key, item, is_inner);
10575 }
10576
10577 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10578
10579 #define HEADER_IS_ZERO(match_criteria, headers)                              \
10580         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
10581                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10582
10583 /**
10584  * Calculate flow matcher enable bitmap.
10585  *
10586  * @param match_criteria
10587  *   Pointer to flow matcher criteria.
10588  *
10589  * @return
10590  *   Bitmap of enabled fields.
10591  */
10592 static uint8_t
10593 flow_dv_matcher_enable(uint32_t *match_criteria)
10594 {
10595         uint8_t match_criteria_enable;
10596
10597         match_criteria_enable =
10598                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10599                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10600         match_criteria_enable |=
10601                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10602                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10603         match_criteria_enable |=
10604                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10605                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10606         match_criteria_enable |=
10607                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10608                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10609         match_criteria_enable |=
10610                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10611                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10612         match_criteria_enable |=
10613                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10614                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10615         match_criteria_enable |=
10616                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10617                 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10618         return match_criteria_enable;
10619 }
10620
10621 static void
10622 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10623 {
10624         /*
10625          * Check flow matching criteria first, subtract misc5/4 length if flow
10626          * doesn't own misc5/4 parameters. In some old rdma-core releases,
10627          * misc5/4 are not supported, and matcher creation failure is expected
10628          * w/o subtraction. If misc5 is provided, misc4 must be counted in since
10629          * misc5 is right after misc4.
10630          */
10631         if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10632                 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10633                         MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10634                 if (!(match_criteria & (1 <<
10635                         MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10636                         *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10637                 }
10638         }
10639 }
10640
10641 static struct mlx5_list_entry *
10642 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10643                          struct mlx5_list_entry *entry, void *cb_ctx)
10644 {
10645         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10646         struct mlx5_flow_dv_matcher *ref = ctx->data;
10647         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10648                                                             typeof(*tbl), tbl);
10649         struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10650                                                             sizeof(*resource),
10651                                                             0, SOCKET_ID_ANY);
10652
10653         if (!resource) {
10654                 rte_flow_error_set(ctx->error, ENOMEM,
10655                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10656                                    "cannot create matcher");
10657                 return NULL;
10658         }
10659         memcpy(resource, entry, sizeof(*resource));
10660         resource->tbl = &tbl->tbl;
10661         return &resource->entry;
10662 }
10663
10664 static void
10665 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10666                              struct mlx5_list_entry *entry)
10667 {
10668         mlx5_free(entry);
10669 }
10670
10671 struct mlx5_list_entry *
10672 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10673 {
10674         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10675         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10676         struct rte_eth_dev *dev = ctx->dev;
10677         struct mlx5_flow_tbl_data_entry *tbl_data;
10678         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10679         struct rte_flow_error *error = ctx->error;
10680         union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10681         struct mlx5_flow_tbl_resource *tbl;
10682         void *domain;
10683         uint32_t idx = 0;
10684         int ret;
10685
10686         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10687         if (!tbl_data) {
10688                 rte_flow_error_set(error, ENOMEM,
10689                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10690                                    NULL,
10691                                    "cannot allocate flow table data entry");
10692                 return NULL;
10693         }
10694         tbl_data->idx = idx;
10695         tbl_data->tunnel = tt_prm->tunnel;
10696         tbl_data->group_id = tt_prm->group_id;
10697         tbl_data->external = !!tt_prm->external;
10698         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10699         tbl_data->is_egress = !!key.is_egress;
10700         tbl_data->is_transfer = !!key.is_fdb;
10701         tbl_data->dummy = !!key.dummy;
10702         tbl_data->level = key.level;
10703         tbl_data->id = key.id;
10704         tbl = &tbl_data->tbl;
10705         if (key.dummy)
10706                 return &tbl_data->entry;
10707         if (key.is_fdb)
10708                 domain = sh->fdb_domain;
10709         else if (key.is_egress)
10710                 domain = sh->tx_domain;
10711         else
10712                 domain = sh->rx_domain;
10713         ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10714         if (ret) {
10715                 rte_flow_error_set(error, ENOMEM,
10716                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10717                                    NULL, "cannot create flow table object");
10718                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10719                 return NULL;
10720         }
10721         if (key.level != 0) {
10722                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10723                                         (tbl->obj, &tbl_data->jump.action);
10724                 if (ret) {
10725                         rte_flow_error_set(error, ENOMEM,
10726                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10727                                            NULL,
10728                                            "cannot create flow jump action");
10729                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10730                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10731                         return NULL;
10732                 }
10733         }
10734         MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10735               key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10736               key.level, key.id);
10737         tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10738                                               flow_dv_matcher_create_cb,
10739                                               flow_dv_matcher_match_cb,
10740                                               flow_dv_matcher_remove_cb,
10741                                               flow_dv_matcher_clone_cb,
10742                                               flow_dv_matcher_clone_free_cb);
10743         if (!tbl_data->matchers) {
10744                 rte_flow_error_set(error, ENOMEM,
10745                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10746                                    NULL,
10747                                    "cannot create tbl matcher list");
10748                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10749                 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10750                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10751                 return NULL;
10752         }
10753         return &tbl_data->entry;
10754 }
10755
10756 int
10757 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10758                      void *cb_ctx)
10759 {
10760         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10761         struct mlx5_flow_tbl_data_entry *tbl_data =
10762                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10763         union mlx5_flow_tbl_key key = { .v64 =  *(uint64_t *)(ctx->data) };
10764
10765         return tbl_data->level != key.level ||
10766                tbl_data->id != key.id ||
10767                tbl_data->dummy != key.dummy ||
10768                tbl_data->is_transfer != !!key.is_fdb ||
10769                tbl_data->is_egress != !!key.is_egress;
10770 }
10771
10772 struct mlx5_list_entry *
10773 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10774                       void *cb_ctx)
10775 {
10776         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10777         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10778         struct mlx5_flow_tbl_data_entry *tbl_data;
10779         struct rte_flow_error *error = ctx->error;
10780         uint32_t idx = 0;
10781
10782         tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10783         if (!tbl_data) {
10784                 rte_flow_error_set(error, ENOMEM,
10785                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10786                                    NULL,
10787                                    "cannot allocate flow table data entry");
10788                 return NULL;
10789         }
10790         memcpy(tbl_data, oentry, sizeof(*tbl_data));
10791         tbl_data->idx = idx;
10792         return &tbl_data->entry;
10793 }
10794
10795 void
10796 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10797 {
10798         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10799         struct mlx5_flow_tbl_data_entry *tbl_data =
10800                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10801
10802         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10803 }
10804
10805 /**
10806  * Get a flow table.
10807  *
10808  * @param[in, out] dev
10809  *   Pointer to rte_eth_dev structure.
10810  * @param[in] table_level
10811  *   Table level to use.
10812  * @param[in] egress
10813  *   Direction of the table.
10814  * @param[in] transfer
10815  *   E-Switch or NIC flow.
10816  * @param[in] dummy
10817  *   Dummy entry for dv API.
10818  * @param[in] table_id
10819  *   Table id to use.
10820  * @param[out] error
10821  *   pointer to error structure.
10822  *
10823  * @return
10824  *   Returns tables resource based on the index, NULL in case of failed.
10825  */
10826 struct mlx5_flow_tbl_resource *
10827 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10828                          uint32_t table_level, uint8_t egress,
10829                          uint8_t transfer,
10830                          bool external,
10831                          const struct mlx5_flow_tunnel *tunnel,
10832                          uint32_t group_id, uint8_t dummy,
10833                          uint32_t table_id,
10834                          struct rte_flow_error *error)
10835 {
10836         struct mlx5_priv *priv = dev->data->dev_private;
10837         union mlx5_flow_tbl_key table_key = {
10838                 {
10839                         .level = table_level,
10840                         .id = table_id,
10841                         .reserved = 0,
10842                         .dummy = !!dummy,
10843                         .is_fdb = !!transfer,
10844                         .is_egress = !!egress,
10845                 }
10846         };
10847         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10848                 .tunnel = tunnel,
10849                 .group_id = group_id,
10850                 .external = external,
10851         };
10852         struct mlx5_flow_cb_ctx ctx = {
10853                 .dev = dev,
10854                 .error = error,
10855                 .data = &table_key.v64,
10856                 .data2 = &tt_prm,
10857         };
10858         struct mlx5_list_entry *entry;
10859         struct mlx5_flow_tbl_data_entry *tbl_data;
10860
10861         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10862         if (!entry) {
10863                 rte_flow_error_set(error, ENOMEM,
10864                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10865                                    "cannot get table");
10866                 return NULL;
10867         }
10868         DRV_LOG(DEBUG, "table_level %u table_id %u "
10869                 "tunnel %u group %u registered.",
10870                 table_level, table_id,
10871                 tunnel ? tunnel->tunnel_id : 0, group_id);
10872         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10873         return &tbl_data->tbl;
10874 }
10875
10876 void
10877 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10878 {
10879         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10880         struct mlx5_flow_tbl_data_entry *tbl_data =
10881                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10882
10883         MLX5_ASSERT(entry && sh);
10884         if (tbl_data->jump.action)
10885                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10886         if (tbl_data->tbl.obj)
10887                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10888         if (tbl_data->tunnel_offload && tbl_data->external) {
10889                 struct mlx5_list_entry *he;
10890                 struct mlx5_hlist *tunnel_grp_hash;
10891                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10892                 union tunnel_tbl_key tunnel_key = {
10893                         .tunnel_id = tbl_data->tunnel ?
10894                                         tbl_data->tunnel->tunnel_id : 0,
10895                         .group = tbl_data->group_id
10896                 };
10897                 uint32_t table_level = tbl_data->level;
10898                 struct mlx5_flow_cb_ctx ctx = {
10899                         .data = (void *)&tunnel_key.val,
10900                 };
10901
10902                 tunnel_grp_hash = tbl_data->tunnel ?
10903                                         tbl_data->tunnel->groups :
10904                                         thub->groups;
10905                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10906                 if (he)
10907                         mlx5_hlist_unregister(tunnel_grp_hash, he);
10908                 DRV_LOG(DEBUG,
10909                         "table_level %u id %u tunnel %u group %u released.",
10910                         table_level,
10911                         tbl_data->id,
10912                         tbl_data->tunnel ?
10913                         tbl_data->tunnel->tunnel_id : 0,
10914                         tbl_data->group_id);
10915         }
10916         if (tbl_data->matchers)
10917                 mlx5_list_destroy(tbl_data->matchers);
10918         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10919 }
10920
10921 /**
10922  * Release a flow table.
10923  *
10924  * @param[in] sh
10925  *   Pointer to device shared structure.
10926  * @param[in] tbl
10927  *   Table resource to be released.
10928  *
10929  * @return
10930  *   Returns 0 if table was released, else return 1;
10931  */
10932 static int
10933 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10934                              struct mlx5_flow_tbl_resource *tbl)
10935 {
10936         struct mlx5_flow_tbl_data_entry *tbl_data =
10937                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10938
10939         if (!tbl)
10940                 return 0;
10941         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10942 }
10943
10944 int
10945 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10946                          struct mlx5_list_entry *entry, void *cb_ctx)
10947 {
10948         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10949         struct mlx5_flow_dv_matcher *ref = ctx->data;
10950         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10951                                                         entry);
10952
10953         return cur->crc != ref->crc ||
10954                cur->priority != ref->priority ||
10955                memcmp((const void *)cur->mask.buf,
10956                       (const void *)ref->mask.buf, ref->mask.size);
10957 }
10958
10959 struct mlx5_list_entry *
10960 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10961 {
10962         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10963         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10964         struct mlx5_flow_dv_matcher *ref = ctx->data;
10965         struct mlx5_flow_dv_matcher *resource;
10966         struct mlx5dv_flow_matcher_attr dv_attr = {
10967                 .type = IBV_FLOW_ATTR_NORMAL,
10968                 .match_mask = (void *)&ref->mask,
10969         };
10970         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10971                                                             typeof(*tbl), tbl);
10972         int ret;
10973
10974         resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10975                                SOCKET_ID_ANY);
10976         if (!resource) {
10977                 rte_flow_error_set(ctx->error, ENOMEM,
10978                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10979                                    "cannot create matcher");
10980                 return NULL;
10981         }
10982         *resource = *ref;
10983         dv_attr.match_criteria_enable =
10984                 flow_dv_matcher_enable(resource->mask.buf);
10985         __flow_dv_adjust_buf_size(&ref->mask.size,
10986                                   dv_attr.match_criteria_enable);
10987         dv_attr.priority = ref->priority;
10988         if (tbl->is_egress)
10989                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10990         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
10991                                                tbl->tbl.obj,
10992                                                &resource->matcher_object);
10993         if (ret) {
10994                 mlx5_free(resource);
10995                 rte_flow_error_set(ctx->error, ENOMEM,
10996                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10997                                    "cannot create matcher");
10998                 return NULL;
10999         }
11000         return &resource->entry;
11001 }
11002
11003 /**
11004  * Register the flow matcher.
11005  *
11006  * @param[in, out] dev
11007  *   Pointer to rte_eth_dev structure.
11008  * @param[in, out] matcher
11009  *   Pointer to flow matcher.
11010  * @param[in, out] key
11011  *   Pointer to flow table key.
11012  * @parm[in, out] dev_flow
11013  *   Pointer to the dev_flow.
11014  * @param[out] error
11015  *   pointer to error structure.
11016  *
11017  * @return
11018  *   0 on success otherwise -errno and errno is set.
11019  */
11020 static int
11021 flow_dv_matcher_register(struct rte_eth_dev *dev,
11022                          struct mlx5_flow_dv_matcher *ref,
11023                          union mlx5_flow_tbl_key *key,
11024                          struct mlx5_flow *dev_flow,
11025                          const struct mlx5_flow_tunnel *tunnel,
11026                          uint32_t group_id,
11027                          struct rte_flow_error *error)
11028 {
11029         struct mlx5_list_entry *entry;
11030         struct mlx5_flow_dv_matcher *resource;
11031         struct mlx5_flow_tbl_resource *tbl;
11032         struct mlx5_flow_tbl_data_entry *tbl_data;
11033         struct mlx5_flow_cb_ctx ctx = {
11034                 .error = error,
11035                 .data = ref,
11036         };
11037         /**
11038          * tunnel offload API requires this registration for cases when
11039          * tunnel match rule was inserted before tunnel set rule.
11040          */
11041         tbl = flow_dv_tbl_resource_get(dev, key->level,
11042                                        key->is_egress, key->is_fdb,
11043                                        dev_flow->external, tunnel,
11044                                        group_id, 0, key->id, error);
11045         if (!tbl)
11046                 return -rte_errno;      /* No need to refill the error info */
11047         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
11048         ref->tbl = tbl;
11049         entry = mlx5_list_register(tbl_data->matchers, &ctx);
11050         if (!entry) {
11051                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
11052                 return rte_flow_error_set(error, ENOMEM,
11053                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
11054                                           "cannot allocate ref memory");
11055         }
11056         resource = container_of(entry, typeof(*resource), entry);
11057         dev_flow->handle->dvh.matcher = resource;
11058         return 0;
11059 }
11060
11061 struct mlx5_list_entry *
11062 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
11063 {
11064         struct mlx5_dev_ctx_shared *sh = tool_ctx;
11065         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11066         struct mlx5_flow_dv_tag_resource *entry;
11067         uint32_t idx = 0;
11068         int ret;
11069
11070         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
11071         if (!entry) {
11072                 rte_flow_error_set(ctx->error, ENOMEM,
11073                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
11074                                    "cannot allocate resource memory");
11075                 return NULL;
11076         }
11077         entry->idx = idx;
11078         entry->tag_id = *(uint32_t *)(ctx->data);
11079         ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
11080                                                   &entry->action);
11081         if (ret) {
11082                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
11083                 rte_flow_error_set(ctx->error, ENOMEM,
11084                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11085                                    NULL, "cannot create action");
11086                 return NULL;
11087         }
11088         return &entry->entry;
11089 }
11090
11091 int
11092 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
11093                      void *cb_ctx)
11094 {
11095         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11096         struct mlx5_flow_dv_tag_resource *tag =
11097                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
11098
11099         return *(uint32_t *)(ctx->data) != tag->tag_id;
11100 }
11101
11102 struct mlx5_list_entry *
11103 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
11104                      void *cb_ctx)
11105 {
11106         struct mlx5_dev_ctx_shared *sh = tool_ctx;
11107         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11108         struct mlx5_flow_dv_tag_resource *entry;
11109         uint32_t idx = 0;
11110
11111         entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
11112         if (!entry) {
11113                 rte_flow_error_set(ctx->error, ENOMEM,
11114                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
11115                                    "cannot allocate tag resource memory");
11116                 return NULL;
11117         }
11118         memcpy(entry, oentry, sizeof(*entry));
11119         entry->idx = idx;
11120         return &entry->entry;
11121 }
11122
11123 void
11124 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
11125 {
11126         struct mlx5_dev_ctx_shared *sh = tool_ctx;
11127         struct mlx5_flow_dv_tag_resource *tag =
11128                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
11129
11130         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
11131 }
11132
11133 /**
11134  * Find existing tag resource or create and register a new one.
11135  *
11136  * @param dev[in, out]
11137  *   Pointer to rte_eth_dev structure.
11138  * @param[in, out] tag_be24
11139  *   Tag value in big endian then R-shift 8.
11140  * @parm[in, out] dev_flow
11141  *   Pointer to the dev_flow.
11142  * @param[out] error
11143  *   pointer to error structure.
11144  *
11145  * @return
11146  *   0 on success otherwise -errno and errno is set.
11147  */
11148 static int
11149 flow_dv_tag_resource_register
11150                         (struct rte_eth_dev *dev,
11151                          uint32_t tag_be24,
11152                          struct mlx5_flow *dev_flow,
11153                          struct rte_flow_error *error)
11154 {
11155         struct mlx5_priv *priv = dev->data->dev_private;
11156         struct mlx5_flow_dv_tag_resource *resource;
11157         struct mlx5_list_entry *entry;
11158         struct mlx5_flow_cb_ctx ctx = {
11159                                         .error = error,
11160                                         .data = &tag_be24,
11161                                         };
11162         struct mlx5_hlist *tag_table;
11163
11164         tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
11165                                       "tags",
11166                                       MLX5_TAGS_HLIST_ARRAY_SIZE,
11167                                       false, false, priv->sh,
11168                                       flow_dv_tag_create_cb,
11169                                       flow_dv_tag_match_cb,
11170                                       flow_dv_tag_remove_cb,
11171                                       flow_dv_tag_clone_cb,
11172                                       flow_dv_tag_clone_free_cb,
11173                                       error);
11174         if (unlikely(!tag_table))
11175                 return -rte_errno;
11176         entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
11177         if (entry) {
11178                 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
11179                                         entry);
11180                 dev_flow->handle->dvh.rix_tag = resource->idx;
11181                 dev_flow->dv.tag_resource = resource;
11182                 return 0;
11183         }
11184         return -rte_errno;
11185 }
11186
11187 void
11188 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
11189 {
11190         struct mlx5_dev_ctx_shared *sh = tool_ctx;
11191         struct mlx5_flow_dv_tag_resource *tag =
11192                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
11193
11194         MLX5_ASSERT(tag && sh && tag->action);
11195         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
11196         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
11197         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
11198 }
11199
11200 /**
11201  * Release the tag.
11202  *
11203  * @param dev
11204  *   Pointer to Ethernet device.
11205  * @param tag_idx
11206  *   Tag index.
11207  *
11208  * @return
11209  *   1 while a reference on it exists, 0 when freed.
11210  */
11211 static int
11212 flow_dv_tag_release(struct rte_eth_dev *dev,
11213                     uint32_t tag_idx)
11214 {
11215         struct mlx5_priv *priv = dev->data->dev_private;
11216         struct mlx5_flow_dv_tag_resource *tag;
11217
11218         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
11219         if (!tag)
11220                 return 0;
11221         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
11222                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
11223         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
11224 }
11225
11226 /**
11227  * Translate action PORT_ID / REPRESENTED_PORT to vport.
11228  *
11229  * @param[in] dev
11230  *   Pointer to rte_eth_dev structure.
11231  * @param[in] action
11232  *   Pointer to action PORT_ID / REPRESENTED_PORT.
11233  * @param[out] dst_port_id
11234  *   The target port ID.
11235  * @param[out] error
11236  *   Pointer to the error structure.
11237  *
11238  * @return
11239  *   0 on success, a negative errno value otherwise and rte_errno is set.
11240  */
11241 static int
11242 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
11243                                  const struct rte_flow_action *action,
11244                                  uint32_t *dst_port_id,
11245                                  struct rte_flow_error *error)
11246 {
11247         uint32_t port;
11248         struct mlx5_priv *priv;
11249
11250         switch (action->type) {
11251         case RTE_FLOW_ACTION_TYPE_PORT_ID: {
11252                 const struct rte_flow_action_port_id *conf;
11253
11254                 conf = (const struct rte_flow_action_port_id *)action->conf;
11255                 port = conf->original ? dev->data->port_id : conf->id;
11256                 break;
11257         }
11258         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: {
11259                 const struct rte_flow_action_ethdev *ethdev;
11260
11261                 ethdev = (const struct rte_flow_action_ethdev *)action->conf;
11262                 port = ethdev->port_id;
11263                 break;
11264         }
11265         default:
11266                 MLX5_ASSERT(false);
11267                 return rte_flow_error_set(error, EINVAL,
11268                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
11269                                           "unknown E-Switch action");
11270         }
11271
11272         priv = mlx5_port_to_eswitch_info(port, false);
11273         if (!priv)
11274                 return rte_flow_error_set(error, -rte_errno,
11275                                           RTE_FLOW_ERROR_TYPE_ACTION,
11276                                           NULL,
11277                                           "No eswitch info was found for port");
11278 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
11279         /*
11280          * This parameter is transferred to
11281          * mlx5dv_dr_action_create_dest_ib_port().
11282          */
11283         *dst_port_id = priv->dev_port;
11284 #else
11285         /*
11286          * Legacy mode, no LAG configurations is supported.
11287          * This parameter is transferred to
11288          * mlx5dv_dr_action_create_dest_vport().
11289          */
11290         *dst_port_id = priv->vport_id;
11291 #endif
11292         return 0;
11293 }
11294
11295 /**
11296  * Create a counter with aging configuration.
11297  *
11298  * @param[in] dev
11299  *   Pointer to rte_eth_dev structure.
11300  * @param[in] dev_flow
11301  *   Pointer to the mlx5_flow.
11302  * @param[out] count
11303  *   Pointer to the counter action configuration.
11304  * @param[in] age
11305  *   Pointer to the aging action configuration.
11306  *
11307  * @return
11308  *   Index to flow counter on success, 0 otherwise.
11309  */
11310 static uint32_t
11311 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
11312                                 struct mlx5_flow *dev_flow,
11313                                 const struct rte_flow_action_count *count
11314                                         __rte_unused,
11315                                 const struct rte_flow_action_age *age)
11316 {
11317         uint32_t counter;
11318         struct mlx5_age_param *age_param;
11319
11320         counter = flow_dv_counter_alloc(dev, !!age);
11321         if (!counter || age == NULL)
11322                 return counter;
11323         age_param = flow_dv_counter_idx_get_age(dev, counter);
11324         age_param->context = age->context ? age->context :
11325                 (void *)(uintptr_t)(dev_flow->flow_idx);
11326         age_param->timeout = age->timeout;
11327         age_param->port_id = dev->data->port_id;
11328         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
11329         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
11330         return counter;
11331 }
11332
11333 /**
11334  * Add Tx queue matcher
11335  *
11336  * @param[in] dev
11337  *   Pointer to the dev struct.
11338  * @param[in, out] matcher
11339  *   Flow matcher.
11340  * @param[in, out] key
11341  *   Flow matcher value.
11342  * @param[in] item
11343  *   Flow pattern to translate.
11344  * @param[in] inner
11345  *   Item is inner pattern.
11346  */
11347 static void
11348 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
11349                                 void *matcher, void *key,
11350                                 const struct rte_flow_item *item)
11351 {
11352         const struct mlx5_rte_flow_item_tx_queue *queue_m;
11353         const struct mlx5_rte_flow_item_tx_queue *queue_v;
11354         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
11355         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
11356         struct mlx5_txq_ctrl *txq;
11357         uint32_t queue, mask;
11358
11359         queue_m = (const void *)item->mask;
11360         queue_v = (const void *)item->spec;
11361         if (!queue_v)
11362                 return;
11363         txq = mlx5_txq_get(dev, queue_v->queue);
11364         if (!txq)
11365                 return;
11366         if (txq->is_hairpin)
11367                 queue = txq->obj->sq->id;
11368         else
11369                 queue = txq->obj->sq_obj.sq->id;
11370         mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
11371         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
11372         MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
11373         mlx5_txq_release(dev, queue_v->queue);
11374 }
11375
11376 /**
11377  * Set the hash fields according to the @p flow information.
11378  *
11379  * @param[in] item_flags
11380  *   The match pattern item flags.
11381  * @param[in] rss_desc
11382  *   Pointer to the mlx5_flow_rss_desc.
11383  * @param[out] hash_fields
11384  *   Pointer to the RSS hash fields.
11385  */
11386 void
11387 flow_dv_hashfields_set(uint64_t item_flags,
11388                        struct mlx5_flow_rss_desc *rss_desc,
11389                        uint64_t *hash_fields)
11390 {
11391         uint64_t items = item_flags;
11392         uint64_t fields = 0;
11393         int rss_inner = 0;
11394         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
11395
11396         *hash_fields = 0;
11397 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
11398         if (rss_desc->level >= 2)
11399                 rss_inner = 1;
11400 #endif
11401         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
11402             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4)) ||
11403              !items) {
11404                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
11405                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
11406                                 fields |= IBV_RX_HASH_SRC_IPV4;
11407                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
11408                                 fields |= IBV_RX_HASH_DST_IPV4;
11409                         else
11410                                 fields |= MLX5_IPV4_IBV_RX_HASH;
11411                 }
11412         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
11413                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6)) ||
11414                    !items) {
11415                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
11416                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
11417                                 fields |= IBV_RX_HASH_SRC_IPV6;
11418                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
11419                                 fields |= IBV_RX_HASH_DST_IPV6;
11420                         else
11421                                 fields |= MLX5_IPV6_IBV_RX_HASH;
11422                 }
11423         }
11424         if (items & MLX5_FLOW_ITEM_ESP) {
11425                 if (rss_types & RTE_ETH_RSS_ESP)
11426                         fields |= IBV_RX_HASH_IPSEC_SPI;
11427         }
11428         if ((fields & ~IBV_RX_HASH_IPSEC_SPI) == 0) {
11429                 *hash_fields = fields;
11430                 /*
11431                  * There is no match between the RSS types and the
11432                  * L3 protocol (IPv4/IPv6) defined in the flow rule.
11433                  */
11434                 return;
11435         }
11436         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
11437             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP)) ||
11438             !items) {
11439                 if (rss_types & RTE_ETH_RSS_UDP) {
11440                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
11441                                 fields |= IBV_RX_HASH_SRC_PORT_UDP;
11442                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11443                                 fields |= IBV_RX_HASH_DST_PORT_UDP;
11444                         else
11445                                 fields |= MLX5_UDP_IBV_RX_HASH;
11446                 }
11447         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
11448                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP)) ||
11449                    !items) {
11450                 if (rss_types & RTE_ETH_RSS_TCP) {
11451                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
11452                                 fields |= IBV_RX_HASH_SRC_PORT_TCP;
11453                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11454                                 fields |= IBV_RX_HASH_DST_PORT_TCP;
11455                         else
11456                                 fields |= MLX5_TCP_IBV_RX_HASH;
11457                 }
11458         }
11459         if (rss_inner)
11460                 fields |= IBV_RX_HASH_INNER;
11461         *hash_fields = fields;
11462 }
11463
11464 /**
11465  * Prepare an Rx Hash queue.
11466  *
11467  * @param dev
11468  *   Pointer to Ethernet device.
11469  * @param[in] dev_flow
11470  *   Pointer to the mlx5_flow.
11471  * @param[in] rss_desc
11472  *   Pointer to the mlx5_flow_rss_desc.
11473  * @param[out] hrxq_idx
11474  *   Hash Rx queue index.
11475  *
11476  * @return
11477  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
11478  */
11479 static struct mlx5_hrxq *
11480 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
11481                      struct mlx5_flow *dev_flow,
11482                      struct mlx5_flow_rss_desc *rss_desc,
11483                      uint32_t *hrxq_idx)
11484 {
11485         struct mlx5_flow_handle *dh = dev_flow->handle;
11486         uint32_t shared_rss = rss_desc->shared_rss;
11487         struct mlx5_hrxq *hrxq;
11488
11489         MLX5_ASSERT(rss_desc->queue_num);
11490         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
11491         rss_desc->hash_fields = dev_flow->hash_fields;
11492         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
11493         rss_desc->shared_rss = 0;
11494         if (rss_desc->hash_fields == 0)
11495                 rss_desc->queue_num = 1;
11496         hrxq = mlx5_hrxq_get(dev, rss_desc);
11497         *hrxq_idx = hrxq ? hrxq->idx : 0;
11498         rss_desc->shared_rss = shared_rss;
11499         return hrxq;
11500 }
11501
11502 /**
11503  * Release sample sub action resource.
11504  *
11505  * @param[in, out] dev
11506  *   Pointer to rte_eth_dev structure.
11507  * @param[in] act_res
11508  *   Pointer to sample sub action resource.
11509  */
11510 static void
11511 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
11512                                    struct mlx5_flow_sub_actions_idx *act_res)
11513 {
11514         if (act_res->rix_hrxq) {
11515                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
11516                 act_res->rix_hrxq = 0;
11517         }
11518         if (act_res->rix_encap_decap) {
11519                 flow_dv_encap_decap_resource_release(dev,
11520                                                      act_res->rix_encap_decap);
11521                 act_res->rix_encap_decap = 0;
11522         }
11523         if (act_res->rix_port_id_action) {
11524                 flow_dv_port_id_action_resource_release(dev,
11525                                                 act_res->rix_port_id_action);
11526                 act_res->rix_port_id_action = 0;
11527         }
11528         if (act_res->rix_tag) {
11529                 flow_dv_tag_release(dev, act_res->rix_tag);
11530                 act_res->rix_tag = 0;
11531         }
11532         if (act_res->rix_jump) {
11533                 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
11534                 act_res->rix_jump = 0;
11535         }
11536 }
11537
11538 int
11539 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
11540                         struct mlx5_list_entry *entry, void *cb_ctx)
11541 {
11542         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11543         struct rte_eth_dev *dev = ctx->dev;
11544         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11545         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11546                                                               typeof(*resource),
11547                                                               entry);
11548
11549         if (ctx_resource->ratio == resource->ratio &&
11550             ctx_resource->ft_type == resource->ft_type &&
11551             ctx_resource->ft_id == resource->ft_id &&
11552             ctx_resource->set_action == resource->set_action &&
11553             !memcmp((void *)&ctx_resource->sample_act,
11554                     (void *)&resource->sample_act,
11555                     sizeof(struct mlx5_flow_sub_actions_list))) {
11556                 /*
11557                  * Existing sample action should release the prepared
11558                  * sub-actions reference counter.
11559                  */
11560                 flow_dv_sample_sub_actions_release(dev,
11561                                                    &ctx_resource->sample_idx);
11562                 return 0;
11563         }
11564         return 1;
11565 }
11566
11567 struct mlx5_list_entry *
11568 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11569 {
11570         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11571         struct rte_eth_dev *dev = ctx->dev;
11572         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11573         void **sample_dv_actions = ctx_resource->sub_actions;
11574         struct mlx5_flow_dv_sample_resource *resource;
11575         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11576         struct mlx5_priv *priv = dev->data->dev_private;
11577         struct mlx5_dev_ctx_shared *sh = priv->sh;
11578         struct mlx5_flow_tbl_resource *tbl;
11579         uint32_t idx = 0;
11580         const uint32_t next_ft_step = 1;
11581         uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11582         uint8_t is_egress = 0;
11583         uint8_t is_transfer = 0;
11584         struct rte_flow_error *error = ctx->error;
11585
11586         /* Register new sample resource. */
11587         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11588         if (!resource) {
11589                 rte_flow_error_set(error, ENOMEM,
11590                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11591                                           NULL,
11592                                           "cannot allocate resource memory");
11593                 return NULL;
11594         }
11595         *resource = *ctx_resource;
11596         /* Create normal path table level */
11597         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11598                 is_transfer = 1;
11599         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11600                 is_egress = 1;
11601         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11602                                         is_egress, is_transfer,
11603                                         true, NULL, 0, 0, 0, error);
11604         if (!tbl) {
11605                 rte_flow_error_set(error, ENOMEM,
11606                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11607                                           NULL,
11608                                           "fail to create normal path table "
11609                                           "for sample");
11610                 goto error;
11611         }
11612         resource->normal_path_tbl = tbl;
11613         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11614                 if (!sh->default_miss_action) {
11615                         rte_flow_error_set(error, ENOMEM,
11616                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11617                                                 NULL,
11618                                                 "default miss action was not "
11619                                                 "created");
11620                         goto error;
11621                 }
11622                 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11623                                                 sh->default_miss_action;
11624         }
11625         /* Create a DR sample action */
11626         sampler_attr.sample_ratio = resource->ratio;
11627         sampler_attr.default_next_table = tbl->obj;
11628         sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11629         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11630                                                         &sample_dv_actions[0];
11631         sampler_attr.action = resource->set_action;
11632         if (mlx5_os_flow_dr_create_flow_action_sampler
11633                         (&sampler_attr, &resource->verbs_action)) {
11634                 rte_flow_error_set(error, ENOMEM,
11635                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11636                                         NULL, "cannot create sample action");
11637                 goto error;
11638         }
11639         resource->idx = idx;
11640         resource->dev = dev;
11641         return &resource->entry;
11642 error:
11643         if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11644                 flow_dv_sample_sub_actions_release(dev,
11645                                                    &resource->sample_idx);
11646         if (resource->normal_path_tbl)
11647                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11648                                 resource->normal_path_tbl);
11649         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11650         return NULL;
11651
11652 }
11653
11654 struct mlx5_list_entry *
11655 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11656                          struct mlx5_list_entry *entry __rte_unused,
11657                          void *cb_ctx)
11658 {
11659         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11660         struct rte_eth_dev *dev = ctx->dev;
11661         struct mlx5_flow_dv_sample_resource *resource;
11662         struct mlx5_priv *priv = dev->data->dev_private;
11663         struct mlx5_dev_ctx_shared *sh = priv->sh;
11664         uint32_t idx = 0;
11665
11666         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11667         if (!resource) {
11668                 rte_flow_error_set(ctx->error, ENOMEM,
11669                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11670                                           NULL,
11671                                           "cannot allocate resource memory");
11672                 return NULL;
11673         }
11674         memcpy(resource, entry, sizeof(*resource));
11675         resource->idx = idx;
11676         resource->dev = dev;
11677         return &resource->entry;
11678 }
11679
11680 void
11681 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11682                              struct mlx5_list_entry *entry)
11683 {
11684         struct mlx5_flow_dv_sample_resource *resource =
11685                                   container_of(entry, typeof(*resource), entry);
11686         struct rte_eth_dev *dev = resource->dev;
11687         struct mlx5_priv *priv = dev->data->dev_private;
11688
11689         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11690 }
11691
11692 /**
11693  * Find existing sample resource or create and register a new one.
11694  *
11695  * @param[in, out] dev
11696  *   Pointer to rte_eth_dev structure.
11697  * @param[in] ref
11698  *   Pointer to sample resource reference.
11699  * @parm[in, out] dev_flow
11700  *   Pointer to the dev_flow.
11701  * @param[out] error
11702  *   pointer to error structure.
11703  *
11704  * @return
11705  *   0 on success otherwise -errno and errno is set.
11706  */
11707 static int
11708 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11709                          struct mlx5_flow_dv_sample_resource *ref,
11710                          struct mlx5_flow *dev_flow,
11711                          struct rte_flow_error *error)
11712 {
11713         struct mlx5_flow_dv_sample_resource *resource;
11714         struct mlx5_list_entry *entry;
11715         struct mlx5_priv *priv = dev->data->dev_private;
11716         struct mlx5_flow_cb_ctx ctx = {
11717                 .dev = dev,
11718                 .error = error,
11719                 .data = ref,
11720         };
11721
11722         entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11723         if (!entry)
11724                 return -rte_errno;
11725         resource = container_of(entry, typeof(*resource), entry);
11726         dev_flow->handle->dvh.rix_sample = resource->idx;
11727         dev_flow->dv.sample_res = resource;
11728         return 0;
11729 }
11730
11731 int
11732 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11733                             struct mlx5_list_entry *entry, void *cb_ctx)
11734 {
11735         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11736         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11737         struct rte_eth_dev *dev = ctx->dev;
11738         struct mlx5_flow_dv_dest_array_resource *resource =
11739                                   container_of(entry, typeof(*resource), entry);
11740         uint32_t idx = 0;
11741
11742         if (ctx_resource->num_of_dest == resource->num_of_dest &&
11743             ctx_resource->ft_type == resource->ft_type &&
11744             !memcmp((void *)resource->sample_act,
11745                     (void *)ctx_resource->sample_act,
11746                    (ctx_resource->num_of_dest *
11747                    sizeof(struct mlx5_flow_sub_actions_list)))) {
11748                 /*
11749                  * Existing sample action should release the prepared
11750                  * sub-actions reference counter.
11751                  */
11752                 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11753                         flow_dv_sample_sub_actions_release(dev,
11754                                         &ctx_resource->sample_idx[idx]);
11755                 return 0;
11756         }
11757         return 1;
11758 }
11759
11760 struct mlx5_list_entry *
11761 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11762 {
11763         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11764         struct rte_eth_dev *dev = ctx->dev;
11765         struct mlx5_flow_dv_dest_array_resource *resource;
11766         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11767         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11768         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11769         struct mlx5_priv *priv = dev->data->dev_private;
11770         struct mlx5_dev_ctx_shared *sh = priv->sh;
11771         struct mlx5_flow_sub_actions_list *sample_act;
11772         struct mlx5dv_dr_domain *domain;
11773         uint32_t idx = 0, res_idx = 0;
11774         struct rte_flow_error *error = ctx->error;
11775         uint64_t action_flags;
11776         int ret;
11777
11778         /* Register new destination array resource. */
11779         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11780                                             &res_idx);
11781         if (!resource) {
11782                 rte_flow_error_set(error, ENOMEM,
11783                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11784                                           NULL,
11785                                           "cannot allocate resource memory");
11786                 return NULL;
11787         }
11788         *resource = *ctx_resource;
11789         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11790                 domain = sh->fdb_domain;
11791         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11792                 domain = sh->rx_domain;
11793         else
11794                 domain = sh->tx_domain;
11795         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11796                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11797                                  mlx5_malloc(MLX5_MEM_ZERO,
11798                                  sizeof(struct mlx5dv_dr_action_dest_attr),
11799                                  0, SOCKET_ID_ANY);
11800                 if (!dest_attr[idx]) {
11801                         rte_flow_error_set(error, ENOMEM,
11802                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11803                                            NULL,
11804                                            "cannot allocate resource memory");
11805                         goto error;
11806                 }
11807                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11808                 sample_act = &ctx_resource->sample_act[idx];
11809                 action_flags = sample_act->action_flags;
11810                 switch (action_flags) {
11811                 case MLX5_FLOW_ACTION_QUEUE:
11812                         dest_attr[idx]->dest = sample_act->dr_queue_action;
11813                         break;
11814                 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11815                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11816                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11817                         dest_attr[idx]->dest_reformat->reformat =
11818                                         sample_act->dr_encap_action;
11819                         dest_attr[idx]->dest_reformat->dest =
11820                                         sample_act->dr_port_id_action;
11821                         break;
11822                 case MLX5_FLOW_ACTION_PORT_ID:
11823                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
11824                         break;
11825                 case MLX5_FLOW_ACTION_JUMP:
11826                         dest_attr[idx]->dest = sample_act->dr_jump_action;
11827                         break;
11828                 default:
11829                         rte_flow_error_set(error, EINVAL,
11830                                            RTE_FLOW_ERROR_TYPE_ACTION,
11831                                            NULL,
11832                                            "unsupported actions type");
11833                         goto error;
11834                 }
11835         }
11836         /* create a dest array action */
11837         ret = mlx5_os_flow_dr_create_flow_action_dest_array
11838                                                 (domain,
11839                                                  resource->num_of_dest,
11840                                                  dest_attr,
11841                                                  &resource->action);
11842         if (ret) {
11843                 rte_flow_error_set(error, ENOMEM,
11844                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11845                                    NULL,
11846                                    "cannot create destination array action");
11847                 goto error;
11848         }
11849         resource->idx = res_idx;
11850         resource->dev = dev;
11851         for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11852                 mlx5_free(dest_attr[idx]);
11853         return &resource->entry;
11854 error:
11855         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11856                 flow_dv_sample_sub_actions_release(dev,
11857                                                    &resource->sample_idx[idx]);
11858                 if (dest_attr[idx])
11859                         mlx5_free(dest_attr[idx]);
11860         }
11861         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11862         return NULL;
11863 }
11864
11865 struct mlx5_list_entry *
11866 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11867                             struct mlx5_list_entry *entry __rte_unused,
11868                             void *cb_ctx)
11869 {
11870         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11871         struct rte_eth_dev *dev = ctx->dev;
11872         struct mlx5_flow_dv_dest_array_resource *resource;
11873         struct mlx5_priv *priv = dev->data->dev_private;
11874         struct mlx5_dev_ctx_shared *sh = priv->sh;
11875         uint32_t res_idx = 0;
11876         struct rte_flow_error *error = ctx->error;
11877
11878         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11879                                       &res_idx);
11880         if (!resource) {
11881                 rte_flow_error_set(error, ENOMEM,
11882                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11883                                           NULL,
11884                                           "cannot allocate dest-array memory");
11885                 return NULL;
11886         }
11887         memcpy(resource, entry, sizeof(*resource));
11888         resource->idx = res_idx;
11889         resource->dev = dev;
11890         return &resource->entry;
11891 }
11892
11893 void
11894 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11895                                  struct mlx5_list_entry *entry)
11896 {
11897         struct mlx5_flow_dv_dest_array_resource *resource =
11898                         container_of(entry, typeof(*resource), entry);
11899         struct rte_eth_dev *dev = resource->dev;
11900         struct mlx5_priv *priv = dev->data->dev_private;
11901
11902         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11903 }
11904
11905 /**
11906  * Find existing destination array resource or create and register a new one.
11907  *
11908  * @param[in, out] dev
11909  *   Pointer to rte_eth_dev structure.
11910  * @param[in] ref
11911  *   Pointer to destination array resource reference.
11912  * @parm[in, out] dev_flow
11913  *   Pointer to the dev_flow.
11914  * @param[out] error
11915  *   pointer to error structure.
11916  *
11917  * @return
11918  *   0 on success otherwise -errno and errno is set.
11919  */
11920 static int
11921 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11922                          struct mlx5_flow_dv_dest_array_resource *ref,
11923                          struct mlx5_flow *dev_flow,
11924                          struct rte_flow_error *error)
11925 {
11926         struct mlx5_flow_dv_dest_array_resource *resource;
11927         struct mlx5_priv *priv = dev->data->dev_private;
11928         struct mlx5_list_entry *entry;
11929         struct mlx5_flow_cb_ctx ctx = {
11930                 .dev = dev,
11931                 .error = error,
11932                 .data = ref,
11933         };
11934
11935         entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11936         if (!entry)
11937                 return -rte_errno;
11938         resource = container_of(entry, typeof(*resource), entry);
11939         dev_flow->handle->dvh.rix_dest_array = resource->idx;
11940         dev_flow->dv.dest_array_res = resource;
11941         return 0;
11942 }
11943
11944 /**
11945  * Convert Sample action to DV specification.
11946  *
11947  * @param[in] dev
11948  *   Pointer to rte_eth_dev structure.
11949  * @param[in] action
11950  *   Pointer to sample action structure.
11951  * @param[in, out] dev_flow
11952  *   Pointer to the mlx5_flow.
11953  * @param[in] attr
11954  *   Pointer to the flow attributes.
11955  * @param[in, out] num_of_dest
11956  *   Pointer to the num of destination.
11957  * @param[in, out] sample_actions
11958  *   Pointer to sample actions list.
11959  * @param[in, out] res
11960  *   Pointer to sample resource.
11961  * @param[out] error
11962  *   Pointer to the error structure.
11963  *
11964  * @return
11965  *   0 on success, a negative errno value otherwise and rte_errno is set.
11966  */
11967 static int
11968 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11969                                 const struct rte_flow_action_sample *action,
11970                                 struct mlx5_flow *dev_flow,
11971                                 const struct rte_flow_attr *attr,
11972                                 uint32_t *num_of_dest,
11973                                 void **sample_actions,
11974                                 struct mlx5_flow_dv_sample_resource *res,
11975                                 struct rte_flow_error *error)
11976 {
11977         struct mlx5_priv *priv = dev->data->dev_private;
11978         const struct rte_flow_action *sub_actions;
11979         struct mlx5_flow_sub_actions_list *sample_act;
11980         struct mlx5_flow_sub_actions_idx *sample_idx;
11981         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11982         struct rte_flow *flow = dev_flow->flow;
11983         struct mlx5_flow_rss_desc *rss_desc;
11984         uint64_t action_flags = 0;
11985
11986         MLX5_ASSERT(wks);
11987         rss_desc = &wks->rss_desc;
11988         sample_act = &res->sample_act;
11989         sample_idx = &res->sample_idx;
11990         res->ratio = action->ratio;
11991         sub_actions = action->actions;
11992         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11993                 int type = sub_actions->type;
11994                 uint32_t pre_rix = 0;
11995                 void *pre_r;
11996                 switch (type) {
11997                 case RTE_FLOW_ACTION_TYPE_QUEUE:
11998                 {
11999                         const struct rte_flow_action_queue *queue;
12000                         struct mlx5_hrxq *hrxq;
12001                         uint32_t hrxq_idx;
12002
12003                         queue = sub_actions->conf;
12004                         rss_desc->queue_num = 1;
12005                         rss_desc->queue[0] = queue->index;
12006                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
12007                                                     rss_desc, &hrxq_idx);
12008                         if (!hrxq)
12009                                 return rte_flow_error_set
12010                                         (error, rte_errno,
12011                                          RTE_FLOW_ERROR_TYPE_ACTION,
12012                                          NULL,
12013                                          "cannot create fate queue");
12014                         sample_act->dr_queue_action = hrxq->action;
12015                         sample_idx->rix_hrxq = hrxq_idx;
12016                         sample_actions[sample_act->actions_num++] =
12017                                                 hrxq->action;
12018                         (*num_of_dest)++;
12019                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
12020                         if (action_flags & MLX5_FLOW_ACTION_MARK)
12021                                 dev_flow->handle->rix_hrxq = hrxq_idx;
12022                         dev_flow->handle->fate_action =
12023                                         MLX5_FLOW_FATE_QUEUE;
12024                         break;
12025                 }
12026                 case RTE_FLOW_ACTION_TYPE_RSS:
12027                 {
12028                         struct mlx5_hrxq *hrxq;
12029                         uint32_t hrxq_idx;
12030                         const struct rte_flow_action_rss *rss;
12031                         const uint8_t *rss_key;
12032
12033                         rss = sub_actions->conf;
12034                         memcpy(rss_desc->queue, rss->queue,
12035                                rss->queue_num * sizeof(uint16_t));
12036                         rss_desc->queue_num = rss->queue_num;
12037                         /* NULL RSS key indicates default RSS key. */
12038                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
12039                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12040                         /*
12041                          * rss->level and rss.types should be set in advance
12042                          * when expanding items for RSS.
12043                          */
12044                         flow_dv_hashfields_set(dev_flow->handle->layers,
12045                                                rss_desc,
12046                                                &dev_flow->hash_fields);
12047                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
12048                                                     rss_desc, &hrxq_idx);
12049                         if (!hrxq)
12050                                 return rte_flow_error_set
12051                                         (error, rte_errno,
12052                                          RTE_FLOW_ERROR_TYPE_ACTION,
12053                                          NULL,
12054                                          "cannot create fate queue");
12055                         sample_act->dr_queue_action = hrxq->action;
12056                         sample_idx->rix_hrxq = hrxq_idx;
12057                         sample_actions[sample_act->actions_num++] =
12058                                                 hrxq->action;
12059                         (*num_of_dest)++;
12060                         action_flags |= MLX5_FLOW_ACTION_RSS;
12061                         if (action_flags & MLX5_FLOW_ACTION_MARK)
12062                                 dev_flow->handle->rix_hrxq = hrxq_idx;
12063                         dev_flow->handle->fate_action =
12064                                         MLX5_FLOW_FATE_QUEUE;
12065                         break;
12066                 }
12067                 case RTE_FLOW_ACTION_TYPE_MARK:
12068                 {
12069                         uint32_t tag_be = mlx5_flow_mark_set
12070                                 (((const struct rte_flow_action_mark *)
12071                                 (sub_actions->conf))->id);
12072
12073                         wks->mark = 1;
12074                         pre_rix = dev_flow->handle->dvh.rix_tag;
12075                         /* Save the mark resource before sample */
12076                         pre_r = dev_flow->dv.tag_resource;
12077                         if (flow_dv_tag_resource_register(dev, tag_be,
12078                                                   dev_flow, error))
12079                                 return -rte_errno;
12080                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12081                         sample_act->dr_tag_action =
12082                                 dev_flow->dv.tag_resource->action;
12083                         sample_idx->rix_tag =
12084                                 dev_flow->handle->dvh.rix_tag;
12085                         sample_actions[sample_act->actions_num++] =
12086                                                 sample_act->dr_tag_action;
12087                         /* Recover the mark resource after sample */
12088                         dev_flow->dv.tag_resource = pre_r;
12089                         dev_flow->handle->dvh.rix_tag = pre_rix;
12090                         action_flags |= MLX5_FLOW_ACTION_MARK;
12091                         break;
12092                 }
12093                 case RTE_FLOW_ACTION_TYPE_COUNT:
12094                 {
12095                         if (!flow->counter) {
12096                                 flow->counter =
12097                                         flow_dv_translate_create_counter(dev,
12098                                                 dev_flow, sub_actions->conf,
12099                                                 0);
12100                                 if (!flow->counter)
12101                                         return rte_flow_error_set
12102                                                 (error, rte_errno,
12103                                                 RTE_FLOW_ERROR_TYPE_ACTION,
12104                                                 NULL,
12105                                                 "cannot create counter"
12106                                                 " object.");
12107                         }
12108                         sample_act->dr_cnt_action =
12109                                   (flow_dv_counter_get_by_idx(dev,
12110                                   flow->counter, NULL))->action;
12111                         sample_actions[sample_act->actions_num++] =
12112                                                 sample_act->dr_cnt_action;
12113                         action_flags |= MLX5_FLOW_ACTION_COUNT;
12114                         break;
12115                 }
12116                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12117                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
12118                 {
12119                         struct mlx5_flow_dv_port_id_action_resource
12120                                         port_id_resource;
12121                         uint32_t port_id = 0;
12122
12123                         memset(&port_id_resource, 0, sizeof(port_id_resource));
12124                         /* Save the port id resource before sample */
12125                         pre_rix = dev_flow->handle->rix_port_id_action;
12126                         pre_r = dev_flow->dv.port_id_action;
12127                         if (flow_dv_translate_action_port_id(dev, sub_actions,
12128                                                              &port_id, error))
12129                                 return -rte_errno;
12130                         port_id_resource.port_id = port_id;
12131                         if (flow_dv_port_id_action_resource_register
12132                             (dev, &port_id_resource, dev_flow, error))
12133                                 return -rte_errno;
12134                         sample_act->dr_port_id_action =
12135                                 dev_flow->dv.port_id_action->action;
12136                         sample_idx->rix_port_id_action =
12137                                 dev_flow->handle->rix_port_id_action;
12138                         sample_actions[sample_act->actions_num++] =
12139                                                 sample_act->dr_port_id_action;
12140                         /* Recover the port id resource after sample */
12141                         dev_flow->dv.port_id_action = pre_r;
12142                         dev_flow->handle->rix_port_id_action = pre_rix;
12143                         (*num_of_dest)++;
12144                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12145                         break;
12146                 }
12147                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12148                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12149                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12150                         /* Save the encap resource before sample */
12151                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
12152                         pre_r = dev_flow->dv.encap_decap;
12153                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
12154                                                            dev_flow,
12155                                                            attr->transfer,
12156                                                            error))
12157                                 return -rte_errno;
12158                         sample_act->dr_encap_action =
12159                                 dev_flow->dv.encap_decap->action;
12160                         sample_idx->rix_encap_decap =
12161                                 dev_flow->handle->dvh.rix_encap_decap;
12162                         sample_actions[sample_act->actions_num++] =
12163                                                 sample_act->dr_encap_action;
12164                         /* Recover the encap resource after sample */
12165                         dev_flow->dv.encap_decap = pre_r;
12166                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
12167                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12168                         break;
12169                 default:
12170                         return rte_flow_error_set(error, EINVAL,
12171                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12172                                 NULL,
12173                                 "Not support for sampler action");
12174                 }
12175         }
12176         sample_act->action_flags = action_flags;
12177         res->ft_id = dev_flow->dv.group;
12178         if (attr->transfer) {
12179                 union {
12180                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
12181                         uint64_t set_action;
12182                 } action_ctx = { .set_action = 0 };
12183
12184                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12185                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
12186                          MLX5_MODIFICATION_TYPE_SET);
12187                 MLX5_SET(set_action_in, action_ctx.action_in, field,
12188                          MLX5_MODI_META_REG_C_0);
12189                 MLX5_SET(set_action_in, action_ctx.action_in, data,
12190                          priv->vport_meta_tag);
12191                 res->set_action = action_ctx.set_action;
12192         } else if (attr->ingress) {
12193                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12194         } else {
12195                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
12196         }
12197         return 0;
12198 }
12199
12200 /**
12201  * Convert Sample action to DV specification.
12202  *
12203  * @param[in] dev
12204  *   Pointer to rte_eth_dev structure.
12205  * @param[in, out] dev_flow
12206  *   Pointer to the mlx5_flow.
12207  * @param[in] num_of_dest
12208  *   The num of destination.
12209  * @param[in, out] res
12210  *   Pointer to sample resource.
12211  * @param[in, out] mdest_res
12212  *   Pointer to destination array resource.
12213  * @param[in] sample_actions
12214  *   Pointer to sample path actions list.
12215  * @param[in] action_flags
12216  *   Holds the actions detected until now.
12217  * @param[out] error
12218  *   Pointer to the error structure.
12219  *
12220  * @return
12221  *   0 on success, a negative errno value otherwise and rte_errno is set.
12222  */
12223 static int
12224 flow_dv_create_action_sample(struct rte_eth_dev *dev,
12225                              struct mlx5_flow *dev_flow,
12226                              uint32_t num_of_dest,
12227                              struct mlx5_flow_dv_sample_resource *res,
12228                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
12229                              void **sample_actions,
12230                              uint64_t action_flags,
12231                              struct rte_flow_error *error)
12232 {
12233         /* update normal path action resource into last index of array */
12234         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
12235         struct mlx5_flow_sub_actions_list *sample_act =
12236                                         &mdest_res->sample_act[dest_index];
12237         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12238         struct mlx5_flow_rss_desc *rss_desc;
12239         uint32_t normal_idx = 0;
12240         struct mlx5_hrxq *hrxq;
12241         uint32_t hrxq_idx;
12242
12243         MLX5_ASSERT(wks);
12244         rss_desc = &wks->rss_desc;
12245         if (num_of_dest > 1) {
12246                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
12247                         /* Handle QP action for mirroring */
12248                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
12249                                                     rss_desc, &hrxq_idx);
12250                         if (!hrxq)
12251                                 return rte_flow_error_set
12252                                      (error, rte_errno,
12253                                       RTE_FLOW_ERROR_TYPE_ACTION,
12254                                       NULL,
12255                                       "cannot create rx queue");
12256                         normal_idx++;
12257                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
12258                         sample_act->dr_queue_action = hrxq->action;
12259                         if (action_flags & MLX5_FLOW_ACTION_MARK)
12260                                 dev_flow->handle->rix_hrxq = hrxq_idx;
12261                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12262                 }
12263                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
12264                         normal_idx++;
12265                         mdest_res->sample_idx[dest_index].rix_encap_decap =
12266                                 dev_flow->handle->dvh.rix_encap_decap;
12267                         sample_act->dr_encap_action =
12268                                 dev_flow->dv.encap_decap->action;
12269                         dev_flow->handle->dvh.rix_encap_decap = 0;
12270                 }
12271                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
12272                         normal_idx++;
12273                         mdest_res->sample_idx[dest_index].rix_port_id_action =
12274                                 dev_flow->handle->rix_port_id_action;
12275                         sample_act->dr_port_id_action =
12276                                 dev_flow->dv.port_id_action->action;
12277                         dev_flow->handle->rix_port_id_action = 0;
12278                 }
12279                 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
12280                         normal_idx++;
12281                         mdest_res->sample_idx[dest_index].rix_jump =
12282                                 dev_flow->handle->rix_jump;
12283                         sample_act->dr_jump_action =
12284                                 dev_flow->dv.jump->action;
12285                         dev_flow->handle->rix_jump = 0;
12286                 }
12287                 sample_act->actions_num = normal_idx;
12288                 /* update sample action resource into first index of array */
12289                 mdest_res->ft_type = res->ft_type;
12290                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
12291                                 sizeof(struct mlx5_flow_sub_actions_idx));
12292                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
12293                                 sizeof(struct mlx5_flow_sub_actions_list));
12294                 mdest_res->num_of_dest = num_of_dest;
12295                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
12296                                                          dev_flow, error))
12297                         return rte_flow_error_set(error, EINVAL,
12298                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12299                                                   NULL, "can't create sample "
12300                                                   "action");
12301         } else {
12302                 res->sub_actions = sample_actions;
12303                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
12304                         return rte_flow_error_set(error, EINVAL,
12305                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12306                                                   NULL,
12307                                                   "can't create sample action");
12308         }
12309         return 0;
12310 }
12311
12312 /**
12313  * Remove an ASO age action from age actions list.
12314  *
12315  * @param[in] dev
12316  *   Pointer to the Ethernet device structure.
12317  * @param[in] age
12318  *   Pointer to the aso age action handler.
12319  */
12320 static void
12321 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
12322                                 struct mlx5_aso_age_action *age)
12323 {
12324         struct mlx5_age_info *age_info;
12325         struct mlx5_age_param *age_param = &age->age_params;
12326         struct mlx5_priv *priv = dev->data->dev_private;
12327         uint16_t expected = AGE_CANDIDATE;
12328
12329         age_info = GET_PORT_AGE_INFO(priv);
12330         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
12331                                          AGE_FREE, false, __ATOMIC_RELAXED,
12332                                          __ATOMIC_RELAXED)) {
12333                 /**
12334                  * We need the lock even it is age timeout,
12335                  * since age action may still in process.
12336                  */
12337                 rte_spinlock_lock(&age_info->aged_sl);
12338                 LIST_REMOVE(age, next);
12339                 rte_spinlock_unlock(&age_info->aged_sl);
12340                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
12341         }
12342 }
12343
12344 /**
12345  * Release an ASO age action.
12346  *
12347  * @param[in] dev
12348  *   Pointer to the Ethernet device structure.
12349  * @param[in] age_idx
12350  *   Index of ASO age action to release.
12351  * @param[in] flow
12352  *   True if the release operation is during flow destroy operation.
12353  *   False if the release operation is during action destroy operation.
12354  *
12355  * @return
12356  *   0 when age action was removed, otherwise the number of references.
12357  */
12358 static int
12359 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
12360 {
12361         struct mlx5_priv *priv = dev->data->dev_private;
12362         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12363         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
12364         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
12365
12366         if (!ret) {
12367                 flow_dv_aso_age_remove_from_age(dev, age);
12368                 rte_spinlock_lock(&mng->free_sl);
12369                 LIST_INSERT_HEAD(&mng->free, age, next);
12370                 rte_spinlock_unlock(&mng->free_sl);
12371         }
12372         return ret;
12373 }
12374
12375 /**
12376  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
12377  *
12378  * @param[in] dev
12379  *   Pointer to the Ethernet device structure.
12380  *
12381  * @return
12382  *   0 on success, otherwise negative errno value and rte_errno is set.
12383  */
12384 static int
12385 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
12386 {
12387         struct mlx5_priv *priv = dev->data->dev_private;
12388         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12389         void *old_pools = mng->pools;
12390         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
12391         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
12392         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12393
12394         if (!pools) {
12395                 rte_errno = ENOMEM;
12396                 return -ENOMEM;
12397         }
12398         if (old_pools) {
12399                 memcpy(pools, old_pools,
12400                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
12401                 mlx5_free(old_pools);
12402         } else {
12403                 /* First ASO flow hit allocation - starting ASO data-path. */
12404                 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
12405
12406                 if (ret) {
12407                         mlx5_free(pools);
12408                         return ret;
12409                 }
12410         }
12411         mng->n = resize;
12412         mng->pools = pools;
12413         return 0;
12414 }
12415
12416 /**
12417  * Create and initialize a new ASO aging pool.
12418  *
12419  * @param[in] dev
12420  *   Pointer to the Ethernet device structure.
12421  * @param[out] age_free
12422  *   Where to put the pointer of a new age action.
12423  *
12424  * @return
12425  *   The age actions pool pointer and @p age_free is set on success,
12426  *   NULL otherwise and rte_errno is set.
12427  */
12428 static struct mlx5_aso_age_pool *
12429 flow_dv_age_pool_create(struct rte_eth_dev *dev,
12430                         struct mlx5_aso_age_action **age_free)
12431 {
12432         struct mlx5_priv *priv = dev->data->dev_private;
12433         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12434         struct mlx5_aso_age_pool *pool = NULL;
12435         struct mlx5_devx_obj *obj = NULL;
12436         uint32_t i;
12437
12438         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->cdev->ctx,
12439                                                     priv->sh->cdev->pdn);
12440         if (!obj) {
12441                 rte_errno = ENODATA;
12442                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
12443                 return NULL;
12444         }
12445         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12446         if (!pool) {
12447                 claim_zero(mlx5_devx_cmd_destroy(obj));
12448                 rte_errno = ENOMEM;
12449                 return NULL;
12450         }
12451         pool->flow_hit_aso_obj = obj;
12452         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
12453         rte_rwlock_write_lock(&mng->resize_rwl);
12454         pool->index = mng->next;
12455         /* Resize pools array if there is no room for the new pool in it. */
12456         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
12457                 claim_zero(mlx5_devx_cmd_destroy(obj));
12458                 mlx5_free(pool);
12459                 rte_rwlock_write_unlock(&mng->resize_rwl);
12460                 return NULL;
12461         }
12462         mng->pools[pool->index] = pool;
12463         mng->next++;
12464         rte_rwlock_write_unlock(&mng->resize_rwl);
12465         /* Assign the first action in the new pool, the rest go to free list. */
12466         *age_free = &pool->actions[0];
12467         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
12468                 pool->actions[i].offset = i;
12469                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
12470         }
12471         return pool;
12472 }
12473
12474 /**
12475  * Allocate a ASO aging bit.
12476  *
12477  * @param[in] dev
12478  *   Pointer to the Ethernet device structure.
12479  * @param[out] error
12480  *   Pointer to the error structure.
12481  *
12482  * @return
12483  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
12484  */
12485 static uint32_t
12486 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12487 {
12488         struct mlx5_priv *priv = dev->data->dev_private;
12489         const struct mlx5_aso_age_pool *pool;
12490         struct mlx5_aso_age_action *age_free = NULL;
12491         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12492
12493         MLX5_ASSERT(mng);
12494         /* Try to get the next free age action bit. */
12495         rte_spinlock_lock(&mng->free_sl);
12496         age_free = LIST_FIRST(&mng->free);
12497         if (age_free) {
12498                 LIST_REMOVE(age_free, next);
12499         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
12500                 rte_spinlock_unlock(&mng->free_sl);
12501                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12502                                    NULL, "failed to create ASO age pool");
12503                 return 0; /* 0 is an error. */
12504         }
12505         rte_spinlock_unlock(&mng->free_sl);
12506         pool = container_of
12507           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
12508                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
12509                                                                        actions);
12510         if (!age_free->dr_action) {
12511                 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
12512                                                  error);
12513
12514                 if (reg_c < 0) {
12515                         rte_flow_error_set(error, rte_errno,
12516                                            RTE_FLOW_ERROR_TYPE_ACTION,
12517                                            NULL, "failed to get reg_c "
12518                                            "for ASO flow hit");
12519                         return 0; /* 0 is an error. */
12520                 }
12521 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
12522                 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
12523                                 (priv->sh->rx_domain,
12524                                  pool->flow_hit_aso_obj->obj, age_free->offset,
12525                                  MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
12526                                  (reg_c - REG_C_0));
12527 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
12528                 if (!age_free->dr_action) {
12529                         rte_errno = errno;
12530                         rte_spinlock_lock(&mng->free_sl);
12531                         LIST_INSERT_HEAD(&mng->free, age_free, next);
12532                         rte_spinlock_unlock(&mng->free_sl);
12533                         rte_flow_error_set(error, rte_errno,
12534                                            RTE_FLOW_ERROR_TYPE_ACTION,
12535                                            NULL, "failed to create ASO "
12536                                            "flow hit action");
12537                         return 0; /* 0 is an error. */
12538                 }
12539         }
12540         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
12541         return pool->index | ((age_free->offset + 1) << 16);
12542 }
12543
12544 /**
12545  * Initialize flow ASO age parameters.
12546  *
12547  * @param[in] dev
12548  *   Pointer to rte_eth_dev structure.
12549  * @param[in] age_idx
12550  *   Index of ASO age action.
12551  * @param[in] context
12552  *   Pointer to flow counter age context.
12553  * @param[in] timeout
12554  *   Aging timeout in seconds.
12555  *
12556  */
12557 static void
12558 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12559                             uint32_t age_idx,
12560                             void *context,
12561                             uint32_t timeout)
12562 {
12563         struct mlx5_aso_age_action *aso_age;
12564
12565         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12566         MLX5_ASSERT(aso_age);
12567         aso_age->age_params.context = context;
12568         aso_age->age_params.timeout = timeout;
12569         aso_age->age_params.port_id = dev->data->port_id;
12570         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12571                          __ATOMIC_RELAXED);
12572         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12573                          __ATOMIC_RELAXED);
12574 }
12575
12576 static void
12577 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12578                                const struct rte_flow_item_integrity *value,
12579                                void *headers_m, void *headers_v)
12580 {
12581         if (mask->l4_ok) {
12582                 /* RTE l4_ok filter aggregates hardware l4_ok and
12583                  * l4_checksum_ok filters.
12584                  * Positive RTE l4_ok match requires hardware match on both L4
12585                  * hardware integrity bits.
12586                  * For negative match, check hardware l4_checksum_ok bit only,
12587                  * because hardware sets that bit to 0 for all packets
12588                  * with bad L4.
12589                  */
12590                 if (value->l4_ok) {
12591                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok, 1);
12592                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok, 1);
12593                 }
12594                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12595                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12596                          !!value->l4_ok);
12597         }
12598         if (mask->l4_csum_ok) {
12599                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12600                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12601                          value->l4_csum_ok);
12602         }
12603 }
12604
12605 static void
12606 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12607                                const struct rte_flow_item_integrity *value,
12608                                void *headers_m, void *headers_v, bool is_ipv4)
12609 {
12610         if (mask->l3_ok) {
12611                 /* RTE l3_ok filter aggregates for IPv4 hardware l3_ok and
12612                  * ipv4_csum_ok filters.
12613                  * Positive RTE l3_ok match requires hardware match on both L3
12614                  * hardware integrity bits.
12615                  * For negative match, check hardware l3_csum_ok bit only,
12616                  * because hardware sets that bit to 0 for all packets
12617                  * with bad L3.
12618                  */
12619                 if (is_ipv4) {
12620                         if (value->l3_ok) {
12621                                 MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12622                                          l3_ok, 1);
12623                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12624                                          l3_ok, 1);
12625                         }
12626                         MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12627                                  ipv4_checksum_ok, 1);
12628                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12629                                  ipv4_checksum_ok, !!value->l3_ok);
12630                 } else {
12631                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok, 1);
12632                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12633                                  value->l3_ok);
12634                 }
12635         }
12636         if (mask->ipv4_csum_ok) {
12637                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok, 1);
12638                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12639                          value->ipv4_csum_ok);
12640         }
12641 }
12642
12643 static void
12644 set_integrity_bits(void *headers_m, void *headers_v,
12645                    const struct rte_flow_item *integrity_item, bool is_l3_ip4)
12646 {
12647         const struct rte_flow_item_integrity *spec = integrity_item->spec;
12648         const struct rte_flow_item_integrity *mask = integrity_item->mask;
12649
12650         /* Integrity bits validation cleared spec pointer */
12651         MLX5_ASSERT(spec != NULL);
12652         if (!mask)
12653                 mask = &rte_flow_item_integrity_mask;
12654         flow_dv_translate_integrity_l3(mask, spec, headers_m, headers_v,
12655                                        is_l3_ip4);
12656         flow_dv_translate_integrity_l4(mask, spec, headers_m, headers_v);
12657 }
12658
12659 static void
12660 flow_dv_translate_item_integrity_post(void *matcher, void *key,
12661                                       const
12662                                       struct rte_flow_item *integrity_items[2],
12663                                       uint64_t pattern_flags)
12664 {
12665         void *headers_m, *headers_v;
12666         bool is_l3_ip4;
12667
12668         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
12669                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12670                                          inner_headers);
12671                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12672                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4) !=
12673                             0;
12674                 set_integrity_bits(headers_m, headers_v,
12675                                    integrity_items[1], is_l3_ip4);
12676         }
12677         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
12678                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12679                                          outer_headers);
12680                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12681                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV4) !=
12682                             0;
12683                 set_integrity_bits(headers_m, headers_v,
12684                                    integrity_items[0], is_l3_ip4);
12685         }
12686 }
12687
12688 static void
12689 flow_dv_translate_item_integrity(const struct rte_flow_item *item,
12690                                  const struct rte_flow_item *integrity_items[2],
12691                                  uint64_t *last_item)
12692 {
12693         const struct rte_flow_item_integrity *spec = (typeof(spec))item->spec;
12694
12695         /* integrity bits validation cleared spec pointer */
12696         MLX5_ASSERT(spec != NULL);
12697         if (spec->level > 1) {
12698                 integrity_items[1] = item;
12699                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
12700         } else {
12701                 integrity_items[0] = item;
12702                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
12703         }
12704 }
12705
12706 /**
12707  * Prepares DV flow counter with aging configuration.
12708  * Gets it by index when exists, creates a new one when doesn't.
12709  *
12710  * @param[in] dev
12711  *   Pointer to rte_eth_dev structure.
12712  * @param[in] dev_flow
12713  *   Pointer to the mlx5_flow.
12714  * @param[in, out] flow
12715  *   Pointer to the sub flow.
12716  * @param[in] count
12717  *   Pointer to the counter action configuration.
12718  * @param[in] age
12719  *   Pointer to the aging action configuration.
12720  * @param[out] error
12721  *   Pointer to the error structure.
12722  *
12723  * @return
12724  *   Pointer to the counter, NULL otherwise.
12725  */
12726 static struct mlx5_flow_counter *
12727 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12728                         struct mlx5_flow *dev_flow,
12729                         struct rte_flow *flow,
12730                         const struct rte_flow_action_count *count,
12731                         const struct rte_flow_action_age *age,
12732                         struct rte_flow_error *error)
12733 {
12734         if (!flow->counter) {
12735                 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12736                                                                  count, age);
12737                 if (!flow->counter) {
12738                         rte_flow_error_set(error, rte_errno,
12739                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12740                                            "cannot create counter object.");
12741                         return NULL;
12742                 }
12743         }
12744         return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12745 }
12746
12747 /*
12748  * Release an ASO CT action by its own device.
12749  *
12750  * @param[in] dev
12751  *   Pointer to the Ethernet device structure.
12752  * @param[in] idx
12753  *   Index of ASO CT action to release.
12754  *
12755  * @return
12756  *   0 when CT action was removed, otherwise the number of references.
12757  */
12758 static inline int
12759 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12760 {
12761         struct mlx5_priv *priv = dev->data->dev_private;
12762         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12763         uint32_t ret;
12764         struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12765         enum mlx5_aso_ct_state state =
12766                         __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12767
12768         /* Cannot release when CT is in the ASO SQ. */
12769         if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12770                 return -1;
12771         ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12772         if (!ret) {
12773                 if (ct->dr_action_orig) {
12774 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12775                         claim_zero(mlx5_glue->destroy_flow_action
12776                                         (ct->dr_action_orig));
12777 #endif
12778                         ct->dr_action_orig = NULL;
12779                 }
12780                 if (ct->dr_action_rply) {
12781 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12782                         claim_zero(mlx5_glue->destroy_flow_action
12783                                         (ct->dr_action_rply));
12784 #endif
12785                         ct->dr_action_rply = NULL;
12786                 }
12787                 /* Clear the state to free, no need in 1st allocation. */
12788                 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12789                 rte_spinlock_lock(&mng->ct_sl);
12790                 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12791                 rte_spinlock_unlock(&mng->ct_sl);
12792         }
12793         return (int)ret;
12794 }
12795
12796 static inline int
12797 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx,
12798                        struct rte_flow_error *error)
12799 {
12800         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12801         uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12802         struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12803         int ret;
12804
12805         MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12806         if (dev->data->dev_started != 1)
12807                 return rte_flow_error_set(error, EAGAIN,
12808                                           RTE_FLOW_ERROR_TYPE_ACTION,
12809                                           NULL,
12810                                           "Indirect CT action cannot be destroyed when the port is stopped");
12811         ret = flow_dv_aso_ct_dev_release(owndev, idx);
12812         if (ret < 0)
12813                 return rte_flow_error_set(error, EAGAIN,
12814                                           RTE_FLOW_ERROR_TYPE_ACTION,
12815                                           NULL,
12816                                           "Current state prevents indirect CT action from being destroyed");
12817         return ret;
12818 }
12819
12820 /*
12821  * Resize the ASO CT pools array by 64 pools.
12822  *
12823  * @param[in] dev
12824  *   Pointer to the Ethernet device structure.
12825  *
12826  * @return
12827  *   0 on success, otherwise negative errno value and rte_errno is set.
12828  */
12829 static int
12830 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12831 {
12832         struct mlx5_priv *priv = dev->data->dev_private;
12833         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12834         void *old_pools = mng->pools;
12835         /* Magic number now, need a macro. */
12836         uint32_t resize = mng->n + 64;
12837         uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12838         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12839
12840         if (!pools) {
12841                 rte_errno = ENOMEM;
12842                 return -rte_errno;
12843         }
12844         rte_rwlock_write_lock(&mng->resize_rwl);
12845         /* ASO SQ/QP was already initialized in the startup. */
12846         if (old_pools) {
12847                 /* Realloc could be an alternative choice. */
12848                 rte_memcpy(pools, old_pools,
12849                            mng->n * sizeof(struct mlx5_aso_ct_pool *));
12850                 mlx5_free(old_pools);
12851         }
12852         mng->n = resize;
12853         mng->pools = pools;
12854         rte_rwlock_write_unlock(&mng->resize_rwl);
12855         return 0;
12856 }
12857
12858 /*
12859  * Create and initialize a new ASO CT pool.
12860  *
12861  * @param[in] dev
12862  *   Pointer to the Ethernet device structure.
12863  * @param[out] ct_free
12864  *   Where to put the pointer of a new CT action.
12865  *
12866  * @return
12867  *   The CT actions pool pointer and @p ct_free is set on success,
12868  *   NULL otherwise and rte_errno is set.
12869  */
12870 static struct mlx5_aso_ct_pool *
12871 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12872                        struct mlx5_aso_ct_action **ct_free)
12873 {
12874         struct mlx5_priv *priv = dev->data->dev_private;
12875         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12876         struct mlx5_aso_ct_pool *pool = NULL;
12877         struct mlx5_devx_obj *obj = NULL;
12878         uint32_t i;
12879         uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12880
12881         obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->cdev->ctx,
12882                                                           priv->sh->cdev->pdn,
12883                                                           log_obj_size);
12884         if (!obj) {
12885                 rte_errno = ENODATA;
12886                 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12887                 return NULL;
12888         }
12889         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12890         if (!pool) {
12891                 rte_errno = ENOMEM;
12892                 claim_zero(mlx5_devx_cmd_destroy(obj));
12893                 return NULL;
12894         }
12895         pool->devx_obj = obj;
12896         pool->index = mng->next;
12897         /* Resize pools array if there is no room for the new pool in it. */
12898         if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12899                 claim_zero(mlx5_devx_cmd_destroy(obj));
12900                 mlx5_free(pool);
12901                 return NULL;
12902         }
12903         mng->pools[pool->index] = pool;
12904         mng->next++;
12905         /* Assign the first action in the new pool, the rest go to free list. */
12906         *ct_free = &pool->actions[0];
12907         /* Lock outside, the list operation is safe here. */
12908         for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12909                 /* refcnt is 0 when allocating the memory. */
12910                 pool->actions[i].offset = i;
12911                 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12912         }
12913         return pool;
12914 }
12915
12916 /*
12917  * Allocate a ASO CT action from free list.
12918  *
12919  * @param[in] dev
12920  *   Pointer to the Ethernet device structure.
12921  * @param[out] error
12922  *   Pointer to the error structure.
12923  *
12924  * @return
12925  *   Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12926  */
12927 static uint32_t
12928 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12929 {
12930         struct mlx5_priv *priv = dev->data->dev_private;
12931         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12932         struct mlx5_aso_ct_action *ct = NULL;
12933         struct mlx5_aso_ct_pool *pool;
12934         uint8_t reg_c;
12935         uint32_t ct_idx;
12936
12937         MLX5_ASSERT(mng);
12938         if (!priv->sh->cdev->config.devx) {
12939                 rte_errno = ENOTSUP;
12940                 return 0;
12941         }
12942         /* Get a free CT action, if no, a new pool will be created. */
12943         rte_spinlock_lock(&mng->ct_sl);
12944         ct = LIST_FIRST(&mng->free_cts);
12945         if (ct) {
12946                 LIST_REMOVE(ct, next);
12947         } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12948                 rte_spinlock_unlock(&mng->ct_sl);
12949                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12950                                    NULL, "failed to create ASO CT pool");
12951                 return 0;
12952         }
12953         rte_spinlock_unlock(&mng->ct_sl);
12954         pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12955         ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12956         /* 0: inactive, 1: created, 2+: used by flows. */
12957         __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12958         reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12959         if (!ct->dr_action_orig) {
12960 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12961                 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12962                         (priv->sh->rx_domain, pool->devx_obj->obj,
12963                          ct->offset,
12964                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12965                          reg_c - REG_C_0);
12966 #else
12967                 RTE_SET_USED(reg_c);
12968 #endif
12969                 if (!ct->dr_action_orig) {
12970                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12971                         rte_flow_error_set(error, rte_errno,
12972                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12973                                            "failed to create ASO CT action");
12974                         return 0;
12975                 }
12976         }
12977         if (!ct->dr_action_rply) {
12978 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12979                 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12980                         (priv->sh->rx_domain, pool->devx_obj->obj,
12981                          ct->offset,
12982                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12983                          reg_c - REG_C_0);
12984 #endif
12985                 if (!ct->dr_action_rply) {
12986                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12987                         rte_flow_error_set(error, rte_errno,
12988                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12989                                            "failed to create ASO CT action");
12990                         return 0;
12991                 }
12992         }
12993         return ct_idx;
12994 }
12995
12996 /*
12997  * Create a conntrack object with context and actions by using ASO mechanism.
12998  *
12999  * @param[in] dev
13000  *   Pointer to rte_eth_dev structure.
13001  * @param[in] pro
13002  *   Pointer to conntrack information profile.
13003  * @param[out] error
13004  *   Pointer to the error structure.
13005  *
13006  * @return
13007  *   Index to conntrack object on success, 0 otherwise.
13008  */
13009 static uint32_t
13010 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
13011                                    const struct rte_flow_action_conntrack *pro,
13012                                    struct rte_flow_error *error)
13013 {
13014         struct mlx5_priv *priv = dev->data->dev_private;
13015         struct mlx5_dev_ctx_shared *sh = priv->sh;
13016         struct mlx5_aso_ct_action *ct;
13017         uint32_t idx;
13018
13019         if (!sh->ct_aso_en)
13020                 return rte_flow_error_set(error, ENOTSUP,
13021                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
13022                                           "Connection is not supported");
13023         idx = flow_dv_aso_ct_alloc(dev, error);
13024         if (!idx)
13025                 return rte_flow_error_set(error, rte_errno,
13026                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
13027                                           "Failed to allocate CT object");
13028         ct = flow_aso_ct_get_by_dev_idx(dev, idx);
13029         if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
13030                 return rte_flow_error_set(error, EBUSY,
13031                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
13032                                           "Failed to update CT");
13033         ct->is_original = !!pro->is_original_dir;
13034         ct->peer = pro->peer_port;
13035         return idx;
13036 }
13037
13038 /**
13039  * Fill the flow with DV spec, lock free
13040  * (mutex should be acquired by caller).
13041  *
13042  * @param[in] dev
13043  *   Pointer to rte_eth_dev structure.
13044  * @param[in, out] dev_flow
13045  *   Pointer to the sub flow.
13046  * @param[in] attr
13047  *   Pointer to the flow attributes.
13048  * @param[in] items
13049  *   Pointer to the list of items.
13050  * @param[in] actions
13051  *   Pointer to the list of actions.
13052  * @param[out] error
13053  *   Pointer to the error structure.
13054  *
13055  * @return
13056  *   0 on success, a negative errno value otherwise and rte_errno is set.
13057  */
13058 static int
13059 flow_dv_translate(struct rte_eth_dev *dev,
13060                   struct mlx5_flow *dev_flow,
13061                   const struct rte_flow_attr *attr,
13062                   const struct rte_flow_item items[],
13063                   const struct rte_flow_action actions[],
13064                   struct rte_flow_error *error)
13065 {
13066         struct mlx5_priv *priv = dev->data->dev_private;
13067         struct mlx5_sh_config *dev_conf = &priv->sh->config;
13068         struct rte_flow *flow = dev_flow->flow;
13069         struct mlx5_flow_handle *handle = dev_flow->handle;
13070         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13071         struct mlx5_flow_rss_desc *rss_desc;
13072         uint64_t item_flags = 0;
13073         uint64_t last_item = 0;
13074         uint64_t action_flags = 0;
13075         struct mlx5_flow_dv_matcher matcher = {
13076                 .mask = {
13077                         .size = sizeof(matcher.mask.buf),
13078                 },
13079         };
13080         int actions_n = 0;
13081         bool actions_end = false;
13082         union {
13083                 struct mlx5_flow_dv_modify_hdr_resource res;
13084                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
13085                             sizeof(struct mlx5_modification_cmd) *
13086                             (MLX5_MAX_MODIFY_NUM + 1)];
13087         } mhdr_dummy;
13088         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
13089         const struct rte_flow_action_count *count = NULL;
13090         const struct rte_flow_action_age *non_shared_age = NULL;
13091         union flow_dv_attr flow_attr = { .attr = 0 };
13092         uint32_t tag_be;
13093         union mlx5_flow_tbl_key tbl_key;
13094         uint32_t modify_action_position = UINT32_MAX;
13095         void *match_mask = matcher.mask.buf;
13096         void *match_value = dev_flow->dv.value.buf;
13097         uint8_t next_protocol = 0xff;
13098         struct rte_vlan_hdr vlan = { 0 };
13099         struct mlx5_flow_dv_dest_array_resource mdest_res;
13100         struct mlx5_flow_dv_sample_resource sample_res;
13101         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13102         const struct rte_flow_action_sample *sample = NULL;
13103         struct mlx5_flow_sub_actions_list *sample_act;
13104         uint32_t sample_act_pos = UINT32_MAX;
13105         uint32_t age_act_pos = UINT32_MAX;
13106         uint32_t num_of_dest = 0;
13107         int tmp_actions_n = 0;
13108         uint32_t table;
13109         int ret = 0;
13110         const struct mlx5_flow_tunnel *tunnel = NULL;
13111         struct flow_grp_info grp_info = {
13112                 .external = !!dev_flow->external,
13113                 .transfer = !!attr->transfer,
13114                 .fdb_def_rule = !!priv->fdb_def_rule,
13115                 .skip_scale = dev_flow->skip_scale &
13116                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
13117                 .std_tbl_fix = true,
13118         };
13119         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
13120         const struct rte_flow_item *tunnel_item = NULL;
13121         const struct rte_flow_item *gre_item = NULL;
13122
13123         if (!wks)
13124                 return rte_flow_error_set(error, ENOMEM,
13125                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13126                                           NULL,
13127                                           "failed to push flow workspace");
13128         rss_desc = &wks->rss_desc;
13129         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
13130         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
13131         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
13132                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
13133         /* update normal path action resource into last index of array */
13134         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
13135         if (is_tunnel_offload_active(dev)) {
13136                 if (dev_flow->tunnel) {
13137                         RTE_VERIFY(dev_flow->tof_type ==
13138                                    MLX5_TUNNEL_OFFLOAD_MISS_RULE);
13139                         tunnel = dev_flow->tunnel;
13140                 } else {
13141                         tunnel = mlx5_get_tof(items, actions,
13142                                               &dev_flow->tof_type);
13143                         dev_flow->tunnel = tunnel;
13144                 }
13145                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
13146                                         (dev, attr, tunnel, dev_flow->tof_type);
13147         }
13148         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
13149                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
13150         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
13151                                        &grp_info, error);
13152         if (ret)
13153                 return ret;
13154         dev_flow->dv.group = table;
13155         if (attr->transfer)
13156                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
13157         /* number of actions must be set to 0 in case of dirty stack. */
13158         mhdr_res->actions_num = 0;
13159         if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
13160                 /*
13161                  * do not add decap action if match rule drops packet
13162                  * HW rejects rules with decap & drop
13163                  *
13164                  * if tunnel match rule was inserted before matching tunnel set
13165                  * rule flow table used in the match rule must be registered.
13166                  * current implementation handles that in the
13167                  * flow_dv_match_register() at the function end.
13168                  */
13169                 bool add_decap = true;
13170                 const struct rte_flow_action *ptr = actions;
13171
13172                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
13173                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
13174                                 add_decap = false;
13175                                 break;
13176                         }
13177                 }
13178                 if (add_decap) {
13179                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
13180                                                            attr->transfer,
13181                                                            error))
13182                                 return -rte_errno;
13183                         dev_flow->dv.actions[actions_n++] =
13184                                         dev_flow->dv.encap_decap->action;
13185                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13186                 }
13187         }
13188         for (; !actions_end ; actions++) {
13189                 const struct rte_flow_action_queue *queue;
13190                 const struct rte_flow_action_rss *rss;
13191                 const struct rte_flow_action *action = actions;
13192                 const uint8_t *rss_key;
13193                 struct mlx5_flow_tbl_resource *tbl;
13194                 struct mlx5_aso_age_action *age_act;
13195                 struct mlx5_flow_counter *cnt_act;
13196                 uint32_t port_id = 0;
13197                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
13198                 int action_type = actions->type;
13199                 const struct rte_flow_action *found_action = NULL;
13200                 uint32_t jump_group = 0;
13201                 uint32_t owner_idx;
13202                 struct mlx5_aso_ct_action *ct;
13203
13204                 if (!mlx5_flow_os_action_supported(action_type))
13205                         return rte_flow_error_set(error, ENOTSUP,
13206                                                   RTE_FLOW_ERROR_TYPE_ACTION,
13207                                                   actions,
13208                                                   "action not supported");
13209                 switch (action_type) {
13210                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
13211                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
13212                         break;
13213                 case RTE_FLOW_ACTION_TYPE_VOID:
13214                         break;
13215                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
13216                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
13217                         if (flow_dv_translate_action_port_id(dev, action,
13218                                                              &port_id, error))
13219                                 return -rte_errno;
13220                         port_id_resource.port_id = port_id;
13221                         MLX5_ASSERT(!handle->rix_port_id_action);
13222                         if (flow_dv_port_id_action_resource_register
13223                             (dev, &port_id_resource, dev_flow, error))
13224                                 return -rte_errno;
13225                         dev_flow->dv.actions[actions_n++] =
13226                                         dev_flow->dv.port_id_action->action;
13227                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
13228                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
13229                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
13230                         num_of_dest++;
13231                         break;
13232                 case RTE_FLOW_ACTION_TYPE_FLAG:
13233                         action_flags |= MLX5_FLOW_ACTION_FLAG;
13234                         wks->mark = 1;
13235                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
13236                                 struct rte_flow_action_mark mark = {
13237                                         .id = MLX5_FLOW_MARK_DEFAULT,
13238                                 };
13239
13240                                 if (flow_dv_convert_action_mark(dev, &mark,
13241                                                                 mhdr_res,
13242                                                                 error))
13243                                         return -rte_errno;
13244                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
13245                                 break;
13246                         }
13247                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
13248                         /*
13249                          * Only one FLAG or MARK is supported per device flow
13250                          * right now. So the pointer to the tag resource must be
13251                          * zero before the register process.
13252                          */
13253                         MLX5_ASSERT(!handle->dvh.rix_tag);
13254                         if (flow_dv_tag_resource_register(dev, tag_be,
13255                                                           dev_flow, error))
13256                                 return -rte_errno;
13257                         MLX5_ASSERT(dev_flow->dv.tag_resource);
13258                         dev_flow->dv.actions[actions_n++] =
13259                                         dev_flow->dv.tag_resource->action;
13260                         break;
13261                 case RTE_FLOW_ACTION_TYPE_MARK:
13262                         action_flags |= MLX5_FLOW_ACTION_MARK;
13263                         wks->mark = 1;
13264                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
13265                                 const struct rte_flow_action_mark *mark =
13266                                         (const struct rte_flow_action_mark *)
13267                                                 actions->conf;
13268
13269                                 if (flow_dv_convert_action_mark(dev, mark,
13270                                                                 mhdr_res,
13271                                                                 error))
13272                                         return -rte_errno;
13273                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
13274                                 break;
13275                         }
13276                         /* Fall-through */
13277                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
13278                         /* Legacy (non-extensive) MARK action. */
13279                         tag_be = mlx5_flow_mark_set
13280                               (((const struct rte_flow_action_mark *)
13281                                (actions->conf))->id);
13282                         MLX5_ASSERT(!handle->dvh.rix_tag);
13283                         if (flow_dv_tag_resource_register(dev, tag_be,
13284                                                           dev_flow, error))
13285                                 return -rte_errno;
13286                         MLX5_ASSERT(dev_flow->dv.tag_resource);
13287                         dev_flow->dv.actions[actions_n++] =
13288                                         dev_flow->dv.tag_resource->action;
13289                         break;
13290                 case RTE_FLOW_ACTION_TYPE_SET_META:
13291                         if (flow_dv_convert_action_set_meta
13292                                 (dev, mhdr_res, attr,
13293                                  (const struct rte_flow_action_set_meta *)
13294                                   actions->conf, error))
13295                                 return -rte_errno;
13296                         action_flags |= MLX5_FLOW_ACTION_SET_META;
13297                         break;
13298                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
13299                         if (flow_dv_convert_action_set_tag
13300                                 (dev, mhdr_res,
13301                                  (const struct rte_flow_action_set_tag *)
13302                                   actions->conf, error))
13303                                 return -rte_errno;
13304                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13305                         break;
13306                 case RTE_FLOW_ACTION_TYPE_DROP:
13307                         action_flags |= MLX5_FLOW_ACTION_DROP;
13308                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
13309                         break;
13310                 case RTE_FLOW_ACTION_TYPE_QUEUE:
13311                         queue = actions->conf;
13312                         rss_desc->queue_num = 1;
13313                         rss_desc->queue[0] = queue->index;
13314                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
13315                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
13316                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
13317                         num_of_dest++;
13318                         break;
13319                 case RTE_FLOW_ACTION_TYPE_RSS:
13320                         rss = actions->conf;
13321                         memcpy(rss_desc->queue, rss->queue,
13322                                rss->queue_num * sizeof(uint16_t));
13323                         rss_desc->queue_num = rss->queue_num;
13324                         /* NULL RSS key indicates default RSS key. */
13325                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
13326                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
13327                         /*
13328                          * rss->level and rss.types should be set in advance
13329                          * when expanding items for RSS.
13330                          */
13331                         action_flags |= MLX5_FLOW_ACTION_RSS;
13332                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
13333                                 MLX5_FLOW_FATE_SHARED_RSS :
13334                                 MLX5_FLOW_FATE_QUEUE;
13335                         break;
13336                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
13337                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13338                         age_act = flow_aso_age_get_by_idx(dev, owner_idx);
13339                         if (flow->age == 0) {
13340                                 flow->age = owner_idx;
13341                                 __atomic_fetch_add(&age_act->refcnt, 1,
13342                                                    __ATOMIC_RELAXED);
13343                         }
13344                         age_act_pos = actions_n++;
13345                         action_flags |= MLX5_FLOW_ACTION_AGE;
13346                         break;
13347                 case RTE_FLOW_ACTION_TYPE_AGE:
13348                         non_shared_age = action->conf;
13349                         age_act_pos = actions_n++;
13350                         action_flags |= MLX5_FLOW_ACTION_AGE;
13351                         break;
13352                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
13353                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13354                         cnt_act = flow_dv_counter_get_by_idx(dev, owner_idx,
13355                                                              NULL);
13356                         MLX5_ASSERT(cnt_act != NULL);
13357                         /**
13358                          * When creating meter drop flow in drop table, the
13359                          * counter should not overwrite the rte flow counter.
13360                          */
13361                         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13362                             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP) {
13363                                 dev_flow->dv.actions[actions_n++] =
13364                                                         cnt_act->action;
13365                         } else {
13366                                 if (flow->counter == 0) {
13367                                         flow->counter = owner_idx;
13368                                         __atomic_fetch_add
13369                                                 (&cnt_act->shared_info.refcnt,
13370                                                  1, __ATOMIC_RELAXED);
13371                                 }
13372                                 /* Save information first, will apply later. */
13373                                 action_flags |= MLX5_FLOW_ACTION_COUNT;
13374                         }
13375                         break;
13376                 case RTE_FLOW_ACTION_TYPE_COUNT:
13377                         if (!priv->sh->cdev->config.devx) {
13378                                 return rte_flow_error_set
13379                                               (error, ENOTSUP,
13380                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13381                                                NULL,
13382                                                "count action not supported");
13383                         }
13384                         /* Save information first, will apply later. */
13385                         count = action->conf;
13386                         action_flags |= MLX5_FLOW_ACTION_COUNT;
13387                         break;
13388                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
13389                         dev_flow->dv.actions[actions_n++] =
13390                                                 priv->sh->pop_vlan_action;
13391                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
13392                         break;
13393                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
13394                         if (!(action_flags &
13395                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
13396                                 flow_dev_get_vlan_info_from_items(items, &vlan);
13397                         vlan.eth_proto = rte_be_to_cpu_16
13398                              ((((const struct rte_flow_action_of_push_vlan *)
13399                                                    actions->conf)->ethertype));
13400                         found_action = mlx5_flow_find_action
13401                                         (actions + 1,
13402                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
13403                         if (found_action)
13404                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
13405                         found_action = mlx5_flow_find_action
13406                                         (actions + 1,
13407                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
13408                         if (found_action)
13409                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
13410                         if (flow_dv_create_action_push_vlan
13411                                             (dev, attr, &vlan, dev_flow, error))
13412                                 return -rte_errno;
13413                         dev_flow->dv.actions[actions_n++] =
13414                                         dev_flow->dv.push_vlan_res->action;
13415                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
13416                         break;
13417                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
13418                         /* of_vlan_push action handled this action */
13419                         MLX5_ASSERT(action_flags &
13420                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
13421                         break;
13422                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
13423                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
13424                                 break;
13425                         flow_dev_get_vlan_info_from_items(items, &vlan);
13426                         mlx5_update_vlan_vid_pcp(actions, &vlan);
13427                         /* If no VLAN push - this is a modify header action */
13428                         if (flow_dv_convert_action_modify_vlan_vid
13429                                                 (mhdr_res, actions, error))
13430                                 return -rte_errno;
13431                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
13432                         break;
13433                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
13434                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
13435                         if (flow_dv_create_action_l2_encap(dev, actions,
13436                                                            dev_flow,
13437                                                            attr->transfer,
13438                                                            error))
13439                                 return -rte_errno;
13440                         dev_flow->dv.actions[actions_n++] =
13441                                         dev_flow->dv.encap_decap->action;
13442                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
13443                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13444                                 sample_act->action_flags |=
13445                                                         MLX5_FLOW_ACTION_ENCAP;
13446                         break;
13447                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
13448                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
13449                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
13450                                                            attr->transfer,
13451                                                            error))
13452                                 return -rte_errno;
13453                         dev_flow->dv.actions[actions_n++] =
13454                                         dev_flow->dv.encap_decap->action;
13455                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13456                         break;
13457                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
13458                         /* Handle encap with preceding decap. */
13459                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
13460                                 if (flow_dv_create_action_raw_encap
13461                                         (dev, actions, dev_flow, attr, error))
13462                                         return -rte_errno;
13463                                 dev_flow->dv.actions[actions_n++] =
13464                                         dev_flow->dv.encap_decap->action;
13465                         } else {
13466                                 /* Handle encap without preceding decap. */
13467                                 if (flow_dv_create_action_l2_encap
13468                                     (dev, actions, dev_flow, attr->transfer,
13469                                      error))
13470                                         return -rte_errno;
13471                                 dev_flow->dv.actions[actions_n++] =
13472                                         dev_flow->dv.encap_decap->action;
13473                         }
13474                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
13475                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13476                                 sample_act->action_flags |=
13477                                                         MLX5_FLOW_ACTION_ENCAP;
13478                         break;
13479                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
13480                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
13481                                 ;
13482                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
13483                                 if (flow_dv_create_action_l2_decap
13484                                     (dev, dev_flow, attr->transfer, error))
13485                                         return -rte_errno;
13486                                 dev_flow->dv.actions[actions_n++] =
13487                                         dev_flow->dv.encap_decap->action;
13488                         }
13489                         /* If decap is followed by encap, handle it at encap. */
13490                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13491                         break;
13492                 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
13493                         dev_flow->dv.actions[actions_n++] =
13494                                 (void *)(uintptr_t)action->conf;
13495                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13496                         break;
13497                 case RTE_FLOW_ACTION_TYPE_JUMP:
13498                         jump_group = ((const struct rte_flow_action_jump *)
13499                                                         action->conf)->group;
13500                         grp_info.std_tbl_fix = 0;
13501                         if (dev_flow->skip_scale &
13502                                 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
13503                                 grp_info.skip_scale = 1;
13504                         else
13505                                 grp_info.skip_scale = 0;
13506                         ret = mlx5_flow_group_to_table(dev, tunnel,
13507                                                        jump_group,
13508                                                        &table,
13509                                                        &grp_info, error);
13510                         if (ret)
13511                                 return ret;
13512                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
13513                                                        attr->transfer,
13514                                                        !!dev_flow->external,
13515                                                        tunnel, jump_group, 0,
13516                                                        0, error);
13517                         if (!tbl)
13518                                 return rte_flow_error_set
13519                                                 (error, errno,
13520                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13521                                                  NULL,
13522                                                  "cannot create jump action.");
13523                         if (flow_dv_jump_tbl_resource_register
13524                             (dev, tbl, dev_flow, error)) {
13525                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
13526                                 return rte_flow_error_set
13527                                                 (error, errno,
13528                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13529                                                  NULL,
13530                                                  "cannot create jump action.");
13531                         }
13532                         dev_flow->dv.actions[actions_n++] =
13533                                         dev_flow->dv.jump->action;
13534                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13535                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
13536                         sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
13537                         num_of_dest++;
13538                         break;
13539                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
13540                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
13541                         if (flow_dv_convert_action_modify_mac
13542                                         (mhdr_res, actions, error))
13543                                 return -rte_errno;
13544                         action_flags |= actions->type ==
13545                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
13546                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
13547                                         MLX5_FLOW_ACTION_SET_MAC_DST;
13548                         break;
13549                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
13550                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
13551                         if (flow_dv_convert_action_modify_ipv4
13552                                         (mhdr_res, actions, error))
13553                                 return -rte_errno;
13554                         action_flags |= actions->type ==
13555                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
13556                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
13557                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
13558                         break;
13559                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
13560                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
13561                         if (flow_dv_convert_action_modify_ipv6
13562                                         (mhdr_res, actions, error))
13563                                 return -rte_errno;
13564                         action_flags |= actions->type ==
13565                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13566                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
13567                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
13568                         break;
13569                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13570                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13571                         if (flow_dv_convert_action_modify_tp
13572                                         (mhdr_res, actions, items,
13573                                          &flow_attr, dev_flow, !!(action_flags &
13574                                          MLX5_FLOW_ACTION_DECAP), error))
13575                                 return -rte_errno;
13576                         action_flags |= actions->type ==
13577                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13578                                         MLX5_FLOW_ACTION_SET_TP_SRC :
13579                                         MLX5_FLOW_ACTION_SET_TP_DST;
13580                         break;
13581                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13582                         if (flow_dv_convert_action_modify_dec_ttl
13583                                         (mhdr_res, items, &flow_attr, dev_flow,
13584                                          !!(action_flags &
13585                                          MLX5_FLOW_ACTION_DECAP), error))
13586                                 return -rte_errno;
13587                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13588                         break;
13589                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13590                         if (flow_dv_convert_action_modify_ttl
13591                                         (mhdr_res, actions, items, &flow_attr,
13592                                          dev_flow, !!(action_flags &
13593                                          MLX5_FLOW_ACTION_DECAP), error))
13594                                 return -rte_errno;
13595                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13596                         break;
13597                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13598                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13599                         if (flow_dv_convert_action_modify_tcp_seq
13600                                         (mhdr_res, actions, error))
13601                                 return -rte_errno;
13602                         action_flags |= actions->type ==
13603                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13604                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
13605                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13606                         break;
13607
13608                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13609                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13610                         if (flow_dv_convert_action_modify_tcp_ack
13611                                         (mhdr_res, actions, error))
13612                                 return -rte_errno;
13613                         action_flags |= actions->type ==
13614                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13615                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
13616                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
13617                         break;
13618                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13619                         if (flow_dv_convert_action_set_reg
13620                                         (mhdr_res, actions, error))
13621                                 return -rte_errno;
13622                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13623                         break;
13624                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13625                         if (flow_dv_convert_action_copy_mreg
13626                                         (dev, mhdr_res, actions, error))
13627                                 return -rte_errno;
13628                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13629                         break;
13630                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13631                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13632                         dev_flow->handle->fate_action =
13633                                         MLX5_FLOW_FATE_DEFAULT_MISS;
13634                         break;
13635                 case RTE_FLOW_ACTION_TYPE_METER:
13636                         if (!wks->fm)
13637                                 return rte_flow_error_set(error, rte_errno,
13638                                         RTE_FLOW_ERROR_TYPE_ACTION,
13639                                         NULL, "Failed to get meter in flow.");
13640                         /* Set the meter action. */
13641                         dev_flow->dv.actions[actions_n++] =
13642                                 wks->fm->meter_action_g;
13643                         action_flags |= MLX5_FLOW_ACTION_METER;
13644                         break;
13645                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13646                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13647                                                               actions, error))
13648                                 return -rte_errno;
13649                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13650                         break;
13651                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13652                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13653                                                               actions, error))
13654                                 return -rte_errno;
13655                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13656                         break;
13657                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13658                         sample_act_pos = actions_n;
13659                         sample = (const struct rte_flow_action_sample *)
13660                                  action->conf;
13661                         actions_n++;
13662                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13663                         /* put encap action into group if work with port id */
13664                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13665                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13666                                 sample_act->action_flags |=
13667                                                         MLX5_FLOW_ACTION_ENCAP;
13668                         break;
13669                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13670                         if (flow_dv_convert_action_modify_field
13671                                         (dev, mhdr_res, actions, attr, error))
13672                                 return -rte_errno;
13673                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13674                         break;
13675                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13676                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13677                         ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13678                         if (!ct)
13679                                 return rte_flow_error_set(error, EINVAL,
13680                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13681                                                 NULL,
13682                                                 "Failed to get CT object.");
13683                         if (mlx5_aso_ct_available(priv->sh, ct))
13684                                 return rte_flow_error_set(error, rte_errno,
13685                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13686                                                 NULL,
13687                                                 "CT is unavailable.");
13688                         if (ct->is_original)
13689                                 dev_flow->dv.actions[actions_n] =
13690                                                         ct->dr_action_orig;
13691                         else
13692                                 dev_flow->dv.actions[actions_n] =
13693                                                         ct->dr_action_rply;
13694                         if (flow->ct == 0) {
13695                                 flow->indirect_type =
13696                                                 MLX5_INDIRECT_ACTION_TYPE_CT;
13697                                 flow->ct = owner_idx;
13698                                 __atomic_fetch_add(&ct->refcnt, 1,
13699                                                    __ATOMIC_RELAXED);
13700                         }
13701                         actions_n++;
13702                         action_flags |= MLX5_FLOW_ACTION_CT;
13703                         break;
13704                 case RTE_FLOW_ACTION_TYPE_END:
13705                         actions_end = true;
13706                         if (mhdr_res->actions_num) {
13707                                 /* create modify action if needed. */
13708                                 if (flow_dv_modify_hdr_resource_register
13709                                         (dev, mhdr_res, dev_flow, error))
13710                                         return -rte_errno;
13711                                 dev_flow->dv.actions[modify_action_position] =
13712                                         handle->dvh.modify_hdr->action;
13713                         }
13714                         /*
13715                          * Handle AGE and COUNT action by single HW counter
13716                          * when they are not shared.
13717                          */
13718                         if (action_flags & MLX5_FLOW_ACTION_AGE) {
13719                                 if ((non_shared_age && count) ||
13720                                     !flow_hit_aso_supported(priv->sh, attr)) {
13721                                         /* Creates age by counters. */
13722                                         cnt_act = flow_dv_prepare_counter
13723                                                                 (dev, dev_flow,
13724                                                                  flow, count,
13725                                                                  non_shared_age,
13726                                                                  error);
13727                                         if (!cnt_act)
13728                                                 return -rte_errno;
13729                                         dev_flow->dv.actions[age_act_pos] =
13730                                                                 cnt_act->action;
13731                                         break;
13732                                 }
13733                                 if (!flow->age && non_shared_age) {
13734                                         flow->age = flow_dv_aso_age_alloc
13735                                                                 (dev, error);
13736                                         if (!flow->age)
13737                                                 return -rte_errno;
13738                                         flow_dv_aso_age_params_init
13739                                                     (dev, flow->age,
13740                                                      non_shared_age->context ?
13741                                                      non_shared_age->context :
13742                                                      (void *)(uintptr_t)
13743                                                      (dev_flow->flow_idx),
13744                                                      non_shared_age->timeout);
13745                                 }
13746                                 age_act = flow_aso_age_get_by_idx(dev,
13747                                                                   flow->age);
13748                                 dev_flow->dv.actions[age_act_pos] =
13749                                                              age_act->dr_action;
13750                         }
13751                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13752                                 /*
13753                                  * Create one count action, to be used
13754                                  * by all sub-flows.
13755                                  */
13756                                 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13757                                                                   flow, count,
13758                                                                   NULL, error);
13759                                 if (!cnt_act)
13760                                         return -rte_errno;
13761                                 dev_flow->dv.actions[actions_n++] =
13762                                                                 cnt_act->action;
13763                         }
13764                 default:
13765                         break;
13766                 }
13767                 if (mhdr_res->actions_num &&
13768                     modify_action_position == UINT32_MAX)
13769                         modify_action_position = actions_n++;
13770         }
13771         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13772                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13773                 int item_type = items->type;
13774
13775                 if (!mlx5_flow_os_item_supported(item_type))
13776                         return rte_flow_error_set(error, ENOTSUP,
13777                                                   RTE_FLOW_ERROR_TYPE_ITEM,
13778                                                   NULL, "item not supported");
13779                 switch (item_type) {
13780                 case RTE_FLOW_ITEM_TYPE_ESP:
13781                         flow_dv_translate_item_esp(match_mask, match_value,
13782                                                    items, tunnel);
13783                         last_item = MLX5_FLOW_ITEM_ESP;
13784                         break;
13785                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13786                         flow_dv_translate_item_port_id
13787                                 (dev, match_mask, match_value, items, attr);
13788                         last_item = MLX5_FLOW_ITEM_PORT_ID;
13789                         break;
13790                 case RTE_FLOW_ITEM_TYPE_REPRESENTED_PORT:
13791                         flow_dv_translate_item_represented_port
13792                                 (dev, match_mask, match_value, items, attr);
13793                         last_item = MLX5_FLOW_ITEM_REPRESENTED_PORT;
13794                         break;
13795                 case RTE_FLOW_ITEM_TYPE_ETH:
13796                         flow_dv_translate_item_eth(match_mask, match_value,
13797                                                    items, tunnel,
13798                                                    dev_flow->dv.group);
13799                         matcher.priority = action_flags &
13800                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
13801                                         !dev_flow->external ?
13802                                         MLX5_PRIORITY_MAP_L3 :
13803                                         MLX5_PRIORITY_MAP_L2;
13804                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13805                                              MLX5_FLOW_LAYER_OUTER_L2;
13806                         break;
13807                 case RTE_FLOW_ITEM_TYPE_VLAN:
13808                         flow_dv_translate_item_vlan(dev_flow,
13809                                                     match_mask, match_value,
13810                                                     items, tunnel,
13811                                                     dev_flow->dv.group);
13812                         matcher.priority = MLX5_PRIORITY_MAP_L2;
13813                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13814                                               MLX5_FLOW_LAYER_INNER_VLAN) :
13815                                              (MLX5_FLOW_LAYER_OUTER_L2 |
13816                                               MLX5_FLOW_LAYER_OUTER_VLAN);
13817                         break;
13818                 case RTE_FLOW_ITEM_TYPE_IPV4:
13819                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13820                                                   &item_flags, &tunnel);
13821                         flow_dv_translate_item_ipv4(match_mask, match_value,
13822                                                     items, tunnel,
13823                                                     dev_flow->dv.group);
13824                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13825                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13826                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13827                         if (items->mask != NULL &&
13828                             ((const struct rte_flow_item_ipv4 *)
13829                              items->mask)->hdr.next_proto_id) {
13830                                 next_protocol =
13831                                         ((const struct rte_flow_item_ipv4 *)
13832                                          (items->spec))->hdr.next_proto_id;
13833                                 next_protocol &=
13834                                         ((const struct rte_flow_item_ipv4 *)
13835                                          (items->mask))->hdr.next_proto_id;
13836                         } else {
13837                                 /* Reset for inner layer. */
13838                                 next_protocol = 0xff;
13839                         }
13840                         break;
13841                 case RTE_FLOW_ITEM_TYPE_IPV6:
13842                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13843                                                   &item_flags, &tunnel);
13844                         flow_dv_translate_item_ipv6(match_mask, match_value,
13845                                                     items, tunnel,
13846                                                     dev_flow->dv.group);
13847                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13848                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13849                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13850                         if (items->mask != NULL &&
13851                             ((const struct rte_flow_item_ipv6 *)
13852                              items->mask)->hdr.proto) {
13853                                 next_protocol =
13854                                         ((const struct rte_flow_item_ipv6 *)
13855                                          items->spec)->hdr.proto;
13856                                 next_protocol &=
13857                                         ((const struct rte_flow_item_ipv6 *)
13858                                          items->mask)->hdr.proto;
13859                         } else {
13860                                 /* Reset for inner layer. */
13861                                 next_protocol = 0xff;
13862                         }
13863                         break;
13864                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13865                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
13866                                                              match_value,
13867                                                              items, tunnel);
13868                         last_item = tunnel ?
13869                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13870                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13871                         if (items->mask != NULL &&
13872                             ((const struct rte_flow_item_ipv6_frag_ext *)
13873                              items->mask)->hdr.next_header) {
13874                                 next_protocol =
13875                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13876                                  items->spec)->hdr.next_header;
13877                                 next_protocol &=
13878                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13879                                  items->mask)->hdr.next_header;
13880                         } else {
13881                                 /* Reset for inner layer. */
13882                                 next_protocol = 0xff;
13883                         }
13884                         break;
13885                 case RTE_FLOW_ITEM_TYPE_TCP:
13886                         flow_dv_translate_item_tcp(match_mask, match_value,
13887                                                    items, tunnel);
13888                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13889                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13890                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
13891                         break;
13892                 case RTE_FLOW_ITEM_TYPE_UDP:
13893                         flow_dv_translate_item_udp(match_mask, match_value,
13894                                                    items, tunnel);
13895                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13896                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13897                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
13898                         break;
13899                 case RTE_FLOW_ITEM_TYPE_GRE:
13900                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13901                         last_item = MLX5_FLOW_LAYER_GRE;
13902                         tunnel_item = items;
13903                         gre_item = items;
13904                         break;
13905                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13906                         flow_dv_translate_item_gre_key(match_mask,
13907                                                        match_value, items);
13908                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
13909                         break;
13910                 case RTE_FLOW_ITEM_TYPE_GRE_OPTION:
13911                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13912                         last_item = MLX5_FLOW_LAYER_GRE;
13913                         tunnel_item = items;
13914                         break;
13915                 case RTE_FLOW_ITEM_TYPE_NVGRE:
13916                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13917                         last_item = MLX5_FLOW_LAYER_GRE;
13918                         tunnel_item = items;
13919                         break;
13920                 case RTE_FLOW_ITEM_TYPE_VXLAN:
13921                         flow_dv_translate_item_vxlan(dev, attr,
13922                                                      match_mask, match_value,
13923                                                      items, tunnel);
13924                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13925                         last_item = MLX5_FLOW_LAYER_VXLAN;
13926                         break;
13927                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13928                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13929                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13930                         tunnel_item = items;
13931                         break;
13932                 case RTE_FLOW_ITEM_TYPE_GENEVE:
13933                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13934                         last_item = MLX5_FLOW_LAYER_GENEVE;
13935                         tunnel_item = items;
13936                         break;
13937                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13938                         ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13939                                                           match_value,
13940                                                           items, error);
13941                         if (ret)
13942                                 return rte_flow_error_set(error, -ret,
13943                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13944                                         "cannot create GENEVE TLV option");
13945                         flow->geneve_tlv_option = 1;
13946                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13947                         break;
13948                 case RTE_FLOW_ITEM_TYPE_MPLS:
13949                         flow_dv_translate_item_mpls(match_mask, match_value,
13950                                                     items, last_item, tunnel);
13951                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13952                         last_item = MLX5_FLOW_LAYER_MPLS;
13953                         break;
13954                 case RTE_FLOW_ITEM_TYPE_MARK:
13955                         flow_dv_translate_item_mark(dev, match_mask,
13956                                                     match_value, items);
13957                         last_item = MLX5_FLOW_ITEM_MARK;
13958                         break;
13959                 case RTE_FLOW_ITEM_TYPE_META:
13960                         flow_dv_translate_item_meta(dev, match_mask,
13961                                                     match_value, attr, items);
13962                         last_item = MLX5_FLOW_ITEM_METADATA;
13963                         break;
13964                 case RTE_FLOW_ITEM_TYPE_ICMP:
13965                         flow_dv_translate_item_icmp(match_mask, match_value,
13966                                                     items, tunnel);
13967                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13968                         last_item = MLX5_FLOW_LAYER_ICMP;
13969                         break;
13970                 case RTE_FLOW_ITEM_TYPE_ICMP6:
13971                         flow_dv_translate_item_icmp6(match_mask, match_value,
13972                                                       items, tunnel);
13973                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13974                         last_item = MLX5_FLOW_LAYER_ICMP6;
13975                         break;
13976                 case RTE_FLOW_ITEM_TYPE_TAG:
13977                         flow_dv_translate_item_tag(dev, match_mask,
13978                                                    match_value, items);
13979                         last_item = MLX5_FLOW_ITEM_TAG;
13980                         break;
13981                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13982                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
13983                                                         match_value, items);
13984                         last_item = MLX5_FLOW_ITEM_TAG;
13985                         break;
13986                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13987                         flow_dv_translate_item_tx_queue(dev, match_mask,
13988                                                         match_value,
13989                                                         items);
13990                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13991                         break;
13992                 case RTE_FLOW_ITEM_TYPE_GTP:
13993                         flow_dv_translate_item_gtp(match_mask, match_value,
13994                                                    items, tunnel);
13995                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13996                         last_item = MLX5_FLOW_LAYER_GTP;
13997                         break;
13998                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13999                         ret = flow_dv_translate_item_gtp_psc(match_mask,
14000                                                           match_value,
14001                                                           items);
14002                         if (ret)
14003                                 return rte_flow_error_set(error, -ret,
14004                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
14005                                         "cannot create GTP PSC item");
14006                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
14007                         break;
14008                 case RTE_FLOW_ITEM_TYPE_ECPRI:
14009                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
14010                                 /* Create it only the first time to be used. */
14011                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
14012                                 if (ret)
14013                                         return rte_flow_error_set
14014                                                 (error, -ret,
14015                                                 RTE_FLOW_ERROR_TYPE_ITEM,
14016                                                 NULL,
14017                                                 "cannot create eCPRI parser");
14018                         }
14019                         flow_dv_translate_item_ecpri(dev, match_mask,
14020                                                      match_value, items,
14021                                                      last_item);
14022                         /* No other protocol should follow eCPRI layer. */
14023                         last_item = MLX5_FLOW_LAYER_ECPRI;
14024                         break;
14025                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
14026                         flow_dv_translate_item_integrity(items, integrity_items,
14027                                                          &last_item);
14028                         break;
14029                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
14030                         flow_dv_translate_item_aso_ct(dev, match_mask,
14031                                                       match_value, items);
14032                         break;
14033                 case RTE_FLOW_ITEM_TYPE_FLEX:
14034                         flow_dv_translate_item_flex(dev, match_mask,
14035                                                     match_value, items,
14036                                                     dev_flow, tunnel != 0);
14037                         last_item = tunnel ? MLX5_FLOW_ITEM_INNER_FLEX :
14038                                     MLX5_FLOW_ITEM_OUTER_FLEX;
14039                         break;
14040                 default:
14041                         break;
14042                 }
14043                 item_flags |= last_item;
14044         }
14045         /*
14046          * When E-Switch mode is enabled, we have two cases where we need to
14047          * set the source port manually.
14048          * The first one, is in case of NIC ingress steering rule, and the
14049          * second is E-Switch rule where no port_id item was found.
14050          * In both cases the source port is set according the current port
14051          * in use.
14052          */
14053         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
14054             !(item_flags & MLX5_FLOW_ITEM_REPRESENTED_PORT) && priv->sh->esw_mode &&
14055             !(attr->egress && !attr->transfer)) {
14056                 if (flow_dv_translate_item_port_id(dev, match_mask,
14057                                                    match_value, NULL, attr))
14058                         return -rte_errno;
14059         }
14060         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
14061                 flow_dv_translate_item_integrity_post(match_mask, match_value,
14062                                                       integrity_items,
14063                                                       item_flags);
14064         }
14065         if (item_flags & MLX5_FLOW_LAYER_VXLAN_GPE)
14066                 flow_dv_translate_item_vxlan_gpe(match_mask, match_value,
14067                                                  tunnel_item, item_flags);
14068         else if (item_flags & MLX5_FLOW_LAYER_GENEVE)
14069                 flow_dv_translate_item_geneve(match_mask, match_value,
14070                                               tunnel_item, item_flags);
14071         else if (item_flags & MLX5_FLOW_LAYER_GRE) {
14072                 if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_GRE)
14073                         flow_dv_translate_item_gre(match_mask, match_value,
14074                                                    tunnel_item, item_flags);
14075                 else if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_NVGRE)
14076                         flow_dv_translate_item_nvgre(match_mask, match_value,
14077                                                      tunnel_item, item_flags);
14078                 else if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_GRE_OPTION)
14079                         flow_dv_translate_item_gre_option(match_mask, match_value,
14080                                         tunnel_item, gre_item, item_flags);
14081                 else
14082                         MLX5_ASSERT(false);
14083         }
14084 #ifdef RTE_LIBRTE_MLX5_DEBUG
14085         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
14086                                               dev_flow->dv.value.buf));
14087 #endif
14088         /*
14089          * Layers may be already initialized from prefix flow if this dev_flow
14090          * is the suffix flow.
14091          */
14092         handle->layers |= item_flags;
14093         if (action_flags & MLX5_FLOW_ACTION_RSS)
14094                 flow_dv_hashfields_set(dev_flow->handle->layers,
14095                                        rss_desc,
14096                                        &dev_flow->hash_fields);
14097         /* If has RSS action in the sample action, the Sample/Mirror resource
14098          * should be registered after the hash filed be update.
14099          */
14100         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
14101                 ret = flow_dv_translate_action_sample(dev,
14102                                                       sample,
14103                                                       dev_flow, attr,
14104                                                       &num_of_dest,
14105                                                       sample_actions,
14106                                                       &sample_res,
14107                                                       error);
14108                 if (ret < 0)
14109                         return ret;
14110                 ret = flow_dv_create_action_sample(dev,
14111                                                    dev_flow,
14112                                                    num_of_dest,
14113                                                    &sample_res,
14114                                                    &mdest_res,
14115                                                    sample_actions,
14116                                                    action_flags,
14117                                                    error);
14118                 if (ret < 0)
14119                         return rte_flow_error_set
14120                                                 (error, rte_errno,
14121                                                 RTE_FLOW_ERROR_TYPE_ACTION,
14122                                                 NULL,
14123                                                 "cannot create sample action");
14124                 if (num_of_dest > 1) {
14125                         dev_flow->dv.actions[sample_act_pos] =
14126                         dev_flow->dv.dest_array_res->action;
14127                 } else {
14128                         dev_flow->dv.actions[sample_act_pos] =
14129                         dev_flow->dv.sample_res->verbs_action;
14130                 }
14131         }
14132         /*
14133          * For multiple destination (sample action with ratio=1), the encap
14134          * action and port id action will be combined into group action.
14135          * So need remove the original these actions in the flow and only
14136          * use the sample action instead of.
14137          */
14138         if (num_of_dest > 1 &&
14139             (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
14140                 int i;
14141                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
14142
14143                 for (i = 0; i < actions_n; i++) {
14144                         if ((sample_act->dr_encap_action &&
14145                                 sample_act->dr_encap_action ==
14146                                 dev_flow->dv.actions[i]) ||
14147                                 (sample_act->dr_port_id_action &&
14148                                 sample_act->dr_port_id_action ==
14149                                 dev_flow->dv.actions[i]) ||
14150                                 (sample_act->dr_jump_action &&
14151                                 sample_act->dr_jump_action ==
14152                                 dev_flow->dv.actions[i]))
14153                                 continue;
14154                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
14155                 }
14156                 memcpy((void *)dev_flow->dv.actions,
14157                                 (void *)temp_actions,
14158                                 tmp_actions_n * sizeof(void *));
14159                 actions_n = tmp_actions_n;
14160         }
14161         dev_flow->dv.actions_n = actions_n;
14162         dev_flow->act_flags = action_flags;
14163         if (wks->skip_matcher_reg)
14164                 return 0;
14165         /* Register matcher. */
14166         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
14167                                     matcher.mask.size);
14168         matcher.priority = mlx5_get_matcher_priority(dev, attr,
14169                                                      matcher.priority,
14170                                                      dev_flow->external);
14171         /**
14172          * When creating meter drop flow in drop table, using original
14173          * 5-tuple match, the matcher priority should be lower than
14174          * mtr_id matcher.
14175          */
14176         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
14177             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
14178             matcher.priority <= MLX5_REG_BITS)
14179                 matcher.priority += MLX5_REG_BITS;
14180         /* reserved field no needs to be set to 0 here. */
14181         tbl_key.is_fdb = attr->transfer;
14182         tbl_key.is_egress = attr->egress;
14183         tbl_key.level = dev_flow->dv.group;
14184         tbl_key.id = dev_flow->dv.table_id;
14185         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
14186                                      tunnel, attr->group, error))
14187                 return -rte_errno;
14188         return 0;
14189 }
14190
14191 /**
14192  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
14193  * and tunnel.
14194  *
14195  * @param[in, out] action
14196  *   Shred RSS action holding hash RX queue objects.
14197  * @param[in] hash_fields
14198  *   Defines combination of packet fields to participate in RX hash.
14199  * @param[in] tunnel
14200  *   Tunnel type
14201  * @param[in] hrxq_idx
14202  *   Hash RX queue index to set.
14203  *
14204  * @return
14205  *   0 on success, otherwise negative errno value.
14206  */
14207 static int
14208 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
14209                               const uint64_t hash_fields,
14210                               uint32_t hrxq_idx)
14211 {
14212         uint32_t *hrxqs = action->hrxq;
14213
14214         switch (hash_fields & ~IBV_RX_HASH_INNER) {
14215         case MLX5_RSS_HASH_IPV4:
14216                 /* fall-through. */
14217         case MLX5_RSS_HASH_IPV4_DST_ONLY:
14218                 /* fall-through. */
14219         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
14220                 hrxqs[0] = hrxq_idx;
14221                 return 0;
14222         case MLX5_RSS_HASH_IPV4_TCP:
14223                 /* fall-through. */
14224         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
14225                 /* fall-through. */
14226         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
14227                 hrxqs[1] = hrxq_idx;
14228                 return 0;
14229         case MLX5_RSS_HASH_IPV4_UDP:
14230                 /* fall-through. */
14231         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
14232                 /* fall-through. */
14233         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
14234                 hrxqs[2] = hrxq_idx;
14235                 return 0;
14236         case MLX5_RSS_HASH_IPV6:
14237                 /* fall-through. */
14238         case MLX5_RSS_HASH_IPV6_DST_ONLY:
14239                 /* fall-through. */
14240         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
14241                 hrxqs[3] = hrxq_idx;
14242                 return 0;
14243         case MLX5_RSS_HASH_IPV6_TCP:
14244                 /* fall-through. */
14245         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
14246                 /* fall-through. */
14247         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
14248                 hrxqs[4] = hrxq_idx;
14249                 return 0;
14250         case MLX5_RSS_HASH_IPV6_UDP:
14251                 /* fall-through. */
14252         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
14253                 /* fall-through. */
14254         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
14255                 hrxqs[5] = hrxq_idx;
14256                 return 0;
14257         case MLX5_RSS_HASH_NONE:
14258                 hrxqs[6] = hrxq_idx;
14259                 return 0;
14260         case MLX5_RSS_HASH_IPV4_ESP:
14261                 hrxqs[7] = hrxq_idx;
14262                 return 0;
14263         case MLX5_RSS_HASH_IPV6_ESP:
14264                 hrxqs[8] = hrxq_idx;
14265                 return 0;
14266         case MLX5_RSS_HASH_ESP_SPI:
14267                 hrxqs[9] = hrxq_idx;
14268                 return 0;
14269         default:
14270                 return -1;
14271         }
14272 }
14273
14274 /**
14275  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
14276  * and tunnel.
14277  *
14278  * @param[in] dev
14279  *   Pointer to the Ethernet device structure.
14280  * @param[in] idx
14281  *   Shared RSS action ID holding hash RX queue objects.
14282  * @param[in] hash_fields
14283  *   Defines combination of packet fields to participate in RX hash.
14284  * @param[in] tunnel
14285  *   Tunnel type
14286  *
14287  * @return
14288  *   Valid hash RX queue index, otherwise 0.
14289  */
14290 uint32_t
14291 flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
14292                                const uint64_t hash_fields)
14293 {
14294         struct mlx5_priv *priv = dev->data->dev_private;
14295         struct mlx5_shared_action_rss *shared_rss =
14296             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14297         const uint32_t *hrxqs = shared_rss->hrxq;
14298
14299         switch (hash_fields & ~IBV_RX_HASH_INNER) {
14300         case MLX5_RSS_HASH_IPV4:
14301                 /* fall-through. */
14302         case MLX5_RSS_HASH_IPV4_DST_ONLY:
14303                 /* fall-through. */
14304         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
14305                 return hrxqs[0];
14306         case MLX5_RSS_HASH_IPV4_TCP:
14307                 /* fall-through. */
14308         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
14309                 /* fall-through. */
14310         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
14311                 return hrxqs[1];
14312         case MLX5_RSS_HASH_IPV4_UDP:
14313                 /* fall-through. */
14314         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
14315                 /* fall-through. */
14316         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
14317                 return hrxqs[2];
14318         case MLX5_RSS_HASH_IPV6:
14319                 /* fall-through. */
14320         case MLX5_RSS_HASH_IPV6_DST_ONLY:
14321                 /* fall-through. */
14322         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
14323                 return hrxqs[3];
14324         case MLX5_RSS_HASH_IPV6_TCP:
14325                 /* fall-through. */
14326         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
14327                 /* fall-through. */
14328         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
14329                 return hrxqs[4];
14330         case MLX5_RSS_HASH_IPV6_UDP:
14331                 /* fall-through. */
14332         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
14333                 /* fall-through. */
14334         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
14335                 return hrxqs[5];
14336         case MLX5_RSS_HASH_NONE:
14337                 return hrxqs[6];
14338         case MLX5_RSS_HASH_IPV4_ESP:
14339                 return hrxqs[7];
14340         case MLX5_RSS_HASH_IPV6_ESP:
14341                 return hrxqs[8];
14342         case MLX5_RSS_HASH_ESP_SPI:
14343                 return hrxqs[9];
14344         default:
14345                 return 0;
14346         }
14347
14348 }
14349
14350 /**
14351  * Apply the flow to the NIC, lock free,
14352  * (mutex should be acquired by caller).
14353  *
14354  * @param[in] dev
14355  *   Pointer to the Ethernet device structure.
14356  * @param[in, out] flow
14357  *   Pointer to flow structure.
14358  * @param[out] error
14359  *   Pointer to error structure.
14360  *
14361  * @return
14362  *   0 on success, a negative errno value otherwise and rte_errno is set.
14363  */
14364 static int
14365 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
14366               struct rte_flow_error *error)
14367 {
14368         struct mlx5_flow_dv_workspace *dv;
14369         struct mlx5_flow_handle *dh;
14370         struct mlx5_flow_handle_dv *dv_h;
14371         struct mlx5_flow *dev_flow;
14372         struct mlx5_priv *priv = dev->data->dev_private;
14373         uint32_t handle_idx;
14374         int n;
14375         int err;
14376         int idx;
14377         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
14378         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
14379         uint8_t misc_mask;
14380
14381         MLX5_ASSERT(wks);
14382         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
14383                 dev_flow = &wks->flows[idx];
14384                 dv = &dev_flow->dv;
14385                 dh = dev_flow->handle;
14386                 dv_h = &dh->dvh;
14387                 n = dv->actions_n;
14388                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
14389                         if (dv->transfer) {
14390                                 MLX5_ASSERT(priv->sh->dr_drop_action);
14391                                 dv->actions[n++] = priv->sh->dr_drop_action;
14392                         } else {
14393 #ifdef HAVE_MLX5DV_DR
14394                                 /* DR supports drop action placeholder. */
14395                                 MLX5_ASSERT(priv->sh->dr_drop_action);
14396                                 dv->actions[n++] = dv->group ?
14397                                         priv->sh->dr_drop_action :
14398                                         priv->root_drop_action;
14399 #else
14400                                 /* For DV we use the explicit drop queue. */
14401                                 MLX5_ASSERT(priv->drop_queue.hrxq);
14402                                 dv->actions[n++] =
14403                                                 priv->drop_queue.hrxq->action;
14404 #endif
14405                         }
14406                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
14407                            !dv_h->rix_sample && !dv_h->rix_dest_array)) {
14408                         struct mlx5_hrxq *hrxq;
14409                         uint32_t hrxq_idx;
14410
14411                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
14412                                                     &hrxq_idx);
14413                         if (!hrxq) {
14414                                 rte_flow_error_set
14415                                         (error, rte_errno,
14416                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14417                                          "cannot get hash queue");
14418                                 goto error;
14419                         }
14420                         dh->rix_hrxq = hrxq_idx;
14421                         dv->actions[n++] = hrxq->action;
14422                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
14423                         struct mlx5_hrxq *hrxq = NULL;
14424                         uint32_t hrxq_idx;
14425
14426                         hrxq_idx = flow_dv_action_rss_hrxq_lookup(dev,
14427                                                 rss_desc->shared_rss,
14428                                                 dev_flow->hash_fields);
14429                         if (hrxq_idx)
14430                                 hrxq = mlx5_ipool_get
14431                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
14432                                          hrxq_idx);
14433                         if (!hrxq) {
14434                                 rte_flow_error_set
14435                                         (error, rte_errno,
14436                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14437                                          "cannot get hash queue");
14438                                 goto error;
14439                         }
14440                         dh->rix_srss = rss_desc->shared_rss;
14441                         dv->actions[n++] = hrxq->action;
14442                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
14443                         if (!priv->sh->default_miss_action) {
14444                                 rte_flow_error_set
14445                                         (error, rte_errno,
14446                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14447                                          "default miss action not be created.");
14448                                 goto error;
14449                         }
14450                         dv->actions[n++] = priv->sh->default_miss_action;
14451                 }
14452                 misc_mask = flow_dv_matcher_enable(dv->value.buf);
14453                 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
14454                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
14455                                                (void *)&dv->value, n,
14456                                                dv->actions, &dh->drv_flow);
14457                 if (err) {
14458                         rte_flow_error_set
14459                                 (error, errno,
14460                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14461                                 NULL,
14462                                 (!priv->sh->config.allow_duplicate_pattern &&
14463                                 errno == EEXIST) ?
14464                                 "duplicating pattern is not allowed" :
14465                                 "hardware refuses to create flow");
14466                         goto error;
14467                 }
14468                 if (priv->vmwa_context &&
14469                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
14470                         /*
14471                          * The rule contains the VLAN pattern.
14472                          * For VF we are going to create VLAN
14473                          * interface to make hypervisor set correct
14474                          * e-Switch vport context.
14475                          */
14476                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
14477                 }
14478         }
14479         return 0;
14480 error:
14481         err = rte_errno; /* Save rte_errno before cleanup. */
14482         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
14483                        handle_idx, dh, next) {
14484                 /* hrxq is union, don't clear it if the flag is not set. */
14485                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
14486                         mlx5_hrxq_release(dev, dh->rix_hrxq);
14487                         dh->rix_hrxq = 0;
14488                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
14489                         dh->rix_srss = 0;
14490                 }
14491                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14492                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14493         }
14494         rte_errno = err; /* Restore rte_errno. */
14495         return -rte_errno;
14496 }
14497
14498 void
14499 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
14500                           struct mlx5_list_entry *entry)
14501 {
14502         struct mlx5_flow_dv_matcher *resource = container_of(entry,
14503                                                              typeof(*resource),
14504                                                              entry);
14505
14506         claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
14507         mlx5_free(resource);
14508 }
14509
14510 /**
14511  * Release the flow matcher.
14512  *
14513  * @param dev
14514  *   Pointer to Ethernet device.
14515  * @param port_id
14516  *   Index to port ID action resource.
14517  *
14518  * @return
14519  *   1 while a reference on it exists, 0 when freed.
14520  */
14521 static int
14522 flow_dv_matcher_release(struct rte_eth_dev *dev,
14523                         struct mlx5_flow_handle *handle)
14524 {
14525         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
14526         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
14527                                                             typeof(*tbl), tbl);
14528         int ret;
14529
14530         MLX5_ASSERT(matcher->matcher_object);
14531         ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
14532         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
14533         return ret;
14534 }
14535
14536 void
14537 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14538 {
14539         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14540         struct mlx5_flow_dv_encap_decap_resource *res =
14541                                        container_of(entry, typeof(*res), entry);
14542
14543         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14544         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
14545 }
14546
14547 /**
14548  * Release an encap/decap resource.
14549  *
14550  * @param dev
14551  *   Pointer to Ethernet device.
14552  * @param encap_decap_idx
14553  *   Index of encap decap resource.
14554  *
14555  * @return
14556  *   1 while a reference on it exists, 0 when freed.
14557  */
14558 static int
14559 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
14560                                      uint32_t encap_decap_idx)
14561 {
14562         struct mlx5_priv *priv = dev->data->dev_private;
14563         struct mlx5_flow_dv_encap_decap_resource *resource;
14564
14565         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
14566                                   encap_decap_idx);
14567         if (!resource)
14568                 return 0;
14569         MLX5_ASSERT(resource->action);
14570         return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
14571 }
14572
14573 /**
14574  * Release an jump to table action resource.
14575  *
14576  * @param dev
14577  *   Pointer to Ethernet device.
14578  * @param rix_jump
14579  *   Index to the jump action resource.
14580  *
14581  * @return
14582  *   1 while a reference on it exists, 0 when freed.
14583  */
14584 static int
14585 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
14586                                   uint32_t rix_jump)
14587 {
14588         struct mlx5_priv *priv = dev->data->dev_private;
14589         struct mlx5_flow_tbl_data_entry *tbl_data;
14590
14591         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
14592                                   rix_jump);
14593         if (!tbl_data)
14594                 return 0;
14595         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
14596 }
14597
14598 void
14599 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14600 {
14601         struct mlx5_flow_dv_modify_hdr_resource *res =
14602                 container_of(entry, typeof(*res), entry);
14603         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14604
14605         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14606         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
14607 }
14608
14609 /**
14610  * Release a modify-header resource.
14611  *
14612  * @param dev
14613  *   Pointer to Ethernet device.
14614  * @param handle
14615  *   Pointer to mlx5_flow_handle.
14616  *
14617  * @return
14618  *   1 while a reference on it exists, 0 when freed.
14619  */
14620 static int
14621 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
14622                                     struct mlx5_flow_handle *handle)
14623 {
14624         struct mlx5_priv *priv = dev->data->dev_private;
14625         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
14626
14627         MLX5_ASSERT(entry->action);
14628         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14629 }
14630
14631 void
14632 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14633 {
14634         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14635         struct mlx5_flow_dv_port_id_action_resource *resource =
14636                                   container_of(entry, typeof(*resource), entry);
14637
14638         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14639         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14640 }
14641
14642 /**
14643  * Release port ID action resource.
14644  *
14645  * @param dev
14646  *   Pointer to Ethernet device.
14647  * @param handle
14648  *   Pointer to mlx5_flow_handle.
14649  *
14650  * @return
14651  *   1 while a reference on it exists, 0 when freed.
14652  */
14653 static int
14654 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14655                                         uint32_t port_id)
14656 {
14657         struct mlx5_priv *priv = dev->data->dev_private;
14658         struct mlx5_flow_dv_port_id_action_resource *resource;
14659
14660         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14661         if (!resource)
14662                 return 0;
14663         MLX5_ASSERT(resource->action);
14664         return mlx5_list_unregister(priv->sh->port_id_action_list,
14665                                     &resource->entry);
14666 }
14667
14668 /**
14669  * Release shared RSS action resource.
14670  *
14671  * @param dev
14672  *   Pointer to Ethernet device.
14673  * @param srss
14674  *   Shared RSS action index.
14675  */
14676 static void
14677 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14678 {
14679         struct mlx5_priv *priv = dev->data->dev_private;
14680         struct mlx5_shared_action_rss *shared_rss;
14681
14682         shared_rss = mlx5_ipool_get
14683                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14684         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14685 }
14686
14687 void
14688 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14689 {
14690         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14691         struct mlx5_flow_dv_push_vlan_action_resource *resource =
14692                         container_of(entry, typeof(*resource), entry);
14693
14694         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14695         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14696 }
14697
14698 /**
14699  * Release push vlan action resource.
14700  *
14701  * @param dev
14702  *   Pointer to Ethernet device.
14703  * @param handle
14704  *   Pointer to mlx5_flow_handle.
14705  *
14706  * @return
14707  *   1 while a reference on it exists, 0 when freed.
14708  */
14709 static int
14710 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14711                                           struct mlx5_flow_handle *handle)
14712 {
14713         struct mlx5_priv *priv = dev->data->dev_private;
14714         struct mlx5_flow_dv_push_vlan_action_resource *resource;
14715         uint32_t idx = handle->dvh.rix_push_vlan;
14716
14717         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14718         if (!resource)
14719                 return 0;
14720         MLX5_ASSERT(resource->action);
14721         return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14722                                     &resource->entry);
14723 }
14724
14725 /**
14726  * Release the fate resource.
14727  *
14728  * @param dev
14729  *   Pointer to Ethernet device.
14730  * @param handle
14731  *   Pointer to mlx5_flow_handle.
14732  */
14733 static void
14734 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14735                                struct mlx5_flow_handle *handle)
14736 {
14737         if (!handle->rix_fate)
14738                 return;
14739         switch (handle->fate_action) {
14740         case MLX5_FLOW_FATE_QUEUE:
14741                 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14742                         mlx5_hrxq_release(dev, handle->rix_hrxq);
14743                 break;
14744         case MLX5_FLOW_FATE_JUMP:
14745                 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14746                 break;
14747         case MLX5_FLOW_FATE_PORT_ID:
14748                 flow_dv_port_id_action_resource_release(dev,
14749                                 handle->rix_port_id_action);
14750                 break;
14751         default:
14752                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14753                 break;
14754         }
14755         handle->rix_fate = 0;
14756 }
14757
14758 void
14759 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14760                          struct mlx5_list_entry *entry)
14761 {
14762         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14763                                                               typeof(*resource),
14764                                                               entry);
14765         struct rte_eth_dev *dev = resource->dev;
14766         struct mlx5_priv *priv = dev->data->dev_private;
14767
14768         if (resource->verbs_action)
14769                 claim_zero(mlx5_flow_os_destroy_flow_action
14770                                                       (resource->verbs_action));
14771         if (resource->normal_path_tbl)
14772                 flow_dv_tbl_resource_release(MLX5_SH(dev),
14773                                              resource->normal_path_tbl);
14774         flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14775         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14776         DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14777 }
14778
14779 /**
14780  * Release an sample resource.
14781  *
14782  * @param dev
14783  *   Pointer to Ethernet device.
14784  * @param handle
14785  *   Pointer to mlx5_flow_handle.
14786  *
14787  * @return
14788  *   1 while a reference on it exists, 0 when freed.
14789  */
14790 static int
14791 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14792                                      struct mlx5_flow_handle *handle)
14793 {
14794         struct mlx5_priv *priv = dev->data->dev_private;
14795         struct mlx5_flow_dv_sample_resource *resource;
14796
14797         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14798                                   handle->dvh.rix_sample);
14799         if (!resource)
14800                 return 0;
14801         MLX5_ASSERT(resource->verbs_action);
14802         return mlx5_list_unregister(priv->sh->sample_action_list,
14803                                     &resource->entry);
14804 }
14805
14806 void
14807 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14808                              struct mlx5_list_entry *entry)
14809 {
14810         struct mlx5_flow_dv_dest_array_resource *resource =
14811                         container_of(entry, typeof(*resource), entry);
14812         struct rte_eth_dev *dev = resource->dev;
14813         struct mlx5_priv *priv = dev->data->dev_private;
14814         uint32_t i = 0;
14815
14816         MLX5_ASSERT(resource->action);
14817         if (resource->action)
14818                 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14819         for (; i < resource->num_of_dest; i++)
14820                 flow_dv_sample_sub_actions_release(dev,
14821                                                    &resource->sample_idx[i]);
14822         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14823         DRV_LOG(DEBUG, "destination array resource %p: removed",
14824                 (void *)resource);
14825 }
14826
14827 /**
14828  * Release an destination array resource.
14829  *
14830  * @param dev
14831  *   Pointer to Ethernet device.
14832  * @param handle
14833  *   Pointer to mlx5_flow_handle.
14834  *
14835  * @return
14836  *   1 while a reference on it exists, 0 when freed.
14837  */
14838 static int
14839 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14840                                     struct mlx5_flow_handle *handle)
14841 {
14842         struct mlx5_priv *priv = dev->data->dev_private;
14843         struct mlx5_flow_dv_dest_array_resource *resource;
14844
14845         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14846                                   handle->dvh.rix_dest_array);
14847         if (!resource)
14848                 return 0;
14849         MLX5_ASSERT(resource->action);
14850         return mlx5_list_unregister(priv->sh->dest_array_list,
14851                                     &resource->entry);
14852 }
14853
14854 static void
14855 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14856 {
14857         struct mlx5_priv *priv = dev->data->dev_private;
14858         struct mlx5_dev_ctx_shared *sh = priv->sh;
14859         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14860                                 sh->geneve_tlv_option_resource;
14861         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14862         if (geneve_opt_resource) {
14863                 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14864                                          __ATOMIC_RELAXED))) {
14865                         claim_zero(mlx5_devx_cmd_destroy
14866                                         (geneve_opt_resource->obj));
14867                         mlx5_free(sh->geneve_tlv_option_resource);
14868                         sh->geneve_tlv_option_resource = NULL;
14869                 }
14870         }
14871         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14872 }
14873
14874 /**
14875  * Remove the flow from the NIC but keeps it in memory.
14876  * Lock free, (mutex should be acquired by caller).
14877  *
14878  * @param[in] dev
14879  *   Pointer to Ethernet device.
14880  * @param[in, out] flow
14881  *   Pointer to flow structure.
14882  */
14883 static void
14884 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14885 {
14886         struct mlx5_flow_handle *dh;
14887         uint32_t handle_idx;
14888         struct mlx5_priv *priv = dev->data->dev_private;
14889
14890         if (!flow)
14891                 return;
14892         handle_idx = flow->dev_handles;
14893         while (handle_idx) {
14894                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14895                                     handle_idx);
14896                 if (!dh)
14897                         return;
14898                 if (dh->drv_flow) {
14899                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14900                         dh->drv_flow = NULL;
14901                 }
14902                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14903                         flow_dv_fate_resource_release(dev, dh);
14904                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14905                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14906                 handle_idx = dh->next.next;
14907         }
14908 }
14909
14910 /**
14911  * Remove the flow from the NIC and the memory.
14912  * Lock free, (mutex should be acquired by caller).
14913  *
14914  * @param[in] dev
14915  *   Pointer to the Ethernet device structure.
14916  * @param[in, out] flow
14917  *   Pointer to flow structure.
14918  */
14919 static void
14920 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14921 {
14922         struct mlx5_flow_handle *dev_handle;
14923         struct mlx5_priv *priv = dev->data->dev_private;
14924         struct mlx5_flow_meter_info *fm = NULL;
14925         uint32_t srss = 0;
14926
14927         if (!flow)
14928                 return;
14929         flow_dv_remove(dev, flow);
14930         if (flow->counter) {
14931                 flow_dv_counter_free(dev, flow->counter);
14932                 flow->counter = 0;
14933         }
14934         if (flow->meter) {
14935                 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14936                 if (fm)
14937                         mlx5_flow_meter_detach(priv, fm);
14938                 flow->meter = 0;
14939         }
14940         /* Keep the current age handling by default. */
14941         if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14942                 flow_dv_aso_ct_release(dev, flow->ct, NULL);
14943         else if (flow->age)
14944                 flow_dv_aso_age_release(dev, flow->age);
14945         if (flow->geneve_tlv_option) {
14946                 flow_dv_geneve_tlv_option_resource_release(dev);
14947                 flow->geneve_tlv_option = 0;
14948         }
14949         while (flow->dev_handles) {
14950                 uint32_t tmp_idx = flow->dev_handles;
14951
14952                 dev_handle = mlx5_ipool_get(priv->sh->ipool
14953                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14954                 if (!dev_handle)
14955                         return;
14956                 flow->dev_handles = dev_handle->next.next;
14957                 while (dev_handle->flex_item) {
14958                         int index = rte_bsf32(dev_handle->flex_item);
14959
14960                         mlx5_flex_release_index(dev, index);
14961                         dev_handle->flex_item &= ~(uint8_t)RTE_BIT32(index);
14962                 }
14963                 if (dev_handle->dvh.matcher)
14964                         flow_dv_matcher_release(dev, dev_handle);
14965                 if (dev_handle->dvh.rix_sample)
14966                         flow_dv_sample_resource_release(dev, dev_handle);
14967                 if (dev_handle->dvh.rix_dest_array)
14968                         flow_dv_dest_array_resource_release(dev, dev_handle);
14969                 if (dev_handle->dvh.rix_encap_decap)
14970                         flow_dv_encap_decap_resource_release(dev,
14971                                 dev_handle->dvh.rix_encap_decap);
14972                 if (dev_handle->dvh.modify_hdr)
14973                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
14974                 if (dev_handle->dvh.rix_push_vlan)
14975                         flow_dv_push_vlan_action_resource_release(dev,
14976                                                                   dev_handle);
14977                 if (dev_handle->dvh.rix_tag)
14978                         flow_dv_tag_release(dev,
14979                                             dev_handle->dvh.rix_tag);
14980                 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14981                         flow_dv_fate_resource_release(dev, dev_handle);
14982                 else if (!srss)
14983                         srss = dev_handle->rix_srss;
14984                 if (fm && dev_handle->is_meter_flow_id &&
14985                     dev_handle->split_flow_id)
14986                         mlx5_ipool_free(fm->flow_ipool,
14987                                         dev_handle->split_flow_id);
14988                 else if (dev_handle->split_flow_id &&
14989                     !dev_handle->is_meter_flow_id)
14990                         mlx5_ipool_free(priv->sh->ipool
14991                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14992                                         dev_handle->split_flow_id);
14993                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14994                            tmp_idx);
14995         }
14996         if (srss)
14997                 flow_dv_shared_rss_action_release(dev, srss);
14998 }
14999
15000 /**
15001  * Release array of hash RX queue objects.
15002  * Helper function.
15003  *
15004  * @param[in] dev
15005  *   Pointer to the Ethernet device structure.
15006  * @param[in, out] hrxqs
15007  *   Array of hash RX queue objects.
15008  *
15009  * @return
15010  *   Total number of references to hash RX queue objects in *hrxqs* array
15011  *   after this operation.
15012  */
15013 static int
15014 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
15015                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
15016 {
15017         size_t i;
15018         int remaining = 0;
15019
15020         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
15021                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
15022
15023                 if (!ret)
15024                         (*hrxqs)[i] = 0;
15025                 remaining += ret;
15026         }
15027         return remaining;
15028 }
15029
15030 /**
15031  * Release all hash RX queue objects representing shared RSS action.
15032  *
15033  * @param[in] dev
15034  *   Pointer to the Ethernet device structure.
15035  * @param[in, out] action
15036  *   Shared RSS action to remove hash RX queue objects from.
15037  *
15038  * @return
15039  *   Total number of references to hash RX queue objects stored in *action*
15040  *   after this operation.
15041  *   Expected to be 0 if no external references held.
15042  */
15043 static int
15044 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
15045                                  struct mlx5_shared_action_rss *shared_rss)
15046 {
15047         return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
15048 }
15049
15050 /**
15051  * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
15052  * user input.
15053  *
15054  * Only one hash value is available for one L3+L4 combination:
15055  * for example:
15056  * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
15057  * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
15058  * same slot in mlx5_rss_hash_fields.
15059  *
15060  * @param[in] orig_rss_types
15061  *   RSS type as provided in shared RSS action.
15062  * @param[in, out] hash_field
15063  *   hash_field variable needed to be adjusted.
15064  *
15065  * @return
15066  *   void
15067  */
15068 void
15069 flow_dv_action_rss_l34_hash_adjust(uint64_t orig_rss_types,
15070                                    uint64_t *hash_field)
15071 {
15072         uint64_t rss_types = rte_eth_rss_hf_refine(orig_rss_types);
15073
15074         switch (*hash_field & ~IBV_RX_HASH_INNER) {
15075         case MLX5_RSS_HASH_IPV4:
15076                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
15077                         *hash_field &= ~MLX5_RSS_HASH_IPV4;
15078                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
15079                                 *hash_field |= IBV_RX_HASH_DST_IPV4;
15080                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
15081                                 *hash_field |= IBV_RX_HASH_SRC_IPV4;
15082                         else
15083                                 *hash_field |= MLX5_RSS_HASH_IPV4;
15084                 }
15085                 return;
15086         case MLX5_RSS_HASH_IPV6:
15087                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
15088                         *hash_field &= ~MLX5_RSS_HASH_IPV6;
15089                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
15090                                 *hash_field |= IBV_RX_HASH_DST_IPV6;
15091                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
15092                                 *hash_field |= IBV_RX_HASH_SRC_IPV6;
15093                         else
15094                                 *hash_field |= MLX5_RSS_HASH_IPV6;
15095                 }
15096                 return;
15097         case MLX5_RSS_HASH_IPV4_UDP:
15098                 /* fall-through. */
15099         case MLX5_RSS_HASH_IPV6_UDP:
15100                 if (rss_types & RTE_ETH_RSS_UDP) {
15101                         *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
15102                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
15103                                 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
15104                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
15105                                 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
15106                         else
15107                                 *hash_field |= MLX5_UDP_IBV_RX_HASH;
15108                 }
15109                 return;
15110         case MLX5_RSS_HASH_IPV4_TCP:
15111                 /* fall-through. */
15112         case MLX5_RSS_HASH_IPV6_TCP:
15113                 if (rss_types & RTE_ETH_RSS_TCP) {
15114                         *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
15115                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
15116                                 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
15117                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
15118                                 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
15119                         else
15120                                 *hash_field |= MLX5_TCP_IBV_RX_HASH;
15121                 }
15122                 return;
15123         default:
15124                 return;
15125         }
15126 }
15127
15128 /**
15129  * Setup shared RSS action.
15130  * Prepare set of hash RX queue objects sufficient to handle all valid
15131  * hash_fields combinations (see enum ibv_rx_hash_fields).
15132  *
15133  * @param[in] dev
15134  *   Pointer to the Ethernet device structure.
15135  * @param[in] action_idx
15136  *   Shared RSS action ipool index.
15137  * @param[in, out] action
15138  *   Partially initialized shared RSS action.
15139  * @param[out] error
15140  *   Perform verbose error reporting if not NULL. Initialized in case of
15141  *   error only.
15142  *
15143  * @return
15144  *   0 on success, otherwise negative errno value.
15145  */
15146 static int
15147 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
15148                            uint32_t action_idx,
15149                            struct mlx5_shared_action_rss *shared_rss,
15150                            struct rte_flow_error *error)
15151 {
15152         struct mlx5_priv *priv = dev->data->dev_private;
15153         struct mlx5_flow_rss_desc rss_desc = { 0 };
15154         size_t i;
15155         int err;
15156
15157         shared_rss->ind_tbl = mlx5_ind_table_obj_new
15158                               (dev, shared_rss->origin.queue,
15159                                shared_rss->origin.queue_num,
15160                                true,
15161                                !!dev->data->dev_started);
15162         if (!shared_rss->ind_tbl)
15163                 return rte_flow_error_set(error, rte_errno,
15164                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
15165                                           "cannot setup indirection table");
15166         memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
15167         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
15168         rss_desc.const_q = shared_rss->origin.queue;
15169         rss_desc.queue_num = shared_rss->origin.queue_num;
15170         /* Set non-zero value to indicate a shared RSS. */
15171         rss_desc.shared_rss = action_idx;
15172         rss_desc.ind_tbl = shared_rss->ind_tbl;
15173         if (priv->sh->config.dv_flow_en == 2)
15174                 rss_desc.hws_flags = MLX5DR_ACTION_FLAG_HWS_RX;
15175         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
15176                 struct mlx5_hrxq *hrxq;
15177                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
15178                 int tunnel = 0;
15179
15180                 flow_dv_action_rss_l34_hash_adjust(shared_rss->origin.types,
15181                                                    &hash_fields);
15182                 if (shared_rss->origin.level > 1) {
15183                         hash_fields |= IBV_RX_HASH_INNER;
15184                         tunnel = 1;
15185                 }
15186                 rss_desc.tunnel = tunnel;
15187                 rss_desc.hash_fields = hash_fields;
15188                 hrxq = mlx5_hrxq_get(dev, &rss_desc);
15189                 if (!hrxq) {
15190                         rte_flow_error_set
15191                                 (error, rte_errno,
15192                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
15193                                  "cannot get hash queue");
15194                         goto error_hrxq_new;
15195                 }
15196                 err = __flow_dv_action_rss_hrxq_set
15197                         (shared_rss, hash_fields, hrxq->idx);
15198                 MLX5_ASSERT(!err);
15199         }
15200         return 0;
15201 error_hrxq_new:
15202         err = rte_errno;
15203         __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
15204         if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
15205                 shared_rss->ind_tbl = NULL;
15206         rte_errno = err;
15207         return -rte_errno;
15208 }
15209
15210 /**
15211  * Create shared RSS action.
15212  *
15213  * @param[in] dev
15214  *   Pointer to the Ethernet device structure.
15215  * @param[in] conf
15216  *   Shared action configuration.
15217  * @param[in] rss
15218  *   RSS action specification used to create shared action.
15219  * @param[out] error
15220  *   Perform verbose error reporting if not NULL. Initialized in case of
15221  *   error only.
15222  *
15223  * @return
15224  *   A valid shared action ID in case of success, 0 otherwise and
15225  *   rte_errno is set.
15226  */
15227 static uint32_t
15228 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
15229                             const struct rte_flow_indir_action_conf *conf,
15230                             const struct rte_flow_action_rss *rss,
15231                             struct rte_flow_error *error)
15232 {
15233         struct mlx5_priv *priv = dev->data->dev_private;
15234         struct mlx5_shared_action_rss *shared_rss = NULL;
15235         struct rte_flow_action_rss *origin;
15236         const uint8_t *rss_key;
15237         uint32_t idx;
15238
15239         RTE_SET_USED(conf);
15240         shared_rss = mlx5_ipool_zmalloc
15241                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
15242         if (!shared_rss) {
15243                 rte_flow_error_set(error, ENOMEM,
15244                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
15245                                    "cannot allocate resource memory");
15246                 goto error_rss_init;
15247         }
15248         if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
15249                 rte_flow_error_set(error, E2BIG,
15250                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
15251                                    "rss action number out of range");
15252                 goto error_rss_init;
15253         }
15254         origin = &shared_rss->origin;
15255         origin->func = rss->func;
15256         origin->level = rss->level;
15257         /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
15258         origin->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
15259         /* NULL RSS key indicates default RSS key. */
15260         rss_key = !rss->key ? rss_hash_default_key : rss->key;
15261         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
15262         origin->key = &shared_rss->key[0];
15263         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
15264         origin->queue = rss->queue;
15265         origin->queue_num = rss->queue_num;
15266         if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
15267                 goto error_rss_init;
15268         /* Update queue with indirect table queue memoyr. */
15269         origin->queue = shared_rss->ind_tbl->queues;
15270         rte_spinlock_init(&shared_rss->action_rss_sl);
15271         __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
15272         rte_spinlock_lock(&priv->shared_act_sl);
15273         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
15274                      &priv->rss_shared_actions, idx, shared_rss, next);
15275         rte_spinlock_unlock(&priv->shared_act_sl);
15276         return idx;
15277 error_rss_init:
15278         if (shared_rss) {
15279                 if (shared_rss->ind_tbl)
15280                         mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl,
15281                                                    !!dev->data->dev_started);
15282                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
15283                                 idx);
15284         }
15285         return 0;
15286 }
15287
15288 /**
15289  * Destroy the shared RSS action.
15290  * Release related hash RX queue objects.
15291  *
15292  * @param[in] dev
15293  *   Pointer to the Ethernet device structure.
15294  * @param[in] idx
15295  *   The shared RSS action object ID to be removed.
15296  * @param[out] error
15297  *   Perform verbose error reporting if not NULL. Initialized in case of
15298  *   error only.
15299  *
15300  * @return
15301  *   0 on success, otherwise negative errno value.
15302  */
15303 static int
15304 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
15305                              struct rte_flow_error *error)
15306 {
15307         struct mlx5_priv *priv = dev->data->dev_private;
15308         struct mlx5_shared_action_rss *shared_rss =
15309             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
15310         uint32_t old_refcnt = 1;
15311         int remaining;
15312
15313         if (!shared_rss)
15314                 return rte_flow_error_set(error, EINVAL,
15315                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15316                                           "invalid shared action");
15317         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
15318                                          0, 0, __ATOMIC_ACQUIRE,
15319                                          __ATOMIC_RELAXED))
15320                 return rte_flow_error_set(error, EBUSY,
15321                                           RTE_FLOW_ERROR_TYPE_ACTION,
15322                                           NULL,
15323                                           "shared rss has references");
15324         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
15325         if (remaining)
15326                 return rte_flow_error_set(error, EBUSY,
15327                                           RTE_FLOW_ERROR_TYPE_ACTION,
15328                                           NULL,
15329                                           "shared rss hrxq has references");
15330         remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl,
15331                                                !!dev->data->dev_started);
15332         if (remaining)
15333                 return rte_flow_error_set(error, EBUSY,
15334                                           RTE_FLOW_ERROR_TYPE_ACTION,
15335                                           NULL,
15336                                           "shared rss indirection table has"
15337                                           " references");
15338         rte_spinlock_lock(&priv->shared_act_sl);
15339         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
15340                      &priv->rss_shared_actions, idx, shared_rss, next);
15341         rte_spinlock_unlock(&priv->shared_act_sl);
15342         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
15343                         idx);
15344         return 0;
15345 }
15346
15347 /**
15348  * Create indirect action, lock free,
15349  * (mutex should be acquired by caller).
15350  * Dispatcher for action type specific call.
15351  *
15352  * @param[in] dev
15353  *   Pointer to the Ethernet device structure.
15354  * @param[in] conf
15355  *   Shared action configuration.
15356  * @param[in] action
15357  *   Action specification used to create indirect action.
15358  * @param[out] error
15359  *   Perform verbose error reporting if not NULL. Initialized in case of
15360  *   error only.
15361  *
15362  * @return
15363  *   A valid shared action handle in case of success, NULL otherwise and
15364  *   rte_errno is set.
15365  */
15366 struct rte_flow_action_handle *
15367 flow_dv_action_create(struct rte_eth_dev *dev,
15368                       const struct rte_flow_indir_action_conf *conf,
15369                       const struct rte_flow_action *action,
15370                       struct rte_flow_error *err)
15371 {
15372         struct mlx5_priv *priv = dev->data->dev_private;
15373         uint32_t age_idx = 0;
15374         uint32_t idx = 0;
15375         uint32_t ret = 0;
15376
15377         switch (action->type) {
15378         case RTE_FLOW_ACTION_TYPE_RSS:
15379                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
15380                 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
15381                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
15382                 break;
15383         case RTE_FLOW_ACTION_TYPE_AGE:
15384                 age_idx = flow_dv_aso_age_alloc(dev, err);
15385                 if (!age_idx) {
15386                         ret = -rte_errno;
15387                         break;
15388                 }
15389                 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
15390                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
15391                 flow_dv_aso_age_params_init(dev, age_idx,
15392                                         ((const struct rte_flow_action_age *)
15393                                                 action->conf)->context ?
15394                                         ((const struct rte_flow_action_age *)
15395                                                 action->conf)->context :
15396                                         (void *)(uintptr_t)idx,
15397                                         ((const struct rte_flow_action_age *)
15398                                                 action->conf)->timeout);
15399                 ret = age_idx;
15400                 break;
15401         case RTE_FLOW_ACTION_TYPE_COUNT:
15402                 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
15403                 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
15404                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
15405                 break;
15406         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
15407                 ret = flow_dv_translate_create_conntrack(dev, action->conf,
15408                                                          err);
15409                 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
15410                 break;
15411         default:
15412                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
15413                                    NULL, "action type not supported");
15414                 break;
15415         }
15416         return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
15417 }
15418
15419 /**
15420  * Destroy the indirect action.
15421  * Release action related resources on the NIC and the memory.
15422  * Lock free, (mutex should be acquired by caller).
15423  * Dispatcher for action type specific call.
15424  *
15425  * @param[in] dev
15426  *   Pointer to the Ethernet device structure.
15427  * @param[in] handle
15428  *   The indirect action object handle to be removed.
15429  * @param[out] error
15430  *   Perform verbose error reporting if not NULL. Initialized in case of
15431  *   error only.
15432  *
15433  * @return
15434  *   0 on success, otherwise negative errno value.
15435  */
15436 int
15437 flow_dv_action_destroy(struct rte_eth_dev *dev,
15438                        struct rte_flow_action_handle *handle,
15439                        struct rte_flow_error *error)
15440 {
15441         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15442         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15443         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15444         struct mlx5_flow_counter *cnt;
15445         uint32_t no_flow_refcnt = 1;
15446         int ret;
15447
15448         switch (type) {
15449         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15450                 return __flow_dv_action_rss_release(dev, idx, error);
15451         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15452                 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
15453                 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
15454                                                  &no_flow_refcnt, 1, false,
15455                                                  __ATOMIC_ACQUIRE,
15456                                                  __ATOMIC_RELAXED))
15457                         return rte_flow_error_set(error, EBUSY,
15458                                                   RTE_FLOW_ERROR_TYPE_ACTION,
15459                                                   NULL,
15460                                                   "Indirect count action has references");
15461                 flow_dv_counter_free(dev, idx);
15462                 return 0;
15463         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15464                 ret = flow_dv_aso_age_release(dev, idx);
15465                 if (ret)
15466                         /*
15467                          * In this case, the last flow has a reference will
15468                          * actually release the age action.
15469                          */
15470                         DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
15471                                 " released with references %d.", idx, ret);
15472                 return 0;
15473         case MLX5_INDIRECT_ACTION_TYPE_CT:
15474                 ret = flow_dv_aso_ct_release(dev, idx, error);
15475                 if (ret < 0)
15476                         return ret;
15477                 if (ret > 0)
15478                         DRV_LOG(DEBUG, "Connection tracking object %u still "
15479                                 "has references %d.", idx, ret);
15480                 return 0;
15481         default:
15482                 return rte_flow_error_set(error, ENOTSUP,
15483                                           RTE_FLOW_ERROR_TYPE_ACTION,
15484                                           NULL,
15485                                           "action type not supported");
15486         }
15487 }
15488
15489 /**
15490  * Updates in place shared RSS action configuration.
15491  *
15492  * @param[in] dev
15493  *   Pointer to the Ethernet device structure.
15494  * @param[in] idx
15495  *   The shared RSS action object ID to be updated.
15496  * @param[in] action_conf
15497  *   RSS action specification used to modify *shared_rss*.
15498  * @param[out] error
15499  *   Perform verbose error reporting if not NULL. Initialized in case of
15500  *   error only.
15501  *
15502  * @return
15503  *   0 on success, otherwise negative errno value.
15504  * @note: currently only support update of RSS queues.
15505  */
15506 static int
15507 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
15508                             const struct rte_flow_action_rss *action_conf,
15509                             struct rte_flow_error *error)
15510 {
15511         struct mlx5_priv *priv = dev->data->dev_private;
15512         struct mlx5_shared_action_rss *shared_rss =
15513             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
15514         int ret = 0;
15515         void *queue = NULL;
15516         void *queue_i = NULL;
15517         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
15518         bool dev_started = !!dev->data->dev_started;
15519
15520         if (!shared_rss)
15521                 return rte_flow_error_set(error, EINVAL,
15522                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15523                                           "invalid shared action to update");
15524         if (priv->obj_ops.ind_table_modify == NULL)
15525                 return rte_flow_error_set(error, ENOTSUP,
15526                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15527                                           "cannot modify indirection table");
15528         queue = mlx5_malloc(MLX5_MEM_ZERO,
15529                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
15530                             0, SOCKET_ID_ANY);
15531         if (!queue)
15532                 return rte_flow_error_set(error, ENOMEM,
15533                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15534                                           NULL,
15535                                           "cannot allocate resource memory");
15536         memcpy(queue, action_conf->queue, queue_size);
15537         MLX5_ASSERT(shared_rss->ind_tbl);
15538         rte_spinlock_lock(&shared_rss->action_rss_sl);
15539         queue_i = shared_rss->ind_tbl->queues;
15540         ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
15541                                         queue, action_conf->queue_num,
15542                                         true /* standalone */,
15543                                         dev_started /* ref_new_qs */,
15544                                         dev_started /* deref_old_qs */);
15545         if (ret) {
15546                 ret = rte_flow_error_set(error, rte_errno,
15547                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15548                                           "cannot update indirection table");
15549         } else {
15550                 /* Restore the queue to indirect table internal queue. */
15551                 memcpy(queue_i, queue, queue_size);
15552                 shared_rss->ind_tbl->queues = queue_i;
15553                 shared_rss->origin.queue_num = action_conf->queue_num;
15554         }
15555         mlx5_free(queue);
15556         rte_spinlock_unlock(&shared_rss->action_rss_sl);
15557         return ret;
15558 }
15559
15560 /*
15561  * Updates in place conntrack context or direction.
15562  * Context update should be synchronized.
15563  *
15564  * @param[in] dev
15565  *   Pointer to the Ethernet device structure.
15566  * @param[in] idx
15567  *   The conntrack object ID to be updated.
15568  * @param[in] update
15569  *   Pointer to the structure of information to update.
15570  * @param[out] error
15571  *   Perform verbose error reporting if not NULL. Initialized in case of
15572  *   error only.
15573  *
15574  * @return
15575  *   0 on success, otherwise negative errno value.
15576  */
15577 static int
15578 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
15579                            const struct rte_flow_modify_conntrack *update,
15580                            struct rte_flow_error *error)
15581 {
15582         struct mlx5_priv *priv = dev->data->dev_private;
15583         struct mlx5_aso_ct_action *ct;
15584         const struct rte_flow_action_conntrack *new_prf;
15585         int ret = 0;
15586         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15587         uint32_t dev_idx;
15588
15589         if (PORT_ID(priv) != owner)
15590                 return rte_flow_error_set(error, EACCES,
15591                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15592                                           NULL,
15593                                           "CT object owned by another port");
15594         dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15595         ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15596         if (!ct->refcnt)
15597                 return rte_flow_error_set(error, ENOMEM,
15598                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15599                                           NULL,
15600                                           "CT object is inactive");
15601         new_prf = &update->new_ct;
15602         if (update->direction)
15603                 ct->is_original = !!new_prf->is_original_dir;
15604         if (update->state) {
15605                 /* Only validate the profile when it needs to be updated. */
15606                 ret = mlx5_validate_action_ct(dev, new_prf, error);
15607                 if (ret)
15608                         return ret;
15609                 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
15610                 if (ret)
15611                         return rte_flow_error_set(error, EIO,
15612                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15613                                         NULL,
15614                                         "Failed to send CT context update WQE");
15615                 /* Block until ready or a failure. */
15616                 ret = mlx5_aso_ct_available(priv->sh, ct);
15617                 if (ret)
15618                         rte_flow_error_set(error, rte_errno,
15619                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15620                                            NULL,
15621                                            "Timeout to get the CT update");
15622         }
15623         return ret;
15624 }
15625
15626 /**
15627  * Updates in place shared action configuration, lock free,
15628  * (mutex should be acquired by caller).
15629  *
15630  * @param[in] dev
15631  *   Pointer to the Ethernet device structure.
15632  * @param[in] handle
15633  *   The indirect action object handle to be updated.
15634  * @param[in] update
15635  *   Action specification used to modify the action pointed by *handle*.
15636  *   *update* could be of same type with the action pointed by the *handle*
15637  *   handle argument, or some other structures like a wrapper, depending on
15638  *   the indirect action type.
15639  * @param[out] error
15640  *   Perform verbose error reporting if not NULL. Initialized in case of
15641  *   error only.
15642  *
15643  * @return
15644  *   0 on success, otherwise negative errno value.
15645  */
15646 int
15647 flow_dv_action_update(struct rte_eth_dev *dev,
15648                         struct rte_flow_action_handle *handle,
15649                         const void *update,
15650                         struct rte_flow_error *err)
15651 {
15652         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15653         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15654         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15655         const void *action_conf;
15656
15657         switch (type) {
15658         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15659                 action_conf = ((const struct rte_flow_action *)update)->conf;
15660                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15661         case MLX5_INDIRECT_ACTION_TYPE_CT:
15662                 return __flow_dv_action_ct_update(dev, idx, update, err);
15663         default:
15664                 return rte_flow_error_set(err, ENOTSUP,
15665                                           RTE_FLOW_ERROR_TYPE_ACTION,
15666                                           NULL,
15667                                           "action type update not supported");
15668         }
15669 }
15670
15671 /**
15672  * Destroy the meter sub policy table rules.
15673  * Lock free, (mutex should be acquired by caller).
15674  *
15675  * @param[in] dev
15676  *   Pointer to Ethernet device.
15677  * @param[in] sub_policy
15678  *   Pointer to meter sub policy table.
15679  */
15680 static void
15681 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15682                              struct mlx5_flow_meter_sub_policy *sub_policy)
15683 {
15684         struct mlx5_priv *priv = dev->data->dev_private;
15685         struct mlx5_flow_tbl_data_entry *tbl;
15686         struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15687         struct mlx5_flow_meter_info *next_fm;
15688         struct mlx5_sub_policy_color_rule *color_rule;
15689         void *tmp;
15690         uint32_t i;
15691
15692         for (i = 0; i < RTE_COLORS; i++) {
15693                 next_fm = NULL;
15694                 if (i <= RTE_COLOR_YELLOW && policy &&
15695                     policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15696                         next_fm = mlx5_flow_meter_find(priv,
15697                                         policy->act_cnt[i].next_mtr_id, NULL);
15698                 RTE_TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15699                                    next_port, tmp) {
15700                         claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15701                         tbl = container_of(color_rule->matcher->tbl,
15702                                            typeof(*tbl), tbl);
15703                         mlx5_list_unregister(tbl->matchers,
15704                                              &color_rule->matcher->entry);
15705                         TAILQ_REMOVE(&sub_policy->color_rules[i],
15706                                      color_rule, next_port);
15707                         mlx5_free(color_rule);
15708                         if (next_fm)
15709                                 mlx5_flow_meter_detach(priv, next_fm);
15710                 }
15711         }
15712         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15713                 if (sub_policy->rix_hrxq[i]) {
15714                         if (policy && !policy->is_hierarchy)
15715                                 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15716                         sub_policy->rix_hrxq[i] = 0;
15717                 }
15718                 if (sub_policy->jump_tbl[i]) {
15719                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15720                                                      sub_policy->jump_tbl[i]);
15721                         sub_policy->jump_tbl[i] = NULL;
15722                 }
15723         }
15724         if (sub_policy->tbl_rsc) {
15725                 flow_dv_tbl_resource_release(MLX5_SH(dev),
15726                                              sub_policy->tbl_rsc);
15727                 sub_policy->tbl_rsc = NULL;
15728         }
15729 }
15730
15731 /**
15732  * Destroy policy rules, lock free,
15733  * (mutex should be acquired by caller).
15734  * Dispatcher for action type specific call.
15735  *
15736  * @param[in] dev
15737  *   Pointer to the Ethernet device structure.
15738  * @param[in] mtr_policy
15739  *   Meter policy struct.
15740  */
15741 static void
15742 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15743                              struct mlx5_flow_meter_policy *mtr_policy)
15744 {
15745         uint32_t i, j;
15746         struct mlx5_flow_meter_sub_policy *sub_policy;
15747         uint16_t sub_policy_num;
15748
15749         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15750                 sub_policy_num = (mtr_policy->sub_policy_num >>
15751                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15752                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15753                 for (j = 0; j < sub_policy_num; j++) {
15754                         sub_policy = mtr_policy->sub_policys[i][j];
15755                         if (sub_policy)
15756                                 __flow_dv_destroy_sub_policy_rules(dev,
15757                                                                    sub_policy);
15758                 }
15759         }
15760 }
15761
15762 /**
15763  * Destroy policy action, lock free,
15764  * (mutex should be acquired by caller).
15765  * Dispatcher for action type specific call.
15766  *
15767  * @param[in] dev
15768  *   Pointer to the Ethernet device structure.
15769  * @param[in] mtr_policy
15770  *   Meter policy struct.
15771  */
15772 static void
15773 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15774                       struct mlx5_flow_meter_policy *mtr_policy)
15775 {
15776         struct rte_flow_action *rss_action;
15777         struct mlx5_flow_handle dev_handle;
15778         uint32_t i, j;
15779
15780         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15781                 if (mtr_policy->act_cnt[i].rix_mark) {
15782                         flow_dv_tag_release(dev,
15783                                 mtr_policy->act_cnt[i].rix_mark);
15784                         mtr_policy->act_cnt[i].rix_mark = 0;
15785                 }
15786                 if (mtr_policy->act_cnt[i].modify_hdr) {
15787                         dev_handle.dvh.modify_hdr =
15788                                 mtr_policy->act_cnt[i].modify_hdr;
15789                         flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15790                 }
15791                 switch (mtr_policy->act_cnt[i].fate_action) {
15792                 case MLX5_FLOW_FATE_SHARED_RSS:
15793                         rss_action = mtr_policy->act_cnt[i].rss;
15794                         mlx5_free(rss_action);
15795                         break;
15796                 case MLX5_FLOW_FATE_PORT_ID:
15797                         if (mtr_policy->act_cnt[i].rix_port_id_action) {
15798                                 flow_dv_port_id_action_resource_release(dev,
15799                                 mtr_policy->act_cnt[i].rix_port_id_action);
15800                                 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15801                         }
15802                         break;
15803                 case MLX5_FLOW_FATE_DROP:
15804                 case MLX5_FLOW_FATE_JUMP:
15805                         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15806                                 mtr_policy->act_cnt[i].dr_jump_action[j] =
15807                                                 NULL;
15808                         break;
15809                 default:
15810                         /*Queue action do nothing*/
15811                         break;
15812                 }
15813         }
15814         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15815                 mtr_policy->dr_drop_action[j] = NULL;
15816 }
15817
15818 /**
15819  * Create yellow action for color aware meter.
15820  *
15821  * @param[in] dev
15822  *   Pointer to the Ethernet device structure.
15823  * @param[in] fm
15824  *   Meter information table.
15825  * @param[out] error
15826  *   Perform verbose error reporting if not NULL. Initialized in case of
15827  *   error only.
15828  *
15829  * @return
15830  *   0 on success, a negative errno value otherwise and rte_errno is set.
15831  */
15832 static int
15833 __flow_dv_create_mtr_yellow_action(struct rte_eth_dev *dev,
15834                                    struct mlx5_flow_meter_info *fm,
15835                                    struct rte_mtr_error *error)
15836 {
15837 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
15838         struct mlx5_priv *priv = dev->data->dev_private;
15839         struct rte_flow_error flow_err;
15840         struct mlx5_aso_mtr *aso_mtr;
15841         struct mlx5_aso_mtr_pool *pool;
15842         uint8_t reg_id;
15843
15844         aso_mtr = container_of(fm, struct mlx5_aso_mtr, fm);
15845         pool = container_of(aso_mtr, struct mlx5_aso_mtr_pool, mtrs[aso_mtr->offset]);
15846         reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
15847         fm->meter_action_y =
15848                 mlx5_glue->dv_create_flow_action_aso(priv->sh->rx_domain,
15849                                                      pool->devx_obj->obj,
15850                                                      aso_mtr->offset,
15851                                                      (1 << MLX5_FLOW_COLOR_YELLOW),
15852                                                      reg_id - REG_C_0);
15853 #else
15854         RTE_SET_USED(dev);
15855 #endif
15856         if (!fm->meter_action_y) {
15857                 return -rte_mtr_error_set(error, EINVAL, RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15858                                           "Fail to create yellow meter action.");
15859         }
15860         return 0;
15861 }
15862
15863 /**
15864  * Create policy action per domain, lock free,
15865  * (mutex should be acquired by caller).
15866  * Dispatcher for action type specific call.
15867  *
15868  * @param[in] dev
15869  *   Pointer to the Ethernet device structure.
15870  * @param[in] mtr_policy
15871  *   Meter policy struct.
15872  * @param[in] action
15873  *   Action specification used to create meter actions.
15874  * @param[in] attr
15875  *   Pointer to the flow attributes.
15876  * @param[out] error
15877  *   Perform verbose error reporting if not NULL. Initialized in case of
15878  *   error only.
15879  *
15880  * @return
15881  *   0 on success, otherwise negative errno value.
15882  */
15883 static int
15884 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15885                         struct mlx5_flow_meter_policy *mtr_policy,
15886                         const struct rte_flow_action *actions[RTE_COLORS],
15887                         struct rte_flow_attr *attr,
15888                         enum mlx5_meter_domain domain,
15889                         struct rte_mtr_error *error)
15890 {
15891         struct mlx5_priv *priv = dev->data->dev_private;
15892         struct rte_flow_error flow_err;
15893         const struct rte_flow_action *act;
15894         uint64_t action_flags;
15895         struct mlx5_flow_handle dh;
15896         struct mlx5_flow dev_flow;
15897         struct mlx5_flow_dv_port_id_action_resource port_id_action;
15898         int i, ret;
15899         uint8_t egress, transfer;
15900         struct mlx5_meter_policy_action_container *act_cnt = NULL;
15901         union {
15902                 struct mlx5_flow_dv_modify_hdr_resource res;
15903                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15904                             sizeof(struct mlx5_modification_cmd) *
15905                             (MLX5_MAX_MODIFY_NUM + 1)];
15906         } mhdr_dummy;
15907         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15908
15909         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15910         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15911         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15912         memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15913         memset(&port_id_action, 0,
15914                sizeof(struct mlx5_flow_dv_port_id_action_resource));
15915         memset(mhdr_res, 0, sizeof(*mhdr_res));
15916         mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15917                                        (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15918                                         MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15919         dev_flow.handle = &dh;
15920         dev_flow.dv.port_id_action = &port_id_action;
15921         dev_flow.external = true;
15922         for (i = 0; i < RTE_COLORS; i++) {
15923                 if (i < MLX5_MTR_RTE_COLORS)
15924                         act_cnt = &mtr_policy->act_cnt[i];
15925                 /* Skip the color policy actions creation. */
15926                 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15927                     (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15928                         continue;
15929                 action_flags = 0;
15930                 for (act = actions[i];
15931                      act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15932                         switch (act->type) {
15933                         case RTE_FLOW_ACTION_TYPE_MARK:
15934                         {
15935                                 uint32_t tag_be = mlx5_flow_mark_set
15936                                         (((const struct rte_flow_action_mark *)
15937                                         (act->conf))->id);
15938
15939                                 if (i >= MLX5_MTR_RTE_COLORS)
15940                                         return -rte_mtr_error_set(error,
15941                                           ENOTSUP,
15942                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15943                                           NULL,
15944                                           "cannot create policy "
15945                                           "mark action for this color");
15946                                 if (flow_dv_tag_resource_register(dev, tag_be,
15947                                                   &dev_flow, &flow_err))
15948                                         return -rte_mtr_error_set(error,
15949                                         ENOTSUP,
15950                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15951                                         NULL,
15952                                         "cannot setup policy mark action");
15953                                 MLX5_ASSERT(dev_flow.dv.tag_resource);
15954                                 act_cnt->rix_mark =
15955                                         dev_flow.handle->dvh.rix_tag;
15956                                 action_flags |= MLX5_FLOW_ACTION_MARK;
15957                                 mtr_policy->mark = 1;
15958                                 break;
15959                         }
15960                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
15961                                 if (i >= MLX5_MTR_RTE_COLORS)
15962                                         return -rte_mtr_error_set(error,
15963                                           ENOTSUP,
15964                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15965                                           NULL,
15966                                           "cannot create policy "
15967                                           "set tag action for this color");
15968                                 if (flow_dv_convert_action_set_tag
15969                                 (dev, mhdr_res,
15970                                 (const struct rte_flow_action_set_tag *)
15971                                 act->conf,  &flow_err))
15972                                         return -rte_mtr_error_set(error,
15973                                         ENOTSUP,
15974                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15975                                         NULL, "cannot convert policy "
15976                                         "set tag action");
15977                                 if (!mhdr_res->actions_num)
15978                                         return -rte_mtr_error_set(error,
15979                                         ENOTSUP,
15980                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15981                                         NULL, "cannot find policy "
15982                                         "set tag action");
15983                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15984                                 break;
15985                         case RTE_FLOW_ACTION_TYPE_DROP:
15986                         {
15987                                 struct mlx5_flow_mtr_mng *mtrmng =
15988                                                 priv->sh->mtrmng;
15989                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15990
15991                                 /*
15992                                  * Create the drop table with
15993                                  * METER DROP level.
15994                                  */
15995                                 if (!mtrmng->drop_tbl[domain]) {
15996                                         mtrmng->drop_tbl[domain] =
15997                                         flow_dv_tbl_resource_get(dev,
15998                                         MLX5_FLOW_TABLE_LEVEL_METER,
15999                                         egress, transfer, false, NULL, 0,
16000                                         0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
16001                                         if (!mtrmng->drop_tbl[domain])
16002                                                 return -rte_mtr_error_set
16003                                         (error, ENOTSUP,
16004                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16005                                         NULL,
16006                                         "Failed to create meter drop table");
16007                                 }
16008                                 tbl_data = container_of
16009                                 (mtrmng->drop_tbl[domain],
16010                                 struct mlx5_flow_tbl_data_entry, tbl);
16011                                 if (i < MLX5_MTR_RTE_COLORS) {
16012                                         act_cnt->dr_jump_action[domain] =
16013                                                 tbl_data->jump.action;
16014                                         act_cnt->fate_action =
16015                                                 MLX5_FLOW_FATE_DROP;
16016                                 }
16017                                 if (i == RTE_COLOR_RED)
16018                                         mtr_policy->dr_drop_action[domain] =
16019                                                 tbl_data->jump.action;
16020                                 action_flags |= MLX5_FLOW_ACTION_DROP;
16021                                 break;
16022                         }
16023                         case RTE_FLOW_ACTION_TYPE_QUEUE:
16024                         {
16025                                 if (i >= MLX5_MTR_RTE_COLORS)
16026                                         return -rte_mtr_error_set(error,
16027                                         ENOTSUP,
16028                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16029                                         NULL, "cannot create policy "
16030                                         "fate queue for this color");
16031                                 act_cnt->queue =
16032                                 ((const struct rte_flow_action_queue *)
16033                                         (act->conf))->index;
16034                                 act_cnt->fate_action =
16035                                         MLX5_FLOW_FATE_QUEUE;
16036                                 dev_flow.handle->fate_action =
16037                                         MLX5_FLOW_FATE_QUEUE;
16038                                 mtr_policy->is_queue = 1;
16039                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
16040                                 break;
16041                         }
16042                         case RTE_FLOW_ACTION_TYPE_RSS:
16043                         {
16044                                 int rss_size;
16045
16046                                 if (i >= MLX5_MTR_RTE_COLORS)
16047                                         return -rte_mtr_error_set(error,
16048                                           ENOTSUP,
16049                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16050                                           NULL,
16051                                           "cannot create policy "
16052                                           "rss action for this color");
16053                                 /*
16054                                  * Save RSS conf into policy struct
16055                                  * for translate stage.
16056                                  */
16057                                 rss_size = (int)rte_flow_conv
16058                                         (RTE_FLOW_CONV_OP_ACTION,
16059                                         NULL, 0, act, &flow_err);
16060                                 if (rss_size <= 0)
16061                                         return -rte_mtr_error_set(error,
16062                                           ENOTSUP,
16063                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16064                                           NULL, "Get the wrong "
16065                                           "rss action struct size");
16066                                 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
16067                                                 rss_size, 0, SOCKET_ID_ANY);
16068                                 if (!act_cnt->rss)
16069                                         return -rte_mtr_error_set(error,
16070                                           ENOTSUP,
16071                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16072                                           NULL,
16073                                           "Fail to malloc rss action memory");
16074                                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
16075                                         act_cnt->rss, rss_size,
16076                                         act, &flow_err);
16077                                 if (ret < 0)
16078                                         return -rte_mtr_error_set(error,
16079                                           ENOTSUP,
16080                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16081                                           NULL, "Fail to save "
16082                                           "rss action into policy struct");
16083                                 act_cnt->fate_action =
16084                                         MLX5_FLOW_FATE_SHARED_RSS;
16085                                 action_flags |= MLX5_FLOW_ACTION_RSS;
16086                                 break;
16087                         }
16088                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
16089                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
16090                         {
16091                                 struct mlx5_flow_dv_port_id_action_resource
16092                                         port_id_resource;
16093                                 uint32_t port_id = 0;
16094
16095                                 if (i >= MLX5_MTR_RTE_COLORS)
16096                                         return -rte_mtr_error_set(error,
16097                                         ENOTSUP,
16098                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16099                                         NULL, "cannot create policy "
16100                                         "port action for this color");
16101                                 memset(&port_id_resource, 0,
16102                                         sizeof(port_id_resource));
16103                                 if (flow_dv_translate_action_port_id(dev, act,
16104                                                 &port_id, &flow_err))
16105                                         return -rte_mtr_error_set(error,
16106                                         ENOTSUP,
16107                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16108                                         NULL, "cannot translate "
16109                                         "policy port action");
16110                                 port_id_resource.port_id = port_id;
16111                                 if (flow_dv_port_id_action_resource_register
16112                                         (dev, &port_id_resource,
16113                                         &dev_flow, &flow_err))
16114                                         return -rte_mtr_error_set(error,
16115                                         ENOTSUP,
16116                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16117                                         NULL, "cannot setup "
16118                                         "policy port action");
16119                                 act_cnt->rix_port_id_action =
16120                                         dev_flow.handle->rix_port_id_action;
16121                                 act_cnt->fate_action =
16122                                         MLX5_FLOW_FATE_PORT_ID;
16123                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
16124                                 break;
16125                         }
16126                         case RTE_FLOW_ACTION_TYPE_JUMP:
16127                         {
16128                                 uint32_t jump_group = 0;
16129                                 uint32_t table = 0;
16130                                 struct mlx5_flow_tbl_data_entry *tbl_data;
16131                                 struct flow_grp_info grp_info = {
16132                                         .external = !!dev_flow.external,
16133                                         .transfer = !!transfer,
16134                                         .fdb_def_rule = !!priv->fdb_def_rule,
16135                                         .std_tbl_fix = 0,
16136                                         .skip_scale = dev_flow.skip_scale &
16137                                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
16138                                 };
16139                                 struct mlx5_flow_meter_sub_policy *sub_policy =
16140                                         mtr_policy->sub_policys[domain][0];
16141
16142                                 if (i >= MLX5_MTR_RTE_COLORS)
16143                                         return -rte_mtr_error_set(error,
16144                                           ENOTSUP,
16145                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16146                                           NULL,
16147                                           "cannot create policy "
16148                                           "jump action for this color");
16149                                 jump_group =
16150                                 ((const struct rte_flow_action_jump *)
16151                                                         act->conf)->group;
16152                                 if (mlx5_flow_group_to_table(dev, NULL,
16153                                                        jump_group,
16154                                                        &table,
16155                                                        &grp_info, &flow_err))
16156                                         return -rte_mtr_error_set(error,
16157                                         ENOTSUP,
16158                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16159                                         NULL, "cannot setup "
16160                                         "policy jump action");
16161                                 sub_policy->jump_tbl[i] =
16162                                 flow_dv_tbl_resource_get(dev,
16163                                         table, egress,
16164                                         transfer,
16165                                         !!dev_flow.external,
16166                                         NULL, jump_group, 0,
16167                                         0, &flow_err);
16168                                 if
16169                                 (!sub_policy->jump_tbl[i])
16170                                         return  -rte_mtr_error_set(error,
16171                                         ENOTSUP,
16172                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16173                                         NULL, "cannot create jump action.");
16174                                 tbl_data = container_of
16175                                 (sub_policy->jump_tbl[i],
16176                                 struct mlx5_flow_tbl_data_entry, tbl);
16177                                 act_cnt->dr_jump_action[domain] =
16178                                         tbl_data->jump.action;
16179                                 act_cnt->fate_action =
16180                                         MLX5_FLOW_FATE_JUMP;
16181                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
16182                                 break;
16183                         }
16184                         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
16185                         {
16186                                 if (i >= MLX5_MTR_RTE_COLORS)
16187                                         return -rte_mtr_error_set(error,
16188                                           ENOTSUP,
16189                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16190                                           NULL,
16191                                           "cannot create policy modify field for this color");
16192                                 if (flow_dv_convert_action_modify_field
16193                                         (dev, mhdr_res, act, attr, &flow_err))
16194                                         return -rte_mtr_error_set(error,
16195                                         ENOTSUP,
16196                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16197                                         NULL, "cannot setup policy modify field action");
16198                                 if (!mhdr_res->actions_num)
16199                                         return -rte_mtr_error_set(error,
16200                                         ENOTSUP,
16201                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16202                                         NULL, "cannot find policy modify field action");
16203                                 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
16204                                 break;
16205                         }
16206                         /*
16207                          * No need to check meter hierarchy for R colors
16208                          * here since it is done in the validation stage.
16209                          */
16210                         case RTE_FLOW_ACTION_TYPE_METER:
16211                         {
16212                                 const struct rte_flow_action_meter *mtr;
16213                                 struct mlx5_flow_meter_info *next_fm;
16214                                 struct mlx5_flow_meter_policy *next_policy;
16215                                 struct rte_flow_action tag_action;
16216                                 struct mlx5_rte_flow_action_set_tag set_tag;
16217                                 uint32_t next_mtr_idx = 0;
16218
16219                                 mtr = act->conf;
16220                                 next_fm = mlx5_flow_meter_find(priv,
16221                                                         mtr->mtr_id,
16222                                                         &next_mtr_idx);
16223                                 if (!next_fm)
16224                                         return -rte_mtr_error_set(error, EINVAL,
16225                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
16226                                                 "Fail to find next meter.");
16227                                 if (next_fm->def_policy)
16228                                         return -rte_mtr_error_set(error, EINVAL,
16229                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
16230                                 "Hierarchy only supports termination meter.");
16231                                 next_policy = mlx5_flow_meter_policy_find(dev,
16232                                                 next_fm->policy_id, NULL);
16233                                 MLX5_ASSERT(next_policy);
16234                                 if (next_fm->drop_cnt) {
16235                                         set_tag.id =
16236                                                 (enum modify_reg)
16237                                                 mlx5_flow_get_reg_id(dev,
16238                                                 MLX5_MTR_ID,
16239                                                 0,
16240                                                 (struct rte_flow_error *)error);
16241                                         set_tag.offset = (priv->mtr_reg_share ?
16242                                                 MLX5_MTR_COLOR_BITS : 0);
16243                                         set_tag.length = (priv->mtr_reg_share ?
16244                                                MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
16245                                                MLX5_REG_BITS);
16246                                         set_tag.data = next_mtr_idx;
16247                                         tag_action.type =
16248                                                 (enum rte_flow_action_type)
16249                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
16250                                         tag_action.conf = &set_tag;
16251                                         if (flow_dv_convert_action_set_reg
16252                                                 (mhdr_res, &tag_action,
16253                                                 (struct rte_flow_error *)error))
16254                                                 return -rte_errno;
16255                                         action_flags |=
16256                                                 MLX5_FLOW_ACTION_SET_TAG;
16257                                 }
16258                                 if (i == RTE_COLOR_YELLOW && next_fm->color_aware &&
16259                                     !next_fm->meter_action_y)
16260                                         if (__flow_dv_create_mtr_yellow_action(dev, next_fm, error))
16261                                                 return -rte_errno;
16262                                 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
16263                                 act_cnt->next_mtr_id = next_fm->meter_id;
16264                                 act_cnt->next_sub_policy = NULL;
16265                                 mtr_policy->is_hierarchy = 1;
16266                                 mtr_policy->dev = next_policy->dev;
16267                                 if (next_policy->mark)
16268                                         mtr_policy->mark = 1;
16269                                 action_flags |=
16270                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
16271                                 break;
16272                         }
16273                         default:
16274                                 return -rte_mtr_error_set(error, ENOTSUP,
16275                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16276                                           NULL, "action type not supported");
16277                         }
16278                         if ((action_flags & MLX5_FLOW_ACTION_SET_TAG) ||
16279                             (action_flags & MLX5_FLOW_ACTION_MODIFY_FIELD)) {
16280                                 /* create modify action if needed. */
16281                                 dev_flow.dv.group = 1;
16282                                 if (flow_dv_modify_hdr_resource_register
16283                                         (dev, mhdr_res, &dev_flow, &flow_err))
16284                                         return -rte_mtr_error_set(error,
16285                                                 ENOTSUP,
16286                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
16287                                                 NULL, "cannot register policy set tag/modify field action");
16288                                 act_cnt->modify_hdr =
16289                                         dev_flow.handle->dvh.modify_hdr;
16290                         }
16291                 }
16292         }
16293         return 0;
16294 }
16295
16296 /**
16297  * Create policy action per domain, lock free,
16298  * (mutex should be acquired by caller).
16299  * Dispatcher for action type specific call.
16300  *
16301  * @param[in] dev
16302  *   Pointer to the Ethernet device structure.
16303  * @param[in] mtr_policy
16304  *   Meter policy struct.
16305  * @param[in] action
16306  *   Action specification used to create meter actions.
16307  * @param[in] attr
16308  *   Pointer to the flow attributes.
16309  * @param[out] error
16310  *   Perform verbose error reporting if not NULL. Initialized in case of
16311  *   error only.
16312  *
16313  * @return
16314  *   0 on success, otherwise negative errno value.
16315  */
16316 static int
16317 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
16318                       struct mlx5_flow_meter_policy *mtr_policy,
16319                       const struct rte_flow_action *actions[RTE_COLORS],
16320                       struct rte_flow_attr *attr,
16321                       struct rte_mtr_error *error)
16322 {
16323         int ret, i;
16324         uint16_t sub_policy_num;
16325
16326         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16327                 sub_policy_num = (mtr_policy->sub_policy_num >>
16328                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16329                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16330                 if (sub_policy_num) {
16331                         ret = __flow_dv_create_domain_policy_acts(dev,
16332                                 mtr_policy, actions, attr,
16333                                 (enum mlx5_meter_domain)i, error);
16334                         /* Cleaning resource is done in the caller level. */
16335                         if (ret)
16336                                 return ret;
16337                 }
16338         }
16339         return 0;
16340 }
16341
16342 /**
16343  * Query a DV flow rule for its statistics via DevX.
16344  *
16345  * @param[in] dev
16346  *   Pointer to Ethernet device.
16347  * @param[in] cnt_idx
16348  *   Index to the flow counter.
16349  * @param[out] data
16350  *   Data retrieved by the query.
16351  * @param[out] error
16352  *   Perform verbose error reporting if not NULL.
16353  *
16354  * @return
16355  *   0 on success, a negative errno value otherwise and rte_errno is set.
16356  */
16357 static int
16358 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
16359                     struct rte_flow_error *error)
16360 {
16361         struct mlx5_priv *priv = dev->data->dev_private;
16362         struct rte_flow_query_count *qc = data;
16363
16364         if (!priv->sh->cdev->config.devx)
16365                 return rte_flow_error_set(error, ENOTSUP,
16366                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16367                                           NULL,
16368                                           "counters are not supported");
16369         if (cnt_idx) {
16370                 uint64_t pkts, bytes;
16371                 struct mlx5_flow_counter *cnt;
16372                 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
16373
16374                 if (err)
16375                         return rte_flow_error_set(error, -err,
16376                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16377                                         NULL, "cannot read counters");
16378                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
16379                 qc->hits_set = 1;
16380                 qc->bytes_set = 1;
16381                 qc->hits = pkts - cnt->hits;
16382                 qc->bytes = bytes - cnt->bytes;
16383                 if (qc->reset) {
16384                         cnt->hits = pkts;
16385                         cnt->bytes = bytes;
16386                 }
16387                 return 0;
16388         }
16389         return rte_flow_error_set(error, EINVAL,
16390                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16391                                   NULL,
16392                                   "counters are not available");
16393 }
16394
16395 int
16396 flow_dv_action_query(struct rte_eth_dev *dev,
16397                      const struct rte_flow_action_handle *handle, void *data,
16398                      struct rte_flow_error *error)
16399 {
16400         struct mlx5_age_param *age_param;
16401         struct rte_flow_query_age *resp;
16402         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
16403         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
16404         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
16405         struct mlx5_priv *priv = dev->data->dev_private;
16406         struct mlx5_aso_ct_action *ct;
16407         uint16_t owner;
16408         uint32_t dev_idx;
16409
16410         switch (type) {
16411         case MLX5_INDIRECT_ACTION_TYPE_AGE:
16412                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
16413                 resp = data;
16414                 resp->aged = __atomic_load_n(&age_param->state,
16415                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
16416                                                                           1 : 0;
16417                 resp->sec_since_last_hit_valid = !resp->aged;
16418                 if (resp->sec_since_last_hit_valid)
16419                         resp->sec_since_last_hit = __atomic_load_n
16420                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
16421                 return 0;
16422         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
16423                 return flow_dv_query_count(dev, idx, data, error);
16424         case MLX5_INDIRECT_ACTION_TYPE_CT:
16425                 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
16426                 if (owner != PORT_ID(priv))
16427                         return rte_flow_error_set(error, EACCES,
16428                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16429                                         NULL,
16430                                         "CT object owned by another port");
16431                 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
16432                 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
16433                 MLX5_ASSERT(ct);
16434                 if (!ct->refcnt)
16435                         return rte_flow_error_set(error, EFAULT,
16436                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16437                                         NULL,
16438                                         "CT object is inactive");
16439                 ((struct rte_flow_action_conntrack *)data)->peer_port =
16440                                                         ct->peer;
16441                 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
16442                                                         ct->is_original;
16443                 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
16444                         return rte_flow_error_set(error, EIO,
16445                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16446                                         NULL,
16447                                         "Failed to query CT context");
16448                 return 0;
16449         default:
16450                 return rte_flow_error_set(error, ENOTSUP,
16451                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16452                                           "action type query not supported");
16453         }
16454 }
16455
16456 /**
16457  * Query a flow rule AGE action for aging information.
16458  *
16459  * @param[in] dev
16460  *   Pointer to Ethernet device.
16461  * @param[in] flow
16462  *   Pointer to the sub flow.
16463  * @param[out] data
16464  *   data retrieved by the query.
16465  * @param[out] error
16466  *   Perform verbose error reporting if not NULL.
16467  *
16468  * @return
16469  *   0 on success, a negative errno value otherwise and rte_errno is set.
16470  */
16471 static int
16472 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
16473                   void *data, struct rte_flow_error *error)
16474 {
16475         struct rte_flow_query_age *resp = data;
16476         struct mlx5_age_param *age_param;
16477
16478         if (flow->age) {
16479                 struct mlx5_aso_age_action *act =
16480                                      flow_aso_age_get_by_idx(dev, flow->age);
16481
16482                 age_param = &act->age_params;
16483         } else if (flow->counter) {
16484                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
16485
16486                 if (!age_param || !age_param->timeout)
16487                         return rte_flow_error_set
16488                                         (error, EINVAL,
16489                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16490                                          NULL, "cannot read age data");
16491         } else {
16492                 return rte_flow_error_set(error, EINVAL,
16493                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16494                                           NULL, "age data not available");
16495         }
16496         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
16497                                      AGE_TMOUT ? 1 : 0;
16498         resp->sec_since_last_hit_valid = !resp->aged;
16499         if (resp->sec_since_last_hit_valid)
16500                 resp->sec_since_last_hit = __atomic_load_n
16501                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
16502         return 0;
16503 }
16504
16505 /**
16506  * Query a flow.
16507  *
16508  * @see rte_flow_query()
16509  * @see rte_flow_ops
16510  */
16511 static int
16512 flow_dv_query(struct rte_eth_dev *dev,
16513               struct rte_flow *flow __rte_unused,
16514               const struct rte_flow_action *actions __rte_unused,
16515               void *data __rte_unused,
16516               struct rte_flow_error *error __rte_unused)
16517 {
16518         int ret = -EINVAL;
16519
16520         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
16521                 switch (actions->type) {
16522                 case RTE_FLOW_ACTION_TYPE_VOID:
16523                         break;
16524                 case RTE_FLOW_ACTION_TYPE_COUNT:
16525                         ret = flow_dv_query_count(dev, flow->counter, data,
16526                                                   error);
16527                         break;
16528                 case RTE_FLOW_ACTION_TYPE_AGE:
16529                         ret = flow_dv_query_age(dev, flow, data, error);
16530                         break;
16531                 default:
16532                         return rte_flow_error_set(error, ENOTSUP,
16533                                                   RTE_FLOW_ERROR_TYPE_ACTION,
16534                                                   actions,
16535                                                   "action not supported");
16536                 }
16537         }
16538         return ret;
16539 }
16540
16541 /**
16542  * Destroy the meter table set.
16543  * Lock free, (mutex should be acquired by caller).
16544  *
16545  * @param[in] dev
16546  *   Pointer to Ethernet device.
16547  * @param[in] fm
16548  *   Meter information table.
16549  */
16550 static void
16551 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
16552                         struct mlx5_flow_meter_info *fm)
16553 {
16554         struct mlx5_priv *priv = dev->data->dev_private;
16555         int i;
16556
16557         if (!fm || !priv->sh->config.dv_flow_en)
16558                 return;
16559         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16560                 if (fm->drop_rule[i]) {
16561                         claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
16562                         fm->drop_rule[i] = NULL;
16563                 }
16564         }
16565 }
16566
16567 static void
16568 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
16569 {
16570         struct mlx5_priv *priv = dev->data->dev_private;
16571         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16572         struct mlx5_flow_tbl_data_entry *tbl;
16573         int i, j;
16574
16575         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16576                 if (mtrmng->def_rule[i]) {
16577                         claim_zero(mlx5_flow_os_destroy_flow
16578                                         (mtrmng->def_rule[i]));
16579                         mtrmng->def_rule[i] = NULL;
16580                 }
16581                 if (mtrmng->def_matcher[i]) {
16582                         tbl = container_of(mtrmng->def_matcher[i]->tbl,
16583                                 struct mlx5_flow_tbl_data_entry, tbl);
16584                         mlx5_list_unregister(tbl->matchers,
16585                                              &mtrmng->def_matcher[i]->entry);
16586                         mtrmng->def_matcher[i] = NULL;
16587                 }
16588                 for (j = 0; j < MLX5_REG_BITS; j++) {
16589                         if (mtrmng->drop_matcher[i][j]) {
16590                                 tbl =
16591                                 container_of(mtrmng->drop_matcher[i][j]->tbl,
16592                                              struct mlx5_flow_tbl_data_entry,
16593                                              tbl);
16594                                 mlx5_list_unregister(tbl->matchers,
16595                                             &mtrmng->drop_matcher[i][j]->entry);
16596                                 mtrmng->drop_matcher[i][j] = NULL;
16597                         }
16598                 }
16599                 if (mtrmng->drop_tbl[i]) {
16600                         flow_dv_tbl_resource_release(MLX5_SH(dev),
16601                                 mtrmng->drop_tbl[i]);
16602                         mtrmng->drop_tbl[i] = NULL;
16603                 }
16604         }
16605 }
16606
16607 /* Number of meter flow actions, count and jump or count and drop. */
16608 #define METER_ACTIONS 2
16609
16610 static void
16611 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
16612                                     enum mlx5_meter_domain domain)
16613 {
16614         struct mlx5_priv *priv = dev->data->dev_private;
16615         struct mlx5_flow_meter_def_policy *def_policy =
16616                         priv->sh->mtrmng->def_policy[domain];
16617
16618         __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
16619         mlx5_free(def_policy);
16620         priv->sh->mtrmng->def_policy[domain] = NULL;
16621 }
16622
16623 /**
16624  * Destroy the default policy table set.
16625  *
16626  * @param[in] dev
16627  *   Pointer to Ethernet device.
16628  */
16629 static void
16630 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
16631 {
16632         struct mlx5_priv *priv = dev->data->dev_private;
16633         int i;
16634
16635         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
16636                 if (priv->sh->mtrmng->def_policy[i])
16637                         __flow_dv_destroy_domain_def_policy(dev,
16638                                         (enum mlx5_meter_domain)i);
16639         priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
16640 }
16641
16642 static int
16643 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
16644                         uint32_t color_reg_c_idx,
16645                         enum rte_color color, void *matcher_object,
16646                         int actions_n, void *actions,
16647                         bool match_src_port, const struct rte_flow_item *item,
16648                         void **rule, const struct rte_flow_attr *attr)
16649 {
16650         int ret;
16651         struct mlx5_flow_dv_match_params value = {
16652                 .size = sizeof(value.buf),
16653         };
16654         struct mlx5_flow_dv_match_params matcher = {
16655                 .size = sizeof(matcher.buf),
16656         };
16657         struct mlx5_priv *priv = dev->data->dev_private;
16658         uint8_t misc_mask;
16659
16660         if (match_src_port && priv->sh->esw_mode) {
16661                 if (flow_dv_translate_item_port_id(dev, matcher.buf,
16662                                                    value.buf, item, attr)) {
16663                         DRV_LOG(ERR, "Failed to create meter policy%d flow's"
16664                                 " value with port.", color);
16665                         return -1;
16666                 }
16667         }
16668         flow_dv_match_meta_reg(matcher.buf, value.buf,
16669                                (enum modify_reg)color_reg_c_idx,
16670                                rte_col_2_mlx5_col(color), UINT32_MAX);
16671         misc_mask = flow_dv_matcher_enable(value.buf);
16672         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16673         ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
16674                                        actions_n, actions, rule);
16675         if (ret) {
16676                 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
16677                 return -1;
16678         }
16679         return 0;
16680 }
16681
16682 static int
16683 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
16684                         uint32_t color_reg_c_idx,
16685                         uint16_t priority,
16686                         struct mlx5_flow_meter_sub_policy *sub_policy,
16687                         const struct rte_flow_attr *attr,
16688                         bool match_src_port,
16689                         const struct rte_flow_item *item,
16690                         struct mlx5_flow_dv_matcher **policy_matcher,
16691                         struct rte_flow_error *error)
16692 {
16693         struct mlx5_list_entry *entry;
16694         struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
16695         struct mlx5_flow_dv_matcher matcher = {
16696                 .mask = {
16697                         .size = sizeof(matcher.mask.buf),
16698                 },
16699                 .tbl = tbl_rsc,
16700         };
16701         struct mlx5_flow_dv_match_params value = {
16702                 .size = sizeof(value.buf),
16703         };
16704         struct mlx5_flow_cb_ctx ctx = {
16705                 .error = error,
16706                 .data = &matcher,
16707         };
16708         struct mlx5_flow_tbl_data_entry *tbl_data;
16709         struct mlx5_priv *priv = dev->data->dev_private;
16710         const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16711
16712         if (match_src_port && priv->sh->esw_mode) {
16713                 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16714                                                    value.buf, item, attr)) {
16715                         DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16716                                 " with port.", priority);
16717                         return -1;
16718                 }
16719         }
16720         tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16721         if (priority < RTE_COLOR_RED)
16722                 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16723                         (enum modify_reg)color_reg_c_idx, 0, color_mask);
16724         matcher.priority = priority;
16725         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16726                                     matcher.mask.size);
16727         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16728         if (!entry) {
16729                 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16730                 return -1;
16731         }
16732         *policy_matcher =
16733                 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16734         return 0;
16735 }
16736
16737 /**
16738  * Create the policy rules per domain.
16739  *
16740  * @param[in] dev
16741  *   Pointer to Ethernet device.
16742  * @param[in] sub_policy
16743  *    Pointer to sub policy table..
16744  * @param[in] egress
16745  *   Direction of the table.
16746  * @param[in] transfer
16747  *   E-Switch or NIC flow.
16748  * @param[in] acts
16749  *   Pointer to policy action list per color.
16750  *
16751  * @return
16752  *   0 on success, -1 otherwise.
16753  */
16754 static int
16755 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16756                 struct mlx5_flow_meter_sub_policy *sub_policy,
16757                 uint8_t egress, uint8_t transfer, bool match_src_port,
16758                 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16759 {
16760         struct mlx5_priv *priv = dev->data->dev_private;
16761         struct rte_flow_error flow_err;
16762         uint32_t color_reg_c_idx;
16763         struct rte_flow_attr attr = {
16764                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16765                 .priority = 0,
16766                 .ingress = 0,
16767                 .egress = !!egress,
16768                 .transfer = !!transfer,
16769                 .reserved = 0,
16770         };
16771         int i;
16772         int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16773         struct mlx5_sub_policy_color_rule *color_rule;
16774         bool svport_match;
16775         struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16776
16777         if (ret < 0)
16778                 return -1;
16779         /* Create policy table with POLICY level. */
16780         if (!sub_policy->tbl_rsc)
16781                 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16782                                 MLX5_FLOW_TABLE_LEVEL_POLICY,
16783                                 egress, transfer, false, NULL, 0, 0,
16784                                 sub_policy->idx, &flow_err);
16785         if (!sub_policy->tbl_rsc) {
16786                 DRV_LOG(ERR,
16787                         "Failed to create meter sub policy table.");
16788                 return -1;
16789         }
16790         /* Prepare matchers. */
16791         color_reg_c_idx = ret;
16792         for (i = 0; i < RTE_COLORS; i++) {
16793                 TAILQ_INIT(&sub_policy->color_rules[i]);
16794                 if (!acts[i].actions_n)
16795                         continue;
16796                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16797                                 sizeof(struct mlx5_sub_policy_color_rule),
16798                                 0, SOCKET_ID_ANY);
16799                 if (!color_rule) {
16800                         DRV_LOG(ERR, "No memory to create color rule.");
16801                         goto err_exit;
16802                 }
16803                 tmp_rules[i] = color_rule;
16804                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16805                                   color_rule, next_port);
16806                 color_rule->src_port = priv->representor_id;
16807                 /* No use. */
16808                 attr.priority = i;
16809                 /* Create matchers for colors. */
16810                 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16811                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16812                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16813                                 &attr, svport_match, NULL,
16814                                 &color_rule->matcher, &flow_err)) {
16815                         DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16816                         goto err_exit;
16817                 }
16818                 /* Create flow, matching color. */
16819                 if (__flow_dv_create_policy_flow(dev,
16820                                 color_reg_c_idx, (enum rte_color)i,
16821                                 color_rule->matcher->matcher_object,
16822                                 acts[i].actions_n, acts[i].dv_actions,
16823                                 svport_match, NULL, &color_rule->rule,
16824                                 &attr)) {
16825                         DRV_LOG(ERR, "Failed to create color%u rule.", i);
16826                         goto err_exit;
16827                 }
16828         }
16829         return 0;
16830 err_exit:
16831         /* All the policy rules will be cleared. */
16832         do {
16833                 color_rule = tmp_rules[i];
16834                 if (color_rule) {
16835                         if (color_rule->rule)
16836                                 mlx5_flow_os_destroy_flow(color_rule->rule);
16837                         if (color_rule->matcher) {
16838                                 struct mlx5_flow_tbl_data_entry *tbl =
16839                                         container_of(color_rule->matcher->tbl,
16840                                                      typeof(*tbl), tbl);
16841                                 mlx5_list_unregister(tbl->matchers,
16842                                                 &color_rule->matcher->entry);
16843                         }
16844                         TAILQ_REMOVE(&sub_policy->color_rules[i],
16845                                      color_rule, next_port);
16846                         mlx5_free(color_rule);
16847                 }
16848         } while (i--);
16849         return -1;
16850 }
16851
16852 static int
16853 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16854                         struct mlx5_flow_meter_policy *mtr_policy,
16855                         struct mlx5_flow_meter_sub_policy *sub_policy,
16856                         uint32_t domain)
16857 {
16858         struct mlx5_priv *priv = dev->data->dev_private;
16859         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16860         struct mlx5_flow_dv_tag_resource *tag;
16861         struct mlx5_flow_dv_port_id_action_resource *port_action;
16862         struct mlx5_hrxq *hrxq;
16863         struct mlx5_flow_meter_info *next_fm[RTE_COLORS] = {NULL};
16864         struct mlx5_flow_meter_policy *next_policy;
16865         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16866         struct mlx5_flow_tbl_data_entry *tbl_data;
16867         struct rte_flow_error error;
16868         uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16869         uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16870         bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16871         bool match_src_port = false;
16872         int i;
16873
16874         /* If RSS or Queue, no previous actions / rules is created. */
16875         for (i = 0; i < RTE_COLORS; i++) {
16876                 acts[i].actions_n = 0;
16877                 if (i == RTE_COLOR_RED) {
16878                         /* Only support drop on red. */
16879                         acts[i].dv_actions[0] =
16880                                 mtr_policy->dr_drop_action[domain];
16881                         acts[i].actions_n = 1;
16882                         continue;
16883                 }
16884                 if (mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16885                         struct rte_flow_attr attr = {
16886                                 .transfer = transfer
16887                         };
16888
16889                         next_fm[i] = mlx5_flow_meter_find(priv,
16890                                         mtr_policy->act_cnt[i].next_mtr_id,
16891                                         NULL);
16892                         if (!next_fm[i]) {
16893                                 DRV_LOG(ERR,
16894                                         "Failed to get next hierarchy meter.");
16895                                 goto err_exit;
16896                         }
16897                         if (mlx5_flow_meter_attach(priv, next_fm[i],
16898                                                    &attr, &error)) {
16899                                 DRV_LOG(ERR, "%s", error.message);
16900                                 next_fm[i] = NULL;
16901                                 goto err_exit;
16902                         }
16903                         /* Meter action must be the first for TX. */
16904                         if (mtr_first) {
16905                                 acts[i].dv_actions[acts[i].actions_n] =
16906                                         (next_fm[i]->color_aware && i == RTE_COLOR_YELLOW) ?
16907                                                 next_fm[i]->meter_action_y :
16908                                                 next_fm[i]->meter_action_g;
16909                                 acts[i].actions_n++;
16910                         }
16911                 }
16912                 if (mtr_policy->act_cnt[i].rix_mark) {
16913                         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16914                                         mtr_policy->act_cnt[i].rix_mark);
16915                         if (!tag) {
16916                                 DRV_LOG(ERR, "Failed to find "
16917                                 "mark action for policy.");
16918                                 goto err_exit;
16919                         }
16920                         acts[i].dv_actions[acts[i].actions_n] = tag->action;
16921                         acts[i].actions_n++;
16922                 }
16923                 if (mtr_policy->act_cnt[i].modify_hdr) {
16924                         acts[i].dv_actions[acts[i].actions_n] =
16925                                 mtr_policy->act_cnt[i].modify_hdr->action;
16926                         acts[i].actions_n++;
16927                 }
16928                 if (mtr_policy->act_cnt[i].fate_action) {
16929                         switch (mtr_policy->act_cnt[i].fate_action) {
16930                         case MLX5_FLOW_FATE_PORT_ID:
16931                                 port_action = mlx5_ipool_get
16932                                         (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16933                                 mtr_policy->act_cnt[i].rix_port_id_action);
16934                                 if (!port_action) {
16935                                         DRV_LOG(ERR, "Failed to find "
16936                                                 "port action for policy.");
16937                                         goto err_exit;
16938                                 }
16939                                 acts[i].dv_actions[acts[i].actions_n] =
16940                                         port_action->action;
16941                                 acts[i].actions_n++;
16942                                 mtr_policy->dev = dev;
16943                                 match_src_port = true;
16944                                 break;
16945                         case MLX5_FLOW_FATE_DROP:
16946                         case MLX5_FLOW_FATE_JUMP:
16947                                 acts[i].dv_actions[acts[i].actions_n] =
16948                                 mtr_policy->act_cnt[i].dr_jump_action[domain];
16949                                 acts[i].actions_n++;
16950                                 break;
16951                         case MLX5_FLOW_FATE_SHARED_RSS:
16952                         case MLX5_FLOW_FATE_QUEUE:
16953                                 hrxq = mlx5_ipool_get
16954                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16955                                          sub_policy->rix_hrxq[i]);
16956                                 if (!hrxq) {
16957                                         DRV_LOG(ERR, "Failed to find "
16958                                                 "queue action for policy.");
16959                                         goto err_exit;
16960                                 }
16961                                 acts[i].dv_actions[acts[i].actions_n] =
16962                                         hrxq->action;
16963                                 acts[i].actions_n++;
16964                                 break;
16965                         case MLX5_FLOW_FATE_MTR:
16966                                 if (!next_fm[i]) {
16967                                         DRV_LOG(ERR,
16968                                                 "No next hierarchy meter.");
16969                                         goto err_exit;
16970                                 }
16971                                 if (!mtr_first) {
16972                                         acts[i].dv_actions[acts[i].actions_n] =
16973                                                 (next_fm[i]->color_aware && i == RTE_COLOR_YELLOW) ?
16974                                                         next_fm[i]->meter_action_y :
16975                                                         next_fm[i]->meter_action_g;
16976                                         acts[i].actions_n++;
16977                                 }
16978                                 if (mtr_policy->act_cnt[i].next_sub_policy) {
16979                                         next_sub_policy =
16980                                         mtr_policy->act_cnt[i].next_sub_policy;
16981                                 } else {
16982                                         next_policy =
16983                                                 mlx5_flow_meter_policy_find(dev,
16984                                                                 next_fm[i]->policy_id, NULL);
16985                                         MLX5_ASSERT(next_policy);
16986                                         next_sub_policy =
16987                                         next_policy->sub_policys[domain][0];
16988                                 }
16989                                 tbl_data =
16990                                         container_of(next_sub_policy->tbl_rsc,
16991                                         struct mlx5_flow_tbl_data_entry, tbl);
16992                                 acts[i].dv_actions[acts[i].actions_n++] =
16993                                                         tbl_data->jump.action;
16994                                 if (mtr_policy->act_cnt[i].modify_hdr)
16995                                         match_src_port = !!transfer;
16996                                 break;
16997                         default:
16998                                 /*Queue action do nothing*/
16999                                 break;
17000                         }
17001                 }
17002         }
17003         if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
17004                                 egress, transfer, match_src_port, acts)) {
17005                 DRV_LOG(ERR,
17006                         "Failed to create policy rules per domain.");
17007                 goto err_exit;
17008         }
17009         return 0;
17010 err_exit:
17011         for (i = 0; i < RTE_COLORS; i++)
17012                 if (next_fm[i])
17013                         mlx5_flow_meter_detach(priv, next_fm[i]);
17014         return -1;
17015 }
17016
17017 /**
17018  * Create the policy rules.
17019  *
17020  * @param[in] dev
17021  *   Pointer to Ethernet device.
17022  * @param[in,out] mtr_policy
17023  *   Pointer to meter policy table.
17024  *
17025  * @return
17026  *   0 on success, -1 otherwise.
17027  */
17028 static int
17029 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
17030                              struct mlx5_flow_meter_policy *mtr_policy)
17031 {
17032         int i;
17033         uint16_t sub_policy_num;
17034
17035         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
17036                 sub_policy_num = (mtr_policy->sub_policy_num >>
17037                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
17038                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17039                 if (!sub_policy_num)
17040                         continue;
17041                 /* Prepare actions list and create policy rules. */
17042                 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
17043                         mtr_policy->sub_policys[i][0], i)) {
17044                         DRV_LOG(ERR, "Failed to create policy action "
17045                                 "list per domain.");
17046                         return -1;
17047                 }
17048         }
17049         return 0;
17050 }
17051
17052 static int
17053 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
17054 {
17055         struct mlx5_priv *priv = dev->data->dev_private;
17056         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
17057         struct mlx5_flow_meter_def_policy *def_policy;
17058         struct mlx5_flow_tbl_resource *jump_tbl;
17059         struct mlx5_flow_tbl_data_entry *tbl_data;
17060         uint8_t egress, transfer;
17061         struct rte_flow_error error;
17062         struct mlx5_meter_policy_acts acts[RTE_COLORS];
17063         int ret;
17064
17065         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
17066         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
17067         def_policy = mtrmng->def_policy[domain];
17068         if (!def_policy) {
17069                 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
17070                         sizeof(struct mlx5_flow_meter_def_policy),
17071                         RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
17072                 if (!def_policy) {
17073                         DRV_LOG(ERR, "Failed to alloc default policy table.");
17074                         goto def_policy_error;
17075                 }
17076                 mtrmng->def_policy[domain] = def_policy;
17077                 /* Create the meter suffix table with SUFFIX level. */
17078                 jump_tbl = flow_dv_tbl_resource_get(dev,
17079                                 MLX5_FLOW_TABLE_LEVEL_METER,
17080                                 egress, transfer, false, NULL, 0,
17081                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
17082                 if (!jump_tbl) {
17083                         DRV_LOG(ERR,
17084                                 "Failed to create meter suffix table.");
17085                         goto def_policy_error;
17086                 }
17087                 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
17088                 tbl_data = container_of(jump_tbl,
17089                                         struct mlx5_flow_tbl_data_entry, tbl);
17090                 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
17091                                                 tbl_data->jump.action;
17092                 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
17093                 acts[RTE_COLOR_GREEN].actions_n = 1;
17094                 /*
17095                  * YELLOW has the same default policy as GREEN does.
17096                  * G & Y share the same table and action. The 2nd time of table
17097                  * resource getting is just to update the reference count for
17098                  * the releasing stage.
17099                  */
17100                 jump_tbl = flow_dv_tbl_resource_get(dev,
17101                                 MLX5_FLOW_TABLE_LEVEL_METER,
17102                                 egress, transfer, false, NULL, 0,
17103                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
17104                 if (!jump_tbl) {
17105                         DRV_LOG(ERR,
17106                                 "Failed to get meter suffix table.");
17107                         goto def_policy_error;
17108                 }
17109                 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
17110                 tbl_data = container_of(jump_tbl,
17111                                         struct mlx5_flow_tbl_data_entry, tbl);
17112                 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
17113                                                 tbl_data->jump.action;
17114                 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
17115                 acts[RTE_COLOR_YELLOW].actions_n = 1;
17116                 /* Create jump action to the drop table. */
17117                 if (!mtrmng->drop_tbl[domain]) {
17118                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
17119                                 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
17120                                  egress, transfer, false, NULL, 0,
17121                                  0, MLX5_MTR_TABLE_ID_DROP, &error);
17122                         if (!mtrmng->drop_tbl[domain]) {
17123                                 DRV_LOG(ERR, "Failed to create meter "
17124                                         "drop table for default policy.");
17125                                 goto def_policy_error;
17126                         }
17127                 }
17128                 /* all RED: unique Drop table for jump action. */
17129                 tbl_data = container_of(mtrmng->drop_tbl[domain],
17130                                         struct mlx5_flow_tbl_data_entry, tbl);
17131                 def_policy->dr_jump_action[RTE_COLOR_RED] =
17132                                                 tbl_data->jump.action;
17133                 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
17134                 acts[RTE_COLOR_RED].actions_n = 1;
17135                 /* Create default policy rules. */
17136                 ret = __flow_dv_create_domain_policy_rules(dev,
17137                                         &def_policy->sub_policy,
17138                                         egress, transfer, false, acts);
17139                 if (ret) {
17140                         DRV_LOG(ERR, "Failed to create default policy rules.");
17141                         goto def_policy_error;
17142                 }
17143         }
17144         return 0;
17145 def_policy_error:
17146         __flow_dv_destroy_domain_def_policy(dev,
17147                                             (enum mlx5_meter_domain)domain);
17148         return -1;
17149 }
17150
17151 /**
17152  * Create the default policy table set.
17153  *
17154  * @param[in] dev
17155  *   Pointer to Ethernet device.
17156  * @return
17157  *   0 on success, -1 otherwise.
17158  */
17159 static int
17160 flow_dv_create_def_policy(struct rte_eth_dev *dev)
17161 {
17162         struct mlx5_priv *priv = dev->data->dev_private;
17163         int i;
17164
17165         /* Non-termination policy table. */
17166         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
17167                 if (!priv->sh->config.dv_esw_en &&
17168                     i == MLX5_MTR_DOMAIN_TRANSFER)
17169                         continue;
17170                 if (__flow_dv_create_domain_def_policy(dev, i)) {
17171                         DRV_LOG(ERR, "Failed to create default policy");
17172                         /* Rollback the created default policies for others. */
17173                         flow_dv_destroy_def_policy(dev);
17174                         return -1;
17175                 }
17176         }
17177         return 0;
17178 }
17179
17180 /**
17181  * Create the needed meter tables.
17182  * Lock free, (mutex should be acquired by caller).
17183  *
17184  * @param[in] dev
17185  *   Pointer to Ethernet device.
17186  * @param[in] fm
17187  *   Meter information table.
17188  * @param[in] mtr_idx
17189  *   Meter index.
17190  * @param[in] domain_bitmap
17191  *   Domain bitmap.
17192  * @return
17193  *   0 on success, -1 otherwise.
17194  */
17195 static int
17196 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
17197                         struct mlx5_flow_meter_info *fm,
17198                         uint32_t mtr_idx,
17199                         uint8_t domain_bitmap)
17200 {
17201         struct mlx5_priv *priv = dev->data->dev_private;
17202         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
17203         struct rte_flow_error error;
17204         struct mlx5_flow_tbl_data_entry *tbl_data;
17205         uint8_t egress, transfer;
17206         void *actions[METER_ACTIONS];
17207         int domain, ret, i;
17208         struct mlx5_flow_counter *cnt;
17209         struct mlx5_flow_dv_match_params value = {
17210                 .size = sizeof(value.buf),
17211         };
17212         struct mlx5_flow_dv_match_params matcher_para = {
17213                 .size = sizeof(matcher_para.buf),
17214         };
17215         int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
17216                                                      0, &error);
17217         uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
17218         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
17219         struct mlx5_list_entry *entry;
17220         struct mlx5_flow_dv_matcher matcher = {
17221                 .mask = {
17222                         .size = sizeof(matcher.mask.buf),
17223                 },
17224         };
17225         struct mlx5_flow_dv_matcher *drop_matcher;
17226         struct mlx5_flow_cb_ctx ctx = {
17227                 .error = &error,
17228                 .data = &matcher,
17229         };
17230         uint8_t misc_mask;
17231
17232         if (!priv->mtr_en || mtr_id_reg_c < 0) {
17233                 rte_errno = ENOTSUP;
17234                 return -1;
17235         }
17236         for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
17237                 if (!(domain_bitmap & (1 << domain)) ||
17238                         (mtrmng->def_rule[domain] && !fm->drop_cnt))
17239                         continue;
17240                 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
17241                 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
17242                 /* Create the drop table with METER DROP level. */
17243                 if (!mtrmng->drop_tbl[domain]) {
17244                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
17245                                         MLX5_FLOW_TABLE_LEVEL_METER,
17246                                         egress, transfer, false, NULL, 0,
17247                                         0, MLX5_MTR_TABLE_ID_DROP, &error);
17248                         if (!mtrmng->drop_tbl[domain]) {
17249                                 DRV_LOG(ERR, "Failed to create meter drop table.");
17250                                 goto policy_error;
17251                         }
17252                 }
17253                 /* Create default matcher in drop table. */
17254                 matcher.tbl = mtrmng->drop_tbl[domain],
17255                 tbl_data = container_of(mtrmng->drop_tbl[domain],
17256                                 struct mlx5_flow_tbl_data_entry, tbl);
17257                 if (!mtrmng->def_matcher[domain]) {
17258                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
17259                                        (enum modify_reg)mtr_id_reg_c,
17260                                        0, 0);
17261                         matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
17262                         matcher.crc = rte_raw_cksum
17263                                         ((const void *)matcher.mask.buf,
17264                                         matcher.mask.size);
17265                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
17266                         if (!entry) {
17267                                 DRV_LOG(ERR, "Failed to register meter "
17268                                 "drop default matcher.");
17269                                 goto policy_error;
17270                         }
17271                         mtrmng->def_matcher[domain] = container_of(entry,
17272                         struct mlx5_flow_dv_matcher, entry);
17273                 }
17274                 /* Create default rule in drop table. */
17275                 if (!mtrmng->def_rule[domain]) {
17276                         i = 0;
17277                         actions[i++] = priv->sh->dr_drop_action;
17278                         flow_dv_match_meta_reg(matcher_para.buf, value.buf,
17279                                 (enum modify_reg)mtr_id_reg_c, 0, 0);
17280                         misc_mask = flow_dv_matcher_enable(value.buf);
17281                         __flow_dv_adjust_buf_size(&value.size, misc_mask);
17282                         ret = mlx5_flow_os_create_flow
17283                                 (mtrmng->def_matcher[domain]->matcher_object,
17284                                 (void *)&value, i, actions,
17285                                 &mtrmng->def_rule[domain]);
17286                         if (ret) {
17287                                 DRV_LOG(ERR, "Failed to create meter "
17288                                 "default drop rule for drop table.");
17289                                 goto policy_error;
17290                         }
17291                 }
17292                 if (!fm->drop_cnt)
17293                         continue;
17294                 MLX5_ASSERT(mtrmng->max_mtr_bits);
17295                 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
17296                         /* Create matchers for Drop. */
17297                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
17298                                         (enum modify_reg)mtr_id_reg_c, 0,
17299                                         (mtr_id_mask << mtr_id_offset));
17300                         matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
17301                         matcher.crc = rte_raw_cksum
17302                                         ((const void *)matcher.mask.buf,
17303                                         matcher.mask.size);
17304                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
17305                         if (!entry) {
17306                                 DRV_LOG(ERR,
17307                                 "Failed to register meter drop matcher.");
17308                                 goto policy_error;
17309                         }
17310                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
17311                                 container_of(entry, struct mlx5_flow_dv_matcher,
17312                                              entry);
17313                 }
17314                 drop_matcher =
17315                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
17316                 /* Create drop rule, matching meter_id only. */
17317                 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
17318                                 (enum modify_reg)mtr_id_reg_c,
17319                                 (mtr_idx << mtr_id_offset), UINT32_MAX);
17320                 i = 0;
17321                 cnt = flow_dv_counter_get_by_idx(dev,
17322                                         fm->drop_cnt, NULL);
17323                 actions[i++] = cnt->action;
17324                 actions[i++] = priv->sh->dr_drop_action;
17325                 misc_mask = flow_dv_matcher_enable(value.buf);
17326                 __flow_dv_adjust_buf_size(&value.size, misc_mask);
17327                 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
17328                                                (void *)&value, i, actions,
17329                                                &fm->drop_rule[domain]);
17330                 if (ret) {
17331                         DRV_LOG(ERR, "Failed to create meter "
17332                                 "drop rule for drop table.");
17333                                 goto policy_error;
17334                 }
17335         }
17336         return 0;
17337 policy_error:
17338         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
17339                 if (fm->drop_rule[i]) {
17340                         claim_zero(mlx5_flow_os_destroy_flow
17341                                 (fm->drop_rule[i]));
17342                         fm->drop_rule[i] = NULL;
17343                 }
17344         }
17345         return -1;
17346 }
17347
17348 static struct mlx5_flow_meter_sub_policy *
17349 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
17350                 struct mlx5_flow_meter_policy *mtr_policy,
17351                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
17352                 struct mlx5_flow_meter_sub_policy *next_sub_policy,
17353                 bool *is_reuse)
17354 {
17355         struct mlx5_priv *priv = dev->data->dev_private;
17356         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17357         uint32_t sub_policy_idx = 0;
17358         uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
17359         uint32_t i, j;
17360         struct mlx5_hrxq *hrxq;
17361         struct mlx5_flow_handle dh;
17362         struct mlx5_meter_policy_action_container *act_cnt;
17363         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17364         uint16_t sub_policy_num;
17365         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
17366
17367         MLX5_ASSERT(wks);
17368         rte_spinlock_lock(&mtr_policy->sl);
17369         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17370                 if (!rss_desc[i])
17371                         continue;
17372                 hrxq = mlx5_hrxq_get(dev, rss_desc[i]);
17373                 if (!hrxq) {
17374                         rte_spinlock_unlock(&mtr_policy->sl);
17375                         return NULL;
17376                 }
17377                 hrxq_idx[i] = hrxq->idx;
17378         }
17379         sub_policy_num = (mtr_policy->sub_policy_num >>
17380                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17381                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17382         for (j = 0; j < sub_policy_num; j++) {
17383                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17384                         if (rss_desc[i] &&
17385                             hrxq_idx[i] !=
17386                             mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
17387                                 break;
17388                 }
17389                 if (i >= MLX5_MTR_RTE_COLORS) {
17390                         /*
17391                          * Found the sub policy table with
17392                          * the same queue per color.
17393                          */
17394                         rte_spinlock_unlock(&mtr_policy->sl);
17395                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
17396                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
17397                         *is_reuse = true;
17398                         return mtr_policy->sub_policys[domain][j];
17399                 }
17400         }
17401         /* Create sub policy. */
17402         if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[RTE_COLOR_GREEN] &&
17403             !mtr_policy->sub_policys[domain][0]->rix_hrxq[RTE_COLOR_YELLOW]) {
17404                 /* Reuse the first pre-allocated sub_policy. */
17405                 sub_policy = mtr_policy->sub_policys[domain][0];
17406                 sub_policy_idx = sub_policy->idx;
17407         } else {
17408                 sub_policy = mlx5_ipool_zmalloc
17409                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17410                                  &sub_policy_idx);
17411                 if (!sub_policy ||
17412                     sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
17413                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
17414                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
17415                         goto rss_sub_policy_error;
17416                 }
17417                 sub_policy->idx = sub_policy_idx;
17418                 sub_policy->main_policy = mtr_policy;
17419         }
17420         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17421                 if (!rss_desc[i])
17422                         continue;
17423                 sub_policy->rix_hrxq[i] = hrxq_idx[i];
17424                 if (mtr_policy->is_hierarchy) {
17425                         act_cnt = &mtr_policy->act_cnt[i];
17426                         act_cnt->next_sub_policy = next_sub_policy;
17427                         mlx5_hrxq_release(dev, hrxq_idx[i]);
17428                 } else {
17429                         /*
17430                          * Overwrite the last action from
17431                          * RSS action to Queue action.
17432                          */
17433                         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
17434                                               hrxq_idx[i]);
17435                         if (!hrxq) {
17436                                 DRV_LOG(ERR, "Failed to get policy hrxq");
17437                                 goto rss_sub_policy_error;
17438                         }
17439                         act_cnt = &mtr_policy->act_cnt[i];
17440                         if (act_cnt->rix_mark || act_cnt->modify_hdr) {
17441                                 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
17442                                 if (act_cnt->rix_mark)
17443                                         wks->mark = 1;
17444                                 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
17445                                 dh.rix_hrxq = hrxq_idx[i];
17446                                 flow_drv_rxq_flags_set(dev, &dh);
17447                         }
17448                 }
17449         }
17450         if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
17451                                                sub_policy, domain)) {
17452                 DRV_LOG(ERR, "Failed to create policy "
17453                         "rules for ingress domain.");
17454                 goto rss_sub_policy_error;
17455         }
17456         if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17457                 i = (mtr_policy->sub_policy_num >>
17458                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17459                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17460                 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
17461                         DRV_LOG(ERR, "No free sub-policy slot.");
17462                         goto rss_sub_policy_error;
17463                 }
17464                 mtr_policy->sub_policys[domain][i] = sub_policy;
17465                 i++;
17466                 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17467                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17468                 mtr_policy->sub_policy_num |=
17469                         (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17470                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17471         }
17472         rte_spinlock_unlock(&mtr_policy->sl);
17473         *is_reuse = false;
17474         return sub_policy;
17475 rss_sub_policy_error:
17476         if (sub_policy) {
17477                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
17478                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17479                         i = (mtr_policy->sub_policy_num >>
17480                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17481                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17482                         mtr_policy->sub_policys[domain][i] = NULL;
17483                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17484                                         sub_policy->idx);
17485                 }
17486         }
17487         rte_spinlock_unlock(&mtr_policy->sl);
17488         return NULL;
17489 }
17490
17491 /**
17492  * Find the policy table for prefix table with RSS.
17493  *
17494  * @param[in] dev
17495  *   Pointer to Ethernet device.
17496  * @param[in] mtr_policy
17497  *   Pointer to meter policy table.
17498  * @param[in] rss_desc
17499  *   Pointer to rss_desc
17500  * @return
17501  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
17502  */
17503 static struct mlx5_flow_meter_sub_policy *
17504 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
17505                 struct mlx5_flow_meter_policy *mtr_policy,
17506                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
17507 {
17508         struct mlx5_priv *priv = dev->data->dev_private;
17509         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17510         struct mlx5_flow_meter_info *next_fm;
17511         struct mlx5_flow_meter_policy *next_policy;
17512         struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
17513         struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
17514         struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
17515         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17516         bool reuse_sub_policy;
17517         uint32_t i = 0;
17518         uint32_t j = 0;
17519
17520         while (true) {
17521                 /* Iterate hierarchy to get all policies in this hierarchy. */
17522                 policies[i++] = mtr_policy;
17523                 if (!mtr_policy->is_hierarchy)
17524                         break;
17525                 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
17526                         DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
17527                         return NULL;
17528                 }
17529                 rte_spinlock_lock(&mtr_policy->sl);
17530                 next_fm = mlx5_flow_meter_hierarchy_next_meter(priv, mtr_policy, NULL);
17531                 rte_spinlock_unlock(&mtr_policy->sl);
17532                 if (!next_fm) {
17533                         DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
17534                         return NULL;
17535                 }
17536                 next_policy =
17537                         mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
17538                                                     NULL);
17539                 MLX5_ASSERT(next_policy);
17540                 mtr_policy = next_policy;
17541         }
17542         while (i) {
17543                 /**
17544                  * From last policy to the first one in hierarchy,
17545                  * create / get the sub policy for each of them.
17546                  */
17547                 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
17548                                                         policies[--i],
17549                                                         rss_desc,
17550                                                         next_sub_policy,
17551                                                         &reuse_sub_policy);
17552                 if (!sub_policy) {
17553                         DRV_LOG(ERR, "Failed to get the sub policy.");
17554                         goto err_exit;
17555                 }
17556                 if (!reuse_sub_policy)
17557                         sub_policies[j++] = sub_policy;
17558                 next_sub_policy = sub_policy;
17559         }
17560         return sub_policy;
17561 err_exit:
17562         while (j) {
17563                 uint16_t sub_policy_num;
17564
17565                 sub_policy = sub_policies[--j];
17566                 mtr_policy = sub_policy->main_policy;
17567                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
17568                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17569                         sub_policy_num = (mtr_policy->sub_policy_num >>
17570                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17571                                 MLX5_MTR_SUB_POLICY_NUM_MASK;
17572                         mtr_policy->sub_policys[domain][sub_policy_num - 1] =
17573                                                                         NULL;
17574                         sub_policy_num--;
17575                         mtr_policy->sub_policy_num &=
17576                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17577                                   (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
17578                         mtr_policy->sub_policy_num |=
17579                         (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17580                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
17581                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17582                                         sub_policy->idx);
17583                 }
17584         }
17585         return NULL;
17586 }
17587
17588 /**
17589  * Check if need to create hierarchy tag rule.
17590  *
17591  * @param[in] priv
17592  *   Pointer to mlx5_priv.
17593  * @param[in] mtr_policy
17594  *   Pointer to current meter policy.
17595  * @param[in] src_port
17596  *   The src port this extra rule should use.
17597  * @param[out] next_fm
17598  *   Pointer to next meter in hierarchy.
17599  * @param[out] skip
17600  *   Indicate if skip the tag rule creation.
17601  * @param[out] error
17602  *   Perform verbose error reporting if not NULL.
17603  * @return
17604  *   0 on success, a negative errno value otherwise and rte_errno is set.
17605  */
17606 static int
17607 mlx5_meter_hierarchy_skip_tag_rule(struct mlx5_priv *priv,
17608                                    struct mlx5_flow_meter_policy *mtr_policy,
17609                                    int32_t src_port,
17610                                    struct mlx5_flow_meter_info **next_fm,
17611                                    bool *skip,
17612                                    struct rte_flow_error *error)
17613 {
17614         struct mlx5_flow_meter_sub_policy *sub_policy;
17615         struct mlx5_sub_policy_color_rule *color_rule;
17616         uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
17617         int ret = 0;
17618         int i;
17619
17620         *next_fm = NULL;
17621         *skip = false;
17622         rte_spinlock_lock(&mtr_policy->sl);
17623         if (!mtr_policy->is_hierarchy)
17624                 goto exit;
17625         *next_fm = mlx5_flow_meter_hierarchy_next_meter(priv, mtr_policy, NULL);
17626         if (!*next_fm) {
17627                 ret = rte_flow_error_set(error, EINVAL, RTE_FLOW_ERROR_TYPE_ACTION,
17628                                          NULL, "Failed to find next meter in hierarchy.");
17629                 goto exit;
17630         }
17631         if (!(*next_fm)->drop_cnt) {
17632                 *skip = true;
17633                 goto exit;
17634         }
17635         sub_policy = mtr_policy->sub_policys[domain][0];
17636         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17637                 if (mtr_policy->act_cnt[i].fate_action != MLX5_FLOW_FATE_MTR)
17638                         continue;
17639                 TAILQ_FOREACH(color_rule, &sub_policy->color_rules[i], next_port)
17640                         if (color_rule->src_port == src_port) {
17641                                 *skip = true;
17642                                 goto exit;
17643                         }
17644         }
17645 exit:
17646         rte_spinlock_unlock(&mtr_policy->sl);
17647         return ret;
17648 }
17649
17650 /**
17651  * Create the sub policy tag rule for all meters in hierarchy.
17652  *
17653  * @param[in] dev
17654  *   Pointer to Ethernet device.
17655  * @param[in] fm
17656  *   Meter information table.
17657  * @param[in] src_port
17658  *   The src port this extra rule should use.
17659  * @param[in] item
17660  *   The src port match item.
17661  * @param[out] error
17662  *   Perform verbose error reporting if not NULL.
17663  * @return
17664  *   0 on success, a negative errno value otherwise and rte_errno is set.
17665  */
17666 static int
17667 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
17668                                 struct mlx5_flow_meter_info *fm,
17669                                 int32_t src_port,
17670                                 const struct rte_flow_item *item,
17671                                 struct rte_flow_error *error)
17672 {
17673         struct mlx5_priv *priv = dev->data->dev_private;
17674         struct mlx5_flow_meter_policy *mtr_policy;
17675         struct mlx5_flow_meter_sub_policy *sub_policy;
17676         struct mlx5_flow_meter_info *next_fm = NULL;
17677         struct mlx5_flow_meter_policy *next_policy;
17678         struct mlx5_flow_meter_sub_policy *next_sub_policy;
17679         struct mlx5_flow_tbl_data_entry *tbl_data;
17680         struct mlx5_sub_policy_color_rule *color_rule;
17681         struct mlx5_meter_policy_acts acts;
17682         uint32_t color_reg_c_idx;
17683         bool mtr_first = (src_port != UINT16_MAX) ? true : false;
17684         struct rte_flow_attr attr = {
17685                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
17686                 .priority = 0,
17687                 .ingress = 0,
17688                 .egress = 0,
17689                 .transfer = 1,
17690                 .reserved = 0,
17691         };
17692         uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
17693         struct {
17694                 struct mlx5_flow_meter_policy *fm_policy;
17695                 struct mlx5_flow_meter_info *next_fm;
17696                 struct mlx5_sub_policy_color_rule *tag_rule[MLX5_MTR_RTE_COLORS];
17697         } fm_info[MLX5_MTR_CHAIN_MAX_NUM] = { {0} };
17698         uint32_t fm_cnt = 0;
17699         uint32_t i, j;
17700
17701         color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
17702         /* Get all fms who need to create the tag color rule. */
17703         do {
17704                 bool skip = false;
17705
17706                 mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17707                 MLX5_ASSERT(mtr_policy);
17708                 if (mlx5_meter_hierarchy_skip_tag_rule(priv, mtr_policy, src_port,
17709                                                        &next_fm, &skip, error))
17710                         goto err_exit;
17711                 if (next_fm && !skip) {
17712                         fm_info[fm_cnt].fm_policy = mtr_policy;
17713                         fm_info[fm_cnt].next_fm = next_fm;
17714                         if (++fm_cnt >= MLX5_MTR_CHAIN_MAX_NUM) {
17715                                 rte_flow_error_set(error, errno,
17716                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17717                                         "Exceed max meter number in hierarchy.");
17718                                 goto err_exit;
17719                         }
17720                 }
17721                 fm = next_fm;
17722         } while (fm);
17723         /* Create tag color rules for all needed fms. */
17724         for (i = 0; i < fm_cnt; i++) {
17725                 void *mtr_action;
17726
17727                 mtr_policy = fm_info[i].fm_policy;
17728                 rte_spinlock_lock(&mtr_policy->sl);
17729                 sub_policy = mtr_policy->sub_policys[domain][0];
17730                 for (j = 0; j < MLX5_MTR_RTE_COLORS; j++) {
17731                         if (mtr_policy->act_cnt[j].fate_action != MLX5_FLOW_FATE_MTR)
17732                                 continue;
17733                         color_rule = mlx5_malloc(MLX5_MEM_ZERO,
17734                                                  sizeof(struct mlx5_sub_policy_color_rule),
17735                                                  0, SOCKET_ID_ANY);
17736                         if (!color_rule) {
17737                                 rte_spinlock_unlock(&mtr_policy->sl);
17738                                 rte_flow_error_set(error, ENOMEM,
17739                                                    RTE_FLOW_ERROR_TYPE_ACTION, NULL,
17740                                                    "No memory to create tag color rule.");
17741                                 goto err_exit;
17742                         }
17743                         color_rule->src_port = src_port;
17744                         next_fm = fm_info[i].next_fm;
17745                         if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
17746                                 mlx5_free(color_rule);
17747                                 rte_spinlock_unlock(&mtr_policy->sl);
17748                                 goto err_exit;
17749                         }
17750                         fm_info[i].tag_rule[j] = color_rule;
17751                         TAILQ_INSERT_TAIL(&sub_policy->color_rules[j], color_rule, next_port);
17752                         /* Prepare to create color rule. */
17753                         mtr_action = (next_fm->color_aware && j == RTE_COLOR_YELLOW) ?
17754                                                                 next_fm->meter_action_y :
17755                                                                 next_fm->meter_action_g;
17756                         next_policy = mlx5_flow_meter_policy_find(dev, next_fm->policy_id, NULL);
17757                         MLX5_ASSERT(next_policy);
17758                         next_sub_policy = next_policy->sub_policys[domain][0];
17759                         tbl_data = container_of(next_sub_policy->tbl_rsc,
17760                                                 struct mlx5_flow_tbl_data_entry, tbl);
17761                         if (mtr_first) {
17762                                 acts.dv_actions[0] = mtr_action;
17763                                 acts.dv_actions[1] = mtr_policy->act_cnt[j].modify_hdr->action;
17764                         } else {
17765                                 acts.dv_actions[0] = mtr_policy->act_cnt[j].modify_hdr->action;
17766                                 acts.dv_actions[1] = mtr_action;
17767                         }
17768                         acts.dv_actions[2] = tbl_data->jump.action;
17769                         acts.actions_n = 3;
17770                         if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
17771                                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
17772                                                 &attr, true, item, &color_rule->matcher, error)) {
17773                                 rte_spinlock_unlock(&mtr_policy->sl);
17774                                 rte_flow_error_set(error, errno,
17775                                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17776                                                    "Failed to create hierarchy meter matcher.");
17777                                 goto err_exit;
17778                         }
17779                         if (__flow_dv_create_policy_flow(dev, color_reg_c_idx, (enum rte_color)j,
17780                                                 color_rule->matcher->matcher_object,
17781                                                 acts.actions_n, acts.dv_actions,
17782                                                 true, item, &color_rule->rule, &attr)) {
17783                                 rte_spinlock_unlock(&mtr_policy->sl);
17784                                 rte_flow_error_set(error, errno,
17785                                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17786                                                    "Failed to create hierarchy meter rule.");
17787                                 goto err_exit;
17788                         }
17789                 }
17790                 rte_spinlock_unlock(&mtr_policy->sl);
17791         }
17792         return 0;
17793 err_exit:
17794         for (i = 0; i < fm_cnt; i++) {
17795                 mtr_policy = fm_info[i].fm_policy;
17796                 rte_spinlock_lock(&mtr_policy->sl);
17797                 sub_policy = mtr_policy->sub_policys[domain][0];
17798                 for (j = 0; j < MLX5_MTR_RTE_COLORS; j++) {
17799                         color_rule = fm_info[i].tag_rule[j];
17800                         if (!color_rule)
17801                                 continue;
17802                         if (color_rule->rule)
17803                                 mlx5_flow_os_destroy_flow(color_rule->rule);
17804                         if (color_rule->matcher) {
17805                                 struct mlx5_flow_tbl_data_entry *tbl =
17806                                         container_of(color_rule->matcher->tbl, typeof(*tbl), tbl);
17807                                 mlx5_list_unregister(tbl->matchers, &color_rule->matcher->entry);
17808                         }
17809                         if (fm_info[i].next_fm)
17810                                 mlx5_flow_meter_detach(priv, fm_info[i].next_fm);
17811                         TAILQ_REMOVE(&sub_policy->color_rules[j], color_rule, next_port);
17812                         mlx5_free(color_rule);
17813                 }
17814                 rte_spinlock_unlock(&mtr_policy->sl);
17815         }
17816         return -rte_errno;
17817 }
17818
17819 /**
17820  * Destroy the sub policy table with RX queue.
17821  *
17822  * @param[in] dev
17823  *   Pointer to Ethernet device.
17824  * @param[in] mtr_policy
17825  *   Pointer to meter policy table.
17826  */
17827 static void
17828 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17829                                     struct mlx5_flow_meter_policy *mtr_policy)
17830 {
17831         struct mlx5_priv *priv = dev->data->dev_private;
17832         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17833         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17834         uint32_t i, j;
17835         uint16_t sub_policy_num, new_policy_num;
17836
17837         rte_spinlock_lock(&mtr_policy->sl);
17838         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17839                 switch (mtr_policy->act_cnt[i].fate_action) {
17840                 case MLX5_FLOW_FATE_SHARED_RSS:
17841                         sub_policy_num = (mtr_policy->sub_policy_num >>
17842                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17843                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17844                         new_policy_num = sub_policy_num;
17845                         for (j = 0; j < sub_policy_num; j++) {
17846                                 sub_policy =
17847                                         mtr_policy->sub_policys[domain][j];
17848                                 if (sub_policy) {
17849                                         __flow_dv_destroy_sub_policy_rules(dev,
17850                                                 sub_policy);
17851                                 if (sub_policy !=
17852                                         mtr_policy->sub_policys[domain][0]) {
17853                                         mtr_policy->sub_policys[domain][j] =
17854                                                                 NULL;
17855                                         mlx5_ipool_free
17856                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17857                                                 sub_policy->idx);
17858                                                 new_policy_num--;
17859                                         }
17860                                 }
17861                         }
17862                         if (new_policy_num != sub_policy_num) {
17863                                 mtr_policy->sub_policy_num &=
17864                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17865                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17866                                 mtr_policy->sub_policy_num |=
17867                                 (new_policy_num &
17868                                         MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17869                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17870                         }
17871                         break;
17872                 case MLX5_FLOW_FATE_QUEUE:
17873                         sub_policy = mtr_policy->sub_policys[domain][0];
17874                         __flow_dv_destroy_sub_policy_rules(dev,
17875                                                            sub_policy);
17876                         break;
17877                 default:
17878                         /*Other actions without queue and do nothing*/
17879                         break;
17880                 }
17881         }
17882         rte_spinlock_unlock(&mtr_policy->sl);
17883 }
17884 /**
17885  * Check whether the DR drop action is supported on the root table or not.
17886  *
17887  * Create a simple flow with DR drop action on root table to validate
17888  * if DR drop action on root table is supported or not.
17889  *
17890  * @param[in] dev
17891  *   Pointer to rte_eth_dev structure.
17892  *
17893  * @return
17894  *   0 on success, a negative errno value otherwise and rte_errno is set.
17895  */
17896 int
17897 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17898 {
17899         struct mlx5_priv *priv = dev->data->dev_private;
17900         struct mlx5_dev_ctx_shared *sh = priv->sh;
17901         struct mlx5_flow_dv_match_params mask = {
17902                 .size = sizeof(mask.buf),
17903         };
17904         struct mlx5_flow_dv_match_params value = {
17905                 .size = sizeof(value.buf),
17906         };
17907         struct mlx5dv_flow_matcher_attr dv_attr = {
17908                 .type = IBV_FLOW_ATTR_NORMAL,
17909                 .priority = 0,
17910                 .match_criteria_enable = 0,
17911                 .match_mask = (void *)&mask,
17912         };
17913         struct mlx5_flow_tbl_resource *tbl = NULL;
17914         void *matcher = NULL;
17915         void *flow = NULL;
17916         int ret = -1;
17917
17918         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17919                                         0, 0, 0, NULL);
17920         if (!tbl)
17921                 goto err;
17922         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17923         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17924         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17925                                                tbl->obj, &matcher);
17926         if (ret)
17927                 goto err;
17928         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17929         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17930                                        &sh->dr_drop_action, &flow);
17931 err:
17932         /*
17933          * If DR drop action is not supported on root table, flow create will
17934          * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17935          */
17936         if (!flow) {
17937                 if (matcher &&
17938                     (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17939                         DRV_LOG(INFO, "DR drop action is not supported in root table.");
17940                 else
17941                         DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17942                 ret = -1;
17943         } else {
17944                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17945         }
17946         if (matcher)
17947                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17948         if (tbl)
17949                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17950         return ret;
17951 }
17952
17953 /**
17954  * Validate the batch counter support in root table.
17955  *
17956  * Create a simple flow with invalid counter and drop action on root table to
17957  * validate if batch counter with offset on root table is supported or not.
17958  *
17959  * @param[in] dev
17960  *   Pointer to rte_eth_dev structure.
17961  *
17962  * @return
17963  *   0 on success, a negative errno value otherwise and rte_errno is set.
17964  */
17965 int
17966 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17967 {
17968         struct mlx5_priv *priv = dev->data->dev_private;
17969         struct mlx5_dev_ctx_shared *sh = priv->sh;
17970         struct mlx5_flow_dv_match_params mask = {
17971                 .size = sizeof(mask.buf),
17972         };
17973         struct mlx5_flow_dv_match_params value = {
17974                 .size = sizeof(value.buf),
17975         };
17976         struct mlx5dv_flow_matcher_attr dv_attr = {
17977                 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17978                 .priority = 0,
17979                 .match_criteria_enable = 0,
17980                 .match_mask = (void *)&mask,
17981         };
17982         void *actions[2] = { 0 };
17983         struct mlx5_flow_tbl_resource *tbl = NULL;
17984         struct mlx5_devx_obj *dcs = NULL;
17985         void *matcher = NULL;
17986         void *flow = NULL;
17987         int ret = -1;
17988
17989         tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17990                                         0, 0, 0, NULL);
17991         if (!tbl)
17992                 goto err;
17993         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
17994         if (!dcs)
17995                 goto err;
17996         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17997                                                     &actions[0]);
17998         if (ret)
17999                 goto err;
18000         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
18001         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
18002         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
18003                                                tbl->obj, &matcher);
18004         if (ret)
18005                 goto err;
18006         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
18007         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
18008                                        actions, &flow);
18009 err:
18010         /*
18011          * If batch counter with offset is not supported, the driver will not
18012          * validate the invalid offset value, flow create should success.
18013          * In this case, it means batch counter is not supported in root table.
18014          *
18015          * Otherwise, if flow create is failed, counter offset is supported.
18016          */
18017         if (flow) {
18018                 DRV_LOG(INFO, "Batch counter is not supported in root "
18019                               "table. Switch to fallback mode.");
18020                 rte_errno = ENOTSUP;
18021                 ret = -rte_errno;
18022                 claim_zero(mlx5_flow_os_destroy_flow(flow));
18023         } else {
18024                 /* Check matcher to make sure validate fail at flow create. */
18025                 if (!matcher || (matcher && errno != EINVAL))
18026                         DRV_LOG(ERR, "Unexpected error in counter offset "
18027                                      "support detection");
18028                 ret = 0;
18029         }
18030         if (actions[0])
18031                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
18032         if (matcher)
18033                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
18034         if (tbl)
18035                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
18036         if (dcs)
18037                 claim_zero(mlx5_devx_cmd_destroy(dcs));
18038         return ret;
18039 }
18040
18041 /**
18042  * Query a devx counter.
18043  *
18044  * @param[in] dev
18045  *   Pointer to the Ethernet device structure.
18046  * @param[in] cnt
18047  *   Index to the flow counter.
18048  * @param[in] clear
18049  *   Set to clear the counter statistics.
18050  * @param[out] pkts
18051  *   The statistics value of packets.
18052  * @param[out] bytes
18053  *   The statistics value of bytes.
18054  *
18055  * @return
18056  *   0 on success, otherwise return -1.
18057  */
18058 static int
18059 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
18060                       uint64_t *pkts, uint64_t *bytes, void **action)
18061 {
18062         struct mlx5_priv *priv = dev->data->dev_private;
18063         struct mlx5_flow_counter *cnt;
18064         uint64_t inn_pkts, inn_bytes;
18065         int ret;
18066
18067         if (!priv->sh->cdev->config.devx)
18068                 return -1;
18069
18070         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
18071         if (ret)
18072                 return -1;
18073         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
18074         if (cnt && action)
18075                 *action = cnt->action;
18076
18077         *pkts = inn_pkts - cnt->hits;
18078         *bytes = inn_bytes - cnt->bytes;
18079         if (clear) {
18080                 cnt->hits = inn_pkts;
18081                 cnt->bytes = inn_bytes;
18082         }
18083         return 0;
18084 }
18085
18086 /**
18087  * Get aged-out flows.
18088  *
18089  * @param[in] dev
18090  *   Pointer to the Ethernet device structure.
18091  * @param[in] context
18092  *   The address of an array of pointers to the aged-out flows contexts.
18093  * @param[in] nb_contexts
18094  *   The length of context array pointers.
18095  * @param[out] error
18096  *   Perform verbose error reporting if not NULL. Initialized in case of
18097  *   error only.
18098  *
18099  * @return
18100  *   how many contexts get in success, otherwise negative errno value.
18101  *   if nb_contexts is 0, return the amount of all aged contexts.
18102  *   if nb_contexts is not 0 , return the amount of aged flows reported
18103  *   in the context array.
18104  * @note: only stub for now
18105  */
18106 static int
18107 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
18108                     void **context,
18109                     uint32_t nb_contexts,
18110                     struct rte_flow_error *error)
18111 {
18112         struct mlx5_priv *priv = dev->data->dev_private;
18113         struct mlx5_age_info *age_info;
18114         struct mlx5_age_param *age_param;
18115         struct mlx5_flow_counter *counter;
18116         struct mlx5_aso_age_action *act;
18117         int nb_flows = 0;
18118
18119         if (nb_contexts && !context)
18120                 return rte_flow_error_set(error, EINVAL,
18121                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
18122                                           NULL, "empty context");
18123         age_info = GET_PORT_AGE_INFO(priv);
18124         rte_spinlock_lock(&age_info->aged_sl);
18125         LIST_FOREACH(act, &age_info->aged_aso, next) {
18126                 nb_flows++;
18127                 if (nb_contexts) {
18128                         context[nb_flows - 1] =
18129                                                 act->age_params.context;
18130                         if (!(--nb_contexts))
18131                                 break;
18132                 }
18133         }
18134         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
18135                 nb_flows++;
18136                 if (nb_contexts) {
18137                         age_param = MLX5_CNT_TO_AGE(counter);
18138                         context[nb_flows - 1] = age_param->context;
18139                         if (!(--nb_contexts))
18140                                 break;
18141                 }
18142         }
18143         rte_spinlock_unlock(&age_info->aged_sl);
18144         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
18145         return nb_flows;
18146 }
18147
18148 /*
18149  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
18150  */
18151 static uint32_t
18152 flow_dv_counter_allocate(struct rte_eth_dev *dev)
18153 {
18154         return flow_dv_counter_alloc(dev, 0);
18155 }
18156
18157 /**
18158  * Validate indirect action.
18159  * Dispatcher for action type specific validation.
18160  *
18161  * @param[in] dev
18162  *   Pointer to the Ethernet device structure.
18163  * @param[in] conf
18164  *   Indirect action configuration.
18165  * @param[in] action
18166  *   The indirect action object to validate.
18167  * @param[out] error
18168  *   Perform verbose error reporting if not NULL. Initialized in case of
18169  *   error only.
18170  *
18171  * @return
18172  *   0 on success, otherwise negative errno value.
18173  */
18174 int
18175 flow_dv_action_validate(struct rte_eth_dev *dev,
18176                         const struct rte_flow_indir_action_conf *conf,
18177                         const struct rte_flow_action *action,
18178                         struct rte_flow_error *err)
18179 {
18180         struct mlx5_priv *priv = dev->data->dev_private;
18181
18182         RTE_SET_USED(conf);
18183         switch (action->type) {
18184         case RTE_FLOW_ACTION_TYPE_RSS:
18185                 /*
18186                  * priv->obj_ops is set according to driver capabilities.
18187                  * When DevX capabilities are
18188                  * sufficient, it is set to devx_obj_ops.
18189                  * Otherwise, it is set to ibv_obj_ops.
18190                  * ibv_obj_ops doesn't support ind_table_modify operation.
18191                  * In this case the indirect RSS action can't be used.
18192                  */
18193                 if (priv->obj_ops.ind_table_modify == NULL)
18194                         return rte_flow_error_set
18195                                         (err, ENOTSUP,
18196                                          RTE_FLOW_ERROR_TYPE_ACTION,
18197                                          NULL,
18198                                          "Indirect RSS action not supported");
18199                 return mlx5_validate_action_rss(dev, action, err);
18200         case RTE_FLOW_ACTION_TYPE_AGE:
18201                 if (!priv->sh->aso_age_mng)
18202                         return rte_flow_error_set(err, ENOTSUP,
18203                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
18204                                                 NULL,
18205                                                 "Indirect age action not supported");
18206                 return flow_dv_validate_action_age(0, action, dev, err);
18207         case RTE_FLOW_ACTION_TYPE_COUNT:
18208                 return flow_dv_validate_action_count(dev, true, 0, NULL, err);
18209         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
18210                 if (!priv->sh->ct_aso_en)
18211                         return rte_flow_error_set(err, ENOTSUP,
18212                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
18213                                         "ASO CT is not supported");
18214                 return mlx5_validate_action_ct(dev, action->conf, err);
18215         default:
18216                 return rte_flow_error_set(err, ENOTSUP,
18217                                           RTE_FLOW_ERROR_TYPE_ACTION,
18218                                           NULL,
18219                                           "action type not supported");
18220         }
18221 }
18222
18223 /*
18224  * Check if the RSS configurations for colors of a meter policy match
18225  * each other, except the queues.
18226  *
18227  * @param[in] r1
18228  *   Pointer to the first RSS flow action.
18229  * @param[in] r2
18230  *   Pointer to the second RSS flow action.
18231  *
18232  * @return
18233  *   0 on match, 1 on conflict.
18234  */
18235 static inline int
18236 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
18237                                const struct rte_flow_action_rss *r2)
18238 {
18239         if (r1 == NULL || r2 == NULL)
18240                 return 0;
18241         if (!(r1->level <= 1 && r2->level <= 1) &&
18242             !(r1->level > 1 && r2->level > 1))
18243                 return 1;
18244         if (r1->types != r2->types &&
18245             !((r1->types == 0 || r1->types == RTE_ETH_RSS_IP) &&
18246               (r2->types == 0 || r2->types == RTE_ETH_RSS_IP)))
18247                 return 1;
18248         if (r1->key || r2->key) {
18249                 const void *key1 = r1->key ? r1->key : rss_hash_default_key;
18250                 const void *key2 = r2->key ? r2->key : rss_hash_default_key;
18251
18252                 if (memcmp(key1, key2, MLX5_RSS_HASH_KEY_LEN))
18253                         return 1;
18254         }
18255         return 0;
18256 }
18257
18258 /**
18259  * Validate the meter hierarchy chain for meter policy.
18260  *
18261  * @param[in] dev
18262  *   Pointer to the Ethernet device structure.
18263  * @param[in] meter_id
18264  *   Meter id.
18265  * @param[in] action_flags
18266  *   Holds the actions detected until now.
18267  * @param[out] is_rss
18268  *   Is RSS or not.
18269  * @param[out] hierarchy_domain
18270  *   The domain bitmap for hierarchy policy.
18271  * @param[out] error
18272  *   Perform verbose error reporting if not NULL. Initialized in case of
18273  *   error only.
18274  *
18275  * @return
18276  *   0 on success, otherwise negative errno value with error set.
18277  */
18278 static int
18279 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
18280                                   uint32_t meter_id,
18281                                   uint64_t action_flags,
18282                                   bool *is_rss,
18283                                   uint8_t *hierarchy_domain,
18284                                   struct rte_mtr_error *error)
18285 {
18286         struct mlx5_priv *priv = dev->data->dev_private;
18287         struct mlx5_flow_meter_info *fm;
18288         struct mlx5_flow_meter_policy *policy;
18289         uint8_t cnt = 1;
18290
18291         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
18292                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18293                 return -rte_mtr_error_set(error, EINVAL,
18294                                         RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
18295                                         NULL,
18296                                         "Multiple fate actions not supported.");
18297         *hierarchy_domain = 0;
18298         fm = mlx5_flow_meter_find(priv, meter_id, NULL);
18299         while (true) {
18300                 if (!fm)
18301                         return -rte_mtr_error_set(error, EINVAL,
18302                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
18303                                         "Meter not found in meter hierarchy.");
18304                 if (fm->def_policy)
18305                         return -rte_mtr_error_set(error, EINVAL,
18306                                         RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
18307                         "Non termination meter not supported in hierarchy.");
18308                 if (!fm->shared)
18309                         return -rte_mtr_error_set(error, EINVAL,
18310                                         RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
18311                                         "Only shared meter supported in hierarchy.");
18312                 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
18313                 MLX5_ASSERT(policy);
18314                 /**
18315                  * Only inherit the supported domains of the first meter in
18316                  * hierarchy.
18317                  * One meter supports at least one domain.
18318                  */
18319                 if (!*hierarchy_domain) {
18320                         if (policy->transfer)
18321                                 *hierarchy_domain |=
18322                                                 MLX5_MTR_DOMAIN_TRANSFER_BIT;
18323                         if (policy->ingress)
18324                                 *hierarchy_domain |=
18325                                                 MLX5_MTR_DOMAIN_INGRESS_BIT;
18326                         if (policy->egress)
18327                                 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
18328                 }
18329                 if (!policy->is_hierarchy) {
18330                         *is_rss = policy->is_rss;
18331                         break;
18332                 }
18333                 rte_spinlock_lock(&policy->sl);
18334                 fm = mlx5_flow_meter_hierarchy_next_meter(priv, policy, NULL);
18335                 rte_spinlock_unlock(&policy->sl);
18336                 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
18337                         return -rte_mtr_error_set(error, EINVAL,
18338                                         RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
18339                                         "Exceed max hierarchy meter number.");
18340         }
18341         return 0;
18342 }
18343
18344 /**
18345  * Validate meter policy actions.
18346  * Dispatcher for action type specific validation.
18347  *
18348  * @param[in] dev
18349  *   Pointer to the Ethernet device structure.
18350  * @param[in] action
18351  *   The meter policy action object to validate.
18352  * @param[in] attr
18353  *   Attributes of flow to determine steering domain.
18354  * @param[out] error
18355  *   Perform verbose error reporting if not NULL. Initialized in case of
18356  *   error only.
18357  *
18358  * @return
18359  *   0 on success, otherwise negative errno value.
18360  */
18361 static int
18362 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
18363                         const struct rte_flow_action *actions[RTE_COLORS],
18364                         struct rte_flow_attr *attr,
18365                         bool *is_rss,
18366                         uint8_t *domain_bitmap,
18367                         uint8_t *policy_mode,
18368                         struct rte_mtr_error *error)
18369 {
18370         struct mlx5_priv *priv = dev->data->dev_private;
18371         struct mlx5_sh_config *dev_conf = &priv->sh->config;
18372         const struct rte_flow_action *act;
18373         uint64_t action_flags[RTE_COLORS] = {0};
18374         int actions_n;
18375         int i, ret;
18376         struct rte_flow_error flow_err;
18377         uint8_t domain_color[RTE_COLORS] = {0};
18378         uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
18379         uint8_t hierarchy_domain = 0;
18380         const struct rte_flow_action_meter *mtr;
18381         const struct rte_flow_action_meter *next_mtr = NULL;
18382         bool def_green = false;
18383         bool def_yellow = false;
18384         const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
18385
18386         if (!dev_conf->dv_esw_en)
18387                 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
18388         *domain_bitmap = def_domain;
18389         /* Red color could only support DROP action. */
18390         if (!actions[RTE_COLOR_RED] ||
18391             actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
18392                 return -rte_mtr_error_set(error, ENOTSUP,
18393                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18394                                 NULL, "Red color only supports drop action.");
18395         /*
18396          * Check default policy actions:
18397          * Green / Yellow: no action, Red: drop action
18398          * Either G or Y will trigger default policy actions to be created.
18399          */
18400         if (!actions[RTE_COLOR_GREEN] ||
18401             actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
18402                 def_green = true;
18403         if (!actions[RTE_COLOR_YELLOW] ||
18404             actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
18405                 def_yellow = true;
18406         if (def_green && def_yellow) {
18407                 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
18408                 return 0;
18409         } else if (!def_green && def_yellow) {
18410                 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
18411         } else if (def_green && !def_yellow) {
18412                 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
18413         } else {
18414                 *policy_mode = MLX5_MTR_POLICY_MODE_ALL;
18415         }
18416         /* Set to empty string in case of NULL pointer access by user. */
18417         flow_err.message = "";
18418         for (i = 0; i < RTE_COLORS; i++) {
18419                 act = actions[i];
18420                 for (action_flags[i] = 0, actions_n = 0;
18421                      act && act->type != RTE_FLOW_ACTION_TYPE_END;
18422                      act++) {
18423                         if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
18424                                 return -rte_mtr_error_set(error, ENOTSUP,
18425                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18426                                           NULL, "too many actions");
18427                         switch (act->type) {
18428                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
18429                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
18430                                 if (!dev_conf->dv_esw_en)
18431                                         return -rte_mtr_error_set(error,
18432                                         ENOTSUP,
18433                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18434                                         NULL, "PORT action validate check"
18435                                         " fail for ESW disable");
18436                                 ret = flow_dv_validate_action_port_id(dev,
18437                                                 action_flags[i],
18438                                                 act, attr, &flow_err);
18439                                 if (ret)
18440                                         return -rte_mtr_error_set(error,
18441                                         ENOTSUP,
18442                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18443                                         NULL, flow_err.message ?
18444                                         flow_err.message :
18445                                         "PORT action validate check fail");
18446                                 ++actions_n;
18447                                 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
18448                                 break;
18449                         case RTE_FLOW_ACTION_TYPE_MARK:
18450                                 ret = flow_dv_validate_action_mark(dev, act,
18451                                                            action_flags[i],
18452                                                            attr, &flow_err);
18453                                 if (ret < 0)
18454                                         return -rte_mtr_error_set(error,
18455                                         ENOTSUP,
18456                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18457                                         NULL, flow_err.message ?
18458                                         flow_err.message :
18459                                         "Mark action validate check fail");
18460                                 if (dev_conf->dv_xmeta_en !=
18461                                         MLX5_XMETA_MODE_LEGACY)
18462                                         return -rte_mtr_error_set(error,
18463                                         ENOTSUP,
18464                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18465                                         NULL, "Extend MARK action is "
18466                                         "not supported. Please try use "
18467                                         "default policy for meter.");
18468                                 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
18469                                 ++actions_n;
18470                                 break;
18471                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
18472                                 ret = flow_dv_validate_action_set_tag(dev,
18473                                                         act, action_flags[i],
18474                                                         attr, &flow_err);
18475                                 if (ret)
18476                                         return -rte_mtr_error_set(error,
18477                                         ENOTSUP,
18478                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18479                                         NULL, flow_err.message ?
18480                                         flow_err.message :
18481                                         "Set tag action validate check fail");
18482                                 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
18483                                 ++actions_n;
18484                                 break;
18485                         case RTE_FLOW_ACTION_TYPE_DROP:
18486                                 ret = mlx5_flow_validate_action_drop
18487                                         (action_flags[i], attr, &flow_err);
18488                                 if (ret < 0)
18489                                         return -rte_mtr_error_set(error,
18490                                         ENOTSUP,
18491                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18492                                         NULL, flow_err.message ?
18493                                         flow_err.message :
18494                                         "Drop action validate check fail");
18495                                 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
18496                                 ++actions_n;
18497                                 break;
18498                         case RTE_FLOW_ACTION_TYPE_QUEUE:
18499                                 /*
18500                                  * Check whether extensive
18501                                  * metadata feature is engaged.
18502                                  */
18503                                 if (dev_conf->dv_flow_en &&
18504                                     (dev_conf->dv_xmeta_en !=
18505                                      MLX5_XMETA_MODE_LEGACY) &&
18506                                     mlx5_flow_ext_mreg_supported(dev))
18507                                         return -rte_mtr_error_set(error,
18508                                           ENOTSUP,
18509                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18510                                           NULL, "Queue action with meta "
18511                                           "is not supported. Please try use "
18512                                           "default policy for meter.");
18513                                 ret = mlx5_flow_validate_action_queue(act,
18514                                                         action_flags[i], dev,
18515                                                         attr, &flow_err);
18516                                 if (ret < 0)
18517                                         return -rte_mtr_error_set(error,
18518                                           ENOTSUP,
18519                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18520                                           NULL, flow_err.message ?
18521                                           flow_err.message :
18522                                           "Queue action validate check fail");
18523                                 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
18524                                 ++actions_n;
18525                                 break;
18526                         case RTE_FLOW_ACTION_TYPE_RSS:
18527                                 if (dev_conf->dv_flow_en &&
18528                                     (dev_conf->dv_xmeta_en !=
18529                                      MLX5_XMETA_MODE_LEGACY) &&
18530                                     mlx5_flow_ext_mreg_supported(dev))
18531                                         return -rte_mtr_error_set(error,
18532                                           ENOTSUP,
18533                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18534                                           NULL, "RSS action with meta "
18535                                           "is not supported. Please try use "
18536                                           "default policy for meter.");
18537                                 ret = mlx5_validate_action_rss(dev, act,
18538                                                                &flow_err);
18539                                 if (ret < 0)
18540                                         return -rte_mtr_error_set(error,
18541                                           ENOTSUP,
18542                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18543                                           NULL, flow_err.message ?
18544                                           flow_err.message :
18545                                           "RSS action validate check fail");
18546                                 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
18547                                 ++actions_n;
18548                                 /* Either G or Y will set the RSS. */
18549                                 rss_color[i] = act->conf;
18550                                 break;
18551                         case RTE_FLOW_ACTION_TYPE_JUMP:
18552                                 ret = flow_dv_validate_action_jump(dev,
18553                                         NULL, act, action_flags[i],
18554                                         attr, true, &flow_err);
18555                                 if (ret)
18556                                         return -rte_mtr_error_set(error,
18557                                           ENOTSUP,
18558                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18559                                           NULL, flow_err.message ?
18560                                           flow_err.message :
18561                                           "Jump action validate check fail");
18562                                 ++actions_n;
18563                                 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
18564                                 break;
18565                         case RTE_FLOW_ACTION_TYPE_METER:
18566                                 mtr = act->conf;
18567                                 if (next_mtr && next_mtr->mtr_id != mtr->mtr_id)
18568                                         return -rte_mtr_error_set(error, ENOTSUP,
18569                                                 RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
18570                                                 "Green and Yellow must use the same meter.");
18571                                 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
18572                                                         mtr->mtr_id,
18573                                                         action_flags[i],
18574                                                         is_rss,
18575                                                         &hierarchy_domain,
18576                                                         error);
18577                                 if (ret)
18578                                         return ret;
18579                                 ++actions_n;
18580                                 action_flags[i] |=
18581                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
18582                                 next_mtr = mtr;
18583                                 break;
18584                         case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
18585                                 ret = flow_dv_validate_action_modify_field(dev,
18586                                         action_flags[i], act, attr, &flow_err);
18587                                 if (ret < 0)
18588                                         return -rte_mtr_error_set(error,
18589                                           ENOTSUP,
18590                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18591                                           NULL, flow_err.message ?
18592                                           flow_err.message :
18593                                           "Modify field action validate check fail");
18594                                 ++actions_n;
18595                                 action_flags[i] |= MLX5_FLOW_ACTION_MODIFY_FIELD;
18596                                 break;
18597                         default:
18598                                 return -rte_mtr_error_set(error, ENOTSUP,
18599                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18600                                         NULL,
18601                                         "Doesn't support optional action");
18602                         }
18603                 }
18604                 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID) {
18605                         domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
18606                 } else if ((action_flags[i] &
18607                           (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
18608                           (action_flags[i] & MLX5_FLOW_ACTION_MARK)) {
18609                         /*
18610                          * Only support MLX5_XMETA_MODE_LEGACY
18611                          * so MARK action is only in ingress domain.
18612                          */
18613                         domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
18614                 } else {
18615                         domain_color[i] = def_domain;
18616                         if (action_flags[i] &&
18617                             !(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18618                                 domain_color[i] &=
18619                                 ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
18620                 }
18621                 if (action_flags[i] &
18622                     MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
18623                         domain_color[i] &= hierarchy_domain;
18624                 /*
18625                  * Non-termination actions only support NIC Tx domain.
18626                  * The adjustion should be skipped when there is no
18627                  * action or only END is provided. The default domains
18628                  * bit-mask is set to find the MIN intersection.
18629                  * The action flags checking should also be skipped.
18630                  */
18631                 if ((def_green && i == RTE_COLOR_GREEN) ||
18632                     (def_yellow && i == RTE_COLOR_YELLOW))
18633                         continue;
18634                 /*
18635                  * Validate the drop action mutual exclusion
18636                  * with other actions. Drop action is mutually-exclusive
18637                  * with any other action, except for Count action.
18638                  */
18639                 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
18640                     (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
18641                         return -rte_mtr_error_set(error, ENOTSUP,
18642                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18643                                 NULL, "Drop action is mutually-exclusive "
18644                                 "with any other action");
18645                 }
18646                 /* Eswitch has few restrictions on using items and actions */
18647                 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
18648                         if (!mlx5_flow_ext_mreg_supported(dev) &&
18649                             action_flags[i] & MLX5_FLOW_ACTION_MARK)
18650                                 return -rte_mtr_error_set(error, ENOTSUP,
18651                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18652                                         NULL, "unsupported action MARK");
18653                         if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
18654                                 return -rte_mtr_error_set(error, ENOTSUP,
18655                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18656                                         NULL, "unsupported action QUEUE");
18657                         if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
18658                                 return -rte_mtr_error_set(error, ENOTSUP,
18659                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18660                                         NULL, "unsupported action RSS");
18661                         if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18662                                 return -rte_mtr_error_set(error, ENOTSUP,
18663                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18664                                         NULL, "no fate action is found");
18665                 } else {
18666                         if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
18667                             (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
18668                                 if ((domain_color[i] &
18669                                      MLX5_MTR_DOMAIN_EGRESS_BIT))
18670                                         domain_color[i] =
18671                                                 MLX5_MTR_DOMAIN_EGRESS_BIT;
18672                                 else
18673                                         return -rte_mtr_error_set(error,
18674                                                 ENOTSUP,
18675                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18676                                                 NULL,
18677                                                 "no fate action is found");
18678                         }
18679                 }
18680         }
18681         if (next_mtr && *policy_mode == MLX5_MTR_POLICY_MODE_ALL) {
18682                 if (!(action_flags[RTE_COLOR_GREEN] & action_flags[RTE_COLOR_YELLOW] &
18683                       MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY))
18684                         return -rte_mtr_error_set(error, EINVAL, RTE_MTR_ERROR_TYPE_METER_POLICY,
18685                                                   NULL,
18686                                                   "Meter hierarchy supports meter action only.");
18687         }
18688         /* If both colors have RSS, the attributes should be the same. */
18689         if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
18690                                            rss_color[RTE_COLOR_YELLOW]))
18691                 return -rte_mtr_error_set(error, EINVAL,
18692                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18693                                           NULL, "policy RSS attr conflict");
18694         if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
18695                 *is_rss = true;
18696         /* "domain_color[C]" is non-zero for each color, default is ALL. */
18697         if (!def_green && !def_yellow &&
18698             domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
18699             !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
18700             !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
18701                 return -rte_mtr_error_set(error, EINVAL,
18702                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18703                                           NULL, "policy domains conflict");
18704         /*
18705          * At least one color policy is listed in the actions, the domains
18706          * to be supported should be the intersection.
18707          */
18708         *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
18709                          domain_color[RTE_COLOR_YELLOW];
18710         return 0;
18711 }
18712
18713 static int
18714 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
18715 {
18716         struct mlx5_priv *priv = dev->data->dev_private;
18717         int ret = 0;
18718
18719         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
18720                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
18721                                                 flags);
18722                 if (ret != 0)
18723                         return ret;
18724         }
18725         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
18726                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
18727                 if (ret != 0)
18728                         return ret;
18729         }
18730         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
18731                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
18732                 if (ret != 0)
18733                         return ret;
18734         }
18735         return 0;
18736 }
18737
18738 /**
18739  * Discover the number of available flow priorities
18740  * by trying to create a flow with the highest priority value
18741  * for each possible number.
18742  *
18743  * @param[in] dev
18744  *   Ethernet device.
18745  * @param[in] vprio
18746  *   List of possible number of available priorities.
18747  * @param[in] vprio_n
18748  *   Size of @p vprio array.
18749  * @return
18750  *   On success, number of available flow priorities.
18751  *   On failure, a negative errno-style code and rte_errno is set.
18752  */
18753 static int
18754 flow_dv_discover_priorities(struct rte_eth_dev *dev,
18755                             const uint16_t *vprio, int vprio_n)
18756 {
18757         struct mlx5_priv *priv = dev->data->dev_private;
18758         struct mlx5_indexed_pool *pool = priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW];
18759         struct rte_flow_item_eth eth;
18760         struct rte_flow_item item = {
18761                 .type = RTE_FLOW_ITEM_TYPE_ETH,
18762                 .spec = &eth,
18763                 .mask = &eth,
18764         };
18765         struct mlx5_flow_dv_matcher matcher = {
18766                 .mask = {
18767                         .size = sizeof(matcher.mask.buf),
18768                 },
18769         };
18770         union mlx5_flow_tbl_key tbl_key;
18771         struct mlx5_flow flow;
18772         void *action;
18773         struct rte_flow_error error;
18774         uint8_t misc_mask;
18775         int i, err, ret = -ENOTSUP;
18776
18777         /*
18778          * Prepare a flow with a catch-all pattern and a drop action.
18779          * Use drop queue, because shared drop action may be unavailable.
18780          */
18781         action = priv->drop_queue.hrxq->action;
18782         if (action == NULL) {
18783                 DRV_LOG(ERR, "Priority discovery requires a drop action");
18784                 rte_errno = ENOTSUP;
18785                 return -rte_errno;
18786         }
18787         memset(&flow, 0, sizeof(flow));
18788         flow.handle = mlx5_ipool_zmalloc(pool, &flow.handle_idx);
18789         if (flow.handle == NULL) {
18790                 DRV_LOG(ERR, "Cannot create flow handle");
18791                 rte_errno = ENOMEM;
18792                 return -rte_errno;
18793         }
18794         flow.ingress = true;
18795         flow.dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
18796         flow.dv.actions[0] = action;
18797         flow.dv.actions_n = 1;
18798         memset(&eth, 0, sizeof(eth));
18799         flow_dv_translate_item_eth(matcher.mask.buf, flow.dv.value.buf,
18800                                    &item, /* inner */ false, /* group */ 0);
18801         matcher.crc = rte_raw_cksum(matcher.mask.buf, matcher.mask.size);
18802         for (i = 0; i < vprio_n; i++) {
18803                 /* Configure the next proposed maximum priority. */
18804                 matcher.priority = vprio[i] - 1;
18805                 memset(&tbl_key, 0, sizeof(tbl_key));
18806                 err = flow_dv_matcher_register(dev, &matcher, &tbl_key, &flow,
18807                                                /* tunnel */ NULL,
18808                                                /* group */ 0,
18809                                                &error);
18810                 if (err != 0) {
18811                         /* This action is pure SW and must always succeed. */
18812                         DRV_LOG(ERR, "Cannot register matcher");
18813                         ret = -rte_errno;
18814                         break;
18815                 }
18816                 /* Try to apply the flow to HW. */
18817                 misc_mask = flow_dv_matcher_enable(flow.dv.value.buf);
18818                 __flow_dv_adjust_buf_size(&flow.dv.value.size, misc_mask);
18819                 err = mlx5_flow_os_create_flow
18820                                 (flow.handle->dvh.matcher->matcher_object,
18821                                  (void *)&flow.dv.value, flow.dv.actions_n,
18822                                  flow.dv.actions, &flow.handle->drv_flow);
18823                 if (err == 0) {
18824                         claim_zero(mlx5_flow_os_destroy_flow
18825                                                 (flow.handle->drv_flow));
18826                         flow.handle->drv_flow = NULL;
18827                 }
18828                 claim_zero(flow_dv_matcher_release(dev, flow.handle));
18829                 if (err != 0)
18830                         break;
18831                 ret = vprio[i];
18832         }
18833         mlx5_ipool_free(pool, flow.handle_idx);
18834         /* Set rte_errno if no expected priority value matched. */
18835         if (ret < 0)
18836                 rte_errno = -ret;
18837         return ret;
18838 }
18839
18840 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
18841         .validate = flow_dv_validate,
18842         .prepare = flow_dv_prepare,
18843         .translate = flow_dv_translate,
18844         .apply = flow_dv_apply,
18845         .remove = flow_dv_remove,
18846         .destroy = flow_dv_destroy,
18847         .query = flow_dv_query,
18848         .create_mtr_tbls = flow_dv_create_mtr_tbls,
18849         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
18850         .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
18851         .create_meter = flow_dv_mtr_alloc,
18852         .free_meter = flow_dv_aso_mtr_release_to_pool,
18853         .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
18854         .create_mtr_acts = flow_dv_create_mtr_policy_acts,
18855         .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
18856         .create_policy_rules = flow_dv_create_policy_rules,
18857         .destroy_policy_rules = flow_dv_destroy_policy_rules,
18858         .create_def_policy = flow_dv_create_def_policy,
18859         .destroy_def_policy = flow_dv_destroy_def_policy,
18860         .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
18861         .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
18862         .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
18863         .counter_alloc = flow_dv_counter_allocate,
18864         .counter_free = flow_dv_counter_free,
18865         .counter_query = flow_dv_counter_query,
18866         .get_aged_flows = flow_dv_get_aged_flows,
18867         .action_validate = flow_dv_action_validate,
18868         .action_create = flow_dv_action_create,
18869         .action_destroy = flow_dv_action_destroy,
18870         .action_update = flow_dv_action_update,
18871         .action_query = flow_dv_action_query,
18872         .sync_domain = flow_dv_sync_domain,
18873         .discover_priorities = flow_dv_discover_priorities,
18874         .item_create = flow_dv_item_create,
18875         .item_release = flow_dv_item_release,
18876 };
18877
18878 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */