drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_ip.h>
  19 #include <rte_gre.h>
  20 #include <rte_vxlan.h>
  21 #include <rte_gtp.h>
  22 #include <rte_eal_paging.h>
  23 #include <rte_mpls.h>
  24 #include <rte_mtr.h>
  25 #include <rte_mtr_driver.h>
  26
  27 #include <mlx5_glue.h>
  28 #include <mlx5_devx_cmds.h>
  29 #include <mlx5_prm.h>
  30 #include <mlx5_malloc.h>
  31
  32 #include "mlx5_defs.h"
  33 #include "mlx5.h"
  34 #include "mlx5_common_os.h"
  35 #include "mlx5_flow.h"
  36 #include "mlx5_flow_os.h"
  37 #include "mlx5_rx.h"
  38 #include "mlx5_tx.h"
  39 #include "rte_pmd_mlx5.h"
  40
  41 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  42
  43 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  44 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  45 #endif
  46
  47 #ifndef HAVE_MLX5DV_DR_ESWITCH
  48 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  49 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  50 #endif
  51 #endif
  52
  53 #ifndef HAVE_MLX5DV_DR
  54 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  55 #endif
  56
  57 /* VLAN header definitions */
  58 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  59 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  60 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  63
  64 union flow_dv_attr {
  65         struct {
  66                 uint32_t valid:1;
  67                 uint32_t ipv4:1;
  68                 uint32_t ipv6:1;
  69                 uint32_t tcp:1;
  70                 uint32_t udp:1;
  71                 uint32_t reserved:27;
  72         };
  73         uint32_t attr;
  74 };
  75
  76 static int
  77 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  78                              struct mlx5_flow_tbl_resource *tbl);
  79
  80 static int
  81 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  82                                      uint32_t encap_decap_idx);
  83
  84 static int
  85 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  86                                         uint32_t port_id);
  87 static void
  88 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  89
  90 static int
  91 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
  92                                   uint32_t rix_jump);
  93
  94 /**
  95  * Initialize flow attributes structure according to flow items' types.
  96  *
  97  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
  98  * mode. For tunnel mode, the items to be modified are the outermost ones.
  99  *
 100  * @param[in] item
 101  *   Pointer to item specification.
 102  * @param[out] attr
 103  *   Pointer to flow attributes structure.
 104  * @param[in] dev_flow
 105  *   Pointer to the sub flow.
 106  * @param[in] tunnel_decap
 107  *   Whether action is after tunnel decapsulation.
 108  */
 109 static void
 110 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 111                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 112 {
 113         uint64_t layers = dev_flow->handle->layers;
 114
 115         /*
 116          * If layers is already initialized, it means this dev_flow is the
 117          * suffix flow, the layers flags is set by the prefix flow. Need to
 118          * use the layer flags from prefix flow as the suffix flow may not
 119          * have the user defined items as the flow is split.
 120          */
 121         if (layers) {
 122                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 123                         attr->ipv4 = 1;
 124                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 125                         attr->ipv6 = 1;
 126                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 127                         attr->tcp = 1;
 128                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 129                         attr->udp = 1;
 130                 attr->valid = 1;
 131                 return;
 132         }
 133         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 134                 uint8_t next_protocol = 0xff;
 135                 switch (item->type) {
 136                 case RTE_FLOW_ITEM_TYPE_GRE:
 137                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 138                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 139                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 140                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 141                 case RTE_FLOW_ITEM_TYPE_MPLS:
 142                         if (tunnel_decap)
 143                                 attr->attr = 0;
 144                         break;
 145                 case RTE_FLOW_ITEM_TYPE_IPV4:
 146                         if (!attr->ipv6)
 147                                 attr->ipv4 = 1;
 148                         if (item->mask != NULL &&
 149                             ((const struct rte_flow_item_ipv4 *)
 150                             item->mask)->hdr.next_proto_id)
 151                                 next_protocol =
 152                                     ((const struct rte_flow_item_ipv4 *)
 153                                       (item->spec))->hdr.next_proto_id &
 154                                     ((const struct rte_flow_item_ipv4 *)
 155                                       (item->mask))->hdr.next_proto_id;
 156                         if ((next_protocol == IPPROTO_IPIP ||
 157                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 158                                 attr->attr = 0;
 159                         break;
 160                 case RTE_FLOW_ITEM_TYPE_IPV6:
 161                         if (!attr->ipv4)
 162                                 attr->ipv6 = 1;
 163                         if (item->mask != NULL &&
 164                             ((const struct rte_flow_item_ipv6 *)
 165                             item->mask)->hdr.proto)
 166                                 next_protocol =
 167                                     ((const struct rte_flow_item_ipv6 *)
 168                                       (item->spec))->hdr.proto &
 169                                     ((const struct rte_flow_item_ipv6 *)
 170                                       (item->mask))->hdr.proto;
 171                         if ((next_protocol == IPPROTO_IPIP ||
 172                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 173                                 attr->attr = 0;
 174                         break;
 175                 case RTE_FLOW_ITEM_TYPE_UDP:
 176                         if (!attr->tcp)
 177                                 attr->udp = 1;
 178                         break;
 179                 case RTE_FLOW_ITEM_TYPE_TCP:
 180                         if (!attr->udp)
 181                                 attr->tcp = 1;
 182                         break;
 183                 default:
 184                         break;
 185                 }
 186         }
 187         attr->valid = 1;
 188 }
 189
 190 /**
 191  * Convert rte_mtr_color to mlx5 color.
 192  *
 193  * @param[in] rcol
 194  *   rte_mtr_color.
 195  *
 196  * @return
 197  *   mlx5 color.
 198  */
 199 static int
 200 rte_col_2_mlx5_col(enum rte_color rcol)
 201 {
 202         switch (rcol) {
 203         case RTE_COLOR_GREEN:
 204                 return MLX5_FLOW_COLOR_GREEN;
 205         case RTE_COLOR_YELLOW:
 206                 return MLX5_FLOW_COLOR_YELLOW;
 207         case RTE_COLOR_RED:
 208                 return MLX5_FLOW_COLOR_RED;
 209         default:
 210                 break;
 211         }
 212         return MLX5_FLOW_COLOR_UNDEFINED;
 213 }
 214
 215 struct field_modify_info {
 216         uint32_t size; /* Size of field in protocol header, in bytes. */
 217         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 218         enum mlx5_modification_field id;
 219 };
 220
 221 struct field_modify_info modify_eth[] = {
 222         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 223         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 224         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 225         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 226         {0, 0, 0},
 227 };
 228
 229 struct field_modify_info modify_vlan_out_first_vid[] = {
 230         /* Size in bits !!! */
 231         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 232         {0, 0, 0},
 233 };
 234
 235 struct field_modify_info modify_ipv4[] = {
 236         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 237         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 238         {4, 12, MLX5_MODI_OUT_SIPV4},
 239         {4, 16, MLX5_MODI_OUT_DIPV4},
 240         {0, 0, 0},
 241 };
 242
 243 struct field_modify_info modify_ipv6[] = {
 244         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 245         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 246         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 247         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 248         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 249         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 250         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 251         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 252         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 253         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 254         {0, 0, 0},
 255 };
 256
 257 struct field_modify_info modify_udp[] = {
 258         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 259         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 260         {0, 0, 0},
 261 };
 262
 263 struct field_modify_info modify_tcp[] = {
 264         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 265         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 266         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 267         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 268         {0, 0, 0},
 269 };
 270
 271 static const struct rte_flow_item *
 272 mlx5_flow_find_tunnel_item(const struct rte_flow_item *item)
 273 {
 274         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 275                 switch (item->type) {
 276                 default:
 277                         break;
 278                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 279                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 280                 case RTE_FLOW_ITEM_TYPE_GRE:
 281                 case RTE_FLOW_ITEM_TYPE_MPLS:
 282                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 283                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 284                         return item;
 285                 case RTE_FLOW_ITEM_TYPE_IPV4:
 286                 case RTE_FLOW_ITEM_TYPE_IPV6:
 287                         if (item[1].type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 288                             item[1].type == RTE_FLOW_ITEM_TYPE_IPV6)
 289                                 return item;
 290                         break;
 291                 }
 292         }
 293         return NULL;
 294 }
 295
 296 static void
 297 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 298                           uint8_t next_protocol, uint64_t *item_flags,
 299                           int *tunnel)
 300 {
 301         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 302                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 303         if (next_protocol == IPPROTO_IPIP) {
 304                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 305                 *tunnel = 1;
 306         }
 307         if (next_protocol == IPPROTO_IPV6) {
 308                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 309                 *tunnel = 1;
 310         }
 311 }
 312
 313 /* Update VLAN's VID/PCP based on input rte_flow_action.
 314  *
 315  * @param[in] action
 316  *   Pointer to struct rte_flow_action.
 317  * @param[out] vlan
 318  *   Pointer to struct rte_vlan_hdr.
 319  */
 320 static void
 321 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 322                          struct rte_vlan_hdr *vlan)
 323 {
 324         uint16_t vlan_tci;
 325         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 326                 vlan_tci =
 327                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 328                                                action->conf)->vlan_pcp;
 329                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 330                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 331                 vlan->vlan_tci |= vlan_tci;
 332         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 333                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 334                 vlan->vlan_tci |= rte_be_to_cpu_16
 335                     (((const struct rte_flow_action_of_set_vlan_vid *)
 336                                              action->conf)->vlan_vid);
 337         }
 338 }
 339
 340 /**
 341  * Fetch 1, 2, 3 or 4 byte field from the byte array
 342  * and return as unsigned integer in host-endian format.
 343  *
 344  * @param[in] data
 345  *   Pointer to data array.
 346  * @param[in] size
 347  *   Size of field to extract.
 348  *
 349  * @return
 350  *   converted field in host endian format.
 351  */
 352 static inline uint32_t
 353 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 354 {
 355         uint32_t ret;
 356
 357         switch (size) {
 358         case 1:
 359                 ret = *data;
 360                 break;
 361         case 2:
 362                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 363                 break;
 364         case 3:
 365                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 366                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 367                 break;
 368         case 4:
 369                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 370                 break;
 371         default:
 372                 MLX5_ASSERT(false);
 373                 ret = 0;
 374                 break;
 375         }
 376         return ret;
 377 }
 378
 379 /**
 380  * Convert modify-header action to DV specification.
 381  *
 382  * Data length of each action is determined by provided field description
 383  * and the item mask. Data bit offset and width of each action is determined
 384  * by provided item mask.
 385  *
 386  * @param[in] item
 387  *   Pointer to item specification.
 388  * @param[in] field
 389  *   Pointer to field modification information.
 390  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 391  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 392  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 393  * @param[in] dcopy
 394  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 395  *   Negative offset value sets the same offset as source offset.
 396  *   size field is ignored, value is taken from source field.
 397  * @param[in,out] resource
 398  *   Pointer to the modify-header resource.
 399  * @param[in] type
 400  *   Type of modification.
 401  * @param[out] error
 402  *   Pointer to the error structure.
 403  *
 404  * @return
 405  *   0 on success, a negative errno value otherwise and rte_errno is set.
 406  */
 407 static int
 408 flow_dv_convert_modify_action(struct rte_flow_item *item,
 409                               struct field_modify_info *field,
 410                               struct field_modify_info *dcopy,
 411                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 412                               uint32_t type, struct rte_flow_error *error)
 413 {
 414         uint32_t i = resource->actions_num;
 415         struct mlx5_modification_cmd *actions = resource->actions;
 416
 417         /*
 418          * The item and mask are provided in big-endian format.
 419          * The fields should be presented as in big-endian format either.
 420          * Mask must be always present, it defines the actual field width.
 421          */
 422         MLX5_ASSERT(item->mask);
 423         MLX5_ASSERT(field->size);
 424         do {
 425                 unsigned int size_b;
 426                 unsigned int off_b;
 427                 uint32_t mask;
 428                 uint32_t data;
 429
 430                 if (i >= MLX5_MAX_MODIFY_NUM)
 431                         return rte_flow_error_set(error, EINVAL,
 432                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 433                                  "too many items to modify");
 434                 /* Fetch variable byte size mask from the array. */
 435                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 436                                            field->offset, field->size);
 437                 if (!mask) {
 438                         ++field;
 439                         continue;
 440                 }
 441                 /* Deduce actual data width in bits from mask value. */
 442                 off_b = rte_bsf32(mask);
 443                 size_b = sizeof(uint32_t) * CHAR_BIT -
 444                          off_b - __builtin_clz(mask);
 445                 MLX5_ASSERT(size_b);
 446                 size_b = size_b == sizeof(uint32_t) * CHAR_BIT ? 0 : size_b;
 447                 actions[i] = (struct mlx5_modification_cmd) {
 448                         .action_type = type,
 449                         .field = field->id,
 450                         .offset = off_b,
 451                         .length = size_b,
 452                 };
 453                 /* Convert entire record to expected big-endian format. */
 454                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 455                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 456                         MLX5_ASSERT(dcopy);
 457                         actions[i].dst_field = dcopy->id;
 458                         actions[i].dst_offset =
 459                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 460                         /* Convert entire record to big-endian format. */
 461                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 462                         ++dcopy;
 463                 } else {
 464                         MLX5_ASSERT(item->spec);
 465                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 466                                                    field->offset, field->size);
 467                         /* Shift out the trailing masked bits from data. */
 468                         data = (data & mask) >> off_b;
 469                         actions[i].data1 = rte_cpu_to_be_32(data);
 470                 }
 471                 ++i;
 472                 ++field;
 473         } while (field->size);
 474         if (resource->actions_num == i)
 475                 return rte_flow_error_set(error, EINVAL,
 476                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 477                                           "invalid modification flow item");
 478         resource->actions_num = i;
 479         return 0;
 480 }
 481
 482 /**
 483  * Convert modify-header set IPv4 address action to DV specification.
 484  *
 485  * @param[in,out] resource
 486  *   Pointer to the modify-header resource.
 487  * @param[in] action
 488  *   Pointer to action specification.
 489  * @param[out] error
 490  *   Pointer to the error structure.
 491  *
 492  * @return
 493  *   0 on success, a negative errno value otherwise and rte_errno is set.
 494  */
 495 static int
 496 flow_dv_convert_action_modify_ipv4
 497                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 498                          const struct rte_flow_action *action,
 499                          struct rte_flow_error *error)
 500 {
 501         const struct rte_flow_action_set_ipv4 *conf =
 502                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 503         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 504         struct rte_flow_item_ipv4 ipv4;
 505         struct rte_flow_item_ipv4 ipv4_mask;
 506
 507         memset(&ipv4, 0, sizeof(ipv4));
 508         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 509         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 510                 ipv4.hdr.src_addr = conf->ipv4_addr;
 511                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 512         } else {
 513                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 514                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 515         }
 516         item.spec = &ipv4;
 517         item.mask = &ipv4_mask;
 518         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 519                                              MLX5_MODIFICATION_TYPE_SET, error);
 520 }
 521
 522 /**
 523  * Convert modify-header set IPv6 address action to DV specification.
 524  *
 525  * @param[in,out] resource
 526  *   Pointer to the modify-header resource.
 527  * @param[in] action
 528  *   Pointer to action specification.
 529  * @param[out] error
 530  *   Pointer to the error structure.
 531  *
 532  * @return
 533  *   0 on success, a negative errno value otherwise and rte_errno is set.
 534  */
 535 static int
 536 flow_dv_convert_action_modify_ipv6
 537                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 538                          const struct rte_flow_action *action,
 539                          struct rte_flow_error *error)
 540 {
 541         const struct rte_flow_action_set_ipv6 *conf =
 542                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 543         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 544         struct rte_flow_item_ipv6 ipv6;
 545         struct rte_flow_item_ipv6 ipv6_mask;
 546
 547         memset(&ipv6, 0, sizeof(ipv6));
 548         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 549         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 550                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 551                        sizeof(ipv6.hdr.src_addr));
 552                 memcpy(&ipv6_mask.hdr.src_addr,
 553                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 554                        sizeof(ipv6.hdr.src_addr));
 555         } else {
 556                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 557                        sizeof(ipv6.hdr.dst_addr));
 558                 memcpy(&ipv6_mask.hdr.dst_addr,
 559                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 560                        sizeof(ipv6.hdr.dst_addr));
 561         }
 562         item.spec = &ipv6;
 563         item.mask = &ipv6_mask;
 564         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 565                                              MLX5_MODIFICATION_TYPE_SET, error);
 566 }
 567
 568 /**
 569  * Convert modify-header set MAC address action to DV specification.
 570  *
 571  * @param[in,out] resource
 572  *   Pointer to the modify-header resource.
 573  * @param[in] action
 574  *   Pointer to action specification.
 575  * @param[out] error
 576  *   Pointer to the error structure.
 577  *
 578  * @return
 579  *   0 on success, a negative errno value otherwise and rte_errno is set.
 580  */
 581 static int
 582 flow_dv_convert_action_modify_mac
 583                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 584                          const struct rte_flow_action *action,
 585                          struct rte_flow_error *error)
 586 {
 587         const struct rte_flow_action_set_mac *conf =
 588                 (const struct rte_flow_action_set_mac *)(action->conf);
 589         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 590         struct rte_flow_item_eth eth;
 591         struct rte_flow_item_eth eth_mask;
 592
 593         memset(&eth, 0, sizeof(eth));
 594         memset(&eth_mask, 0, sizeof(eth_mask));
 595         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 596                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 597                        sizeof(eth.src.addr_bytes));
 598                 memcpy(&eth_mask.src.addr_bytes,
 599                        &rte_flow_item_eth_mask.src.addr_bytes,
 600                        sizeof(eth_mask.src.addr_bytes));
 601         } else {
 602                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 603                        sizeof(eth.dst.addr_bytes));
 604                 memcpy(&eth_mask.dst.addr_bytes,
 605                        &rte_flow_item_eth_mask.dst.addr_bytes,
 606                        sizeof(eth_mask.dst.addr_bytes));
 607         }
 608         item.spec = &eth;
 609         item.mask = &eth_mask;
 610         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 611                                              MLX5_MODIFICATION_TYPE_SET, error);
 612 }
 613
 614 /**
 615  * Convert modify-header set VLAN VID action to DV specification.
 616  *
 617  * @param[in,out] resource
 618  *   Pointer to the modify-header resource.
 619  * @param[in] action
 620  *   Pointer to action specification.
 621  * @param[out] error
 622  *   Pointer to the error structure.
 623  *
 624  * @return
 625  *   0 on success, a negative errno value otherwise and rte_errno is set.
 626  */
 627 static int
 628 flow_dv_convert_action_modify_vlan_vid
 629                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 630                          const struct rte_flow_action *action,
 631                          struct rte_flow_error *error)
 632 {
 633         const struct rte_flow_action_of_set_vlan_vid *conf =
 634                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 635         int i = resource->actions_num;
 636         struct mlx5_modification_cmd *actions = resource->actions;
 637         struct field_modify_info *field = modify_vlan_out_first_vid;
 638
 639         if (i >= MLX5_MAX_MODIFY_NUM)
 640                 return rte_flow_error_set(error, EINVAL,
 641                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 642                          "too many items to modify");
 643         actions[i] = (struct mlx5_modification_cmd) {
 644                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 645                 .field = field->id,
 646                 .length = field->size,
 647                 .offset = field->offset,
 648         };
 649         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 650         actions[i].data1 = conf->vlan_vid;
 651         actions[i].data1 = actions[i].data1 << 16;
 652         resource->actions_num = ++i;
 653         return 0;
 654 }
 655
 656 /**
 657  * Convert modify-header set TP action to DV specification.
 658  *
 659  * @param[in,out] resource
 660  *   Pointer to the modify-header resource.
 661  * @param[in] action
 662  *   Pointer to action specification.
 663  * @param[in] items
 664  *   Pointer to rte_flow_item objects list.
 665  * @param[in] attr
 666  *   Pointer to flow attributes structure.
 667  * @param[in] dev_flow
 668  *   Pointer to the sub flow.
 669  * @param[in] tunnel_decap
 670  *   Whether action is after tunnel decapsulation.
 671  * @param[out] error
 672  *   Pointer to the error structure.
 673  *
 674  * @return
 675  *   0 on success, a negative errno value otherwise and rte_errno is set.
 676  */
 677 static int
 678 flow_dv_convert_action_modify_tp
 679                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 680                          const struct rte_flow_action *action,
 681                          const struct rte_flow_item *items,
 682                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 683                          bool tunnel_decap, struct rte_flow_error *error)
 684 {
 685         const struct rte_flow_action_set_tp *conf =
 686                 (const struct rte_flow_action_set_tp *)(action->conf);
 687         struct rte_flow_item item;
 688         struct rte_flow_item_udp udp;
 689         struct rte_flow_item_udp udp_mask;
 690         struct rte_flow_item_tcp tcp;
 691         struct rte_flow_item_tcp tcp_mask;
 692         struct field_modify_info *field;
 693
 694         if (!attr->valid)
 695                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 696         if (attr->udp) {
 697                 memset(&udp, 0, sizeof(udp));
 698                 memset(&udp_mask, 0, sizeof(udp_mask));
 699                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 700                         udp.hdr.src_port = conf->port;
 701                         udp_mask.hdr.src_port =
 702                                         rte_flow_item_udp_mask.hdr.src_port;
 703                 } else {
 704                         udp.hdr.dst_port = conf->port;
 705                         udp_mask.hdr.dst_port =
 706                                         rte_flow_item_udp_mask.hdr.dst_port;
 707                 }
 708                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 709                 item.spec = &udp;
 710                 item.mask = &udp_mask;
 711                 field = modify_udp;
 712         } else {
 713                 MLX5_ASSERT(attr->tcp);
 714                 memset(&tcp, 0, sizeof(tcp));
 715                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 716                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 717                         tcp.hdr.src_port = conf->port;
 718                         tcp_mask.hdr.src_port =
 719                                         rte_flow_item_tcp_mask.hdr.src_port;
 720                 } else {
 721                         tcp.hdr.dst_port = conf->port;
 722                         tcp_mask.hdr.dst_port =
 723                                         rte_flow_item_tcp_mask.hdr.dst_port;
 724                 }
 725                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 726                 item.spec = &tcp;
 727                 item.mask = &tcp_mask;
 728                 field = modify_tcp;
 729         }
 730         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 731                                              MLX5_MODIFICATION_TYPE_SET, error);
 732 }
 733
 734 /**
 735  * Convert modify-header set TTL action to DV specification.
 736  *
 737  * @param[in,out] resource
 738  *   Pointer to the modify-header resource.
 739  * @param[in] action
 740  *   Pointer to action specification.
 741  * @param[in] items
 742  *   Pointer to rte_flow_item objects list.
 743  * @param[in] attr
 744  *   Pointer to flow attributes structure.
 745  * @param[in] dev_flow
 746  *   Pointer to the sub flow.
 747  * @param[in] tunnel_decap
 748  *   Whether action is after tunnel decapsulation.
 749  * @param[out] error
 750  *   Pointer to the error structure.
 751  *
 752  * @return
 753  *   0 on success, a negative errno value otherwise and rte_errno is set.
 754  */
 755 static int
 756 flow_dv_convert_action_modify_ttl
 757                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 758                          const struct rte_flow_action *action,
 759                          const struct rte_flow_item *items,
 760                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 761                          bool tunnel_decap, struct rte_flow_error *error)
 762 {
 763         const struct rte_flow_action_set_ttl *conf =
 764                 (const struct rte_flow_action_set_ttl *)(action->conf);
 765         struct rte_flow_item item;
 766         struct rte_flow_item_ipv4 ipv4;
 767         struct rte_flow_item_ipv4 ipv4_mask;
 768         struct rte_flow_item_ipv6 ipv6;
 769         struct rte_flow_item_ipv6 ipv6_mask;
 770         struct field_modify_info *field;
 771
 772         if (!attr->valid)
 773                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 774         if (attr->ipv4) {
 775                 memset(&ipv4, 0, sizeof(ipv4));
 776                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 777                 ipv4.hdr.time_to_live = conf->ttl_value;
 778                 ipv4_mask.hdr.time_to_live = 0xFF;
 779                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 780                 item.spec = &ipv4;
 781                 item.mask = &ipv4_mask;
 782                 field = modify_ipv4;
 783         } else {
 784                 MLX5_ASSERT(attr->ipv6);
 785                 memset(&ipv6, 0, sizeof(ipv6));
 786                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 787                 ipv6.hdr.hop_limits = conf->ttl_value;
 788                 ipv6_mask.hdr.hop_limits = 0xFF;
 789                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 790                 item.spec = &ipv6;
 791                 item.mask = &ipv6_mask;
 792                 field = modify_ipv6;
 793         }
 794         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 795                                              MLX5_MODIFICATION_TYPE_SET, error);
 796 }
 797
 798 /**
 799  * Convert modify-header decrement TTL action to DV specification.
 800  *
 801  * @param[in,out] resource
 802  *   Pointer to the modify-header resource.
 803  * @param[in] action
 804  *   Pointer to action specification.
 805  * @param[in] items
 806  *   Pointer to rte_flow_item objects list.
 807  * @param[in] attr
 808  *   Pointer to flow attributes structure.
 809  * @param[in] dev_flow
 810  *   Pointer to the sub flow.
 811  * @param[in] tunnel_decap
 812  *   Whether action is after tunnel decapsulation.
 813  * @param[out] error
 814  *   Pointer to the error structure.
 815  *
 816  * @return
 817  *   0 on success, a negative errno value otherwise and rte_errno is set.
 818  */
 819 static int
 820 flow_dv_convert_action_modify_dec_ttl
 821                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 822                          const struct rte_flow_item *items,
 823                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 824                          bool tunnel_decap, struct rte_flow_error *error)
 825 {
 826         struct rte_flow_item item;
 827         struct rte_flow_item_ipv4 ipv4;
 828         struct rte_flow_item_ipv4 ipv4_mask;
 829         struct rte_flow_item_ipv6 ipv6;
 830         struct rte_flow_item_ipv6 ipv6_mask;
 831         struct field_modify_info *field;
 832
 833         if (!attr->valid)
 834                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 835         if (attr->ipv4) {
 836                 memset(&ipv4, 0, sizeof(ipv4));
 837                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 838                 ipv4.hdr.time_to_live = 0xFF;
 839                 ipv4_mask.hdr.time_to_live = 0xFF;
 840                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 841                 item.spec = &ipv4;
 842                 item.mask = &ipv4_mask;
 843                 field = modify_ipv4;
 844         } else {
 845                 MLX5_ASSERT(attr->ipv6);
 846                 memset(&ipv6, 0, sizeof(ipv6));
 847                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 848                 ipv6.hdr.hop_limits = 0xFF;
 849                 ipv6_mask.hdr.hop_limits = 0xFF;
 850                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 851                 item.spec = &ipv6;
 852                 item.mask = &ipv6_mask;
 853                 field = modify_ipv6;
 854         }
 855         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 856                                              MLX5_MODIFICATION_TYPE_ADD, error);
 857 }
 858
 859 /**
 860  * Convert modify-header increment/decrement TCP Sequence number
 861  * to DV specification.
 862  *
 863  * @param[in,out] resource
 864  *   Pointer to the modify-header resource.
 865  * @param[in] action
 866  *   Pointer to action specification.
 867  * @param[out] error
 868  *   Pointer to the error structure.
 869  *
 870  * @return
 871  *   0 on success, a negative errno value otherwise and rte_errno is set.
 872  */
 873 static int
 874 flow_dv_convert_action_modify_tcp_seq
 875                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 876                          const struct rte_flow_action *action,
 877                          struct rte_flow_error *error)
 878 {
 879         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 880         uint64_t value = rte_be_to_cpu_32(*conf);
 881         struct rte_flow_item item;
 882         struct rte_flow_item_tcp tcp;
 883         struct rte_flow_item_tcp tcp_mask;
 884
 885         memset(&tcp, 0, sizeof(tcp));
 886         memset(&tcp_mask, 0, sizeof(tcp_mask));
 887         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 888                 /*
 889                  * The HW has no decrement operation, only increment operation.
 890                  * To simulate decrement X from Y using increment operation
 891                  * we need to add UINT32_MAX X times to Y.
 892                  * Each adding of UINT32_MAX decrements Y by 1.
 893                  */
 894                 value *= UINT32_MAX;
 895         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 896         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 897         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 898         item.spec = &tcp;
 899         item.mask = &tcp_mask;
 900         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 901                                              MLX5_MODIFICATION_TYPE_ADD, error);
 902 }
 903
 904 /**
 905  * Convert modify-header increment/decrement TCP Acknowledgment number
 906  * to DV specification.
 907  *
 908  * @param[in,out] resource
 909  *   Pointer to the modify-header resource.
 910  * @param[in] action
 911  *   Pointer to action specification.
 912  * @param[out] error
 913  *   Pointer to the error structure.
 914  *
 915  * @return
 916  *   0 on success, a negative errno value otherwise and rte_errno is set.
 917  */
 918 static int
 919 flow_dv_convert_action_modify_tcp_ack
 920                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 921                          const struct rte_flow_action *action,
 922                          struct rte_flow_error *error)
 923 {
 924         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 925         uint64_t value = rte_be_to_cpu_32(*conf);
 926         struct rte_flow_item item;
 927         struct rte_flow_item_tcp tcp;
 928         struct rte_flow_item_tcp tcp_mask;
 929
 930         memset(&tcp, 0, sizeof(tcp));
 931         memset(&tcp_mask, 0, sizeof(tcp_mask));
 932         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 933                 /*
 934                  * The HW has no decrement operation, only increment operation.
 935                  * To simulate decrement X from Y using increment operation
 936                  * we need to add UINT32_MAX X times to Y.
 937                  * Each adding of UINT32_MAX decrements Y by 1.
 938                  */
 939                 value *= UINT32_MAX;
 940         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
 941         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
 942         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 943         item.spec = &tcp;
 944         item.mask = &tcp_mask;
 945         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 946                                              MLX5_MODIFICATION_TYPE_ADD, error);
 947 }
 948
 949 static enum mlx5_modification_field reg_to_field[] = {
 950         [REG_NON] = MLX5_MODI_OUT_NONE,
 951         [REG_A] = MLX5_MODI_META_DATA_REG_A,
 952         [REG_B] = MLX5_MODI_META_DATA_REG_B,
 953         [REG_C_0] = MLX5_MODI_META_REG_C_0,
 954         [REG_C_1] = MLX5_MODI_META_REG_C_1,
 955         [REG_C_2] = MLX5_MODI_META_REG_C_2,
 956         [REG_C_3] = MLX5_MODI_META_REG_C_3,
 957         [REG_C_4] = MLX5_MODI_META_REG_C_4,
 958         [REG_C_5] = MLX5_MODI_META_REG_C_5,
 959         [REG_C_6] = MLX5_MODI_META_REG_C_6,
 960         [REG_C_7] = MLX5_MODI_META_REG_C_7,
 961 };
 962
 963 /**
 964  * Convert register set to DV specification.
 965  *
 966  * @param[in,out] resource
 967  *   Pointer to the modify-header resource.
 968  * @param[in] action
 969  *   Pointer to action specification.
 970  * @param[out] error
 971  *   Pointer to the error structure.
 972  *
 973  * @return
 974  *   0 on success, a negative errno value otherwise and rte_errno is set.
 975  */
 976 static int
 977 flow_dv_convert_action_set_reg
 978                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 979                          const struct rte_flow_action *action,
 980                          struct rte_flow_error *error)
 981 {
 982         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
 983         struct mlx5_modification_cmd *actions = resource->actions;
 984         uint32_t i = resource->actions_num;
 985
 986         if (i >= MLX5_MAX_MODIFY_NUM)
 987                 return rte_flow_error_set(error, EINVAL,
 988                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 989                                           "too many items to modify");
 990         MLX5_ASSERT(conf->id != REG_NON);
 991         MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
 992         actions[i] = (struct mlx5_modification_cmd) {
 993                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 994                 .field = reg_to_field[conf->id],
 995                 .offset = conf->offset,
 996                 .length = conf->length,
 997         };
 998         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 999         actions[i].data1 = rte_cpu_to_be_32(conf->data);
1000         ++i;
1001         resource->actions_num = i;
1002         return 0;
1003 }
1004
1005 /**
1006  * Convert SET_TAG action to DV specification.
1007  *
1008  * @param[in] dev
1009  *   Pointer to the rte_eth_dev structure.
1010  * @param[in,out] resource
1011  *   Pointer to the modify-header resource.
1012  * @param[in] conf
1013  *   Pointer to action specification.
1014  * @param[out] error
1015  *   Pointer to the error structure.
1016  *
1017  * @return
1018  *   0 on success, a negative errno value otherwise and rte_errno is set.
1019  */
1020 static int
1021 flow_dv_convert_action_set_tag
1022                         (struct rte_eth_dev *dev,
1023                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1024                          const struct rte_flow_action_set_tag *conf,
1025                          struct rte_flow_error *error)
1026 {
1027         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1028         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1029         struct rte_flow_item item = {
1030                 .spec = &data,
1031                 .mask = &mask,
1032         };
1033         struct field_modify_info reg_c_x[] = {
1034                 [1] = {0, 0, 0},
1035         };
1036         enum mlx5_modification_field reg_type;
1037         int ret;
1038
1039         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1040         if (ret < 0)
1041                 return ret;
1042         MLX5_ASSERT(ret != REG_NON);
1043         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1044         reg_type = reg_to_field[ret];
1045         MLX5_ASSERT(reg_type > 0);
1046         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1047         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1048                                              MLX5_MODIFICATION_TYPE_SET, error);
1049 }
1050
1051 /**
1052  * Convert internal COPY_REG action to DV specification.
1053  *
1054  * @param[in] dev
1055  *   Pointer to the rte_eth_dev structure.
1056  * @param[in,out] res
1057  *   Pointer to the modify-header resource.
1058  * @param[in] action
1059  *   Pointer to action specification.
1060  * @param[out] error
1061  *   Pointer to the error structure.
1062  *
1063  * @return
1064  *   0 on success, a negative errno value otherwise and rte_errno is set.
1065  */
1066 static int
1067 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1068                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1069                                  const struct rte_flow_action *action,
1070                                  struct rte_flow_error *error)
1071 {
1072         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1073         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1074         struct rte_flow_item item = {
1075                 .spec = NULL,
1076                 .mask = &mask,
1077         };
1078         struct field_modify_info reg_src[] = {
1079                 {4, 0, reg_to_field[conf->src]},
1080                 {0, 0, 0},
1081         };
1082         struct field_modify_info reg_dst = {
1083                 .offset = 0,
1084                 .id = reg_to_field[conf->dst],
1085         };
1086         /* Adjust reg_c[0] usage according to reported mask. */
1087         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1088                 struct mlx5_priv *priv = dev->data->dev_private;
1089                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1090
1091                 MLX5_ASSERT(reg_c0);
1092                 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1093                 if (conf->dst == REG_C_0) {
1094                         /* Copy to reg_c[0], within mask only. */
1095                         reg_dst.offset = rte_bsf32(reg_c0);
1096                         /*
1097                          * Mask is ignoring the enianness, because
1098                          * there is no conversion in datapath.
1099                          */
1100 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1101                         /* Copy from destination lower bits to reg_c[0]. */
1102                         mask = reg_c0 >> reg_dst.offset;
1103 #else
1104                         /* Copy from destination upper bits to reg_c[0]. */
1105                         mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1106                                           rte_fls_u32(reg_c0));
1107 #endif
1108                 } else {
1109                         mask = rte_cpu_to_be_32(reg_c0);
1110 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1111                         /* Copy from reg_c[0] to destination lower bits. */
1112                         reg_dst.offset = 0;
1113 #else
1114                         /* Copy from reg_c[0] to destination upper bits. */
1115                         reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1116                                          (rte_fls_u32(reg_c0) -
1117                                           rte_bsf32(reg_c0));
1118 #endif
1119                 }
1120         }
1121         return flow_dv_convert_modify_action(&item,
1122                                              reg_src, &reg_dst, res,
1123                                              MLX5_MODIFICATION_TYPE_COPY,
1124                                              error);
1125 }
1126
1127 /**
1128  * Convert MARK action to DV specification. This routine is used
1129  * in extensive metadata only and requires metadata register to be
1130  * handled. In legacy mode hardware tag resource is engaged.
1131  *
1132  * @param[in] dev
1133  *   Pointer to the rte_eth_dev structure.
1134  * @param[in] conf
1135  *   Pointer to MARK action specification.
1136  * @param[in,out] resource
1137  *   Pointer to the modify-header resource.
1138  * @param[out] error
1139  *   Pointer to the error structure.
1140  *
1141  * @return
1142  *   0 on success, a negative errno value otherwise and rte_errno is set.
1143  */
1144 static int
1145 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1146                             const struct rte_flow_action_mark *conf,
1147                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1148                             struct rte_flow_error *error)
1149 {
1150         struct mlx5_priv *priv = dev->data->dev_private;
1151         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1152                                            priv->sh->dv_mark_mask);
1153         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1154         struct rte_flow_item item = {
1155                 .spec = &data,
1156                 .mask = &mask,
1157         };
1158         struct field_modify_info reg_c_x[] = {
1159                 [1] = {0, 0, 0},
1160         };
1161         int reg;
1162
1163         if (!mask)
1164                 return rte_flow_error_set(error, EINVAL,
1165                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1166                                           NULL, "zero mark action mask");
1167         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1168         if (reg < 0)
1169                 return reg;
1170         MLX5_ASSERT(reg > 0);
1171         if (reg == REG_C_0) {
1172                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1173                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1174
1175                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1176                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1177                 mask = rte_cpu_to_be_32(mask << shl_c0);
1178         }
1179         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1180         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1181                                              MLX5_MODIFICATION_TYPE_SET, error);
1182 }
1183
1184 /**
1185  * Get metadata register index for specified steering domain.
1186  *
1187  * @param[in] dev
1188  *   Pointer to the rte_eth_dev structure.
1189  * @param[in] attr
1190  *   Attributes of flow to determine steering domain.
1191  * @param[out] error
1192  *   Pointer to the error structure.
1193  *
1194  * @return
1195  *   positive index on success, a negative errno value otherwise
1196  *   and rte_errno is set.
1197  */
1198 static enum modify_reg
1199 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1200                          const struct rte_flow_attr *attr,
1201                          struct rte_flow_error *error)
1202 {
1203         int reg =
1204                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1205                                           MLX5_METADATA_FDB :
1206                                             attr->egress ?
1207                                             MLX5_METADATA_TX :
1208                                             MLX5_METADATA_RX, 0, error);
1209         if (reg < 0)
1210                 return rte_flow_error_set(error,
1211                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1212                                           NULL, "unavailable "
1213                                           "metadata register");
1214         return reg;
1215 }
1216
1217 /**
1218  * Convert SET_META action to DV specification.
1219  *
1220  * @param[in] dev
1221  *   Pointer to the rte_eth_dev structure.
1222  * @param[in,out] resource
1223  *   Pointer to the modify-header resource.
1224  * @param[in] attr
1225  *   Attributes of flow that includes this item.
1226  * @param[in] conf
1227  *   Pointer to action specification.
1228  * @param[out] error
1229  *   Pointer to the error structure.
1230  *
1231  * @return
1232  *   0 on success, a negative errno value otherwise and rte_errno is set.
1233  */
1234 static int
1235 flow_dv_convert_action_set_meta
1236                         (struct rte_eth_dev *dev,
1237                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1238                          const struct rte_flow_attr *attr,
1239                          const struct rte_flow_action_set_meta *conf,
1240                          struct rte_flow_error *error)
1241 {
1242         uint32_t data = conf->data;
1243         uint32_t mask = conf->mask;
1244         struct rte_flow_item item = {
1245                 .spec = &data,
1246                 .mask = &mask,
1247         };
1248         struct field_modify_info reg_c_x[] = {
1249                 [1] = {0, 0, 0},
1250         };
1251         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1252
1253         if (reg < 0)
1254                 return reg;
1255         MLX5_ASSERT(reg != REG_NON);
1256         /*
1257          * In datapath code there is no endianness
1258          * coversions for perfromance reasons, all
1259          * pattern conversions are done in rte_flow.
1260          */
1261         if (reg == REG_C_0) {
1262                 struct mlx5_priv *priv = dev->data->dev_private;
1263                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1264                 uint32_t shl_c0;
1265
1266                 MLX5_ASSERT(msk_c0);
1267 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1268                 shl_c0 = rte_bsf32(msk_c0);
1269 #else
1270                 shl_c0 = sizeof(msk_c0) * CHAR_BIT - rte_fls_u32(msk_c0);
1271 #endif
1272                 mask <<= shl_c0;
1273                 data <<= shl_c0;
1274                 MLX5_ASSERT(!(~msk_c0 & rte_cpu_to_be_32(mask)));
1275         }
1276         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1277         /* The routine expects parameters in memory as big-endian ones. */
1278         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1279                                              MLX5_MODIFICATION_TYPE_SET, error);
1280 }
1281
1282 /**
1283  * Convert modify-header set IPv4 DSCP action to DV specification.
1284  *
1285  * @param[in,out] resource
1286  *   Pointer to the modify-header resource.
1287  * @param[in] action
1288  *   Pointer to action specification.
1289  * @param[out] error
1290  *   Pointer to the error structure.
1291  *
1292  * @return
1293  *   0 on success, a negative errno value otherwise and rte_errno is set.
1294  */
1295 static int
1296 flow_dv_convert_action_modify_ipv4_dscp
1297                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1298                          const struct rte_flow_action *action,
1299                          struct rte_flow_error *error)
1300 {
1301         const struct rte_flow_action_set_dscp *conf =
1302                 (const struct rte_flow_action_set_dscp *)(action->conf);
1303         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1304         struct rte_flow_item_ipv4 ipv4;
1305         struct rte_flow_item_ipv4 ipv4_mask;
1306
1307         memset(&ipv4, 0, sizeof(ipv4));
1308         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1309         ipv4.hdr.type_of_service = conf->dscp;
1310         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1311         item.spec = &ipv4;
1312         item.mask = &ipv4_mask;
1313         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1314                                              MLX5_MODIFICATION_TYPE_SET, error);
1315 }
1316
1317 /**
1318  * Convert modify-header set IPv6 DSCP action to DV specification.
1319  *
1320  * @param[in,out] resource
1321  *   Pointer to the modify-header resource.
1322  * @param[in] action
1323  *   Pointer to action specification.
1324  * @param[out] error
1325  *   Pointer to the error structure.
1326  *
1327  * @return
1328  *   0 on success, a negative errno value otherwise and rte_errno is set.
1329  */
1330 static int
1331 flow_dv_convert_action_modify_ipv6_dscp
1332                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1333                          const struct rte_flow_action *action,
1334                          struct rte_flow_error *error)
1335 {
1336         const struct rte_flow_action_set_dscp *conf =
1337                 (const struct rte_flow_action_set_dscp *)(action->conf);
1338         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1339         struct rte_flow_item_ipv6 ipv6;
1340         struct rte_flow_item_ipv6 ipv6_mask;
1341
1342         memset(&ipv6, 0, sizeof(ipv6));
1343         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1344         /*
1345          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1346          * rdma-core only accept the DSCP bits byte aligned start from
1347          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1348          * bits in IPv6 case as rdma-core requires byte aligned value.
1349          */
1350         ipv6.hdr.vtc_flow = conf->dscp;
1351         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1352         item.spec = &ipv6;
1353         item.mask = &ipv6_mask;
1354         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1355                                              MLX5_MODIFICATION_TYPE_SET, error);
1356 }
1357
1358 static int
1359 mlx5_flow_item_field_width(enum rte_flow_field_id field)
1360 {
1361         switch (field) {
1362         case RTE_FLOW_FIELD_START:
1363                 return 32;
1364         case RTE_FLOW_FIELD_MAC_DST:
1365         case RTE_FLOW_FIELD_MAC_SRC:
1366                 return 48;
1367         case RTE_FLOW_FIELD_VLAN_TYPE:
1368                 return 16;
1369         case RTE_FLOW_FIELD_VLAN_ID:
1370                 return 12;
1371         case RTE_FLOW_FIELD_MAC_TYPE:
1372                 return 16;
1373         case RTE_FLOW_FIELD_IPV4_DSCP:
1374                 return 6;
1375         case RTE_FLOW_FIELD_IPV4_TTL:
1376                 return 8;
1377         case RTE_FLOW_FIELD_IPV4_SRC:
1378         case RTE_FLOW_FIELD_IPV4_DST:
1379                 return 32;
1380         case RTE_FLOW_FIELD_IPV6_DSCP:
1381                 return 6;
1382         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1383                 return 8;
1384         case RTE_FLOW_FIELD_IPV6_SRC:
1385         case RTE_FLOW_FIELD_IPV6_DST:
1386                 return 128;
1387         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1388         case RTE_FLOW_FIELD_TCP_PORT_DST:
1389                 return 16;
1390         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1391         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1392                 return 32;
1393         case RTE_FLOW_FIELD_TCP_FLAGS:
1394                 return 9;
1395         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1396         case RTE_FLOW_FIELD_UDP_PORT_DST:
1397                 return 16;
1398         case RTE_FLOW_FIELD_VXLAN_VNI:
1399         case RTE_FLOW_FIELD_GENEVE_VNI:
1400                 return 24;
1401         case RTE_FLOW_FIELD_GTP_TEID:
1402         case RTE_FLOW_FIELD_TAG:
1403                 return 32;
1404         case RTE_FLOW_FIELD_MARK:
1405                 return 24;
1406         case RTE_FLOW_FIELD_META:
1407                 return 32;
1408         case RTE_FLOW_FIELD_POINTER:
1409         case RTE_FLOW_FIELD_VALUE:
1410                 return 64;
1411         default:
1412                 MLX5_ASSERT(false);
1413         }
1414         return 0;
1415 }
1416
1417 static void
1418 mlx5_flow_field_id_to_modify_info
1419                 (const struct rte_flow_action_modify_data *data,
1420                  struct field_modify_info *info,
1421                  uint32_t *mask, uint32_t *value,
1422                  uint32_t width, uint32_t dst_width,
1423                  struct rte_eth_dev *dev,
1424                  const struct rte_flow_attr *attr,
1425                  struct rte_flow_error *error)
1426 {
1427         uint32_t idx = 0;
1428         uint64_t val = 0;
1429         switch (data->field) {
1430         case RTE_FLOW_FIELD_START:
1431                 /* not supported yet */
1432                 MLX5_ASSERT(false);
1433                 break;
1434         case RTE_FLOW_FIELD_MAC_DST:
1435                 if (mask) {
1436                         if (data->offset < 32) {
1437                                 info[idx] = (struct field_modify_info){4, 0,
1438                                                 MLX5_MODI_OUT_DMAC_47_16};
1439                                 if (width < 32) {
1440                                         mask[idx] =
1441                                                 rte_cpu_to_be_32(0xffffffff >>
1442                                                                  (32 - width));
1443                                         width = 0;
1444                                 } else {
1445                                         mask[idx] = RTE_BE32(0xffffffff);
1446                                         width -= 32;
1447                                 }
1448                                 if (!width)
1449                                         break;
1450                                 ++idx;
1451                         }
1452                         info[idx] = (struct field_modify_info){2, 4 * idx,
1453                                                 MLX5_MODI_OUT_DMAC_15_0};
1454                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1455                 } else {
1456                         if (data->offset < 32)
1457                                 info[idx++] = (struct field_modify_info){4, 0,
1458                                                 MLX5_MODI_OUT_DMAC_47_16};
1459                         info[idx] = (struct field_modify_info){2, 0,
1460                                                 MLX5_MODI_OUT_DMAC_15_0};
1461                 }
1462                 break;
1463         case RTE_FLOW_FIELD_MAC_SRC:
1464                 if (mask) {
1465                         if (data->offset < 32) {
1466                                 info[idx] = (struct field_modify_info){4, 0,
1467                                                 MLX5_MODI_OUT_SMAC_47_16};
1468                                 if (width < 32) {
1469                                         mask[idx] =
1470                                                 rte_cpu_to_be_32(0xffffffff >>
1471                                                                 (32 - width));
1472                                         width = 0;
1473                                 } else {
1474                                         mask[idx] = RTE_BE32(0xffffffff);
1475                                         width -= 32;
1476                                 }
1477                                 if (!width)
1478                                         break;
1479                                 ++idx;
1480                         }
1481                         info[idx] = (struct field_modify_info){2, 4 * idx,
1482                                                 MLX5_MODI_OUT_SMAC_15_0};
1483                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1484                 } else {
1485                         if (data->offset < 32)
1486                                 info[idx++] = (struct field_modify_info){4, 0,
1487                                                 MLX5_MODI_OUT_SMAC_47_16};
1488                         info[idx] = (struct field_modify_info){2, 0,
1489                                                 MLX5_MODI_OUT_SMAC_15_0};
1490                 }
1491                 break;
1492         case RTE_FLOW_FIELD_VLAN_TYPE:
1493                 /* not supported yet */
1494                 break;
1495         case RTE_FLOW_FIELD_VLAN_ID:
1496                 info[idx] = (struct field_modify_info){2, 0,
1497                                         MLX5_MODI_OUT_FIRST_VID};
1498                 if (mask)
1499                         mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1500                 break;
1501         case RTE_FLOW_FIELD_MAC_TYPE:
1502                 info[idx] = (struct field_modify_info){2, 0,
1503                                         MLX5_MODI_OUT_ETHERTYPE};
1504                 if (mask)
1505                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1506                 break;
1507         case RTE_FLOW_FIELD_IPV4_DSCP:
1508                 info[idx] = (struct field_modify_info){1, 0,
1509                                         MLX5_MODI_OUT_IP_DSCP};
1510                 if (mask)
1511                         mask[idx] = 0x3f >> (6 - width);
1512                 break;
1513         case RTE_FLOW_FIELD_IPV4_TTL:
1514                 info[idx] = (struct field_modify_info){1, 0,
1515                                         MLX5_MODI_OUT_IPV4_TTL};
1516                 if (mask)
1517                         mask[idx] = 0xff >> (8 - width);
1518                 break;
1519         case RTE_FLOW_FIELD_IPV4_SRC:
1520                 info[idx] = (struct field_modify_info){4, 0,
1521                                         MLX5_MODI_OUT_SIPV4};
1522                 if (mask)
1523                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1524                                                      (32 - width));
1525                 break;
1526         case RTE_FLOW_FIELD_IPV4_DST:
1527                 info[idx] = (struct field_modify_info){4, 0,
1528                                         MLX5_MODI_OUT_DIPV4};
1529                 if (mask)
1530                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1531                                                      (32 - width));
1532                 break;
1533         case RTE_FLOW_FIELD_IPV6_DSCP:
1534                 info[idx] = (struct field_modify_info){1, 0,
1535                                         MLX5_MODI_OUT_IP_DSCP};
1536                 if (mask)
1537                         mask[idx] = 0x3f >> (6 - width);
1538                 break;
1539         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1540                 info[idx] = (struct field_modify_info){1, 0,
1541                                         MLX5_MODI_OUT_IPV6_HOPLIMIT};
1542                 if (mask)
1543                         mask[idx] = 0xff >> (8 - width);
1544                 break;
1545         case RTE_FLOW_FIELD_IPV6_SRC:
1546                 if (mask) {
1547                         if (data->offset < 32) {
1548                                 info[idx] = (struct field_modify_info){4,
1549                                                 4 * idx,
1550                                                 MLX5_MODI_OUT_SIPV6_31_0};
1551                                 if (width < 32) {
1552                                         mask[idx] =
1553                                                 rte_cpu_to_be_32(0xffffffff >>
1554                                                                  (32 - width));
1555                                         width = 0;
1556                                 } else {
1557                                         mask[idx] = RTE_BE32(0xffffffff);
1558                                         width -= 32;
1559                                 }
1560                                 if (!width)
1561                                         break;
1562                                 ++idx;
1563                         }
1564                         if (data->offset < 64) {
1565                                 info[idx] = (struct field_modify_info){4,
1566                                                 4 * idx,
1567                                                 MLX5_MODI_OUT_SIPV6_63_32};
1568                                 if (width < 32) {
1569                                         mask[idx] =
1570                                                 rte_cpu_to_be_32(0xffffffff >>
1571                                                                  (32 - width));
1572                                         width = 0;
1573                                 } else {
1574                                         mask[idx] = RTE_BE32(0xffffffff);
1575                                         width -= 32;
1576                                 }
1577                                 if (!width)
1578                                         break;
1579                                 ++idx;
1580                         }
1581                         if (data->offset < 96) {
1582                                 info[idx] = (struct field_modify_info){4,
1583                                                 4 * idx,
1584                                                 MLX5_MODI_OUT_SIPV6_95_64};
1585                                 if (width < 32) {
1586                                         mask[idx] =
1587                                                 rte_cpu_to_be_32(0xffffffff >>
1588                                                                  (32 - width));
1589                                         width = 0;
1590                                 } else {
1591                                         mask[idx] = RTE_BE32(0xffffffff);
1592                                         width -= 32;
1593                                 }
1594                                 if (!width)
1595                                         break;
1596                                 ++idx;
1597                         }
1598                         info[idx] = (struct field_modify_info){4, 4 * idx,
1599                                                 MLX5_MODI_OUT_SIPV6_127_96};
1600                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1601                                                      (32 - width));
1602                 } else {
1603                         if (data->offset < 32)
1604                                 info[idx++] = (struct field_modify_info){4, 0,
1605                                                 MLX5_MODI_OUT_SIPV6_31_0};
1606                         if (data->offset < 64)
1607                                 info[idx++] = (struct field_modify_info){4, 0,
1608                                                 MLX5_MODI_OUT_SIPV6_63_32};
1609                         if (data->offset < 96)
1610                                 info[idx++] = (struct field_modify_info){4, 0,
1611                                                 MLX5_MODI_OUT_SIPV6_95_64};
1612                         if (data->offset < 128)
1613                                 info[idx++] = (struct field_modify_info){4, 0,
1614                                                 MLX5_MODI_OUT_SIPV6_127_96};
1615                 }
1616                 break;
1617         case RTE_FLOW_FIELD_IPV6_DST:
1618                 if (mask) {
1619                         if (data->offset < 32) {
1620                                 info[idx] = (struct field_modify_info){4,
1621                                                 4 * idx,
1622                                                 MLX5_MODI_OUT_DIPV6_31_0};
1623                                 if (width < 32) {
1624                                         mask[idx] =
1625                                                 rte_cpu_to_be_32(0xffffffff >>
1626                                                                  (32 - width));
1627                                         width = 0;
1628                                 } else {
1629                                         mask[idx] = RTE_BE32(0xffffffff);
1630                                         width -= 32;
1631                                 }
1632                                 if (!width)
1633                                         break;
1634                                 ++idx;
1635                         }
1636                         if (data->offset < 64) {
1637                                 info[idx] = (struct field_modify_info){4,
1638                                                 4 * idx,
1639                                                 MLX5_MODI_OUT_DIPV6_63_32};
1640                                 if (width < 32) {
1641                                         mask[idx] =
1642                                                 rte_cpu_to_be_32(0xffffffff >>
1643                                                                  (32 - width));
1644                                         width = 0;
1645                                 } else {
1646                                         mask[idx] = RTE_BE32(0xffffffff);
1647                                         width -= 32;
1648                                 }
1649                                 if (!width)
1650                                         break;
1651                                 ++idx;
1652                         }
1653                         if (data->offset < 96) {
1654                                 info[idx] = (struct field_modify_info){4,
1655                                                 4 * idx,
1656                                                 MLX5_MODI_OUT_DIPV6_95_64};
1657                                 if (width < 32) {
1658                                         mask[idx] =
1659                                                 rte_cpu_to_be_32(0xffffffff >>
1660                                                                  (32 - width));
1661                                         width = 0;
1662                                 } else {
1663                                         mask[idx] = RTE_BE32(0xffffffff);
1664                                         width -= 32;
1665                                 }
1666                                 if (!width)
1667                                         break;
1668                                 ++idx;
1669                         }
1670                         info[idx] = (struct field_modify_info){4, 4 * idx,
1671                                                 MLX5_MODI_OUT_DIPV6_127_96};
1672                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1673                                                      (32 - width));
1674                 } else {
1675                         if (data->offset < 32)
1676                                 info[idx++] = (struct field_modify_info){4, 0,
1677                                                 MLX5_MODI_OUT_DIPV6_31_0};
1678                         if (data->offset < 64)
1679                                 info[idx++] = (struct field_modify_info){4, 0,
1680                                                 MLX5_MODI_OUT_DIPV6_63_32};
1681                         if (data->offset < 96)
1682                                 info[idx++] = (struct field_modify_info){4, 0,
1683                                                 MLX5_MODI_OUT_DIPV6_95_64};
1684                         if (data->offset < 128)
1685                                 info[idx++] = (struct field_modify_info){4, 0,
1686                                                 MLX5_MODI_OUT_DIPV6_127_96};
1687                 }
1688                 break;
1689         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1690                 info[idx] = (struct field_modify_info){2, 0,
1691                                         MLX5_MODI_OUT_TCP_SPORT};
1692                 if (mask)
1693                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1694                 break;
1695         case RTE_FLOW_FIELD_TCP_PORT_DST:
1696                 info[idx] = (struct field_modify_info){2, 0,
1697                                         MLX5_MODI_OUT_TCP_DPORT};
1698                 if (mask)
1699                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1700                 break;
1701         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1702                 info[idx] = (struct field_modify_info){4, 0,
1703                                         MLX5_MODI_OUT_TCP_SEQ_NUM};
1704                 if (mask)
1705                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1706                                                      (32 - width));
1707                 break;
1708         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1709                 info[idx] = (struct field_modify_info){4, 0,
1710                                         MLX5_MODI_OUT_TCP_ACK_NUM};
1711                 if (mask)
1712                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1713                                                      (32 - width));
1714                 break;
1715         case RTE_FLOW_FIELD_TCP_FLAGS:
1716                 info[idx] = (struct field_modify_info){2, 0,
1717                                         MLX5_MODI_OUT_TCP_FLAGS};
1718                 if (mask)
1719                         mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1720                 break;
1721         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1722                 info[idx] = (struct field_modify_info){2, 0,
1723                                         MLX5_MODI_OUT_UDP_SPORT};
1724                 if (mask)
1725                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1726                 break;
1727         case RTE_FLOW_FIELD_UDP_PORT_DST:
1728                 info[idx] = (struct field_modify_info){2, 0,
1729                                         MLX5_MODI_OUT_UDP_DPORT};
1730                 if (mask)
1731                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1732                 break;
1733         case RTE_FLOW_FIELD_VXLAN_VNI:
1734                 /* not supported yet */
1735                 break;
1736         case RTE_FLOW_FIELD_GENEVE_VNI:
1737                 /* not supported yet*/
1738                 break;
1739         case RTE_FLOW_FIELD_GTP_TEID:
1740                 info[idx] = (struct field_modify_info){4, 0,
1741                                         MLX5_MODI_GTP_TEID};
1742                 if (mask)
1743                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1744                                                      (32 - width));
1745                 break;
1746         case RTE_FLOW_FIELD_TAG:
1747                 {
1748                         int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1749                                                    data->level, error);
1750                         if (reg < 0)
1751                                 return;
1752                         MLX5_ASSERT(reg != REG_NON);
1753                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1754                         info[idx] = (struct field_modify_info){4, 0,
1755                                                 reg_to_field[reg]};
1756                         if (mask)
1757                                 mask[idx] =
1758                                         rte_cpu_to_be_32(0xffffffff >>
1759                                                          (32 - width));
1760                 }
1761                 break;
1762         case RTE_FLOW_FIELD_MARK:
1763                 {
1764                         int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1765                                                        0, error);
1766                         if (reg < 0)
1767                                 return;
1768                         MLX5_ASSERT(reg != REG_NON);
1769                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1770                         info[idx] = (struct field_modify_info){4, 0,
1771                                                 reg_to_field[reg]};
1772                         if (mask)
1773                                 mask[idx] =
1774                                         rte_cpu_to_be_32(0xffffffff >>
1775                                                          (32 - width));
1776                 }
1777                 break;
1778         case RTE_FLOW_FIELD_META:
1779                 {
1780                         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1781                         if (reg < 0)
1782                                 return;
1783                         MLX5_ASSERT(reg != REG_NON);
1784                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1785                         info[idx] = (struct field_modify_info){4, 0,
1786                                                 reg_to_field[reg]};
1787                         if (mask)
1788                                 mask[idx] =
1789                                         rte_cpu_to_be_32(0xffffffff >>
1790                                                          (32 - width));
1791                 }
1792                 break;
1793         case RTE_FLOW_FIELD_POINTER:
1794         case RTE_FLOW_FIELD_VALUE:
1795                 if (data->field == RTE_FLOW_FIELD_POINTER)
1796                         memcpy(&val, (void *)(uintptr_t)data->value,
1797                                sizeof(uint64_t));
1798                 else
1799                         val = data->value;
1800                 for (idx = 0; idx < MLX5_ACT_MAX_MOD_FIELDS; idx++) {
1801                         if (mask[idx]) {
1802                                 if (dst_width > 16) {
1803                                         value[idx] = rte_cpu_to_be_32(val);
1804                                         val >>= 32;
1805                                 } else if (dst_width > 8) {
1806                                         value[idx] = rte_cpu_to_be_16(val);
1807                                         val >>= 16;
1808                                 } else {
1809                                         value[idx] = (uint8_t)val;
1810                                         val >>= 8;
1811                                 }
1812                                 if (!val)
1813                                         break;
1814                         }
1815                 }
1816                 break;
1817         default:
1818                 MLX5_ASSERT(false);
1819                 break;
1820         }
1821 }
1822
1823 /**
1824  * Convert modify_field action to DV specification.
1825  *
1826  * @param[in] dev
1827  *   Pointer to the rte_eth_dev structure.
1828  * @param[in,out] resource
1829  *   Pointer to the modify-header resource.
1830  * @param[in] action
1831  *   Pointer to action specification.
1832  * @param[in] attr
1833  *   Attributes of flow that includes this item.
1834  * @param[out] error
1835  *   Pointer to the error structure.
1836  *
1837  * @return
1838  *   0 on success, a negative errno value otherwise and rte_errno is set.
1839  */
1840 static int
1841 flow_dv_convert_action_modify_field
1842                         (struct rte_eth_dev *dev,
1843                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1844                          const struct rte_flow_action *action,
1845                          const struct rte_flow_attr *attr,
1846                          struct rte_flow_error *error)
1847 {
1848         const struct rte_flow_action_modify_field *conf =
1849                 (const struct rte_flow_action_modify_field *)(action->conf);
1850         struct rte_flow_item item;
1851         struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1852                                                                 {0, 0, 0} };
1853         struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1854                                                                 {0, 0, 0} };
1855         uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1856         uint32_t value[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1857         uint32_t type;
1858         uint32_t dst_width = mlx5_flow_item_field_width(conf->dst.field);
1859
1860         if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1861                 conf->src.field == RTE_FLOW_FIELD_VALUE) {
1862                 type = MLX5_MODIFICATION_TYPE_SET;
1863                 /** For SET fill the destination field (field) first. */
1864                 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1865                         value, conf->width, dst_width, dev, attr, error);
1866                 /** Then copy immediate value from source as per mask. */
1867                 mlx5_flow_field_id_to_modify_info(&conf->src, dcopy, mask,
1868                         value, conf->width, dst_width, dev, attr, error);
1869                 item.spec = &value;
1870         } else {
1871                 type = MLX5_MODIFICATION_TYPE_COPY;
1872                 /** For COPY fill the destination field (dcopy) without mask. */
1873                 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1874                         value, conf->width, dst_width, dev, attr, error);
1875                 /** Then construct the source field (field) with mask. */
1876                 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1877                         value, conf->width, dst_width, dev, attr, error);
1878         }
1879         item.mask = &mask;
1880         return flow_dv_convert_modify_action(&item,
1881                         field, dcopy, resource, type, error);
1882 }
1883
1884 /**
1885  * Validate MARK item.
1886  *
1887  * @param[in] dev
1888  *   Pointer to the rte_eth_dev structure.
1889  * @param[in] item
1890  *   Item specification.
1891  * @param[in] attr
1892  *   Attributes of flow that includes this item.
1893  * @param[out] error
1894  *   Pointer to error structure.
1895  *
1896  * @return
1897  *   0 on success, a negative errno value otherwise and rte_errno is set.
1898  */
1899 static int
1900 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1901                            const struct rte_flow_item *item,
1902                            const struct rte_flow_attr *attr __rte_unused,
1903                            struct rte_flow_error *error)
1904 {
1905         struct mlx5_priv *priv = dev->data->dev_private;
1906         struct mlx5_dev_config *config = &priv->config;
1907         const struct rte_flow_item_mark *spec = item->spec;
1908         const struct rte_flow_item_mark *mask = item->mask;
1909         const struct rte_flow_item_mark nic_mask = {
1910                 .id = priv->sh->dv_mark_mask,
1911         };
1912         int ret;
1913
1914         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1915                 return rte_flow_error_set(error, ENOTSUP,
1916                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1917                                           "extended metadata feature"
1918                                           " isn't enabled");
1919         if (!mlx5_flow_ext_mreg_supported(dev))
1920                 return rte_flow_error_set(error, ENOTSUP,
1921                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1922                                           "extended metadata register"
1923                                           " isn't supported");
1924         if (!nic_mask.id)
1925                 return rte_flow_error_set(error, ENOTSUP,
1926                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1927                                           "extended metadata register"
1928                                           " isn't available");
1929         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1930         if (ret < 0)
1931                 return ret;
1932         if (!spec)
1933                 return rte_flow_error_set(error, EINVAL,
1934                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1935                                           item->spec,
1936                                           "data cannot be empty");
1937         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1938                 return rte_flow_error_set(error, EINVAL,
1939                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1940                                           &spec->id,
1941                                           "mark id exceeds the limit");
1942         if (!mask)
1943                 mask = &nic_mask;
1944         if (!mask->id)
1945                 return rte_flow_error_set(error, EINVAL,
1946                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1947                                         "mask cannot be zero");
1948
1949         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1950                                         (const uint8_t *)&nic_mask,
1951                                         sizeof(struct rte_flow_item_mark),
1952                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1953         if (ret < 0)
1954                 return ret;
1955         return 0;
1956 }
1957
1958 /**
1959  * Validate META item.
1960  *
1961  * @param[in] dev
1962  *   Pointer to the rte_eth_dev structure.
1963  * @param[in] item
1964  *   Item specification.
1965  * @param[in] attr
1966  *   Attributes of flow that includes this item.
1967  * @param[out] error
1968  *   Pointer to error structure.
1969  *
1970  * @return
1971  *   0 on success, a negative errno value otherwise and rte_errno is set.
1972  */
1973 static int
1974 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1975                            const struct rte_flow_item *item,
1976                            const struct rte_flow_attr *attr,
1977                            struct rte_flow_error *error)
1978 {
1979         struct mlx5_priv *priv = dev->data->dev_private;
1980         struct mlx5_dev_config *config = &priv->config;
1981         const struct rte_flow_item_meta *spec = item->spec;
1982         const struct rte_flow_item_meta *mask = item->mask;
1983         struct rte_flow_item_meta nic_mask = {
1984                 .data = UINT32_MAX
1985         };
1986         int reg;
1987         int ret;
1988
1989         if (!spec)
1990                 return rte_flow_error_set(error, EINVAL,
1991                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1992                                           item->spec,
1993                                           "data cannot be empty");
1994         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
1995                 if (!mlx5_flow_ext_mreg_supported(dev))
1996                         return rte_flow_error_set(error, ENOTSUP,
1997                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1998                                           "extended metadata register"
1999                                           " isn't supported");
2000                 reg = flow_dv_get_metadata_reg(dev, attr, error);
2001                 if (reg < 0)
2002                         return reg;
2003                 if (reg == REG_NON)
2004                         return rte_flow_error_set(error, ENOTSUP,
2005                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2006                                         "unavalable extended metadata register");
2007                 if (reg == REG_B)
2008                         return rte_flow_error_set(error, ENOTSUP,
2009                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2010                                           "match on reg_b "
2011                                           "isn't supported");
2012                 if (reg != REG_A)
2013                         nic_mask.data = priv->sh->dv_meta_mask;
2014         } else {
2015                 if (attr->transfer)
2016                         return rte_flow_error_set(error, ENOTSUP,
2017                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2018                                         "extended metadata feature "
2019                                         "should be enabled when "
2020                                         "meta item is requested "
2021                                         "with e-switch mode ");
2022                 if (attr->ingress)
2023                         return rte_flow_error_set(error, ENOTSUP,
2024                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2025                                         "match on metadata for ingress "
2026                                         "is not supported in legacy "
2027                                         "metadata mode");
2028         }
2029         if (!mask)
2030                 mask = &rte_flow_item_meta_mask;
2031         if (!mask->data)
2032                 return rte_flow_error_set(error, EINVAL,
2033                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2034                                         "mask cannot be zero");
2035
2036         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2037                                         (const uint8_t *)&nic_mask,
2038                                         sizeof(struct rte_flow_item_meta),
2039                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2040         return ret;
2041 }
2042
2043 /**
2044  * Validate TAG item.
2045  *
2046  * @param[in] dev
2047  *   Pointer to the rte_eth_dev structure.
2048  * @param[in] item
2049  *   Item specification.
2050  * @param[in] attr
2051  *   Attributes of flow that includes this item.
2052  * @param[out] error
2053  *   Pointer to error structure.
2054  *
2055  * @return
2056  *   0 on success, a negative errno value otherwise and rte_errno is set.
2057  */
2058 static int
2059 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2060                           const struct rte_flow_item *item,
2061                           const struct rte_flow_attr *attr __rte_unused,
2062                           struct rte_flow_error *error)
2063 {
2064         const struct rte_flow_item_tag *spec = item->spec;
2065         const struct rte_flow_item_tag *mask = item->mask;
2066         const struct rte_flow_item_tag nic_mask = {
2067                 .data = RTE_BE32(UINT32_MAX),
2068                 .index = 0xff,
2069         };
2070         int ret;
2071
2072         if (!mlx5_flow_ext_mreg_supported(dev))
2073                 return rte_flow_error_set(error, ENOTSUP,
2074                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2075                                           "extensive metadata register"
2076                                           " isn't supported");
2077         if (!spec)
2078                 return rte_flow_error_set(error, EINVAL,
2079                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2080                                           item->spec,
2081                                           "data cannot be empty");
2082         if (!mask)
2083                 mask = &rte_flow_item_tag_mask;
2084         if (!mask->data)
2085                 return rte_flow_error_set(error, EINVAL,
2086                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2087                                         "mask cannot be zero");
2088
2089         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2090                                         (const uint8_t *)&nic_mask,
2091                                         sizeof(struct rte_flow_item_tag),
2092                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2093         if (ret < 0)
2094                 return ret;
2095         if (mask->index != 0xff)
2096                 return rte_flow_error_set(error, EINVAL,
2097                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2098                                           "partial mask for tag index"
2099                                           " is not supported");
2100         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2101         if (ret < 0)
2102                 return ret;
2103         MLX5_ASSERT(ret != REG_NON);
2104         return 0;
2105 }
2106
2107 /**
2108  * Validate vport item.
2109  *
2110  * @param[in] dev
2111  *   Pointer to the rte_eth_dev structure.
2112  * @param[in] item
2113  *   Item specification.
2114  * @param[in] attr
2115  *   Attributes of flow that includes this item.
2116  * @param[in] item_flags
2117  *   Bit-fields that holds the items detected until now.
2118  * @param[out] error
2119  *   Pointer to error structure.
2120  *
2121  * @return
2122  *   0 on success, a negative errno value otherwise and rte_errno is set.
2123  */
2124 static int
2125 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2126                               const struct rte_flow_item *item,
2127                               const struct rte_flow_attr *attr,
2128                               uint64_t item_flags,
2129                               struct rte_flow_error *error)
2130 {
2131         const struct rte_flow_item_port_id *spec = item->spec;
2132         const struct rte_flow_item_port_id *mask = item->mask;
2133         const struct rte_flow_item_port_id switch_mask = {
2134                         .id = 0xffffffff,
2135         };
2136         struct mlx5_priv *esw_priv;
2137         struct mlx5_priv *dev_priv;
2138         int ret;
2139
2140         if (!attr->transfer)
2141                 return rte_flow_error_set(error, EINVAL,
2142                                           RTE_FLOW_ERROR_TYPE_ITEM,
2143                                           NULL,
2144                                           "match on port id is valid only"
2145                                           " when transfer flag is enabled");
2146         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2147                 return rte_flow_error_set(error, ENOTSUP,
2148                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2149                                           "multiple source ports are not"
2150                                           " supported");
2151         if (!mask)
2152                 mask = &switch_mask;
2153         if (mask->id != 0xffffffff)
2154                 return rte_flow_error_set(error, ENOTSUP,
2155                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2156                                            mask,
2157                                            "no support for partial mask on"
2158                                            " \"id\" field");
2159         ret = mlx5_flow_item_acceptable
2160                                 (item, (const uint8_t *)mask,
2161                                  (const uint8_t *)&rte_flow_item_port_id_mask,
2162                                  sizeof(struct rte_flow_item_port_id),
2163                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2164         if (ret)
2165                 return ret;
2166         if (!spec)
2167                 return 0;
2168         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2169         if (!esw_priv)
2170                 return rte_flow_error_set(error, rte_errno,
2171                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2172                                           "failed to obtain E-Switch info for"
2173                                           " port");
2174         dev_priv = mlx5_dev_to_eswitch_info(dev);
2175         if (!dev_priv)
2176                 return rte_flow_error_set(error, rte_errno,
2177                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2178                                           NULL,
2179                                           "failed to obtain E-Switch info");
2180         if (esw_priv->domain_id != dev_priv->domain_id)
2181                 return rte_flow_error_set(error, EINVAL,
2182                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2183                                           "cannot match on a port from a"
2184                                           " different E-Switch");
2185         return 0;
2186 }
2187
2188 /**
2189  * Validate VLAN item.
2190  *
2191  * @param[in] item
2192  *   Item specification.
2193  * @param[in] item_flags
2194  *   Bit-fields that holds the items detected until now.
2195  * @param[in] dev
2196  *   Ethernet device flow is being created on.
2197  * @param[out] error
2198  *   Pointer to error structure.
2199  *
2200  * @return
2201  *   0 on success, a negative errno value otherwise and rte_errno is set.
2202  */
2203 static int
2204 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2205                            uint64_t item_flags,
2206                            struct rte_eth_dev *dev,
2207                            struct rte_flow_error *error)
2208 {
2209         const struct rte_flow_item_vlan *mask = item->mask;
2210         const struct rte_flow_item_vlan nic_mask = {
2211                 .tci = RTE_BE16(UINT16_MAX),
2212                 .inner_type = RTE_BE16(UINT16_MAX),
2213                 .has_more_vlan = 1,
2214         };
2215         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2216         int ret;
2217         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2218                                         MLX5_FLOW_LAYER_INNER_L4) :
2219                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2220                                         MLX5_FLOW_LAYER_OUTER_L4);
2221         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2222                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2223
2224         if (item_flags & vlanm)
2225                 return rte_flow_error_set(error, EINVAL,
2226                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2227                                           "multiple VLAN layers not supported");
2228         else if ((item_flags & l34m) != 0)
2229                 return rte_flow_error_set(error, EINVAL,
2230                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2231                                           "VLAN cannot follow L3/L4 layer");
2232         if (!mask)
2233                 mask = &rte_flow_item_vlan_mask;
2234         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2235                                         (const uint8_t *)&nic_mask,
2236                                         sizeof(struct rte_flow_item_vlan),
2237                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2238         if (ret)
2239                 return ret;
2240         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2241                 struct mlx5_priv *priv = dev->data->dev_private;
2242
2243                 if (priv->vmwa_context) {
2244                         /*
2245                          * Non-NULL context means we have a virtual machine
2246                          * and SR-IOV enabled, we have to create VLAN interface
2247                          * to make hypervisor to setup E-Switch vport
2248                          * context correctly. We avoid creating the multiple
2249                          * VLAN interfaces, so we cannot support VLAN tag mask.
2250                          */
2251                         return rte_flow_error_set(error, EINVAL,
2252                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2253                                                   item,
2254                                                   "VLAN tag mask is not"
2255                                                   " supported in virtual"
2256                                                   " environment");
2257                 }
2258         }
2259         return 0;
2260 }
2261
2262 /*
2263  * GTP flags are contained in 1 byte of the format:
2264  * -------------------------------------------
2265  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
2266  * |-----------------------------------------|
2267  * | value | Version | PT | Res | E | S | PN |
2268  * -------------------------------------------
2269  *
2270  * Matching is supported only for GTP flags E, S, PN.
2271  */
2272 #define MLX5_GTP_FLAGS_MASK     0x07
2273
2274 /**
2275  * Validate GTP item.
2276  *
2277  * @param[in] dev
2278  *   Pointer to the rte_eth_dev structure.
2279  * @param[in] item
2280  *   Item specification.
2281  * @param[in] item_flags
2282  *   Bit-fields that holds the items detected until now.
2283  * @param[out] error
2284  *   Pointer to error structure.
2285  *
2286  * @return
2287  *   0 on success, a negative errno value otherwise and rte_errno is set.
2288  */
2289 static int
2290 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2291                           const struct rte_flow_item *item,
2292                           uint64_t item_flags,
2293                           struct rte_flow_error *error)
2294 {
2295         struct mlx5_priv *priv = dev->data->dev_private;
2296         const struct rte_flow_item_gtp *spec = item->spec;
2297         const struct rte_flow_item_gtp *mask = item->mask;
2298         const struct rte_flow_item_gtp nic_mask = {
2299                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2300                 .msg_type = 0xff,
2301                 .teid = RTE_BE32(0xffffffff),
2302         };
2303
2304         if (!priv->config.hca_attr.tunnel_stateless_gtp)
2305                 return rte_flow_error_set(error, ENOTSUP,
2306                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2307                                           "GTP support is not enabled");
2308         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2309                 return rte_flow_error_set(error, ENOTSUP,
2310                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2311                                           "multiple tunnel layers not"
2312                                           " supported");
2313         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2314                 return rte_flow_error_set(error, EINVAL,
2315                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2316                                           "no outer UDP layer found");
2317         if (!mask)
2318                 mask = &rte_flow_item_gtp_mask;
2319         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2320                 return rte_flow_error_set(error, ENOTSUP,
2321                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2322                                           "Match is supported for GTP"
2323                                           " flags only");
2324         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2325                                          (const uint8_t *)&nic_mask,
2326                                          sizeof(struct rte_flow_item_gtp),
2327                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2328 }
2329
2330 /**
2331  * Validate GTP PSC item.
2332  *
2333  * @param[in] item
2334  *   Item specification.
2335  * @param[in] last_item
2336  *   Previous validated item in the pattern items.
2337  * @param[in] gtp_item
2338  *   Previous GTP item specification.
2339  * @param[in] attr
2340  *   Pointer to flow attributes.
2341  * @param[out] error
2342  *   Pointer to error structure.
2343  *
2344  * @return
2345  *   0 on success, a negative errno value otherwise and rte_errno is set.
2346  */
2347 static int
2348 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2349                               uint64_t last_item,
2350                               const struct rte_flow_item *gtp_item,
2351                               const struct rte_flow_attr *attr,
2352                               struct rte_flow_error *error)
2353 {
2354         const struct rte_flow_item_gtp *gtp_spec;
2355         const struct rte_flow_item_gtp *gtp_mask;
2356         const struct rte_flow_item_gtp_psc *spec;
2357         const struct rte_flow_item_gtp_psc *mask;
2358         const struct rte_flow_item_gtp_psc nic_mask = {
2359                 .pdu_type = 0xFF,
2360                 .qfi = 0xFF,
2361         };
2362
2363         if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2364                 return rte_flow_error_set
2365                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2366                          "GTP PSC item must be preceded with GTP item");
2367         gtp_spec = gtp_item->spec;
2368         gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2369         /* GTP spec and E flag is requested to match zero. */
2370         if (gtp_spec &&
2371                 (gtp_mask->v_pt_rsv_flags &
2372                 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2373                 return rte_flow_error_set
2374                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2375                          "GTP E flag must be 1 to match GTP PSC");
2376         /* Check the flow is not created in group zero. */
2377         if (!attr->transfer && !attr->group)
2378                 return rte_flow_error_set
2379                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2380                          "GTP PSC is not supported for group 0");
2381         /* GTP spec is here and E flag is requested to match zero. */
2382         if (!item->spec)
2383                 return 0;
2384         spec = item->spec;
2385         mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2386         if (spec->pdu_type > MLX5_GTP_EXT_MAX_PDU_TYPE)
2387                 return rte_flow_error_set
2388                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2389                          "PDU type should be smaller than 16");
2390         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2391                                          (const uint8_t *)&nic_mask,
2392                                          sizeof(struct rte_flow_item_gtp_psc),
2393                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2394 }
2395
2396 /**
2397  * Validate IPV4 item.
2398  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2399  * add specific validation of fragment_offset field,
2400  *
2401  * @param[in] item
2402  *   Item specification.
2403  * @param[in] item_flags
2404  *   Bit-fields that holds the items detected until now.
2405  * @param[out] error
2406  *   Pointer to error structure.
2407  *
2408  * @return
2409  *   0 on success, a negative errno value otherwise and rte_errno is set.
2410  */
2411 static int
2412 flow_dv_validate_item_ipv4(const struct rte_flow_item *item,
2413                            uint64_t item_flags,
2414                            uint64_t last_item,
2415                            uint16_t ether_type,
2416                            struct rte_flow_error *error)
2417 {
2418         int ret;
2419         const struct rte_flow_item_ipv4 *spec = item->spec;
2420         const struct rte_flow_item_ipv4 *last = item->last;
2421         const struct rte_flow_item_ipv4 *mask = item->mask;
2422         rte_be16_t fragment_offset_spec = 0;
2423         rte_be16_t fragment_offset_last = 0;
2424         const struct rte_flow_item_ipv4 nic_ipv4_mask = {
2425                 .hdr = {
2426                         .src_addr = RTE_BE32(0xffffffff),
2427                         .dst_addr = RTE_BE32(0xffffffff),
2428                         .type_of_service = 0xff,
2429                         .fragment_offset = RTE_BE16(0xffff),
2430                         .next_proto_id = 0xff,
2431                         .time_to_live = 0xff,
2432                 },
2433         };
2434
2435         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2436                                            ether_type, &nic_ipv4_mask,
2437                                            MLX5_ITEM_RANGE_ACCEPTED, error);
2438         if (ret < 0)
2439                 return ret;
2440         if (spec && mask)
2441                 fragment_offset_spec = spec->hdr.fragment_offset &
2442                                        mask->hdr.fragment_offset;
2443         if (!fragment_offset_spec)
2444                 return 0;
2445         /*
2446          * spec and mask are valid, enforce using full mask to make sure the
2447          * complete value is used correctly.
2448          */
2449         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2450                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2451                 return rte_flow_error_set(error, EINVAL,
2452                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2453                                           item, "must use full mask for"
2454                                           " fragment_offset");
2455         /*
2456          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2457          * indicating this is 1st fragment of fragmented packet.
2458          * This is not yet supported in MLX5, return appropriate error message.
2459          */
2460         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2461                 return rte_flow_error_set(error, ENOTSUP,
2462                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2463                                           "match on first fragment not "
2464                                           "supported");
2465         if (fragment_offset_spec && !last)
2466                 return rte_flow_error_set(error, ENOTSUP,
2467                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2468                                           "specified value not supported");
2469         /* spec and last are valid, validate the specified range. */
2470         fragment_offset_last = last->hdr.fragment_offset &
2471                                mask->hdr.fragment_offset;
2472         /*
2473          * Match on fragment_offset spec 0x2001 and last 0x3fff
2474          * means MF is 1 and frag-offset is > 0.
2475          * This packet is fragment 2nd and onward, excluding last.
2476          * This is not yet supported in MLX5, return appropriate
2477          * error message.
2478          */
2479         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2480             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2481                 return rte_flow_error_set(error, ENOTSUP,
2482                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2483                                           last, "match on following "
2484                                           "fragments not supported");
2485         /*
2486          * Match on fragment_offset spec 0x0001 and last 0x1fff
2487          * means MF is 0 and frag-offset is > 0.
2488          * This packet is last fragment of fragmented packet.
2489          * This is not yet supported in MLX5, return appropriate
2490          * error message.
2491          */
2492         if (fragment_offset_spec == RTE_BE16(1) &&
2493             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2494                 return rte_flow_error_set(error, ENOTSUP,
2495                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2496                                           last, "match on last "
2497                                           "fragment not supported");
2498         /*
2499          * Match on fragment_offset spec 0x0001 and last 0x3fff
2500          * means MF and/or frag-offset is not 0.
2501          * This is a fragmented packet.
2502          * Other range values are invalid and rejected.
2503          */
2504         if (!(fragment_offset_spec == RTE_BE16(1) &&
2505               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2506                 return rte_flow_error_set(error, ENOTSUP,
2507                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2508                                           "specified range not supported");
2509         return 0;
2510 }
2511
2512 /**
2513  * Validate IPV6 fragment extension item.
2514  *
2515  * @param[in] item
2516  *   Item specification.
2517  * @param[in] item_flags
2518  *   Bit-fields that holds the items detected until now.
2519  * @param[out] error
2520  *   Pointer to error structure.
2521  *
2522  * @return
2523  *   0 on success, a negative errno value otherwise and rte_errno is set.
2524  */
2525 static int
2526 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2527                                     uint64_t item_flags,
2528                                     struct rte_flow_error *error)
2529 {
2530         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2531         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2532         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2533         rte_be16_t frag_data_spec = 0;
2534         rte_be16_t frag_data_last = 0;
2535         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2536         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2537                                       MLX5_FLOW_LAYER_OUTER_L4;
2538         int ret = 0;
2539         struct rte_flow_item_ipv6_frag_ext nic_mask = {
2540                 .hdr = {
2541                         .next_header = 0xff,
2542                         .frag_data = RTE_BE16(0xffff),
2543                 },
2544         };
2545
2546         if (item_flags & l4m)
2547                 return rte_flow_error_set(error, EINVAL,
2548                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2549                                           "ipv6 fragment extension item cannot "
2550                                           "follow L4 item.");
2551         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2552             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2553                 return rte_flow_error_set(error, EINVAL,
2554                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2555                                           "ipv6 fragment extension item must "
2556                                           "follow ipv6 item");
2557         if (spec && mask)
2558                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2559         if (!frag_data_spec)
2560                 return 0;
2561         /*
2562          * spec and mask are valid, enforce using full mask to make sure the
2563          * complete value is used correctly.
2564          */
2565         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2566                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2567                 return rte_flow_error_set(error, EINVAL,
2568                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2569                                           item, "must use full mask for"
2570                                           " frag_data");
2571         /*
2572          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2573          * This is 1st fragment of fragmented packet.
2574          */
2575         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2576                 return rte_flow_error_set(error, ENOTSUP,
2577                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2578                                           "match on first fragment not "
2579                                           "supported");
2580         if (frag_data_spec && !last)
2581                 return rte_flow_error_set(error, EINVAL,
2582                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2583                                           "specified value not supported");
2584         ret = mlx5_flow_item_acceptable
2585                                 (item, (const uint8_t *)mask,
2586                                  (const uint8_t *)&nic_mask,
2587                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
2588                                  MLX5_ITEM_RANGE_ACCEPTED, error);
2589         if (ret)
2590                 return ret;
2591         /* spec and last are valid, validate the specified range. */
2592         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2593         /*
2594          * Match on frag_data spec 0x0009 and last 0xfff9
2595          * means M is 1 and frag-offset is > 0.
2596          * This packet is fragment 2nd and onward, excluding last.
2597          * This is not yet supported in MLX5, return appropriate
2598          * error message.
2599          */
2600         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2601                                        RTE_IPV6_EHDR_MF_MASK) &&
2602             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2603                 return rte_flow_error_set(error, ENOTSUP,
2604                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2605                                           last, "match on following "
2606                                           "fragments not supported");
2607         /*
2608          * Match on frag_data spec 0x0008 and last 0xfff8
2609          * means M is 0 and frag-offset is > 0.
2610          * This packet is last fragment of fragmented packet.
2611          * This is not yet supported in MLX5, return appropriate
2612          * error message.
2613          */
2614         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2615             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2616                 return rte_flow_error_set(error, ENOTSUP,
2617                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2618                                           last, "match on last "
2619                                           "fragment not supported");
2620         /* Other range values are invalid and rejected. */
2621         return rte_flow_error_set(error, EINVAL,
2622                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2623                                   "specified range not supported");
2624 }
2625
2626 /**
2627  * Validate the pop VLAN action.
2628  *
2629  * @param[in] dev
2630  *   Pointer to the rte_eth_dev structure.
2631  * @param[in] action_flags
2632  *   Holds the actions detected until now.
2633  * @param[in] action
2634  *   Pointer to the pop vlan action.
2635  * @param[in] item_flags
2636  *   The items found in this flow rule.
2637  * @param[in] attr
2638  *   Pointer to flow attributes.
2639  * @param[out] error
2640  *   Pointer to error structure.
2641  *
2642  * @return
2643  *   0 on success, a negative errno value otherwise and rte_errno is set.
2644  */
2645 static int
2646 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2647                                  uint64_t action_flags,
2648                                  const struct rte_flow_action *action,
2649                                  uint64_t item_flags,
2650                                  const struct rte_flow_attr *attr,
2651                                  struct rte_flow_error *error)
2652 {
2653         const struct mlx5_priv *priv = dev->data->dev_private;
2654
2655         (void)action;
2656         (void)attr;
2657         if (!priv->sh->pop_vlan_action)
2658                 return rte_flow_error_set(error, ENOTSUP,
2659                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2660                                           NULL,
2661                                           "pop vlan action is not supported");
2662         if (attr->egress)
2663                 return rte_flow_error_set(error, ENOTSUP,
2664                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2665                                           NULL,
2666                                           "pop vlan action not supported for "
2667                                           "egress");
2668         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2669                 return rte_flow_error_set(error, ENOTSUP,
2670                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2671                                           "no support for multiple VLAN "
2672                                           "actions");
2673         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2674         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2675             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2676                 return rte_flow_error_set(error, ENOTSUP,
2677                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2678                                           NULL,
2679                                           "cannot pop vlan after decap without "
2680                                           "match on inner vlan in the flow");
2681         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2682         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2683             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2684                 return rte_flow_error_set(error, ENOTSUP,
2685                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2686                                           NULL,
2687                                           "cannot pop vlan without a "
2688                                           "match on (outer) vlan in the flow");
2689         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2690                 return rte_flow_error_set(error, EINVAL,
2691                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2692                                           "wrong action order, port_id should "
2693                                           "be after pop VLAN action");
2694         if (!attr->transfer && priv->representor)
2695                 return rte_flow_error_set(error, ENOTSUP,
2696                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2697                                           "pop vlan action for VF representor "
2698                                           "not supported on NIC table");
2699         return 0;
2700 }
2701
2702 /**
2703  * Get VLAN default info from vlan match info.
2704  *
2705  * @param[in] items
2706  *   the list of item specifications.
2707  * @param[out] vlan
2708  *   pointer VLAN info to fill to.
2709  *
2710  * @return
2711  *   0 on success, a negative errno value otherwise and rte_errno is set.
2712  */
2713 static void
2714 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2715                                   struct rte_vlan_hdr *vlan)
2716 {
2717         const struct rte_flow_item_vlan nic_mask = {
2718                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2719                                 MLX5DV_FLOW_VLAN_VID_MASK),
2720                 .inner_type = RTE_BE16(0xffff),
2721         };
2722
2723         if (items == NULL)
2724                 return;
2725         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2726                 int type = items->type;
2727
2728                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2729                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2730                         break;
2731         }
2732         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2733                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2734                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2735
2736                 /* If VLAN item in pattern doesn't contain data, return here. */
2737                 if (!vlan_v)
2738                         return;
2739                 if (!vlan_m)
2740                         vlan_m = &nic_mask;
2741                 /* Only full match values are accepted */
2742                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2743                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2744                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2745                         vlan->vlan_tci |=
2746                                 rte_be_to_cpu_16(vlan_v->tci &
2747                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2748                 }
2749                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2750                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2751                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2752                         vlan->vlan_tci |=
2753                                 rte_be_to_cpu_16(vlan_v->tci &
2754                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2755                 }
2756                 if (vlan_m->inner_type == nic_mask.inner_type)
2757                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2758                                                            vlan_m->inner_type);
2759         }
2760 }
2761
2762 /**
2763  * Validate the push VLAN action.
2764  *
2765  * @param[in] dev
2766  *   Pointer to the rte_eth_dev structure.
2767  * @param[in] action_flags
2768  *   Holds the actions detected until now.
2769  * @param[in] item_flags
2770  *   The items found in this flow rule.
2771  * @param[in] action
2772  *   Pointer to the action structure.
2773  * @param[in] attr
2774  *   Pointer to flow attributes
2775  * @param[out] error
2776  *   Pointer to error structure.
2777  *
2778  * @return
2779  *   0 on success, a negative errno value otherwise and rte_errno is set.
2780  */
2781 static int
2782 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2783                                   uint64_t action_flags,
2784                                   const struct rte_flow_item_vlan *vlan_m,
2785                                   const struct rte_flow_action *action,
2786                                   const struct rte_flow_attr *attr,
2787                                   struct rte_flow_error *error)
2788 {
2789         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2790         const struct mlx5_priv *priv = dev->data->dev_private;
2791
2792         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2793             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2794                 return rte_flow_error_set(error, EINVAL,
2795                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2796                                           "invalid vlan ethertype");
2797         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2798                 return rte_flow_error_set(error, EINVAL,
2799                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2800                                           "wrong action order, port_id should "
2801                                           "be after push VLAN");
2802         if (!attr->transfer && priv->representor)
2803                 return rte_flow_error_set(error, ENOTSUP,
2804                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2805                                           "push vlan action for VF representor "
2806                                           "not supported on NIC table");
2807         if (vlan_m &&
2808             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2809             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2810                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2811             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2812             !(mlx5_flow_find_action
2813                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2814                 return rte_flow_error_set(error, EINVAL,
2815                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2816                                           "not full match mask on VLAN PCP and "
2817                                           "there is no of_set_vlan_pcp action, "
2818                                           "push VLAN action cannot figure out "
2819                                           "PCP value");
2820         if (vlan_m &&
2821             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2822             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2823                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2824             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2825             !(mlx5_flow_find_action
2826                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2827                 return rte_flow_error_set(error, EINVAL,
2828                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2829                                           "not full match mask on VLAN VID and "
2830                                           "there is no of_set_vlan_vid action, "
2831                                           "push VLAN action cannot figure out "
2832                                           "VID value");
2833         (void)attr;
2834         return 0;
2835 }
2836
2837 /**
2838  * Validate the set VLAN PCP.
2839  *
2840  * @param[in] action_flags
2841  *   Holds the actions detected until now.
2842  * @param[in] actions
2843  *   Pointer to the list of actions remaining in the flow rule.
2844  * @param[out] error
2845  *   Pointer to error structure.
2846  *
2847  * @return
2848  *   0 on success, a negative errno value otherwise and rte_errno is set.
2849  */
2850 static int
2851 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2852                                      const struct rte_flow_action actions[],
2853                                      struct rte_flow_error *error)
2854 {
2855         const struct rte_flow_action *action = actions;
2856         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2857
2858         if (conf->vlan_pcp > 7)
2859                 return rte_flow_error_set(error, EINVAL,
2860                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2861                                           "VLAN PCP value is too big");
2862         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2863                 return rte_flow_error_set(error, ENOTSUP,
2864                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2865                                           "set VLAN PCP action must follow "
2866                                           "the push VLAN action");
2867         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2868                 return rte_flow_error_set(error, ENOTSUP,
2869                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2870                                           "Multiple VLAN PCP modification are "
2871                                           "not supported");
2872         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2873                 return rte_flow_error_set(error, EINVAL,
2874                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2875                                           "wrong action order, port_id should "
2876                                           "be after set VLAN PCP");
2877         return 0;
2878 }
2879
2880 /**
2881  * Validate the set VLAN VID.
2882  *
2883  * @param[in] item_flags
2884  *   Holds the items detected in this rule.
2885  * @param[in] action_flags
2886  *   Holds the actions detected until now.
2887  * @param[in] actions
2888  *   Pointer to the list of actions remaining in the flow rule.
2889  * @param[out] error
2890  *   Pointer to error structure.
2891  *
2892  * @return
2893  *   0 on success, a negative errno value otherwise and rte_errno is set.
2894  */
2895 static int
2896 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
2897                                      uint64_t action_flags,
2898                                      const struct rte_flow_action actions[],
2899                                      struct rte_flow_error *error)
2900 {
2901         const struct rte_flow_action *action = actions;
2902         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
2903
2904         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
2905                 return rte_flow_error_set(error, EINVAL,
2906                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2907                                           "VLAN VID value is too big");
2908         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
2909             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2910                 return rte_flow_error_set(error, ENOTSUP,
2911                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2912                                           "set VLAN VID action must follow push"
2913                                           " VLAN action or match on VLAN item");
2914         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
2915                 return rte_flow_error_set(error, ENOTSUP,
2916                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2917                                           "Multiple VLAN VID modifications are "
2918                                           "not supported");
2919         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2920                 return rte_flow_error_set(error, EINVAL,
2921                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2922                                           "wrong action order, port_id should "
2923                                           "be after set VLAN VID");
2924         return 0;
2925 }
2926
2927 /*
2928  * Validate the FLAG action.
2929  *
2930  * @param[in] dev
2931  *   Pointer to the rte_eth_dev structure.
2932  * @param[in] action_flags
2933  *   Holds the actions detected until now.
2934  * @param[in] attr
2935  *   Pointer to flow attributes
2936  * @param[out] error
2937  *   Pointer to error structure.
2938  *
2939  * @return
2940  *   0 on success, a negative errno value otherwise and rte_errno is set.
2941  */
2942 static int
2943 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
2944                              uint64_t action_flags,
2945                              const struct rte_flow_attr *attr,
2946                              struct rte_flow_error *error)
2947 {
2948         struct mlx5_priv *priv = dev->data->dev_private;
2949         struct mlx5_dev_config *config = &priv->config;
2950         int ret;
2951
2952         /* Fall back if no extended metadata register support. */
2953         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
2954                 return mlx5_flow_validate_action_flag(action_flags, attr,
2955                                                       error);
2956         /* Extensive metadata mode requires registers. */
2957         if (!mlx5_flow_ext_mreg_supported(dev))
2958                 return rte_flow_error_set(error, ENOTSUP,
2959                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2960                                           "no metadata registers "
2961                                           "to support flag action");
2962         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
2963                 return rte_flow_error_set(error, ENOTSUP,
2964                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2965                                           "extended metadata register"
2966                                           " isn't available");
2967         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
2968         if (ret < 0)
2969                 return ret;
2970         MLX5_ASSERT(ret > 0);
2971         if (action_flags & MLX5_FLOW_ACTION_MARK)
2972                 return rte_flow_error_set(error, EINVAL,
2973                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2974                                           "can't mark and flag in same flow");
2975         if (action_flags & MLX5_FLOW_ACTION_FLAG)
2976                 return rte_flow_error_set(error, EINVAL,
2977                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
2978                                           "can't have 2 flag"
2979                                           " actions in same flow");
2980         return 0;
2981 }
2982
2983 /**
2984  * Validate MARK action.
2985  *
2986  * @param[in] dev
2987  *   Pointer to the rte_eth_dev structure.
2988  * @param[in] action
2989  *   Pointer to action.
2990  * @param[in] action_flags
2991  *   Holds the actions detected until now.
2992  * @param[in] attr
2993  *   Pointer to flow attributes
2994  * @param[out] error
2995  *   Pointer to error structure.
2996  *
2997  * @return
2998  *   0 on success, a negative errno value otherwise and rte_errno is set.
2999  */
3000 static int
3001 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3002                              const struct rte_flow_action *action,
3003                              uint64_t action_flags,
3004                              const struct rte_flow_attr *attr,
3005                              struct rte_flow_error *error)
3006 {
3007         struct mlx5_priv *priv = dev->data->dev_private;
3008         struct mlx5_dev_config *config = &priv->config;
3009         const struct rte_flow_action_mark *mark = action->conf;
3010         int ret;
3011
3012         if (is_tunnel_offload_active(dev))
3013                 return rte_flow_error_set(error, ENOTSUP,
3014                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3015                                           "no mark action "
3016                                           "if tunnel offload active");
3017         /* Fall back if no extended metadata register support. */
3018         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3019                 return mlx5_flow_validate_action_mark(action, action_flags,
3020                                                       attr, error);
3021         /* Extensive metadata mode requires registers. */
3022         if (!mlx5_flow_ext_mreg_supported(dev))
3023                 return rte_flow_error_set(error, ENOTSUP,
3024                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3025                                           "no metadata registers "
3026                                           "to support mark action");
3027         if (!priv->sh->dv_mark_mask)
3028                 return rte_flow_error_set(error, ENOTSUP,
3029                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3030                                           "extended metadata register"
3031                                           " isn't available");
3032         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3033         if (ret < 0)
3034                 return ret;
3035         MLX5_ASSERT(ret > 0);
3036         if (!mark)
3037                 return rte_flow_error_set(error, EINVAL,
3038                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3039                                           "configuration cannot be null");
3040         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3041                 return rte_flow_error_set(error, EINVAL,
3042                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3043                                           &mark->id,
3044                                           "mark id exceeds the limit");
3045         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3046                 return rte_flow_error_set(error, EINVAL,
3047                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3048                                           "can't flag and mark in same flow");
3049         if (action_flags & MLX5_FLOW_ACTION_MARK)
3050                 return rte_flow_error_set(error, EINVAL,
3051                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3052                                           "can't have 2 mark actions in same"
3053                                           " flow");
3054         return 0;
3055 }
3056
3057 /**
3058  * Validate SET_META action.
3059  *
3060  * @param[in] dev
3061  *   Pointer to the rte_eth_dev structure.
3062  * @param[in] action
3063  *   Pointer to the action structure.
3064  * @param[in] action_flags
3065  *   Holds the actions detected until now.
3066  * @param[in] attr
3067  *   Pointer to flow attributes
3068  * @param[out] error
3069  *   Pointer to error structure.
3070  *
3071  * @return
3072  *   0 on success, a negative errno value otherwise and rte_errno is set.
3073  */
3074 static int
3075 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3076                                  const struct rte_flow_action *action,
3077                                  uint64_t action_flags __rte_unused,
3078                                  const struct rte_flow_attr *attr,
3079                                  struct rte_flow_error *error)
3080 {
3081         const struct rte_flow_action_set_meta *conf;
3082         uint32_t nic_mask = UINT32_MAX;
3083         int reg;
3084
3085         if (!mlx5_flow_ext_mreg_supported(dev))
3086                 return rte_flow_error_set(error, ENOTSUP,
3087                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3088                                           "extended metadata register"
3089                                           " isn't supported");
3090         reg = flow_dv_get_metadata_reg(dev, attr, error);
3091         if (reg < 0)
3092                 return reg;
3093         if (reg == REG_NON)
3094                 return rte_flow_error_set(error, ENOTSUP,
3095                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3096                                           "unavalable extended metadata register");
3097         if (reg != REG_A && reg != REG_B) {
3098                 struct mlx5_priv *priv = dev->data->dev_private;
3099
3100                 nic_mask = priv->sh->dv_meta_mask;
3101         }
3102         if (!(action->conf))
3103                 return rte_flow_error_set(error, EINVAL,
3104                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3105                                           "configuration cannot be null");
3106         conf = (const struct rte_flow_action_set_meta *)action->conf;
3107         if (!conf->mask)
3108                 return rte_flow_error_set(error, EINVAL,
3109                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3110                                           "zero mask doesn't have any effect");
3111         if (conf->mask & ~nic_mask)
3112                 return rte_flow_error_set(error, EINVAL,
3113                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3114                                           "meta data must be within reg C0");
3115         return 0;
3116 }
3117
3118 /**
3119  * Validate SET_TAG action.
3120  *
3121  * @param[in] dev
3122  *   Pointer to the rte_eth_dev structure.
3123  * @param[in] action
3124  *   Pointer to the action structure.
3125  * @param[in] action_flags
3126  *   Holds the actions detected until now.
3127  * @param[in] attr
3128  *   Pointer to flow attributes
3129  * @param[out] error
3130  *   Pointer to error structure.
3131  *
3132  * @return
3133  *   0 on success, a negative errno value otherwise and rte_errno is set.
3134  */
3135 static int
3136 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3137                                 const struct rte_flow_action *action,
3138                                 uint64_t action_flags,
3139                                 const struct rte_flow_attr *attr,
3140                                 struct rte_flow_error *error)
3141 {
3142         const struct rte_flow_action_set_tag *conf;
3143         const uint64_t terminal_action_flags =
3144                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3145                 MLX5_FLOW_ACTION_RSS;
3146         int ret;
3147
3148         if (!mlx5_flow_ext_mreg_supported(dev))
3149                 return rte_flow_error_set(error, ENOTSUP,
3150                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3151                                           "extensive metadata register"
3152                                           " isn't supported");
3153         if (!(action->conf))
3154                 return rte_flow_error_set(error, EINVAL,
3155                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3156                                           "configuration cannot be null");
3157         conf = (const struct rte_flow_action_set_tag *)action->conf;
3158         if (!conf->mask)
3159                 return rte_flow_error_set(error, EINVAL,
3160                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3161                                           "zero mask doesn't have any effect");
3162         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3163         if (ret < 0)
3164                 return ret;
3165         if (!attr->transfer && attr->ingress &&
3166             (action_flags & terminal_action_flags))
3167                 return rte_flow_error_set(error, EINVAL,
3168                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3169                                           "set_tag has no effect"
3170                                           " with terminal actions");
3171         return 0;
3172 }
3173
3174 /**
3175  * Check if action counter is shared by either old or new mechanism.
3176  *
3177  * @param[in] action
3178  *   Pointer to the action structure.
3179  *
3180  * @return
3181  *   True when counter is shared, false otherwise.
3182  */
3183 static inline bool
3184 is_shared_action_count(const struct rte_flow_action *action)
3185 {
3186         const struct rte_flow_action_count *count =
3187                         (const struct rte_flow_action_count *)action->conf;
3188
3189         if ((int)action->type == MLX5_RTE_FLOW_ACTION_TYPE_COUNT)
3190                 return true;
3191         return !!(count && count->shared);
3192 }
3193
3194 /**
3195  * Validate count action.
3196  *
3197  * @param[in] dev
3198  *   Pointer to rte_eth_dev structure.
3199  * @param[in] shared
3200  *   Indicator if action is shared.
3201  * @param[in] action_flags
3202  *   Holds the actions detected until now.
3203  * @param[out] error
3204  *   Pointer to error structure.
3205  *
3206  * @return
3207  *   0 on success, a negative errno value otherwise and rte_errno is set.
3208  */
3209 static int
3210 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3211                               uint64_t action_flags,
3212                               struct rte_flow_error *error)
3213 {
3214         struct mlx5_priv *priv = dev->data->dev_private;
3215
3216         if (!priv->config.devx)
3217                 goto notsup_err;
3218         if (action_flags & MLX5_FLOW_ACTION_COUNT)
3219                 return rte_flow_error_set(error, EINVAL,
3220                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3221                                           "duplicate count actions set");
3222         if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3223             !priv->sh->flow_hit_aso_en)
3224                 return rte_flow_error_set(error, EINVAL,
3225                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3226                                           "old age and shared count combination is not supported");
3227 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3228         return 0;
3229 #endif
3230 notsup_err:
3231         return rte_flow_error_set
3232                       (error, ENOTSUP,
3233                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3234                        NULL,
3235                        "count action not supported");
3236 }
3237
3238 /**
3239  * Validate the L2 encap action.
3240  *
3241  * @param[in] dev
3242  *   Pointer to the rte_eth_dev structure.
3243  * @param[in] action_flags
3244  *   Holds the actions detected until now.
3245  * @param[in] action
3246  *   Pointer to the action structure.
3247  * @param[in] attr
3248  *   Pointer to flow attributes.
3249  * @param[out] error
3250  *   Pointer to error structure.
3251  *
3252  * @return
3253  *   0 on success, a negative errno value otherwise and rte_errno is set.
3254  */
3255 static int
3256 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3257                                  uint64_t action_flags,
3258                                  const struct rte_flow_action *action,
3259                                  const struct rte_flow_attr *attr,
3260                                  struct rte_flow_error *error)
3261 {
3262         const struct mlx5_priv *priv = dev->data->dev_private;
3263
3264         if (!(action->conf))
3265                 return rte_flow_error_set(error, EINVAL,
3266                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3267                                           "configuration cannot be null");
3268         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3269                 return rte_flow_error_set(error, EINVAL,
3270                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3271                                           "can only have a single encap action "
3272                                           "in a flow");
3273         if (!attr->transfer && priv->representor)
3274                 return rte_flow_error_set(error, ENOTSUP,
3275                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3276                                           "encap action for VF representor "
3277                                           "not supported on NIC table");
3278         return 0;
3279 }
3280
3281 /**
3282  * Validate a decap action.
3283  *
3284  * @param[in] dev
3285  *   Pointer to the rte_eth_dev structure.
3286  * @param[in] action_flags
3287  *   Holds the actions detected until now.
3288  * @param[in] action
3289  *   Pointer to the action structure.
3290  * @param[in] item_flags
3291  *   Holds the items detected.
3292  * @param[in] attr
3293  *   Pointer to flow attributes
3294  * @param[out] error
3295  *   Pointer to error structure.
3296  *
3297  * @return
3298  *   0 on success, a negative errno value otherwise and rte_errno is set.
3299  */
3300 static int
3301 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3302                               uint64_t action_flags,
3303                               const struct rte_flow_action *action,
3304                               const uint64_t item_flags,
3305                               const struct rte_flow_attr *attr,
3306                               struct rte_flow_error *error)
3307 {
3308         const struct mlx5_priv *priv = dev->data->dev_private;
3309
3310         if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3311             !priv->config.decap_en)
3312                 return rte_flow_error_set(error, ENOTSUP,
3313                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3314                                           "decap is not enabled");
3315         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3316                 return rte_flow_error_set(error, ENOTSUP,
3317                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3318                                           action_flags &
3319                                           MLX5_FLOW_ACTION_DECAP ? "can only "
3320                                           "have a single decap action" : "decap "
3321                                           "after encap is not supported");
3322         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3323                 return rte_flow_error_set(error, EINVAL,
3324                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3325                                           "can't have decap action after"
3326                                           " modify action");
3327         if (attr->egress)
3328                 return rte_flow_error_set(error, ENOTSUP,
3329                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3330                                           NULL,
3331                                           "decap action not supported for "
3332                                           "egress");
3333         if (!attr->transfer && priv->representor)
3334                 return rte_flow_error_set(error, ENOTSUP,
3335                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3336                                           "decap action for VF representor "
3337                                           "not supported on NIC table");
3338         if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3339             !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3340                 return rte_flow_error_set(error, ENOTSUP,
3341                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3342                                 "VXLAN item should be present for VXLAN decap");
3343         return 0;
3344 }
3345
3346 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3347
3348 /**
3349  * Validate the raw encap and decap actions.
3350  *
3351  * @param[in] dev
3352  *   Pointer to the rte_eth_dev structure.
3353  * @param[in] decap
3354  *   Pointer to the decap action.
3355  * @param[in] encap
3356  *   Pointer to the encap action.
3357  * @param[in] attr
3358  *   Pointer to flow attributes
3359  * @param[in/out] action_flags
3360  *   Holds the actions detected until now.
3361  * @param[out] actions_n
3362  *   pointer to the number of actions counter.
3363  * @param[in] action
3364  *   Pointer to the action structure.
3365  * @param[in] item_flags
3366  *   Holds the items detected.
3367  * @param[out] error
3368  *   Pointer to error structure.
3369  *
3370  * @return
3371  *   0 on success, a negative errno value otherwise and rte_errno is set.
3372  */
3373 static int
3374 flow_dv_validate_action_raw_encap_decap
3375         (struct rte_eth_dev *dev,
3376          const struct rte_flow_action_raw_decap *decap,
3377          const struct rte_flow_action_raw_encap *encap,
3378          const struct rte_flow_attr *attr, uint64_t *action_flags,
3379          int *actions_n, const struct rte_flow_action *action,
3380          uint64_t item_flags, struct rte_flow_error *error)
3381 {
3382         const struct mlx5_priv *priv = dev->data->dev_private;
3383         int ret;
3384
3385         if (encap && (!encap->size || !encap->data))
3386                 return rte_flow_error_set(error, EINVAL,
3387                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3388                                           "raw encap data cannot be empty");
3389         if (decap && encap) {
3390                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3391                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3392                         /* L3 encap. */
3393                         decap = NULL;
3394                 else if (encap->size <=
3395                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3396                            decap->size >
3397                            MLX5_ENCAPSULATION_DECISION_SIZE)
3398                         /* L3 decap. */
3399                         encap = NULL;
3400                 else if (encap->size >
3401                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3402                            decap->size >
3403                            MLX5_ENCAPSULATION_DECISION_SIZE)
3404                         /* 2 L2 actions: encap and decap. */
3405                         ;
3406                 else
3407                         return rte_flow_error_set(error,
3408                                 ENOTSUP,
3409                                 RTE_FLOW_ERROR_TYPE_ACTION,
3410                                 NULL, "unsupported too small "
3411                                 "raw decap and too small raw "
3412                                 "encap combination");
3413         }
3414         if (decap) {
3415                 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3416                                                     item_flags, attr, error);
3417                 if (ret < 0)
3418                         return ret;
3419                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3420                 ++(*actions_n);
3421         }
3422         if (encap) {
3423                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3424                         return rte_flow_error_set(error, ENOTSUP,
3425                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3426                                                   NULL,
3427                                                   "small raw encap size");
3428                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3429                         return rte_flow_error_set(error, EINVAL,
3430                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3431                                                   NULL,
3432                                                   "more than one encap action");
3433                 if (!attr->transfer && priv->representor)
3434                         return rte_flow_error_set
3435                                         (error, ENOTSUP,
3436                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3437                                          "encap action for VF representor "
3438                                          "not supported on NIC table");
3439                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3440                 ++(*actions_n);
3441         }
3442         return 0;
3443 }
3444
3445 /**
3446  * Match encap_decap resource.
3447  *
3448  * @param list
3449  *   Pointer to the hash list.
3450  * @param entry
3451  *   Pointer to exist resource entry object.
3452  * @param key
3453  *   Key of the new entry.
3454  * @param ctx_cb
3455  *   Pointer to new encap_decap resource.
3456  *
3457  * @return
3458  *   0 on matching, none-zero otherwise.
3459  */
3460 int
3461 flow_dv_encap_decap_match_cb(struct mlx5_hlist *list __rte_unused,
3462                              struct mlx5_hlist_entry *entry,
3463                              uint64_t key __rte_unused, void *cb_ctx)
3464 {
3465         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3466         struct mlx5_flow_dv_encap_decap_resource *resource = ctx->data;
3467         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3468
3469         cache_resource = container_of(entry,
3470                                       struct mlx5_flow_dv_encap_decap_resource,
3471                                       entry);
3472         if (resource->reformat_type == cache_resource->reformat_type &&
3473             resource->ft_type == cache_resource->ft_type &&
3474             resource->flags == cache_resource->flags &&
3475             resource->size == cache_resource->size &&
3476             !memcmp((const void *)resource->buf,
3477                     (const void *)cache_resource->buf,
3478                     resource->size))
3479                 return 0;
3480         return -1;
3481 }
3482
3483 /**
3484  * Allocate encap_decap resource.
3485  *
3486  * @param list
3487  *   Pointer to the hash list.
3488  * @param entry
3489  *   Pointer to exist resource entry object.
3490  * @param ctx_cb
3491  *   Pointer to new encap_decap resource.
3492  *
3493  * @return
3494  *   0 on matching, none-zero otherwise.
3495  */
3496 struct mlx5_hlist_entry *
3497 flow_dv_encap_decap_create_cb(struct mlx5_hlist *list,
3498                               uint64_t key __rte_unused,
3499                               void *cb_ctx)
3500 {
3501         struct mlx5_dev_ctx_shared *sh = list->ctx;
3502         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3503         struct mlx5dv_dr_domain *domain;
3504         struct mlx5_flow_dv_encap_decap_resource *resource = ctx->data;
3505         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3506         uint32_t idx;
3507         int ret;
3508
3509         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3510                 domain = sh->fdb_domain;
3511         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3512                 domain = sh->rx_domain;
3513         else
3514                 domain = sh->tx_domain;
3515         /* Register new encap/decap resource. */
3516         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3517                                        &idx);
3518         if (!cache_resource) {
3519                 rte_flow_error_set(ctx->error, ENOMEM,
3520                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3521                                    "cannot allocate resource memory");
3522                 return NULL;
3523         }
3524         *cache_resource = *resource;
3525         cache_resource->idx = idx;
3526         ret = mlx5_flow_os_create_flow_action_packet_reformat
3527                                         (sh->ctx, domain, cache_resource,
3528                                          &cache_resource->action);
3529         if (ret) {
3530                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3531                 rte_flow_error_set(ctx->error, ENOMEM,
3532                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3533                                    NULL, "cannot create action");
3534                 return NULL;
3535         }
3536
3537         return &cache_resource->entry;
3538 }
3539
3540 /**
3541  * Find existing encap/decap resource or create and register a new one.
3542  *
3543  * @param[in, out] dev
3544  *   Pointer to rte_eth_dev structure.
3545  * @param[in, out] resource
3546  *   Pointer to encap/decap resource.
3547  * @parm[in, out] dev_flow
3548  *   Pointer to the dev_flow.
3549  * @param[out] error
3550  *   pointer to error structure.
3551  *
3552  * @return
3553  *   0 on success otherwise -errno and errno is set.
3554  */
3555 static int
3556 flow_dv_encap_decap_resource_register
3557                         (struct rte_eth_dev *dev,
3558                          struct mlx5_flow_dv_encap_decap_resource *resource,
3559                          struct mlx5_flow *dev_flow,
3560                          struct rte_flow_error *error)
3561 {
3562         struct mlx5_priv *priv = dev->data->dev_private;
3563         struct mlx5_dev_ctx_shared *sh = priv->sh;
3564         struct mlx5_hlist_entry *entry;
3565         union {
3566                 struct {
3567                         uint32_t ft_type:8;
3568                         uint32_t refmt_type:8;
3569                         /*
3570                          * Header reformat actions can be shared between
3571                          * non-root tables. One bit to indicate non-root
3572                          * table or not.
3573                          */
3574                         uint32_t is_root:1;
3575                         uint32_t reserve:15;
3576                 };
3577                 uint32_t v32;
3578         } encap_decap_key = {
3579                 {
3580                         .ft_type = resource->ft_type,
3581                         .refmt_type = resource->reformat_type,
3582                         .is_root = !!dev_flow->dv.group,
3583                         .reserve = 0,
3584                 }
3585         };
3586         struct mlx5_flow_cb_ctx ctx = {
3587                 .error = error,
3588                 .data = resource,
3589         };
3590         uint64_t key64;
3591
3592         resource->flags = dev_flow->dv.group ? 0 : 1;
3593         key64 =  __rte_raw_cksum(&encap_decap_key.v32,
3594                                  sizeof(encap_decap_key.v32), 0);
3595         if (resource->reformat_type !=
3596             MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3597             resource->size)
3598                 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3599         entry = mlx5_hlist_register(sh->encaps_decaps, key64, &ctx);
3600         if (!entry)
3601                 return -rte_errno;
3602         resource = container_of(entry, typeof(*resource), entry);
3603         dev_flow->dv.encap_decap = resource;
3604         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3605         return 0;
3606 }
3607
3608 /**
3609  * Find existing table jump resource or create and register a new one.
3610  *
3611  * @param[in, out] dev
3612  *   Pointer to rte_eth_dev structure.
3613  * @param[in, out] tbl
3614  *   Pointer to flow table resource.
3615  * @parm[in, out] dev_flow
3616  *   Pointer to the dev_flow.
3617  * @param[out] error
3618  *   pointer to error structure.
3619  *
3620  * @return
3621  *   0 on success otherwise -errno and errno is set.
3622  */
3623 static int
3624 flow_dv_jump_tbl_resource_register
3625                         (struct rte_eth_dev *dev __rte_unused,
3626                          struct mlx5_flow_tbl_resource *tbl,
3627                          struct mlx5_flow *dev_flow,
3628                          struct rte_flow_error *error __rte_unused)
3629 {
3630         struct mlx5_flow_tbl_data_entry *tbl_data =
3631                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3632
3633         MLX5_ASSERT(tbl);
3634         MLX5_ASSERT(tbl_data->jump.action);
3635         dev_flow->handle->rix_jump = tbl_data->idx;
3636         dev_flow->dv.jump = &tbl_data->jump;
3637         return 0;
3638 }
3639
3640 int
3641 flow_dv_port_id_match_cb(struct mlx5_cache_list *list __rte_unused,
3642                          struct mlx5_cache_entry *entry, void *cb_ctx)
3643 {
3644         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3645         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3646         struct mlx5_flow_dv_port_id_action_resource *res =
3647                         container_of(entry, typeof(*res), entry);
3648
3649         return ref->port_id != res->port_id;
3650 }
3651
3652 struct mlx5_cache_entry *
3653 flow_dv_port_id_create_cb(struct mlx5_cache_list *list,
3654                           struct mlx5_cache_entry *entry __rte_unused,
3655                           void *cb_ctx)
3656 {
3657         struct mlx5_dev_ctx_shared *sh = list->ctx;
3658         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3659         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3660         struct mlx5_flow_dv_port_id_action_resource *cache;
3661         uint32_t idx;
3662         int ret;
3663
3664         /* Register new port id action resource. */
3665         cache = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3666         if (!cache) {
3667                 rte_flow_error_set(ctx->error, ENOMEM,
3668                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3669                                    "cannot allocate port_id action cache memory");
3670                 return NULL;
3671         }
3672         *cache = *ref;
3673         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3674                                                         ref->port_id,
3675                                                         &cache->action);
3676         if (ret) {
3677                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3678                 rte_flow_error_set(ctx->error, ENOMEM,
3679                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3680                                    "cannot create action");
3681                 return NULL;
3682         }
3683         cache->idx = idx;
3684         return &cache->entry;
3685 }
3686
3687 /**
3688  * Find existing table port ID resource or create and register a new one.
3689  *
3690  * @param[in, out] dev
3691  *   Pointer to rte_eth_dev structure.
3692  * @param[in, out] resource
3693  *   Pointer to port ID action resource.
3694  * @parm[in, out] dev_flow
3695  *   Pointer to the dev_flow.
3696  * @param[out] error
3697  *   pointer to error structure.
3698  *
3699  * @return
3700  *   0 on success otherwise -errno and errno is set.
3701  */
3702 static int
3703 flow_dv_port_id_action_resource_register
3704                         (struct rte_eth_dev *dev,
3705                          struct mlx5_flow_dv_port_id_action_resource *resource,
3706                          struct mlx5_flow *dev_flow,
3707                          struct rte_flow_error *error)
3708 {
3709         struct mlx5_priv *priv = dev->data->dev_private;
3710         struct mlx5_cache_entry *entry;
3711         struct mlx5_flow_dv_port_id_action_resource *cache;
3712         struct mlx5_flow_cb_ctx ctx = {
3713                 .error = error,
3714                 .data = resource,
3715         };
3716
3717         entry = mlx5_cache_register(&priv->sh->port_id_action_list, &ctx);
3718         if (!entry)
3719                 return -rte_errno;
3720         cache = container_of(entry, typeof(*cache), entry);
3721         dev_flow->dv.port_id_action = cache;
3722         dev_flow->handle->rix_port_id_action = cache->idx;
3723         return 0;
3724 }
3725
3726 int
3727 flow_dv_push_vlan_match_cb(struct mlx5_cache_list *list __rte_unused,
3728                          struct mlx5_cache_entry *entry, void *cb_ctx)
3729 {
3730         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3731         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3732         struct mlx5_flow_dv_push_vlan_action_resource *res =
3733                         container_of(entry, typeof(*res), entry);
3734
3735         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3736 }
3737
3738 struct mlx5_cache_entry *
3739 flow_dv_push_vlan_create_cb(struct mlx5_cache_list *list,
3740                           struct mlx5_cache_entry *entry __rte_unused,
3741                           void *cb_ctx)
3742 {
3743         struct mlx5_dev_ctx_shared *sh = list->ctx;
3744         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3745         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3746         struct mlx5_flow_dv_push_vlan_action_resource *cache;
3747         struct mlx5dv_dr_domain *domain;
3748         uint32_t idx;
3749         int ret;
3750
3751         /* Register new port id action resource. */
3752         cache = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3753         if (!cache) {
3754                 rte_flow_error_set(ctx->error, ENOMEM,
3755                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3756                                    "cannot allocate push_vlan action cache memory");
3757                 return NULL;
3758         }
3759         *cache = *ref;
3760         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3761                 domain = sh->fdb_domain;
3762         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3763                 domain = sh->rx_domain;
3764         else
3765                 domain = sh->tx_domain;
3766         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3767                                                         &cache->action);
3768         if (ret) {
3769                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3770                 rte_flow_error_set(ctx->error, ENOMEM,
3771                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3772                                    "cannot create push vlan action");
3773                 return NULL;
3774         }
3775         cache->idx = idx;
3776         return &cache->entry;
3777 }
3778
3779 /**
3780  * Find existing push vlan resource or create and register a new one.
3781  *
3782  * @param [in, out] dev
3783  *   Pointer to rte_eth_dev structure.
3784  * @param[in, out] resource
3785  *   Pointer to port ID action resource.
3786  * @parm[in, out] dev_flow
3787  *   Pointer to the dev_flow.
3788  * @param[out] error
3789  *   pointer to error structure.
3790  *
3791  * @return
3792  *   0 on success otherwise -errno and errno is set.
3793  */
3794 static int
3795 flow_dv_push_vlan_action_resource_register
3796                        (struct rte_eth_dev *dev,
3797                         struct mlx5_flow_dv_push_vlan_action_resource *resource,
3798                         struct mlx5_flow *dev_flow,
3799                         struct rte_flow_error *error)
3800 {
3801         struct mlx5_priv *priv = dev->data->dev_private;
3802         struct mlx5_flow_dv_push_vlan_action_resource *cache;
3803         struct mlx5_cache_entry *entry;
3804         struct mlx5_flow_cb_ctx ctx = {
3805                 .error = error,
3806                 .data = resource,
3807         };
3808
3809         entry = mlx5_cache_register(&priv->sh->push_vlan_action_list, &ctx);
3810         if (!entry)
3811                 return -rte_errno;
3812         cache = container_of(entry, typeof(*cache), entry);
3813
3814         dev_flow->handle->dvh.rix_push_vlan = cache->idx;
3815         dev_flow->dv.push_vlan_res = cache;
3816         return 0;
3817 }
3818
3819 /**
3820  * Get the size of specific rte_flow_item_type hdr size
3821  *
3822  * @param[in] item_type
3823  *   Tested rte_flow_item_type.
3824  *
3825  * @return
3826  *   sizeof struct item_type, 0 if void or irrelevant.
3827  */
3828 static size_t
3829 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
3830 {
3831         size_t retval;
3832
3833         switch (item_type) {
3834         case RTE_FLOW_ITEM_TYPE_ETH:
3835                 retval = sizeof(struct rte_ether_hdr);
3836                 break;
3837         case RTE_FLOW_ITEM_TYPE_VLAN:
3838                 retval = sizeof(struct rte_vlan_hdr);
3839                 break;
3840         case RTE_FLOW_ITEM_TYPE_IPV4:
3841                 retval = sizeof(struct rte_ipv4_hdr);
3842                 break;
3843         case RTE_FLOW_ITEM_TYPE_IPV6:
3844                 retval = sizeof(struct rte_ipv6_hdr);
3845                 break;
3846         case RTE_FLOW_ITEM_TYPE_UDP:
3847                 retval = sizeof(struct rte_udp_hdr);
3848                 break;
3849         case RTE_FLOW_ITEM_TYPE_TCP:
3850                 retval = sizeof(struct rte_tcp_hdr);
3851                 break;
3852         case RTE_FLOW_ITEM_TYPE_VXLAN:
3853         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
3854                 retval = sizeof(struct rte_vxlan_hdr);
3855                 break;
3856         case RTE_FLOW_ITEM_TYPE_GRE:
3857         case RTE_FLOW_ITEM_TYPE_NVGRE:
3858                 retval = sizeof(struct rte_gre_hdr);
3859                 break;
3860         case RTE_FLOW_ITEM_TYPE_MPLS:
3861                 retval = sizeof(struct rte_mpls_hdr);
3862                 break;
3863         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
3864         default:
3865                 retval = 0;
3866                 break;
3867         }
3868         return retval;
3869 }
3870
3871 #define MLX5_ENCAP_IPV4_VERSION         0x40
3872 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
3873 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
3874 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
3875 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
3876 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
3877 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
3878
3879 /**
3880  * Convert the encap action data from list of rte_flow_item to raw buffer
3881  *
3882  * @param[in] items
3883  *   Pointer to rte_flow_item objects list.
3884  * @param[out] buf
3885  *   Pointer to the output buffer.
3886  * @param[out] size
3887  *   Pointer to the output buffer size.
3888  * @param[out] error
3889  *   Pointer to the error structure.
3890  *
3891  * @return
3892  *   0 on success, a negative errno value otherwise and rte_errno is set.
3893  */
3894 static int
3895 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
3896                            size_t *size, struct rte_flow_error *error)
3897 {
3898         struct rte_ether_hdr *eth = NULL;
3899         struct rte_vlan_hdr *vlan = NULL;
3900         struct rte_ipv4_hdr *ipv4 = NULL;
3901         struct rte_ipv6_hdr *ipv6 = NULL;
3902         struct rte_udp_hdr *udp = NULL;
3903         struct rte_vxlan_hdr *vxlan = NULL;
3904         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
3905         struct rte_gre_hdr *gre = NULL;
3906         size_t len;
3907         size_t temp_size = 0;
3908
3909         if (!items)
3910                 return rte_flow_error_set(error, EINVAL,
3911                                           RTE_FLOW_ERROR_TYPE_ACTION,
3912                                           NULL, "invalid empty data");
3913         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
3914                 len = flow_dv_get_item_hdr_len(items->type);
3915                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
3916                         return rte_flow_error_set(error, EINVAL,
3917                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3918                                                   (void *)items->type,
3919                                                   "items total size is too big"
3920                                                   " for encap action");
3921                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
3922                 switch (items->type) {
3923                 case RTE_FLOW_ITEM_TYPE_ETH:
3924                         eth = (struct rte_ether_hdr *)&buf[temp_size];
3925                         break;
3926                 case RTE_FLOW_ITEM_TYPE_VLAN:
3927                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
3928                         if (!eth)
3929                                 return rte_flow_error_set(error, EINVAL,
3930                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3931                                                 (void *)items->type,
3932                                                 "eth header not found");
3933                         if (!eth->ether_type)
3934                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
3935                         break;
3936                 case RTE_FLOW_ITEM_TYPE_IPV4:
3937                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
3938                         if (!vlan && !eth)
3939                                 return rte_flow_error_set(error, EINVAL,
3940                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3941                                                 (void *)items->type,
3942                                                 "neither eth nor vlan"
3943                                                 " header found");
3944                         if (vlan && !vlan->eth_proto)
3945                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
3946                         else if (eth && !eth->ether_type)
3947                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
3948                         if (!ipv4->version_ihl)
3949                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
3950                                                     MLX5_ENCAP_IPV4_IHL_MIN;
3951                         if (!ipv4->time_to_live)
3952                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
3953                         break;
3954                 case RTE_FLOW_ITEM_TYPE_IPV6:
3955                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
3956                         if (!vlan && !eth)
3957                                 return rte_flow_error_set(error, EINVAL,
3958                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3959                                                 (void *)items->type,
3960                                                 "neither eth nor vlan"
3961                                                 " header found");
3962                         if (vlan && !vlan->eth_proto)
3963                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
3964                         else if (eth && !eth->ether_type)
3965                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
3966                         if (!ipv6->vtc_flow)
3967                                 ipv6->vtc_flow =
3968                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
3969                         if (!ipv6->hop_limits)
3970                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
3971                         break;
3972                 case RTE_FLOW_ITEM_TYPE_UDP:
3973                         udp = (struct rte_udp_hdr *)&buf[temp_size];
3974                         if (!ipv4 && !ipv6)
3975                                 return rte_flow_error_set(error, EINVAL,
3976                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3977                                                 (void *)items->type,
3978                                                 "ip header not found");
3979                         if (ipv4 && !ipv4->next_proto_id)
3980                                 ipv4->next_proto_id = IPPROTO_UDP;
3981                         else if (ipv6 && !ipv6->proto)
3982                                 ipv6->proto = IPPROTO_UDP;
3983                         break;
3984                 case RTE_FLOW_ITEM_TYPE_VXLAN:
3985                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
3986                         if (!udp)
3987                                 return rte_flow_error_set(error, EINVAL,
3988                                                 RTE_FLOW_ERROR_TYPE_ACTION,
3989                                                 (void *)items->type,
3990                                                 "udp header not found");
3991                         if (!udp->dst_port)
3992                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
3993                         if (!vxlan->vx_flags)
3994                                 vxlan->vx_flags =
3995                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
3996                         break;
3997                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
3998                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
3999                         if (!udp)
4000                                 return rte_flow_error_set(error, EINVAL,
4001                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4002                                                 (void *)items->type,
4003                                                 "udp header not found");
4004                         if (!vxlan_gpe->proto)
4005                                 return rte_flow_error_set(error, EINVAL,
4006                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4007                                                 (void *)items->type,
4008                                                 "next protocol not found");
4009                         if (!udp->dst_port)
4010                                 udp->dst_port =
4011                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4012                         if (!vxlan_gpe->vx_flags)
4013                                 vxlan_gpe->vx_flags =
4014                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4015                         break;
4016                 case RTE_FLOW_ITEM_TYPE_GRE:
4017                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4018                         gre = (struct rte_gre_hdr *)&buf[temp_size];
4019                         if (!gre->proto)
4020                                 return rte_flow_error_set(error, EINVAL,
4021                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4022                                                 (void *)items->type,
4023                                                 "next protocol not found");
4024                         if (!ipv4 && !ipv6)
4025                                 return rte_flow_error_set(error, EINVAL,
4026                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4027                                                 (void *)items->type,
4028                                                 "ip header not found");
4029                         if (ipv4 && !ipv4->next_proto_id)
4030                                 ipv4->next_proto_id = IPPROTO_GRE;
4031                         else if (ipv6 && !ipv6->proto)
4032                                 ipv6->proto = IPPROTO_GRE;
4033                         break;
4034                 case RTE_FLOW_ITEM_TYPE_VOID:
4035                         break;
4036                 default:
4037                         return rte_flow_error_set(error, EINVAL,
4038                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4039                                                   (void *)items->type,
4040                                                   "unsupported item type");
4041                         break;
4042                 }
4043                 temp_size += len;
4044         }
4045         *size = temp_size;
4046         return 0;
4047 }
4048
4049 static int
4050 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4051 {
4052         struct rte_ether_hdr *eth = NULL;
4053         struct rte_vlan_hdr *vlan = NULL;
4054         struct rte_ipv6_hdr *ipv6 = NULL;
4055         struct rte_udp_hdr *udp = NULL;
4056         char *next_hdr;
4057         uint16_t proto;
4058
4059         eth = (struct rte_ether_hdr *)data;
4060         next_hdr = (char *)(eth + 1);
4061         proto = RTE_BE16(eth->ether_type);
4062
4063         /* VLAN skipping */
4064         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4065                 vlan = (struct rte_vlan_hdr *)next_hdr;
4066                 proto = RTE_BE16(vlan->eth_proto);
4067                 next_hdr += sizeof(struct rte_vlan_hdr);
4068         }
4069
4070         /* HW calculates IPv4 csum. no need to proceed */
4071         if (proto == RTE_ETHER_TYPE_IPV4)
4072                 return 0;
4073
4074         /* non IPv4/IPv6 header. not supported */
4075         if (proto != RTE_ETHER_TYPE_IPV6) {
4076                 return rte_flow_error_set(error, ENOTSUP,
4077                                           RTE_FLOW_ERROR_TYPE_ACTION,
4078                                           NULL, "Cannot offload non IPv4/IPv6");
4079         }
4080
4081         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4082
4083         /* ignore non UDP */
4084         if (ipv6->proto != IPPROTO_UDP)
4085                 return 0;
4086
4087         udp = (struct rte_udp_hdr *)(ipv6 + 1);
4088         udp->dgram_cksum = 0;
4089
4090         return 0;
4091 }
4092
4093 /**
4094  * Convert L2 encap action to DV specification.
4095  *
4096  * @param[in] dev
4097  *   Pointer to rte_eth_dev structure.
4098  * @param[in] action
4099  *   Pointer to action structure.
4100  * @param[in, out] dev_flow
4101  *   Pointer to the mlx5_flow.
4102  * @param[in] transfer
4103  *   Mark if the flow is E-Switch flow.
4104  * @param[out] error
4105  *   Pointer to the error structure.
4106  *
4107  * @return
4108  *   0 on success, a negative errno value otherwise and rte_errno is set.
4109  */
4110 static int
4111 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4112                                const struct rte_flow_action *action,
4113                                struct mlx5_flow *dev_flow,
4114                                uint8_t transfer,
4115                                struct rte_flow_error *error)
4116 {
4117         const struct rte_flow_item *encap_data;
4118         const struct rte_flow_action_raw_encap *raw_encap_data;
4119         struct mlx5_flow_dv_encap_decap_resource res = {
4120                 .reformat_type =
4121                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4122                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4123                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4124         };
4125
4126         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4127                 raw_encap_data =
4128                         (const struct rte_flow_action_raw_encap *)action->conf;
4129                 res.size = raw_encap_data->size;
4130                 memcpy(res.buf, raw_encap_data->data, res.size);
4131         } else {
4132                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4133                         encap_data =
4134                                 ((const struct rte_flow_action_vxlan_encap *)
4135                                                 action->conf)->definition;
4136                 else
4137                         encap_data =
4138                                 ((const struct rte_flow_action_nvgre_encap *)
4139                                                 action->conf)->definition;
4140                 if (flow_dv_convert_encap_data(encap_data, res.buf,
4141                                                &res.size, error))
4142                         return -rte_errno;
4143         }
4144         if (flow_dv_zero_encap_udp_csum(res.buf, error))
4145                 return -rte_errno;
4146         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4147                 return rte_flow_error_set(error, EINVAL,
4148                                           RTE_FLOW_ERROR_TYPE_ACTION,
4149                                           NULL, "can't create L2 encap action");
4150         return 0;
4151 }
4152
4153 /**
4154  * Convert L2 decap action to DV specification.
4155  *
4156  * @param[in] dev
4157  *   Pointer to rte_eth_dev structure.
4158  * @param[in, out] dev_flow
4159  *   Pointer to the mlx5_flow.
4160  * @param[in] transfer
4161  *   Mark if the flow is E-Switch flow.
4162  * @param[out] error
4163  *   Pointer to the error structure.
4164  *
4165  * @return
4166  *   0 on success, a negative errno value otherwise and rte_errno is set.
4167  */
4168 static int
4169 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4170                                struct mlx5_flow *dev_flow,
4171                                uint8_t transfer,
4172                                struct rte_flow_error *error)
4173 {
4174         struct mlx5_flow_dv_encap_decap_resource res = {
4175                 .size = 0,
4176                 .reformat_type =
4177                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4178                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4179                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4180         };
4181
4182         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4183                 return rte_flow_error_set(error, EINVAL,
4184                                           RTE_FLOW_ERROR_TYPE_ACTION,
4185                                           NULL, "can't create L2 decap action");
4186         return 0;
4187 }
4188
4189 /**
4190  * Convert raw decap/encap (L3 tunnel) action to DV specification.
4191  *
4192  * @param[in] dev
4193  *   Pointer to rte_eth_dev structure.
4194  * @param[in] action
4195  *   Pointer to action structure.
4196  * @param[in, out] dev_flow
4197  *   Pointer to the mlx5_flow.
4198  * @param[in] attr
4199  *   Pointer to the flow attributes.
4200  * @param[out] error
4201  *   Pointer to the error structure.
4202  *
4203  * @return
4204  *   0 on success, a negative errno value otherwise and rte_errno is set.
4205  */
4206 static int
4207 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4208                                 const struct rte_flow_action *action,
4209                                 struct mlx5_flow *dev_flow,
4210                                 const struct rte_flow_attr *attr,
4211                                 struct rte_flow_error *error)
4212 {
4213         const struct rte_flow_action_raw_encap *encap_data;
4214         struct mlx5_flow_dv_encap_decap_resource res;
4215
4216         memset(&res, 0, sizeof(res));
4217         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4218         res.size = encap_data->size;
4219         memcpy(res.buf, encap_data->data, res.size);
4220         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4221                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4222                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4223         if (attr->transfer)
4224                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4225         else
4226                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4227                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4228         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4229                 return rte_flow_error_set(error, EINVAL,
4230                                           RTE_FLOW_ERROR_TYPE_ACTION,
4231                                           NULL, "can't create encap action");
4232         return 0;
4233 }
4234
4235 /**
4236  * Create action push VLAN.
4237  *
4238  * @param[in] dev
4239  *   Pointer to rte_eth_dev structure.
4240  * @param[in] attr
4241  *   Pointer to the flow attributes.
4242  * @param[in] vlan
4243  *   Pointer to the vlan to push to the Ethernet header.
4244  * @param[in, out] dev_flow
4245  *   Pointer to the mlx5_flow.
4246  * @param[out] error
4247  *   Pointer to the error structure.
4248  *
4249  * @return
4250  *   0 on success, a negative errno value otherwise and rte_errno is set.
4251  */
4252 static int
4253 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4254                                 const struct rte_flow_attr *attr,
4255                                 const struct rte_vlan_hdr *vlan,
4256                                 struct mlx5_flow *dev_flow,
4257                                 struct rte_flow_error *error)
4258 {
4259         struct mlx5_flow_dv_push_vlan_action_resource res;
4260
4261         memset(&res, 0, sizeof(res));
4262         res.vlan_tag =
4263                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4264                                  vlan->vlan_tci);
4265         if (attr->transfer)
4266                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4267         else
4268                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4269                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4270         return flow_dv_push_vlan_action_resource_register
4271                                             (dev, &res, dev_flow, error);
4272 }
4273
4274 /**
4275  * Validate the modify-header actions.
4276  *
4277  * @param[in] action_flags
4278  *   Holds the actions detected until now.
4279  * @param[in] action
4280  *   Pointer to the modify action.
4281  * @param[out] error
4282  *   Pointer to error structure.
4283  *
4284  * @return
4285  *   0 on success, a negative errno value otherwise and rte_errno is set.
4286  */
4287 static int
4288 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4289                                    const struct rte_flow_action *action,
4290                                    struct rte_flow_error *error)
4291 {
4292         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4293                 return rte_flow_error_set(error, EINVAL,
4294                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4295                                           NULL, "action configuration not set");
4296         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4297                 return rte_flow_error_set(error, EINVAL,
4298                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4299                                           "can't have encap action before"
4300                                           " modify action");
4301         return 0;
4302 }
4303
4304 /**
4305  * Validate the modify-header MAC address actions.
4306  *
4307  * @param[in] action_flags
4308  *   Holds the actions detected until now.
4309  * @param[in] action
4310  *   Pointer to the modify action.
4311  * @param[in] item_flags
4312  *   Holds the items detected.
4313  * @param[out] error
4314  *   Pointer to error structure.
4315  *
4316  * @return
4317  *   0 on success, a negative errno value otherwise and rte_errno is set.
4318  */
4319 static int
4320 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4321                                    const struct rte_flow_action *action,
4322                                    const uint64_t item_flags,
4323                                    struct rte_flow_error *error)
4324 {
4325         int ret = 0;
4326
4327         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4328         if (!ret) {
4329                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4330                         return rte_flow_error_set(error, EINVAL,
4331                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4332                                                   NULL,
4333                                                   "no L2 item in pattern");
4334         }
4335         return ret;
4336 }
4337
4338 /**
4339  * Validate the modify-header IPv4 address actions.
4340  *
4341  * @param[in] action_flags
4342  *   Holds the actions detected until now.
4343  * @param[in] action
4344  *   Pointer to the modify action.
4345  * @param[in] item_flags
4346  *   Holds the items detected.
4347  * @param[out] error
4348  *   Pointer to error structure.
4349  *
4350  * @return
4351  *   0 on success, a negative errno value otherwise and rte_errno is set.
4352  */
4353 static int
4354 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4355                                     const struct rte_flow_action *action,
4356                                     const uint64_t item_flags,
4357                                     struct rte_flow_error *error)
4358 {
4359         int ret = 0;
4360         uint64_t layer;
4361
4362         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4363         if (!ret) {
4364                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4365                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4366                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4367                 if (!(item_flags & layer))
4368                         return rte_flow_error_set(error, EINVAL,
4369                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4370                                                   NULL,
4371                                                   "no ipv4 item in pattern");
4372         }
4373         return ret;
4374 }
4375
4376 /**
4377  * Validate the modify-header IPv6 address actions.
4378  *
4379  * @param[in] action_flags
4380  *   Holds the actions detected until now.
4381  * @param[in] action
4382  *   Pointer to the modify action.
4383  * @param[in] item_flags
4384  *   Holds the items detected.
4385  * @param[out] error
4386  *   Pointer to error structure.
4387  *
4388  * @return
4389  *   0 on success, a negative errno value otherwise and rte_errno is set.
4390  */
4391 static int
4392 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4393                                     const struct rte_flow_action *action,
4394                                     const uint64_t item_flags,
4395                                     struct rte_flow_error *error)
4396 {
4397         int ret = 0;
4398         uint64_t layer;
4399
4400         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4401         if (!ret) {
4402                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4403                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4404                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4405                 if (!(item_flags & layer))
4406                         return rte_flow_error_set(error, EINVAL,
4407                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4408                                                   NULL,
4409                                                   "no ipv6 item in pattern");
4410         }
4411         return ret;
4412 }
4413
4414 /**
4415  * Validate the modify-header TP actions.
4416  *
4417  * @param[in] action_flags
4418  *   Holds the actions detected until now.
4419  * @param[in] action
4420  *   Pointer to the modify action.
4421  * @param[in] item_flags
4422  *   Holds the items detected.
4423  * @param[out] error
4424  *   Pointer to error structure.
4425  *
4426  * @return
4427  *   0 on success, a negative errno value otherwise and rte_errno is set.
4428  */
4429 static int
4430 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4431                                   const struct rte_flow_action *action,
4432                                   const uint64_t item_flags,
4433                                   struct rte_flow_error *error)
4434 {
4435         int ret = 0;
4436         uint64_t layer;
4437
4438         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4439         if (!ret) {
4440                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4441                                  MLX5_FLOW_LAYER_INNER_L4 :
4442                                  MLX5_FLOW_LAYER_OUTER_L4;
4443                 if (!(item_flags & layer))
4444                         return rte_flow_error_set(error, EINVAL,
4445                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4446                                                   NULL, "no transport layer "
4447                                                   "in pattern");
4448         }
4449         return ret;
4450 }
4451
4452 /**
4453  * Validate the modify-header actions of increment/decrement
4454  * TCP Sequence-number.
4455  *
4456  * @param[in] action_flags
4457  *   Holds the actions detected until now.
4458  * @param[in] action
4459  *   Pointer to the modify action.
4460  * @param[in] item_flags
4461  *   Holds the items detected.
4462  * @param[out] error
4463  *   Pointer to error structure.
4464  *
4465  * @return
4466  *   0 on success, a negative errno value otherwise and rte_errno is set.
4467  */
4468 static int
4469 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4470                                        const struct rte_flow_action *action,
4471                                        const uint64_t item_flags,
4472                                        struct rte_flow_error *error)
4473 {
4474         int ret = 0;
4475         uint64_t layer;
4476
4477         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4478         if (!ret) {
4479                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4480                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4481                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4482                 if (!(item_flags & layer))
4483                         return rte_flow_error_set(error, EINVAL,
4484                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4485                                                   NULL, "no TCP item in"
4486                                                   " pattern");
4487                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4488                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4489                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4490                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4491                         return rte_flow_error_set(error, EINVAL,
4492                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4493                                                   NULL,
4494                                                   "cannot decrease and increase"
4495                                                   " TCP sequence number"
4496                                                   " at the same time");
4497         }
4498         return ret;
4499 }
4500
4501 /**
4502  * Validate the modify-header actions of increment/decrement
4503  * TCP Acknowledgment number.
4504  *
4505  * @param[in] action_flags
4506  *   Holds the actions detected until now.
4507  * @param[in] action
4508  *   Pointer to the modify action.
4509  * @param[in] item_flags
4510  *   Holds the items detected.
4511  * @param[out] error
4512  *   Pointer to error structure.
4513  *
4514  * @return
4515  *   0 on success, a negative errno value otherwise and rte_errno is set.
4516  */
4517 static int
4518 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4519                                        const struct rte_flow_action *action,
4520                                        const uint64_t item_flags,
4521                                        struct rte_flow_error *error)
4522 {
4523         int ret = 0;
4524         uint64_t layer;
4525
4526         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4527         if (!ret) {
4528                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4529                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4530                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4531                 if (!(item_flags & layer))
4532                         return rte_flow_error_set(error, EINVAL,
4533                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4534                                                   NULL, "no TCP item in"
4535                                                   " pattern");
4536                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4537                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4538                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4539                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4540                         return rte_flow_error_set(error, EINVAL,
4541                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4542                                                   NULL,
4543                                                   "cannot decrease and increase"
4544                                                   " TCP acknowledgment number"
4545                                                   " at the same time");
4546         }
4547         return ret;
4548 }
4549
4550 /**
4551  * Validate the modify-header TTL actions.
4552  *
4553  * @param[in] action_flags
4554  *   Holds the actions detected until now.
4555  * @param[in] action
4556  *   Pointer to the modify action.
4557  * @param[in] item_flags
4558  *   Holds the items detected.
4559  * @param[out] error
4560  *   Pointer to error structure.
4561  *
4562  * @return
4563  *   0 on success, a negative errno value otherwise and rte_errno is set.
4564  */
4565 static int
4566 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4567                                    const struct rte_flow_action *action,
4568                                    const uint64_t item_flags,
4569                                    struct rte_flow_error *error)
4570 {
4571         int ret = 0;
4572         uint64_t layer;
4573
4574         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4575         if (!ret) {
4576                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4577                                  MLX5_FLOW_LAYER_INNER_L3 :
4578                                  MLX5_FLOW_LAYER_OUTER_L3;
4579                 if (!(item_flags & layer))
4580                         return rte_flow_error_set(error, EINVAL,
4581                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4582                                                   NULL,
4583                                                   "no IP protocol in pattern");
4584         }
4585         return ret;
4586 }
4587
4588 /**
4589  * Validate the generic modify field actions.
4590  * @param[in] dev
4591  *   Pointer to the rte_eth_dev structure.
4592  * @param[in] action_flags
4593  *   Holds the actions detected until now.
4594  * @param[in] action
4595  *   Pointer to the modify action.
4596  * @param[in] attr
4597  *   Pointer to the flow attributes.
4598  * @param[out] error
4599  *   Pointer to error structure.
4600  *
4601  * @return
4602  *   Number of header fields to modify (0 or more) on success,
4603  *   a negative errno value otherwise and rte_errno is set.
4604  */
4605 static int
4606 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4607                                    const uint64_t action_flags,
4608                                    const struct rte_flow_action *action,
4609                                    const struct rte_flow_attr *attr,
4610                                    struct rte_flow_error *error)
4611 {
4612         int ret = 0;
4613         struct mlx5_priv *priv = dev->data->dev_private;
4614         struct mlx5_dev_config *config = &priv->config;
4615         const struct rte_flow_action_modify_field *action_modify_field =
4616                 action->conf;
4617         uint32_t dst_width =
4618                 mlx5_flow_item_field_width(action_modify_field->dst.field);
4619         uint32_t src_width =
4620                 mlx5_flow_item_field_width(action_modify_field->src.field);
4621
4622         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4623         if (ret)
4624                 return ret;
4625
4626         if (action_modify_field->width == 0)
4627                 return rte_flow_error_set(error, EINVAL,
4628                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4629                                 "no bits are requested to be modified");
4630         else if (action_modify_field->width > dst_width ||
4631                  action_modify_field->width > src_width)
4632                 return rte_flow_error_set(error, EINVAL,
4633                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4634                                 "cannot modify more bits than"
4635                                 " the width of a field");
4636         if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4637             action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4638                 if ((action_modify_field->dst.offset +
4639                      action_modify_field->width > dst_width) ||
4640                     (action_modify_field->dst.offset % 32))
4641                         return rte_flow_error_set(error, EINVAL,
4642                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4643                                         "destination offset is too big"
4644                                         " or not aligned to 4 bytes");
4645                 if (action_modify_field->dst.level &&
4646                     action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4647                         return rte_flow_error_set(error, ENOTSUP,
4648                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4649                                         "inner header fields modification"
4650                                         " is not supported");
4651         }
4652         if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4653             action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4654                 if (!attr->transfer && !attr->group)
4655                         return rte_flow_error_set(error, ENOTSUP,
4656                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4657                                         "modify field action is not"
4658                                         " supported for group 0");
4659                 if ((action_modify_field->src.offset +
4660                      action_modify_field->width > src_width) ||
4661                     (action_modify_field->src.offset % 32))
4662                         return rte_flow_error_set(error, EINVAL,
4663                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4664                                         "source offset is too big"
4665                                         " or not aligned to 4 bytes");
4666                 if (action_modify_field->src.level &&
4667                     action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4668                         return rte_flow_error_set(error, ENOTSUP,
4669                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4670                                         "inner header fields modification"
4671                                         " is not supported");
4672         }
4673         if (action_modify_field->dst.field ==
4674             action_modify_field->src.field)
4675                 return rte_flow_error_set(error, EINVAL,
4676                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4677                                 "source and destination fields"
4678                                 " cannot be the same");
4679         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4680             action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER)
4681                 return rte_flow_error_set(error, EINVAL,
4682                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4683                                 "immediate value or a pointer to it"
4684                                 " cannot be used as a destination");
4685         if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4686             action_modify_field->src.field == RTE_FLOW_FIELD_START)
4687                 return rte_flow_error_set(error, ENOTSUP,
4688                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4689                                 "modifications of an arbitrary"
4690                                 " place in a packet is not supported");
4691         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4692             action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4693                 return rte_flow_error_set(error, ENOTSUP,
4694                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4695                                 "modifications of the 802.1Q Tag"
4696                                 " Identifier is not supported");
4697         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4698             action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4699                 return rte_flow_error_set(error, ENOTSUP,
4700                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4701                                 "modifications of the VXLAN Network"
4702                                 " Identifier is not supported");
4703         if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4704             action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4705                 return rte_flow_error_set(error, ENOTSUP,
4706                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4707                                 "modifications of the GENEVE Network"
4708                                 " Identifier is not supported");
4709         if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4710             action_modify_field->src.field == RTE_FLOW_FIELD_MARK ||
4711             action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4712             action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4713                 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4714                     !mlx5_flow_ext_mreg_supported(dev))
4715                         return rte_flow_error_set(error, ENOTSUP,
4716                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4717                                         "cannot modify mark or metadata without"
4718                                         " extended metadata register support");
4719         }
4720         if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4721                 return rte_flow_error_set(error, ENOTSUP,
4722                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4723                                 "add and sub operations"
4724                                 " are not supported");
4725         return (action_modify_field->width / 32) +
4726                !!(action_modify_field->width % 32);
4727 }
4728
4729 /**
4730  * Validate jump action.
4731  *
4732  * @param[in] action
4733  *   Pointer to the jump action.
4734  * @param[in] action_flags
4735  *   Holds the actions detected until now.
4736  * @param[in] attributes
4737  *   Pointer to flow attributes
4738  * @param[in] external
4739  *   Action belongs to flow rule created by request external to PMD.
4740  * @param[out] error
4741  *   Pointer to error structure.
4742  *
4743  * @return
4744  *   0 on success, a negative errno value otherwise and rte_errno is set.
4745  */
4746 static int
4747 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4748                              const struct mlx5_flow_tunnel *tunnel,
4749                              const struct rte_flow_action *action,
4750                              uint64_t action_flags,
4751                              const struct rte_flow_attr *attributes,
4752                              bool external, struct rte_flow_error *error)
4753 {
4754         uint32_t target_group, table;
4755         int ret = 0;
4756         struct flow_grp_info grp_info = {
4757                 .external = !!external,
4758                 .transfer = !!attributes->transfer,
4759                 .fdb_def_rule = 1,
4760                 .std_tbl_fix = 0
4761         };
4762         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4763                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4764                 return rte_flow_error_set(error, EINVAL,
4765                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4766                                           "can't have 2 fate actions in"
4767                                           " same flow");
4768         if (!action->conf)
4769                 return rte_flow_error_set(error, EINVAL,
4770                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4771                                           NULL, "action configuration not set");
4772         target_group =
4773                 ((const struct rte_flow_action_jump *)action->conf)->group;
4774         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
4775                                        &grp_info, error);
4776         if (ret)
4777                 return ret;
4778         if (attributes->group == target_group &&
4779             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
4780                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
4781                 return rte_flow_error_set(error, EINVAL,
4782                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4783                                           "target group must be other than"
4784                                           " the current flow group");
4785         return 0;
4786 }
4787
4788 /*
4789  * Validate the port_id action.
4790  *
4791  * @param[in] dev
4792  *   Pointer to rte_eth_dev structure.
4793  * @param[in] action_flags
4794  *   Bit-fields that holds the actions detected until now.
4795  * @param[in] action
4796  *   Port_id RTE action structure.
4797  * @param[in] attr
4798  *   Attributes of flow that includes this action.
4799  * @param[out] error
4800  *   Pointer to error structure.
4801  *
4802  * @return
4803  *   0 on success, a negative errno value otherwise and rte_errno is set.
4804  */
4805 static int
4806 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
4807                                 uint64_t action_flags,
4808                                 const struct rte_flow_action *action,
4809                                 const struct rte_flow_attr *attr,
4810                                 struct rte_flow_error *error)
4811 {
4812         const struct rte_flow_action_port_id *port_id;
4813         struct mlx5_priv *act_priv;
4814         struct mlx5_priv *dev_priv;
4815         uint16_t port;
4816
4817         if (!attr->transfer)
4818                 return rte_flow_error_set(error, ENOTSUP,
4819                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4820                                           NULL,
4821                                           "port id action is valid in transfer"
4822                                           " mode only");
4823         if (!action || !action->conf)
4824                 return rte_flow_error_set(error, ENOTSUP,
4825                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4826                                           NULL,
4827                                           "port id action parameters must be"
4828                                           " specified");
4829         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4830                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4831                 return rte_flow_error_set(error, EINVAL,
4832                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4833                                           "can have only one fate actions in"
4834                                           " a flow");
4835         dev_priv = mlx5_dev_to_eswitch_info(dev);
4836         if (!dev_priv)
4837                 return rte_flow_error_set(error, rte_errno,
4838                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4839                                           NULL,
4840                                           "failed to obtain E-Switch info");
4841         port_id = action->conf;
4842         port = port_id->original ? dev->data->port_id : port_id->id;
4843         act_priv = mlx5_port_to_eswitch_info(port, false);
4844         if (!act_priv)
4845                 return rte_flow_error_set
4846                                 (error, rte_errno,
4847                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
4848                                  "failed to obtain E-Switch port id for port");
4849         if (act_priv->domain_id != dev_priv->domain_id)
4850                 return rte_flow_error_set
4851                                 (error, EINVAL,
4852                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4853                                  "port does not belong to"
4854                                  " E-Switch being configured");
4855         return 0;
4856 }
4857
4858 /**
4859  * Get the maximum number of modify header actions.
4860  *
4861  * @param dev
4862  *   Pointer to rte_eth_dev structure.
4863  * @param flags
4864  *   Flags bits to check if root level.
4865  *
4866  * @return
4867  *   Max number of modify header actions device can support.
4868  */
4869 static inline unsigned int
4870 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
4871                               uint64_t flags)
4872 {
4873         /*
4874          * There's no way to directly query the max capacity from FW.
4875          * The maximal value on root table should be assumed to be supported.
4876          */
4877         if (!(flags & MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL))
4878                 return MLX5_MAX_MODIFY_NUM;
4879         else
4880                 return MLX5_ROOT_TBL_MODIFY_NUM;
4881 }
4882
4883 /**
4884  * Validate the meter action.
4885  *
4886  * @param[in] dev
4887  *   Pointer to rte_eth_dev structure.
4888  * @param[in] action_flags
4889  *   Bit-fields that holds the actions detected until now.
4890  * @param[in] action
4891  *   Pointer to the meter action.
4892  * @param[in] attr
4893  *   Attributes of flow that includes this action.
4894  * @param[out] error
4895  *   Pointer to error structure.
4896  *
4897  * @return
4898  *   0 on success, a negative errno value otherwise and rte_ernno is set.
4899  */
4900 static int
4901 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
4902                                 uint64_t action_flags,
4903                                 const struct rte_flow_action *action,
4904                                 const struct rte_flow_attr *attr,
4905                                 bool *def_policy,
4906                                 struct rte_flow_error *error)
4907 {
4908         struct mlx5_priv *priv = dev->data->dev_private;
4909         const struct rte_flow_action_meter *am = action->conf;
4910         struct mlx5_flow_meter_info *fm;
4911         struct mlx5_flow_meter_policy *mtr_policy;
4912         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
4913
4914         if (!am)
4915                 return rte_flow_error_set(error, EINVAL,
4916                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4917                                           "meter action conf is NULL");
4918
4919         if (action_flags & MLX5_FLOW_ACTION_METER)
4920                 return rte_flow_error_set(error, ENOTSUP,
4921                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4922                                           "meter chaining not support");
4923         if (action_flags & MLX5_FLOW_ACTION_JUMP)
4924                 return rte_flow_error_set(error, ENOTSUP,
4925                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4926                                           "meter with jump not support");
4927         if (!priv->mtr_en)
4928                 return rte_flow_error_set(error, ENOTSUP,
4929                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
4930                                           NULL,
4931                                           "meter action not supported");
4932         fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
4933         if (!fm)
4934                 return rte_flow_error_set(error, EINVAL,
4935                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4936                                           "Meter not found");
4937         /* aso meter can always be shared by different domains */
4938         if (fm->ref_cnt && !priv->sh->meter_aso_en &&
4939             !(fm->transfer == attr->transfer ||
4940               (!fm->ingress && !attr->ingress && attr->egress) ||
4941               (!fm->egress && !attr->egress && attr->ingress)))
4942                 return rte_flow_error_set(error, EINVAL,
4943                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4944                         "Flow attributes domain are either invalid "
4945                         "or have a domain conflict with current "
4946                         "meter attributes");
4947         if (fm->def_policy) {
4948                 if (!((attr->transfer &&
4949                         mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
4950                         (attr->egress &&
4951                         mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
4952                         (attr->ingress &&
4953                         mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
4954                         return rte_flow_error_set(error, EINVAL,
4955                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4956                                           "Flow attributes domain "
4957                                           "have a conflict with current "
4958                                           "meter domain attributes");
4959                 *def_policy = true;
4960         } else {
4961                 mtr_policy = mlx5_flow_meter_policy_find(dev,
4962                                                 fm->policy_id, NULL);
4963                 if (!mtr_policy)
4964                         return rte_flow_error_set(error, EINVAL,
4965                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4966                                           "Invalid policy id for meter ");
4967                 if (!((attr->transfer && mtr_policy->transfer) ||
4968                         (attr->egress && mtr_policy->egress) ||
4969                         (attr->ingress && mtr_policy->ingress)))
4970                         return rte_flow_error_set(error, EINVAL,
4971                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4972                                           "Flow attributes domain "
4973                                           "have a conflict with current "
4974                                           "meter domain attributes");
4975                 *def_policy = false;
4976         }
4977         return 0;
4978 }
4979
4980 /**
4981  * Validate the age action.
4982  *
4983  * @param[in] action_flags
4984  *   Holds the actions detected until now.
4985  * @param[in] action
4986  *   Pointer to the age action.
4987  * @param[in] dev
4988  *   Pointer to the Ethernet device structure.
4989  * @param[out] error
4990  *   Pointer to error structure.
4991  *
4992  * @return
4993  *   0 on success, a negative errno value otherwise and rte_errno is set.
4994  */
4995 static int
4996 flow_dv_validate_action_age(uint64_t action_flags,
4997                             const struct rte_flow_action *action,
4998                             struct rte_eth_dev *dev,
4999                             struct rte_flow_error *error)
5000 {
5001         struct mlx5_priv *priv = dev->data->dev_private;
5002         const struct rte_flow_action_age *age = action->conf;
5003
5004         if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
5005             !priv->sh->aso_age_mng))
5006                 return rte_flow_error_set(error, ENOTSUP,
5007                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5008                                           NULL,
5009                                           "age action not supported");
5010         if (!(action->conf))
5011                 return rte_flow_error_set(error, EINVAL,
5012                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5013                                           "configuration cannot be null");
5014         if (!(age->timeout))
5015                 return rte_flow_error_set(error, EINVAL,
5016                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5017                                           "invalid timeout value 0");
5018         if (action_flags & MLX5_FLOW_ACTION_AGE)
5019                 return rte_flow_error_set(error, EINVAL,
5020                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5021                                           "duplicate age actions set");
5022         return 0;
5023 }
5024
5025 /**
5026  * Validate the modify-header IPv4 DSCP actions.
5027  *
5028  * @param[in] action_flags
5029  *   Holds the actions detected until now.
5030  * @param[in] action
5031  *   Pointer to the modify action.
5032  * @param[in] item_flags
5033  *   Holds the items detected.
5034  * @param[out] error
5035  *   Pointer to error structure.
5036  *
5037  * @return
5038  *   0 on success, a negative errno value otherwise and rte_errno is set.
5039  */
5040 static int
5041 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5042                                          const struct rte_flow_action *action,
5043                                          const uint64_t item_flags,
5044                                          struct rte_flow_error *error)
5045 {
5046         int ret = 0;
5047
5048         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5049         if (!ret) {
5050                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5051                         return rte_flow_error_set(error, EINVAL,
5052                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5053                                                   NULL,
5054                                                   "no ipv4 item in pattern");
5055         }
5056         return ret;
5057 }
5058
5059 /**
5060  * Validate the modify-header IPv6 DSCP actions.
5061  *
5062  * @param[in] action_flags
5063  *   Holds the actions detected until now.
5064  * @param[in] action
5065  *   Pointer to the modify action.
5066  * @param[in] item_flags
5067  *   Holds the items detected.
5068  * @param[out] error
5069  *   Pointer to error structure.
5070  *
5071  * @return
5072  *   0 on success, a negative errno value otherwise and rte_errno is set.
5073  */
5074 static int
5075 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5076                                          const struct rte_flow_action *action,
5077                                          const uint64_t item_flags,
5078                                          struct rte_flow_error *error)
5079 {
5080         int ret = 0;
5081
5082         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5083         if (!ret) {
5084                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5085                         return rte_flow_error_set(error, EINVAL,
5086                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5087                                                   NULL,
5088                                                   "no ipv6 item in pattern");
5089         }
5090         return ret;
5091 }
5092
5093 /**
5094  * Match modify-header resource.
5095  *
5096  * @param list
5097  *   Pointer to the hash list.
5098  * @param entry
5099  *   Pointer to exist resource entry object.
5100  * @param key
5101  *   Key of the new entry.
5102  * @param ctx
5103  *   Pointer to new modify-header resource.
5104  *
5105  * @return
5106  *   0 on matching, non-zero otherwise.
5107  */
5108 int
5109 flow_dv_modify_match_cb(struct mlx5_hlist *list __rte_unused,
5110                         struct mlx5_hlist_entry *entry,
5111                         uint64_t key __rte_unused, void *cb_ctx)
5112 {
5113         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5114         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5115         struct mlx5_flow_dv_modify_hdr_resource *resource =
5116                         container_of(entry, typeof(*resource), entry);
5117         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5118
5119         key_len += ref->actions_num * sizeof(ref->actions[0]);
5120         return ref->actions_num != resource->actions_num ||
5121                memcmp(&ref->ft_type, &resource->ft_type, key_len);
5122 }
5123
5124 struct mlx5_hlist_entry *
5125 flow_dv_modify_create_cb(struct mlx5_hlist *list, uint64_t key __rte_unused,
5126                          void *cb_ctx)
5127 {
5128         struct mlx5_dev_ctx_shared *sh = list->ctx;
5129         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5130         struct mlx5dv_dr_domain *ns;
5131         struct mlx5_flow_dv_modify_hdr_resource *entry;
5132         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5133         int ret;
5134         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5135         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5136
5137         entry = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*entry) + data_len, 0,
5138                             SOCKET_ID_ANY);
5139         if (!entry) {
5140                 rte_flow_error_set(ctx->error, ENOMEM,
5141                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5142                                    "cannot allocate resource memory");
5143                 return NULL;
5144         }
5145         rte_memcpy(&entry->ft_type,
5146                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5147                    key_len + data_len);
5148         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5149                 ns = sh->fdb_domain;
5150         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5151                 ns = sh->tx_domain;
5152         else
5153                 ns = sh->rx_domain;
5154         ret = mlx5_flow_os_create_flow_action_modify_header
5155                                         (sh->ctx, ns, entry,
5156                                          data_len, &entry->action);
5157         if (ret) {
5158                 mlx5_free(entry);
5159                 rte_flow_error_set(ctx->error, ENOMEM,
5160                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5161                                    NULL, "cannot create modification action");
5162                 return NULL;
5163         }
5164         return &entry->entry;
5165 }
5166
5167 /**
5168  * Validate the sample action.
5169  *
5170  * @param[in, out] action_flags
5171  *   Holds the actions detected until now.
5172  * @param[in] action
5173  *   Pointer to the sample action.
5174  * @param[in] dev
5175  *   Pointer to the Ethernet device structure.
5176  * @param[in] attr
5177  *   Attributes of flow that includes this action.
5178  * @param[in] item_flags
5179  *   Holds the items detected.
5180  * @param[in] rss
5181  *   Pointer to the RSS action.
5182  * @param[out] sample_rss
5183  *   Pointer to the RSS action in sample action list.
5184  * @param[out] count
5185  *   Pointer to the COUNT action in sample action list.
5186  * @param[out] fdb_mirror_limit
5187  *   Pointer to the FDB mirror limitation flag.
5188  * @param[out] error
5189  *   Pointer to error structure.
5190  *
5191  * @return
5192  *   0 on success, a negative errno value otherwise and rte_errno is set.
5193  */
5194 static int
5195 flow_dv_validate_action_sample(uint64_t *action_flags,
5196                                const struct rte_flow_action *action,
5197                                struct rte_eth_dev *dev,
5198                                const struct rte_flow_attr *attr,
5199                                uint64_t item_flags,
5200                                const struct rte_flow_action_rss *rss,
5201                                const struct rte_flow_action_rss **sample_rss,
5202                                const struct rte_flow_action_count **count,
5203                                int *fdb_mirror_limit,
5204                                struct rte_flow_error *error)
5205 {
5206         struct mlx5_priv *priv = dev->data->dev_private;
5207         struct mlx5_dev_config *dev_conf = &priv->config;
5208         const struct rte_flow_action_sample *sample = action->conf;
5209         const struct rte_flow_action *act;
5210         uint64_t sub_action_flags = 0;
5211         uint16_t queue_index = 0xFFFF;
5212         int actions_n = 0;
5213         int ret;
5214
5215         if (!sample)
5216                 return rte_flow_error_set(error, EINVAL,
5217                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5218                                           "configuration cannot be NULL");
5219         if (sample->ratio == 0)
5220                 return rte_flow_error_set(error, EINVAL,
5221                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5222                                           "ratio value starts from 1");
5223         if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
5224                 return rte_flow_error_set(error, ENOTSUP,
5225                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5226                                           NULL,
5227                                           "sample action not supported");
5228         if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5229                 return rte_flow_error_set(error, EINVAL,
5230                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5231                                           "Multiple sample actions not "
5232                                           "supported");
5233         if (*action_flags & MLX5_FLOW_ACTION_METER)
5234                 return rte_flow_error_set(error, EINVAL,
5235                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5236                                           "wrong action order, meter should "
5237                                           "be after sample action");
5238         if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5239                 return rte_flow_error_set(error, EINVAL,
5240                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5241                                           "wrong action order, jump should "
5242                                           "be after sample action");
5243         act = sample->actions;
5244         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5245                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5246                         return rte_flow_error_set(error, ENOTSUP,
5247                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5248                                                   act, "too many actions");
5249                 switch (act->type) {
5250                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5251                         ret = mlx5_flow_validate_action_queue(act,
5252                                                               sub_action_flags,
5253                                                               dev,
5254                                                               attr, error);
5255                         if (ret < 0)
5256                                 return ret;
5257                         queue_index = ((const struct rte_flow_action_queue *)
5258                                                         (act->conf))->index;
5259                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5260                         ++actions_n;
5261                         break;
5262                 case RTE_FLOW_ACTION_TYPE_RSS:
5263                         *sample_rss = act->conf;
5264                         ret = mlx5_flow_validate_action_rss(act,
5265                                                             sub_action_flags,
5266                                                             dev, attr,
5267                                                             item_flags,
5268                                                             error);
5269                         if (ret < 0)
5270                                 return ret;
5271                         if (rss && *sample_rss &&
5272                             ((*sample_rss)->level != rss->level ||
5273                             (*sample_rss)->types != rss->types))
5274                                 return rte_flow_error_set(error, ENOTSUP,
5275                                         RTE_FLOW_ERROR_TYPE_ACTION,
5276                                         NULL,
5277                                         "Can't use the different RSS types "
5278                                         "or level in the same flow");
5279                         if (*sample_rss != NULL && (*sample_rss)->queue_num)
5280                                 queue_index = (*sample_rss)->queue[0];
5281                         sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5282                         ++actions_n;
5283                         break;
5284                 case RTE_FLOW_ACTION_TYPE_MARK:
5285                         ret = flow_dv_validate_action_mark(dev, act,
5286                                                            sub_action_flags,
5287                                                            attr, error);
5288                         if (ret < 0)
5289                                 return ret;
5290                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5291                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5292                                                 MLX5_FLOW_ACTION_MARK_EXT;
5293                         else
5294                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5295                         ++actions_n;
5296                         break;
5297                 case RTE_FLOW_ACTION_TYPE_COUNT:
5298                         ret = flow_dv_validate_action_count
5299                                 (dev, is_shared_action_count(act),
5300                                  *action_flags | sub_action_flags,
5301                                  error);
5302                         if (ret < 0)
5303                                 return ret;
5304                         *count = act->conf;
5305                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5306                         *action_flags |= MLX5_FLOW_ACTION_COUNT;
5307                         ++actions_n;
5308                         break;
5309                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5310                         ret = flow_dv_validate_action_port_id(dev,
5311                                                               sub_action_flags,
5312                                                               act,
5313                                                               attr,
5314                                                               error);
5315                         if (ret)
5316                                 return ret;
5317                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5318                         ++actions_n;
5319                         break;
5320                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5321                         ret = flow_dv_validate_action_raw_encap_decap
5322                                 (dev, NULL, act->conf, attr, &sub_action_flags,
5323                                  &actions_n, action, item_flags, error);
5324                         if (ret < 0)
5325                                 return ret;
5326                         ++actions_n;
5327                         break;
5328                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5329                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5330                         ret = flow_dv_validate_action_l2_encap(dev,
5331                                                                sub_action_flags,
5332                                                                act, attr,
5333                                                                error);
5334                         if (ret < 0)
5335                                 return ret;
5336                         sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5337                         ++actions_n;
5338                         break;
5339                 default:
5340                         return rte_flow_error_set(error, ENOTSUP,
5341                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5342                                                   NULL,
5343                                                   "Doesn't support optional "
5344                                                   "action");
5345                 }
5346         }
5347         if (attr->ingress && !attr->transfer) {
5348                 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5349                                           MLX5_FLOW_ACTION_RSS)))
5350                         return rte_flow_error_set(error, EINVAL,
5351                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5352                                                   NULL,
5353                                                   "Ingress must has a dest "
5354                                                   "QUEUE for Sample");
5355         } else if (attr->egress && !attr->transfer) {
5356                 return rte_flow_error_set(error, ENOTSUP,
5357                                           RTE_FLOW_ERROR_TYPE_ACTION,
5358                                           NULL,
5359                                           "Sample Only support Ingress "
5360                                           "or E-Switch");
5361         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5362                 MLX5_ASSERT(attr->transfer);
5363                 if (sample->ratio > 1)
5364                         return rte_flow_error_set(error, ENOTSUP,
5365                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5366                                                   NULL,
5367                                                   "E-Switch doesn't support "
5368                                                   "any optional action "
5369                                                   "for sampling");
5370                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5371                         return rte_flow_error_set(error, ENOTSUP,
5372                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5373                                                   NULL,
5374                                                   "unsupported action QUEUE");
5375                 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5376                         return rte_flow_error_set(error, ENOTSUP,
5377                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5378                                                   NULL,
5379                                                   "unsupported action QUEUE");
5380                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5381                         return rte_flow_error_set(error, EINVAL,
5382                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5383                                                   NULL,
5384                                                   "E-Switch must has a dest "
5385                                                   "port for mirroring");
5386                 if (!priv->config.hca_attr.reg_c_preserve &&
5387                      priv->representor_id != -1)
5388                         *fdb_mirror_limit = 1;
5389         }
5390         /* Continue validation for Xcap actions.*/
5391         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5392             (queue_index == 0xFFFF ||
5393              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5394                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5395                      MLX5_FLOW_XCAP_ACTIONS)
5396                         return rte_flow_error_set(error, ENOTSUP,
5397                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5398                                                   NULL, "encap and decap "
5399                                                   "combination aren't "
5400                                                   "supported");
5401                 if (!attr->transfer && attr->ingress && (sub_action_flags &
5402                                                         MLX5_FLOW_ACTION_ENCAP))
5403                         return rte_flow_error_set(error, ENOTSUP,
5404                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5405                                                   NULL, "encap is not supported"
5406                                                   " for ingress traffic");
5407         }
5408         return 0;
5409 }
5410
5411 /**
5412  * Find existing modify-header resource or create and register a new one.
5413  *
5414  * @param dev[in, out]
5415  *   Pointer to rte_eth_dev structure.
5416  * @param[in, out] resource
5417  *   Pointer to modify-header resource.
5418  * @parm[in, out] dev_flow
5419  *   Pointer to the dev_flow.
5420  * @param[out] error
5421  *   pointer to error structure.
5422  *
5423  * @return
5424  *   0 on success otherwise -errno and errno is set.
5425  */
5426 static int
5427 flow_dv_modify_hdr_resource_register
5428                         (struct rte_eth_dev *dev,
5429                          struct mlx5_flow_dv_modify_hdr_resource *resource,
5430                          struct mlx5_flow *dev_flow,
5431                          struct rte_flow_error *error)
5432 {
5433         struct mlx5_priv *priv = dev->data->dev_private;
5434         struct mlx5_dev_ctx_shared *sh = priv->sh;
5435         uint32_t key_len = sizeof(*resource) -
5436                            offsetof(typeof(*resource), ft_type) +
5437                            resource->actions_num * sizeof(resource->actions[0]);
5438         struct mlx5_hlist_entry *entry;
5439         struct mlx5_flow_cb_ctx ctx = {
5440                 .error = error,
5441                 .data = resource,
5442         };
5443         uint64_t key64;
5444
5445         resource->flags = dev_flow->dv.group ? 0 :
5446                           MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
5447         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5448                                     resource->flags))
5449                 return rte_flow_error_set(error, EOVERFLOW,
5450                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5451                                           "too many modify header items");
5452         key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5453         entry = mlx5_hlist_register(sh->modify_cmds, key64, &ctx);
5454         if (!entry)
5455                 return -rte_errno;
5456         resource = container_of(entry, typeof(*resource), entry);
5457         dev_flow->handle->dvh.modify_hdr = resource;
5458         return 0;
5459 }
5460
5461 /**
5462  * Get DV flow counter by index.
5463  *
5464  * @param[in] dev
5465  *   Pointer to the Ethernet device structure.
5466  * @param[in] idx
5467  *   mlx5 flow counter index in the container.
5468  * @param[out] ppool
5469  *   mlx5 flow counter pool in the container.
5470  *
5471  * @return
5472  *   Pointer to the counter, NULL otherwise.
5473  */
5474 static struct mlx5_flow_counter *
5475 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5476                            uint32_t idx,
5477                            struct mlx5_flow_counter_pool **ppool)
5478 {
5479         struct mlx5_priv *priv = dev->data->dev_private;
5480         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5481         struct mlx5_flow_counter_pool *pool;
5482
5483         /* Decrease to original index and clear shared bit. */
5484         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5485         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5486         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5487         MLX5_ASSERT(pool);
5488         if (ppool)
5489                 *ppool = pool;
5490         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5491 }
5492
5493 /**
5494  * Check the devx counter belongs to the pool.
5495  *
5496  * @param[in] pool
5497  *   Pointer to the counter pool.
5498  * @param[in] id
5499  *   The counter devx ID.
5500  *
5501  * @return
5502  *   True if counter belongs to the pool, false otherwise.
5503  */
5504 static bool
5505 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5506 {
5507         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5508                    MLX5_COUNTERS_PER_POOL;
5509
5510         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5511                 return true;
5512         return false;
5513 }
5514
5515 /**
5516  * Get a pool by devx counter ID.
5517  *
5518  * @param[in] cmng
5519  *   Pointer to the counter management.
5520  * @param[in] id
5521  *   The counter devx ID.
5522  *
5523  * @return
5524  *   The counter pool pointer if exists, NULL otherwise,
5525  */
5526 static struct mlx5_flow_counter_pool *
5527 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5528 {
5529         uint32_t i;
5530         struct mlx5_flow_counter_pool *pool = NULL;
5531
5532         rte_spinlock_lock(&cmng->pool_update_sl);
5533         /* Check last used pool. */
5534         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5535             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5536                 pool = cmng->pools[cmng->last_pool_idx];
5537                 goto out;
5538         }
5539         /* ID out of range means no suitable pool in the container. */
5540         if (id > cmng->max_id || id < cmng->min_id)
5541                 goto out;
5542         /*
5543          * Find the pool from the end of the container, since mostly counter
5544          * ID is sequence increasing, and the last pool should be the needed
5545          * one.
5546          */
5547         i = cmng->n_valid;
5548         while (i--) {
5549                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5550
5551                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5552                         pool = pool_tmp;
5553                         break;
5554                 }
5555         }
5556 out:
5557         rte_spinlock_unlock(&cmng->pool_update_sl);
5558         return pool;
5559 }
5560
5561 /**
5562  * Resize a counter container.
5563  *
5564  * @param[in] dev
5565  *   Pointer to the Ethernet device structure.
5566  *
5567  * @return
5568  *   0 on success, otherwise negative errno value and rte_errno is set.
5569  */
5570 static int
5571 flow_dv_container_resize(struct rte_eth_dev *dev)
5572 {
5573         struct mlx5_priv *priv = dev->data->dev_private;
5574         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5575         void *old_pools = cmng->pools;
5576         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5577         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5578         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5579
5580         if (!pools) {
5581                 rte_errno = ENOMEM;
5582                 return -ENOMEM;
5583         }
5584         if (old_pools)
5585                 memcpy(pools, old_pools, cmng->n *
5586                                        sizeof(struct mlx5_flow_counter_pool *));
5587         cmng->n = resize;
5588         cmng->pools = pools;
5589         if (old_pools)
5590                 mlx5_free(old_pools);
5591         return 0;
5592 }
5593
5594 /**
5595  * Query a devx flow counter.
5596  *
5597  * @param[in] dev
5598  *   Pointer to the Ethernet device structure.
5599  * @param[in] counter
5600  *   Index to the flow counter.
5601  * @param[out] pkts
5602  *   The statistics value of packets.
5603  * @param[out] bytes
5604  *   The statistics value of bytes.
5605  *
5606  * @return
5607  *   0 on success, otherwise a negative errno value and rte_errno is set.
5608  */
5609 static inline int
5610 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5611                      uint64_t *bytes)
5612 {
5613         struct mlx5_priv *priv = dev->data->dev_private;
5614         struct mlx5_flow_counter_pool *pool = NULL;
5615         struct mlx5_flow_counter *cnt;
5616         int offset;
5617
5618         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5619         MLX5_ASSERT(pool);
5620         if (priv->sh->cmng.counter_fallback)
5621                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
5622                                         0, pkts, bytes, 0, NULL, NULL, 0);
5623         rte_spinlock_lock(&pool->sl);
5624         if (!pool->raw) {
5625                 *pkts = 0;
5626                 *bytes = 0;
5627         } else {
5628                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
5629                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
5630                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
5631         }
5632         rte_spinlock_unlock(&pool->sl);
5633         return 0;
5634 }
5635
5636 /**
5637  * Create and initialize a new counter pool.
5638  *
5639  * @param[in] dev
5640  *   Pointer to the Ethernet device structure.
5641  * @param[out] dcs
5642  *   The devX counter handle.
5643  * @param[in] age
5644  *   Whether the pool is for counter that was allocated for aging.
5645  * @param[in/out] cont_cur
5646  *   Pointer to the container pointer, it will be update in pool resize.
5647  *
5648  * @return
5649  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
5650  */
5651 static struct mlx5_flow_counter_pool *
5652 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
5653                     uint32_t age)
5654 {
5655         struct mlx5_priv *priv = dev->data->dev_private;
5656         struct mlx5_flow_counter_pool *pool;
5657         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5658         bool fallback = priv->sh->cmng.counter_fallback;
5659         uint32_t size = sizeof(*pool);
5660
5661         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
5662         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
5663         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
5664         if (!pool) {
5665                 rte_errno = ENOMEM;
5666                 return NULL;
5667         }
5668         pool->raw = NULL;
5669         pool->is_aged = !!age;
5670         pool->query_gen = 0;
5671         pool->min_dcs = dcs;
5672         rte_spinlock_init(&pool->sl);
5673         rte_spinlock_init(&pool->csl);
5674         TAILQ_INIT(&pool->counters[0]);
5675         TAILQ_INIT(&pool->counters[1]);
5676         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
5677         rte_spinlock_lock(&cmng->pool_update_sl);
5678         pool->index = cmng->n_valid;
5679         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
5680                 mlx5_free(pool);
5681                 rte_spinlock_unlock(&cmng->pool_update_sl);
5682                 return NULL;
5683         }
5684         cmng->pools[pool->index] = pool;
5685         cmng->n_valid++;
5686         if (unlikely(fallback)) {
5687                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
5688
5689                 if (base < cmng->min_id)
5690                         cmng->min_id = base;
5691                 if (base > cmng->max_id)
5692                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
5693                 cmng->last_pool_idx = pool->index;
5694         }
5695         rte_spinlock_unlock(&cmng->pool_update_sl);
5696         return pool;
5697 }
5698
5699 /**
5700  * Prepare a new counter and/or a new counter pool.
5701  *
5702  * @param[in] dev
5703  *   Pointer to the Ethernet device structure.
5704  * @param[out] cnt_free
5705  *   Where to put the pointer of a new counter.
5706  * @param[in] age
5707  *   Whether the pool is for counter that was allocated for aging.
5708  *
5709  * @return
5710  *   The counter pool pointer and @p cnt_free is set on success,
5711  *   NULL otherwise and rte_errno is set.
5712  */
5713 static struct mlx5_flow_counter_pool *
5714 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
5715                              struct mlx5_flow_counter **cnt_free,
5716                              uint32_t age)
5717 {
5718         struct mlx5_priv *priv = dev->data->dev_private;
5719         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5720         struct mlx5_flow_counter_pool *pool;
5721         struct mlx5_counters tmp_tq;
5722         struct mlx5_devx_obj *dcs = NULL;
5723         struct mlx5_flow_counter *cnt;
5724         enum mlx5_counter_type cnt_type =
5725                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
5726         bool fallback = priv->sh->cmng.counter_fallback;
5727         uint32_t i;
5728
5729         if (fallback) {
5730                 /* bulk_bitmap must be 0 for single counter allocation. */
5731                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
5732                 if (!dcs)
5733                         return NULL;
5734                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
5735                 if (!pool) {
5736                         pool = flow_dv_pool_create(dev, dcs, age);
5737                         if (!pool) {
5738                                 mlx5_devx_cmd_destroy(dcs);
5739                                 return NULL;
5740                         }
5741                 }
5742                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
5743                 cnt = MLX5_POOL_GET_CNT(pool, i);
5744                 cnt->pool = pool;
5745                 cnt->dcs_when_free = dcs;
5746                 *cnt_free = cnt;
5747                 return pool;
5748         }
5749         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
5750         if (!dcs) {
5751                 rte_errno = ENODATA;
5752                 return NULL;
5753         }
5754         pool = flow_dv_pool_create(dev, dcs, age);
5755         if (!pool) {
5756                 mlx5_devx_cmd_destroy(dcs);
5757                 return NULL;
5758         }
5759         TAILQ_INIT(&tmp_tq);
5760         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
5761                 cnt = MLX5_POOL_GET_CNT(pool, i);
5762                 cnt->pool = pool;
5763                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
5764         }
5765         rte_spinlock_lock(&cmng->csl[cnt_type]);
5766         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
5767         rte_spinlock_unlock(&cmng->csl[cnt_type]);
5768         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
5769         (*cnt_free)->pool = pool;
5770         return pool;
5771 }
5772
5773 /**
5774  * Allocate a flow counter.
5775  *
5776  * @param[in] dev
5777  *   Pointer to the Ethernet device structure.
5778  * @param[in] age
5779  *   Whether the counter was allocated for aging.
5780  *
5781  * @return
5782  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
5783  */
5784 static uint32_t
5785 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
5786 {
5787         struct mlx5_priv *priv = dev->data->dev_private;
5788         struct mlx5_flow_counter_pool *pool = NULL;
5789         struct mlx5_flow_counter *cnt_free = NULL;
5790         bool fallback = priv->sh->cmng.counter_fallback;
5791         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5792         enum mlx5_counter_type cnt_type =
5793                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
5794         uint32_t cnt_idx;
5795
5796         if (!priv->config.devx) {
5797                 rte_errno = ENOTSUP;
5798                 return 0;
5799         }
5800         /* Get free counters from container. */
5801         rte_spinlock_lock(&cmng->csl[cnt_type]);
5802         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
5803         if (cnt_free)
5804                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
5805         rte_spinlock_unlock(&cmng->csl[cnt_type]);
5806         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
5807                 goto err;
5808         pool = cnt_free->pool;
5809         if (fallback)
5810                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
5811         /* Create a DV counter action only in the first time usage. */
5812         if (!cnt_free->action) {
5813                 uint16_t offset;
5814                 struct mlx5_devx_obj *dcs;
5815                 int ret;
5816
5817                 if (!fallback) {
5818                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
5819                         dcs = pool->min_dcs;
5820                 } else {
5821                         offset = 0;
5822                         dcs = cnt_free->dcs_when_free;
5823                 }
5824                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
5825                                                             &cnt_free->action);
5826                 if (ret) {
5827                         rte_errno = errno;
5828                         goto err;
5829                 }
5830         }
5831         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
5832                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
5833         /* Update the counter reset values. */
5834         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
5835                                  &cnt_free->bytes))
5836                 goto err;
5837         if (!fallback && !priv->sh->cmng.query_thread_on)
5838                 /* Start the asynchronous batch query by the host thread. */
5839                 mlx5_set_query_alarm(priv->sh);
5840         /*
5841          * When the count action isn't shared (by ID), shared_info field is
5842          * used for indirect action API's refcnt.
5843          * When the counter action is not shared neither by ID nor by indirect
5844          * action API, shared info must be 1.
5845          */
5846         cnt_free->shared_info.refcnt = 1;
5847         return cnt_idx;
5848 err:
5849         if (cnt_free) {
5850                 cnt_free->pool = pool;
5851                 if (fallback)
5852                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
5853                 rte_spinlock_lock(&cmng->csl[cnt_type]);
5854                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
5855                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
5856         }
5857         return 0;
5858 }
5859
5860 /**
5861  * Allocate a shared flow counter.
5862  *
5863  * @param[in] ctx
5864  *   Pointer to the shared counter configuration.
5865  * @param[in] data
5866  *   Pointer to save the allocated counter index.
5867  *
5868  * @return
5869  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
5870  */
5871
5872 static int32_t
5873 flow_dv_counter_alloc_shared_cb(void *ctx, union mlx5_l3t_data *data)
5874 {
5875         struct mlx5_shared_counter_conf *conf = ctx;
5876         struct rte_eth_dev *dev = conf->dev;
5877         struct mlx5_flow_counter *cnt;
5878
5879         data->dword = flow_dv_counter_alloc(dev, 0);
5880         data->dword |= MLX5_CNT_SHARED_OFFSET;
5881         cnt = flow_dv_counter_get_by_idx(dev, data->dword, NULL);
5882         cnt->shared_info.id = conf->id;
5883         return 0;
5884 }
5885
5886 /**
5887  * Get a shared flow counter.
5888  *
5889  * @param[in] dev
5890  *   Pointer to the Ethernet device structure.
5891  * @param[in] id
5892  *   Counter identifier.
5893  *
5894  * @return
5895  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
5896  */
5897 static uint32_t
5898 flow_dv_counter_get_shared(struct rte_eth_dev *dev, uint32_t id)
5899 {
5900         struct mlx5_priv *priv = dev->data->dev_private;
5901         struct mlx5_shared_counter_conf conf = {
5902                 .dev = dev,
5903                 .id = id,
5904         };
5905         union mlx5_l3t_data data = {
5906                 .dword = 0,
5907         };
5908
5909         mlx5_l3t_prepare_entry(priv->sh->cnt_id_tbl, id, &data,
5910                                flow_dv_counter_alloc_shared_cb, &conf);
5911         return data.dword;
5912 }
5913
5914 /**
5915  * Get age param from counter index.
5916  *
5917  * @param[in] dev
5918  *   Pointer to the Ethernet device structure.
5919  * @param[in] counter
5920  *   Index to the counter handler.
5921  *
5922  * @return
5923  *   The aging parameter specified for the counter index.
5924  */
5925 static struct mlx5_age_param*
5926 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
5927                                 uint32_t counter)
5928 {
5929         struct mlx5_flow_counter *cnt;
5930         struct mlx5_flow_counter_pool *pool = NULL;
5931
5932         flow_dv_counter_get_by_idx(dev, counter, &pool);
5933         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
5934         cnt = MLX5_POOL_GET_CNT(pool, counter);
5935         return MLX5_CNT_TO_AGE(cnt);
5936 }
5937
5938 /**
5939  * Remove a flow counter from aged counter list.
5940  *
5941  * @param[in] dev
5942  *   Pointer to the Ethernet device structure.
5943  * @param[in] counter
5944  *   Index to the counter handler.
5945  * @param[in] cnt
5946  *   Pointer to the counter handler.
5947  */
5948 static void
5949 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
5950                                 uint32_t counter, struct mlx5_flow_counter *cnt)
5951 {
5952         struct mlx5_age_info *age_info;
5953         struct mlx5_age_param *age_param;
5954         struct mlx5_priv *priv = dev->data->dev_private;
5955         uint16_t expected = AGE_CANDIDATE;
5956
5957         age_info = GET_PORT_AGE_INFO(priv);
5958         age_param = flow_dv_counter_idx_get_age(dev, counter);
5959         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
5960                                          AGE_FREE, false, __ATOMIC_RELAXED,
5961                                          __ATOMIC_RELAXED)) {
5962                 /**
5963                  * We need the lock even it is age timeout,
5964                  * since counter may still in process.
5965                  */
5966                 rte_spinlock_lock(&age_info->aged_sl);
5967                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
5968                 rte_spinlock_unlock(&age_info->aged_sl);
5969                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
5970         }
5971 }
5972
5973 /**
5974  * Release a flow counter.
5975  *
5976  * @param[in] dev
5977  *   Pointer to the Ethernet device structure.
5978  * @param[in] counter
5979  *   Index to the counter handler.
5980  */
5981 static void
5982 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
5983 {
5984         struct mlx5_priv *priv = dev->data->dev_private;
5985         struct mlx5_flow_counter_pool *pool = NULL;
5986         struct mlx5_flow_counter *cnt;
5987         enum mlx5_counter_type cnt_type;
5988
5989         if (!counter)
5990                 return;
5991         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5992         MLX5_ASSERT(pool);
5993         /*
5994          * If the counter action is shared by ID, the l3t_clear_entry function
5995          * reduces its references counter. If after the reduction the action is
5996          * still referenced, the function returns here and does not release it.
5997          */
5998         if (IS_LEGACY_SHARED_CNT(counter) &&
5999             mlx5_l3t_clear_entry(priv->sh->cnt_id_tbl, cnt->shared_info.id))
6000                 return;
6001         /*
6002          * If the counter action is shared by indirect action API, the atomic
6003          * function reduces its references counter. If after the reduction the
6004          * action is still referenced, the function returns here and does not
6005          * release it.
6006          * When the counter action is not shared neither by ID nor by indirect
6007          * action API, shared info is 1 before the reduction, so this condition
6008          * is failed and function doesn't return here.
6009          */
6010         if (!IS_LEGACY_SHARED_CNT(counter) &&
6011             __atomic_sub_fetch(&cnt->shared_info.refcnt, 1, __ATOMIC_RELAXED))
6012                 return;
6013         if (pool->is_aged)
6014                 flow_dv_counter_remove_from_age(dev, counter, cnt);
6015         cnt->pool = pool;
6016         /*
6017          * Put the counter back to list to be updated in none fallback mode.
6018          * Currently, we are using two list alternately, while one is in query,
6019          * add the freed counter to the other list based on the pool query_gen
6020          * value. After query finishes, add counter the list to the global
6021          * container counter list. The list changes while query starts. In
6022          * this case, lock will not be needed as query callback and release
6023          * function both operate with the different list.
6024          */
6025         if (!priv->sh->cmng.counter_fallback) {
6026                 rte_spinlock_lock(&pool->csl);
6027                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6028                 rte_spinlock_unlock(&pool->csl);
6029         } else {
6030                 cnt->dcs_when_free = cnt->dcs_when_active;
6031                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6032                                            MLX5_COUNTER_TYPE_ORIGIN;
6033                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6034                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6035                                   cnt, next);
6036                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6037         }
6038 }
6039
6040 /**
6041  * Resize a meter id container.
6042  *
6043  * @param[in] dev
6044  *   Pointer to the Ethernet device structure.
6045  *
6046  * @return
6047  *   0 on success, otherwise negative errno value and rte_errno is set.
6048  */
6049 static int
6050 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6051 {
6052         struct mlx5_priv *priv = dev->data->dev_private;
6053         struct mlx5_aso_mtr_pools_mng *pools_mng =
6054                                 &priv->sh->mtrmng->pools_mng;
6055         void *old_pools = pools_mng->pools;
6056         uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6057         uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6058         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6059
6060         if (!pools) {
6061                 rte_errno = ENOMEM;
6062                 return -ENOMEM;
6063         }
6064         if (!pools_mng->n)
6065                 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6066                         mlx5_free(pools);
6067                         return -ENOMEM;
6068                 }
6069         if (old_pools)
6070                 memcpy(pools, old_pools, pools_mng->n *
6071                                        sizeof(struct mlx5_aso_mtr_pool *));
6072         pools_mng->n = resize;
6073         pools_mng->pools = pools;
6074         if (old_pools)
6075                 mlx5_free(old_pools);
6076         return 0;
6077 }
6078
6079 /**
6080  * Prepare a new meter and/or a new meter pool.
6081  *
6082  * @param[in] dev
6083  *   Pointer to the Ethernet device structure.
6084  * @param[out] mtr_free
6085  *   Where to put the pointer of a new meter.g.
6086  *
6087  * @return
6088  *   The meter pool pointer and @mtr_free is set on success,
6089  *   NULL otherwise and rte_errno is set.
6090  */
6091 static struct mlx5_aso_mtr_pool *
6092 flow_dv_mtr_pool_create(struct rte_eth_dev *dev,
6093                              struct mlx5_aso_mtr **mtr_free)
6094 {
6095         struct mlx5_priv *priv = dev->data->dev_private;
6096         struct mlx5_aso_mtr_pools_mng *pools_mng =
6097                                 &priv->sh->mtrmng->pools_mng;
6098         struct mlx5_aso_mtr_pool *pool = NULL;
6099         struct mlx5_devx_obj *dcs = NULL;
6100         uint32_t i;
6101         uint32_t log_obj_size;
6102
6103         log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6104         dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->ctx,
6105                         priv->sh->pdn, log_obj_size);
6106         if (!dcs) {
6107                 rte_errno = ENODATA;
6108                 return NULL;
6109         }
6110         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6111         if (!pool) {
6112                 rte_errno = ENOMEM;
6113                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6114                 return NULL;
6115         }
6116         pool->devx_obj = dcs;
6117         pool->index = pools_mng->n_valid;
6118         if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6119                 mlx5_free(pool);
6120                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6121                 return NULL;
6122         }
6123         pools_mng->pools[pool->index] = pool;
6124         pools_mng->n_valid++;
6125         for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6126                 pool->mtrs[i].offset = i;
6127                 LIST_INSERT_HEAD(&pools_mng->meters,
6128                                                 &pool->mtrs[i], next);
6129         }
6130         pool->mtrs[0].offset = 0;
6131         *mtr_free = &pool->mtrs[0];
6132         return pool;
6133 }
6134
6135 /**
6136  * Release a flow meter into pool.
6137  *
6138  * @param[in] dev
6139  *   Pointer to the Ethernet device structure.
6140  * @param[in] mtr_idx
6141  *   Index to aso flow meter.
6142  */
6143 static void
6144 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6145 {
6146         struct mlx5_priv *priv = dev->data->dev_private;
6147         struct mlx5_aso_mtr_pools_mng *pools_mng =
6148                                 &priv->sh->mtrmng->pools_mng;
6149         struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6150
6151         MLX5_ASSERT(aso_mtr);
6152         rte_spinlock_lock(&pools_mng->mtrsl);
6153         memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6154         aso_mtr->state = ASO_METER_FREE;
6155         LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6156         rte_spinlock_unlock(&pools_mng->mtrsl);
6157 }
6158
6159 /**
6160  * Allocate a aso flow meter.
6161  *
6162  * @param[in] dev
6163  *   Pointer to the Ethernet device structure.
6164  *
6165  * @return
6166  *   Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6167  */
6168 static uint32_t
6169 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6170 {
6171         struct mlx5_priv *priv = dev->data->dev_private;
6172         struct mlx5_aso_mtr *mtr_free = NULL;
6173         struct mlx5_aso_mtr_pools_mng *pools_mng =
6174                                 &priv->sh->mtrmng->pools_mng;
6175         struct mlx5_aso_mtr_pool *pool;
6176         uint32_t mtr_idx = 0;
6177
6178         if (!priv->config.devx) {
6179                 rte_errno = ENOTSUP;
6180                 return 0;
6181         }
6182         /* Allocate the flow meter memory. */
6183         /* Get free meters from management. */
6184         rte_spinlock_lock(&pools_mng->mtrsl);
6185         mtr_free = LIST_FIRST(&pools_mng->meters);
6186         if (mtr_free)
6187                 LIST_REMOVE(mtr_free, next);
6188         if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6189                 rte_spinlock_unlock(&pools_mng->mtrsl);
6190                 return 0;
6191         }
6192         mtr_free->state = ASO_METER_WAIT;
6193         rte_spinlock_unlock(&pools_mng->mtrsl);
6194         pool = container_of(mtr_free,
6195                         struct mlx5_aso_mtr_pool,
6196                         mtrs[mtr_free->offset]);
6197         mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6198         if (!mtr_free->fm.meter_action) {
6199 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6200                 struct rte_flow_error error;
6201                 uint8_t reg_id;
6202
6203                 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6204                 mtr_free->fm.meter_action =
6205                         mlx5_glue->dv_create_flow_action_aso
6206                                                 (priv->sh->rx_domain,
6207                                                  pool->devx_obj->obj,
6208                                                  mtr_free->offset,
6209                                                  (1 << MLX5_FLOW_COLOR_GREEN),
6210                                                  reg_id - REG_C_0);
6211 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6212                 if (!mtr_free->fm.meter_action) {
6213                         flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6214                         return 0;
6215                 }
6216         }
6217         return mtr_idx;
6218 }
6219
6220 /**
6221  * Verify the @p attributes will be correctly understood by the NIC and store
6222  * them in the @p flow if everything is correct.
6223  *
6224  * @param[in] dev
6225  *   Pointer to dev struct.
6226  * @param[in] attributes
6227  *   Pointer to flow attributes
6228  * @param[in] external
6229  *   This flow rule is created by request external to PMD.
6230  * @param[out] error
6231  *   Pointer to error structure.
6232  *
6233  * @return
6234  *   - 0 on success and non root table.
6235  *   - 1 on success and root table.
6236  *   - a negative errno value otherwise and rte_errno is set.
6237  */
6238 static int
6239 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6240                             const struct mlx5_flow_tunnel *tunnel,
6241                             const struct rte_flow_attr *attributes,
6242                             const struct flow_grp_info *grp_info,
6243                             struct rte_flow_error *error)
6244 {
6245         struct mlx5_priv *priv = dev->data->dev_private;
6246         uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6247         int ret = 0;
6248
6249 #ifndef HAVE_MLX5DV_DR
6250         RTE_SET_USED(tunnel);
6251         RTE_SET_USED(grp_info);
6252         if (attributes->group)
6253                 return rte_flow_error_set(error, ENOTSUP,
6254                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6255                                           NULL,
6256                                           "groups are not supported");
6257 #else
6258         uint32_t table = 0;
6259
6260         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6261                                        grp_info, error);
6262         if (ret)
6263                 return ret;
6264         if (!table)
6265                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6266 #endif
6267         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6268             attributes->priority > lowest_priority)
6269                 return rte_flow_error_set(error, ENOTSUP,
6270                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6271                                           NULL,
6272                                           "priority out of range");
6273         if (attributes->transfer) {
6274                 if (!priv->config.dv_esw_en)
6275                         return rte_flow_error_set
6276                                 (error, ENOTSUP,
6277                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6278                                  "E-Switch dr is not supported");
6279                 if (!(priv->representor || priv->master))
6280                         return rte_flow_error_set
6281                                 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6282                                  NULL, "E-Switch configuration can only be"
6283                                  " done by a master or a representor device");
6284                 if (attributes->egress)
6285                         return rte_flow_error_set
6286                                 (error, ENOTSUP,
6287                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6288                                  "egress is not supported");
6289         }
6290         if (!(attributes->egress ^ attributes->ingress))
6291                 return rte_flow_error_set(error, ENOTSUP,
6292                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6293                                           "must specify exactly one of "
6294                                           "ingress or egress");
6295         return ret;
6296 }
6297
6298 static uint16_t
6299 mlx5_flow_locate_proto_l3(const struct rte_flow_item **head,
6300                           const struct rte_flow_item *end)
6301 {
6302         const struct rte_flow_item *item = *head;
6303         uint16_t l3_protocol;
6304
6305         for (; item != end; item++) {
6306                 switch (item->type) {
6307                 default:
6308                         break;
6309                 case RTE_FLOW_ITEM_TYPE_IPV4:
6310                         l3_protocol = RTE_ETHER_TYPE_IPV4;
6311                         goto l3_ok;
6312                 case RTE_FLOW_ITEM_TYPE_IPV6:
6313                         l3_protocol = RTE_ETHER_TYPE_IPV6;
6314                         goto l3_ok;
6315                 case RTE_FLOW_ITEM_TYPE_ETH:
6316                         if (item->mask && item->spec) {
6317                                 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_eth,
6318                                                             type, item,
6319                                                             l3_protocol);
6320                                 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6321                                     l3_protocol == RTE_ETHER_TYPE_IPV6)
6322                                         goto l3_ok;
6323                         }
6324                         break;
6325                 case RTE_FLOW_ITEM_TYPE_VLAN:
6326                         if (item->mask && item->spec) {
6327                                 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_vlan,
6328                                                             inner_type, item,
6329                                                             l3_protocol);
6330                                 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6331                                     l3_protocol == RTE_ETHER_TYPE_IPV6)
6332                                         goto l3_ok;
6333                         }
6334                         break;
6335                 }
6336         }
6337         return 0;
6338 l3_ok:
6339         *head = item;
6340         return l3_protocol;
6341 }
6342
6343 static uint8_t
6344 mlx5_flow_locate_proto_l4(const struct rte_flow_item **head,
6345                           const struct rte_flow_item *end)
6346 {
6347         const struct rte_flow_item *item = *head;
6348         uint8_t l4_protocol;
6349
6350         for (; item != end; item++) {
6351                 switch (item->type) {
6352                 default:
6353                         break;
6354                 case RTE_FLOW_ITEM_TYPE_TCP:
6355                         l4_protocol = IPPROTO_TCP;
6356                         goto l4_ok;
6357                 case RTE_FLOW_ITEM_TYPE_UDP:
6358                         l4_protocol = IPPROTO_UDP;
6359                         goto l4_ok;
6360                 case RTE_FLOW_ITEM_TYPE_IPV4:
6361                         if (item->mask && item->spec) {
6362                                 const struct rte_flow_item_ipv4 *mask, *spec;
6363
6364                                 mask = (typeof(mask))item->mask;
6365                                 spec = (typeof(spec))item->spec;
6366                                 l4_protocol = mask->hdr.next_proto_id &
6367                                               spec->hdr.next_proto_id;
6368                                 if (l4_protocol == IPPROTO_TCP ||
6369                                     l4_protocol == IPPROTO_UDP)
6370                                         goto l4_ok;
6371                         }
6372                         break;
6373                 case RTE_FLOW_ITEM_TYPE_IPV6:
6374                         if (item->mask && item->spec) {
6375                                 const struct rte_flow_item_ipv6 *mask, *spec;
6376                                 mask = (typeof(mask))item->mask;
6377                                 spec = (typeof(spec))item->spec;
6378                                 l4_protocol = mask->hdr.proto & spec->hdr.proto;
6379                                 if (l4_protocol == IPPROTO_TCP ||
6380                                     l4_protocol == IPPROTO_UDP)
6381                                         goto l4_ok;
6382                         }
6383                         break;
6384                 }
6385         }
6386         return 0;
6387 l4_ok:
6388         *head = item;
6389         return l4_protocol;
6390 }
6391
6392 static int
6393 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6394                                 const struct rte_flow_item *rule_items,
6395                                 const struct rte_flow_item *integrity_item,
6396                                 struct rte_flow_error *error)
6397 {
6398         struct mlx5_priv *priv = dev->data->dev_private;
6399         const struct rte_flow_item *tunnel_item, *end_item, *item = rule_items;
6400         const struct rte_flow_item_integrity *mask = (typeof(mask))
6401                                                      integrity_item->mask;
6402         const struct rte_flow_item_integrity *spec = (typeof(spec))
6403                                                      integrity_item->spec;
6404         uint32_t protocol;
6405
6406         if (!priv->config.hca_attr.pkt_integrity_match)
6407                 return rte_flow_error_set(error, ENOTSUP,
6408                                           RTE_FLOW_ERROR_TYPE_ITEM,
6409                                           integrity_item,
6410                                           "packet integrity integrity_item not supported");
6411         if (!mask)
6412                 mask = &rte_flow_item_integrity_mask;
6413         if (!mlx5_validate_integrity_item(mask))
6414                 return rte_flow_error_set(error, ENOTSUP,
6415                                           RTE_FLOW_ERROR_TYPE_ITEM,
6416                                           integrity_item,
6417                                           "unsupported integrity filter");
6418         tunnel_item = mlx5_flow_find_tunnel_item(rule_items);
6419         if (spec->level > 1) {
6420                 if (!tunnel_item)
6421                         return rte_flow_error_set(error, ENOTSUP,
6422                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6423                                                   integrity_item,
6424                                                   "missing tunnel item");
6425                 item = tunnel_item;
6426                 end_item = mlx5_find_end_item(tunnel_item);
6427         } else {
6428                 end_item = tunnel_item ? tunnel_item :
6429                            mlx5_find_end_item(integrity_item);
6430         }
6431         if (mask->l3_ok || mask->ipv4_csum_ok) {
6432                 protocol = mlx5_flow_locate_proto_l3(&item, end_item);
6433                 if (!protocol)
6434                         return rte_flow_error_set(error, EINVAL,
6435                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6436                                                   integrity_item,
6437                                                   "missing L3 protocol");
6438         }
6439         if (mask->l4_ok || mask->l4_csum_ok) {
6440                 protocol = mlx5_flow_locate_proto_l4(&item, end_item);
6441                 if (!protocol)
6442                         return rte_flow_error_set(error, EINVAL,
6443                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6444                                                   integrity_item,
6445                                                   "missing L4 protocol");
6446         }
6447         return 0;
6448 }
6449
6450 /**
6451  * Internal validation function. For validating both actions and items.
6452  *
6453  * @param[in] dev
6454  *   Pointer to the rte_eth_dev structure.
6455  * @param[in] attr
6456  *   Pointer to the flow attributes.
6457  * @param[in] items
6458  *   Pointer to the list of items.
6459  * @param[in] actions
6460  *   Pointer to the list of actions.
6461  * @param[in] external
6462  *   This flow rule is created by request external to PMD.
6463  * @param[in] hairpin
6464  *   Number of hairpin TX actions, 0 means classic flow.
6465  * @param[out] error
6466  *   Pointer to the error structure.
6467  *
6468  * @return
6469  *   0 on success, a negative errno value otherwise and rte_errno is set.
6470  */
6471 static int
6472 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6473                  const struct rte_flow_item items[],
6474                  const struct rte_flow_action actions[],
6475                  bool external, int hairpin, struct rte_flow_error *error)
6476 {
6477         int ret;
6478         uint64_t action_flags = 0;
6479         uint64_t item_flags = 0;
6480         uint64_t last_item = 0;
6481         uint8_t next_protocol = 0xff;
6482         uint16_t ether_type = 0;
6483         int actions_n = 0;
6484         uint8_t item_ipv6_proto = 0;
6485         int fdb_mirror_limit = 0;
6486         int modify_after_mirror = 0;
6487         const struct rte_flow_item *geneve_item = NULL;
6488         const struct rte_flow_item *gre_item = NULL;
6489         const struct rte_flow_item *gtp_item = NULL;
6490         const struct rte_flow_action_raw_decap *decap;
6491         const struct rte_flow_action_raw_encap *encap;
6492         const struct rte_flow_action_rss *rss = NULL;
6493         const struct rte_flow_action_rss *sample_rss = NULL;
6494         const struct rte_flow_action_count *sample_count = NULL;
6495         const struct rte_flow_item_tcp nic_tcp_mask = {
6496                 .hdr = {
6497                         .tcp_flags = 0xFF,
6498                         .src_port = RTE_BE16(UINT16_MAX),
6499                         .dst_port = RTE_BE16(UINT16_MAX),
6500                 }
6501         };
6502         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6503                 .hdr = {
6504                         .src_addr =
6505                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6506                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6507                         .dst_addr =
6508                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6509                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6510                         .vtc_flow = RTE_BE32(0xffffffff),
6511                         .proto = 0xff,
6512                         .hop_limits = 0xff,
6513                 },
6514                 .has_frag_ext = 1,
6515         };
6516         const struct rte_flow_item_ecpri nic_ecpri_mask = {
6517                 .hdr = {
6518                         .common = {
6519                                 .u32 =
6520                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6521                                         .type = 0xFF,
6522                                         }).u32),
6523                         },
6524                         .dummy[0] = 0xffffffff,
6525                 },
6526         };
6527         struct mlx5_priv *priv = dev->data->dev_private;
6528         struct mlx5_dev_config *dev_conf = &priv->config;
6529         uint16_t queue_index = 0xFFFF;
6530         const struct rte_flow_item_vlan *vlan_m = NULL;
6531         uint32_t rw_act_num = 0;
6532         uint64_t is_root;
6533         const struct mlx5_flow_tunnel *tunnel;
6534         struct flow_grp_info grp_info = {
6535                 .external = !!external,
6536                 .transfer = !!attr->transfer,
6537                 .fdb_def_rule = !!priv->fdb_def_rule,
6538         };
6539         const struct rte_eth_hairpin_conf *conf;
6540         const struct rte_flow_item *rule_items = items;
6541         bool def_policy = false;
6542
6543         if (items == NULL)
6544                 return -1;
6545         if (is_flow_tunnel_match_rule(dev, attr, items, actions)) {
6546                 tunnel = flow_items_to_tunnel(items);
6547                 action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6548                                 MLX5_FLOW_ACTION_DECAP;
6549         } else if (is_flow_tunnel_steer_rule(dev, attr, items, actions)) {
6550                 tunnel = flow_actions_to_tunnel(actions);
6551                 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6552         } else {
6553                 tunnel = NULL;
6554         }
6555         if (tunnel && priv->representor)
6556                 return rte_flow_error_set(error, ENOTSUP,
6557                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6558                                           "decap not supported "
6559                                           "for VF representor");
6560         grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6561                                 (dev, tunnel, attr, items, actions);
6562         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6563         if (ret < 0)
6564                 return ret;
6565         is_root = (uint64_t)ret;
6566         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6567                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6568                 int type = items->type;
6569
6570                 if (!mlx5_flow_os_item_supported(type))
6571                         return rte_flow_error_set(error, ENOTSUP,
6572                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6573                                                   NULL, "item not supported");
6574                 switch (type) {
6575                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
6576                         if (items[0].type != (typeof(items[0].type))
6577                                                 MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL)
6578                                 return rte_flow_error_set
6579                                                 (error, EINVAL,
6580                                                 RTE_FLOW_ERROR_TYPE_ITEM,
6581                                                 NULL, "MLX5 private items "
6582                                                 "must be the first");
6583                         break;
6584                 case RTE_FLOW_ITEM_TYPE_VOID:
6585                         break;
6586                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6587                         ret = flow_dv_validate_item_port_id
6588                                         (dev, items, attr, item_flags, error);
6589                         if (ret < 0)
6590                                 return ret;
6591                         last_item = MLX5_FLOW_ITEM_PORT_ID;
6592                         break;
6593                 case RTE_FLOW_ITEM_TYPE_ETH:
6594                         ret = mlx5_flow_validate_item_eth(items, item_flags,
6595                                                           true, error);
6596                         if (ret < 0)
6597                                 return ret;
6598                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6599                                              MLX5_FLOW_LAYER_OUTER_L2;
6600                         if (items->mask != NULL && items->spec != NULL) {
6601                                 ether_type =
6602                                         ((const struct rte_flow_item_eth *)
6603                                          items->spec)->type;
6604                                 ether_type &=
6605                                         ((const struct rte_flow_item_eth *)
6606                                          items->mask)->type;
6607                                 ether_type = rte_be_to_cpu_16(ether_type);
6608                         } else {
6609                                 ether_type = 0;
6610                         }
6611                         break;
6612                 case RTE_FLOW_ITEM_TYPE_VLAN:
6613                         ret = flow_dv_validate_item_vlan(items, item_flags,
6614                                                          dev, error);
6615                         if (ret < 0)
6616                                 return ret;
6617                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6618                                              MLX5_FLOW_LAYER_OUTER_VLAN;
6619                         if (items->mask != NULL && items->spec != NULL) {
6620                                 ether_type =
6621                                         ((const struct rte_flow_item_vlan *)
6622                                          items->spec)->inner_type;
6623                                 ether_type &=
6624                                         ((const struct rte_flow_item_vlan *)
6625                                          items->mask)->inner_type;
6626                                 ether_type = rte_be_to_cpu_16(ether_type);
6627                         } else {
6628                                 ether_type = 0;
6629                         }
6630                         /* Store outer VLAN mask for of_push_vlan action. */
6631                         if (!tunnel)
6632                                 vlan_m = items->mask;
6633                         break;
6634                 case RTE_FLOW_ITEM_TYPE_IPV4:
6635                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6636                                                   &item_flags, &tunnel);
6637                         ret = flow_dv_validate_item_ipv4(items, item_flags,
6638                                                          last_item, ether_type,
6639                                                          error);
6640                         if (ret < 0)
6641                                 return ret;
6642                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
6643                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
6644                         if (items->mask != NULL &&
6645                             ((const struct rte_flow_item_ipv4 *)
6646                              items->mask)->hdr.next_proto_id) {
6647                                 next_protocol =
6648                                         ((const struct rte_flow_item_ipv4 *)
6649                                          (items->spec))->hdr.next_proto_id;
6650                                 next_protocol &=
6651                                         ((const struct rte_flow_item_ipv4 *)
6652                                          (items->mask))->hdr.next_proto_id;
6653                         } else {
6654                                 /* Reset for inner layer. */
6655                                 next_protocol = 0xff;
6656                         }
6657                         break;
6658                 case RTE_FLOW_ITEM_TYPE_IPV6:
6659                         mlx5_flow_tunnel_ip_check(items, next_protocol,
6660                                                   &item_flags, &tunnel);
6661                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
6662                                                            last_item,
6663                                                            ether_type,
6664                                                            &nic_ipv6_mask,
6665                                                            error);
6666                         if (ret < 0)
6667                                 return ret;
6668                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
6669                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
6670                         if (items->mask != NULL &&
6671                             ((const struct rte_flow_item_ipv6 *)
6672                              items->mask)->hdr.proto) {
6673                                 item_ipv6_proto =
6674                                         ((const struct rte_flow_item_ipv6 *)
6675                                          items->spec)->hdr.proto;
6676                                 next_protocol =
6677                                         ((const struct rte_flow_item_ipv6 *)
6678                                          items->spec)->hdr.proto;
6679                                 next_protocol &=
6680                                         ((const struct rte_flow_item_ipv6 *)
6681                                          items->mask)->hdr.proto;
6682                         } else {
6683                                 /* Reset for inner layer. */
6684                                 next_protocol = 0xff;
6685                         }
6686                         break;
6687                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
6688                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
6689                                                                   item_flags,
6690                                                                   error);
6691                         if (ret < 0)
6692                                 return ret;
6693                         last_item = tunnel ?
6694                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
6695                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
6696                         if (items->mask != NULL &&
6697                             ((const struct rte_flow_item_ipv6_frag_ext *)
6698                              items->mask)->hdr.next_header) {
6699                                 next_protocol =
6700                                 ((const struct rte_flow_item_ipv6_frag_ext *)
6701                                  items->spec)->hdr.next_header;
6702                                 next_protocol &=
6703                                 ((const struct rte_flow_item_ipv6_frag_ext *)
6704                                  items->mask)->hdr.next_header;
6705                         } else {
6706                                 /* Reset for inner layer. */
6707                                 next_protocol = 0xff;
6708                         }
6709                         break;
6710                 case RTE_FLOW_ITEM_TYPE_TCP:
6711                         ret = mlx5_flow_validate_item_tcp
6712                                                 (items, item_flags,
6713                                                  next_protocol,
6714                                                  &nic_tcp_mask,
6715                                                  error);
6716                         if (ret < 0)
6717                                 return ret;
6718                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
6719                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
6720                         break;
6721                 case RTE_FLOW_ITEM_TYPE_UDP:
6722                         ret = mlx5_flow_validate_item_udp(items, item_flags,
6723                                                           next_protocol,
6724                                                           error);
6725                         if (ret < 0)
6726                                 return ret;
6727                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
6728                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
6729                         break;
6730                 case RTE_FLOW_ITEM_TYPE_GRE:
6731                         ret = mlx5_flow_validate_item_gre(items, item_flags,
6732                                                           next_protocol, error);
6733                         if (ret < 0)
6734                                 return ret;
6735                         gre_item = items;
6736                         last_item = MLX5_FLOW_LAYER_GRE;
6737                         break;
6738                 case RTE_FLOW_ITEM_TYPE_NVGRE:
6739                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
6740                                                             next_protocol,
6741                                                             error);
6742                         if (ret < 0)
6743                                 return ret;
6744                         last_item = MLX5_FLOW_LAYER_NVGRE;
6745                         break;
6746                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
6747                         ret = mlx5_flow_validate_item_gre_key
6748                                 (items, item_flags, gre_item, error);
6749                         if (ret < 0)
6750                                 return ret;
6751                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
6752                         break;
6753                 case RTE_FLOW_ITEM_TYPE_VXLAN:
6754                         ret = mlx5_flow_validate_item_vxlan(items, item_flags,
6755                                                             error);
6756                         if (ret < 0)
6757                                 return ret;
6758                         last_item = MLX5_FLOW_LAYER_VXLAN;
6759                         break;
6760                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
6761                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
6762                                                                 item_flags, dev,
6763                                                                 error);
6764                         if (ret < 0)
6765                                 return ret;
6766                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
6767                         break;
6768                 case RTE_FLOW_ITEM_TYPE_GENEVE:
6769                         ret = mlx5_flow_validate_item_geneve(items,
6770                                                              item_flags, dev,
6771                                                              error);
6772                         if (ret < 0)
6773                                 return ret;
6774                         geneve_item = items;
6775                         last_item = MLX5_FLOW_LAYER_GENEVE;
6776                         break;
6777                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
6778                         ret = mlx5_flow_validate_item_geneve_opt(items,
6779                                                                  last_item,
6780                                                                  geneve_item,
6781                                                                  dev,
6782                                                                  error);
6783                         if (ret < 0)
6784                                 return ret;
6785                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
6786                         break;
6787                 case RTE_FLOW_ITEM_TYPE_MPLS:
6788                         ret = mlx5_flow_validate_item_mpls(dev, items,
6789                                                            item_flags,
6790                                                            last_item, error);
6791                         if (ret < 0)
6792                                 return ret;
6793                         last_item = MLX5_FLOW_LAYER_MPLS;
6794                         break;
6795
6796                 case RTE_FLOW_ITEM_TYPE_MARK:
6797                         ret = flow_dv_validate_item_mark(dev, items, attr,
6798                                                          error);
6799                         if (ret < 0)
6800                                 return ret;
6801                         last_item = MLX5_FLOW_ITEM_MARK;
6802                         break;
6803                 case RTE_FLOW_ITEM_TYPE_META:
6804                         ret = flow_dv_validate_item_meta(dev, items, attr,
6805                                                          error);
6806                         if (ret < 0)
6807                                 return ret;
6808                         last_item = MLX5_FLOW_ITEM_METADATA;
6809                         break;
6810                 case RTE_FLOW_ITEM_TYPE_ICMP:
6811                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
6812                                                            next_protocol,
6813                                                            error);
6814                         if (ret < 0)
6815                                 return ret;
6816                         last_item = MLX5_FLOW_LAYER_ICMP;
6817                         break;
6818                 case RTE_FLOW_ITEM_TYPE_ICMP6:
6819                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
6820                                                             next_protocol,
6821                                                             error);
6822                         if (ret < 0)
6823                                 return ret;
6824                         item_ipv6_proto = IPPROTO_ICMPV6;
6825                         last_item = MLX5_FLOW_LAYER_ICMP6;
6826                         break;
6827                 case RTE_FLOW_ITEM_TYPE_TAG:
6828                         ret = flow_dv_validate_item_tag(dev, items,
6829                                                         attr, error);
6830                         if (ret < 0)
6831                                 return ret;
6832                         last_item = MLX5_FLOW_ITEM_TAG;
6833                         break;
6834                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
6835                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
6836                         break;
6837                 case RTE_FLOW_ITEM_TYPE_GTP:
6838                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
6839                                                         error);
6840                         if (ret < 0)
6841                                 return ret;
6842                         gtp_item = items;
6843                         last_item = MLX5_FLOW_LAYER_GTP;
6844                         break;
6845                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
6846                         ret = flow_dv_validate_item_gtp_psc(items, last_item,
6847                                                             gtp_item, attr,
6848                                                             error);
6849                         if (ret < 0)
6850                                 return ret;
6851                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
6852                         break;
6853                 case RTE_FLOW_ITEM_TYPE_ECPRI:
6854                         /* Capacity will be checked in the translate stage. */
6855                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
6856                                                             last_item,
6857                                                             ether_type,
6858                                                             &nic_ecpri_mask,
6859                                                             error);
6860                         if (ret < 0)
6861                                 return ret;
6862                         last_item = MLX5_FLOW_LAYER_ECPRI;
6863                         break;
6864                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
6865                         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY)
6866                                 return rte_flow_error_set
6867                                         (error, ENOTSUP,
6868                                          RTE_FLOW_ERROR_TYPE_ITEM,
6869                                          NULL, "multiple integrity items not supported");
6870                         ret = flow_dv_validate_item_integrity(dev, rule_items,
6871                                                               items, error);
6872                         if (ret < 0)
6873                                 return ret;
6874                         last_item = MLX5_FLOW_ITEM_INTEGRITY;
6875                         break;
6876                 default:
6877                         return rte_flow_error_set(error, ENOTSUP,
6878                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6879                                                   NULL, "item not supported");
6880                 }
6881                 item_flags |= last_item;
6882         }
6883         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
6884                 int type = actions->type;
6885                 bool shared_count = false;
6886
6887                 if (!mlx5_flow_os_action_supported(type))
6888                         return rte_flow_error_set(error, ENOTSUP,
6889                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6890                                                   actions,
6891                                                   "action not supported");
6892                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
6893                         return rte_flow_error_set(error, ENOTSUP,
6894                                                   RTE_FLOW_ERROR_TYPE_ACTION,
6895                                                   actions, "too many actions");
6896                 if (action_flags &
6897                         MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
6898                         return rte_flow_error_set(error, ENOTSUP,
6899                                 RTE_FLOW_ERROR_TYPE_ACTION,
6900                                 NULL, "meter action with policy "
6901                                 "must be the last action");
6902                 switch (type) {
6903                 case RTE_FLOW_ACTION_TYPE_VOID:
6904                         break;
6905                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
6906                         ret = flow_dv_validate_action_port_id(dev,
6907                                                               action_flags,
6908                                                               actions,
6909                                                               attr,
6910                                                               error);
6911                         if (ret)
6912                                 return ret;
6913                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
6914                         ++actions_n;
6915                         break;
6916                 case RTE_FLOW_ACTION_TYPE_FLAG:
6917                         ret = flow_dv_validate_action_flag(dev, action_flags,
6918                                                            attr, error);
6919                         if (ret < 0)
6920                                 return ret;
6921                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6922                                 /* Count all modify-header actions as one. */
6923                                 if (!(action_flags &
6924                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
6925                                         ++actions_n;
6926                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
6927                                                 MLX5_FLOW_ACTION_MARK_EXT;
6928                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
6929                                         modify_after_mirror = 1;
6930
6931                         } else {
6932                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
6933                                 ++actions_n;
6934                         }
6935                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
6936                         break;
6937                 case RTE_FLOW_ACTION_TYPE_MARK:
6938                         ret = flow_dv_validate_action_mark(dev, actions,
6939                                                            action_flags,
6940                                                            attr, error);
6941                         if (ret < 0)
6942                                 return ret;
6943                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
6944                                 /* Count all modify-header actions as one. */
6945                                 if (!(action_flags &
6946                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
6947                                         ++actions_n;
6948                                 action_flags |= MLX5_FLOW_ACTION_MARK |
6949                                                 MLX5_FLOW_ACTION_MARK_EXT;
6950                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
6951                                         modify_after_mirror = 1;
6952                         } else {
6953                                 action_flags |= MLX5_FLOW_ACTION_MARK;
6954                                 ++actions_n;
6955                         }
6956                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
6957                         break;
6958                 case RTE_FLOW_ACTION_TYPE_SET_META:
6959                         ret = flow_dv_validate_action_set_meta(dev, actions,
6960                                                                action_flags,
6961                                                                attr, error);
6962                         if (ret < 0)
6963                                 return ret;
6964                         /* Count all modify-header actions as one action. */
6965                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
6966                                 ++actions_n;
6967                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
6968                                 modify_after_mirror = 1;
6969                         action_flags |= MLX5_FLOW_ACTION_SET_META;
6970                         rw_act_num += MLX5_ACT_NUM_SET_META;
6971                         break;
6972                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
6973                         ret = flow_dv_validate_action_set_tag(dev, actions,
6974                                                               action_flags,
6975                                                               attr, error);
6976                         if (ret < 0)
6977                                 return ret;
6978                         /* Count all modify-header actions as one action. */
6979                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
6980                                 ++actions_n;
6981                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
6982                                 modify_after_mirror = 1;
6983                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
6984                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
6985                         break;
6986                 case RTE_FLOW_ACTION_TYPE_DROP:
6987                         ret = mlx5_flow_validate_action_drop(action_flags,
6988                                                              attr, error);
6989                         if (ret < 0)
6990                                 return ret;
6991                         action_flags |= MLX5_FLOW_ACTION_DROP;
6992                         ++actions_n;
6993                         break;
6994                 case RTE_FLOW_ACTION_TYPE_QUEUE:
6995                         ret = mlx5_flow_validate_action_queue(actions,
6996                                                               action_flags, dev,
6997                                                               attr, error);
6998                         if (ret < 0)
6999                                 return ret;
7000                         queue_index = ((const struct rte_flow_action_queue *)
7001                                                         (actions->conf))->index;
7002                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7003                         ++actions_n;
7004                         break;
7005                 case RTE_FLOW_ACTION_TYPE_RSS:
7006                         rss = actions->conf;
7007                         ret = mlx5_flow_validate_action_rss(actions,
7008                                                             action_flags, dev,
7009                                                             attr, item_flags,
7010                                                             error);
7011                         if (ret < 0)
7012                                 return ret;
7013                         if (rss && sample_rss &&
7014                             (sample_rss->level != rss->level ||
7015                             sample_rss->types != rss->types))
7016                                 return rte_flow_error_set(error, ENOTSUP,
7017                                         RTE_FLOW_ERROR_TYPE_ACTION,
7018                                         NULL,
7019                                         "Can't use the different RSS types "
7020                                         "or level in the same flow");
7021                         if (rss != NULL && rss->queue_num)
7022                                 queue_index = rss->queue[0];
7023                         action_flags |= MLX5_FLOW_ACTION_RSS;
7024                         ++actions_n;
7025                         break;
7026                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7027                         ret =
7028                         mlx5_flow_validate_action_default_miss(action_flags,
7029                                         attr, error);
7030                         if (ret < 0)
7031                                 return ret;
7032                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7033                         ++actions_n;
7034                         break;
7035                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7036                 case RTE_FLOW_ACTION_TYPE_COUNT:
7037                         shared_count = is_shared_action_count(actions);
7038                         ret = flow_dv_validate_action_count(dev, shared_count,
7039                                                             action_flags,
7040                                                             error);
7041                         if (ret < 0)
7042                                 return ret;
7043                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7044                         ++actions_n;
7045                         break;
7046                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7047                         if (flow_dv_validate_action_pop_vlan(dev,
7048                                                              action_flags,
7049                                                              actions,
7050                                                              item_flags, attr,
7051                                                              error))
7052                                 return -rte_errno;
7053                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7054                                 modify_after_mirror = 1;
7055                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7056                         ++actions_n;
7057                         break;
7058                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7059                         ret = flow_dv_validate_action_push_vlan(dev,
7060                                                                 action_flags,
7061                                                                 vlan_m,
7062                                                                 actions, attr,
7063                                                                 error);
7064                         if (ret < 0)
7065                                 return ret;
7066                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7067                                 modify_after_mirror = 1;
7068                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7069                         ++actions_n;
7070                         break;
7071                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7072                         ret = flow_dv_validate_action_set_vlan_pcp
7073                                                 (action_flags, actions, error);
7074                         if (ret < 0)
7075                                 return ret;
7076                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7077                                 modify_after_mirror = 1;
7078                         /* Count PCP with push_vlan command. */
7079                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7080                         break;
7081                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7082                         ret = flow_dv_validate_action_set_vlan_vid
7083                                                 (item_flags, action_flags,
7084                                                  actions, error);
7085                         if (ret < 0)
7086                                 return ret;
7087                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7088                                 modify_after_mirror = 1;
7089                         /* Count VID with push_vlan command. */
7090                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7091                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
7092                         break;
7093                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7094                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7095                         ret = flow_dv_validate_action_l2_encap(dev,
7096                                                                action_flags,
7097                                                                actions, attr,
7098                                                                error);
7099                         if (ret < 0)
7100                                 return ret;
7101                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7102                         ++actions_n;
7103                         break;
7104                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7105                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7106                         ret = flow_dv_validate_action_decap(dev, action_flags,
7107                                                             actions, item_flags,
7108                                                             attr, error);
7109                         if (ret < 0)
7110                                 return ret;
7111                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7112                                 modify_after_mirror = 1;
7113                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7114                         ++actions_n;
7115                         break;
7116                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7117                         ret = flow_dv_validate_action_raw_encap_decap
7118                                 (dev, NULL, actions->conf, attr, &action_flags,
7119                                  &actions_n, actions, item_flags, error);
7120                         if (ret < 0)
7121                                 return ret;
7122                         break;
7123                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7124                         decap = actions->conf;
7125                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7126                                 ;
7127                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7128                                 encap = NULL;
7129                                 actions--;
7130                         } else {
7131                                 encap = actions->conf;
7132                         }
7133                         ret = flow_dv_validate_action_raw_encap_decap
7134                                            (dev,
7135                                             decap ? decap : &empty_decap, encap,
7136                                             attr, &action_flags, &actions_n,
7137                                             actions, item_flags, error);
7138                         if (ret < 0)
7139                                 return ret;
7140                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7141                             (action_flags & MLX5_FLOW_ACTION_DECAP))
7142                                 modify_after_mirror = 1;
7143                         break;
7144                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7145                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7146                         ret = flow_dv_validate_action_modify_mac(action_flags,
7147                                                                  actions,
7148                                                                  item_flags,
7149                                                                  error);
7150                         if (ret < 0)
7151                                 return ret;
7152                         /* Count all modify-header actions as one action. */
7153                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7154                                 ++actions_n;
7155                         action_flags |= actions->type ==
7156                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7157                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
7158                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
7159                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7160                                 modify_after_mirror = 1;
7161                         /*
7162                          * Even if the source and destination MAC addresses have
7163                          * overlap in the header with 4B alignment, the convert
7164                          * function will handle them separately and 4 SW actions
7165                          * will be created. And 2 actions will be added each
7166                          * time no matter how many bytes of address will be set.
7167                          */
7168                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7169                         break;
7170                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7171                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7172                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
7173                                                                   actions,
7174                                                                   item_flags,
7175                                                                   error);
7176                         if (ret < 0)
7177                                 return ret;
7178                         /* Count all modify-header actions as one action. */
7179                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7180                                 ++actions_n;
7181                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7182                                 modify_after_mirror = 1;
7183                         action_flags |= actions->type ==
7184                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7185                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7186                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
7187                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7188                         break;
7189                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7190                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7191                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
7192                                                                   actions,
7193                                                                   item_flags,
7194                                                                   error);
7195                         if (ret < 0)
7196                                 return ret;
7197                         if (item_ipv6_proto == IPPROTO_ICMPV6)
7198                                 return rte_flow_error_set(error, ENOTSUP,
7199                                         RTE_FLOW_ERROR_TYPE_ACTION,
7200                                         actions,
7201                                         "Can't change header "
7202                                         "with ICMPv6 proto");
7203                         /* Count all modify-header actions as one action. */
7204                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7205                                 ++actions_n;
7206                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7207                                 modify_after_mirror = 1;
7208                         action_flags |= actions->type ==
7209                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7210                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7211                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
7212                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7213                         break;
7214                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7215                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7216                         ret = flow_dv_validate_action_modify_tp(action_flags,
7217                                                                 actions,
7218                                                                 item_flags,
7219                                                                 error);
7220                         if (ret < 0)
7221                                 return ret;
7222                         /* Count all modify-header actions as one action. */
7223                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7224                                 ++actions_n;
7225                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7226                                 modify_after_mirror = 1;
7227                         action_flags |= actions->type ==
7228                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7229                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
7230                                                 MLX5_FLOW_ACTION_SET_TP_DST;
7231                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7232                         break;
7233                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7234                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7235                         ret = flow_dv_validate_action_modify_ttl(action_flags,
7236                                                                  actions,
7237                                                                  item_flags,
7238                                                                  error);
7239                         if (ret < 0)
7240                                 return ret;
7241                         /* Count all modify-header actions as one action. */
7242                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7243                                 ++actions_n;
7244                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7245                                 modify_after_mirror = 1;
7246                         action_flags |= actions->type ==
7247                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
7248                                                 MLX5_FLOW_ACTION_SET_TTL :
7249                                                 MLX5_FLOW_ACTION_DEC_TTL;
7250                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7251                         break;
7252                 case RTE_FLOW_ACTION_TYPE_JUMP:
7253                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7254                                                            action_flags,
7255                                                            attr, external,
7256                                                            error);
7257                         if (ret)
7258                                 return ret;
7259                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7260                             fdb_mirror_limit)
7261                                 return rte_flow_error_set(error, EINVAL,
7262                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7263                                                   NULL,
7264                                                   "sample and jump action combination is not supported");
7265                         ++actions_n;
7266                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7267                         break;
7268                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7269                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7270                         ret = flow_dv_validate_action_modify_tcp_seq
7271                                                                 (action_flags,
7272                                                                  actions,
7273                                                                  item_flags,
7274                                                                  error);
7275                         if (ret < 0)
7276                                 return ret;
7277                         /* Count all modify-header actions as one action. */
7278                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7279                                 ++actions_n;
7280                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7281                                 modify_after_mirror = 1;
7282                         action_flags |= actions->type ==
7283                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7284                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7285                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7286                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7287                         break;
7288                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7289                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7290                         ret = flow_dv_validate_action_modify_tcp_ack
7291                                                                 (action_flags,
7292                                                                  actions,
7293                                                                  item_flags,
7294                                                                  error);
7295                         if (ret < 0)
7296                                 return ret;
7297                         /* Count all modify-header actions as one action. */
7298                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7299                                 ++actions_n;
7300                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7301                                 modify_after_mirror = 1;
7302                         action_flags |= actions->type ==
7303                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7304                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
7305                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7306                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7307                         break;
7308                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7309                         break;
7310                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7311                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7312                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7313                         break;
7314                 case RTE_FLOW_ACTION_TYPE_METER:
7315                         ret = mlx5_flow_validate_action_meter(dev,
7316                                                               action_flags,
7317                                                               actions, attr,
7318                                                               &def_policy,
7319                                                               error);
7320                         if (ret < 0)
7321                                 return ret;
7322                         action_flags |= MLX5_FLOW_ACTION_METER;
7323                         if (!def_policy)
7324                                 action_flags |=
7325                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7326                         ++actions_n;
7327                         /* Meter action will add one more TAG action. */
7328                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7329                         break;
7330                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7331                         if (!attr->transfer && !attr->group)
7332                                 return rte_flow_error_set(error, ENOTSUP,
7333                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7334                                                                            NULL,
7335                           "Shared ASO age action is not supported for group 0");
7336                         if (action_flags & MLX5_FLOW_ACTION_AGE)
7337                                 return rte_flow_error_set
7338                                                   (error, EINVAL,
7339                                                    RTE_FLOW_ERROR_TYPE_ACTION,
7340                                                    NULL,
7341                                                    "duplicate age actions set");
7342                         action_flags |= MLX5_FLOW_ACTION_AGE;
7343                         ++actions_n;
7344                         break;
7345                 case RTE_FLOW_ACTION_TYPE_AGE:
7346                         ret = flow_dv_validate_action_age(action_flags,
7347                                                           actions, dev,
7348                                                           error);
7349                         if (ret < 0)
7350                                 return ret;
7351                         /*
7352                          * Validate the regular AGE action (using counter)
7353                          * mutual exclusion with share counter actions.
7354                          */
7355                         if (!priv->sh->flow_hit_aso_en) {
7356                                 if (shared_count)
7357                                         return rte_flow_error_set
7358                                                 (error, EINVAL,
7359                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7360                                                 NULL,
7361                                                 "old age and shared count combination is not supported");
7362                                 if (sample_count)
7363                                         return rte_flow_error_set
7364                                                 (error, EINVAL,
7365                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7366                                                 NULL,
7367                                                 "old age action and count must be in the same sub flow");
7368                         }
7369                         action_flags |= MLX5_FLOW_ACTION_AGE;
7370                         ++actions_n;
7371                         break;
7372                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7373                         ret = flow_dv_validate_action_modify_ipv4_dscp
7374                                                          (action_flags,
7375                                                           actions,
7376                                                           item_flags,
7377                                                           error);
7378                         if (ret < 0)
7379                                 return ret;
7380                         /* Count all modify-header actions as one action. */
7381                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7382                                 ++actions_n;
7383                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7384                                 modify_after_mirror = 1;
7385                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7386                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7387                         break;
7388                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7389                         ret = flow_dv_validate_action_modify_ipv6_dscp
7390                                                                 (action_flags,
7391                                                                  actions,
7392                                                                  item_flags,
7393                                                                  error);
7394                         if (ret < 0)
7395                                 return ret;
7396                         /* Count all modify-header actions as one action. */
7397                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7398                                 ++actions_n;
7399                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7400                                 modify_after_mirror = 1;
7401                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7402                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7403                         break;
7404                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7405                         ret = flow_dv_validate_action_sample(&action_flags,
7406                                                              actions, dev,
7407                                                              attr, item_flags,
7408                                                              rss, &sample_rss,
7409                                                              &sample_count,
7410                                                              &fdb_mirror_limit,
7411                                                              error);
7412                         if (ret < 0)
7413                                 return ret;
7414                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7415                         ++actions_n;
7416                         break;
7417                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7418                         if (actions[0].type != (typeof(actions[0].type))
7419                                 MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET)
7420                                 return rte_flow_error_set
7421                                                 (error, EINVAL,
7422                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7423                                                 NULL, "MLX5 private action "
7424                                                 "must be the first");
7425
7426                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
7427                         break;
7428                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7429                         ret = flow_dv_validate_action_modify_field(dev,
7430                                                                    action_flags,
7431                                                                    actions,
7432                                                                    attr,
7433                                                                    error);
7434                         if (ret < 0)
7435                                 return ret;
7436                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7437                                 modify_after_mirror = 1;
7438                         /* Count all modify-header actions as one action. */
7439                         if (!(action_flags & MLX5_FLOW_ACTION_MODIFY_FIELD))
7440                                 ++actions_n;
7441                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7442                         rw_act_num += ret;
7443                         break;
7444                 default:
7445                         return rte_flow_error_set(error, ENOTSUP,
7446                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7447                                                   actions,
7448                                                   "action not supported");
7449                 }
7450         }
7451         /*
7452          * Validate actions in flow rules
7453          * - Explicit decap action is prohibited by the tunnel offload API.
7454          * - Drop action in tunnel steer rule is prohibited by the API.
7455          * - Application cannot use MARK action because it's value can mask
7456          *   tunnel default miss nitification.
7457          * - JUMP in tunnel match rule has no support in current PMD
7458          *   implementation.
7459          * - TAG & META are reserved for future uses.
7460          */
7461         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7462                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
7463                                             MLX5_FLOW_ACTION_MARK     |
7464                                             MLX5_FLOW_ACTION_SET_TAG  |
7465                                             MLX5_FLOW_ACTION_SET_META |
7466                                             MLX5_FLOW_ACTION_DROP;
7467
7468                 if (action_flags & bad_actions_mask)
7469                         return rte_flow_error_set
7470                                         (error, EINVAL,
7471                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7472                                         "Invalid RTE action in tunnel "
7473                                         "set decap rule");
7474                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7475                         return rte_flow_error_set
7476                                         (error, EINVAL,
7477                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7478                                         "tunnel set decap rule must terminate "
7479                                         "with JUMP");
7480                 if (!attr->ingress)
7481                         return rte_flow_error_set
7482                                         (error, EINVAL,
7483                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7484                                         "tunnel flows for ingress traffic only");
7485         }
7486         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7487                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
7488                                             MLX5_FLOW_ACTION_MARK    |
7489                                             MLX5_FLOW_ACTION_SET_TAG |
7490                                             MLX5_FLOW_ACTION_SET_META;
7491
7492                 if (action_flags & bad_actions_mask)
7493                         return rte_flow_error_set
7494                                         (error, EINVAL,
7495                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7496                                         "Invalid RTE action in tunnel "
7497                                         "set match rule");
7498         }
7499         /*
7500          * Validate the drop action mutual exclusion with other actions.
7501          * Drop action is mutually-exclusive with any other action, except for
7502          * Count action.
7503          * Drop action compatibility with tunnel offload was already validated.
7504          */
7505         if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7506                             MLX5_FLOW_ACTION_TUNNEL_MATCH));
7507         else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7508             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7509                 return rte_flow_error_set(error, EINVAL,
7510                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7511                                           "Drop action is mutually-exclusive "
7512                                           "with any other action, except for "
7513                                           "Count action");
7514         /* Eswitch has few restrictions on using items and actions */
7515         if (attr->transfer) {
7516                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7517                     action_flags & MLX5_FLOW_ACTION_FLAG)
7518                         return rte_flow_error_set(error, ENOTSUP,
7519                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7520                                                   NULL,
7521                                                   "unsupported action FLAG");
7522                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7523                     action_flags & MLX5_FLOW_ACTION_MARK)
7524                         return rte_flow_error_set(error, ENOTSUP,
7525                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7526                                                   NULL,
7527                                                   "unsupported action MARK");
7528                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7529                         return rte_flow_error_set(error, ENOTSUP,
7530                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7531                                                   NULL,
7532                                                   "unsupported action QUEUE");
7533                 if (action_flags & MLX5_FLOW_ACTION_RSS)
7534                         return rte_flow_error_set(error, ENOTSUP,
7535                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7536                                                   NULL,
7537                                                   "unsupported action RSS");
7538                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7539                         return rte_flow_error_set(error, EINVAL,
7540                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7541                                                   actions,
7542                                                   "no fate action is found");
7543         } else {
7544                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7545                         return rte_flow_error_set(error, EINVAL,
7546                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7547                                                   actions,
7548                                                   "no fate action is found");
7549         }
7550         /*
7551          * Continue validation for Xcap and VLAN actions.
7552          * If hairpin is working in explicit TX rule mode, there is no actions
7553          * splitting and the validation of hairpin ingress flow should be the
7554          * same as other standard flows.
7555          */
7556         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7557                              MLX5_FLOW_VLAN_ACTIONS)) &&
7558             (queue_index == 0xFFFF ||
7559              mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7560              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7561              conf->tx_explicit != 0))) {
7562                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7563                     MLX5_FLOW_XCAP_ACTIONS)
7564                         return rte_flow_error_set(error, ENOTSUP,
7565                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7566                                                   NULL, "encap and decap "
7567                                                   "combination aren't supported");
7568                 if (!attr->transfer && attr->ingress) {
7569                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7570                                 return rte_flow_error_set
7571                                                 (error, ENOTSUP,
7572                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7573                                                  NULL, "encap is not supported"
7574                                                  " for ingress traffic");
7575                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7576                                 return rte_flow_error_set
7577                                                 (error, ENOTSUP,
7578                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7579                                                  NULL, "push VLAN action not "
7580                                                  "supported for ingress");
7581                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7582                                         MLX5_FLOW_VLAN_ACTIONS)
7583                                 return rte_flow_error_set
7584                                                 (error, ENOTSUP,
7585                                                  RTE_FLOW_ERROR_TYPE_ACTION,
7586                                                  NULL, "no support for "
7587                                                  "multiple VLAN actions");
7588                 }
7589         }
7590         if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7591                 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7592                         ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7593                         attr->ingress)
7594                         return rte_flow_error_set
7595                                 (error, ENOTSUP,
7596                                 RTE_FLOW_ERROR_TYPE_ACTION,
7597                                 NULL, "fate action not supported for "
7598                                 "meter with policy");
7599                 if (attr->egress) {
7600                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7601                                 return rte_flow_error_set
7602                                         (error, ENOTSUP,
7603                                         RTE_FLOW_ERROR_TYPE_ACTION,
7604                                         NULL, "modify header action in egress "
7605                                         "cannot be done before meter action");
7606                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7607                                 return rte_flow_error_set
7608                                         (error, ENOTSUP,
7609                                         RTE_FLOW_ERROR_TYPE_ACTION,
7610                                         NULL, "encap action in egress "
7611                                         "cannot be done before meter action");
7612                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7613                                 return rte_flow_error_set
7614                                         (error, ENOTSUP,
7615                                         RTE_FLOW_ERROR_TYPE_ACTION,
7616                                         NULL, "push vlan action in egress "
7617                                         "cannot be done before meter action");
7618                 }
7619         }
7620         /*
7621          * Hairpin flow will add one more TAG action in TX implicit mode.
7622          * In TX explicit mode, there will be no hairpin flow ID.
7623          */
7624         if (hairpin > 0)
7625                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7626         /* extra metadata enabled: one more TAG action will be add. */
7627         if (dev_conf->dv_flow_en &&
7628             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
7629             mlx5_flow_ext_mreg_supported(dev))
7630                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7631         if (rw_act_num >
7632                         flow_dv_modify_hdr_action_max(dev, is_root)) {
7633                 return rte_flow_error_set(error, ENOTSUP,
7634                                           RTE_FLOW_ERROR_TYPE_ACTION,
7635                                           NULL, "too many header modify"
7636                                           " actions to support");
7637         }
7638         /* Eswitch egress mirror and modify flow has limitation on CX5 */
7639         if (fdb_mirror_limit && modify_after_mirror)
7640                 return rte_flow_error_set(error, EINVAL,
7641                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7642                                 "sample before modify action is not supported");
7643         return 0;
7644 }
7645
7646 /**
7647  * Internal preparation function. Allocates the DV flow size,
7648  * this size is constant.
7649  *
7650  * @param[in] dev
7651  *   Pointer to the rte_eth_dev structure.
7652  * @param[in] attr
7653  *   Pointer to the flow attributes.
7654  * @param[in] items
7655  *   Pointer to the list of items.
7656  * @param[in] actions
7657  *   Pointer to the list of actions.
7658  * @param[out] error
7659  *   Pointer to the error structure.
7660  *
7661  * @return
7662  *   Pointer to mlx5_flow object on success,
7663  *   otherwise NULL and rte_errno is set.
7664  */
7665 static struct mlx5_flow *
7666 flow_dv_prepare(struct rte_eth_dev *dev,
7667                 const struct rte_flow_attr *attr __rte_unused,
7668                 const struct rte_flow_item items[] __rte_unused,
7669                 const struct rte_flow_action actions[] __rte_unused,
7670                 struct rte_flow_error *error)
7671 {
7672         uint32_t handle_idx = 0;
7673         struct mlx5_flow *dev_flow;
7674         struct mlx5_flow_handle *dev_handle;
7675         struct mlx5_priv *priv = dev->data->dev_private;
7676         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
7677
7678         MLX5_ASSERT(wks);
7679         wks->skip_matcher_reg = 0;
7680         /* In case of corrupting the memory. */
7681         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
7682                 rte_flow_error_set(error, ENOSPC,
7683                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7684                                    "not free temporary device flow");
7685                 return NULL;
7686         }
7687         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
7688                                    &handle_idx);
7689         if (!dev_handle) {
7690                 rte_flow_error_set(error, ENOMEM,
7691                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
7692                                    "not enough memory to create flow handle");
7693                 return NULL;
7694         }
7695         MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
7696         dev_flow = &wks->flows[wks->flow_idx++];
7697         memset(dev_flow, 0, sizeof(*dev_flow));
7698         dev_flow->handle = dev_handle;
7699         dev_flow->handle_idx = handle_idx;
7700         /*
7701          * In some old rdma-core releases, before continuing, a check of the
7702          * length of matching parameter will be done at first. It needs to use
7703          * the length without misc4 param. If the flow has misc4 support, then
7704          * the length needs to be adjusted accordingly. Each param member is
7705          * aligned with a 64B boundary naturally.
7706          */
7707         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param) -
7708                                   MLX5_ST_SZ_BYTES(fte_match_set_misc4);
7709         dev_flow->ingress = attr->ingress;
7710         dev_flow->dv.transfer = attr->transfer;
7711         return dev_flow;
7712 }
7713
7714 #ifdef RTE_LIBRTE_MLX5_DEBUG
7715 /**
7716  * Sanity check for match mask and value. Similar to check_valid_spec() in
7717  * kernel driver. If unmasked bit is present in value, it returns failure.
7718  *
7719  * @param match_mask
7720  *   pointer to match mask buffer.
7721  * @param match_value
7722  *   pointer to match value buffer.
7723  *
7724  * @return
7725  *   0 if valid, -EINVAL otherwise.
7726  */
7727 static int
7728 flow_dv_check_valid_spec(void *match_mask, void *match_value)
7729 {
7730         uint8_t *m = match_mask;
7731         uint8_t *v = match_value;
7732         unsigned int i;
7733
7734         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
7735                 if (v[i] & ~m[i]) {
7736                         DRV_LOG(ERR,
7737                                 "match_value differs from match_criteria"
7738                                 " %p[%u] != %p[%u]",
7739                                 match_value, i, match_mask, i);
7740                         return -EINVAL;
7741                 }
7742         }
7743         return 0;
7744 }
7745 #endif
7746
7747 /**
7748  * Add match of ip_version.
7749  *
7750  * @param[in] group
7751  *   Flow group.
7752  * @param[in] headers_v
7753  *   Values header pointer.
7754  * @param[in] headers_m
7755  *   Masks header pointer.
7756  * @param[in] ip_version
7757  *   The IP version to set.
7758  */
7759 static inline void
7760 flow_dv_set_match_ip_version(uint32_t group,
7761                              void *headers_v,
7762                              void *headers_m,
7763                              uint8_t ip_version)
7764 {
7765         if (group == 0)
7766                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
7767         else
7768                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
7769                          ip_version);
7770         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
7771         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
7772         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
7773 }
7774
7775 /**
7776  * Add Ethernet item to matcher and to the value.
7777  *
7778  * @param[in, out] matcher
7779  *   Flow matcher.
7780  * @param[in, out] key
7781  *   Flow matcher value.
7782  * @param[in] item
7783  *   Flow pattern to translate.
7784  * @param[in] inner
7785  *   Item is inner pattern.
7786  */
7787 static void
7788 flow_dv_translate_item_eth(void *matcher, void *key,
7789                            const struct rte_flow_item *item, int inner,
7790                            uint32_t group)
7791 {
7792         const struct rte_flow_item_eth *eth_m = item->mask;
7793         const struct rte_flow_item_eth *eth_v = item->spec;
7794         const struct rte_flow_item_eth nic_mask = {
7795                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
7796                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
7797                 .type = RTE_BE16(0xffff),
7798                 .has_vlan = 0,
7799         };
7800         void *hdrs_m;
7801         void *hdrs_v;
7802         char *l24_v;
7803         unsigned int i;
7804
7805         if (!eth_v)
7806                 return;
7807         if (!eth_m)
7808                 eth_m = &nic_mask;
7809         if (inner) {
7810                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
7811                                          inner_headers);
7812                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7813         } else {
7814                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
7815                                          outer_headers);
7816                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7817         }
7818         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
7819                &eth_m->dst, sizeof(eth_m->dst));
7820         /* The value must be in the range of the mask. */
7821         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
7822         for (i = 0; i < sizeof(eth_m->dst); ++i)
7823                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
7824         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
7825                &eth_m->src, sizeof(eth_m->src));
7826         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
7827         /* The value must be in the range of the mask. */
7828         for (i = 0; i < sizeof(eth_m->dst); ++i)
7829                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
7830         /*
7831          * HW supports match on one Ethertype, the Ethertype following the last
7832          * VLAN tag of the packet (see PRM).
7833          * Set match on ethertype only if ETH header is not followed by VLAN.
7834          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
7835          * ethertype, and use ip_version field instead.
7836          * eCPRI over Ether layer will use type value 0xAEFE.
7837          */
7838         if (eth_m->type == 0xFFFF) {
7839                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
7840                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
7841                 switch (eth_v->type) {
7842                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
7843                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
7844                         return;
7845                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
7846                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
7847                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
7848                         return;
7849                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
7850                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
7851                         return;
7852                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
7853                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
7854                         return;
7855                 default:
7856                         break;
7857                 }
7858         }
7859         if (eth_m->has_vlan) {
7860                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
7861                 if (eth_v->has_vlan) {
7862                         /*
7863                          * Here, when also has_more_vlan field in VLAN item is
7864                          * not set, only single-tagged packets will be matched.
7865                          */
7866                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
7867                         return;
7868                 }
7869         }
7870         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
7871                  rte_be_to_cpu_16(eth_m->type));
7872         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
7873         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
7874 }
7875
7876 /**
7877  * Add VLAN item to matcher and to the value.
7878  *
7879  * @param[in, out] dev_flow
7880  *   Flow descriptor.
7881  * @param[in, out] matcher
7882  *   Flow matcher.
7883  * @param[in, out] key
7884  *   Flow matcher value.
7885  * @param[in] item
7886  *   Flow pattern to translate.
7887  * @param[in] inner
7888  *   Item is inner pattern.
7889  */
7890 static void
7891 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
7892                             void *matcher, void *key,
7893                             const struct rte_flow_item *item,
7894                             int inner, uint32_t group)
7895 {
7896         const struct rte_flow_item_vlan *vlan_m = item->mask;
7897         const struct rte_flow_item_vlan *vlan_v = item->spec;
7898         void *hdrs_m;
7899         void *hdrs_v;
7900         uint16_t tci_m;
7901         uint16_t tci_v;
7902
7903         if (inner) {
7904                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
7905                                          inner_headers);
7906                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
7907         } else {
7908                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
7909                                          outer_headers);
7910                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
7911                 /*
7912                  * This is workaround, masks are not supported,
7913                  * and pre-validated.
7914                  */
7915                 if (vlan_v)
7916                         dev_flow->handle->vf_vlan.tag =
7917                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
7918         }
7919         /*
7920          * When VLAN item exists in flow, mark packet as tagged,
7921          * even if TCI is not specified.
7922          */
7923         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
7924                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
7925                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
7926         }
7927         if (!vlan_v)
7928                 return;
7929         if (!vlan_m)
7930                 vlan_m = &rte_flow_item_vlan_mask;
7931         tci_m = rte_be_to_cpu_16(vlan_m->tci);
7932         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
7933         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
7934         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
7935         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
7936         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
7937         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
7938         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
7939         /*
7940          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
7941          * ethertype, and use ip_version field instead.
7942          */
7943         if (vlan_m->inner_type == 0xFFFF) {
7944                 switch (vlan_v->inner_type) {
7945                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
7946                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
7947                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
7948                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
7949                         return;
7950                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
7951                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
7952                         return;
7953                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
7954                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
7955                         return;
7956                 default:
7957                         break;
7958                 }
7959         }
7960         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
7961                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
7962                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
7963                 /* Only one vlan_tag bit can be set. */
7964                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
7965                 return;
7966         }
7967         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
7968                  rte_be_to_cpu_16(vlan_m->inner_type));
7969         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
7970                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
7971 }
7972
7973 /**
7974  * Add IPV4 item to matcher and to the value.
7975  *
7976  * @param[in, out] matcher
7977  *   Flow matcher.
7978  * @param[in, out] key
7979  *   Flow matcher value.
7980  * @param[in] item
7981  *   Flow pattern to translate.
7982  * @param[in] inner
7983  *   Item is inner pattern.
7984  * @param[in] group
7985  *   The group to insert the rule.
7986  */
7987 static void
7988 flow_dv_translate_item_ipv4(void *matcher, void *key,
7989                             const struct rte_flow_item *item,
7990                             int inner, uint32_t group)
7991 {
7992         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
7993         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
7994         const struct rte_flow_item_ipv4 nic_mask = {
7995                 .hdr = {
7996                         .src_addr = RTE_BE32(0xffffffff),
7997                         .dst_addr = RTE_BE32(0xffffffff),
7998                         .type_of_service = 0xff,
7999                         .next_proto_id = 0xff,
8000                         .time_to_live = 0xff,
8001                 },
8002         };
8003         void *headers_m;
8004         void *headers_v;
8005         char *l24_m;
8006         char *l24_v;
8007         uint8_t tos;
8008
8009         if (inner) {
8010                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8011                                          inner_headers);
8012                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8013         } else {
8014                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8015                                          outer_headers);
8016                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8017         }
8018         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8019         if (!ipv4_v)
8020                 return;
8021         if (!ipv4_m)
8022                 ipv4_m = &nic_mask;
8023         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8024                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8025         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8026                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8027         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8028         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8029         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8030                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8031         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8032                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8033         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8034         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8035         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8036         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8037                  ipv4_m->hdr.type_of_service);
8038         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8039         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8040                  ipv4_m->hdr.type_of_service >> 2);
8041         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8042         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8043                  ipv4_m->hdr.next_proto_id);
8044         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8045                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8046         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8047                  ipv4_m->hdr.time_to_live);
8048         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8049                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8050         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8051                  !!(ipv4_m->hdr.fragment_offset));
8052         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8053                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8054 }
8055
8056 /**
8057  * Add IPV6 item to matcher and to the value.
8058  *
8059  * @param[in, out] matcher
8060  *   Flow matcher.
8061  * @param[in, out] key
8062  *   Flow matcher value.
8063  * @param[in] item
8064  *   Flow pattern to translate.
8065  * @param[in] inner
8066  *   Item is inner pattern.
8067  * @param[in] group
8068  *   The group to insert the rule.
8069  */
8070 static void
8071 flow_dv_translate_item_ipv6(void *matcher, void *key,
8072                             const struct rte_flow_item *item,
8073                             int inner, uint32_t group)
8074 {
8075         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8076         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8077         const struct rte_flow_item_ipv6 nic_mask = {
8078                 .hdr = {
8079                         .src_addr =
8080                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8081                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8082                         .dst_addr =
8083                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8084                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8085                         .vtc_flow = RTE_BE32(0xffffffff),
8086                         .proto = 0xff,
8087                         .hop_limits = 0xff,
8088                 },
8089         };
8090         void *headers_m;
8091         void *headers_v;
8092         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8093         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8094         char *l24_m;
8095         char *l24_v;
8096         uint32_t vtc_m;
8097         uint32_t vtc_v;
8098         int i;
8099         int size;
8100
8101         if (inner) {
8102                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8103                                          inner_headers);
8104                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8105         } else {
8106                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8107                                          outer_headers);
8108                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8109         }
8110         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8111         if (!ipv6_v)
8112                 return;
8113         if (!ipv6_m)
8114                 ipv6_m = &nic_mask;
8115         size = sizeof(ipv6_m->hdr.dst_addr);
8116         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8117                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8118         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8119                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8120         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8121         for (i = 0; i < size; ++i)
8122                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8123         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8124                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8125         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8126                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8127         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8128         for (i = 0; i < size; ++i)
8129                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8130         /* TOS. */
8131         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8132         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8133         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8134         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8135         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8136         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8137         /* Label. */
8138         if (inner) {
8139                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8140                          vtc_m);
8141                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8142                          vtc_v);
8143         } else {
8144                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8145                          vtc_m);
8146                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8147                          vtc_v);
8148         }
8149         /* Protocol. */
8150         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8151                  ipv6_m->hdr.proto);
8152         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8153                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8154         /* Hop limit. */
8155         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8156                  ipv6_m->hdr.hop_limits);
8157         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8158                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8159         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8160                  !!(ipv6_m->has_frag_ext));
8161         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8162                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8163 }
8164
8165 /**
8166  * Add IPV6 fragment extension item to matcher and to the value.
8167  *
8168  * @param[in, out] matcher
8169  *   Flow matcher.
8170  * @param[in, out] key
8171  *   Flow matcher value.
8172  * @param[in] item
8173  *   Flow pattern to translate.
8174  * @param[in] inner
8175  *   Item is inner pattern.
8176  */
8177 static void
8178 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8179                                      const struct rte_flow_item *item,
8180                                      int inner)
8181 {
8182         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8183         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8184         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8185                 .hdr = {
8186                         .next_header = 0xff,
8187                         .frag_data = RTE_BE16(0xffff),
8188                 },
8189         };
8190         void *headers_m;
8191         void *headers_v;
8192
8193         if (inner) {
8194                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8195                                          inner_headers);
8196                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8197         } else {
8198                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8199                                          outer_headers);
8200                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8201         }
8202         /* IPv6 fragment extension item exists, so packet is IP fragment. */
8203         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8204         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8205         if (!ipv6_frag_ext_v)
8206                 return;
8207         if (!ipv6_frag_ext_m)
8208                 ipv6_frag_ext_m = &nic_mask;
8209         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8210                  ipv6_frag_ext_m->hdr.next_header);
8211         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8212                  ipv6_frag_ext_v->hdr.next_header &
8213                  ipv6_frag_ext_m->hdr.next_header);
8214 }
8215
8216 /**
8217  * Add TCP item to matcher and to the value.
8218  *
8219  * @param[in, out] matcher
8220  *   Flow matcher.
8221  * @param[in, out] key
8222  *   Flow matcher value.
8223  * @param[in] item
8224  *   Flow pattern to translate.
8225  * @param[in] inner
8226  *   Item is inner pattern.
8227  */
8228 static void
8229 flow_dv_translate_item_tcp(void *matcher, void *key,
8230                            const struct rte_flow_item *item,
8231                            int inner)
8232 {
8233         const struct rte_flow_item_tcp *tcp_m = item->mask;
8234         const struct rte_flow_item_tcp *tcp_v = item->spec;
8235         void *headers_m;
8236         void *headers_v;
8237
8238         if (inner) {
8239                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8240                                          inner_headers);
8241                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8242         } else {
8243                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8244                                          outer_headers);
8245                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8246         }
8247         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8248         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8249         if (!tcp_v)
8250                 return;
8251         if (!tcp_m)
8252                 tcp_m = &rte_flow_item_tcp_mask;
8253         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8254                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
8255         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8256                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8257         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8258                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8259         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8260                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8261         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8262                  tcp_m->hdr.tcp_flags);
8263         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8264                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8265 }
8266
8267 /**
8268  * Add UDP item to matcher and to the value.
8269  *
8270  * @param[in, out] matcher
8271  *   Flow matcher.
8272  * @param[in, out] key
8273  *   Flow matcher value.
8274  * @param[in] item
8275  *   Flow pattern to translate.
8276  * @param[in] inner
8277  *   Item is inner pattern.
8278  */
8279 static void
8280 flow_dv_translate_item_udp(void *matcher, void *key,
8281                            const struct rte_flow_item *item,
8282                            int inner)
8283 {
8284         const struct rte_flow_item_udp *udp_m = item->mask;
8285         const struct rte_flow_item_udp *udp_v = item->spec;
8286         void *headers_m;
8287         void *headers_v;
8288
8289         if (inner) {
8290                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8291                                          inner_headers);
8292                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8293         } else {
8294                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8295                                          outer_headers);
8296                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8297         }
8298         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8299         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8300         if (!udp_v)
8301                 return;
8302         if (!udp_m)
8303                 udp_m = &rte_flow_item_udp_mask;
8304         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8305                  rte_be_to_cpu_16(udp_m->hdr.src_port));
8306         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8307                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8308         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8309                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
8310         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8311                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8312 }
8313
8314 /**
8315  * Add GRE optional Key item to matcher and to the value.
8316  *
8317  * @param[in, out] matcher
8318  *   Flow matcher.
8319  * @param[in, out] key
8320  *   Flow matcher value.
8321  * @param[in] item
8322  *   Flow pattern to translate.
8323  * @param[in] inner
8324  *   Item is inner pattern.
8325  */
8326 static void
8327 flow_dv_translate_item_gre_key(void *matcher, void *key,
8328                                    const struct rte_flow_item *item)
8329 {
8330         const rte_be32_t *key_m = item->mask;
8331         const rte_be32_t *key_v = item->spec;
8332         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8333         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8334         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8335
8336         /* GRE K bit must be on and should already be validated */
8337         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8338         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8339         if (!key_v)
8340                 return;
8341         if (!key_m)
8342                 key_m = &gre_key_default_mask;
8343         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8344                  rte_be_to_cpu_32(*key_m) >> 8);
8345         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8346                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8347         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8348                  rte_be_to_cpu_32(*key_m) & 0xFF);
8349         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8350                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8351 }
8352
8353 /**
8354  * Add GRE item to matcher and to the value.
8355  *
8356  * @param[in, out] matcher
8357  *   Flow matcher.
8358  * @param[in, out] key
8359  *   Flow matcher value.
8360  * @param[in] item
8361  *   Flow pattern to translate.
8362  * @param[in] inner
8363  *   Item is inner pattern.
8364  */
8365 static void
8366 flow_dv_translate_item_gre(void *matcher, void *key,
8367                            const struct rte_flow_item *item,
8368                            int inner)
8369 {
8370         const struct rte_flow_item_gre *gre_m = item->mask;
8371         const struct rte_flow_item_gre *gre_v = item->spec;
8372         void *headers_m;
8373         void *headers_v;
8374         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8375         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8376         struct {
8377                 union {
8378                         __extension__
8379                         struct {
8380                                 uint16_t version:3;
8381                                 uint16_t rsvd0:9;
8382                                 uint16_t s_present:1;
8383                                 uint16_t k_present:1;
8384                                 uint16_t rsvd_bit1:1;
8385                                 uint16_t c_present:1;
8386                         };
8387                         uint16_t value;
8388                 };
8389         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8390
8391         if (inner) {
8392                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8393                                          inner_headers);
8394                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8395         } else {
8396                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8397                                          outer_headers);
8398                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8399         }
8400         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8401         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8402         if (!gre_v)
8403                 return;
8404         if (!gre_m)
8405                 gre_m = &rte_flow_item_gre_mask;
8406         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8407                  rte_be_to_cpu_16(gre_m->protocol));
8408         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8409                  rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8410         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8411         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8412         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8413                  gre_crks_rsvd0_ver_m.c_present);
8414         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8415                  gre_crks_rsvd0_ver_v.c_present &
8416                  gre_crks_rsvd0_ver_m.c_present);
8417         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8418                  gre_crks_rsvd0_ver_m.k_present);
8419         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8420                  gre_crks_rsvd0_ver_v.k_present &
8421                  gre_crks_rsvd0_ver_m.k_present);
8422         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8423                  gre_crks_rsvd0_ver_m.s_present);
8424         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8425                  gre_crks_rsvd0_ver_v.s_present &
8426                  gre_crks_rsvd0_ver_m.s_present);
8427 }
8428
8429 /**
8430  * Add NVGRE item to matcher and to the value.
8431  *
8432  * @param[in, out] matcher
8433  *   Flow matcher.
8434  * @param[in, out] key
8435  *   Flow matcher value.
8436  * @param[in] item
8437  *   Flow pattern to translate.
8438  * @param[in] inner
8439  *   Item is inner pattern.
8440  */
8441 static void
8442 flow_dv_translate_item_nvgre(void *matcher, void *key,
8443                              const struct rte_flow_item *item,
8444                              int inner)
8445 {
8446         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8447         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8448         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8449         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8450         const char *tni_flow_id_m;
8451         const char *tni_flow_id_v;
8452         char *gre_key_m;
8453         char *gre_key_v;
8454         int size;
8455         int i;
8456
8457         /* For NVGRE, GRE header fields must be set with defined values. */
8458         const struct rte_flow_item_gre gre_spec = {
8459                 .c_rsvd0_ver = RTE_BE16(0x2000),
8460                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8461         };
8462         const struct rte_flow_item_gre gre_mask = {
8463                 .c_rsvd0_ver = RTE_BE16(0xB000),
8464                 .protocol = RTE_BE16(UINT16_MAX),
8465         };
8466         const struct rte_flow_item gre_item = {
8467                 .spec = &gre_spec,
8468                 .mask = &gre_mask,
8469                 .last = NULL,
8470         };
8471         flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8472         if (!nvgre_v)
8473                 return;
8474         if (!nvgre_m)
8475                 nvgre_m = &rte_flow_item_nvgre_mask;
8476         tni_flow_id_m = (const char *)nvgre_m->tni;
8477         tni_flow_id_v = (const char *)nvgre_v->tni;
8478         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8479         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8480         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8481         memcpy(gre_key_m, tni_flow_id_m, size);
8482         for (i = 0; i < size; ++i)
8483                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8484 }
8485
8486 /**
8487  * Add VXLAN item to matcher and to the value.
8488  *
8489  * @param[in, out] matcher
8490  *   Flow matcher.
8491  * @param[in, out] key
8492  *   Flow matcher value.
8493  * @param[in] item
8494  *   Flow pattern to translate.
8495  * @param[in] inner
8496  *   Item is inner pattern.
8497  */
8498 static void
8499 flow_dv_translate_item_vxlan(void *matcher, void *key,
8500                              const struct rte_flow_item *item,
8501                              int inner)
8502 {
8503         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8504         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8505         void *headers_m;
8506         void *headers_v;
8507         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8508         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8509         char *vni_m;
8510         char *vni_v;
8511         uint16_t dport;
8512         int size;
8513         int i;
8514
8515         if (inner) {
8516                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8517                                          inner_headers);
8518                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8519         } else {
8520                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8521                                          outer_headers);
8522                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8523         }
8524         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8525                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8526         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8527                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8528                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8529         }
8530         if (!vxlan_v)
8531                 return;
8532         if (!vxlan_m)
8533                 vxlan_m = &rte_flow_item_vxlan_mask;
8534         size = sizeof(vxlan_m->vni);
8535         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8536         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8537         memcpy(vni_m, vxlan_m->vni, size);
8538         for (i = 0; i < size; ++i)
8539                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8540 }
8541
8542 /**
8543  * Add VXLAN-GPE item to matcher and to the value.
8544  *
8545  * @param[in, out] matcher
8546  *   Flow matcher.
8547  * @param[in, out] key
8548  *   Flow matcher value.
8549  * @param[in] item
8550  *   Flow pattern to translate.
8551  * @param[in] inner
8552  *   Item is inner pattern.
8553  */
8554
8555 static void
8556 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
8557                                  const struct rte_flow_item *item, int inner)
8558 {
8559         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
8560         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
8561         void *headers_m;
8562         void *headers_v;
8563         void *misc_m =
8564                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
8565         void *misc_v =
8566                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
8567         char *vni_m;
8568         char *vni_v;
8569         uint16_t dport;
8570         int size;
8571         int i;
8572         uint8_t flags_m = 0xff;
8573         uint8_t flags_v = 0xc;
8574
8575         if (inner) {
8576                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8577                                          inner_headers);
8578                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8579         } else {
8580                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8581                                          outer_headers);
8582                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8583         }
8584         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8585                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8586         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8587                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8588                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8589         }
8590         if (!vxlan_v)
8591                 return;
8592         if (!vxlan_m)
8593                 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
8594         size = sizeof(vxlan_m->vni);
8595         vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
8596         vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
8597         memcpy(vni_m, vxlan_m->vni, size);
8598         for (i = 0; i < size; ++i)
8599                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8600         if (vxlan_m->flags) {
8601                 flags_m = vxlan_m->flags;
8602                 flags_v = vxlan_v->flags;
8603         }
8604         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
8605         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
8606         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
8607                  vxlan_m->protocol);
8608         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
8609                  vxlan_v->protocol);
8610 }
8611
8612 /**
8613  * Add Geneve item to matcher and to the value.
8614  *
8615  * @param[in, out] matcher
8616  *   Flow matcher.
8617  * @param[in, out] key
8618  *   Flow matcher value.
8619  * @param[in] item
8620  *   Flow pattern to translate.
8621  * @param[in] inner
8622  *   Item is inner pattern.
8623  */
8624
8625 static void
8626 flow_dv_translate_item_geneve(void *matcher, void *key,
8627                               const struct rte_flow_item *item, int inner)
8628 {
8629         const struct rte_flow_item_geneve *geneve_m = item->mask;
8630         const struct rte_flow_item_geneve *geneve_v = item->spec;
8631         void *headers_m;
8632         void *headers_v;
8633         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8634         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8635         uint16_t dport;
8636         uint16_t gbhdr_m;
8637         uint16_t gbhdr_v;
8638         char *vni_m;
8639         char *vni_v;
8640         size_t size, i;
8641
8642         if (inner) {
8643                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8644                                          inner_headers);
8645                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8646         } else {
8647                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8648                                          outer_headers);
8649                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8650         }
8651         dport = MLX5_UDP_PORT_GENEVE;
8652         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8653                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8654                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8655         }
8656         if (!geneve_v)
8657                 return;
8658         if (!geneve_m)
8659                 geneve_m = &rte_flow_item_geneve_mask;
8660         size = sizeof(geneve_m->vni);
8661         vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
8662         vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
8663         memcpy(vni_m, geneve_m->vni, size);
8664         for (i = 0; i < size; ++i)
8665                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
8666         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
8667                  rte_be_to_cpu_16(geneve_m->protocol));
8668         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
8669                  rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
8670         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
8671         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
8672         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
8673                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
8674         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
8675                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
8676         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
8677                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
8678         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
8679                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
8680                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
8681 }
8682
8683 /**
8684  * Create Geneve TLV option resource.
8685  *
8686  * @param dev[in, out]
8687  *   Pointer to rte_eth_dev structure.
8688  * @param[in, out] tag_be24
8689  *   Tag value in big endian then R-shift 8.
8690  * @parm[in, out] dev_flow
8691  *   Pointer to the dev_flow.
8692  * @param[out] error
8693  *   pointer to error structure.
8694  *
8695  * @return
8696  *   0 on success otherwise -errno and errno is set.
8697  */
8698
8699 int
8700 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
8701                                              const struct rte_flow_item *item,
8702                                              struct rte_flow_error *error)
8703 {
8704         struct mlx5_priv *priv = dev->data->dev_private;
8705         struct mlx5_dev_ctx_shared *sh = priv->sh;
8706         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
8707                         sh->geneve_tlv_option_resource;
8708         struct mlx5_devx_obj *obj;
8709         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
8710         int ret = 0;
8711
8712         if (!geneve_opt_v)
8713                 return -1;
8714         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
8715         if (geneve_opt_resource != NULL) {
8716                 if (geneve_opt_resource->option_class ==
8717                         geneve_opt_v->option_class &&
8718                         geneve_opt_resource->option_type ==
8719                         geneve_opt_v->option_type &&
8720                         geneve_opt_resource->length ==
8721                         geneve_opt_v->option_len) {
8722                         /* We already have GENVE TLV option obj allocated. */
8723                         __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
8724                                            __ATOMIC_RELAXED);
8725                 } else {
8726                         ret = rte_flow_error_set(error, ENOMEM,
8727                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8728                                 "Only one GENEVE TLV option supported");
8729                         goto exit;
8730                 }
8731         } else {
8732                 /* Create a GENEVE TLV object and resource. */
8733                 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->ctx,
8734                                 geneve_opt_v->option_class,
8735                                 geneve_opt_v->option_type,
8736                                 geneve_opt_v->option_len);
8737                 if (!obj) {
8738                         ret = rte_flow_error_set(error, ENODATA,
8739                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8740                                 "Failed to create GENEVE TLV Devx object");
8741                         goto exit;
8742                 }
8743                 sh->geneve_tlv_option_resource =
8744                                 mlx5_malloc(MLX5_MEM_ZERO,
8745                                                 sizeof(*geneve_opt_resource),
8746                                                 0, SOCKET_ID_ANY);
8747                 if (!sh->geneve_tlv_option_resource) {
8748                         claim_zero(mlx5_devx_cmd_destroy(obj));
8749                         ret = rte_flow_error_set(error, ENOMEM,
8750                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8751                                 "GENEVE TLV object memory allocation failed");
8752                         goto exit;
8753                 }
8754                 geneve_opt_resource = sh->geneve_tlv_option_resource;
8755                 geneve_opt_resource->obj = obj;
8756                 geneve_opt_resource->option_class = geneve_opt_v->option_class;
8757                 geneve_opt_resource->option_type = geneve_opt_v->option_type;
8758                 geneve_opt_resource->length = geneve_opt_v->option_len;
8759                 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
8760                                 __ATOMIC_RELAXED);
8761         }
8762 exit:
8763         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
8764         return ret;
8765 }
8766
8767 /**
8768  * Add Geneve TLV option item to matcher.
8769  *
8770  * @param[in, out] dev
8771  *   Pointer to rte_eth_dev structure.
8772  * @param[in, out] matcher
8773  *   Flow matcher.
8774  * @param[in, out] key
8775  *   Flow matcher value.
8776  * @param[in] item
8777  *   Flow pattern to translate.
8778  * @param[out] error
8779  *   Pointer to error structure.
8780  */
8781 static int
8782 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
8783                                   void *key, const struct rte_flow_item *item,
8784                                   struct rte_flow_error *error)
8785 {
8786         const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
8787         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
8788         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8789         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8790         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
8791                         misc_parameters_3);
8792         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
8793         rte_be32_t opt_data_key = 0, opt_data_mask = 0;
8794         int ret = 0;
8795
8796         if (!geneve_opt_v)
8797                 return -1;
8798         if (!geneve_opt_m)
8799                 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
8800         ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
8801                                                            error);
8802         if (ret) {
8803                 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
8804                 return ret;
8805         }
8806         /*
8807          * Set the option length in GENEVE header if not requested.
8808          * The GENEVE TLV option length is expressed by the option length field
8809          * in the GENEVE header.
8810          * If the option length was not requested but the GENEVE TLV option item
8811          * is present we set the option length field implicitly.
8812          */
8813         if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
8814                 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
8815                          MLX5_GENEVE_OPTLEN_MASK);
8816                 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
8817                          geneve_opt_v->option_len + 1);
8818         }
8819         /* Set the data. */
8820         if (geneve_opt_v->data) {
8821                 memcpy(&opt_data_key, geneve_opt_v->data,
8822                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
8823                                 sizeof(opt_data_key)));
8824                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
8825                                 sizeof(opt_data_key));
8826                 memcpy(&opt_data_mask, geneve_opt_m->data,
8827                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
8828                                 sizeof(opt_data_mask)));
8829                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
8830                                 sizeof(opt_data_mask));
8831                 MLX5_SET(fte_match_set_misc3, misc3_m,
8832                                 geneve_tlv_option_0_data,
8833                                 rte_be_to_cpu_32(opt_data_mask));
8834                 MLX5_SET(fte_match_set_misc3, misc3_v,
8835                                 geneve_tlv_option_0_data,
8836                         rte_be_to_cpu_32(opt_data_key & opt_data_mask));
8837         }
8838         return ret;
8839 }
8840
8841 /**
8842  * Add MPLS item to matcher and to the value.
8843  *
8844  * @param[in, out] matcher
8845  *   Flow matcher.
8846  * @param[in, out] key
8847  *   Flow matcher value.
8848  * @param[in] item
8849  *   Flow pattern to translate.
8850  * @param[in] prev_layer
8851  *   The protocol layer indicated in previous item.
8852  * @param[in] inner
8853  *   Item is inner pattern.
8854  */
8855 static void
8856 flow_dv_translate_item_mpls(void *matcher, void *key,
8857                             const struct rte_flow_item *item,
8858                             uint64_t prev_layer,
8859                             int inner)
8860 {
8861         const uint32_t *in_mpls_m = item->mask;
8862         const uint32_t *in_mpls_v = item->spec;
8863         uint32_t *out_mpls_m = 0;
8864         uint32_t *out_mpls_v = 0;
8865         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8866         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8867         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
8868                                      misc_parameters_2);
8869         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
8870         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
8871         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8872
8873         switch (prev_layer) {
8874         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
8875                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
8876                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8877                          MLX5_UDP_PORT_MPLS);
8878                 break;
8879         case MLX5_FLOW_LAYER_GRE:
8880                 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
8881                 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8882                          RTE_ETHER_TYPE_MPLS);
8883                 break;
8884         default:
8885                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8886                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8887                          IPPROTO_MPLS);
8888                 break;
8889         }
8890         if (!in_mpls_v)
8891                 return;
8892         if (!in_mpls_m)
8893                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
8894         switch (prev_layer) {
8895         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
8896                 out_mpls_m =
8897                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
8898                                                  outer_first_mpls_over_udp);
8899                 out_mpls_v =
8900                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
8901                                                  outer_first_mpls_over_udp);
8902                 break;
8903         case MLX5_FLOW_LAYER_GRE:
8904                 out_mpls_m =
8905                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
8906                                                  outer_first_mpls_over_gre);
8907                 out_mpls_v =
8908                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
8909                                                  outer_first_mpls_over_gre);
8910                 break;
8911         default:
8912                 /* Inner MPLS not over GRE is not supported. */
8913                 if (!inner) {
8914                         out_mpls_m =
8915                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
8916                                                          misc2_m,
8917                                                          outer_first_mpls);
8918                         out_mpls_v =
8919                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
8920                                                          misc2_v,
8921                                                          outer_first_mpls);
8922                 }
8923                 break;
8924         }
8925         if (out_mpls_m && out_mpls_v) {
8926                 *out_mpls_m = *in_mpls_m;
8927                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
8928         }
8929 }
8930
8931 /**
8932  * Add metadata register item to matcher
8933  *
8934  * @param[in, out] matcher
8935  *   Flow matcher.
8936  * @param[in, out] key
8937  *   Flow matcher value.
8938  * @param[in] reg_type
8939  *   Type of device metadata register
8940  * @param[in] value
8941  *   Register value
8942  * @param[in] mask
8943  *   Register mask
8944  */
8945 static void
8946 flow_dv_match_meta_reg(void *matcher, void *key,
8947                        enum modify_reg reg_type,
8948                        uint32_t data, uint32_t mask)
8949 {
8950         void *misc2_m =
8951                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
8952         void *misc2_v =
8953                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
8954         uint32_t temp;
8955
8956         data &= mask;
8957         switch (reg_type) {
8958         case REG_A:
8959                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
8960                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
8961                 break;
8962         case REG_B:
8963                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
8964                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
8965                 break;
8966         case REG_C_0:
8967                 /*
8968                  * The metadata register C0 field might be divided into
8969                  * source vport index and META item value, we should set
8970                  * this field according to specified mask, not as whole one.
8971                  */
8972                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
8973                 temp |= mask;
8974                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
8975                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
8976                 temp &= ~mask;
8977                 temp |= data;
8978                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
8979                 break;
8980         case REG_C_1:
8981                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
8982                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
8983                 break;
8984         case REG_C_2:
8985                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
8986                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
8987                 break;
8988         case REG_C_3:
8989                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
8990                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
8991                 break;
8992         case REG_C_4:
8993                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
8994                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
8995                 break;
8996         case REG_C_5:
8997                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
8998                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
8999                 break;
9000         case REG_C_6:
9001                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9002                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9003                 break;
9004         case REG_C_7:
9005                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9006                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9007                 break;
9008         default:
9009                 MLX5_ASSERT(false);
9010                 break;
9011         }
9012 }
9013
9014 /**
9015  * Add MARK item to matcher
9016  *
9017  * @param[in] dev
9018  *   The device to configure through.
9019  * @param[in, out] matcher
9020  *   Flow matcher.
9021  * @param[in, out] key
9022  *   Flow matcher value.
9023  * @param[in] item
9024  *   Flow pattern to translate.
9025  */
9026 static void
9027 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9028                             void *matcher, void *key,
9029                             const struct rte_flow_item *item)
9030 {
9031         struct mlx5_priv *priv = dev->data->dev_private;
9032         const struct rte_flow_item_mark *mark;
9033         uint32_t value;
9034         uint32_t mask;
9035
9036         mark = item->mask ? (const void *)item->mask :
9037                             &rte_flow_item_mark_mask;
9038         mask = mark->id & priv->sh->dv_mark_mask;
9039         mark = (const void *)item->spec;
9040         MLX5_ASSERT(mark);
9041         value = mark->id & priv->sh->dv_mark_mask & mask;
9042         if (mask) {
9043                 enum modify_reg reg;
9044
9045                 /* Get the metadata register index for the mark. */
9046                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9047                 MLX5_ASSERT(reg > 0);
9048                 if (reg == REG_C_0) {
9049                         struct mlx5_priv *priv = dev->data->dev_private;
9050                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9051                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9052
9053                         mask &= msk_c0;
9054                         mask <<= shl_c0;
9055                         value <<= shl_c0;
9056                 }
9057                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9058         }
9059 }
9060
9061 /**
9062  * Add META item to matcher
9063  *
9064  * @param[in] dev
9065  *   The devich to configure through.
9066  * @param[in, out] matcher
9067  *   Flow matcher.
9068  * @param[in, out] key
9069  *   Flow matcher value.
9070  * @param[in] attr
9071  *   Attributes of flow that includes this item.
9072  * @param[in] item
9073  *   Flow pattern to translate.
9074  */
9075 static void
9076 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9077                             void *matcher, void *key,
9078                             const struct rte_flow_attr *attr,
9079                             const struct rte_flow_item *item)
9080 {
9081         const struct rte_flow_item_meta *meta_m;
9082         const struct rte_flow_item_meta *meta_v;
9083
9084         meta_m = (const void *)item->mask;
9085         if (!meta_m)
9086                 meta_m = &rte_flow_item_meta_mask;
9087         meta_v = (const void *)item->spec;
9088         if (meta_v) {
9089                 int reg;
9090                 uint32_t value = meta_v->data;
9091                 uint32_t mask = meta_m->data;
9092
9093                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9094                 if (reg < 0)
9095                         return;
9096                 MLX5_ASSERT(reg != REG_NON);
9097                 /*
9098                  * In datapath code there is no endianness
9099                  * coversions for perfromance reasons, all
9100                  * pattern conversions are done in rte_flow.
9101                  */
9102                 value = rte_cpu_to_be_32(value);
9103                 mask = rte_cpu_to_be_32(mask);
9104                 if (reg == REG_C_0) {
9105                         struct mlx5_priv *priv = dev->data->dev_private;
9106                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9107                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9108 #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN
9109                         uint32_t shr_c0 = __builtin_clz(priv->sh->dv_meta_mask);
9110
9111                         value >>= shr_c0;
9112                         mask >>= shr_c0;
9113 #endif
9114                         value <<= shl_c0;
9115                         mask <<= shl_c0;
9116                         MLX5_ASSERT(msk_c0);
9117                         MLX5_ASSERT(!(~msk_c0 & mask));
9118                 }
9119                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9120         }
9121 }
9122
9123 /**
9124  * Add vport metadata Reg C0 item to matcher
9125  *
9126  * @param[in, out] matcher
9127  *   Flow matcher.
9128  * @param[in, out] key
9129  *   Flow matcher value.
9130  * @param[in] reg
9131  *   Flow pattern to translate.
9132  */
9133 static void
9134 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9135                                   uint32_t value, uint32_t mask)
9136 {
9137         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9138 }
9139
9140 /**
9141  * Add tag item to matcher
9142  *
9143  * @param[in] dev
9144  *   The devich to configure through.
9145  * @param[in, out] matcher
9146  *   Flow matcher.
9147  * @param[in, out] key
9148  *   Flow matcher value.
9149  * @param[in] item
9150  *   Flow pattern to translate.
9151  */
9152 static void
9153 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9154                                 void *matcher, void *key,
9155                                 const struct rte_flow_item *item)
9156 {
9157         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9158         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9159         uint32_t mask, value;
9160
9161         MLX5_ASSERT(tag_v);
9162         value = tag_v->data;
9163         mask = tag_m ? tag_m->data : UINT32_MAX;
9164         if (tag_v->id == REG_C_0) {
9165                 struct mlx5_priv *priv = dev->data->dev_private;
9166                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9167                 uint32_t shl_c0 = rte_bsf32(msk_c0);
9168
9169                 mask &= msk_c0;
9170                 mask <<= shl_c0;
9171                 value <<= shl_c0;
9172         }
9173         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9174 }
9175
9176 /**
9177  * Add TAG item to matcher
9178  *
9179  * @param[in] dev
9180  *   The devich to configure through.
9181  * @param[in, out] matcher
9182  *   Flow matcher.
9183  * @param[in, out] key
9184  *   Flow matcher value.
9185  * @param[in] item
9186  *   Flow pattern to translate.
9187  */
9188 static void
9189 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9190                            void *matcher, void *key,
9191                            const struct rte_flow_item *item)
9192 {
9193         const struct rte_flow_item_tag *tag_v = item->spec;
9194         const struct rte_flow_item_tag *tag_m = item->mask;
9195         enum modify_reg reg;
9196
9197         MLX5_ASSERT(tag_v);
9198         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9199         /* Get the metadata register index for the tag. */
9200         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9201         MLX5_ASSERT(reg > 0);
9202         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9203 }
9204
9205 /**
9206  * Add source vport match to the specified matcher.
9207  *
9208  * @param[in, out] matcher
9209  *   Flow matcher.
9210  * @param[in, out] key
9211  *   Flow matcher value.
9212  * @param[in] port
9213  *   Source vport value to match
9214  * @param[in] mask
9215  *   Mask
9216  */
9217 static void
9218 flow_dv_translate_item_source_vport(void *matcher, void *key,
9219                                     int16_t port, uint16_t mask)
9220 {
9221         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9222         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9223
9224         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9225         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9226 }
9227
9228 /**
9229  * Translate port-id item to eswitch match on  port-id.
9230  *
9231  * @param[in] dev
9232  *   The devich to configure through.
9233  * @param[in, out] matcher
9234  *   Flow matcher.
9235  * @param[in, out] key
9236  *   Flow matcher value.
9237  * @param[in] item
9238  *   Flow pattern to translate.
9239  * @param[in]
9240  *   Flow attributes.
9241  *
9242  * @return
9243  *   0 on success, a negative errno value otherwise.
9244  */
9245 static int
9246 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9247                                void *key, const struct rte_flow_item *item,
9248                                const struct rte_flow_attr *attr)
9249 {
9250         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9251         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9252         struct mlx5_priv *priv;
9253         uint16_t mask, id;
9254
9255         mask = pid_m ? pid_m->id : 0xffff;
9256         id = pid_v ? pid_v->id : dev->data->port_id;
9257         priv = mlx5_port_to_eswitch_info(id, item == NULL);
9258         if (!priv)
9259                 return -rte_errno;
9260         /*
9261          * Translate to vport field or to metadata, depending on mode.
9262          * Kernel can use either misc.source_port or half of C0 metadata
9263          * register.
9264          */
9265         if (priv->vport_meta_mask) {
9266                 /*
9267                  * Provide the hint for SW steering library
9268                  * to insert the flow into ingress domain and
9269                  * save the extra vport match.
9270                  */
9271                 if (mask == 0xffff && priv->vport_id == 0xffff &&
9272                     priv->pf_bond < 0 && attr->transfer)
9273                         flow_dv_translate_item_source_vport
9274                                 (matcher, key, priv->vport_id, mask);
9275                 /*
9276                  * We should always set the vport metadata register,
9277                  * otherwise the SW steering library can drop
9278                  * the rule if wire vport metadata value is not zero,
9279                  * it depends on kernel configuration.
9280                  */
9281                 flow_dv_translate_item_meta_vport(matcher, key,
9282                                                   priv->vport_meta_tag,
9283                                                   priv->vport_meta_mask);
9284         } else {
9285                 flow_dv_translate_item_source_vport(matcher, key,
9286                                                     priv->vport_id, mask);
9287         }
9288         return 0;
9289 }
9290
9291 /**
9292  * Add ICMP6 item to matcher and to the value.
9293  *
9294  * @param[in, out] matcher
9295  *   Flow matcher.
9296  * @param[in, out] key
9297  *   Flow matcher value.
9298  * @param[in] item
9299  *   Flow pattern to translate.
9300  * @param[in] inner
9301  *   Item is inner pattern.
9302  */
9303 static void
9304 flow_dv_translate_item_icmp6(void *matcher, void *key,
9305                               const struct rte_flow_item *item,
9306                               int inner)
9307 {
9308         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9309         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9310         void *headers_m;
9311         void *headers_v;
9312         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9313                                      misc_parameters_3);
9314         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9315         if (inner) {
9316                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9317                                          inner_headers);
9318                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9319         } else {
9320                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9321                                          outer_headers);
9322                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9323         }
9324         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9325         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9326         if (!icmp6_v)
9327                 return;
9328         if (!icmp6_m)
9329                 icmp6_m = &rte_flow_item_icmp6_mask;
9330         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9331         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9332                  icmp6_v->type & icmp6_m->type);
9333         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9334         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9335                  icmp6_v->code & icmp6_m->code);
9336 }
9337
9338 /**
9339  * Add ICMP item to matcher and to the value.
9340  *
9341  * @param[in, out] matcher
9342  *   Flow matcher.
9343  * @param[in, out] key
9344  *   Flow matcher value.
9345  * @param[in] item
9346  *   Flow pattern to translate.
9347  * @param[in] inner
9348  *   Item is inner pattern.
9349  */
9350 static void
9351 flow_dv_translate_item_icmp(void *matcher, void *key,
9352                             const struct rte_flow_item *item,
9353                             int inner)
9354 {
9355         const struct rte_flow_item_icmp *icmp_m = item->mask;
9356         const struct rte_flow_item_icmp *icmp_v = item->spec;
9357         uint32_t icmp_header_data_m = 0;
9358         uint32_t icmp_header_data_v = 0;
9359         void *headers_m;
9360         void *headers_v;
9361         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9362                                      misc_parameters_3);
9363         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9364         if (inner) {
9365                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9366                                          inner_headers);
9367                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9368         } else {
9369                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9370                                          outer_headers);
9371                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9372         }
9373         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9374         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9375         if (!icmp_v)
9376                 return;
9377         if (!icmp_m)
9378                 icmp_m = &rte_flow_item_icmp_mask;
9379         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9380                  icmp_m->hdr.icmp_type);
9381         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9382                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9383         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9384                  icmp_m->hdr.icmp_code);
9385         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9386                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9387         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9388         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9389         if (icmp_header_data_m) {
9390                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9391                 icmp_header_data_v |=
9392                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9393                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9394                          icmp_header_data_m);
9395                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9396                          icmp_header_data_v & icmp_header_data_m);
9397         }
9398 }
9399
9400 /**
9401  * Add GTP item to matcher and to the value.
9402  *
9403  * @param[in, out] matcher
9404  *   Flow matcher.
9405  * @param[in, out] key
9406  *   Flow matcher value.
9407  * @param[in] item
9408  *   Flow pattern to translate.
9409  * @param[in] inner
9410  *   Item is inner pattern.
9411  */
9412 static void
9413 flow_dv_translate_item_gtp(void *matcher, void *key,
9414                            const struct rte_flow_item *item, int inner)
9415 {
9416         const struct rte_flow_item_gtp *gtp_m = item->mask;
9417         const struct rte_flow_item_gtp *gtp_v = item->spec;
9418         void *headers_m;
9419         void *headers_v;
9420         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9421                                      misc_parameters_3);
9422         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9423         uint16_t dport = RTE_GTPU_UDP_PORT;
9424
9425         if (inner) {
9426                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9427                                          inner_headers);
9428                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9429         } else {
9430                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9431                                          outer_headers);
9432                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9433         }
9434         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9435                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9436                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9437         }
9438         if (!gtp_v)
9439                 return;
9440         if (!gtp_m)
9441                 gtp_m = &rte_flow_item_gtp_mask;
9442         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9443                  gtp_m->v_pt_rsv_flags);
9444         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9445                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9446         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9447         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9448                  gtp_v->msg_type & gtp_m->msg_type);
9449         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9450                  rte_be_to_cpu_32(gtp_m->teid));
9451         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9452                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9453 }
9454
9455 /**
9456  * Add GTP PSC item to matcher.
9457  *
9458  * @param[in, out] matcher
9459  *   Flow matcher.
9460  * @param[in, out] key
9461  *   Flow matcher value.
9462  * @param[in] item
9463  *   Flow pattern to translate.
9464  */
9465 static int
9466 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9467                                const struct rte_flow_item *item)
9468 {
9469         const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9470         const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9471         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9472                         misc_parameters_3);
9473         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9474         union {
9475                 uint32_t w32;
9476                 struct {
9477                         uint16_t seq_num;
9478                         uint8_t npdu_num;
9479                         uint8_t next_ext_header_type;
9480                 };
9481         } dw_2;
9482         uint8_t gtp_flags;
9483
9484         /* Always set E-flag match on one, regardless of GTP item settings. */
9485         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9486         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9487         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9488         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9489         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9490         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9491         /*Set next extension header type. */
9492         dw_2.seq_num = 0;
9493         dw_2.npdu_num = 0;
9494         dw_2.next_ext_header_type = 0xff;
9495         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9496                  rte_cpu_to_be_32(dw_2.w32));
9497         dw_2.seq_num = 0;
9498         dw_2.npdu_num = 0;
9499         dw_2.next_ext_header_type = 0x85;
9500         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9501                  rte_cpu_to_be_32(dw_2.w32));
9502         if (gtp_psc_v) {
9503                 union {
9504                         uint32_t w32;
9505                         struct {
9506                                 uint8_t len;
9507                                 uint8_t type_flags;
9508                                 uint8_t qfi;
9509                                 uint8_t reserved;
9510                         };
9511                 } dw_0;
9512
9513                 /*Set extension header PDU type and Qos. */
9514                 if (!gtp_psc_m)
9515                         gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9516                 dw_0.w32 = 0;
9517                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->pdu_type);
9518                 dw_0.qfi = gtp_psc_m->qfi;
9519                 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9520                          rte_cpu_to_be_32(dw_0.w32));
9521                 dw_0.w32 = 0;
9522                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->pdu_type &
9523                                                         gtp_psc_m->pdu_type);
9524                 dw_0.qfi = gtp_psc_v->qfi & gtp_psc_m->qfi;
9525                 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9526                          rte_cpu_to_be_32(dw_0.w32));
9527         }
9528         return 0;
9529 }
9530
9531 /**
9532  * Add eCPRI item to matcher and to the value.
9533  *
9534  * @param[in] dev
9535  *   The devich to configure through.
9536  * @param[in, out] matcher
9537  *   Flow matcher.
9538  * @param[in, out] key
9539  *   Flow matcher value.
9540  * @param[in] item
9541  *   Flow pattern to translate.
9542  * @param[in] samples
9543  *   Sample IDs to be used in the matching.
9544  */
9545 static void
9546 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9547                              void *key, const struct rte_flow_item *item)
9548 {
9549         struct mlx5_priv *priv = dev->data->dev_private;
9550         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9551         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9552         struct rte_ecpri_common_hdr common;
9553         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9554                                      misc_parameters_4);
9555         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9556         uint32_t *samples;
9557         void *dw_m;
9558         void *dw_v;
9559
9560         if (!ecpri_v)
9561                 return;
9562         if (!ecpri_m)
9563                 ecpri_m = &rte_flow_item_ecpri_mask;
9564         /*
9565          * Maximal four DW samples are supported in a single matching now.
9566          * Two are used now for a eCPRI matching:
9567          * 1. Type: one byte, mask should be 0x00ff0000 in network order
9568          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
9569          *    if any.
9570          */
9571         if (!ecpri_m->hdr.common.u32)
9572                 return;
9573         samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
9574         /* Need to take the whole DW as the mask to fill the entry. */
9575         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9576                             prog_sample_field_value_0);
9577         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9578                             prog_sample_field_value_0);
9579         /* Already big endian (network order) in the header. */
9580         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
9581         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
9582         /* Sample#0, used for matching type, offset 0. */
9583         MLX5_SET(fte_match_set_misc4, misc4_m,
9584                  prog_sample_field_id_0, samples[0]);
9585         /* It makes no sense to set the sample ID in the mask field. */
9586         MLX5_SET(fte_match_set_misc4, misc4_v,
9587                  prog_sample_field_id_0, samples[0]);
9588         /*
9589          * Checking if message body part needs to be matched.
9590          * Some wildcard rules only matching type field should be supported.
9591          */
9592         if (ecpri_m->hdr.dummy[0]) {
9593                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
9594                 switch (common.type) {
9595                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
9596                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
9597                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
9598                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9599                                             prog_sample_field_value_1);
9600                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9601                                             prog_sample_field_value_1);
9602                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
9603                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
9604                                             ecpri_m->hdr.dummy[0];
9605                         /* Sample#1, to match message body, offset 4. */
9606                         MLX5_SET(fte_match_set_misc4, misc4_m,
9607                                  prog_sample_field_id_1, samples[1]);
9608                         MLX5_SET(fte_match_set_misc4, misc4_v,
9609                                  prog_sample_field_id_1, samples[1]);
9610                         break;
9611                 default:
9612                         /* Others, do not match any sample ID. */
9613                         break;
9614                 }
9615         }
9616 }
9617
9618 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
9619
9620 #define HEADER_IS_ZERO(match_criteria, headers)                              \
9621         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
9622                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
9623
9624 /**
9625  * Calculate flow matcher enable bitmap.
9626  *
9627  * @param match_criteria
9628  *   Pointer to flow matcher criteria.
9629  *
9630  * @return
9631  *   Bitmap of enabled fields.
9632  */
9633 static uint8_t
9634 flow_dv_matcher_enable(uint32_t *match_criteria)
9635 {
9636         uint8_t match_criteria_enable;
9637
9638         match_criteria_enable =
9639                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
9640                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
9641         match_criteria_enable |=
9642                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
9643                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
9644         match_criteria_enable |=
9645                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
9646                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
9647         match_criteria_enable |=
9648                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
9649                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
9650         match_criteria_enable |=
9651                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
9652                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
9653         match_criteria_enable |=
9654                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
9655                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
9656         return match_criteria_enable;
9657 }
9658
9659 struct mlx5_hlist_entry *
9660 flow_dv_tbl_create_cb(struct mlx5_hlist *list, uint64_t key64, void *cb_ctx)
9661 {
9662         struct mlx5_dev_ctx_shared *sh = list->ctx;
9663         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9664         struct rte_eth_dev *dev = ctx->dev;
9665         struct mlx5_flow_tbl_data_entry *tbl_data;
9666         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data;
9667         struct rte_flow_error *error = ctx->error;
9668         union mlx5_flow_tbl_key key = { .v64 = key64 };
9669         struct mlx5_flow_tbl_resource *tbl;
9670         void *domain;
9671         uint32_t idx = 0;
9672         int ret;
9673
9674         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
9675         if (!tbl_data) {
9676                 rte_flow_error_set(error, ENOMEM,
9677                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9678                                    NULL,
9679                                    "cannot allocate flow table data entry");
9680                 return NULL;
9681         }
9682         tbl_data->idx = idx;
9683         tbl_data->tunnel = tt_prm->tunnel;
9684         tbl_data->group_id = tt_prm->group_id;
9685         tbl_data->external = !!tt_prm->external;
9686         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
9687         tbl_data->is_egress = !!key.is_egress;
9688         tbl_data->is_transfer = !!key.is_fdb;
9689         tbl_data->dummy = !!key.dummy;
9690         tbl_data->level = key.level;
9691         tbl_data->id = key.id;
9692         tbl = &tbl_data->tbl;
9693         if (key.dummy)
9694                 return &tbl_data->entry;
9695         if (key.is_fdb)
9696                 domain = sh->fdb_domain;
9697         else if (key.is_egress)
9698                 domain = sh->tx_domain;
9699         else
9700                 domain = sh->rx_domain;
9701         ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
9702         if (ret) {
9703                 rte_flow_error_set(error, ENOMEM,
9704                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9705                                    NULL, "cannot create flow table object");
9706                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
9707                 return NULL;
9708         }
9709         if (key.level != 0) {
9710                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
9711                                         (tbl->obj, &tbl_data->jump.action);
9712                 if (ret) {
9713                         rte_flow_error_set(error, ENOMEM,
9714                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
9715                                            NULL,
9716                                            "cannot create flow jump action");
9717                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
9718                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
9719                         return NULL;
9720                 }
9721         }
9722         MKSTR(matcher_name, "%s_%s_%u_%u_matcher_cache",
9723               key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
9724               key.level, key.id);
9725         mlx5_cache_list_init(&tbl_data->matchers, matcher_name, 0, sh,
9726                              flow_dv_matcher_create_cb,
9727                              flow_dv_matcher_match_cb,
9728                              flow_dv_matcher_remove_cb);
9729         return &tbl_data->entry;
9730 }
9731
9732 int
9733 flow_dv_tbl_match_cb(struct mlx5_hlist *list __rte_unused,
9734                      struct mlx5_hlist_entry *entry, uint64_t key64,
9735                      void *cb_ctx __rte_unused)
9736 {
9737         struct mlx5_flow_tbl_data_entry *tbl_data =
9738                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
9739         union mlx5_flow_tbl_key key = { .v64 = key64 };
9740
9741         return tbl_data->level != key.level ||
9742                tbl_data->id != key.id ||
9743                tbl_data->dummy != key.dummy ||
9744                tbl_data->is_transfer != !!key.is_fdb ||
9745                tbl_data->is_egress != !!key.is_egress;
9746 }
9747
9748 /**
9749  * Get a flow table.
9750  *
9751  * @param[in, out] dev
9752  *   Pointer to rte_eth_dev structure.
9753  * @param[in] table_level
9754  *   Table level to use.
9755  * @param[in] egress
9756  *   Direction of the table.
9757  * @param[in] transfer
9758  *   E-Switch or NIC flow.
9759  * @param[in] dummy
9760  *   Dummy entry for dv API.
9761  * @param[in] table_id
9762  *   Table id to use.
9763  * @param[out] error
9764  *   pointer to error structure.
9765  *
9766  * @return
9767  *   Returns tables resource based on the index, NULL in case of failed.
9768  */
9769 struct mlx5_flow_tbl_resource *
9770 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
9771                          uint32_t table_level, uint8_t egress,
9772                          uint8_t transfer,
9773                          bool external,
9774                          const struct mlx5_flow_tunnel *tunnel,
9775                          uint32_t group_id, uint8_t dummy,
9776                          uint32_t table_id,
9777                          struct rte_flow_error *error)
9778 {
9779         struct mlx5_priv *priv = dev->data->dev_private;
9780         union mlx5_flow_tbl_key table_key = {
9781                 {
9782                         .level = table_level,
9783                         .id = table_id,
9784                         .reserved = 0,
9785                         .dummy = !!dummy,
9786                         .is_fdb = !!transfer,
9787                         .is_egress = !!egress,
9788                 }
9789         };
9790         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
9791                 .tunnel = tunnel,
9792                 .group_id = group_id,
9793                 .external = external,
9794         };
9795         struct mlx5_flow_cb_ctx ctx = {
9796                 .dev = dev,
9797                 .error = error,
9798                 .data = &tt_prm,
9799         };
9800         struct mlx5_hlist_entry *entry;
9801         struct mlx5_flow_tbl_data_entry *tbl_data;
9802
9803         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
9804         if (!entry) {
9805                 rte_flow_error_set(error, ENOMEM,
9806                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9807                                    "cannot get table");
9808                 return NULL;
9809         }
9810         DRV_LOG(DEBUG, "table_level %u table_id %u "
9811                 "tunnel %u group %u registered.",
9812                 table_level, table_id,
9813                 tunnel ? tunnel->tunnel_id : 0, group_id);
9814         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
9815         return &tbl_data->tbl;
9816 }
9817
9818 void
9819 flow_dv_tbl_remove_cb(struct mlx5_hlist *list,
9820                       struct mlx5_hlist_entry *entry)
9821 {
9822         struct mlx5_dev_ctx_shared *sh = list->ctx;
9823         struct mlx5_flow_tbl_data_entry *tbl_data =
9824                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
9825
9826         MLX5_ASSERT(entry && sh);
9827         if (tbl_data->jump.action)
9828                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
9829         if (tbl_data->tbl.obj)
9830                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
9831         if (tbl_data->tunnel_offload && tbl_data->external) {
9832                 struct mlx5_hlist_entry *he;
9833                 struct mlx5_hlist *tunnel_grp_hash;
9834                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
9835                 union tunnel_tbl_key tunnel_key = {
9836                         .tunnel_id = tbl_data->tunnel ?
9837                                         tbl_data->tunnel->tunnel_id : 0,
9838                         .group = tbl_data->group_id
9839                 };
9840                 uint32_t table_level = tbl_data->level;
9841
9842                 tunnel_grp_hash = tbl_data->tunnel ?
9843                                         tbl_data->tunnel->groups :
9844                                         thub->groups;
9845                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, NULL);
9846                 if (he)
9847                         mlx5_hlist_unregister(tunnel_grp_hash, he);
9848                 DRV_LOG(DEBUG,
9849                         "table_level %u id %u tunnel %u group %u released.",
9850                         table_level,
9851                         tbl_data->id,
9852                         tbl_data->tunnel ?
9853                         tbl_data->tunnel->tunnel_id : 0,
9854                         tbl_data->group_id);
9855         }
9856         mlx5_cache_list_destroy(&tbl_data->matchers);
9857         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
9858 }
9859
9860 /**
9861  * Release a flow table.
9862  *
9863  * @param[in] sh
9864  *   Pointer to device shared structure.
9865  * @param[in] tbl
9866  *   Table resource to be released.
9867  *
9868  * @return
9869  *   Returns 0 if table was released, else return 1;
9870  */
9871 static int
9872 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
9873                              struct mlx5_flow_tbl_resource *tbl)
9874 {
9875         struct mlx5_flow_tbl_data_entry *tbl_data =
9876                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
9877
9878         if (!tbl)
9879                 return 0;
9880         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
9881 }
9882
9883 int
9884 flow_dv_matcher_match_cb(struct mlx5_cache_list *list __rte_unused,
9885                          struct mlx5_cache_entry *entry, void *cb_ctx)
9886 {
9887         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9888         struct mlx5_flow_dv_matcher *ref = ctx->data;
9889         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
9890                                                         entry);
9891
9892         return cur->crc != ref->crc ||
9893                cur->priority != ref->priority ||
9894                memcmp((const void *)cur->mask.buf,
9895                       (const void *)ref->mask.buf, ref->mask.size);
9896 }
9897
9898 struct mlx5_cache_entry *
9899 flow_dv_matcher_create_cb(struct mlx5_cache_list *list,
9900                           struct mlx5_cache_entry *entry __rte_unused,
9901                           void *cb_ctx)
9902 {
9903         struct mlx5_dev_ctx_shared *sh = list->ctx;
9904         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
9905         struct mlx5_flow_dv_matcher *ref = ctx->data;
9906         struct mlx5_flow_dv_matcher *cache;
9907         struct mlx5dv_flow_matcher_attr dv_attr = {
9908                 .type = IBV_FLOW_ATTR_NORMAL,
9909                 .match_mask = (void *)&ref->mask,
9910         };
9911         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
9912                                                             typeof(*tbl), tbl);
9913         int ret;
9914
9915         cache = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*cache), 0, SOCKET_ID_ANY);
9916         if (!cache) {
9917                 rte_flow_error_set(ctx->error, ENOMEM,
9918                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9919                                    "cannot create matcher");
9920                 return NULL;
9921         }
9922         *cache = *ref;
9923         dv_attr.match_criteria_enable =
9924                 flow_dv_matcher_enable(cache->mask.buf);
9925         dv_attr.priority = ref->priority;
9926         if (tbl->is_egress)
9927                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
9928         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
9929                                                &cache->matcher_object);
9930         if (ret) {
9931                 mlx5_free(cache);
9932                 rte_flow_error_set(ctx->error, ENOMEM,
9933                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9934                                    "cannot create matcher");
9935                 return NULL;
9936         }
9937         return &cache->entry;
9938 }
9939
9940 /**
9941  * Register the flow matcher.
9942  *
9943  * @param[in, out] dev
9944  *   Pointer to rte_eth_dev structure.
9945  * @param[in, out] matcher
9946  *   Pointer to flow matcher.
9947  * @param[in, out] key
9948  *   Pointer to flow table key.
9949  * @parm[in, out] dev_flow
9950  *   Pointer to the dev_flow.
9951  * @param[out] error
9952  *   pointer to error structure.
9953  *
9954  * @return
9955  *   0 on success otherwise -errno and errno is set.
9956  */
9957 static int
9958 flow_dv_matcher_register(struct rte_eth_dev *dev,
9959                          struct mlx5_flow_dv_matcher *ref,
9960                          union mlx5_flow_tbl_key *key,
9961                          struct mlx5_flow *dev_flow,
9962                          const struct mlx5_flow_tunnel *tunnel,
9963                          uint32_t group_id,
9964                          struct rte_flow_error *error)
9965 {
9966         struct mlx5_cache_entry *entry;
9967         struct mlx5_flow_dv_matcher *cache;
9968         struct mlx5_flow_tbl_resource *tbl;
9969         struct mlx5_flow_tbl_data_entry *tbl_data;
9970         struct mlx5_flow_cb_ctx ctx = {
9971                 .error = error,
9972                 .data = ref,
9973         };
9974
9975         /**
9976          * tunnel offload API requires this registration for cases when
9977          * tunnel match rule was inserted before tunnel set rule.
9978          */
9979         tbl = flow_dv_tbl_resource_get(dev, key->level,
9980                                        key->is_egress, key->is_fdb,
9981                                        dev_flow->external, tunnel,
9982                                        group_id, 0, key->id, error);
9983         if (!tbl)
9984                 return -rte_errno;      /* No need to refill the error info */
9985         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
9986         ref->tbl = tbl;
9987         entry = mlx5_cache_register(&tbl_data->matchers, &ctx);
9988         if (!entry) {
9989                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
9990                 return rte_flow_error_set(error, ENOMEM,
9991                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9992                                           "cannot allocate ref memory");
9993         }
9994         cache = container_of(entry, typeof(*cache), entry);
9995         dev_flow->handle->dvh.matcher = cache;
9996         return 0;
9997 }
9998
9999 struct mlx5_hlist_entry *
10000 flow_dv_tag_create_cb(struct mlx5_hlist *list, uint64_t key, void *ctx)
10001 {
10002         struct mlx5_dev_ctx_shared *sh = list->ctx;
10003         struct rte_flow_error *error = ctx;
10004         struct mlx5_flow_dv_tag_resource *entry;
10005         uint32_t idx = 0;
10006         int ret;
10007
10008         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10009         if (!entry) {
10010                 rte_flow_error_set(error, ENOMEM,
10011                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10012                                    "cannot allocate resource memory");
10013                 return NULL;
10014         }
10015         entry->idx = idx;
10016         entry->tag_id = key;
10017         ret = mlx5_flow_os_create_flow_action_tag(key,
10018                                                   &entry->action);
10019         if (ret) {
10020                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10021                 rte_flow_error_set(error, ENOMEM,
10022                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10023                                    NULL, "cannot create action");
10024                 return NULL;
10025         }
10026         return &entry->entry;
10027 }
10028
10029 int
10030 flow_dv_tag_match_cb(struct mlx5_hlist *list __rte_unused,
10031                      struct mlx5_hlist_entry *entry, uint64_t key,
10032                      void *cb_ctx __rte_unused)
10033 {
10034         struct mlx5_flow_dv_tag_resource *tag =
10035                 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10036
10037         return key != tag->tag_id;
10038 }
10039
10040 /**
10041  * Find existing tag resource or create and register a new one.
10042  *
10043  * @param dev[in, out]
10044  *   Pointer to rte_eth_dev structure.
10045  * @param[in, out] tag_be24
10046  *   Tag value in big endian then R-shift 8.
10047  * @parm[in, out] dev_flow
10048  *   Pointer to the dev_flow.
10049  * @param[out] error
10050  *   pointer to error structure.
10051  *
10052  * @return
10053  *   0 on success otherwise -errno and errno is set.
10054  */
10055 static int
10056 flow_dv_tag_resource_register
10057                         (struct rte_eth_dev *dev,
10058                          uint32_t tag_be24,
10059                          struct mlx5_flow *dev_flow,
10060                          struct rte_flow_error *error)
10061 {
10062         struct mlx5_priv *priv = dev->data->dev_private;
10063         struct mlx5_flow_dv_tag_resource *cache_resource;
10064         struct mlx5_hlist_entry *entry;
10065
10066         entry = mlx5_hlist_register(priv->sh->tag_table, tag_be24, error);
10067         if (entry) {
10068                 cache_resource = container_of
10069                         (entry, struct mlx5_flow_dv_tag_resource, entry);
10070                 dev_flow->handle->dvh.rix_tag = cache_resource->idx;
10071                 dev_flow->dv.tag_resource = cache_resource;
10072                 return 0;
10073         }
10074         return -rte_errno;
10075 }
10076
10077 void
10078 flow_dv_tag_remove_cb(struct mlx5_hlist *list,
10079                       struct mlx5_hlist_entry *entry)
10080 {
10081         struct mlx5_dev_ctx_shared *sh = list->ctx;
10082         struct mlx5_flow_dv_tag_resource *tag =
10083                 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10084
10085         MLX5_ASSERT(tag && sh && tag->action);
10086         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10087         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10088         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10089 }
10090
10091 /**
10092  * Release the tag.
10093  *
10094  * @param dev
10095  *   Pointer to Ethernet device.
10096  * @param tag_idx
10097  *   Tag index.
10098  *
10099  * @return
10100  *   1 while a reference on it exists, 0 when freed.
10101  */
10102 static int
10103 flow_dv_tag_release(struct rte_eth_dev *dev,
10104                     uint32_t tag_idx)
10105 {
10106         struct mlx5_priv *priv = dev->data->dev_private;
10107         struct mlx5_flow_dv_tag_resource *tag;
10108
10109         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10110         if (!tag)
10111                 return 0;
10112         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10113                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10114         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10115 }
10116
10117 /**
10118  * Translate port ID action to vport.
10119  *
10120  * @param[in] dev
10121  *   Pointer to rte_eth_dev structure.
10122  * @param[in] action
10123  *   Pointer to the port ID action.
10124  * @param[out] dst_port_id
10125  *   The target port ID.
10126  * @param[out] error
10127  *   Pointer to the error structure.
10128  *
10129  * @return
10130  *   0 on success, a negative errno value otherwise and rte_errno is set.
10131  */
10132 static int
10133 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10134                                  const struct rte_flow_action *action,
10135                                  uint32_t *dst_port_id,
10136                                  struct rte_flow_error *error)
10137 {
10138         uint32_t port;
10139         struct mlx5_priv *priv;
10140         const struct rte_flow_action_port_id *conf =
10141                         (const struct rte_flow_action_port_id *)action->conf;
10142
10143         port = conf->original ? dev->data->port_id : conf->id;
10144         priv = mlx5_port_to_eswitch_info(port, false);
10145         if (!priv)
10146                 return rte_flow_error_set(error, -rte_errno,
10147                                           RTE_FLOW_ERROR_TYPE_ACTION,
10148                                           NULL,
10149                                           "No eswitch info was found for port");
10150 #ifdef HAVE_MLX5DV_DR_DEVX_PORT
10151         /*
10152          * This parameter is transferred to
10153          * mlx5dv_dr_action_create_dest_ib_port().
10154          */
10155         *dst_port_id = priv->dev_port;
10156 #else
10157         /*
10158          * Legacy mode, no LAG configurations is supported.
10159          * This parameter is transferred to
10160          * mlx5dv_dr_action_create_dest_vport().
10161          */
10162         *dst_port_id = priv->vport_id;
10163 #endif
10164         return 0;
10165 }
10166
10167 /**
10168  * Create a counter with aging configuration.
10169  *
10170  * @param[in] dev
10171  *   Pointer to rte_eth_dev structure.
10172  * @param[in] dev_flow
10173  *   Pointer to the mlx5_flow.
10174  * @param[out] count
10175  *   Pointer to the counter action configuration.
10176  * @param[in] age
10177  *   Pointer to the aging action configuration.
10178  *
10179  * @return
10180  *   Index to flow counter on success, 0 otherwise.
10181  */
10182 static uint32_t
10183 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10184                                 struct mlx5_flow *dev_flow,
10185                                 const struct rte_flow_action_count *count,
10186                                 const struct rte_flow_action_age *age)
10187 {
10188         uint32_t counter;
10189         struct mlx5_age_param *age_param;
10190
10191         if (count && count->shared)
10192                 counter = flow_dv_counter_get_shared(dev, count->id);
10193         else
10194                 counter = flow_dv_counter_alloc(dev, !!age);
10195         if (!counter || age == NULL)
10196                 return counter;
10197         age_param = flow_dv_counter_idx_get_age(dev, counter);
10198         age_param->context = age->context ? age->context :
10199                 (void *)(uintptr_t)(dev_flow->flow_idx);
10200         age_param->timeout = age->timeout;
10201         age_param->port_id = dev->data->port_id;
10202         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10203         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10204         return counter;
10205 }
10206
10207 /**
10208  * Add Tx queue matcher
10209  *
10210  * @param[in] dev
10211  *   Pointer to the dev struct.
10212  * @param[in, out] matcher
10213  *   Flow matcher.
10214  * @param[in, out] key
10215  *   Flow matcher value.
10216  * @param[in] item
10217  *   Flow pattern to translate.
10218  * @param[in] inner
10219  *   Item is inner pattern.
10220  */
10221 static void
10222 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10223                                 void *matcher, void *key,
10224                                 const struct rte_flow_item *item)
10225 {
10226         const struct mlx5_rte_flow_item_tx_queue *queue_m;
10227         const struct mlx5_rte_flow_item_tx_queue *queue_v;
10228         void *misc_m =
10229                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10230         void *misc_v =
10231                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10232         struct mlx5_txq_ctrl *txq;
10233         uint32_t queue;
10234
10235
10236         queue_m = (const void *)item->mask;
10237         if (!queue_m)
10238                 return;
10239         queue_v = (const void *)item->spec;
10240         if (!queue_v)
10241                 return;
10242         txq = mlx5_txq_get(dev, queue_v->queue);
10243         if (!txq)
10244                 return;
10245         queue = txq->obj->sq->id;
10246         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
10247         MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
10248                  queue & queue_m->queue);
10249         mlx5_txq_release(dev, queue_v->queue);
10250 }
10251
10252 /**
10253  * Set the hash fields according to the @p flow information.
10254  *
10255  * @param[in] dev_flow
10256  *   Pointer to the mlx5_flow.
10257  * @param[in] rss_desc
10258  *   Pointer to the mlx5_flow_rss_desc.
10259  */
10260 static void
10261 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10262                        struct mlx5_flow_rss_desc *rss_desc)
10263 {
10264         uint64_t items = dev_flow->handle->layers;
10265         int rss_inner = 0;
10266         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10267
10268         dev_flow->hash_fields = 0;
10269 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10270         if (rss_desc->level >= 2) {
10271                 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10272                 rss_inner = 1;
10273         }
10274 #endif
10275         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10276             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10277                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10278                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
10279                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10280                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
10281                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10282                         else
10283                                 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10284                 }
10285         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10286                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10287                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10288                         if (rss_types & ETH_RSS_L3_SRC_ONLY)
10289                                 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10290                         else if (rss_types & ETH_RSS_L3_DST_ONLY)
10291                                 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10292                         else
10293                                 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10294                 }
10295         }
10296         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10297             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10298                 if (rss_types & ETH_RSS_UDP) {
10299                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
10300                                 dev_flow->hash_fields |=
10301                                                 IBV_RX_HASH_SRC_PORT_UDP;
10302                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
10303                                 dev_flow->hash_fields |=
10304                                                 IBV_RX_HASH_DST_PORT_UDP;
10305                         else
10306                                 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10307                 }
10308         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10309                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10310                 if (rss_types & ETH_RSS_TCP) {
10311                         if (rss_types & ETH_RSS_L4_SRC_ONLY)
10312                                 dev_flow->hash_fields |=
10313                                                 IBV_RX_HASH_SRC_PORT_TCP;
10314                         else if (rss_types & ETH_RSS_L4_DST_ONLY)
10315                                 dev_flow->hash_fields |=
10316                                                 IBV_RX_HASH_DST_PORT_TCP;
10317                         else
10318                                 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10319                 }
10320         }
10321 }
10322
10323 /**
10324  * Prepare an Rx Hash queue.
10325  *
10326  * @param dev
10327  *   Pointer to Ethernet device.
10328  * @param[in] dev_flow
10329  *   Pointer to the mlx5_flow.
10330  * @param[in] rss_desc
10331  *   Pointer to the mlx5_flow_rss_desc.
10332  * @param[out] hrxq_idx
10333  *   Hash Rx queue index.
10334  *
10335  * @return
10336  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10337  */
10338 static struct mlx5_hrxq *
10339 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
10340                      struct mlx5_flow *dev_flow,
10341                      struct mlx5_flow_rss_desc *rss_desc,
10342                      uint32_t *hrxq_idx)
10343 {
10344         struct mlx5_priv *priv = dev->data->dev_private;
10345         struct mlx5_flow_handle *dh = dev_flow->handle;
10346         struct mlx5_hrxq *hrxq;
10347
10348         MLX5_ASSERT(rss_desc->queue_num);
10349         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
10350         rss_desc->hash_fields = dev_flow->hash_fields;
10351         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
10352         rss_desc->shared_rss = 0;
10353         *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
10354         if (!*hrxq_idx)
10355                 return NULL;
10356         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10357                               *hrxq_idx);
10358         return hrxq;
10359 }
10360
10361 /**
10362  * Release sample sub action resource.
10363  *
10364  * @param[in, out] dev
10365  *   Pointer to rte_eth_dev structure.
10366  * @param[in] act_res
10367  *   Pointer to sample sub action resource.
10368  */
10369 static void
10370 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
10371                                    struct mlx5_flow_sub_actions_idx *act_res)
10372 {
10373         if (act_res->rix_hrxq) {
10374                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
10375                 act_res->rix_hrxq = 0;
10376         }
10377         if (act_res->rix_encap_decap) {
10378                 flow_dv_encap_decap_resource_release(dev,
10379                                                      act_res->rix_encap_decap);
10380                 act_res->rix_encap_decap = 0;
10381         }
10382         if (act_res->rix_port_id_action) {
10383                 flow_dv_port_id_action_resource_release(dev,
10384                                                 act_res->rix_port_id_action);
10385                 act_res->rix_port_id_action = 0;
10386         }
10387         if (act_res->rix_tag) {
10388                 flow_dv_tag_release(dev, act_res->rix_tag);
10389                 act_res->rix_tag = 0;
10390         }
10391         if (act_res->rix_jump) {
10392                 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
10393                 act_res->rix_jump = 0;
10394         }
10395 }
10396
10397 int
10398 flow_dv_sample_match_cb(struct mlx5_cache_list *list __rte_unused,
10399                         struct mlx5_cache_entry *entry, void *cb_ctx)
10400 {
10401         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10402         struct rte_eth_dev *dev = ctx->dev;
10403         struct mlx5_flow_dv_sample_resource *resource = ctx->data;
10404         struct mlx5_flow_dv_sample_resource *cache_resource =
10405                         container_of(entry, typeof(*cache_resource), entry);
10406
10407         if (resource->ratio == cache_resource->ratio &&
10408             resource->ft_type == cache_resource->ft_type &&
10409             resource->ft_id == cache_resource->ft_id &&
10410             resource->set_action == cache_resource->set_action &&
10411             !memcmp((void *)&resource->sample_act,
10412                     (void *)&cache_resource->sample_act,
10413                     sizeof(struct mlx5_flow_sub_actions_list))) {
10414                 /*
10415                  * Existing sample action should release the prepared
10416                  * sub-actions reference counter.
10417                  */
10418                 flow_dv_sample_sub_actions_release(dev,
10419                                                 &resource->sample_idx);
10420                 return 0;
10421         }
10422         return 1;
10423 }
10424
10425 struct mlx5_cache_entry *
10426 flow_dv_sample_create_cb(struct mlx5_cache_list *list __rte_unused,
10427                          struct mlx5_cache_entry *entry __rte_unused,
10428                          void *cb_ctx)
10429 {
10430         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10431         struct rte_eth_dev *dev = ctx->dev;
10432         struct mlx5_flow_dv_sample_resource *resource = ctx->data;
10433         void **sample_dv_actions = resource->sub_actions;
10434         struct mlx5_flow_dv_sample_resource *cache_resource;
10435         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
10436         struct mlx5_priv *priv = dev->data->dev_private;
10437         struct mlx5_dev_ctx_shared *sh = priv->sh;
10438         struct mlx5_flow_tbl_resource *tbl;
10439         uint32_t idx = 0;
10440         const uint32_t next_ft_step = 1;
10441         uint32_t next_ft_id = resource->ft_id + next_ft_step;
10442         uint8_t is_egress = 0;
10443         uint8_t is_transfer = 0;
10444         struct rte_flow_error *error = ctx->error;
10445
10446         /* Register new sample resource. */
10447         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
10448         if (!cache_resource) {
10449                 rte_flow_error_set(error, ENOMEM,
10450                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10451                                           NULL,
10452                                           "cannot allocate resource memory");
10453                 return NULL;
10454         }
10455         *cache_resource = *resource;
10456         /* Create normal path table level */
10457         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
10458                 is_transfer = 1;
10459         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
10460                 is_egress = 1;
10461         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
10462                                         is_egress, is_transfer,
10463                                         true, NULL, 0, 0, 0, error);
10464         if (!tbl) {
10465                 rte_flow_error_set(error, ENOMEM,
10466                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10467                                           NULL,
10468                                           "fail to create normal path table "
10469                                           "for sample");
10470                 goto error;
10471         }
10472         cache_resource->normal_path_tbl = tbl;
10473         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
10474                 if (!sh->default_miss_action) {
10475                         rte_flow_error_set(error, ENOMEM,
10476                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10477                                                 NULL,
10478                                                 "default miss action was not "
10479                                                 "created");
10480                         goto error;
10481                 }
10482                 sample_dv_actions[resource->sample_act.actions_num++] =
10483                                                 sh->default_miss_action;
10484         }
10485         /* Create a DR sample action */
10486         sampler_attr.sample_ratio = cache_resource->ratio;
10487         sampler_attr.default_next_table = tbl->obj;
10488         sampler_attr.num_sample_actions = resource->sample_act.actions_num;
10489         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
10490                                                         &sample_dv_actions[0];
10491         sampler_attr.action = cache_resource->set_action;
10492         if (mlx5_os_flow_dr_create_flow_action_sampler
10493                         (&sampler_attr, &cache_resource->verbs_action)) {
10494                 rte_flow_error_set(error, ENOMEM,
10495                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10496                                         NULL, "cannot create sample action");
10497                 goto error;
10498         }
10499         cache_resource->idx = idx;
10500         cache_resource->dev = dev;
10501         return &cache_resource->entry;
10502 error:
10503         if (cache_resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
10504                 flow_dv_sample_sub_actions_release(dev,
10505                                                    &cache_resource->sample_idx);
10506         if (cache_resource->normal_path_tbl)
10507                 flow_dv_tbl_resource_release(MLX5_SH(dev),
10508                                 cache_resource->normal_path_tbl);
10509         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
10510         return NULL;
10511
10512 }
10513
10514 /**
10515  * Find existing sample resource or create and register a new one.
10516  *
10517  * @param[in, out] dev
10518  *   Pointer to rte_eth_dev structure.
10519  * @param[in] resource
10520  *   Pointer to sample resource.
10521  * @parm[in, out] dev_flow
10522  *   Pointer to the dev_flow.
10523  * @param[out] error
10524  *   pointer to error structure.
10525  *
10526  * @return
10527  *   0 on success otherwise -errno and errno is set.
10528  */
10529 static int
10530 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
10531                          struct mlx5_flow_dv_sample_resource *resource,
10532                          struct mlx5_flow *dev_flow,
10533                          struct rte_flow_error *error)
10534 {
10535         struct mlx5_flow_dv_sample_resource *cache_resource;
10536         struct mlx5_cache_entry *entry;
10537         struct mlx5_priv *priv = dev->data->dev_private;
10538         struct mlx5_flow_cb_ctx ctx = {
10539                 .dev = dev,
10540                 .error = error,
10541                 .data = resource,
10542         };
10543
10544         entry = mlx5_cache_register(&priv->sh->sample_action_list, &ctx);
10545         if (!entry)
10546                 return -rte_errno;
10547         cache_resource = container_of(entry, typeof(*cache_resource), entry);
10548         dev_flow->handle->dvh.rix_sample = cache_resource->idx;
10549         dev_flow->dv.sample_res = cache_resource;
10550         return 0;
10551 }
10552
10553 int
10554 flow_dv_dest_array_match_cb(struct mlx5_cache_list *list __rte_unused,
10555                             struct mlx5_cache_entry *entry, void *cb_ctx)
10556 {
10557         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10558         struct mlx5_flow_dv_dest_array_resource *resource = ctx->data;
10559         struct rte_eth_dev *dev = ctx->dev;
10560         struct mlx5_flow_dv_dest_array_resource *cache_resource =
10561                         container_of(entry, typeof(*cache_resource), entry);
10562         uint32_t idx = 0;
10563
10564         if (resource->num_of_dest == cache_resource->num_of_dest &&
10565             resource->ft_type == cache_resource->ft_type &&
10566             !memcmp((void *)cache_resource->sample_act,
10567                     (void *)resource->sample_act,
10568                    (resource->num_of_dest *
10569                    sizeof(struct mlx5_flow_sub_actions_list)))) {
10570                 /*
10571                  * Existing sample action should release the prepared
10572                  * sub-actions reference counter.
10573                  */
10574                 for (idx = 0; idx < resource->num_of_dest; idx++)
10575                         flow_dv_sample_sub_actions_release(dev,
10576                                         &resource->sample_idx[idx]);
10577                 return 0;
10578         }
10579         return 1;
10580 }
10581
10582 struct mlx5_cache_entry *
10583 flow_dv_dest_array_create_cb(struct mlx5_cache_list *list __rte_unused,
10584                          struct mlx5_cache_entry *entry __rte_unused,
10585                          void *cb_ctx)
10586 {
10587         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10588         struct rte_eth_dev *dev = ctx->dev;
10589         struct mlx5_flow_dv_dest_array_resource *cache_resource;
10590         struct mlx5_flow_dv_dest_array_resource *resource = ctx->data;
10591         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
10592         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
10593         struct mlx5_priv *priv = dev->data->dev_private;
10594         struct mlx5_dev_ctx_shared *sh = priv->sh;
10595         struct mlx5_flow_sub_actions_list *sample_act;
10596         struct mlx5dv_dr_domain *domain;
10597         uint32_t idx = 0, res_idx = 0;
10598         struct rte_flow_error *error = ctx->error;
10599         uint64_t action_flags;
10600         int ret;
10601
10602         /* Register new destination array resource. */
10603         cache_resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
10604                                             &res_idx);
10605         if (!cache_resource) {
10606                 rte_flow_error_set(error, ENOMEM,
10607                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10608                                           NULL,
10609                                           "cannot allocate resource memory");
10610                 return NULL;
10611         }
10612         *cache_resource = *resource;
10613         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
10614                 domain = sh->fdb_domain;
10615         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
10616                 domain = sh->rx_domain;
10617         else
10618                 domain = sh->tx_domain;
10619         for (idx = 0; idx < resource->num_of_dest; idx++) {
10620                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
10621                                  mlx5_malloc(MLX5_MEM_ZERO,
10622                                  sizeof(struct mlx5dv_dr_action_dest_attr),
10623                                  0, SOCKET_ID_ANY);
10624                 if (!dest_attr[idx]) {
10625                         rte_flow_error_set(error, ENOMEM,
10626                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10627                                            NULL,
10628                                            "cannot allocate resource memory");
10629                         goto error;
10630                 }
10631                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
10632                 sample_act = &resource->sample_act[idx];
10633                 action_flags = sample_act->action_flags;
10634                 switch (action_flags) {
10635                 case MLX5_FLOW_ACTION_QUEUE:
10636                         dest_attr[idx]->dest = sample_act->dr_queue_action;
10637                         break;
10638                 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
10639                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
10640                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
10641                         dest_attr[idx]->dest_reformat->reformat =
10642                                         sample_act->dr_encap_action;
10643                         dest_attr[idx]->dest_reformat->dest =
10644                                         sample_act->dr_port_id_action;
10645                         break;
10646                 case MLX5_FLOW_ACTION_PORT_ID:
10647                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
10648                         break;
10649                 case MLX5_FLOW_ACTION_JUMP:
10650                         dest_attr[idx]->dest = sample_act->dr_jump_action;
10651                         break;
10652                 default:
10653                         rte_flow_error_set(error, EINVAL,
10654                                            RTE_FLOW_ERROR_TYPE_ACTION,
10655                                            NULL,
10656                                            "unsupported actions type");
10657                         goto error;
10658                 }
10659         }
10660         /* create a dest array actioin */
10661         ret = mlx5_os_flow_dr_create_flow_action_dest_array
10662                                                 (domain,
10663                                                  cache_resource->num_of_dest,
10664                                                  dest_attr,
10665                                                  &cache_resource->action);
10666         if (ret) {
10667                 rte_flow_error_set(error, ENOMEM,
10668                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10669                                    NULL,
10670                                    "cannot create destination array action");
10671                 goto error;
10672         }
10673         cache_resource->idx = res_idx;
10674         cache_resource->dev = dev;
10675         for (idx = 0; idx < resource->num_of_dest; idx++)
10676                 mlx5_free(dest_attr[idx]);
10677         return &cache_resource->entry;
10678 error:
10679         for (idx = 0; idx < resource->num_of_dest; idx++) {
10680                 flow_dv_sample_sub_actions_release(dev,
10681                                 &cache_resource->sample_idx[idx]);
10682                 if (dest_attr[idx])
10683                         mlx5_free(dest_attr[idx]);
10684         }
10685
10686         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
10687         return NULL;
10688 }
10689
10690 /**
10691  * Find existing destination array resource or create and register a new one.
10692  *
10693  * @param[in, out] dev
10694  *   Pointer to rte_eth_dev structure.
10695  * @param[in] resource
10696  *   Pointer to destination array resource.
10697  * @parm[in, out] dev_flow
10698  *   Pointer to the dev_flow.
10699  * @param[out] error
10700  *   pointer to error structure.
10701  *
10702  * @return
10703  *   0 on success otherwise -errno and errno is set.
10704  */
10705 static int
10706 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
10707                          struct mlx5_flow_dv_dest_array_resource *resource,
10708                          struct mlx5_flow *dev_flow,
10709                          struct rte_flow_error *error)
10710 {
10711         struct mlx5_flow_dv_dest_array_resource *cache_resource;
10712         struct mlx5_priv *priv = dev->data->dev_private;
10713         struct mlx5_cache_entry *entry;
10714         struct mlx5_flow_cb_ctx ctx = {
10715                 .dev = dev,
10716                 .error = error,
10717                 .data = resource,
10718         };
10719
10720         entry = mlx5_cache_register(&priv->sh->dest_array_list, &ctx);
10721         if (!entry)
10722                 return -rte_errno;
10723         cache_resource = container_of(entry, typeof(*cache_resource), entry);
10724         dev_flow->handle->dvh.rix_dest_array = cache_resource->idx;
10725         dev_flow->dv.dest_array_res = cache_resource;
10726         return 0;
10727 }
10728
10729 /**
10730  * Convert Sample action to DV specification.
10731  *
10732  * @param[in] dev
10733  *   Pointer to rte_eth_dev structure.
10734  * @param[in] action
10735  *   Pointer to sample action structure.
10736  * @param[in, out] dev_flow
10737  *   Pointer to the mlx5_flow.
10738  * @param[in] attr
10739  *   Pointer to the flow attributes.
10740  * @param[in, out] num_of_dest
10741  *   Pointer to the num of destination.
10742  * @param[in, out] sample_actions
10743  *   Pointer to sample actions list.
10744  * @param[in, out] res
10745  *   Pointer to sample resource.
10746  * @param[out] error
10747  *   Pointer to the error structure.
10748  *
10749  * @return
10750  *   0 on success, a negative errno value otherwise and rte_errno is set.
10751  */
10752 static int
10753 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
10754                                 const struct rte_flow_action_sample *action,
10755                                 struct mlx5_flow *dev_flow,
10756                                 const struct rte_flow_attr *attr,
10757                                 uint32_t *num_of_dest,
10758                                 void **sample_actions,
10759                                 struct mlx5_flow_dv_sample_resource *res,
10760                                 struct rte_flow_error *error)
10761 {
10762         struct mlx5_priv *priv = dev->data->dev_private;
10763         const struct rte_flow_action *sub_actions;
10764         struct mlx5_flow_sub_actions_list *sample_act;
10765         struct mlx5_flow_sub_actions_idx *sample_idx;
10766         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
10767         struct rte_flow *flow = dev_flow->flow;
10768         struct mlx5_flow_rss_desc *rss_desc;
10769         uint64_t action_flags = 0;
10770
10771         MLX5_ASSERT(wks);
10772         rss_desc = &wks->rss_desc;
10773         sample_act = &res->sample_act;
10774         sample_idx = &res->sample_idx;
10775         res->ratio = action->ratio;
10776         sub_actions = action->actions;
10777         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
10778                 int type = sub_actions->type;
10779                 uint32_t pre_rix = 0;
10780                 void *pre_r;
10781                 switch (type) {
10782                 case RTE_FLOW_ACTION_TYPE_QUEUE:
10783                 {
10784                         const struct rte_flow_action_queue *queue;
10785                         struct mlx5_hrxq *hrxq;
10786                         uint32_t hrxq_idx;
10787
10788                         queue = sub_actions->conf;
10789                         rss_desc->queue_num = 1;
10790                         rss_desc->queue[0] = queue->index;
10791                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
10792                                                     rss_desc, &hrxq_idx);
10793                         if (!hrxq)
10794                                 return rte_flow_error_set
10795                                         (error, rte_errno,
10796                                          RTE_FLOW_ERROR_TYPE_ACTION,
10797                                          NULL,
10798                                          "cannot create fate queue");
10799                         sample_act->dr_queue_action = hrxq->action;
10800                         sample_idx->rix_hrxq = hrxq_idx;
10801                         sample_actions[sample_act->actions_num++] =
10802                                                 hrxq->action;
10803                         (*num_of_dest)++;
10804                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
10805                         if (action_flags & MLX5_FLOW_ACTION_MARK)
10806                                 dev_flow->handle->rix_hrxq = hrxq_idx;
10807                         dev_flow->handle->fate_action =
10808                                         MLX5_FLOW_FATE_QUEUE;
10809                         break;
10810                 }
10811                 case RTE_FLOW_ACTION_TYPE_RSS:
10812                 {
10813                         struct mlx5_hrxq *hrxq;
10814                         uint32_t hrxq_idx;
10815                         const struct rte_flow_action_rss *rss;
10816                         const uint8_t *rss_key;
10817
10818                         rss = sub_actions->conf;
10819                         memcpy(rss_desc->queue, rss->queue,
10820                                rss->queue_num * sizeof(uint16_t));
10821                         rss_desc->queue_num = rss->queue_num;
10822                         /* NULL RSS key indicates default RSS key. */
10823                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
10824                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
10825                         /*
10826                          * rss->level and rss.types should be set in advance
10827                          * when expanding items for RSS.
10828                          */
10829                         flow_dv_hashfields_set(dev_flow, rss_desc);
10830                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
10831                                                     rss_desc, &hrxq_idx);
10832                         if (!hrxq)
10833                                 return rte_flow_error_set
10834                                         (error, rte_errno,
10835                                          RTE_FLOW_ERROR_TYPE_ACTION,
10836                                          NULL,
10837                                          "cannot create fate queue");
10838                         sample_act->dr_queue_action = hrxq->action;
10839                         sample_idx->rix_hrxq = hrxq_idx;
10840                         sample_actions[sample_act->actions_num++] =
10841                                                 hrxq->action;
10842                         (*num_of_dest)++;
10843                         action_flags |= MLX5_FLOW_ACTION_RSS;
10844                         if (action_flags & MLX5_FLOW_ACTION_MARK)
10845                                 dev_flow->handle->rix_hrxq = hrxq_idx;
10846                         dev_flow->handle->fate_action =
10847                                         MLX5_FLOW_FATE_QUEUE;
10848                         break;
10849                 }
10850                 case RTE_FLOW_ACTION_TYPE_MARK:
10851                 {
10852                         uint32_t tag_be = mlx5_flow_mark_set
10853                                 (((const struct rte_flow_action_mark *)
10854                                 (sub_actions->conf))->id);
10855
10856                         dev_flow->handle->mark = 1;
10857                         pre_rix = dev_flow->handle->dvh.rix_tag;
10858                         /* Save the mark resource before sample */
10859                         pre_r = dev_flow->dv.tag_resource;
10860                         if (flow_dv_tag_resource_register(dev, tag_be,
10861                                                   dev_flow, error))
10862                                 return -rte_errno;
10863                         MLX5_ASSERT(dev_flow->dv.tag_resource);
10864                         sample_act->dr_tag_action =
10865                                 dev_flow->dv.tag_resource->action;
10866                         sample_idx->rix_tag =
10867                                 dev_flow->handle->dvh.rix_tag;
10868                         sample_actions[sample_act->actions_num++] =
10869                                                 sample_act->dr_tag_action;
10870                         /* Recover the mark resource after sample */
10871                         dev_flow->dv.tag_resource = pre_r;
10872                         dev_flow->handle->dvh.rix_tag = pre_rix;
10873                         action_flags |= MLX5_FLOW_ACTION_MARK;
10874                         break;
10875                 }
10876                 case RTE_FLOW_ACTION_TYPE_COUNT:
10877                 {
10878                         if (!flow->counter) {
10879                                 flow->counter =
10880                                         flow_dv_translate_create_counter(dev,
10881                                                 dev_flow, sub_actions->conf,
10882                                                 0);
10883                                 if (!flow->counter)
10884                                         return rte_flow_error_set
10885                                                 (error, rte_errno,
10886                                                 RTE_FLOW_ERROR_TYPE_ACTION,
10887                                                 NULL,
10888                                                 "cannot create counter"
10889                                                 " object.");
10890                         }
10891                         sample_act->dr_cnt_action =
10892                                   (flow_dv_counter_get_by_idx(dev,
10893                                   flow->counter, NULL))->action;
10894                         sample_actions[sample_act->actions_num++] =
10895                                                 sample_act->dr_cnt_action;
10896                         action_flags |= MLX5_FLOW_ACTION_COUNT;
10897                         break;
10898                 }
10899                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
10900                 {
10901                         struct mlx5_flow_dv_port_id_action_resource
10902                                         port_id_resource;
10903                         uint32_t port_id = 0;
10904
10905                         memset(&port_id_resource, 0, sizeof(port_id_resource));
10906                         /* Save the port id resource before sample */
10907                         pre_rix = dev_flow->handle->rix_port_id_action;
10908                         pre_r = dev_flow->dv.port_id_action;
10909                         if (flow_dv_translate_action_port_id(dev, sub_actions,
10910                                                              &port_id, error))
10911                                 return -rte_errno;
10912                         port_id_resource.port_id = port_id;
10913                         if (flow_dv_port_id_action_resource_register
10914                             (dev, &port_id_resource, dev_flow, error))
10915                                 return -rte_errno;
10916                         sample_act->dr_port_id_action =
10917                                 dev_flow->dv.port_id_action->action;
10918                         sample_idx->rix_port_id_action =
10919                                 dev_flow->handle->rix_port_id_action;
10920                         sample_actions[sample_act->actions_num++] =
10921                                                 sample_act->dr_port_id_action;
10922                         /* Recover the port id resource after sample */
10923                         dev_flow->dv.port_id_action = pre_r;
10924                         dev_flow->handle->rix_port_id_action = pre_rix;
10925                         (*num_of_dest)++;
10926                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
10927                         break;
10928                 }
10929                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
10930                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
10931                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
10932                         /* Save the encap resource before sample */
10933                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
10934                         pre_r = dev_flow->dv.encap_decap;
10935                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
10936                                                            dev_flow,
10937                                                            attr->transfer,
10938                                                            error))
10939                                 return -rte_errno;
10940                         sample_act->dr_encap_action =
10941                                 dev_flow->dv.encap_decap->action;
10942                         sample_idx->rix_encap_decap =
10943                                 dev_flow->handle->dvh.rix_encap_decap;
10944                         sample_actions[sample_act->actions_num++] =
10945                                                 sample_act->dr_encap_action;
10946                         /* Recover the encap resource after sample */
10947                         dev_flow->dv.encap_decap = pre_r;
10948                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
10949                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
10950                         break;
10951                 default:
10952                         return rte_flow_error_set(error, EINVAL,
10953                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10954                                 NULL,
10955                                 "Not support for sampler action");
10956                 }
10957         }
10958         sample_act->action_flags = action_flags;
10959         res->ft_id = dev_flow->dv.group;
10960         if (attr->transfer) {
10961                 union {
10962                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
10963                         uint64_t set_action;
10964                 } action_ctx = { .set_action = 0 };
10965
10966                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
10967                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
10968                          MLX5_MODIFICATION_TYPE_SET);
10969                 MLX5_SET(set_action_in, action_ctx.action_in, field,
10970                          MLX5_MODI_META_REG_C_0);
10971                 MLX5_SET(set_action_in, action_ctx.action_in, data,
10972                          priv->vport_meta_tag);
10973                 res->set_action = action_ctx.set_action;
10974         } else if (attr->ingress) {
10975                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
10976         } else {
10977                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
10978         }
10979         return 0;
10980 }
10981
10982 /**
10983  * Convert Sample action to DV specification.
10984  *
10985  * @param[in] dev
10986  *   Pointer to rte_eth_dev structure.
10987  * @param[in, out] dev_flow
10988  *   Pointer to the mlx5_flow.
10989  * @param[in] num_of_dest
10990  *   The num of destination.
10991  * @param[in, out] res
10992  *   Pointer to sample resource.
10993  * @param[in, out] mdest_res
10994  *   Pointer to destination array resource.
10995  * @param[in] sample_actions
10996  *   Pointer to sample path actions list.
10997  * @param[in] action_flags
10998  *   Holds the actions detected until now.
10999  * @param[out] error
11000  *   Pointer to the error structure.
11001  *
11002  * @return
11003  *   0 on success, a negative errno value otherwise and rte_errno is set.
11004  */
11005 static int
11006 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11007                              struct mlx5_flow *dev_flow,
11008                              uint32_t num_of_dest,
11009                              struct mlx5_flow_dv_sample_resource *res,
11010                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
11011                              void **sample_actions,
11012                              uint64_t action_flags,
11013                              struct rte_flow_error *error)
11014 {
11015         /* update normal path action resource into last index of array */
11016         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11017         struct mlx5_flow_sub_actions_list *sample_act =
11018                                         &mdest_res->sample_act[dest_index];
11019         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11020         struct mlx5_flow_rss_desc *rss_desc;
11021         uint32_t normal_idx = 0;
11022         struct mlx5_hrxq *hrxq;
11023         uint32_t hrxq_idx;
11024
11025         MLX5_ASSERT(wks);
11026         rss_desc = &wks->rss_desc;
11027         if (num_of_dest > 1) {
11028                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11029                         /* Handle QP action for mirroring */
11030                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11031                                                     rss_desc, &hrxq_idx);
11032                         if (!hrxq)
11033                                 return rte_flow_error_set
11034                                      (error, rte_errno,
11035                                       RTE_FLOW_ERROR_TYPE_ACTION,
11036                                       NULL,
11037                                       "cannot create rx queue");
11038                         normal_idx++;
11039                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11040                         sample_act->dr_queue_action = hrxq->action;
11041                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11042                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11043                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11044                 }
11045                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11046                         normal_idx++;
11047                         mdest_res->sample_idx[dest_index].rix_encap_decap =
11048                                 dev_flow->handle->dvh.rix_encap_decap;
11049                         sample_act->dr_encap_action =
11050                                 dev_flow->dv.encap_decap->action;
11051                         dev_flow->handle->dvh.rix_encap_decap = 0;
11052                 }
11053                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11054                         normal_idx++;
11055                         mdest_res->sample_idx[dest_index].rix_port_id_action =
11056                                 dev_flow->handle->rix_port_id_action;
11057                         sample_act->dr_port_id_action =
11058                                 dev_flow->dv.port_id_action->action;
11059                         dev_flow->handle->rix_port_id_action = 0;
11060                 }
11061                 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11062                         normal_idx++;
11063                         mdest_res->sample_idx[dest_index].rix_jump =
11064                                 dev_flow->handle->rix_jump;
11065                         sample_act->dr_jump_action =
11066                                 dev_flow->dv.jump->action;
11067                         dev_flow->handle->rix_jump = 0;
11068                 }
11069                 sample_act->actions_num = normal_idx;
11070                 /* update sample action resource into first index of array */
11071                 mdest_res->ft_type = res->ft_type;
11072                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11073                                 sizeof(struct mlx5_flow_sub_actions_idx));
11074                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11075                                 sizeof(struct mlx5_flow_sub_actions_list));
11076                 mdest_res->num_of_dest = num_of_dest;
11077                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11078                                                          dev_flow, error))
11079                         return rte_flow_error_set(error, EINVAL,
11080                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11081                                                   NULL, "can't create sample "
11082                                                   "action");
11083         } else {
11084                 res->sub_actions = sample_actions;
11085                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11086                         return rte_flow_error_set(error, EINVAL,
11087                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11088                                                   NULL,
11089                                                   "can't create sample action");
11090         }
11091         return 0;
11092 }
11093
11094 /**
11095  * Remove an ASO age action from age actions list.
11096  *
11097  * @param[in] dev
11098  *   Pointer to the Ethernet device structure.
11099  * @param[in] age
11100  *   Pointer to the aso age action handler.
11101  */
11102 static void
11103 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11104                                 struct mlx5_aso_age_action *age)
11105 {
11106         struct mlx5_age_info *age_info;
11107         struct mlx5_age_param *age_param = &age->age_params;
11108         struct mlx5_priv *priv = dev->data->dev_private;
11109         uint16_t expected = AGE_CANDIDATE;
11110
11111         age_info = GET_PORT_AGE_INFO(priv);
11112         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11113                                          AGE_FREE, false, __ATOMIC_RELAXED,
11114                                          __ATOMIC_RELAXED)) {
11115                 /**
11116                  * We need the lock even it is age timeout,
11117                  * since age action may still in process.
11118                  */
11119                 rte_spinlock_lock(&age_info->aged_sl);
11120                 LIST_REMOVE(age, next);
11121                 rte_spinlock_unlock(&age_info->aged_sl);
11122                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11123         }
11124 }
11125
11126 /**
11127  * Release an ASO age action.
11128  *
11129  * @param[in] dev
11130  *   Pointer to the Ethernet device structure.
11131  * @param[in] age_idx
11132  *   Index of ASO age action to release.
11133  * @param[in] flow
11134  *   True if the release operation is during flow destroy operation.
11135  *   False if the release operation is during action destroy operation.
11136  *
11137  * @return
11138  *   0 when age action was removed, otherwise the number of references.
11139  */
11140 static int
11141 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11142 {
11143         struct mlx5_priv *priv = dev->data->dev_private;
11144         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11145         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11146         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11147
11148         if (!ret) {
11149                 flow_dv_aso_age_remove_from_age(dev, age);
11150                 rte_spinlock_lock(&mng->free_sl);
11151                 LIST_INSERT_HEAD(&mng->free, age, next);
11152                 rte_spinlock_unlock(&mng->free_sl);
11153         }
11154         return ret;
11155 }
11156
11157 /**
11158  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11159  *
11160  * @param[in] dev
11161  *   Pointer to the Ethernet device structure.
11162  *
11163  * @return
11164  *   0 on success, otherwise negative errno value and rte_errno is set.
11165  */
11166 static int
11167 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11168 {
11169         struct mlx5_priv *priv = dev->data->dev_private;
11170         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11171         void *old_pools = mng->pools;
11172         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11173         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11174         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11175
11176         if (!pools) {
11177                 rte_errno = ENOMEM;
11178                 return -ENOMEM;
11179         }
11180         if (old_pools) {
11181                 memcpy(pools, old_pools,
11182                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
11183                 mlx5_free(old_pools);
11184         } else {
11185                 /* First ASO flow hit allocation - starting ASO data-path. */
11186                 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11187
11188                 if (ret) {
11189                         mlx5_free(pools);
11190                         return ret;
11191                 }
11192         }
11193         mng->n = resize;
11194         mng->pools = pools;
11195         return 0;
11196 }
11197
11198 /**
11199  * Create and initialize a new ASO aging pool.
11200  *
11201  * @param[in] dev
11202  *   Pointer to the Ethernet device structure.
11203  * @param[out] age_free
11204  *   Where to put the pointer of a new age action.
11205  *
11206  * @return
11207  *   The age actions pool pointer and @p age_free is set on success,
11208  *   NULL otherwise and rte_errno is set.
11209  */
11210 static struct mlx5_aso_age_pool *
11211 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11212                         struct mlx5_aso_age_action **age_free)
11213 {
11214         struct mlx5_priv *priv = dev->data->dev_private;
11215         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11216         struct mlx5_aso_age_pool *pool = NULL;
11217         struct mlx5_devx_obj *obj = NULL;
11218         uint32_t i;
11219
11220         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->ctx,
11221                                                     priv->sh->pdn);
11222         if (!obj) {
11223                 rte_errno = ENODATA;
11224                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11225                 return NULL;
11226         }
11227         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11228         if (!pool) {
11229                 claim_zero(mlx5_devx_cmd_destroy(obj));
11230                 rte_errno = ENOMEM;
11231                 return NULL;
11232         }
11233         pool->flow_hit_aso_obj = obj;
11234         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11235         rte_spinlock_lock(&mng->resize_sl);
11236         pool->index = mng->next;
11237         /* Resize pools array if there is no room for the new pool in it. */
11238         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11239                 claim_zero(mlx5_devx_cmd_destroy(obj));
11240                 mlx5_free(pool);
11241                 rte_spinlock_unlock(&mng->resize_sl);
11242                 return NULL;
11243         }
11244         mng->pools[pool->index] = pool;
11245         mng->next++;
11246         rte_spinlock_unlock(&mng->resize_sl);
11247         /* Assign the first action in the new pool, the rest go to free list. */
11248         *age_free = &pool->actions[0];
11249         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11250                 pool->actions[i].offset = i;
11251                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11252         }
11253         return pool;
11254 }
11255
11256 /**
11257  * Allocate a ASO aging bit.
11258  *
11259  * @param[in] dev
11260  *   Pointer to the Ethernet device structure.
11261  * @param[out] error
11262  *   Pointer to the error structure.
11263  *
11264  * @return
11265  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
11266  */
11267 static uint32_t
11268 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11269 {
11270         struct mlx5_priv *priv = dev->data->dev_private;
11271         const struct mlx5_aso_age_pool *pool;
11272         struct mlx5_aso_age_action *age_free = NULL;
11273         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11274
11275         MLX5_ASSERT(mng);
11276         /* Try to get the next free age action bit. */
11277         rte_spinlock_lock(&mng->free_sl);
11278         age_free = LIST_FIRST(&mng->free);
11279         if (age_free) {
11280                 LIST_REMOVE(age_free, next);
11281         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
11282                 rte_spinlock_unlock(&mng->free_sl);
11283                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11284                                    NULL, "failed to create ASO age pool");
11285                 return 0; /* 0 is an error. */
11286         }
11287         rte_spinlock_unlock(&mng->free_sl);
11288         pool = container_of
11289           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
11290                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
11291                                                                        actions);
11292         if (!age_free->dr_action) {
11293                 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
11294                                                  error);
11295
11296                 if (reg_c < 0) {
11297                         rte_flow_error_set(error, rte_errno,
11298                                            RTE_FLOW_ERROR_TYPE_ACTION,
11299                                            NULL, "failed to get reg_c "
11300                                            "for ASO flow hit");
11301                         return 0; /* 0 is an error. */
11302                 }
11303 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
11304                 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
11305                                 (priv->sh->rx_domain,
11306                                  pool->flow_hit_aso_obj->obj, age_free->offset,
11307                                  MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
11308                                  (reg_c - REG_C_0));
11309 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
11310                 if (!age_free->dr_action) {
11311                         rte_errno = errno;
11312                         rte_spinlock_lock(&mng->free_sl);
11313                         LIST_INSERT_HEAD(&mng->free, age_free, next);
11314                         rte_spinlock_unlock(&mng->free_sl);
11315                         rte_flow_error_set(error, rte_errno,
11316                                            RTE_FLOW_ERROR_TYPE_ACTION,
11317                                            NULL, "failed to create ASO "
11318                                            "flow hit action");
11319                         return 0; /* 0 is an error. */
11320                 }
11321         }
11322         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
11323         return pool->index | ((age_free->offset + 1) << 16);
11324 }
11325
11326 /**
11327  * Create a age action using ASO mechanism.
11328  *
11329  * @param[in] dev
11330  *   Pointer to rte_eth_dev structure.
11331  * @param[in] age
11332  *   Pointer to the aging action configuration.
11333  * @param[out] error
11334  *   Pointer to the error structure.
11335  *
11336  * @return
11337  *   Index to flow counter on success, 0 otherwise.
11338  */
11339 static uint32_t
11340 flow_dv_translate_create_aso_age(struct rte_eth_dev *dev,
11341                                  const struct rte_flow_action_age *age,
11342                                  struct rte_flow_error *error)
11343 {
11344         uint32_t age_idx = 0;
11345         struct mlx5_aso_age_action *aso_age;
11346
11347         age_idx = flow_dv_aso_age_alloc(dev, error);
11348         if (!age_idx)
11349                 return 0;
11350         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
11351         aso_age->age_params.context = age->context;
11352         aso_age->age_params.timeout = age->timeout;
11353         aso_age->age_params.port_id = dev->data->port_id;
11354         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
11355                          __ATOMIC_RELAXED);
11356         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
11357                          __ATOMIC_RELAXED);
11358         return age_idx;
11359 }
11360
11361 static void
11362 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
11363                                const struct rte_flow_item_integrity *value,
11364                                void *headers_m, void *headers_v)
11365 {
11366         if (mask->l4_ok) {
11367                 /* application l4_ok filter aggregates all hardware l4 filters
11368                  * therefore hw l4_checksum_ok must be implicitly added here.
11369                  */
11370                 struct rte_flow_item_integrity local_item;
11371
11372                 local_item.l4_csum_ok = 1;
11373                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
11374                          local_item.l4_csum_ok);
11375                 if (value->l4_ok) {
11376                         /* application l4_ok = 1 matches sets both hw flags
11377                          * l4_ok and l4_checksum_ok flags to 1.
11378                          */
11379                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11380                                  l4_checksum_ok, local_item.l4_csum_ok);
11381                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
11382                                  mask->l4_ok);
11383                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
11384                                  value->l4_ok);
11385                 } else {
11386                         /* application l4_ok = 0 matches on hw flag
11387                          * l4_checksum_ok = 0 only.
11388                          */
11389                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11390                                  l4_checksum_ok, 0);
11391                 }
11392         } else if (mask->l4_csum_ok) {
11393                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
11394                          mask->l4_csum_ok);
11395                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
11396                          value->l4_csum_ok);
11397         }
11398 }
11399
11400 static void
11401 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
11402                                const struct rte_flow_item_integrity *value,
11403                                void *headers_m, void *headers_v,
11404                                bool is_ipv4)
11405 {
11406         if (mask->l3_ok) {
11407                 /* application l3_ok filter aggregates all hardware l3 filters
11408                  * therefore hw ipv4_checksum_ok must be implicitly added here.
11409                  */
11410                 struct rte_flow_item_integrity local_item;
11411
11412                 local_item.ipv4_csum_ok = !!is_ipv4;
11413                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
11414                          local_item.ipv4_csum_ok);
11415                 if (value->l3_ok) {
11416                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11417                                  ipv4_checksum_ok, local_item.ipv4_csum_ok);
11418                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
11419                                  mask->l3_ok);
11420                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
11421                                  value->l3_ok);
11422                 } else {
11423                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11424                                  ipv4_checksum_ok, 0);
11425                 }
11426         } else if (mask->ipv4_csum_ok) {
11427                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
11428                          mask->ipv4_csum_ok);
11429                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
11430                          value->ipv4_csum_ok);
11431         }
11432 }
11433
11434 static void
11435 flow_dv_translate_item_integrity(void *matcher, void *key,
11436                                  const struct rte_flow_item *head_item,
11437                                  const struct rte_flow_item *integrity_item)
11438 {
11439         const struct rte_flow_item_integrity *mask = integrity_item->mask;
11440         const struct rte_flow_item_integrity *value = integrity_item->spec;
11441         const struct rte_flow_item *tunnel_item, *end_item, *item;
11442         void *headers_m;
11443         void *headers_v;
11444         uint32_t l3_protocol;
11445
11446         if (!value)
11447                 return;
11448         if (!mask)
11449                 mask = &rte_flow_item_integrity_mask;
11450         if (value->level > 1) {
11451                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
11452                                          inner_headers);
11453                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
11454         } else {
11455                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
11456                                          outer_headers);
11457                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
11458         }
11459         tunnel_item = mlx5_flow_find_tunnel_item(head_item);
11460         if (value->level > 1) {
11461                 /* tunnel item was verified during the item validation */
11462                 item = tunnel_item;
11463                 end_item = mlx5_find_end_item(tunnel_item);
11464         } else {
11465                 item = head_item;
11466                 end_item = tunnel_item ? tunnel_item :
11467                            mlx5_find_end_item(integrity_item);
11468         }
11469         l3_protocol = mask->l3_ok ?
11470                       mlx5_flow_locate_proto_l3(&item, end_item) : 0;
11471         flow_dv_translate_integrity_l3(mask, value, headers_m, headers_v,
11472                                        l3_protocol == RTE_ETHER_TYPE_IPV4);
11473         flow_dv_translate_integrity_l4(mask, value, headers_m, headers_v);
11474 }
11475
11476 /**
11477  * Prepares DV flow counter with aging configuration.
11478  * Gets it by index when exists, creates a new one when doesn't.
11479  *
11480  * @param[in] dev
11481  *   Pointer to rte_eth_dev structure.
11482  * @param[in] dev_flow
11483  *   Pointer to the mlx5_flow.
11484  * @param[in, out] flow
11485  *   Pointer to the sub flow.
11486  * @param[in] count
11487  *   Pointer to the counter action configuration.
11488  * @param[in] age
11489  *   Pointer to the aging action configuration.
11490  * @param[out] error
11491  *   Pointer to the error structure.
11492  *
11493  * @return
11494  *   Pointer to the counter, NULL otherwise.
11495  */
11496 static struct mlx5_flow_counter *
11497 flow_dv_prepare_counter(struct rte_eth_dev *dev,
11498                         struct mlx5_flow *dev_flow,
11499                         struct rte_flow *flow,
11500                         const struct rte_flow_action_count *count,
11501                         const struct rte_flow_action_age *age,
11502                         struct rte_flow_error *error)
11503 {
11504         if (!flow->counter) {
11505                 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
11506                                                                  count, age);
11507                 if (!flow->counter) {
11508                         rte_flow_error_set(error, rte_errno,
11509                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11510                                            "cannot create counter object.");
11511                         return NULL;
11512                 }
11513         }
11514         return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
11515 }
11516
11517 /*
11518  * Release an ASO CT action.
11519  *
11520  * @param[in] dev
11521  *   Pointer to the Ethernet device structure.
11522  * @param[in] idx
11523  *   Index of ASO CT action to release.
11524  *
11525  * @return
11526  *   0 when CT action was removed, otherwise the number of references.
11527  */
11528 static inline int
11529 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t idx)
11530 {
11531         struct mlx5_priv *priv = dev->data->dev_private;
11532         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
11533         uint32_t ret;
11534         struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_idx(dev, idx);
11535         enum mlx5_aso_ct_state state =
11536                         __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
11537
11538         /* Cannot release when CT is in the ASO SQ. */
11539         if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
11540                 return -1;
11541         ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
11542         if (!ret) {
11543                 if (ct->dr_action_orig) {
11544 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
11545                         claim_zero(mlx5_glue->destroy_flow_action
11546                                         (ct->dr_action_orig));
11547 #endif
11548                         ct->dr_action_orig = NULL;
11549                 }
11550                 if (ct->dr_action_rply) {
11551 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
11552                         claim_zero(mlx5_glue->destroy_flow_action
11553                                         (ct->dr_action_rply));
11554 #endif
11555                         ct->dr_action_rply = NULL;
11556                 }
11557                 /* Clear the state to free, no need in 1st allocation. */
11558                 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
11559                 rte_spinlock_lock(&mng->ct_sl);
11560                 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
11561                 rte_spinlock_unlock(&mng->ct_sl);
11562         }
11563         return ret;
11564 }
11565
11566 /*
11567  * Resize the ASO CT pools array by 64 pools.
11568  *
11569  * @param[in] dev
11570  *   Pointer to the Ethernet device structure.
11571  *
11572  * @return
11573  *   0 on success, otherwise negative errno value and rte_errno is set.
11574  */
11575 static int
11576 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
11577 {
11578         struct mlx5_priv *priv = dev->data->dev_private;
11579         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
11580         void *old_pools = mng->pools;
11581         /* Magic number now, need a macro. */
11582         uint32_t resize = mng->n + 64;
11583         uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
11584         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11585
11586         if (!pools) {
11587                 rte_errno = ENOMEM;
11588                 return -rte_errno;
11589         }
11590         rte_rwlock_write_lock(&mng->resize_rwl);
11591         /* ASO SQ/QP was already initialized in the startup. */
11592         if (old_pools) {
11593                 /* Realloc could be an alternative choice. */
11594                 rte_memcpy(pools, old_pools,
11595                            mng->n * sizeof(struct mlx5_aso_ct_pool *));
11596                 mlx5_free(old_pools);
11597         }
11598         mng->n = resize;
11599         mng->pools = pools;
11600         rte_rwlock_write_unlock(&mng->resize_rwl);
11601         return 0;
11602 }
11603
11604 /*
11605  * Create and initialize a new ASO CT pool.
11606  *
11607  * @param[in] dev
11608  *   Pointer to the Ethernet device structure.
11609  * @param[out] ct_free
11610  *   Where to put the pointer of a new CT action.
11611  *
11612  * @return
11613  *   The CT actions pool pointer and @p ct_free is set on success,
11614  *   NULL otherwise and rte_errno is set.
11615  */
11616 static struct mlx5_aso_ct_pool *
11617 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
11618                        struct mlx5_aso_ct_action **ct_free)
11619 {
11620         struct mlx5_priv *priv = dev->data->dev_private;
11621         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
11622         struct mlx5_aso_ct_pool *pool = NULL;
11623         struct mlx5_devx_obj *obj = NULL;
11624         uint32_t i;
11625         uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
11626
11627         obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->ctx,
11628                                                 priv->sh->pdn, log_obj_size);
11629         if (!obj) {
11630                 rte_errno = ENODATA;
11631                 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
11632                 return NULL;
11633         }
11634         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11635         if (!pool) {
11636                 rte_errno = ENOMEM;
11637                 claim_zero(mlx5_devx_cmd_destroy(obj));
11638                 return NULL;
11639         }
11640         pool->devx_obj = obj;
11641         pool->index = mng->next;
11642         /* Resize pools array if there is no room for the new pool in it. */
11643         if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
11644                 claim_zero(mlx5_devx_cmd_destroy(obj));
11645                 mlx5_free(pool);
11646                 return NULL;
11647         }
11648         mng->pools[pool->index] = pool;
11649         mng->next++;
11650         /* Assign the first action in the new pool, the rest go to free list. */
11651         *ct_free = &pool->actions[0];
11652         /* Lock outside, the list operation is safe here. */
11653         for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
11654                 /* refcnt is 0 when allocating the memory. */
11655                 pool->actions[i].offset = i;
11656                 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
11657         }
11658         return pool;
11659 }
11660
11661 /*
11662  * Allocate a ASO CT action from free list.
11663  *
11664  * @param[in] dev
11665  *   Pointer to the Ethernet device structure.
11666  * @param[out] error
11667  *   Pointer to the error structure.
11668  *
11669  * @return
11670  *   Index to ASO CT action on success, 0 otherwise and rte_errno is set.
11671  */
11672 static uint32_t
11673 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11674 {
11675         struct mlx5_priv *priv = dev->data->dev_private;
11676         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
11677         struct mlx5_aso_ct_action *ct = NULL;
11678         struct mlx5_aso_ct_pool *pool;
11679         uint8_t reg_c;
11680         uint32_t ct_idx;
11681
11682         MLX5_ASSERT(mng);
11683         if (!priv->config.devx) {
11684                 rte_errno = ENOTSUP;
11685                 return 0;
11686         }
11687         /* Get a free CT action, if no, a new pool will be created. */
11688         rte_spinlock_lock(&mng->ct_sl);
11689         ct = LIST_FIRST(&mng->free_cts);
11690         if (ct) {
11691                 LIST_REMOVE(ct, next);
11692         } else if (!flow_dv_ct_pool_create(dev, &ct)) {
11693                 rte_spinlock_unlock(&mng->ct_sl);
11694                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11695                                    NULL, "failed to create ASO CT pool");
11696                 return 0;
11697         }
11698         rte_spinlock_unlock(&mng->ct_sl);
11699         pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
11700         ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
11701         /* 0: inactive, 1: created, 2+: used by flows. */
11702         __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
11703         reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
11704         if (!ct->dr_action_orig) {
11705 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
11706                 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
11707                         (priv->sh->rx_domain, pool->devx_obj->obj,
11708                          ct->offset,
11709                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
11710                          reg_c - REG_C_0);
11711 #else
11712                 RTE_SET_USED(reg_c);
11713 #endif
11714                 if (!ct->dr_action_orig) {
11715                         flow_dv_aso_ct_release(dev, ct_idx);
11716                         rte_flow_error_set(error, rte_errno,
11717                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11718                                            "failed to create ASO CT action");
11719                         return 0;
11720                 }
11721         }
11722         if (!ct->dr_action_rply) {
11723 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
11724                 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
11725                         (priv->sh->rx_domain, pool->devx_obj->obj,
11726                          ct->offset,
11727                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
11728                          reg_c - REG_C_0);
11729 #endif
11730                 if (!ct->dr_action_rply) {
11731                         flow_dv_aso_ct_release(dev, ct_idx);
11732                         rte_flow_error_set(error, rte_errno,
11733                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11734                                            "failed to create ASO CT action");
11735                         return 0;
11736                 }
11737         }
11738         return ct_idx;
11739 }
11740
11741 /*
11742  * Create a conntrack object with context and actions by using ASO mechanism.
11743  *
11744  * @param[in] dev
11745  *   Pointer to rte_eth_dev structure.
11746  * @param[in] pro
11747  *   Pointer to conntrack information profile.
11748  * @param[out] error
11749  *   Pointer to the error structure.
11750  *
11751  * @return
11752  *   Index to conntrack object on success, 0 otherwise.
11753  */
11754 static uint32_t
11755 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
11756                                    const struct rte_flow_action_conntrack *pro,
11757                                    struct rte_flow_error *error)
11758 {
11759         struct mlx5_priv *priv = dev->data->dev_private;
11760         struct mlx5_dev_ctx_shared *sh = priv->sh;
11761         struct mlx5_aso_ct_action *ct;
11762         uint32_t idx;
11763
11764         if (!sh->ct_aso_en)
11765                 return rte_flow_error_set(error, ENOTSUP,
11766                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11767                                           "Connection is not supported");
11768         idx = flow_dv_aso_ct_alloc(dev, error);
11769         if (!idx)
11770                 return rte_flow_error_set(error, rte_errno,
11771                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11772                                           "Failed to allocate CT object");
11773         ct = flow_aso_ct_get_by_idx(dev, idx);
11774         if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
11775                 return rte_flow_error_set(error, EBUSY,
11776                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
11777                                           "Failed to update CT");
11778         return idx;
11779 }
11780
11781 /**
11782  * Fill the flow with DV spec, lock free
11783  * (mutex should be acquired by caller).
11784  *
11785  * @param[in] dev
11786  *   Pointer to rte_eth_dev structure.
11787  * @param[in, out] dev_flow
11788  *   Pointer to the sub flow.
11789  * @param[in] attr
11790  *   Pointer to the flow attributes.
11791  * @param[in] items
11792  *   Pointer to the list of items.
11793  * @param[in] actions
11794  *   Pointer to the list of actions.
11795  * @param[out] error
11796  *   Pointer to the error structure.
11797  *
11798  * @return
11799  *   0 on success, a negative errno value otherwise and rte_errno is set.
11800  */
11801 static int
11802 flow_dv_translate(struct rte_eth_dev *dev,
11803                   struct mlx5_flow *dev_flow,
11804                   const struct rte_flow_attr *attr,
11805                   const struct rte_flow_item items[],
11806                   const struct rte_flow_action actions[],
11807                   struct rte_flow_error *error)
11808 {
11809         struct mlx5_priv *priv = dev->data->dev_private;
11810         struct mlx5_dev_config *dev_conf = &priv->config;
11811         struct rte_flow *flow = dev_flow->flow;
11812         struct mlx5_flow_handle *handle = dev_flow->handle;
11813         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11814         struct mlx5_flow_rss_desc *rss_desc;
11815         uint64_t item_flags = 0;
11816         uint64_t last_item = 0;
11817         uint64_t action_flags = 0;
11818         struct mlx5_flow_dv_matcher matcher = {
11819                 .mask = {
11820                         .size = sizeof(matcher.mask.buf) -
11821                                 MLX5_ST_SZ_BYTES(fte_match_set_misc4),
11822                 },
11823         };
11824         int actions_n = 0;
11825         bool actions_end = false;
11826         union {
11827                 struct mlx5_flow_dv_modify_hdr_resource res;
11828                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
11829                             sizeof(struct mlx5_modification_cmd) *
11830                             (MLX5_MAX_MODIFY_NUM + 1)];
11831         } mhdr_dummy;
11832         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
11833         const struct rte_flow_action_count *count = NULL;
11834         const struct rte_flow_action_age *non_shared_age = NULL;
11835         union flow_dv_attr flow_attr = { .attr = 0 };
11836         uint32_t tag_be;
11837         union mlx5_flow_tbl_key tbl_key;
11838         uint32_t modify_action_position = UINT32_MAX;
11839         void *match_mask = matcher.mask.buf;
11840         void *match_value = dev_flow->dv.value.buf;
11841         uint8_t next_protocol = 0xff;
11842         struct rte_vlan_hdr vlan = { 0 };
11843         struct mlx5_flow_dv_dest_array_resource mdest_res;
11844         struct mlx5_flow_dv_sample_resource sample_res;
11845         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
11846         const struct rte_flow_action_sample *sample = NULL;
11847         struct mlx5_flow_sub_actions_list *sample_act;
11848         uint32_t sample_act_pos = UINT32_MAX;
11849         uint32_t age_act_pos = UINT32_MAX;
11850         uint32_t num_of_dest = 0;
11851         int tmp_actions_n = 0;
11852         uint32_t table;
11853         int ret = 0;
11854         const struct mlx5_flow_tunnel *tunnel;
11855         struct flow_grp_info grp_info = {
11856                 .external = !!dev_flow->external,
11857                 .transfer = !!attr->transfer,
11858                 .fdb_def_rule = !!priv->fdb_def_rule,
11859                 .skip_scale = dev_flow->skip_scale &
11860                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
11861         };
11862         const struct rte_flow_item *head_item = items;
11863
11864         if (!wks)
11865                 return rte_flow_error_set(error, ENOMEM,
11866                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11867                                           NULL,
11868                                           "failed to push flow workspace");
11869         rss_desc = &wks->rss_desc;
11870         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
11871         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
11872         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
11873                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11874         /* update normal path action resource into last index of array */
11875         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
11876         tunnel = is_flow_tunnel_match_rule(dev, attr, items, actions) ?
11877                  flow_items_to_tunnel(items) :
11878                  is_flow_tunnel_steer_rule(dev, attr, items, actions) ?
11879                  flow_actions_to_tunnel(actions) :
11880                  dev_flow->tunnel ? dev_flow->tunnel : NULL;
11881         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
11882                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11883         grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
11884                                 (dev, tunnel, attr, items, actions);
11885         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
11886                                        &grp_info, error);
11887         if (ret)
11888                 return ret;
11889         dev_flow->dv.group = table;
11890         if (attr->transfer)
11891                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11892         /* number of actions must be set to 0 in case of dirty stack. */
11893         mhdr_res->actions_num = 0;
11894         if (is_flow_tunnel_match_rule(dev, attr, items, actions)) {
11895                 /*
11896                  * do not add decap action if match rule drops packet
11897                  * HW rejects rules with decap & drop
11898                  *
11899                  * if tunnel match rule was inserted before matching tunnel set
11900                  * rule flow table used in the match rule must be registered.
11901                  * current implementation handles that in the
11902                  * flow_dv_match_register() at the function end.
11903                  */
11904                 bool add_decap = true;
11905                 const struct rte_flow_action *ptr = actions;
11906
11907                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
11908                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
11909                                 add_decap = false;
11910                                 break;
11911                         }
11912                 }
11913                 if (add_decap) {
11914                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
11915                                                            attr->transfer,
11916                                                            error))
11917                                 return -rte_errno;
11918                         dev_flow->dv.actions[actions_n++] =
11919                                         dev_flow->dv.encap_decap->action;
11920                         action_flags |= MLX5_FLOW_ACTION_DECAP;
11921                 }
11922         }
11923         for (; !actions_end ; actions++) {
11924                 const struct rte_flow_action_queue *queue;
11925                 const struct rte_flow_action_rss *rss;
11926                 const struct rte_flow_action *action = actions;
11927                 const uint8_t *rss_key;
11928                 struct mlx5_flow_tbl_resource *tbl;
11929                 struct mlx5_aso_age_action *age_act;
11930                 struct mlx5_flow_counter *cnt_act;
11931                 uint32_t port_id = 0;
11932                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
11933                 int action_type = actions->type;
11934                 const struct rte_flow_action *found_action = NULL;
11935                 uint32_t jump_group = 0;
11936
11937                 if (!mlx5_flow_os_action_supported(action_type))
11938                         return rte_flow_error_set(error, ENOTSUP,
11939                                                   RTE_FLOW_ERROR_TYPE_ACTION,
11940                                                   actions,
11941                                                   "action not supported");
11942                 switch (action_type) {
11943                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
11944                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
11945                         break;
11946                 case RTE_FLOW_ACTION_TYPE_VOID:
11947                         break;
11948                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11949                         if (flow_dv_translate_action_port_id(dev, action,
11950                                                              &port_id, error))
11951                                 return -rte_errno;
11952                         port_id_resource.port_id = port_id;
11953                         MLX5_ASSERT(!handle->rix_port_id_action);
11954                         if (flow_dv_port_id_action_resource_register
11955                             (dev, &port_id_resource, dev_flow, error))
11956                                 return -rte_errno;
11957                         dev_flow->dv.actions[actions_n++] =
11958                                         dev_flow->dv.port_id_action->action;
11959                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11960                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
11961                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11962                         num_of_dest++;
11963                         break;
11964                 case RTE_FLOW_ACTION_TYPE_FLAG:
11965                         action_flags |= MLX5_FLOW_ACTION_FLAG;
11966                         dev_flow->handle->mark = 1;
11967                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
11968                                 struct rte_flow_action_mark mark = {
11969                                         .id = MLX5_FLOW_MARK_DEFAULT,
11970                                 };
11971
11972                                 if (flow_dv_convert_action_mark(dev, &mark,
11973                                                                 mhdr_res,
11974                                                                 error))
11975                                         return -rte_errno;
11976                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
11977                                 break;
11978                         }
11979                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
11980                         /*
11981                          * Only one FLAG or MARK is supported per device flow
11982                          * right now. So the pointer to the tag resource must be
11983                          * zero before the register process.
11984                          */
11985                         MLX5_ASSERT(!handle->dvh.rix_tag);
11986                         if (flow_dv_tag_resource_register(dev, tag_be,
11987                                                           dev_flow, error))
11988                                 return -rte_errno;
11989                         MLX5_ASSERT(dev_flow->dv.tag_resource);
11990                         dev_flow->dv.actions[actions_n++] =
11991                                         dev_flow->dv.tag_resource->action;
11992                         break;
11993                 case RTE_FLOW_ACTION_TYPE_MARK:
11994                         action_flags |= MLX5_FLOW_ACTION_MARK;
11995                         dev_flow->handle->mark = 1;
11996                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
11997                                 const struct rte_flow_action_mark *mark =
11998                                         (const struct rte_flow_action_mark *)
11999                                                 actions->conf;
12000
12001                                 if (flow_dv_convert_action_mark(dev, mark,
12002                                                                 mhdr_res,
12003                                                                 error))
12004                                         return -rte_errno;
12005                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12006                                 break;
12007                         }
12008                         /* Fall-through */
12009                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12010                         /* Legacy (non-extensive) MARK action. */
12011                         tag_be = mlx5_flow_mark_set
12012                               (((const struct rte_flow_action_mark *)
12013                                (actions->conf))->id);
12014                         MLX5_ASSERT(!handle->dvh.rix_tag);
12015                         if (flow_dv_tag_resource_register(dev, tag_be,
12016                                                           dev_flow, error))
12017                                 return -rte_errno;
12018                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12019                         dev_flow->dv.actions[actions_n++] =
12020                                         dev_flow->dv.tag_resource->action;
12021                         break;
12022                 case RTE_FLOW_ACTION_TYPE_SET_META:
12023                         if (flow_dv_convert_action_set_meta
12024                                 (dev, mhdr_res, attr,
12025                                  (const struct rte_flow_action_set_meta *)
12026                                   actions->conf, error))
12027                                 return -rte_errno;
12028                         action_flags |= MLX5_FLOW_ACTION_SET_META;
12029                         break;
12030                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12031                         if (flow_dv_convert_action_set_tag
12032                                 (dev, mhdr_res,
12033                                  (const struct rte_flow_action_set_tag *)
12034                                   actions->conf, error))
12035                                 return -rte_errno;
12036                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12037                         break;
12038                 case RTE_FLOW_ACTION_TYPE_DROP:
12039                         action_flags |= MLX5_FLOW_ACTION_DROP;
12040                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12041                         break;
12042                 case RTE_FLOW_ACTION_TYPE_QUEUE:
12043                         queue = actions->conf;
12044                         rss_desc->queue_num = 1;
12045                         rss_desc->queue[0] = queue->index;
12046                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
12047                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12048                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12049                         num_of_dest++;
12050                         break;
12051                 case RTE_FLOW_ACTION_TYPE_RSS:
12052                         rss = actions->conf;
12053                         memcpy(rss_desc->queue, rss->queue,
12054                                rss->queue_num * sizeof(uint16_t));
12055                         rss_desc->queue_num = rss->queue_num;
12056                         /* NULL RSS key indicates default RSS key. */
12057                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
12058                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12059                         /*
12060                          * rss->level and rss.types should be set in advance
12061                          * when expanding items for RSS.
12062                          */
12063                         action_flags |= MLX5_FLOW_ACTION_RSS;
12064                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
12065                                 MLX5_FLOW_FATE_SHARED_RSS :
12066                                 MLX5_FLOW_FATE_QUEUE;
12067                         break;
12068                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12069                         flow->age = (uint32_t)(uintptr_t)(action->conf);
12070                         age_act = flow_aso_age_get_by_idx(dev, flow->age);
12071                         __atomic_fetch_add(&age_act->refcnt, 1,
12072                                            __ATOMIC_RELAXED);
12073                         age_act_pos = actions_n++;
12074                         action_flags |= MLX5_FLOW_ACTION_AGE;
12075                         break;
12076                 case RTE_FLOW_ACTION_TYPE_AGE:
12077                         non_shared_age = action->conf;
12078                         age_act_pos = actions_n++;
12079                         action_flags |= MLX5_FLOW_ACTION_AGE;
12080                         break;
12081                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12082                         flow->counter = (uint32_t)(uintptr_t)(action->conf);
12083                         cnt_act = flow_dv_counter_get_by_idx(dev, flow->counter,
12084                                                              NULL);
12085                         __atomic_fetch_add(&cnt_act->shared_info.refcnt, 1,
12086                                            __ATOMIC_RELAXED);
12087                         /* Save information first, will apply later. */
12088                         action_flags |= MLX5_FLOW_ACTION_COUNT;
12089                         break;
12090                 case RTE_FLOW_ACTION_TYPE_COUNT:
12091                         if (!dev_conf->devx) {
12092                                 return rte_flow_error_set
12093                                               (error, ENOTSUP,
12094                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12095                                                NULL,
12096                                                "count action not supported");
12097                         }
12098                         /* Save information first, will apply later. */
12099                         count = action->conf;
12100                         action_flags |= MLX5_FLOW_ACTION_COUNT;
12101                         break;
12102                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12103                         dev_flow->dv.actions[actions_n++] =
12104                                                 priv->sh->pop_vlan_action;
12105                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12106                         break;
12107                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12108                         if (!(action_flags &
12109                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12110                                 flow_dev_get_vlan_info_from_items(items, &vlan);
12111                         vlan.eth_proto = rte_be_to_cpu_16
12112                              ((((const struct rte_flow_action_of_push_vlan *)
12113                                                    actions->conf)->ethertype));
12114                         found_action = mlx5_flow_find_action
12115                                         (actions + 1,
12116                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12117                         if (found_action)
12118                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12119                         found_action = mlx5_flow_find_action
12120                                         (actions + 1,
12121                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12122                         if (found_action)
12123                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12124                         if (flow_dv_create_action_push_vlan
12125                                             (dev, attr, &vlan, dev_flow, error))
12126                                 return -rte_errno;
12127                         dev_flow->dv.actions[actions_n++] =
12128                                         dev_flow->dv.push_vlan_res->action;
12129                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12130                         break;
12131                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12132                         /* of_vlan_push action handled this action */
12133                         MLX5_ASSERT(action_flags &
12134                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12135                         break;
12136                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12137                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12138                                 break;
12139                         flow_dev_get_vlan_info_from_items(items, &vlan);
12140                         mlx5_update_vlan_vid_pcp(actions, &vlan);
12141                         /* If no VLAN push - this is a modify header action */
12142                         if (flow_dv_convert_action_modify_vlan_vid
12143                                                 (mhdr_res, actions, error))
12144                                 return -rte_errno;
12145                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12146                         break;
12147                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12148                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12149                         if (flow_dv_create_action_l2_encap(dev, actions,
12150                                                            dev_flow,
12151                                                            attr->transfer,
12152                                                            error))
12153                                 return -rte_errno;
12154                         dev_flow->dv.actions[actions_n++] =
12155                                         dev_flow->dv.encap_decap->action;
12156                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12157                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12158                                 sample_act->action_flags |=
12159                                                         MLX5_FLOW_ACTION_ENCAP;
12160                         break;
12161                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12162                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12163                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12164                                                            attr->transfer,
12165                                                            error))
12166                                 return -rte_errno;
12167                         dev_flow->dv.actions[actions_n++] =
12168                                         dev_flow->dv.encap_decap->action;
12169                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12170                         break;
12171                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12172                         /* Handle encap with preceding decap. */
12173                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12174                                 if (flow_dv_create_action_raw_encap
12175                                         (dev, actions, dev_flow, attr, error))
12176                                         return -rte_errno;
12177                                 dev_flow->dv.actions[actions_n++] =
12178                                         dev_flow->dv.encap_decap->action;
12179                         } else {
12180                                 /* Handle encap without preceding decap. */
12181                                 if (flow_dv_create_action_l2_encap
12182                                     (dev, actions, dev_flow, attr->transfer,
12183                                      error))
12184                                         return -rte_errno;
12185                                 dev_flow->dv.actions[actions_n++] =
12186                                         dev_flow->dv.encap_decap->action;
12187                         }
12188                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
12189                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12190                                 sample_act->action_flags |=
12191                                                         MLX5_FLOW_ACTION_ENCAP;
12192                         break;
12193                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
12194                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
12195                                 ;
12196                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
12197                                 if (flow_dv_create_action_l2_decap
12198                                     (dev, dev_flow, attr->transfer, error))
12199                                         return -rte_errno;
12200                                 dev_flow->dv.actions[actions_n++] =
12201                                         dev_flow->dv.encap_decap->action;
12202                         }
12203                         /* If decap is followed by encap, handle it at encap. */
12204                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12205                         break;
12206                 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
12207                         dev_flow->dv.actions[actions_n++] =
12208                                 (void *)(uintptr_t)action->conf;
12209                         action_flags |= MLX5_FLOW_ACTION_JUMP;
12210                         break;
12211                 case RTE_FLOW_ACTION_TYPE_JUMP:
12212                         jump_group = ((const struct rte_flow_action_jump *)
12213                                                         action->conf)->group;
12214                         grp_info.std_tbl_fix = 0;
12215                         if (dev_flow->skip_scale &
12216                                 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
12217                                 grp_info.skip_scale = 1;
12218                         else
12219                                 grp_info.skip_scale = 0;
12220                         ret = mlx5_flow_group_to_table(dev, tunnel,
12221                                                        jump_group,
12222                                                        &table,
12223                                                        &grp_info, error);
12224                         if (ret)
12225                                 return ret;
12226                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
12227                                                        attr->transfer,
12228                                                        !!dev_flow->external,
12229                                                        tunnel, jump_group, 0,
12230                                                        0, error);
12231                         if (!tbl)
12232                                 return rte_flow_error_set
12233                                                 (error, errno,
12234                                                  RTE_FLOW_ERROR_TYPE_ACTION,
12235                                                  NULL,
12236                                                  "cannot create jump action.");
12237                         if (flow_dv_jump_tbl_resource_register
12238                             (dev, tbl, dev_flow, error)) {
12239                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12240                                 return rte_flow_error_set
12241                                                 (error, errno,
12242                                                  RTE_FLOW_ERROR_TYPE_ACTION,
12243                                                  NULL,
12244                                                  "cannot create jump action.");
12245                         }
12246                         dev_flow->dv.actions[actions_n++] =
12247                                         dev_flow->dv.jump->action;
12248                         action_flags |= MLX5_FLOW_ACTION_JUMP;
12249                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
12250                         sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
12251                         num_of_dest++;
12252                         break;
12253                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
12254                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
12255                         if (flow_dv_convert_action_modify_mac
12256                                         (mhdr_res, actions, error))
12257                                 return -rte_errno;
12258                         action_flags |= actions->type ==
12259                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
12260                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
12261                                         MLX5_FLOW_ACTION_SET_MAC_DST;
12262                         break;
12263                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
12264                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
12265                         if (flow_dv_convert_action_modify_ipv4
12266                                         (mhdr_res, actions, error))
12267                                 return -rte_errno;
12268                         action_flags |= actions->type ==
12269                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
12270                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
12271                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
12272                         break;
12273                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
12274                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
12275                         if (flow_dv_convert_action_modify_ipv6
12276                                         (mhdr_res, actions, error))
12277                                 return -rte_errno;
12278                         action_flags |= actions->type ==
12279                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
12280                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
12281                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
12282                         break;
12283                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
12284                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
12285                         if (flow_dv_convert_action_modify_tp
12286                                         (mhdr_res, actions, items,
12287                                          &flow_attr, dev_flow, !!(action_flags &
12288                                          MLX5_FLOW_ACTION_DECAP), error))
12289                                 return -rte_errno;
12290                         action_flags |= actions->type ==
12291                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
12292                                         MLX5_FLOW_ACTION_SET_TP_SRC :
12293                                         MLX5_FLOW_ACTION_SET_TP_DST;
12294                         break;
12295                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
12296                         if (flow_dv_convert_action_modify_dec_ttl
12297                                         (mhdr_res, items, &flow_attr, dev_flow,
12298                                          !!(action_flags &
12299                                          MLX5_FLOW_ACTION_DECAP), error))
12300                                 return -rte_errno;
12301                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
12302                         break;
12303                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
12304                         if (flow_dv_convert_action_modify_ttl
12305                                         (mhdr_res, actions, items, &flow_attr,
12306                                          dev_flow, !!(action_flags &
12307                                          MLX5_FLOW_ACTION_DECAP), error))
12308                                 return -rte_errno;
12309                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
12310                         break;
12311                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
12312                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
12313                         if (flow_dv_convert_action_modify_tcp_seq
12314                                         (mhdr_res, actions, error))
12315                                 return -rte_errno;
12316                         action_flags |= actions->type ==
12317                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
12318                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
12319                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
12320                         break;
12321
12322                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
12323                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
12324                         if (flow_dv_convert_action_modify_tcp_ack
12325                                         (mhdr_res, actions, error))
12326                                 return -rte_errno;
12327                         action_flags |= actions->type ==
12328                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
12329                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
12330                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
12331                         break;
12332                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
12333                         if (flow_dv_convert_action_set_reg
12334                                         (mhdr_res, actions, error))
12335                                 return -rte_errno;
12336                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12337                         break;
12338                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
12339                         if (flow_dv_convert_action_copy_mreg
12340                                         (dev, mhdr_res, actions, error))
12341                                 return -rte_errno;
12342                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12343                         break;
12344                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
12345                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
12346                         dev_flow->handle->fate_action =
12347                                         MLX5_FLOW_FATE_DEFAULT_MISS;
12348                         break;
12349                 case RTE_FLOW_ACTION_TYPE_METER:
12350                         if (!wks->fm)
12351                                 return rte_flow_error_set(error, rte_errno,
12352                                         RTE_FLOW_ERROR_TYPE_ACTION,
12353                                         NULL, "Failed to get meter in flow.");
12354                         /* Set the meter action. */
12355                         dev_flow->dv.actions[actions_n++] =
12356                                 wks->fm->meter_action;
12357                         action_flags |= MLX5_FLOW_ACTION_METER;
12358                         break;
12359                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
12360                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
12361                                                               actions, error))
12362                                 return -rte_errno;
12363                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
12364                         break;
12365                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
12366                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
12367                                                               actions, error))
12368                                 return -rte_errno;
12369                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
12370                         break;
12371                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
12372                         sample_act_pos = actions_n;
12373                         sample = (const struct rte_flow_action_sample *)
12374                                  action->conf;
12375                         actions_n++;
12376                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
12377                         /* put encap action into group if work with port id */
12378                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
12379                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
12380                                 sample_act->action_flags |=
12381                                                         MLX5_FLOW_ACTION_ENCAP;
12382                         break;
12383                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
12384                         if (flow_dv_convert_action_modify_field
12385                                         (dev, mhdr_res, actions, attr, error))
12386                                 return -rte_errno;
12387                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
12388                         break;
12389                 case RTE_FLOW_ACTION_TYPE_END:
12390                         actions_end = true;
12391                         if (mhdr_res->actions_num) {
12392                                 /* create modify action if needed. */
12393                                 if (flow_dv_modify_hdr_resource_register
12394                                         (dev, mhdr_res, dev_flow, error))
12395                                         return -rte_errno;
12396                                 dev_flow->dv.actions[modify_action_position] =
12397                                         handle->dvh.modify_hdr->action;
12398                         }
12399                         /*
12400                          * Handle AGE and COUNT action by single HW counter
12401                          * when they are not shared.
12402                          */
12403                         if (action_flags & MLX5_FLOW_ACTION_AGE) {
12404                                 if ((non_shared_age &&
12405                                      count && !count->shared) ||
12406                                     !(priv->sh->flow_hit_aso_en &&
12407                                       attr->group)) {
12408                                         /* Creates age by counters. */
12409                                         cnt_act = flow_dv_prepare_counter
12410                                                                 (dev, dev_flow,
12411                                                                  flow, count,
12412                                                                  non_shared_age,
12413                                                                  error);
12414                                         if (!cnt_act)
12415                                                 return -rte_errno;
12416                                         dev_flow->dv.actions[age_act_pos] =
12417                                                                 cnt_act->action;
12418                                         break;
12419                                 }
12420                                 if (!flow->age && non_shared_age) {
12421                                         flow->age =
12422                                                 flow_dv_translate_create_aso_age
12423                                                                 (dev,
12424                                                                  non_shared_age,
12425                                                                  error);
12426                                         if (!flow->age)
12427                                                 return rte_flow_error_set
12428                                                     (error, rte_errno,
12429                                                      RTE_FLOW_ERROR_TYPE_ACTION,
12430                                                      NULL,
12431                                                      "can't create ASO age action");
12432                                 }
12433                                 age_act = flow_aso_age_get_by_idx(dev,
12434                                                                   flow->age);
12435                                 dev_flow->dv.actions[age_act_pos] =
12436                                                              age_act->dr_action;
12437                         }
12438                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
12439                                 /*
12440                                  * Create one count action, to be used
12441                                  * by all sub-flows.
12442                                  */
12443                                 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
12444                                                                   flow, count,
12445                                                                   NULL, error);
12446                                 if (!cnt_act)
12447                                         return -rte_errno;
12448                                 dev_flow->dv.actions[actions_n++] =
12449                                                                 cnt_act->action;
12450                         }
12451                 default:
12452                         break;
12453                 }
12454                 if (mhdr_res->actions_num &&
12455                     modify_action_position == UINT32_MAX)
12456                         modify_action_position = actions_n++;
12457         }
12458         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
12459                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
12460                 int item_type = items->type;
12461
12462                 if (!mlx5_flow_os_item_supported(item_type))
12463                         return rte_flow_error_set(error, ENOTSUP,
12464                                                   RTE_FLOW_ERROR_TYPE_ITEM,
12465                                                   NULL, "item not supported");
12466                 switch (item_type) {
12467                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
12468                         flow_dv_translate_item_port_id
12469                                 (dev, match_mask, match_value, items, attr);
12470                         last_item = MLX5_FLOW_ITEM_PORT_ID;
12471                         break;
12472                 case RTE_FLOW_ITEM_TYPE_ETH:
12473                         flow_dv_translate_item_eth(match_mask, match_value,
12474                                                    items, tunnel,
12475                                                    dev_flow->dv.group);
12476                         matcher.priority = action_flags &
12477                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
12478                                         !dev_flow->external ?
12479                                         MLX5_PRIORITY_MAP_L3 :
12480                                         MLX5_PRIORITY_MAP_L2;
12481                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
12482                                              MLX5_FLOW_LAYER_OUTER_L2;
12483                         break;
12484                 case RTE_FLOW_ITEM_TYPE_VLAN:
12485                         flow_dv_translate_item_vlan(dev_flow,
12486                                                     match_mask, match_value,
12487                                                     items, tunnel,
12488                                                     dev_flow->dv.group);
12489                         matcher.priority = MLX5_PRIORITY_MAP_L2;
12490                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
12491                                               MLX5_FLOW_LAYER_INNER_VLAN) :
12492                                              (MLX5_FLOW_LAYER_OUTER_L2 |
12493                                               MLX5_FLOW_LAYER_OUTER_VLAN);
12494                         break;
12495                 case RTE_FLOW_ITEM_TYPE_IPV4:
12496                         mlx5_flow_tunnel_ip_check(items, next_protocol,
12497                                                   &item_flags, &tunnel);
12498                         flow_dv_translate_item_ipv4(match_mask, match_value,
12499                                                     items, tunnel,
12500                                                     dev_flow->dv.group);
12501                         matcher.priority = MLX5_PRIORITY_MAP_L3;
12502                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
12503                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
12504                         if (items->mask != NULL &&
12505                             ((const struct rte_flow_item_ipv4 *)
12506                              items->mask)->hdr.next_proto_id) {
12507                                 next_protocol =
12508                                         ((const struct rte_flow_item_ipv4 *)
12509                                          (items->spec))->hdr.next_proto_id;
12510                                 next_protocol &=
12511                                         ((const struct rte_flow_item_ipv4 *)
12512                                          (items->mask))->hdr.next_proto_id;
12513                         } else {
12514                                 /* Reset for inner layer. */
12515                                 next_protocol = 0xff;
12516                         }
12517                         break;
12518                 case RTE_FLOW_ITEM_TYPE_IPV6:
12519                         mlx5_flow_tunnel_ip_check(items, next_protocol,
12520                                                   &item_flags, &tunnel);
12521                         flow_dv_translate_item_ipv6(match_mask, match_value,
12522                                                     items, tunnel,
12523                                                     dev_flow->dv.group);
12524                         matcher.priority = MLX5_PRIORITY_MAP_L3;
12525                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
12526                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
12527                         if (items->mask != NULL &&
12528                             ((const struct rte_flow_item_ipv6 *)
12529                              items->mask)->hdr.proto) {
12530                                 next_protocol =
12531                                         ((const struct rte_flow_item_ipv6 *)
12532                                          items->spec)->hdr.proto;
12533                                 next_protocol &=
12534                                         ((const struct rte_flow_item_ipv6 *)
12535                                          items->mask)->hdr.proto;
12536                         } else {
12537                                 /* Reset for inner layer. */
12538                                 next_protocol = 0xff;
12539                         }
12540                         break;
12541                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
12542                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
12543                                                              match_value,
12544                                                              items, tunnel);
12545                         last_item = tunnel ?
12546                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
12547                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
12548                         if (items->mask != NULL &&
12549                             ((const struct rte_flow_item_ipv6_frag_ext *)
12550                              items->mask)->hdr.next_header) {
12551                                 next_protocol =
12552                                 ((const struct rte_flow_item_ipv6_frag_ext *)
12553                                  items->spec)->hdr.next_header;
12554                                 next_protocol &=
12555                                 ((const struct rte_flow_item_ipv6_frag_ext *)
12556                                  items->mask)->hdr.next_header;
12557                         } else {
12558                                 /* Reset for inner layer. */
12559                                 next_protocol = 0xff;
12560                         }
12561                         break;
12562                 case RTE_FLOW_ITEM_TYPE_TCP:
12563                         flow_dv_translate_item_tcp(match_mask, match_value,
12564                                                    items, tunnel);
12565                         matcher.priority = MLX5_PRIORITY_MAP_L4;
12566                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
12567                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
12568                         break;
12569                 case RTE_FLOW_ITEM_TYPE_UDP:
12570                         flow_dv_translate_item_udp(match_mask, match_value,
12571                                                    items, tunnel);
12572                         matcher.priority = MLX5_PRIORITY_MAP_L4;
12573                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
12574                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
12575                         break;
12576                 case RTE_FLOW_ITEM_TYPE_GRE:
12577                         flow_dv_translate_item_gre(match_mask, match_value,
12578                                                    items, tunnel);
12579                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12580                         last_item = MLX5_FLOW_LAYER_GRE;
12581                         break;
12582                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
12583                         flow_dv_translate_item_gre_key(match_mask,
12584                                                        match_value, items);
12585                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
12586                         break;
12587                 case RTE_FLOW_ITEM_TYPE_NVGRE:
12588                         flow_dv_translate_item_nvgre(match_mask, match_value,
12589                                                      items, tunnel);
12590                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12591                         last_item = MLX5_FLOW_LAYER_GRE;
12592                         break;
12593                 case RTE_FLOW_ITEM_TYPE_VXLAN:
12594                         flow_dv_translate_item_vxlan(match_mask, match_value,
12595                                                      items, tunnel);
12596                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12597                         last_item = MLX5_FLOW_LAYER_VXLAN;
12598                         break;
12599                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
12600                         flow_dv_translate_item_vxlan_gpe(match_mask,
12601                                                          match_value, items,
12602                                                          tunnel);
12603                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12604                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
12605                         break;
12606                 case RTE_FLOW_ITEM_TYPE_GENEVE:
12607                         flow_dv_translate_item_geneve(match_mask, match_value,
12608                                                       items, tunnel);
12609                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12610                         last_item = MLX5_FLOW_LAYER_GENEVE;
12611                         break;
12612                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
12613                         ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
12614                                                           match_value,
12615                                                           items, error);
12616                         if (ret)
12617                                 return rte_flow_error_set(error, -ret,
12618                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
12619                                         "cannot create GENEVE TLV option");
12620                         flow->geneve_tlv_option = 1;
12621                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
12622                         break;
12623                 case RTE_FLOW_ITEM_TYPE_MPLS:
12624                         flow_dv_translate_item_mpls(match_mask, match_value,
12625                                                     items, last_item, tunnel);
12626                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12627                         last_item = MLX5_FLOW_LAYER_MPLS;
12628                         break;
12629                 case RTE_FLOW_ITEM_TYPE_MARK:
12630                         flow_dv_translate_item_mark(dev, match_mask,
12631                                                     match_value, items);
12632                         last_item = MLX5_FLOW_ITEM_MARK;
12633                         break;
12634                 case RTE_FLOW_ITEM_TYPE_META:
12635                         flow_dv_translate_item_meta(dev, match_mask,
12636                                                     match_value, attr, items);
12637                         last_item = MLX5_FLOW_ITEM_METADATA;
12638                         break;
12639                 case RTE_FLOW_ITEM_TYPE_ICMP:
12640                         flow_dv_translate_item_icmp(match_mask, match_value,
12641                                                     items, tunnel);
12642                         last_item = MLX5_FLOW_LAYER_ICMP;
12643                         break;
12644                 case RTE_FLOW_ITEM_TYPE_ICMP6:
12645                         flow_dv_translate_item_icmp6(match_mask, match_value,
12646                                                       items, tunnel);
12647                         last_item = MLX5_FLOW_LAYER_ICMP6;
12648                         break;
12649                 case RTE_FLOW_ITEM_TYPE_TAG:
12650                         flow_dv_translate_item_tag(dev, match_mask,
12651                                                    match_value, items);
12652                         last_item = MLX5_FLOW_ITEM_TAG;
12653                         break;
12654                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
12655                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
12656                                                         match_value, items);
12657                         last_item = MLX5_FLOW_ITEM_TAG;
12658                         break;
12659                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
12660                         flow_dv_translate_item_tx_queue(dev, match_mask,
12661                                                         match_value,
12662                                                         items);
12663                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
12664                         break;
12665                 case RTE_FLOW_ITEM_TYPE_GTP:
12666                         flow_dv_translate_item_gtp(match_mask, match_value,
12667                                                    items, tunnel);
12668                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
12669                         last_item = MLX5_FLOW_LAYER_GTP;
12670                         break;
12671                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
12672                         ret = flow_dv_translate_item_gtp_psc(match_mask,
12673                                                           match_value,
12674                                                           items);
12675                         if (ret)
12676                                 return rte_flow_error_set(error, -ret,
12677                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
12678                                         "cannot create GTP PSC item");
12679                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
12680                         break;
12681                 case RTE_FLOW_ITEM_TYPE_ECPRI:
12682                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
12683                                 /* Create it only the first time to be used. */
12684                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
12685                                 if (ret)
12686                                         return rte_flow_error_set
12687                                                 (error, -ret,
12688                                                 RTE_FLOW_ERROR_TYPE_ITEM,
12689                                                 NULL,
12690                                                 "cannot create eCPRI parser");
12691                         }
12692                         /* Adjust the length matcher and device flow value. */
12693                         matcher.mask.size = MLX5_ST_SZ_BYTES(fte_match_param);
12694                         dev_flow->dv.value.size =
12695                                         MLX5_ST_SZ_BYTES(fte_match_param);
12696                         flow_dv_translate_item_ecpri(dev, match_mask,
12697                                                      match_value, items);
12698                         /* No other protocol should follow eCPRI layer. */
12699                         last_item = MLX5_FLOW_LAYER_ECPRI;
12700                         break;
12701                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
12702                         flow_dv_translate_item_integrity(match_mask,
12703                                                          match_value,
12704                                                          head_item, items);
12705                         break;
12706                 default:
12707                         break;
12708                 }
12709                 item_flags |= last_item;
12710         }
12711         /*
12712          * When E-Switch mode is enabled, we have two cases where we need to
12713          * set the source port manually.
12714          * The first one, is in case of Nic steering rule, and the second is
12715          * E-Switch rule where no port_id item was found. In both cases
12716          * the source port is set according the current port in use.
12717          */
12718         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
12719             (priv->representor || priv->master)) {
12720                 if (flow_dv_translate_item_port_id(dev, match_mask,
12721                                                    match_value, NULL, attr))
12722                         return -rte_errno;
12723         }
12724 #ifdef RTE_LIBRTE_MLX5_DEBUG
12725         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
12726                                               dev_flow->dv.value.buf));
12727 #endif
12728         /*
12729          * Layers may be already initialized from prefix flow if this dev_flow
12730          * is the suffix flow.
12731          */
12732         handle->layers |= item_flags;
12733         if (action_flags & MLX5_FLOW_ACTION_RSS)
12734                 flow_dv_hashfields_set(dev_flow, rss_desc);
12735         /* If has RSS action in the sample action, the Sample/Mirror resource
12736          * should be registered after the hash filed be update.
12737          */
12738         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
12739                 ret = flow_dv_translate_action_sample(dev,
12740                                                       sample,
12741                                                       dev_flow, attr,
12742                                                       &num_of_dest,
12743                                                       sample_actions,
12744                                                       &sample_res,
12745                                                       error);
12746                 if (ret < 0)
12747                         return ret;
12748                 ret = flow_dv_create_action_sample(dev,
12749                                                    dev_flow,
12750                                                    num_of_dest,
12751                                                    &sample_res,
12752                                                    &mdest_res,
12753                                                    sample_actions,
12754                                                    action_flags,
12755                                                    error);
12756                 if (ret < 0)
12757                         return rte_flow_error_set
12758                                                 (error, rte_errno,
12759                                                 RTE_FLOW_ERROR_TYPE_ACTION,
12760                                                 NULL,
12761                                                 "cannot create sample action");
12762                 if (num_of_dest > 1) {
12763                         dev_flow->dv.actions[sample_act_pos] =
12764                         dev_flow->dv.dest_array_res->action;
12765                 } else {
12766                         dev_flow->dv.actions[sample_act_pos] =
12767                         dev_flow->dv.sample_res->verbs_action;
12768                 }
12769         }
12770         /*
12771          * For multiple destination (sample action with ratio=1), the encap
12772          * action and port id action will be combined into group action.
12773          * So need remove the original these actions in the flow and only
12774          * use the sample action instead of.
12775          */
12776         if (num_of_dest > 1 &&
12777             (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
12778                 int i;
12779                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12780
12781                 for (i = 0; i < actions_n; i++) {
12782                         if ((sample_act->dr_encap_action &&
12783                                 sample_act->dr_encap_action ==
12784                                 dev_flow->dv.actions[i]) ||
12785                                 (sample_act->dr_port_id_action &&
12786                                 sample_act->dr_port_id_action ==
12787                                 dev_flow->dv.actions[i]) ||
12788                                 (sample_act->dr_jump_action &&
12789                                 sample_act->dr_jump_action ==
12790                                 dev_flow->dv.actions[i]))
12791                                 continue;
12792                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
12793                 }
12794                 memcpy((void *)dev_flow->dv.actions,
12795                                 (void *)temp_actions,
12796                                 tmp_actions_n * sizeof(void *));
12797                 actions_n = tmp_actions_n;
12798         }
12799         dev_flow->dv.actions_n = actions_n;
12800         dev_flow->act_flags = action_flags;
12801         if (wks->skip_matcher_reg)
12802                 return 0;
12803         /* Register matcher. */
12804         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
12805                                     matcher.mask.size);
12806         matcher.priority = mlx5_get_matcher_priority(dev, attr,
12807                                         matcher.priority);
12808         /* reserved field no needs to be set to 0 here. */
12809         tbl_key.is_fdb = attr->transfer;
12810         tbl_key.is_egress = attr->egress;
12811         tbl_key.level = dev_flow->dv.group;
12812         tbl_key.id = dev_flow->dv.table_id;
12813         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
12814                                      tunnel, attr->group, error))
12815                 return -rte_errno;
12816         return 0;
12817 }
12818
12819 /**
12820  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
12821  * and tunnel.
12822  *
12823  * @param[in, out] action
12824  *   Shred RSS action holding hash RX queue objects.
12825  * @param[in] hash_fields
12826  *   Defines combination of packet fields to participate in RX hash.
12827  * @param[in] tunnel
12828  *   Tunnel type
12829  * @param[in] hrxq_idx
12830  *   Hash RX queue index to set.
12831  *
12832  * @return
12833  *   0 on success, otherwise negative errno value.
12834  */
12835 static int
12836 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
12837                               const uint64_t hash_fields,
12838                               uint32_t hrxq_idx)
12839 {
12840         uint32_t *hrxqs = action->hrxq;
12841
12842         switch (hash_fields & ~IBV_RX_HASH_INNER) {
12843         case MLX5_RSS_HASH_IPV4:
12844                 /* fall-through. */
12845         case MLX5_RSS_HASH_IPV4_DST_ONLY:
12846                 /* fall-through. */
12847         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
12848                 hrxqs[0] = hrxq_idx;
12849                 return 0;
12850         case MLX5_RSS_HASH_IPV4_TCP:
12851                 /* fall-through. */
12852         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
12853                 /* fall-through. */
12854         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
12855                 hrxqs[1] = hrxq_idx;
12856                 return 0;
12857         case MLX5_RSS_HASH_IPV4_UDP:
12858                 /* fall-through. */
12859         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
12860                 /* fall-through. */
12861         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
12862                 hrxqs[2] = hrxq_idx;
12863                 return 0;
12864         case MLX5_RSS_HASH_IPV6:
12865                 /* fall-through. */
12866         case MLX5_RSS_HASH_IPV6_DST_ONLY:
12867                 /* fall-through. */
12868         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
12869                 hrxqs[3] = hrxq_idx;
12870                 return 0;
12871         case MLX5_RSS_HASH_IPV6_TCP:
12872                 /* fall-through. */
12873         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
12874                 /* fall-through. */
12875         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
12876                 hrxqs[4] = hrxq_idx;
12877                 return 0;
12878         case MLX5_RSS_HASH_IPV6_UDP:
12879                 /* fall-through. */
12880         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
12881                 /* fall-through. */
12882         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
12883                 hrxqs[5] = hrxq_idx;
12884                 return 0;
12885         case MLX5_RSS_HASH_NONE:
12886                 hrxqs[6] = hrxq_idx;
12887                 return 0;
12888         default:
12889                 return -1;
12890         }
12891 }
12892
12893 /**
12894  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
12895  * and tunnel.
12896  *
12897  * @param[in] dev
12898  *   Pointer to the Ethernet device structure.
12899  * @param[in] idx
12900  *   Shared RSS action ID holding hash RX queue objects.
12901  * @param[in] hash_fields
12902  *   Defines combination of packet fields to participate in RX hash.
12903  * @param[in] tunnel
12904  *   Tunnel type
12905  *
12906  * @return
12907  *   Valid hash RX queue index, otherwise 0.
12908  */
12909 static uint32_t
12910 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
12911                                  const uint64_t hash_fields)
12912 {
12913         struct mlx5_priv *priv = dev->data->dev_private;
12914         struct mlx5_shared_action_rss *shared_rss =
12915             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
12916         const uint32_t *hrxqs = shared_rss->hrxq;
12917
12918         switch (hash_fields & ~IBV_RX_HASH_INNER) {
12919         case MLX5_RSS_HASH_IPV4:
12920                 /* fall-through. */
12921         case MLX5_RSS_HASH_IPV4_DST_ONLY:
12922                 /* fall-through. */
12923         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
12924                 return hrxqs[0];
12925         case MLX5_RSS_HASH_IPV4_TCP:
12926                 /* fall-through. */
12927         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
12928                 /* fall-through. */
12929         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
12930                 return hrxqs[1];
12931         case MLX5_RSS_HASH_IPV4_UDP:
12932                 /* fall-through. */
12933         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
12934                 /* fall-through. */
12935         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
12936                 return hrxqs[2];
12937         case MLX5_RSS_HASH_IPV6:
12938                 /* fall-through. */
12939         case MLX5_RSS_HASH_IPV6_DST_ONLY:
12940                 /* fall-through. */
12941         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
12942                 return hrxqs[3];
12943         case MLX5_RSS_HASH_IPV6_TCP:
12944                 /* fall-through. */
12945         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
12946                 /* fall-through. */
12947         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
12948                 return hrxqs[4];
12949         case MLX5_RSS_HASH_IPV6_UDP:
12950                 /* fall-through. */
12951         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
12952                 /* fall-through. */
12953         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
12954                 return hrxqs[5];
12955         case MLX5_RSS_HASH_NONE:
12956                 return hrxqs[6];
12957         default:
12958                 return 0;
12959         }
12960
12961 }
12962
12963 /**
12964  * Apply the flow to the NIC, lock free,
12965  * (mutex should be acquired by caller).
12966  *
12967  * @param[in] dev
12968  *   Pointer to the Ethernet device structure.
12969  * @param[in, out] flow
12970  *   Pointer to flow structure.
12971  * @param[out] error
12972  *   Pointer to error structure.
12973  *
12974  * @return
12975  *   0 on success, a negative errno value otherwise and rte_errno is set.
12976  */
12977 static int
12978 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
12979               struct rte_flow_error *error)
12980 {
12981         struct mlx5_flow_dv_workspace *dv;
12982         struct mlx5_flow_handle *dh;
12983         struct mlx5_flow_handle_dv *dv_h;
12984         struct mlx5_flow *dev_flow;
12985         struct mlx5_priv *priv = dev->data->dev_private;
12986         uint32_t handle_idx;
12987         int n;
12988         int err;
12989         int idx;
12990         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12991         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
12992
12993         MLX5_ASSERT(wks);
12994         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
12995                 dev_flow = &wks->flows[idx];
12996                 dv = &dev_flow->dv;
12997                 dh = dev_flow->handle;
12998                 dv_h = &dh->dvh;
12999                 n = dv->actions_n;
13000                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13001                         if (dv->transfer) {
13002                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13003                                 dv->actions[n++] = priv->sh->dr_drop_action;
13004                         } else {
13005 #ifdef HAVE_MLX5DV_DR
13006                                 /* DR supports drop action placeholder. */
13007                                 MLX5_ASSERT(priv->sh->dr_drop_action);
13008                                 dv->actions[n++] = priv->sh->dr_drop_action;
13009 #else
13010                                 /* For DV we use the explicit drop queue. */
13011                                 MLX5_ASSERT(priv->drop_queue.hrxq);
13012                                 dv->actions[n++] =
13013                                                 priv->drop_queue.hrxq->action;
13014 #endif
13015                         }
13016                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13017                            !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13018                         struct mlx5_hrxq *hrxq;
13019                         uint32_t hrxq_idx;
13020
13021                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13022                                                     &hrxq_idx);
13023                         if (!hrxq) {
13024                                 rte_flow_error_set
13025                                         (error, rte_errno,
13026                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13027                                          "cannot get hash queue");
13028                                 goto error;
13029                         }
13030                         dh->rix_hrxq = hrxq_idx;
13031                         dv->actions[n++] = hrxq->action;
13032                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13033                         struct mlx5_hrxq *hrxq = NULL;
13034                         uint32_t hrxq_idx;
13035
13036                         hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13037                                                 rss_desc->shared_rss,
13038                                                 dev_flow->hash_fields);
13039                         if (hrxq_idx)
13040                                 hrxq = mlx5_ipool_get
13041                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13042                                          hrxq_idx);
13043                         if (!hrxq) {
13044                                 rte_flow_error_set
13045                                         (error, rte_errno,
13046                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13047                                          "cannot get hash queue");
13048                                 goto error;
13049                         }
13050                         dh->rix_srss = rss_desc->shared_rss;
13051                         dv->actions[n++] = hrxq->action;
13052                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13053                         if (!priv->sh->default_miss_action) {
13054                                 rte_flow_error_set
13055                                         (error, rte_errno,
13056                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13057                                          "default miss action not be created.");
13058                                 goto error;
13059                         }
13060                         dv->actions[n++] = priv->sh->default_miss_action;
13061                 }
13062                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13063                                                (void *)&dv->value, n,
13064                                                dv->actions, &dh->drv_flow);
13065                 if (err) {
13066                         rte_flow_error_set(error, errno,
13067                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13068                                            NULL,
13069                                            "hardware refuses to create flow");
13070                         goto error;
13071                 }
13072                 if (priv->vmwa_context &&
13073                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
13074                         /*
13075                          * The rule contains the VLAN pattern.
13076                          * For VF we are going to create VLAN
13077                          * interface to make hypervisor set correct
13078                          * e-Switch vport context.
13079                          */
13080                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13081                 }
13082         }
13083         return 0;
13084 error:
13085         err = rte_errno; /* Save rte_errno before cleanup. */
13086         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13087                        handle_idx, dh, next) {
13088                 /* hrxq is union, don't clear it if the flag is not set. */
13089                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13090                         mlx5_hrxq_release(dev, dh->rix_hrxq);
13091                         dh->rix_hrxq = 0;
13092                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13093                         dh->rix_srss = 0;
13094                 }
13095                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13096                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13097         }
13098         rte_errno = err; /* Restore rte_errno. */
13099         return -rte_errno;
13100 }
13101
13102 void
13103 flow_dv_matcher_remove_cb(struct mlx5_cache_list *list __rte_unused,
13104                           struct mlx5_cache_entry *entry)
13105 {
13106         struct mlx5_flow_dv_matcher *cache = container_of(entry, typeof(*cache),
13107                                                           entry);
13108
13109         claim_zero(mlx5_flow_os_destroy_flow_matcher(cache->matcher_object));
13110         mlx5_free(cache);
13111 }
13112
13113 /**
13114  * Release the flow matcher.
13115  *
13116  * @param dev
13117  *   Pointer to Ethernet device.
13118  * @param port_id
13119  *   Index to port ID action resource.
13120  *
13121  * @return
13122  *   1 while a reference on it exists, 0 when freed.
13123  */
13124 static int
13125 flow_dv_matcher_release(struct rte_eth_dev *dev,
13126                         struct mlx5_flow_handle *handle)
13127 {
13128         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13129         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
13130                                                             typeof(*tbl), tbl);
13131         int ret;
13132
13133         MLX5_ASSERT(matcher->matcher_object);
13134         ret = mlx5_cache_unregister(&tbl->matchers, &matcher->entry);
13135         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
13136         return ret;
13137 }
13138
13139 /**
13140  * Release encap_decap resource.
13141  *
13142  * @param list
13143  *   Pointer to the hash list.
13144  * @param entry
13145  *   Pointer to exist resource entry object.
13146  */
13147 void
13148 flow_dv_encap_decap_remove_cb(struct mlx5_hlist *list,
13149                               struct mlx5_hlist_entry *entry)
13150 {
13151         struct mlx5_dev_ctx_shared *sh = list->ctx;
13152         struct mlx5_flow_dv_encap_decap_resource *res =
13153                 container_of(entry, typeof(*res), entry);
13154
13155         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13156         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
13157 }
13158
13159 /**
13160  * Release an encap/decap resource.
13161  *
13162  * @param dev
13163  *   Pointer to Ethernet device.
13164  * @param encap_decap_idx
13165  *   Index of encap decap resource.
13166  *
13167  * @return
13168  *   1 while a reference on it exists, 0 when freed.
13169  */
13170 static int
13171 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
13172                                      uint32_t encap_decap_idx)
13173 {
13174         struct mlx5_priv *priv = dev->data->dev_private;
13175         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
13176
13177         cache_resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
13178                                         encap_decap_idx);
13179         if (!cache_resource)
13180                 return 0;
13181         MLX5_ASSERT(cache_resource->action);
13182         return mlx5_hlist_unregister(priv->sh->encaps_decaps,
13183                                      &cache_resource->entry);
13184 }
13185
13186 /**
13187  * Release an jump to table action resource.
13188  *
13189  * @param dev
13190  *   Pointer to Ethernet device.
13191  * @param rix_jump
13192  *   Index to the jump action resource.
13193  *
13194  * @return
13195  *   1 while a reference on it exists, 0 when freed.
13196  */
13197 static int
13198 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
13199                                   uint32_t rix_jump)
13200 {
13201         struct mlx5_priv *priv = dev->data->dev_private;
13202         struct mlx5_flow_tbl_data_entry *tbl_data;
13203
13204         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
13205                                   rix_jump);
13206         if (!tbl_data)
13207                 return 0;
13208         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
13209 }
13210
13211 void
13212 flow_dv_modify_remove_cb(struct mlx5_hlist *list __rte_unused,
13213                          struct mlx5_hlist_entry *entry)
13214 {
13215         struct mlx5_flow_dv_modify_hdr_resource *res =
13216                 container_of(entry, typeof(*res), entry);
13217
13218         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13219         mlx5_free(entry);
13220 }
13221
13222 /**
13223  * Release a modify-header resource.
13224  *
13225  * @param dev
13226  *   Pointer to Ethernet device.
13227  * @param handle
13228  *   Pointer to mlx5_flow_handle.
13229  *
13230  * @return
13231  *   1 while a reference on it exists, 0 when freed.
13232  */
13233 static int
13234 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
13235                                     struct mlx5_flow_handle *handle)
13236 {
13237         struct mlx5_priv *priv = dev->data->dev_private;
13238         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
13239
13240         MLX5_ASSERT(entry->action);
13241         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
13242 }
13243
13244 void
13245 flow_dv_port_id_remove_cb(struct mlx5_cache_list *list,
13246                           struct mlx5_cache_entry *entry)
13247 {
13248         struct mlx5_dev_ctx_shared *sh = list->ctx;
13249         struct mlx5_flow_dv_port_id_action_resource *cache =
13250                         container_of(entry, typeof(*cache), entry);
13251
13252         claim_zero(mlx5_flow_os_destroy_flow_action(cache->action));
13253         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], cache->idx);
13254 }
13255
13256 /**
13257  * Release port ID action resource.
13258  *
13259  * @param dev
13260  *   Pointer to Ethernet device.
13261  * @param handle
13262  *   Pointer to mlx5_flow_handle.
13263  *
13264  * @return
13265  *   1 while a reference on it exists, 0 when freed.
13266  */
13267 static int
13268 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
13269                                         uint32_t port_id)
13270 {
13271         struct mlx5_priv *priv = dev->data->dev_private;
13272         struct mlx5_flow_dv_port_id_action_resource *cache;
13273
13274         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
13275         if (!cache)
13276                 return 0;
13277         MLX5_ASSERT(cache->action);
13278         return mlx5_cache_unregister(&priv->sh->port_id_action_list,
13279                                      &cache->entry);
13280 }
13281
13282 /**
13283  * Release shared RSS action resource.
13284  *
13285  * @param dev
13286  *   Pointer to Ethernet device.
13287  * @param srss
13288  *   Shared RSS action index.
13289  */
13290 static void
13291 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
13292 {
13293         struct mlx5_priv *priv = dev->data->dev_private;
13294         struct mlx5_shared_action_rss *shared_rss;
13295
13296         shared_rss = mlx5_ipool_get
13297                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
13298         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
13299 }
13300
13301 void
13302 flow_dv_push_vlan_remove_cb(struct mlx5_cache_list *list,
13303                             struct mlx5_cache_entry *entry)
13304 {
13305         struct mlx5_dev_ctx_shared *sh = list->ctx;
13306         struct mlx5_flow_dv_push_vlan_action_resource *cache =
13307                         container_of(entry, typeof(*cache), entry);
13308
13309         claim_zero(mlx5_flow_os_destroy_flow_action(cache->action));
13310         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], cache->idx);
13311 }
13312
13313 /**
13314  * Release push vlan action resource.
13315  *
13316  * @param dev
13317  *   Pointer to Ethernet device.
13318  * @param handle
13319  *   Pointer to mlx5_flow_handle.
13320  *
13321  * @return
13322  *   1 while a reference on it exists, 0 when freed.
13323  */
13324 static int
13325 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
13326                                           struct mlx5_flow_handle *handle)
13327 {
13328         struct mlx5_priv *priv = dev->data->dev_private;
13329         struct mlx5_flow_dv_push_vlan_action_resource *cache;
13330         uint32_t idx = handle->dvh.rix_push_vlan;
13331
13332         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
13333         if (!cache)
13334                 return 0;
13335         MLX5_ASSERT(cache->action);
13336         return mlx5_cache_unregister(&priv->sh->push_vlan_action_list,
13337                                      &cache->entry);
13338 }
13339
13340 /**
13341  * Release the fate resource.
13342  *
13343  * @param dev
13344  *   Pointer to Ethernet device.
13345  * @param handle
13346  *   Pointer to mlx5_flow_handle.
13347  */
13348 static void
13349 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
13350                                struct mlx5_flow_handle *handle)
13351 {
13352         if (!handle->rix_fate)
13353                 return;
13354         switch (handle->fate_action) {
13355         case MLX5_FLOW_FATE_QUEUE:
13356                 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
13357                         mlx5_hrxq_release(dev, handle->rix_hrxq);
13358                 break;
13359         case MLX5_FLOW_FATE_JUMP:
13360                 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
13361                 break;
13362         case MLX5_FLOW_FATE_PORT_ID:
13363                 flow_dv_port_id_action_resource_release(dev,
13364                                 handle->rix_port_id_action);
13365                 break;
13366         default:
13367                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
13368                 break;
13369         }
13370         handle->rix_fate = 0;
13371 }
13372
13373 void
13374 flow_dv_sample_remove_cb(struct mlx5_cache_list *list __rte_unused,
13375                          struct mlx5_cache_entry *entry)
13376 {
13377         struct mlx5_flow_dv_sample_resource *cache_resource =
13378                         container_of(entry, typeof(*cache_resource), entry);
13379         struct rte_eth_dev *dev = cache_resource->dev;
13380         struct mlx5_priv *priv = dev->data->dev_private;
13381
13382         if (cache_resource->verbs_action)
13383                 claim_zero(mlx5_flow_os_destroy_flow_action
13384                                 (cache_resource->verbs_action));
13385         if (cache_resource->normal_path_tbl)
13386                 flow_dv_tbl_resource_release(MLX5_SH(dev),
13387                         cache_resource->normal_path_tbl);
13388         flow_dv_sample_sub_actions_release(dev,
13389                                 &cache_resource->sample_idx);
13390         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
13391                         cache_resource->idx);
13392         DRV_LOG(DEBUG, "sample resource %p: removed",
13393                 (void *)cache_resource);
13394 }
13395
13396 /**
13397  * Release an sample resource.
13398  *
13399  * @param dev
13400  *   Pointer to Ethernet device.
13401  * @param handle
13402  *   Pointer to mlx5_flow_handle.
13403  *
13404  * @return
13405  *   1 while a reference on it exists, 0 when freed.
13406  */
13407 static int
13408 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
13409                                      struct mlx5_flow_handle *handle)
13410 {
13411         struct mlx5_priv *priv = dev->data->dev_private;
13412         struct mlx5_flow_dv_sample_resource *cache_resource;
13413
13414         cache_resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
13415                          handle->dvh.rix_sample);
13416         if (!cache_resource)
13417                 return 0;
13418         MLX5_ASSERT(cache_resource->verbs_action);
13419         return mlx5_cache_unregister(&priv->sh->sample_action_list,
13420                                      &cache_resource->entry);
13421 }
13422
13423 void
13424 flow_dv_dest_array_remove_cb(struct mlx5_cache_list *list __rte_unused,
13425                              struct mlx5_cache_entry *entry)
13426 {
13427         struct mlx5_flow_dv_dest_array_resource *cache_resource =
13428                         container_of(entry, typeof(*cache_resource), entry);
13429         struct rte_eth_dev *dev = cache_resource->dev;
13430         struct mlx5_priv *priv = dev->data->dev_private;
13431         uint32_t i = 0;
13432
13433         MLX5_ASSERT(cache_resource->action);
13434         if (cache_resource->action)
13435                 claim_zero(mlx5_flow_os_destroy_flow_action
13436                                         (cache_resource->action));
13437         for (; i < cache_resource->num_of_dest; i++)
13438                 flow_dv_sample_sub_actions_release(dev,
13439                                 &cache_resource->sample_idx[i]);
13440         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
13441                         cache_resource->idx);
13442         DRV_LOG(DEBUG, "destination array resource %p: removed",
13443                 (void *)cache_resource);
13444 }
13445
13446 /**
13447  * Release an destination array resource.
13448  *
13449  * @param dev
13450  *   Pointer to Ethernet device.
13451  * @param handle
13452  *   Pointer to mlx5_flow_handle.
13453  *
13454  * @return
13455  *   1 while a reference on it exists, 0 when freed.
13456  */
13457 static int
13458 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
13459                                     struct mlx5_flow_handle *handle)
13460 {
13461         struct mlx5_priv *priv = dev->data->dev_private;
13462         struct mlx5_flow_dv_dest_array_resource *cache;
13463
13464         cache = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
13465                                handle->dvh.rix_dest_array);
13466         if (!cache)
13467                 return 0;
13468         MLX5_ASSERT(cache->action);
13469         return mlx5_cache_unregister(&priv->sh->dest_array_list,
13470                                      &cache->entry);
13471 }
13472
13473 static void
13474 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
13475 {
13476         struct mlx5_priv *priv = dev->data->dev_private;
13477         struct mlx5_dev_ctx_shared *sh = priv->sh;
13478         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
13479                                 sh->geneve_tlv_option_resource;
13480         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
13481         if (geneve_opt_resource) {
13482                 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
13483                                          __ATOMIC_RELAXED))) {
13484                         claim_zero(mlx5_devx_cmd_destroy
13485                                         (geneve_opt_resource->obj));
13486                         mlx5_free(sh->geneve_tlv_option_resource);
13487                         sh->geneve_tlv_option_resource = NULL;
13488                 }
13489         }
13490         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
13491 }
13492
13493 /**
13494  * Remove the flow from the NIC but keeps it in memory.
13495  * Lock free, (mutex should be acquired by caller).
13496  *
13497  * @param[in] dev
13498  *   Pointer to Ethernet device.
13499  * @param[in, out] flow
13500  *   Pointer to flow structure.
13501  */
13502 static void
13503 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
13504 {
13505         struct mlx5_flow_handle *dh;
13506         uint32_t handle_idx;
13507         struct mlx5_priv *priv = dev->data->dev_private;
13508
13509         if (!flow)
13510                 return;
13511         handle_idx = flow->dev_handles;
13512         while (handle_idx) {
13513                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
13514                                     handle_idx);
13515                 if (!dh)
13516                         return;
13517                 if (dh->drv_flow) {
13518                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
13519                         dh->drv_flow = NULL;
13520                 }
13521                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
13522                         flow_dv_fate_resource_release(dev, dh);
13523                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13524                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13525                 handle_idx = dh->next.next;
13526         }
13527 }
13528
13529 /**
13530  * Remove the flow from the NIC and the memory.
13531  * Lock free, (mutex should be acquired by caller).
13532  *
13533  * @param[in] dev
13534  *   Pointer to the Ethernet device structure.
13535  * @param[in, out] flow
13536  *   Pointer to flow structure.
13537  */
13538 static void
13539 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
13540 {
13541         struct mlx5_flow_handle *dev_handle;
13542         struct mlx5_priv *priv = dev->data->dev_private;
13543         struct mlx5_flow_meter_info *fm = NULL;
13544         uint32_t srss = 0;
13545
13546         if (!flow)
13547                 return;
13548         flow_dv_remove(dev, flow);
13549         if (flow->counter) {
13550                 flow_dv_counter_free(dev, flow->counter);
13551                 flow->counter = 0;
13552         }
13553         if (flow->meter) {
13554                 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
13555                 if (fm)
13556                         mlx5_flow_meter_detach(priv, fm);
13557                 flow->meter = 0;
13558         }
13559         if (flow->age)
13560                 flow_dv_aso_age_release(dev, flow->age);
13561         if (flow->geneve_tlv_option) {
13562                 flow_dv_geneve_tlv_option_resource_release(dev);
13563                 flow->geneve_tlv_option = 0;
13564         }
13565         while (flow->dev_handles) {
13566                 uint32_t tmp_idx = flow->dev_handles;
13567
13568                 dev_handle = mlx5_ipool_get(priv->sh->ipool
13569                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
13570                 if (!dev_handle)
13571                         return;
13572                 flow->dev_handles = dev_handle->next.next;
13573                 if (dev_handle->dvh.matcher)
13574                         flow_dv_matcher_release(dev, dev_handle);
13575                 if (dev_handle->dvh.rix_sample)
13576                         flow_dv_sample_resource_release(dev, dev_handle);
13577                 if (dev_handle->dvh.rix_dest_array)
13578                         flow_dv_dest_array_resource_release(dev, dev_handle);
13579                 if (dev_handle->dvh.rix_encap_decap)
13580                         flow_dv_encap_decap_resource_release(dev,
13581                                 dev_handle->dvh.rix_encap_decap);
13582                 if (dev_handle->dvh.modify_hdr)
13583                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
13584                 if (dev_handle->dvh.rix_push_vlan)
13585                         flow_dv_push_vlan_action_resource_release(dev,
13586                                                                   dev_handle);
13587                 if (dev_handle->dvh.rix_tag)
13588                         flow_dv_tag_release(dev,
13589                                             dev_handle->dvh.rix_tag);
13590                 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
13591                         flow_dv_fate_resource_release(dev, dev_handle);
13592                 else if (!srss)
13593                         srss = dev_handle->rix_srss;
13594                 if (fm && dev_handle->is_meter_flow_id &&
13595                     dev_handle->split_flow_id)
13596                         mlx5_ipool_free(fm->flow_ipool,
13597                                         dev_handle->split_flow_id);
13598                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
13599                            tmp_idx);
13600         }
13601         if (srss)
13602                 flow_dv_shared_rss_action_release(dev, srss);
13603 }
13604
13605 /**
13606  * Release array of hash RX queue objects.
13607  * Helper function.
13608  *
13609  * @param[in] dev
13610  *   Pointer to the Ethernet device structure.
13611  * @param[in, out] hrxqs
13612  *   Array of hash RX queue objects.
13613  *
13614  * @return
13615  *   Total number of references to hash RX queue objects in *hrxqs* array
13616  *   after this operation.
13617  */
13618 static int
13619 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
13620                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
13621 {
13622         size_t i;
13623         int remaining = 0;
13624
13625         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
13626                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
13627
13628                 if (!ret)
13629                         (*hrxqs)[i] = 0;
13630                 remaining += ret;
13631         }
13632         return remaining;
13633 }
13634
13635 /**
13636  * Release all hash RX queue objects representing shared RSS action.
13637  *
13638  * @param[in] dev
13639  *   Pointer to the Ethernet device structure.
13640  * @param[in, out] action
13641  *   Shared RSS action to remove hash RX queue objects from.
13642  *
13643  * @return
13644  *   Total number of references to hash RX queue objects stored in *action*
13645  *   after this operation.
13646  *   Expected to be 0 if no external references held.
13647  */
13648 static int
13649 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
13650                                  struct mlx5_shared_action_rss *shared_rss)
13651 {
13652         return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
13653 }
13654
13655 /**
13656  * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
13657  * user input.
13658  *
13659  * Only one hash value is available for one L3+L4 combination:
13660  * for example:
13661  * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
13662  * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
13663  * same slot in mlx5_rss_hash_fields.
13664  *
13665  * @param[in] rss
13666  *   Pointer to the shared action RSS conf.
13667  * @param[in, out] hash_field
13668  *   hash_field variable needed to be adjusted.
13669  *
13670  * @return
13671  *   void
13672  */
13673 static void
13674 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
13675                                      uint64_t *hash_field)
13676 {
13677         uint64_t rss_types = rss->origin.types;
13678
13679         switch (*hash_field & ~IBV_RX_HASH_INNER) {
13680         case MLX5_RSS_HASH_IPV4:
13681                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
13682                         *hash_field &= ~MLX5_RSS_HASH_IPV4;
13683                         if (rss_types & ETH_RSS_L3_DST_ONLY)
13684                                 *hash_field |= IBV_RX_HASH_DST_IPV4;
13685                         else if (rss_types & ETH_RSS_L3_SRC_ONLY)
13686                                 *hash_field |= IBV_RX_HASH_SRC_IPV4;
13687                         else
13688                                 *hash_field |= MLX5_RSS_HASH_IPV4;
13689                 }
13690                 return;
13691         case MLX5_RSS_HASH_IPV6:
13692                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
13693                         *hash_field &= ~MLX5_RSS_HASH_IPV6;
13694                         if (rss_types & ETH_RSS_L3_DST_ONLY)
13695                                 *hash_field |= IBV_RX_HASH_DST_IPV6;
13696                         else if (rss_types & ETH_RSS_L3_SRC_ONLY)
13697                                 *hash_field |= IBV_RX_HASH_SRC_IPV6;
13698                         else
13699                                 *hash_field |= MLX5_RSS_HASH_IPV6;
13700                 }
13701                 return;
13702         case MLX5_RSS_HASH_IPV4_UDP:
13703                 /* fall-through. */
13704         case MLX5_RSS_HASH_IPV6_UDP:
13705                 if (rss_types & ETH_RSS_UDP) {
13706                         *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
13707                         if (rss_types & ETH_RSS_L4_DST_ONLY)
13708                                 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
13709                         else if (rss_types & ETH_RSS_L4_SRC_ONLY)
13710                                 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
13711                         else
13712                                 *hash_field |= MLX5_UDP_IBV_RX_HASH;
13713                 }
13714                 return;
13715         case MLX5_RSS_HASH_IPV4_TCP:
13716                 /* fall-through. */
13717         case MLX5_RSS_HASH_IPV6_TCP:
13718                 if (rss_types & ETH_RSS_TCP) {
13719                         *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
13720                         if (rss_types & ETH_RSS_L4_DST_ONLY)
13721                                 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
13722                         else if (rss_types & ETH_RSS_L4_SRC_ONLY)
13723                                 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
13724                         else
13725                                 *hash_field |= MLX5_TCP_IBV_RX_HASH;
13726                 }
13727                 return;
13728         default:
13729                 return;
13730         }
13731 }
13732
13733 /**
13734  * Setup shared RSS action.
13735  * Prepare set of hash RX queue objects sufficient to handle all valid
13736  * hash_fields combinations (see enum ibv_rx_hash_fields).
13737  *
13738  * @param[in] dev
13739  *   Pointer to the Ethernet device structure.
13740  * @param[in] action_idx
13741  *   Shared RSS action ipool index.
13742  * @param[in, out] action
13743  *   Partially initialized shared RSS action.
13744  * @param[out] error
13745  *   Perform verbose error reporting if not NULL. Initialized in case of
13746  *   error only.
13747  *
13748  * @return
13749  *   0 on success, otherwise negative errno value.
13750  */
13751 static int
13752 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
13753                            uint32_t action_idx,
13754                            struct mlx5_shared_action_rss *shared_rss,
13755                            struct rte_flow_error *error)
13756 {
13757         struct mlx5_flow_rss_desc rss_desc = { 0 };
13758         size_t i;
13759         int err;
13760
13761         if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
13762                 return rte_flow_error_set(error, rte_errno,
13763                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13764                                           "cannot setup indirection table");
13765         }
13766         memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
13767         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
13768         rss_desc.const_q = shared_rss->origin.queue;
13769         rss_desc.queue_num = shared_rss->origin.queue_num;
13770         /* Set non-zero value to indicate a shared RSS. */
13771         rss_desc.shared_rss = action_idx;
13772         rss_desc.ind_tbl = shared_rss->ind_tbl;
13773         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
13774                 uint32_t hrxq_idx;
13775                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
13776                 int tunnel = 0;
13777
13778                 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
13779                 if (shared_rss->origin.level > 1) {
13780                         hash_fields |= IBV_RX_HASH_INNER;
13781                         tunnel = 1;
13782                 }
13783                 rss_desc.tunnel = tunnel;
13784                 rss_desc.hash_fields = hash_fields;
13785                 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
13786                 if (!hrxq_idx) {
13787                         rte_flow_error_set
13788                                 (error, rte_errno,
13789                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13790                                  "cannot get hash queue");
13791                         goto error_hrxq_new;
13792                 }
13793                 err = __flow_dv_action_rss_hrxq_set
13794                         (shared_rss, hash_fields, hrxq_idx);
13795                 MLX5_ASSERT(!err);
13796         }
13797         return 0;
13798 error_hrxq_new:
13799         err = rte_errno;
13800         __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
13801         if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
13802                 shared_rss->ind_tbl = NULL;
13803         rte_errno = err;
13804         return -rte_errno;
13805 }
13806
13807 /**
13808  * Create shared RSS action.
13809  *
13810  * @param[in] dev
13811  *   Pointer to the Ethernet device structure.
13812  * @param[in] conf
13813  *   Shared action configuration.
13814  * @param[in] rss
13815  *   RSS action specification used to create shared action.
13816  * @param[out] error
13817  *   Perform verbose error reporting if not NULL. Initialized in case of
13818  *   error only.
13819  *
13820  * @return
13821  *   A valid shared action ID in case of success, 0 otherwise and
13822  *   rte_errno is set.
13823  */
13824 static uint32_t
13825 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
13826                             const struct rte_flow_indir_action_conf *conf,
13827                             const struct rte_flow_action_rss *rss,
13828                             struct rte_flow_error *error)
13829 {
13830         struct mlx5_priv *priv = dev->data->dev_private;
13831         struct mlx5_shared_action_rss *shared_rss = NULL;
13832         void *queue = NULL;
13833         struct rte_flow_action_rss *origin;
13834         const uint8_t *rss_key;
13835         uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
13836         uint32_t idx;
13837
13838         RTE_SET_USED(conf);
13839         queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
13840                             0, SOCKET_ID_ANY);
13841         shared_rss = mlx5_ipool_zmalloc
13842                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
13843         if (!shared_rss || !queue) {
13844                 rte_flow_error_set(error, ENOMEM,
13845                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13846                                    "cannot allocate resource memory");
13847                 goto error_rss_init;
13848         }
13849         if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
13850                 rte_flow_error_set(error, E2BIG,
13851                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13852                                    "rss action number out of range");
13853                 goto error_rss_init;
13854         }
13855         shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
13856                                           sizeof(*shared_rss->ind_tbl),
13857                                           0, SOCKET_ID_ANY);
13858         if (!shared_rss->ind_tbl) {
13859                 rte_flow_error_set(error, ENOMEM,
13860                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13861                                    "cannot allocate resource memory");
13862                 goto error_rss_init;
13863         }
13864         memcpy(queue, rss->queue, queue_size);
13865         shared_rss->ind_tbl->queues = queue;
13866         shared_rss->ind_tbl->queues_n = rss->queue_num;
13867         origin = &shared_rss->origin;
13868         origin->func = rss->func;
13869         origin->level = rss->level;
13870         /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
13871         origin->types = !rss->types ? ETH_RSS_IP : rss->types;
13872         /* NULL RSS key indicates default RSS key. */
13873         rss_key = !rss->key ? rss_hash_default_key : rss->key;
13874         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
13875         origin->key = &shared_rss->key[0];
13876         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
13877         origin->queue = queue;
13878         origin->queue_num = rss->queue_num;
13879         if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
13880                 goto error_rss_init;
13881         rte_spinlock_init(&shared_rss->action_rss_sl);
13882         __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
13883         rte_spinlock_lock(&priv->shared_act_sl);
13884         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
13885                      &priv->rss_shared_actions, idx, shared_rss, next);
13886         rte_spinlock_unlock(&priv->shared_act_sl);
13887         return idx;
13888 error_rss_init:
13889         if (shared_rss) {
13890                 if (shared_rss->ind_tbl)
13891                         mlx5_free(shared_rss->ind_tbl);
13892                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
13893                                 idx);
13894         }
13895         if (queue)
13896                 mlx5_free(queue);
13897         return 0;
13898 }
13899
13900 /**
13901  * Destroy the shared RSS action.
13902  * Release related hash RX queue objects.
13903  *
13904  * @param[in] dev
13905  *   Pointer to the Ethernet device structure.
13906  * @param[in] idx
13907  *   The shared RSS action object ID to be removed.
13908  * @param[out] error
13909  *   Perform verbose error reporting if not NULL. Initialized in case of
13910  *   error only.
13911  *
13912  * @return
13913  *   0 on success, otherwise negative errno value.
13914  */
13915 static int
13916 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
13917                              struct rte_flow_error *error)
13918 {
13919         struct mlx5_priv *priv = dev->data->dev_private;
13920         struct mlx5_shared_action_rss *shared_rss =
13921             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13922         uint32_t old_refcnt = 1;
13923         int remaining;
13924         uint16_t *queue = NULL;
13925
13926         if (!shared_rss)
13927                 return rte_flow_error_set(error, EINVAL,
13928                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
13929                                           "invalid shared action");
13930         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
13931         if (remaining)
13932                 return rte_flow_error_set(error, EBUSY,
13933                                           RTE_FLOW_ERROR_TYPE_ACTION,
13934                                           NULL,
13935                                           "shared rss hrxq has references");
13936         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
13937                                          0, 0, __ATOMIC_ACQUIRE,
13938                                          __ATOMIC_RELAXED))
13939                 return rte_flow_error_set(error, EBUSY,
13940                                           RTE_FLOW_ERROR_TYPE_ACTION,
13941                                           NULL,
13942                                           "shared rss has references");
13943         queue = shared_rss->ind_tbl->queues;
13944         remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
13945         if (remaining)
13946                 return rte_flow_error_set(error, EBUSY,
13947                                           RTE_FLOW_ERROR_TYPE_ACTION,
13948                                           NULL,
13949                                           "shared rss indirection table has"
13950                                           " references");
13951         mlx5_free(queue);
13952         rte_spinlock_lock(&priv->shared_act_sl);
13953         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
13954                      &priv->rss_shared_actions, idx, shared_rss, next);
13955         rte_spinlock_unlock(&priv->shared_act_sl);
13956         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
13957                         idx);
13958         return 0;
13959 }
13960
13961 /**
13962  * Create indirect action, lock free,
13963  * (mutex should be acquired by caller).
13964  * Dispatcher for action type specific call.
13965  *
13966  * @param[in] dev
13967  *   Pointer to the Ethernet device structure.
13968  * @param[in] conf
13969  *   Shared action configuration.
13970  * @param[in] action
13971  *   Action specification used to create indirect action.
13972  * @param[out] error
13973  *   Perform verbose error reporting if not NULL. Initialized in case of
13974  *   error only.
13975  *
13976  * @return
13977  *   A valid shared action handle in case of success, NULL otherwise and
13978  *   rte_errno is set.
13979  */
13980 static struct rte_flow_action_handle *
13981 flow_dv_action_create(struct rte_eth_dev *dev,
13982                       const struct rte_flow_indir_action_conf *conf,
13983                       const struct rte_flow_action *action,
13984                       struct rte_flow_error *err)
13985 {
13986         uint32_t idx = 0;
13987         uint32_t ret = 0;
13988
13989         switch (action->type) {
13990         case RTE_FLOW_ACTION_TYPE_RSS:
13991                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
13992                 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
13993                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
13994                 break;
13995         case RTE_FLOW_ACTION_TYPE_AGE:
13996                 ret = flow_dv_translate_create_aso_age(dev, action->conf, err);
13997                 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
13998                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
13999                 if (ret) {
14000                         struct mlx5_aso_age_action *aso_age =
14001                                               flow_aso_age_get_by_idx(dev, ret);
14002
14003                         if (!aso_age->age_params.context)
14004                                 aso_age->age_params.context =
14005                                                          (void *)(uintptr_t)idx;
14006                 }
14007                 break;
14008         case RTE_FLOW_ACTION_TYPE_COUNT:
14009                 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14010                 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14011                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14012                 break;
14013         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14014                 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14015                                                          err);
14016                 idx = (MLX5_INDIRECT_ACTION_TYPE_CT <<
14017                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14018                 break;
14019         default:
14020                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14021                                    NULL, "action type not supported");
14022                 break;
14023         }
14024         return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14025 }
14026
14027 /**
14028  * Destroy the indirect action.
14029  * Release action related resources on the NIC and the memory.
14030  * Lock free, (mutex should be acquired by caller).
14031  * Dispatcher for action type specific call.
14032  *
14033  * @param[in] dev
14034  *   Pointer to the Ethernet device structure.
14035  * @param[in] handle
14036  *   The indirect action object handle to be removed.
14037  * @param[out] error
14038  *   Perform verbose error reporting if not NULL. Initialized in case of
14039  *   error only.
14040  *
14041  * @return
14042  *   0 on success, otherwise negative errno value.
14043  */
14044 static int
14045 flow_dv_action_destroy(struct rte_eth_dev *dev,
14046                        struct rte_flow_action_handle *handle,
14047                        struct rte_flow_error *error)
14048 {
14049         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14050         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14051         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14052         struct mlx5_flow_counter *cnt;
14053         uint32_t no_flow_refcnt = 1;
14054         int ret;
14055
14056         switch (type) {
14057         case MLX5_INDIRECT_ACTION_TYPE_RSS:
14058                 return __flow_dv_action_rss_release(dev, idx, error);
14059         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14060                 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14061                 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14062                                                  &no_flow_refcnt, 1, false,
14063                                                  __ATOMIC_ACQUIRE,
14064                                                  __ATOMIC_RELAXED))
14065                         return rte_flow_error_set(error, EBUSY,
14066                                                   RTE_FLOW_ERROR_TYPE_ACTION,
14067                                                   NULL,
14068                                                   "Indirect count action has references");
14069                 flow_dv_counter_free(dev, idx);
14070                 return 0;
14071         case MLX5_INDIRECT_ACTION_TYPE_AGE:
14072                 ret = flow_dv_aso_age_release(dev, idx);
14073                 if (ret)
14074                         /*
14075                          * In this case, the last flow has a reference will
14076                          * actually release the age action.
14077                          */
14078                         DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14079                                 " released with references %d.", idx, ret);
14080                 return 0;
14081         case MLX5_INDIRECT_ACTION_TYPE_CT:
14082                 ret = flow_dv_aso_ct_release(dev, idx);
14083                 if (ret)
14084                         DRV_LOG(DEBUG, "Connection tracking object %u still "
14085                                 "has references %d.", idx, ret);
14086                 return 0;
14087         default:
14088                 return rte_flow_error_set(error, ENOTSUP,
14089                                           RTE_FLOW_ERROR_TYPE_ACTION,
14090                                           NULL,
14091                                           "action type not supported");
14092         }
14093 }
14094
14095 /**
14096  * Updates in place shared RSS action configuration.
14097  *
14098  * @param[in] dev
14099  *   Pointer to the Ethernet device structure.
14100  * @param[in] idx
14101  *   The shared RSS action object ID to be updated.
14102  * @param[in] action_conf
14103  *   RSS action specification used to modify *shared_rss*.
14104  * @param[out] error
14105  *   Perform verbose error reporting if not NULL. Initialized in case of
14106  *   error only.
14107  *
14108  * @return
14109  *   0 on success, otherwise negative errno value.
14110  * @note: currently only support update of RSS queues.
14111  */
14112 static int
14113 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14114                             const struct rte_flow_action_rss *action_conf,
14115                             struct rte_flow_error *error)
14116 {
14117         struct mlx5_priv *priv = dev->data->dev_private;
14118         struct mlx5_shared_action_rss *shared_rss =
14119             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14120         int ret = 0;
14121         void *queue = NULL;
14122         uint16_t *queue_old = NULL;
14123         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
14124
14125         if (!shared_rss)
14126                 return rte_flow_error_set(error, EINVAL,
14127                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14128                                           "invalid shared action to update");
14129         if (priv->obj_ops.ind_table_modify == NULL)
14130                 return rte_flow_error_set(error, ENOTSUP,
14131                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14132                                           "cannot modify indirection table");
14133         queue = mlx5_malloc(MLX5_MEM_ZERO,
14134                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14135                             0, SOCKET_ID_ANY);
14136         if (!queue)
14137                 return rte_flow_error_set(error, ENOMEM,
14138                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14139                                           NULL,
14140                                           "cannot allocate resource memory");
14141         memcpy(queue, action_conf->queue, queue_size);
14142         MLX5_ASSERT(shared_rss->ind_tbl);
14143         rte_spinlock_lock(&shared_rss->action_rss_sl);
14144         queue_old = shared_rss->ind_tbl->queues;
14145         ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
14146                                         queue, action_conf->queue_num, true);
14147         if (ret) {
14148                 mlx5_free(queue);
14149                 ret = rte_flow_error_set(error, rte_errno,
14150                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14151                                           "cannot update indirection table");
14152         } else {
14153                 mlx5_free(queue_old);
14154                 shared_rss->origin.queue = queue;
14155                 shared_rss->origin.queue_num = action_conf->queue_num;
14156         }
14157         rte_spinlock_unlock(&shared_rss->action_rss_sl);
14158         return ret;
14159 }
14160
14161 /**
14162  * Updates in place shared action configuration, lock free,
14163  * (mutex should be acquired by caller).
14164  *
14165  * @param[in] dev
14166  *   Pointer to the Ethernet device structure.
14167  * @param[in] handle
14168  *   The indirect action object handle to be updated.
14169  * @param[in] update
14170  *   Action specification used to modify the action pointed by *handle*.
14171  *   *update* could be of same type with the action pointed by the *handle*
14172  *   handle argument, or some other structures like a wrapper, depending on
14173  *   the indirect action type.
14174  * @param[out] error
14175  *   Perform verbose error reporting if not NULL. Initialized in case of
14176  *   error only.
14177  *
14178  * @return
14179  *   0 on success, otherwise negative errno value.
14180  */
14181 static int
14182 flow_dv_action_update(struct rte_eth_dev *dev,
14183                         struct rte_flow_action_handle *handle,
14184                         const void *update,
14185                         struct rte_flow_error *err)
14186 {
14187         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14188         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14189         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14190         const void *action_conf;
14191
14192         switch (type) {
14193         case MLX5_INDIRECT_ACTION_TYPE_RSS:
14194                 action_conf = ((const struct rte_flow_action *)update)->conf;
14195                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
14196         default:
14197                 return rte_flow_error_set(err, ENOTSUP,
14198                                           RTE_FLOW_ERROR_TYPE_ACTION,
14199                                           NULL,
14200                                           "action type update not supported");
14201         }
14202 }
14203
14204 /**
14205  * Destroy the meter sub policy table rules.
14206  * Lock free, (mutex should be acquired by caller).
14207  *
14208  * @param[in] dev
14209  *   Pointer to Ethernet device.
14210  * @param[in] sub_policy
14211  *   Pointer to meter sub policy table.
14212  */
14213 static void
14214 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
14215                              struct mlx5_flow_meter_sub_policy *sub_policy)
14216 {
14217         struct mlx5_flow_tbl_data_entry *tbl;
14218         int i;
14219
14220         for (i = 0; i < RTE_COLORS; i++) {
14221                 if (sub_policy->color_rule[i]) {
14222                         claim_zero(mlx5_flow_os_destroy_flow
14223                                 (sub_policy->color_rule[i]));
14224                         sub_policy->color_rule[i] = NULL;
14225                 }
14226                 if (sub_policy->color_matcher[i]) {
14227                         tbl = container_of(sub_policy->color_matcher[i]->tbl,
14228                                 typeof(*tbl), tbl);
14229                         mlx5_cache_unregister(&tbl->matchers,
14230                                       &sub_policy->color_matcher[i]->entry);
14231                         sub_policy->color_matcher[i] = NULL;
14232                 }
14233         }
14234         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
14235                 if (sub_policy->rix_hrxq[i]) {
14236                         mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
14237                         sub_policy->rix_hrxq[i] = 0;
14238                 }
14239                 if (sub_policy->jump_tbl[i]) {
14240                         flow_dv_tbl_resource_release(MLX5_SH(dev),
14241                         sub_policy->jump_tbl[i]);
14242                         sub_policy->jump_tbl[i] = NULL;
14243                 }
14244         }
14245         if (sub_policy->tbl_rsc) {
14246                 flow_dv_tbl_resource_release(MLX5_SH(dev),
14247                         sub_policy->tbl_rsc);
14248                 sub_policy->tbl_rsc = NULL;
14249         }
14250 }
14251
14252 /**
14253  * Destroy policy rules, lock free,
14254  * (mutex should be acquired by caller).
14255  * Dispatcher for action type specific call.
14256  *
14257  * @param[in] dev
14258  *   Pointer to the Ethernet device structure.
14259  * @param[in] mtr_policy
14260  *   Meter policy struct.
14261  */
14262 static void
14263 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
14264                       struct mlx5_flow_meter_policy *mtr_policy)
14265 {
14266         uint32_t i, j;
14267         struct mlx5_flow_meter_sub_policy *sub_policy;
14268         uint16_t sub_policy_num;
14269
14270         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
14271                 sub_policy_num = (mtr_policy->sub_policy_num >>
14272                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
14273                         MLX5_MTR_SUB_POLICY_NUM_MASK;
14274                 for (j = 0; j < sub_policy_num; j++) {
14275                         sub_policy = mtr_policy->sub_policys[i][j];
14276                         if (sub_policy)
14277                                 __flow_dv_destroy_sub_policy_rules
14278                                                 (dev, sub_policy);
14279                 }
14280         }
14281 }
14282
14283 /**
14284  * Destroy policy action, lock free,
14285  * (mutex should be acquired by caller).
14286  * Dispatcher for action type specific call.
14287  *
14288  * @param[in] dev
14289  *   Pointer to the Ethernet device structure.
14290  * @param[in] mtr_policy
14291  *   Meter policy struct.
14292  */
14293 static void
14294 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
14295                       struct mlx5_flow_meter_policy *mtr_policy)
14296 {
14297         struct rte_flow_action *rss_action;
14298         struct mlx5_flow_handle dev_handle;
14299         uint32_t i, j;
14300
14301         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
14302                 if (mtr_policy->act_cnt[i].rix_mark) {
14303                         flow_dv_tag_release(dev,
14304                                 mtr_policy->act_cnt[i].rix_mark);
14305                         mtr_policy->act_cnt[i].rix_mark = 0;
14306                 }
14307                 if (mtr_policy->act_cnt[i].modify_hdr) {
14308                         dev_handle.dvh.modify_hdr =
14309                                 mtr_policy->act_cnt[i].modify_hdr;
14310                         flow_dv_modify_hdr_resource_release(dev, &dev_handle);
14311                 }
14312                 switch (mtr_policy->act_cnt[i].fate_action) {
14313                 case MLX5_FLOW_FATE_SHARED_RSS:
14314                         rss_action = mtr_policy->act_cnt[i].rss;
14315                         mlx5_free(rss_action);
14316                         break;
14317                 case MLX5_FLOW_FATE_PORT_ID:
14318                         if (mtr_policy->act_cnt[i].rix_port_id_action) {
14319                                 flow_dv_port_id_action_resource_release(dev,
14320                                 mtr_policy->act_cnt[i].rix_port_id_action);
14321                                 mtr_policy->act_cnt[i].rix_port_id_action = 0;
14322                         }
14323                         break;
14324                 case MLX5_FLOW_FATE_DROP:
14325                 case MLX5_FLOW_FATE_JUMP:
14326                         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
14327                                 mtr_policy->act_cnt[i].dr_jump_action[j] =
14328                                                 NULL;
14329                         break;
14330                 default:
14331                         /*Queue action do nothing*/
14332                         break;
14333                 }
14334         }
14335         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
14336                 mtr_policy->dr_drop_action[j] = NULL;
14337 }
14338
14339 /**
14340  * Create policy action per domain, lock free,
14341  * (mutex should be acquired by caller).
14342  * Dispatcher for action type specific call.
14343  *
14344  * @param[in] dev
14345  *   Pointer to the Ethernet device structure.
14346  * @param[in] mtr_policy
14347  *   Meter policy struct.
14348  * @param[in] action
14349  *   Action specification used to create meter actions.
14350  * @param[out] error
14351  *   Perform verbose error reporting if not NULL. Initialized in case of
14352  *   error only.
14353  *
14354  * @return
14355  *   0 on success, otherwise negative errno value.
14356  */
14357 static int
14358 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
14359                         struct mlx5_flow_meter_policy *mtr_policy,
14360                         const struct rte_flow_action *actions[RTE_COLORS],
14361                         enum mlx5_meter_domain domain,
14362                         struct rte_mtr_error *error)
14363 {
14364         struct mlx5_priv *priv = dev->data->dev_private;
14365         struct rte_flow_error flow_err;
14366         const struct rte_flow_action *act;
14367         uint64_t action_flags = 0;
14368         struct mlx5_flow_handle dh;
14369         struct mlx5_flow dev_flow;
14370         struct mlx5_flow_dv_port_id_action_resource port_id_action;
14371         int i, ret;
14372         uint8_t egress, transfer;
14373         struct mlx5_meter_policy_action_container *act_cnt = NULL;
14374         union {
14375                 struct mlx5_flow_dv_modify_hdr_resource res;
14376                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
14377                             sizeof(struct mlx5_modification_cmd) *
14378                             (MLX5_MAX_MODIFY_NUM + 1)];
14379         } mhdr_dummy;
14380
14381         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
14382         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
14383         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
14384         memset(&dev_flow, 0, sizeof(struct mlx5_flow));
14385         memset(&port_id_action, 0,
14386                 sizeof(struct mlx5_flow_dv_port_id_action_resource));
14387         dev_flow.handle = &dh;
14388         dev_flow.dv.port_id_action = &port_id_action;
14389         dev_flow.external = true;
14390         for (i = 0; i < RTE_COLORS; i++) {
14391                 if (i < MLX5_MTR_RTE_COLORS)
14392                         act_cnt = &mtr_policy->act_cnt[i];
14393                 for (act = actions[i];
14394                         act && act->type != RTE_FLOW_ACTION_TYPE_END;
14395                         act++) {
14396                         switch (act->type) {
14397                         case RTE_FLOW_ACTION_TYPE_MARK:
14398                         {
14399                                 uint32_t tag_be = mlx5_flow_mark_set
14400                                         (((const struct rte_flow_action_mark *)
14401                                         (act->conf))->id);
14402
14403                                 if (i >= MLX5_MTR_RTE_COLORS)
14404                                         return -rte_mtr_error_set(error,
14405                                           ENOTSUP,
14406                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14407                                           NULL,
14408                                           "cannot create policy "
14409                                           "mark action for this color");
14410                                 dev_flow.handle->mark = 1;
14411                                 if (flow_dv_tag_resource_register(dev, tag_be,
14412                                                   &dev_flow, &flow_err))
14413                                         return -rte_mtr_error_set(error,
14414                                         ENOTSUP,
14415                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14416                                         NULL,
14417                                         "cannot setup policy mark action");
14418                                 MLX5_ASSERT(dev_flow.dv.tag_resource);
14419                                 act_cnt->rix_mark =
14420                                         dev_flow.handle->dvh.rix_tag;
14421                                 if (action_flags & MLX5_FLOW_ACTION_QUEUE) {
14422                                         dev_flow.handle->rix_hrxq =
14423                         mtr_policy->sub_policys[domain][0]->rix_hrxq[i];
14424                                         flow_drv_rxq_flags_set(dev,
14425                                                 dev_flow.handle);
14426                                 }
14427                                 action_flags |= MLX5_FLOW_ACTION_MARK;
14428                                 break;
14429                         }
14430                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
14431                         {
14432                                 struct mlx5_flow_dv_modify_hdr_resource
14433                                         *mhdr_res = &mhdr_dummy.res;
14434
14435                                 if (i >= MLX5_MTR_RTE_COLORS)
14436                                         return -rte_mtr_error_set(error,
14437                                           ENOTSUP,
14438                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14439                                           NULL,
14440                                           "cannot create policy "
14441                                           "set tag action for this color");
14442                                 memset(mhdr_res, 0, sizeof(*mhdr_res));
14443                                 mhdr_res->ft_type = transfer ?
14444                                         MLX5DV_FLOW_TABLE_TYPE_FDB :
14445                                         egress ?
14446                                         MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
14447                                         MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
14448                                 if (flow_dv_convert_action_set_tag
14449                                 (dev, mhdr_res,
14450                                 (const struct rte_flow_action_set_tag *)
14451                                 act->conf,  &flow_err))
14452                                         return -rte_mtr_error_set(error,
14453                                         ENOTSUP,
14454                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14455                                         NULL, "cannot convert policy "
14456                                         "set tag action");
14457                                 if (!mhdr_res->actions_num)
14458                                         return -rte_mtr_error_set(error,
14459                                         ENOTSUP,
14460                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14461                                         NULL, "cannot find policy "
14462                                         "set tag action");
14463                                 /* create modify action if needed. */
14464                                 dev_flow.dv.group = 1;
14465                                 if (flow_dv_modify_hdr_resource_register
14466                                         (dev, mhdr_res, &dev_flow, &flow_err))
14467                                         return -rte_mtr_error_set(error,
14468                                         ENOTSUP,
14469                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14470                                         NULL, "cannot register policy "
14471                                         "set tag action");
14472                                 act_cnt->modify_hdr =
14473                                 dev_flow.handle->dvh.modify_hdr;
14474                                 if (action_flags & MLX5_FLOW_ACTION_QUEUE) {
14475                                         dev_flow.handle->rix_hrxq =
14476                                 mtr_policy->sub_policys[domain][0]->rix_hrxq[i];
14477                                         flow_drv_rxq_flags_set(dev,
14478                                                 dev_flow.handle);
14479                                 }
14480                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
14481                                 break;
14482                         }
14483                         case RTE_FLOW_ACTION_TYPE_DROP:
14484                         {
14485                                 struct mlx5_flow_mtr_mng *mtrmng =
14486                                                 priv->sh->mtrmng;
14487                                 struct mlx5_flow_tbl_data_entry *tbl_data;
14488
14489                                 /*
14490                                  * Create the drop table with
14491                                  * METER DROP level.
14492                                  */
14493                                 if (!mtrmng->drop_tbl[domain]) {
14494                                         mtrmng->drop_tbl[domain] =
14495                                         flow_dv_tbl_resource_get(dev,
14496                                         MLX5_FLOW_TABLE_LEVEL_METER,
14497                                         egress, transfer, false, NULL, 0,
14498                                         0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
14499                                         if (!mtrmng->drop_tbl[domain])
14500                                                 return -rte_mtr_error_set
14501                                         (error, ENOTSUP,
14502                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14503                                         NULL,
14504                                         "Failed to create meter drop table");
14505                                 }
14506                                 tbl_data = container_of
14507                                 (mtrmng->drop_tbl[domain],
14508                                 struct mlx5_flow_tbl_data_entry, tbl);
14509                                 if (i < MLX5_MTR_RTE_COLORS) {
14510                                         act_cnt->dr_jump_action[domain] =
14511                                                 tbl_data->jump.action;
14512                                         act_cnt->fate_action =
14513                                                 MLX5_FLOW_FATE_DROP;
14514                                 }
14515                                 if (i == RTE_COLOR_RED)
14516                                         mtr_policy->dr_drop_action[domain] =
14517                                                 tbl_data->jump.action;
14518                                 action_flags |= MLX5_FLOW_ACTION_DROP;
14519                                 break;
14520                         }
14521                         case RTE_FLOW_ACTION_TYPE_QUEUE:
14522                         {
14523                                 struct mlx5_hrxq *hrxq;
14524                                 uint32_t hrxq_idx;
14525                                 struct mlx5_flow_rss_desc rss_desc;
14526                                 struct mlx5_flow_meter_sub_policy *sub_policy =
14527                                 mtr_policy->sub_policys[domain][0];
14528
14529                                 if (i >= MLX5_MTR_RTE_COLORS)
14530                                         return -rte_mtr_error_set(error,
14531                                         ENOTSUP,
14532                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14533                                         NULL, "cannot create policy "
14534                                         "fate queue for this color");
14535                                 memset(&rss_desc, 0,
14536                                         sizeof(struct mlx5_flow_rss_desc));
14537                                 rss_desc.queue_num = 1;
14538                                 rss_desc.const_q = act->conf;
14539                                 hrxq = flow_dv_hrxq_prepare(dev, &dev_flow,
14540                                                     &rss_desc, &hrxq_idx);
14541                                 if (!hrxq)
14542                                         return -rte_mtr_error_set(error,
14543                                         ENOTSUP,
14544                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14545                                         NULL,
14546                                         "cannot create policy fate queue");
14547                                 sub_policy->rix_hrxq[i] = hrxq_idx;
14548                                 act_cnt->fate_action =
14549                                         MLX5_FLOW_FATE_QUEUE;
14550                                 dev_flow.handle->fate_action =
14551                                         MLX5_FLOW_FATE_QUEUE;
14552                                 if (action_flags & MLX5_FLOW_ACTION_MARK ||
14553                                     action_flags & MLX5_FLOW_ACTION_SET_TAG) {
14554                                         dev_flow.handle->rix_hrxq = hrxq_idx;
14555                                         flow_drv_rxq_flags_set(dev,
14556                                                 dev_flow.handle);
14557                                 }
14558                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
14559                                 break;
14560                         }
14561                         case RTE_FLOW_ACTION_TYPE_RSS:
14562                         {
14563                                 int rss_size;
14564
14565                                 if (i >= MLX5_MTR_RTE_COLORS)
14566                                         return -rte_mtr_error_set(error,
14567                                           ENOTSUP,
14568                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14569                                           NULL,
14570                                           "cannot create policy "
14571                                           "rss action for this color");
14572                                 /*
14573                                  * Save RSS conf into policy struct
14574                                  * for translate stage.
14575                                  */
14576                                 rss_size = (int)rte_flow_conv
14577                                         (RTE_FLOW_CONV_OP_ACTION,
14578                                         NULL, 0, act, &flow_err);
14579                                 if (rss_size <= 0)
14580                                         return -rte_mtr_error_set(error,
14581                                           ENOTSUP,
14582                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14583                                           NULL, "Get the wrong "
14584                                           "rss action struct size");
14585                                 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
14586                                                 rss_size, 0, SOCKET_ID_ANY);
14587                                 if (!act_cnt->rss)
14588                                         return -rte_mtr_error_set(error,
14589                                           ENOTSUP,
14590                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14591                                           NULL,
14592                                           "Fail to malloc rss action memory");
14593                                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
14594                                         act_cnt->rss, rss_size,
14595                                         act, &flow_err);
14596                                 if (ret < 0)
14597                                         return -rte_mtr_error_set(error,
14598                                           ENOTSUP,
14599                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14600                                           NULL, "Fail to save "
14601                                           "rss action into policy struct");
14602                                 act_cnt->fate_action =
14603                                         MLX5_FLOW_FATE_SHARED_RSS;
14604                                 action_flags |= MLX5_FLOW_ACTION_RSS;
14605                                 break;
14606                         }
14607                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
14608                         {
14609                                 struct mlx5_flow_dv_port_id_action_resource
14610                                         port_id_resource;
14611                                 uint32_t port_id = 0;
14612
14613                                 if (i >= MLX5_MTR_RTE_COLORS)
14614                                         return -rte_mtr_error_set(error,
14615                                         ENOTSUP,
14616                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14617                                         NULL, "cannot create policy "
14618                                         "port action for this color");
14619                                 memset(&port_id_resource, 0,
14620                                         sizeof(port_id_resource));
14621                                 if (flow_dv_translate_action_port_id(dev, act,
14622                                                 &port_id, &flow_err))
14623                                         return -rte_mtr_error_set(error,
14624                                         ENOTSUP,
14625                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14626                                         NULL, "cannot translate "
14627                                         "policy port action");
14628                                 port_id_resource.port_id = port_id;
14629                                 if (flow_dv_port_id_action_resource_register
14630                                         (dev, &port_id_resource,
14631                                         &dev_flow, &flow_err))
14632                                         return -rte_mtr_error_set(error,
14633                                         ENOTSUP,
14634                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14635                                         NULL, "cannot setup "
14636                                         "policy port action");
14637                                 act_cnt->rix_port_id_action =
14638                                         dev_flow.handle->rix_port_id_action;
14639                                 act_cnt->fate_action =
14640                                         MLX5_FLOW_FATE_PORT_ID;
14641                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
14642                                 break;
14643                         }
14644                         case RTE_FLOW_ACTION_TYPE_JUMP:
14645                         {
14646                                 uint32_t jump_group = 0;
14647                                 uint32_t table = 0;
14648                                 struct mlx5_flow_tbl_data_entry *tbl_data;
14649                                 struct flow_grp_info grp_info = {
14650                                         .external = !!dev_flow.external,
14651                                         .transfer = !!transfer,
14652                                         .fdb_def_rule = !!priv->fdb_def_rule,
14653                                         .std_tbl_fix = 0,
14654                                         .skip_scale = dev_flow.skip_scale &
14655                                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
14656                                 };
14657                                 struct mlx5_flow_meter_sub_policy *sub_policy =
14658                                 mtr_policy->sub_policys[domain][0];
14659
14660                                 if (i >= MLX5_MTR_RTE_COLORS)
14661                                         return -rte_mtr_error_set(error,
14662                                           ENOTSUP,
14663                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14664                                           NULL,
14665                                           "cannot create policy "
14666                                           "jump action for this color");
14667                                 jump_group =
14668                                 ((const struct rte_flow_action_jump *)
14669                                                         act->conf)->group;
14670                                 if (mlx5_flow_group_to_table(dev, NULL,
14671                                                        jump_group,
14672                                                        &table,
14673                                                        &grp_info, &flow_err))
14674                                         return -rte_mtr_error_set(error,
14675                                         ENOTSUP,
14676                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14677                                         NULL, "cannot setup "
14678                                         "policy jump action");
14679                                 sub_policy->jump_tbl[i] =
14680                                 flow_dv_tbl_resource_get(dev,
14681                                         table, egress,
14682                                         transfer,
14683                                         !!dev_flow.external,
14684                                         NULL, jump_group, 0,
14685                                         0, &flow_err);
14686                                 if
14687                                 (!sub_policy->jump_tbl[i])
14688                                         return  -rte_mtr_error_set(error,
14689                                         ENOTSUP,
14690                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
14691                                         NULL, "cannot create jump action.");
14692                                 tbl_data = container_of
14693                                 (sub_policy->jump_tbl[i],
14694                                 struct mlx5_flow_tbl_data_entry, tbl);
14695                                 act_cnt->dr_jump_action[domain] =
14696                                         tbl_data->jump.action;
14697                                 act_cnt->fate_action =
14698                                         MLX5_FLOW_FATE_JUMP;
14699                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
14700                                 break;
14701                         }
14702                         default:
14703                                 return -rte_mtr_error_set(error, ENOTSUP,
14704                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
14705                                           NULL, "action type not supported");
14706                         }
14707                 }
14708         }
14709         return 0;
14710 }
14711
14712 /**
14713  * Create policy action per domain, lock free,
14714  * (mutex should be acquired by caller).
14715  * Dispatcher for action type specific call.
14716  *
14717  * @param[in] dev
14718  *   Pointer to the Ethernet device structure.
14719  * @param[in] mtr_policy
14720  *   Meter policy struct.
14721  * @param[in] action
14722  *   Action specification used to create meter actions.
14723  * @param[out] error
14724  *   Perform verbose error reporting if not NULL. Initialized in case of
14725  *   error only.
14726  *
14727  * @return
14728  *   0 on success, otherwise negative errno value.
14729  */
14730 static int
14731 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
14732                       struct mlx5_flow_meter_policy *mtr_policy,
14733                       const struct rte_flow_action *actions[RTE_COLORS],
14734                       struct rte_mtr_error *error)
14735 {
14736         int ret, i;
14737         uint16_t sub_policy_num;
14738
14739         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
14740                 sub_policy_num = (mtr_policy->sub_policy_num >>
14741                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
14742                         MLX5_MTR_SUB_POLICY_NUM_MASK;
14743                 if (sub_policy_num) {
14744                         ret = __flow_dv_create_domain_policy_acts(dev,
14745                                 mtr_policy, actions,
14746                                 (enum mlx5_meter_domain)i, error);
14747                         if (ret)
14748                                 return ret;
14749                 }
14750         }
14751         return 0;
14752 }
14753
14754 /**
14755  * Query a DV flow rule for its statistics via DevX.
14756  *
14757  * @param[in] dev
14758  *   Pointer to Ethernet device.
14759  * @param[in] cnt_idx
14760  *   Index to the flow counter.
14761  * @param[out] data
14762  *   Data retrieved by the query.
14763  * @param[out] error
14764  *   Perform verbose error reporting if not NULL.
14765  *
14766  * @return
14767  *   0 on success, a negative errno value otherwise and rte_errno is set.
14768  */
14769 static int
14770 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
14771                     struct rte_flow_error *error)
14772 {
14773         struct mlx5_priv *priv = dev->data->dev_private;
14774         struct rte_flow_query_count *qc = data;
14775
14776         if (!priv->config.devx)
14777                 return rte_flow_error_set(error, ENOTSUP,
14778                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14779                                           NULL,
14780                                           "counters are not supported");
14781         if (cnt_idx) {
14782                 uint64_t pkts, bytes;
14783                 struct mlx5_flow_counter *cnt;
14784                 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
14785
14786                 if (err)
14787                         return rte_flow_error_set(error, -err,
14788                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14789                                         NULL, "cannot read counters");
14790                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
14791                 qc->hits_set = 1;
14792                 qc->bytes_set = 1;
14793                 qc->hits = pkts - cnt->hits;
14794                 qc->bytes = bytes - cnt->bytes;
14795                 if (qc->reset) {
14796                         cnt->hits = pkts;
14797                         cnt->bytes = bytes;
14798                 }
14799                 return 0;
14800         }
14801         return rte_flow_error_set(error, EINVAL,
14802                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14803                                   NULL,
14804                                   "counters are not available");
14805 }
14806
14807 static int
14808 flow_dv_action_query(struct rte_eth_dev *dev,
14809                      const struct rte_flow_action_handle *handle, void *data,
14810                      struct rte_flow_error *error)
14811 {
14812         struct mlx5_age_param *age_param;
14813         struct rte_flow_query_age *resp;
14814         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14815         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14816         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14817         struct mlx5_priv *priv = dev->data->dev_private;
14818         struct mlx5_aso_ct_action *ct;
14819
14820         switch (type) {
14821         case MLX5_INDIRECT_ACTION_TYPE_AGE:
14822                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
14823                 resp = data;
14824                 resp->aged = __atomic_load_n(&age_param->state,
14825                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
14826                                                                           1 : 0;
14827                 resp->sec_since_last_hit_valid = !resp->aged;
14828                 if (resp->sec_since_last_hit_valid)
14829                         resp->sec_since_last_hit = __atomic_load_n
14830                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
14831                 return 0;
14832         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14833                 return flow_dv_query_count(dev, idx, data, error);
14834         case MLX5_INDIRECT_ACTION_TYPE_CT:
14835                 ct = flow_aso_ct_get_by_idx(dev, idx);
14836                 if (!ct->refcnt)
14837                         return rte_flow_error_set(error, EFAULT,
14838                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14839                                         NULL,
14840                                         "CT object is inactive");
14841                 ((struct rte_flow_action_conntrack *)data)->peer_port =
14842                                                         ct->peer;
14843                 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
14844                                                         ct->is_original;
14845                 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
14846                         return rte_flow_error_set(error, EIO,
14847                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14848                                         NULL,
14849                                         "Failed to query CT context");
14850                 return 0;
14851         default:
14852                 return rte_flow_error_set(error, ENOTSUP,
14853                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14854                                           "action type query not supported");
14855         }
14856 }
14857
14858 /**
14859  * Query a flow rule AGE action for aging information.
14860  *
14861  * @param[in] dev
14862  *   Pointer to Ethernet device.
14863  * @param[in] flow
14864  *   Pointer to the sub flow.
14865  * @param[out] data
14866  *   data retrieved by the query.
14867  * @param[out] error
14868  *   Perform verbose error reporting if not NULL.
14869  *
14870  * @return
14871  *   0 on success, a negative errno value otherwise and rte_errno is set.
14872  */
14873 static int
14874 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
14875                   void *data, struct rte_flow_error *error)
14876 {
14877         struct rte_flow_query_age *resp = data;
14878         struct mlx5_age_param *age_param;
14879
14880         if (flow->age) {
14881                 struct mlx5_aso_age_action *act =
14882                                      flow_aso_age_get_by_idx(dev, flow->age);
14883
14884                 age_param = &act->age_params;
14885         } else if (flow->counter) {
14886                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
14887
14888                 if (!age_param || !age_param->timeout)
14889                         return rte_flow_error_set
14890                                         (error, EINVAL,
14891                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14892                                          NULL, "cannot read age data");
14893         } else {
14894                 return rte_flow_error_set(error, EINVAL,
14895                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14896                                           NULL, "age data not available");
14897         }
14898         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
14899                                      AGE_TMOUT ? 1 : 0;
14900         resp->sec_since_last_hit_valid = !resp->aged;
14901         if (resp->sec_since_last_hit_valid)
14902                 resp->sec_since_last_hit = __atomic_load_n
14903                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
14904         return 0;
14905 }
14906
14907 /**
14908  * Query a flow.
14909  *
14910  * @see rte_flow_query()
14911  * @see rte_flow_ops
14912  */
14913 static int
14914 flow_dv_query(struct rte_eth_dev *dev,
14915               struct rte_flow *flow __rte_unused,
14916               const struct rte_flow_action *actions __rte_unused,
14917               void *data __rte_unused,
14918               struct rte_flow_error *error __rte_unused)
14919 {
14920         int ret = -EINVAL;
14921
14922         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
14923                 switch (actions->type) {
14924                 case RTE_FLOW_ACTION_TYPE_VOID:
14925                         break;
14926                 case RTE_FLOW_ACTION_TYPE_COUNT:
14927                         ret = flow_dv_query_count(dev, flow->counter, data,
14928                                                   error);
14929                         break;
14930                 case RTE_FLOW_ACTION_TYPE_AGE:
14931                         ret = flow_dv_query_age(dev, flow, data, error);
14932                         break;
14933                 default:
14934                         return rte_flow_error_set(error, ENOTSUP,
14935                                                   RTE_FLOW_ERROR_TYPE_ACTION,
14936                                                   actions,
14937                                                   "action not supported");
14938                 }
14939         }
14940         return ret;
14941 }
14942
14943 /**
14944  * Destroy the meter table set.
14945  * Lock free, (mutex should be acquired by caller).
14946  *
14947  * @param[in] dev
14948  *   Pointer to Ethernet device.
14949  * @param[in] fm
14950  *   Meter information table.
14951  */
14952 static void
14953 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
14954                         struct mlx5_flow_meter_info *fm)
14955 {
14956         struct mlx5_priv *priv = dev->data->dev_private;
14957         int i;
14958
14959         if (!fm || !priv->config.dv_flow_en)
14960                 return;
14961         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
14962                 if (fm->drop_rule[i]) {
14963                         claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
14964                         fm->drop_rule[i] = NULL;
14965                 }
14966         }
14967 }
14968
14969 static void
14970 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
14971 {
14972         struct mlx5_priv *priv = dev->data->dev_private;
14973         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
14974         struct mlx5_flow_tbl_data_entry *tbl;
14975         int i, j;
14976
14977         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
14978                 if (mtrmng->def_rule[i]) {
14979                         claim_zero(mlx5_flow_os_destroy_flow
14980                                         (mtrmng->def_rule[i]));
14981                         mtrmng->def_rule[i] = NULL;
14982                 }
14983                 if (mtrmng->def_matcher[i]) {
14984                         tbl = container_of(mtrmng->def_matcher[i]->tbl,
14985                                 struct mlx5_flow_tbl_data_entry, tbl);
14986                         mlx5_cache_unregister(&tbl->matchers,
14987                                       &mtrmng->def_matcher[i]->entry);
14988                         mtrmng->def_matcher[i] = NULL;
14989                 }
14990                 for (j = 0; j < MLX5_REG_BITS; j++) {
14991                         if (mtrmng->drop_matcher[i][j]) {
14992                                 tbl =
14993                                 container_of(mtrmng->drop_matcher[i][j]->tbl,
14994                                              struct mlx5_flow_tbl_data_entry,
14995                                              tbl);
14996                                 mlx5_cache_unregister(&tbl->matchers,
14997                                         &mtrmng->drop_matcher[i][j]->entry);
14998                                 mtrmng->drop_matcher[i][j] = NULL;
14999                         }
15000                 }
15001                 if (mtrmng->drop_tbl[i]) {
15002                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15003                                 mtrmng->drop_tbl[i]);
15004                         mtrmng->drop_tbl[i] = NULL;
15005                 }
15006         }
15007 }
15008
15009 /* Number of meter flow actions, count and jump or count and drop. */
15010 #define METER_ACTIONS 2
15011
15012 static void
15013 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
15014                               enum mlx5_meter_domain domain)
15015 {
15016         struct mlx5_priv *priv = dev->data->dev_private;
15017         struct mlx5_flow_meter_def_policy *def_policy =
15018                         priv->sh->mtrmng->def_policy[domain];
15019
15020         __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
15021         mlx5_free(def_policy);
15022         priv->sh->mtrmng->def_policy[domain] = NULL;
15023 }
15024
15025 /**
15026  * Destroy the default policy table set.
15027  *
15028  * @param[in] dev
15029  *   Pointer to Ethernet device.
15030  */
15031 static void
15032 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
15033 {
15034         struct mlx5_priv *priv = dev->data->dev_private;
15035         int i;
15036
15037         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
15038                 if (priv->sh->mtrmng->def_policy[i])
15039                         __flow_dv_destroy_domain_def_policy(dev,
15040                                         (enum mlx5_meter_domain)i);
15041         priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
15042 }
15043
15044 static int
15045 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
15046                         uint32_t color_reg_c_idx,
15047                         enum rte_color color, void *matcher_object,
15048                         int actions_n, void *actions,
15049                         bool is_default_policy, void **rule,
15050                         const struct rte_flow_attr *attr)
15051 {
15052         int ret;
15053         struct mlx5_flow_dv_match_params value = {
15054                 .size = sizeof(value.buf) -
15055                         MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15056         };
15057         struct mlx5_flow_dv_match_params matcher = {
15058                 .size = sizeof(matcher.buf) -
15059                         MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15060         };
15061         struct mlx5_priv *priv = dev->data->dev_private;
15062
15063         if (!is_default_policy && (priv->representor || priv->master)) {
15064                 if (flow_dv_translate_item_port_id(dev, matcher.buf,
15065                                                    value.buf, NULL, attr)) {
15066                         DRV_LOG(ERR,
15067                         "Failed to create meter policy flow with port.");
15068                         return -1;
15069                 }
15070         }
15071         flow_dv_match_meta_reg(matcher.buf, value.buf,
15072                                 (enum modify_reg)color_reg_c_idx,
15073                                 rte_col_2_mlx5_col(color),
15074                                 UINT32_MAX);
15075         ret = mlx5_flow_os_create_flow(matcher_object,
15076                         (void *)&value, actions_n, actions, rule);
15077         if (ret) {
15078                 DRV_LOG(ERR, "Failed to create meter policy flow.");
15079                 return -1;
15080         }
15081         return 0;
15082 }
15083
15084 static int
15085 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
15086                         uint32_t color_reg_c_idx,
15087                         uint16_t priority,
15088                         struct mlx5_flow_meter_sub_policy *sub_policy,
15089                         const struct rte_flow_attr *attr,
15090                         bool is_default_policy,
15091                         struct rte_flow_error *error)
15092 {
15093         struct mlx5_cache_entry *entry;
15094         struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
15095         struct mlx5_flow_dv_matcher matcher = {
15096                 .mask = {
15097                         .size = sizeof(matcher.mask.buf) -
15098                                 MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15099                 },
15100                 .tbl = tbl_rsc,
15101         };
15102         struct mlx5_flow_dv_match_params value = {
15103                 .size = sizeof(value.buf) -
15104                         MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15105         };
15106         struct mlx5_flow_cb_ctx ctx = {
15107                 .error = error,
15108                 .data = &matcher,
15109         };
15110         struct mlx5_flow_tbl_data_entry *tbl_data;
15111         struct mlx5_priv *priv = dev->data->dev_private;
15112         uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
15113
15114         if (!is_default_policy && (priv->representor || priv->master)) {
15115                 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
15116                                                    value.buf, NULL, attr)) {
15117                         DRV_LOG(ERR,
15118                         "Failed to register meter drop matcher with port.");
15119                         return -1;
15120                 }
15121         }
15122         tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
15123         if (priority < RTE_COLOR_RED)
15124                 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
15125                         (enum modify_reg)color_reg_c_idx, 0, color_mask);
15126         matcher.priority = priority;
15127         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
15128                                         matcher.mask.size);
15129         entry = mlx5_cache_register(&tbl_data->matchers, &ctx);
15130         if (!entry) {
15131                 DRV_LOG(ERR, "Failed to register meter drop matcher.");
15132                 return -1;
15133         }
15134         sub_policy->color_matcher[priority] =
15135                 container_of(entry, struct mlx5_flow_dv_matcher, entry);
15136         return 0;
15137 }
15138
15139 /**
15140  * Create the policy rules per domain.
15141  *
15142  * @param[in] dev
15143  *   Pointer to Ethernet device.
15144  * @param[in] sub_policy
15145  *    Pointer to sub policy table..
15146  * @param[in] egress
15147  *   Direction of the table.
15148  * @param[in] transfer
15149  *   E-Switch or NIC flow.
15150  * @param[in] acts
15151  *   Pointer to policy action list per color.
15152  *
15153  * @return
15154  *   0 on success, -1 otherwise.
15155  */
15156 static int
15157 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
15158                 struct mlx5_flow_meter_sub_policy *sub_policy,
15159                 uint8_t egress, uint8_t transfer, bool is_default_policy,
15160                 struct mlx5_meter_policy_acts acts[RTE_COLORS])
15161 {
15162         struct rte_flow_error flow_err;
15163         uint32_t color_reg_c_idx;
15164         struct rte_flow_attr attr = {
15165                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
15166                 .priority = 0,
15167                 .ingress = 0,
15168                 .egress = !!egress,
15169                 .transfer = !!transfer,
15170                 .reserved = 0,
15171         };
15172         int i;
15173         int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
15174
15175         if (ret < 0)
15176                 return -1;
15177         /* Create policy table with POLICY level. */
15178         if (!sub_policy->tbl_rsc)
15179                 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
15180                                 MLX5_FLOW_TABLE_LEVEL_POLICY,
15181                                 egress, transfer, false, NULL, 0, 0,
15182                                 sub_policy->idx, &flow_err);
15183         if (!sub_policy->tbl_rsc) {
15184                 DRV_LOG(ERR,
15185                         "Failed to create meter sub policy table.");
15186                 return -1;
15187         }
15188         /* Prepare matchers. */
15189         color_reg_c_idx = ret;
15190         for (i = 0; i < RTE_COLORS; i++) {
15191                 if (i == RTE_COLOR_YELLOW || !acts[i].actions_n)
15192                         continue;
15193                 attr.priority = i;
15194                 if (!sub_policy->color_matcher[i]) {
15195                         /* Create matchers for Color. */
15196                         if (__flow_dv_create_policy_matcher(dev,
15197                                 color_reg_c_idx, i, sub_policy,
15198                                 &attr, is_default_policy, &flow_err))
15199                                 return -1;
15200                 }
15201                 /* Create flow, matching color. */
15202                 if (acts[i].actions_n)
15203                         if (__flow_dv_create_policy_flow(dev,
15204                                 color_reg_c_idx, (enum rte_color)i,
15205                                 sub_policy->color_matcher[i]->matcher_object,
15206                                 acts[i].actions_n,
15207                                 acts[i].dv_actions,
15208                                 is_default_policy,
15209                                 &sub_policy->color_rule[i],
15210                                 &attr))
15211                                 return -1;
15212         }
15213         return 0;
15214 }
15215
15216 static int
15217 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
15218                         struct mlx5_flow_meter_policy *mtr_policy,
15219                         struct mlx5_flow_meter_sub_policy *sub_policy,
15220                         uint32_t domain)
15221 {
15222         struct mlx5_priv *priv = dev->data->dev_private;
15223         struct mlx5_meter_policy_acts acts[RTE_COLORS];
15224         struct mlx5_flow_dv_tag_resource *tag;
15225         struct mlx5_flow_dv_port_id_action_resource *port_action;
15226         struct mlx5_hrxq *hrxq;
15227         uint8_t egress, transfer;
15228         int i;
15229
15230         for (i = 0; i < RTE_COLORS; i++) {
15231                 acts[i].actions_n = 0;
15232                 if (i == RTE_COLOR_YELLOW)
15233                         continue;
15234                 if (i == RTE_COLOR_RED) {
15235                         /* Only support drop on red. */
15236                         acts[i].dv_actions[0] =
15237                         mtr_policy->dr_drop_action[domain];
15238                         acts[i].actions_n = 1;
15239                         continue;
15240                 }
15241                 if (mtr_policy->act_cnt[i].rix_mark) {
15242                         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
15243                                         mtr_policy->act_cnt[i].rix_mark);
15244                         if (!tag) {
15245                                 DRV_LOG(ERR, "Failed to find "
15246                                 "mark action for policy.");
15247                                 return -1;
15248                         }
15249                         acts[i].dv_actions[acts[i].actions_n] =
15250                                                 tag->action;
15251                         acts[i].actions_n++;
15252                 }
15253                 if (mtr_policy->act_cnt[i].modify_hdr) {
15254                         acts[i].dv_actions[acts[i].actions_n] =
15255                         mtr_policy->act_cnt[i].modify_hdr->action;
15256                         acts[i].actions_n++;
15257                 }
15258                 if (mtr_policy->act_cnt[i].fate_action) {
15259                         switch (mtr_policy->act_cnt[i].fate_action) {
15260                         case MLX5_FLOW_FATE_PORT_ID:
15261                                 port_action = mlx5_ipool_get
15262                                         (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
15263                                 mtr_policy->act_cnt[i].rix_port_id_action);
15264                                 if (!port_action) {
15265                                         DRV_LOG(ERR, "Failed to find "
15266                                                 "port action for policy.");
15267                                         return -1;
15268                                 }
15269                                 acts[i].dv_actions[acts[i].actions_n] =
15270                                 port_action->action;
15271                                 acts[i].actions_n++;
15272                                 break;
15273                         case MLX5_FLOW_FATE_DROP:
15274                         case MLX5_FLOW_FATE_JUMP:
15275                                 acts[i].dv_actions[acts[i].actions_n] =
15276                                 mtr_policy->act_cnt[i].dr_jump_action[domain];
15277                                 acts[i].actions_n++;
15278                                 break;
15279                         case MLX5_FLOW_FATE_SHARED_RSS:
15280                         case MLX5_FLOW_FATE_QUEUE:
15281                                 hrxq = mlx5_ipool_get
15282                                 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
15283                                 sub_policy->rix_hrxq[i]);
15284                                 if (!hrxq) {
15285                                         DRV_LOG(ERR, "Failed to find "
15286                                                 "queue action for policy.");
15287                                         return -1;
15288                                 }
15289                                 acts[i].dv_actions[acts[i].actions_n] =
15290                                 hrxq->action;
15291                                 acts[i].actions_n++;
15292                                 break;
15293                         default:
15294                                 /*Queue action do nothing*/
15295                                 break;
15296                         }
15297                 }
15298         }
15299         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15300         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15301         if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
15302                                 egress, transfer, false, acts)) {
15303                 DRV_LOG(ERR,
15304                 "Failed to create policy rules per domain.");
15305                 return -1;
15306         }
15307         return 0;
15308 }
15309
15310 /**
15311  * Create the policy rules.
15312  *
15313  * @param[in] dev
15314  *   Pointer to Ethernet device.
15315  * @param[in,out] mtr_policy
15316  *   Pointer to meter policy table.
15317  *
15318  * @return
15319  *   0 on success, -1 otherwise.
15320  */
15321 static int
15322 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
15323                              struct mlx5_flow_meter_policy *mtr_policy)
15324 {
15325         int i;
15326         uint16_t sub_policy_num;
15327
15328         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15329                 sub_policy_num = (mtr_policy->sub_policy_num >>
15330                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15331                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15332                 if (!sub_policy_num)
15333                         continue;
15334                 /* Prepare actions list and create policy rules. */
15335                 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
15336                         mtr_policy->sub_policys[i][0], i)) {
15337                         DRV_LOG(ERR,
15338                         "Failed to create policy action list per domain.");
15339                         return -1;
15340                 }
15341         }
15342         return 0;
15343 }
15344
15345 static int
15346 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
15347 {
15348         struct mlx5_priv *priv = dev->data->dev_private;
15349         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15350         struct mlx5_flow_meter_def_policy *def_policy;
15351         struct mlx5_flow_tbl_resource *jump_tbl;
15352         struct mlx5_flow_tbl_data_entry *tbl_data;
15353         uint8_t egress, transfer;
15354         struct rte_flow_error error;
15355         struct mlx5_meter_policy_acts acts[RTE_COLORS];
15356         int ret;
15357
15358         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15359         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15360         def_policy = mtrmng->def_policy[domain];
15361         if (!def_policy) {
15362                 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
15363                         sizeof(struct mlx5_flow_meter_def_policy),
15364                         RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
15365                 if (!def_policy) {
15366                         DRV_LOG(ERR, "Failed to alloc "
15367                                         "default policy table.");
15368                         goto def_policy_error;
15369                 }
15370                 mtrmng->def_policy[domain] = def_policy;
15371                 /* Create the meter suffix table with SUFFIX level. */
15372                 jump_tbl = flow_dv_tbl_resource_get(dev,
15373                                 MLX5_FLOW_TABLE_LEVEL_METER,
15374                                 egress, transfer, false, NULL, 0,
15375                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
15376                 if (!jump_tbl) {
15377                         DRV_LOG(ERR,
15378                                 "Failed to create meter suffix table.");
15379                         goto def_policy_error;
15380                 }
15381                 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
15382                 tbl_data = container_of(jump_tbl,
15383                                 struct mlx5_flow_tbl_data_entry, tbl);
15384                 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
15385                                                 tbl_data->jump.action;
15386                 acts[RTE_COLOR_GREEN].dv_actions[0] =
15387                                                 tbl_data->jump.action;
15388                 acts[RTE_COLOR_GREEN].actions_n = 1;
15389                 /* Create jump action to the drop table. */
15390                 if (!mtrmng->drop_tbl[domain]) {
15391                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
15392                                 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
15393                                 egress, transfer, false, NULL, 0,
15394                                 0, MLX5_MTR_TABLE_ID_DROP, &error);
15395                         if (!mtrmng->drop_tbl[domain]) {
15396                                 DRV_LOG(ERR, "Failed to create "
15397                                 "meter drop table for default policy.");
15398                                 goto def_policy_error;
15399                         }
15400                 }
15401                 tbl_data = container_of(mtrmng->drop_tbl[domain],
15402                                 struct mlx5_flow_tbl_data_entry, tbl);
15403                 def_policy->dr_jump_action[RTE_COLOR_RED] =
15404                                                 tbl_data->jump.action;
15405                 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
15406                 acts[RTE_COLOR_RED].actions_n = 1;
15407                 /* Create default policy rules. */
15408                 ret = __flow_dv_create_domain_policy_rules(dev,
15409                                         &def_policy->sub_policy,
15410                                         egress, transfer, true, acts);
15411                 if (ret) {
15412                         DRV_LOG(ERR, "Failed to create "
15413                                 "default policy rules.");
15414                                 goto def_policy_error;
15415                 }
15416         }
15417         return 0;
15418 def_policy_error:
15419         __flow_dv_destroy_domain_def_policy(dev,
15420                         (enum mlx5_meter_domain)domain);
15421         return -1;
15422 }
15423
15424 /**
15425  * Create the default policy table set.
15426  *
15427  * @param[in] dev
15428  *   Pointer to Ethernet device.
15429  * @return
15430  *   0 on success, -1 otherwise.
15431  */
15432 static int
15433 flow_dv_create_def_policy(struct rte_eth_dev *dev)
15434 {
15435         struct mlx5_priv *priv = dev->data->dev_private;
15436         int i;
15437
15438         /* Non-termination policy table. */
15439         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15440                 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
15441                         continue;
15442                 if (__flow_dv_create_domain_def_policy(dev, i)) {
15443                         DRV_LOG(ERR,
15444                         "Failed to create default policy");
15445                         return -1;
15446                 }
15447         }
15448         return 0;
15449 }
15450
15451 /**
15452  * Create the needed meter tables.
15453  * Lock free, (mutex should be acquired by caller).
15454  *
15455  * @param[in] dev
15456  *   Pointer to Ethernet device.
15457  * @param[in] fm
15458  *   Meter information table.
15459  * @param[in] mtr_idx
15460  *   Meter index.
15461  * @param[in] domain_bitmap
15462  *   Domain bitmap.
15463  * @return
15464  *   0 on success, -1 otherwise.
15465  */
15466 static int
15467 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
15468                         struct mlx5_flow_meter_info *fm,
15469                         uint32_t mtr_idx,
15470                         uint8_t domain_bitmap)
15471 {
15472         struct mlx5_priv *priv = dev->data->dev_private;
15473         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15474         struct rte_flow_error error;
15475         struct mlx5_flow_tbl_data_entry *tbl_data;
15476         uint8_t egress, transfer;
15477         void *actions[METER_ACTIONS];
15478         int domain, ret, i;
15479         struct mlx5_flow_counter *cnt;
15480         struct mlx5_flow_dv_match_params value = {
15481                 .size = sizeof(value.buf) -
15482                 MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15483         };
15484         struct mlx5_flow_dv_match_params matcher_para = {
15485                 .size = sizeof(matcher_para.buf) -
15486                 MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15487         };
15488         int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
15489                                                      0, &error);
15490         uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
15491         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
15492         struct mlx5_cache_entry *entry;
15493         struct mlx5_flow_dv_matcher matcher = {
15494                 .mask = {
15495                         .size = sizeof(matcher.mask.buf) -
15496                         MLX5_ST_SZ_BYTES(fte_match_set_misc4),
15497                 },
15498         };
15499         struct mlx5_flow_dv_matcher *drop_matcher;
15500         struct mlx5_flow_cb_ctx ctx = {
15501                 .error = &error,
15502                 .data = &matcher,
15503         };
15504
15505         if (!priv->mtr_en || mtr_id_reg_c < 0) {
15506                 rte_errno = ENOTSUP;
15507                 return -1;
15508         }
15509         for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
15510                 if (!(domain_bitmap & (1 << domain)) ||
15511                         (mtrmng->def_rule[domain] && !fm->drop_cnt))
15512                         continue;
15513                 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15514                 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15515                 /* Create the drop table with METER DROP level. */
15516                 if (!mtrmng->drop_tbl[domain]) {
15517                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
15518                                         MLX5_FLOW_TABLE_LEVEL_METER,
15519                                         egress, transfer, false, NULL, 0,
15520                                         0, MLX5_MTR_TABLE_ID_DROP, &error);
15521                         if (!mtrmng->drop_tbl[domain]) {
15522                                 DRV_LOG(ERR, "Failed to create meter drop table.");
15523                                 goto policy_error;
15524                         }
15525                 }
15526                 /* Create default matcher in drop table. */
15527                 matcher.tbl = mtrmng->drop_tbl[domain],
15528                 tbl_data = container_of(mtrmng->drop_tbl[domain],
15529                                 struct mlx5_flow_tbl_data_entry, tbl);
15530                 if (!mtrmng->def_matcher[domain]) {
15531                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
15532                                        (enum modify_reg)mtr_id_reg_c,
15533                                        0, 0);
15534                         matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
15535                         matcher.crc = rte_raw_cksum
15536                                         ((const void *)matcher.mask.buf,
15537                                         matcher.mask.size);
15538                         entry = mlx5_cache_register(&tbl_data->matchers, &ctx);
15539                         if (!entry) {
15540                                 DRV_LOG(ERR, "Failed to register meter "
15541                                 "drop default matcher.");
15542                                 goto policy_error;
15543                         }
15544                         mtrmng->def_matcher[domain] = container_of(entry,
15545                         struct mlx5_flow_dv_matcher, entry);
15546                 }
15547                 /* Create default rule in drop table. */
15548                 if (!mtrmng->def_rule[domain]) {
15549                         i = 0;
15550                         actions[i++] = priv->sh->dr_drop_action;
15551                         flow_dv_match_meta_reg(matcher_para.buf, value.buf,
15552                                 (enum modify_reg)mtr_id_reg_c, 0, 0);
15553                         ret = mlx5_flow_os_create_flow
15554                                 (mtrmng->def_matcher[domain]->matcher_object,
15555                                 (void *)&value, i, actions,
15556                                 &mtrmng->def_rule[domain]);
15557                         if (ret) {
15558                                 DRV_LOG(ERR, "Failed to create meter "
15559                                 "default drop rule for drop table.");
15560                                 goto policy_error;
15561                         }
15562                 }
15563                 if (!fm->drop_cnt)
15564                         continue;
15565                 MLX5_ASSERT(mtrmng->max_mtr_bits);
15566                 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
15567                         /* Create matchers for Drop. */
15568                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
15569                                         (enum modify_reg)mtr_id_reg_c, 0,
15570                                         (mtr_id_mask << mtr_id_offset));
15571                         matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
15572                         matcher.crc = rte_raw_cksum
15573                                         ((const void *)matcher.mask.buf,
15574                                         matcher.mask.size);
15575                         entry = mlx5_cache_register(&tbl_data->matchers, &ctx);
15576                         if (!entry) {
15577                                 DRV_LOG(ERR,
15578                                 "Failed to register meter drop matcher.");
15579                                 goto policy_error;
15580                         }
15581                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
15582                                 container_of(entry, struct mlx5_flow_dv_matcher,
15583                                              entry);
15584                 }
15585                 drop_matcher =
15586                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
15587                 /* Create drop rule, matching meter_id only. */
15588                 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
15589                                 (enum modify_reg)mtr_id_reg_c,
15590                                 (mtr_idx << mtr_id_offset), UINT32_MAX);
15591                 i = 0;
15592                 cnt = flow_dv_counter_get_by_idx(dev,
15593                                         fm->drop_cnt, NULL);
15594                 actions[i++] = cnt->action;
15595                 actions[i++] = priv->sh->dr_drop_action;
15596                 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
15597                                                (void *)&value, i, actions,
15598                                                &fm->drop_rule[domain]);
15599                 if (ret) {
15600                         DRV_LOG(ERR, "Failed to create meter "
15601                                 "drop rule for drop table.");
15602                                 goto policy_error;
15603                 }
15604         }
15605         return 0;
15606 policy_error:
15607         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15608                 if (fm->drop_rule[i]) {
15609                         claim_zero(mlx5_flow_os_destroy_flow
15610                                 (fm->drop_rule[i]));
15611                         fm->drop_rule[i] = NULL;
15612                 }
15613         }
15614         return -1;
15615 }
15616
15617 /**
15618  * Find the policy table for prefix table with RSS.
15619  *
15620  * @param[in] dev
15621  *   Pointer to Ethernet device.
15622  * @param[in] mtr_policy
15623  *   Pointer to meter policy table.
15624  * @param[in] rss_desc
15625  *   Pointer to rss_desc
15626  * @return
15627  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
15628  */
15629 static struct mlx5_flow_meter_sub_policy *
15630 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
15631                 struct mlx5_flow_meter_policy *mtr_policy,
15632                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
15633 {
15634         struct mlx5_priv *priv = dev->data->dev_private;
15635         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
15636         uint32_t sub_policy_idx = 0;
15637         uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
15638         uint32_t i, j;
15639         struct mlx5_hrxq *hrxq;
15640         struct mlx5_flow_handle dh;
15641         struct mlx5_meter_policy_action_container *act_cnt;
15642         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
15643         uint16_t sub_policy_num;
15644
15645         rte_spinlock_lock(&mtr_policy->sl);
15646         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15647                 if (!rss_desc[i])
15648                         continue;
15649                 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
15650                 if (!hrxq_idx[i]) {
15651                         rte_spinlock_unlock(&mtr_policy->sl);
15652                         return NULL;
15653                 }
15654         }
15655         sub_policy_num = (mtr_policy->sub_policy_num >>
15656                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
15657                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15658         for (i = 0; i < sub_policy_num;
15659                 i++) {
15660                 for (j = 0; j < MLX5_MTR_RTE_COLORS; j++) {
15661                         if (rss_desc[j] &&
15662                                 hrxq_idx[j] !=
15663                         mtr_policy->sub_policys[domain][i]->rix_hrxq[j])
15664                                 break;
15665                 }
15666                 if (j >= MLX5_MTR_RTE_COLORS) {
15667                         /*
15668                          * Found the sub policy table with
15669                          * the same queue per color
15670                          */
15671                         rte_spinlock_unlock(&mtr_policy->sl);
15672                         for (j = 0; j < MLX5_MTR_RTE_COLORS; j++)
15673                                 mlx5_hrxq_release(dev, hrxq_idx[j]);
15674                         return mtr_policy->sub_policys[domain][i];
15675                 }
15676         }
15677         /* Create sub policy. */
15678         if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
15679                 /* Reuse the first dummy sub_policy*/
15680                 sub_policy = mtr_policy->sub_policys[domain][0];
15681                 sub_policy_idx = sub_policy->idx;
15682         } else {
15683                 sub_policy = mlx5_ipool_zmalloc
15684                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
15685                                 &sub_policy_idx);
15686                 if (!sub_policy ||
15687                         sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
15688                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
15689                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
15690                         goto rss_sub_policy_error;
15691                 }
15692                 sub_policy->idx = sub_policy_idx;
15693                 sub_policy->main_policy = mtr_policy;
15694         }
15695         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15696                 if (!rss_desc[i])
15697                         continue;
15698                 sub_policy->rix_hrxq[i] = hrxq_idx[i];
15699                 /*
15700                  * Overwrite the last action from
15701                  * RSS action to Queue action.
15702                  */
15703                 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
15704                               hrxq_idx[i]);
15705                 if (!hrxq) {
15706                         DRV_LOG(ERR, "Failed to create policy hrxq");
15707                         goto rss_sub_policy_error;
15708                 }
15709                 act_cnt = &mtr_policy->act_cnt[i];
15710                 if (act_cnt->rix_mark || act_cnt->modify_hdr) {
15711                         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15712                         if (act_cnt->rix_mark)
15713                                 dh.mark = 1;
15714                         dh.fate_action = MLX5_FLOW_FATE_QUEUE;
15715                         dh.rix_hrxq = hrxq_idx[i];
15716                         flow_drv_rxq_flags_set(dev, &dh);
15717                 }
15718         }
15719         if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
15720                 sub_policy, domain)) {
15721                 DRV_LOG(ERR, "Failed to create policy "
15722                         "rules per domain.");
15723                 goto rss_sub_policy_error;
15724         }
15725         if (sub_policy != mtr_policy->sub_policys[domain][0]) {
15726                 i = (mtr_policy->sub_policy_num >>
15727                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
15728                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15729                 mtr_policy->sub_policys[domain][i] = sub_policy;
15730                 i++;
15731                 if (i > MLX5_MTR_RSS_MAX_SUB_POLICY)
15732                         goto rss_sub_policy_error;
15733                 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
15734                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
15735                 mtr_policy->sub_policy_num |=
15736                         (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
15737                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
15738         }
15739         rte_spinlock_unlock(&mtr_policy->sl);
15740         return sub_policy;
15741 rss_sub_policy_error:
15742         if (sub_policy) {
15743                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
15744                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
15745                         i = (mtr_policy->sub_policy_num >>
15746                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
15747                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15748                         mtr_policy->sub_policys[domain][i] = NULL;
15749                         mlx5_ipool_free
15750                         (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
15751                                         sub_policy->idx);
15752                 }
15753         }
15754         if (sub_policy_idx)
15755                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
15756                         sub_policy_idx);
15757         rte_spinlock_unlock(&mtr_policy->sl);
15758         return NULL;
15759 }
15760
15761 /**
15762  * Validate the batch counter support in root table.
15763  *
15764  * Create a simple flow with invalid counter and drop action on root table to
15765  * validate if batch counter with offset on root table is supported or not.
15766  *
15767  * @param[in] dev
15768  *   Pointer to rte_eth_dev structure.
15769  *
15770  * @return
15771  *   0 on success, a negative errno value otherwise and rte_errno is set.
15772  */
15773 int
15774 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
15775 {
15776         struct mlx5_priv *priv = dev->data->dev_private;
15777         struct mlx5_dev_ctx_shared *sh = priv->sh;
15778         struct mlx5_flow_dv_match_params mask = {
15779                 .size = sizeof(mask.buf),
15780         };
15781         struct mlx5_flow_dv_match_params value = {
15782                 .size = sizeof(value.buf),
15783         };
15784         struct mlx5dv_flow_matcher_attr dv_attr = {
15785                 .type = IBV_FLOW_ATTR_NORMAL,
15786                 .priority = 0,
15787                 .match_criteria_enable = 0,
15788                 .match_mask = (void *)&mask,
15789         };
15790         void *actions[2] = { 0 };
15791         struct mlx5_flow_tbl_resource *tbl = NULL;
15792         struct mlx5_devx_obj *dcs = NULL;
15793         void *matcher = NULL;
15794         void *flow = NULL;
15795         int ret = -1;
15796
15797         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
15798                                         0, 0, 0, NULL);
15799         if (!tbl)
15800                 goto err;
15801         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
15802         if (!dcs)
15803                 goto err;
15804         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
15805                                                     &actions[0]);
15806         if (ret)
15807                 goto err;
15808         actions[1] = sh->dr_drop_action ? sh->dr_drop_action :
15809                                           priv->drop_queue.hrxq->action;
15810         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
15811         ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
15812                                                &matcher);
15813         if (ret)
15814                 goto err;
15815         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 2,
15816                                        actions, &flow);
15817 err:
15818         /*
15819          * If batch counter with offset is not supported, the driver will not
15820          * validate the invalid offset value, flow create should success.
15821          * In this case, it means batch counter is not supported in root table.
15822          *
15823          * Otherwise, if flow create is failed, counter offset is supported.
15824          */
15825         if (flow) {
15826                 DRV_LOG(INFO, "Batch counter is not supported in root "
15827                               "table. Switch to fallback mode.");
15828                 rte_errno = ENOTSUP;
15829                 ret = -rte_errno;
15830                 claim_zero(mlx5_flow_os_destroy_flow(flow));
15831         } else {
15832                 /* Check matcher to make sure validate fail at flow create. */
15833                 if (!matcher || (matcher && errno != EINVAL))
15834                         DRV_LOG(ERR, "Unexpected error in counter offset "
15835                                      "support detection");
15836                 ret = 0;
15837         }
15838         if (actions[0])
15839                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
15840         if (matcher)
15841                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
15842         if (tbl)
15843                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
15844         if (dcs)
15845                 claim_zero(mlx5_devx_cmd_destroy(dcs));
15846         return ret;
15847 }
15848
15849 /**
15850  * Query a devx counter.
15851  *
15852  * @param[in] dev
15853  *   Pointer to the Ethernet device structure.
15854  * @param[in] cnt
15855  *   Index to the flow counter.
15856  * @param[in] clear
15857  *   Set to clear the counter statistics.
15858  * @param[out] pkts
15859  *   The statistics value of packets.
15860  * @param[out] bytes
15861  *   The statistics value of bytes.
15862  *
15863  * @return
15864  *   0 on success, otherwise return -1.
15865  */
15866 static int
15867 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
15868                       uint64_t *pkts, uint64_t *bytes)
15869 {
15870         struct mlx5_priv *priv = dev->data->dev_private;
15871         struct mlx5_flow_counter *cnt;
15872         uint64_t inn_pkts, inn_bytes;
15873         int ret;
15874
15875         if (!priv->config.devx)
15876                 return -1;
15877
15878         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
15879         if (ret)
15880                 return -1;
15881         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
15882         *pkts = inn_pkts - cnt->hits;
15883         *bytes = inn_bytes - cnt->bytes;
15884         if (clear) {
15885                 cnt->hits = inn_pkts;
15886                 cnt->bytes = inn_bytes;
15887         }
15888         return 0;
15889 }
15890
15891 /**
15892  * Get aged-out flows.
15893  *
15894  * @param[in] dev
15895  *   Pointer to the Ethernet device structure.
15896  * @param[in] context
15897  *   The address of an array of pointers to the aged-out flows contexts.
15898  * @param[in] nb_contexts
15899  *   The length of context array pointers.
15900  * @param[out] error
15901  *   Perform verbose error reporting if not NULL. Initialized in case of
15902  *   error only.
15903  *
15904  * @return
15905  *   how many contexts get in success, otherwise negative errno value.
15906  *   if nb_contexts is 0, return the amount of all aged contexts.
15907  *   if nb_contexts is not 0 , return the amount of aged flows reported
15908  *   in the context array.
15909  * @note: only stub for now
15910  */
15911 static int
15912 flow_get_aged_flows(struct rte_eth_dev *dev,
15913                     void **context,
15914                     uint32_t nb_contexts,
15915                     struct rte_flow_error *error)
15916 {
15917         struct mlx5_priv *priv = dev->data->dev_private;
15918         struct mlx5_age_info *age_info;
15919         struct mlx5_age_param *age_param;
15920         struct mlx5_flow_counter *counter;
15921         struct mlx5_aso_age_action *act;
15922         int nb_flows = 0;
15923
15924         if (nb_contexts && !context)
15925                 return rte_flow_error_set(error, EINVAL,
15926                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15927                                           NULL, "empty context");
15928         age_info = GET_PORT_AGE_INFO(priv);
15929         rte_spinlock_lock(&age_info->aged_sl);
15930         LIST_FOREACH(act, &age_info->aged_aso, next) {
15931                 nb_flows++;
15932                 if (nb_contexts) {
15933                         context[nb_flows - 1] =
15934                                                 act->age_params.context;
15935                         if (!(--nb_contexts))
15936                                 break;
15937                 }
15938         }
15939         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
15940                 nb_flows++;
15941                 if (nb_contexts) {
15942                         age_param = MLX5_CNT_TO_AGE(counter);
15943                         context[nb_flows - 1] = age_param->context;
15944                         if (!(--nb_contexts))
15945                                 break;
15946                 }
15947         }
15948         rte_spinlock_unlock(&age_info->aged_sl);
15949         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
15950         return nb_flows;
15951 }
15952
15953 /*
15954  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
15955  */
15956 static uint32_t
15957 flow_dv_counter_allocate(struct rte_eth_dev *dev)
15958 {
15959         return flow_dv_counter_alloc(dev, 0);
15960 }
15961
15962 /**
15963  * Validate indirect action.
15964  * Dispatcher for action type specific validation.
15965  *
15966  * @param[in] dev
15967  *   Pointer to the Ethernet device structure.
15968  * @param[in] conf
15969  *   Indirect action configuration.
15970  * @param[in] action
15971  *   The indirect action object to validate.
15972  * @param[out] error
15973  *   Perform verbose error reporting if not NULL. Initialized in case of
15974  *   error only.
15975  *
15976  * @return
15977  *   0 on success, otherwise negative errno value.
15978  */
15979 static int
15980 flow_dv_action_validate(struct rte_eth_dev *dev,
15981                         const struct rte_flow_indir_action_conf *conf,
15982                         const struct rte_flow_action *action,
15983                         struct rte_flow_error *err)
15984 {
15985         struct mlx5_priv *priv = dev->data->dev_private;
15986
15987         RTE_SET_USED(conf);
15988         switch (action->type) {
15989         case RTE_FLOW_ACTION_TYPE_RSS:
15990                 /*
15991                  * priv->obj_ops is set according to driver capabilities.
15992                  * When DevX capabilities are
15993                  * sufficient, it is set to devx_obj_ops.
15994                  * Otherwise, it is set to ibv_obj_ops.
15995                  * ibv_obj_ops doesn't support ind_table_modify operation.
15996                  * In this case the indirect RSS action can't be used.
15997                  */
15998                 if (priv->obj_ops.ind_table_modify == NULL)
15999                         return rte_flow_error_set
16000                                         (err, ENOTSUP,
16001                                          RTE_FLOW_ERROR_TYPE_ACTION,
16002                                          NULL,
16003                                          "Indirect RSS action not supported");
16004                 return mlx5_validate_action_rss(dev, action, err);
16005         case RTE_FLOW_ACTION_TYPE_AGE:
16006                 if (!priv->sh->aso_age_mng)
16007                         return rte_flow_error_set(err, ENOTSUP,
16008                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16009                                                 NULL,
16010                                                 "Indirect age action not supported");
16011                 return flow_dv_validate_action_age(0, action, dev, err);
16012         case RTE_FLOW_ACTION_TYPE_COUNT:
16013                 /*
16014                  * There are two mechanisms to share the action count.
16015                  * The old mechanism uses the shared field to share, while the
16016                  * new mechanism uses the indirect action API.
16017                  * This validation comes to make sure that the two mechanisms
16018                  * are not combined.
16019                  */
16020                 if (is_shared_action_count(action))
16021                         return rte_flow_error_set(err, ENOTSUP,
16022                                                   RTE_FLOW_ERROR_TYPE_ACTION,
16023                                                   NULL,
16024                                                   "Mix shared and indirect counter is not supported");
16025                 return flow_dv_validate_action_count(dev, true, 0, err);
16026         default:
16027                 return rte_flow_error_set(err, ENOTSUP,
16028                                           RTE_FLOW_ERROR_TYPE_ACTION,
16029                                           NULL,
16030                                           "action type not supported");
16031         }
16032 }
16033
16034 /**
16035  * Validate meter policy actions.
16036  * Dispatcher for action type specific validation.
16037  *
16038  * @param[in] dev
16039  *   Pointer to the Ethernet device structure.
16040  * @param[in] action
16041  *   The meter policy action object to validate.
16042  * @param[in] attr
16043  *   Attributes of flow to determine steering domain.
16044  * @param[out] error
16045  *   Perform verbose error reporting if not NULL. Initialized in case of
16046  *   error only.
16047  *
16048  * @return
16049  *   0 on success, otherwise negative errno value.
16050  */
16051 static int
16052 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
16053                         const struct rte_flow_action *actions[RTE_COLORS],
16054                         struct rte_flow_attr *attr,
16055                         bool *is_rss,
16056                         uint8_t *domain_bitmap,
16057                         bool *is_def_policy,
16058                         struct rte_mtr_error *error)
16059 {
16060         struct mlx5_priv *priv = dev->data->dev_private;
16061         struct mlx5_dev_config *dev_conf = &priv->config;
16062         const struct rte_flow_action *act;
16063         uint64_t action_flags = 0;
16064         int actions_n;
16065         int i, ret;
16066         struct rte_flow_error flow_err;
16067         uint8_t domain_color[RTE_COLORS] = {0};
16068         uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
16069
16070         if (!priv->config.dv_esw_en)
16071                 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
16072         *domain_bitmap = def_domain;
16073         if (actions[RTE_COLOR_YELLOW] &&
16074                 actions[RTE_COLOR_YELLOW]->type != RTE_FLOW_ACTION_TYPE_END)
16075                 return -rte_mtr_error_set(error, ENOTSUP,
16076                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
16077                                 NULL,
16078                                 "Yellow color does not support any action.");
16079         if (actions[RTE_COLOR_YELLOW] &&
16080                 actions[RTE_COLOR_YELLOW]->type != RTE_FLOW_ACTION_TYPE_DROP)
16081                 return -rte_mtr_error_set(error, ENOTSUP,
16082                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
16083                                 NULL, "Red color only supports drop action.");
16084         /*
16085          * Check default policy actions:
16086          * Green/Yellow: no action, Red: drop action
16087          */
16088         if ((!actions[RTE_COLOR_GREEN] ||
16089                 actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)) {
16090                 *is_def_policy = true;
16091                 return 0;
16092         }
16093         flow_err.message = NULL;
16094         for (i = 0; i < RTE_COLORS; i++) {
16095                 act = actions[i];
16096                 for (action_flags = 0, actions_n = 0;
16097                         act && act->type != RTE_FLOW_ACTION_TYPE_END;
16098                         act++) {
16099                         if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
16100                                 return -rte_mtr_error_set(error, ENOTSUP,
16101                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16102                                           NULL, "too many actions");
16103                         switch (act->type) {
16104                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
16105                                 if (!priv->config.dv_esw_en)
16106                                         return -rte_mtr_error_set(error,
16107                                         ENOTSUP,
16108                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16109                                         NULL, "PORT action validate check"
16110                                         " fail for ESW disable");
16111                                 ret = flow_dv_validate_action_port_id(dev,
16112                                                 action_flags,
16113                                                 act, attr, &flow_err);
16114                                 if (ret)
16115                                         return -rte_mtr_error_set(error,
16116                                         ENOTSUP,
16117                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16118                                         NULL, flow_err.message ?
16119                                         flow_err.message :
16120                                         "PORT action validate check fail");
16121                                 ++actions_n;
16122                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
16123                                 break;
16124                         case RTE_FLOW_ACTION_TYPE_MARK:
16125                                 ret = flow_dv_validate_action_mark(dev, act,
16126                                                            action_flags,
16127                                                            attr, &flow_err);
16128                                 if (ret < 0)
16129                                         return -rte_mtr_error_set(error,
16130                                         ENOTSUP,
16131                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16132                                         NULL, flow_err.message ?
16133                                         flow_err.message :
16134                                         "Mark action validate check fail");
16135                                 if (dev_conf->dv_xmeta_en !=
16136                                         MLX5_XMETA_MODE_LEGACY)
16137                                         return -rte_mtr_error_set(error,
16138                                         ENOTSUP,
16139                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16140                                         NULL, "Extend MARK action is "
16141                                         "not supported. Please try use "
16142                                         "default policy for meter.");
16143                                 action_flags |= MLX5_FLOW_ACTION_MARK;
16144                                 ++actions_n;
16145                                 break;
16146                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
16147                                 ret = flow_dv_validate_action_set_tag(dev,
16148                                                         act, action_flags,
16149                                                         attr, &flow_err);
16150                                 if (ret)
16151                                         return -rte_mtr_error_set(error,
16152                                         ENOTSUP,
16153                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16154                                         NULL, flow_err.message ?
16155                                         flow_err.message :
16156                                         "Set tag action validate check fail");
16157                                 /*
16158                                  * Count all modify-header actions
16159                                  * as one action.
16160                                  */
16161                                 if (!(action_flags &
16162                                         MLX5_FLOW_MODIFY_HDR_ACTIONS))
16163                                         ++actions_n;
16164                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
16165                                 break;
16166                         case RTE_FLOW_ACTION_TYPE_DROP:
16167                                 ret = mlx5_flow_validate_action_drop
16168                                         (action_flags,
16169                                         attr, &flow_err);
16170                                 if (ret < 0)
16171                                         return -rte_mtr_error_set(error,
16172                                         ENOTSUP,
16173                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16174                                         NULL, flow_err.message ?
16175                                         flow_err.message :
16176                                         "Drop action validate check fail");
16177                                 action_flags |= MLX5_FLOW_ACTION_DROP;
16178                                 ++actions_n;
16179                                 break;
16180                         case RTE_FLOW_ACTION_TYPE_QUEUE:
16181                                 /*
16182                                  * Check whether extensive
16183                                  * metadata feature is engaged.
16184                                  */
16185                                 if (dev_conf->dv_flow_en &&
16186                                         (dev_conf->dv_xmeta_en !=
16187                                         MLX5_XMETA_MODE_LEGACY) &&
16188                                         mlx5_flow_ext_mreg_supported(dev))
16189                                         return -rte_mtr_error_set(error,
16190                                           ENOTSUP,
16191                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16192                                           NULL, "Queue action with meta "
16193                                           "is not supported. Please try use "
16194                                           "default policy for meter.");
16195                                 ret = mlx5_flow_validate_action_queue(act,
16196                                                         action_flags, dev,
16197                                                         attr, &flow_err);
16198                                 if (ret < 0)
16199                                         return -rte_mtr_error_set(error,
16200                                           ENOTSUP,
16201                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16202                                           NULL, flow_err.message ?
16203                                           flow_err.message :
16204                                           "Queue action validate check fail");
16205                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
16206                                 ++actions_n;
16207                                 break;
16208                         case RTE_FLOW_ACTION_TYPE_RSS:
16209                                 if (dev_conf->dv_flow_en &&
16210                                         (dev_conf->dv_xmeta_en !=
16211                                         MLX5_XMETA_MODE_LEGACY) &&
16212                                         mlx5_flow_ext_mreg_supported(dev))
16213                                         return -rte_mtr_error_set(error,
16214                                           ENOTSUP,
16215                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16216                                           NULL, "RSS action with meta "
16217                                           "is not supported. Please try use "
16218                                           "default policy for meter.");
16219                                 ret = mlx5_validate_action_rss(dev, act,
16220                                                 &flow_err);
16221                                 if (ret < 0)
16222                                         return -rte_mtr_error_set(error,
16223                                           ENOTSUP,
16224                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16225                                           NULL, flow_err.message ?
16226                                           flow_err.message :
16227                                           "RSS action validate check fail");
16228                                 action_flags |= MLX5_FLOW_ACTION_RSS;
16229                                 ++actions_n;
16230                                 *is_rss = true;
16231                                 break;
16232                         case RTE_FLOW_ACTION_TYPE_JUMP:
16233                                 ret = flow_dv_validate_action_jump(dev,
16234                                         NULL, act, action_flags,
16235                                         attr, true, &flow_err);
16236                                 if (ret)
16237                                         return -rte_mtr_error_set(error,
16238                                           ENOTSUP,
16239                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
16240                                           NULL, flow_err.message ?
16241                                           flow_err.message :
16242                                           "Jump action validate check fail");
16243                                 ++actions_n;
16244                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
16245                                 break;
16246                         default:
16247                                 return -rte_mtr_error_set(error, ENOTSUP,
16248                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16249                                         NULL,
16250                                         "Doesn't support optional action");
16251                         }
16252                 }
16253                 /* Yellow is not supported, just skip. */
16254                 if (i == RTE_COLOR_YELLOW)
16255                         continue;
16256                 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
16257                         domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
16258                 else if ((action_flags &
16259                         (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
16260                         (action_flags & MLX5_FLOW_ACTION_MARK))
16261                         /*
16262                          * Only support MLX5_XMETA_MODE_LEGACY
16263                          * so MARK action only in ingress domain.
16264                          */
16265                         domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
16266                 else
16267                         domain_color[i] = def_domain;
16268                 /*
16269                  * Validate the drop action mutual exclusion
16270                  * with other actions. Drop action is mutually-exclusive
16271                  * with any other action, except for Count action.
16272                  */
16273                 if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
16274                         (action_flags & ~MLX5_FLOW_ACTION_DROP)) {
16275                         return -rte_mtr_error_set(error, ENOTSUP,
16276                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
16277                                 NULL, "Drop action is mutually-exclusive "
16278                                 "with any other action");
16279                 }
16280                 /* Eswitch has few restrictions on using items and actions */
16281                 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
16282                         if (!mlx5_flow_ext_mreg_supported(dev) &&
16283                                 action_flags & MLX5_FLOW_ACTION_MARK)
16284                                 return -rte_mtr_error_set(error, ENOTSUP,
16285                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16286                                         NULL, "unsupported action MARK");
16287                         if (action_flags & MLX5_FLOW_ACTION_QUEUE)
16288                                 return -rte_mtr_error_set(error, ENOTSUP,
16289                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16290                                         NULL, "unsupported action QUEUE");
16291                         if (action_flags & MLX5_FLOW_ACTION_RSS)
16292                                 return -rte_mtr_error_set(error, ENOTSUP,
16293                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16294                                         NULL, "unsupported action RSS");
16295                         if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
16296                                 return -rte_mtr_error_set(error, ENOTSUP,
16297                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16298                                         NULL, "no fate action is found");
16299                 } else {
16300                         if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) &&
16301                                 (domain_color[i] &
16302                                 MLX5_MTR_DOMAIN_INGRESS_BIT)) {
16303                                 if ((domain_color[i] &
16304                                         MLX5_MTR_DOMAIN_EGRESS_BIT))
16305                                         domain_color[i] =
16306                                         MLX5_MTR_DOMAIN_EGRESS_BIT;
16307                                 else
16308                                         return -rte_mtr_error_set(error,
16309                                         ENOTSUP,
16310                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
16311                                         NULL, "no fate action is found");
16312                         }
16313                 }
16314                 if (domain_color[i] != def_domain)
16315                         *domain_bitmap = domain_color[i];
16316         }
16317         return 0;
16318 }
16319
16320 static int
16321 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
16322 {
16323         struct mlx5_priv *priv = dev->data->dev_private;
16324         int ret = 0;
16325
16326         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
16327                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
16328                                                 flags);
16329                 if (ret != 0)
16330                         return ret;
16331         }
16332         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
16333                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
16334                 if (ret != 0)
16335                         return ret;
16336         }
16337         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
16338                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
16339                 if (ret != 0)
16340                         return ret;
16341         }
16342         return 0;
16343 }
16344
16345 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
16346         .validate = flow_dv_validate,
16347         .prepare = flow_dv_prepare,
16348         .translate = flow_dv_translate,
16349         .apply = flow_dv_apply,
16350         .remove = flow_dv_remove,
16351         .destroy = flow_dv_destroy,
16352         .query = flow_dv_query,
16353         .create_mtr_tbls = flow_dv_create_mtr_tbls,
16354         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
16355         .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
16356         .create_meter = flow_dv_mtr_alloc,
16357         .free_meter = flow_dv_aso_mtr_release_to_pool,
16358         .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
16359         .create_mtr_acts = flow_dv_create_mtr_policy_acts,
16360         .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
16361         .create_policy_rules = flow_dv_create_policy_rules,
16362         .destroy_policy_rules = flow_dv_destroy_policy_rules,
16363         .create_def_policy = flow_dv_create_def_policy,
16364         .destroy_def_policy = flow_dv_destroy_def_policy,
16365         .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
16366         .counter_alloc = flow_dv_counter_allocate,
16367         .counter_free = flow_dv_counter_free,
16368         .counter_query = flow_dv_counter_query,
16369         .get_aged_flows = flow_get_aged_flows,
16370         .action_validate = flow_dv_action_validate,
16371         .action_create = flow_dv_action_create,
16372         .action_destroy = flow_dv_action_destroy,
16373         .action_update = flow_dv_action_update,
16374         .action_query = flow_dv_action_query,
16375         .sync_domain = flow_dv_sync_domain,
16376 };
16377
16378 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */
16379