1 /* SPDX-License-Identifier: BSD-3-Clause
2 * Copyright 2018 Mellanox Technologies, Ltd
11 #include <rte_common.h>
12 #include <rte_ether.h>
13 #include <ethdev_driver.h>
15 #include <rte_flow_driver.h>
16 #include <rte_malloc.h>
17 #include <rte_cycles.h>
20 #include <rte_vxlan.h>
22 #include <rte_eal_paging.h>
25 #include <rte_mtr_driver.h>
26 #include <rte_tailq.h>
28 #include <mlx5_glue.h>
29 #include <mlx5_devx_cmds.h>
31 #include <mlx5_malloc.h>
33 #include "mlx5_defs.h"
35 #include "mlx5_common_os.h"
36 #include "mlx5_flow.h"
37 #include "mlx5_flow_os.h"
40 #include "rte_pmd_mlx5.h"
42 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
44 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
45 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
48 #ifndef HAVE_MLX5DV_DR_ESWITCH
49 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
50 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
54 #ifndef HAVE_MLX5DV_DR
55 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
58 /* VLAN header definitions */
59 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
60 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
61 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
62 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
63 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
78 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
79 struct mlx5_flow_tbl_resource *tbl);
82 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
83 uint32_t encap_decap_idx);
86 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
89 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
92 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
96 * Initialize flow attributes structure according to flow items' types.
98 * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
99 * mode. For tunnel mode, the items to be modified are the outermost ones.
102 * Pointer to item specification.
104 * Pointer to flow attributes structure.
105 * @param[in] dev_flow
106 * Pointer to the sub flow.
107 * @param[in] tunnel_decap
108 * Whether action is after tunnel decapsulation.
111 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
112 struct mlx5_flow *dev_flow, bool tunnel_decap)
114 uint64_t layers = dev_flow->handle->layers;
117 * If layers is already initialized, it means this dev_flow is the
118 * suffix flow, the layers flags is set by the prefix flow. Need to
119 * use the layer flags from prefix flow as the suffix flow may not
120 * have the user defined items as the flow is split.
123 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
125 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
127 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
129 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
134 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
135 uint8_t next_protocol = 0xff;
136 switch (item->type) {
137 case RTE_FLOW_ITEM_TYPE_GRE:
138 case RTE_FLOW_ITEM_TYPE_NVGRE:
139 case RTE_FLOW_ITEM_TYPE_VXLAN:
140 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
141 case RTE_FLOW_ITEM_TYPE_GENEVE:
142 case RTE_FLOW_ITEM_TYPE_MPLS:
146 case RTE_FLOW_ITEM_TYPE_IPV4:
149 if (item->mask != NULL &&
150 ((const struct rte_flow_item_ipv4 *)
151 item->mask)->hdr.next_proto_id)
153 ((const struct rte_flow_item_ipv4 *)
154 (item->spec))->hdr.next_proto_id &
155 ((const struct rte_flow_item_ipv4 *)
156 (item->mask))->hdr.next_proto_id;
157 if ((next_protocol == IPPROTO_IPIP ||
158 next_protocol == IPPROTO_IPV6) && tunnel_decap)
161 case RTE_FLOW_ITEM_TYPE_IPV6:
164 if (item->mask != NULL &&
165 ((const struct rte_flow_item_ipv6 *)
166 item->mask)->hdr.proto)
168 ((const struct rte_flow_item_ipv6 *)
169 (item->spec))->hdr.proto &
170 ((const struct rte_flow_item_ipv6 *)
171 (item->mask))->hdr.proto;
172 if ((next_protocol == IPPROTO_IPIP ||
173 next_protocol == IPPROTO_IPV6) && tunnel_decap)
176 case RTE_FLOW_ITEM_TYPE_UDP:
180 case RTE_FLOW_ITEM_TYPE_TCP:
192 * Convert rte_mtr_color to mlx5 color.
201 rte_col_2_mlx5_col(enum rte_color rcol)
204 case RTE_COLOR_GREEN:
205 return MLX5_FLOW_COLOR_GREEN;
206 case RTE_COLOR_YELLOW:
207 return MLX5_FLOW_COLOR_YELLOW;
209 return MLX5_FLOW_COLOR_RED;
213 return MLX5_FLOW_COLOR_UNDEFINED;
216 struct field_modify_info {
217 uint32_t size; /* Size of field in protocol header, in bytes. */
218 uint32_t offset; /* Offset of field in protocol header, in bytes. */
219 enum mlx5_modification_field id;
222 struct field_modify_info modify_eth[] = {
223 {4, 0, MLX5_MODI_OUT_DMAC_47_16},
224 {2, 4, MLX5_MODI_OUT_DMAC_15_0},
225 {4, 6, MLX5_MODI_OUT_SMAC_47_16},
226 {2, 10, MLX5_MODI_OUT_SMAC_15_0},
230 struct field_modify_info modify_vlan_out_first_vid[] = {
231 /* Size in bits !!! */
232 {12, 0, MLX5_MODI_OUT_FIRST_VID},
236 struct field_modify_info modify_ipv4[] = {
237 {1, 1, MLX5_MODI_OUT_IP_DSCP},
238 {1, 8, MLX5_MODI_OUT_IPV4_TTL},
239 {4, 12, MLX5_MODI_OUT_SIPV4},
240 {4, 16, MLX5_MODI_OUT_DIPV4},
244 struct field_modify_info modify_ipv6[] = {
245 {1, 0, MLX5_MODI_OUT_IP_DSCP},
246 {1, 7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
247 {4, 8, MLX5_MODI_OUT_SIPV6_127_96},
248 {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
249 {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
250 {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
251 {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
252 {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
253 {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
254 {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
258 struct field_modify_info modify_udp[] = {
259 {2, 0, MLX5_MODI_OUT_UDP_SPORT},
260 {2, 2, MLX5_MODI_OUT_UDP_DPORT},
264 struct field_modify_info modify_tcp[] = {
265 {2, 0, MLX5_MODI_OUT_TCP_SPORT},
266 {2, 2, MLX5_MODI_OUT_TCP_DPORT},
267 {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
268 {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
272 static const struct rte_flow_item *
273 mlx5_flow_find_tunnel_item(const struct rte_flow_item *item)
275 for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
276 switch (item->type) {
279 case RTE_FLOW_ITEM_TYPE_VXLAN:
280 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
281 case RTE_FLOW_ITEM_TYPE_GRE:
282 case RTE_FLOW_ITEM_TYPE_MPLS:
283 case RTE_FLOW_ITEM_TYPE_NVGRE:
284 case RTE_FLOW_ITEM_TYPE_GENEVE:
286 case RTE_FLOW_ITEM_TYPE_IPV4:
287 case RTE_FLOW_ITEM_TYPE_IPV6:
288 if (item[1].type == RTE_FLOW_ITEM_TYPE_IPV4 ||
289 item[1].type == RTE_FLOW_ITEM_TYPE_IPV6)
298 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
299 uint8_t next_protocol, uint64_t *item_flags,
302 MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
303 item->type == RTE_FLOW_ITEM_TYPE_IPV6);
304 if (next_protocol == IPPROTO_IPIP) {
305 *item_flags |= MLX5_FLOW_LAYER_IPIP;
308 if (next_protocol == IPPROTO_IPV6) {
309 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
314 /* Update VLAN's VID/PCP based on input rte_flow_action.
317 * Pointer to struct rte_flow_action.
319 * Pointer to struct rte_vlan_hdr.
322 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
323 struct rte_vlan_hdr *vlan)
326 if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
328 ((const struct rte_flow_action_of_set_vlan_pcp *)
329 action->conf)->vlan_pcp;
330 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
331 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
332 vlan->vlan_tci |= vlan_tci;
333 } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
334 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
335 vlan->vlan_tci |= rte_be_to_cpu_16
336 (((const struct rte_flow_action_of_set_vlan_vid *)
337 action->conf)->vlan_vid);
342 * Fetch 1, 2, 3 or 4 byte field from the byte array
343 * and return as unsigned integer in host-endian format.
346 * Pointer to data array.
348 * Size of field to extract.
351 * converted field in host endian format.
353 static inline uint32_t
354 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
363 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
366 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
367 ret = (ret << 8) | *(data + sizeof(uint16_t));
370 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
381 * Convert modify-header action to DV specification.
383 * Data length of each action is determined by provided field description
384 * and the item mask. Data bit offset and width of each action is determined
385 * by provided item mask.
388 * Pointer to item specification.
390 * Pointer to field modification information.
391 * For MLX5_MODIFICATION_TYPE_SET specifies destination field.
392 * For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
393 * For MLX5_MODIFICATION_TYPE_COPY specifies source field.
395 * Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
396 * Negative offset value sets the same offset as source offset.
397 * size field is ignored, value is taken from source field.
398 * @param[in,out] resource
399 * Pointer to the modify-header resource.
401 * Type of modification.
403 * Pointer to the error structure.
406 * 0 on success, a negative errno value otherwise and rte_errno is set.
409 flow_dv_convert_modify_action(struct rte_flow_item *item,
410 struct field_modify_info *field,
411 struct field_modify_info *dcopy,
412 struct mlx5_flow_dv_modify_hdr_resource *resource,
413 uint32_t type, struct rte_flow_error *error)
415 uint32_t i = resource->actions_num;
416 struct mlx5_modification_cmd *actions = resource->actions;
417 uint32_t carry_b = 0;
420 * The item and mask are provided in big-endian format.
421 * The fields should be presented as in big-endian format either.
422 * Mask must be always present, it defines the actual field width.
424 MLX5_ASSERT(item->mask);
425 MLX5_ASSERT(field->size);
431 bool next_field = true;
432 bool next_dcopy = true;
434 if (i >= MLX5_MAX_MODIFY_NUM)
435 return rte_flow_error_set(error, EINVAL,
436 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
437 "too many items to modify");
438 /* Fetch variable byte size mask from the array. */
439 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
440 field->offset, field->size);
445 /* Deduce actual data width in bits from mask value. */
446 off_b = rte_bsf32(mask) + carry_b;
447 size_b = sizeof(uint32_t) * CHAR_BIT -
448 off_b - __builtin_clz(mask);
450 actions[i] = (struct mlx5_modification_cmd) {
454 .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
457 if (type == MLX5_MODIFICATION_TYPE_COPY) {
459 actions[i].dst_field = dcopy->id;
460 actions[i].dst_offset =
461 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
462 /* Convert entire record to big-endian format. */
463 actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
465 * Destination field overflow. Copy leftovers of
466 * a source field to the next destination field.
469 if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
472 dcopy->size * CHAR_BIT - dcopy->offset;
473 carry_b = actions[i].length;
477 * Not enough bits in a source filed to fill a
478 * destination field. Switch to the next source.
480 if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
481 (size_b == field->size * CHAR_BIT - off_b)) {
483 field->size * CHAR_BIT - off_b;
484 dcopy->offset += actions[i].length;
490 MLX5_ASSERT(item->spec);
491 data = flow_dv_fetch_field((const uint8_t *)item->spec +
492 field->offset, field->size);
493 /* Shift out the trailing masked bits from data. */
494 data = (data & mask) >> off_b;
495 actions[i].data1 = rte_cpu_to_be_32(data);
497 /* Convert entire record to expected big-endian format. */
498 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
502 } while (field->size);
503 if (resource->actions_num == i)
504 return rte_flow_error_set(error, EINVAL,
505 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
506 "invalid modification flow item");
507 resource->actions_num = i;
512 * Convert modify-header set IPv4 address action to DV specification.
514 * @param[in,out] resource
515 * Pointer to the modify-header resource.
517 * Pointer to action specification.
519 * Pointer to the error structure.
522 * 0 on success, a negative errno value otherwise and rte_errno is set.
525 flow_dv_convert_action_modify_ipv4
526 (struct mlx5_flow_dv_modify_hdr_resource *resource,
527 const struct rte_flow_action *action,
528 struct rte_flow_error *error)
530 const struct rte_flow_action_set_ipv4 *conf =
531 (const struct rte_flow_action_set_ipv4 *)(action->conf);
532 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
533 struct rte_flow_item_ipv4 ipv4;
534 struct rte_flow_item_ipv4 ipv4_mask;
536 memset(&ipv4, 0, sizeof(ipv4));
537 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
538 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
539 ipv4.hdr.src_addr = conf->ipv4_addr;
540 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
542 ipv4.hdr.dst_addr = conf->ipv4_addr;
543 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
546 item.mask = &ipv4_mask;
547 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
548 MLX5_MODIFICATION_TYPE_SET, error);
552 * Convert modify-header set IPv6 address action to DV specification.
554 * @param[in,out] resource
555 * Pointer to the modify-header resource.
557 * Pointer to action specification.
559 * Pointer to the error structure.
562 * 0 on success, a negative errno value otherwise and rte_errno is set.
565 flow_dv_convert_action_modify_ipv6
566 (struct mlx5_flow_dv_modify_hdr_resource *resource,
567 const struct rte_flow_action *action,
568 struct rte_flow_error *error)
570 const struct rte_flow_action_set_ipv6 *conf =
571 (const struct rte_flow_action_set_ipv6 *)(action->conf);
572 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
573 struct rte_flow_item_ipv6 ipv6;
574 struct rte_flow_item_ipv6 ipv6_mask;
576 memset(&ipv6, 0, sizeof(ipv6));
577 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
578 if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
579 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
580 sizeof(ipv6.hdr.src_addr));
581 memcpy(&ipv6_mask.hdr.src_addr,
582 &rte_flow_item_ipv6_mask.hdr.src_addr,
583 sizeof(ipv6.hdr.src_addr));
585 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
586 sizeof(ipv6.hdr.dst_addr));
587 memcpy(&ipv6_mask.hdr.dst_addr,
588 &rte_flow_item_ipv6_mask.hdr.dst_addr,
589 sizeof(ipv6.hdr.dst_addr));
592 item.mask = &ipv6_mask;
593 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
594 MLX5_MODIFICATION_TYPE_SET, error);
598 * Convert modify-header set MAC address action to DV specification.
600 * @param[in,out] resource
601 * Pointer to the modify-header resource.
603 * Pointer to action specification.
605 * Pointer to the error structure.
608 * 0 on success, a negative errno value otherwise and rte_errno is set.
611 flow_dv_convert_action_modify_mac
612 (struct mlx5_flow_dv_modify_hdr_resource *resource,
613 const struct rte_flow_action *action,
614 struct rte_flow_error *error)
616 const struct rte_flow_action_set_mac *conf =
617 (const struct rte_flow_action_set_mac *)(action->conf);
618 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
619 struct rte_flow_item_eth eth;
620 struct rte_flow_item_eth eth_mask;
622 memset(ð, 0, sizeof(eth));
623 memset(ð_mask, 0, sizeof(eth_mask));
624 if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
625 memcpy(ð.src.addr_bytes, &conf->mac_addr,
626 sizeof(eth.src.addr_bytes));
627 memcpy(ð_mask.src.addr_bytes,
628 &rte_flow_item_eth_mask.src.addr_bytes,
629 sizeof(eth_mask.src.addr_bytes));
631 memcpy(ð.dst.addr_bytes, &conf->mac_addr,
632 sizeof(eth.dst.addr_bytes));
633 memcpy(ð_mask.dst.addr_bytes,
634 &rte_flow_item_eth_mask.dst.addr_bytes,
635 sizeof(eth_mask.dst.addr_bytes));
638 item.mask = ð_mask;
639 return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
640 MLX5_MODIFICATION_TYPE_SET, error);
644 * Convert modify-header set VLAN VID action to DV specification.
646 * @param[in,out] resource
647 * Pointer to the modify-header resource.
649 * Pointer to action specification.
651 * Pointer to the error structure.
654 * 0 on success, a negative errno value otherwise and rte_errno is set.
657 flow_dv_convert_action_modify_vlan_vid
658 (struct mlx5_flow_dv_modify_hdr_resource *resource,
659 const struct rte_flow_action *action,
660 struct rte_flow_error *error)
662 const struct rte_flow_action_of_set_vlan_vid *conf =
663 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
664 int i = resource->actions_num;
665 struct mlx5_modification_cmd *actions = resource->actions;
666 struct field_modify_info *field = modify_vlan_out_first_vid;
668 if (i >= MLX5_MAX_MODIFY_NUM)
669 return rte_flow_error_set(error, EINVAL,
670 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
671 "too many items to modify");
672 actions[i] = (struct mlx5_modification_cmd) {
673 .action_type = MLX5_MODIFICATION_TYPE_SET,
675 .length = field->size,
676 .offset = field->offset,
678 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
679 actions[i].data1 = conf->vlan_vid;
680 actions[i].data1 = actions[i].data1 << 16;
681 resource->actions_num = ++i;
686 * Convert modify-header set TP action to DV specification.
688 * @param[in,out] resource
689 * Pointer to the modify-header resource.
691 * Pointer to action specification.
693 * Pointer to rte_flow_item objects list.
695 * Pointer to flow attributes structure.
696 * @param[in] dev_flow
697 * Pointer to the sub flow.
698 * @param[in] tunnel_decap
699 * Whether action is after tunnel decapsulation.
701 * Pointer to the error structure.
704 * 0 on success, a negative errno value otherwise and rte_errno is set.
707 flow_dv_convert_action_modify_tp
708 (struct mlx5_flow_dv_modify_hdr_resource *resource,
709 const struct rte_flow_action *action,
710 const struct rte_flow_item *items,
711 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
712 bool tunnel_decap, struct rte_flow_error *error)
714 const struct rte_flow_action_set_tp *conf =
715 (const struct rte_flow_action_set_tp *)(action->conf);
716 struct rte_flow_item item;
717 struct rte_flow_item_udp udp;
718 struct rte_flow_item_udp udp_mask;
719 struct rte_flow_item_tcp tcp;
720 struct rte_flow_item_tcp tcp_mask;
721 struct field_modify_info *field;
724 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
726 memset(&udp, 0, sizeof(udp));
727 memset(&udp_mask, 0, sizeof(udp_mask));
728 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
729 udp.hdr.src_port = conf->port;
730 udp_mask.hdr.src_port =
731 rte_flow_item_udp_mask.hdr.src_port;
733 udp.hdr.dst_port = conf->port;
734 udp_mask.hdr.dst_port =
735 rte_flow_item_udp_mask.hdr.dst_port;
737 item.type = RTE_FLOW_ITEM_TYPE_UDP;
739 item.mask = &udp_mask;
742 MLX5_ASSERT(attr->tcp);
743 memset(&tcp, 0, sizeof(tcp));
744 memset(&tcp_mask, 0, sizeof(tcp_mask));
745 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
746 tcp.hdr.src_port = conf->port;
747 tcp_mask.hdr.src_port =
748 rte_flow_item_tcp_mask.hdr.src_port;
750 tcp.hdr.dst_port = conf->port;
751 tcp_mask.hdr.dst_port =
752 rte_flow_item_tcp_mask.hdr.dst_port;
754 item.type = RTE_FLOW_ITEM_TYPE_TCP;
756 item.mask = &tcp_mask;
759 return flow_dv_convert_modify_action(&item, field, NULL, resource,
760 MLX5_MODIFICATION_TYPE_SET, error);
764 * Convert modify-header set TTL action to DV specification.
766 * @param[in,out] resource
767 * Pointer to the modify-header resource.
769 * Pointer to action specification.
771 * Pointer to rte_flow_item objects list.
773 * Pointer to flow attributes structure.
774 * @param[in] dev_flow
775 * Pointer to the sub flow.
776 * @param[in] tunnel_decap
777 * Whether action is after tunnel decapsulation.
779 * Pointer to the error structure.
782 * 0 on success, a negative errno value otherwise and rte_errno is set.
785 flow_dv_convert_action_modify_ttl
786 (struct mlx5_flow_dv_modify_hdr_resource *resource,
787 const struct rte_flow_action *action,
788 const struct rte_flow_item *items,
789 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
790 bool tunnel_decap, struct rte_flow_error *error)
792 const struct rte_flow_action_set_ttl *conf =
793 (const struct rte_flow_action_set_ttl *)(action->conf);
794 struct rte_flow_item item;
795 struct rte_flow_item_ipv4 ipv4;
796 struct rte_flow_item_ipv4 ipv4_mask;
797 struct rte_flow_item_ipv6 ipv6;
798 struct rte_flow_item_ipv6 ipv6_mask;
799 struct field_modify_info *field;
802 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
804 memset(&ipv4, 0, sizeof(ipv4));
805 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
806 ipv4.hdr.time_to_live = conf->ttl_value;
807 ipv4_mask.hdr.time_to_live = 0xFF;
808 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
810 item.mask = &ipv4_mask;
813 MLX5_ASSERT(attr->ipv6);
814 memset(&ipv6, 0, sizeof(ipv6));
815 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
816 ipv6.hdr.hop_limits = conf->ttl_value;
817 ipv6_mask.hdr.hop_limits = 0xFF;
818 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
820 item.mask = &ipv6_mask;
823 return flow_dv_convert_modify_action(&item, field, NULL, resource,
824 MLX5_MODIFICATION_TYPE_SET, error);
828 * Convert modify-header decrement TTL action to DV specification.
830 * @param[in,out] resource
831 * Pointer to the modify-header resource.
833 * Pointer to action specification.
835 * Pointer to rte_flow_item objects list.
837 * Pointer to flow attributes structure.
838 * @param[in] dev_flow
839 * Pointer to the sub flow.
840 * @param[in] tunnel_decap
841 * Whether action is after tunnel decapsulation.
843 * Pointer to the error structure.
846 * 0 on success, a negative errno value otherwise and rte_errno is set.
849 flow_dv_convert_action_modify_dec_ttl
850 (struct mlx5_flow_dv_modify_hdr_resource *resource,
851 const struct rte_flow_item *items,
852 union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
853 bool tunnel_decap, struct rte_flow_error *error)
855 struct rte_flow_item item;
856 struct rte_flow_item_ipv4 ipv4;
857 struct rte_flow_item_ipv4 ipv4_mask;
858 struct rte_flow_item_ipv6 ipv6;
859 struct rte_flow_item_ipv6 ipv6_mask;
860 struct field_modify_info *field;
863 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
865 memset(&ipv4, 0, sizeof(ipv4));
866 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
867 ipv4.hdr.time_to_live = 0xFF;
868 ipv4_mask.hdr.time_to_live = 0xFF;
869 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
871 item.mask = &ipv4_mask;
874 MLX5_ASSERT(attr->ipv6);
875 memset(&ipv6, 0, sizeof(ipv6));
876 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
877 ipv6.hdr.hop_limits = 0xFF;
878 ipv6_mask.hdr.hop_limits = 0xFF;
879 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
881 item.mask = &ipv6_mask;
884 return flow_dv_convert_modify_action(&item, field, NULL, resource,
885 MLX5_MODIFICATION_TYPE_ADD, error);
889 * Convert modify-header increment/decrement TCP Sequence number
890 * to DV specification.
892 * @param[in,out] resource
893 * Pointer to the modify-header resource.
895 * Pointer to action specification.
897 * Pointer to the error structure.
900 * 0 on success, a negative errno value otherwise and rte_errno is set.
903 flow_dv_convert_action_modify_tcp_seq
904 (struct mlx5_flow_dv_modify_hdr_resource *resource,
905 const struct rte_flow_action *action,
906 struct rte_flow_error *error)
908 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
909 uint64_t value = rte_be_to_cpu_32(*conf);
910 struct rte_flow_item item;
911 struct rte_flow_item_tcp tcp;
912 struct rte_flow_item_tcp tcp_mask;
914 memset(&tcp, 0, sizeof(tcp));
915 memset(&tcp_mask, 0, sizeof(tcp_mask));
916 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
918 * The HW has no decrement operation, only increment operation.
919 * To simulate decrement X from Y using increment operation
920 * we need to add UINT32_MAX X times to Y.
921 * Each adding of UINT32_MAX decrements Y by 1.
924 tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
925 tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
926 item.type = RTE_FLOW_ITEM_TYPE_TCP;
928 item.mask = &tcp_mask;
929 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
930 MLX5_MODIFICATION_TYPE_ADD, error);
934 * Convert modify-header increment/decrement TCP Acknowledgment number
935 * to DV specification.
937 * @param[in,out] resource
938 * Pointer to the modify-header resource.
940 * Pointer to action specification.
942 * Pointer to the error structure.
945 * 0 on success, a negative errno value otherwise and rte_errno is set.
948 flow_dv_convert_action_modify_tcp_ack
949 (struct mlx5_flow_dv_modify_hdr_resource *resource,
950 const struct rte_flow_action *action,
951 struct rte_flow_error *error)
953 const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
954 uint64_t value = rte_be_to_cpu_32(*conf);
955 struct rte_flow_item item;
956 struct rte_flow_item_tcp tcp;
957 struct rte_flow_item_tcp tcp_mask;
959 memset(&tcp, 0, sizeof(tcp));
960 memset(&tcp_mask, 0, sizeof(tcp_mask));
961 if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
963 * The HW has no decrement operation, only increment operation.
964 * To simulate decrement X from Y using increment operation
965 * we need to add UINT32_MAX X times to Y.
966 * Each adding of UINT32_MAX decrements Y by 1.
969 tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
970 tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
971 item.type = RTE_FLOW_ITEM_TYPE_TCP;
973 item.mask = &tcp_mask;
974 return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
975 MLX5_MODIFICATION_TYPE_ADD, error);
978 static enum mlx5_modification_field reg_to_field[] = {
979 [REG_NON] = MLX5_MODI_OUT_NONE,
980 [REG_A] = MLX5_MODI_META_DATA_REG_A,
981 [REG_B] = MLX5_MODI_META_DATA_REG_B,
982 [REG_C_0] = MLX5_MODI_META_REG_C_0,
983 [REG_C_1] = MLX5_MODI_META_REG_C_1,
984 [REG_C_2] = MLX5_MODI_META_REG_C_2,
985 [REG_C_3] = MLX5_MODI_META_REG_C_3,
986 [REG_C_4] = MLX5_MODI_META_REG_C_4,
987 [REG_C_5] = MLX5_MODI_META_REG_C_5,
988 [REG_C_6] = MLX5_MODI_META_REG_C_6,
989 [REG_C_7] = MLX5_MODI_META_REG_C_7,
993 * Convert register set to DV specification.
995 * @param[in,out] resource
996 * Pointer to the modify-header resource.
998 * Pointer to action specification.
1000 * Pointer to the error structure.
1003 * 0 on success, a negative errno value otherwise and rte_errno is set.
1006 flow_dv_convert_action_set_reg
1007 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1008 const struct rte_flow_action *action,
1009 struct rte_flow_error *error)
1011 const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1012 struct mlx5_modification_cmd *actions = resource->actions;
1013 uint32_t i = resource->actions_num;
1015 if (i >= MLX5_MAX_MODIFY_NUM)
1016 return rte_flow_error_set(error, EINVAL,
1017 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1018 "too many items to modify");
1019 MLX5_ASSERT(conf->id != REG_NON);
1020 MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1021 actions[i] = (struct mlx5_modification_cmd) {
1022 .action_type = MLX5_MODIFICATION_TYPE_SET,
1023 .field = reg_to_field[conf->id],
1024 .offset = conf->offset,
1025 .length = conf->length,
1027 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1028 actions[i].data1 = rte_cpu_to_be_32(conf->data);
1030 resource->actions_num = i;
1035 * Convert SET_TAG action to DV specification.
1038 * Pointer to the rte_eth_dev structure.
1039 * @param[in,out] resource
1040 * Pointer to the modify-header resource.
1042 * Pointer to action specification.
1044 * Pointer to the error structure.
1047 * 0 on success, a negative errno value otherwise and rte_errno is set.
1050 flow_dv_convert_action_set_tag
1051 (struct rte_eth_dev *dev,
1052 struct mlx5_flow_dv_modify_hdr_resource *resource,
1053 const struct rte_flow_action_set_tag *conf,
1054 struct rte_flow_error *error)
1056 rte_be32_t data = rte_cpu_to_be_32(conf->data);
1057 rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1058 struct rte_flow_item item = {
1062 struct field_modify_info reg_c_x[] = {
1065 enum mlx5_modification_field reg_type;
1068 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1071 MLX5_ASSERT(ret != REG_NON);
1072 MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1073 reg_type = reg_to_field[ret];
1074 MLX5_ASSERT(reg_type > 0);
1075 reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1076 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1077 MLX5_MODIFICATION_TYPE_SET, error);
1081 * Convert internal COPY_REG action to DV specification.
1084 * Pointer to the rte_eth_dev structure.
1085 * @param[in,out] res
1086 * Pointer to the modify-header resource.
1088 * Pointer to action specification.
1090 * Pointer to the error structure.
1093 * 0 on success, a negative errno value otherwise and rte_errno is set.
1096 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1097 struct mlx5_flow_dv_modify_hdr_resource *res,
1098 const struct rte_flow_action *action,
1099 struct rte_flow_error *error)
1101 const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1102 rte_be32_t mask = RTE_BE32(UINT32_MAX);
1103 struct rte_flow_item item = {
1107 struct field_modify_info reg_src[] = {
1108 {4, 0, reg_to_field[conf->src]},
1111 struct field_modify_info reg_dst = {
1113 .id = reg_to_field[conf->dst],
1115 /* Adjust reg_c[0] usage according to reported mask. */
1116 if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1117 struct mlx5_priv *priv = dev->data->dev_private;
1118 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1120 MLX5_ASSERT(reg_c0);
1121 MLX5_ASSERT(priv->config.dv_xmeta_en != MLX5_XMETA_MODE_LEGACY);
1122 if (conf->dst == REG_C_0) {
1123 /* Copy to reg_c[0], within mask only. */
1124 reg_dst.offset = rte_bsf32(reg_c0);
1126 * Mask is ignoring the enianness, because
1127 * there is no conversion in datapath.
1129 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1130 /* Copy from destination lower bits to reg_c[0]. */
1131 mask = reg_c0 >> reg_dst.offset;
1133 /* Copy from destination upper bits to reg_c[0]. */
1134 mask = reg_c0 << (sizeof(reg_c0) * CHAR_BIT -
1135 rte_fls_u32(reg_c0));
1138 mask = rte_cpu_to_be_32(reg_c0);
1139 #if RTE_BYTE_ORDER == RTE_BIG_ENDIAN
1140 /* Copy from reg_c[0] to destination lower bits. */
1143 /* Copy from reg_c[0] to destination upper bits. */
1144 reg_dst.offset = sizeof(reg_c0) * CHAR_BIT -
1145 (rte_fls_u32(reg_c0) -
1150 return flow_dv_convert_modify_action(&item,
1151 reg_src, ®_dst, res,
1152 MLX5_MODIFICATION_TYPE_COPY,
1157 * Convert MARK action to DV specification. This routine is used
1158 * in extensive metadata only and requires metadata register to be
1159 * handled. In legacy mode hardware tag resource is engaged.
1162 * Pointer to the rte_eth_dev structure.
1164 * Pointer to MARK action specification.
1165 * @param[in,out] resource
1166 * Pointer to the modify-header resource.
1168 * Pointer to the error structure.
1171 * 0 on success, a negative errno value otherwise and rte_errno is set.
1174 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1175 const struct rte_flow_action_mark *conf,
1176 struct mlx5_flow_dv_modify_hdr_resource *resource,
1177 struct rte_flow_error *error)
1179 struct mlx5_priv *priv = dev->data->dev_private;
1180 rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1181 priv->sh->dv_mark_mask);
1182 rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1183 struct rte_flow_item item = {
1187 struct field_modify_info reg_c_x[] = {
1193 return rte_flow_error_set(error, EINVAL,
1194 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1195 NULL, "zero mark action mask");
1196 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1199 MLX5_ASSERT(reg > 0);
1200 if (reg == REG_C_0) {
1201 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1202 uint32_t shl_c0 = rte_bsf32(msk_c0);
1204 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1205 mask = rte_cpu_to_be_32(mask) & msk_c0;
1206 mask = rte_cpu_to_be_32(mask << shl_c0);
1208 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1209 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1210 MLX5_MODIFICATION_TYPE_SET, error);
1214 * Get metadata register index for specified steering domain.
1217 * Pointer to the rte_eth_dev structure.
1219 * Attributes of flow to determine steering domain.
1221 * Pointer to the error structure.
1224 * positive index on success, a negative errno value otherwise
1225 * and rte_errno is set.
1227 static enum modify_reg
1228 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1229 const struct rte_flow_attr *attr,
1230 struct rte_flow_error *error)
1233 mlx5_flow_get_reg_id(dev, attr->transfer ?
1237 MLX5_METADATA_RX, 0, error);
1239 return rte_flow_error_set(error,
1240 ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1241 NULL, "unavailable "
1242 "metadata register");
1247 * Convert SET_META action to DV specification.
1250 * Pointer to the rte_eth_dev structure.
1251 * @param[in,out] resource
1252 * Pointer to the modify-header resource.
1254 * Attributes of flow that includes this item.
1256 * Pointer to action specification.
1258 * Pointer to the error structure.
1261 * 0 on success, a negative errno value otherwise and rte_errno is set.
1264 flow_dv_convert_action_set_meta
1265 (struct rte_eth_dev *dev,
1266 struct mlx5_flow_dv_modify_hdr_resource *resource,
1267 const struct rte_flow_attr *attr,
1268 const struct rte_flow_action_set_meta *conf,
1269 struct rte_flow_error *error)
1271 uint32_t mask = rte_cpu_to_be_32(conf->mask);
1272 uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1273 struct rte_flow_item item = {
1277 struct field_modify_info reg_c_x[] = {
1280 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1284 MLX5_ASSERT(reg != REG_NON);
1285 if (reg == REG_C_0) {
1286 struct mlx5_priv *priv = dev->data->dev_private;
1287 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1288 uint32_t shl_c0 = rte_bsf32(msk_c0);
1290 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1291 mask = rte_cpu_to_be_32(mask) & msk_c0;
1292 mask = rte_cpu_to_be_32(mask << shl_c0);
1294 reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1295 /* The routine expects parameters in memory as big-endian ones. */
1296 return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1297 MLX5_MODIFICATION_TYPE_SET, error);
1301 * Convert modify-header set IPv4 DSCP action to DV specification.
1303 * @param[in,out] resource
1304 * Pointer to the modify-header resource.
1306 * Pointer to action specification.
1308 * Pointer to the error structure.
1311 * 0 on success, a negative errno value otherwise and rte_errno is set.
1314 flow_dv_convert_action_modify_ipv4_dscp
1315 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1316 const struct rte_flow_action *action,
1317 struct rte_flow_error *error)
1319 const struct rte_flow_action_set_dscp *conf =
1320 (const struct rte_flow_action_set_dscp *)(action->conf);
1321 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1322 struct rte_flow_item_ipv4 ipv4;
1323 struct rte_flow_item_ipv4 ipv4_mask;
1325 memset(&ipv4, 0, sizeof(ipv4));
1326 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1327 ipv4.hdr.type_of_service = conf->dscp;
1328 ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1330 item.mask = &ipv4_mask;
1331 return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1332 MLX5_MODIFICATION_TYPE_SET, error);
1336 * Convert modify-header set IPv6 DSCP action to DV specification.
1338 * @param[in,out] resource
1339 * Pointer to the modify-header resource.
1341 * Pointer to action specification.
1343 * Pointer to the error structure.
1346 * 0 on success, a negative errno value otherwise and rte_errno is set.
1349 flow_dv_convert_action_modify_ipv6_dscp
1350 (struct mlx5_flow_dv_modify_hdr_resource *resource,
1351 const struct rte_flow_action *action,
1352 struct rte_flow_error *error)
1354 const struct rte_flow_action_set_dscp *conf =
1355 (const struct rte_flow_action_set_dscp *)(action->conf);
1356 struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1357 struct rte_flow_item_ipv6 ipv6;
1358 struct rte_flow_item_ipv6 ipv6_mask;
1360 memset(&ipv6, 0, sizeof(ipv6));
1361 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1363 * Even though the DSCP bits offset of IPv6 is not byte aligned,
1364 * rdma-core only accept the DSCP bits byte aligned start from
1365 * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1366 * bits in IPv6 case as rdma-core requires byte aligned value.
1368 ipv6.hdr.vtc_flow = conf->dscp;
1369 ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1371 item.mask = &ipv6_mask;
1372 return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1373 MLX5_MODIFICATION_TYPE_SET, error);
1377 mlx5_flow_item_field_width(struct mlx5_dev_config *config,
1378 enum rte_flow_field_id field)
1381 case RTE_FLOW_FIELD_START:
1383 case RTE_FLOW_FIELD_MAC_DST:
1384 case RTE_FLOW_FIELD_MAC_SRC:
1386 case RTE_FLOW_FIELD_VLAN_TYPE:
1388 case RTE_FLOW_FIELD_VLAN_ID:
1390 case RTE_FLOW_FIELD_MAC_TYPE:
1392 case RTE_FLOW_FIELD_IPV4_DSCP:
1394 case RTE_FLOW_FIELD_IPV4_TTL:
1396 case RTE_FLOW_FIELD_IPV4_SRC:
1397 case RTE_FLOW_FIELD_IPV4_DST:
1399 case RTE_FLOW_FIELD_IPV6_DSCP:
1401 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1403 case RTE_FLOW_FIELD_IPV6_SRC:
1404 case RTE_FLOW_FIELD_IPV6_DST:
1406 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1407 case RTE_FLOW_FIELD_TCP_PORT_DST:
1409 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1410 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1412 case RTE_FLOW_FIELD_TCP_FLAGS:
1414 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1415 case RTE_FLOW_FIELD_UDP_PORT_DST:
1417 case RTE_FLOW_FIELD_VXLAN_VNI:
1418 case RTE_FLOW_FIELD_GENEVE_VNI:
1420 case RTE_FLOW_FIELD_GTP_TEID:
1421 case RTE_FLOW_FIELD_TAG:
1423 case RTE_FLOW_FIELD_MARK:
1425 case RTE_FLOW_FIELD_META:
1426 if (config->dv_xmeta_en == MLX5_XMETA_MODE_META16)
1428 else if (config->dv_xmeta_en == MLX5_XMETA_MODE_META32)
1432 case RTE_FLOW_FIELD_POINTER:
1433 case RTE_FLOW_FIELD_VALUE:
1442 mlx5_flow_field_id_to_modify_info
1443 (const struct rte_flow_action_modify_data *data,
1444 struct field_modify_info *info,
1445 uint32_t *mask, uint32_t *value,
1446 uint32_t width, uint32_t dst_width,
1447 struct rte_eth_dev *dev,
1448 const struct rte_flow_attr *attr,
1449 struct rte_flow_error *error)
1451 struct mlx5_priv *priv = dev->data->dev_private;
1452 struct mlx5_dev_config *config = &priv->config;
1456 switch (data->field) {
1457 case RTE_FLOW_FIELD_START:
1458 /* not supported yet */
1461 case RTE_FLOW_FIELD_MAC_DST:
1462 off = data->offset > 16 ? data->offset - 16 : 0;
1464 if (data->offset < 16) {
1465 info[idx] = (struct field_modify_info){2, 0,
1466 MLX5_MODI_OUT_DMAC_15_0};
1468 mask[idx] = rte_cpu_to_be_16(0xffff >>
1472 mask[idx] = RTE_BE16(0xffff);
1479 info[idx] = (struct field_modify_info){4, 4 * idx,
1480 MLX5_MODI_OUT_DMAC_47_16};
1481 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1482 (32 - width)) << off);
1484 if (data->offset < 16)
1485 info[idx++] = (struct field_modify_info){2, 0,
1486 MLX5_MODI_OUT_DMAC_15_0};
1487 info[idx] = (struct field_modify_info){4, off,
1488 MLX5_MODI_OUT_DMAC_47_16};
1491 case RTE_FLOW_FIELD_MAC_SRC:
1492 off = data->offset > 16 ? data->offset - 16 : 0;
1494 if (data->offset < 16) {
1495 info[idx] = (struct field_modify_info){2, 0,
1496 MLX5_MODI_OUT_SMAC_15_0};
1498 mask[idx] = rte_cpu_to_be_16(0xffff >>
1502 mask[idx] = RTE_BE16(0xffff);
1509 info[idx] = (struct field_modify_info){4, 4 * idx,
1510 MLX5_MODI_OUT_SMAC_47_16};
1511 mask[idx] = rte_cpu_to_be_32((0xffffffff >>
1512 (32 - width)) << off);
1514 if (data->offset < 16)
1515 info[idx++] = (struct field_modify_info){2, 0,
1516 MLX5_MODI_OUT_SMAC_15_0};
1517 info[idx] = (struct field_modify_info){4, off,
1518 MLX5_MODI_OUT_SMAC_47_16};
1521 case RTE_FLOW_FIELD_VLAN_TYPE:
1522 /* not supported yet */
1524 case RTE_FLOW_FIELD_VLAN_ID:
1525 info[idx] = (struct field_modify_info){2, 0,
1526 MLX5_MODI_OUT_FIRST_VID};
1528 mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1530 case RTE_FLOW_FIELD_MAC_TYPE:
1531 info[idx] = (struct field_modify_info){2, 0,
1532 MLX5_MODI_OUT_ETHERTYPE};
1534 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1536 case RTE_FLOW_FIELD_IPV4_DSCP:
1537 info[idx] = (struct field_modify_info){1, 0,
1538 MLX5_MODI_OUT_IP_DSCP};
1540 mask[idx] = 0x3f >> (6 - width);
1542 case RTE_FLOW_FIELD_IPV4_TTL:
1543 info[idx] = (struct field_modify_info){1, 0,
1544 MLX5_MODI_OUT_IPV4_TTL};
1546 mask[idx] = 0xff >> (8 - width);
1548 case RTE_FLOW_FIELD_IPV4_SRC:
1549 info[idx] = (struct field_modify_info){4, 0,
1550 MLX5_MODI_OUT_SIPV4};
1552 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1555 case RTE_FLOW_FIELD_IPV4_DST:
1556 info[idx] = (struct field_modify_info){4, 0,
1557 MLX5_MODI_OUT_DIPV4};
1559 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1562 case RTE_FLOW_FIELD_IPV6_DSCP:
1563 info[idx] = (struct field_modify_info){1, 0,
1564 MLX5_MODI_OUT_IP_DSCP};
1566 mask[idx] = 0x3f >> (6 - width);
1568 case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1569 info[idx] = (struct field_modify_info){1, 0,
1570 MLX5_MODI_OUT_IPV6_HOPLIMIT};
1572 mask[idx] = 0xff >> (8 - width);
1574 case RTE_FLOW_FIELD_IPV6_SRC:
1576 if (data->offset < 32) {
1577 info[idx] = (struct field_modify_info){4,
1579 MLX5_MODI_OUT_SIPV6_31_0};
1582 rte_cpu_to_be_32(0xffffffff >>
1586 mask[idx] = RTE_BE32(0xffffffff);
1593 if (data->offset < 64) {
1594 info[idx] = (struct field_modify_info){4,
1596 MLX5_MODI_OUT_SIPV6_63_32};
1599 rte_cpu_to_be_32(0xffffffff >>
1603 mask[idx] = RTE_BE32(0xffffffff);
1610 if (data->offset < 96) {
1611 info[idx] = (struct field_modify_info){4,
1613 MLX5_MODI_OUT_SIPV6_95_64};
1616 rte_cpu_to_be_32(0xffffffff >>
1620 mask[idx] = RTE_BE32(0xffffffff);
1627 info[idx] = (struct field_modify_info){4, 4 * idx,
1628 MLX5_MODI_OUT_SIPV6_127_96};
1629 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1632 if (data->offset < 32)
1633 info[idx++] = (struct field_modify_info){4, 0,
1634 MLX5_MODI_OUT_SIPV6_31_0};
1635 if (data->offset < 64)
1636 info[idx++] = (struct field_modify_info){4, 0,
1637 MLX5_MODI_OUT_SIPV6_63_32};
1638 if (data->offset < 96)
1639 info[idx++] = (struct field_modify_info){4, 0,
1640 MLX5_MODI_OUT_SIPV6_95_64};
1641 if (data->offset < 128)
1642 info[idx++] = (struct field_modify_info){4, 0,
1643 MLX5_MODI_OUT_SIPV6_127_96};
1646 case RTE_FLOW_FIELD_IPV6_DST:
1648 if (data->offset < 32) {
1649 info[idx] = (struct field_modify_info){4,
1651 MLX5_MODI_OUT_DIPV6_31_0};
1654 rte_cpu_to_be_32(0xffffffff >>
1658 mask[idx] = RTE_BE32(0xffffffff);
1665 if (data->offset < 64) {
1666 info[idx] = (struct field_modify_info){4,
1668 MLX5_MODI_OUT_DIPV6_63_32};
1671 rte_cpu_to_be_32(0xffffffff >>
1675 mask[idx] = RTE_BE32(0xffffffff);
1682 if (data->offset < 96) {
1683 info[idx] = (struct field_modify_info){4,
1685 MLX5_MODI_OUT_DIPV6_95_64};
1688 rte_cpu_to_be_32(0xffffffff >>
1692 mask[idx] = RTE_BE32(0xffffffff);
1699 info[idx] = (struct field_modify_info){4, 4 * idx,
1700 MLX5_MODI_OUT_DIPV6_127_96};
1701 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1704 if (data->offset < 32)
1705 info[idx++] = (struct field_modify_info){4, 0,
1706 MLX5_MODI_OUT_DIPV6_31_0};
1707 if (data->offset < 64)
1708 info[idx++] = (struct field_modify_info){4, 0,
1709 MLX5_MODI_OUT_DIPV6_63_32};
1710 if (data->offset < 96)
1711 info[idx++] = (struct field_modify_info){4, 0,
1712 MLX5_MODI_OUT_DIPV6_95_64};
1713 if (data->offset < 128)
1714 info[idx++] = (struct field_modify_info){4, 0,
1715 MLX5_MODI_OUT_DIPV6_127_96};
1718 case RTE_FLOW_FIELD_TCP_PORT_SRC:
1719 info[idx] = (struct field_modify_info){2, 0,
1720 MLX5_MODI_OUT_TCP_SPORT};
1722 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1724 case RTE_FLOW_FIELD_TCP_PORT_DST:
1725 info[idx] = (struct field_modify_info){2, 0,
1726 MLX5_MODI_OUT_TCP_DPORT};
1728 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1730 case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1731 info[idx] = (struct field_modify_info){4, 0,
1732 MLX5_MODI_OUT_TCP_SEQ_NUM};
1734 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1737 case RTE_FLOW_FIELD_TCP_ACK_NUM:
1738 info[idx] = (struct field_modify_info){4, 0,
1739 MLX5_MODI_OUT_TCP_ACK_NUM};
1741 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1744 case RTE_FLOW_FIELD_TCP_FLAGS:
1745 info[idx] = (struct field_modify_info){2, 0,
1746 MLX5_MODI_OUT_TCP_FLAGS};
1748 mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1750 case RTE_FLOW_FIELD_UDP_PORT_SRC:
1751 info[idx] = (struct field_modify_info){2, 0,
1752 MLX5_MODI_OUT_UDP_SPORT};
1754 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1756 case RTE_FLOW_FIELD_UDP_PORT_DST:
1757 info[idx] = (struct field_modify_info){2, 0,
1758 MLX5_MODI_OUT_UDP_DPORT};
1760 mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1762 case RTE_FLOW_FIELD_VXLAN_VNI:
1763 /* not supported yet */
1765 case RTE_FLOW_FIELD_GENEVE_VNI:
1766 /* not supported yet*/
1768 case RTE_FLOW_FIELD_GTP_TEID:
1769 info[idx] = (struct field_modify_info){4, 0,
1770 MLX5_MODI_GTP_TEID};
1772 mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1775 case RTE_FLOW_FIELD_TAG:
1777 int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1778 data->level, error);
1781 MLX5_ASSERT(reg != REG_NON);
1782 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1783 info[idx] = (struct field_modify_info){4, 0,
1787 rte_cpu_to_be_32(0xffffffff >>
1791 case RTE_FLOW_FIELD_MARK:
1793 int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1797 MLX5_ASSERT(reg != REG_NON);
1798 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1799 info[idx] = (struct field_modify_info){4, 0,
1803 rte_cpu_to_be_32(0xffffffff >>
1807 case RTE_FLOW_FIELD_META:
1809 unsigned int xmeta = config->dv_xmeta_en;
1810 int reg = flow_dv_get_metadata_reg(dev, attr, error);
1813 MLX5_ASSERT(reg != REG_NON);
1814 MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1815 if (xmeta == MLX5_XMETA_MODE_META16) {
1816 info[idx] = (struct field_modify_info){2, 0,
1819 mask[idx] = rte_cpu_to_be_16(0xffff >>
1821 } else if (xmeta == MLX5_XMETA_MODE_META32) {
1822 info[idx] = (struct field_modify_info){4, 0,
1826 rte_cpu_to_be_32(0xffffffff >>
1833 case RTE_FLOW_FIELD_POINTER:
1834 case RTE_FLOW_FIELD_VALUE:
1835 if (data->field == RTE_FLOW_FIELD_POINTER)
1836 memcpy(&val, (void *)(uintptr_t)data->value,
1840 for (idx = 0; idx < MLX5_ACT_MAX_MOD_FIELDS; idx++) {
1842 if (dst_width == 48) {
1843 /*special case for MAC addresses */
1844 value[idx] = rte_cpu_to_be_16(val);
1847 } else if (dst_width > 16) {
1848 value[idx] = rte_cpu_to_be_32(val);
1850 } else if (dst_width > 8) {
1851 value[idx] = rte_cpu_to_be_16(val);
1854 value[idx] = (uint8_t)val;
1869 * Convert modify_field action to DV specification.
1872 * Pointer to the rte_eth_dev structure.
1873 * @param[in,out] resource
1874 * Pointer to the modify-header resource.
1876 * Pointer to action specification.
1878 * Attributes of flow that includes this item.
1880 * Pointer to the error structure.
1883 * 0 on success, a negative errno value otherwise and rte_errno is set.
1886 flow_dv_convert_action_modify_field
1887 (struct rte_eth_dev *dev,
1888 struct mlx5_flow_dv_modify_hdr_resource *resource,
1889 const struct rte_flow_action *action,
1890 const struct rte_flow_attr *attr,
1891 struct rte_flow_error *error)
1893 struct mlx5_priv *priv = dev->data->dev_private;
1894 struct mlx5_dev_config *config = &priv->config;
1895 const struct rte_flow_action_modify_field *conf =
1896 (const struct rte_flow_action_modify_field *)(action->conf);
1897 struct rte_flow_item item;
1898 struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1900 struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1902 uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1903 uint32_t value[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1905 uint32_t dst_width = mlx5_flow_item_field_width(config,
1908 if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1909 conf->src.field == RTE_FLOW_FIELD_VALUE) {
1910 type = MLX5_MODIFICATION_TYPE_SET;
1911 /** For SET fill the destination field (field) first. */
1912 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1913 value, conf->width, dst_width, dev, attr, error);
1914 /** Then copy immediate value from source as per mask. */
1915 mlx5_flow_field_id_to_modify_info(&conf->src, dcopy, mask,
1916 value, conf->width, dst_width, dev, attr, error);
1919 type = MLX5_MODIFICATION_TYPE_COPY;
1920 /** For COPY fill the destination field (dcopy) without mask. */
1921 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1922 value, conf->width, dst_width, dev, attr, error);
1923 /** Then construct the source field (field) with mask. */
1924 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1925 value, conf->width, dst_width, dev, attr, error);
1928 return flow_dv_convert_modify_action(&item,
1929 field, dcopy, resource, type, error);
1933 * Validate MARK item.
1936 * Pointer to the rte_eth_dev structure.
1938 * Item specification.
1940 * Attributes of flow that includes this item.
1942 * Pointer to error structure.
1945 * 0 on success, a negative errno value otherwise and rte_errno is set.
1948 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1949 const struct rte_flow_item *item,
1950 const struct rte_flow_attr *attr __rte_unused,
1951 struct rte_flow_error *error)
1953 struct mlx5_priv *priv = dev->data->dev_private;
1954 struct mlx5_dev_config *config = &priv->config;
1955 const struct rte_flow_item_mark *spec = item->spec;
1956 const struct rte_flow_item_mark *mask = item->mask;
1957 const struct rte_flow_item_mark nic_mask = {
1958 .id = priv->sh->dv_mark_mask,
1962 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1963 return rte_flow_error_set(error, ENOTSUP,
1964 RTE_FLOW_ERROR_TYPE_ITEM, item,
1965 "extended metadata feature"
1967 if (!mlx5_flow_ext_mreg_supported(dev))
1968 return rte_flow_error_set(error, ENOTSUP,
1969 RTE_FLOW_ERROR_TYPE_ITEM, item,
1970 "extended metadata register"
1971 " isn't supported");
1973 return rte_flow_error_set(error, ENOTSUP,
1974 RTE_FLOW_ERROR_TYPE_ITEM, item,
1975 "extended metadata register"
1976 " isn't available");
1977 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1981 return rte_flow_error_set(error, EINVAL,
1982 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1984 "data cannot be empty");
1985 if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1986 return rte_flow_error_set(error, EINVAL,
1987 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1989 "mark id exceeds the limit");
1993 return rte_flow_error_set(error, EINVAL,
1994 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1995 "mask cannot be zero");
1997 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1998 (const uint8_t *)&nic_mask,
1999 sizeof(struct rte_flow_item_mark),
2000 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2007 * Validate META item.
2010 * Pointer to the rte_eth_dev structure.
2012 * Item specification.
2014 * Attributes of flow that includes this item.
2016 * Pointer to error structure.
2019 * 0 on success, a negative errno value otherwise and rte_errno is set.
2022 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
2023 const struct rte_flow_item *item,
2024 const struct rte_flow_attr *attr,
2025 struct rte_flow_error *error)
2027 struct mlx5_priv *priv = dev->data->dev_private;
2028 struct mlx5_dev_config *config = &priv->config;
2029 const struct rte_flow_item_meta *spec = item->spec;
2030 const struct rte_flow_item_meta *mask = item->mask;
2031 struct rte_flow_item_meta nic_mask = {
2038 return rte_flow_error_set(error, EINVAL,
2039 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2041 "data cannot be empty");
2042 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2043 if (!mlx5_flow_ext_mreg_supported(dev))
2044 return rte_flow_error_set(error, ENOTSUP,
2045 RTE_FLOW_ERROR_TYPE_ITEM, item,
2046 "extended metadata register"
2047 " isn't supported");
2048 reg = flow_dv_get_metadata_reg(dev, attr, error);
2052 return rte_flow_error_set(error, ENOTSUP,
2053 RTE_FLOW_ERROR_TYPE_ITEM, item,
2054 "unavalable extended metadata register");
2056 return rte_flow_error_set(error, ENOTSUP,
2057 RTE_FLOW_ERROR_TYPE_ITEM, item,
2061 nic_mask.data = priv->sh->dv_meta_mask;
2064 return rte_flow_error_set(error, ENOTSUP,
2065 RTE_FLOW_ERROR_TYPE_ITEM, item,
2066 "extended metadata feature "
2067 "should be enabled when "
2068 "meta item is requested "
2069 "with e-switch mode ");
2071 return rte_flow_error_set(error, ENOTSUP,
2072 RTE_FLOW_ERROR_TYPE_ITEM, item,
2073 "match on metadata for ingress "
2074 "is not supported in legacy "
2078 mask = &rte_flow_item_meta_mask;
2080 return rte_flow_error_set(error, EINVAL,
2081 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2082 "mask cannot be zero");
2084 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2085 (const uint8_t *)&nic_mask,
2086 sizeof(struct rte_flow_item_meta),
2087 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2092 * Validate TAG item.
2095 * Pointer to the rte_eth_dev structure.
2097 * Item specification.
2099 * Attributes of flow that includes this item.
2101 * Pointer to error structure.
2104 * 0 on success, a negative errno value otherwise and rte_errno is set.
2107 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2108 const struct rte_flow_item *item,
2109 const struct rte_flow_attr *attr __rte_unused,
2110 struct rte_flow_error *error)
2112 const struct rte_flow_item_tag *spec = item->spec;
2113 const struct rte_flow_item_tag *mask = item->mask;
2114 const struct rte_flow_item_tag nic_mask = {
2115 .data = RTE_BE32(UINT32_MAX),
2120 if (!mlx5_flow_ext_mreg_supported(dev))
2121 return rte_flow_error_set(error, ENOTSUP,
2122 RTE_FLOW_ERROR_TYPE_ITEM, item,
2123 "extensive metadata register"
2124 " isn't supported");
2126 return rte_flow_error_set(error, EINVAL,
2127 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2129 "data cannot be empty");
2131 mask = &rte_flow_item_tag_mask;
2133 return rte_flow_error_set(error, EINVAL,
2134 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2135 "mask cannot be zero");
2137 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2138 (const uint8_t *)&nic_mask,
2139 sizeof(struct rte_flow_item_tag),
2140 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2143 if (mask->index != 0xff)
2144 return rte_flow_error_set(error, EINVAL,
2145 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2146 "partial mask for tag index"
2147 " is not supported");
2148 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2151 MLX5_ASSERT(ret != REG_NON);
2156 * Validate vport item.
2159 * Pointer to the rte_eth_dev structure.
2161 * Item specification.
2163 * Attributes of flow that includes this item.
2164 * @param[in] item_flags
2165 * Bit-fields that holds the items detected until now.
2167 * Pointer to error structure.
2170 * 0 on success, a negative errno value otherwise and rte_errno is set.
2173 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2174 const struct rte_flow_item *item,
2175 const struct rte_flow_attr *attr,
2176 uint64_t item_flags,
2177 struct rte_flow_error *error)
2179 const struct rte_flow_item_port_id *spec = item->spec;
2180 const struct rte_flow_item_port_id *mask = item->mask;
2181 const struct rte_flow_item_port_id switch_mask = {
2184 struct mlx5_priv *esw_priv;
2185 struct mlx5_priv *dev_priv;
2188 if (!attr->transfer)
2189 return rte_flow_error_set(error, EINVAL,
2190 RTE_FLOW_ERROR_TYPE_ITEM,
2192 "match on port id is valid only"
2193 " when transfer flag is enabled");
2194 if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2195 return rte_flow_error_set(error, ENOTSUP,
2196 RTE_FLOW_ERROR_TYPE_ITEM, item,
2197 "multiple source ports are not"
2200 mask = &switch_mask;
2201 if (mask->id != 0xffffffff)
2202 return rte_flow_error_set(error, ENOTSUP,
2203 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2205 "no support for partial mask on"
2207 ret = mlx5_flow_item_acceptable
2208 (item, (const uint8_t *)mask,
2209 (const uint8_t *)&rte_flow_item_port_id_mask,
2210 sizeof(struct rte_flow_item_port_id),
2211 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2216 esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2218 return rte_flow_error_set(error, rte_errno,
2219 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2220 "failed to obtain E-Switch info for"
2222 dev_priv = mlx5_dev_to_eswitch_info(dev);
2224 return rte_flow_error_set(error, rte_errno,
2225 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2227 "failed to obtain E-Switch info");
2228 if (esw_priv->domain_id != dev_priv->domain_id)
2229 return rte_flow_error_set(error, EINVAL,
2230 RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2231 "cannot match on a port from a"
2232 " different E-Switch");
2237 * Validate VLAN item.
2240 * Item specification.
2241 * @param[in] item_flags
2242 * Bit-fields that holds the items detected until now.
2244 * Ethernet device flow is being created on.
2246 * Pointer to error structure.
2249 * 0 on success, a negative errno value otherwise and rte_errno is set.
2252 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2253 uint64_t item_flags,
2254 struct rte_eth_dev *dev,
2255 struct rte_flow_error *error)
2257 const struct rte_flow_item_vlan *mask = item->mask;
2258 const struct rte_flow_item_vlan nic_mask = {
2259 .tci = RTE_BE16(UINT16_MAX),
2260 .inner_type = RTE_BE16(UINT16_MAX),
2263 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2265 const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2266 MLX5_FLOW_LAYER_INNER_L4) :
2267 (MLX5_FLOW_LAYER_OUTER_L3 |
2268 MLX5_FLOW_LAYER_OUTER_L4);
2269 const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2270 MLX5_FLOW_LAYER_OUTER_VLAN;
2272 if (item_flags & vlanm)
2273 return rte_flow_error_set(error, EINVAL,
2274 RTE_FLOW_ERROR_TYPE_ITEM, item,
2275 "multiple VLAN layers not supported");
2276 else if ((item_flags & l34m) != 0)
2277 return rte_flow_error_set(error, EINVAL,
2278 RTE_FLOW_ERROR_TYPE_ITEM, item,
2279 "VLAN cannot follow L3/L4 layer");
2281 mask = &rte_flow_item_vlan_mask;
2282 ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2283 (const uint8_t *)&nic_mask,
2284 sizeof(struct rte_flow_item_vlan),
2285 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2288 if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2289 struct mlx5_priv *priv = dev->data->dev_private;
2291 if (priv->vmwa_context) {
2293 * Non-NULL context means we have a virtual machine
2294 * and SR-IOV enabled, we have to create VLAN interface
2295 * to make hypervisor to setup E-Switch vport
2296 * context correctly. We avoid creating the multiple
2297 * VLAN interfaces, so we cannot support VLAN tag mask.
2299 return rte_flow_error_set(error, EINVAL,
2300 RTE_FLOW_ERROR_TYPE_ITEM,
2302 "VLAN tag mask is not"
2303 " supported in virtual"
2311 * GTP flags are contained in 1 byte of the format:
2312 * -------------------------------------------
2313 * | bit | 0 - 2 | 3 | 4 | 5 | 6 | 7 |
2314 * |-----------------------------------------|
2315 * | value | Version | PT | Res | E | S | PN |
2316 * -------------------------------------------
2318 * Matching is supported only for GTP flags E, S, PN.
2320 #define MLX5_GTP_FLAGS_MASK 0x07
2323 * Validate GTP item.
2326 * Pointer to the rte_eth_dev structure.
2328 * Item specification.
2329 * @param[in] item_flags
2330 * Bit-fields that holds the items detected until now.
2332 * Pointer to error structure.
2335 * 0 on success, a negative errno value otherwise and rte_errno is set.
2338 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2339 const struct rte_flow_item *item,
2340 uint64_t item_flags,
2341 struct rte_flow_error *error)
2343 struct mlx5_priv *priv = dev->data->dev_private;
2344 const struct rte_flow_item_gtp *spec = item->spec;
2345 const struct rte_flow_item_gtp *mask = item->mask;
2346 const struct rte_flow_item_gtp nic_mask = {
2347 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2349 .teid = RTE_BE32(0xffffffff),
2352 if (!priv->config.hca_attr.tunnel_stateless_gtp)
2353 return rte_flow_error_set(error, ENOTSUP,
2354 RTE_FLOW_ERROR_TYPE_ITEM, item,
2355 "GTP support is not enabled");
2356 if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2357 return rte_flow_error_set(error, ENOTSUP,
2358 RTE_FLOW_ERROR_TYPE_ITEM, item,
2359 "multiple tunnel layers not"
2361 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2362 return rte_flow_error_set(error, EINVAL,
2363 RTE_FLOW_ERROR_TYPE_ITEM, item,
2364 "no outer UDP layer found");
2366 mask = &rte_flow_item_gtp_mask;
2367 if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2368 return rte_flow_error_set(error, ENOTSUP,
2369 RTE_FLOW_ERROR_TYPE_ITEM, item,
2370 "Match is supported for GTP"
2372 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2373 (const uint8_t *)&nic_mask,
2374 sizeof(struct rte_flow_item_gtp),
2375 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2379 * Validate GTP PSC item.
2382 * Item specification.
2383 * @param[in] last_item
2384 * Previous validated item in the pattern items.
2385 * @param[in] gtp_item
2386 * Previous GTP item specification.
2388 * Pointer to flow attributes.
2390 * Pointer to error structure.
2393 * 0 on success, a negative errno value otherwise and rte_errno is set.
2396 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2398 const struct rte_flow_item *gtp_item,
2399 const struct rte_flow_attr *attr,
2400 struct rte_flow_error *error)
2402 const struct rte_flow_item_gtp *gtp_spec;
2403 const struct rte_flow_item_gtp *gtp_mask;
2404 const struct rte_flow_item_gtp_psc *spec;
2405 const struct rte_flow_item_gtp_psc *mask;
2406 const struct rte_flow_item_gtp_psc nic_mask = {
2411 if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2412 return rte_flow_error_set
2413 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2414 "GTP PSC item must be preceded with GTP item");
2415 gtp_spec = gtp_item->spec;
2416 gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2417 /* GTP spec and E flag is requested to match zero. */
2419 (gtp_mask->v_pt_rsv_flags &
2420 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2421 return rte_flow_error_set
2422 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2423 "GTP E flag must be 1 to match GTP PSC");
2424 /* Check the flow is not created in group zero. */
2425 if (!attr->transfer && !attr->group)
2426 return rte_flow_error_set
2427 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2428 "GTP PSC is not supported for group 0");
2429 /* GTP spec is here and E flag is requested to match zero. */
2433 mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2434 if (spec->pdu_type > MLX5_GTP_EXT_MAX_PDU_TYPE)
2435 return rte_flow_error_set
2436 (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2437 "PDU type should be smaller than 16");
2438 return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2439 (const uint8_t *)&nic_mask,
2440 sizeof(struct rte_flow_item_gtp_psc),
2441 MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2445 * Validate IPV4 item.
2446 * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2447 * add specific validation of fragment_offset field,
2450 * Item specification.
2451 * @param[in] item_flags
2452 * Bit-fields that holds the items detected until now.
2454 * Pointer to error structure.
2457 * 0 on success, a negative errno value otherwise and rte_errno is set.
2460 flow_dv_validate_item_ipv4(const struct rte_flow_item *item,
2461 uint64_t item_flags,
2463 uint16_t ether_type,
2464 struct rte_flow_error *error)
2467 const struct rte_flow_item_ipv4 *spec = item->spec;
2468 const struct rte_flow_item_ipv4 *last = item->last;
2469 const struct rte_flow_item_ipv4 *mask = item->mask;
2470 rte_be16_t fragment_offset_spec = 0;
2471 rte_be16_t fragment_offset_last = 0;
2472 const struct rte_flow_item_ipv4 nic_ipv4_mask = {
2474 .src_addr = RTE_BE32(0xffffffff),
2475 .dst_addr = RTE_BE32(0xffffffff),
2476 .type_of_service = 0xff,
2477 .fragment_offset = RTE_BE16(0xffff),
2478 .next_proto_id = 0xff,
2479 .time_to_live = 0xff,
2483 ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2484 ether_type, &nic_ipv4_mask,
2485 MLX5_ITEM_RANGE_ACCEPTED, error);
2489 fragment_offset_spec = spec->hdr.fragment_offset &
2490 mask->hdr.fragment_offset;
2491 if (!fragment_offset_spec)
2494 * spec and mask are valid, enforce using full mask to make sure the
2495 * complete value is used correctly.
2497 if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2498 != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2499 return rte_flow_error_set(error, EINVAL,
2500 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2501 item, "must use full mask for"
2502 " fragment_offset");
2504 * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2505 * indicating this is 1st fragment of fragmented packet.
2506 * This is not yet supported in MLX5, return appropriate error message.
2508 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2509 return rte_flow_error_set(error, ENOTSUP,
2510 RTE_FLOW_ERROR_TYPE_ITEM, item,
2511 "match on first fragment not "
2513 if (fragment_offset_spec && !last)
2514 return rte_flow_error_set(error, ENOTSUP,
2515 RTE_FLOW_ERROR_TYPE_ITEM, item,
2516 "specified value not supported");
2517 /* spec and last are valid, validate the specified range. */
2518 fragment_offset_last = last->hdr.fragment_offset &
2519 mask->hdr.fragment_offset;
2521 * Match on fragment_offset spec 0x2001 and last 0x3fff
2522 * means MF is 1 and frag-offset is > 0.
2523 * This packet is fragment 2nd and onward, excluding last.
2524 * This is not yet supported in MLX5, return appropriate
2527 if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2528 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2529 return rte_flow_error_set(error, ENOTSUP,
2530 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2531 last, "match on following "
2532 "fragments not supported");
2534 * Match on fragment_offset spec 0x0001 and last 0x1fff
2535 * means MF is 0 and frag-offset is > 0.
2536 * This packet is last fragment of fragmented packet.
2537 * This is not yet supported in MLX5, return appropriate
2540 if (fragment_offset_spec == RTE_BE16(1) &&
2541 fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2542 return rte_flow_error_set(error, ENOTSUP,
2543 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2544 last, "match on last "
2545 "fragment not supported");
2547 * Match on fragment_offset spec 0x0001 and last 0x3fff
2548 * means MF and/or frag-offset is not 0.
2549 * This is a fragmented packet.
2550 * Other range values are invalid and rejected.
2552 if (!(fragment_offset_spec == RTE_BE16(1) &&
2553 fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2554 return rte_flow_error_set(error, ENOTSUP,
2555 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2556 "specified range not supported");
2561 * Validate IPV6 fragment extension item.
2564 * Item specification.
2565 * @param[in] item_flags
2566 * Bit-fields that holds the items detected until now.
2568 * Pointer to error structure.
2571 * 0 on success, a negative errno value otherwise and rte_errno is set.
2574 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2575 uint64_t item_flags,
2576 struct rte_flow_error *error)
2578 const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2579 const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2580 const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2581 rte_be16_t frag_data_spec = 0;
2582 rte_be16_t frag_data_last = 0;
2583 const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2584 const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2585 MLX5_FLOW_LAYER_OUTER_L4;
2587 struct rte_flow_item_ipv6_frag_ext nic_mask = {
2589 .next_header = 0xff,
2590 .frag_data = RTE_BE16(0xffff),
2594 if (item_flags & l4m)
2595 return rte_flow_error_set(error, EINVAL,
2596 RTE_FLOW_ERROR_TYPE_ITEM, item,
2597 "ipv6 fragment extension item cannot "
2599 if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2600 (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2601 return rte_flow_error_set(error, EINVAL,
2602 RTE_FLOW_ERROR_TYPE_ITEM, item,
2603 "ipv6 fragment extension item must "
2604 "follow ipv6 item");
2606 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2607 if (!frag_data_spec)
2610 * spec and mask are valid, enforce using full mask to make sure the
2611 * complete value is used correctly.
2613 if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2614 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2615 return rte_flow_error_set(error, EINVAL,
2616 RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2617 item, "must use full mask for"
2620 * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2621 * This is 1st fragment of fragmented packet.
2623 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2624 return rte_flow_error_set(error, ENOTSUP,
2625 RTE_FLOW_ERROR_TYPE_ITEM, item,
2626 "match on first fragment not "
2628 if (frag_data_spec && !last)
2629 return rte_flow_error_set(error, EINVAL,
2630 RTE_FLOW_ERROR_TYPE_ITEM, item,
2631 "specified value not supported");
2632 ret = mlx5_flow_item_acceptable
2633 (item, (const uint8_t *)mask,
2634 (const uint8_t *)&nic_mask,
2635 sizeof(struct rte_flow_item_ipv6_frag_ext),
2636 MLX5_ITEM_RANGE_ACCEPTED, error);
2639 /* spec and last are valid, validate the specified range. */
2640 frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2642 * Match on frag_data spec 0x0009 and last 0xfff9
2643 * means M is 1 and frag-offset is > 0.
2644 * This packet is fragment 2nd and onward, excluding last.
2645 * This is not yet supported in MLX5, return appropriate
2648 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2649 RTE_IPV6_EHDR_MF_MASK) &&
2650 frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2651 return rte_flow_error_set(error, ENOTSUP,
2652 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2653 last, "match on following "
2654 "fragments not supported");
2656 * Match on frag_data spec 0x0008 and last 0xfff8
2657 * means M is 0 and frag-offset is > 0.
2658 * This packet is last fragment of fragmented packet.
2659 * This is not yet supported in MLX5, return appropriate
2662 if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2663 frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2664 return rte_flow_error_set(error, ENOTSUP,
2665 RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2666 last, "match on last "
2667 "fragment not supported");
2668 /* Other range values are invalid and rejected. */
2669 return rte_flow_error_set(error, EINVAL,
2670 RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2671 "specified range not supported");
2675 * Validate ASO CT item.
2678 * Pointer to the rte_eth_dev structure.
2680 * Item specification.
2681 * @param[in] item_flags
2682 * Pointer to bit-fields that holds the items detected until now.
2684 * Pointer to error structure.
2687 * 0 on success, a negative errno value otherwise and rte_errno is set.
2690 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2691 const struct rte_flow_item *item,
2692 uint64_t *item_flags,
2693 struct rte_flow_error *error)
2695 const struct rte_flow_item_conntrack *spec = item->spec;
2696 const struct rte_flow_item_conntrack *mask = item->mask;
2700 if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2701 return rte_flow_error_set(error, EINVAL,
2702 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2703 "Only one CT is supported");
2705 mask = &rte_flow_item_conntrack_mask;
2706 flags = spec->flags & mask->flags;
2707 if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2708 ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2709 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2710 (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2711 return rte_flow_error_set(error, EINVAL,
2712 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2713 "Conflict status bits");
2714 /* State change also needs to be considered. */
2715 *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2720 * Validate the pop VLAN action.
2723 * Pointer to the rte_eth_dev structure.
2724 * @param[in] action_flags
2725 * Holds the actions detected until now.
2727 * Pointer to the pop vlan action.
2728 * @param[in] item_flags
2729 * The items found in this flow rule.
2731 * Pointer to flow attributes.
2733 * Pointer to error structure.
2736 * 0 on success, a negative errno value otherwise and rte_errno is set.
2739 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2740 uint64_t action_flags,
2741 const struct rte_flow_action *action,
2742 uint64_t item_flags,
2743 const struct rte_flow_attr *attr,
2744 struct rte_flow_error *error)
2746 const struct mlx5_priv *priv = dev->data->dev_private;
2750 if (!priv->sh->pop_vlan_action)
2751 return rte_flow_error_set(error, ENOTSUP,
2752 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2754 "pop vlan action is not supported");
2756 return rte_flow_error_set(error, ENOTSUP,
2757 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2759 "pop vlan action not supported for "
2761 if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2762 return rte_flow_error_set(error, ENOTSUP,
2763 RTE_FLOW_ERROR_TYPE_ACTION, action,
2764 "no support for multiple VLAN "
2766 /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2767 if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2768 !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2769 return rte_flow_error_set(error, ENOTSUP,
2770 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2772 "cannot pop vlan after decap without "
2773 "match on inner vlan in the flow");
2774 /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2775 if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2776 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2777 return rte_flow_error_set(error, ENOTSUP,
2778 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2780 "cannot pop vlan without a "
2781 "match on (outer) vlan in the flow");
2782 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2783 return rte_flow_error_set(error, EINVAL,
2784 RTE_FLOW_ERROR_TYPE_ACTION, action,
2785 "wrong action order, port_id should "
2786 "be after pop VLAN action");
2787 if (!attr->transfer && priv->representor)
2788 return rte_flow_error_set(error, ENOTSUP,
2789 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2790 "pop vlan action for VF representor "
2791 "not supported on NIC table");
2796 * Get VLAN default info from vlan match info.
2799 * the list of item specifications.
2801 * pointer VLAN info to fill to.
2804 * 0 on success, a negative errno value otherwise and rte_errno is set.
2807 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2808 struct rte_vlan_hdr *vlan)
2810 const struct rte_flow_item_vlan nic_mask = {
2811 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2812 MLX5DV_FLOW_VLAN_VID_MASK),
2813 .inner_type = RTE_BE16(0xffff),
2818 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2819 int type = items->type;
2821 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2822 type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2825 if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2826 const struct rte_flow_item_vlan *vlan_m = items->mask;
2827 const struct rte_flow_item_vlan *vlan_v = items->spec;
2829 /* If VLAN item in pattern doesn't contain data, return here. */
2834 /* Only full match values are accepted */
2835 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2836 MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2837 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2839 rte_be_to_cpu_16(vlan_v->tci &
2840 MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2842 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2843 MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2844 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2846 rte_be_to_cpu_16(vlan_v->tci &
2847 MLX5DV_FLOW_VLAN_VID_MASK_BE);
2849 if (vlan_m->inner_type == nic_mask.inner_type)
2850 vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2851 vlan_m->inner_type);
2856 * Validate the push VLAN action.
2859 * Pointer to the rte_eth_dev structure.
2860 * @param[in] action_flags
2861 * Holds the actions detected until now.
2862 * @param[in] item_flags
2863 * The items found in this flow rule.
2865 * Pointer to the action structure.
2867 * Pointer to flow attributes
2869 * Pointer to error structure.
2872 * 0 on success, a negative errno value otherwise and rte_errno is set.
2875 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2876 uint64_t action_flags,
2877 const struct rte_flow_item_vlan *vlan_m,
2878 const struct rte_flow_action *action,
2879 const struct rte_flow_attr *attr,
2880 struct rte_flow_error *error)
2882 const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2883 const struct mlx5_priv *priv = dev->data->dev_private;
2885 if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2886 push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2887 return rte_flow_error_set(error, EINVAL,
2888 RTE_FLOW_ERROR_TYPE_ACTION, action,
2889 "invalid vlan ethertype");
2890 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2891 return rte_flow_error_set(error, EINVAL,
2892 RTE_FLOW_ERROR_TYPE_ACTION, action,
2893 "wrong action order, port_id should "
2894 "be after push VLAN");
2895 if (!attr->transfer && priv->representor)
2896 return rte_flow_error_set(error, ENOTSUP,
2897 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2898 "push vlan action for VF representor "
2899 "not supported on NIC table");
2901 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2902 (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2903 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2904 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2905 !(mlx5_flow_find_action
2906 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2907 return rte_flow_error_set(error, EINVAL,
2908 RTE_FLOW_ERROR_TYPE_ACTION, action,
2909 "not full match mask on VLAN PCP and "
2910 "there is no of_set_vlan_pcp action, "
2911 "push VLAN action cannot figure out "
2914 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2915 (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2916 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2917 !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2918 !(mlx5_flow_find_action
2919 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2920 return rte_flow_error_set(error, EINVAL,
2921 RTE_FLOW_ERROR_TYPE_ACTION, action,
2922 "not full match mask on VLAN VID and "
2923 "there is no of_set_vlan_vid action, "
2924 "push VLAN action cannot figure out "
2931 * Validate the set VLAN PCP.
2933 * @param[in] action_flags
2934 * Holds the actions detected until now.
2935 * @param[in] actions
2936 * Pointer to the list of actions remaining in the flow rule.
2938 * Pointer to error structure.
2941 * 0 on success, a negative errno value otherwise and rte_errno is set.
2944 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2945 const struct rte_flow_action actions[],
2946 struct rte_flow_error *error)
2948 const struct rte_flow_action *action = actions;
2949 const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2951 if (conf->vlan_pcp > 7)
2952 return rte_flow_error_set(error, EINVAL,
2953 RTE_FLOW_ERROR_TYPE_ACTION, action,
2954 "VLAN PCP value is too big");
2955 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2956 return rte_flow_error_set(error, ENOTSUP,
2957 RTE_FLOW_ERROR_TYPE_ACTION, action,
2958 "set VLAN PCP action must follow "
2959 "the push VLAN action");
2960 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2961 return rte_flow_error_set(error, ENOTSUP,
2962 RTE_FLOW_ERROR_TYPE_ACTION, action,
2963 "Multiple VLAN PCP modification are "
2965 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2966 return rte_flow_error_set(error, EINVAL,
2967 RTE_FLOW_ERROR_TYPE_ACTION, action,
2968 "wrong action order, port_id should "
2969 "be after set VLAN PCP");
2974 * Validate the set VLAN VID.
2976 * @param[in] item_flags
2977 * Holds the items detected in this rule.
2978 * @param[in] action_flags
2979 * Holds the actions detected until now.
2980 * @param[in] actions
2981 * Pointer to the list of actions remaining in the flow rule.
2983 * Pointer to error structure.
2986 * 0 on success, a negative errno value otherwise and rte_errno is set.
2989 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
2990 uint64_t action_flags,
2991 const struct rte_flow_action actions[],
2992 struct rte_flow_error *error)
2994 const struct rte_flow_action *action = actions;
2995 const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
2997 if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
2998 return rte_flow_error_set(error, EINVAL,
2999 RTE_FLOW_ERROR_TYPE_ACTION, action,
3000 "VLAN VID value is too big");
3001 if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3002 !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3003 return rte_flow_error_set(error, ENOTSUP,
3004 RTE_FLOW_ERROR_TYPE_ACTION, action,
3005 "set VLAN VID action must follow push"
3006 " VLAN action or match on VLAN item");
3007 if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3008 return rte_flow_error_set(error, ENOTSUP,
3009 RTE_FLOW_ERROR_TYPE_ACTION, action,
3010 "Multiple VLAN VID modifications are "
3012 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3013 return rte_flow_error_set(error, EINVAL,
3014 RTE_FLOW_ERROR_TYPE_ACTION, action,
3015 "wrong action order, port_id should "
3016 "be after set VLAN VID");
3021 * Validate the FLAG action.
3024 * Pointer to the rte_eth_dev structure.
3025 * @param[in] action_flags
3026 * Holds the actions detected until now.
3028 * Pointer to flow attributes
3030 * Pointer to error structure.
3033 * 0 on success, a negative errno value otherwise and rte_errno is set.
3036 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3037 uint64_t action_flags,
3038 const struct rte_flow_attr *attr,
3039 struct rte_flow_error *error)
3041 struct mlx5_priv *priv = dev->data->dev_private;
3042 struct mlx5_dev_config *config = &priv->config;
3045 /* Fall back if no extended metadata register support. */
3046 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3047 return mlx5_flow_validate_action_flag(action_flags, attr,
3049 /* Extensive metadata mode requires registers. */
3050 if (!mlx5_flow_ext_mreg_supported(dev))
3051 return rte_flow_error_set(error, ENOTSUP,
3052 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3053 "no metadata registers "
3054 "to support flag action");
3055 if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3056 return rte_flow_error_set(error, ENOTSUP,
3057 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3058 "extended metadata register"
3059 " isn't available");
3060 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3063 MLX5_ASSERT(ret > 0);
3064 if (action_flags & MLX5_FLOW_ACTION_MARK)
3065 return rte_flow_error_set(error, EINVAL,
3066 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3067 "can't mark and flag in same flow");
3068 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3069 return rte_flow_error_set(error, EINVAL,
3070 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3072 " actions in same flow");
3077 * Validate MARK action.
3080 * Pointer to the rte_eth_dev structure.
3082 * Pointer to action.
3083 * @param[in] action_flags
3084 * Holds the actions detected until now.
3086 * Pointer to flow attributes
3088 * Pointer to error structure.
3091 * 0 on success, a negative errno value otherwise and rte_errno is set.
3094 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3095 const struct rte_flow_action *action,
3096 uint64_t action_flags,
3097 const struct rte_flow_attr *attr,
3098 struct rte_flow_error *error)
3100 struct mlx5_priv *priv = dev->data->dev_private;
3101 struct mlx5_dev_config *config = &priv->config;
3102 const struct rte_flow_action_mark *mark = action->conf;
3105 if (is_tunnel_offload_active(dev))
3106 return rte_flow_error_set(error, ENOTSUP,
3107 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3109 "if tunnel offload active");
3110 /* Fall back if no extended metadata register support. */
3111 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3112 return mlx5_flow_validate_action_mark(action, action_flags,
3114 /* Extensive metadata mode requires registers. */
3115 if (!mlx5_flow_ext_mreg_supported(dev))
3116 return rte_flow_error_set(error, ENOTSUP,
3117 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3118 "no metadata registers "
3119 "to support mark action");
3120 if (!priv->sh->dv_mark_mask)
3121 return rte_flow_error_set(error, ENOTSUP,
3122 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3123 "extended metadata register"
3124 " isn't available");
3125 ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3128 MLX5_ASSERT(ret > 0);
3130 return rte_flow_error_set(error, EINVAL,
3131 RTE_FLOW_ERROR_TYPE_ACTION, action,
3132 "configuration cannot be null");
3133 if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3134 return rte_flow_error_set(error, EINVAL,
3135 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3137 "mark id exceeds the limit");
3138 if (action_flags & MLX5_FLOW_ACTION_FLAG)
3139 return rte_flow_error_set(error, EINVAL,
3140 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3141 "can't flag and mark in same flow");
3142 if (action_flags & MLX5_FLOW_ACTION_MARK)
3143 return rte_flow_error_set(error, EINVAL,
3144 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3145 "can't have 2 mark actions in same"
3151 * Validate SET_META action.
3154 * Pointer to the rte_eth_dev structure.
3156 * Pointer to the action structure.
3157 * @param[in] action_flags
3158 * Holds the actions detected until now.
3160 * Pointer to flow attributes
3162 * Pointer to error structure.
3165 * 0 on success, a negative errno value otherwise and rte_errno is set.
3168 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3169 const struct rte_flow_action *action,
3170 uint64_t action_flags __rte_unused,
3171 const struct rte_flow_attr *attr,
3172 struct rte_flow_error *error)
3174 const struct rte_flow_action_set_meta *conf;
3175 uint32_t nic_mask = UINT32_MAX;
3178 if (!mlx5_flow_ext_mreg_supported(dev))
3179 return rte_flow_error_set(error, ENOTSUP,
3180 RTE_FLOW_ERROR_TYPE_ACTION, action,
3181 "extended metadata register"
3182 " isn't supported");
3183 reg = flow_dv_get_metadata_reg(dev, attr, error);
3187 return rte_flow_error_set(error, ENOTSUP,
3188 RTE_FLOW_ERROR_TYPE_ACTION, action,
3189 "unavalable extended metadata register");
3190 if (reg != REG_A && reg != REG_B) {
3191 struct mlx5_priv *priv = dev->data->dev_private;
3193 nic_mask = priv->sh->dv_meta_mask;
3195 if (!(action->conf))
3196 return rte_flow_error_set(error, EINVAL,
3197 RTE_FLOW_ERROR_TYPE_ACTION, action,
3198 "configuration cannot be null");
3199 conf = (const struct rte_flow_action_set_meta *)action->conf;
3201 return rte_flow_error_set(error, EINVAL,
3202 RTE_FLOW_ERROR_TYPE_ACTION, action,
3203 "zero mask doesn't have any effect");
3204 if (conf->mask & ~nic_mask)
3205 return rte_flow_error_set(error, EINVAL,
3206 RTE_FLOW_ERROR_TYPE_ACTION, action,
3207 "meta data must be within reg C0");
3212 * Validate SET_TAG action.
3215 * Pointer to the rte_eth_dev structure.
3217 * Pointer to the action structure.
3218 * @param[in] action_flags
3219 * Holds the actions detected until now.
3221 * Pointer to flow attributes
3223 * Pointer to error structure.
3226 * 0 on success, a negative errno value otherwise and rte_errno is set.
3229 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3230 const struct rte_flow_action *action,
3231 uint64_t action_flags,
3232 const struct rte_flow_attr *attr,
3233 struct rte_flow_error *error)
3235 const struct rte_flow_action_set_tag *conf;
3236 const uint64_t terminal_action_flags =
3237 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3238 MLX5_FLOW_ACTION_RSS;
3241 if (!mlx5_flow_ext_mreg_supported(dev))
3242 return rte_flow_error_set(error, ENOTSUP,
3243 RTE_FLOW_ERROR_TYPE_ACTION, action,
3244 "extensive metadata register"
3245 " isn't supported");
3246 if (!(action->conf))
3247 return rte_flow_error_set(error, EINVAL,
3248 RTE_FLOW_ERROR_TYPE_ACTION, action,
3249 "configuration cannot be null");
3250 conf = (const struct rte_flow_action_set_tag *)action->conf;
3252 return rte_flow_error_set(error, EINVAL,
3253 RTE_FLOW_ERROR_TYPE_ACTION, action,
3254 "zero mask doesn't have any effect");
3255 ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3258 if (!attr->transfer && attr->ingress &&
3259 (action_flags & terminal_action_flags))
3260 return rte_flow_error_set(error, EINVAL,
3261 RTE_FLOW_ERROR_TYPE_ACTION, action,
3262 "set_tag has no effect"
3263 " with terminal actions");
3268 * Check if action counter is shared by either old or new mechanism.
3271 * Pointer to the action structure.
3274 * True when counter is shared, false otherwise.
3277 is_shared_action_count(const struct rte_flow_action *action)
3279 const struct rte_flow_action_count *count =
3280 (const struct rte_flow_action_count *)action->conf;
3282 if ((int)action->type == MLX5_RTE_FLOW_ACTION_TYPE_COUNT)
3284 return !!(count && count->shared);
3288 * Validate count action.
3291 * Pointer to rte_eth_dev structure.
3293 * Indicator if action is shared.
3294 * @param[in] action_flags
3295 * Holds the actions detected until now.
3297 * Pointer to error structure.
3300 * 0 on success, a negative errno value otherwise and rte_errno is set.
3303 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3304 uint64_t action_flags,
3305 struct rte_flow_error *error)
3307 struct mlx5_priv *priv = dev->data->dev_private;
3309 if (!priv->config.devx)
3311 if (action_flags & MLX5_FLOW_ACTION_COUNT)
3312 return rte_flow_error_set(error, EINVAL,
3313 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3314 "duplicate count actions set");
3315 if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3316 !priv->sh->flow_hit_aso_en)
3317 return rte_flow_error_set(error, EINVAL,
3318 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3319 "old age and shared count combination is not supported");
3320 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3324 return rte_flow_error_set
3326 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3328 "count action not supported");
3332 * Validate the L2 encap action.
3335 * Pointer to the rte_eth_dev structure.
3336 * @param[in] action_flags
3337 * Holds the actions detected until now.
3339 * Pointer to the action structure.
3341 * Pointer to flow attributes.
3343 * Pointer to error structure.
3346 * 0 on success, a negative errno value otherwise and rte_errno is set.
3349 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3350 uint64_t action_flags,
3351 const struct rte_flow_action *action,
3352 const struct rte_flow_attr *attr,
3353 struct rte_flow_error *error)
3355 const struct mlx5_priv *priv = dev->data->dev_private;
3357 if (!(action->conf))
3358 return rte_flow_error_set(error, EINVAL,
3359 RTE_FLOW_ERROR_TYPE_ACTION, action,
3360 "configuration cannot be null");
3361 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3362 return rte_flow_error_set(error, EINVAL,
3363 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3364 "can only have a single encap action "
3366 if (!attr->transfer && priv->representor)
3367 return rte_flow_error_set(error, ENOTSUP,
3368 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3369 "encap action for VF representor "
3370 "not supported on NIC table");
3375 * Validate a decap action.
3378 * Pointer to the rte_eth_dev structure.
3379 * @param[in] action_flags
3380 * Holds the actions detected until now.
3382 * Pointer to the action structure.
3383 * @param[in] item_flags
3384 * Holds the items detected.
3386 * Pointer to flow attributes
3388 * Pointer to error structure.
3391 * 0 on success, a negative errno value otherwise and rte_errno is set.
3394 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3395 uint64_t action_flags,
3396 const struct rte_flow_action *action,
3397 const uint64_t item_flags,
3398 const struct rte_flow_attr *attr,
3399 struct rte_flow_error *error)
3401 const struct mlx5_priv *priv = dev->data->dev_private;
3403 if (priv->config.hca_attr.scatter_fcs_w_decap_disable &&
3404 !priv->config.decap_en)
3405 return rte_flow_error_set(error, ENOTSUP,
3406 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3407 "decap is not enabled");
3408 if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3409 return rte_flow_error_set(error, ENOTSUP,
3410 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3412 MLX5_FLOW_ACTION_DECAP ? "can only "
3413 "have a single decap action" : "decap "
3414 "after encap is not supported");
3415 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3416 return rte_flow_error_set(error, EINVAL,
3417 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3418 "can't have decap action after"
3421 return rte_flow_error_set(error, ENOTSUP,
3422 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3424 "decap action not supported for "
3426 if (!attr->transfer && priv->representor)
3427 return rte_flow_error_set(error, ENOTSUP,
3428 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3429 "decap action for VF representor "
3430 "not supported on NIC table");
3431 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3432 !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3433 return rte_flow_error_set(error, ENOTSUP,
3434 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3435 "VXLAN item should be present for VXLAN decap");
3439 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3442 * Validate the raw encap and decap actions.
3445 * Pointer to the rte_eth_dev structure.
3447 * Pointer to the decap action.
3449 * Pointer to the encap action.
3451 * Pointer to flow attributes
3452 * @param[in/out] action_flags
3453 * Holds the actions detected until now.
3454 * @param[out] actions_n
3455 * pointer to the number of actions counter.
3457 * Pointer to the action structure.
3458 * @param[in] item_flags
3459 * Holds the items detected.
3461 * Pointer to error structure.
3464 * 0 on success, a negative errno value otherwise and rte_errno is set.
3467 flow_dv_validate_action_raw_encap_decap
3468 (struct rte_eth_dev *dev,
3469 const struct rte_flow_action_raw_decap *decap,
3470 const struct rte_flow_action_raw_encap *encap,
3471 const struct rte_flow_attr *attr, uint64_t *action_flags,
3472 int *actions_n, const struct rte_flow_action *action,
3473 uint64_t item_flags, struct rte_flow_error *error)
3475 const struct mlx5_priv *priv = dev->data->dev_private;
3478 if (encap && (!encap->size || !encap->data))
3479 return rte_flow_error_set(error, EINVAL,
3480 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3481 "raw encap data cannot be empty");
3482 if (decap && encap) {
3483 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3484 encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3487 else if (encap->size <=
3488 MLX5_ENCAPSULATION_DECISION_SIZE &&
3490 MLX5_ENCAPSULATION_DECISION_SIZE)
3493 else if (encap->size >
3494 MLX5_ENCAPSULATION_DECISION_SIZE &&
3496 MLX5_ENCAPSULATION_DECISION_SIZE)
3497 /* 2 L2 actions: encap and decap. */
3500 return rte_flow_error_set(error,
3502 RTE_FLOW_ERROR_TYPE_ACTION,
3503 NULL, "unsupported too small "
3504 "raw decap and too small raw "
3505 "encap combination");
3508 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3509 item_flags, attr, error);
3512 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3516 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3517 return rte_flow_error_set(error, ENOTSUP,
3518 RTE_FLOW_ERROR_TYPE_ACTION,
3520 "small raw encap size");
3521 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3522 return rte_flow_error_set(error, EINVAL,
3523 RTE_FLOW_ERROR_TYPE_ACTION,
3525 "more than one encap action");
3526 if (!attr->transfer && priv->representor)
3527 return rte_flow_error_set
3529 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3530 "encap action for VF representor "
3531 "not supported on NIC table");
3532 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3539 * Validate the ASO CT action.
3542 * Pointer to the rte_eth_dev structure.
3543 * @param[in] action_flags
3544 * Holds the actions detected until now.
3545 * @param[in] item_flags
3546 * The items found in this flow rule.
3548 * Pointer to flow attributes.
3550 * Pointer to error structure.
3553 * 0 on success, a negative errno value otherwise and rte_errno is set.
3556 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3557 uint64_t action_flags,
3558 uint64_t item_flags,
3559 const struct rte_flow_attr *attr,
3560 struct rte_flow_error *error)
3564 if (attr->group == 0 && !attr->transfer)
3565 return rte_flow_error_set(error, ENOTSUP,
3566 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3568 "Only support non-root table");
3569 if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3570 return rte_flow_error_set(error, ENOTSUP,
3571 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3572 "CT cannot follow a fate action");
3573 if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3574 (action_flags & MLX5_FLOW_ACTION_AGE))
3575 return rte_flow_error_set(error, EINVAL,
3576 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3577 "Only one ASO action is supported");
3578 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3579 return rte_flow_error_set(error, EINVAL,
3580 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3581 "Encap cannot exist before CT");
3582 if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3583 return rte_flow_error_set(error, EINVAL,
3584 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3585 "Not a outer TCP packet");
3590 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3591 struct mlx5_list_entry *entry, void *cb_ctx)
3593 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3594 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3595 struct mlx5_flow_dv_encap_decap_resource *resource;
3597 resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3599 if (resource->reformat_type == ctx_resource->reformat_type &&
3600 resource->ft_type == ctx_resource->ft_type &&
3601 resource->flags == ctx_resource->flags &&
3602 resource->size == ctx_resource->size &&
3603 !memcmp((const void *)resource->buf,
3604 (const void *)ctx_resource->buf,
3610 struct mlx5_list_entry *
3611 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3613 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3614 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3615 struct mlx5dv_dr_domain *domain;
3616 struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3617 struct mlx5_flow_dv_encap_decap_resource *resource;
3621 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3622 domain = sh->fdb_domain;
3623 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3624 domain = sh->rx_domain;
3626 domain = sh->tx_domain;
3627 /* Register new encap/decap resource. */
3628 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3630 rte_flow_error_set(ctx->error, ENOMEM,
3631 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3632 "cannot allocate resource memory");
3635 *resource = *ctx_resource;
3636 resource->idx = idx;
3637 ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->ctx, domain,
3641 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3642 rte_flow_error_set(ctx->error, ENOMEM,
3643 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3644 NULL, "cannot create action");
3648 return &resource->entry;
3651 struct mlx5_list_entry *
3652 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3655 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3656 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3657 struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3660 cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3662 if (!cache_resource) {
3663 rte_flow_error_set(ctx->error, ENOMEM,
3664 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3665 "cannot allocate resource memory");
3668 memcpy(cache_resource, oentry, sizeof(*cache_resource));
3669 cache_resource->idx = idx;
3670 return &cache_resource->entry;
3674 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3676 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3677 struct mlx5_flow_dv_encap_decap_resource *res =
3678 container_of(entry, typeof(*res), entry);
3680 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3684 * Find existing encap/decap resource or create and register a new one.
3686 * @param[in, out] dev
3687 * Pointer to rte_eth_dev structure.
3688 * @param[in, out] resource
3689 * Pointer to encap/decap resource.
3690 * @parm[in, out] dev_flow
3691 * Pointer to the dev_flow.
3693 * pointer to error structure.
3696 * 0 on success otherwise -errno and errno is set.
3699 flow_dv_encap_decap_resource_register
3700 (struct rte_eth_dev *dev,
3701 struct mlx5_flow_dv_encap_decap_resource *resource,
3702 struct mlx5_flow *dev_flow,
3703 struct rte_flow_error *error)
3705 struct mlx5_priv *priv = dev->data->dev_private;
3706 struct mlx5_dev_ctx_shared *sh = priv->sh;
3707 struct mlx5_list_entry *entry;
3711 uint32_t refmt_type:8;
3713 * Header reformat actions can be shared between
3714 * non-root tables. One bit to indicate non-root
3718 uint32_t reserve:15;
3721 } encap_decap_key = {
3723 .ft_type = resource->ft_type,
3724 .refmt_type = resource->reformat_type,
3725 .is_root = !!dev_flow->dv.group,
3729 struct mlx5_flow_cb_ctx ctx = {
3735 resource->flags = dev_flow->dv.group ? 0 : 1;
3736 key64 = __rte_raw_cksum(&encap_decap_key.v32,
3737 sizeof(encap_decap_key.v32), 0);
3738 if (resource->reformat_type !=
3739 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3741 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3742 entry = mlx5_hlist_register(sh->encaps_decaps, key64, &ctx);
3745 resource = container_of(entry, typeof(*resource), entry);
3746 dev_flow->dv.encap_decap = resource;
3747 dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3752 * Find existing table jump resource or create and register a new one.
3754 * @param[in, out] dev
3755 * Pointer to rte_eth_dev structure.
3756 * @param[in, out] tbl
3757 * Pointer to flow table resource.
3758 * @parm[in, out] dev_flow
3759 * Pointer to the dev_flow.
3761 * pointer to error structure.
3764 * 0 on success otherwise -errno and errno is set.
3767 flow_dv_jump_tbl_resource_register
3768 (struct rte_eth_dev *dev __rte_unused,
3769 struct mlx5_flow_tbl_resource *tbl,
3770 struct mlx5_flow *dev_flow,
3771 struct rte_flow_error *error __rte_unused)
3773 struct mlx5_flow_tbl_data_entry *tbl_data =
3774 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3777 MLX5_ASSERT(tbl_data->jump.action);
3778 dev_flow->handle->rix_jump = tbl_data->idx;
3779 dev_flow->dv.jump = &tbl_data->jump;
3784 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3785 struct mlx5_list_entry *entry, void *cb_ctx)
3787 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3788 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3789 struct mlx5_flow_dv_port_id_action_resource *res =
3790 container_of(entry, typeof(*res), entry);
3792 return ref->port_id != res->port_id;
3795 struct mlx5_list_entry *
3796 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3798 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3799 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3800 struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3801 struct mlx5_flow_dv_port_id_action_resource *resource;
3805 /* Register new port id action resource. */
3806 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3808 rte_flow_error_set(ctx->error, ENOMEM,
3809 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3810 "cannot allocate port_id action memory");
3814 ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3818 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3819 rte_flow_error_set(ctx->error, ENOMEM,
3820 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3821 "cannot create action");
3824 resource->idx = idx;
3825 return &resource->entry;
3828 struct mlx5_list_entry *
3829 flow_dv_port_id_clone_cb(void *tool_ctx,
3830 struct mlx5_list_entry *entry __rte_unused,
3833 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3834 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3835 struct mlx5_flow_dv_port_id_action_resource *resource;
3838 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3840 rte_flow_error_set(ctx->error, ENOMEM,
3841 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3842 "cannot allocate port_id action memory");
3845 memcpy(resource, entry, sizeof(*resource));
3846 resource->idx = idx;
3847 return &resource->entry;
3851 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3853 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3854 struct mlx5_flow_dv_port_id_action_resource *resource =
3855 container_of(entry, typeof(*resource), entry);
3857 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3861 * Find existing table port ID resource or create and register a new one.
3863 * @param[in, out] dev
3864 * Pointer to rte_eth_dev structure.
3865 * @param[in, out] ref
3866 * Pointer to port ID action resource reference.
3867 * @parm[in, out] dev_flow
3868 * Pointer to the dev_flow.
3870 * pointer to error structure.
3873 * 0 on success otherwise -errno and errno is set.
3876 flow_dv_port_id_action_resource_register
3877 (struct rte_eth_dev *dev,
3878 struct mlx5_flow_dv_port_id_action_resource *ref,
3879 struct mlx5_flow *dev_flow,
3880 struct rte_flow_error *error)
3882 struct mlx5_priv *priv = dev->data->dev_private;
3883 struct mlx5_list_entry *entry;
3884 struct mlx5_flow_dv_port_id_action_resource *resource;
3885 struct mlx5_flow_cb_ctx ctx = {
3890 entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3893 resource = container_of(entry, typeof(*resource), entry);
3894 dev_flow->dv.port_id_action = resource;
3895 dev_flow->handle->rix_port_id_action = resource->idx;
3900 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3901 struct mlx5_list_entry *entry, void *cb_ctx)
3903 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3904 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3905 struct mlx5_flow_dv_push_vlan_action_resource *res =
3906 container_of(entry, typeof(*res), entry);
3908 return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3911 struct mlx5_list_entry *
3912 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3914 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3915 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3916 struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3917 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3918 struct mlx5dv_dr_domain *domain;
3922 /* Register new port id action resource. */
3923 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3925 rte_flow_error_set(ctx->error, ENOMEM,
3926 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3927 "cannot allocate push_vlan action memory");
3931 if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3932 domain = sh->fdb_domain;
3933 else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3934 domain = sh->rx_domain;
3936 domain = sh->tx_domain;
3937 ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3940 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3941 rte_flow_error_set(ctx->error, ENOMEM,
3942 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3943 "cannot create push vlan action");
3946 resource->idx = idx;
3947 return &resource->entry;
3950 struct mlx5_list_entry *
3951 flow_dv_push_vlan_clone_cb(void *tool_ctx,
3952 struct mlx5_list_entry *entry __rte_unused,
3955 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3956 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3957 struct mlx5_flow_dv_push_vlan_action_resource *resource;
3960 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3962 rte_flow_error_set(ctx->error, ENOMEM,
3963 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3964 "cannot allocate push_vlan action memory");
3967 memcpy(resource, entry, sizeof(*resource));
3968 resource->idx = idx;
3969 return &resource->entry;
3973 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3975 struct mlx5_dev_ctx_shared *sh = tool_ctx;
3976 struct mlx5_flow_dv_push_vlan_action_resource *resource =
3977 container_of(entry, typeof(*resource), entry);
3979 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
3983 * Find existing push vlan resource or create and register a new one.
3985 * @param [in, out] dev
3986 * Pointer to rte_eth_dev structure.
3987 * @param[in, out] ref
3988 * Pointer to port ID action resource reference.
3989 * @parm[in, out] dev_flow
3990 * Pointer to the dev_flow.
3992 * pointer to error structure.
3995 * 0 on success otherwise -errno and errno is set.
3998 flow_dv_push_vlan_action_resource_register
3999 (struct rte_eth_dev *dev,
4000 struct mlx5_flow_dv_push_vlan_action_resource *ref,
4001 struct mlx5_flow *dev_flow,
4002 struct rte_flow_error *error)
4004 struct mlx5_priv *priv = dev->data->dev_private;
4005 struct mlx5_flow_dv_push_vlan_action_resource *resource;
4006 struct mlx5_list_entry *entry;
4007 struct mlx5_flow_cb_ctx ctx = {
4012 entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4015 resource = container_of(entry, typeof(*resource), entry);
4017 dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4018 dev_flow->dv.push_vlan_res = resource;
4023 * Get the size of specific rte_flow_item_type hdr size
4025 * @param[in] item_type
4026 * Tested rte_flow_item_type.
4029 * sizeof struct item_type, 0 if void or irrelevant.
4032 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4036 switch (item_type) {
4037 case RTE_FLOW_ITEM_TYPE_ETH:
4038 retval = sizeof(struct rte_ether_hdr);
4040 case RTE_FLOW_ITEM_TYPE_VLAN:
4041 retval = sizeof(struct rte_vlan_hdr);
4043 case RTE_FLOW_ITEM_TYPE_IPV4:
4044 retval = sizeof(struct rte_ipv4_hdr);
4046 case RTE_FLOW_ITEM_TYPE_IPV6:
4047 retval = sizeof(struct rte_ipv6_hdr);
4049 case RTE_FLOW_ITEM_TYPE_UDP:
4050 retval = sizeof(struct rte_udp_hdr);
4052 case RTE_FLOW_ITEM_TYPE_TCP:
4053 retval = sizeof(struct rte_tcp_hdr);
4055 case RTE_FLOW_ITEM_TYPE_VXLAN:
4056 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4057 retval = sizeof(struct rte_vxlan_hdr);
4059 case RTE_FLOW_ITEM_TYPE_GRE:
4060 case RTE_FLOW_ITEM_TYPE_NVGRE:
4061 retval = sizeof(struct rte_gre_hdr);
4063 case RTE_FLOW_ITEM_TYPE_MPLS:
4064 retval = sizeof(struct rte_mpls_hdr);
4066 case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4074 #define MLX5_ENCAP_IPV4_VERSION 0x40
4075 #define MLX5_ENCAP_IPV4_IHL_MIN 0x05
4076 #define MLX5_ENCAP_IPV4_TTL_DEF 0x40
4077 #define MLX5_ENCAP_IPV6_VTC_FLOW 0x60000000
4078 #define MLX5_ENCAP_IPV6_HOP_LIMIT 0xff
4079 #define MLX5_ENCAP_VXLAN_FLAGS 0x08000000
4080 #define MLX5_ENCAP_VXLAN_GPE_FLAGS 0x04
4083 * Convert the encap action data from list of rte_flow_item to raw buffer
4086 * Pointer to rte_flow_item objects list.
4088 * Pointer to the output buffer.
4090 * Pointer to the output buffer size.
4092 * Pointer to the error structure.
4095 * 0 on success, a negative errno value otherwise and rte_errno is set.
4098 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4099 size_t *size, struct rte_flow_error *error)
4101 struct rte_ether_hdr *eth = NULL;
4102 struct rte_vlan_hdr *vlan = NULL;
4103 struct rte_ipv4_hdr *ipv4 = NULL;
4104 struct rte_ipv6_hdr *ipv6 = NULL;
4105 struct rte_udp_hdr *udp = NULL;
4106 struct rte_vxlan_hdr *vxlan = NULL;
4107 struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4108 struct rte_gre_hdr *gre = NULL;
4110 size_t temp_size = 0;
4113 return rte_flow_error_set(error, EINVAL,
4114 RTE_FLOW_ERROR_TYPE_ACTION,
4115 NULL, "invalid empty data");
4116 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4117 len = flow_dv_get_item_hdr_len(items->type);
4118 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4119 return rte_flow_error_set(error, EINVAL,
4120 RTE_FLOW_ERROR_TYPE_ACTION,
4121 (void *)items->type,
4122 "items total size is too big"
4123 " for encap action");
4124 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4125 switch (items->type) {
4126 case RTE_FLOW_ITEM_TYPE_ETH:
4127 eth = (struct rte_ether_hdr *)&buf[temp_size];
4129 case RTE_FLOW_ITEM_TYPE_VLAN:
4130 vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4132 return rte_flow_error_set(error, EINVAL,
4133 RTE_FLOW_ERROR_TYPE_ACTION,
4134 (void *)items->type,
4135 "eth header not found");
4136 if (!eth->ether_type)
4137 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4139 case RTE_FLOW_ITEM_TYPE_IPV4:
4140 ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4142 return rte_flow_error_set(error, EINVAL,
4143 RTE_FLOW_ERROR_TYPE_ACTION,
4144 (void *)items->type,
4145 "neither eth nor vlan"
4147 if (vlan && !vlan->eth_proto)
4148 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4149 else if (eth && !eth->ether_type)
4150 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4151 if (!ipv4->version_ihl)
4152 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4153 MLX5_ENCAP_IPV4_IHL_MIN;
4154 if (!ipv4->time_to_live)
4155 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4157 case RTE_FLOW_ITEM_TYPE_IPV6:
4158 ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4160 return rte_flow_error_set(error, EINVAL,
4161 RTE_FLOW_ERROR_TYPE_ACTION,
4162 (void *)items->type,
4163 "neither eth nor vlan"
4165 if (vlan && !vlan->eth_proto)
4166 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4167 else if (eth && !eth->ether_type)
4168 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4169 if (!ipv6->vtc_flow)
4171 RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4172 if (!ipv6->hop_limits)
4173 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4175 case RTE_FLOW_ITEM_TYPE_UDP:
4176 udp = (struct rte_udp_hdr *)&buf[temp_size];
4178 return rte_flow_error_set(error, EINVAL,
4179 RTE_FLOW_ERROR_TYPE_ACTION,
4180 (void *)items->type,
4181 "ip header not found");
4182 if (ipv4 && !ipv4->next_proto_id)
4183 ipv4->next_proto_id = IPPROTO_UDP;
4184 else if (ipv6 && !ipv6->proto)
4185 ipv6->proto = IPPROTO_UDP;
4187 case RTE_FLOW_ITEM_TYPE_VXLAN:
4188 vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4190 return rte_flow_error_set(error, EINVAL,
4191 RTE_FLOW_ERROR_TYPE_ACTION,
4192 (void *)items->type,
4193 "udp header not found");
4195 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4196 if (!vxlan->vx_flags)
4198 RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4200 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4201 vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4203 return rte_flow_error_set(error, EINVAL,
4204 RTE_FLOW_ERROR_TYPE_ACTION,
4205 (void *)items->type,
4206 "udp header not found");
4207 if (!vxlan_gpe->proto)
4208 return rte_flow_error_set(error, EINVAL,
4209 RTE_FLOW_ERROR_TYPE_ACTION,
4210 (void *)items->type,
4211 "next protocol not found");
4214 RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4215 if (!vxlan_gpe->vx_flags)
4216 vxlan_gpe->vx_flags =
4217 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4219 case RTE_FLOW_ITEM_TYPE_GRE:
4220 case RTE_FLOW_ITEM_TYPE_NVGRE:
4221 gre = (struct rte_gre_hdr *)&buf[temp_size];
4223 return rte_flow_error_set(error, EINVAL,
4224 RTE_FLOW_ERROR_TYPE_ACTION,
4225 (void *)items->type,
4226 "next protocol not found");
4228 return rte_flow_error_set(error, EINVAL,
4229 RTE_FLOW_ERROR_TYPE_ACTION,
4230 (void *)items->type,
4231 "ip header not found");
4232 if (ipv4 && !ipv4->next_proto_id)
4233 ipv4->next_proto_id = IPPROTO_GRE;
4234 else if (ipv6 && !ipv6->proto)
4235 ipv6->proto = IPPROTO_GRE;
4237 case RTE_FLOW_ITEM_TYPE_VOID:
4240 return rte_flow_error_set(error, EINVAL,
4241 RTE_FLOW_ERROR_TYPE_ACTION,
4242 (void *)items->type,
4243 "unsupported item type");
4253 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4255 struct rte_ether_hdr *eth = NULL;
4256 struct rte_vlan_hdr *vlan = NULL;
4257 struct rte_ipv6_hdr *ipv6 = NULL;
4258 struct rte_udp_hdr *udp = NULL;
4262 eth = (struct rte_ether_hdr *)data;
4263 next_hdr = (char *)(eth + 1);
4264 proto = RTE_BE16(eth->ether_type);
4267 while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4268 vlan = (struct rte_vlan_hdr *)next_hdr;
4269 proto = RTE_BE16(vlan->eth_proto);
4270 next_hdr += sizeof(struct rte_vlan_hdr);
4273 /* HW calculates IPv4 csum. no need to proceed */
4274 if (proto == RTE_ETHER_TYPE_IPV4)
4277 /* non IPv4/IPv6 header. not supported */
4278 if (proto != RTE_ETHER_TYPE_IPV6) {
4279 return rte_flow_error_set(error, ENOTSUP,
4280 RTE_FLOW_ERROR_TYPE_ACTION,
4281 NULL, "Cannot offload non IPv4/IPv6");
4284 ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4286 /* ignore non UDP */
4287 if (ipv6->proto != IPPROTO_UDP)
4290 udp = (struct rte_udp_hdr *)(ipv6 + 1);
4291 udp->dgram_cksum = 0;
4297 * Convert L2 encap action to DV specification.
4300 * Pointer to rte_eth_dev structure.
4302 * Pointer to action structure.
4303 * @param[in, out] dev_flow
4304 * Pointer to the mlx5_flow.
4305 * @param[in] transfer
4306 * Mark if the flow is E-Switch flow.
4308 * Pointer to the error structure.
4311 * 0 on success, a negative errno value otherwise and rte_errno is set.
4314 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4315 const struct rte_flow_action *action,
4316 struct mlx5_flow *dev_flow,
4318 struct rte_flow_error *error)
4320 const struct rte_flow_item *encap_data;
4321 const struct rte_flow_action_raw_encap *raw_encap_data;
4322 struct mlx5_flow_dv_encap_decap_resource res = {
4324 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4325 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4326 MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4329 if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4331 (const struct rte_flow_action_raw_encap *)action->conf;
4332 res.size = raw_encap_data->size;
4333 memcpy(res.buf, raw_encap_data->data, res.size);
4335 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4337 ((const struct rte_flow_action_vxlan_encap *)
4338 action->conf)->definition;
4341 ((const struct rte_flow_action_nvgre_encap *)
4342 action->conf)->definition;
4343 if (flow_dv_convert_encap_data(encap_data, res.buf,
4347 if (flow_dv_zero_encap_udp_csum(res.buf, error))
4349 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4350 return rte_flow_error_set(error, EINVAL,
4351 RTE_FLOW_ERROR_TYPE_ACTION,
4352 NULL, "can't create L2 encap action");
4357 * Convert L2 decap action to DV specification.
4360 * Pointer to rte_eth_dev structure.
4361 * @param[in, out] dev_flow
4362 * Pointer to the mlx5_flow.
4363 * @param[in] transfer
4364 * Mark if the flow is E-Switch flow.
4366 * Pointer to the error structure.
4369 * 0 on success, a negative errno value otherwise and rte_errno is set.
4372 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4373 struct mlx5_flow *dev_flow,
4375 struct rte_flow_error *error)
4377 struct mlx5_flow_dv_encap_decap_resource res = {
4380 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4381 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4382 MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4385 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4386 return rte_flow_error_set(error, EINVAL,
4387 RTE_FLOW_ERROR_TYPE_ACTION,
4388 NULL, "can't create L2 decap action");
4393 * Convert raw decap/encap (L3 tunnel) action to DV specification.
4396 * Pointer to rte_eth_dev structure.
4398 * Pointer to action structure.
4399 * @param[in, out] dev_flow
4400 * Pointer to the mlx5_flow.
4402 * Pointer to the flow attributes.
4404 * Pointer to the error structure.
4407 * 0 on success, a negative errno value otherwise and rte_errno is set.
4410 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4411 const struct rte_flow_action *action,
4412 struct mlx5_flow *dev_flow,
4413 const struct rte_flow_attr *attr,
4414 struct rte_flow_error *error)
4416 const struct rte_flow_action_raw_encap *encap_data;
4417 struct mlx5_flow_dv_encap_decap_resource res;
4419 memset(&res, 0, sizeof(res));
4420 encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4421 res.size = encap_data->size;
4422 memcpy(res.buf, encap_data->data, res.size);
4423 res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4424 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4425 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4427 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4429 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4430 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4431 if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4432 return rte_flow_error_set(error, EINVAL,
4433 RTE_FLOW_ERROR_TYPE_ACTION,
4434 NULL, "can't create encap action");
4439 * Create action push VLAN.
4442 * Pointer to rte_eth_dev structure.
4444 * Pointer to the flow attributes.
4446 * Pointer to the vlan to push to the Ethernet header.
4447 * @param[in, out] dev_flow
4448 * Pointer to the mlx5_flow.
4450 * Pointer to the error structure.
4453 * 0 on success, a negative errno value otherwise and rte_errno is set.
4456 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4457 const struct rte_flow_attr *attr,
4458 const struct rte_vlan_hdr *vlan,
4459 struct mlx5_flow *dev_flow,
4460 struct rte_flow_error *error)
4462 struct mlx5_flow_dv_push_vlan_action_resource res;
4464 memset(&res, 0, sizeof(res));
4466 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4469 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4471 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4472 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4473 return flow_dv_push_vlan_action_resource_register
4474 (dev, &res, dev_flow, error);
4478 * Validate the modify-header actions.
4480 * @param[in] action_flags
4481 * Holds the actions detected until now.
4483 * Pointer to the modify action.
4485 * Pointer to error structure.
4488 * 0 on success, a negative errno value otherwise and rte_errno is set.
4491 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4492 const struct rte_flow_action *action,
4493 struct rte_flow_error *error)
4495 if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4496 return rte_flow_error_set(error, EINVAL,
4497 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4498 NULL, "action configuration not set");
4499 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4500 return rte_flow_error_set(error, EINVAL,
4501 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4502 "can't have encap action before"
4508 * Validate the modify-header MAC address actions.
4510 * @param[in] action_flags
4511 * Holds the actions detected until now.
4513 * Pointer to the modify action.
4514 * @param[in] item_flags
4515 * Holds the items detected.
4517 * Pointer to error structure.
4520 * 0 on success, a negative errno value otherwise and rte_errno is set.
4523 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4524 const struct rte_flow_action *action,
4525 const uint64_t item_flags,
4526 struct rte_flow_error *error)
4530 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4532 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4533 return rte_flow_error_set(error, EINVAL,
4534 RTE_FLOW_ERROR_TYPE_ACTION,
4536 "no L2 item in pattern");
4542 * Validate the modify-header IPv4 address actions.
4544 * @param[in] action_flags
4545 * Holds the actions detected until now.
4547 * Pointer to the modify action.
4548 * @param[in] item_flags
4549 * Holds the items detected.
4551 * Pointer to error structure.
4554 * 0 on success, a negative errno value otherwise and rte_errno is set.
4557 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4558 const struct rte_flow_action *action,
4559 const uint64_t item_flags,
4560 struct rte_flow_error *error)
4565 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4567 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4568 MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4569 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4570 if (!(item_flags & layer))
4571 return rte_flow_error_set(error, EINVAL,
4572 RTE_FLOW_ERROR_TYPE_ACTION,
4574 "no ipv4 item in pattern");
4580 * Validate the modify-header IPv6 address actions.
4582 * @param[in] action_flags
4583 * Holds the actions detected until now.
4585 * Pointer to the modify action.
4586 * @param[in] item_flags
4587 * Holds the items detected.
4589 * Pointer to error structure.
4592 * 0 on success, a negative errno value otherwise and rte_errno is set.
4595 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4596 const struct rte_flow_action *action,
4597 const uint64_t item_flags,
4598 struct rte_flow_error *error)
4603 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4605 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4606 MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4607 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4608 if (!(item_flags & layer))
4609 return rte_flow_error_set(error, EINVAL,
4610 RTE_FLOW_ERROR_TYPE_ACTION,
4612 "no ipv6 item in pattern");
4618 * Validate the modify-header TP actions.
4620 * @param[in] action_flags
4621 * Holds the actions detected until now.
4623 * Pointer to the modify action.
4624 * @param[in] item_flags
4625 * Holds the items detected.
4627 * Pointer to error structure.
4630 * 0 on success, a negative errno value otherwise and rte_errno is set.
4633 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4634 const struct rte_flow_action *action,
4635 const uint64_t item_flags,
4636 struct rte_flow_error *error)
4641 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4643 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4644 MLX5_FLOW_LAYER_INNER_L4 :
4645 MLX5_FLOW_LAYER_OUTER_L4;
4646 if (!(item_flags & layer))
4647 return rte_flow_error_set(error, EINVAL,
4648 RTE_FLOW_ERROR_TYPE_ACTION,
4649 NULL, "no transport layer "
4656 * Validate the modify-header actions of increment/decrement
4657 * TCP Sequence-number.
4659 * @param[in] action_flags
4660 * Holds the actions detected until now.
4662 * Pointer to the modify action.
4663 * @param[in] item_flags
4664 * Holds the items detected.
4666 * Pointer to error structure.
4669 * 0 on success, a negative errno value otherwise and rte_errno is set.
4672 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4673 const struct rte_flow_action *action,
4674 const uint64_t item_flags,
4675 struct rte_flow_error *error)
4680 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4682 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4683 MLX5_FLOW_LAYER_INNER_L4_TCP :
4684 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4685 if (!(item_flags & layer))
4686 return rte_flow_error_set(error, EINVAL,
4687 RTE_FLOW_ERROR_TYPE_ACTION,
4688 NULL, "no TCP item in"
4690 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4691 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4692 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4693 (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4694 return rte_flow_error_set(error, EINVAL,
4695 RTE_FLOW_ERROR_TYPE_ACTION,
4697 "cannot decrease and increase"
4698 " TCP sequence number"
4699 " at the same time");
4705 * Validate the modify-header actions of increment/decrement
4706 * TCP Acknowledgment number.
4708 * @param[in] action_flags
4709 * Holds the actions detected until now.
4711 * Pointer to the modify action.
4712 * @param[in] item_flags
4713 * Holds the items detected.
4715 * Pointer to error structure.
4718 * 0 on success, a negative errno value otherwise and rte_errno is set.
4721 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4722 const struct rte_flow_action *action,
4723 const uint64_t item_flags,
4724 struct rte_flow_error *error)
4729 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4731 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4732 MLX5_FLOW_LAYER_INNER_L4_TCP :
4733 MLX5_FLOW_LAYER_OUTER_L4_TCP;
4734 if (!(item_flags & layer))
4735 return rte_flow_error_set(error, EINVAL,
4736 RTE_FLOW_ERROR_TYPE_ACTION,
4737 NULL, "no TCP item in"
4739 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4740 (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4741 (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4742 (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4743 return rte_flow_error_set(error, EINVAL,
4744 RTE_FLOW_ERROR_TYPE_ACTION,
4746 "cannot decrease and increase"
4747 " TCP acknowledgment number"
4748 " at the same time");
4754 * Validate the modify-header TTL actions.
4756 * @param[in] action_flags
4757 * Holds the actions detected until now.
4759 * Pointer to the modify action.
4760 * @param[in] item_flags
4761 * Holds the items detected.
4763 * Pointer to error structure.
4766 * 0 on success, a negative errno value otherwise and rte_errno is set.
4769 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4770 const struct rte_flow_action *action,
4771 const uint64_t item_flags,
4772 struct rte_flow_error *error)
4777 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4779 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4780 MLX5_FLOW_LAYER_INNER_L3 :
4781 MLX5_FLOW_LAYER_OUTER_L3;
4782 if (!(item_flags & layer))
4783 return rte_flow_error_set(error, EINVAL,
4784 RTE_FLOW_ERROR_TYPE_ACTION,
4786 "no IP protocol in pattern");
4792 * Validate the generic modify field actions.
4794 * Pointer to the rte_eth_dev structure.
4795 * @param[in] action_flags
4796 * Holds the actions detected until now.
4798 * Pointer to the modify action.
4800 * Pointer to the flow attributes.
4802 * Pointer to error structure.
4805 * Number of header fields to modify (0 or more) on success,
4806 * a negative errno value otherwise and rte_errno is set.
4809 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4810 const uint64_t action_flags,
4811 const struct rte_flow_action *action,
4812 const struct rte_flow_attr *attr,
4813 struct rte_flow_error *error)
4816 struct mlx5_priv *priv = dev->data->dev_private;
4817 struct mlx5_dev_config *config = &priv->config;
4818 const struct rte_flow_action_modify_field *action_modify_field =
4820 uint32_t dst_width = mlx5_flow_item_field_width(config,
4821 action_modify_field->dst.field);
4822 uint32_t src_width = mlx5_flow_item_field_width(config,
4823 action_modify_field->src.field);
4825 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4829 if (action_modify_field->width == 0)
4830 return rte_flow_error_set(error, EINVAL,
4831 RTE_FLOW_ERROR_TYPE_ACTION, action,
4832 "no bits are requested to be modified");
4833 else if (action_modify_field->width > dst_width ||
4834 action_modify_field->width > src_width)
4835 return rte_flow_error_set(error, EINVAL,
4836 RTE_FLOW_ERROR_TYPE_ACTION, action,
4837 "cannot modify more bits than"
4838 " the width of a field");
4839 if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4840 action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4841 if ((action_modify_field->dst.offset +
4842 action_modify_field->width > dst_width) ||
4843 (action_modify_field->dst.offset % 32))
4844 return rte_flow_error_set(error, EINVAL,
4845 RTE_FLOW_ERROR_TYPE_ACTION, action,
4846 "destination offset is too big"
4847 " or not aligned to 4 bytes");
4848 if (action_modify_field->dst.level &&
4849 action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4850 return rte_flow_error_set(error, ENOTSUP,
4851 RTE_FLOW_ERROR_TYPE_ACTION, action,
4852 "inner header fields modification"
4853 " is not supported");
4855 if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4856 action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4857 if (!attr->transfer && !attr->group)
4858 return rte_flow_error_set(error, ENOTSUP,
4859 RTE_FLOW_ERROR_TYPE_ACTION, action,
4860 "modify field action is not"
4861 " supported for group 0");
4862 if ((action_modify_field->src.offset +
4863 action_modify_field->width > src_width) ||
4864 (action_modify_field->src.offset % 32))
4865 return rte_flow_error_set(error, EINVAL,
4866 RTE_FLOW_ERROR_TYPE_ACTION, action,
4867 "source offset is too big"
4868 " or not aligned to 4 bytes");
4869 if (action_modify_field->src.level &&
4870 action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4871 return rte_flow_error_set(error, ENOTSUP,
4872 RTE_FLOW_ERROR_TYPE_ACTION, action,
4873 "inner header fields modification"
4874 " is not supported");
4876 if ((action_modify_field->dst.field ==
4877 action_modify_field->src.field) &&
4878 (action_modify_field->dst.level ==
4879 action_modify_field->src.level))
4880 return rte_flow_error_set(error, EINVAL,
4881 RTE_FLOW_ERROR_TYPE_ACTION, action,
4882 "source and destination fields"
4883 " cannot be the same");
4884 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4885 action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER)
4886 return rte_flow_error_set(error, EINVAL,
4887 RTE_FLOW_ERROR_TYPE_ACTION, action,
4888 "immediate value or a pointer to it"
4889 " cannot be used as a destination");
4890 if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4891 action_modify_field->src.field == RTE_FLOW_FIELD_START)
4892 return rte_flow_error_set(error, ENOTSUP,
4893 RTE_FLOW_ERROR_TYPE_ACTION, action,
4894 "modifications of an arbitrary"
4895 " place in a packet is not supported");
4896 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4897 action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4898 return rte_flow_error_set(error, ENOTSUP,
4899 RTE_FLOW_ERROR_TYPE_ACTION, action,
4900 "modifications of the 802.1Q Tag"
4901 " Identifier is not supported");
4902 if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4903 action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4904 return rte_flow_error_set(error, ENOTSUP,
4905 RTE_FLOW_ERROR_TYPE_ACTION, action,
4906 "modifications of the VXLAN Network"
4907 " Identifier is not supported");
4908 if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4909 action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4910 return rte_flow_error_set(error, ENOTSUP,
4911 RTE_FLOW_ERROR_TYPE_ACTION, action,
4912 "modifications of the GENEVE Network"
4913 " Identifier is not supported");
4914 if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4915 action_modify_field->src.field == RTE_FLOW_FIELD_MARK ||
4916 action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4917 action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4918 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4919 !mlx5_flow_ext_mreg_supported(dev))
4920 return rte_flow_error_set(error, ENOTSUP,
4921 RTE_FLOW_ERROR_TYPE_ACTION, action,
4922 "cannot modify mark or metadata without"
4923 " extended metadata register support");
4925 if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4926 return rte_flow_error_set(error, ENOTSUP,
4927 RTE_FLOW_ERROR_TYPE_ACTION, action,
4928 "add and sub operations"
4929 " are not supported");
4930 return (action_modify_field->width / 32) +
4931 !!(action_modify_field->width % 32);
4935 * Validate jump action.
4938 * Pointer to the jump action.
4939 * @param[in] action_flags
4940 * Holds the actions detected until now.
4941 * @param[in] attributes
4942 * Pointer to flow attributes
4943 * @param[in] external
4944 * Action belongs to flow rule created by request external to PMD.
4946 * Pointer to error structure.
4949 * 0 on success, a negative errno value otherwise and rte_errno is set.
4952 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4953 const struct mlx5_flow_tunnel *tunnel,
4954 const struct rte_flow_action *action,
4955 uint64_t action_flags,
4956 const struct rte_flow_attr *attributes,
4957 bool external, struct rte_flow_error *error)
4959 uint32_t target_group, table;
4961 struct flow_grp_info grp_info = {
4962 .external = !!external,
4963 .transfer = !!attributes->transfer,
4967 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
4968 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
4969 return rte_flow_error_set(error, EINVAL,
4970 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4971 "can't have 2 fate actions in"
4974 return rte_flow_error_set(error, EINVAL,
4975 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4976 NULL, "action configuration not set");
4978 ((const struct rte_flow_action_jump *)action->conf)->group;
4979 ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
4983 if (attributes->group == target_group &&
4984 !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
4985 MLX5_FLOW_ACTION_TUNNEL_MATCH)))
4986 return rte_flow_error_set(error, EINVAL,
4987 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4988 "target group must be other than"
4989 " the current flow group");
4994 * Validate the port_id action.
4997 * Pointer to rte_eth_dev structure.
4998 * @param[in] action_flags
4999 * Bit-fields that holds the actions detected until now.
5001 * Port_id RTE action structure.
5003 * Attributes of flow that includes this action.
5005 * Pointer to error structure.
5008 * 0 on success, a negative errno value otherwise and rte_errno is set.
5011 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5012 uint64_t action_flags,
5013 const struct rte_flow_action *action,
5014 const struct rte_flow_attr *attr,
5015 struct rte_flow_error *error)
5017 const struct rte_flow_action_port_id *port_id;
5018 struct mlx5_priv *act_priv;
5019 struct mlx5_priv *dev_priv;
5022 if (!attr->transfer)
5023 return rte_flow_error_set(error, ENOTSUP,
5024 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5026 "port id action is valid in transfer"
5028 if (!action || !action->conf)
5029 return rte_flow_error_set(error, ENOTSUP,
5030 RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5032 "port id action parameters must be"
5034 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5035 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5036 return rte_flow_error_set(error, EINVAL,
5037 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5038 "can have only one fate actions in"
5040 dev_priv = mlx5_dev_to_eswitch_info(dev);
5042 return rte_flow_error_set(error, rte_errno,
5043 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5045 "failed to obtain E-Switch info");
5046 port_id = action->conf;
5047 port = port_id->original ? dev->data->port_id : port_id->id;
5048 act_priv = mlx5_port_to_eswitch_info(port, false);
5050 return rte_flow_error_set
5052 RTE_FLOW_ERROR_TYPE_ACTION_CONF, port_id,
5053 "failed to obtain E-Switch port id for port");
5054 if (act_priv->domain_id != dev_priv->domain_id)
5055 return rte_flow_error_set
5057 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5058 "port does not belong to"
5059 " E-Switch being configured");
5064 * Get the maximum number of modify header actions.
5067 * Pointer to rte_eth_dev structure.
5069 * Whether action is on root table.
5072 * Max number of modify header actions device can support.
5074 static inline unsigned int
5075 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5079 * There's no way to directly query the max capacity from FW.
5080 * The maximal value on root table should be assumed to be supported.
5083 return MLX5_MAX_MODIFY_NUM;
5085 return MLX5_ROOT_TBL_MODIFY_NUM;
5089 * Validate the meter action.
5092 * Pointer to rte_eth_dev structure.
5093 * @param[in] action_flags
5094 * Bit-fields that holds the actions detected until now.
5096 * Pointer to the meter action.
5098 * Attributes of flow that includes this action.
5099 * @param[in] port_id_item
5100 * Pointer to item indicating port id.
5102 * Pointer to error structure.
5105 * 0 on success, a negative errno value otherwise and rte_ernno is set.
5108 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5109 uint64_t action_flags,
5110 const struct rte_flow_action *action,
5111 const struct rte_flow_attr *attr,
5112 const struct rte_flow_item *port_id_item,
5114 struct rte_flow_error *error)
5116 struct mlx5_priv *priv = dev->data->dev_private;
5117 const struct rte_flow_action_meter *am = action->conf;
5118 struct mlx5_flow_meter_info *fm;
5119 struct mlx5_flow_meter_policy *mtr_policy;
5120 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5123 return rte_flow_error_set(error, EINVAL,
5124 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5125 "meter action conf is NULL");
5127 if (action_flags & MLX5_FLOW_ACTION_METER)
5128 return rte_flow_error_set(error, ENOTSUP,
5129 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5130 "meter chaining not support");
5131 if (action_flags & MLX5_FLOW_ACTION_JUMP)
5132 return rte_flow_error_set(error, ENOTSUP,
5133 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5134 "meter with jump not support");
5136 return rte_flow_error_set(error, ENOTSUP,
5137 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5139 "meter action not supported");
5140 fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5142 return rte_flow_error_set(error, EINVAL,
5143 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5145 /* aso meter can always be shared by different domains */
5146 if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5147 !(fm->transfer == attr->transfer ||
5148 (!fm->ingress && !attr->ingress && attr->egress) ||
5149 (!fm->egress && !attr->egress && attr->ingress)))
5150 return rte_flow_error_set(error, EINVAL,
5151 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5152 "Flow attributes domain are either invalid "
5153 "or have a domain conflict with current "
5154 "meter attributes");
5155 if (fm->def_policy) {
5156 if (!((attr->transfer &&
5157 mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5159 mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5161 mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5162 return rte_flow_error_set(error, EINVAL,
5163 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5164 "Flow attributes domain "
5165 "have a conflict with current "
5166 "meter domain attributes");
5169 mtr_policy = mlx5_flow_meter_policy_find(dev,
5170 fm->policy_id, NULL);
5172 return rte_flow_error_set(error, EINVAL,
5173 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5174 "Invalid policy id for meter ");
5175 if (!((attr->transfer && mtr_policy->transfer) ||
5176 (attr->egress && mtr_policy->egress) ||
5177 (attr->ingress && mtr_policy->ingress)))
5178 return rte_flow_error_set(error, EINVAL,
5179 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5180 "Flow attributes domain "
5181 "have a conflict with current "
5182 "meter domain attributes");
5183 if (attr->transfer && mtr_policy->dev) {
5185 * When policy has fate action of port_id,
5186 * the flow should have the same src port as policy.
5188 struct mlx5_priv *policy_port_priv =
5189 mtr_policy->dev->data->dev_private;
5190 int32_t flow_src_port = priv->representor_id;
5193 const struct rte_flow_item_port_id *spec =
5195 struct mlx5_priv *port_priv =
5196 mlx5_port_to_eswitch_info(spec->id,
5199 return rte_flow_error_set(error,
5201 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5203 "Failed to get port info.");
5204 flow_src_port = port_priv->representor_id;
5206 if (flow_src_port != policy_port_priv->representor_id)
5207 return rte_flow_error_set(error,
5209 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5211 "Flow and meter policy "
5212 "have different src port.");
5214 *def_policy = false;
5220 * Validate the age action.
5222 * @param[in] action_flags
5223 * Holds the actions detected until now.
5225 * Pointer to the age action.
5227 * Pointer to the Ethernet device structure.
5229 * Pointer to error structure.
5232 * 0 on success, a negative errno value otherwise and rte_errno is set.
5235 flow_dv_validate_action_age(uint64_t action_flags,
5236 const struct rte_flow_action *action,
5237 struct rte_eth_dev *dev,
5238 struct rte_flow_error *error)
5240 struct mlx5_priv *priv = dev->data->dev_private;
5241 const struct rte_flow_action_age *age = action->conf;
5243 if (!priv->config.devx || (priv->sh->cmng.counter_fallback &&
5244 !priv->sh->aso_age_mng))
5245 return rte_flow_error_set(error, ENOTSUP,
5246 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5248 "age action not supported");
5249 if (!(action->conf))
5250 return rte_flow_error_set(error, EINVAL,
5251 RTE_FLOW_ERROR_TYPE_ACTION, action,
5252 "configuration cannot be null");
5253 if (!(age->timeout))
5254 return rte_flow_error_set(error, EINVAL,
5255 RTE_FLOW_ERROR_TYPE_ACTION, action,
5256 "invalid timeout value 0");
5257 if (action_flags & MLX5_FLOW_ACTION_AGE)
5258 return rte_flow_error_set(error, EINVAL,
5259 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5260 "duplicate age actions set");
5265 * Validate the modify-header IPv4 DSCP actions.
5267 * @param[in] action_flags
5268 * Holds the actions detected until now.
5270 * Pointer to the modify action.
5271 * @param[in] item_flags
5272 * Holds the items detected.
5274 * Pointer to error structure.
5277 * 0 on success, a negative errno value otherwise and rte_errno is set.
5280 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5281 const struct rte_flow_action *action,
5282 const uint64_t item_flags,
5283 struct rte_flow_error *error)
5287 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5289 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5290 return rte_flow_error_set(error, EINVAL,
5291 RTE_FLOW_ERROR_TYPE_ACTION,
5293 "no ipv4 item in pattern");
5299 * Validate the modify-header IPv6 DSCP actions.
5301 * @param[in] action_flags
5302 * Holds the actions detected until now.
5304 * Pointer to the modify action.
5305 * @param[in] item_flags
5306 * Holds the items detected.
5308 * Pointer to error structure.
5311 * 0 on success, a negative errno value otherwise and rte_errno is set.
5314 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5315 const struct rte_flow_action *action,
5316 const uint64_t item_flags,
5317 struct rte_flow_error *error)
5321 ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5323 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5324 return rte_flow_error_set(error, EINVAL,
5325 RTE_FLOW_ERROR_TYPE_ACTION,
5327 "no ipv6 item in pattern");
5333 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5334 struct mlx5_list_entry *entry, void *cb_ctx)
5336 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5337 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5338 struct mlx5_flow_dv_modify_hdr_resource *resource =
5339 container_of(entry, typeof(*resource), entry);
5340 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5342 key_len += ref->actions_num * sizeof(ref->actions[0]);
5343 return ref->actions_num != resource->actions_num ||
5344 memcmp(&ref->ft_type, &resource->ft_type, key_len);
5347 static struct mlx5_indexed_pool *
5348 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5350 struct mlx5_indexed_pool *ipool = __atomic_load_n
5351 (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5354 struct mlx5_indexed_pool *expected = NULL;
5355 struct mlx5_indexed_pool_config cfg =
5356 (struct mlx5_indexed_pool_config) {
5357 .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5359 sizeof(struct mlx5_modification_cmd),
5364 .release_mem_en = !!sh->reclaim_mode,
5365 .per_core_cache = sh->reclaim_mode ? 0 : (1 << 16),
5366 .malloc = mlx5_malloc,
5368 .type = "mlx5_modify_action_resource",
5371 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5372 ipool = mlx5_ipool_create(&cfg);
5375 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5376 &expected, ipool, false,
5378 __ATOMIC_SEQ_CST)) {
5379 mlx5_ipool_destroy(ipool);
5380 ipool = __atomic_load_n(&sh->mdh_ipools[index],
5387 struct mlx5_list_entry *
5388 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5390 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5391 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5392 struct mlx5dv_dr_domain *ns;
5393 struct mlx5_flow_dv_modify_hdr_resource *entry;
5394 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5395 struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5396 ref->actions_num - 1);
5398 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5399 uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5402 if (unlikely(!ipool)) {
5403 rte_flow_error_set(ctx->error, ENOMEM,
5404 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5405 NULL, "cannot allocate modify ipool");
5408 entry = mlx5_ipool_zmalloc(ipool, &idx);
5410 rte_flow_error_set(ctx->error, ENOMEM,
5411 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5412 "cannot allocate resource memory");
5415 rte_memcpy(&entry->ft_type,
5416 RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5417 key_len + data_len);
5418 if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5419 ns = sh->fdb_domain;
5420 else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5424 ret = mlx5_flow_os_create_flow_action_modify_header
5425 (sh->ctx, ns, entry,
5426 data_len, &entry->action);
5428 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5429 rte_flow_error_set(ctx->error, ENOMEM,
5430 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5431 NULL, "cannot create modification action");
5435 return &entry->entry;
5438 struct mlx5_list_entry *
5439 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5442 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5443 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5444 struct mlx5_flow_dv_modify_hdr_resource *entry;
5445 struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5446 uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5449 entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5452 rte_flow_error_set(ctx->error, ENOMEM,
5453 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5454 "cannot allocate resource memory");
5457 memcpy(entry, oentry, sizeof(*entry) + data_len);
5459 return &entry->entry;
5463 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5465 struct mlx5_dev_ctx_shared *sh = tool_ctx;
5466 struct mlx5_flow_dv_modify_hdr_resource *res =
5467 container_of(entry, typeof(*res), entry);
5469 mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5473 * Validate the sample action.
5475 * @param[in, out] action_flags
5476 * Holds the actions detected until now.
5478 * Pointer to the sample action.
5480 * Pointer to the Ethernet device structure.
5482 * Attributes of flow that includes this action.
5483 * @param[in] item_flags
5484 * Holds the items detected.
5486 * Pointer to the RSS action.
5487 * @param[out] sample_rss
5488 * Pointer to the RSS action in sample action list.
5490 * Pointer to the COUNT action in sample action list.
5491 * @param[out] fdb_mirror_limit
5492 * Pointer to the FDB mirror limitation flag.
5494 * Pointer to error structure.
5497 * 0 on success, a negative errno value otherwise and rte_errno is set.
5500 flow_dv_validate_action_sample(uint64_t *action_flags,
5501 const struct rte_flow_action *action,
5502 struct rte_eth_dev *dev,
5503 const struct rte_flow_attr *attr,
5504 uint64_t item_flags,
5505 const struct rte_flow_action_rss *rss,
5506 const struct rte_flow_action_rss **sample_rss,
5507 const struct rte_flow_action_count **count,
5508 int *fdb_mirror_limit,
5509 struct rte_flow_error *error)
5511 struct mlx5_priv *priv = dev->data->dev_private;
5512 struct mlx5_dev_config *dev_conf = &priv->config;
5513 const struct rte_flow_action_sample *sample = action->conf;
5514 const struct rte_flow_action *act;
5515 uint64_t sub_action_flags = 0;
5516 uint16_t queue_index = 0xFFFF;
5521 return rte_flow_error_set(error, EINVAL,
5522 RTE_FLOW_ERROR_TYPE_ACTION, action,
5523 "configuration cannot be NULL");
5524 if (sample->ratio == 0)
5525 return rte_flow_error_set(error, EINVAL,
5526 RTE_FLOW_ERROR_TYPE_ACTION, action,
5527 "ratio value starts from 1");
5528 if (!priv->config.devx || (sample->ratio > 0 && !priv->sampler_en))
5529 return rte_flow_error_set(error, ENOTSUP,
5530 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5532 "sample action not supported");
5533 if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5534 return rte_flow_error_set(error, EINVAL,
5535 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5536 "Multiple sample actions not "
5538 if (*action_flags & MLX5_FLOW_ACTION_METER)
5539 return rte_flow_error_set(error, EINVAL,
5540 RTE_FLOW_ERROR_TYPE_ACTION, action,
5541 "wrong action order, meter should "
5542 "be after sample action");
5543 if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5544 return rte_flow_error_set(error, EINVAL,
5545 RTE_FLOW_ERROR_TYPE_ACTION, action,
5546 "wrong action order, jump should "
5547 "be after sample action");
5548 act = sample->actions;
5549 for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5550 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5551 return rte_flow_error_set(error, ENOTSUP,
5552 RTE_FLOW_ERROR_TYPE_ACTION,
5553 act, "too many actions");
5554 switch (act->type) {
5555 case RTE_FLOW_ACTION_TYPE_QUEUE:
5556 ret = mlx5_flow_validate_action_queue(act,
5562 queue_index = ((const struct rte_flow_action_queue *)
5563 (act->conf))->index;
5564 sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5567 case RTE_FLOW_ACTION_TYPE_RSS:
5568 *sample_rss = act->conf;
5569 ret = mlx5_flow_validate_action_rss(act,
5576 if (rss && *sample_rss &&
5577 ((*sample_rss)->level != rss->level ||
5578 (*sample_rss)->types != rss->types))
5579 return rte_flow_error_set(error, ENOTSUP,
5580 RTE_FLOW_ERROR_TYPE_ACTION,
5582 "Can't use the different RSS types "
5583 "or level in the same flow");
5584 if (*sample_rss != NULL && (*sample_rss)->queue_num)
5585 queue_index = (*sample_rss)->queue[0];
5586 sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5589 case RTE_FLOW_ACTION_TYPE_MARK:
5590 ret = flow_dv_validate_action_mark(dev, act,
5595 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5596 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5597 MLX5_FLOW_ACTION_MARK_EXT;
5599 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5602 case RTE_FLOW_ACTION_TYPE_COUNT:
5603 ret = flow_dv_validate_action_count
5604 (dev, is_shared_action_count(act),
5605 *action_flags | sub_action_flags,
5610 sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5611 *action_flags |= MLX5_FLOW_ACTION_COUNT;
5614 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5615 ret = flow_dv_validate_action_port_id(dev,
5622 sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5625 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5626 ret = flow_dv_validate_action_raw_encap_decap
5627 (dev, NULL, act->conf, attr, &sub_action_flags,
5628 &actions_n, action, item_flags, error);
5633 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5634 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5635 ret = flow_dv_validate_action_l2_encap(dev,
5641 sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5645 return rte_flow_error_set(error, ENOTSUP,
5646 RTE_FLOW_ERROR_TYPE_ACTION,
5648 "Doesn't support optional "
5652 if (attr->ingress && !attr->transfer) {
5653 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5654 MLX5_FLOW_ACTION_RSS)))
5655 return rte_flow_error_set(error, EINVAL,
5656 RTE_FLOW_ERROR_TYPE_ACTION,
5658 "Ingress must has a dest "
5659 "QUEUE for Sample");
5660 } else if (attr->egress && !attr->transfer) {
5661 return rte_flow_error_set(error, ENOTSUP,
5662 RTE_FLOW_ERROR_TYPE_ACTION,
5664 "Sample Only support Ingress "
5666 } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5667 MLX5_ASSERT(attr->transfer);
5668 if (sample->ratio > 1)
5669 return rte_flow_error_set(error, ENOTSUP,
5670 RTE_FLOW_ERROR_TYPE_ACTION,
5672 "E-Switch doesn't support "
5673 "any optional action "
5675 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5676 return rte_flow_error_set(error, ENOTSUP,
5677 RTE_FLOW_ERROR_TYPE_ACTION,
5679 "unsupported action QUEUE");
5680 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5681 return rte_flow_error_set(error, ENOTSUP,
5682 RTE_FLOW_ERROR_TYPE_ACTION,
5684 "unsupported action QUEUE");
5685 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5686 return rte_flow_error_set(error, EINVAL,
5687 RTE_FLOW_ERROR_TYPE_ACTION,
5689 "E-Switch must has a dest "
5690 "port for mirroring");
5691 if (!priv->config.hca_attr.reg_c_preserve &&
5692 priv->representor_id != UINT16_MAX)
5693 *fdb_mirror_limit = 1;
5695 /* Continue validation for Xcap actions.*/
5696 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5697 (queue_index == 0xFFFF ||
5698 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN)) {
5699 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5700 MLX5_FLOW_XCAP_ACTIONS)
5701 return rte_flow_error_set(error, ENOTSUP,
5702 RTE_FLOW_ERROR_TYPE_ACTION,
5703 NULL, "encap and decap "
5704 "combination aren't "
5706 if (!attr->transfer && attr->ingress && (sub_action_flags &
5707 MLX5_FLOW_ACTION_ENCAP))
5708 return rte_flow_error_set(error, ENOTSUP,
5709 RTE_FLOW_ERROR_TYPE_ACTION,
5710 NULL, "encap is not supported"
5711 " for ingress traffic");
5717 * Find existing modify-header resource or create and register a new one.
5719 * @param dev[in, out]
5720 * Pointer to rte_eth_dev structure.
5721 * @param[in, out] resource
5722 * Pointer to modify-header resource.
5723 * @parm[in, out] dev_flow
5724 * Pointer to the dev_flow.
5726 * pointer to error structure.
5729 * 0 on success otherwise -errno and errno is set.
5732 flow_dv_modify_hdr_resource_register
5733 (struct rte_eth_dev *dev,
5734 struct mlx5_flow_dv_modify_hdr_resource *resource,
5735 struct mlx5_flow *dev_flow,
5736 struct rte_flow_error *error)
5738 struct mlx5_priv *priv = dev->data->dev_private;
5739 struct mlx5_dev_ctx_shared *sh = priv->sh;
5740 uint32_t key_len = sizeof(*resource) -
5741 offsetof(typeof(*resource), ft_type) +
5742 resource->actions_num * sizeof(resource->actions[0]);
5743 struct mlx5_list_entry *entry;
5744 struct mlx5_flow_cb_ctx ctx = {
5750 resource->root = !dev_flow->dv.group;
5751 if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5753 return rte_flow_error_set(error, EOVERFLOW,
5754 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5755 "too many modify header items");
5756 key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5757 entry = mlx5_hlist_register(sh->modify_cmds, key64, &ctx);
5760 resource = container_of(entry, typeof(*resource), entry);
5761 dev_flow->handle->dvh.modify_hdr = resource;
5766 * Get DV flow counter by index.
5769 * Pointer to the Ethernet device structure.
5771 * mlx5 flow counter index in the container.
5773 * mlx5 flow counter pool in the container.
5776 * Pointer to the counter, NULL otherwise.
5778 static struct mlx5_flow_counter *
5779 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5781 struct mlx5_flow_counter_pool **ppool)
5783 struct mlx5_priv *priv = dev->data->dev_private;
5784 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5785 struct mlx5_flow_counter_pool *pool;
5787 /* Decrease to original index and clear shared bit. */
5788 idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5789 MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5790 pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5794 return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5798 * Check the devx counter belongs to the pool.
5801 * Pointer to the counter pool.
5803 * The counter devx ID.
5806 * True if counter belongs to the pool, false otherwise.
5809 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5811 int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5812 MLX5_COUNTERS_PER_POOL;
5814 if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5820 * Get a pool by devx counter ID.
5823 * Pointer to the counter management.
5825 * The counter devx ID.
5828 * The counter pool pointer if exists, NULL otherwise,
5830 static struct mlx5_flow_counter_pool *
5831 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5834 struct mlx5_flow_counter_pool *pool = NULL;
5836 rte_spinlock_lock(&cmng->pool_update_sl);
5837 /* Check last used pool. */
5838 if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5839 flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5840 pool = cmng->pools[cmng->last_pool_idx];
5843 /* ID out of range means no suitable pool in the container. */
5844 if (id > cmng->max_id || id < cmng->min_id)
5847 * Find the pool from the end of the container, since mostly counter
5848 * ID is sequence increasing, and the last pool should be the needed
5853 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5855 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5861 rte_spinlock_unlock(&cmng->pool_update_sl);
5866 * Resize a counter container.
5869 * Pointer to the Ethernet device structure.
5872 * 0 on success, otherwise negative errno value and rte_errno is set.
5875 flow_dv_container_resize(struct rte_eth_dev *dev)
5877 struct mlx5_priv *priv = dev->data->dev_private;
5878 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5879 void *old_pools = cmng->pools;
5880 uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5881 uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5882 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5889 memcpy(pools, old_pools, cmng->n *
5890 sizeof(struct mlx5_flow_counter_pool *));
5892 cmng->pools = pools;
5894 mlx5_free(old_pools);
5899 * Query a devx flow counter.
5902 * Pointer to the Ethernet device structure.
5903 * @param[in] counter
5904 * Index to the flow counter.
5906 * The statistics value of packets.
5908 * The statistics value of bytes.
5911 * 0 on success, otherwise a negative errno value and rte_errno is set.
5914 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
5917 struct mlx5_priv *priv = dev->data->dev_private;
5918 struct mlx5_flow_counter_pool *pool = NULL;
5919 struct mlx5_flow_counter *cnt;
5922 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
5924 if (priv->sh->cmng.counter_fallback)
5925 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
5926 0, pkts, bytes, 0, NULL, NULL, 0);
5927 rte_spinlock_lock(&pool->sl);
5932 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
5933 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
5934 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
5936 rte_spinlock_unlock(&pool->sl);
5941 * Create and initialize a new counter pool.
5944 * Pointer to the Ethernet device structure.
5946 * The devX counter handle.
5948 * Whether the pool is for counter that was allocated for aging.
5949 * @param[in/out] cont_cur
5950 * Pointer to the container pointer, it will be update in pool resize.
5953 * The pool container pointer on success, NULL otherwise and rte_errno is set.
5955 static struct mlx5_flow_counter_pool *
5956 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
5959 struct mlx5_priv *priv = dev->data->dev_private;
5960 struct mlx5_flow_counter_pool *pool;
5961 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5962 bool fallback = priv->sh->cmng.counter_fallback;
5963 uint32_t size = sizeof(*pool);
5965 size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
5966 size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
5967 pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
5973 pool->is_aged = !!age;
5974 pool->query_gen = 0;
5975 pool->min_dcs = dcs;
5976 rte_spinlock_init(&pool->sl);
5977 rte_spinlock_init(&pool->csl);
5978 TAILQ_INIT(&pool->counters[0]);
5979 TAILQ_INIT(&pool->counters[1]);
5980 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
5981 rte_spinlock_lock(&cmng->pool_update_sl);
5982 pool->index = cmng->n_valid;
5983 if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
5985 rte_spinlock_unlock(&cmng->pool_update_sl);
5988 cmng->pools[pool->index] = pool;
5990 if (unlikely(fallback)) {
5991 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
5993 if (base < cmng->min_id)
5994 cmng->min_id = base;
5995 if (base > cmng->max_id)
5996 cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
5997 cmng->last_pool_idx = pool->index;
5999 rte_spinlock_unlock(&cmng->pool_update_sl);
6004 * Prepare a new counter and/or a new counter pool.
6007 * Pointer to the Ethernet device structure.
6008 * @param[out] cnt_free
6009 * Where to put the pointer of a new counter.
6011 * Whether the pool is for counter that was allocated for aging.
6014 * The counter pool pointer and @p cnt_free is set on success,
6015 * NULL otherwise and rte_errno is set.
6017 static struct mlx5_flow_counter_pool *
6018 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6019 struct mlx5_flow_counter **cnt_free,
6022 struct mlx5_priv *priv = dev->data->dev_private;
6023 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6024 struct mlx5_flow_counter_pool *pool;
6025 struct mlx5_counters tmp_tq;
6026 struct mlx5_devx_obj *dcs = NULL;
6027 struct mlx5_flow_counter *cnt;
6028 enum mlx5_counter_type cnt_type =
6029 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6030 bool fallback = priv->sh->cmng.counter_fallback;
6034 /* bulk_bitmap must be 0 for single counter allocation. */
6035 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0);
6038 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6040 pool = flow_dv_pool_create(dev, dcs, age);
6042 mlx5_devx_cmd_destroy(dcs);
6046 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6047 cnt = MLX5_POOL_GET_CNT(pool, i);
6049 cnt->dcs_when_free = dcs;
6053 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
6055 rte_errno = ENODATA;
6058 pool = flow_dv_pool_create(dev, dcs, age);
6060 mlx5_devx_cmd_destroy(dcs);
6063 TAILQ_INIT(&tmp_tq);
6064 for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6065 cnt = MLX5_POOL_GET_CNT(pool, i);
6067 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6069 rte_spinlock_lock(&cmng->csl[cnt_type]);
6070 TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6071 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6072 *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6073 (*cnt_free)->pool = pool;
6078 * Allocate a flow counter.
6081 * Pointer to the Ethernet device structure.
6083 * Whether the counter was allocated for aging.
6086 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6089 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6091 struct mlx5_priv *priv = dev->data->dev_private;
6092 struct mlx5_flow_counter_pool *pool = NULL;
6093 struct mlx5_flow_counter *cnt_free = NULL;
6094 bool fallback = priv->sh->cmng.counter_fallback;
6095 struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6096 enum mlx5_counter_type cnt_type =
6097 age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6100 if (!priv->config.devx) {
6101 rte_errno = ENOTSUP;
6104 /* Get free counters from container. */
6105 rte_spinlock_lock(&cmng->csl[cnt_type]);
6106 cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6108 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6109 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6110 if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6112 pool = cnt_free->pool;
6114 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6115 /* Create a DV counter action only in the first time usage. */
6116 if (!cnt_free->action) {
6118 struct mlx5_devx_obj *dcs;
6122 offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6123 dcs = pool->min_dcs;
6126 dcs = cnt_free->dcs_when_free;
6128 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6135 cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6136 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6137 /* Update the counter reset values. */
6138 if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6141 if (!fallback && !priv->sh->cmng.query_thread_on)
6142 /* Start the asynchronous batch query by the host thread. */
6143 mlx5_set_query_alarm(priv->sh);
6145 * When the count action isn't shared (by ID), shared_info field is
6146 * used for indirect action API's refcnt.
6147 * When the counter action is not shared neither by ID nor by indirect
6148 * action API, shared info must be 1.
6150 cnt_free->shared_info.refcnt = 1;
6154 cnt_free->pool = pool;
6156 cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6157 rte_spinlock_lock(&cmng->csl[cnt_type]);
6158 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6159 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6165 * Allocate a shared flow counter.
6168 * Pointer to the shared counter configuration.
6170 * Pointer to save the allocated counter index.
6173 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6177 flow_dv_counter_alloc_shared_cb(void *ctx, union mlx5_l3t_data *data)
6179 struct mlx5_shared_counter_conf *conf = ctx;
6180 struct rte_eth_dev *dev = conf->dev;
6181 struct mlx5_flow_counter *cnt;
6183 data->dword = flow_dv_counter_alloc(dev, 0);
6184 data->dword |= MLX5_CNT_SHARED_OFFSET;
6185 cnt = flow_dv_counter_get_by_idx(dev, data->dword, NULL);
6186 cnt->shared_info.id = conf->id;
6191 * Get a shared flow counter.
6194 * Pointer to the Ethernet device structure.
6196 * Counter identifier.
6199 * Index to flow counter on success, 0 otherwise and rte_errno is set.
6202 flow_dv_counter_get_shared(struct rte_eth_dev *dev, uint32_t id)
6204 struct mlx5_priv *priv = dev->data->dev_private;
6205 struct mlx5_shared_counter_conf conf = {
6209 union mlx5_l3t_data data = {
6213 mlx5_l3t_prepare_entry(priv->sh->cnt_id_tbl, id, &data,
6214 flow_dv_counter_alloc_shared_cb, &conf);
6219 * Get age param from counter index.
6222 * Pointer to the Ethernet device structure.
6223 * @param[in] counter
6224 * Index to the counter handler.
6227 * The aging parameter specified for the counter index.
6229 static struct mlx5_age_param*
6230 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6233 struct mlx5_flow_counter *cnt;
6234 struct mlx5_flow_counter_pool *pool = NULL;
6236 flow_dv_counter_get_by_idx(dev, counter, &pool);
6237 counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6238 cnt = MLX5_POOL_GET_CNT(pool, counter);
6239 return MLX5_CNT_TO_AGE(cnt);
6243 * Remove a flow counter from aged counter list.
6246 * Pointer to the Ethernet device structure.
6247 * @param[in] counter
6248 * Index to the counter handler.
6250 * Pointer to the counter handler.
6253 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6254 uint32_t counter, struct mlx5_flow_counter *cnt)
6256 struct mlx5_age_info *age_info;
6257 struct mlx5_age_param *age_param;
6258 struct mlx5_priv *priv = dev->data->dev_private;
6259 uint16_t expected = AGE_CANDIDATE;
6261 age_info = GET_PORT_AGE_INFO(priv);
6262 age_param = flow_dv_counter_idx_get_age(dev, counter);
6263 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6264 AGE_FREE, false, __ATOMIC_RELAXED,
6265 __ATOMIC_RELAXED)) {
6267 * We need the lock even it is age timeout,
6268 * since counter may still in process.
6270 rte_spinlock_lock(&age_info->aged_sl);
6271 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6272 rte_spinlock_unlock(&age_info->aged_sl);
6273 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6278 * Release a flow counter.
6281 * Pointer to the Ethernet device structure.
6282 * @param[in] counter
6283 * Index to the counter handler.
6286 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6288 struct mlx5_priv *priv = dev->data->dev_private;
6289 struct mlx5_flow_counter_pool *pool = NULL;
6290 struct mlx5_flow_counter *cnt;
6291 enum mlx5_counter_type cnt_type;
6295 cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6297 if (pool->is_aged) {
6298 flow_dv_counter_remove_from_age(dev, counter, cnt);
6301 * If the counter action is shared by ID, the l3t_clear_entry
6302 * function reduces its references counter. If after the
6303 * reduction the action is still referenced, the function
6304 * returns here and does not release it.
6306 if (IS_LEGACY_SHARED_CNT(counter) &&
6307 mlx5_l3t_clear_entry(priv->sh->cnt_id_tbl,
6308 cnt->shared_info.id))
6311 * If the counter action is shared by indirect action API,
6312 * the atomic function reduces its references counter.
6313 * If after the reduction the action is still referenced, the
6314 * function returns here and does not release it.
6315 * When the counter action is not shared neither by ID nor by
6316 * indirect action API, shared info is 1 before the reduction,
6317 * so this condition is failed and function doesn't return here.
6319 if (!IS_LEGACY_SHARED_CNT(counter) &&
6320 __atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6326 * Put the counter back to list to be updated in none fallback mode.
6327 * Currently, we are using two list alternately, while one is in query,
6328 * add the freed counter to the other list based on the pool query_gen
6329 * value. After query finishes, add counter the list to the global
6330 * container counter list. The list changes while query starts. In
6331 * this case, lock will not be needed as query callback and release
6332 * function both operate with the different list.
6334 if (!priv->sh->cmng.counter_fallback) {
6335 rte_spinlock_lock(&pool->csl);
6336 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6337 rte_spinlock_unlock(&pool->csl);
6339 cnt->dcs_when_free = cnt->dcs_when_active;
6340 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6341 MLX5_COUNTER_TYPE_ORIGIN;
6342 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6343 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6345 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6350 * Resize a meter id container.
6353 * Pointer to the Ethernet device structure.
6356 * 0 on success, otherwise negative errno value and rte_errno is set.
6359 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6361 struct mlx5_priv *priv = dev->data->dev_private;
6362 struct mlx5_aso_mtr_pools_mng *pools_mng =
6363 &priv->sh->mtrmng->pools_mng;
6364 void *old_pools = pools_mng->pools;
6365 uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6366 uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6367 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6374 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6379 memcpy(pools, old_pools, pools_mng->n *
6380 sizeof(struct mlx5_aso_mtr_pool *));
6381 pools_mng->n = resize;
6382 pools_mng->pools = pools;
6384 mlx5_free(old_pools);
6389 * Prepare a new meter and/or a new meter pool.
6392 * Pointer to the Ethernet device structure.
6393 * @param[out] mtr_free
6394 * Where to put the pointer of a new meter.g.
6397 * The meter pool pointer and @mtr_free is set on success,
6398 * NULL otherwise and rte_errno is set.
6400 static struct mlx5_aso_mtr_pool *
6401 flow_dv_mtr_pool_create(struct rte_eth_dev *dev,
6402 struct mlx5_aso_mtr **mtr_free)
6404 struct mlx5_priv *priv = dev->data->dev_private;
6405 struct mlx5_aso_mtr_pools_mng *pools_mng =
6406 &priv->sh->mtrmng->pools_mng;
6407 struct mlx5_aso_mtr_pool *pool = NULL;
6408 struct mlx5_devx_obj *dcs = NULL;
6410 uint32_t log_obj_size;
6412 log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6413 dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->ctx,
6414 priv->sh->pdn, log_obj_size);
6416 rte_errno = ENODATA;
6419 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6422 claim_zero(mlx5_devx_cmd_destroy(dcs));
6425 pool->devx_obj = dcs;
6426 pool->index = pools_mng->n_valid;
6427 if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6429 claim_zero(mlx5_devx_cmd_destroy(dcs));
6432 pools_mng->pools[pool->index] = pool;
6433 pools_mng->n_valid++;
6434 for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6435 pool->mtrs[i].offset = i;
6436 LIST_INSERT_HEAD(&pools_mng->meters,
6437 &pool->mtrs[i], next);
6439 pool->mtrs[0].offset = 0;
6440 *mtr_free = &pool->mtrs[0];
6445 * Release a flow meter into pool.
6448 * Pointer to the Ethernet device structure.
6449 * @param[in] mtr_idx
6450 * Index to aso flow meter.
6453 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6455 struct mlx5_priv *priv = dev->data->dev_private;
6456 struct mlx5_aso_mtr_pools_mng *pools_mng =
6457 &priv->sh->mtrmng->pools_mng;
6458 struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6460 MLX5_ASSERT(aso_mtr);
6461 rte_spinlock_lock(&pools_mng->mtrsl);
6462 memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6463 aso_mtr->state = ASO_METER_FREE;
6464 LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6465 rte_spinlock_unlock(&pools_mng->mtrsl);
6469 * Allocate a aso flow meter.
6472 * Pointer to the Ethernet device structure.
6475 * Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6478 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6480 struct mlx5_priv *priv = dev->data->dev_private;
6481 struct mlx5_aso_mtr *mtr_free = NULL;
6482 struct mlx5_aso_mtr_pools_mng *pools_mng =
6483 &priv->sh->mtrmng->pools_mng;
6484 struct mlx5_aso_mtr_pool *pool;
6485 uint32_t mtr_idx = 0;
6487 if (!priv->config.devx) {
6488 rte_errno = ENOTSUP;
6491 /* Allocate the flow meter memory. */
6492 /* Get free meters from management. */
6493 rte_spinlock_lock(&pools_mng->mtrsl);
6494 mtr_free = LIST_FIRST(&pools_mng->meters);
6496 LIST_REMOVE(mtr_free, next);
6497 if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6498 rte_spinlock_unlock(&pools_mng->mtrsl);
6501 mtr_free->state = ASO_METER_WAIT;
6502 rte_spinlock_unlock(&pools_mng->mtrsl);
6503 pool = container_of(mtr_free,
6504 struct mlx5_aso_mtr_pool,
6505 mtrs[mtr_free->offset]);
6506 mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6507 if (!mtr_free->fm.meter_action) {
6508 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6509 struct rte_flow_error error;
6512 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6513 mtr_free->fm.meter_action =
6514 mlx5_glue->dv_create_flow_action_aso
6515 (priv->sh->rx_domain,
6516 pool->devx_obj->obj,
6518 (1 << MLX5_FLOW_COLOR_GREEN),
6520 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6521 if (!mtr_free->fm.meter_action) {
6522 flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6530 * Verify the @p attributes will be correctly understood by the NIC and store
6531 * them in the @p flow if everything is correct.
6534 * Pointer to dev struct.
6535 * @param[in] attributes
6536 * Pointer to flow attributes
6537 * @param[in] external
6538 * This flow rule is created by request external to PMD.
6540 * Pointer to error structure.
6543 * - 0 on success and non root table.
6544 * - 1 on success and root table.
6545 * - a negative errno value otherwise and rte_errno is set.
6548 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6549 const struct mlx5_flow_tunnel *tunnel,
6550 const struct rte_flow_attr *attributes,
6551 const struct flow_grp_info *grp_info,
6552 struct rte_flow_error *error)
6554 struct mlx5_priv *priv = dev->data->dev_private;
6555 uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6558 #ifndef HAVE_MLX5DV_DR
6559 RTE_SET_USED(tunnel);
6560 RTE_SET_USED(grp_info);
6561 if (attributes->group)
6562 return rte_flow_error_set(error, ENOTSUP,
6563 RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6565 "groups are not supported");
6569 ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6574 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6576 if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6577 attributes->priority > lowest_priority)
6578 return rte_flow_error_set(error, ENOTSUP,
6579 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6581 "priority out of range");
6582 if (attributes->transfer) {
6583 if (!priv->config.dv_esw_en)
6584 return rte_flow_error_set
6586 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6587 "E-Switch dr is not supported");
6588 if (!(priv->representor || priv->master))
6589 return rte_flow_error_set
6590 (error, EINVAL, RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6591 NULL, "E-Switch configuration can only be"
6592 " done by a master or a representor device");
6593 if (attributes->egress)
6594 return rte_flow_error_set
6596 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6597 "egress is not supported");
6599 if (!(attributes->egress ^ attributes->ingress))
6600 return rte_flow_error_set(error, ENOTSUP,
6601 RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6602 "must specify exactly one of "
6603 "ingress or egress");
6608 mlx5_flow_locate_proto_l3(const struct rte_flow_item **head,
6609 const struct rte_flow_item *end)
6611 const struct rte_flow_item *item = *head;
6612 uint16_t l3_protocol;
6614 for (; item != end; item++) {
6615 switch (item->type) {
6618 case RTE_FLOW_ITEM_TYPE_IPV4:
6619 l3_protocol = RTE_ETHER_TYPE_IPV4;
6621 case RTE_FLOW_ITEM_TYPE_IPV6:
6622 l3_protocol = RTE_ETHER_TYPE_IPV6;
6624 case RTE_FLOW_ITEM_TYPE_ETH:
6625 if (item->mask && item->spec) {
6626 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_eth,
6629 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6630 l3_protocol == RTE_ETHER_TYPE_IPV6)
6634 case RTE_FLOW_ITEM_TYPE_VLAN:
6635 if (item->mask && item->spec) {
6636 MLX5_ETHER_TYPE_FROM_HEADER(rte_flow_item_vlan,
6639 if (l3_protocol == RTE_ETHER_TYPE_IPV4 ||
6640 l3_protocol == RTE_ETHER_TYPE_IPV6)
6653 mlx5_flow_locate_proto_l4(const struct rte_flow_item **head,
6654 const struct rte_flow_item *end)
6656 const struct rte_flow_item *item = *head;
6657 uint8_t l4_protocol;
6659 for (; item != end; item++) {
6660 switch (item->type) {
6663 case RTE_FLOW_ITEM_TYPE_TCP:
6664 l4_protocol = IPPROTO_TCP;
6666 case RTE_FLOW_ITEM_TYPE_UDP:
6667 l4_protocol = IPPROTO_UDP;
6669 case RTE_FLOW_ITEM_TYPE_IPV4:
6670 if (item->mask && item->spec) {
6671 const struct rte_flow_item_ipv4 *mask, *spec;
6673 mask = (typeof(mask))item->mask;
6674 spec = (typeof(spec))item->spec;
6675 l4_protocol = mask->hdr.next_proto_id &
6676 spec->hdr.next_proto_id;
6677 if (l4_protocol == IPPROTO_TCP ||
6678 l4_protocol == IPPROTO_UDP)
6682 case RTE_FLOW_ITEM_TYPE_IPV6:
6683 if (item->mask && item->spec) {
6684 const struct rte_flow_item_ipv6 *mask, *spec;
6685 mask = (typeof(mask))item->mask;
6686 spec = (typeof(spec))item->spec;
6687 l4_protocol = mask->hdr.proto & spec->hdr.proto;
6688 if (l4_protocol == IPPROTO_TCP ||
6689 l4_protocol == IPPROTO_UDP)
6702 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6703 const struct rte_flow_item *rule_items,
6704 const struct rte_flow_item *integrity_item,
6705 struct rte_flow_error *error)
6707 struct mlx5_priv *priv = dev->data->dev_private;
6708 const struct rte_flow_item *tunnel_item, *end_item, *item = rule_items;
6709 const struct rte_flow_item_integrity *mask = (typeof(mask))
6710 integrity_item->mask;
6711 const struct rte_flow_item_integrity *spec = (typeof(spec))
6712 integrity_item->spec;
6715 if (!priv->config.hca_attr.pkt_integrity_match)
6716 return rte_flow_error_set(error, ENOTSUP,
6717 RTE_FLOW_ERROR_TYPE_ITEM,
6719 "packet integrity integrity_item not supported");
6721 mask = &rte_flow_item_integrity_mask;
6722 if (!mlx5_validate_integrity_item(mask))
6723 return rte_flow_error_set(error, ENOTSUP,
6724 RTE_FLOW_ERROR_TYPE_ITEM,
6726 "unsupported integrity filter");
6727 tunnel_item = mlx5_flow_find_tunnel_item(rule_items);
6728 if (spec->level > 1) {
6730 return rte_flow_error_set(error, ENOTSUP,
6731 RTE_FLOW_ERROR_TYPE_ITEM,
6733 "missing tunnel item");
6735 end_item = mlx5_find_end_item(tunnel_item);
6737 end_item = tunnel_item ? tunnel_item :
6738 mlx5_find_end_item(integrity_item);
6740 if (mask->l3_ok || mask->ipv4_csum_ok) {
6741 protocol = mlx5_flow_locate_proto_l3(&item, end_item);
6743 return rte_flow_error_set(error, EINVAL,
6744 RTE_FLOW_ERROR_TYPE_ITEM,
6746 "missing L3 protocol");
6748 if (mask->l4_ok || mask->l4_csum_ok) {
6749 protocol = mlx5_flow_locate_proto_l4(&item, end_item);
6751 return rte_flow_error_set(error, EINVAL,
6752 RTE_FLOW_ERROR_TYPE_ITEM,
6754 "missing L4 protocol");
6760 * Internal validation function. For validating both actions and items.
6763 * Pointer to the rte_eth_dev structure.
6765 * Pointer to the flow attributes.
6767 * Pointer to the list of items.
6768 * @param[in] actions
6769 * Pointer to the list of actions.
6770 * @param[in] external
6771 * This flow rule is created by request external to PMD.
6772 * @param[in] hairpin
6773 * Number of hairpin TX actions, 0 means classic flow.
6775 * Pointer to the error structure.
6778 * 0 on success, a negative errno value otherwise and rte_errno is set.
6781 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6782 const struct rte_flow_item items[],
6783 const struct rte_flow_action actions[],
6784 bool external, int hairpin, struct rte_flow_error *error)
6787 uint64_t action_flags = 0;
6788 uint64_t item_flags = 0;
6789 uint64_t last_item = 0;
6790 uint8_t next_protocol = 0xff;
6791 uint16_t ether_type = 0;
6793 uint8_t item_ipv6_proto = 0;
6794 int fdb_mirror_limit = 0;
6795 int modify_after_mirror = 0;
6796 const struct rte_flow_item *geneve_item = NULL;
6797 const struct rte_flow_item *gre_item = NULL;
6798 const struct rte_flow_item *gtp_item = NULL;
6799 const struct rte_flow_action_raw_decap *decap;
6800 const struct rte_flow_action_raw_encap *encap;
6801 const struct rte_flow_action_rss *rss = NULL;
6802 const struct rte_flow_action_rss *sample_rss = NULL;
6803 const struct rte_flow_action_count *sample_count = NULL;
6804 const struct rte_flow_item_tcp nic_tcp_mask = {
6807 .src_port = RTE_BE16(UINT16_MAX),
6808 .dst_port = RTE_BE16(UINT16_MAX),
6811 const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6814 "\xff\xff\xff\xff\xff\xff\xff\xff"
6815 "\xff\xff\xff\xff\xff\xff\xff\xff",
6817 "\xff\xff\xff\xff\xff\xff\xff\xff"
6818 "\xff\xff\xff\xff\xff\xff\xff\xff",
6819 .vtc_flow = RTE_BE32(0xffffffff),
6825 const struct rte_flow_item_ecpri nic_ecpri_mask = {
6829 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6833 .dummy[0] = 0xffffffff,
6836 struct mlx5_priv *priv = dev->data->dev_private;
6837 struct mlx5_dev_config *dev_conf = &priv->config;
6838 uint16_t queue_index = 0xFFFF;
6839 const struct rte_flow_item_vlan *vlan_m = NULL;
6840 uint32_t rw_act_num = 0;
6842 const struct mlx5_flow_tunnel *tunnel;
6843 enum mlx5_tof_rule_type tof_rule_type;
6844 struct flow_grp_info grp_info = {
6845 .external = !!external,
6846 .transfer = !!attr->transfer,
6847 .fdb_def_rule = !!priv->fdb_def_rule,
6848 .std_tbl_fix = true,
6850 const struct rte_eth_hairpin_conf *conf;
6851 const struct rte_flow_item *rule_items = items;
6852 const struct rte_flow_item *port_id_item = NULL;
6853 bool def_policy = false;
6857 tunnel = is_tunnel_offload_active(dev) ?
6858 mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6860 if (priv->representor)
6861 return rte_flow_error_set
6863 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6864 NULL, "decap not supported for VF representor");
6865 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6866 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6867 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6868 action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6869 MLX5_FLOW_ACTION_DECAP;
6870 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6871 (dev, attr, tunnel, tof_rule_type);
6873 ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6876 is_root = (uint64_t)ret;
6877 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6878 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6879 int type = items->type;
6881 if (!mlx5_flow_os_item_supported(type))
6882 return rte_flow_error_set(error, ENOTSUP,
6883 RTE_FLOW_ERROR_TYPE_ITEM,
6884 NULL, "item not supported");
6886 case RTE_FLOW_ITEM_TYPE_VOID:
6888 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6889 ret = flow_dv_validate_item_port_id
6890 (dev, items, attr, item_flags, error);
6893 last_item = MLX5_FLOW_ITEM_PORT_ID;
6894 port_id_item = items;
6896 case RTE_FLOW_ITEM_TYPE_ETH:
6897 ret = mlx5_flow_validate_item_eth(items, item_flags,
6901 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6902 MLX5_FLOW_LAYER_OUTER_L2;
6903 if (items->mask != NULL && items->spec != NULL) {
6905 ((const struct rte_flow_item_eth *)
6908 ((const struct rte_flow_item_eth *)
6910 ether_type = rte_be_to_cpu_16(ether_type);
6915 case RTE_FLOW_ITEM_TYPE_VLAN:
6916 ret = flow_dv_validate_item_vlan(items, item_flags,
6920 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
6921 MLX5_FLOW_LAYER_OUTER_VLAN;
6922 if (items->mask != NULL && items->spec != NULL) {
6924 ((const struct rte_flow_item_vlan *)
6925 items->spec)->inner_type;
6927 ((const struct rte_flow_item_vlan *)
6928 items->mask)->inner_type;
6929 ether_type = rte_be_to_cpu_16(ether_type);
6933 /* Store outer VLAN mask for of_push_vlan action. */
6935 vlan_m = items->mask;
6937 case RTE_FLOW_ITEM_TYPE_IPV4:
6938 mlx5_flow_tunnel_ip_check(items, next_protocol,
6939 &item_flags, &tunnel);
6940 ret = flow_dv_validate_item_ipv4(items, item_flags,
6941 last_item, ether_type,
6945 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
6946 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
6947 if (items->mask != NULL &&
6948 ((const struct rte_flow_item_ipv4 *)
6949 items->mask)->hdr.next_proto_id) {
6951 ((const struct rte_flow_item_ipv4 *)
6952 (items->spec))->hdr.next_proto_id;
6954 ((const struct rte_flow_item_ipv4 *)
6955 (items->mask))->hdr.next_proto_id;
6957 /* Reset for inner layer. */
6958 next_protocol = 0xff;
6961 case RTE_FLOW_ITEM_TYPE_IPV6:
6962 mlx5_flow_tunnel_ip_check(items, next_protocol,
6963 &item_flags, &tunnel);
6964 ret = mlx5_flow_validate_item_ipv6(items, item_flags,
6971 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
6972 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
6973 if (items->mask != NULL &&
6974 ((const struct rte_flow_item_ipv6 *)
6975 items->mask)->hdr.proto) {
6977 ((const struct rte_flow_item_ipv6 *)
6978 items->spec)->hdr.proto;
6980 ((const struct rte_flow_item_ipv6 *)
6981 items->spec)->hdr.proto;
6983 ((const struct rte_flow_item_ipv6 *)
6984 items->mask)->hdr.proto;
6986 /* Reset for inner layer. */
6987 next_protocol = 0xff;
6990 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
6991 ret = flow_dv_validate_item_ipv6_frag_ext(items,
6996 last_item = tunnel ?
6997 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
6998 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
6999 if (items->mask != NULL &&
7000 ((const struct rte_flow_item_ipv6_frag_ext *)
7001 items->mask)->hdr.next_header) {
7003 ((const struct rte_flow_item_ipv6_frag_ext *)
7004 items->spec)->hdr.next_header;
7006 ((const struct rte_flow_item_ipv6_frag_ext *)
7007 items->mask)->hdr.next_header;
7009 /* Reset for inner layer. */
7010 next_protocol = 0xff;
7013 case RTE_FLOW_ITEM_TYPE_TCP:
7014 ret = mlx5_flow_validate_item_tcp
7021 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7022 MLX5_FLOW_LAYER_OUTER_L4_TCP;
7024 case RTE_FLOW_ITEM_TYPE_UDP:
7025 ret = mlx5_flow_validate_item_udp(items, item_flags,
7030 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7031 MLX5_FLOW_LAYER_OUTER_L4_UDP;
7033 case RTE_FLOW_ITEM_TYPE_GRE:
7034 ret = mlx5_flow_validate_item_gre(items, item_flags,
7035 next_protocol, error);
7039 last_item = MLX5_FLOW_LAYER_GRE;
7041 case RTE_FLOW_ITEM_TYPE_NVGRE:
7042 ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7047 last_item = MLX5_FLOW_LAYER_NVGRE;
7049 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7050 ret = mlx5_flow_validate_item_gre_key
7051 (items, item_flags, gre_item, error);
7054 last_item = MLX5_FLOW_LAYER_GRE_KEY;
7056 case RTE_FLOW_ITEM_TYPE_VXLAN:
7057 ret = mlx5_flow_validate_item_vxlan(dev, items,
7062 last_item = MLX5_FLOW_LAYER_VXLAN;
7064 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7065 ret = mlx5_flow_validate_item_vxlan_gpe(items,
7070 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7072 case RTE_FLOW_ITEM_TYPE_GENEVE:
7073 ret = mlx5_flow_validate_item_geneve(items,
7078 geneve_item = items;
7079 last_item = MLX5_FLOW_LAYER_GENEVE;
7081 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7082 ret = mlx5_flow_validate_item_geneve_opt(items,
7089 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7091 case RTE_FLOW_ITEM_TYPE_MPLS:
7092 ret = mlx5_flow_validate_item_mpls(dev, items,
7097 last_item = MLX5_FLOW_LAYER_MPLS;
7100 case RTE_FLOW_ITEM_TYPE_MARK:
7101 ret = flow_dv_validate_item_mark(dev, items, attr,
7105 last_item = MLX5_FLOW_ITEM_MARK;
7107 case RTE_FLOW_ITEM_TYPE_META:
7108 ret = flow_dv_validate_item_meta(dev, items, attr,
7112 last_item = MLX5_FLOW_ITEM_METADATA;
7114 case RTE_FLOW_ITEM_TYPE_ICMP:
7115 ret = mlx5_flow_validate_item_icmp(items, item_flags,
7120 last_item = MLX5_FLOW_LAYER_ICMP;
7122 case RTE_FLOW_ITEM_TYPE_ICMP6:
7123 ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7128 item_ipv6_proto = IPPROTO_ICMPV6;
7129 last_item = MLX5_FLOW_LAYER_ICMP6;
7131 case RTE_FLOW_ITEM_TYPE_TAG:
7132 ret = flow_dv_validate_item_tag(dev, items,
7136 last_item = MLX5_FLOW_ITEM_TAG;
7138 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7139 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7141 case RTE_FLOW_ITEM_TYPE_GTP:
7142 ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7147 last_item = MLX5_FLOW_LAYER_GTP;
7149 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7150 ret = flow_dv_validate_item_gtp_psc(items, last_item,
7155 last_item = MLX5_FLOW_LAYER_GTP_PSC;
7157 case RTE_FLOW_ITEM_TYPE_ECPRI:
7158 /* Capacity will be checked in the translate stage. */
7159 ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7166 last_item = MLX5_FLOW_LAYER_ECPRI;
7168 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7169 if (item_flags & MLX5_FLOW_ITEM_INTEGRITY)
7170 return rte_flow_error_set
7172 RTE_FLOW_ERROR_TYPE_ITEM,
7173 NULL, "multiple integrity items not supported");
7174 ret = flow_dv_validate_item_integrity(dev, rule_items,
7178 last_item = MLX5_FLOW_ITEM_INTEGRITY;
7180 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7181 ret = flow_dv_validate_item_aso_ct(dev, items,
7182 &item_flags, error);
7186 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7187 /* tunnel offload item was processed before
7188 * list it here as a supported type
7192 return rte_flow_error_set(error, ENOTSUP,
7193 RTE_FLOW_ERROR_TYPE_ITEM,
7194 NULL, "item not supported");
7196 item_flags |= last_item;
7198 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7199 int type = actions->type;
7200 bool shared_count = false;
7202 if (!mlx5_flow_os_action_supported(type))
7203 return rte_flow_error_set(error, ENOTSUP,
7204 RTE_FLOW_ERROR_TYPE_ACTION,
7206 "action not supported");
7207 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7208 return rte_flow_error_set(error, ENOTSUP,
7209 RTE_FLOW_ERROR_TYPE_ACTION,
7210 actions, "too many actions");
7212 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7213 return rte_flow_error_set(error, ENOTSUP,
7214 RTE_FLOW_ERROR_TYPE_ACTION,
7215 NULL, "meter action with policy "
7216 "must be the last action");
7218 case RTE_FLOW_ACTION_TYPE_VOID:
7220 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7221 ret = flow_dv_validate_action_port_id(dev,
7228 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7231 case RTE_FLOW_ACTION_TYPE_FLAG:
7232 ret = flow_dv_validate_action_flag(dev, action_flags,
7236 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7237 /* Count all modify-header actions as one. */
7238 if (!(action_flags &
7239 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7241 action_flags |= MLX5_FLOW_ACTION_FLAG |
7242 MLX5_FLOW_ACTION_MARK_EXT;
7243 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7244 modify_after_mirror = 1;
7247 action_flags |= MLX5_FLOW_ACTION_FLAG;
7250 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7252 case RTE_FLOW_ACTION_TYPE_MARK:
7253 ret = flow_dv_validate_action_mark(dev, actions,
7258 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7259 /* Count all modify-header actions as one. */
7260 if (!(action_flags &
7261 MLX5_FLOW_MODIFY_HDR_ACTIONS))
7263 action_flags |= MLX5_FLOW_ACTION_MARK |
7264 MLX5_FLOW_ACTION_MARK_EXT;
7265 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7266 modify_after_mirror = 1;
7268 action_flags |= MLX5_FLOW_ACTION_MARK;
7271 rw_act_num += MLX5_ACT_NUM_SET_MARK;
7273 case RTE_FLOW_ACTION_TYPE_SET_META:
7274 ret = flow_dv_validate_action_set_meta(dev, actions,
7279 /* Count all modify-header actions as one action. */
7280 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7282 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7283 modify_after_mirror = 1;
7284 action_flags |= MLX5_FLOW_ACTION_SET_META;
7285 rw_act_num += MLX5_ACT_NUM_SET_META;
7287 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7288 ret = flow_dv_validate_action_set_tag(dev, actions,
7293 /* Count all modify-header actions as one action. */
7294 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7296 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7297 modify_after_mirror = 1;
7298 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7299 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7301 case RTE_FLOW_ACTION_TYPE_DROP:
7302 ret = mlx5_flow_validate_action_drop(action_flags,
7306 action_flags |= MLX5_FLOW_ACTION_DROP;
7309 case RTE_FLOW_ACTION_TYPE_QUEUE:
7310 ret = mlx5_flow_validate_action_queue(actions,
7315 queue_index = ((const struct rte_flow_action_queue *)
7316 (actions->conf))->index;
7317 action_flags |= MLX5_FLOW_ACTION_QUEUE;
7320 case RTE_FLOW_ACTION_TYPE_RSS:
7321 rss = actions->conf;
7322 ret = mlx5_flow_validate_action_rss(actions,
7328 if (rss && sample_rss &&
7329 (sample_rss->level != rss->level ||
7330 sample_rss->types != rss->types))
7331 return rte_flow_error_set(error, ENOTSUP,
7332 RTE_FLOW_ERROR_TYPE_ACTION,
7334 "Can't use the different RSS types "
7335 "or level in the same flow");
7336 if (rss != NULL && rss->queue_num)
7337 queue_index = rss->queue[0];
7338 action_flags |= MLX5_FLOW_ACTION_RSS;
7341 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7343 mlx5_flow_validate_action_default_miss(action_flags,
7347 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7350 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7351 case RTE_FLOW_ACTION_TYPE_COUNT:
7352 shared_count = is_shared_action_count(actions);
7353 ret = flow_dv_validate_action_count(dev, shared_count,
7358 action_flags |= MLX5_FLOW_ACTION_COUNT;
7361 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7362 if (flow_dv_validate_action_pop_vlan(dev,
7368 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7369 modify_after_mirror = 1;
7370 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7373 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7374 ret = flow_dv_validate_action_push_vlan(dev,
7381 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7382 modify_after_mirror = 1;
7383 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7386 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7387 ret = flow_dv_validate_action_set_vlan_pcp
7388 (action_flags, actions, error);
7391 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7392 modify_after_mirror = 1;
7393 /* Count PCP with push_vlan command. */
7394 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7396 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7397 ret = flow_dv_validate_action_set_vlan_vid
7398 (item_flags, action_flags,
7402 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7403 modify_after_mirror = 1;
7404 /* Count VID with push_vlan command. */
7405 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7406 rw_act_num += MLX5_ACT_NUM_MDF_VID;
7408 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7409 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7410 ret = flow_dv_validate_action_l2_encap(dev,
7416 action_flags |= MLX5_FLOW_ACTION_ENCAP;
7419 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7420 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7421 ret = flow_dv_validate_action_decap(dev, action_flags,
7422 actions, item_flags,
7426 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7427 modify_after_mirror = 1;
7428 action_flags |= MLX5_FLOW_ACTION_DECAP;
7431 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7432 ret = flow_dv_validate_action_raw_encap_decap
7433 (dev, NULL, actions->conf, attr, &action_flags,
7434 &actions_n, actions, item_flags, error);
7438 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7439 decap = actions->conf;
7440 while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7442 if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7446 encap = actions->conf;
7448 ret = flow_dv_validate_action_raw_encap_decap
7450 decap ? decap : &empty_decap, encap,
7451 attr, &action_flags, &actions_n,
7452 actions, item_flags, error);
7455 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7456 (action_flags & MLX5_FLOW_ACTION_DECAP))
7457 modify_after_mirror = 1;
7459 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7460 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7461 ret = flow_dv_validate_action_modify_mac(action_flags,
7467 /* Count all modify-header actions as one action. */
7468 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7470 action_flags |= actions->type ==
7471 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7472 MLX5_FLOW_ACTION_SET_MAC_SRC :
7473 MLX5_FLOW_ACTION_SET_MAC_DST;
7474 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7475 modify_after_mirror = 1;
7477 * Even if the source and destination MAC addresses have
7478 * overlap in the header with 4B alignment, the convert
7479 * function will handle them separately and 4 SW actions
7480 * will be created. And 2 actions will be added each
7481 * time no matter how many bytes of address will be set.
7483 rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7485 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7486 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7487 ret = flow_dv_validate_action_modify_ipv4(action_flags,
7493 /* Count all modify-header actions as one action. */
7494 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7496 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7497 modify_after_mirror = 1;
7498 action_flags |= actions->type ==
7499 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7500 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7501 MLX5_FLOW_ACTION_SET_IPV4_DST;
7502 rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7504 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7505 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7506 ret = flow_dv_validate_action_modify_ipv6(action_flags,
7512 if (item_ipv6_proto == IPPROTO_ICMPV6)
7513 return rte_flow_error_set(error, ENOTSUP,
7514 RTE_FLOW_ERROR_TYPE_ACTION,
7516 "Can't change header "
7517 "with ICMPv6 proto");
7518 /* Count all modify-header actions as one action. */
7519 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7521 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7522 modify_after_mirror = 1;
7523 action_flags |= actions->type ==
7524 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7525 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7526 MLX5_FLOW_ACTION_SET_IPV6_DST;
7527 rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7529 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7530 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7531 ret = flow_dv_validate_action_modify_tp(action_flags,
7537 /* Count all modify-header actions as one action. */
7538 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7540 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7541 modify_after_mirror = 1;
7542 action_flags |= actions->type ==
7543 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7544 MLX5_FLOW_ACTION_SET_TP_SRC :
7545 MLX5_FLOW_ACTION_SET_TP_DST;
7546 rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7548 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7549 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7550 ret = flow_dv_validate_action_modify_ttl(action_flags,
7556 /* Count all modify-header actions as one action. */
7557 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7559 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7560 modify_after_mirror = 1;
7561 action_flags |= actions->type ==
7562 RTE_FLOW_ACTION_TYPE_SET_TTL ?
7563 MLX5_FLOW_ACTION_SET_TTL :
7564 MLX5_FLOW_ACTION_DEC_TTL;
7565 rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7567 case RTE_FLOW_ACTION_TYPE_JUMP:
7568 ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7574 if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7576 return rte_flow_error_set(error, EINVAL,
7577 RTE_FLOW_ERROR_TYPE_ACTION,
7579 "sample and jump action combination is not supported");
7581 action_flags |= MLX5_FLOW_ACTION_JUMP;
7583 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7584 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7585 ret = flow_dv_validate_action_modify_tcp_seq
7592 /* Count all modify-header actions as one action. */
7593 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7595 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7596 modify_after_mirror = 1;
7597 action_flags |= actions->type ==
7598 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7599 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7600 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7601 rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7603 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7604 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7605 ret = flow_dv_validate_action_modify_tcp_ack
7612 /* Count all modify-header actions as one action. */
7613 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7615 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7616 modify_after_mirror = 1;
7617 action_flags |= actions->type ==
7618 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7619 MLX5_FLOW_ACTION_INC_TCP_ACK :
7620 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7621 rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7623 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7625 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7626 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7627 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7629 case RTE_FLOW_ACTION_TYPE_METER:
7630 ret = mlx5_flow_validate_action_meter(dev,
7638 action_flags |= MLX5_FLOW_ACTION_METER;
7641 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7643 /* Meter action will add one more TAG action. */
7644 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7646 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7647 if (!attr->transfer && !attr->group)
7648 return rte_flow_error_set(error, ENOTSUP,
7649 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7651 "Shared ASO age action is not supported for group 0");
7652 if (action_flags & MLX5_FLOW_ACTION_AGE)
7653 return rte_flow_error_set
7655 RTE_FLOW_ERROR_TYPE_ACTION,
7657 "duplicate age actions set");
7658 action_flags |= MLX5_FLOW_ACTION_AGE;
7661 case RTE_FLOW_ACTION_TYPE_AGE:
7662 ret = flow_dv_validate_action_age(action_flags,
7668 * Validate the regular AGE action (using counter)
7669 * mutual exclusion with share counter actions.
7671 if (!priv->sh->flow_hit_aso_en) {
7673 return rte_flow_error_set
7675 RTE_FLOW_ERROR_TYPE_ACTION,
7677 "old age and shared count combination is not supported");
7679 return rte_flow_error_set
7681 RTE_FLOW_ERROR_TYPE_ACTION,
7683 "old age action and count must be in the same sub flow");
7685 action_flags |= MLX5_FLOW_ACTION_AGE;
7688 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7689 ret = flow_dv_validate_action_modify_ipv4_dscp
7696 /* Count all modify-header actions as one action. */
7697 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7699 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7700 modify_after_mirror = 1;
7701 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7702 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7704 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7705 ret = flow_dv_validate_action_modify_ipv6_dscp
7712 /* Count all modify-header actions as one action. */
7713 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7715 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7716 modify_after_mirror = 1;
7717 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7718 rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7720 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7721 ret = flow_dv_validate_action_sample(&action_flags,
7730 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7733 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7734 ret = flow_dv_validate_action_modify_field(dev,
7741 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7742 modify_after_mirror = 1;
7743 /* Count all modify-header actions as one action. */
7744 if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7746 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7749 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7750 ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7755 action_flags |= MLX5_FLOW_ACTION_CT;
7757 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7758 /* tunnel offload action was processed before
7759 * list it here as a supported type
7763 return rte_flow_error_set(error, ENOTSUP,
7764 RTE_FLOW_ERROR_TYPE_ACTION,
7766 "action not supported");
7770 * Validate actions in flow rules
7771 * - Explicit decap action is prohibited by the tunnel offload API.
7772 * - Drop action in tunnel steer rule is prohibited by the API.
7773 * - Application cannot use MARK action because it's value can mask
7774 * tunnel default miss nitification.
7775 * - JUMP in tunnel match rule has no support in current PMD
7777 * - TAG & META are reserved for future uses.
7779 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7780 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP |
7781 MLX5_FLOW_ACTION_MARK |
7782 MLX5_FLOW_ACTION_SET_TAG |
7783 MLX5_FLOW_ACTION_SET_META |
7784 MLX5_FLOW_ACTION_DROP;
7786 if (action_flags & bad_actions_mask)
7787 return rte_flow_error_set
7789 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7790 "Invalid RTE action in tunnel "
7792 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7793 return rte_flow_error_set
7795 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7796 "tunnel set decap rule must terminate "
7799 return rte_flow_error_set
7801 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7802 "tunnel flows for ingress traffic only");
7804 if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7805 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP |
7806 MLX5_FLOW_ACTION_MARK |
7807 MLX5_FLOW_ACTION_SET_TAG |
7808 MLX5_FLOW_ACTION_SET_META;
7810 if (action_flags & bad_actions_mask)
7811 return rte_flow_error_set
7813 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7814 "Invalid RTE action in tunnel "
7818 * Validate the drop action mutual exclusion with other actions.
7819 * Drop action is mutually-exclusive with any other action, except for
7821 * Drop action compatibility with tunnel offload was already validated.
7823 if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7824 MLX5_FLOW_ACTION_TUNNEL_MATCH));
7825 else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7826 (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7827 return rte_flow_error_set(error, EINVAL,
7828 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7829 "Drop action is mutually-exclusive "
7830 "with any other action, except for "
7832 /* Eswitch has few restrictions on using items and actions */
7833 if (attr->transfer) {
7834 if (!mlx5_flow_ext_mreg_supported(dev) &&
7835 action_flags & MLX5_FLOW_ACTION_FLAG)
7836 return rte_flow_error_set(error, ENOTSUP,
7837 RTE_FLOW_ERROR_TYPE_ACTION,
7839 "unsupported action FLAG");
7840 if (!mlx5_flow_ext_mreg_supported(dev) &&
7841 action_flags & MLX5_FLOW_ACTION_MARK)
7842 return rte_flow_error_set(error, ENOTSUP,
7843 RTE_FLOW_ERROR_TYPE_ACTION,
7845 "unsupported action MARK");
7846 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7847 return rte_flow_error_set(error, ENOTSUP,
7848 RTE_FLOW_ERROR_TYPE_ACTION,
7850 "unsupported action QUEUE");
7851 if (action_flags & MLX5_FLOW_ACTION_RSS)
7852 return rte_flow_error_set(error, ENOTSUP,
7853 RTE_FLOW_ERROR_TYPE_ACTION,
7855 "unsupported action RSS");
7856 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7857 return rte_flow_error_set(error, EINVAL,
7858 RTE_FLOW_ERROR_TYPE_ACTION,
7860 "no fate action is found");
7862 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7863 return rte_flow_error_set(error, EINVAL,
7864 RTE_FLOW_ERROR_TYPE_ACTION,
7866 "no fate action is found");
7869 * Continue validation for Xcap and VLAN actions.
7870 * If hairpin is working in explicit TX rule mode, there is no actions
7871 * splitting and the validation of hairpin ingress flow should be the
7872 * same as other standard flows.
7874 if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7875 MLX5_FLOW_VLAN_ACTIONS)) &&
7876 (queue_index == 0xFFFF ||
7877 mlx5_rxq_get_type(dev, queue_index) != MLX5_RXQ_TYPE_HAIRPIN ||
7878 ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7879 conf->tx_explicit != 0))) {
7880 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7881 MLX5_FLOW_XCAP_ACTIONS)
7882 return rte_flow_error_set(error, ENOTSUP,
7883 RTE_FLOW_ERROR_TYPE_ACTION,
7884 NULL, "encap and decap "
7885 "combination aren't supported");
7886 if (!attr->transfer && attr->ingress) {
7887 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7888 return rte_flow_error_set
7890 RTE_FLOW_ERROR_TYPE_ACTION,
7891 NULL, "encap is not supported"
7892 " for ingress traffic");
7893 else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7894 return rte_flow_error_set
7896 RTE_FLOW_ERROR_TYPE_ACTION,
7897 NULL, "push VLAN action not "
7898 "supported for ingress");
7899 else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
7900 MLX5_FLOW_VLAN_ACTIONS)
7901 return rte_flow_error_set
7903 RTE_FLOW_ERROR_TYPE_ACTION,
7904 NULL, "no support for "
7905 "multiple VLAN actions");
7908 if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
7909 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
7910 ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
7912 return rte_flow_error_set
7914 RTE_FLOW_ERROR_TYPE_ACTION,
7915 NULL, "fate action not supported for "
7916 "meter with policy");
7918 if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
7919 return rte_flow_error_set
7921 RTE_FLOW_ERROR_TYPE_ACTION,
7922 NULL, "modify header action in egress "
7923 "cannot be done before meter action");
7924 if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7925 return rte_flow_error_set
7927 RTE_FLOW_ERROR_TYPE_ACTION,
7928 NULL, "encap action in egress "
7929 "cannot be done before meter action");
7930 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
7931 return rte_flow_error_set
7933 RTE_FLOW_ERROR_TYPE_ACTION,
7934 NULL, "push vlan action in egress "
7935 "cannot be done before meter action");
7939 * Hairpin flow will add one more TAG action in TX implicit mode.
7940 * In TX explicit mode, there will be no hairpin flow ID.
7943 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7944 /* extra metadata enabled: one more TAG action will be add. */
7945 if (dev_conf->dv_flow_en &&
7946 dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
7947 mlx5_flow_ext_mreg_supported(dev))
7948 rw_act_num += MLX5_ACT_NUM_SET_TAG;
7950 flow_dv_modify_hdr_action_max(dev, is_root)) {
7951 return rte_flow_error_set(error, ENOTSUP,
7952 RTE_FLOW_ERROR_TYPE_ACTION,
7953 NULL, "too many header modify"
7954 " actions to support");
7956 /* Eswitch egress mirror and modify flow has limitation on CX5 */
7957 if (fdb_mirror_limit && modify_after_mirror)
7958 return rte_flow_error_set(error, EINVAL,
7959 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7960 "sample before modify action is not supported");
7965 * Internal preparation function. Allocates the DV flow size,
7966 * this size is constant.
7969 * Pointer to the rte_eth_dev structure.
7971 * Pointer to the flow attributes.
7973 * Pointer to the list of items.
7974 * @param[in] actions
7975 * Pointer to the list of actions.
7977 * Pointer to the error structure.
7980 * Pointer to mlx5_flow object on success,
7981 * otherwise NULL and rte_errno is set.
7983 static struct mlx5_flow *
7984 flow_dv_prepare(struct rte_eth_dev *dev,
7985 const struct rte_flow_attr *attr __rte_unused,
7986 const struct rte_flow_item items[] __rte_unused,
7987 const struct rte_flow_action actions[] __rte_unused,
7988 struct rte_flow_error *error)
7990 uint32_t handle_idx = 0;
7991 struct mlx5_flow *dev_flow;
7992 struct mlx5_flow_handle *dev_handle;
7993 struct mlx5_priv *priv = dev->data->dev_private;
7994 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
7997 wks->skip_matcher_reg = 0;
7999 wks->final_policy = NULL;
8000 /* In case of corrupting the memory. */
8001 if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8002 rte_flow_error_set(error, ENOSPC,
8003 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8004 "not free temporary device flow");
8007 dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8010 rte_flow_error_set(error, ENOMEM,
8011 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8012 "not enough memory to create flow handle");
8015 MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8016 dev_flow = &wks->flows[wks->flow_idx++];
8017 memset(dev_flow, 0, sizeof(*dev_flow));
8018 dev_flow->handle = dev_handle;
8019 dev_flow->handle_idx = handle_idx;
8020 dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8021 dev_flow->ingress = attr->ingress;
8022 dev_flow->dv.transfer = attr->transfer;
8026 #ifdef RTE_LIBRTE_MLX5_DEBUG
8028 * Sanity check for match mask and value. Similar to check_valid_spec() in
8029 * kernel driver. If unmasked bit is present in value, it returns failure.
8032 * pointer to match mask buffer.
8033 * @param match_value
8034 * pointer to match value buffer.
8037 * 0 if valid, -EINVAL otherwise.
8040 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8042 uint8_t *m = match_mask;
8043 uint8_t *v = match_value;
8046 for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8049 "match_value differs from match_criteria"
8050 " %p[%u] != %p[%u]",
8051 match_value, i, match_mask, i);
8060 * Add match of ip_version.
8064 * @param[in] headers_v
8065 * Values header pointer.
8066 * @param[in] headers_m
8067 * Masks header pointer.
8068 * @param[in] ip_version
8069 * The IP version to set.
8072 flow_dv_set_match_ip_version(uint32_t group,
8078 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8080 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8082 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8083 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8084 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8088 * Add Ethernet item to matcher and to the value.
8090 * @param[in, out] matcher
8092 * @param[in, out] key
8093 * Flow matcher value.
8095 * Flow pattern to translate.
8097 * Item is inner pattern.
8100 flow_dv_translate_item_eth(void *matcher, void *key,
8101 const struct rte_flow_item *item, int inner,
8104 const struct rte_flow_item_eth *eth_m = item->mask;
8105 const struct rte_flow_item_eth *eth_v = item->spec;
8106 const struct rte_flow_item_eth nic_mask = {
8107 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8108 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8109 .type = RTE_BE16(0xffff),
8122 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8124 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8126 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8128 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8130 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8131 ð_m->dst, sizeof(eth_m->dst));
8132 /* The value must be in the range of the mask. */
8133 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8134 for (i = 0; i < sizeof(eth_m->dst); ++i)
8135 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8136 memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8137 ð_m->src, sizeof(eth_m->src));
8138 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8139 /* The value must be in the range of the mask. */
8140 for (i = 0; i < sizeof(eth_m->dst); ++i)
8141 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8143 * HW supports match on one Ethertype, the Ethertype following the last
8144 * VLAN tag of the packet (see PRM).
8145 * Set match on ethertype only if ETH header is not followed by VLAN.
8146 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8147 * ethertype, and use ip_version field instead.
8148 * eCPRI over Ether layer will use type value 0xAEFE.
8150 if (eth_m->type == 0xFFFF) {
8151 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8152 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8153 switch (eth_v->type) {
8154 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8155 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8157 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8158 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8159 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8161 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8162 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8164 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8165 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8171 if (eth_m->has_vlan) {
8172 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8173 if (eth_v->has_vlan) {
8175 * Here, when also has_more_vlan field in VLAN item is
8176 * not set, only single-tagged packets will be matched.
8178 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8182 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8183 rte_be_to_cpu_16(eth_m->type));
8184 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8185 *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8189 * Add VLAN item to matcher and to the value.
8191 * @param[in, out] dev_flow
8193 * @param[in, out] matcher
8195 * @param[in, out] key
8196 * Flow matcher value.
8198 * Flow pattern to translate.
8200 * Item is inner pattern.
8203 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8204 void *matcher, void *key,
8205 const struct rte_flow_item *item,
8206 int inner, uint32_t group)
8208 const struct rte_flow_item_vlan *vlan_m = item->mask;
8209 const struct rte_flow_item_vlan *vlan_v = item->spec;
8216 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8218 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8220 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8222 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8224 * This is workaround, masks are not supported,
8225 * and pre-validated.
8228 dev_flow->handle->vf_vlan.tag =
8229 rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8232 * When VLAN item exists in flow, mark packet as tagged,
8233 * even if TCI is not specified.
8235 if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8236 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8237 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8242 vlan_m = &rte_flow_item_vlan_mask;
8243 tci_m = rte_be_to_cpu_16(vlan_m->tci);
8244 tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8245 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8246 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8247 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8248 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8249 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8250 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8252 * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8253 * ethertype, and use ip_version field instead.
8255 if (vlan_m->inner_type == 0xFFFF) {
8256 switch (vlan_v->inner_type) {
8257 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8258 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8259 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8260 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8262 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8263 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8265 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8266 flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8272 if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8273 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8274 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8275 /* Only one vlan_tag bit can be set. */
8276 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8279 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8280 rte_be_to_cpu_16(vlan_m->inner_type));
8281 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8282 rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8286 * Add IPV4 item to matcher and to the value.
8288 * @param[in, out] matcher
8290 * @param[in, out] key
8291 * Flow matcher value.
8293 * Flow pattern to translate.
8295 * Item is inner pattern.
8297 * The group to insert the rule.
8300 flow_dv_translate_item_ipv4(void *matcher, void *key,
8301 const struct rte_flow_item *item,
8302 int inner, uint32_t group)
8304 const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8305 const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8306 const struct rte_flow_item_ipv4 nic_mask = {
8308 .src_addr = RTE_BE32(0xffffffff),
8309 .dst_addr = RTE_BE32(0xffffffff),
8310 .type_of_service = 0xff,
8311 .next_proto_id = 0xff,
8312 .time_to_live = 0xff,
8322 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8324 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8326 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8328 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8330 flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8335 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8336 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8337 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8338 dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8339 *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8340 *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8341 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8342 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8343 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8344 src_ipv4_src_ipv6.ipv4_layout.ipv4);
8345 *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8346 *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8347 tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8348 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8349 ipv4_m->hdr.type_of_service);
8350 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8351 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8352 ipv4_m->hdr.type_of_service >> 2);
8353 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8354 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8355 ipv4_m->hdr.next_proto_id);
8356 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8357 ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8358 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8359 ipv4_m->hdr.time_to_live);
8360 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8361 ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8362 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8363 !!(ipv4_m->hdr.fragment_offset));
8364 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8365 !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8369 * Add IPV6 item to matcher and to the value.
8371 * @param[in, out] matcher
8373 * @param[in, out] key
8374 * Flow matcher value.
8376 * Flow pattern to translate.
8378 * Item is inner pattern.
8380 * The group to insert the rule.
8383 flow_dv_translate_item_ipv6(void *matcher, void *key,
8384 const struct rte_flow_item *item,
8385 int inner, uint32_t group)
8387 const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8388 const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8389 const struct rte_flow_item_ipv6 nic_mask = {
8392 "\xff\xff\xff\xff\xff\xff\xff\xff"
8393 "\xff\xff\xff\xff\xff\xff\xff\xff",
8395 "\xff\xff\xff\xff\xff\xff\xff\xff"
8396 "\xff\xff\xff\xff\xff\xff\xff\xff",
8397 .vtc_flow = RTE_BE32(0xffffffff),
8404 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8405 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8414 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8416 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8418 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8420 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8422 flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8427 size = sizeof(ipv6_m->hdr.dst_addr);
8428 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8429 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8430 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8431 dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8432 memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8433 for (i = 0; i < size; ++i)
8434 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8435 l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8436 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8437 l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8438 src_ipv4_src_ipv6.ipv6_layout.ipv6);
8439 memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8440 for (i = 0; i < size; ++i)
8441 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8443 vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8444 vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8445 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8446 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8447 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8448 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8451 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8453 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8456 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8458 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8462 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8464 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8465 ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8467 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8468 ipv6_m->hdr.hop_limits);
8469 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8470 ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8471 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8472 !!(ipv6_m->has_frag_ext));
8473 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8474 !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8478 * Add IPV6 fragment extension item to matcher and to the value.
8480 * @param[in, out] matcher
8482 * @param[in, out] key
8483 * Flow matcher value.
8485 * Flow pattern to translate.
8487 * Item is inner pattern.
8490 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8491 const struct rte_flow_item *item,
8494 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8495 const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8496 const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8498 .next_header = 0xff,
8499 .frag_data = RTE_BE16(0xffff),
8506 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8508 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8510 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8512 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8514 /* IPv6 fragment extension item exists, so packet is IP fragment. */
8515 MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8516 MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8517 if (!ipv6_frag_ext_v)
8519 if (!ipv6_frag_ext_m)
8520 ipv6_frag_ext_m = &nic_mask;
8521 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8522 ipv6_frag_ext_m->hdr.next_header);
8523 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8524 ipv6_frag_ext_v->hdr.next_header &
8525 ipv6_frag_ext_m->hdr.next_header);
8529 * Add TCP item to matcher and to the value.
8531 * @param[in, out] matcher
8533 * @param[in, out] key
8534 * Flow matcher value.
8536 * Flow pattern to translate.
8538 * Item is inner pattern.
8541 flow_dv_translate_item_tcp(void *matcher, void *key,
8542 const struct rte_flow_item *item,
8545 const struct rte_flow_item_tcp *tcp_m = item->mask;
8546 const struct rte_flow_item_tcp *tcp_v = item->spec;
8551 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8553 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8555 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8557 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8559 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8560 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8564 tcp_m = &rte_flow_item_tcp_mask;
8565 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8566 rte_be_to_cpu_16(tcp_m->hdr.src_port));
8567 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8568 rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8569 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8570 rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8571 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8572 rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8573 MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8574 tcp_m->hdr.tcp_flags);
8575 MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8576 (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8580 * Add UDP item to matcher and to the value.
8582 * @param[in, out] matcher
8584 * @param[in, out] key
8585 * Flow matcher value.
8587 * Flow pattern to translate.
8589 * Item is inner pattern.
8592 flow_dv_translate_item_udp(void *matcher, void *key,
8593 const struct rte_flow_item *item,
8596 const struct rte_flow_item_udp *udp_m = item->mask;
8597 const struct rte_flow_item_udp *udp_v = item->spec;
8602 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8604 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8606 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8608 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8610 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8611 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8615 udp_m = &rte_flow_item_udp_mask;
8616 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8617 rte_be_to_cpu_16(udp_m->hdr.src_port));
8618 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8619 rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8620 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8621 rte_be_to_cpu_16(udp_m->hdr.dst_port));
8622 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8623 rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8627 * Add GRE optional Key item to matcher and to the value.
8629 * @param[in, out] matcher
8631 * @param[in, out] key
8632 * Flow matcher value.
8634 * Flow pattern to translate.
8636 * Item is inner pattern.
8639 flow_dv_translate_item_gre_key(void *matcher, void *key,
8640 const struct rte_flow_item *item)
8642 const rte_be32_t *key_m = item->mask;
8643 const rte_be32_t *key_v = item->spec;
8644 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8645 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8646 rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8648 /* GRE K bit must be on and should already be validated */
8649 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8650 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8654 key_m = &gre_key_default_mask;
8655 MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8656 rte_be_to_cpu_32(*key_m) >> 8);
8657 MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8658 rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8659 MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8660 rte_be_to_cpu_32(*key_m) & 0xFF);
8661 MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8662 rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8666 * Add GRE item to matcher and to the value.
8668 * @param[in, out] matcher
8670 * @param[in, out] key
8671 * Flow matcher value.
8673 * Flow pattern to translate.
8675 * Item is inner pattern.
8678 flow_dv_translate_item_gre(void *matcher, void *key,
8679 const struct rte_flow_item *item,
8682 const struct rte_flow_item_gre *gre_m = item->mask;
8683 const struct rte_flow_item_gre *gre_v = item->spec;
8686 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8687 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8694 uint16_t s_present:1;
8695 uint16_t k_present:1;
8696 uint16_t rsvd_bit1:1;
8697 uint16_t c_present:1;
8701 } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8704 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8706 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8708 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8710 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8712 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8713 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8717 gre_m = &rte_flow_item_gre_mask;
8718 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
8719 rte_be_to_cpu_16(gre_m->protocol));
8720 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8721 rte_be_to_cpu_16(gre_v->protocol & gre_m->protocol));
8722 gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8723 gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8724 MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8725 gre_crks_rsvd0_ver_m.c_present);
8726 MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8727 gre_crks_rsvd0_ver_v.c_present &
8728 gre_crks_rsvd0_ver_m.c_present);
8729 MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8730 gre_crks_rsvd0_ver_m.k_present);
8731 MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8732 gre_crks_rsvd0_ver_v.k_present &
8733 gre_crks_rsvd0_ver_m.k_present);
8734 MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8735 gre_crks_rsvd0_ver_m.s_present);
8736 MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8737 gre_crks_rsvd0_ver_v.s_present &
8738 gre_crks_rsvd0_ver_m.s_present);
8742 * Add NVGRE item to matcher and to the value.
8744 * @param[in, out] matcher
8746 * @param[in, out] key
8747 * Flow matcher value.
8749 * Flow pattern to translate.
8751 * Item is inner pattern.
8754 flow_dv_translate_item_nvgre(void *matcher, void *key,
8755 const struct rte_flow_item *item,
8758 const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8759 const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8760 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8761 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8762 const char *tni_flow_id_m;
8763 const char *tni_flow_id_v;
8769 /* For NVGRE, GRE header fields must be set with defined values. */
8770 const struct rte_flow_item_gre gre_spec = {
8771 .c_rsvd0_ver = RTE_BE16(0x2000),
8772 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8774 const struct rte_flow_item_gre gre_mask = {
8775 .c_rsvd0_ver = RTE_BE16(0xB000),
8776 .protocol = RTE_BE16(UINT16_MAX),
8778 const struct rte_flow_item gre_item = {
8783 flow_dv_translate_item_gre(matcher, key, &gre_item, inner);
8787 nvgre_m = &rte_flow_item_nvgre_mask;
8788 tni_flow_id_m = (const char *)nvgre_m->tni;
8789 tni_flow_id_v = (const char *)nvgre_v->tni;
8790 size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
8791 gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
8792 gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
8793 memcpy(gre_key_m, tni_flow_id_m, size);
8794 for (i = 0; i < size; ++i)
8795 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
8799 * Add VXLAN item to matcher and to the value.
8802 * Pointer to the Ethernet device structure.
8804 * Flow rule attributes.
8805 * @param[in, out] matcher
8807 * @param[in, out] key
8808 * Flow matcher value.
8810 * Flow pattern to translate.
8812 * Item is inner pattern.
8815 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
8816 const struct rte_flow_attr *attr,
8817 void *matcher, void *key,
8818 const struct rte_flow_item *item,
8821 const struct rte_flow_item_vxlan *vxlan_m = item->mask;
8822 const struct rte_flow_item_vxlan *vxlan_v = item->spec;
8827 uint32_t *tunnel_header_v;
8828 uint32_t *tunnel_header_m;
8830 struct mlx5_priv *priv = dev->data->dev_private;
8831 const struct rte_flow_item_vxlan nic_mask = {
8832 .vni = "\xff\xff\xff",
8837 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8839 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8841 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8843 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8845 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8846 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8847 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8848 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8849 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8854 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
8855 (attr->group && !priv->sh->misc5_cap))
8856 vxlan_m = &rte_flow_item_vxlan_mask;
8858 vxlan_m = &nic_mask;
8860 if ((!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
8861 ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
8868 misc_m = MLX5_ADDR_OF(fte_match_param,
8869 matcher, misc_parameters);
8870 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8871 size = sizeof(vxlan_m->vni);
8872 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
8873 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
8874 memcpy(vni_m, vxlan_m->vni, size);
8875 for (i = 0; i < size; ++i)
8876 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8879 misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8880 misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8881 tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8884 tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
8887 *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
8888 (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
8889 (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
8890 if (*tunnel_header_v)
8891 *tunnel_header_m = vxlan_m->vni[0] |
8892 vxlan_m->vni[1] << 8 |
8893 vxlan_m->vni[2] << 16;
8895 *tunnel_header_m = 0x0;
8896 *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
8897 if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
8898 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
8902 * Add VXLAN-GPE item to matcher and to the value.
8904 * @param[in, out] matcher
8906 * @param[in, out] key
8907 * Flow matcher value.
8909 * Flow pattern to translate.
8911 * Item is inner pattern.
8915 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
8916 const struct rte_flow_item *item, int inner)
8918 const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
8919 const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
8923 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
8925 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
8931 uint8_t flags_m = 0xff;
8932 uint8_t flags_v = 0xc;
8935 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8937 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8939 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8941 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8943 dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
8944 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
8945 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
8946 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
8947 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
8952 vxlan_m = &rte_flow_item_vxlan_gpe_mask;
8953 size = sizeof(vxlan_m->vni);
8954 vni_m = MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
8955 vni_v = MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
8956 memcpy(vni_m, vxlan_m->vni, size);
8957 for (i = 0; i < size; ++i)
8958 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
8959 if (vxlan_m->flags) {
8960 flags_m = vxlan_m->flags;
8961 flags_v = vxlan_v->flags;
8963 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
8964 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
8965 MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_next_protocol,
8967 MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_next_protocol,
8972 * Add Geneve item to matcher and to the value.
8974 * @param[in, out] matcher
8976 * @param[in, out] key
8977 * Flow matcher value.
8979 * Flow pattern to translate.
8981 * Item is inner pattern.
8985 flow_dv_translate_item_geneve(void *matcher, void *key,
8986 const struct rte_flow_item *item, int inner)
8988 const struct rte_flow_item_geneve *geneve_m = item->mask;
8989 const struct rte_flow_item_geneve *geneve_v = item->spec;
8992 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8993 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9002 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9004 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9006 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9008 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9010 dport = MLX5_UDP_PORT_GENEVE;
9011 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9012 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9013 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9018 geneve_m = &rte_flow_item_geneve_mask;
9019 size = sizeof(geneve_m->vni);
9020 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9021 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9022 memcpy(vni_m, geneve_m->vni, size);
9023 for (i = 0; i < size; ++i)
9024 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9025 MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type,
9026 rte_be_to_cpu_16(geneve_m->protocol));
9027 MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9028 rte_be_to_cpu_16(geneve_v->protocol & geneve_m->protocol));
9029 gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9030 gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9031 MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9032 MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9033 MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9034 MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9035 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9036 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9037 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9038 MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9039 MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9043 * Create Geneve TLV option resource.
9045 * @param dev[in, out]
9046 * Pointer to rte_eth_dev structure.
9047 * @param[in, out] tag_be24
9048 * Tag value in big endian then R-shift 8.
9049 * @parm[in, out] dev_flow
9050 * Pointer to the dev_flow.
9052 * pointer to error structure.
9055 * 0 on success otherwise -errno and errno is set.
9059 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9060 const struct rte_flow_item *item,
9061 struct rte_flow_error *error)
9063 struct mlx5_priv *priv = dev->data->dev_private;
9064 struct mlx5_dev_ctx_shared *sh = priv->sh;
9065 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9066 sh->geneve_tlv_option_resource;
9067 struct mlx5_devx_obj *obj;
9068 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9073 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9074 if (geneve_opt_resource != NULL) {
9075 if (geneve_opt_resource->option_class ==
9076 geneve_opt_v->option_class &&
9077 geneve_opt_resource->option_type ==
9078 geneve_opt_v->option_type &&
9079 geneve_opt_resource->length ==
9080 geneve_opt_v->option_len) {
9081 /* We already have GENVE TLV option obj allocated. */
9082 __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9085 ret = rte_flow_error_set(error, ENOMEM,
9086 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9087 "Only one GENEVE TLV option supported");
9091 /* Create a GENEVE TLV object and resource. */
9092 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->ctx,
9093 geneve_opt_v->option_class,
9094 geneve_opt_v->option_type,
9095 geneve_opt_v->option_len);
9097 ret = rte_flow_error_set(error, ENODATA,
9098 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9099 "Failed to create GENEVE TLV Devx object");
9102 sh->geneve_tlv_option_resource =
9103 mlx5_malloc(MLX5_MEM_ZERO,
9104 sizeof(*geneve_opt_resource),
9106 if (!sh->geneve_tlv_option_resource) {
9107 claim_zero(mlx5_devx_cmd_destroy(obj));
9108 ret = rte_flow_error_set(error, ENOMEM,
9109 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9110 "GENEVE TLV object memory allocation failed");
9113 geneve_opt_resource = sh->geneve_tlv_option_resource;
9114 geneve_opt_resource->obj = obj;
9115 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9116 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9117 geneve_opt_resource->length = geneve_opt_v->option_len;
9118 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9122 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9127 * Add Geneve TLV option item to matcher.
9129 * @param[in, out] dev
9130 * Pointer to rte_eth_dev structure.
9131 * @param[in, out] matcher
9133 * @param[in, out] key
9134 * Flow matcher value.
9136 * Flow pattern to translate.
9138 * Pointer to error structure.
9141 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9142 void *key, const struct rte_flow_item *item,
9143 struct rte_flow_error *error)
9145 const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9146 const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9147 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9148 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9149 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9151 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9152 rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9158 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9159 ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9162 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9166 * Set the option length in GENEVE header if not requested.
9167 * The GENEVE TLV option length is expressed by the option length field
9168 * in the GENEVE header.
9169 * If the option length was not requested but the GENEVE TLV option item
9170 * is present we set the option length field implicitly.
9172 if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9173 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9174 MLX5_GENEVE_OPTLEN_MASK);
9175 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9176 geneve_opt_v->option_len + 1);
9179 if (geneve_opt_v->data) {
9180 memcpy(&opt_data_key, geneve_opt_v->data,
9181 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9182 sizeof(opt_data_key)));
9183 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9184 sizeof(opt_data_key));
9185 memcpy(&opt_data_mask, geneve_opt_m->data,
9186 RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9187 sizeof(opt_data_mask)));
9188 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9189 sizeof(opt_data_mask));
9190 MLX5_SET(fte_match_set_misc3, misc3_m,
9191 geneve_tlv_option_0_data,
9192 rte_be_to_cpu_32(opt_data_mask));
9193 MLX5_SET(fte_match_set_misc3, misc3_v,
9194 geneve_tlv_option_0_data,
9195 rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9201 * Add MPLS item to matcher and to the value.
9203 * @param[in, out] matcher
9205 * @param[in, out] key
9206 * Flow matcher value.
9208 * Flow pattern to translate.
9209 * @param[in] prev_layer
9210 * The protocol layer indicated in previous item.
9212 * Item is inner pattern.
9215 flow_dv_translate_item_mpls(void *matcher, void *key,
9216 const struct rte_flow_item *item,
9217 uint64_t prev_layer,
9220 const uint32_t *in_mpls_m = item->mask;
9221 const uint32_t *in_mpls_v = item->spec;
9222 uint32_t *out_mpls_m = 0;
9223 uint32_t *out_mpls_v = 0;
9224 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9225 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9226 void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9228 void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9229 void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9230 void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9232 switch (prev_layer) {
9233 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9234 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xffff);
9235 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9236 MLX5_UDP_PORT_MPLS);
9238 case MLX5_FLOW_LAYER_GRE:
9240 case MLX5_FLOW_LAYER_GRE_KEY:
9241 MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, 0xffff);
9242 MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9243 RTE_ETHER_TYPE_MPLS);
9251 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9252 switch (prev_layer) {
9253 case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9255 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9256 outer_first_mpls_over_udp);
9258 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9259 outer_first_mpls_over_udp);
9261 case MLX5_FLOW_LAYER_GRE:
9263 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9264 outer_first_mpls_over_gre);
9266 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9267 outer_first_mpls_over_gre);
9270 /* Inner MPLS not over GRE is not supported. */
9273 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9277 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9283 if (out_mpls_m && out_mpls_v) {
9284 *out_mpls_m = *in_mpls_m;
9285 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9290 * Add metadata register item to matcher
9292 * @param[in, out] matcher
9294 * @param[in, out] key
9295 * Flow matcher value.
9296 * @param[in] reg_type
9297 * Type of device metadata register
9304 flow_dv_match_meta_reg(void *matcher, void *key,
9305 enum modify_reg reg_type,
9306 uint32_t data, uint32_t mask)
9309 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9311 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9317 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9318 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9321 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9322 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9326 * The metadata register C0 field might be divided into
9327 * source vport index and META item value, we should set
9328 * this field according to specified mask, not as whole one.
9330 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9332 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9333 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9336 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9339 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9340 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9343 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9344 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9347 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9348 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9351 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9352 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9355 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9356 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9359 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9360 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9363 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9364 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9373 * Add MARK item to matcher
9376 * The device to configure through.
9377 * @param[in, out] matcher
9379 * @param[in, out] key
9380 * Flow matcher value.
9382 * Flow pattern to translate.
9385 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9386 void *matcher, void *key,
9387 const struct rte_flow_item *item)
9389 struct mlx5_priv *priv = dev->data->dev_private;
9390 const struct rte_flow_item_mark *mark;
9394 mark = item->mask ? (const void *)item->mask :
9395 &rte_flow_item_mark_mask;
9396 mask = mark->id & priv->sh->dv_mark_mask;
9397 mark = (const void *)item->spec;
9399 value = mark->id & priv->sh->dv_mark_mask & mask;
9401 enum modify_reg reg;
9403 /* Get the metadata register index for the mark. */
9404 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9405 MLX5_ASSERT(reg > 0);
9406 if (reg == REG_C_0) {
9407 struct mlx5_priv *priv = dev->data->dev_private;
9408 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9409 uint32_t shl_c0 = rte_bsf32(msk_c0);
9415 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9420 * Add META item to matcher
9423 * The devich to configure through.
9424 * @param[in, out] matcher
9426 * @param[in, out] key
9427 * Flow matcher value.
9429 * Attributes of flow that includes this item.
9431 * Flow pattern to translate.
9434 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9435 void *matcher, void *key,
9436 const struct rte_flow_attr *attr,
9437 const struct rte_flow_item *item)
9439 const struct rte_flow_item_meta *meta_m;
9440 const struct rte_flow_item_meta *meta_v;
9442 meta_m = (const void *)item->mask;
9444 meta_m = &rte_flow_item_meta_mask;
9445 meta_v = (const void *)item->spec;
9448 uint32_t value = meta_v->data;
9449 uint32_t mask = meta_m->data;
9451 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9454 MLX5_ASSERT(reg != REG_NON);
9455 if (reg == REG_C_0) {
9456 struct mlx5_priv *priv = dev->data->dev_private;
9457 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9458 uint32_t shl_c0 = rte_bsf32(msk_c0);
9464 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9469 * Add vport metadata Reg C0 item to matcher
9471 * @param[in, out] matcher
9473 * @param[in, out] key
9474 * Flow matcher value.
9476 * Flow pattern to translate.
9479 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9480 uint32_t value, uint32_t mask)
9482 flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9486 * Add tag item to matcher
9489 * The devich to configure through.
9490 * @param[in, out] matcher
9492 * @param[in, out] key
9493 * Flow matcher value.
9495 * Flow pattern to translate.
9498 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9499 void *matcher, void *key,
9500 const struct rte_flow_item *item)
9502 const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9503 const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9504 uint32_t mask, value;
9507 value = tag_v->data;
9508 mask = tag_m ? tag_m->data : UINT32_MAX;
9509 if (tag_v->id == REG_C_0) {
9510 struct mlx5_priv *priv = dev->data->dev_private;
9511 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9512 uint32_t shl_c0 = rte_bsf32(msk_c0);
9518 flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9522 * Add TAG item to matcher
9525 * The devich to configure through.
9526 * @param[in, out] matcher
9528 * @param[in, out] key
9529 * Flow matcher value.
9531 * Flow pattern to translate.
9534 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9535 void *matcher, void *key,
9536 const struct rte_flow_item *item)
9538 const struct rte_flow_item_tag *tag_v = item->spec;
9539 const struct rte_flow_item_tag *tag_m = item->mask;
9540 enum modify_reg reg;
9543 tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9544 /* Get the metadata register index for the tag. */
9545 reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9546 MLX5_ASSERT(reg > 0);
9547 flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9551 * Add source vport match to the specified matcher.
9553 * @param[in, out] matcher
9555 * @param[in, out] key
9556 * Flow matcher value.
9558 * Source vport value to match
9563 flow_dv_translate_item_source_vport(void *matcher, void *key,
9564 int16_t port, uint16_t mask)
9566 void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9567 void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9569 MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9570 MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9574 * Translate port-id item to eswitch match on port-id.
9577 * The devich to configure through.
9578 * @param[in, out] matcher
9580 * @param[in, out] key
9581 * Flow matcher value.
9583 * Flow pattern to translate.
9588 * 0 on success, a negative errno value otherwise.
9591 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9592 void *key, const struct rte_flow_item *item,
9593 const struct rte_flow_attr *attr)
9595 const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9596 const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9597 struct mlx5_priv *priv;
9600 mask = pid_m ? pid_m->id : 0xffff;
9601 id = pid_v ? pid_v->id : dev->data->port_id;
9602 priv = mlx5_port_to_eswitch_info(id, item == NULL);
9606 * Translate to vport field or to metadata, depending on mode.
9607 * Kernel can use either misc.source_port or half of C0 metadata
9610 if (priv->vport_meta_mask) {
9612 * Provide the hint for SW steering library
9613 * to insert the flow into ingress domain and
9614 * save the extra vport match.
9616 if (mask == 0xffff && priv->vport_id == 0xffff &&
9617 priv->pf_bond < 0 && attr->transfer)
9618 flow_dv_translate_item_source_vport
9619 (matcher, key, priv->vport_id, mask);
9621 * We should always set the vport metadata register,
9622 * otherwise the SW steering library can drop
9623 * the rule if wire vport metadata value is not zero,
9624 * it depends on kernel configuration.
9626 flow_dv_translate_item_meta_vport(matcher, key,
9627 priv->vport_meta_tag,
9628 priv->vport_meta_mask);
9630 flow_dv_translate_item_source_vport(matcher, key,
9631 priv->vport_id, mask);
9637 * Add ICMP6 item to matcher and to the value.
9639 * @param[in, out] matcher
9641 * @param[in, out] key
9642 * Flow matcher value.
9644 * Flow pattern to translate.
9646 * Item is inner pattern.
9649 flow_dv_translate_item_icmp6(void *matcher, void *key,
9650 const struct rte_flow_item *item,
9653 const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9654 const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9657 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9659 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9661 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9663 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9665 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9667 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9669 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9670 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9674 icmp6_m = &rte_flow_item_icmp6_mask;
9675 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9676 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9677 icmp6_v->type & icmp6_m->type);
9678 MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9679 MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9680 icmp6_v->code & icmp6_m->code);
9684 * Add ICMP item to matcher and to the value.
9686 * @param[in, out] matcher
9688 * @param[in, out] key
9689 * Flow matcher value.
9691 * Flow pattern to translate.
9693 * Item is inner pattern.
9696 flow_dv_translate_item_icmp(void *matcher, void *key,
9697 const struct rte_flow_item *item,
9700 const struct rte_flow_item_icmp *icmp_m = item->mask;
9701 const struct rte_flow_item_icmp *icmp_v = item->spec;
9702 uint32_t icmp_header_data_m = 0;
9703 uint32_t icmp_header_data_v = 0;
9706 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9708 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9710 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9712 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9714 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9716 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9718 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9719 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9723 icmp_m = &rte_flow_item_icmp_mask;
9724 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9725 icmp_m->hdr.icmp_type);
9726 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9727 icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9728 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9729 icmp_m->hdr.icmp_code);
9730 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9731 icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9732 icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9733 icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9734 if (icmp_header_data_m) {
9735 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9736 icmp_header_data_v |=
9737 rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9738 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9739 icmp_header_data_m);
9740 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9741 icmp_header_data_v & icmp_header_data_m);
9746 * Add GTP item to matcher and to the value.
9748 * @param[in, out] matcher
9750 * @param[in, out] key
9751 * Flow matcher value.
9753 * Flow pattern to translate.
9755 * Item is inner pattern.
9758 flow_dv_translate_item_gtp(void *matcher, void *key,
9759 const struct rte_flow_item *item, int inner)
9761 const struct rte_flow_item_gtp *gtp_m = item->mask;
9762 const struct rte_flow_item_gtp *gtp_v = item->spec;
9765 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9767 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9768 uint16_t dport = RTE_GTPU_UDP_PORT;
9771 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9773 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9775 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9777 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9779 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9780 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9781 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9786 gtp_m = &rte_flow_item_gtp_mask;
9787 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
9788 gtp_m->v_pt_rsv_flags);
9789 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
9790 gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
9791 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
9792 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
9793 gtp_v->msg_type & gtp_m->msg_type);
9794 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
9795 rte_be_to_cpu_32(gtp_m->teid));
9796 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
9797 rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
9801 * Add GTP PSC item to matcher.
9803 * @param[in, out] matcher
9805 * @param[in, out] key
9806 * Flow matcher value.
9808 * Flow pattern to translate.
9811 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
9812 const struct rte_flow_item *item)
9814 const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
9815 const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
9816 void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9818 void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9824 uint8_t next_ext_header_type;
9829 /* Always set E-flag match on one, regardless of GTP item settings. */
9830 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
9831 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9832 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
9833 gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
9834 gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
9835 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
9836 /*Set next extension header type. */
9839 dw_2.next_ext_header_type = 0xff;
9840 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
9841 rte_cpu_to_be_32(dw_2.w32));
9844 dw_2.next_ext_header_type = 0x85;
9845 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
9846 rte_cpu_to_be_32(dw_2.w32));
9858 /*Set extension header PDU type and Qos. */
9860 gtp_psc_m = &rte_flow_item_gtp_psc_mask;
9862 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->pdu_type);
9863 dw_0.qfi = gtp_psc_m->qfi;
9864 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
9865 rte_cpu_to_be_32(dw_0.w32));
9867 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->pdu_type &
9868 gtp_psc_m->pdu_type);
9869 dw_0.qfi = gtp_psc_v->qfi & gtp_psc_m->qfi;
9870 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
9871 rte_cpu_to_be_32(dw_0.w32));
9877 * Add eCPRI item to matcher and to the value.
9880 * The devich to configure through.
9881 * @param[in, out] matcher
9883 * @param[in, out] key
9884 * Flow matcher value.
9886 * Flow pattern to translate.
9887 * @param[in] samples
9888 * Sample IDs to be used in the matching.
9891 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
9892 void *key, const struct rte_flow_item *item)
9894 struct mlx5_priv *priv = dev->data->dev_private;
9895 const struct rte_flow_item_ecpri *ecpri_m = item->mask;
9896 const struct rte_flow_item_ecpri *ecpri_v = item->spec;
9897 struct rte_ecpri_common_hdr common;
9898 void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
9900 void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
9908 ecpri_m = &rte_flow_item_ecpri_mask;
9910 * Maximal four DW samples are supported in a single matching now.
9911 * Two are used now for a eCPRI matching:
9912 * 1. Type: one byte, mask should be 0x00ff0000 in network order
9913 * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
9916 if (!ecpri_m->hdr.common.u32)
9918 samples = priv->sh->fp[MLX5_FLEX_PARSER_ECPRI_0].ids;
9919 /* Need to take the whole DW as the mask to fill the entry. */
9920 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9921 prog_sample_field_value_0);
9922 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9923 prog_sample_field_value_0);
9924 /* Already big endian (network order) in the header. */
9925 *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
9926 *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
9927 /* Sample#0, used for matching type, offset 0. */
9928 MLX5_SET(fte_match_set_misc4, misc4_m,
9929 prog_sample_field_id_0, samples[0]);
9930 /* It makes no sense to set the sample ID in the mask field. */
9931 MLX5_SET(fte_match_set_misc4, misc4_v,
9932 prog_sample_field_id_0, samples[0]);
9934 * Checking if message body part needs to be matched.
9935 * Some wildcard rules only matching type field should be supported.
9937 if (ecpri_m->hdr.dummy[0]) {
9938 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
9939 switch (common.type) {
9940 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
9941 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
9942 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
9943 dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
9944 prog_sample_field_value_1);
9945 dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
9946 prog_sample_field_value_1);
9947 *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
9948 *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
9949 ecpri_m->hdr.dummy[0];
9950 /* Sample#1, to match message body, offset 4. */
9951 MLX5_SET(fte_match_set_misc4, misc4_m,
9952 prog_sample_field_id_1, samples[1]);
9953 MLX5_SET(fte_match_set_misc4, misc4_v,
9954 prog_sample_field_id_1, samples[1]);
9957 /* Others, do not match any sample ID. */
9964 * Add connection tracking status item to matcher
9967 * The devich to configure through.
9968 * @param[in, out] matcher
9970 * @param[in, out] key
9971 * Flow matcher value.
9973 * Flow pattern to translate.
9976 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
9977 void *matcher, void *key,
9978 const struct rte_flow_item *item)
9980 uint32_t reg_value = 0;
9982 /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
9983 uint32_t reg_mask = 0;
9984 const struct rte_flow_item_conntrack *spec = item->spec;
9985 const struct rte_flow_item_conntrack *mask = item->mask;
9987 struct rte_flow_error error;
9990 mask = &rte_flow_item_conntrack_mask;
9991 if (!spec || !mask->flags)
9993 flags = spec->flags & mask->flags;
9994 /* The conflict should be checked in the validation. */
9995 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
9996 reg_value |= MLX5_CT_SYNDROME_VALID;
9997 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
9998 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
9999 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10000 reg_value |= MLX5_CT_SYNDROME_INVALID;
10001 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10002 reg_value |= MLX5_CT_SYNDROME_TRAP;
10003 if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10004 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10005 if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10006 RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10007 RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10009 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10010 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10011 if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10012 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10013 /* The REG_C_x value could be saved during startup. */
10014 reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10015 if (reg_id == REG_NON)
10017 flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10018 reg_value, reg_mask);
10021 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10023 #define HEADER_IS_ZERO(match_criteria, headers) \
10024 !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers), \
10025 matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10028 * Calculate flow matcher enable bitmap.
10030 * @param match_criteria
10031 * Pointer to flow matcher criteria.
10034 * Bitmap of enabled fields.
10037 flow_dv_matcher_enable(uint32_t *match_criteria)
10039 uint8_t match_criteria_enable;
10041 match_criteria_enable =
10042 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10043 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10044 match_criteria_enable |=
10045 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10046 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10047 match_criteria_enable |=
10048 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10049 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10050 match_criteria_enable |=
10051 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10052 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10053 match_criteria_enable |=
10054 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10055 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10056 match_criteria_enable |=
10057 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10058 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10059 match_criteria_enable |=
10060 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10061 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10062 return match_criteria_enable;
10066 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10069 * Check flow matching criteria first, subtract misc5/4 length if flow
10070 * doesn't own misc5/4 parameters. In some old rdma-core releases,
10071 * misc5/4 are not supported, and matcher creation failure is expected
10072 * w/o subtration. If misc5 is provided, misc4 must be counted in since
10073 * misc5 is right after misc4.
10075 if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10076 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10077 MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10078 if (!(match_criteria & (1 <<
10079 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10080 *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10085 static struct mlx5_list_entry *
10086 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10087 struct mlx5_list_entry *entry, void *cb_ctx)
10089 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10090 struct mlx5_flow_dv_matcher *ref = ctx->data;
10091 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10092 typeof(*tbl), tbl);
10093 struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10098 rte_flow_error_set(ctx->error, ENOMEM,
10099 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10100 "cannot create matcher");
10103 memcpy(resource, entry, sizeof(*resource));
10104 resource->tbl = &tbl->tbl;
10105 return &resource->entry;
10109 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10110 struct mlx5_list_entry *entry)
10115 struct mlx5_list_entry *
10116 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10118 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10119 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10120 struct rte_eth_dev *dev = ctx->dev;
10121 struct mlx5_flow_tbl_data_entry *tbl_data;
10122 struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10123 struct rte_flow_error *error = ctx->error;
10124 union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10125 struct mlx5_flow_tbl_resource *tbl;
10130 tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10132 rte_flow_error_set(error, ENOMEM,
10133 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10135 "cannot allocate flow table data entry");
10138 tbl_data->idx = idx;
10139 tbl_data->tunnel = tt_prm->tunnel;
10140 tbl_data->group_id = tt_prm->group_id;
10141 tbl_data->external = !!tt_prm->external;
10142 tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10143 tbl_data->is_egress = !!key.is_egress;
10144 tbl_data->is_transfer = !!key.is_fdb;
10145 tbl_data->dummy = !!key.dummy;
10146 tbl_data->level = key.level;
10147 tbl_data->id = key.id;
10148 tbl = &tbl_data->tbl;
10150 return &tbl_data->entry;
10152 domain = sh->fdb_domain;
10153 else if (key.is_egress)
10154 domain = sh->tx_domain;
10156 domain = sh->rx_domain;
10157 ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10159 rte_flow_error_set(error, ENOMEM,
10160 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10161 NULL, "cannot create flow table object");
10162 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10165 if (key.level != 0) {
10166 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10167 (tbl->obj, &tbl_data->jump.action);
10169 rte_flow_error_set(error, ENOMEM,
10170 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10172 "cannot create flow jump action");
10173 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10174 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10178 MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10179 key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10180 key.level, key.id);
10181 tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10182 flow_dv_matcher_create_cb,
10183 flow_dv_matcher_match_cb,
10184 flow_dv_matcher_remove_cb,
10185 flow_dv_matcher_clone_cb,
10186 flow_dv_matcher_clone_free_cb);
10187 if (!tbl_data->matchers) {
10188 rte_flow_error_set(error, ENOMEM,
10189 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10191 "cannot create tbl matcher list");
10192 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10193 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10194 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10197 return &tbl_data->entry;
10201 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10204 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10205 struct mlx5_flow_tbl_data_entry *tbl_data =
10206 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10207 union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10209 return tbl_data->level != key.level ||
10210 tbl_data->id != key.id ||
10211 tbl_data->dummy != key.dummy ||
10212 tbl_data->is_transfer != !!key.is_fdb ||
10213 tbl_data->is_egress != !!key.is_egress;
10216 struct mlx5_list_entry *
10217 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10220 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10221 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10222 struct mlx5_flow_tbl_data_entry *tbl_data;
10223 struct rte_flow_error *error = ctx->error;
10226 tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10228 rte_flow_error_set(error, ENOMEM,
10229 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10231 "cannot allocate flow table data entry");
10234 memcpy(tbl_data, oentry, sizeof(*tbl_data));
10235 tbl_data->idx = idx;
10236 return &tbl_data->entry;
10240 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10242 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10243 struct mlx5_flow_tbl_data_entry *tbl_data =
10244 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10246 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10250 * Get a flow table.
10252 * @param[in, out] dev
10253 * Pointer to rte_eth_dev structure.
10254 * @param[in] table_level
10255 * Table level to use.
10256 * @param[in] egress
10257 * Direction of the table.
10258 * @param[in] transfer
10259 * E-Switch or NIC flow.
10261 * Dummy entry for dv API.
10262 * @param[in] table_id
10264 * @param[out] error
10265 * pointer to error structure.
10268 * Returns tables resource based on the index, NULL in case of failed.
10270 struct mlx5_flow_tbl_resource *
10271 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10272 uint32_t table_level, uint8_t egress,
10275 const struct mlx5_flow_tunnel *tunnel,
10276 uint32_t group_id, uint8_t dummy,
10278 struct rte_flow_error *error)
10280 struct mlx5_priv *priv = dev->data->dev_private;
10281 union mlx5_flow_tbl_key table_key = {
10283 .level = table_level,
10287 .is_fdb = !!transfer,
10288 .is_egress = !!egress,
10291 struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10293 .group_id = group_id,
10294 .external = external,
10296 struct mlx5_flow_cb_ctx ctx = {
10299 .data = &table_key.v64,
10302 struct mlx5_list_entry *entry;
10303 struct mlx5_flow_tbl_data_entry *tbl_data;
10305 entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10307 rte_flow_error_set(error, ENOMEM,
10308 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10309 "cannot get table");
10312 DRV_LOG(DEBUG, "table_level %u table_id %u "
10313 "tunnel %u group %u registered.",
10314 table_level, table_id,
10315 tunnel ? tunnel->tunnel_id : 0, group_id);
10316 tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10317 return &tbl_data->tbl;
10321 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10323 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10324 struct mlx5_flow_tbl_data_entry *tbl_data =
10325 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10327 MLX5_ASSERT(entry && sh);
10328 if (tbl_data->jump.action)
10329 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10330 if (tbl_data->tbl.obj)
10331 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10332 if (tbl_data->tunnel_offload && tbl_data->external) {
10333 struct mlx5_list_entry *he;
10334 struct mlx5_hlist *tunnel_grp_hash;
10335 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10336 union tunnel_tbl_key tunnel_key = {
10337 .tunnel_id = tbl_data->tunnel ?
10338 tbl_data->tunnel->tunnel_id : 0,
10339 .group = tbl_data->group_id
10341 uint32_t table_level = tbl_data->level;
10342 struct mlx5_flow_cb_ctx ctx = {
10343 .data = (void *)&tunnel_key.val,
10346 tunnel_grp_hash = tbl_data->tunnel ?
10347 tbl_data->tunnel->groups :
10349 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10351 mlx5_hlist_unregister(tunnel_grp_hash, he);
10353 "table_level %u id %u tunnel %u group %u released.",
10357 tbl_data->tunnel->tunnel_id : 0,
10358 tbl_data->group_id);
10360 mlx5_list_destroy(tbl_data->matchers);
10361 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10365 * Release a flow table.
10368 * Pointer to device shared structure.
10370 * Table resource to be released.
10373 * Returns 0 if table was released, else return 1;
10376 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10377 struct mlx5_flow_tbl_resource *tbl)
10379 struct mlx5_flow_tbl_data_entry *tbl_data =
10380 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10384 return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10388 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10389 struct mlx5_list_entry *entry, void *cb_ctx)
10391 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10392 struct mlx5_flow_dv_matcher *ref = ctx->data;
10393 struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10396 return cur->crc != ref->crc ||
10397 cur->priority != ref->priority ||
10398 memcmp((const void *)cur->mask.buf,
10399 (const void *)ref->mask.buf, ref->mask.size);
10402 struct mlx5_list_entry *
10403 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10405 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10406 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10407 struct mlx5_flow_dv_matcher *ref = ctx->data;
10408 struct mlx5_flow_dv_matcher *resource;
10409 struct mlx5dv_flow_matcher_attr dv_attr = {
10410 .type = IBV_FLOW_ATTR_NORMAL,
10411 .match_mask = (void *)&ref->mask,
10413 struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10414 typeof(*tbl), tbl);
10417 resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10420 rte_flow_error_set(ctx->error, ENOMEM,
10421 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10422 "cannot create matcher");
10426 dv_attr.match_criteria_enable =
10427 flow_dv_matcher_enable(resource->mask.buf);
10428 __flow_dv_adjust_buf_size(&ref->mask.size,
10429 dv_attr.match_criteria_enable);
10430 dv_attr.priority = ref->priority;
10431 if (tbl->is_egress)
10432 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10433 ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->tbl.obj,
10434 &resource->matcher_object);
10436 mlx5_free(resource);
10437 rte_flow_error_set(ctx->error, ENOMEM,
10438 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10439 "cannot create matcher");
10442 return &resource->entry;
10446 * Register the flow matcher.
10448 * @param[in, out] dev
10449 * Pointer to rte_eth_dev structure.
10450 * @param[in, out] matcher
10451 * Pointer to flow matcher.
10452 * @param[in, out] key
10453 * Pointer to flow table key.
10454 * @parm[in, out] dev_flow
10455 * Pointer to the dev_flow.
10456 * @param[out] error
10457 * pointer to error structure.
10460 * 0 on success otherwise -errno and errno is set.
10463 flow_dv_matcher_register(struct rte_eth_dev *dev,
10464 struct mlx5_flow_dv_matcher *ref,
10465 union mlx5_flow_tbl_key *key,
10466 struct mlx5_flow *dev_flow,
10467 const struct mlx5_flow_tunnel *tunnel,
10469 struct rte_flow_error *error)
10471 struct mlx5_list_entry *entry;
10472 struct mlx5_flow_dv_matcher *resource;
10473 struct mlx5_flow_tbl_resource *tbl;
10474 struct mlx5_flow_tbl_data_entry *tbl_data;
10475 struct mlx5_flow_cb_ctx ctx = {
10480 * tunnel offload API requires this registration for cases when
10481 * tunnel match rule was inserted before tunnel set rule.
10483 tbl = flow_dv_tbl_resource_get(dev, key->level,
10484 key->is_egress, key->is_fdb,
10485 dev_flow->external, tunnel,
10486 group_id, 0, key->id, error);
10488 return -rte_errno; /* No need to refill the error info */
10489 tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10491 entry = mlx5_list_register(tbl_data->matchers, &ctx);
10493 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10494 return rte_flow_error_set(error, ENOMEM,
10495 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10496 "cannot allocate ref memory");
10498 resource = container_of(entry, typeof(*resource), entry);
10499 dev_flow->handle->dvh.matcher = resource;
10503 struct mlx5_list_entry *
10504 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10506 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10507 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10508 struct mlx5_flow_dv_tag_resource *entry;
10512 entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10514 rte_flow_error_set(ctx->error, ENOMEM,
10515 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10516 "cannot allocate resource memory");
10520 entry->tag_id = *(uint32_t *)(ctx->data);
10521 ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10524 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10525 rte_flow_error_set(ctx->error, ENOMEM,
10526 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10527 NULL, "cannot create action");
10530 return &entry->entry;
10534 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10537 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10538 struct mlx5_flow_dv_tag_resource *tag =
10539 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10541 return *(uint32_t *)(ctx->data) != tag->tag_id;
10544 struct mlx5_list_entry *
10545 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10548 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10549 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10550 struct mlx5_flow_dv_tag_resource *entry;
10553 entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10555 rte_flow_error_set(ctx->error, ENOMEM,
10556 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10557 "cannot allocate tag resource memory");
10560 memcpy(entry, oentry, sizeof(*entry));
10562 return &entry->entry;
10566 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10568 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10569 struct mlx5_flow_dv_tag_resource *tag =
10570 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10572 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10576 * Find existing tag resource or create and register a new one.
10578 * @param dev[in, out]
10579 * Pointer to rte_eth_dev structure.
10580 * @param[in, out] tag_be24
10581 * Tag value in big endian then R-shift 8.
10582 * @parm[in, out] dev_flow
10583 * Pointer to the dev_flow.
10584 * @param[out] error
10585 * pointer to error structure.
10588 * 0 on success otherwise -errno and errno is set.
10591 flow_dv_tag_resource_register
10592 (struct rte_eth_dev *dev,
10594 struct mlx5_flow *dev_flow,
10595 struct rte_flow_error *error)
10597 struct mlx5_priv *priv = dev->data->dev_private;
10598 struct mlx5_flow_dv_tag_resource *resource;
10599 struct mlx5_list_entry *entry;
10600 struct mlx5_flow_cb_ctx ctx = {
10605 entry = mlx5_hlist_register(priv->sh->tag_table, tag_be24, &ctx);
10607 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10609 dev_flow->handle->dvh.rix_tag = resource->idx;
10610 dev_flow->dv.tag_resource = resource;
10617 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10619 struct mlx5_dev_ctx_shared *sh = tool_ctx;
10620 struct mlx5_flow_dv_tag_resource *tag =
10621 container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10623 MLX5_ASSERT(tag && sh && tag->action);
10624 claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10625 DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10626 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10633 * Pointer to Ethernet device.
10638 * 1 while a reference on it exists, 0 when freed.
10641 flow_dv_tag_release(struct rte_eth_dev *dev,
10644 struct mlx5_priv *priv = dev->data->dev_private;
10645 struct mlx5_flow_dv_tag_resource *tag;
10647 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10650 DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10651 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10652 return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10656 * Translate port ID action to vport.
10659 * Pointer to rte_eth_dev structure.
10660 * @param[in] action
10661 * Pointer to the port ID action.
10662 * @param[out] dst_port_id
10663 * The target port ID.
10664 * @param[out] error
10665 * Pointer to the error structure.
10668 * 0 on success, a negative errno value otherwise and rte_errno is set.
10671 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10672 const struct rte_flow_action *action,
10673 uint32_t *dst_port_id,
10674 struct rte_flow_error *error)
10677 struct mlx5_priv *priv;
10678 const struct rte_flow_action_port_id *conf =
10679 (const struct rte_flow_action_port_id *)action->conf;
10681 port = conf->original ? dev->data->port_id : conf->id;
10682 priv = mlx5_port_to_eswitch_info(port, false);
10684 return rte_flow_error_set(error, -rte_errno,
10685 RTE_FLOW_ERROR_TYPE_ACTION,
10687 "No eswitch info was found for port");
10688 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
10690 * This parameter is transferred to
10691 * mlx5dv_dr_action_create_dest_ib_port().
10693 *dst_port_id = priv->dev_port;
10696 * Legacy mode, no LAG configurations is supported.
10697 * This parameter is transferred to
10698 * mlx5dv_dr_action_create_dest_vport().
10700 *dst_port_id = priv->vport_id;
10706 * Create a counter with aging configuration.
10709 * Pointer to rte_eth_dev structure.
10710 * @param[in] dev_flow
10711 * Pointer to the mlx5_flow.
10712 * @param[out] count
10713 * Pointer to the counter action configuration.
10715 * Pointer to the aging action configuration.
10718 * Index to flow counter on success, 0 otherwise.
10721 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
10722 struct mlx5_flow *dev_flow,
10723 const struct rte_flow_action_count *count,
10724 const struct rte_flow_action_age *age)
10727 struct mlx5_age_param *age_param;
10729 if (count && count->shared)
10730 counter = flow_dv_counter_get_shared(dev, count->id);
10732 counter = flow_dv_counter_alloc(dev, !!age);
10733 if (!counter || age == NULL)
10735 age_param = flow_dv_counter_idx_get_age(dev, counter);
10736 age_param->context = age->context ? age->context :
10737 (void *)(uintptr_t)(dev_flow->flow_idx);
10738 age_param->timeout = age->timeout;
10739 age_param->port_id = dev->data->port_id;
10740 __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
10741 __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
10746 * Add Tx queue matcher
10749 * Pointer to the dev struct.
10750 * @param[in, out] matcher
10752 * @param[in, out] key
10753 * Flow matcher value.
10755 * Flow pattern to translate.
10757 * Item is inner pattern.
10760 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
10761 void *matcher, void *key,
10762 const struct rte_flow_item *item)
10764 const struct mlx5_rte_flow_item_tx_queue *queue_m;
10765 const struct mlx5_rte_flow_item_tx_queue *queue_v;
10767 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
10769 MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
10770 struct mlx5_txq_ctrl *txq;
10774 queue_m = (const void *)item->mask;
10777 queue_v = (const void *)item->spec;
10780 txq = mlx5_txq_get(dev, queue_v->queue);
10783 queue = txq->obj->sq->id;
10784 MLX5_SET(fte_match_set_misc, misc_m, source_sqn, queue_m->queue);
10785 MLX5_SET(fte_match_set_misc, misc_v, source_sqn,
10786 queue & queue_m->queue);
10787 mlx5_txq_release(dev, queue_v->queue);
10791 * Set the hash fields according to the @p flow information.
10793 * @param[in] dev_flow
10794 * Pointer to the mlx5_flow.
10795 * @param[in] rss_desc
10796 * Pointer to the mlx5_flow_rss_desc.
10799 flow_dv_hashfields_set(struct mlx5_flow *dev_flow,
10800 struct mlx5_flow_rss_desc *rss_desc)
10802 uint64_t items = dev_flow->handle->layers;
10804 uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
10806 dev_flow->hash_fields = 0;
10807 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
10808 if (rss_desc->level >= 2) {
10809 dev_flow->hash_fields |= IBV_RX_HASH_INNER;
10813 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
10814 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4))) {
10815 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
10816 if (rss_types & ETH_RSS_L3_SRC_ONLY)
10817 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV4;
10818 else if (rss_types & ETH_RSS_L3_DST_ONLY)
10819 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV4;
10821 dev_flow->hash_fields |= MLX5_IPV4_IBV_RX_HASH;
10823 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
10824 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6))) {
10825 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
10826 if (rss_types & ETH_RSS_L3_SRC_ONLY)
10827 dev_flow->hash_fields |= IBV_RX_HASH_SRC_IPV6;
10828 else if (rss_types & ETH_RSS_L3_DST_ONLY)
10829 dev_flow->hash_fields |= IBV_RX_HASH_DST_IPV6;
10831 dev_flow->hash_fields |= MLX5_IPV6_IBV_RX_HASH;
10834 if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
10835 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP))) {
10836 if (rss_types & ETH_RSS_UDP) {
10837 if (rss_types & ETH_RSS_L4_SRC_ONLY)
10838 dev_flow->hash_fields |=
10839 IBV_RX_HASH_SRC_PORT_UDP;
10840 else if (rss_types & ETH_RSS_L4_DST_ONLY)
10841 dev_flow->hash_fields |=
10842 IBV_RX_HASH_DST_PORT_UDP;
10844 dev_flow->hash_fields |= MLX5_UDP_IBV_RX_HASH;
10846 } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
10847 (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP))) {
10848 if (rss_types & ETH_RSS_TCP) {
10849 if (rss_types & ETH_RSS_L4_SRC_ONLY)
10850 dev_flow->hash_fields |=
10851 IBV_RX_HASH_SRC_PORT_TCP;
10852 else if (rss_types & ETH_RSS_L4_DST_ONLY)
10853 dev_flow->hash_fields |=
10854 IBV_RX_HASH_DST_PORT_TCP;
10856 dev_flow->hash_fields |= MLX5_TCP_IBV_RX_HASH;
10862 * Prepare an Rx Hash queue.
10865 * Pointer to Ethernet device.
10866 * @param[in] dev_flow
10867 * Pointer to the mlx5_flow.
10868 * @param[in] rss_desc
10869 * Pointer to the mlx5_flow_rss_desc.
10870 * @param[out] hrxq_idx
10871 * Hash Rx queue index.
10874 * The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
10876 static struct mlx5_hrxq *
10877 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
10878 struct mlx5_flow *dev_flow,
10879 struct mlx5_flow_rss_desc *rss_desc,
10880 uint32_t *hrxq_idx)
10882 struct mlx5_priv *priv = dev->data->dev_private;
10883 struct mlx5_flow_handle *dh = dev_flow->handle;
10884 struct mlx5_hrxq *hrxq;
10886 MLX5_ASSERT(rss_desc->queue_num);
10887 rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
10888 rss_desc->hash_fields = dev_flow->hash_fields;
10889 rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
10890 rss_desc->shared_rss = 0;
10891 *hrxq_idx = mlx5_hrxq_get(dev, rss_desc);
10894 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
10900 * Release sample sub action resource.
10902 * @param[in, out] dev
10903 * Pointer to rte_eth_dev structure.
10904 * @param[in] act_res
10905 * Pointer to sample sub action resource.
10908 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
10909 struct mlx5_flow_sub_actions_idx *act_res)
10911 if (act_res->rix_hrxq) {
10912 mlx5_hrxq_release(dev, act_res->rix_hrxq);
10913 act_res->rix_hrxq = 0;
10915 if (act_res->rix_encap_decap) {
10916 flow_dv_encap_decap_resource_release(dev,
10917 act_res->rix_encap_decap);
10918 act_res->rix_encap_decap = 0;
10920 if (act_res->rix_port_id_action) {
10921 flow_dv_port_id_action_resource_release(dev,
10922 act_res->rix_port_id_action);
10923 act_res->rix_port_id_action = 0;
10925 if (act_res->rix_tag) {
10926 flow_dv_tag_release(dev, act_res->rix_tag);
10927 act_res->rix_tag = 0;
10929 if (act_res->rix_jump) {
10930 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
10931 act_res->rix_jump = 0;
10936 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
10937 struct mlx5_list_entry *entry, void *cb_ctx)
10939 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10940 struct rte_eth_dev *dev = ctx->dev;
10941 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
10942 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
10946 if (ctx_resource->ratio == resource->ratio &&
10947 ctx_resource->ft_type == resource->ft_type &&
10948 ctx_resource->ft_id == resource->ft_id &&
10949 ctx_resource->set_action == resource->set_action &&
10950 !memcmp((void *)&ctx_resource->sample_act,
10951 (void *)&resource->sample_act,
10952 sizeof(struct mlx5_flow_sub_actions_list))) {
10954 * Existing sample action should release the prepared
10955 * sub-actions reference counter.
10957 flow_dv_sample_sub_actions_release(dev,
10958 &ctx_resource->sample_idx);
10964 struct mlx5_list_entry *
10965 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
10967 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10968 struct rte_eth_dev *dev = ctx->dev;
10969 struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
10970 void **sample_dv_actions = ctx_resource->sub_actions;
10971 struct mlx5_flow_dv_sample_resource *resource;
10972 struct mlx5dv_dr_flow_sampler_attr sampler_attr;
10973 struct mlx5_priv *priv = dev->data->dev_private;
10974 struct mlx5_dev_ctx_shared *sh = priv->sh;
10975 struct mlx5_flow_tbl_resource *tbl;
10977 const uint32_t next_ft_step = 1;
10978 uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
10979 uint8_t is_egress = 0;
10980 uint8_t is_transfer = 0;
10981 struct rte_flow_error *error = ctx->error;
10983 /* Register new sample resource. */
10984 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
10986 rte_flow_error_set(error, ENOMEM,
10987 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10989 "cannot allocate resource memory");
10992 *resource = *ctx_resource;
10993 /* Create normal path table level */
10994 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
10996 else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
10998 tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
10999 is_egress, is_transfer,
11000 true, NULL, 0, 0, 0, error);
11002 rte_flow_error_set(error, ENOMEM,
11003 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11005 "fail to create normal path table "
11009 resource->normal_path_tbl = tbl;
11010 if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11011 if (!sh->default_miss_action) {
11012 rte_flow_error_set(error, ENOMEM,
11013 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11015 "default miss action was not "
11019 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11020 sh->default_miss_action;
11022 /* Create a DR sample action */
11023 sampler_attr.sample_ratio = resource->ratio;
11024 sampler_attr.default_next_table = tbl->obj;
11025 sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11026 sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11027 &sample_dv_actions[0];
11028 sampler_attr.action = resource->set_action;
11029 if (mlx5_os_flow_dr_create_flow_action_sampler
11030 (&sampler_attr, &resource->verbs_action)) {
11031 rte_flow_error_set(error, ENOMEM,
11032 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11033 NULL, "cannot create sample action");
11036 resource->idx = idx;
11037 resource->dev = dev;
11038 return &resource->entry;
11040 if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11041 flow_dv_sample_sub_actions_release(dev,
11042 &resource->sample_idx);
11043 if (resource->normal_path_tbl)
11044 flow_dv_tbl_resource_release(MLX5_SH(dev),
11045 resource->normal_path_tbl);
11046 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11051 struct mlx5_list_entry *
11052 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11053 struct mlx5_list_entry *entry __rte_unused,
11056 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11057 struct rte_eth_dev *dev = ctx->dev;
11058 struct mlx5_flow_dv_sample_resource *resource;
11059 struct mlx5_priv *priv = dev->data->dev_private;
11060 struct mlx5_dev_ctx_shared *sh = priv->sh;
11063 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11065 rte_flow_error_set(ctx->error, ENOMEM,
11066 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11068 "cannot allocate resource memory");
11071 memcpy(resource, entry, sizeof(*resource));
11072 resource->idx = idx;
11073 resource->dev = dev;
11074 return &resource->entry;
11078 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11079 struct mlx5_list_entry *entry)
11081 struct mlx5_flow_dv_sample_resource *resource =
11082 container_of(entry, typeof(*resource), entry);
11083 struct rte_eth_dev *dev = resource->dev;
11084 struct mlx5_priv *priv = dev->data->dev_private;
11086 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11090 * Find existing sample resource or create and register a new one.
11092 * @param[in, out] dev
11093 * Pointer to rte_eth_dev structure.
11095 * Pointer to sample resource reference.
11096 * @parm[in, out] dev_flow
11097 * Pointer to the dev_flow.
11098 * @param[out] error
11099 * pointer to error structure.
11102 * 0 on success otherwise -errno and errno is set.
11105 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11106 struct mlx5_flow_dv_sample_resource *ref,
11107 struct mlx5_flow *dev_flow,
11108 struct rte_flow_error *error)
11110 struct mlx5_flow_dv_sample_resource *resource;
11111 struct mlx5_list_entry *entry;
11112 struct mlx5_priv *priv = dev->data->dev_private;
11113 struct mlx5_flow_cb_ctx ctx = {
11119 entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11122 resource = container_of(entry, typeof(*resource), entry);
11123 dev_flow->handle->dvh.rix_sample = resource->idx;
11124 dev_flow->dv.sample_res = resource;
11129 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11130 struct mlx5_list_entry *entry, void *cb_ctx)
11132 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11133 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11134 struct rte_eth_dev *dev = ctx->dev;
11135 struct mlx5_flow_dv_dest_array_resource *resource =
11136 container_of(entry, typeof(*resource), entry);
11139 if (ctx_resource->num_of_dest == resource->num_of_dest &&
11140 ctx_resource->ft_type == resource->ft_type &&
11141 !memcmp((void *)resource->sample_act,
11142 (void *)ctx_resource->sample_act,
11143 (ctx_resource->num_of_dest *
11144 sizeof(struct mlx5_flow_sub_actions_list)))) {
11146 * Existing sample action should release the prepared
11147 * sub-actions reference counter.
11149 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11150 flow_dv_sample_sub_actions_release(dev,
11151 &ctx_resource->sample_idx[idx]);
11157 struct mlx5_list_entry *
11158 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11160 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11161 struct rte_eth_dev *dev = ctx->dev;
11162 struct mlx5_flow_dv_dest_array_resource *resource;
11163 struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11164 struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11165 struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11166 struct mlx5_priv *priv = dev->data->dev_private;
11167 struct mlx5_dev_ctx_shared *sh = priv->sh;
11168 struct mlx5_flow_sub_actions_list *sample_act;
11169 struct mlx5dv_dr_domain *domain;
11170 uint32_t idx = 0, res_idx = 0;
11171 struct rte_flow_error *error = ctx->error;
11172 uint64_t action_flags;
11175 /* Register new destination array resource. */
11176 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11179 rte_flow_error_set(error, ENOMEM,
11180 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11182 "cannot allocate resource memory");
11185 *resource = *ctx_resource;
11186 if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11187 domain = sh->fdb_domain;
11188 else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11189 domain = sh->rx_domain;
11191 domain = sh->tx_domain;
11192 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11193 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11194 mlx5_malloc(MLX5_MEM_ZERO,
11195 sizeof(struct mlx5dv_dr_action_dest_attr),
11197 if (!dest_attr[idx]) {
11198 rte_flow_error_set(error, ENOMEM,
11199 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11201 "cannot allocate resource memory");
11204 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11205 sample_act = &ctx_resource->sample_act[idx];
11206 action_flags = sample_act->action_flags;
11207 switch (action_flags) {
11208 case MLX5_FLOW_ACTION_QUEUE:
11209 dest_attr[idx]->dest = sample_act->dr_queue_action;
11211 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11212 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11213 dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11214 dest_attr[idx]->dest_reformat->reformat =
11215 sample_act->dr_encap_action;
11216 dest_attr[idx]->dest_reformat->dest =
11217 sample_act->dr_port_id_action;
11219 case MLX5_FLOW_ACTION_PORT_ID:
11220 dest_attr[idx]->dest = sample_act->dr_port_id_action;
11222 case MLX5_FLOW_ACTION_JUMP:
11223 dest_attr[idx]->dest = sample_act->dr_jump_action;
11226 rte_flow_error_set(error, EINVAL,
11227 RTE_FLOW_ERROR_TYPE_ACTION,
11229 "unsupported actions type");
11233 /* create a dest array actioin */
11234 ret = mlx5_os_flow_dr_create_flow_action_dest_array
11236 resource->num_of_dest,
11238 &resource->action);
11240 rte_flow_error_set(error, ENOMEM,
11241 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11243 "cannot create destination array action");
11246 resource->idx = res_idx;
11247 resource->dev = dev;
11248 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11249 mlx5_free(dest_attr[idx]);
11250 return &resource->entry;
11252 for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11253 flow_dv_sample_sub_actions_release(dev,
11254 &resource->sample_idx[idx]);
11255 if (dest_attr[idx])
11256 mlx5_free(dest_attr[idx]);
11258 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11262 struct mlx5_list_entry *
11263 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11264 struct mlx5_list_entry *entry __rte_unused,
11267 struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11268 struct rte_eth_dev *dev = ctx->dev;
11269 struct mlx5_flow_dv_dest_array_resource *resource;
11270 struct mlx5_priv *priv = dev->data->dev_private;
11271 struct mlx5_dev_ctx_shared *sh = priv->sh;
11272 uint32_t res_idx = 0;
11273 struct rte_flow_error *error = ctx->error;
11275 resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11278 rte_flow_error_set(error, ENOMEM,
11279 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11281 "cannot allocate dest-array memory");
11284 memcpy(resource, entry, sizeof(*resource));
11285 resource->idx = res_idx;
11286 resource->dev = dev;
11287 return &resource->entry;
11291 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11292 struct mlx5_list_entry *entry)
11294 struct mlx5_flow_dv_dest_array_resource *resource =
11295 container_of(entry, typeof(*resource), entry);
11296 struct rte_eth_dev *dev = resource->dev;
11297 struct mlx5_priv *priv = dev->data->dev_private;
11299 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11303 * Find existing destination array resource or create and register a new one.
11305 * @param[in, out] dev
11306 * Pointer to rte_eth_dev structure.
11308 * Pointer to destination array resource reference.
11309 * @parm[in, out] dev_flow
11310 * Pointer to the dev_flow.
11311 * @param[out] error
11312 * pointer to error structure.
11315 * 0 on success otherwise -errno and errno is set.
11318 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11319 struct mlx5_flow_dv_dest_array_resource *ref,
11320 struct mlx5_flow *dev_flow,
11321 struct rte_flow_error *error)
11323 struct mlx5_flow_dv_dest_array_resource *resource;
11324 struct mlx5_priv *priv = dev->data->dev_private;
11325 struct mlx5_list_entry *entry;
11326 struct mlx5_flow_cb_ctx ctx = {
11332 entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11335 resource = container_of(entry, typeof(*resource), entry);
11336 dev_flow->handle->dvh.rix_dest_array = resource->idx;
11337 dev_flow->dv.dest_array_res = resource;
11342 * Convert Sample action to DV specification.
11345 * Pointer to rte_eth_dev structure.
11346 * @param[in] action
11347 * Pointer to sample action structure.
11348 * @param[in, out] dev_flow
11349 * Pointer to the mlx5_flow.
11351 * Pointer to the flow attributes.
11352 * @param[in, out] num_of_dest
11353 * Pointer to the num of destination.
11354 * @param[in, out] sample_actions
11355 * Pointer to sample actions list.
11356 * @param[in, out] res
11357 * Pointer to sample resource.
11358 * @param[out] error
11359 * Pointer to the error structure.
11362 * 0 on success, a negative errno value otherwise and rte_errno is set.
11365 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11366 const struct rte_flow_action_sample *action,
11367 struct mlx5_flow *dev_flow,
11368 const struct rte_flow_attr *attr,
11369 uint32_t *num_of_dest,
11370 void **sample_actions,
11371 struct mlx5_flow_dv_sample_resource *res,
11372 struct rte_flow_error *error)
11374 struct mlx5_priv *priv = dev->data->dev_private;
11375 const struct rte_flow_action *sub_actions;
11376 struct mlx5_flow_sub_actions_list *sample_act;
11377 struct mlx5_flow_sub_actions_idx *sample_idx;
11378 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11379 struct rte_flow *flow = dev_flow->flow;
11380 struct mlx5_flow_rss_desc *rss_desc;
11381 uint64_t action_flags = 0;
11384 rss_desc = &wks->rss_desc;
11385 sample_act = &res->sample_act;
11386 sample_idx = &res->sample_idx;
11387 res->ratio = action->ratio;
11388 sub_actions = action->actions;
11389 for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11390 int type = sub_actions->type;
11391 uint32_t pre_rix = 0;
11394 case RTE_FLOW_ACTION_TYPE_QUEUE:
11396 const struct rte_flow_action_queue *queue;
11397 struct mlx5_hrxq *hrxq;
11400 queue = sub_actions->conf;
11401 rss_desc->queue_num = 1;
11402 rss_desc->queue[0] = queue->index;
11403 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11404 rss_desc, &hrxq_idx);
11406 return rte_flow_error_set
11408 RTE_FLOW_ERROR_TYPE_ACTION,
11410 "cannot create fate queue");
11411 sample_act->dr_queue_action = hrxq->action;
11412 sample_idx->rix_hrxq = hrxq_idx;
11413 sample_actions[sample_act->actions_num++] =
11416 action_flags |= MLX5_FLOW_ACTION_QUEUE;
11417 if (action_flags & MLX5_FLOW_ACTION_MARK)
11418 dev_flow->handle->rix_hrxq = hrxq_idx;
11419 dev_flow->handle->fate_action =
11420 MLX5_FLOW_FATE_QUEUE;
11423 case RTE_FLOW_ACTION_TYPE_RSS:
11425 struct mlx5_hrxq *hrxq;
11427 const struct rte_flow_action_rss *rss;
11428 const uint8_t *rss_key;
11430 rss = sub_actions->conf;
11431 memcpy(rss_desc->queue, rss->queue,
11432 rss->queue_num * sizeof(uint16_t));
11433 rss_desc->queue_num = rss->queue_num;
11434 /* NULL RSS key indicates default RSS key. */
11435 rss_key = !rss->key ? rss_hash_default_key : rss->key;
11436 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11438 * rss->level and rss.types should be set in advance
11439 * when expanding items for RSS.
11441 flow_dv_hashfields_set(dev_flow, rss_desc);
11442 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11443 rss_desc, &hrxq_idx);
11445 return rte_flow_error_set
11447 RTE_FLOW_ERROR_TYPE_ACTION,
11449 "cannot create fate queue");
11450 sample_act->dr_queue_action = hrxq->action;
11451 sample_idx->rix_hrxq = hrxq_idx;
11452 sample_actions[sample_act->actions_num++] =
11455 action_flags |= MLX5_FLOW_ACTION_RSS;
11456 if (action_flags & MLX5_FLOW_ACTION_MARK)
11457 dev_flow->handle->rix_hrxq = hrxq_idx;
11458 dev_flow->handle->fate_action =
11459 MLX5_FLOW_FATE_QUEUE;
11462 case RTE_FLOW_ACTION_TYPE_MARK:
11464 uint32_t tag_be = mlx5_flow_mark_set
11465 (((const struct rte_flow_action_mark *)
11466 (sub_actions->conf))->id);
11468 dev_flow->handle->mark = 1;
11469 pre_rix = dev_flow->handle->dvh.rix_tag;
11470 /* Save the mark resource before sample */
11471 pre_r = dev_flow->dv.tag_resource;
11472 if (flow_dv_tag_resource_register(dev, tag_be,
11475 MLX5_ASSERT(dev_flow->dv.tag_resource);
11476 sample_act->dr_tag_action =
11477 dev_flow->dv.tag_resource->action;
11478 sample_idx->rix_tag =
11479 dev_flow->handle->dvh.rix_tag;
11480 sample_actions[sample_act->actions_num++] =
11481 sample_act->dr_tag_action;
11482 /* Recover the mark resource after sample */
11483 dev_flow->dv.tag_resource = pre_r;
11484 dev_flow->handle->dvh.rix_tag = pre_rix;
11485 action_flags |= MLX5_FLOW_ACTION_MARK;
11488 case RTE_FLOW_ACTION_TYPE_COUNT:
11490 if (!flow->counter) {
11492 flow_dv_translate_create_counter(dev,
11493 dev_flow, sub_actions->conf,
11495 if (!flow->counter)
11496 return rte_flow_error_set
11498 RTE_FLOW_ERROR_TYPE_ACTION,
11500 "cannot create counter"
11503 sample_act->dr_cnt_action =
11504 (flow_dv_counter_get_by_idx(dev,
11505 flow->counter, NULL))->action;
11506 sample_actions[sample_act->actions_num++] =
11507 sample_act->dr_cnt_action;
11508 action_flags |= MLX5_FLOW_ACTION_COUNT;
11511 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11513 struct mlx5_flow_dv_port_id_action_resource
11515 uint32_t port_id = 0;
11517 memset(&port_id_resource, 0, sizeof(port_id_resource));
11518 /* Save the port id resource before sample */
11519 pre_rix = dev_flow->handle->rix_port_id_action;
11520 pre_r = dev_flow->dv.port_id_action;
11521 if (flow_dv_translate_action_port_id(dev, sub_actions,
11524 port_id_resource.port_id = port_id;
11525 if (flow_dv_port_id_action_resource_register
11526 (dev, &port_id_resource, dev_flow, error))
11528 sample_act->dr_port_id_action =
11529 dev_flow->dv.port_id_action->action;
11530 sample_idx->rix_port_id_action =
11531 dev_flow->handle->rix_port_id_action;
11532 sample_actions[sample_act->actions_num++] =
11533 sample_act->dr_port_id_action;
11534 /* Recover the port id resource after sample */
11535 dev_flow->dv.port_id_action = pre_r;
11536 dev_flow->handle->rix_port_id_action = pre_rix;
11538 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11541 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11542 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11543 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11544 /* Save the encap resource before sample */
11545 pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11546 pre_r = dev_flow->dv.encap_decap;
11547 if (flow_dv_create_action_l2_encap(dev, sub_actions,
11552 sample_act->dr_encap_action =
11553 dev_flow->dv.encap_decap->action;
11554 sample_idx->rix_encap_decap =
11555 dev_flow->handle->dvh.rix_encap_decap;
11556 sample_actions[sample_act->actions_num++] =
11557 sample_act->dr_encap_action;
11558 /* Recover the encap resource after sample */
11559 dev_flow->dv.encap_decap = pre_r;
11560 dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11561 action_flags |= MLX5_FLOW_ACTION_ENCAP;
11564 return rte_flow_error_set(error, EINVAL,
11565 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11567 "Not support for sampler action");
11570 sample_act->action_flags = action_flags;
11571 res->ft_id = dev_flow->dv.group;
11572 if (attr->transfer) {
11574 uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11575 uint64_t set_action;
11576 } action_ctx = { .set_action = 0 };
11578 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11579 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11580 MLX5_MODIFICATION_TYPE_SET);
11581 MLX5_SET(set_action_in, action_ctx.action_in, field,
11582 MLX5_MODI_META_REG_C_0);
11583 MLX5_SET(set_action_in, action_ctx.action_in, data,
11584 priv->vport_meta_tag);
11585 res->set_action = action_ctx.set_action;
11586 } else if (attr->ingress) {
11587 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11589 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11595 * Convert Sample action to DV specification.
11598 * Pointer to rte_eth_dev structure.
11599 * @param[in, out] dev_flow
11600 * Pointer to the mlx5_flow.
11601 * @param[in] num_of_dest
11602 * The num of destination.
11603 * @param[in, out] res
11604 * Pointer to sample resource.
11605 * @param[in, out] mdest_res
11606 * Pointer to destination array resource.
11607 * @param[in] sample_actions
11608 * Pointer to sample path actions list.
11609 * @param[in] action_flags
11610 * Holds the actions detected until now.
11611 * @param[out] error
11612 * Pointer to the error structure.
11615 * 0 on success, a negative errno value otherwise and rte_errno is set.
11618 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11619 struct mlx5_flow *dev_flow,
11620 uint32_t num_of_dest,
11621 struct mlx5_flow_dv_sample_resource *res,
11622 struct mlx5_flow_dv_dest_array_resource *mdest_res,
11623 void **sample_actions,
11624 uint64_t action_flags,
11625 struct rte_flow_error *error)
11627 /* update normal path action resource into last index of array */
11628 uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11629 struct mlx5_flow_sub_actions_list *sample_act =
11630 &mdest_res->sample_act[dest_index];
11631 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11632 struct mlx5_flow_rss_desc *rss_desc;
11633 uint32_t normal_idx = 0;
11634 struct mlx5_hrxq *hrxq;
11638 rss_desc = &wks->rss_desc;
11639 if (num_of_dest > 1) {
11640 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11641 /* Handle QP action for mirroring */
11642 hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11643 rss_desc, &hrxq_idx);
11645 return rte_flow_error_set
11647 RTE_FLOW_ERROR_TYPE_ACTION,
11649 "cannot create rx queue");
11651 mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11652 sample_act->dr_queue_action = hrxq->action;
11653 if (action_flags & MLX5_FLOW_ACTION_MARK)
11654 dev_flow->handle->rix_hrxq = hrxq_idx;
11655 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11657 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11659 mdest_res->sample_idx[dest_index].rix_encap_decap =
11660 dev_flow->handle->dvh.rix_encap_decap;
11661 sample_act->dr_encap_action =
11662 dev_flow->dv.encap_decap->action;
11663 dev_flow->handle->dvh.rix_encap_decap = 0;
11665 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11667 mdest_res->sample_idx[dest_index].rix_port_id_action =
11668 dev_flow->handle->rix_port_id_action;
11669 sample_act->dr_port_id_action =
11670 dev_flow->dv.port_id_action->action;
11671 dev_flow->handle->rix_port_id_action = 0;
11673 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
11675 mdest_res->sample_idx[dest_index].rix_jump =
11676 dev_flow->handle->rix_jump;
11677 sample_act->dr_jump_action =
11678 dev_flow->dv.jump->action;
11679 dev_flow->handle->rix_jump = 0;
11681 sample_act->actions_num = normal_idx;
11682 /* update sample action resource into first index of array */
11683 mdest_res->ft_type = res->ft_type;
11684 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
11685 sizeof(struct mlx5_flow_sub_actions_idx));
11686 memcpy(&mdest_res->sample_act[0], &res->sample_act,
11687 sizeof(struct mlx5_flow_sub_actions_list));
11688 mdest_res->num_of_dest = num_of_dest;
11689 if (flow_dv_dest_array_resource_register(dev, mdest_res,
11691 return rte_flow_error_set(error, EINVAL,
11692 RTE_FLOW_ERROR_TYPE_ACTION,
11693 NULL, "can't create sample "
11696 res->sub_actions = sample_actions;
11697 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
11698 return rte_flow_error_set(error, EINVAL,
11699 RTE_FLOW_ERROR_TYPE_ACTION,
11701 "can't create sample action");
11707 * Remove an ASO age action from age actions list.
11710 * Pointer to the Ethernet device structure.
11712 * Pointer to the aso age action handler.
11715 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
11716 struct mlx5_aso_age_action *age)
11718 struct mlx5_age_info *age_info;
11719 struct mlx5_age_param *age_param = &age->age_params;
11720 struct mlx5_priv *priv = dev->data->dev_private;
11721 uint16_t expected = AGE_CANDIDATE;
11723 age_info = GET_PORT_AGE_INFO(priv);
11724 if (!__atomic_compare_exchange_n(&age_param->state, &expected,
11725 AGE_FREE, false, __ATOMIC_RELAXED,
11726 __ATOMIC_RELAXED)) {
11728 * We need the lock even it is age timeout,
11729 * since age action may still in process.
11731 rte_spinlock_lock(&age_info->aged_sl);
11732 LIST_REMOVE(age, next);
11733 rte_spinlock_unlock(&age_info->aged_sl);
11734 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
11739 * Release an ASO age action.
11742 * Pointer to the Ethernet device structure.
11743 * @param[in] age_idx
11744 * Index of ASO age action to release.
11746 * True if the release operation is during flow destroy operation.
11747 * False if the release operation is during action destroy operation.
11750 * 0 when age action was removed, otherwise the number of references.
11753 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
11755 struct mlx5_priv *priv = dev->data->dev_private;
11756 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11757 struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
11758 uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
11761 flow_dv_aso_age_remove_from_age(dev, age);
11762 rte_spinlock_lock(&mng->free_sl);
11763 LIST_INSERT_HEAD(&mng->free, age, next);
11764 rte_spinlock_unlock(&mng->free_sl);
11770 * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
11773 * Pointer to the Ethernet device structure.
11776 * 0 on success, otherwise negative errno value and rte_errno is set.
11779 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
11781 struct mlx5_priv *priv = dev->data->dev_private;
11782 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11783 void *old_pools = mng->pools;
11784 uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
11785 uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
11786 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
11789 rte_errno = ENOMEM;
11793 memcpy(pools, old_pools,
11794 mng->n * sizeof(struct mlx5_flow_counter_pool *));
11795 mlx5_free(old_pools);
11797 /* First ASO flow hit allocation - starting ASO data-path. */
11798 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
11806 mng->pools = pools;
11811 * Create and initialize a new ASO aging pool.
11814 * Pointer to the Ethernet device structure.
11815 * @param[out] age_free
11816 * Where to put the pointer of a new age action.
11819 * The age actions pool pointer and @p age_free is set on success,
11820 * NULL otherwise and rte_errno is set.
11822 static struct mlx5_aso_age_pool *
11823 flow_dv_age_pool_create(struct rte_eth_dev *dev,
11824 struct mlx5_aso_age_action **age_free)
11826 struct mlx5_priv *priv = dev->data->dev_private;
11827 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11828 struct mlx5_aso_age_pool *pool = NULL;
11829 struct mlx5_devx_obj *obj = NULL;
11832 obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->ctx,
11835 rte_errno = ENODATA;
11836 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
11839 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
11841 claim_zero(mlx5_devx_cmd_destroy(obj));
11842 rte_errno = ENOMEM;
11845 pool->flow_hit_aso_obj = obj;
11846 pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
11847 rte_spinlock_lock(&mng->resize_sl);
11848 pool->index = mng->next;
11849 /* Resize pools array if there is no room for the new pool in it. */
11850 if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
11851 claim_zero(mlx5_devx_cmd_destroy(obj));
11853 rte_spinlock_unlock(&mng->resize_sl);
11856 mng->pools[pool->index] = pool;
11858 rte_spinlock_unlock(&mng->resize_sl);
11859 /* Assign the first action in the new pool, the rest go to free list. */
11860 *age_free = &pool->actions[0];
11861 for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
11862 pool->actions[i].offset = i;
11863 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
11869 * Allocate a ASO aging bit.
11872 * Pointer to the Ethernet device structure.
11873 * @param[out] error
11874 * Pointer to the error structure.
11877 * Index to ASO age action on success, 0 otherwise and rte_errno is set.
11880 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
11882 struct mlx5_priv *priv = dev->data->dev_private;
11883 const struct mlx5_aso_age_pool *pool;
11884 struct mlx5_aso_age_action *age_free = NULL;
11885 struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
11888 /* Try to get the next free age action bit. */
11889 rte_spinlock_lock(&mng->free_sl);
11890 age_free = LIST_FIRST(&mng->free);
11892 LIST_REMOVE(age_free, next);
11893 } else if (!flow_dv_age_pool_create(dev, &age_free)) {
11894 rte_spinlock_unlock(&mng->free_sl);
11895 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
11896 NULL, "failed to create ASO age pool");
11897 return 0; /* 0 is an error. */
11899 rte_spinlock_unlock(&mng->free_sl);
11900 pool = container_of
11901 ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
11902 (age_free - age_free->offset), const struct mlx5_aso_age_pool,
11904 if (!age_free->dr_action) {
11905 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
11909 rte_flow_error_set(error, rte_errno,
11910 RTE_FLOW_ERROR_TYPE_ACTION,
11911 NULL, "failed to get reg_c "
11912 "for ASO flow hit");
11913 return 0; /* 0 is an error. */
11915 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
11916 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
11917 (priv->sh->rx_domain,
11918 pool->flow_hit_aso_obj->obj, age_free->offset,
11919 MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
11920 (reg_c - REG_C_0));
11921 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
11922 if (!age_free->dr_action) {
11924 rte_spinlock_lock(&mng->free_sl);
11925 LIST_INSERT_HEAD(&mng->free, age_free, next);
11926 rte_spinlock_unlock(&mng->free_sl);
11927 rte_flow_error_set(error, rte_errno,
11928 RTE_FLOW_ERROR_TYPE_ACTION,
11929 NULL, "failed to create ASO "
11930 "flow hit action");
11931 return 0; /* 0 is an error. */
11934 __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
11935 return pool->index | ((age_free->offset + 1) << 16);
11939 * Initialize flow ASO age parameters.
11942 * Pointer to rte_eth_dev structure.
11943 * @param[in] age_idx
11944 * Index of ASO age action.
11945 * @param[in] context
11946 * Pointer to flow counter age context.
11947 * @param[in] timeout
11948 * Aging timeout in seconds.
11952 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
11957 struct mlx5_aso_age_action *aso_age;
11959 aso_age = flow_aso_age_get_by_idx(dev, age_idx);
11960 MLX5_ASSERT(aso_age);
11961 aso_age->age_params.context = context;
11962 aso_age->age_params.timeout = timeout;
11963 aso_age->age_params.port_id = dev->data->port_id;
11964 __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
11966 __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
11971 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
11972 const struct rte_flow_item_integrity *value,
11973 void *headers_m, void *headers_v)
11976 /* application l4_ok filter aggregates all hardware l4 filters
11977 * therefore hw l4_checksum_ok must be implicitly added here.
11979 struct rte_flow_item_integrity local_item;
11981 local_item.l4_csum_ok = 1;
11982 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
11983 local_item.l4_csum_ok);
11984 if (value->l4_ok) {
11985 /* application l4_ok = 1 matches sets both hw flags
11986 * l4_ok and l4_checksum_ok flags to 1.
11988 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11989 l4_checksum_ok, local_item.l4_csum_ok);
11990 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok,
11992 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok,
11995 /* application l4_ok = 0 matches on hw flag
11996 * l4_checksum_ok = 0 only.
11998 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
11999 l4_checksum_ok, 0);
12001 } else if (mask->l4_csum_ok) {
12002 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok,
12004 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12005 value->l4_csum_ok);
12010 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12011 const struct rte_flow_item_integrity *value,
12012 void *headers_m, void *headers_v,
12016 /* application l3_ok filter aggregates all hardware l3 filters
12017 * therefore hw ipv4_checksum_ok must be implicitly added here.
12019 struct rte_flow_item_integrity local_item;
12021 local_item.ipv4_csum_ok = !!is_ipv4;
12022 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12023 local_item.ipv4_csum_ok);
12024 if (value->l3_ok) {
12025 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12026 ipv4_checksum_ok, local_item.ipv4_csum_ok);
12027 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok,
12029 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12032 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12033 ipv4_checksum_ok, 0);
12035 } else if (mask->ipv4_csum_ok) {
12036 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok,
12037 mask->ipv4_csum_ok);
12038 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12039 value->ipv4_csum_ok);
12044 flow_dv_translate_item_integrity(void *matcher, void *key,
12045 const struct rte_flow_item *head_item,
12046 const struct rte_flow_item *integrity_item)
12048 const struct rte_flow_item_integrity *mask = integrity_item->mask;
12049 const struct rte_flow_item_integrity *value = integrity_item->spec;
12050 const struct rte_flow_item *tunnel_item, *end_item, *item;
12053 uint32_t l3_protocol;
12058 mask = &rte_flow_item_integrity_mask;
12059 if (value->level > 1) {
12060 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12062 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12064 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12066 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12068 tunnel_item = mlx5_flow_find_tunnel_item(head_item);
12069 if (value->level > 1) {
12070 /* tunnel item was verified during the item validation */
12071 item = tunnel_item;
12072 end_item = mlx5_find_end_item(tunnel_item);
12075 end_item = tunnel_item ? tunnel_item :
12076 mlx5_find_end_item(integrity_item);
12078 l3_protocol = mask->l3_ok ?
12079 mlx5_flow_locate_proto_l3(&item, end_item) : 0;
12080 flow_dv_translate_integrity_l3(mask, value, headers_m, headers_v,
12081 l3_protocol == RTE_ETHER_TYPE_IPV4);
12082 flow_dv_translate_integrity_l4(mask, value, headers_m, headers_v);
12086 * Prepares DV flow counter with aging configuration.
12087 * Gets it by index when exists, creates a new one when doesn't.
12090 * Pointer to rte_eth_dev structure.
12091 * @param[in] dev_flow
12092 * Pointer to the mlx5_flow.
12093 * @param[in, out] flow
12094 * Pointer to the sub flow.
12096 * Pointer to the counter action configuration.
12098 * Pointer to the aging action configuration.
12099 * @param[out] error
12100 * Pointer to the error structure.
12103 * Pointer to the counter, NULL otherwise.
12105 static struct mlx5_flow_counter *
12106 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12107 struct mlx5_flow *dev_flow,
12108 struct rte_flow *flow,
12109 const struct rte_flow_action_count *count,
12110 const struct rte_flow_action_age *age,
12111 struct rte_flow_error *error)
12113 if (!flow->counter) {
12114 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12116 if (!flow->counter) {
12117 rte_flow_error_set(error, rte_errno,
12118 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12119 "cannot create counter object.");
12123 return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12127 * Release an ASO CT action by its own device.
12130 * Pointer to the Ethernet device structure.
12132 * Index of ASO CT action to release.
12135 * 0 when CT action was removed, otherwise the number of references.
12138 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12140 struct mlx5_priv *priv = dev->data->dev_private;
12141 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12143 struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12144 enum mlx5_aso_ct_state state =
12145 __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12147 /* Cannot release when CT is in the ASO SQ. */
12148 if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12150 ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12152 if (ct->dr_action_orig) {
12153 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12154 claim_zero(mlx5_glue->destroy_flow_action
12155 (ct->dr_action_orig));
12157 ct->dr_action_orig = NULL;
12159 if (ct->dr_action_rply) {
12160 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12161 claim_zero(mlx5_glue->destroy_flow_action
12162 (ct->dr_action_rply));
12164 ct->dr_action_rply = NULL;
12166 /* Clear the state to free, no need in 1st allocation. */
12167 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12168 rte_spinlock_lock(&mng->ct_sl);
12169 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12170 rte_spinlock_unlock(&mng->ct_sl);
12176 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx)
12178 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12179 uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12180 struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12183 MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12184 if (dev->data->dev_started != 1)
12186 return flow_dv_aso_ct_dev_release(owndev, idx);
12190 * Resize the ASO CT pools array by 64 pools.
12193 * Pointer to the Ethernet device structure.
12196 * 0 on success, otherwise negative errno value and rte_errno is set.
12199 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12201 struct mlx5_priv *priv = dev->data->dev_private;
12202 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12203 void *old_pools = mng->pools;
12204 /* Magic number now, need a macro. */
12205 uint32_t resize = mng->n + 64;
12206 uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12207 void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12210 rte_errno = ENOMEM;
12213 rte_rwlock_write_lock(&mng->resize_rwl);
12214 /* ASO SQ/QP was already initialized in the startup. */
12216 /* Realloc could be an alternative choice. */
12217 rte_memcpy(pools, old_pools,
12218 mng->n * sizeof(struct mlx5_aso_ct_pool *));
12219 mlx5_free(old_pools);
12222 mng->pools = pools;
12223 rte_rwlock_write_unlock(&mng->resize_rwl);
12228 * Create and initialize a new ASO CT pool.
12231 * Pointer to the Ethernet device structure.
12232 * @param[out] ct_free
12233 * Where to put the pointer of a new CT action.
12236 * The CT actions pool pointer and @p ct_free is set on success,
12237 * NULL otherwise and rte_errno is set.
12239 static struct mlx5_aso_ct_pool *
12240 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12241 struct mlx5_aso_ct_action **ct_free)
12243 struct mlx5_priv *priv = dev->data->dev_private;
12244 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12245 struct mlx5_aso_ct_pool *pool = NULL;
12246 struct mlx5_devx_obj *obj = NULL;
12248 uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12250 obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->ctx,
12251 priv->sh->pdn, log_obj_size);
12253 rte_errno = ENODATA;
12254 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12257 pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12259 rte_errno = ENOMEM;
12260 claim_zero(mlx5_devx_cmd_destroy(obj));
12263 pool->devx_obj = obj;
12264 pool->index = mng->next;
12265 /* Resize pools array if there is no room for the new pool in it. */
12266 if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12267 claim_zero(mlx5_devx_cmd_destroy(obj));
12271 mng->pools[pool->index] = pool;
12273 /* Assign the first action in the new pool, the rest go to free list. */
12274 *ct_free = &pool->actions[0];
12275 /* Lock outside, the list operation is safe here. */
12276 for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12277 /* refcnt is 0 when allocating the memory. */
12278 pool->actions[i].offset = i;
12279 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12285 * Allocate a ASO CT action from free list.
12288 * Pointer to the Ethernet device structure.
12289 * @param[out] error
12290 * Pointer to the error structure.
12293 * Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12296 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12298 struct mlx5_priv *priv = dev->data->dev_private;
12299 struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12300 struct mlx5_aso_ct_action *ct = NULL;
12301 struct mlx5_aso_ct_pool *pool;
12306 if (!priv->config.devx) {
12307 rte_errno = ENOTSUP;
12310 /* Get a free CT action, if no, a new pool will be created. */
12311 rte_spinlock_lock(&mng->ct_sl);
12312 ct = LIST_FIRST(&mng->free_cts);
12314 LIST_REMOVE(ct, next);
12315 } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12316 rte_spinlock_unlock(&mng->ct_sl);
12317 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12318 NULL, "failed to create ASO CT pool");
12321 rte_spinlock_unlock(&mng->ct_sl);
12322 pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12323 ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12324 /* 0: inactive, 1: created, 2+: used by flows. */
12325 __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12326 reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12327 if (!ct->dr_action_orig) {
12328 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12329 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12330 (priv->sh->rx_domain, pool->devx_obj->obj,
12332 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12335 RTE_SET_USED(reg_c);
12337 if (!ct->dr_action_orig) {
12338 flow_dv_aso_ct_dev_release(dev, ct_idx);
12339 rte_flow_error_set(error, rte_errno,
12340 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12341 "failed to create ASO CT action");
12345 if (!ct->dr_action_rply) {
12346 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12347 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12348 (priv->sh->rx_domain, pool->devx_obj->obj,
12350 MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12353 if (!ct->dr_action_rply) {
12354 flow_dv_aso_ct_dev_release(dev, ct_idx);
12355 rte_flow_error_set(error, rte_errno,
12356 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12357 "failed to create ASO CT action");
12365 * Create a conntrack object with context and actions by using ASO mechanism.
12368 * Pointer to rte_eth_dev structure.
12370 * Pointer to conntrack information profile.
12371 * @param[out] error
12372 * Pointer to the error structure.
12375 * Index to conntrack object on success, 0 otherwise.
12378 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12379 const struct rte_flow_action_conntrack *pro,
12380 struct rte_flow_error *error)
12382 struct mlx5_priv *priv = dev->data->dev_private;
12383 struct mlx5_dev_ctx_shared *sh = priv->sh;
12384 struct mlx5_aso_ct_action *ct;
12387 if (!sh->ct_aso_en)
12388 return rte_flow_error_set(error, ENOTSUP,
12389 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12390 "Connection is not supported");
12391 idx = flow_dv_aso_ct_alloc(dev, error);
12393 return rte_flow_error_set(error, rte_errno,
12394 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12395 "Failed to allocate CT object");
12396 ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12397 if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12398 return rte_flow_error_set(error, EBUSY,
12399 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12400 "Failed to update CT");
12401 ct->is_original = !!pro->is_original_dir;
12402 ct->peer = pro->peer_port;
12407 * Fill the flow with DV spec, lock free
12408 * (mutex should be acquired by caller).
12411 * Pointer to rte_eth_dev structure.
12412 * @param[in, out] dev_flow
12413 * Pointer to the sub flow.
12415 * Pointer to the flow attributes.
12417 * Pointer to the list of items.
12418 * @param[in] actions
12419 * Pointer to the list of actions.
12420 * @param[out] error
12421 * Pointer to the error structure.
12424 * 0 on success, a negative errno value otherwise and rte_errno is set.
12427 flow_dv_translate(struct rte_eth_dev *dev,
12428 struct mlx5_flow *dev_flow,
12429 const struct rte_flow_attr *attr,
12430 const struct rte_flow_item items[],
12431 const struct rte_flow_action actions[],
12432 struct rte_flow_error *error)
12434 struct mlx5_priv *priv = dev->data->dev_private;
12435 struct mlx5_dev_config *dev_conf = &priv->config;
12436 struct rte_flow *flow = dev_flow->flow;
12437 struct mlx5_flow_handle *handle = dev_flow->handle;
12438 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12439 struct mlx5_flow_rss_desc *rss_desc;
12440 uint64_t item_flags = 0;
12441 uint64_t last_item = 0;
12442 uint64_t action_flags = 0;
12443 struct mlx5_flow_dv_matcher matcher = {
12445 .size = sizeof(matcher.mask.buf),
12449 bool actions_end = false;
12451 struct mlx5_flow_dv_modify_hdr_resource res;
12452 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12453 sizeof(struct mlx5_modification_cmd) *
12454 (MLX5_MAX_MODIFY_NUM + 1)];
12456 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12457 const struct rte_flow_action_count *count = NULL;
12458 const struct rte_flow_action_age *non_shared_age = NULL;
12459 union flow_dv_attr flow_attr = { .attr = 0 };
12461 union mlx5_flow_tbl_key tbl_key;
12462 uint32_t modify_action_position = UINT32_MAX;
12463 void *match_mask = matcher.mask.buf;
12464 void *match_value = dev_flow->dv.value.buf;
12465 uint8_t next_protocol = 0xff;
12466 struct rte_vlan_hdr vlan = { 0 };
12467 struct mlx5_flow_dv_dest_array_resource mdest_res;
12468 struct mlx5_flow_dv_sample_resource sample_res;
12469 void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12470 const struct rte_flow_action_sample *sample = NULL;
12471 struct mlx5_flow_sub_actions_list *sample_act;
12472 uint32_t sample_act_pos = UINT32_MAX;
12473 uint32_t age_act_pos = UINT32_MAX;
12474 uint32_t num_of_dest = 0;
12475 int tmp_actions_n = 0;
12478 const struct mlx5_flow_tunnel *tunnel = NULL;
12479 struct flow_grp_info grp_info = {
12480 .external = !!dev_flow->external,
12481 .transfer = !!attr->transfer,
12482 .fdb_def_rule = !!priv->fdb_def_rule,
12483 .skip_scale = dev_flow->skip_scale &
12484 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12485 .std_tbl_fix = true,
12487 const struct rte_flow_item *head_item = items;
12490 return rte_flow_error_set(error, ENOMEM,
12491 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12493 "failed to push flow workspace");
12494 rss_desc = &wks->rss_desc;
12495 memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12496 memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12497 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12498 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12499 /* update normal path action resource into last index of array */
12500 sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12501 if (is_tunnel_offload_active(dev)) {
12502 if (dev_flow->tunnel) {
12503 RTE_VERIFY(dev_flow->tof_type ==
12504 MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12505 tunnel = dev_flow->tunnel;
12507 tunnel = mlx5_get_tof(items, actions,
12508 &dev_flow->tof_type);
12509 dev_flow->tunnel = tunnel;
12511 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12512 (dev, attr, tunnel, dev_flow->tof_type);
12514 mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12515 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12516 ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12520 dev_flow->dv.group = table;
12521 if (attr->transfer)
12522 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12523 /* number of actions must be set to 0 in case of dirty stack. */
12524 mhdr_res->actions_num = 0;
12525 if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12527 * do not add decap action if match rule drops packet
12528 * HW rejects rules with decap & drop
12530 * if tunnel match rule was inserted before matching tunnel set
12531 * rule flow table used in the match rule must be registered.
12532 * current implementation handles that in the
12533 * flow_dv_match_register() at the function end.
12535 bool add_decap = true;
12536 const struct rte_flow_action *ptr = actions;
12538 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12539 if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12545 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12549 dev_flow->dv.actions[actions_n++] =
12550 dev_flow->dv.encap_decap->action;
12551 action_flags |= MLX5_FLOW_ACTION_DECAP;
12554 for (; !actions_end ; actions++) {
12555 const struct rte_flow_action_queue *queue;
12556 const struct rte_flow_action_rss *rss;
12557 const struct rte_flow_action *action = actions;
12558 const uint8_t *rss_key;
12559 struct mlx5_flow_tbl_resource *tbl;
12560 struct mlx5_aso_age_action *age_act;
12561 struct mlx5_flow_counter *cnt_act;
12562 uint32_t port_id = 0;
12563 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12564 int action_type = actions->type;
12565 const struct rte_flow_action *found_action = NULL;
12566 uint32_t jump_group = 0;
12567 uint32_t owner_idx;
12568 struct mlx5_aso_ct_action *ct;
12570 if (!mlx5_flow_os_action_supported(action_type))
12571 return rte_flow_error_set(error, ENOTSUP,
12572 RTE_FLOW_ERROR_TYPE_ACTION,
12574 "action not supported");
12575 switch (action_type) {
12576 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12577 action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12579 case RTE_FLOW_ACTION_TYPE_VOID:
12581 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12582 if (flow_dv_translate_action_port_id(dev, action,
12585 port_id_resource.port_id = port_id;
12586 MLX5_ASSERT(!handle->rix_port_id_action);
12587 if (flow_dv_port_id_action_resource_register
12588 (dev, &port_id_resource, dev_flow, error))
12590 dev_flow->dv.actions[actions_n++] =
12591 dev_flow->dv.port_id_action->action;
12592 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12593 dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12594 sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12597 case RTE_FLOW_ACTION_TYPE_FLAG:
12598 action_flags |= MLX5_FLOW_ACTION_FLAG;
12599 dev_flow->handle->mark = 1;
12600 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12601 struct rte_flow_action_mark mark = {
12602 .id = MLX5_FLOW_MARK_DEFAULT,
12605 if (flow_dv_convert_action_mark(dev, &mark,
12609 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12612 tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12614 * Only one FLAG or MARK is supported per device flow
12615 * right now. So the pointer to the tag resource must be
12616 * zero before the register process.
12618 MLX5_ASSERT(!handle->dvh.rix_tag);
12619 if (flow_dv_tag_resource_register(dev, tag_be,
12622 MLX5_ASSERT(dev_flow->dv.tag_resource);
12623 dev_flow->dv.actions[actions_n++] =
12624 dev_flow->dv.tag_resource->action;
12626 case RTE_FLOW_ACTION_TYPE_MARK:
12627 action_flags |= MLX5_FLOW_ACTION_MARK;
12628 dev_flow->handle->mark = 1;
12629 if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12630 const struct rte_flow_action_mark *mark =
12631 (const struct rte_flow_action_mark *)
12634 if (flow_dv_convert_action_mark(dev, mark,
12638 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12642 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12643 /* Legacy (non-extensive) MARK action. */
12644 tag_be = mlx5_flow_mark_set
12645 (((const struct rte_flow_action_mark *)
12646 (actions->conf))->id);
12647 MLX5_ASSERT(!handle->dvh.rix_tag);
12648 if (flow_dv_tag_resource_register(dev, tag_be,
12651 MLX5_ASSERT(dev_flow->dv.tag_resource);
12652 dev_flow->dv.actions[actions_n++] =
12653 dev_flow->dv.tag_resource->action;
12655 case RTE_FLOW_ACTION_TYPE_SET_META:
12656 if (flow_dv_convert_action_set_meta
12657 (dev, mhdr_res, attr,
12658 (const struct rte_flow_action_set_meta *)
12659 actions->conf, error))
12661 action_flags |= MLX5_FLOW_ACTION_SET_META;
12663 case RTE_FLOW_ACTION_TYPE_SET_TAG:
12664 if (flow_dv_convert_action_set_tag
12666 (const struct rte_flow_action_set_tag *)
12667 actions->conf, error))
12669 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12671 case RTE_FLOW_ACTION_TYPE_DROP:
12672 action_flags |= MLX5_FLOW_ACTION_DROP;
12673 dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
12675 case RTE_FLOW_ACTION_TYPE_QUEUE:
12676 queue = actions->conf;
12677 rss_desc->queue_num = 1;
12678 rss_desc->queue[0] = queue->index;
12679 action_flags |= MLX5_FLOW_ACTION_QUEUE;
12680 dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
12681 sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
12684 case RTE_FLOW_ACTION_TYPE_RSS:
12685 rss = actions->conf;
12686 memcpy(rss_desc->queue, rss->queue,
12687 rss->queue_num * sizeof(uint16_t));
12688 rss_desc->queue_num = rss->queue_num;
12689 /* NULL RSS key indicates default RSS key. */
12690 rss_key = !rss->key ? rss_hash_default_key : rss->key;
12691 memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
12693 * rss->level and rss.types should be set in advance
12694 * when expanding items for RSS.
12696 action_flags |= MLX5_FLOW_ACTION_RSS;
12697 dev_flow->handle->fate_action = rss_desc->shared_rss ?
12698 MLX5_FLOW_FATE_SHARED_RSS :
12699 MLX5_FLOW_FATE_QUEUE;
12701 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
12702 flow->age = (uint32_t)(uintptr_t)(action->conf);
12703 age_act = flow_aso_age_get_by_idx(dev, flow->age);
12704 __atomic_fetch_add(&age_act->refcnt, 1,
12706 age_act_pos = actions_n++;
12707 action_flags |= MLX5_FLOW_ACTION_AGE;
12709 case RTE_FLOW_ACTION_TYPE_AGE:
12710 non_shared_age = action->conf;
12711 age_act_pos = actions_n++;
12712 action_flags |= MLX5_FLOW_ACTION_AGE;
12714 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
12715 flow->counter = (uint32_t)(uintptr_t)(action->conf);
12716 cnt_act = flow_dv_counter_get_by_idx(dev, flow->counter,
12718 __atomic_fetch_add(&cnt_act->shared_info.refcnt, 1,
12720 /* Save information first, will apply later. */
12721 action_flags |= MLX5_FLOW_ACTION_COUNT;
12723 case RTE_FLOW_ACTION_TYPE_COUNT:
12724 if (!dev_conf->devx) {
12725 return rte_flow_error_set
12727 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12729 "count action not supported");
12731 /* Save information first, will apply later. */
12732 count = action->conf;
12733 action_flags |= MLX5_FLOW_ACTION_COUNT;
12735 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
12736 dev_flow->dv.actions[actions_n++] =
12737 priv->sh->pop_vlan_action;
12738 action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
12740 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
12741 if (!(action_flags &
12742 MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
12743 flow_dev_get_vlan_info_from_items(items, &vlan);
12744 vlan.eth_proto = rte_be_to_cpu_16
12745 ((((const struct rte_flow_action_of_push_vlan *)
12746 actions->conf)->ethertype));
12747 found_action = mlx5_flow_find_action
12749 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
12751 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12752 found_action = mlx5_flow_find_action
12754 RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
12756 mlx5_update_vlan_vid_pcp(found_action, &vlan);
12757 if (flow_dv_create_action_push_vlan
12758 (dev, attr, &vlan, dev_flow, error))
12760 dev_flow->dv.actions[actions_n++] =
12761 dev_flow->dv.push_vlan_res->action;
12762 action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
12764 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
12765 /* of_vlan_push action handled this action */
12766 MLX5_ASSERT(action_flags &
12767 MLX5_FLOW_ACTION_OF_PUSH_VLAN);
12769 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
12770 if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
12772 flow_dev_get_vlan_info_from_items(items, &vlan);
12773 mlx5_update_vlan_vid_pcp(actions, &vlan);
12774 /* If no VLAN push - this is a modify header action */
12775 if (flow_dv_convert_action_modify_vlan_vid
12776 (mhdr_res, actions, error))
12778 action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
12780 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
12781 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
12782 if (flow_dv_create_action_l2_encap(dev, actions,
12787 dev_flow->dv.actions[actions_n++] =
12788 dev_flow->dv.encap_decap->action;
12789 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12790 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12791 sample_act->action_flags |=
12792 MLX5_FLOW_ACTION_ENCAP;
12794 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
12795 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
12796 if (flow_dv_create_action_l2_decap(dev, dev_flow,
12800 dev_flow->dv.actions[actions_n++] =
12801 dev_flow->dv.encap_decap->action;
12802 action_flags |= MLX5_FLOW_ACTION_DECAP;
12804 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
12805 /* Handle encap with preceding decap. */
12806 if (action_flags & MLX5_FLOW_ACTION_DECAP) {
12807 if (flow_dv_create_action_raw_encap
12808 (dev, actions, dev_flow, attr, error))
12810 dev_flow->dv.actions[actions_n++] =
12811 dev_flow->dv.encap_decap->action;
12813 /* Handle encap without preceding decap. */
12814 if (flow_dv_create_action_l2_encap
12815 (dev, actions, dev_flow, attr->transfer,
12818 dev_flow->dv.actions[actions_n++] =
12819 dev_flow->dv.encap_decap->action;
12821 action_flags |= MLX5_FLOW_ACTION_ENCAP;
12822 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
12823 sample_act->action_flags |=
12824 MLX5_FLOW_ACTION_ENCAP;
12826 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
12827 while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
12829 if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
12830 if (flow_dv_create_action_l2_decap
12831 (dev, dev_flow, attr->transfer, error))
12833 dev_flow->dv.actions[actions_n++] =
12834 dev_flow->dv.encap_decap->action;
12836 /* If decap is followed by encap, handle it at encap. */
12837 action_flags |= MLX5_FLOW_ACTION_DECAP;
12839 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
12840 dev_flow->dv.actions[actions_n++] =
12841 (void *)(uintptr_t)action->conf;
12842 action_flags |= MLX5_FLOW_ACTION_JUMP;
12844 case RTE_FLOW_ACTION_TYPE_JUMP:
12845 jump_group = ((const struct rte_flow_action_jump *)
12846 action->conf)->group;
12847 grp_info.std_tbl_fix = 0;
12848 if (dev_flow->skip_scale &
12849 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
12850 grp_info.skip_scale = 1;
12852 grp_info.skip_scale = 0;
12853 ret = mlx5_flow_group_to_table(dev, tunnel,
12859 tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
12861 !!dev_flow->external,
12862 tunnel, jump_group, 0,
12865 return rte_flow_error_set
12867 RTE_FLOW_ERROR_TYPE_ACTION,
12869 "cannot create jump action.");
12870 if (flow_dv_jump_tbl_resource_register
12871 (dev, tbl, dev_flow, error)) {
12872 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
12873 return rte_flow_error_set
12875 RTE_FLOW_ERROR_TYPE_ACTION,
12877 "cannot create jump action.");
12879 dev_flow->dv.actions[actions_n++] =
12880 dev_flow->dv.jump->action;
12881 action_flags |= MLX5_FLOW_ACTION_JUMP;
12882 dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
12883 sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
12886 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
12887 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
12888 if (flow_dv_convert_action_modify_mac
12889 (mhdr_res, actions, error))
12891 action_flags |= actions->type ==
12892 RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
12893 MLX5_FLOW_ACTION_SET_MAC_SRC :
12894 MLX5_FLOW_ACTION_SET_MAC_DST;
12896 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
12897 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
12898 if (flow_dv_convert_action_modify_ipv4
12899 (mhdr_res, actions, error))
12901 action_flags |= actions->type ==
12902 RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
12903 MLX5_FLOW_ACTION_SET_IPV4_SRC :
12904 MLX5_FLOW_ACTION_SET_IPV4_DST;
12906 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
12907 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
12908 if (flow_dv_convert_action_modify_ipv6
12909 (mhdr_res, actions, error))
12911 action_flags |= actions->type ==
12912 RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
12913 MLX5_FLOW_ACTION_SET_IPV6_SRC :
12914 MLX5_FLOW_ACTION_SET_IPV6_DST;
12916 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
12917 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
12918 if (flow_dv_convert_action_modify_tp
12919 (mhdr_res, actions, items,
12920 &flow_attr, dev_flow, !!(action_flags &
12921 MLX5_FLOW_ACTION_DECAP), error))
12923 action_flags |= actions->type ==
12924 RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
12925 MLX5_FLOW_ACTION_SET_TP_SRC :
12926 MLX5_FLOW_ACTION_SET_TP_DST;
12928 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
12929 if (flow_dv_convert_action_modify_dec_ttl
12930 (mhdr_res, items, &flow_attr, dev_flow,
12932 MLX5_FLOW_ACTION_DECAP), error))
12934 action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
12936 case RTE_FLOW_ACTION_TYPE_SET_TTL:
12937 if (flow_dv_convert_action_modify_ttl
12938 (mhdr_res, actions, items, &flow_attr,
12939 dev_flow, !!(action_flags &
12940 MLX5_FLOW_ACTION_DECAP), error))
12942 action_flags |= MLX5_FLOW_ACTION_SET_TTL;
12944 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
12945 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
12946 if (flow_dv_convert_action_modify_tcp_seq
12947 (mhdr_res, actions, error))
12949 action_flags |= actions->type ==
12950 RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
12951 MLX5_FLOW_ACTION_INC_TCP_SEQ :
12952 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
12955 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
12956 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
12957 if (flow_dv_convert_action_modify_tcp_ack
12958 (mhdr_res, actions, error))
12960 action_flags |= actions->type ==
12961 RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
12962 MLX5_FLOW_ACTION_INC_TCP_ACK :
12963 MLX5_FLOW_ACTION_DEC_TCP_ACK;
12965 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
12966 if (flow_dv_convert_action_set_reg
12967 (mhdr_res, actions, error))
12969 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12971 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
12972 if (flow_dv_convert_action_copy_mreg
12973 (dev, mhdr_res, actions, error))
12975 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
12977 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
12978 action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
12979 dev_flow->handle->fate_action =
12980 MLX5_FLOW_FATE_DEFAULT_MISS;
12982 case RTE_FLOW_ACTION_TYPE_METER:
12984 return rte_flow_error_set(error, rte_errno,
12985 RTE_FLOW_ERROR_TYPE_ACTION,
12986 NULL, "Failed to get meter in flow.");
12987 /* Set the meter action. */
12988 dev_flow->dv.actions[actions_n++] =
12989 wks->fm->meter_action;
12990 action_flags |= MLX5_FLOW_ACTION_METER;
12992 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
12993 if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
12996 action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
12998 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
12999 if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13002 action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13004 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13005 sample_act_pos = actions_n;
13006 sample = (const struct rte_flow_action_sample *)
13009 action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13010 /* put encap action into group if work with port id */
13011 if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13012 (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13013 sample_act->action_flags |=
13014 MLX5_FLOW_ACTION_ENCAP;
13016 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13017 if (flow_dv_convert_action_modify_field
13018 (dev, mhdr_res, actions, attr, error))
13020 action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13022 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13023 owner_idx = (uint32_t)(uintptr_t)action->conf;
13024 ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13026 return rte_flow_error_set(error, EINVAL,
13027 RTE_FLOW_ERROR_TYPE_ACTION,
13029 "Failed to get CT object.");
13030 if (mlx5_aso_ct_available(priv->sh, ct))
13031 return rte_flow_error_set(error, rte_errno,
13032 RTE_FLOW_ERROR_TYPE_ACTION,
13034 "CT is unavailable.");
13035 if (ct->is_original)
13036 dev_flow->dv.actions[actions_n] =
13037 ct->dr_action_orig;
13039 dev_flow->dv.actions[actions_n] =
13040 ct->dr_action_rply;
13041 flow->indirect_type = MLX5_INDIRECT_ACTION_TYPE_CT;
13042 flow->ct = owner_idx;
13043 __atomic_fetch_add(&ct->refcnt, 1, __ATOMIC_RELAXED);
13045 action_flags |= MLX5_FLOW_ACTION_CT;
13047 case RTE_FLOW_ACTION_TYPE_END:
13048 actions_end = true;
13049 if (mhdr_res->actions_num) {
13050 /* create modify action if needed. */
13051 if (flow_dv_modify_hdr_resource_register
13052 (dev, mhdr_res, dev_flow, error))
13054 dev_flow->dv.actions[modify_action_position] =
13055 handle->dvh.modify_hdr->action;
13058 * Handle AGE and COUNT action by single HW counter
13059 * when they are not shared.
13061 if (action_flags & MLX5_FLOW_ACTION_AGE) {
13062 if ((non_shared_age &&
13063 count && !count->shared) ||
13064 !(priv->sh->flow_hit_aso_en &&
13065 (attr->group || attr->transfer))) {
13066 /* Creates age by counters. */
13067 cnt_act = flow_dv_prepare_counter
13074 dev_flow->dv.actions[age_act_pos] =
13078 if (!flow->age && non_shared_age) {
13079 flow->age = flow_dv_aso_age_alloc
13083 flow_dv_aso_age_params_init
13085 non_shared_age->context ?
13086 non_shared_age->context :
13087 (void *)(uintptr_t)
13088 (dev_flow->flow_idx),
13089 non_shared_age->timeout);
13091 age_act = flow_aso_age_get_by_idx(dev,
13093 dev_flow->dv.actions[age_act_pos] =
13094 age_act->dr_action;
13096 if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13098 * Create one count action, to be used
13099 * by all sub-flows.
13101 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13106 dev_flow->dv.actions[actions_n++] =
13112 if (mhdr_res->actions_num &&
13113 modify_action_position == UINT32_MAX)
13114 modify_action_position = actions_n++;
13116 for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13117 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13118 int item_type = items->type;
13120 if (!mlx5_flow_os_item_supported(item_type))
13121 return rte_flow_error_set(error, ENOTSUP,
13122 RTE_FLOW_ERROR_TYPE_ITEM,
13123 NULL, "item not supported");
13124 switch (item_type) {
13125 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13126 flow_dv_translate_item_port_id
13127 (dev, match_mask, match_value, items, attr);
13128 last_item = MLX5_FLOW_ITEM_PORT_ID;
13130 case RTE_FLOW_ITEM_TYPE_ETH:
13131 flow_dv_translate_item_eth(match_mask, match_value,
13133 dev_flow->dv.group);
13134 matcher.priority = action_flags &
13135 MLX5_FLOW_ACTION_DEFAULT_MISS &&
13136 !dev_flow->external ?
13137 MLX5_PRIORITY_MAP_L3 :
13138 MLX5_PRIORITY_MAP_L2;
13139 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13140 MLX5_FLOW_LAYER_OUTER_L2;
13142 case RTE_FLOW_ITEM_TYPE_VLAN:
13143 flow_dv_translate_item_vlan(dev_flow,
13144 match_mask, match_value,
13146 dev_flow->dv.group);
13147 matcher.priority = MLX5_PRIORITY_MAP_L2;
13148 last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13149 MLX5_FLOW_LAYER_INNER_VLAN) :
13150 (MLX5_FLOW_LAYER_OUTER_L2 |
13151 MLX5_FLOW_LAYER_OUTER_VLAN);
13153 case RTE_FLOW_ITEM_TYPE_IPV4:
13154 mlx5_flow_tunnel_ip_check(items, next_protocol,
13155 &item_flags, &tunnel);
13156 flow_dv_translate_item_ipv4(match_mask, match_value,
13158 dev_flow->dv.group);
13159 matcher.priority = MLX5_PRIORITY_MAP_L3;
13160 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13161 MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13162 if (items->mask != NULL &&
13163 ((const struct rte_flow_item_ipv4 *)
13164 items->mask)->hdr.next_proto_id) {
13166 ((const struct rte_flow_item_ipv4 *)
13167 (items->spec))->hdr.next_proto_id;
13169 ((const struct rte_flow_item_ipv4 *)
13170 (items->mask))->hdr.next_proto_id;
13172 /* Reset for inner layer. */
13173 next_protocol = 0xff;
13176 case RTE_FLOW_ITEM_TYPE_IPV6:
13177 mlx5_flow_tunnel_ip_check(items, next_protocol,
13178 &item_flags, &tunnel);
13179 flow_dv_translate_item_ipv6(match_mask, match_value,
13181 dev_flow->dv.group);
13182 matcher.priority = MLX5_PRIORITY_MAP_L3;
13183 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13184 MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13185 if (items->mask != NULL &&
13186 ((const struct rte_flow_item_ipv6 *)
13187 items->mask)->hdr.proto) {
13189 ((const struct rte_flow_item_ipv6 *)
13190 items->spec)->hdr.proto;
13192 ((const struct rte_flow_item_ipv6 *)
13193 items->mask)->hdr.proto;
13195 /* Reset for inner layer. */
13196 next_protocol = 0xff;
13199 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13200 flow_dv_translate_item_ipv6_frag_ext(match_mask,
13203 last_item = tunnel ?
13204 MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13205 MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13206 if (items->mask != NULL &&
13207 ((const struct rte_flow_item_ipv6_frag_ext *)
13208 items->mask)->hdr.next_header) {
13210 ((const struct rte_flow_item_ipv6_frag_ext *)
13211 items->spec)->hdr.next_header;
13213 ((const struct rte_flow_item_ipv6_frag_ext *)
13214 items->mask)->hdr.next_header;
13216 /* Reset for inner layer. */
13217 next_protocol = 0xff;
13220 case RTE_FLOW_ITEM_TYPE_TCP:
13221 flow_dv_translate_item_tcp(match_mask, match_value,
13223 matcher.priority = MLX5_PRIORITY_MAP_L4;
13224 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13225 MLX5_FLOW_LAYER_OUTER_L4_TCP;
13227 case RTE_FLOW_ITEM_TYPE_UDP:
13228 flow_dv_translate_item_udp(match_mask, match_value,
13230 matcher.priority = MLX5_PRIORITY_MAP_L4;
13231 last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13232 MLX5_FLOW_LAYER_OUTER_L4_UDP;
13234 case RTE_FLOW_ITEM_TYPE_GRE:
13235 flow_dv_translate_item_gre(match_mask, match_value,
13237 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13238 last_item = MLX5_FLOW_LAYER_GRE;
13240 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13241 flow_dv_translate_item_gre_key(match_mask,
13242 match_value, items);
13243 last_item = MLX5_FLOW_LAYER_GRE_KEY;
13245 case RTE_FLOW_ITEM_TYPE_NVGRE:
13246 flow_dv_translate_item_nvgre(match_mask, match_value,
13248 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13249 last_item = MLX5_FLOW_LAYER_GRE;
13251 case RTE_FLOW_ITEM_TYPE_VXLAN:
13252 flow_dv_translate_item_vxlan(dev, attr,
13253 match_mask, match_value,
13255 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13256 last_item = MLX5_FLOW_LAYER_VXLAN;
13258 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13259 flow_dv_translate_item_vxlan_gpe(match_mask,
13260 match_value, items,
13262 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13263 last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13265 case RTE_FLOW_ITEM_TYPE_GENEVE:
13266 flow_dv_translate_item_geneve(match_mask, match_value,
13268 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13269 last_item = MLX5_FLOW_LAYER_GENEVE;
13271 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13272 ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13276 return rte_flow_error_set(error, -ret,
13277 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13278 "cannot create GENEVE TLV option");
13279 flow->geneve_tlv_option = 1;
13280 last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13282 case RTE_FLOW_ITEM_TYPE_MPLS:
13283 flow_dv_translate_item_mpls(match_mask, match_value,
13284 items, last_item, tunnel);
13285 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13286 last_item = MLX5_FLOW_LAYER_MPLS;
13288 case RTE_FLOW_ITEM_TYPE_MARK:
13289 flow_dv_translate_item_mark(dev, match_mask,
13290 match_value, items);
13291 last_item = MLX5_FLOW_ITEM_MARK;
13293 case RTE_FLOW_ITEM_TYPE_META:
13294 flow_dv_translate_item_meta(dev, match_mask,
13295 match_value, attr, items);
13296 last_item = MLX5_FLOW_ITEM_METADATA;
13298 case RTE_FLOW_ITEM_TYPE_ICMP:
13299 flow_dv_translate_item_icmp(match_mask, match_value,
13301 last_item = MLX5_FLOW_LAYER_ICMP;
13303 case RTE_FLOW_ITEM_TYPE_ICMP6:
13304 flow_dv_translate_item_icmp6(match_mask, match_value,
13306 last_item = MLX5_FLOW_LAYER_ICMP6;
13308 case RTE_FLOW_ITEM_TYPE_TAG:
13309 flow_dv_translate_item_tag(dev, match_mask,
13310 match_value, items);
13311 last_item = MLX5_FLOW_ITEM_TAG;
13313 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13314 flow_dv_translate_mlx5_item_tag(dev, match_mask,
13315 match_value, items);
13316 last_item = MLX5_FLOW_ITEM_TAG;
13318 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13319 flow_dv_translate_item_tx_queue(dev, match_mask,
13322 last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13324 case RTE_FLOW_ITEM_TYPE_GTP:
13325 flow_dv_translate_item_gtp(match_mask, match_value,
13327 matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13328 last_item = MLX5_FLOW_LAYER_GTP;
13330 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13331 ret = flow_dv_translate_item_gtp_psc(match_mask,
13335 return rte_flow_error_set(error, -ret,
13336 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13337 "cannot create GTP PSC item");
13338 last_item = MLX5_FLOW_LAYER_GTP_PSC;
13340 case RTE_FLOW_ITEM_TYPE_ECPRI:
13341 if (!mlx5_flex_parser_ecpri_exist(dev)) {
13342 /* Create it only the first time to be used. */
13343 ret = mlx5_flex_parser_ecpri_alloc(dev);
13345 return rte_flow_error_set
13347 RTE_FLOW_ERROR_TYPE_ITEM,
13349 "cannot create eCPRI parser");
13351 flow_dv_translate_item_ecpri(dev, match_mask,
13352 match_value, items);
13353 /* No other protocol should follow eCPRI layer. */
13354 last_item = MLX5_FLOW_LAYER_ECPRI;
13356 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13357 flow_dv_translate_item_integrity(match_mask,
13361 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13362 flow_dv_translate_item_aso_ct(dev, match_mask,
13363 match_value, items);
13368 item_flags |= last_item;
13371 * When E-Switch mode is enabled, we have two cases where we need to
13372 * set the source port manually.
13373 * The first one, is in case of Nic steering rule, and the second is
13374 * E-Switch rule where no port_id item was found. In both cases
13375 * the source port is set according the current port in use.
13377 if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) &&
13378 (priv->representor || priv->master)) {
13379 if (flow_dv_translate_item_port_id(dev, match_mask,
13380 match_value, NULL, attr))
13383 #ifdef RTE_LIBRTE_MLX5_DEBUG
13384 MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13385 dev_flow->dv.value.buf));
13388 * Layers may be already initialized from prefix flow if this dev_flow
13389 * is the suffix flow.
13391 handle->layers |= item_flags;
13392 if (action_flags & MLX5_FLOW_ACTION_RSS)
13393 flow_dv_hashfields_set(dev_flow, rss_desc);
13394 /* If has RSS action in the sample action, the Sample/Mirror resource
13395 * should be registered after the hash filed be update.
13397 if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13398 ret = flow_dv_translate_action_sample(dev,
13407 ret = flow_dv_create_action_sample(dev,
13416 return rte_flow_error_set
13418 RTE_FLOW_ERROR_TYPE_ACTION,
13420 "cannot create sample action");
13421 if (num_of_dest > 1) {
13422 dev_flow->dv.actions[sample_act_pos] =
13423 dev_flow->dv.dest_array_res->action;
13425 dev_flow->dv.actions[sample_act_pos] =
13426 dev_flow->dv.sample_res->verbs_action;
13430 * For multiple destination (sample action with ratio=1), the encap
13431 * action and port id action will be combined into group action.
13432 * So need remove the original these actions in the flow and only
13433 * use the sample action instead of.
13435 if (num_of_dest > 1 &&
13436 (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13438 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13440 for (i = 0; i < actions_n; i++) {
13441 if ((sample_act->dr_encap_action &&
13442 sample_act->dr_encap_action ==
13443 dev_flow->dv.actions[i]) ||
13444 (sample_act->dr_port_id_action &&
13445 sample_act->dr_port_id_action ==
13446 dev_flow->dv.actions[i]) ||
13447 (sample_act->dr_jump_action &&
13448 sample_act->dr_jump_action ==
13449 dev_flow->dv.actions[i]))
13451 temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13453 memcpy((void *)dev_flow->dv.actions,
13454 (void *)temp_actions,
13455 tmp_actions_n * sizeof(void *));
13456 actions_n = tmp_actions_n;
13458 dev_flow->dv.actions_n = actions_n;
13459 dev_flow->act_flags = action_flags;
13460 if (wks->skip_matcher_reg)
13462 /* Register matcher. */
13463 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13464 matcher.mask.size);
13465 matcher.priority = mlx5_get_matcher_priority(dev, attr,
13468 * When creating meter drop flow in drop table, using original
13469 * 5-tuple match, the matcher priority should be lower than
13472 if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13473 dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13474 matcher.priority <= MLX5_REG_BITS)
13475 matcher.priority += MLX5_REG_BITS;
13476 /* reserved field no needs to be set to 0 here. */
13477 tbl_key.is_fdb = attr->transfer;
13478 tbl_key.is_egress = attr->egress;
13479 tbl_key.level = dev_flow->dv.group;
13480 tbl_key.id = dev_flow->dv.table_id;
13481 if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13482 tunnel, attr->group, error))
13488 * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13491 * @param[in, out] action
13492 * Shred RSS action holding hash RX queue objects.
13493 * @param[in] hash_fields
13494 * Defines combination of packet fields to participate in RX hash.
13495 * @param[in] tunnel
13497 * @param[in] hrxq_idx
13498 * Hash RX queue index to set.
13501 * 0 on success, otherwise negative errno value.
13504 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13505 const uint64_t hash_fields,
13508 uint32_t *hrxqs = action->hrxq;
13510 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13511 case MLX5_RSS_HASH_IPV4:
13512 /* fall-through. */
13513 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13514 /* fall-through. */
13515 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13516 hrxqs[0] = hrxq_idx;
13518 case MLX5_RSS_HASH_IPV4_TCP:
13519 /* fall-through. */
13520 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13521 /* fall-through. */
13522 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13523 hrxqs[1] = hrxq_idx;
13525 case MLX5_RSS_HASH_IPV4_UDP:
13526 /* fall-through. */
13527 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13528 /* fall-through. */
13529 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13530 hrxqs[2] = hrxq_idx;
13532 case MLX5_RSS_HASH_IPV6:
13533 /* fall-through. */
13534 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13535 /* fall-through. */
13536 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13537 hrxqs[3] = hrxq_idx;
13539 case MLX5_RSS_HASH_IPV6_TCP:
13540 /* fall-through. */
13541 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13542 /* fall-through. */
13543 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13544 hrxqs[4] = hrxq_idx;
13546 case MLX5_RSS_HASH_IPV6_UDP:
13547 /* fall-through. */
13548 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13549 /* fall-through. */
13550 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13551 hrxqs[5] = hrxq_idx;
13553 case MLX5_RSS_HASH_NONE:
13554 hrxqs[6] = hrxq_idx;
13562 * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13566 * Pointer to the Ethernet device structure.
13568 * Shared RSS action ID holding hash RX queue objects.
13569 * @param[in] hash_fields
13570 * Defines combination of packet fields to participate in RX hash.
13571 * @param[in] tunnel
13575 * Valid hash RX queue index, otherwise 0.
13578 __flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13579 const uint64_t hash_fields)
13581 struct mlx5_priv *priv = dev->data->dev_private;
13582 struct mlx5_shared_action_rss *shared_rss =
13583 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13584 const uint32_t *hrxqs = shared_rss->hrxq;
13586 switch (hash_fields & ~IBV_RX_HASH_INNER) {
13587 case MLX5_RSS_HASH_IPV4:
13588 /* fall-through. */
13589 case MLX5_RSS_HASH_IPV4_DST_ONLY:
13590 /* fall-through. */
13591 case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13593 case MLX5_RSS_HASH_IPV4_TCP:
13594 /* fall-through. */
13595 case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13596 /* fall-through. */
13597 case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13599 case MLX5_RSS_HASH_IPV4_UDP:
13600 /* fall-through. */
13601 case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13602 /* fall-through. */
13603 case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13605 case MLX5_RSS_HASH_IPV6:
13606 /* fall-through. */
13607 case MLX5_RSS_HASH_IPV6_DST_ONLY:
13608 /* fall-through. */
13609 case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13611 case MLX5_RSS_HASH_IPV6_TCP:
13612 /* fall-through. */
13613 case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13614 /* fall-through. */
13615 case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13617 case MLX5_RSS_HASH_IPV6_UDP:
13618 /* fall-through. */
13619 case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13620 /* fall-through. */
13621 case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13623 case MLX5_RSS_HASH_NONE:
13632 * Apply the flow to the NIC, lock free,
13633 * (mutex should be acquired by caller).
13636 * Pointer to the Ethernet device structure.
13637 * @param[in, out] flow
13638 * Pointer to flow structure.
13639 * @param[out] error
13640 * Pointer to error structure.
13643 * 0 on success, a negative errno value otherwise and rte_errno is set.
13646 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
13647 struct rte_flow_error *error)
13649 struct mlx5_flow_dv_workspace *dv;
13650 struct mlx5_flow_handle *dh;
13651 struct mlx5_flow_handle_dv *dv_h;
13652 struct mlx5_flow *dev_flow;
13653 struct mlx5_priv *priv = dev->data->dev_private;
13654 uint32_t handle_idx;
13658 struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
13659 struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
13663 for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
13664 dev_flow = &wks->flows[idx];
13665 dv = &dev_flow->dv;
13666 dh = dev_flow->handle;
13669 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
13670 if (dv->transfer) {
13671 MLX5_ASSERT(priv->sh->dr_drop_action);
13672 dv->actions[n++] = priv->sh->dr_drop_action;
13674 #ifdef HAVE_MLX5DV_DR
13675 /* DR supports drop action placeholder. */
13676 MLX5_ASSERT(priv->sh->dr_drop_action);
13677 dv->actions[n++] = priv->sh->dr_drop_action;
13679 /* For DV we use the explicit drop queue. */
13680 MLX5_ASSERT(priv->drop_queue.hrxq);
13682 priv->drop_queue.hrxq->action;
13685 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
13686 !dv_h->rix_sample && !dv_h->rix_dest_array)) {
13687 struct mlx5_hrxq *hrxq;
13690 hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
13695 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13696 "cannot get hash queue");
13699 dh->rix_hrxq = hrxq_idx;
13700 dv->actions[n++] = hrxq->action;
13701 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13702 struct mlx5_hrxq *hrxq = NULL;
13705 hrxq_idx = __flow_dv_action_rss_hrxq_lookup(dev,
13706 rss_desc->shared_rss,
13707 dev_flow->hash_fields);
13709 hrxq = mlx5_ipool_get
13710 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
13715 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13716 "cannot get hash queue");
13719 dh->rix_srss = rss_desc->shared_rss;
13720 dv->actions[n++] = hrxq->action;
13721 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
13722 if (!priv->sh->default_miss_action) {
13725 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
13726 "default miss action not be created.");
13729 dv->actions[n++] = priv->sh->default_miss_action;
13731 misc_mask = flow_dv_matcher_enable(dv->value.buf);
13732 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
13733 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
13734 (void *)&dv->value, n,
13735 dv->actions, &dh->drv_flow);
13739 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13741 (!priv->config.allow_duplicate_pattern &&
13743 "duplicating pattern is not allowed" :
13744 "hardware refuses to create flow");
13747 if (priv->vmwa_context &&
13748 dh->vf_vlan.tag && !dh->vf_vlan.created) {
13750 * The rule contains the VLAN pattern.
13751 * For VF we are going to create VLAN
13752 * interface to make hypervisor set correct
13753 * e-Switch vport context.
13755 mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
13760 err = rte_errno; /* Save rte_errno before cleanup. */
13761 SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
13762 handle_idx, dh, next) {
13763 /* hrxq is union, don't clear it if the flag is not set. */
13764 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
13765 mlx5_hrxq_release(dev, dh->rix_hrxq);
13767 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
13770 if (dh->vf_vlan.tag && dh->vf_vlan.created)
13771 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
13773 rte_errno = err; /* Restore rte_errno. */
13778 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
13779 struct mlx5_list_entry *entry)
13781 struct mlx5_flow_dv_matcher *resource = container_of(entry,
13785 claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
13786 mlx5_free(resource);
13790 * Release the flow matcher.
13793 * Pointer to Ethernet device.
13795 * Index to port ID action resource.
13798 * 1 while a reference on it exists, 0 when freed.
13801 flow_dv_matcher_release(struct rte_eth_dev *dev,
13802 struct mlx5_flow_handle *handle)
13804 struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
13805 struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
13806 typeof(*tbl), tbl);
13809 MLX5_ASSERT(matcher->matcher_object);
13810 ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
13811 flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
13816 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13818 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13819 struct mlx5_flow_dv_encap_decap_resource *res =
13820 container_of(entry, typeof(*res), entry);
13822 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13823 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
13827 * Release an encap/decap resource.
13830 * Pointer to Ethernet device.
13831 * @param encap_decap_idx
13832 * Index of encap decap resource.
13835 * 1 while a reference on it exists, 0 when freed.
13838 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
13839 uint32_t encap_decap_idx)
13841 struct mlx5_priv *priv = dev->data->dev_private;
13842 struct mlx5_flow_dv_encap_decap_resource *resource;
13844 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
13848 MLX5_ASSERT(resource->action);
13849 return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
13853 * Release an jump to table action resource.
13856 * Pointer to Ethernet device.
13858 * Index to the jump action resource.
13861 * 1 while a reference on it exists, 0 when freed.
13864 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
13867 struct mlx5_priv *priv = dev->data->dev_private;
13868 struct mlx5_flow_tbl_data_entry *tbl_data;
13870 tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
13874 return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
13878 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13880 struct mlx5_flow_dv_modify_hdr_resource *res =
13881 container_of(entry, typeof(*res), entry);
13882 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13884 claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
13885 mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
13889 * Release a modify-header resource.
13892 * Pointer to Ethernet device.
13894 * Pointer to mlx5_flow_handle.
13897 * 1 while a reference on it exists, 0 when freed.
13900 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
13901 struct mlx5_flow_handle *handle)
13903 struct mlx5_priv *priv = dev->data->dev_private;
13904 struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
13906 MLX5_ASSERT(entry->action);
13907 return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
13911 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13913 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13914 struct mlx5_flow_dv_port_id_action_resource *resource =
13915 container_of(entry, typeof(*resource), entry);
13917 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
13918 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
13922 * Release port ID action resource.
13925 * Pointer to Ethernet device.
13927 * Pointer to mlx5_flow_handle.
13930 * 1 while a reference on it exists, 0 when freed.
13933 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
13936 struct mlx5_priv *priv = dev->data->dev_private;
13937 struct mlx5_flow_dv_port_id_action_resource *resource;
13939 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
13942 MLX5_ASSERT(resource->action);
13943 return mlx5_list_unregister(priv->sh->port_id_action_list,
13948 * Release shared RSS action resource.
13951 * Pointer to Ethernet device.
13953 * Shared RSS action index.
13956 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
13958 struct mlx5_priv *priv = dev->data->dev_private;
13959 struct mlx5_shared_action_rss *shared_rss;
13961 shared_rss = mlx5_ipool_get
13962 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
13963 __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
13967 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
13969 struct mlx5_dev_ctx_shared *sh = tool_ctx;
13970 struct mlx5_flow_dv_push_vlan_action_resource *resource =
13971 container_of(entry, typeof(*resource), entry);
13973 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
13974 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
13978 * Release push vlan action resource.
13981 * Pointer to Ethernet device.
13983 * Pointer to mlx5_flow_handle.
13986 * 1 while a reference on it exists, 0 when freed.
13989 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
13990 struct mlx5_flow_handle *handle)
13992 struct mlx5_priv *priv = dev->data->dev_private;
13993 struct mlx5_flow_dv_push_vlan_action_resource *resource;
13994 uint32_t idx = handle->dvh.rix_push_vlan;
13996 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
13999 MLX5_ASSERT(resource->action);
14000 return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14005 * Release the fate resource.
14008 * Pointer to Ethernet device.
14010 * Pointer to mlx5_flow_handle.
14013 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14014 struct mlx5_flow_handle *handle)
14016 if (!handle->rix_fate)
14018 switch (handle->fate_action) {
14019 case MLX5_FLOW_FATE_QUEUE:
14020 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14021 mlx5_hrxq_release(dev, handle->rix_hrxq);
14023 case MLX5_FLOW_FATE_JUMP:
14024 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14026 case MLX5_FLOW_FATE_PORT_ID:
14027 flow_dv_port_id_action_resource_release(dev,
14028 handle->rix_port_id_action);
14031 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14034 handle->rix_fate = 0;
14038 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14039 struct mlx5_list_entry *entry)
14041 struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14044 struct rte_eth_dev *dev = resource->dev;
14045 struct mlx5_priv *priv = dev->data->dev_private;
14047 if (resource->verbs_action)
14048 claim_zero(mlx5_flow_os_destroy_flow_action
14049 (resource->verbs_action));
14050 if (resource->normal_path_tbl)
14051 flow_dv_tbl_resource_release(MLX5_SH(dev),
14052 resource->normal_path_tbl);
14053 flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14054 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14055 DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14059 * Release an sample resource.
14062 * Pointer to Ethernet device.
14064 * Pointer to mlx5_flow_handle.
14067 * 1 while a reference on it exists, 0 when freed.
14070 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14071 struct mlx5_flow_handle *handle)
14073 struct mlx5_priv *priv = dev->data->dev_private;
14074 struct mlx5_flow_dv_sample_resource *resource;
14076 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14077 handle->dvh.rix_sample);
14080 MLX5_ASSERT(resource->verbs_action);
14081 return mlx5_list_unregister(priv->sh->sample_action_list,
14086 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14087 struct mlx5_list_entry *entry)
14089 struct mlx5_flow_dv_dest_array_resource *resource =
14090 container_of(entry, typeof(*resource), entry);
14091 struct rte_eth_dev *dev = resource->dev;
14092 struct mlx5_priv *priv = dev->data->dev_private;
14095 MLX5_ASSERT(resource->action);
14096 if (resource->action)
14097 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14098 for (; i < resource->num_of_dest; i++)
14099 flow_dv_sample_sub_actions_release(dev,
14100 &resource->sample_idx[i]);
14101 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14102 DRV_LOG(DEBUG, "destination array resource %p: removed",
14107 * Release an destination array resource.
14110 * Pointer to Ethernet device.
14112 * Pointer to mlx5_flow_handle.
14115 * 1 while a reference on it exists, 0 when freed.
14118 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14119 struct mlx5_flow_handle *handle)
14121 struct mlx5_priv *priv = dev->data->dev_private;
14122 struct mlx5_flow_dv_dest_array_resource *resource;
14124 resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14125 handle->dvh.rix_dest_array);
14128 MLX5_ASSERT(resource->action);
14129 return mlx5_list_unregister(priv->sh->dest_array_list,
14134 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14136 struct mlx5_priv *priv = dev->data->dev_private;
14137 struct mlx5_dev_ctx_shared *sh = priv->sh;
14138 struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14139 sh->geneve_tlv_option_resource;
14140 rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14141 if (geneve_opt_resource) {
14142 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14143 __ATOMIC_RELAXED))) {
14144 claim_zero(mlx5_devx_cmd_destroy
14145 (geneve_opt_resource->obj));
14146 mlx5_free(sh->geneve_tlv_option_resource);
14147 sh->geneve_tlv_option_resource = NULL;
14150 rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14154 * Remove the flow from the NIC but keeps it in memory.
14155 * Lock free, (mutex should be acquired by caller).
14158 * Pointer to Ethernet device.
14159 * @param[in, out] flow
14160 * Pointer to flow structure.
14163 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14165 struct mlx5_flow_handle *dh;
14166 uint32_t handle_idx;
14167 struct mlx5_priv *priv = dev->data->dev_private;
14171 handle_idx = flow->dev_handles;
14172 while (handle_idx) {
14173 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14177 if (dh->drv_flow) {
14178 claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14179 dh->drv_flow = NULL;
14181 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14182 flow_dv_fate_resource_release(dev, dh);
14183 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14184 mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14185 handle_idx = dh->next.next;
14190 * Remove the flow from the NIC and the memory.
14191 * Lock free, (mutex should be acquired by caller).
14194 * Pointer to the Ethernet device structure.
14195 * @param[in, out] flow
14196 * Pointer to flow structure.
14199 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14201 struct mlx5_flow_handle *dev_handle;
14202 struct mlx5_priv *priv = dev->data->dev_private;
14203 struct mlx5_flow_meter_info *fm = NULL;
14208 flow_dv_remove(dev, flow);
14209 if (flow->counter) {
14210 flow_dv_counter_free(dev, flow->counter);
14214 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14216 mlx5_flow_meter_detach(priv, fm);
14219 /* Keep the current age handling by default. */
14220 if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14221 flow_dv_aso_ct_release(dev, flow->ct);
14222 else if (flow->age)
14223 flow_dv_aso_age_release(dev, flow->age);
14224 if (flow->geneve_tlv_option) {
14225 flow_dv_geneve_tlv_option_resource_release(dev);
14226 flow->geneve_tlv_option = 0;
14228 while (flow->dev_handles) {
14229 uint32_t tmp_idx = flow->dev_handles;
14231 dev_handle = mlx5_ipool_get(priv->sh->ipool
14232 [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14235 flow->dev_handles = dev_handle->next.next;
14236 if (dev_handle->dvh.matcher)
14237 flow_dv_matcher_release(dev, dev_handle);
14238 if (dev_handle->dvh.rix_sample)
14239 flow_dv_sample_resource_release(dev, dev_handle);
14240 if (dev_handle->dvh.rix_dest_array)
14241 flow_dv_dest_array_resource_release(dev, dev_handle);
14242 if (dev_handle->dvh.rix_encap_decap)
14243 flow_dv_encap_decap_resource_release(dev,
14244 dev_handle->dvh.rix_encap_decap);
14245 if (dev_handle->dvh.modify_hdr)
14246 flow_dv_modify_hdr_resource_release(dev, dev_handle);
14247 if (dev_handle->dvh.rix_push_vlan)
14248 flow_dv_push_vlan_action_resource_release(dev,
14250 if (dev_handle->dvh.rix_tag)
14251 flow_dv_tag_release(dev,
14252 dev_handle->dvh.rix_tag);
14253 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14254 flow_dv_fate_resource_release(dev, dev_handle);
14256 srss = dev_handle->rix_srss;
14257 if (fm && dev_handle->is_meter_flow_id &&
14258 dev_handle->split_flow_id)
14259 mlx5_ipool_free(fm->flow_ipool,
14260 dev_handle->split_flow_id);
14261 else if (dev_handle->split_flow_id &&
14262 !dev_handle->is_meter_flow_id)
14263 mlx5_ipool_free(priv->sh->ipool
14264 [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14265 dev_handle->split_flow_id);
14266 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14270 flow_dv_shared_rss_action_release(dev, srss);
14274 * Release array of hash RX queue objects.
14278 * Pointer to the Ethernet device structure.
14279 * @param[in, out] hrxqs
14280 * Array of hash RX queue objects.
14283 * Total number of references to hash RX queue objects in *hrxqs* array
14284 * after this operation.
14287 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14288 uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14293 for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14294 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14304 * Release all hash RX queue objects representing shared RSS action.
14307 * Pointer to the Ethernet device structure.
14308 * @param[in, out] action
14309 * Shared RSS action to remove hash RX queue objects from.
14312 * Total number of references to hash RX queue objects stored in *action*
14313 * after this operation.
14314 * Expected to be 0 if no external references held.
14317 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14318 struct mlx5_shared_action_rss *shared_rss)
14320 return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14324 * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14327 * Only one hash value is available for one L3+L4 combination:
14329 * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14330 * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14331 * same slot in mlx5_rss_hash_fields.
14334 * Pointer to the shared action RSS conf.
14335 * @param[in, out] hash_field
14336 * hash_field variable needed to be adjusted.
14342 __flow_dv_action_rss_l34_hash_adjust(struct mlx5_shared_action_rss *rss,
14343 uint64_t *hash_field)
14345 uint64_t rss_types = rss->origin.types;
14347 switch (*hash_field & ~IBV_RX_HASH_INNER) {
14348 case MLX5_RSS_HASH_IPV4:
14349 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14350 *hash_field &= ~MLX5_RSS_HASH_IPV4;
14351 if (rss_types & ETH_RSS_L3_DST_ONLY)
14352 *hash_field |= IBV_RX_HASH_DST_IPV4;
14353 else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14354 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14356 *hash_field |= MLX5_RSS_HASH_IPV4;
14359 case MLX5_RSS_HASH_IPV6:
14360 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14361 *hash_field &= ~MLX5_RSS_HASH_IPV6;
14362 if (rss_types & ETH_RSS_L3_DST_ONLY)
14363 *hash_field |= IBV_RX_HASH_DST_IPV6;
14364 else if (rss_types & ETH_RSS_L3_SRC_ONLY)
14365 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14367 *hash_field |= MLX5_RSS_HASH_IPV6;
14370 case MLX5_RSS_HASH_IPV4_UDP:
14371 /* fall-through. */
14372 case MLX5_RSS_HASH_IPV6_UDP:
14373 if (rss_types & ETH_RSS_UDP) {
14374 *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14375 if (rss_types & ETH_RSS_L4_DST_ONLY)
14376 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14377 else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14378 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14380 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14383 case MLX5_RSS_HASH_IPV4_TCP:
14384 /* fall-through. */
14385 case MLX5_RSS_HASH_IPV6_TCP:
14386 if (rss_types & ETH_RSS_TCP) {
14387 *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14388 if (rss_types & ETH_RSS_L4_DST_ONLY)
14389 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14390 else if (rss_types & ETH_RSS_L4_SRC_ONLY)
14391 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14393 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14402 * Setup shared RSS action.
14403 * Prepare set of hash RX queue objects sufficient to handle all valid
14404 * hash_fields combinations (see enum ibv_rx_hash_fields).
14407 * Pointer to the Ethernet device structure.
14408 * @param[in] action_idx
14409 * Shared RSS action ipool index.
14410 * @param[in, out] action
14411 * Partially initialized shared RSS action.
14412 * @param[out] error
14413 * Perform verbose error reporting if not NULL. Initialized in case of
14417 * 0 on success, otherwise negative errno value.
14420 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14421 uint32_t action_idx,
14422 struct mlx5_shared_action_rss *shared_rss,
14423 struct rte_flow_error *error)
14425 struct mlx5_flow_rss_desc rss_desc = { 0 };
14429 if (mlx5_ind_table_obj_setup(dev, shared_rss->ind_tbl)) {
14430 return rte_flow_error_set(error, rte_errno,
14431 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14432 "cannot setup indirection table");
14434 memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14435 rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14436 rss_desc.const_q = shared_rss->origin.queue;
14437 rss_desc.queue_num = shared_rss->origin.queue_num;
14438 /* Set non-zero value to indicate a shared RSS. */
14439 rss_desc.shared_rss = action_idx;
14440 rss_desc.ind_tbl = shared_rss->ind_tbl;
14441 for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14443 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14446 __flow_dv_action_rss_l34_hash_adjust(shared_rss, &hash_fields);
14447 if (shared_rss->origin.level > 1) {
14448 hash_fields |= IBV_RX_HASH_INNER;
14451 rss_desc.tunnel = tunnel;
14452 rss_desc.hash_fields = hash_fields;
14453 hrxq_idx = mlx5_hrxq_get(dev, &rss_desc);
14457 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14458 "cannot get hash queue");
14459 goto error_hrxq_new;
14461 err = __flow_dv_action_rss_hrxq_set
14462 (shared_rss, hash_fields, hrxq_idx);
14468 __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14469 if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14470 shared_rss->ind_tbl = NULL;
14476 * Create shared RSS action.
14479 * Pointer to the Ethernet device structure.
14481 * Shared action configuration.
14483 * RSS action specification used to create shared action.
14484 * @param[out] error
14485 * Perform verbose error reporting if not NULL. Initialized in case of
14489 * A valid shared action ID in case of success, 0 otherwise and
14490 * rte_errno is set.
14493 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14494 const struct rte_flow_indir_action_conf *conf,
14495 const struct rte_flow_action_rss *rss,
14496 struct rte_flow_error *error)
14498 struct mlx5_priv *priv = dev->data->dev_private;
14499 struct mlx5_shared_action_rss *shared_rss = NULL;
14500 void *queue = NULL;
14501 struct rte_flow_action_rss *origin;
14502 const uint8_t *rss_key;
14503 uint32_t queue_size = rss->queue_num * sizeof(uint16_t);
14506 RTE_SET_USED(conf);
14507 queue = mlx5_malloc(0, RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14509 shared_rss = mlx5_ipool_zmalloc
14510 (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14511 if (!shared_rss || !queue) {
14512 rte_flow_error_set(error, ENOMEM,
14513 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14514 "cannot allocate resource memory");
14515 goto error_rss_init;
14517 if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14518 rte_flow_error_set(error, E2BIG,
14519 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14520 "rss action number out of range");
14521 goto error_rss_init;
14523 shared_rss->ind_tbl = mlx5_malloc(MLX5_MEM_ZERO,
14524 sizeof(*shared_rss->ind_tbl),
14526 if (!shared_rss->ind_tbl) {
14527 rte_flow_error_set(error, ENOMEM,
14528 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14529 "cannot allocate resource memory");
14530 goto error_rss_init;
14532 memcpy(queue, rss->queue, queue_size);
14533 shared_rss->ind_tbl->queues = queue;
14534 shared_rss->ind_tbl->queues_n = rss->queue_num;
14535 origin = &shared_rss->origin;
14536 origin->func = rss->func;
14537 origin->level = rss->level;
14538 /* RSS type 0 indicates default RSS type (ETH_RSS_IP). */
14539 origin->types = !rss->types ? ETH_RSS_IP : rss->types;
14540 /* NULL RSS key indicates default RSS key. */
14541 rss_key = !rss->key ? rss_hash_default_key : rss->key;
14542 memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14543 origin->key = &shared_rss->key[0];
14544 origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14545 origin->queue = queue;
14546 origin->queue_num = rss->queue_num;
14547 if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14548 goto error_rss_init;
14549 rte_spinlock_init(&shared_rss->action_rss_sl);
14550 __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14551 rte_spinlock_lock(&priv->shared_act_sl);
14552 ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14553 &priv->rss_shared_actions, idx, shared_rss, next);
14554 rte_spinlock_unlock(&priv->shared_act_sl);
14558 if (shared_rss->ind_tbl)
14559 mlx5_free(shared_rss->ind_tbl);
14560 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14569 * Destroy the shared RSS action.
14570 * Release related hash RX queue objects.
14573 * Pointer to the Ethernet device structure.
14575 * The shared RSS action object ID to be removed.
14576 * @param[out] error
14577 * Perform verbose error reporting if not NULL. Initialized in case of
14581 * 0 on success, otherwise negative errno value.
14584 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14585 struct rte_flow_error *error)
14587 struct mlx5_priv *priv = dev->data->dev_private;
14588 struct mlx5_shared_action_rss *shared_rss =
14589 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14590 uint32_t old_refcnt = 1;
14592 uint16_t *queue = NULL;
14595 return rte_flow_error_set(error, EINVAL,
14596 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14597 "invalid shared action");
14598 remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14600 return rte_flow_error_set(error, EBUSY,
14601 RTE_FLOW_ERROR_TYPE_ACTION,
14603 "shared rss hrxq has references");
14604 if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
14605 0, 0, __ATOMIC_ACQUIRE,
14607 return rte_flow_error_set(error, EBUSY,
14608 RTE_FLOW_ERROR_TYPE_ACTION,
14610 "shared rss has references");
14611 queue = shared_rss->ind_tbl->queues;
14612 remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true);
14614 return rte_flow_error_set(error, EBUSY,
14615 RTE_FLOW_ERROR_TYPE_ACTION,
14617 "shared rss indirection table has"
14620 rte_spinlock_lock(&priv->shared_act_sl);
14621 ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14622 &priv->rss_shared_actions, idx, shared_rss, next);
14623 rte_spinlock_unlock(&priv->shared_act_sl);
14624 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14630 * Create indirect action, lock free,
14631 * (mutex should be acquired by caller).
14632 * Dispatcher for action type specific call.
14635 * Pointer to the Ethernet device structure.
14637 * Shared action configuration.
14638 * @param[in] action
14639 * Action specification used to create indirect action.
14640 * @param[out] error
14641 * Perform verbose error reporting if not NULL. Initialized in case of
14645 * A valid shared action handle in case of success, NULL otherwise and
14646 * rte_errno is set.
14648 static struct rte_flow_action_handle *
14649 flow_dv_action_create(struct rte_eth_dev *dev,
14650 const struct rte_flow_indir_action_conf *conf,
14651 const struct rte_flow_action *action,
14652 struct rte_flow_error *err)
14654 struct mlx5_priv *priv = dev->data->dev_private;
14655 uint32_t age_idx = 0;
14659 switch (action->type) {
14660 case RTE_FLOW_ACTION_TYPE_RSS:
14661 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
14662 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
14663 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14665 case RTE_FLOW_ACTION_TYPE_AGE:
14666 age_idx = flow_dv_aso_age_alloc(dev, err);
14671 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
14672 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
14673 flow_dv_aso_age_params_init(dev, age_idx,
14674 ((const struct rte_flow_action_age *)
14675 action->conf)->context ?
14676 ((const struct rte_flow_action_age *)
14677 action->conf)->context :
14678 (void *)(uintptr_t)idx,
14679 ((const struct rte_flow_action_age *)
14680 action->conf)->timeout);
14683 case RTE_FLOW_ACTION_TYPE_COUNT:
14684 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
14685 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
14686 MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
14688 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
14689 ret = flow_dv_translate_create_conntrack(dev, action->conf,
14691 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
14694 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
14695 NULL, "action type not supported");
14698 return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
14702 * Destroy the indirect action.
14703 * Release action related resources on the NIC and the memory.
14704 * Lock free, (mutex should be acquired by caller).
14705 * Dispatcher for action type specific call.
14708 * Pointer to the Ethernet device structure.
14709 * @param[in] handle
14710 * The indirect action object handle to be removed.
14711 * @param[out] error
14712 * Perform verbose error reporting if not NULL. Initialized in case of
14716 * 0 on success, otherwise negative errno value.
14719 flow_dv_action_destroy(struct rte_eth_dev *dev,
14720 struct rte_flow_action_handle *handle,
14721 struct rte_flow_error *error)
14723 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14724 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14725 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14726 struct mlx5_flow_counter *cnt;
14727 uint32_t no_flow_refcnt = 1;
14731 case MLX5_INDIRECT_ACTION_TYPE_RSS:
14732 return __flow_dv_action_rss_release(dev, idx, error);
14733 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
14734 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
14735 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
14736 &no_flow_refcnt, 1, false,
14739 return rte_flow_error_set(error, EBUSY,
14740 RTE_FLOW_ERROR_TYPE_ACTION,
14742 "Indirect count action has references");
14743 flow_dv_counter_free(dev, idx);
14745 case MLX5_INDIRECT_ACTION_TYPE_AGE:
14746 ret = flow_dv_aso_age_release(dev, idx);
14749 * In this case, the last flow has a reference will
14750 * actually release the age action.
14752 DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
14753 " released with references %d.", idx, ret);
14755 case MLX5_INDIRECT_ACTION_TYPE_CT:
14756 ret = flow_dv_aso_ct_release(dev, idx);
14760 DRV_LOG(DEBUG, "Connection tracking object %u still "
14761 "has references %d.", idx, ret);
14764 return rte_flow_error_set(error, ENOTSUP,
14765 RTE_FLOW_ERROR_TYPE_ACTION,
14767 "action type not supported");
14772 * Updates in place shared RSS action configuration.
14775 * Pointer to the Ethernet device structure.
14777 * The shared RSS action object ID to be updated.
14778 * @param[in] action_conf
14779 * RSS action specification used to modify *shared_rss*.
14780 * @param[out] error
14781 * Perform verbose error reporting if not NULL. Initialized in case of
14785 * 0 on success, otherwise negative errno value.
14786 * @note: currently only support update of RSS queues.
14789 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
14790 const struct rte_flow_action_rss *action_conf,
14791 struct rte_flow_error *error)
14793 struct mlx5_priv *priv = dev->data->dev_private;
14794 struct mlx5_shared_action_rss *shared_rss =
14795 mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
14797 void *queue = NULL;
14798 uint16_t *queue_old = NULL;
14799 uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
14802 return rte_flow_error_set(error, EINVAL,
14803 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14804 "invalid shared action to update");
14805 if (priv->obj_ops.ind_table_modify == NULL)
14806 return rte_flow_error_set(error, ENOTSUP,
14807 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14808 "cannot modify indirection table");
14809 queue = mlx5_malloc(MLX5_MEM_ZERO,
14810 RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
14813 return rte_flow_error_set(error, ENOMEM,
14814 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14816 "cannot allocate resource memory");
14817 memcpy(queue, action_conf->queue, queue_size);
14818 MLX5_ASSERT(shared_rss->ind_tbl);
14819 rte_spinlock_lock(&shared_rss->action_rss_sl);
14820 queue_old = shared_rss->ind_tbl->queues;
14821 ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
14822 queue, action_conf->queue_num, true);
14825 ret = rte_flow_error_set(error, rte_errno,
14826 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
14827 "cannot update indirection table");
14829 mlx5_free(queue_old);
14830 shared_rss->origin.queue = queue;
14831 shared_rss->origin.queue_num = action_conf->queue_num;
14833 rte_spinlock_unlock(&shared_rss->action_rss_sl);
14838 * Updates in place conntrack context or direction.
14839 * Context update should be synchronized.
14842 * Pointer to the Ethernet device structure.
14844 * The conntrack object ID to be updated.
14845 * @param[in] update
14846 * Pointer to the structure of information to update.
14847 * @param[out] error
14848 * Perform verbose error reporting if not NULL. Initialized in case of
14852 * 0 on success, otherwise negative errno value.
14855 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
14856 const struct rte_flow_modify_conntrack *update,
14857 struct rte_flow_error *error)
14859 struct mlx5_priv *priv = dev->data->dev_private;
14860 struct mlx5_aso_ct_action *ct;
14861 const struct rte_flow_action_conntrack *new_prf;
14863 uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
14866 if (PORT_ID(priv) != owner)
14867 return rte_flow_error_set(error, EACCES,
14868 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14870 "CT object owned by another port");
14871 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
14872 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
14874 return rte_flow_error_set(error, ENOMEM,
14875 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14877 "CT object is inactive");
14878 new_prf = &update->new_ct;
14879 if (update->direction)
14880 ct->is_original = !!new_prf->is_original_dir;
14881 if (update->state) {
14882 /* Only validate the profile when it needs to be updated. */
14883 ret = mlx5_validate_action_ct(dev, new_prf, error);
14886 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
14888 return rte_flow_error_set(error, EIO,
14889 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14891 "Failed to send CT context update WQE");
14892 /* Block until ready or a failure. */
14893 ret = mlx5_aso_ct_available(priv->sh, ct);
14895 rte_flow_error_set(error, rte_errno,
14896 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14898 "Timeout to get the CT update");
14904 * Updates in place shared action configuration, lock free,
14905 * (mutex should be acquired by caller).
14908 * Pointer to the Ethernet device structure.
14909 * @param[in] handle
14910 * The indirect action object handle to be updated.
14911 * @param[in] update
14912 * Action specification used to modify the action pointed by *handle*.
14913 * *update* could be of same type with the action pointed by the *handle*
14914 * handle argument, or some other structures like a wrapper, depending on
14915 * the indirect action type.
14916 * @param[out] error
14917 * Perform verbose error reporting if not NULL. Initialized in case of
14921 * 0 on success, otherwise negative errno value.
14924 flow_dv_action_update(struct rte_eth_dev *dev,
14925 struct rte_flow_action_handle *handle,
14926 const void *update,
14927 struct rte_flow_error *err)
14929 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
14930 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
14931 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
14932 const void *action_conf;
14935 case MLX5_INDIRECT_ACTION_TYPE_RSS:
14936 action_conf = ((const struct rte_flow_action *)update)->conf;
14937 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
14938 case MLX5_INDIRECT_ACTION_TYPE_CT:
14939 return __flow_dv_action_ct_update(dev, idx, update, err);
14941 return rte_flow_error_set(err, ENOTSUP,
14942 RTE_FLOW_ERROR_TYPE_ACTION,
14944 "action type update not supported");
14949 * Destroy the meter sub policy table rules.
14950 * Lock free, (mutex should be acquired by caller).
14953 * Pointer to Ethernet device.
14954 * @param[in] sub_policy
14955 * Pointer to meter sub policy table.
14958 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
14959 struct mlx5_flow_meter_sub_policy *sub_policy)
14961 struct mlx5_priv *priv = dev->data->dev_private;
14962 struct mlx5_flow_tbl_data_entry *tbl;
14963 struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
14964 struct mlx5_flow_meter_info *next_fm;
14965 struct mlx5_sub_policy_color_rule *color_rule;
14969 for (i = 0; i < RTE_COLORS; i++) {
14971 if (i == RTE_COLOR_GREEN && policy &&
14972 policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
14973 next_fm = mlx5_flow_meter_find(priv,
14974 policy->act_cnt[i].next_mtr_id, NULL);
14975 TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
14977 claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
14978 tbl = container_of(color_rule->matcher->tbl,
14979 typeof(*tbl), tbl);
14980 mlx5_list_unregister(tbl->matchers,
14981 &color_rule->matcher->entry);
14982 TAILQ_REMOVE(&sub_policy->color_rules[i],
14983 color_rule, next_port);
14984 mlx5_free(color_rule);
14986 mlx5_flow_meter_detach(priv, next_fm);
14989 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
14990 if (sub_policy->rix_hrxq[i]) {
14991 if (policy && !policy->is_hierarchy)
14992 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
14993 sub_policy->rix_hrxq[i] = 0;
14995 if (sub_policy->jump_tbl[i]) {
14996 flow_dv_tbl_resource_release(MLX5_SH(dev),
14997 sub_policy->jump_tbl[i]);
14998 sub_policy->jump_tbl[i] = NULL;
15001 if (sub_policy->tbl_rsc) {
15002 flow_dv_tbl_resource_release(MLX5_SH(dev),
15003 sub_policy->tbl_rsc);
15004 sub_policy->tbl_rsc = NULL;
15009 * Destroy policy rules, lock free,
15010 * (mutex should be acquired by caller).
15011 * Dispatcher for action type specific call.
15014 * Pointer to the Ethernet device structure.
15015 * @param[in] mtr_policy
15016 * Meter policy struct.
15019 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15020 struct mlx5_flow_meter_policy *mtr_policy)
15023 struct mlx5_flow_meter_sub_policy *sub_policy;
15024 uint16_t sub_policy_num;
15026 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15027 sub_policy_num = (mtr_policy->sub_policy_num >>
15028 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15029 MLX5_MTR_SUB_POLICY_NUM_MASK;
15030 for (j = 0; j < sub_policy_num; j++) {
15031 sub_policy = mtr_policy->sub_policys[i][j];
15033 __flow_dv_destroy_sub_policy_rules
15040 * Destroy policy action, lock free,
15041 * (mutex should be acquired by caller).
15042 * Dispatcher for action type specific call.
15045 * Pointer to the Ethernet device structure.
15046 * @param[in] mtr_policy
15047 * Meter policy struct.
15050 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15051 struct mlx5_flow_meter_policy *mtr_policy)
15053 struct rte_flow_action *rss_action;
15054 struct mlx5_flow_handle dev_handle;
15057 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15058 if (mtr_policy->act_cnt[i].rix_mark) {
15059 flow_dv_tag_release(dev,
15060 mtr_policy->act_cnt[i].rix_mark);
15061 mtr_policy->act_cnt[i].rix_mark = 0;
15063 if (mtr_policy->act_cnt[i].modify_hdr) {
15064 dev_handle.dvh.modify_hdr =
15065 mtr_policy->act_cnt[i].modify_hdr;
15066 flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15068 switch (mtr_policy->act_cnt[i].fate_action) {
15069 case MLX5_FLOW_FATE_SHARED_RSS:
15070 rss_action = mtr_policy->act_cnt[i].rss;
15071 mlx5_free(rss_action);
15073 case MLX5_FLOW_FATE_PORT_ID:
15074 if (mtr_policy->act_cnt[i].rix_port_id_action) {
15075 flow_dv_port_id_action_resource_release(dev,
15076 mtr_policy->act_cnt[i].rix_port_id_action);
15077 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15080 case MLX5_FLOW_FATE_DROP:
15081 case MLX5_FLOW_FATE_JUMP:
15082 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15083 mtr_policy->act_cnt[i].dr_jump_action[j] =
15087 /*Queue action do nothing*/
15091 for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15092 mtr_policy->dr_drop_action[j] = NULL;
15096 * Create policy action per domain, lock free,
15097 * (mutex should be acquired by caller).
15098 * Dispatcher for action type specific call.
15101 * Pointer to the Ethernet device structure.
15102 * @param[in] mtr_policy
15103 * Meter policy struct.
15104 * @param[in] action
15105 * Action specification used to create meter actions.
15106 * @param[out] error
15107 * Perform verbose error reporting if not NULL. Initialized in case of
15111 * 0 on success, otherwise negative errno value.
15114 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15115 struct mlx5_flow_meter_policy *mtr_policy,
15116 const struct rte_flow_action *actions[RTE_COLORS],
15117 enum mlx5_meter_domain domain,
15118 struct rte_mtr_error *error)
15120 struct mlx5_priv *priv = dev->data->dev_private;
15121 struct rte_flow_error flow_err;
15122 const struct rte_flow_action *act;
15123 uint64_t action_flags = 0;
15124 struct mlx5_flow_handle dh;
15125 struct mlx5_flow dev_flow;
15126 struct mlx5_flow_dv_port_id_action_resource port_id_action;
15128 uint8_t egress, transfer;
15129 struct mlx5_meter_policy_action_container *act_cnt = NULL;
15131 struct mlx5_flow_dv_modify_hdr_resource res;
15132 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15133 sizeof(struct mlx5_modification_cmd) *
15134 (MLX5_MAX_MODIFY_NUM + 1)];
15136 struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15138 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15139 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15140 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15141 memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15142 memset(&port_id_action, 0,
15143 sizeof(struct mlx5_flow_dv_port_id_action_resource));
15144 memset(mhdr_res, 0, sizeof(*mhdr_res));
15145 mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15147 MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15148 MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
15149 dev_flow.handle = &dh;
15150 dev_flow.dv.port_id_action = &port_id_action;
15151 dev_flow.external = true;
15152 for (i = 0; i < RTE_COLORS; i++) {
15153 if (i < MLX5_MTR_RTE_COLORS)
15154 act_cnt = &mtr_policy->act_cnt[i];
15155 for (act = actions[i];
15156 act && act->type != RTE_FLOW_ACTION_TYPE_END;
15158 switch (act->type) {
15159 case RTE_FLOW_ACTION_TYPE_MARK:
15161 uint32_t tag_be = mlx5_flow_mark_set
15162 (((const struct rte_flow_action_mark *)
15165 if (i >= MLX5_MTR_RTE_COLORS)
15166 return -rte_mtr_error_set(error,
15168 RTE_MTR_ERROR_TYPE_METER_POLICY,
15170 "cannot create policy "
15171 "mark action for this color");
15172 dev_flow.handle->mark = 1;
15173 if (flow_dv_tag_resource_register(dev, tag_be,
15174 &dev_flow, &flow_err))
15175 return -rte_mtr_error_set(error,
15177 RTE_MTR_ERROR_TYPE_METER_POLICY,
15179 "cannot setup policy mark action");
15180 MLX5_ASSERT(dev_flow.dv.tag_resource);
15181 act_cnt->rix_mark =
15182 dev_flow.handle->dvh.rix_tag;
15183 action_flags |= MLX5_FLOW_ACTION_MARK;
15186 case RTE_FLOW_ACTION_TYPE_SET_TAG:
15187 if (i >= MLX5_MTR_RTE_COLORS)
15188 return -rte_mtr_error_set(error,
15190 RTE_MTR_ERROR_TYPE_METER_POLICY,
15192 "cannot create policy "
15193 "set tag action for this color");
15194 if (flow_dv_convert_action_set_tag
15196 (const struct rte_flow_action_set_tag *)
15197 act->conf, &flow_err))
15198 return -rte_mtr_error_set(error,
15200 RTE_MTR_ERROR_TYPE_METER_POLICY,
15201 NULL, "cannot convert policy "
15203 if (!mhdr_res->actions_num)
15204 return -rte_mtr_error_set(error,
15206 RTE_MTR_ERROR_TYPE_METER_POLICY,
15207 NULL, "cannot find policy "
15209 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15211 case RTE_FLOW_ACTION_TYPE_DROP:
15213 struct mlx5_flow_mtr_mng *mtrmng =
15215 struct mlx5_flow_tbl_data_entry *tbl_data;
15218 * Create the drop table with
15219 * METER DROP level.
15221 if (!mtrmng->drop_tbl[domain]) {
15222 mtrmng->drop_tbl[domain] =
15223 flow_dv_tbl_resource_get(dev,
15224 MLX5_FLOW_TABLE_LEVEL_METER,
15225 egress, transfer, false, NULL, 0,
15226 0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15227 if (!mtrmng->drop_tbl[domain])
15228 return -rte_mtr_error_set
15230 RTE_MTR_ERROR_TYPE_METER_POLICY,
15232 "Failed to create meter drop table");
15234 tbl_data = container_of
15235 (mtrmng->drop_tbl[domain],
15236 struct mlx5_flow_tbl_data_entry, tbl);
15237 if (i < MLX5_MTR_RTE_COLORS) {
15238 act_cnt->dr_jump_action[domain] =
15239 tbl_data->jump.action;
15240 act_cnt->fate_action =
15241 MLX5_FLOW_FATE_DROP;
15243 if (i == RTE_COLOR_RED)
15244 mtr_policy->dr_drop_action[domain] =
15245 tbl_data->jump.action;
15246 action_flags |= MLX5_FLOW_ACTION_DROP;
15249 case RTE_FLOW_ACTION_TYPE_QUEUE:
15251 if (i >= MLX5_MTR_RTE_COLORS)
15252 return -rte_mtr_error_set(error,
15254 RTE_MTR_ERROR_TYPE_METER_POLICY,
15255 NULL, "cannot create policy "
15256 "fate queue for this color");
15258 ((const struct rte_flow_action_queue *)
15259 (act->conf))->index;
15260 act_cnt->fate_action =
15261 MLX5_FLOW_FATE_QUEUE;
15262 dev_flow.handle->fate_action =
15263 MLX5_FLOW_FATE_QUEUE;
15264 mtr_policy->is_queue = 1;
15265 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15268 case RTE_FLOW_ACTION_TYPE_RSS:
15272 if (i >= MLX5_MTR_RTE_COLORS)
15273 return -rte_mtr_error_set(error,
15275 RTE_MTR_ERROR_TYPE_METER_POLICY,
15277 "cannot create policy "
15278 "rss action for this color");
15280 * Save RSS conf into policy struct
15281 * for translate stage.
15283 rss_size = (int)rte_flow_conv
15284 (RTE_FLOW_CONV_OP_ACTION,
15285 NULL, 0, act, &flow_err);
15287 return -rte_mtr_error_set(error,
15289 RTE_MTR_ERROR_TYPE_METER_POLICY,
15290 NULL, "Get the wrong "
15291 "rss action struct size");
15292 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15293 rss_size, 0, SOCKET_ID_ANY);
15295 return -rte_mtr_error_set(error,
15297 RTE_MTR_ERROR_TYPE_METER_POLICY,
15299 "Fail to malloc rss action memory");
15300 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15301 act_cnt->rss, rss_size,
15304 return -rte_mtr_error_set(error,
15306 RTE_MTR_ERROR_TYPE_METER_POLICY,
15307 NULL, "Fail to save "
15308 "rss action into policy struct");
15309 act_cnt->fate_action =
15310 MLX5_FLOW_FATE_SHARED_RSS;
15311 action_flags |= MLX5_FLOW_ACTION_RSS;
15314 case RTE_FLOW_ACTION_TYPE_PORT_ID:
15316 struct mlx5_flow_dv_port_id_action_resource
15318 uint32_t port_id = 0;
15320 if (i >= MLX5_MTR_RTE_COLORS)
15321 return -rte_mtr_error_set(error,
15323 RTE_MTR_ERROR_TYPE_METER_POLICY,
15324 NULL, "cannot create policy "
15325 "port action for this color");
15326 memset(&port_id_resource, 0,
15327 sizeof(port_id_resource));
15328 if (flow_dv_translate_action_port_id(dev, act,
15329 &port_id, &flow_err))
15330 return -rte_mtr_error_set(error,
15332 RTE_MTR_ERROR_TYPE_METER_POLICY,
15333 NULL, "cannot translate "
15334 "policy port action");
15335 port_id_resource.port_id = port_id;
15336 if (flow_dv_port_id_action_resource_register
15337 (dev, &port_id_resource,
15338 &dev_flow, &flow_err))
15339 return -rte_mtr_error_set(error,
15341 RTE_MTR_ERROR_TYPE_METER_POLICY,
15342 NULL, "cannot setup "
15343 "policy port action");
15344 act_cnt->rix_port_id_action =
15345 dev_flow.handle->rix_port_id_action;
15346 act_cnt->fate_action =
15347 MLX5_FLOW_FATE_PORT_ID;
15348 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15351 case RTE_FLOW_ACTION_TYPE_JUMP:
15353 uint32_t jump_group = 0;
15354 uint32_t table = 0;
15355 struct mlx5_flow_tbl_data_entry *tbl_data;
15356 struct flow_grp_info grp_info = {
15357 .external = !!dev_flow.external,
15358 .transfer = !!transfer,
15359 .fdb_def_rule = !!priv->fdb_def_rule,
15361 .skip_scale = dev_flow.skip_scale &
15362 (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15364 struct mlx5_flow_meter_sub_policy *sub_policy =
15365 mtr_policy->sub_policys[domain][0];
15367 if (i >= MLX5_MTR_RTE_COLORS)
15368 return -rte_mtr_error_set(error,
15370 RTE_MTR_ERROR_TYPE_METER_POLICY,
15372 "cannot create policy "
15373 "jump action for this color");
15375 ((const struct rte_flow_action_jump *)
15377 if (mlx5_flow_group_to_table(dev, NULL,
15380 &grp_info, &flow_err))
15381 return -rte_mtr_error_set(error,
15383 RTE_MTR_ERROR_TYPE_METER_POLICY,
15384 NULL, "cannot setup "
15385 "policy jump action");
15386 sub_policy->jump_tbl[i] =
15387 flow_dv_tbl_resource_get(dev,
15390 !!dev_flow.external,
15391 NULL, jump_group, 0,
15394 (!sub_policy->jump_tbl[i])
15395 return -rte_mtr_error_set(error,
15397 RTE_MTR_ERROR_TYPE_METER_POLICY,
15398 NULL, "cannot create jump action.");
15399 tbl_data = container_of
15400 (sub_policy->jump_tbl[i],
15401 struct mlx5_flow_tbl_data_entry, tbl);
15402 act_cnt->dr_jump_action[domain] =
15403 tbl_data->jump.action;
15404 act_cnt->fate_action =
15405 MLX5_FLOW_FATE_JUMP;
15406 action_flags |= MLX5_FLOW_ACTION_JUMP;
15409 case RTE_FLOW_ACTION_TYPE_METER:
15411 const struct rte_flow_action_meter *mtr;
15412 struct mlx5_flow_meter_info *next_fm;
15413 struct mlx5_flow_meter_policy *next_policy;
15414 struct rte_flow_action tag_action;
15415 struct mlx5_rte_flow_action_set_tag set_tag;
15416 uint32_t next_mtr_idx = 0;
15419 next_fm = mlx5_flow_meter_find(priv,
15423 return -rte_mtr_error_set(error, EINVAL,
15424 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15425 "Fail to find next meter.");
15426 if (next_fm->def_policy)
15427 return -rte_mtr_error_set(error, EINVAL,
15428 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15429 "Hierarchy only supports termination meter.");
15430 next_policy = mlx5_flow_meter_policy_find(dev,
15431 next_fm->policy_id, NULL);
15432 MLX5_ASSERT(next_policy);
15433 if (next_fm->drop_cnt) {
15436 mlx5_flow_get_reg_id(dev,
15439 (struct rte_flow_error *)error);
15440 set_tag.offset = (priv->mtr_reg_share ?
15441 MLX5_MTR_COLOR_BITS : 0);
15442 set_tag.length = (priv->mtr_reg_share ?
15443 MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15445 set_tag.data = next_mtr_idx;
15447 (enum rte_flow_action_type)
15448 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15449 tag_action.conf = &set_tag;
15450 if (flow_dv_convert_action_set_reg
15451 (mhdr_res, &tag_action,
15452 (struct rte_flow_error *)error))
15455 MLX5_FLOW_ACTION_SET_TAG;
15457 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15458 act_cnt->next_mtr_id = next_fm->meter_id;
15459 act_cnt->next_sub_policy = NULL;
15460 mtr_policy->is_hierarchy = 1;
15461 mtr_policy->dev = next_policy->dev;
15463 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15467 return -rte_mtr_error_set(error, ENOTSUP,
15468 RTE_MTR_ERROR_TYPE_METER_POLICY,
15469 NULL, "action type not supported");
15471 if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15472 /* create modify action if needed. */
15473 dev_flow.dv.group = 1;
15474 if (flow_dv_modify_hdr_resource_register
15475 (dev, mhdr_res, &dev_flow, &flow_err))
15476 return -rte_mtr_error_set(error,
15478 RTE_MTR_ERROR_TYPE_METER_POLICY,
15479 NULL, "cannot register policy "
15481 act_cnt->modify_hdr =
15482 dev_flow.handle->dvh.modify_hdr;
15490 * Create policy action per domain, lock free,
15491 * (mutex should be acquired by caller).
15492 * Dispatcher for action type specific call.
15495 * Pointer to the Ethernet device structure.
15496 * @param[in] mtr_policy
15497 * Meter policy struct.
15498 * @param[in] action
15499 * Action specification used to create meter actions.
15500 * @param[out] error
15501 * Perform verbose error reporting if not NULL. Initialized in case of
15505 * 0 on success, otherwise negative errno value.
15508 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15509 struct mlx5_flow_meter_policy *mtr_policy,
15510 const struct rte_flow_action *actions[RTE_COLORS],
15511 struct rte_mtr_error *error)
15514 uint16_t sub_policy_num;
15516 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15517 sub_policy_num = (mtr_policy->sub_policy_num >>
15518 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15519 MLX5_MTR_SUB_POLICY_NUM_MASK;
15520 if (sub_policy_num) {
15521 ret = __flow_dv_create_domain_policy_acts(dev,
15522 mtr_policy, actions,
15523 (enum mlx5_meter_domain)i, error);
15532 * Query a DV flow rule for its statistics via DevX.
15535 * Pointer to Ethernet device.
15536 * @param[in] cnt_idx
15537 * Index to the flow counter.
15539 * Data retrieved by the query.
15540 * @param[out] error
15541 * Perform verbose error reporting if not NULL.
15544 * 0 on success, a negative errno value otherwise and rte_errno is set.
15547 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15548 struct rte_flow_error *error)
15550 struct mlx5_priv *priv = dev->data->dev_private;
15551 struct rte_flow_query_count *qc = data;
15553 if (!priv->config.devx)
15554 return rte_flow_error_set(error, ENOTSUP,
15555 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15557 "counters are not supported");
15559 uint64_t pkts, bytes;
15560 struct mlx5_flow_counter *cnt;
15561 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15564 return rte_flow_error_set(error, -err,
15565 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15566 NULL, "cannot read counters");
15567 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15570 qc->hits = pkts - cnt->hits;
15571 qc->bytes = bytes - cnt->bytes;
15574 cnt->bytes = bytes;
15578 return rte_flow_error_set(error, EINVAL,
15579 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15581 "counters are not available");
15585 flow_dv_action_query(struct rte_eth_dev *dev,
15586 const struct rte_flow_action_handle *handle, void *data,
15587 struct rte_flow_error *error)
15589 struct mlx5_age_param *age_param;
15590 struct rte_flow_query_age *resp;
15591 uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15592 uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15593 uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15594 struct mlx5_priv *priv = dev->data->dev_private;
15595 struct mlx5_aso_ct_action *ct;
15600 case MLX5_INDIRECT_ACTION_TYPE_AGE:
15601 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
15603 resp->aged = __atomic_load_n(&age_param->state,
15604 __ATOMIC_RELAXED) == AGE_TMOUT ?
15606 resp->sec_since_last_hit_valid = !resp->aged;
15607 if (resp->sec_since_last_hit_valid)
15608 resp->sec_since_last_hit = __atomic_load_n
15609 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15611 case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15612 return flow_dv_query_count(dev, idx, data, error);
15613 case MLX5_INDIRECT_ACTION_TYPE_CT:
15614 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15615 if (owner != PORT_ID(priv))
15616 return rte_flow_error_set(error, EACCES,
15617 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15619 "CT object owned by another port");
15620 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15621 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15624 return rte_flow_error_set(error, EFAULT,
15625 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15627 "CT object is inactive");
15628 ((struct rte_flow_action_conntrack *)data)->peer_port =
15630 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
15632 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
15633 return rte_flow_error_set(error, EIO,
15634 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15636 "Failed to query CT context");
15639 return rte_flow_error_set(error, ENOTSUP,
15640 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15641 "action type query not supported");
15646 * Query a flow rule AGE action for aging information.
15649 * Pointer to Ethernet device.
15651 * Pointer to the sub flow.
15653 * data retrieved by the query.
15654 * @param[out] error
15655 * Perform verbose error reporting if not NULL.
15658 * 0 on success, a negative errno value otherwise and rte_errno is set.
15661 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
15662 void *data, struct rte_flow_error *error)
15664 struct rte_flow_query_age *resp = data;
15665 struct mlx5_age_param *age_param;
15668 struct mlx5_aso_age_action *act =
15669 flow_aso_age_get_by_idx(dev, flow->age);
15671 age_param = &act->age_params;
15672 } else if (flow->counter) {
15673 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
15675 if (!age_param || !age_param->timeout)
15676 return rte_flow_error_set
15678 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15679 NULL, "cannot read age data");
15681 return rte_flow_error_set(error, EINVAL,
15682 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15683 NULL, "age data not available");
15685 resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
15687 resp->sec_since_last_hit_valid = !resp->aged;
15688 if (resp->sec_since_last_hit_valid)
15689 resp->sec_since_last_hit = __atomic_load_n
15690 (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
15697 * @see rte_flow_query()
15698 * @see rte_flow_ops
15701 flow_dv_query(struct rte_eth_dev *dev,
15702 struct rte_flow *flow __rte_unused,
15703 const struct rte_flow_action *actions __rte_unused,
15704 void *data __rte_unused,
15705 struct rte_flow_error *error __rte_unused)
15709 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
15710 switch (actions->type) {
15711 case RTE_FLOW_ACTION_TYPE_VOID:
15713 case RTE_FLOW_ACTION_TYPE_COUNT:
15714 ret = flow_dv_query_count(dev, flow->counter, data,
15717 case RTE_FLOW_ACTION_TYPE_AGE:
15718 ret = flow_dv_query_age(dev, flow, data, error);
15721 return rte_flow_error_set(error, ENOTSUP,
15722 RTE_FLOW_ERROR_TYPE_ACTION,
15724 "action not supported");
15731 * Destroy the meter table set.
15732 * Lock free, (mutex should be acquired by caller).
15735 * Pointer to Ethernet device.
15737 * Meter information table.
15740 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
15741 struct mlx5_flow_meter_info *fm)
15743 struct mlx5_priv *priv = dev->data->dev_private;
15746 if (!fm || !priv->config.dv_flow_en)
15748 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15749 if (fm->drop_rule[i]) {
15750 claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
15751 fm->drop_rule[i] = NULL;
15757 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
15759 struct mlx5_priv *priv = dev->data->dev_private;
15760 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
15761 struct mlx5_flow_tbl_data_entry *tbl;
15764 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15765 if (mtrmng->def_rule[i]) {
15766 claim_zero(mlx5_flow_os_destroy_flow
15767 (mtrmng->def_rule[i]));
15768 mtrmng->def_rule[i] = NULL;
15770 if (mtrmng->def_matcher[i]) {
15771 tbl = container_of(mtrmng->def_matcher[i]->tbl,
15772 struct mlx5_flow_tbl_data_entry, tbl);
15773 mlx5_list_unregister(tbl->matchers,
15774 &mtrmng->def_matcher[i]->entry);
15775 mtrmng->def_matcher[i] = NULL;
15777 for (j = 0; j < MLX5_REG_BITS; j++) {
15778 if (mtrmng->drop_matcher[i][j]) {
15780 container_of(mtrmng->drop_matcher[i][j]->tbl,
15781 struct mlx5_flow_tbl_data_entry,
15783 mlx5_list_unregister(tbl->matchers,
15784 &mtrmng->drop_matcher[i][j]->entry);
15785 mtrmng->drop_matcher[i][j] = NULL;
15788 if (mtrmng->drop_tbl[i]) {
15789 flow_dv_tbl_resource_release(MLX5_SH(dev),
15790 mtrmng->drop_tbl[i]);
15791 mtrmng->drop_tbl[i] = NULL;
15796 /* Number of meter flow actions, count and jump or count and drop. */
15797 #define METER_ACTIONS 2
15800 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
15801 enum mlx5_meter_domain domain)
15803 struct mlx5_priv *priv = dev->data->dev_private;
15804 struct mlx5_flow_meter_def_policy *def_policy =
15805 priv->sh->mtrmng->def_policy[domain];
15807 __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
15808 mlx5_free(def_policy);
15809 priv->sh->mtrmng->def_policy[domain] = NULL;
15813 * Destroy the default policy table set.
15816 * Pointer to Ethernet device.
15819 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
15821 struct mlx5_priv *priv = dev->data->dev_private;
15824 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
15825 if (priv->sh->mtrmng->def_policy[i])
15826 __flow_dv_destroy_domain_def_policy(dev,
15827 (enum mlx5_meter_domain)i);
15828 priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
15832 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
15833 uint32_t color_reg_c_idx,
15834 enum rte_color color, void *matcher_object,
15835 int actions_n, void *actions,
15836 bool match_src_port, const struct rte_flow_item *item,
15837 void **rule, const struct rte_flow_attr *attr)
15840 struct mlx5_flow_dv_match_params value = {
15841 .size = sizeof(value.buf),
15843 struct mlx5_flow_dv_match_params matcher = {
15844 .size = sizeof(matcher.buf),
15846 struct mlx5_priv *priv = dev->data->dev_private;
15849 if (match_src_port && (priv->representor || priv->master)) {
15850 if (flow_dv_translate_item_port_id(dev, matcher.buf,
15851 value.buf, item, attr)) {
15853 "Failed to create meter policy flow with port.");
15857 flow_dv_match_meta_reg(matcher.buf, value.buf,
15858 (enum modify_reg)color_reg_c_idx,
15859 rte_col_2_mlx5_col(color),
15861 misc_mask = flow_dv_matcher_enable(value.buf);
15862 __flow_dv_adjust_buf_size(&value.size, misc_mask);
15863 ret = mlx5_flow_os_create_flow(matcher_object,
15864 (void *)&value, actions_n, actions, rule);
15866 DRV_LOG(ERR, "Failed to create meter policy flow.");
15873 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
15874 uint32_t color_reg_c_idx,
15876 struct mlx5_flow_meter_sub_policy *sub_policy,
15877 const struct rte_flow_attr *attr,
15878 bool match_src_port,
15879 const struct rte_flow_item *item,
15880 struct mlx5_flow_dv_matcher **policy_matcher,
15881 struct rte_flow_error *error)
15883 struct mlx5_list_entry *entry;
15884 struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
15885 struct mlx5_flow_dv_matcher matcher = {
15887 .size = sizeof(matcher.mask.buf),
15891 struct mlx5_flow_dv_match_params value = {
15892 .size = sizeof(value.buf),
15894 struct mlx5_flow_cb_ctx ctx = {
15898 struct mlx5_flow_tbl_data_entry *tbl_data;
15899 struct mlx5_priv *priv = dev->data->dev_private;
15900 uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
15902 if (match_src_port && (priv->representor || priv->master)) {
15903 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
15904 value.buf, item, attr)) {
15906 "Failed to register meter drop matcher with port.");
15910 tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
15911 if (priority < RTE_COLOR_RED)
15912 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
15913 (enum modify_reg)color_reg_c_idx, 0, color_mask);
15914 matcher.priority = priority;
15915 matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
15916 matcher.mask.size);
15917 entry = mlx5_list_register(tbl_data->matchers, &ctx);
15919 DRV_LOG(ERR, "Failed to register meter drop matcher.");
15923 container_of(entry, struct mlx5_flow_dv_matcher, entry);
15928 * Create the policy rules per domain.
15931 * Pointer to Ethernet device.
15932 * @param[in] sub_policy
15933 * Pointer to sub policy table..
15934 * @param[in] egress
15935 * Direction of the table.
15936 * @param[in] transfer
15937 * E-Switch or NIC flow.
15939 * Pointer to policy action list per color.
15942 * 0 on success, -1 otherwise.
15945 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
15946 struct mlx5_flow_meter_sub_policy *sub_policy,
15947 uint8_t egress, uint8_t transfer, bool match_src_port,
15948 struct mlx5_meter_policy_acts acts[RTE_COLORS])
15950 struct mlx5_priv *priv = dev->data->dev_private;
15951 struct rte_flow_error flow_err;
15952 uint32_t color_reg_c_idx;
15953 struct rte_flow_attr attr = {
15954 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
15957 .egress = !!egress,
15958 .transfer = !!transfer,
15962 int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
15963 struct mlx5_sub_policy_color_rule *color_rule;
15967 /* Create policy table with POLICY level. */
15968 if (!sub_policy->tbl_rsc)
15969 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
15970 MLX5_FLOW_TABLE_LEVEL_POLICY,
15971 egress, transfer, false, NULL, 0, 0,
15972 sub_policy->idx, &flow_err);
15973 if (!sub_policy->tbl_rsc) {
15975 "Failed to create meter sub policy table.");
15978 /* Prepare matchers. */
15979 color_reg_c_idx = ret;
15980 for (i = 0; i < RTE_COLORS; i++) {
15981 TAILQ_INIT(&sub_policy->color_rules[i]);
15982 if (i == RTE_COLOR_YELLOW || !acts[i].actions_n)
15984 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
15985 sizeof(struct mlx5_sub_policy_color_rule),
15988 DRV_LOG(ERR, "No memory to create color rule.");
15991 color_rule->src_port = priv->representor_id;
15993 /* Create matchers for Color. */
15994 if (__flow_dv_create_policy_matcher(dev,
15995 color_reg_c_idx, i, sub_policy, &attr,
15996 (i != RTE_COLOR_RED ? match_src_port : false),
15997 NULL, &color_rule->matcher, &flow_err)) {
15998 DRV_LOG(ERR, "Failed to create color matcher.");
16001 /* Create flow, matching color. */
16002 if (__flow_dv_create_policy_flow(dev,
16003 color_reg_c_idx, (enum rte_color)i,
16004 color_rule->matcher->matcher_object,
16006 acts[i].dv_actions,
16007 (i != RTE_COLOR_RED ? match_src_port : false),
16008 NULL, &color_rule->rule,
16010 DRV_LOG(ERR, "Failed to create color rule.");
16013 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16014 color_rule, next_port);
16019 if (color_rule->rule)
16020 mlx5_flow_os_destroy_flow(color_rule->rule);
16021 if (color_rule->matcher) {
16022 struct mlx5_flow_tbl_data_entry *tbl =
16023 container_of(color_rule->matcher->tbl,
16024 typeof(*tbl), tbl);
16025 mlx5_list_unregister(tbl->matchers,
16026 &color_rule->matcher->entry);
16028 mlx5_free(color_rule);
16034 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16035 struct mlx5_flow_meter_policy *mtr_policy,
16036 struct mlx5_flow_meter_sub_policy *sub_policy,
16039 struct mlx5_priv *priv = dev->data->dev_private;
16040 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16041 struct mlx5_flow_dv_tag_resource *tag;
16042 struct mlx5_flow_dv_port_id_action_resource *port_action;
16043 struct mlx5_hrxq *hrxq;
16044 struct mlx5_flow_meter_info *next_fm = NULL;
16045 struct mlx5_flow_meter_policy *next_policy;
16046 struct mlx5_flow_meter_sub_policy *next_sub_policy;
16047 struct mlx5_flow_tbl_data_entry *tbl_data;
16048 struct rte_flow_error error;
16049 uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16050 uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16051 bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16052 bool match_src_port = false;
16055 for (i = 0; i < RTE_COLORS; i++) {
16056 acts[i].actions_n = 0;
16057 if (i == RTE_COLOR_YELLOW)
16059 if (i == RTE_COLOR_RED) {
16060 /* Only support drop on red. */
16061 acts[i].dv_actions[0] =
16062 mtr_policy->dr_drop_action[domain];
16063 acts[i].actions_n = 1;
16066 if (mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16067 struct rte_flow_attr attr = {
16068 .transfer = transfer
16071 next_fm = mlx5_flow_meter_find(priv,
16072 mtr_policy->act_cnt[i].next_mtr_id,
16076 "Failed to get next hierarchy meter.");
16079 if (mlx5_flow_meter_attach(priv, next_fm,
16081 DRV_LOG(ERR, "%s", error.message);
16085 /* Meter action must be the first for TX. */
16087 acts[i].dv_actions[acts[i].actions_n] =
16088 next_fm->meter_action;
16089 acts[i].actions_n++;
16092 if (mtr_policy->act_cnt[i].rix_mark) {
16093 tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16094 mtr_policy->act_cnt[i].rix_mark);
16096 DRV_LOG(ERR, "Failed to find "
16097 "mark action for policy.");
16100 acts[i].dv_actions[acts[i].actions_n] =
16102 acts[i].actions_n++;
16104 if (mtr_policy->act_cnt[i].modify_hdr) {
16105 acts[i].dv_actions[acts[i].actions_n] =
16106 mtr_policy->act_cnt[i].modify_hdr->action;
16107 acts[i].actions_n++;
16109 if (mtr_policy->act_cnt[i].fate_action) {
16110 switch (mtr_policy->act_cnt[i].fate_action) {
16111 case MLX5_FLOW_FATE_PORT_ID:
16112 port_action = mlx5_ipool_get
16113 (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16114 mtr_policy->act_cnt[i].rix_port_id_action);
16115 if (!port_action) {
16116 DRV_LOG(ERR, "Failed to find "
16117 "port action for policy.");
16120 acts[i].dv_actions[acts[i].actions_n] =
16121 port_action->action;
16122 acts[i].actions_n++;
16123 mtr_policy->dev = dev;
16124 match_src_port = true;
16126 case MLX5_FLOW_FATE_DROP:
16127 case MLX5_FLOW_FATE_JUMP:
16128 acts[i].dv_actions[acts[i].actions_n] =
16129 mtr_policy->act_cnt[i].dr_jump_action[domain];
16130 acts[i].actions_n++;
16132 case MLX5_FLOW_FATE_SHARED_RSS:
16133 case MLX5_FLOW_FATE_QUEUE:
16134 hrxq = mlx5_ipool_get
16135 (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16136 sub_policy->rix_hrxq[i]);
16138 DRV_LOG(ERR, "Failed to find "
16139 "queue action for policy.");
16142 acts[i].dv_actions[acts[i].actions_n] =
16144 acts[i].actions_n++;
16146 case MLX5_FLOW_FATE_MTR:
16149 "No next hierarchy meter.");
16153 acts[i].dv_actions[acts[i].actions_n] =
16154 next_fm->meter_action;
16155 acts[i].actions_n++;
16157 if (mtr_policy->act_cnt[i].next_sub_policy) {
16159 mtr_policy->act_cnt[i].next_sub_policy;
16162 mlx5_flow_meter_policy_find(dev,
16163 next_fm->policy_id, NULL);
16164 MLX5_ASSERT(next_policy);
16166 next_policy->sub_policys[domain][0];
16169 container_of(next_sub_policy->tbl_rsc,
16170 struct mlx5_flow_tbl_data_entry, tbl);
16171 acts[i].dv_actions[acts[i].actions_n++] =
16172 tbl_data->jump.action;
16173 if (mtr_policy->act_cnt[i].modify_hdr)
16174 match_src_port = !!transfer;
16177 /*Queue action do nothing*/
16182 if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16183 egress, transfer, match_src_port, acts)) {
16185 "Failed to create policy rules per domain.");
16191 mlx5_flow_meter_detach(priv, next_fm);
16196 * Create the policy rules.
16199 * Pointer to Ethernet device.
16200 * @param[in,out] mtr_policy
16201 * Pointer to meter policy table.
16204 * 0 on success, -1 otherwise.
16207 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16208 struct mlx5_flow_meter_policy *mtr_policy)
16211 uint16_t sub_policy_num;
16213 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16214 sub_policy_num = (mtr_policy->sub_policy_num >>
16215 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16216 MLX5_MTR_SUB_POLICY_NUM_MASK;
16217 if (!sub_policy_num)
16219 /* Prepare actions list and create policy rules. */
16220 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16221 mtr_policy->sub_policys[i][0], i)) {
16223 "Failed to create policy action list per domain.");
16231 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16233 struct mlx5_priv *priv = dev->data->dev_private;
16234 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16235 struct mlx5_flow_meter_def_policy *def_policy;
16236 struct mlx5_flow_tbl_resource *jump_tbl;
16237 struct mlx5_flow_tbl_data_entry *tbl_data;
16238 uint8_t egress, transfer;
16239 struct rte_flow_error error;
16240 struct mlx5_meter_policy_acts acts[RTE_COLORS];
16243 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16244 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16245 def_policy = mtrmng->def_policy[domain];
16247 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16248 sizeof(struct mlx5_flow_meter_def_policy),
16249 RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16251 DRV_LOG(ERR, "Failed to alloc "
16252 "default policy table.");
16253 goto def_policy_error;
16255 mtrmng->def_policy[domain] = def_policy;
16256 /* Create the meter suffix table with SUFFIX level. */
16257 jump_tbl = flow_dv_tbl_resource_get(dev,
16258 MLX5_FLOW_TABLE_LEVEL_METER,
16259 egress, transfer, false, NULL, 0,
16260 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16263 "Failed to create meter suffix table.");
16264 goto def_policy_error;
16266 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16267 tbl_data = container_of(jump_tbl,
16268 struct mlx5_flow_tbl_data_entry, tbl);
16269 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16270 tbl_data->jump.action;
16271 acts[RTE_COLOR_GREEN].dv_actions[0] =
16272 tbl_data->jump.action;
16273 acts[RTE_COLOR_GREEN].actions_n = 1;
16274 /* Create jump action to the drop table. */
16275 if (!mtrmng->drop_tbl[domain]) {
16276 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16277 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16278 egress, transfer, false, NULL, 0,
16279 0, MLX5_MTR_TABLE_ID_DROP, &error);
16280 if (!mtrmng->drop_tbl[domain]) {
16281 DRV_LOG(ERR, "Failed to create "
16282 "meter drop table for default policy.");
16283 goto def_policy_error;
16286 tbl_data = container_of(mtrmng->drop_tbl[domain],
16287 struct mlx5_flow_tbl_data_entry, tbl);
16288 def_policy->dr_jump_action[RTE_COLOR_RED] =
16289 tbl_data->jump.action;
16290 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16291 acts[RTE_COLOR_RED].actions_n = 1;
16292 /* Create default policy rules. */
16293 ret = __flow_dv_create_domain_policy_rules(dev,
16294 &def_policy->sub_policy,
16295 egress, transfer, false, acts);
16297 DRV_LOG(ERR, "Failed to create "
16298 "default policy rules.");
16299 goto def_policy_error;
16304 __flow_dv_destroy_domain_def_policy(dev,
16305 (enum mlx5_meter_domain)domain);
16310 * Create the default policy table set.
16313 * Pointer to Ethernet device.
16315 * 0 on success, -1 otherwise.
16318 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16320 struct mlx5_priv *priv = dev->data->dev_private;
16323 /* Non-termination policy table. */
16324 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16325 if (!priv->config.dv_esw_en && i == MLX5_MTR_DOMAIN_TRANSFER)
16327 if (__flow_dv_create_domain_def_policy(dev, i)) {
16329 "Failed to create default policy");
16337 * Create the needed meter tables.
16338 * Lock free, (mutex should be acquired by caller).
16341 * Pointer to Ethernet device.
16343 * Meter information table.
16344 * @param[in] mtr_idx
16346 * @param[in] domain_bitmap
16349 * 0 on success, -1 otherwise.
16352 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16353 struct mlx5_flow_meter_info *fm,
16355 uint8_t domain_bitmap)
16357 struct mlx5_priv *priv = dev->data->dev_private;
16358 struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16359 struct rte_flow_error error;
16360 struct mlx5_flow_tbl_data_entry *tbl_data;
16361 uint8_t egress, transfer;
16362 void *actions[METER_ACTIONS];
16363 int domain, ret, i;
16364 struct mlx5_flow_counter *cnt;
16365 struct mlx5_flow_dv_match_params value = {
16366 .size = sizeof(value.buf),
16368 struct mlx5_flow_dv_match_params matcher_para = {
16369 .size = sizeof(matcher_para.buf),
16371 int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16373 uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16374 uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16375 struct mlx5_list_entry *entry;
16376 struct mlx5_flow_dv_matcher matcher = {
16378 .size = sizeof(matcher.mask.buf),
16381 struct mlx5_flow_dv_matcher *drop_matcher;
16382 struct mlx5_flow_cb_ctx ctx = {
16388 if (!priv->mtr_en || mtr_id_reg_c < 0) {
16389 rte_errno = ENOTSUP;
16392 for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16393 if (!(domain_bitmap & (1 << domain)) ||
16394 (mtrmng->def_rule[domain] && !fm->drop_cnt))
16396 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16397 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16398 /* Create the drop table with METER DROP level. */
16399 if (!mtrmng->drop_tbl[domain]) {
16400 mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16401 MLX5_FLOW_TABLE_LEVEL_METER,
16402 egress, transfer, false, NULL, 0,
16403 0, MLX5_MTR_TABLE_ID_DROP, &error);
16404 if (!mtrmng->drop_tbl[domain]) {
16405 DRV_LOG(ERR, "Failed to create meter drop table.");
16409 /* Create default matcher in drop table. */
16410 matcher.tbl = mtrmng->drop_tbl[domain],
16411 tbl_data = container_of(mtrmng->drop_tbl[domain],
16412 struct mlx5_flow_tbl_data_entry, tbl);
16413 if (!mtrmng->def_matcher[domain]) {
16414 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16415 (enum modify_reg)mtr_id_reg_c,
16417 matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16418 matcher.crc = rte_raw_cksum
16419 ((const void *)matcher.mask.buf,
16420 matcher.mask.size);
16421 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16423 DRV_LOG(ERR, "Failed to register meter "
16424 "drop default matcher.");
16427 mtrmng->def_matcher[domain] = container_of(entry,
16428 struct mlx5_flow_dv_matcher, entry);
16430 /* Create default rule in drop table. */
16431 if (!mtrmng->def_rule[domain]) {
16433 actions[i++] = priv->sh->dr_drop_action;
16434 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16435 (enum modify_reg)mtr_id_reg_c, 0, 0);
16436 misc_mask = flow_dv_matcher_enable(value.buf);
16437 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16438 ret = mlx5_flow_os_create_flow
16439 (mtrmng->def_matcher[domain]->matcher_object,
16440 (void *)&value, i, actions,
16441 &mtrmng->def_rule[domain]);
16443 DRV_LOG(ERR, "Failed to create meter "
16444 "default drop rule for drop table.");
16450 MLX5_ASSERT(mtrmng->max_mtr_bits);
16451 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16452 /* Create matchers for Drop. */
16453 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16454 (enum modify_reg)mtr_id_reg_c, 0,
16455 (mtr_id_mask << mtr_id_offset));
16456 matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16457 matcher.crc = rte_raw_cksum
16458 ((const void *)matcher.mask.buf,
16459 matcher.mask.size);
16460 entry = mlx5_list_register(tbl_data->matchers, &ctx);
16463 "Failed to register meter drop matcher.");
16466 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16467 container_of(entry, struct mlx5_flow_dv_matcher,
16471 mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16472 /* Create drop rule, matching meter_id only. */
16473 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16474 (enum modify_reg)mtr_id_reg_c,
16475 (mtr_idx << mtr_id_offset), UINT32_MAX);
16477 cnt = flow_dv_counter_get_by_idx(dev,
16478 fm->drop_cnt, NULL);
16479 actions[i++] = cnt->action;
16480 actions[i++] = priv->sh->dr_drop_action;
16481 misc_mask = flow_dv_matcher_enable(value.buf);
16482 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16483 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16484 (void *)&value, i, actions,
16485 &fm->drop_rule[domain]);
16487 DRV_LOG(ERR, "Failed to create meter "
16488 "drop rule for drop table.");
16494 for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16495 if (fm->drop_rule[i]) {
16496 claim_zero(mlx5_flow_os_destroy_flow
16497 (fm->drop_rule[i]));
16498 fm->drop_rule[i] = NULL;
16504 static struct mlx5_flow_meter_sub_policy *
16505 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16506 struct mlx5_flow_meter_policy *mtr_policy,
16507 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16508 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16511 struct mlx5_priv *priv = dev->data->dev_private;
16512 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16513 uint32_t sub_policy_idx = 0;
16514 uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16516 struct mlx5_hrxq *hrxq;
16517 struct mlx5_flow_handle dh;
16518 struct mlx5_meter_policy_action_container *act_cnt;
16519 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16520 uint16_t sub_policy_num;
16522 rte_spinlock_lock(&mtr_policy->sl);
16523 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16526 hrxq_idx[i] = mlx5_hrxq_get(dev, rss_desc[i]);
16527 if (!hrxq_idx[i]) {
16528 rte_spinlock_unlock(&mtr_policy->sl);
16532 sub_policy_num = (mtr_policy->sub_policy_num >>
16533 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16534 MLX5_MTR_SUB_POLICY_NUM_MASK;
16535 for (i = 0; i < sub_policy_num;
16537 for (j = 0; j < MLX5_MTR_RTE_COLORS; j++) {
16540 mtr_policy->sub_policys[domain][i]->rix_hrxq[j])
16543 if (j >= MLX5_MTR_RTE_COLORS) {
16545 * Found the sub policy table with
16546 * the same queue per color
16548 rte_spinlock_unlock(&mtr_policy->sl);
16549 for (j = 0; j < MLX5_MTR_RTE_COLORS; j++)
16550 mlx5_hrxq_release(dev, hrxq_idx[j]);
16552 return mtr_policy->sub_policys[domain][i];
16555 /* Create sub policy. */
16556 if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
16557 /* Reuse the first dummy sub_policy*/
16558 sub_policy = mtr_policy->sub_policys[domain][0];
16559 sub_policy_idx = sub_policy->idx;
16561 sub_policy = mlx5_ipool_zmalloc
16562 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16565 sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
16566 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
16567 mlx5_hrxq_release(dev, hrxq_idx[i]);
16568 goto rss_sub_policy_error;
16570 sub_policy->idx = sub_policy_idx;
16571 sub_policy->main_policy = mtr_policy;
16573 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16576 sub_policy->rix_hrxq[i] = hrxq_idx[i];
16577 if (mtr_policy->is_hierarchy) {
16578 act_cnt = &mtr_policy->act_cnt[i];
16579 act_cnt->next_sub_policy = next_sub_policy;
16580 mlx5_hrxq_release(dev, hrxq_idx[i]);
16583 * Overwrite the last action from
16584 * RSS action to Queue action.
16586 hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
16589 DRV_LOG(ERR, "Failed to create policy hrxq");
16590 goto rss_sub_policy_error;
16592 act_cnt = &mtr_policy->act_cnt[i];
16593 if (act_cnt->rix_mark || act_cnt->modify_hdr) {
16594 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
16595 if (act_cnt->rix_mark)
16597 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
16598 dh.rix_hrxq = hrxq_idx[i];
16599 flow_drv_rxq_flags_set(dev, &dh);
16603 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16604 sub_policy, domain)) {
16605 DRV_LOG(ERR, "Failed to create policy "
16606 "rules per domain.");
16607 goto rss_sub_policy_error;
16609 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16610 i = (mtr_policy->sub_policy_num >>
16611 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16612 MLX5_MTR_SUB_POLICY_NUM_MASK;
16613 mtr_policy->sub_policys[domain][i] = sub_policy;
16615 if (i > MLX5_MTR_RSS_MAX_SUB_POLICY)
16616 goto rss_sub_policy_error;
16617 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16618 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16619 mtr_policy->sub_policy_num |=
16620 (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16621 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16623 rte_spinlock_unlock(&mtr_policy->sl);
16626 rss_sub_policy_error:
16628 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16629 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16630 i = (mtr_policy->sub_policy_num >>
16631 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16632 MLX5_MTR_SUB_POLICY_NUM_MASK;
16633 mtr_policy->sub_policys[domain][i] = NULL;
16635 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16639 rte_spinlock_unlock(&mtr_policy->sl);
16644 * Find the policy table for prefix table with RSS.
16647 * Pointer to Ethernet device.
16648 * @param[in] mtr_policy
16649 * Pointer to meter policy table.
16650 * @param[in] rss_desc
16651 * Pointer to rss_desc
16653 * Pointer to table set on success, NULL otherwise and rte_errno is set.
16655 static struct mlx5_flow_meter_sub_policy *
16656 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
16657 struct mlx5_flow_meter_policy *mtr_policy,
16658 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
16660 struct mlx5_priv *priv = dev->data->dev_private;
16661 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16662 struct mlx5_flow_meter_info *next_fm;
16663 struct mlx5_flow_meter_policy *next_policy;
16664 struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
16665 struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
16666 struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
16667 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16668 bool reuse_sub_policy;
16673 /* Iterate hierarchy to get all policies in this hierarchy. */
16674 policies[i++] = mtr_policy;
16675 if (!mtr_policy->is_hierarchy)
16677 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
16678 DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
16681 next_fm = mlx5_flow_meter_find(priv,
16682 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16684 DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
16688 mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
16690 MLX5_ASSERT(next_policy);
16691 mtr_policy = next_policy;
16695 * From last policy to the first one in hierarchy,
16696 * create/get the sub policy for each of them.
16698 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
16702 &reuse_sub_policy);
16704 DRV_LOG(ERR, "Failed to get the sub policy.");
16707 if (!reuse_sub_policy)
16708 sub_policies[j++] = sub_policy;
16709 next_sub_policy = sub_policy;
16714 uint16_t sub_policy_num;
16716 sub_policy = sub_policies[--j];
16717 mtr_policy = sub_policy->main_policy;
16718 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
16719 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
16720 sub_policy_num = (mtr_policy->sub_policy_num >>
16721 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16722 MLX5_MTR_SUB_POLICY_NUM_MASK;
16723 mtr_policy->sub_policys[domain][sub_policy_num - 1] =
16726 mtr_policy->sub_policy_num &=
16727 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16728 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
16729 mtr_policy->sub_policy_num |=
16730 (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16731 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
16732 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16740 * Create the sub policy tag rule for all meters in hierarchy.
16743 * Pointer to Ethernet device.
16745 * Meter information table.
16746 * @param[in] src_port
16747 * The src port this extra rule should use.
16749 * The src port match item.
16750 * @param[out] error
16751 * Perform verbose error reporting if not NULL.
16753 * 0 on success, a negative errno value otherwise and rte_errno is set.
16756 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
16757 struct mlx5_flow_meter_info *fm,
16759 const struct rte_flow_item *item,
16760 struct rte_flow_error *error)
16762 struct mlx5_priv *priv = dev->data->dev_private;
16763 struct mlx5_flow_meter_policy *mtr_policy;
16764 struct mlx5_flow_meter_sub_policy *sub_policy;
16765 struct mlx5_flow_meter_info *next_fm = NULL;
16766 struct mlx5_flow_meter_policy *next_policy;
16767 struct mlx5_flow_meter_sub_policy *next_sub_policy;
16768 struct mlx5_flow_tbl_data_entry *tbl_data;
16769 struct mlx5_sub_policy_color_rule *color_rule;
16770 struct mlx5_meter_policy_acts acts;
16771 uint32_t color_reg_c_idx;
16772 bool mtr_first = (src_port != UINT16_MAX) ? true : false;
16773 struct rte_flow_attr attr = {
16774 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16781 uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
16784 mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
16785 MLX5_ASSERT(mtr_policy);
16786 if (!mtr_policy->is_hierarchy)
16788 next_fm = mlx5_flow_meter_find(priv,
16789 mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
16791 return rte_flow_error_set(error, EINVAL,
16792 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16793 "Failed to find next meter in hierarchy.");
16795 if (!next_fm->drop_cnt)
16797 color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
16798 sub_policy = mtr_policy->sub_policys[domain][0];
16799 for (i = 0; i < RTE_COLORS; i++) {
16800 bool rule_exist = false;
16801 struct mlx5_meter_policy_action_container *act_cnt;
16803 if (i >= RTE_COLOR_YELLOW)
16805 TAILQ_FOREACH(color_rule,
16806 &sub_policy->color_rules[i], next_port)
16807 if (color_rule->src_port == src_port) {
16813 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16814 sizeof(struct mlx5_sub_policy_color_rule),
16817 return rte_flow_error_set(error, ENOMEM,
16818 RTE_FLOW_ERROR_TYPE_ACTION,
16819 NULL, "No memory to create tag color rule.");
16820 color_rule->src_port = src_port;
16822 next_policy = mlx5_flow_meter_policy_find(dev,
16823 next_fm->policy_id, NULL);
16824 MLX5_ASSERT(next_policy);
16825 next_sub_policy = next_policy->sub_policys[domain][0];
16826 tbl_data = container_of(next_sub_policy->tbl_rsc,
16827 struct mlx5_flow_tbl_data_entry, tbl);
16828 act_cnt = &mtr_policy->act_cnt[i];
16830 acts.dv_actions[0] = next_fm->meter_action;
16831 acts.dv_actions[1] = act_cnt->modify_hdr->action;
16833 acts.dv_actions[0] = act_cnt->modify_hdr->action;
16834 acts.dv_actions[1] = next_fm->meter_action;
16836 acts.dv_actions[2] = tbl_data->jump.action;
16837 acts.actions_n = 3;
16838 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
16842 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16843 i, sub_policy, &attr, true, item,
16844 &color_rule->matcher, error)) {
16845 rte_flow_error_set(error, errno,
16846 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16847 "Failed to create hierarchy meter matcher.");
16850 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
16852 color_rule->matcher->matcher_object,
16853 acts.actions_n, acts.dv_actions,
16855 &color_rule->rule, &attr)) {
16856 rte_flow_error_set(error, errno,
16857 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
16858 "Failed to create hierarchy meter rule.");
16861 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16862 color_rule, next_port);
16866 * Recursive call to iterate all meters in hierarchy and
16867 * create needed rules.
16869 return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
16870 src_port, item, error);
16873 if (color_rule->rule)
16874 mlx5_flow_os_destroy_flow(color_rule->rule);
16875 if (color_rule->matcher) {
16876 struct mlx5_flow_tbl_data_entry *tbl =
16877 container_of(color_rule->matcher->tbl,
16878 typeof(*tbl), tbl);
16879 mlx5_list_unregister(tbl->matchers,
16880 &color_rule->matcher->entry);
16882 mlx5_free(color_rule);
16885 mlx5_flow_meter_detach(priv, next_fm);
16890 * Destroy the sub policy table with RX queue.
16893 * Pointer to Ethernet device.
16894 * @param[in] mtr_policy
16895 * Pointer to meter policy table.
16898 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
16899 struct mlx5_flow_meter_policy *mtr_policy)
16901 struct mlx5_priv *priv = dev->data->dev_private;
16902 struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16903 uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16905 uint16_t sub_policy_num, new_policy_num;
16907 rte_spinlock_lock(&mtr_policy->sl);
16908 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16909 switch (mtr_policy->act_cnt[i].fate_action) {
16910 case MLX5_FLOW_FATE_SHARED_RSS:
16911 sub_policy_num = (mtr_policy->sub_policy_num >>
16912 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16913 MLX5_MTR_SUB_POLICY_NUM_MASK;
16914 new_policy_num = sub_policy_num;
16915 for (j = 0; j < sub_policy_num; j++) {
16917 mtr_policy->sub_policys[domain][j];
16919 __flow_dv_destroy_sub_policy_rules(dev,
16922 mtr_policy->sub_policys[domain][0]) {
16923 mtr_policy->sub_policys[domain][j] =
16926 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
16932 if (new_policy_num != sub_policy_num) {
16933 mtr_policy->sub_policy_num &=
16934 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
16935 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
16936 mtr_policy->sub_policy_num |=
16938 MLX5_MTR_SUB_POLICY_NUM_MASK) <<
16939 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
16942 case MLX5_FLOW_FATE_QUEUE:
16943 sub_policy = mtr_policy->sub_policys[domain][0];
16944 __flow_dv_destroy_sub_policy_rules(dev,
16948 /*Other actions without queue and do nothing*/
16952 rte_spinlock_unlock(&mtr_policy->sl);
16956 * Validate the batch counter support in root table.
16958 * Create a simple flow with invalid counter and drop action on root table to
16959 * validate if batch counter with offset on root table is supported or not.
16962 * Pointer to rte_eth_dev structure.
16965 * 0 on success, a negative errno value otherwise and rte_errno is set.
16968 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
16970 struct mlx5_priv *priv = dev->data->dev_private;
16971 struct mlx5_dev_ctx_shared *sh = priv->sh;
16972 struct mlx5_flow_dv_match_params mask = {
16973 .size = sizeof(mask.buf),
16975 struct mlx5_flow_dv_match_params value = {
16976 .size = sizeof(value.buf),
16978 struct mlx5dv_flow_matcher_attr dv_attr = {
16979 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
16981 .match_criteria_enable = 0,
16982 .match_mask = (void *)&mask,
16984 void *actions[2] = { 0 };
16985 struct mlx5_flow_tbl_resource *tbl = NULL;
16986 struct mlx5_devx_obj *dcs = NULL;
16987 void *matcher = NULL;
16991 tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
16995 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->ctx, 0x4);
16998 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17002 dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17003 __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17004 ret = mlx5_flow_os_create_flow_matcher(sh->ctx, &dv_attr, tbl->obj,
17008 __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17009 ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17013 * If batch counter with offset is not supported, the driver will not
17014 * validate the invalid offset value, flow create should success.
17015 * In this case, it means batch counter is not supported in root table.
17017 * Otherwise, if flow create is failed, counter offset is supported.
17020 DRV_LOG(INFO, "Batch counter is not supported in root "
17021 "table. Switch to fallback mode.");
17022 rte_errno = ENOTSUP;
17024 claim_zero(mlx5_flow_os_destroy_flow(flow));
17026 /* Check matcher to make sure validate fail at flow create. */
17027 if (!matcher || (matcher && errno != EINVAL))
17028 DRV_LOG(ERR, "Unexpected error in counter offset "
17029 "support detection");
17033 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17035 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17037 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17039 claim_zero(mlx5_devx_cmd_destroy(dcs));
17044 * Query a devx counter.
17047 * Pointer to the Ethernet device structure.
17049 * Index to the flow counter.
17051 * Set to clear the counter statistics.
17053 * The statistics value of packets.
17054 * @param[out] bytes
17055 * The statistics value of bytes.
17058 * 0 on success, otherwise return -1.
17061 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17062 uint64_t *pkts, uint64_t *bytes)
17064 struct mlx5_priv *priv = dev->data->dev_private;
17065 struct mlx5_flow_counter *cnt;
17066 uint64_t inn_pkts, inn_bytes;
17069 if (!priv->config.devx)
17072 ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17075 cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17076 *pkts = inn_pkts - cnt->hits;
17077 *bytes = inn_bytes - cnt->bytes;
17079 cnt->hits = inn_pkts;
17080 cnt->bytes = inn_bytes;
17086 * Get aged-out flows.
17089 * Pointer to the Ethernet device structure.
17090 * @param[in] context
17091 * The address of an array of pointers to the aged-out flows contexts.
17092 * @param[in] nb_contexts
17093 * The length of context array pointers.
17094 * @param[out] error
17095 * Perform verbose error reporting if not NULL. Initialized in case of
17099 * how many contexts get in success, otherwise negative errno value.
17100 * if nb_contexts is 0, return the amount of all aged contexts.
17101 * if nb_contexts is not 0 , return the amount of aged flows reported
17102 * in the context array.
17103 * @note: only stub for now
17106 flow_get_aged_flows(struct rte_eth_dev *dev,
17108 uint32_t nb_contexts,
17109 struct rte_flow_error *error)
17111 struct mlx5_priv *priv = dev->data->dev_private;
17112 struct mlx5_age_info *age_info;
17113 struct mlx5_age_param *age_param;
17114 struct mlx5_flow_counter *counter;
17115 struct mlx5_aso_age_action *act;
17118 if (nb_contexts && !context)
17119 return rte_flow_error_set(error, EINVAL,
17120 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17121 NULL, "empty context");
17122 age_info = GET_PORT_AGE_INFO(priv);
17123 rte_spinlock_lock(&age_info->aged_sl);
17124 LIST_FOREACH(act, &age_info->aged_aso, next) {
17127 context[nb_flows - 1] =
17128 act->age_params.context;
17129 if (!(--nb_contexts))
17133 TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17136 age_param = MLX5_CNT_TO_AGE(counter);
17137 context[nb_flows - 1] = age_param->context;
17138 if (!(--nb_contexts))
17142 rte_spinlock_unlock(&age_info->aged_sl);
17143 MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17148 * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17151 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17153 return flow_dv_counter_alloc(dev, 0);
17157 * Validate indirect action.
17158 * Dispatcher for action type specific validation.
17161 * Pointer to the Ethernet device structure.
17163 * Indirect action configuration.
17164 * @param[in] action
17165 * The indirect action object to validate.
17166 * @param[out] error
17167 * Perform verbose error reporting if not NULL. Initialized in case of
17171 * 0 on success, otherwise negative errno value.
17174 flow_dv_action_validate(struct rte_eth_dev *dev,
17175 const struct rte_flow_indir_action_conf *conf,
17176 const struct rte_flow_action *action,
17177 struct rte_flow_error *err)
17179 struct mlx5_priv *priv = dev->data->dev_private;
17181 RTE_SET_USED(conf);
17182 switch (action->type) {
17183 case RTE_FLOW_ACTION_TYPE_RSS:
17185 * priv->obj_ops is set according to driver capabilities.
17186 * When DevX capabilities are
17187 * sufficient, it is set to devx_obj_ops.
17188 * Otherwise, it is set to ibv_obj_ops.
17189 * ibv_obj_ops doesn't support ind_table_modify operation.
17190 * In this case the indirect RSS action can't be used.
17192 if (priv->obj_ops.ind_table_modify == NULL)
17193 return rte_flow_error_set
17195 RTE_FLOW_ERROR_TYPE_ACTION,
17197 "Indirect RSS action not supported");
17198 return mlx5_validate_action_rss(dev, action, err);
17199 case RTE_FLOW_ACTION_TYPE_AGE:
17200 if (!priv->sh->aso_age_mng)
17201 return rte_flow_error_set(err, ENOTSUP,
17202 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17204 "Indirect age action not supported");
17205 return flow_dv_validate_action_age(0, action, dev, err);
17206 case RTE_FLOW_ACTION_TYPE_COUNT:
17208 * There are two mechanisms to share the action count.
17209 * The old mechanism uses the shared field to share, while the
17210 * new mechanism uses the indirect action API.
17211 * This validation comes to make sure that the two mechanisms
17212 * are not combined.
17214 if (is_shared_action_count(action))
17215 return rte_flow_error_set(err, ENOTSUP,
17216 RTE_FLOW_ERROR_TYPE_ACTION,
17218 "Mix shared and indirect counter is not supported");
17219 return flow_dv_validate_action_count(dev, true, 0, err);
17220 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17221 if (!priv->sh->ct_aso_en)
17222 return rte_flow_error_set(err, ENOTSUP,
17223 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17224 "ASO CT is not supported");
17225 return mlx5_validate_action_ct(dev, action->conf, err);
17227 return rte_flow_error_set(err, ENOTSUP,
17228 RTE_FLOW_ERROR_TYPE_ACTION,
17230 "action type not supported");
17235 * Validate the meter hierarchy chain for meter policy.
17238 * Pointer to the Ethernet device structure.
17239 * @param[in] meter_id
17241 * @param[in] action_flags
17242 * Holds the actions detected until now.
17243 * @param[out] is_rss
17245 * @param[out] hierarchy_domain
17246 * The domain bitmap for hierarchy policy.
17247 * @param[out] error
17248 * Perform verbose error reporting if not NULL. Initialized in case of
17252 * 0 on success, otherwise negative errno value with error set.
17255 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17257 uint64_t action_flags,
17259 uint8_t *hierarchy_domain,
17260 struct rte_mtr_error *error)
17262 struct mlx5_priv *priv = dev->data->dev_private;
17263 struct mlx5_flow_meter_info *fm;
17264 struct mlx5_flow_meter_policy *policy;
17267 if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17268 MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17269 return -rte_mtr_error_set(error, EINVAL,
17270 RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17272 "Multiple fate actions not supported.");
17274 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17276 return -rte_mtr_error_set(error, EINVAL,
17277 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17278 "Meter not found in meter hierarchy.");
17279 if (fm->def_policy)
17280 return -rte_mtr_error_set(error, EINVAL,
17281 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17282 "Non termination meter not supported in hierarchy.");
17283 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17284 MLX5_ASSERT(policy);
17285 if (!policy->is_hierarchy) {
17286 if (policy->transfer)
17287 *hierarchy_domain |=
17288 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17289 if (policy->ingress)
17290 *hierarchy_domain |=
17291 MLX5_MTR_DOMAIN_INGRESS_BIT;
17292 if (policy->egress)
17293 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17294 *is_rss = policy->is_rss;
17297 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17298 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17299 return -rte_mtr_error_set(error, EINVAL,
17300 RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17301 "Exceed max hierarchy meter number.");
17307 * Validate meter policy actions.
17308 * Dispatcher for action type specific validation.
17311 * Pointer to the Ethernet device structure.
17312 * @param[in] action
17313 * The meter policy action object to validate.
17315 * Attributes of flow to determine steering domain.
17316 * @param[out] error
17317 * Perform verbose error reporting if not NULL. Initialized in case of
17321 * 0 on success, otherwise negative errno value.
17324 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17325 const struct rte_flow_action *actions[RTE_COLORS],
17326 struct rte_flow_attr *attr,
17328 uint8_t *domain_bitmap,
17329 bool *is_def_policy,
17330 struct rte_mtr_error *error)
17332 struct mlx5_priv *priv = dev->data->dev_private;
17333 struct mlx5_dev_config *dev_conf = &priv->config;
17334 const struct rte_flow_action *act;
17335 uint64_t action_flags = 0;
17338 struct rte_flow_error flow_err;
17339 uint8_t domain_color[RTE_COLORS] = {0};
17340 uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17341 uint8_t hierarchy_domain = 0;
17342 const struct rte_flow_action_meter *mtr;
17344 if (!priv->config.dv_esw_en)
17345 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17346 *domain_bitmap = def_domain;
17347 if (actions[RTE_COLOR_YELLOW] &&
17348 actions[RTE_COLOR_YELLOW]->type != RTE_FLOW_ACTION_TYPE_END)
17349 return -rte_mtr_error_set(error, ENOTSUP,
17350 RTE_MTR_ERROR_TYPE_METER_POLICY,
17352 "Yellow color does not support any action.");
17353 if (actions[RTE_COLOR_YELLOW] &&
17354 actions[RTE_COLOR_YELLOW]->type != RTE_FLOW_ACTION_TYPE_DROP)
17355 return -rte_mtr_error_set(error, ENOTSUP,
17356 RTE_MTR_ERROR_TYPE_METER_POLICY,
17357 NULL, "Red color only supports drop action.");
17359 * Check default policy actions:
17360 * Green/Yellow: no action, Red: drop action
17362 if ((!actions[RTE_COLOR_GREEN] ||
17363 actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)) {
17364 *is_def_policy = true;
17367 flow_err.message = NULL;
17368 for (i = 0; i < RTE_COLORS; i++) {
17370 for (action_flags = 0, actions_n = 0;
17371 act && act->type != RTE_FLOW_ACTION_TYPE_END;
17373 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17374 return -rte_mtr_error_set(error, ENOTSUP,
17375 RTE_MTR_ERROR_TYPE_METER_POLICY,
17376 NULL, "too many actions");
17377 switch (act->type) {
17378 case RTE_FLOW_ACTION_TYPE_PORT_ID:
17379 if (!priv->config.dv_esw_en)
17380 return -rte_mtr_error_set(error,
17382 RTE_MTR_ERROR_TYPE_METER_POLICY,
17383 NULL, "PORT action validate check"
17384 " fail for ESW disable");
17385 ret = flow_dv_validate_action_port_id(dev,
17387 act, attr, &flow_err);
17389 return -rte_mtr_error_set(error,
17391 RTE_MTR_ERROR_TYPE_METER_POLICY,
17392 NULL, flow_err.message ?
17394 "PORT action validate check fail");
17396 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
17398 case RTE_FLOW_ACTION_TYPE_MARK:
17399 ret = flow_dv_validate_action_mark(dev, act,
17403 return -rte_mtr_error_set(error,
17405 RTE_MTR_ERROR_TYPE_METER_POLICY,
17406 NULL, flow_err.message ?
17408 "Mark action validate check fail");
17409 if (dev_conf->dv_xmeta_en !=
17410 MLX5_XMETA_MODE_LEGACY)
17411 return -rte_mtr_error_set(error,
17413 RTE_MTR_ERROR_TYPE_METER_POLICY,
17414 NULL, "Extend MARK action is "
17415 "not supported. Please try use "
17416 "default policy for meter.");
17417 action_flags |= MLX5_FLOW_ACTION_MARK;
17420 case RTE_FLOW_ACTION_TYPE_SET_TAG:
17421 ret = flow_dv_validate_action_set_tag(dev,
17425 return -rte_mtr_error_set(error,
17427 RTE_MTR_ERROR_TYPE_METER_POLICY,
17428 NULL, flow_err.message ?
17430 "Set tag action validate check fail");
17432 * Count all modify-header actions
17435 if (!(action_flags &
17436 MLX5_FLOW_MODIFY_HDR_ACTIONS))
17438 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
17440 case RTE_FLOW_ACTION_TYPE_DROP:
17441 ret = mlx5_flow_validate_action_drop
17445 return -rte_mtr_error_set(error,
17447 RTE_MTR_ERROR_TYPE_METER_POLICY,
17448 NULL, flow_err.message ?
17450 "Drop action validate check fail");
17451 action_flags |= MLX5_FLOW_ACTION_DROP;
17454 case RTE_FLOW_ACTION_TYPE_QUEUE:
17456 * Check whether extensive
17457 * metadata feature is engaged.
17459 if (dev_conf->dv_flow_en &&
17460 (dev_conf->dv_xmeta_en !=
17461 MLX5_XMETA_MODE_LEGACY) &&
17462 mlx5_flow_ext_mreg_supported(dev))
17463 return -rte_mtr_error_set(error,
17465 RTE_MTR_ERROR_TYPE_METER_POLICY,
17466 NULL, "Queue action with meta "
17467 "is not supported. Please try use "
17468 "default policy for meter.");
17469 ret = mlx5_flow_validate_action_queue(act,
17473 return -rte_mtr_error_set(error,
17475 RTE_MTR_ERROR_TYPE_METER_POLICY,
17476 NULL, flow_err.message ?
17478 "Queue action validate check fail");
17479 action_flags |= MLX5_FLOW_ACTION_QUEUE;
17482 case RTE_FLOW_ACTION_TYPE_RSS:
17483 if (dev_conf->dv_flow_en &&
17484 (dev_conf->dv_xmeta_en !=
17485 MLX5_XMETA_MODE_LEGACY) &&
17486 mlx5_flow_ext_mreg_supported(dev))
17487 return -rte_mtr_error_set(error,
17489 RTE_MTR_ERROR_TYPE_METER_POLICY,
17490 NULL, "RSS action with meta "
17491 "is not supported. Please try use "
17492 "default policy for meter.");
17493 ret = mlx5_validate_action_rss(dev, act,
17496 return -rte_mtr_error_set(error,
17498 RTE_MTR_ERROR_TYPE_METER_POLICY,
17499 NULL, flow_err.message ?
17501 "RSS action validate check fail");
17502 action_flags |= MLX5_FLOW_ACTION_RSS;
17506 case RTE_FLOW_ACTION_TYPE_JUMP:
17507 ret = flow_dv_validate_action_jump(dev,
17508 NULL, act, action_flags,
17509 attr, true, &flow_err);
17511 return -rte_mtr_error_set(error,
17513 RTE_MTR_ERROR_TYPE_METER_POLICY,
17514 NULL, flow_err.message ?
17516 "Jump action validate check fail");
17518 action_flags |= MLX5_FLOW_ACTION_JUMP;
17520 case RTE_FLOW_ACTION_TYPE_METER:
17521 if (i != RTE_COLOR_GREEN)
17522 return -rte_mtr_error_set(error,
17524 RTE_MTR_ERROR_TYPE_METER_POLICY,
17525 NULL, flow_err.message ?
17527 "Meter hierarchy only supports GREEN color.");
17529 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
17539 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
17542 return -rte_mtr_error_set(error, ENOTSUP,
17543 RTE_MTR_ERROR_TYPE_METER_POLICY,
17545 "Doesn't support optional action");
17548 /* Yellow is not supported, just skip. */
17549 if (i == RTE_COLOR_YELLOW)
17551 if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
17552 domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
17553 else if ((action_flags &
17554 (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
17555 (action_flags & MLX5_FLOW_ACTION_MARK))
17557 * Only support MLX5_XMETA_MODE_LEGACY
17558 * so MARK action only in ingress domain.
17560 domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
17561 else if (action_flags &
17562 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
17563 domain_color[i] = hierarchy_domain;
17565 domain_color[i] = def_domain;
17567 * Validate the drop action mutual exclusion
17568 * with other actions. Drop action is mutually-exclusive
17569 * with any other action, except for Count action.
17571 if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
17572 (action_flags & ~MLX5_FLOW_ACTION_DROP)) {
17573 return -rte_mtr_error_set(error, ENOTSUP,
17574 RTE_MTR_ERROR_TYPE_METER_POLICY,
17575 NULL, "Drop action is mutually-exclusive "
17576 "with any other action");
17578 /* Eswitch has few restrictions on using items and actions */
17579 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
17580 if (!mlx5_flow_ext_mreg_supported(dev) &&
17581 action_flags & MLX5_FLOW_ACTION_MARK)
17582 return -rte_mtr_error_set(error, ENOTSUP,
17583 RTE_MTR_ERROR_TYPE_METER_POLICY,
17584 NULL, "unsupported action MARK");
17585 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
17586 return -rte_mtr_error_set(error, ENOTSUP,
17587 RTE_MTR_ERROR_TYPE_METER_POLICY,
17588 NULL, "unsupported action QUEUE");
17589 if (action_flags & MLX5_FLOW_ACTION_RSS)
17590 return -rte_mtr_error_set(error, ENOTSUP,
17591 RTE_MTR_ERROR_TYPE_METER_POLICY,
17592 NULL, "unsupported action RSS");
17593 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17594 return -rte_mtr_error_set(error, ENOTSUP,
17595 RTE_MTR_ERROR_TYPE_METER_POLICY,
17596 NULL, "no fate action is found");
17598 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) &&
17600 MLX5_MTR_DOMAIN_INGRESS_BIT)) {
17601 if ((domain_color[i] &
17602 MLX5_MTR_DOMAIN_EGRESS_BIT))
17604 MLX5_MTR_DOMAIN_EGRESS_BIT;
17606 return -rte_mtr_error_set(error,
17608 RTE_MTR_ERROR_TYPE_METER_POLICY,
17609 NULL, "no fate action is found");
17612 if (domain_color[i] != def_domain)
17613 *domain_bitmap = domain_color[i];
17619 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
17621 struct mlx5_priv *priv = dev->data->dev_private;
17624 if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
17625 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
17630 if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
17631 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
17635 if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
17636 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
17643 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
17644 .validate = flow_dv_validate,
17645 .prepare = flow_dv_prepare,
17646 .translate = flow_dv_translate,
17647 .apply = flow_dv_apply,
17648 .remove = flow_dv_remove,
17649 .destroy = flow_dv_destroy,
17650 .query = flow_dv_query,
17651 .create_mtr_tbls = flow_dv_create_mtr_tbls,
17652 .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
17653 .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
17654 .create_meter = flow_dv_mtr_alloc,
17655 .free_meter = flow_dv_aso_mtr_release_to_pool,
17656 .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
17657 .create_mtr_acts = flow_dv_create_mtr_policy_acts,
17658 .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
17659 .create_policy_rules = flow_dv_create_policy_rules,
17660 .destroy_policy_rules = flow_dv_destroy_policy_rules,
17661 .create_def_policy = flow_dv_create_def_policy,
17662 .destroy_def_policy = flow_dv_destroy_def_policy,
17663 .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
17664 .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
17665 .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
17666 .counter_alloc = flow_dv_counter_allocate,
17667 .counter_free = flow_dv_counter_free,
17668 .counter_query = flow_dv_counter_query,
17669 .get_aged_flows = flow_get_aged_flows,
17670 .action_validate = flow_dv_action_validate,
17671 .action_create = flow_dv_action_create,
17672 .action_destroy = flow_dv_action_destroy,
17673 .action_update = flow_dv_action_update,
17674 .action_query = flow_dv_action_query,
17675 .sync_domain = flow_dv_sync_domain,
17678 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */