drivers/net/mlx5/mlx5_flow_dv.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2018 Mellanox Technologies, Ltd
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdalign.h>
   7 #include <stdint.h>
   8 #include <string.h>
   9 #include <unistd.h>
  10
  11 #include <rte_common.h>
  12 #include <rte_ether.h>
  13 #include <ethdev_driver.h>
  14 #include <rte_flow.h>
  15 #include <rte_flow_driver.h>
  16 #include <rte_malloc.h>
  17 #include <rte_cycles.h>
  18 #include <rte_bus_pci.h>
  19 #include <rte_ip.h>
  20 #include <rte_gre.h>
  21 #include <rte_vxlan.h>
  22 #include <rte_gtp.h>
  23 #include <rte_eal_paging.h>
  24 #include <rte_mpls.h>
  25 #include <rte_mtr.h>
  26 #include <rte_mtr_driver.h>
  27 #include <rte_tailq.h>
  28
  29 #include <mlx5_glue.h>
  30 #include <mlx5_devx_cmds.h>
  31 #include <mlx5_prm.h>
  32 #include <mlx5_malloc.h>
  33
  34 #include "mlx5_defs.h"
  35 #include "mlx5.h"
  36 #include "mlx5_common_os.h"
  37 #include "mlx5_flow.h"
  38 #include "mlx5_flow_os.h"
  39 #include "mlx5_rx.h"
  40 #include "mlx5_tx.h"
  41 #include "rte_pmd_mlx5.h"
  42
  43 #if defined(HAVE_IBV_FLOW_DV_SUPPORT) || !defined(HAVE_INFINIBAND_VERBS_H)
  44
  45 #ifndef HAVE_IBV_FLOW_DEVX_COUNTERS
  46 #define MLX5DV_FLOW_ACTION_COUNTERS_DEVX 0
  47 #endif
  48
  49 #ifndef HAVE_MLX5DV_DR_ESWITCH
  50 #ifndef MLX5DV_FLOW_TABLE_TYPE_FDB
  51 #define MLX5DV_FLOW_TABLE_TYPE_FDB 0
  52 #endif
  53 #endif
  54
  55 #ifndef HAVE_MLX5DV_DR
  56 #define MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL 1
  57 #endif
  58
  59 /* VLAN header definitions */
  60 #define MLX5DV_FLOW_VLAN_PCP_SHIFT 13
  61 #define MLX5DV_FLOW_VLAN_PCP_MASK (0x7 << MLX5DV_FLOW_VLAN_PCP_SHIFT)
  62 #define MLX5DV_FLOW_VLAN_VID_MASK 0x0fff
  63 #define MLX5DV_FLOW_VLAN_PCP_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK)
  64 #define MLX5DV_FLOW_VLAN_VID_MASK_BE RTE_BE16(MLX5DV_FLOW_VLAN_VID_MASK)
  65
  66 union flow_dv_attr {
  67         struct {
  68                 uint32_t valid:1;
  69                 uint32_t ipv4:1;
  70                 uint32_t ipv6:1;
  71                 uint32_t tcp:1;
  72                 uint32_t udp:1;
  73                 uint32_t reserved:27;
  74         };
  75         uint32_t attr;
  76 };
  77
  78 static int
  79 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
  80                              struct mlx5_flow_tbl_resource *tbl);
  81
  82 static int
  83 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
  84                                      uint32_t encap_decap_idx);
  85
  86 static int
  87 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
  88                                         uint32_t port_id);
  89 static void
  90 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss);
  91
  92 static int
  93 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
  94                                   uint32_t rix_jump);
  95
  96 static int16_t
  97 flow_dv_get_esw_manager_vport_id(struct rte_eth_dev *dev)
  98 {
  99         struct mlx5_priv *priv = dev->data->dev_private;
 100         struct mlx5_common_device *cdev = priv->sh->cdev;
 101
 102         if (cdev->config.hca_attr.esw_mgr_vport_id_valid)
 103                 return (int16_t)cdev->config.hca_attr.esw_mgr_vport_id;
 104
 105         if (priv->pci_dev == NULL)
 106                 return 0;
 107         switch (priv->pci_dev->id.device_id) {
 108         case PCI_DEVICE_ID_MELLANOX_CONNECTX5BF:
 109         case PCI_DEVICE_ID_MELLANOX_CONNECTX6DXBF:
 110         case PCI_DEVICE_ID_MELLANOX_CONNECTX7BF:
 111                 return (int16_t)0xfffe;
 112         default:
 113                 return 0;
 114         }
 115 }
 116
 117 /**
 118  * Initialize flow attributes structure according to flow items' types.
 119  *
 120  * flow_dv_validate() avoids multiple L3/L4 layers cases other than tunnel
 121  * mode. For tunnel mode, the items to be modified are the outermost ones.
 122  *
 123  * @param[in] item
 124  *   Pointer to item specification.
 125  * @param[out] attr
 126  *   Pointer to flow attributes structure.
 127  * @param[in] dev_flow
 128  *   Pointer to the sub flow.
 129  * @param[in] tunnel_decap
 130  *   Whether action is after tunnel decapsulation.
 131  */
 132 static void
 133 flow_dv_attr_init(const struct rte_flow_item *item, union flow_dv_attr *attr,
 134                   struct mlx5_flow *dev_flow, bool tunnel_decap)
 135 {
 136         uint64_t layers = dev_flow->handle->layers;
 137
 138         /*
 139          * If layers is already initialized, it means this dev_flow is the
 140          * suffix flow, the layers flags is set by the prefix flow. Need to
 141          * use the layer flags from prefix flow as the suffix flow may not
 142          * have the user defined items as the flow is split.
 143          */
 144         if (layers) {
 145                 if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV4)
 146                         attr->ipv4 = 1;
 147                 else if (layers & MLX5_FLOW_LAYER_OUTER_L3_IPV6)
 148                         attr->ipv6 = 1;
 149                 if (layers & MLX5_FLOW_LAYER_OUTER_L4_TCP)
 150                         attr->tcp = 1;
 151                 else if (layers & MLX5_FLOW_LAYER_OUTER_L4_UDP)
 152                         attr->udp = 1;
 153                 attr->valid = 1;
 154                 return;
 155         }
 156         for (; item->type != RTE_FLOW_ITEM_TYPE_END; item++) {
 157                 uint8_t next_protocol = 0xff;
 158                 switch (item->type) {
 159                 case RTE_FLOW_ITEM_TYPE_GRE:
 160                 case RTE_FLOW_ITEM_TYPE_NVGRE:
 161                 case RTE_FLOW_ITEM_TYPE_VXLAN:
 162                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
 163                 case RTE_FLOW_ITEM_TYPE_GENEVE:
 164                 case RTE_FLOW_ITEM_TYPE_MPLS:
 165                         if (tunnel_decap)
 166                                 attr->attr = 0;
 167                         break;
 168                 case RTE_FLOW_ITEM_TYPE_IPV4:
 169                         if (!attr->ipv6)
 170                                 attr->ipv4 = 1;
 171                         if (item->mask != NULL &&
 172                             ((const struct rte_flow_item_ipv4 *)
 173                             item->mask)->hdr.next_proto_id)
 174                                 next_protocol =
 175                                     ((const struct rte_flow_item_ipv4 *)
 176                                       (item->spec))->hdr.next_proto_id &
 177                                     ((const struct rte_flow_item_ipv4 *)
 178                                       (item->mask))->hdr.next_proto_id;
 179                         if ((next_protocol == IPPROTO_IPIP ||
 180                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 181                                 attr->attr = 0;
 182                         break;
 183                 case RTE_FLOW_ITEM_TYPE_IPV6:
 184                         if (!attr->ipv4)
 185                                 attr->ipv6 = 1;
 186                         if (item->mask != NULL &&
 187                             ((const struct rte_flow_item_ipv6 *)
 188                             item->mask)->hdr.proto)
 189                                 next_protocol =
 190                                     ((const struct rte_flow_item_ipv6 *)
 191                                       (item->spec))->hdr.proto &
 192                                     ((const struct rte_flow_item_ipv6 *)
 193                                       (item->mask))->hdr.proto;
 194                         if ((next_protocol == IPPROTO_IPIP ||
 195                             next_protocol == IPPROTO_IPV6) && tunnel_decap)
 196                                 attr->attr = 0;
 197                         break;
 198                 case RTE_FLOW_ITEM_TYPE_UDP:
 199                         if (!attr->tcp)
 200                                 attr->udp = 1;
 201                         break;
 202                 case RTE_FLOW_ITEM_TYPE_TCP:
 203                         if (!attr->udp)
 204                                 attr->tcp = 1;
 205                         break;
 206                 default:
 207                         break;
 208                 }
 209         }
 210         attr->valid = 1;
 211 }
 212
 213 /*
 214  * Convert rte_mtr_color to mlx5 color.
 215  *
 216  * @param[in] rcol
 217  *   rte_mtr_color.
 218  *
 219  * @return
 220  *   mlx5 color.
 221  */
 222 static inline int
 223 rte_col_2_mlx5_col(enum rte_color rcol)
 224 {
 225         switch (rcol) {
 226         case RTE_COLOR_GREEN:
 227                 return MLX5_FLOW_COLOR_GREEN;
 228         case RTE_COLOR_YELLOW:
 229                 return MLX5_FLOW_COLOR_YELLOW;
 230         case RTE_COLOR_RED:
 231                 return MLX5_FLOW_COLOR_RED;
 232         default:
 233                 break;
 234         }
 235         return MLX5_FLOW_COLOR_UNDEFINED;
 236 }
 237
 238 struct field_modify_info {
 239         uint32_t size; /* Size of field in protocol header, in bytes. */
 240         uint32_t offset; /* Offset of field in protocol header, in bytes. */
 241         enum mlx5_modification_field id;
 242 };
 243
 244 struct field_modify_info modify_eth[] = {
 245         {4,  0, MLX5_MODI_OUT_DMAC_47_16},
 246         {2,  4, MLX5_MODI_OUT_DMAC_15_0},
 247         {4,  6, MLX5_MODI_OUT_SMAC_47_16},
 248         {2, 10, MLX5_MODI_OUT_SMAC_15_0},
 249         {0, 0, 0},
 250 };
 251
 252 struct field_modify_info modify_vlan_out_first_vid[] = {
 253         /* Size in bits !!! */
 254         {12, 0, MLX5_MODI_OUT_FIRST_VID},
 255         {0, 0, 0},
 256 };
 257
 258 struct field_modify_info modify_ipv4[] = {
 259         {1,  1, MLX5_MODI_OUT_IP_DSCP},
 260         {1,  8, MLX5_MODI_OUT_IPV4_TTL},
 261         {4, 12, MLX5_MODI_OUT_SIPV4},
 262         {4, 16, MLX5_MODI_OUT_DIPV4},
 263         {0, 0, 0},
 264 };
 265
 266 struct field_modify_info modify_ipv6[] = {
 267         {1,  0, MLX5_MODI_OUT_IP_DSCP},
 268         {1,  7, MLX5_MODI_OUT_IPV6_HOPLIMIT},
 269         {4,  8, MLX5_MODI_OUT_SIPV6_127_96},
 270         {4, 12, MLX5_MODI_OUT_SIPV6_95_64},
 271         {4, 16, MLX5_MODI_OUT_SIPV6_63_32},
 272         {4, 20, MLX5_MODI_OUT_SIPV6_31_0},
 273         {4, 24, MLX5_MODI_OUT_DIPV6_127_96},
 274         {4, 28, MLX5_MODI_OUT_DIPV6_95_64},
 275         {4, 32, MLX5_MODI_OUT_DIPV6_63_32},
 276         {4, 36, MLX5_MODI_OUT_DIPV6_31_0},
 277         {0, 0, 0},
 278 };
 279
 280 struct field_modify_info modify_udp[] = {
 281         {2, 0, MLX5_MODI_OUT_UDP_SPORT},
 282         {2, 2, MLX5_MODI_OUT_UDP_DPORT},
 283         {0, 0, 0},
 284 };
 285
 286 struct field_modify_info modify_tcp[] = {
 287         {2, 0, MLX5_MODI_OUT_TCP_SPORT},
 288         {2, 2, MLX5_MODI_OUT_TCP_DPORT},
 289         {4, 4, MLX5_MODI_OUT_TCP_SEQ_NUM},
 290         {4, 8, MLX5_MODI_OUT_TCP_ACK_NUM},
 291         {0, 0, 0},
 292 };
 293
 294 static void
 295 mlx5_flow_tunnel_ip_check(const struct rte_flow_item *item __rte_unused,
 296                           uint8_t next_protocol, uint64_t *item_flags,
 297                           int *tunnel)
 298 {
 299         MLX5_ASSERT(item->type == RTE_FLOW_ITEM_TYPE_IPV4 ||
 300                     item->type == RTE_FLOW_ITEM_TYPE_IPV6);
 301         if (next_protocol == IPPROTO_IPIP) {
 302                 *item_flags |= MLX5_FLOW_LAYER_IPIP;
 303                 *tunnel = 1;
 304         }
 305         if (next_protocol == IPPROTO_IPV6) {
 306                 *item_flags |= MLX5_FLOW_LAYER_IPV6_ENCAP;
 307                 *tunnel = 1;
 308         }
 309 }
 310
 311 static inline struct mlx5_hlist *
 312 flow_dv_hlist_prepare(struct mlx5_dev_ctx_shared *sh, struct mlx5_hlist **phl,
 313                      const char *name, uint32_t size, bool direct_key,
 314                      bool lcores_share, void *ctx,
 315                      mlx5_list_create_cb cb_create,
 316                      mlx5_list_match_cb cb_match,
 317                      mlx5_list_remove_cb cb_remove,
 318                      mlx5_list_clone_cb cb_clone,
 319                      mlx5_list_clone_free_cb cb_clone_free,
 320                      struct rte_flow_error *error)
 321 {
 322         struct mlx5_hlist *hl;
 323         struct mlx5_hlist *expected = NULL;
 324         char s[MLX5_NAME_SIZE];
 325
 326         hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 327         if (likely(hl))
 328                 return hl;
 329         snprintf(s, sizeof(s), "%s_%s", sh->ibdev_name, name);
 330         hl = mlx5_hlist_create(s, size, direct_key, lcores_share,
 331                         ctx, cb_create, cb_match, cb_remove, cb_clone,
 332                         cb_clone_free);
 333         if (!hl) {
 334                 DRV_LOG(ERR, "%s hash creation failed", name);
 335                 rte_flow_error_set(error, ENOMEM,
 336                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
 337                                    "cannot allocate resource memory");
 338                 return NULL;
 339         }
 340         if (!__atomic_compare_exchange_n(phl, &expected, hl, false,
 341                                          __ATOMIC_SEQ_CST,
 342                                          __ATOMIC_SEQ_CST)) {
 343                 mlx5_hlist_destroy(hl);
 344                 hl = __atomic_load_n(phl, __ATOMIC_SEQ_CST);
 345         }
 346         return hl;
 347 }
 348
 349 /* Update VLAN's VID/PCP based on input rte_flow_action.
 350  *
 351  * @param[in] action
 352  *   Pointer to struct rte_flow_action.
 353  * @param[out] vlan
 354  *   Pointer to struct rte_vlan_hdr.
 355  */
 356 static void
 357 mlx5_update_vlan_vid_pcp(const struct rte_flow_action *action,
 358                          struct rte_vlan_hdr *vlan)
 359 {
 360         uint16_t vlan_tci;
 361         if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP) {
 362                 vlan_tci =
 363                     ((const struct rte_flow_action_of_set_vlan_pcp *)
 364                                                action->conf)->vlan_pcp;
 365                 vlan_tci = vlan_tci << MLX5DV_FLOW_VLAN_PCP_SHIFT;
 366                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
 367                 vlan->vlan_tci |= vlan_tci;
 368         } else if (action->type == RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID) {
 369                 vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
 370                 vlan->vlan_tci |= rte_be_to_cpu_16
 371                     (((const struct rte_flow_action_of_set_vlan_vid *)
 372                                              action->conf)->vlan_vid);
 373         }
 374 }
 375
 376 /**
 377  * Fetch 1, 2, 3 or 4 byte field from the byte array
 378  * and return as unsigned integer in host-endian format.
 379  *
 380  * @param[in] data
 381  *   Pointer to data array.
 382  * @param[in] size
 383  *   Size of field to extract.
 384  *
 385  * @return
 386  *   converted field in host endian format.
 387  */
 388 static inline uint32_t
 389 flow_dv_fetch_field(const uint8_t *data, uint32_t size)
 390 {
 391         uint32_t ret;
 392
 393         switch (size) {
 394         case 1:
 395                 ret = *data;
 396                 break;
 397         case 2:
 398                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 399                 break;
 400         case 3:
 401                 ret = rte_be_to_cpu_16(*(const unaligned_uint16_t *)data);
 402                 ret = (ret << 8) | *(data + sizeof(uint16_t));
 403                 break;
 404         case 4:
 405                 ret = rte_be_to_cpu_32(*(const unaligned_uint32_t *)data);
 406                 break;
 407         default:
 408                 MLX5_ASSERT(false);
 409                 ret = 0;
 410                 break;
 411         }
 412         return ret;
 413 }
 414
 415 /**
 416  * Convert modify-header action to DV specification.
 417  *
 418  * Data length of each action is determined by provided field description
 419  * and the item mask. Data bit offset and width of each action is determined
 420  * by provided item mask.
 421  *
 422  * @param[in] item
 423  *   Pointer to item specification.
 424  * @param[in] field
 425  *   Pointer to field modification information.
 426  *     For MLX5_MODIFICATION_TYPE_SET specifies destination field.
 427  *     For MLX5_MODIFICATION_TYPE_ADD specifies destination field.
 428  *     For MLX5_MODIFICATION_TYPE_COPY specifies source field.
 429  * @param[in] dcopy
 430  *   Destination field info for MLX5_MODIFICATION_TYPE_COPY in @type.
 431  *   Negative offset value sets the same offset as source offset.
 432  *   size field is ignored, value is taken from source field.
 433  * @param[in,out] resource
 434  *   Pointer to the modify-header resource.
 435  * @param[in] type
 436  *   Type of modification.
 437  * @param[out] error
 438  *   Pointer to the error structure.
 439  *
 440  * @return
 441  *   0 on success, a negative errno value otherwise and rte_errno is set.
 442  */
 443 static int
 444 flow_dv_convert_modify_action(struct rte_flow_item *item,
 445                               struct field_modify_info *field,
 446                               struct field_modify_info *dcopy,
 447                               struct mlx5_flow_dv_modify_hdr_resource *resource,
 448                               uint32_t type, struct rte_flow_error *error)
 449 {
 450         uint32_t i = resource->actions_num;
 451         struct mlx5_modification_cmd *actions = resource->actions;
 452         uint32_t carry_b = 0;
 453
 454         /*
 455          * The item and mask are provided in big-endian format.
 456          * The fields should be presented as in big-endian format either.
 457          * Mask must be always present, it defines the actual field width.
 458          */
 459         MLX5_ASSERT(item->mask);
 460         MLX5_ASSERT(field->size);
 461         do {
 462                 uint32_t size_b;
 463                 uint32_t off_b;
 464                 uint32_t mask;
 465                 uint32_t data;
 466                 bool next_field = true;
 467                 bool next_dcopy = true;
 468
 469                 if (i >= MLX5_MAX_MODIFY_NUM)
 470                         return rte_flow_error_set(error, EINVAL,
 471                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 472                                  "too many items to modify");
 473                 /* Fetch variable byte size mask from the array. */
 474                 mask = flow_dv_fetch_field((const uint8_t *)item->mask +
 475                                            field->offset, field->size);
 476                 if (!mask) {
 477                         ++field;
 478                         continue;
 479                 }
 480                 /* Deduce actual data width in bits from mask value. */
 481                 off_b = rte_bsf32(mask) + carry_b;
 482                 size_b = sizeof(uint32_t) * CHAR_BIT -
 483                          off_b - __builtin_clz(mask);
 484                 MLX5_ASSERT(size_b);
 485                 actions[i] = (struct mlx5_modification_cmd) {
 486                         .action_type = type,
 487                         .field = field->id,
 488                         .offset = off_b,
 489                         .length = (size_b == sizeof(uint32_t) * CHAR_BIT) ?
 490                                 0 : size_b,
 491                 };
 492                 if (type == MLX5_MODIFICATION_TYPE_COPY) {
 493                         MLX5_ASSERT(dcopy);
 494                         actions[i].dst_field = dcopy->id;
 495                         actions[i].dst_offset =
 496                                 (int)dcopy->offset < 0 ? off_b : dcopy->offset;
 497                         /* Convert entire record to big-endian format. */
 498                         actions[i].data1 = rte_cpu_to_be_32(actions[i].data1);
 499                         /*
 500                          * Destination field overflow. Copy leftovers of
 501                          * a source field to the next destination field.
 502                          */
 503                         carry_b = 0;
 504                         if ((size_b > dcopy->size * CHAR_BIT - dcopy->offset) &&
 505                             dcopy->size != 0) {
 506                                 actions[i].length =
 507                                         dcopy->size * CHAR_BIT - dcopy->offset;
 508                                 carry_b = actions[i].length;
 509                                 next_field = false;
 510                         }
 511                         /*
 512                          * Not enough bits in a source filed to fill a
 513                          * destination field. Switch to the next source.
 514                          */
 515                         if ((size_b < dcopy->size * CHAR_BIT - dcopy->offset) &&
 516                             (size_b == field->size * CHAR_BIT - off_b)) {
 517                                 actions[i].length =
 518                                         field->size * CHAR_BIT - off_b;
 519                                 dcopy->offset += actions[i].length;
 520                                 next_dcopy = false;
 521                         }
 522                         if (next_dcopy)
 523                                 ++dcopy;
 524                 } else {
 525                         MLX5_ASSERT(item->spec);
 526                         data = flow_dv_fetch_field((const uint8_t *)item->spec +
 527                                                    field->offset, field->size);
 528                         /* Shift out the trailing masked bits from data. */
 529                         data = (data & mask) >> off_b;
 530                         actions[i].data1 = rte_cpu_to_be_32(data);
 531                 }
 532                 /* Convert entire record to expected big-endian format. */
 533                 actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 534                 if (next_field)
 535                         ++field;
 536                 ++i;
 537         } while (field->size);
 538         if (resource->actions_num == i)
 539                 return rte_flow_error_set(error, EINVAL,
 540                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 541                                           "invalid modification flow item");
 542         resource->actions_num = i;
 543         return 0;
 544 }
 545
 546 /**
 547  * Convert modify-header set IPv4 address action to DV specification.
 548  *
 549  * @param[in,out] resource
 550  *   Pointer to the modify-header resource.
 551  * @param[in] action
 552  *   Pointer to action specification.
 553  * @param[out] error
 554  *   Pointer to the error structure.
 555  *
 556  * @return
 557  *   0 on success, a negative errno value otherwise and rte_errno is set.
 558  */
 559 static int
 560 flow_dv_convert_action_modify_ipv4
 561                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 562                          const struct rte_flow_action *action,
 563                          struct rte_flow_error *error)
 564 {
 565         const struct rte_flow_action_set_ipv4 *conf =
 566                 (const struct rte_flow_action_set_ipv4 *)(action->conf);
 567         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
 568         struct rte_flow_item_ipv4 ipv4;
 569         struct rte_flow_item_ipv4 ipv4_mask;
 570
 571         memset(&ipv4, 0, sizeof(ipv4));
 572         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 573         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC) {
 574                 ipv4.hdr.src_addr = conf->ipv4_addr;
 575                 ipv4_mask.hdr.src_addr = rte_flow_item_ipv4_mask.hdr.src_addr;
 576         } else {
 577                 ipv4.hdr.dst_addr = conf->ipv4_addr;
 578                 ipv4_mask.hdr.dst_addr = rte_flow_item_ipv4_mask.hdr.dst_addr;
 579         }
 580         item.spec = &ipv4;
 581         item.mask = &ipv4_mask;
 582         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
 583                                              MLX5_MODIFICATION_TYPE_SET, error);
 584 }
 585
 586 /**
 587  * Convert modify-header set IPv6 address action to DV specification.
 588  *
 589  * @param[in,out] resource
 590  *   Pointer to the modify-header resource.
 591  * @param[in] action
 592  *   Pointer to action specification.
 593  * @param[out] error
 594  *   Pointer to the error structure.
 595  *
 596  * @return
 597  *   0 on success, a negative errno value otherwise and rte_errno is set.
 598  */
 599 static int
 600 flow_dv_convert_action_modify_ipv6
 601                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 602                          const struct rte_flow_action *action,
 603                          struct rte_flow_error *error)
 604 {
 605         const struct rte_flow_action_set_ipv6 *conf =
 606                 (const struct rte_flow_action_set_ipv6 *)(action->conf);
 607         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
 608         struct rte_flow_item_ipv6 ipv6;
 609         struct rte_flow_item_ipv6 ipv6_mask;
 610
 611         memset(&ipv6, 0, sizeof(ipv6));
 612         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 613         if (action->type == RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC) {
 614                 memcpy(&ipv6.hdr.src_addr, &conf->ipv6_addr,
 615                        sizeof(ipv6.hdr.src_addr));
 616                 memcpy(&ipv6_mask.hdr.src_addr,
 617                        &rte_flow_item_ipv6_mask.hdr.src_addr,
 618                        sizeof(ipv6.hdr.src_addr));
 619         } else {
 620                 memcpy(&ipv6.hdr.dst_addr, &conf->ipv6_addr,
 621                        sizeof(ipv6.hdr.dst_addr));
 622                 memcpy(&ipv6_mask.hdr.dst_addr,
 623                        &rte_flow_item_ipv6_mask.hdr.dst_addr,
 624                        sizeof(ipv6.hdr.dst_addr));
 625         }
 626         item.spec = &ipv6;
 627         item.mask = &ipv6_mask;
 628         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
 629                                              MLX5_MODIFICATION_TYPE_SET, error);
 630 }
 631
 632 /**
 633  * Convert modify-header set MAC address action to DV specification.
 634  *
 635  * @param[in,out] resource
 636  *   Pointer to the modify-header resource.
 637  * @param[in] action
 638  *   Pointer to action specification.
 639  * @param[out] error
 640  *   Pointer to the error structure.
 641  *
 642  * @return
 643  *   0 on success, a negative errno value otherwise and rte_errno is set.
 644  */
 645 static int
 646 flow_dv_convert_action_modify_mac
 647                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 648                          const struct rte_flow_action *action,
 649                          struct rte_flow_error *error)
 650 {
 651         const struct rte_flow_action_set_mac *conf =
 652                 (const struct rte_flow_action_set_mac *)(action->conf);
 653         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_ETH };
 654         struct rte_flow_item_eth eth;
 655         struct rte_flow_item_eth eth_mask;
 656
 657         memset(&eth, 0, sizeof(eth));
 658         memset(&eth_mask, 0, sizeof(eth_mask));
 659         if (action->type == RTE_FLOW_ACTION_TYPE_SET_MAC_SRC) {
 660                 memcpy(&eth.src.addr_bytes, &conf->mac_addr,
 661                        sizeof(eth.src.addr_bytes));
 662                 memcpy(&eth_mask.src.addr_bytes,
 663                        &rte_flow_item_eth_mask.src.addr_bytes,
 664                        sizeof(eth_mask.src.addr_bytes));
 665         } else {
 666                 memcpy(&eth.dst.addr_bytes, &conf->mac_addr,
 667                        sizeof(eth.dst.addr_bytes));
 668                 memcpy(&eth_mask.dst.addr_bytes,
 669                        &rte_flow_item_eth_mask.dst.addr_bytes,
 670                        sizeof(eth_mask.dst.addr_bytes));
 671         }
 672         item.spec = &eth;
 673         item.mask = &eth_mask;
 674         return flow_dv_convert_modify_action(&item, modify_eth, NULL, resource,
 675                                              MLX5_MODIFICATION_TYPE_SET, error);
 676 }
 677
 678 /**
 679  * Convert modify-header set VLAN VID action to DV specification.
 680  *
 681  * @param[in,out] resource
 682  *   Pointer to the modify-header resource.
 683  * @param[in] action
 684  *   Pointer to action specification.
 685  * @param[out] error
 686  *   Pointer to the error structure.
 687  *
 688  * @return
 689  *   0 on success, a negative errno value otherwise and rte_errno is set.
 690  */
 691 static int
 692 flow_dv_convert_action_modify_vlan_vid
 693                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 694                          const struct rte_flow_action *action,
 695                          struct rte_flow_error *error)
 696 {
 697         const struct rte_flow_action_of_set_vlan_vid *conf =
 698                 (const struct rte_flow_action_of_set_vlan_vid *)(action->conf);
 699         int i = resource->actions_num;
 700         struct mlx5_modification_cmd *actions = resource->actions;
 701         struct field_modify_info *field = modify_vlan_out_first_vid;
 702
 703         if (i >= MLX5_MAX_MODIFY_NUM)
 704                 return rte_flow_error_set(error, EINVAL,
 705                          RTE_FLOW_ERROR_TYPE_ACTION, NULL,
 706                          "too many items to modify");
 707         actions[i] = (struct mlx5_modification_cmd) {
 708                 .action_type = MLX5_MODIFICATION_TYPE_SET,
 709                 .field = field->id,
 710                 .length = field->size,
 711                 .offset = field->offset,
 712         };
 713         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
 714         actions[i].data1 = conf->vlan_vid;
 715         actions[i].data1 = actions[i].data1 << 16;
 716         resource->actions_num = ++i;
 717         return 0;
 718 }
 719
 720 /**
 721  * Convert modify-header set TP action to DV specification.
 722  *
 723  * @param[in,out] resource
 724  *   Pointer to the modify-header resource.
 725  * @param[in] action
 726  *   Pointer to action specification.
 727  * @param[in] items
 728  *   Pointer to rte_flow_item objects list.
 729  * @param[in] attr
 730  *   Pointer to flow attributes structure.
 731  * @param[in] dev_flow
 732  *   Pointer to the sub flow.
 733  * @param[in] tunnel_decap
 734  *   Whether action is after tunnel decapsulation.
 735  * @param[out] error
 736  *   Pointer to the error structure.
 737  *
 738  * @return
 739  *   0 on success, a negative errno value otherwise and rte_errno is set.
 740  */
 741 static int
 742 flow_dv_convert_action_modify_tp
 743                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 744                          const struct rte_flow_action *action,
 745                          const struct rte_flow_item *items,
 746                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 747                          bool tunnel_decap, struct rte_flow_error *error)
 748 {
 749         const struct rte_flow_action_set_tp *conf =
 750                 (const struct rte_flow_action_set_tp *)(action->conf);
 751         struct rte_flow_item item;
 752         struct rte_flow_item_udp udp;
 753         struct rte_flow_item_udp udp_mask;
 754         struct rte_flow_item_tcp tcp;
 755         struct rte_flow_item_tcp tcp_mask;
 756         struct field_modify_info *field;
 757
 758         if (!attr->valid)
 759                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 760         if (attr->udp) {
 761                 memset(&udp, 0, sizeof(udp));
 762                 memset(&udp_mask, 0, sizeof(udp_mask));
 763                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 764                         udp.hdr.src_port = conf->port;
 765                         udp_mask.hdr.src_port =
 766                                         rte_flow_item_udp_mask.hdr.src_port;
 767                 } else {
 768                         udp.hdr.dst_port = conf->port;
 769                         udp_mask.hdr.dst_port =
 770                                         rte_flow_item_udp_mask.hdr.dst_port;
 771                 }
 772                 item.type = RTE_FLOW_ITEM_TYPE_UDP;
 773                 item.spec = &udp;
 774                 item.mask = &udp_mask;
 775                 field = modify_udp;
 776         } else {
 777                 MLX5_ASSERT(attr->tcp);
 778                 memset(&tcp, 0, sizeof(tcp));
 779                 memset(&tcp_mask, 0, sizeof(tcp_mask));
 780                 if (action->type == RTE_FLOW_ACTION_TYPE_SET_TP_SRC) {
 781                         tcp.hdr.src_port = conf->port;
 782                         tcp_mask.hdr.src_port =
 783                                         rte_flow_item_tcp_mask.hdr.src_port;
 784                 } else {
 785                         tcp.hdr.dst_port = conf->port;
 786                         tcp_mask.hdr.dst_port =
 787                                         rte_flow_item_tcp_mask.hdr.dst_port;
 788                 }
 789                 item.type = RTE_FLOW_ITEM_TYPE_TCP;
 790                 item.spec = &tcp;
 791                 item.mask = &tcp_mask;
 792                 field = modify_tcp;
 793         }
 794         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 795                                              MLX5_MODIFICATION_TYPE_SET, error);
 796 }
 797
 798 /**
 799  * Convert modify-header set TTL action to DV specification.
 800  *
 801  * @param[in,out] resource
 802  *   Pointer to the modify-header resource.
 803  * @param[in] action
 804  *   Pointer to action specification.
 805  * @param[in] items
 806  *   Pointer to rte_flow_item objects list.
 807  * @param[in] attr
 808  *   Pointer to flow attributes structure.
 809  * @param[in] dev_flow
 810  *   Pointer to the sub flow.
 811  * @param[in] tunnel_decap
 812  *   Whether action is after tunnel decapsulation.
 813  * @param[out] error
 814  *   Pointer to the error structure.
 815  *
 816  * @return
 817  *   0 on success, a negative errno value otherwise and rte_errno is set.
 818  */
 819 static int
 820 flow_dv_convert_action_modify_ttl
 821                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 822                          const struct rte_flow_action *action,
 823                          const struct rte_flow_item *items,
 824                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 825                          bool tunnel_decap, struct rte_flow_error *error)
 826 {
 827         const struct rte_flow_action_set_ttl *conf =
 828                 (const struct rte_flow_action_set_ttl *)(action->conf);
 829         struct rte_flow_item item;
 830         struct rte_flow_item_ipv4 ipv4;
 831         struct rte_flow_item_ipv4 ipv4_mask;
 832         struct rte_flow_item_ipv6 ipv6;
 833         struct rte_flow_item_ipv6 ipv6_mask;
 834         struct field_modify_info *field;
 835
 836         if (!attr->valid)
 837                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 838         if (attr->ipv4) {
 839                 memset(&ipv4, 0, sizeof(ipv4));
 840                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 841                 ipv4.hdr.time_to_live = conf->ttl_value;
 842                 ipv4_mask.hdr.time_to_live = 0xFF;
 843                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 844                 item.spec = &ipv4;
 845                 item.mask = &ipv4_mask;
 846                 field = modify_ipv4;
 847         } else {
 848                 MLX5_ASSERT(attr->ipv6);
 849                 memset(&ipv6, 0, sizeof(ipv6));
 850                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 851                 ipv6.hdr.hop_limits = conf->ttl_value;
 852                 ipv6_mask.hdr.hop_limits = 0xFF;
 853                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 854                 item.spec = &ipv6;
 855                 item.mask = &ipv6_mask;
 856                 field = modify_ipv6;
 857         }
 858         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 859                                              MLX5_MODIFICATION_TYPE_SET, error);
 860 }
 861
 862 /**
 863  * Convert modify-header decrement TTL action to DV specification.
 864  *
 865  * @param[in,out] resource
 866  *   Pointer to the modify-header resource.
 867  * @param[in] action
 868  *   Pointer to action specification.
 869  * @param[in] items
 870  *   Pointer to rte_flow_item objects list.
 871  * @param[in] attr
 872  *   Pointer to flow attributes structure.
 873  * @param[in] dev_flow
 874  *   Pointer to the sub flow.
 875  * @param[in] tunnel_decap
 876  *   Whether action is after tunnel decapsulation.
 877  * @param[out] error
 878  *   Pointer to the error structure.
 879  *
 880  * @return
 881  *   0 on success, a negative errno value otherwise and rte_errno is set.
 882  */
 883 static int
 884 flow_dv_convert_action_modify_dec_ttl
 885                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 886                          const struct rte_flow_item *items,
 887                          union flow_dv_attr *attr, struct mlx5_flow *dev_flow,
 888                          bool tunnel_decap, struct rte_flow_error *error)
 889 {
 890         struct rte_flow_item item;
 891         struct rte_flow_item_ipv4 ipv4;
 892         struct rte_flow_item_ipv4 ipv4_mask;
 893         struct rte_flow_item_ipv6 ipv6;
 894         struct rte_flow_item_ipv6 ipv6_mask;
 895         struct field_modify_info *field;
 896
 897         if (!attr->valid)
 898                 flow_dv_attr_init(items, attr, dev_flow, tunnel_decap);
 899         if (attr->ipv4) {
 900                 memset(&ipv4, 0, sizeof(ipv4));
 901                 memset(&ipv4_mask, 0, sizeof(ipv4_mask));
 902                 ipv4.hdr.time_to_live = 0xFF;
 903                 ipv4_mask.hdr.time_to_live = 0xFF;
 904                 item.type = RTE_FLOW_ITEM_TYPE_IPV4;
 905                 item.spec = &ipv4;
 906                 item.mask = &ipv4_mask;
 907                 field = modify_ipv4;
 908         } else {
 909                 MLX5_ASSERT(attr->ipv6);
 910                 memset(&ipv6, 0, sizeof(ipv6));
 911                 memset(&ipv6_mask, 0, sizeof(ipv6_mask));
 912                 ipv6.hdr.hop_limits = 0xFF;
 913                 ipv6_mask.hdr.hop_limits = 0xFF;
 914                 item.type = RTE_FLOW_ITEM_TYPE_IPV6;
 915                 item.spec = &ipv6;
 916                 item.mask = &ipv6_mask;
 917                 field = modify_ipv6;
 918         }
 919         return flow_dv_convert_modify_action(&item, field, NULL, resource,
 920                                              MLX5_MODIFICATION_TYPE_ADD, error);
 921 }
 922
 923 /**
 924  * Convert modify-header increment/decrement TCP Sequence number
 925  * to DV specification.
 926  *
 927  * @param[in,out] resource
 928  *   Pointer to the modify-header resource.
 929  * @param[in] action
 930  *   Pointer to action specification.
 931  * @param[out] error
 932  *   Pointer to the error structure.
 933  *
 934  * @return
 935  *   0 on success, a negative errno value otherwise and rte_errno is set.
 936  */
 937 static int
 938 flow_dv_convert_action_modify_tcp_seq
 939                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 940                          const struct rte_flow_action *action,
 941                          struct rte_flow_error *error)
 942 {
 943         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 944         uint64_t value = rte_be_to_cpu_32(*conf);
 945         struct rte_flow_item item;
 946         struct rte_flow_item_tcp tcp;
 947         struct rte_flow_item_tcp tcp_mask;
 948
 949         memset(&tcp, 0, sizeof(tcp));
 950         memset(&tcp_mask, 0, sizeof(tcp_mask));
 951         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ)
 952                 /*
 953                  * The HW has no decrement operation, only increment operation.
 954                  * To simulate decrement X from Y using increment operation
 955                  * we need to add UINT32_MAX X times to Y.
 956                  * Each adding of UINT32_MAX decrements Y by 1.
 957                  */
 958                 value *= UINT32_MAX;
 959         tcp.hdr.sent_seq = rte_cpu_to_be_32((uint32_t)value);
 960         tcp_mask.hdr.sent_seq = RTE_BE32(UINT32_MAX);
 961         item.type = RTE_FLOW_ITEM_TYPE_TCP;
 962         item.spec = &tcp;
 963         item.mask = &tcp_mask;
 964         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
 965                                              MLX5_MODIFICATION_TYPE_ADD, error);
 966 }
 967
 968 /**
 969  * Convert modify-header increment/decrement TCP Acknowledgment number
 970  * to DV specification.
 971  *
 972  * @param[in,out] resource
 973  *   Pointer to the modify-header resource.
 974  * @param[in] action
 975  *   Pointer to action specification.
 976  * @param[out] error
 977  *   Pointer to the error structure.
 978  *
 979  * @return
 980  *   0 on success, a negative errno value otherwise and rte_errno is set.
 981  */
 982 static int
 983 flow_dv_convert_action_modify_tcp_ack
 984                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
 985                          const struct rte_flow_action *action,
 986                          struct rte_flow_error *error)
 987 {
 988         const rte_be32_t *conf = (const rte_be32_t *)(action->conf);
 989         uint64_t value = rte_be_to_cpu_32(*conf);
 990         struct rte_flow_item item;
 991         struct rte_flow_item_tcp tcp;
 992         struct rte_flow_item_tcp tcp_mask;
 993
 994         memset(&tcp, 0, sizeof(tcp));
 995         memset(&tcp_mask, 0, sizeof(tcp_mask));
 996         if (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK)
 997                 /*
 998                  * The HW has no decrement operation, only increment operation.
 999                  * To simulate decrement X from Y using increment operation
1000                  * we need to add UINT32_MAX X times to Y.
1001                  * Each adding of UINT32_MAX decrements Y by 1.
1002                  */
1003                 value *= UINT32_MAX;
1004         tcp.hdr.recv_ack = rte_cpu_to_be_32((uint32_t)value);
1005         tcp_mask.hdr.recv_ack = RTE_BE32(UINT32_MAX);
1006         item.type = RTE_FLOW_ITEM_TYPE_TCP;
1007         item.spec = &tcp;
1008         item.mask = &tcp_mask;
1009         return flow_dv_convert_modify_action(&item, modify_tcp, NULL, resource,
1010                                              MLX5_MODIFICATION_TYPE_ADD, error);
1011 }
1012
1013 static enum mlx5_modification_field reg_to_field[] = {
1014         [REG_NON] = MLX5_MODI_OUT_NONE,
1015         [REG_A] = MLX5_MODI_META_DATA_REG_A,
1016         [REG_B] = MLX5_MODI_META_DATA_REG_B,
1017         [REG_C_0] = MLX5_MODI_META_REG_C_0,
1018         [REG_C_1] = MLX5_MODI_META_REG_C_1,
1019         [REG_C_2] = MLX5_MODI_META_REG_C_2,
1020         [REG_C_3] = MLX5_MODI_META_REG_C_3,
1021         [REG_C_4] = MLX5_MODI_META_REG_C_4,
1022         [REG_C_5] = MLX5_MODI_META_REG_C_5,
1023         [REG_C_6] = MLX5_MODI_META_REG_C_6,
1024         [REG_C_7] = MLX5_MODI_META_REG_C_7,
1025 };
1026
1027 /**
1028  * Convert register set to DV specification.
1029  *
1030  * @param[in,out] resource
1031  *   Pointer to the modify-header resource.
1032  * @param[in] action
1033  *   Pointer to action specification.
1034  * @param[out] error
1035  *   Pointer to the error structure.
1036  *
1037  * @return
1038  *   0 on success, a negative errno value otherwise and rte_errno is set.
1039  */
1040 static int
1041 flow_dv_convert_action_set_reg
1042                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1043                          const struct rte_flow_action *action,
1044                          struct rte_flow_error *error)
1045 {
1046         const struct mlx5_rte_flow_action_set_tag *conf = action->conf;
1047         struct mlx5_modification_cmd *actions = resource->actions;
1048         uint32_t i = resource->actions_num;
1049
1050         if (i >= MLX5_MAX_MODIFY_NUM)
1051                 return rte_flow_error_set(error, EINVAL,
1052                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
1053                                           "too many items to modify");
1054         MLX5_ASSERT(conf->id != REG_NON);
1055         MLX5_ASSERT(conf->id < (enum modify_reg)RTE_DIM(reg_to_field));
1056         actions[i] = (struct mlx5_modification_cmd) {
1057                 .action_type = MLX5_MODIFICATION_TYPE_SET,
1058                 .field = reg_to_field[conf->id],
1059                 .offset = conf->offset,
1060                 .length = conf->length,
1061         };
1062         actions[i].data0 = rte_cpu_to_be_32(actions[i].data0);
1063         actions[i].data1 = rte_cpu_to_be_32(conf->data);
1064         ++i;
1065         resource->actions_num = i;
1066         return 0;
1067 }
1068
1069 /**
1070  * Convert SET_TAG action to DV specification.
1071  *
1072  * @param[in] dev
1073  *   Pointer to the rte_eth_dev structure.
1074  * @param[in,out] resource
1075  *   Pointer to the modify-header resource.
1076  * @param[in] conf
1077  *   Pointer to action specification.
1078  * @param[out] error
1079  *   Pointer to the error structure.
1080  *
1081  * @return
1082  *   0 on success, a negative errno value otherwise and rte_errno is set.
1083  */
1084 static int
1085 flow_dv_convert_action_set_tag
1086                         (struct rte_eth_dev *dev,
1087                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1088                          const struct rte_flow_action_set_tag *conf,
1089                          struct rte_flow_error *error)
1090 {
1091         rte_be32_t data = rte_cpu_to_be_32(conf->data);
1092         rte_be32_t mask = rte_cpu_to_be_32(conf->mask);
1093         struct rte_flow_item item = {
1094                 .spec = &data,
1095                 .mask = &mask,
1096         };
1097         struct field_modify_info reg_c_x[] = {
1098                 [1] = {0, 0, 0},
1099         };
1100         enum mlx5_modification_field reg_type;
1101         int ret;
1102
1103         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
1104         if (ret < 0)
1105                 return ret;
1106         MLX5_ASSERT(ret != REG_NON);
1107         MLX5_ASSERT((unsigned int)ret < RTE_DIM(reg_to_field));
1108         reg_type = reg_to_field[ret];
1109         MLX5_ASSERT(reg_type > 0);
1110         reg_c_x[0] = (struct field_modify_info){4, 0, reg_type};
1111         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1112                                              MLX5_MODIFICATION_TYPE_SET, error);
1113 }
1114
1115 /**
1116  * Convert internal COPY_REG action to DV specification.
1117  *
1118  * @param[in] dev
1119  *   Pointer to the rte_eth_dev structure.
1120  * @param[in,out] res
1121  *   Pointer to the modify-header resource.
1122  * @param[in] action
1123  *   Pointer to action specification.
1124  * @param[out] error
1125  *   Pointer to the error structure.
1126  *
1127  * @return
1128  *   0 on success, a negative errno value otherwise and rte_errno is set.
1129  */
1130 static int
1131 flow_dv_convert_action_copy_mreg(struct rte_eth_dev *dev,
1132                                  struct mlx5_flow_dv_modify_hdr_resource *res,
1133                                  const struct rte_flow_action *action,
1134                                  struct rte_flow_error *error)
1135 {
1136         const struct mlx5_flow_action_copy_mreg *conf = action->conf;
1137         rte_be32_t mask = RTE_BE32(UINT32_MAX);
1138         struct rte_flow_item item = {
1139                 .spec = NULL,
1140                 .mask = &mask,
1141         };
1142         struct field_modify_info reg_src[] = {
1143                 {4, 0, reg_to_field[conf->src]},
1144                 {0, 0, 0},
1145         };
1146         struct field_modify_info reg_dst = {
1147                 .offset = 0,
1148                 .id = reg_to_field[conf->dst],
1149         };
1150         /* Adjust reg_c[0] usage according to reported mask. */
1151         if (conf->dst == REG_C_0 || conf->src == REG_C_0) {
1152                 struct mlx5_priv *priv = dev->data->dev_private;
1153                 uint32_t reg_c0 = priv->sh->dv_regc0_mask;
1154
1155                 MLX5_ASSERT(reg_c0);
1156                 MLX5_ASSERT(priv->sh->config.dv_xmeta_en !=
1157                             MLX5_XMETA_MODE_LEGACY);
1158                 if (conf->dst == REG_C_0) {
1159                         /* Copy to reg_c[0], within mask only. */
1160                         reg_dst.offset = rte_bsf32(reg_c0);
1161                         mask = rte_cpu_to_be_32(reg_c0 >> reg_dst.offset);
1162                 } else {
1163                         reg_dst.offset = 0;
1164                         mask = rte_cpu_to_be_32(reg_c0);
1165                 }
1166         }
1167         return flow_dv_convert_modify_action(&item,
1168                                              reg_src, &reg_dst, res,
1169                                              MLX5_MODIFICATION_TYPE_COPY,
1170                                              error);
1171 }
1172
1173 /**
1174  * Convert MARK action to DV specification. This routine is used
1175  * in extensive metadata only and requires metadata register to be
1176  * handled. In legacy mode hardware tag resource is engaged.
1177  *
1178  * @param[in] dev
1179  *   Pointer to the rte_eth_dev structure.
1180  * @param[in] conf
1181  *   Pointer to MARK action specification.
1182  * @param[in,out] resource
1183  *   Pointer to the modify-header resource.
1184  * @param[out] error
1185  *   Pointer to the error structure.
1186  *
1187  * @return
1188  *   0 on success, a negative errno value otherwise and rte_errno is set.
1189  */
1190 static int
1191 flow_dv_convert_action_mark(struct rte_eth_dev *dev,
1192                             const struct rte_flow_action_mark *conf,
1193                             struct mlx5_flow_dv_modify_hdr_resource *resource,
1194                             struct rte_flow_error *error)
1195 {
1196         struct mlx5_priv *priv = dev->data->dev_private;
1197         rte_be32_t mask = rte_cpu_to_be_32(MLX5_FLOW_MARK_MASK &
1198                                            priv->sh->dv_mark_mask);
1199         rte_be32_t data = rte_cpu_to_be_32(conf->id) & mask;
1200         struct rte_flow_item item = {
1201                 .spec = &data,
1202                 .mask = &mask,
1203         };
1204         struct field_modify_info reg_c_x[] = {
1205                 [1] = {0, 0, 0},
1206         };
1207         int reg;
1208
1209         if (!mask)
1210                 return rte_flow_error_set(error, EINVAL,
1211                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1212                                           NULL, "zero mark action mask");
1213         reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1214         if (reg < 0)
1215                 return reg;
1216         MLX5_ASSERT(reg > 0);
1217         if (reg == REG_C_0) {
1218                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1219                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1220
1221                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1222                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1223                 mask = rte_cpu_to_be_32(mask << shl_c0);
1224         }
1225         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1226         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1227                                              MLX5_MODIFICATION_TYPE_SET, error);
1228 }
1229
1230 /**
1231  * Get metadata register index for specified steering domain.
1232  *
1233  * @param[in] dev
1234  *   Pointer to the rte_eth_dev structure.
1235  * @param[in] attr
1236  *   Attributes of flow to determine steering domain.
1237  * @param[out] error
1238  *   Pointer to the error structure.
1239  *
1240  * @return
1241  *   positive index on success, a negative errno value otherwise
1242  *   and rte_errno is set.
1243  */
1244 static enum modify_reg
1245 flow_dv_get_metadata_reg(struct rte_eth_dev *dev,
1246                          const struct rte_flow_attr *attr,
1247                          struct rte_flow_error *error)
1248 {
1249         int reg =
1250                 mlx5_flow_get_reg_id(dev, attr->transfer ?
1251                                           MLX5_METADATA_FDB :
1252                                             attr->egress ?
1253                                             MLX5_METADATA_TX :
1254                                             MLX5_METADATA_RX, 0, error);
1255         if (reg < 0)
1256                 return rte_flow_error_set(error,
1257                                           ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM,
1258                                           NULL, "unavailable "
1259                                           "metadata register");
1260         return reg;
1261 }
1262
1263 /**
1264  * Convert SET_META action to DV specification.
1265  *
1266  * @param[in] dev
1267  *   Pointer to the rte_eth_dev structure.
1268  * @param[in,out] resource
1269  *   Pointer to the modify-header resource.
1270  * @param[in] attr
1271  *   Attributes of flow that includes this item.
1272  * @param[in] conf
1273  *   Pointer to action specification.
1274  * @param[out] error
1275  *   Pointer to the error structure.
1276  *
1277  * @return
1278  *   0 on success, a negative errno value otherwise and rte_errno is set.
1279  */
1280 static int
1281 flow_dv_convert_action_set_meta
1282                         (struct rte_eth_dev *dev,
1283                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1284                          const struct rte_flow_attr *attr,
1285                          const struct rte_flow_action_set_meta *conf,
1286                          struct rte_flow_error *error)
1287 {
1288         uint32_t mask = rte_cpu_to_be_32(conf->mask);
1289         uint32_t data = rte_cpu_to_be_32(conf->data) & mask;
1290         struct rte_flow_item item = {
1291                 .spec = &data,
1292                 .mask = &mask,
1293         };
1294         struct field_modify_info reg_c_x[] = {
1295                 [1] = {0, 0, 0},
1296         };
1297         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1298
1299         if (reg < 0)
1300                 return reg;
1301         MLX5_ASSERT(reg != REG_NON);
1302         if (reg == REG_C_0) {
1303                 struct mlx5_priv *priv = dev->data->dev_private;
1304                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
1305                 uint32_t shl_c0 = rte_bsf32(msk_c0);
1306
1307                 data = rte_cpu_to_be_32(rte_cpu_to_be_32(data) << shl_c0);
1308                 mask = rte_cpu_to_be_32(mask) & msk_c0;
1309                 mask = rte_cpu_to_be_32(mask << shl_c0);
1310         }
1311         reg_c_x[0] = (struct field_modify_info){4, 0, reg_to_field[reg]};
1312         /* The routine expects parameters in memory as big-endian ones. */
1313         return flow_dv_convert_modify_action(&item, reg_c_x, NULL, resource,
1314                                              MLX5_MODIFICATION_TYPE_SET, error);
1315 }
1316
1317 /**
1318  * Convert modify-header set IPv4 DSCP action to DV specification.
1319  *
1320  * @param[in,out] resource
1321  *   Pointer to the modify-header resource.
1322  * @param[in] action
1323  *   Pointer to action specification.
1324  * @param[out] error
1325  *   Pointer to the error structure.
1326  *
1327  * @return
1328  *   0 on success, a negative errno value otherwise and rte_errno is set.
1329  */
1330 static int
1331 flow_dv_convert_action_modify_ipv4_dscp
1332                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1333                          const struct rte_flow_action *action,
1334                          struct rte_flow_error *error)
1335 {
1336         const struct rte_flow_action_set_dscp *conf =
1337                 (const struct rte_flow_action_set_dscp *)(action->conf);
1338         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV4 };
1339         struct rte_flow_item_ipv4 ipv4;
1340         struct rte_flow_item_ipv4 ipv4_mask;
1341
1342         memset(&ipv4, 0, sizeof(ipv4));
1343         memset(&ipv4_mask, 0, sizeof(ipv4_mask));
1344         ipv4.hdr.type_of_service = conf->dscp;
1345         ipv4_mask.hdr.type_of_service = RTE_IPV4_HDR_DSCP_MASK >> 2;
1346         item.spec = &ipv4;
1347         item.mask = &ipv4_mask;
1348         return flow_dv_convert_modify_action(&item, modify_ipv4, NULL, resource,
1349                                              MLX5_MODIFICATION_TYPE_SET, error);
1350 }
1351
1352 /**
1353  * Convert modify-header set IPv6 DSCP action to DV specification.
1354  *
1355  * @param[in,out] resource
1356  *   Pointer to the modify-header resource.
1357  * @param[in] action
1358  *   Pointer to action specification.
1359  * @param[out] error
1360  *   Pointer to the error structure.
1361  *
1362  * @return
1363  *   0 on success, a negative errno value otherwise and rte_errno is set.
1364  */
1365 static int
1366 flow_dv_convert_action_modify_ipv6_dscp
1367                         (struct mlx5_flow_dv_modify_hdr_resource *resource,
1368                          const struct rte_flow_action *action,
1369                          struct rte_flow_error *error)
1370 {
1371         const struct rte_flow_action_set_dscp *conf =
1372                 (const struct rte_flow_action_set_dscp *)(action->conf);
1373         struct rte_flow_item item = { .type = RTE_FLOW_ITEM_TYPE_IPV6 };
1374         struct rte_flow_item_ipv6 ipv6;
1375         struct rte_flow_item_ipv6 ipv6_mask;
1376
1377         memset(&ipv6, 0, sizeof(ipv6));
1378         memset(&ipv6_mask, 0, sizeof(ipv6_mask));
1379         /*
1380          * Even though the DSCP bits offset of IPv6 is not byte aligned,
1381          * rdma-core only accept the DSCP bits byte aligned start from
1382          * bit 0 to 5 as to be compatible with IPv4. No need to shift the
1383          * bits in IPv6 case as rdma-core requires byte aligned value.
1384          */
1385         ipv6.hdr.vtc_flow = conf->dscp;
1386         ipv6_mask.hdr.vtc_flow = RTE_IPV6_HDR_DSCP_MASK >> 22;
1387         item.spec = &ipv6;
1388         item.mask = &ipv6_mask;
1389         return flow_dv_convert_modify_action(&item, modify_ipv6, NULL, resource,
1390                                              MLX5_MODIFICATION_TYPE_SET, error);
1391 }
1392
1393 static int
1394 mlx5_flow_item_field_width(struct rte_eth_dev *dev,
1395                            enum rte_flow_field_id field, int inherit,
1396                            const struct rte_flow_attr *attr,
1397                            struct rte_flow_error *error)
1398 {
1399         struct mlx5_priv *priv = dev->data->dev_private;
1400
1401         switch (field) {
1402         case RTE_FLOW_FIELD_START:
1403                 return 32;
1404         case RTE_FLOW_FIELD_MAC_DST:
1405         case RTE_FLOW_FIELD_MAC_SRC:
1406                 return 48;
1407         case RTE_FLOW_FIELD_VLAN_TYPE:
1408                 return 16;
1409         case RTE_FLOW_FIELD_VLAN_ID:
1410                 return 12;
1411         case RTE_FLOW_FIELD_MAC_TYPE:
1412                 return 16;
1413         case RTE_FLOW_FIELD_IPV4_DSCP:
1414                 return 6;
1415         case RTE_FLOW_FIELD_IPV4_TTL:
1416                 return 8;
1417         case RTE_FLOW_FIELD_IPV4_SRC:
1418         case RTE_FLOW_FIELD_IPV4_DST:
1419                 return 32;
1420         case RTE_FLOW_FIELD_IPV6_DSCP:
1421                 return 6;
1422         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1423                 return 8;
1424         case RTE_FLOW_FIELD_IPV6_SRC:
1425         case RTE_FLOW_FIELD_IPV6_DST:
1426                 return 128;
1427         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1428         case RTE_FLOW_FIELD_TCP_PORT_DST:
1429                 return 16;
1430         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1431         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1432                 return 32;
1433         case RTE_FLOW_FIELD_TCP_FLAGS:
1434                 return 9;
1435         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1436         case RTE_FLOW_FIELD_UDP_PORT_DST:
1437                 return 16;
1438         case RTE_FLOW_FIELD_VXLAN_VNI:
1439         case RTE_FLOW_FIELD_GENEVE_VNI:
1440                 return 24;
1441         case RTE_FLOW_FIELD_GTP_TEID:
1442         case RTE_FLOW_FIELD_TAG:
1443                 return 32;
1444         case RTE_FLOW_FIELD_MARK:
1445                 return __builtin_popcount(priv->sh->dv_mark_mask);
1446         case RTE_FLOW_FIELD_META:
1447                 return (flow_dv_get_metadata_reg(dev, attr, error) == REG_C_0) ?
1448                         __builtin_popcount(priv->sh->dv_meta_mask) : 32;
1449         case RTE_FLOW_FIELD_POINTER:
1450         case RTE_FLOW_FIELD_VALUE:
1451                 return inherit < 0 ? 0 : inherit;
1452         default:
1453                 MLX5_ASSERT(false);
1454         }
1455         return 0;
1456 }
1457
1458 static void
1459 mlx5_flow_field_id_to_modify_info
1460                 (const struct rte_flow_action_modify_data *data,
1461                  struct field_modify_info *info, uint32_t *mask,
1462                  uint32_t width, struct rte_eth_dev *dev,
1463                  const struct rte_flow_attr *attr, struct rte_flow_error *error)
1464 {
1465         struct mlx5_priv *priv = dev->data->dev_private;
1466         uint32_t idx = 0;
1467         uint32_t off = 0;
1468
1469         switch (data->field) {
1470         case RTE_FLOW_FIELD_START:
1471                 /* not supported yet */
1472                 MLX5_ASSERT(false);
1473                 break;
1474         case RTE_FLOW_FIELD_MAC_DST:
1475                 off = data->offset > 16 ? data->offset - 16 : 0;
1476                 if (mask) {
1477                         if (data->offset < 16) {
1478                                 info[idx] = (struct field_modify_info){2, 4,
1479                                                 MLX5_MODI_OUT_DMAC_15_0};
1480                                 if (width < 16) {
1481                                         mask[1] = rte_cpu_to_be_16(0xffff >>
1482                                                                  (16 - width));
1483                                         width = 0;
1484                                 } else {
1485                                         mask[1] = RTE_BE16(0xffff);
1486                                         width -= 16;
1487                                 }
1488                                 if (!width)
1489                                         break;
1490                                 ++idx;
1491                         }
1492                         info[idx] = (struct field_modify_info){4, 0,
1493                                                 MLX5_MODI_OUT_DMAC_47_16};
1494                         mask[0] = rte_cpu_to_be_32((0xffffffff >>
1495                                                     (32 - width)) << off);
1496                 } else {
1497                         if (data->offset < 16)
1498                                 info[idx++] = (struct field_modify_info){2, 0,
1499                                                 MLX5_MODI_OUT_DMAC_15_0};
1500                         info[idx] = (struct field_modify_info){4, off,
1501                                                 MLX5_MODI_OUT_DMAC_47_16};
1502                 }
1503                 break;
1504         case RTE_FLOW_FIELD_MAC_SRC:
1505                 off = data->offset > 16 ? data->offset - 16 : 0;
1506                 if (mask) {
1507                         if (data->offset < 16) {
1508                                 info[idx] = (struct field_modify_info){2, 4,
1509                                                 MLX5_MODI_OUT_SMAC_15_0};
1510                                 if (width < 16) {
1511                                         mask[1] = rte_cpu_to_be_16(0xffff >>
1512                                                                  (16 - width));
1513                                         width = 0;
1514                                 } else {
1515                                         mask[1] = RTE_BE16(0xffff);
1516                                         width -= 16;
1517                                 }
1518                                 if (!width)
1519                                         break;
1520                                 ++idx;
1521                         }
1522                         info[idx] = (struct field_modify_info){4, 0,
1523                                                 MLX5_MODI_OUT_SMAC_47_16};
1524                         mask[0] = rte_cpu_to_be_32((0xffffffff >>
1525                                                     (32 - width)) << off);
1526                 } else {
1527                         if (data->offset < 16)
1528                                 info[idx++] = (struct field_modify_info){2, 0,
1529                                                 MLX5_MODI_OUT_SMAC_15_0};
1530                         info[idx] = (struct field_modify_info){4, off,
1531                                                 MLX5_MODI_OUT_SMAC_47_16};
1532                 }
1533                 break;
1534         case RTE_FLOW_FIELD_VLAN_TYPE:
1535                 /* not supported yet */
1536                 break;
1537         case RTE_FLOW_FIELD_VLAN_ID:
1538                 info[idx] = (struct field_modify_info){2, 0,
1539                                         MLX5_MODI_OUT_FIRST_VID};
1540                 if (mask)
1541                         mask[idx] = rte_cpu_to_be_16(0x0fff >> (12 - width));
1542                 break;
1543         case RTE_FLOW_FIELD_MAC_TYPE:
1544                 info[idx] = (struct field_modify_info){2, 0,
1545                                         MLX5_MODI_OUT_ETHERTYPE};
1546                 if (mask)
1547                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1548                 break;
1549         case RTE_FLOW_FIELD_IPV4_DSCP:
1550                 info[idx] = (struct field_modify_info){1, 0,
1551                                         MLX5_MODI_OUT_IP_DSCP};
1552                 if (mask)
1553                         mask[idx] = 0x3f >> (6 - width);
1554                 break;
1555         case RTE_FLOW_FIELD_IPV4_TTL:
1556                 info[idx] = (struct field_modify_info){1, 0,
1557                                         MLX5_MODI_OUT_IPV4_TTL};
1558                 if (mask)
1559                         mask[idx] = 0xff >> (8 - width);
1560                 break;
1561         case RTE_FLOW_FIELD_IPV4_SRC:
1562                 info[idx] = (struct field_modify_info){4, 0,
1563                                         MLX5_MODI_OUT_SIPV4};
1564                 if (mask)
1565                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1566                                                      (32 - width));
1567                 break;
1568         case RTE_FLOW_FIELD_IPV4_DST:
1569                 info[idx] = (struct field_modify_info){4, 0,
1570                                         MLX5_MODI_OUT_DIPV4};
1571                 if (mask)
1572                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1573                                                      (32 - width));
1574                 break;
1575         case RTE_FLOW_FIELD_IPV6_DSCP:
1576                 info[idx] = (struct field_modify_info){1, 0,
1577                                         MLX5_MODI_OUT_IP_DSCP};
1578                 if (mask)
1579                         mask[idx] = 0x3f >> (6 - width);
1580                 break;
1581         case RTE_FLOW_FIELD_IPV6_HOPLIMIT:
1582                 info[idx] = (struct field_modify_info){1, 0,
1583                                         MLX5_MODI_OUT_IPV6_HOPLIMIT};
1584                 if (mask)
1585                         mask[idx] = 0xff >> (8 - width);
1586                 break;
1587         case RTE_FLOW_FIELD_IPV6_SRC:
1588                 if (mask) {
1589                         if (data->offset < 32) {
1590                                 info[idx] = (struct field_modify_info){4, 12,
1591                                                 MLX5_MODI_OUT_SIPV6_31_0};
1592                                 if (width < 32) {
1593                                         mask[3] =
1594                                                 rte_cpu_to_be_32(0xffffffff >>
1595                                                                  (32 - width));
1596                                         width = 0;
1597                                 } else {
1598                                         mask[3] = RTE_BE32(0xffffffff);
1599                                         width -= 32;
1600                                 }
1601                                 if (!width)
1602                                         break;
1603                                 ++idx;
1604                         }
1605                         if (data->offset < 64) {
1606                                 info[idx] = (struct field_modify_info){4, 8,
1607                                                 MLX5_MODI_OUT_SIPV6_63_32};
1608                                 if (width < 32) {
1609                                         mask[2] =
1610                                                 rte_cpu_to_be_32(0xffffffff >>
1611                                                                  (32 - width));
1612                                         width = 0;
1613                                 } else {
1614                                         mask[2] = RTE_BE32(0xffffffff);
1615                                         width -= 32;
1616                                 }
1617                                 if (!width)
1618                                         break;
1619                                 ++idx;
1620                         }
1621                         if (data->offset < 96) {
1622                                 info[idx] = (struct field_modify_info){4, 4,
1623                                                 MLX5_MODI_OUT_SIPV6_95_64};
1624                                 if (width < 32) {
1625                                         mask[1] =
1626                                                 rte_cpu_to_be_32(0xffffffff >>
1627                                                                  (32 - width));
1628                                         width = 0;
1629                                 } else {
1630                                         mask[1] = RTE_BE32(0xffffffff);
1631                                         width -= 32;
1632                                 }
1633                                 if (!width)
1634                                         break;
1635                                 ++idx;
1636                         }
1637                         info[idx] = (struct field_modify_info){4, 0,
1638                                                 MLX5_MODI_OUT_SIPV6_127_96};
1639                         mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1640                 } else {
1641                         if (data->offset < 32)
1642                                 info[idx++] = (struct field_modify_info){4, 0,
1643                                                 MLX5_MODI_OUT_SIPV6_31_0};
1644                         if (data->offset < 64)
1645                                 info[idx++] = (struct field_modify_info){4, 0,
1646                                                 MLX5_MODI_OUT_SIPV6_63_32};
1647                         if (data->offset < 96)
1648                                 info[idx++] = (struct field_modify_info){4, 0,
1649                                                 MLX5_MODI_OUT_SIPV6_95_64};
1650                         if (data->offset < 128)
1651                                 info[idx++] = (struct field_modify_info){4, 0,
1652                                                 MLX5_MODI_OUT_SIPV6_127_96};
1653                 }
1654                 break;
1655         case RTE_FLOW_FIELD_IPV6_DST:
1656                 if (mask) {
1657                         if (data->offset < 32) {
1658                                 info[idx] = (struct field_modify_info){4, 12,
1659                                                 MLX5_MODI_OUT_DIPV6_31_0};
1660                                 if (width < 32) {
1661                                         mask[3] =
1662                                                 rte_cpu_to_be_32(0xffffffff >>
1663                                                                  (32 - width));
1664                                         width = 0;
1665                                 } else {
1666                                         mask[3] = RTE_BE32(0xffffffff);
1667                                         width -= 32;
1668                                 }
1669                                 if (!width)
1670                                         break;
1671                                 ++idx;
1672                         }
1673                         if (data->offset < 64) {
1674                                 info[idx] = (struct field_modify_info){4, 8,
1675                                                 MLX5_MODI_OUT_DIPV6_63_32};
1676                                 if (width < 32) {
1677                                         mask[2] =
1678                                                 rte_cpu_to_be_32(0xffffffff >>
1679                                                                  (32 - width));
1680                                         width = 0;
1681                                 } else {
1682                                         mask[2] = RTE_BE32(0xffffffff);
1683                                         width -= 32;
1684                                 }
1685                                 if (!width)
1686                                         break;
1687                                 ++idx;
1688                         }
1689                         if (data->offset < 96) {
1690                                 info[idx] = (struct field_modify_info){4, 4,
1691                                                 MLX5_MODI_OUT_DIPV6_95_64};
1692                                 if (width < 32) {
1693                                         mask[1] =
1694                                                 rte_cpu_to_be_32(0xffffffff >>
1695                                                                  (32 - width));
1696                                         width = 0;
1697                                 } else {
1698                                         mask[1] = RTE_BE32(0xffffffff);
1699                                         width -= 32;
1700                                 }
1701                                 if (!width)
1702                                         break;
1703                                 ++idx;
1704                         }
1705                         info[idx] = (struct field_modify_info){4, 0,
1706                                                 MLX5_MODI_OUT_DIPV6_127_96};
1707                         mask[0] = rte_cpu_to_be_32(0xffffffff >> (32 - width));
1708                 } else {
1709                         if (data->offset < 32)
1710                                 info[idx++] = (struct field_modify_info){4, 0,
1711                                                 MLX5_MODI_OUT_DIPV6_31_0};
1712                         if (data->offset < 64)
1713                                 info[idx++] = (struct field_modify_info){4, 0,
1714                                                 MLX5_MODI_OUT_DIPV6_63_32};
1715                         if (data->offset < 96)
1716                                 info[idx++] = (struct field_modify_info){4, 0,
1717                                                 MLX5_MODI_OUT_DIPV6_95_64};
1718                         if (data->offset < 128)
1719                                 info[idx++] = (struct field_modify_info){4, 0,
1720                                                 MLX5_MODI_OUT_DIPV6_127_96};
1721                 }
1722                 break;
1723         case RTE_FLOW_FIELD_TCP_PORT_SRC:
1724                 info[idx] = (struct field_modify_info){2, 0,
1725                                         MLX5_MODI_OUT_TCP_SPORT};
1726                 if (mask)
1727                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1728                 break;
1729         case RTE_FLOW_FIELD_TCP_PORT_DST:
1730                 info[idx] = (struct field_modify_info){2, 0,
1731                                         MLX5_MODI_OUT_TCP_DPORT};
1732                 if (mask)
1733                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1734                 break;
1735         case RTE_FLOW_FIELD_TCP_SEQ_NUM:
1736                 info[idx] = (struct field_modify_info){4, 0,
1737                                         MLX5_MODI_OUT_TCP_SEQ_NUM};
1738                 if (mask)
1739                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1740                                                      (32 - width));
1741                 break;
1742         case RTE_FLOW_FIELD_TCP_ACK_NUM:
1743                 info[idx] = (struct field_modify_info){4, 0,
1744                                         MLX5_MODI_OUT_TCP_ACK_NUM};
1745                 if (mask)
1746                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1747                                                      (32 - width));
1748                 break;
1749         case RTE_FLOW_FIELD_TCP_FLAGS:
1750                 info[idx] = (struct field_modify_info){2, 0,
1751                                         MLX5_MODI_OUT_TCP_FLAGS};
1752                 if (mask)
1753                         mask[idx] = rte_cpu_to_be_16(0x1ff >> (9 - width));
1754                 break;
1755         case RTE_FLOW_FIELD_UDP_PORT_SRC:
1756                 info[idx] = (struct field_modify_info){2, 0,
1757                                         MLX5_MODI_OUT_UDP_SPORT};
1758                 if (mask)
1759                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1760                 break;
1761         case RTE_FLOW_FIELD_UDP_PORT_DST:
1762                 info[idx] = (struct field_modify_info){2, 0,
1763                                         MLX5_MODI_OUT_UDP_DPORT};
1764                 if (mask)
1765                         mask[idx] = rte_cpu_to_be_16(0xffff >> (16 - width));
1766                 break;
1767         case RTE_FLOW_FIELD_VXLAN_VNI:
1768                 /* not supported yet */
1769                 break;
1770         case RTE_FLOW_FIELD_GENEVE_VNI:
1771                 /* not supported yet*/
1772                 break;
1773         case RTE_FLOW_FIELD_GTP_TEID:
1774                 info[idx] = (struct field_modify_info){4, 0,
1775                                         MLX5_MODI_GTP_TEID};
1776                 if (mask)
1777                         mask[idx] = rte_cpu_to_be_32(0xffffffff >>
1778                                                      (32 - width));
1779                 break;
1780         case RTE_FLOW_FIELD_TAG:
1781                 {
1782                         int reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG,
1783                                                    data->level, error);
1784                         if (reg < 0)
1785                                 return;
1786                         MLX5_ASSERT(reg != REG_NON);
1787                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1788                         info[idx] = (struct field_modify_info){4, 0,
1789                                                 reg_to_field[reg]};
1790                         if (mask)
1791                                 mask[idx] =
1792                                         rte_cpu_to_be_32(0xffffffff >>
1793                                                          (32 - width));
1794                 }
1795                 break;
1796         case RTE_FLOW_FIELD_MARK:
1797                 {
1798                         uint32_t mark_mask = priv->sh->dv_mark_mask;
1799                         uint32_t mark_count = __builtin_popcount(mark_mask);
1800                         int reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK,
1801                                                        0, error);
1802                         if (reg < 0)
1803                                 return;
1804                         MLX5_ASSERT(reg != REG_NON);
1805                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1806                         info[idx] = (struct field_modify_info){4, 0,
1807                                                 reg_to_field[reg]};
1808                         if (mask)
1809                                 mask[idx] = rte_cpu_to_be_32((mark_mask >>
1810                                          (mark_count - width)) & mark_mask);
1811                 }
1812                 break;
1813         case RTE_FLOW_FIELD_META:
1814                 {
1815                         uint32_t meta_mask = priv->sh->dv_meta_mask;
1816                         uint32_t meta_count = __builtin_popcount(meta_mask);
1817                         int reg = flow_dv_get_metadata_reg(dev, attr, error);
1818                         if (reg < 0)
1819                                 return;
1820                         MLX5_ASSERT(reg != REG_NON);
1821                         MLX5_ASSERT((unsigned int)reg < RTE_DIM(reg_to_field));
1822                         info[idx] = (struct field_modify_info){4, 0,
1823                                                 reg_to_field[reg]};
1824                         if (mask)
1825                                 mask[idx] = rte_cpu_to_be_32((meta_mask >>
1826                                         (meta_count - width)) & meta_mask);
1827                 }
1828                 break;
1829         case RTE_FLOW_FIELD_POINTER:
1830         case RTE_FLOW_FIELD_VALUE:
1831         default:
1832                 MLX5_ASSERT(false);
1833                 break;
1834         }
1835 }
1836
1837 /**
1838  * Convert modify_field action to DV specification.
1839  *
1840  * @param[in] dev
1841  *   Pointer to the rte_eth_dev structure.
1842  * @param[in,out] resource
1843  *   Pointer to the modify-header resource.
1844  * @param[in] action
1845  *   Pointer to action specification.
1846  * @param[in] attr
1847  *   Attributes of flow that includes this item.
1848  * @param[out] error
1849  *   Pointer to the error structure.
1850  *
1851  * @return
1852  *   0 on success, a negative errno value otherwise and rte_errno is set.
1853  */
1854 static int
1855 flow_dv_convert_action_modify_field
1856                         (struct rte_eth_dev *dev,
1857                          struct mlx5_flow_dv_modify_hdr_resource *resource,
1858                          const struct rte_flow_action *action,
1859                          const struct rte_flow_attr *attr,
1860                          struct rte_flow_error *error)
1861 {
1862         const struct rte_flow_action_modify_field *conf =
1863                 (const struct rte_flow_action_modify_field *)(action->conf);
1864         struct rte_flow_item item = {
1865                 .spec = NULL,
1866                 .mask = NULL
1867         };
1868         struct field_modify_info field[MLX5_ACT_MAX_MOD_FIELDS] = {
1869                                                                 {0, 0, 0} };
1870         struct field_modify_info dcopy[MLX5_ACT_MAX_MOD_FIELDS] = {
1871                                                                 {0, 0, 0} };
1872         uint32_t mask[MLX5_ACT_MAX_MOD_FIELDS] = {0, 0, 0, 0, 0};
1873         uint32_t type, meta = 0;
1874
1875         if (conf->src.field == RTE_FLOW_FIELD_POINTER ||
1876             conf->src.field == RTE_FLOW_FIELD_VALUE) {
1877                 type = MLX5_MODIFICATION_TYPE_SET;
1878                 /** For SET fill the destination field (field) first. */
1879                 mlx5_flow_field_id_to_modify_info(&conf->dst, field, mask,
1880                                                   conf->width, dev,
1881                                                   attr, error);
1882                 item.spec = conf->src.field == RTE_FLOW_FIELD_POINTER ?
1883                                         (void *)(uintptr_t)conf->src.pvalue :
1884                                         (void *)(uintptr_t)&conf->src.value;
1885                 if (conf->dst.field == RTE_FLOW_FIELD_META) {
1886                         meta = *(const unaligned_uint32_t *)item.spec;
1887                         meta = rte_cpu_to_be_32(meta);
1888                         item.spec = &meta;
1889                 }
1890         } else {
1891                 type = MLX5_MODIFICATION_TYPE_COPY;
1892                 /** For COPY fill the destination field (dcopy) without mask. */
1893                 mlx5_flow_field_id_to_modify_info(&conf->dst, dcopy, NULL,
1894                                                   conf->width, dev,
1895                                                   attr, error);
1896                 /** Then construct the source field (field) with mask. */
1897                 mlx5_flow_field_id_to_modify_info(&conf->src, field, mask,
1898                                                   conf->width, dev,
1899                                                   attr, error);
1900         }
1901         item.mask = &mask;
1902         return flow_dv_convert_modify_action(&item,
1903                         field, dcopy, resource, type, error);
1904 }
1905
1906 /**
1907  * Validate MARK item.
1908  *
1909  * @param[in] dev
1910  *   Pointer to the rte_eth_dev structure.
1911  * @param[in] item
1912  *   Item specification.
1913  * @param[in] attr
1914  *   Attributes of flow that includes this item.
1915  * @param[out] error
1916  *   Pointer to error structure.
1917  *
1918  * @return
1919  *   0 on success, a negative errno value otherwise and rte_errno is set.
1920  */
1921 static int
1922 flow_dv_validate_item_mark(struct rte_eth_dev *dev,
1923                            const struct rte_flow_item *item,
1924                            const struct rte_flow_attr *attr __rte_unused,
1925                            struct rte_flow_error *error)
1926 {
1927         struct mlx5_priv *priv = dev->data->dev_private;
1928         struct mlx5_sh_config *config = &priv->sh->config;
1929         const struct rte_flow_item_mark *spec = item->spec;
1930         const struct rte_flow_item_mark *mask = item->mask;
1931         const struct rte_flow_item_mark nic_mask = {
1932                 .id = priv->sh->dv_mark_mask,
1933         };
1934         int ret;
1935
1936         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
1937                 return rte_flow_error_set(error, ENOTSUP,
1938                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1939                                           "extended metadata feature"
1940                                           " isn't enabled");
1941         if (!mlx5_flow_ext_mreg_supported(dev))
1942                 return rte_flow_error_set(error, ENOTSUP,
1943                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1944                                           "extended metadata register"
1945                                           " isn't supported");
1946         if (!nic_mask.id)
1947                 return rte_flow_error_set(error, ENOTSUP,
1948                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
1949                                           "extended metadata register"
1950                                           " isn't available");
1951         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
1952         if (ret < 0)
1953                 return ret;
1954         if (!spec)
1955                 return rte_flow_error_set(error, EINVAL,
1956                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
1957                                           item->spec,
1958                                           "data cannot be empty");
1959         if (spec->id >= (MLX5_FLOW_MARK_MAX & nic_mask.id))
1960                 return rte_flow_error_set(error, EINVAL,
1961                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
1962                                           &spec->id,
1963                                           "mark id exceeds the limit");
1964         if (!mask)
1965                 mask = &nic_mask;
1966         if (!mask->id)
1967                 return rte_flow_error_set(error, EINVAL,
1968                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
1969                                         "mask cannot be zero");
1970
1971         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
1972                                         (const uint8_t *)&nic_mask,
1973                                         sizeof(struct rte_flow_item_mark),
1974                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
1975         if (ret < 0)
1976                 return ret;
1977         return 0;
1978 }
1979
1980 /**
1981  * Validate META item.
1982  *
1983  * @param[in] dev
1984  *   Pointer to the rte_eth_dev structure.
1985  * @param[in] item
1986  *   Item specification.
1987  * @param[in] attr
1988  *   Attributes of flow that includes this item.
1989  * @param[out] error
1990  *   Pointer to error structure.
1991  *
1992  * @return
1993  *   0 on success, a negative errno value otherwise and rte_errno is set.
1994  */
1995 static int
1996 flow_dv_validate_item_meta(struct rte_eth_dev *dev __rte_unused,
1997                            const struct rte_flow_item *item,
1998                            const struct rte_flow_attr *attr,
1999                            struct rte_flow_error *error)
2000 {
2001         struct mlx5_priv *priv = dev->data->dev_private;
2002         struct mlx5_sh_config *config = &priv->sh->config;
2003         const struct rte_flow_item_meta *spec = item->spec;
2004         const struct rte_flow_item_meta *mask = item->mask;
2005         struct rte_flow_item_meta nic_mask = {
2006                 .data = UINT32_MAX
2007         };
2008         int reg;
2009         int ret;
2010
2011         if (!spec)
2012                 return rte_flow_error_set(error, EINVAL,
2013                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2014                                           item->spec,
2015                                           "data cannot be empty");
2016         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
2017                 if (!mlx5_flow_ext_mreg_supported(dev))
2018                         return rte_flow_error_set(error, ENOTSUP,
2019                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2020                                           "extended metadata register"
2021                                           " isn't supported");
2022                 reg = flow_dv_get_metadata_reg(dev, attr, error);
2023                 if (reg < 0)
2024                         return reg;
2025                 if (reg == REG_NON)
2026                         return rte_flow_error_set(error, ENOTSUP,
2027                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2028                                         "unavailable extended metadata register");
2029                 if (reg == REG_B)
2030                         return rte_flow_error_set(error, ENOTSUP,
2031                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2032                                           "match on reg_b "
2033                                           "isn't supported");
2034                 if (reg != REG_A)
2035                         nic_mask.data = priv->sh->dv_meta_mask;
2036         } else {
2037                 if (attr->transfer)
2038                         return rte_flow_error_set(error, ENOTSUP,
2039                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2040                                         "extended metadata feature "
2041                                         "should be enabled when "
2042                                         "meta item is requested "
2043                                         "with e-switch mode ");
2044                 if (attr->ingress)
2045                         return rte_flow_error_set(error, ENOTSUP,
2046                                         RTE_FLOW_ERROR_TYPE_ITEM, item,
2047                                         "match on metadata for ingress "
2048                                         "is not supported in legacy "
2049                                         "metadata mode");
2050         }
2051         if (!mask)
2052                 mask = &rte_flow_item_meta_mask;
2053         if (!mask->data)
2054                 return rte_flow_error_set(error, EINVAL,
2055                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2056                                         "mask cannot be zero");
2057
2058         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2059                                         (const uint8_t *)&nic_mask,
2060                                         sizeof(struct rte_flow_item_meta),
2061                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2062         return ret;
2063 }
2064
2065 /**
2066  * Validate TAG item.
2067  *
2068  * @param[in] dev
2069  *   Pointer to the rte_eth_dev structure.
2070  * @param[in] item
2071  *   Item specification.
2072  * @param[in] attr
2073  *   Attributes of flow that includes this item.
2074  * @param[out] error
2075  *   Pointer to error structure.
2076  *
2077  * @return
2078  *   0 on success, a negative errno value otherwise and rte_errno is set.
2079  */
2080 static int
2081 flow_dv_validate_item_tag(struct rte_eth_dev *dev,
2082                           const struct rte_flow_item *item,
2083                           const struct rte_flow_attr *attr __rte_unused,
2084                           struct rte_flow_error *error)
2085 {
2086         const struct rte_flow_item_tag *spec = item->spec;
2087         const struct rte_flow_item_tag *mask = item->mask;
2088         const struct rte_flow_item_tag nic_mask = {
2089                 .data = RTE_BE32(UINT32_MAX),
2090                 .index = 0xff,
2091         };
2092         int ret;
2093
2094         if (!mlx5_flow_ext_mreg_supported(dev))
2095                 return rte_flow_error_set(error, ENOTSUP,
2096                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2097                                           "extensive metadata register"
2098                                           " isn't supported");
2099         if (!spec)
2100                 return rte_flow_error_set(error, EINVAL,
2101                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
2102                                           item->spec,
2103                                           "data cannot be empty");
2104         if (!mask)
2105                 mask = &rte_flow_item_tag_mask;
2106         if (!mask->data)
2107                 return rte_flow_error_set(error, EINVAL,
2108                                         RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2109                                         "mask cannot be zero");
2110
2111         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2112                                         (const uint8_t *)&nic_mask,
2113                                         sizeof(struct rte_flow_item_tag),
2114                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2115         if (ret < 0)
2116                 return ret;
2117         if (mask->index != 0xff)
2118                 return rte_flow_error_set(error, EINVAL,
2119                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, NULL,
2120                                           "partial mask for tag index"
2121                                           " is not supported");
2122         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, spec->index, error);
2123         if (ret < 0)
2124                 return ret;
2125         MLX5_ASSERT(ret != REG_NON);
2126         return 0;
2127 }
2128
2129 /**
2130  * Validate vport item.
2131  *
2132  * @param[in] dev
2133  *   Pointer to the rte_eth_dev structure.
2134  * @param[in] item
2135  *   Item specification.
2136  * @param[in] attr
2137  *   Attributes of flow that includes this item.
2138  * @param[in] item_flags
2139  *   Bit-fields that holds the items detected until now.
2140  * @param[out] error
2141  *   Pointer to error structure.
2142  *
2143  * @return
2144  *   0 on success, a negative errno value otherwise and rte_errno is set.
2145  */
2146 static int
2147 flow_dv_validate_item_port_id(struct rte_eth_dev *dev,
2148                               const struct rte_flow_item *item,
2149                               const struct rte_flow_attr *attr,
2150                               uint64_t item_flags,
2151                               struct rte_flow_error *error)
2152 {
2153         const struct rte_flow_item_port_id *spec = item->spec;
2154         const struct rte_flow_item_port_id *mask = item->mask;
2155         const struct rte_flow_item_port_id switch_mask = {
2156                         .id = 0xffffffff,
2157         };
2158         struct mlx5_priv *esw_priv;
2159         struct mlx5_priv *dev_priv;
2160         int ret;
2161
2162         if (!attr->transfer)
2163                 return rte_flow_error_set(error, EINVAL,
2164                                           RTE_FLOW_ERROR_TYPE_ITEM,
2165                                           NULL,
2166                                           "match on port id is valid only"
2167                                           " when transfer flag is enabled");
2168         if (item_flags & MLX5_FLOW_ITEM_PORT_ID)
2169                 return rte_flow_error_set(error, ENOTSUP,
2170                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2171                                           "multiple source ports are not"
2172                                           " supported");
2173         if (!mask)
2174                 mask = &switch_mask;
2175         if (mask->id != 0xffffffff)
2176                 return rte_flow_error_set(error, ENOTSUP,
2177                                            RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2178                                            mask,
2179                                            "no support for partial mask on"
2180                                            " \"id\" field");
2181         ret = mlx5_flow_item_acceptable
2182                                 (item, (const uint8_t *)mask,
2183                                  (const uint8_t *)&rte_flow_item_port_id_mask,
2184                                  sizeof(struct rte_flow_item_port_id),
2185                                  MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2186         if (ret)
2187                 return ret;
2188         if (!spec)
2189                 return 0;
2190         if (spec->id == MLX5_PORT_ESW_MGR)
2191                 return 0;
2192         esw_priv = mlx5_port_to_eswitch_info(spec->id, false);
2193         if (!esw_priv)
2194                 return rte_flow_error_set(error, rte_errno,
2195                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2196                                           "failed to obtain E-Switch info for"
2197                                           " port");
2198         dev_priv = mlx5_dev_to_eswitch_info(dev);
2199         if (!dev_priv)
2200                 return rte_flow_error_set(error, rte_errno,
2201                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2202                                           NULL,
2203                                           "failed to obtain E-Switch info");
2204         if (esw_priv->domain_id != dev_priv->domain_id)
2205                 return rte_flow_error_set(error, EINVAL,
2206                                           RTE_FLOW_ERROR_TYPE_ITEM_SPEC, spec,
2207                                           "cannot match on a port from a"
2208                                           " different E-Switch");
2209         return 0;
2210 }
2211
2212 /**
2213  * Validate VLAN item.
2214  *
2215  * @param[in] item
2216  *   Item specification.
2217  * @param[in] item_flags
2218  *   Bit-fields that holds the items detected until now.
2219  * @param[in] dev
2220  *   Ethernet device flow is being created on.
2221  * @param[out] error
2222  *   Pointer to error structure.
2223  *
2224  * @return
2225  *   0 on success, a negative errno value otherwise and rte_errno is set.
2226  */
2227 static int
2228 flow_dv_validate_item_vlan(const struct rte_flow_item *item,
2229                            uint64_t item_flags,
2230                            struct rte_eth_dev *dev,
2231                            struct rte_flow_error *error)
2232 {
2233         const struct rte_flow_item_vlan *mask = item->mask;
2234         const struct rte_flow_item_vlan nic_mask = {
2235                 .tci = RTE_BE16(UINT16_MAX),
2236                 .inner_type = RTE_BE16(UINT16_MAX),
2237                 .has_more_vlan = 1,
2238         };
2239         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2240         int ret;
2241         const uint64_t l34m = tunnel ? (MLX5_FLOW_LAYER_INNER_L3 |
2242                                         MLX5_FLOW_LAYER_INNER_L4) :
2243                                        (MLX5_FLOW_LAYER_OUTER_L3 |
2244                                         MLX5_FLOW_LAYER_OUTER_L4);
2245         const uint64_t vlanm = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
2246                                         MLX5_FLOW_LAYER_OUTER_VLAN;
2247
2248         if (item_flags & vlanm)
2249                 return rte_flow_error_set(error, EINVAL,
2250                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2251                                           "multiple VLAN layers not supported");
2252         else if ((item_flags & l34m) != 0)
2253                 return rte_flow_error_set(error, EINVAL,
2254                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2255                                           "VLAN cannot follow L3/L4 layer");
2256         if (!mask)
2257                 mask = &rte_flow_item_vlan_mask;
2258         ret = mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2259                                         (const uint8_t *)&nic_mask,
2260                                         sizeof(struct rte_flow_item_vlan),
2261                                         MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2262         if (ret)
2263                 return ret;
2264         if (!tunnel && mask->tci != RTE_BE16(0x0fff)) {
2265                 struct mlx5_priv *priv = dev->data->dev_private;
2266
2267                 if (priv->vmwa_context) {
2268                         /*
2269                          * Non-NULL context means we have a virtual machine
2270                          * and SR-IOV enabled, we have to create VLAN interface
2271                          * to make hypervisor to setup E-Switch vport
2272                          * context correctly. We avoid creating the multiple
2273                          * VLAN interfaces, so we cannot support VLAN tag mask.
2274                          */
2275                         return rte_flow_error_set(error, EINVAL,
2276                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2277                                                   item,
2278                                                   "VLAN tag mask is not"
2279                                                   " supported in virtual"
2280                                                   " environment");
2281                 }
2282         }
2283         return 0;
2284 }
2285
2286 /*
2287  * GTP flags are contained in 1 byte of the format:
2288  * -------------------------------------------
2289  * | bit   | 0 - 2   | 3  | 4   | 5 | 6 | 7  |
2290  * |-----------------------------------------|
2291  * | value | Version | PT | Res | E | S | PN |
2292  * -------------------------------------------
2293  *
2294  * Matching is supported only for GTP flags E, S, PN.
2295  */
2296 #define MLX5_GTP_FLAGS_MASK     0x07
2297
2298 /**
2299  * Validate GTP item.
2300  *
2301  * @param[in] dev
2302  *   Pointer to the rte_eth_dev structure.
2303  * @param[in] item
2304  *   Item specification.
2305  * @param[in] item_flags
2306  *   Bit-fields that holds the items detected until now.
2307  * @param[out] error
2308  *   Pointer to error structure.
2309  *
2310  * @return
2311  *   0 on success, a negative errno value otherwise and rte_errno is set.
2312  */
2313 static int
2314 flow_dv_validate_item_gtp(struct rte_eth_dev *dev,
2315                           const struct rte_flow_item *item,
2316                           uint64_t item_flags,
2317                           struct rte_flow_error *error)
2318 {
2319         struct mlx5_priv *priv = dev->data->dev_private;
2320         const struct rte_flow_item_gtp *spec = item->spec;
2321         const struct rte_flow_item_gtp *mask = item->mask;
2322         const struct rte_flow_item_gtp nic_mask = {
2323                 .v_pt_rsv_flags = MLX5_GTP_FLAGS_MASK,
2324                 .msg_type = 0xff,
2325                 .teid = RTE_BE32(0xffffffff),
2326         };
2327
2328         if (!priv->sh->cdev->config.hca_attr.tunnel_stateless_gtp)
2329                 return rte_flow_error_set(error, ENOTSUP,
2330                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2331                                           "GTP support is not enabled");
2332         if (item_flags & MLX5_FLOW_LAYER_TUNNEL)
2333                 return rte_flow_error_set(error, ENOTSUP,
2334                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2335                                           "multiple tunnel layers not"
2336                                           " supported");
2337         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_UDP))
2338                 return rte_flow_error_set(error, EINVAL,
2339                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2340                                           "no outer UDP layer found");
2341         if (!mask)
2342                 mask = &rte_flow_item_gtp_mask;
2343         if (spec && spec->v_pt_rsv_flags & ~MLX5_GTP_FLAGS_MASK)
2344                 return rte_flow_error_set(error, ENOTSUP,
2345                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2346                                           "Match is supported for GTP"
2347                                           " flags only");
2348         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2349                                          (const uint8_t *)&nic_mask,
2350                                          sizeof(struct rte_flow_item_gtp),
2351                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2352 }
2353
2354 /**
2355  * Validate GTP PSC item.
2356  *
2357  * @param[in] item
2358  *   Item specification.
2359  * @param[in] last_item
2360  *   Previous validated item in the pattern items.
2361  * @param[in] gtp_item
2362  *   Previous GTP item specification.
2363  * @param[in] attr
2364  *   Pointer to flow attributes.
2365  * @param[out] error
2366  *   Pointer to error structure.
2367  *
2368  * @return
2369  *   0 on success, a negative errno value otherwise and rte_errno is set.
2370  */
2371 static int
2372 flow_dv_validate_item_gtp_psc(const struct rte_flow_item *item,
2373                               uint64_t last_item,
2374                               const struct rte_flow_item *gtp_item,
2375                               const struct rte_flow_attr *attr,
2376                               struct rte_flow_error *error)
2377 {
2378         const struct rte_flow_item_gtp *gtp_spec;
2379         const struct rte_flow_item_gtp *gtp_mask;
2380         const struct rte_flow_item_gtp_psc *mask;
2381         const struct rte_flow_item_gtp_psc nic_mask = {
2382                 .hdr.type = 0xF,
2383                 .hdr.qfi = 0x3F,
2384         };
2385
2386         if (!gtp_item || !(last_item & MLX5_FLOW_LAYER_GTP))
2387                 return rte_flow_error_set
2388                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2389                          "GTP PSC item must be preceded with GTP item");
2390         gtp_spec = gtp_item->spec;
2391         gtp_mask = gtp_item->mask ? gtp_item->mask : &rte_flow_item_gtp_mask;
2392         /* GTP spec and E flag is requested to match zero. */
2393         if (gtp_spec &&
2394                 (gtp_mask->v_pt_rsv_flags &
2395                 ~gtp_spec->v_pt_rsv_flags & MLX5_GTP_EXT_HEADER_FLAG))
2396                 return rte_flow_error_set
2397                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_ITEM, item,
2398                          "GTP E flag must be 1 to match GTP PSC");
2399         /* Check the flow is not created in group zero. */
2400         if (!attr->transfer && !attr->group)
2401                 return rte_flow_error_set
2402                         (error, ENOTSUP, RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2403                          "GTP PSC is not supported for group 0");
2404         /* GTP spec is here and E flag is requested to match zero. */
2405         if (!item->spec)
2406                 return 0;
2407         mask = item->mask ? item->mask : &rte_flow_item_gtp_psc_mask;
2408         return mlx5_flow_item_acceptable(item, (const uint8_t *)mask,
2409                                          (const uint8_t *)&nic_mask,
2410                                          sizeof(struct rte_flow_item_gtp_psc),
2411                                          MLX5_ITEM_RANGE_NOT_ACCEPTED, error);
2412 }
2413
2414 /**
2415  * Validate IPV4 item.
2416  * Use existing validation function mlx5_flow_validate_item_ipv4(), and
2417  * add specific validation of fragment_offset field,
2418  *
2419  * @param[in] item
2420  *   Item specification.
2421  * @param[in] item_flags
2422  *   Bit-fields that holds the items detected until now.
2423  * @param[out] error
2424  *   Pointer to error structure.
2425  *
2426  * @return
2427  *   0 on success, a negative errno value otherwise and rte_errno is set.
2428  */
2429 static int
2430 flow_dv_validate_item_ipv4(struct rte_eth_dev *dev,
2431                            const struct rte_flow_item *item,
2432                            uint64_t item_flags, uint64_t last_item,
2433                            uint16_t ether_type, struct rte_flow_error *error)
2434 {
2435         int ret;
2436         struct mlx5_priv *priv = dev->data->dev_private;
2437         struct mlx5_hca_attr *attr = &priv->sh->cdev->config.hca_attr;
2438         const struct rte_flow_item_ipv4 *spec = item->spec;
2439         const struct rte_flow_item_ipv4 *last = item->last;
2440         const struct rte_flow_item_ipv4 *mask = item->mask;
2441         rte_be16_t fragment_offset_spec = 0;
2442         rte_be16_t fragment_offset_last = 0;
2443         struct rte_flow_item_ipv4 nic_ipv4_mask = {
2444                 .hdr = {
2445                         .src_addr = RTE_BE32(0xffffffff),
2446                         .dst_addr = RTE_BE32(0xffffffff),
2447                         .type_of_service = 0xff,
2448                         .fragment_offset = RTE_BE16(0xffff),
2449                         .next_proto_id = 0xff,
2450                         .time_to_live = 0xff,
2451                 },
2452         };
2453
2454         if (mask && (mask->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK)) {
2455                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2456                 bool ihl_cap = !tunnel ?
2457                                attr->outer_ipv4_ihl : attr->inner_ipv4_ihl;
2458                 if (!ihl_cap)
2459                         return rte_flow_error_set(error, ENOTSUP,
2460                                                   RTE_FLOW_ERROR_TYPE_ITEM,
2461                                                   item,
2462                                                   "IPV4 ihl offload not supported");
2463                 nic_ipv4_mask.hdr.version_ihl = mask->hdr.version_ihl;
2464         }
2465         ret = mlx5_flow_validate_item_ipv4(item, item_flags, last_item,
2466                                            ether_type, &nic_ipv4_mask,
2467                                            MLX5_ITEM_RANGE_ACCEPTED, error);
2468         if (ret < 0)
2469                 return ret;
2470         if (spec && mask)
2471                 fragment_offset_spec = spec->hdr.fragment_offset &
2472                                        mask->hdr.fragment_offset;
2473         if (!fragment_offset_spec)
2474                 return 0;
2475         /*
2476          * spec and mask are valid, enforce using full mask to make sure the
2477          * complete value is used correctly.
2478          */
2479         if ((mask->hdr.fragment_offset & RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2480                         != RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2481                 return rte_flow_error_set(error, EINVAL,
2482                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2483                                           item, "must use full mask for"
2484                                           " fragment_offset");
2485         /*
2486          * Match on fragment_offset 0x2000 means MF is 1 and frag-offset is 0,
2487          * indicating this is 1st fragment of fragmented packet.
2488          * This is not yet supported in MLX5, return appropriate error message.
2489          */
2490         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG))
2491                 return rte_flow_error_set(error, ENOTSUP,
2492                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2493                                           "match on first fragment not "
2494                                           "supported");
2495         if (fragment_offset_spec && !last)
2496                 return rte_flow_error_set(error, ENOTSUP,
2497                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2498                                           "specified value not supported");
2499         /* spec and last are valid, validate the specified range. */
2500         fragment_offset_last = last->hdr.fragment_offset &
2501                                mask->hdr.fragment_offset;
2502         /*
2503          * Match on fragment_offset spec 0x2001 and last 0x3fff
2504          * means MF is 1 and frag-offset is > 0.
2505          * This packet is fragment 2nd and onward, excluding last.
2506          * This is not yet supported in MLX5, return appropriate
2507          * error message.
2508          */
2509         if (fragment_offset_spec == RTE_BE16(RTE_IPV4_HDR_MF_FLAG + 1) &&
2510             fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK))
2511                 return rte_flow_error_set(error, ENOTSUP,
2512                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2513                                           last, "match on following "
2514                                           "fragments not supported");
2515         /*
2516          * Match on fragment_offset spec 0x0001 and last 0x1fff
2517          * means MF is 0 and frag-offset is > 0.
2518          * This packet is last fragment of fragmented packet.
2519          * This is not yet supported in MLX5, return appropriate
2520          * error message.
2521          */
2522         if (fragment_offset_spec == RTE_BE16(1) &&
2523             fragment_offset_last == RTE_BE16(RTE_IPV4_HDR_OFFSET_MASK))
2524                 return rte_flow_error_set(error, ENOTSUP,
2525                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2526                                           last, "match on last "
2527                                           "fragment not supported");
2528         /*
2529          * Match on fragment_offset spec 0x0001 and last 0x3fff
2530          * means MF and/or frag-offset is not 0.
2531          * This is a fragmented packet.
2532          * Other range values are invalid and rejected.
2533          */
2534         if (!(fragment_offset_spec == RTE_BE16(1) &&
2535               fragment_offset_last == RTE_BE16(MLX5_IPV4_FRAG_OFFSET_MASK)))
2536                 return rte_flow_error_set(error, ENOTSUP,
2537                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2538                                           "specified range not supported");
2539         return 0;
2540 }
2541
2542 /**
2543  * Validate IPV6 fragment extension item.
2544  *
2545  * @param[in] item
2546  *   Item specification.
2547  * @param[in] item_flags
2548  *   Bit-fields that holds the items detected until now.
2549  * @param[out] error
2550  *   Pointer to error structure.
2551  *
2552  * @return
2553  *   0 on success, a negative errno value otherwise and rte_errno is set.
2554  */
2555 static int
2556 flow_dv_validate_item_ipv6_frag_ext(const struct rte_flow_item *item,
2557                                     uint64_t item_flags,
2558                                     struct rte_flow_error *error)
2559 {
2560         const struct rte_flow_item_ipv6_frag_ext *spec = item->spec;
2561         const struct rte_flow_item_ipv6_frag_ext *last = item->last;
2562         const struct rte_flow_item_ipv6_frag_ext *mask = item->mask;
2563         rte_be16_t frag_data_spec = 0;
2564         rte_be16_t frag_data_last = 0;
2565         const int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
2566         const uint64_t l4m = tunnel ? MLX5_FLOW_LAYER_INNER_L4 :
2567                                       MLX5_FLOW_LAYER_OUTER_L4;
2568         int ret = 0;
2569         struct rte_flow_item_ipv6_frag_ext nic_mask = {
2570                 .hdr = {
2571                         .next_header = 0xff,
2572                         .frag_data = RTE_BE16(0xffff),
2573                 },
2574         };
2575
2576         if (item_flags & l4m)
2577                 return rte_flow_error_set(error, EINVAL,
2578                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2579                                           "ipv6 fragment extension item cannot "
2580                                           "follow L4 item.");
2581         if ((tunnel && !(item_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
2582             (!tunnel && !(item_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV6)))
2583                 return rte_flow_error_set(error, EINVAL,
2584                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2585                                           "ipv6 fragment extension item must "
2586                                           "follow ipv6 item");
2587         if (spec && mask)
2588                 frag_data_spec = spec->hdr.frag_data & mask->hdr.frag_data;
2589         if (!frag_data_spec)
2590                 return 0;
2591         /*
2592          * spec and mask are valid, enforce using full mask to make sure the
2593          * complete value is used correctly.
2594          */
2595         if ((mask->hdr.frag_data & RTE_BE16(RTE_IPV6_FRAG_USED_MASK)) !=
2596                                 RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2597                 return rte_flow_error_set(error, EINVAL,
2598                                           RTE_FLOW_ERROR_TYPE_ITEM_MASK,
2599                                           item, "must use full mask for"
2600                                           " frag_data");
2601         /*
2602          * Match on frag_data 0x00001 means M is 1 and frag-offset is 0.
2603          * This is 1st fragment of fragmented packet.
2604          */
2605         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_MF_MASK))
2606                 return rte_flow_error_set(error, ENOTSUP,
2607                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2608                                           "match on first fragment not "
2609                                           "supported");
2610         if (frag_data_spec && !last)
2611                 return rte_flow_error_set(error, EINVAL,
2612                                           RTE_FLOW_ERROR_TYPE_ITEM, item,
2613                                           "specified value not supported");
2614         ret = mlx5_flow_item_acceptable
2615                                 (item, (const uint8_t *)mask,
2616                                  (const uint8_t *)&nic_mask,
2617                                  sizeof(struct rte_flow_item_ipv6_frag_ext),
2618                                  MLX5_ITEM_RANGE_ACCEPTED, error);
2619         if (ret)
2620                 return ret;
2621         /* spec and last are valid, validate the specified range. */
2622         frag_data_last = last->hdr.frag_data & mask->hdr.frag_data;
2623         /*
2624          * Match on frag_data spec 0x0009 and last 0xfff9
2625          * means M is 1 and frag-offset is > 0.
2626          * This packet is fragment 2nd and onward, excluding last.
2627          * This is not yet supported in MLX5, return appropriate
2628          * error message.
2629          */
2630         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN |
2631                                        RTE_IPV6_EHDR_MF_MASK) &&
2632             frag_data_last == RTE_BE16(RTE_IPV6_FRAG_USED_MASK))
2633                 return rte_flow_error_set(error, ENOTSUP,
2634                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2635                                           last, "match on following "
2636                                           "fragments not supported");
2637         /*
2638          * Match on frag_data spec 0x0008 and last 0xfff8
2639          * means M is 0 and frag-offset is > 0.
2640          * This packet is last fragment of fragmented packet.
2641          * This is not yet supported in MLX5, return appropriate
2642          * error message.
2643          */
2644         if (frag_data_spec == RTE_BE16(RTE_IPV6_EHDR_FO_ALIGN) &&
2645             frag_data_last == RTE_BE16(RTE_IPV6_EHDR_FO_MASK))
2646                 return rte_flow_error_set(error, ENOTSUP,
2647                                           RTE_FLOW_ERROR_TYPE_ITEM_LAST,
2648                                           last, "match on last "
2649                                           "fragment not supported");
2650         /* Other range values are invalid and rejected. */
2651         return rte_flow_error_set(error, EINVAL,
2652                                   RTE_FLOW_ERROR_TYPE_ITEM_LAST, last,
2653                                   "specified range not supported");
2654 }
2655
2656 /*
2657  * Validate ASO CT item.
2658  *
2659  * @param[in] dev
2660  *   Pointer to the rte_eth_dev structure.
2661  * @param[in] item
2662  *   Item specification.
2663  * @param[in] item_flags
2664  *   Pointer to bit-fields that holds the items detected until now.
2665  * @param[out] error
2666  *   Pointer to error structure.
2667  *
2668  * @return
2669  *   0 on success, a negative errno value otherwise and rte_errno is set.
2670  */
2671 static int
2672 flow_dv_validate_item_aso_ct(struct rte_eth_dev *dev,
2673                              const struct rte_flow_item *item,
2674                              uint64_t *item_flags,
2675                              struct rte_flow_error *error)
2676 {
2677         const struct rte_flow_item_conntrack *spec = item->spec;
2678         const struct rte_flow_item_conntrack *mask = item->mask;
2679         RTE_SET_USED(dev);
2680         uint32_t flags;
2681
2682         if (*item_flags & MLX5_FLOW_LAYER_ASO_CT)
2683                 return rte_flow_error_set(error, EINVAL,
2684                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2685                                           "Only one CT is supported");
2686         if (!mask)
2687                 mask = &rte_flow_item_conntrack_mask;
2688         flags = spec->flags & mask->flags;
2689         if ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID) &&
2690             ((flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID) ||
2691              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD) ||
2692              (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)))
2693                 return rte_flow_error_set(error, EINVAL,
2694                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
2695                                           "Conflict status bits");
2696         /* State change also needs to be considered. */
2697         *item_flags |= MLX5_FLOW_LAYER_ASO_CT;
2698         return 0;
2699 }
2700
2701 /**
2702  * Validate the pop VLAN action.
2703  *
2704  * @param[in] dev
2705  *   Pointer to the rte_eth_dev structure.
2706  * @param[in] action_flags
2707  *   Holds the actions detected until now.
2708  * @param[in] action
2709  *   Pointer to the pop vlan action.
2710  * @param[in] item_flags
2711  *   The items found in this flow rule.
2712  * @param[in] attr
2713  *   Pointer to flow attributes.
2714  * @param[out] error
2715  *   Pointer to error structure.
2716  *
2717  * @return
2718  *   0 on success, a negative errno value otherwise and rte_errno is set.
2719  */
2720 static int
2721 flow_dv_validate_action_pop_vlan(struct rte_eth_dev *dev,
2722                                  uint64_t action_flags,
2723                                  const struct rte_flow_action *action,
2724                                  uint64_t item_flags,
2725                                  const struct rte_flow_attr *attr,
2726                                  struct rte_flow_error *error)
2727 {
2728         const struct mlx5_priv *priv = dev->data->dev_private;
2729         struct mlx5_dev_ctx_shared *sh = priv->sh;
2730         bool direction_error = false;
2731
2732         if (!priv->sh->pop_vlan_action)
2733                 return rte_flow_error_set(error, ENOTSUP,
2734                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2735                                           NULL,
2736                                           "pop vlan action is not supported");
2737         /* Pop VLAN is not supported in egress except for CX6 FDB mode. */
2738         if (attr->transfer) {
2739                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2740                 bool is_cx5 = sh->steering_format_version ==
2741                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2742
2743                 if (fdb_tx && is_cx5)
2744                         direction_error = true;
2745         } else if (attr->egress) {
2746                 direction_error = true;
2747         }
2748         if (direction_error)
2749                 return rte_flow_error_set(error, ENOTSUP,
2750                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
2751                                           NULL,
2752                                           "pop vlan action not supported for egress");
2753         if (action_flags & MLX5_FLOW_VLAN_ACTIONS)
2754                 return rte_flow_error_set(error, ENOTSUP,
2755                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2756                                           "no support for multiple VLAN "
2757                                           "actions");
2758         /* Pop VLAN with preceding Decap requires inner header with VLAN. */
2759         if ((action_flags & MLX5_FLOW_ACTION_DECAP) &&
2760             !(item_flags & MLX5_FLOW_LAYER_INNER_VLAN))
2761                 return rte_flow_error_set(error, ENOTSUP,
2762                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2763                                           NULL,
2764                                           "cannot pop vlan after decap without "
2765                                           "match on inner vlan in the flow");
2766         /* Pop VLAN without preceding Decap requires outer header with VLAN. */
2767         if (!(action_flags & MLX5_FLOW_ACTION_DECAP) &&
2768             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
2769                 return rte_flow_error_set(error, ENOTSUP,
2770                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
2771                                           NULL,
2772                                           "cannot pop vlan without a "
2773                                           "match on (outer) vlan in the flow");
2774         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2775                 return rte_flow_error_set(error, EINVAL,
2776                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2777                                           "wrong action order, port_id should "
2778                                           "be after pop VLAN action");
2779         if (!attr->transfer && priv->representor)
2780                 return rte_flow_error_set(error, ENOTSUP,
2781                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2782                                           "pop vlan action for VF representor "
2783                                           "not supported on NIC table");
2784         return 0;
2785 }
2786
2787 /**
2788  * Get VLAN default info from vlan match info.
2789  *
2790  * @param[in] items
2791  *   the list of item specifications.
2792  * @param[out] vlan
2793  *   pointer VLAN info to fill to.
2794  *
2795  * @return
2796  *   0 on success, a negative errno value otherwise and rte_errno is set.
2797  */
2798 static void
2799 flow_dev_get_vlan_info_from_items(const struct rte_flow_item *items,
2800                                   struct rte_vlan_hdr *vlan)
2801 {
2802         const struct rte_flow_item_vlan nic_mask = {
2803                 .tci = RTE_BE16(MLX5DV_FLOW_VLAN_PCP_MASK |
2804                                 MLX5DV_FLOW_VLAN_VID_MASK),
2805                 .inner_type = RTE_BE16(0xffff),
2806         };
2807
2808         if (items == NULL)
2809                 return;
2810         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
2811                 int type = items->type;
2812
2813                 if (type == RTE_FLOW_ITEM_TYPE_VLAN ||
2814                     type == MLX5_RTE_FLOW_ITEM_TYPE_VLAN)
2815                         break;
2816         }
2817         if (items->type != RTE_FLOW_ITEM_TYPE_END) {
2818                 const struct rte_flow_item_vlan *vlan_m = items->mask;
2819                 const struct rte_flow_item_vlan *vlan_v = items->spec;
2820
2821                 /* If VLAN item in pattern doesn't contain data, return here. */
2822                 if (!vlan_v)
2823                         return;
2824                 if (!vlan_m)
2825                         vlan_m = &nic_mask;
2826                 /* Only full match values are accepted */
2827                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) ==
2828                      MLX5DV_FLOW_VLAN_PCP_MASK_BE) {
2829                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_PCP_MASK;
2830                         vlan->vlan_tci |=
2831                                 rte_be_to_cpu_16(vlan_v->tci &
2832                                                  MLX5DV_FLOW_VLAN_PCP_MASK_BE);
2833                 }
2834                 if ((vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) ==
2835                      MLX5DV_FLOW_VLAN_VID_MASK_BE) {
2836                         vlan->vlan_tci &= ~MLX5DV_FLOW_VLAN_VID_MASK;
2837                         vlan->vlan_tci |=
2838                                 rte_be_to_cpu_16(vlan_v->tci &
2839                                                  MLX5DV_FLOW_VLAN_VID_MASK_BE);
2840                 }
2841                 if (vlan_m->inner_type == nic_mask.inner_type)
2842                         vlan->eth_proto = rte_be_to_cpu_16(vlan_v->inner_type &
2843                                                            vlan_m->inner_type);
2844         }
2845 }
2846
2847 /**
2848  * Validate the push VLAN action.
2849  *
2850  * @param[in] dev
2851  *   Pointer to the rte_eth_dev structure.
2852  * @param[in] action_flags
2853  *   Holds the actions detected until now.
2854  * @param[in] item_flags
2855  *   The items found in this flow rule.
2856  * @param[in] action
2857  *   Pointer to the action structure.
2858  * @param[in] attr
2859  *   Pointer to flow attributes
2860  * @param[out] error
2861  *   Pointer to error structure.
2862  *
2863  * @return
2864  *   0 on success, a negative errno value otherwise and rte_errno is set.
2865  */
2866 static int
2867 flow_dv_validate_action_push_vlan(struct rte_eth_dev *dev,
2868                                   uint64_t action_flags,
2869                                   const struct rte_flow_item_vlan *vlan_m,
2870                                   const struct rte_flow_action *action,
2871                                   const struct rte_flow_attr *attr,
2872                                   struct rte_flow_error *error)
2873 {
2874         const struct rte_flow_action_of_push_vlan *push_vlan = action->conf;
2875         const struct mlx5_priv *priv = dev->data->dev_private;
2876         struct mlx5_dev_ctx_shared *sh = priv->sh;
2877         bool direction_error = false;
2878
2879         if (push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_VLAN) &&
2880             push_vlan->ethertype != RTE_BE16(RTE_ETHER_TYPE_QINQ))
2881                 return rte_flow_error_set(error, EINVAL,
2882                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2883                                           "invalid vlan ethertype");
2884         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2885                 return rte_flow_error_set(error, EINVAL,
2886                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2887                                           "wrong action order, port_id should "
2888                                           "be after push VLAN");
2889         /* Push VLAN is not supported in ingress except for CX6 FDB mode. */
2890         if (attr->transfer) {
2891                 bool fdb_tx = priv->representor_id != UINT16_MAX;
2892                 bool is_cx5 = sh->steering_format_version ==
2893                     MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5;
2894
2895                 if (!fdb_tx && is_cx5)
2896                         direction_error = true;
2897         } else if (attr->ingress) {
2898                 direction_error = true;
2899         }
2900         if (direction_error)
2901                 return rte_flow_error_set(error, ENOTSUP,
2902                                           RTE_FLOW_ERROR_TYPE_ATTR_INGRESS,
2903                                           NULL,
2904                                           "push vlan action not supported for ingress");
2905         if (!attr->transfer && priv->representor)
2906                 return rte_flow_error_set(error, ENOTSUP,
2907                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
2908                                           "push vlan action for VF representor "
2909                                           "not supported on NIC table");
2910         if (vlan_m &&
2911             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) &&
2912             (vlan_m->tci & MLX5DV_FLOW_VLAN_PCP_MASK_BE) !=
2913                 MLX5DV_FLOW_VLAN_PCP_MASK_BE &&
2914             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP) &&
2915             !(mlx5_flow_find_action
2916                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP)))
2917                 return rte_flow_error_set(error, EINVAL,
2918                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2919                                           "not full match mask on VLAN PCP and "
2920                                           "there is no of_set_vlan_pcp action, "
2921                                           "push VLAN action cannot figure out "
2922                                           "PCP value");
2923         if (vlan_m &&
2924             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) &&
2925             (vlan_m->tci & MLX5DV_FLOW_VLAN_VID_MASK_BE) !=
2926                 MLX5DV_FLOW_VLAN_VID_MASK_BE &&
2927             !(action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID) &&
2928             !(mlx5_flow_find_action
2929                 (action + 1, RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID)))
2930                 return rte_flow_error_set(error, EINVAL,
2931                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2932                                           "not full match mask on VLAN VID and "
2933                                           "there is no of_set_vlan_vid action, "
2934                                           "push VLAN action cannot figure out "
2935                                           "VID value");
2936         (void)attr;
2937         return 0;
2938 }
2939
2940 /**
2941  * Validate the set VLAN PCP.
2942  *
2943  * @param[in] action_flags
2944  *   Holds the actions detected until now.
2945  * @param[in] actions
2946  *   Pointer to the list of actions remaining in the flow rule.
2947  * @param[out] error
2948  *   Pointer to error structure.
2949  *
2950  * @return
2951  *   0 on success, a negative errno value otherwise and rte_errno is set.
2952  */
2953 static int
2954 flow_dv_validate_action_set_vlan_pcp(uint64_t action_flags,
2955                                      const struct rte_flow_action actions[],
2956                                      struct rte_flow_error *error)
2957 {
2958         const struct rte_flow_action *action = actions;
2959         const struct rte_flow_action_of_set_vlan_pcp *conf = action->conf;
2960
2961         if (conf->vlan_pcp > 7)
2962                 return rte_flow_error_set(error, EINVAL,
2963                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2964                                           "VLAN PCP value is too big");
2965         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN))
2966                 return rte_flow_error_set(error, ENOTSUP,
2967                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2968                                           "set VLAN PCP action must follow "
2969                                           "the push VLAN action");
2970         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_PCP)
2971                 return rte_flow_error_set(error, ENOTSUP,
2972                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2973                                           "Multiple VLAN PCP modification are "
2974                                           "not supported");
2975         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
2976                 return rte_flow_error_set(error, EINVAL,
2977                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
2978                                           "wrong action order, port_id should "
2979                                           "be after set VLAN PCP");
2980         return 0;
2981 }
2982
2983 /**
2984  * Validate the set VLAN VID.
2985  *
2986  * @param[in] item_flags
2987  *   Holds the items detected in this rule.
2988  * @param[in] action_flags
2989  *   Holds the actions detected until now.
2990  * @param[in] actions
2991  *   Pointer to the list of actions remaining in the flow rule.
2992  * @param[out] error
2993  *   Pointer to error structure.
2994  *
2995  * @return
2996  *   0 on success, a negative errno value otherwise and rte_errno is set.
2997  */
2998 static int
2999 flow_dv_validate_action_set_vlan_vid(uint64_t item_flags,
3000                                      uint64_t action_flags,
3001                                      const struct rte_flow_action actions[],
3002                                      struct rte_flow_error *error)
3003 {
3004         const struct rte_flow_action *action = actions;
3005         const struct rte_flow_action_of_set_vlan_vid *conf = action->conf;
3006
3007         if (rte_be_to_cpu_16(conf->vlan_vid) > 0xFFE)
3008                 return rte_flow_error_set(error, EINVAL,
3009                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3010                                           "VLAN VID value is too big");
3011         if (!(action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN) &&
3012             !(item_flags & MLX5_FLOW_LAYER_OUTER_VLAN))
3013                 return rte_flow_error_set(error, ENOTSUP,
3014                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3015                                           "set VLAN VID action must follow push"
3016                                           " VLAN action or match on VLAN item");
3017         if (action_flags & MLX5_FLOW_ACTION_OF_SET_VLAN_VID)
3018                 return rte_flow_error_set(error, ENOTSUP,
3019                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3020                                           "Multiple VLAN VID modifications are "
3021                                           "not supported");
3022         if (action_flags & MLX5_FLOW_ACTION_PORT_ID)
3023                 return rte_flow_error_set(error, EINVAL,
3024                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3025                                           "wrong action order, port_id should "
3026                                           "be after set VLAN VID");
3027         return 0;
3028 }
3029
3030 /*
3031  * Validate the FLAG action.
3032  *
3033  * @param[in] dev
3034  *   Pointer to the rte_eth_dev structure.
3035  * @param[in] action_flags
3036  *   Holds the actions detected until now.
3037  * @param[in] attr
3038  *   Pointer to flow attributes
3039  * @param[out] error
3040  *   Pointer to error structure.
3041  *
3042  * @return
3043  *   0 on success, a negative errno value otherwise and rte_errno is set.
3044  */
3045 static int
3046 flow_dv_validate_action_flag(struct rte_eth_dev *dev,
3047                              uint64_t action_flags,
3048                              const struct rte_flow_attr *attr,
3049                              struct rte_flow_error *error)
3050 {
3051         struct mlx5_priv *priv = dev->data->dev_private;
3052         struct mlx5_sh_config *config = &priv->sh->config;
3053         int ret;
3054
3055         /* Fall back if no extended metadata register support. */
3056         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3057                 return mlx5_flow_validate_action_flag(action_flags, attr,
3058                                                       error);
3059         /* Extensive metadata mode requires registers. */
3060         if (!mlx5_flow_ext_mreg_supported(dev))
3061                 return rte_flow_error_set(error, ENOTSUP,
3062                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3063                                           "no metadata registers "
3064                                           "to support flag action");
3065         if (!(priv->sh->dv_mark_mask & MLX5_FLOW_MARK_DEFAULT))
3066                 return rte_flow_error_set(error, ENOTSUP,
3067                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3068                                           "extended metadata register"
3069                                           " isn't available");
3070         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3071         if (ret < 0)
3072                 return ret;
3073         MLX5_ASSERT(ret > 0);
3074         if (action_flags & MLX5_FLOW_ACTION_MARK)
3075                 return rte_flow_error_set(error, EINVAL,
3076                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3077                                           "can't mark and flag in same flow");
3078         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3079                 return rte_flow_error_set(error, EINVAL,
3080                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3081                                           "can't have 2 flag"
3082                                           " actions in same flow");
3083         return 0;
3084 }
3085
3086 /**
3087  * Validate MARK action.
3088  *
3089  * @param[in] dev
3090  *   Pointer to the rte_eth_dev structure.
3091  * @param[in] action
3092  *   Pointer to action.
3093  * @param[in] action_flags
3094  *   Holds the actions detected until now.
3095  * @param[in] attr
3096  *   Pointer to flow attributes
3097  * @param[out] error
3098  *   Pointer to error structure.
3099  *
3100  * @return
3101  *   0 on success, a negative errno value otherwise and rte_errno is set.
3102  */
3103 static int
3104 flow_dv_validate_action_mark(struct rte_eth_dev *dev,
3105                              const struct rte_flow_action *action,
3106                              uint64_t action_flags,
3107                              const struct rte_flow_attr *attr,
3108                              struct rte_flow_error *error)
3109 {
3110         struct mlx5_priv *priv = dev->data->dev_private;
3111         struct mlx5_sh_config *config = &priv->sh->config;
3112         const struct rte_flow_action_mark *mark = action->conf;
3113         int ret;
3114
3115         if (is_tunnel_offload_active(dev))
3116                 return rte_flow_error_set(error, ENOTSUP,
3117                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3118                                           "no mark action "
3119                                           "if tunnel offload active");
3120         /* Fall back if no extended metadata register support. */
3121         if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY)
3122                 return mlx5_flow_validate_action_mark(action, action_flags,
3123                                                       attr, error);
3124         /* Extensive metadata mode requires registers. */
3125         if (!mlx5_flow_ext_mreg_supported(dev))
3126                 return rte_flow_error_set(error, ENOTSUP,
3127                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3128                                           "no metadata registers "
3129                                           "to support mark action");
3130         if (!priv->sh->dv_mark_mask)
3131                 return rte_flow_error_set(error, ENOTSUP,
3132                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3133                                           "extended metadata register"
3134                                           " isn't available");
3135         ret = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, error);
3136         if (ret < 0)
3137                 return ret;
3138         MLX5_ASSERT(ret > 0);
3139         if (!mark)
3140                 return rte_flow_error_set(error, EINVAL,
3141                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3142                                           "configuration cannot be null");
3143         if (mark->id >= (MLX5_FLOW_MARK_MAX & priv->sh->dv_mark_mask))
3144                 return rte_flow_error_set(error, EINVAL,
3145                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
3146                                           &mark->id,
3147                                           "mark id exceeds the limit");
3148         if (action_flags & MLX5_FLOW_ACTION_FLAG)
3149                 return rte_flow_error_set(error, EINVAL,
3150                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3151                                           "can't flag and mark in same flow");
3152         if (action_flags & MLX5_FLOW_ACTION_MARK)
3153                 return rte_flow_error_set(error, EINVAL,
3154                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3155                                           "can't have 2 mark actions in same"
3156                                           " flow");
3157         return 0;
3158 }
3159
3160 /**
3161  * Validate SET_META action.
3162  *
3163  * @param[in] dev
3164  *   Pointer to the rte_eth_dev structure.
3165  * @param[in] action
3166  *   Pointer to the action structure.
3167  * @param[in] action_flags
3168  *   Holds the actions detected until now.
3169  * @param[in] attr
3170  *   Pointer to flow attributes
3171  * @param[out] error
3172  *   Pointer to error structure.
3173  *
3174  * @return
3175  *   0 on success, a negative errno value otherwise and rte_errno is set.
3176  */
3177 static int
3178 flow_dv_validate_action_set_meta(struct rte_eth_dev *dev,
3179                                  const struct rte_flow_action *action,
3180                                  uint64_t action_flags __rte_unused,
3181                                  const struct rte_flow_attr *attr,
3182                                  struct rte_flow_error *error)
3183 {
3184         struct mlx5_priv *priv = dev->data->dev_private;
3185         struct mlx5_sh_config *config = &priv->sh->config;
3186         const struct rte_flow_action_set_meta *conf;
3187         uint32_t nic_mask = UINT32_MAX;
3188         int reg;
3189
3190         if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
3191             !mlx5_flow_ext_mreg_supported(dev))
3192                 return rte_flow_error_set(error, ENOTSUP,
3193                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3194                                           "extended metadata register"
3195                                           " isn't supported");
3196         reg = flow_dv_get_metadata_reg(dev, attr, error);
3197         if (reg < 0)
3198                 return reg;
3199         if (reg == REG_NON)
3200                 return rte_flow_error_set(error, ENOTSUP,
3201                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3202                                           "unavailable extended metadata register");
3203         if (reg != REG_A && reg != REG_B) {
3204                 struct mlx5_priv *priv = dev->data->dev_private;
3205
3206                 nic_mask = priv->sh->dv_meta_mask;
3207         }
3208         if (!(action->conf))
3209                 return rte_flow_error_set(error, EINVAL,
3210                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3211                                           "configuration cannot be null");
3212         conf = (const struct rte_flow_action_set_meta *)action->conf;
3213         if (!conf->mask)
3214                 return rte_flow_error_set(error, EINVAL,
3215                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3216                                           "zero mask doesn't have any effect");
3217         if (conf->mask & ~nic_mask)
3218                 return rte_flow_error_set(error, EINVAL,
3219                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3220                                           "meta data must be within reg C0");
3221         return 0;
3222 }
3223
3224 /**
3225  * Validate SET_TAG action.
3226  *
3227  * @param[in] dev
3228  *   Pointer to the rte_eth_dev structure.
3229  * @param[in] action
3230  *   Pointer to the action structure.
3231  * @param[in] action_flags
3232  *   Holds the actions detected until now.
3233  * @param[in] attr
3234  *   Pointer to flow attributes
3235  * @param[out] error
3236  *   Pointer to error structure.
3237  *
3238  * @return
3239  *   0 on success, a negative errno value otherwise and rte_errno is set.
3240  */
3241 static int
3242 flow_dv_validate_action_set_tag(struct rte_eth_dev *dev,
3243                                 const struct rte_flow_action *action,
3244                                 uint64_t action_flags,
3245                                 const struct rte_flow_attr *attr,
3246                                 struct rte_flow_error *error)
3247 {
3248         const struct rte_flow_action_set_tag *conf;
3249         const uint64_t terminal_action_flags =
3250                 MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_QUEUE |
3251                 MLX5_FLOW_ACTION_RSS;
3252         int ret;
3253
3254         if (!mlx5_flow_ext_mreg_supported(dev))
3255                 return rte_flow_error_set(error, ENOTSUP,
3256                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3257                                           "extensive metadata register"
3258                                           " isn't supported");
3259         if (!(action->conf))
3260                 return rte_flow_error_set(error, EINVAL,
3261                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3262                                           "configuration cannot be null");
3263         conf = (const struct rte_flow_action_set_tag *)action->conf;
3264         if (!conf->mask)
3265                 return rte_flow_error_set(error, EINVAL,
3266                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3267                                           "zero mask doesn't have any effect");
3268         ret = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, conf->index, error);
3269         if (ret < 0)
3270                 return ret;
3271         if (!attr->transfer && attr->ingress &&
3272             (action_flags & terminal_action_flags))
3273                 return rte_flow_error_set(error, EINVAL,
3274                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3275                                           "set_tag has no effect"
3276                                           " with terminal actions");
3277         return 0;
3278 }
3279
3280 /**
3281  * Indicates whether ASO aging is supported.
3282  *
3283  * @param[in] sh
3284  *   Pointer to shared device context structure.
3285  * @param[in] attr
3286  *   Attributes of flow that includes AGE action.
3287  *
3288  * @return
3289  *   True when ASO aging is supported, false otherwise.
3290  */
3291 static inline bool
3292 flow_hit_aso_supported(const struct mlx5_dev_ctx_shared *sh,
3293                 const struct rte_flow_attr *attr)
3294 {
3295         MLX5_ASSERT(sh && attr);
3296         return (sh->flow_hit_aso_en && (attr->transfer || attr->group));
3297 }
3298
3299 /**
3300  * Validate count action.
3301  *
3302  * @param[in] dev
3303  *   Pointer to rte_eth_dev structure.
3304  * @param[in] shared
3305  *   Indicator if action is shared.
3306  * @param[in] action_flags
3307  *   Holds the actions detected until now.
3308  * @param[in] attr
3309  *   Attributes of flow that includes this action.
3310  * @param[out] error
3311  *   Pointer to error structure.
3312  *
3313  * @return
3314  *   0 on success, a negative errno value otherwise and rte_errno is set.
3315  */
3316 static int
3317 flow_dv_validate_action_count(struct rte_eth_dev *dev, bool shared,
3318                               uint64_t action_flags,
3319                               const struct rte_flow_attr *attr,
3320                               struct rte_flow_error *error)
3321 {
3322         struct mlx5_priv *priv = dev->data->dev_private;
3323
3324         if (!priv->sh->cdev->config.devx)
3325                 goto notsup_err;
3326         if (action_flags & MLX5_FLOW_ACTION_COUNT)
3327                 return rte_flow_error_set(error, EINVAL,
3328                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3329                                           "duplicate count actions set");
3330         if (shared && (action_flags & MLX5_FLOW_ACTION_AGE) &&
3331             !flow_hit_aso_supported(priv->sh, attr))
3332                 return rte_flow_error_set(error, EINVAL,
3333                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3334                                           "old age and indirect count combination is not supported");
3335 #ifdef HAVE_IBV_FLOW_DEVX_COUNTERS
3336         return 0;
3337 #endif
3338 notsup_err:
3339         return rte_flow_error_set
3340                       (error, ENOTSUP,
3341                        RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3342                        NULL,
3343                        "count action not supported");
3344 }
3345
3346 /**
3347  * Validate the L2 encap action.
3348  *
3349  * @param[in] dev
3350  *   Pointer to the rte_eth_dev structure.
3351  * @param[in] action_flags
3352  *   Holds the actions detected until now.
3353  * @param[in] action
3354  *   Pointer to the action structure.
3355  * @param[in] attr
3356  *   Pointer to flow attributes.
3357  * @param[out] error
3358  *   Pointer to error structure.
3359  *
3360  * @return
3361  *   0 on success, a negative errno value otherwise and rte_errno is set.
3362  */
3363 static int
3364 flow_dv_validate_action_l2_encap(struct rte_eth_dev *dev,
3365                                  uint64_t action_flags,
3366                                  const struct rte_flow_action *action,
3367                                  const struct rte_flow_attr *attr,
3368                                  struct rte_flow_error *error)
3369 {
3370         const struct mlx5_priv *priv = dev->data->dev_private;
3371
3372         if (!(action->conf))
3373                 return rte_flow_error_set(error, EINVAL,
3374                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
3375                                           "configuration cannot be null");
3376         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3377                 return rte_flow_error_set(error, EINVAL,
3378                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3379                                           "can only have a single encap action "
3380                                           "in a flow");
3381         if (!attr->transfer && priv->representor)
3382                 return rte_flow_error_set(error, ENOTSUP,
3383                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3384                                           "encap action for VF representor "
3385                                           "not supported on NIC table");
3386         return 0;
3387 }
3388
3389 /**
3390  * Validate a decap action.
3391  *
3392  * @param[in] dev
3393  *   Pointer to the rte_eth_dev structure.
3394  * @param[in] action_flags
3395  *   Holds the actions detected until now.
3396  * @param[in] action
3397  *   Pointer to the action structure.
3398  * @param[in] item_flags
3399  *   Holds the items detected.
3400  * @param[in] attr
3401  *   Pointer to flow attributes
3402  * @param[out] error
3403  *   Pointer to error structure.
3404  *
3405  * @return
3406  *   0 on success, a negative errno value otherwise and rte_errno is set.
3407  */
3408 static int
3409 flow_dv_validate_action_decap(struct rte_eth_dev *dev,
3410                               uint64_t action_flags,
3411                               const struct rte_flow_action *action,
3412                               const uint64_t item_flags,
3413                               const struct rte_flow_attr *attr,
3414                               struct rte_flow_error *error)
3415 {
3416         const struct mlx5_priv *priv = dev->data->dev_private;
3417
3418         if (priv->sh->cdev->config.hca_attr.scatter_fcs_w_decap_disable &&
3419             !priv->sh->config.decap_en)
3420                 return rte_flow_error_set(error, ENOTSUP,
3421                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3422                                           "decap is not enabled");
3423         if (action_flags & MLX5_FLOW_XCAP_ACTIONS)
3424                 return rte_flow_error_set(error, ENOTSUP,
3425                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3426                                           action_flags &
3427                                           MLX5_FLOW_ACTION_DECAP ? "can only "
3428                                           "have a single decap action" : "decap "
3429                                           "after encap is not supported");
3430         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
3431                 return rte_flow_error_set(error, EINVAL,
3432                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3433                                           "can't have decap action after"
3434                                           " modify action");
3435         if (attr->egress)
3436                 return rte_flow_error_set(error, ENOTSUP,
3437                                           RTE_FLOW_ERROR_TYPE_ATTR_EGRESS,
3438                                           NULL,
3439                                           "decap action not supported for "
3440                                           "egress");
3441         if (!attr->transfer && priv->representor)
3442                 return rte_flow_error_set(error, ENOTSUP,
3443                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3444                                           "decap action for VF representor "
3445                                           "not supported on NIC table");
3446         if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_DECAP &&
3447             !(item_flags & MLX5_FLOW_LAYER_VXLAN))
3448                 return rte_flow_error_set(error, ENOTSUP,
3449                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3450                                 "VXLAN item should be present for VXLAN decap");
3451         return 0;
3452 }
3453
3454 const struct rte_flow_action_raw_decap empty_decap = {.data = NULL, .size = 0,};
3455
3456 /**
3457  * Validate the raw encap and decap actions.
3458  *
3459  * @param[in] dev
3460  *   Pointer to the rte_eth_dev structure.
3461  * @param[in] decap
3462  *   Pointer to the decap action.
3463  * @param[in] encap
3464  *   Pointer to the encap action.
3465  * @param[in] attr
3466  *   Pointer to flow attributes
3467  * @param[in/out] action_flags
3468  *   Holds the actions detected until now.
3469  * @param[out] actions_n
3470  *   pointer to the number of actions counter.
3471  * @param[in] action
3472  *   Pointer to the action structure.
3473  * @param[in] item_flags
3474  *   Holds the items detected.
3475  * @param[out] error
3476  *   Pointer to error structure.
3477  *
3478  * @return
3479  *   0 on success, a negative errno value otherwise and rte_errno is set.
3480  */
3481 static int
3482 flow_dv_validate_action_raw_encap_decap
3483         (struct rte_eth_dev *dev,
3484          const struct rte_flow_action_raw_decap *decap,
3485          const struct rte_flow_action_raw_encap *encap,
3486          const struct rte_flow_attr *attr, uint64_t *action_flags,
3487          int *actions_n, const struct rte_flow_action *action,
3488          uint64_t item_flags, struct rte_flow_error *error)
3489 {
3490         const struct mlx5_priv *priv = dev->data->dev_private;
3491         int ret;
3492
3493         if (encap && (!encap->size || !encap->data))
3494                 return rte_flow_error_set(error, EINVAL,
3495                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3496                                           "raw encap data cannot be empty");
3497         if (decap && encap) {
3498                 if (decap->size <= MLX5_ENCAPSULATION_DECISION_SIZE &&
3499                     encap->size > MLX5_ENCAPSULATION_DECISION_SIZE)
3500                         /* L3 encap. */
3501                         decap = NULL;
3502                 else if (encap->size <=
3503                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3504                            decap->size >
3505                            MLX5_ENCAPSULATION_DECISION_SIZE)
3506                         /* L3 decap. */
3507                         encap = NULL;
3508                 else if (encap->size >
3509                            MLX5_ENCAPSULATION_DECISION_SIZE &&
3510                            decap->size >
3511                            MLX5_ENCAPSULATION_DECISION_SIZE)
3512                         /* 2 L2 actions: encap and decap. */
3513                         ;
3514                 else
3515                         return rte_flow_error_set(error,
3516                                 ENOTSUP,
3517                                 RTE_FLOW_ERROR_TYPE_ACTION,
3518                                 NULL, "unsupported too small "
3519                                 "raw decap and too small raw "
3520                                 "encap combination");
3521         }
3522         if (decap) {
3523                 ret = flow_dv_validate_action_decap(dev, *action_flags, action,
3524                                                     item_flags, attr, error);
3525                 if (ret < 0)
3526                         return ret;
3527                 *action_flags |= MLX5_FLOW_ACTION_DECAP;
3528                 ++(*actions_n);
3529         }
3530         if (encap) {
3531                 if (encap->size <= MLX5_ENCAPSULATION_DECISION_SIZE)
3532                         return rte_flow_error_set(error, ENOTSUP,
3533                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3534                                                   NULL,
3535                                                   "small raw encap size");
3536                 if (*action_flags & MLX5_FLOW_ACTION_ENCAP)
3537                         return rte_flow_error_set(error, EINVAL,
3538                                                   RTE_FLOW_ERROR_TYPE_ACTION,
3539                                                   NULL,
3540                                                   "more than one encap action");
3541                 if (!attr->transfer && priv->representor)
3542                         return rte_flow_error_set
3543                                         (error, ENOTSUP,
3544                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3545                                          "encap action for VF representor "
3546                                          "not supported on NIC table");
3547                 *action_flags |= MLX5_FLOW_ACTION_ENCAP;
3548                 ++(*actions_n);
3549         }
3550         return 0;
3551 }
3552
3553 /*
3554  * Validate the ASO CT action.
3555  *
3556  * @param[in] dev
3557  *   Pointer to the rte_eth_dev structure.
3558  * @param[in] action_flags
3559  *   Holds the actions detected until now.
3560  * @param[in] item_flags
3561  *   The items found in this flow rule.
3562  * @param[in] attr
3563  *   Pointer to flow attributes.
3564  * @param[out] error
3565  *   Pointer to error structure.
3566  *
3567  * @return
3568  *   0 on success, a negative errno value otherwise and rte_errno is set.
3569  */
3570 static int
3571 flow_dv_validate_action_aso_ct(struct rte_eth_dev *dev,
3572                                uint64_t action_flags,
3573                                uint64_t item_flags,
3574                                const struct rte_flow_attr *attr,
3575                                struct rte_flow_error *error)
3576 {
3577         RTE_SET_USED(dev);
3578
3579         if (attr->group == 0 && !attr->transfer)
3580                 return rte_flow_error_set(error, ENOTSUP,
3581                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3582                                           NULL,
3583                                           "Only support non-root table");
3584         if (action_flags & MLX5_FLOW_FATE_ACTIONS)
3585                 return rte_flow_error_set(error, ENOTSUP,
3586                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3587                                           "CT cannot follow a fate action");
3588         if ((action_flags & MLX5_FLOW_ACTION_METER) ||
3589             (action_flags & MLX5_FLOW_ACTION_AGE))
3590                 return rte_flow_error_set(error, EINVAL,
3591                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3592                                           "Only one ASO action is supported");
3593         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
3594                 return rte_flow_error_set(error, EINVAL,
3595                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
3596                                           "Encap cannot exist before CT");
3597         if (!(item_flags & MLX5_FLOW_LAYER_OUTER_L4_TCP))
3598                 return rte_flow_error_set(error, EINVAL,
3599                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3600                                           "Not a outer TCP packet");
3601         return 0;
3602 }
3603
3604 int
3605 flow_dv_encap_decap_match_cb(void *tool_ctx __rte_unused,
3606                              struct mlx5_list_entry *entry, void *cb_ctx)
3607 {
3608         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3609         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3610         struct mlx5_flow_dv_encap_decap_resource *resource;
3611
3612         resource = container_of(entry, struct mlx5_flow_dv_encap_decap_resource,
3613                                 entry);
3614         if (resource->reformat_type == ctx_resource->reformat_type &&
3615             resource->ft_type == ctx_resource->ft_type &&
3616             resource->flags == ctx_resource->flags &&
3617             resource->size == ctx_resource->size &&
3618             !memcmp((const void *)resource->buf,
3619                     (const void *)ctx_resource->buf,
3620                     resource->size))
3621                 return 0;
3622         return -1;
3623 }
3624
3625 struct mlx5_list_entry *
3626 flow_dv_encap_decap_create_cb(void *tool_ctx, void *cb_ctx)
3627 {
3628         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3629         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3630         struct mlx5dv_dr_domain *domain;
3631         struct mlx5_flow_dv_encap_decap_resource *ctx_resource = ctx->data;
3632         struct mlx5_flow_dv_encap_decap_resource *resource;
3633         uint32_t idx;
3634         int ret;
3635
3636         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3637                 domain = sh->fdb_domain;
3638         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3639                 domain = sh->rx_domain;
3640         else
3641                 domain = sh->tx_domain;
3642         /* Register new encap/decap resource. */
3643         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], &idx);
3644         if (!resource) {
3645                 rte_flow_error_set(ctx->error, ENOMEM,
3646                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3647                                    "cannot allocate resource memory");
3648                 return NULL;
3649         }
3650         *resource = *ctx_resource;
3651         resource->idx = idx;
3652         ret = mlx5_flow_os_create_flow_action_packet_reformat(sh->cdev->ctx,
3653                                                               domain, resource,
3654                                                              &resource->action);
3655         if (ret) {
3656                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], idx);
3657                 rte_flow_error_set(ctx->error, ENOMEM,
3658                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
3659                                    NULL, "cannot create action");
3660                 return NULL;
3661         }
3662
3663         return &resource->entry;
3664 }
3665
3666 struct mlx5_list_entry *
3667 flow_dv_encap_decap_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
3668                              void *cb_ctx)
3669 {
3670         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3671         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3672         struct mlx5_flow_dv_encap_decap_resource *cache_resource;
3673         uint32_t idx;
3674
3675         cache_resource = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
3676                                            &idx);
3677         if (!cache_resource) {
3678                 rte_flow_error_set(ctx->error, ENOMEM,
3679                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3680                                    "cannot allocate resource memory");
3681                 return NULL;
3682         }
3683         memcpy(cache_resource, oentry, sizeof(*cache_resource));
3684         cache_resource->idx = idx;
3685         return &cache_resource->entry;
3686 }
3687
3688 void
3689 flow_dv_encap_decap_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3690 {
3691         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3692         struct mlx5_flow_dv_encap_decap_resource *res =
3693                                        container_of(entry, typeof(*res), entry);
3694
3695         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
3696 }
3697
3698 /**
3699  * Find existing encap/decap resource or create and register a new one.
3700  *
3701  * @param[in, out] dev
3702  *   Pointer to rte_eth_dev structure.
3703  * @param[in, out] resource
3704  *   Pointer to encap/decap resource.
3705  * @parm[in, out] dev_flow
3706  *   Pointer to the dev_flow.
3707  * @param[out] error
3708  *   pointer to error structure.
3709  *
3710  * @return
3711  *   0 on success otherwise -errno and errno is set.
3712  */
3713 static int
3714 flow_dv_encap_decap_resource_register
3715                         (struct rte_eth_dev *dev,
3716                          struct mlx5_flow_dv_encap_decap_resource *resource,
3717                          struct mlx5_flow *dev_flow,
3718                          struct rte_flow_error *error)
3719 {
3720         struct mlx5_priv *priv = dev->data->dev_private;
3721         struct mlx5_dev_ctx_shared *sh = priv->sh;
3722         struct mlx5_list_entry *entry;
3723         union {
3724                 struct {
3725                         uint32_t ft_type:8;
3726                         uint32_t refmt_type:8;
3727                         /*
3728                          * Header reformat actions can be shared between
3729                          * non-root tables. One bit to indicate non-root
3730                          * table or not.
3731                          */
3732                         uint32_t is_root:1;
3733                         uint32_t reserve:15;
3734                 };
3735                 uint32_t v32;
3736         } encap_decap_key = {
3737                 {
3738                         .ft_type = resource->ft_type,
3739                         .refmt_type = resource->reformat_type,
3740                         .is_root = !!dev_flow->dv.group,
3741                         .reserve = 0,
3742                 }
3743         };
3744         struct mlx5_flow_cb_ctx ctx = {
3745                 .error = error,
3746                 .data = resource,
3747         };
3748         struct mlx5_hlist *encaps_decaps;
3749         uint64_t key64;
3750
3751         encaps_decaps = flow_dv_hlist_prepare(sh, &sh->encaps_decaps,
3752                                 "encaps_decaps",
3753                                 MLX5_FLOW_ENCAP_DECAP_HTABLE_SZ,
3754                                 true, true, sh,
3755                                 flow_dv_encap_decap_create_cb,
3756                                 flow_dv_encap_decap_match_cb,
3757                                 flow_dv_encap_decap_remove_cb,
3758                                 flow_dv_encap_decap_clone_cb,
3759                                 flow_dv_encap_decap_clone_free_cb,
3760                                 error);
3761         if (unlikely(!encaps_decaps))
3762                 return -rte_errno;
3763         resource->flags = dev_flow->dv.group ? 0 : 1;
3764         key64 =  __rte_raw_cksum(&encap_decap_key.v32,
3765                                  sizeof(encap_decap_key.v32), 0);
3766         if (resource->reformat_type !=
3767             MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2 &&
3768             resource->size)
3769                 key64 = __rte_raw_cksum(resource->buf, resource->size, key64);
3770         entry = mlx5_hlist_register(encaps_decaps, key64, &ctx);
3771         if (!entry)
3772                 return -rte_errno;
3773         resource = container_of(entry, typeof(*resource), entry);
3774         dev_flow->dv.encap_decap = resource;
3775         dev_flow->handle->dvh.rix_encap_decap = resource->idx;
3776         return 0;
3777 }
3778
3779 /**
3780  * Find existing table jump resource or create and register a new one.
3781  *
3782  * @param[in, out] dev
3783  *   Pointer to rte_eth_dev structure.
3784  * @param[in, out] tbl
3785  *   Pointer to flow table resource.
3786  * @parm[in, out] dev_flow
3787  *   Pointer to the dev_flow.
3788  * @param[out] error
3789  *   pointer to error structure.
3790  *
3791  * @return
3792  *   0 on success otherwise -errno and errno is set.
3793  */
3794 static int
3795 flow_dv_jump_tbl_resource_register
3796                         (struct rte_eth_dev *dev __rte_unused,
3797                          struct mlx5_flow_tbl_resource *tbl,
3798                          struct mlx5_flow *dev_flow,
3799                          struct rte_flow_error *error __rte_unused)
3800 {
3801         struct mlx5_flow_tbl_data_entry *tbl_data =
3802                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
3803
3804         MLX5_ASSERT(tbl);
3805         MLX5_ASSERT(tbl_data->jump.action);
3806         dev_flow->handle->rix_jump = tbl_data->idx;
3807         dev_flow->dv.jump = &tbl_data->jump;
3808         return 0;
3809 }
3810
3811 int
3812 flow_dv_port_id_match_cb(void *tool_ctx __rte_unused,
3813                          struct mlx5_list_entry *entry, void *cb_ctx)
3814 {
3815         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3816         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3817         struct mlx5_flow_dv_port_id_action_resource *res =
3818                                        container_of(entry, typeof(*res), entry);
3819
3820         return ref->port_id != res->port_id;
3821 }
3822
3823 struct mlx5_list_entry *
3824 flow_dv_port_id_create_cb(void *tool_ctx, void *cb_ctx)
3825 {
3826         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3827         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3828         struct mlx5_flow_dv_port_id_action_resource *ref = ctx->data;
3829         struct mlx5_flow_dv_port_id_action_resource *resource;
3830         uint32_t idx;
3831         int ret;
3832
3833         /* Register new port id action resource. */
3834         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3835         if (!resource) {
3836                 rte_flow_error_set(ctx->error, ENOMEM,
3837                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3838                                    "cannot allocate port_id action memory");
3839                 return NULL;
3840         }
3841         *resource = *ref;
3842         ret = mlx5_flow_os_create_flow_action_dest_port(sh->fdb_domain,
3843                                                         ref->port_id,
3844                                                         &resource->action);
3845         if (ret) {
3846                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], idx);
3847                 rte_flow_error_set(ctx->error, ENOMEM,
3848                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3849                                    "cannot create action");
3850                 return NULL;
3851         }
3852         resource->idx = idx;
3853         return &resource->entry;
3854 }
3855
3856 struct mlx5_list_entry *
3857 flow_dv_port_id_clone_cb(void *tool_ctx,
3858                          struct mlx5_list_entry *entry __rte_unused,
3859                          void *cb_ctx)
3860 {
3861         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3862         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3863         struct mlx5_flow_dv_port_id_action_resource *resource;
3864         uint32_t idx;
3865
3866         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PORT_ID], &idx);
3867         if (!resource) {
3868                 rte_flow_error_set(ctx->error, ENOMEM,
3869                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3870                                    "cannot allocate port_id action memory");
3871                 return NULL;
3872         }
3873         memcpy(resource, entry, sizeof(*resource));
3874         resource->idx = idx;
3875         return &resource->entry;
3876 }
3877
3878 void
3879 flow_dv_port_id_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
3880 {
3881         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3882         struct mlx5_flow_dv_port_id_action_resource *resource =
3883                                   container_of(entry, typeof(*resource), entry);
3884
3885         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
3886 }
3887
3888 /**
3889  * Find existing table port ID resource or create and register a new one.
3890  *
3891  * @param[in, out] dev
3892  *   Pointer to rte_eth_dev structure.
3893  * @param[in, out] ref
3894  *   Pointer to port ID action resource reference.
3895  * @parm[in, out] dev_flow
3896  *   Pointer to the dev_flow.
3897  * @param[out] error
3898  *   pointer to error structure.
3899  *
3900  * @return
3901  *   0 on success otherwise -errno and errno is set.
3902  */
3903 static int
3904 flow_dv_port_id_action_resource_register
3905                         (struct rte_eth_dev *dev,
3906                          struct mlx5_flow_dv_port_id_action_resource *ref,
3907                          struct mlx5_flow *dev_flow,
3908                          struct rte_flow_error *error)
3909 {
3910         struct mlx5_priv *priv = dev->data->dev_private;
3911         struct mlx5_list_entry *entry;
3912         struct mlx5_flow_dv_port_id_action_resource *resource;
3913         struct mlx5_flow_cb_ctx ctx = {
3914                 .error = error,
3915                 .data = ref,
3916         };
3917
3918         entry = mlx5_list_register(priv->sh->port_id_action_list, &ctx);
3919         if (!entry)
3920                 return -rte_errno;
3921         resource = container_of(entry, typeof(*resource), entry);
3922         dev_flow->dv.port_id_action = resource;
3923         dev_flow->handle->rix_port_id_action = resource->idx;
3924         return 0;
3925 }
3926
3927 int
3928 flow_dv_push_vlan_match_cb(void *tool_ctx __rte_unused,
3929                            struct mlx5_list_entry *entry, void *cb_ctx)
3930 {
3931         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3932         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3933         struct mlx5_flow_dv_push_vlan_action_resource *res =
3934                                        container_of(entry, typeof(*res), entry);
3935
3936         return ref->vlan_tag != res->vlan_tag || ref->ft_type != res->ft_type;
3937 }
3938
3939 struct mlx5_list_entry *
3940 flow_dv_push_vlan_create_cb(void *tool_ctx, void *cb_ctx)
3941 {
3942         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3943         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3944         struct mlx5_flow_dv_push_vlan_action_resource *ref = ctx->data;
3945         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3946         struct mlx5dv_dr_domain *domain;
3947         uint32_t idx;
3948         int ret;
3949
3950         /* Register new port id action resource. */
3951         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3952         if (!resource) {
3953                 rte_flow_error_set(ctx->error, ENOMEM,
3954                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3955                                    "cannot allocate push_vlan action memory");
3956                 return NULL;
3957         }
3958         *resource = *ref;
3959         if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
3960                 domain = sh->fdb_domain;
3961         else if (ref->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
3962                 domain = sh->rx_domain;
3963         else
3964                 domain = sh->tx_domain;
3965         ret = mlx5_flow_os_create_flow_action_push_vlan(domain, ref->vlan_tag,
3966                                                         &resource->action);
3967         if (ret) {
3968                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
3969                 rte_flow_error_set(ctx->error, ENOMEM,
3970                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3971                                    "cannot create push vlan action");
3972                 return NULL;
3973         }
3974         resource->idx = idx;
3975         return &resource->entry;
3976 }
3977
3978 struct mlx5_list_entry *
3979 flow_dv_push_vlan_clone_cb(void *tool_ctx,
3980                            struct mlx5_list_entry *entry __rte_unused,
3981                            void *cb_ctx)
3982 {
3983         struct mlx5_dev_ctx_shared *sh = tool_ctx;
3984         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
3985         struct mlx5_flow_dv_push_vlan_action_resource *resource;
3986         uint32_t idx;
3987
3988         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_PUSH_VLAN], &idx);
3989         if (!resource) {
3990                 rte_flow_error_set(ctx->error, ENOMEM,
3991                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
3992                                    "cannot allocate push_vlan action memory");
3993                 return NULL;
3994         }
3995         memcpy(resource, entry, sizeof(*resource));
3996         resource->idx = idx;
3997         return &resource->entry;
3998 }
3999
4000 void
4001 flow_dv_push_vlan_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
4002 {
4003         struct mlx5_dev_ctx_shared *sh = tool_ctx;
4004         struct mlx5_flow_dv_push_vlan_action_resource *resource =
4005                                   container_of(entry, typeof(*resource), entry);
4006
4007         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
4008 }
4009
4010 /**
4011  * Find existing push vlan resource or create and register a new one.
4012  *
4013  * @param [in, out] dev
4014  *   Pointer to rte_eth_dev structure.
4015  * @param[in, out] ref
4016  *   Pointer to port ID action resource reference.
4017  * @parm[in, out] dev_flow
4018  *   Pointer to the dev_flow.
4019  * @param[out] error
4020  *   pointer to error structure.
4021  *
4022  * @return
4023  *   0 on success otherwise -errno and errno is set.
4024  */
4025 static int
4026 flow_dv_push_vlan_action_resource_register
4027                        (struct rte_eth_dev *dev,
4028                         struct mlx5_flow_dv_push_vlan_action_resource *ref,
4029                         struct mlx5_flow *dev_flow,
4030                         struct rte_flow_error *error)
4031 {
4032         struct mlx5_priv *priv = dev->data->dev_private;
4033         struct mlx5_flow_dv_push_vlan_action_resource *resource;
4034         struct mlx5_list_entry *entry;
4035         struct mlx5_flow_cb_ctx ctx = {
4036                 .error = error,
4037                 .data = ref,
4038         };
4039
4040         entry = mlx5_list_register(priv->sh->push_vlan_action_list, &ctx);
4041         if (!entry)
4042                 return -rte_errno;
4043         resource = container_of(entry, typeof(*resource), entry);
4044
4045         dev_flow->handle->dvh.rix_push_vlan = resource->idx;
4046         dev_flow->dv.push_vlan_res = resource;
4047         return 0;
4048 }
4049
4050 /**
4051  * Get the size of specific rte_flow_item_type hdr size
4052  *
4053  * @param[in] item_type
4054  *   Tested rte_flow_item_type.
4055  *
4056  * @return
4057  *   sizeof struct item_type, 0 if void or irrelevant.
4058  */
4059 size_t
4060 flow_dv_get_item_hdr_len(const enum rte_flow_item_type item_type)
4061 {
4062         size_t retval;
4063
4064         switch (item_type) {
4065         case RTE_FLOW_ITEM_TYPE_ETH:
4066                 retval = sizeof(struct rte_ether_hdr);
4067                 break;
4068         case RTE_FLOW_ITEM_TYPE_VLAN:
4069                 retval = sizeof(struct rte_vlan_hdr);
4070                 break;
4071         case RTE_FLOW_ITEM_TYPE_IPV4:
4072                 retval = sizeof(struct rte_ipv4_hdr);
4073                 break;
4074         case RTE_FLOW_ITEM_TYPE_IPV6:
4075                 retval = sizeof(struct rte_ipv6_hdr);
4076                 break;
4077         case RTE_FLOW_ITEM_TYPE_UDP:
4078                 retval = sizeof(struct rte_udp_hdr);
4079                 break;
4080         case RTE_FLOW_ITEM_TYPE_TCP:
4081                 retval = sizeof(struct rte_tcp_hdr);
4082                 break;
4083         case RTE_FLOW_ITEM_TYPE_VXLAN:
4084         case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4085                 retval = sizeof(struct rte_vxlan_hdr);
4086                 break;
4087         case RTE_FLOW_ITEM_TYPE_GRE:
4088         case RTE_FLOW_ITEM_TYPE_NVGRE:
4089                 retval = sizeof(struct rte_gre_hdr);
4090                 break;
4091         case RTE_FLOW_ITEM_TYPE_MPLS:
4092                 retval = sizeof(struct rte_mpls_hdr);
4093                 break;
4094         case RTE_FLOW_ITEM_TYPE_VOID: /* Fall through. */
4095         default:
4096                 retval = 0;
4097                 break;
4098         }
4099         return retval;
4100 }
4101
4102 #define MLX5_ENCAP_IPV4_VERSION         0x40
4103 #define MLX5_ENCAP_IPV4_IHL_MIN         0x05
4104 #define MLX5_ENCAP_IPV4_TTL_DEF         0x40
4105 #define MLX5_ENCAP_IPV6_VTC_FLOW        0x60000000
4106 #define MLX5_ENCAP_IPV6_HOP_LIMIT       0xff
4107 #define MLX5_ENCAP_VXLAN_FLAGS          0x08000000
4108 #define MLX5_ENCAP_VXLAN_GPE_FLAGS      0x04
4109
4110 /**
4111  * Convert the encap action data from list of rte_flow_item to raw buffer
4112  *
4113  * @param[in] items
4114  *   Pointer to rte_flow_item objects list.
4115  * @param[out] buf
4116  *   Pointer to the output buffer.
4117  * @param[out] size
4118  *   Pointer to the output buffer size.
4119  * @param[out] error
4120  *   Pointer to the error structure.
4121  *
4122  * @return
4123  *   0 on success, a negative errno value otherwise and rte_errno is set.
4124  */
4125 int
4126 flow_dv_convert_encap_data(const struct rte_flow_item *items, uint8_t *buf,
4127                            size_t *size, struct rte_flow_error *error)
4128 {
4129         struct rte_ether_hdr *eth = NULL;
4130         struct rte_vlan_hdr *vlan = NULL;
4131         struct rte_ipv4_hdr *ipv4 = NULL;
4132         struct rte_ipv6_hdr *ipv6 = NULL;
4133         struct rte_udp_hdr *udp = NULL;
4134         struct rte_vxlan_hdr *vxlan = NULL;
4135         struct rte_vxlan_gpe_hdr *vxlan_gpe = NULL;
4136         struct rte_gre_hdr *gre = NULL;
4137         size_t len;
4138         size_t temp_size = 0;
4139
4140         if (!items)
4141                 return rte_flow_error_set(error, EINVAL,
4142                                           RTE_FLOW_ERROR_TYPE_ACTION,
4143                                           NULL, "invalid empty data");
4144         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
4145                 len = flow_dv_get_item_hdr_len(items->type);
4146                 if (len + temp_size > MLX5_ENCAP_MAX_LEN)
4147                         return rte_flow_error_set(error, EINVAL,
4148                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4149                                                   (void *)items->type,
4150                                                   "items total size is too big"
4151                                                   " for encap action");
4152                 rte_memcpy((void *)&buf[temp_size], items->spec, len);
4153                 switch (items->type) {
4154                 case RTE_FLOW_ITEM_TYPE_ETH:
4155                         eth = (struct rte_ether_hdr *)&buf[temp_size];
4156                         break;
4157                 case RTE_FLOW_ITEM_TYPE_VLAN:
4158                         vlan = (struct rte_vlan_hdr *)&buf[temp_size];
4159                         if (!eth)
4160                                 return rte_flow_error_set(error, EINVAL,
4161                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4162                                                 (void *)items->type,
4163                                                 "eth header not found");
4164                         if (!eth->ether_type)
4165                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_VLAN);
4166                         break;
4167                 case RTE_FLOW_ITEM_TYPE_IPV4:
4168                         ipv4 = (struct rte_ipv4_hdr *)&buf[temp_size];
4169                         if (!vlan && !eth)
4170                                 return rte_flow_error_set(error, EINVAL,
4171                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4172                                                 (void *)items->type,
4173                                                 "neither eth nor vlan"
4174                                                 " header found");
4175                         if (vlan && !vlan->eth_proto)
4176                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4177                         else if (eth && !eth->ether_type)
4178                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV4);
4179                         if (!ipv4->version_ihl)
4180                                 ipv4->version_ihl = MLX5_ENCAP_IPV4_VERSION |
4181                                                     MLX5_ENCAP_IPV4_IHL_MIN;
4182                         if (!ipv4->time_to_live)
4183                                 ipv4->time_to_live = MLX5_ENCAP_IPV4_TTL_DEF;
4184                         break;
4185                 case RTE_FLOW_ITEM_TYPE_IPV6:
4186                         ipv6 = (struct rte_ipv6_hdr *)&buf[temp_size];
4187                         if (!vlan && !eth)
4188                                 return rte_flow_error_set(error, EINVAL,
4189                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4190                                                 (void *)items->type,
4191                                                 "neither eth nor vlan"
4192                                                 " header found");
4193                         if (vlan && !vlan->eth_proto)
4194                                 vlan->eth_proto = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4195                         else if (eth && !eth->ether_type)
4196                                 eth->ether_type = RTE_BE16(RTE_ETHER_TYPE_IPV6);
4197                         if (!ipv6->vtc_flow)
4198                                 ipv6->vtc_flow =
4199                                         RTE_BE32(MLX5_ENCAP_IPV6_VTC_FLOW);
4200                         if (!ipv6->hop_limits)
4201                                 ipv6->hop_limits = MLX5_ENCAP_IPV6_HOP_LIMIT;
4202                         break;
4203                 case RTE_FLOW_ITEM_TYPE_UDP:
4204                         udp = (struct rte_udp_hdr *)&buf[temp_size];
4205                         if (!ipv4 && !ipv6)
4206                                 return rte_flow_error_set(error, EINVAL,
4207                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4208                                                 (void *)items->type,
4209                                                 "ip header not found");
4210                         if (ipv4 && !ipv4->next_proto_id)
4211                                 ipv4->next_proto_id = IPPROTO_UDP;
4212                         else if (ipv6 && !ipv6->proto)
4213                                 ipv6->proto = IPPROTO_UDP;
4214                         break;
4215                 case RTE_FLOW_ITEM_TYPE_VXLAN:
4216                         vxlan = (struct rte_vxlan_hdr *)&buf[temp_size];
4217                         if (!udp)
4218                                 return rte_flow_error_set(error, EINVAL,
4219                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4220                                                 (void *)items->type,
4221                                                 "udp header not found");
4222                         if (!udp->dst_port)
4223                                 udp->dst_port = RTE_BE16(MLX5_UDP_PORT_VXLAN);
4224                         if (!vxlan->vx_flags)
4225                                 vxlan->vx_flags =
4226                                         RTE_BE32(MLX5_ENCAP_VXLAN_FLAGS);
4227                         break;
4228                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
4229                         vxlan_gpe = (struct rte_vxlan_gpe_hdr *)&buf[temp_size];
4230                         if (!udp)
4231                                 return rte_flow_error_set(error, EINVAL,
4232                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4233                                                 (void *)items->type,
4234                                                 "udp header not found");
4235                         if (!vxlan_gpe->proto)
4236                                 return rte_flow_error_set(error, EINVAL,
4237                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4238                                                 (void *)items->type,
4239                                                 "next protocol not found");
4240                         if (!udp->dst_port)
4241                                 udp->dst_port =
4242                                         RTE_BE16(MLX5_UDP_PORT_VXLAN_GPE);
4243                         if (!vxlan_gpe->vx_flags)
4244                                 vxlan_gpe->vx_flags =
4245                                                 MLX5_ENCAP_VXLAN_GPE_FLAGS;
4246                         break;
4247                 case RTE_FLOW_ITEM_TYPE_GRE:
4248                 case RTE_FLOW_ITEM_TYPE_NVGRE:
4249                         gre = (struct rte_gre_hdr *)&buf[temp_size];
4250                         if (!gre->proto)
4251                                 return rte_flow_error_set(error, EINVAL,
4252                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4253                                                 (void *)items->type,
4254                                                 "next protocol not found");
4255                         if (!ipv4 && !ipv6)
4256                                 return rte_flow_error_set(error, EINVAL,
4257                                                 RTE_FLOW_ERROR_TYPE_ACTION,
4258                                                 (void *)items->type,
4259                                                 "ip header not found");
4260                         if (ipv4 && !ipv4->next_proto_id)
4261                                 ipv4->next_proto_id = IPPROTO_GRE;
4262                         else if (ipv6 && !ipv6->proto)
4263                                 ipv6->proto = IPPROTO_GRE;
4264                         break;
4265                 case RTE_FLOW_ITEM_TYPE_VOID:
4266                         break;
4267                 default:
4268                         return rte_flow_error_set(error, EINVAL,
4269                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4270                                                   (void *)items->type,
4271                                                   "unsupported item type");
4272                         break;
4273                 }
4274                 temp_size += len;
4275         }
4276         *size = temp_size;
4277         return 0;
4278 }
4279
4280 static int
4281 flow_dv_zero_encap_udp_csum(void *data, struct rte_flow_error *error)
4282 {
4283         struct rte_ether_hdr *eth = NULL;
4284         struct rte_vlan_hdr *vlan = NULL;
4285         struct rte_ipv6_hdr *ipv6 = NULL;
4286         struct rte_udp_hdr *udp = NULL;
4287         char *next_hdr;
4288         uint16_t proto;
4289
4290         eth = (struct rte_ether_hdr *)data;
4291         next_hdr = (char *)(eth + 1);
4292         proto = RTE_BE16(eth->ether_type);
4293
4294         /* VLAN skipping */
4295         while (proto == RTE_ETHER_TYPE_VLAN || proto == RTE_ETHER_TYPE_QINQ) {
4296                 vlan = (struct rte_vlan_hdr *)next_hdr;
4297                 proto = RTE_BE16(vlan->eth_proto);
4298                 next_hdr += sizeof(struct rte_vlan_hdr);
4299         }
4300
4301         /* HW calculates IPv4 csum. no need to proceed */
4302         if (proto == RTE_ETHER_TYPE_IPV4)
4303                 return 0;
4304
4305         /* non IPv4/IPv6 header. not supported */
4306         if (proto != RTE_ETHER_TYPE_IPV6) {
4307                 return rte_flow_error_set(error, ENOTSUP,
4308                                           RTE_FLOW_ERROR_TYPE_ACTION,
4309                                           NULL, "Cannot offload non IPv4/IPv6");
4310         }
4311
4312         ipv6 = (struct rte_ipv6_hdr *)next_hdr;
4313
4314         /* ignore non UDP */
4315         if (ipv6->proto != IPPROTO_UDP)
4316                 return 0;
4317
4318         udp = (struct rte_udp_hdr *)(ipv6 + 1);
4319         udp->dgram_cksum = 0;
4320
4321         return 0;
4322 }
4323
4324 /**
4325  * Convert L2 encap action to DV specification.
4326  *
4327  * @param[in] dev
4328  *   Pointer to rte_eth_dev structure.
4329  * @param[in] action
4330  *   Pointer to action structure.
4331  * @param[in, out] dev_flow
4332  *   Pointer to the mlx5_flow.
4333  * @param[in] transfer
4334  *   Mark if the flow is E-Switch flow.
4335  * @param[out] error
4336  *   Pointer to the error structure.
4337  *
4338  * @return
4339  *   0 on success, a negative errno value otherwise and rte_errno is set.
4340  */
4341 static int
4342 flow_dv_create_action_l2_encap(struct rte_eth_dev *dev,
4343                                const struct rte_flow_action *action,
4344                                struct mlx5_flow *dev_flow,
4345                                uint8_t transfer,
4346                                struct rte_flow_error *error)
4347 {
4348         const struct rte_flow_item *encap_data;
4349         const struct rte_flow_action_raw_encap *raw_encap_data;
4350         struct mlx5_flow_dv_encap_decap_resource res = {
4351                 .reformat_type =
4352                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L2_TUNNEL,
4353                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4354                                       MLX5DV_FLOW_TABLE_TYPE_NIC_TX,
4355         };
4356
4357         if (action->type == RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
4358                 raw_encap_data =
4359                         (const struct rte_flow_action_raw_encap *)action->conf;
4360                 res.size = raw_encap_data->size;
4361                 memcpy(res.buf, raw_encap_data->data, res.size);
4362         } else {
4363                 if (action->type == RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP)
4364                         encap_data =
4365                                 ((const struct rte_flow_action_vxlan_encap *)
4366                                                 action->conf)->definition;
4367                 else
4368                         encap_data =
4369                                 ((const struct rte_flow_action_nvgre_encap *)
4370                                                 action->conf)->definition;
4371                 if (flow_dv_convert_encap_data(encap_data, res.buf,
4372                                                &res.size, error))
4373                         return -rte_errno;
4374         }
4375         if (flow_dv_zero_encap_udp_csum(res.buf, error))
4376                 return -rte_errno;
4377         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4378                 return rte_flow_error_set(error, EINVAL,
4379                                           RTE_FLOW_ERROR_TYPE_ACTION,
4380                                           NULL, "can't create L2 encap action");
4381         return 0;
4382 }
4383
4384 /**
4385  * Convert L2 decap action to DV specification.
4386  *
4387  * @param[in] dev
4388  *   Pointer to rte_eth_dev structure.
4389  * @param[in, out] dev_flow
4390  *   Pointer to the mlx5_flow.
4391  * @param[in] transfer
4392  *   Mark if the flow is E-Switch flow.
4393  * @param[out] error
4394  *   Pointer to the error structure.
4395  *
4396  * @return
4397  *   0 on success, a negative errno value otherwise and rte_errno is set.
4398  */
4399 static int
4400 flow_dv_create_action_l2_decap(struct rte_eth_dev *dev,
4401                                struct mlx5_flow *dev_flow,
4402                                uint8_t transfer,
4403                                struct rte_flow_error *error)
4404 {
4405         struct mlx5_flow_dv_encap_decap_resource res = {
4406                 .size = 0,
4407                 .reformat_type =
4408                         MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TUNNEL_TO_L2,
4409                 .ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
4410                                       MLX5DV_FLOW_TABLE_TYPE_NIC_RX,
4411         };
4412
4413         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4414                 return rte_flow_error_set(error, EINVAL,
4415                                           RTE_FLOW_ERROR_TYPE_ACTION,
4416                                           NULL, "can't create L2 decap action");
4417         return 0;
4418 }
4419
4420 /**
4421  * Convert raw decap/encap (L3 tunnel) action to DV specification.
4422  *
4423  * @param[in] dev
4424  *   Pointer to rte_eth_dev structure.
4425  * @param[in] action
4426  *   Pointer to action structure.
4427  * @param[in, out] dev_flow
4428  *   Pointer to the mlx5_flow.
4429  * @param[in] attr
4430  *   Pointer to the flow attributes.
4431  * @param[out] error
4432  *   Pointer to the error structure.
4433  *
4434  * @return
4435  *   0 on success, a negative errno value otherwise and rte_errno is set.
4436  */
4437 static int
4438 flow_dv_create_action_raw_encap(struct rte_eth_dev *dev,
4439                                 const struct rte_flow_action *action,
4440                                 struct mlx5_flow *dev_flow,
4441                                 const struct rte_flow_attr *attr,
4442                                 struct rte_flow_error *error)
4443 {
4444         const struct rte_flow_action_raw_encap *encap_data;
4445         struct mlx5_flow_dv_encap_decap_resource res;
4446
4447         memset(&res, 0, sizeof(res));
4448         encap_data = (const struct rte_flow_action_raw_encap *)action->conf;
4449         res.size = encap_data->size;
4450         memcpy(res.buf, encap_data->data, res.size);
4451         res.reformat_type = res.size < MLX5_ENCAPSULATION_DECISION_SIZE ?
4452                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L3_TUNNEL_TO_L2 :
4453                 MLX5DV_FLOW_ACTION_PACKET_REFORMAT_TYPE_L2_TO_L3_TUNNEL;
4454         if (attr->transfer)
4455                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4456         else
4457                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4458                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4459         if (flow_dv_encap_decap_resource_register(dev, &res, dev_flow, error))
4460                 return rte_flow_error_set(error, EINVAL,
4461                                           RTE_FLOW_ERROR_TYPE_ACTION,
4462                                           NULL, "can't create encap action");
4463         return 0;
4464 }
4465
4466 /**
4467  * Create action push VLAN.
4468  *
4469  * @param[in] dev
4470  *   Pointer to rte_eth_dev structure.
4471  * @param[in] attr
4472  *   Pointer to the flow attributes.
4473  * @param[in] vlan
4474  *   Pointer to the vlan to push to the Ethernet header.
4475  * @param[in, out] dev_flow
4476  *   Pointer to the mlx5_flow.
4477  * @param[out] error
4478  *   Pointer to the error structure.
4479  *
4480  * @return
4481  *   0 on success, a negative errno value otherwise and rte_errno is set.
4482  */
4483 static int
4484 flow_dv_create_action_push_vlan(struct rte_eth_dev *dev,
4485                                 const struct rte_flow_attr *attr,
4486                                 const struct rte_vlan_hdr *vlan,
4487                                 struct mlx5_flow *dev_flow,
4488                                 struct rte_flow_error *error)
4489 {
4490         struct mlx5_flow_dv_push_vlan_action_resource res;
4491
4492         memset(&res, 0, sizeof(res));
4493         res.vlan_tag =
4494                 rte_cpu_to_be_32(((uint32_t)vlan->eth_proto) << 16 |
4495                                  vlan->vlan_tci);
4496         if (attr->transfer)
4497                 res.ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
4498         else
4499                 res.ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
4500                                              MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
4501         return flow_dv_push_vlan_action_resource_register
4502                                             (dev, &res, dev_flow, error);
4503 }
4504
4505 /**
4506  * Validate the modify-header actions.
4507  *
4508  * @param[in] action_flags
4509  *   Holds the actions detected until now.
4510  * @param[in] action
4511  *   Pointer to the modify action.
4512  * @param[out] error
4513  *   Pointer to error structure.
4514  *
4515  * @return
4516  *   0 on success, a negative errno value otherwise and rte_errno is set.
4517  */
4518 static int
4519 flow_dv_validate_action_modify_hdr(const uint64_t action_flags,
4520                                    const struct rte_flow_action *action,
4521                                    struct rte_flow_error *error)
4522 {
4523         if (action->type != RTE_FLOW_ACTION_TYPE_DEC_TTL && !action->conf)
4524                 return rte_flow_error_set(error, EINVAL,
4525                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
4526                                           NULL, "action configuration not set");
4527         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
4528                 return rte_flow_error_set(error, EINVAL,
4529                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
4530                                           "can't have encap action before"
4531                                           " modify action");
4532         return 0;
4533 }
4534
4535 /**
4536  * Validate the modify-header MAC address actions.
4537  *
4538  * @param[in] action_flags
4539  *   Holds the actions detected until now.
4540  * @param[in] action
4541  *   Pointer to the modify action.
4542  * @param[in] item_flags
4543  *   Holds the items detected.
4544  * @param[out] error
4545  *   Pointer to error structure.
4546  *
4547  * @return
4548  *   0 on success, a negative errno value otherwise and rte_errno is set.
4549  */
4550 static int
4551 flow_dv_validate_action_modify_mac(const uint64_t action_flags,
4552                                    const struct rte_flow_action *action,
4553                                    const uint64_t item_flags,
4554                                    struct rte_flow_error *error)
4555 {
4556         int ret = 0;
4557
4558         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4559         if (!ret) {
4560                 if (!(item_flags & MLX5_FLOW_LAYER_L2))
4561                         return rte_flow_error_set(error, EINVAL,
4562                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4563                                                   NULL,
4564                                                   "no L2 item in pattern");
4565         }
4566         return ret;
4567 }
4568
4569 /**
4570  * Validate the modify-header IPv4 address actions.
4571  *
4572  * @param[in] action_flags
4573  *   Holds the actions detected until now.
4574  * @param[in] action
4575  *   Pointer to the modify action.
4576  * @param[in] item_flags
4577  *   Holds the items detected.
4578  * @param[out] error
4579  *   Pointer to error structure.
4580  *
4581  * @return
4582  *   0 on success, a negative errno value otherwise and rte_errno is set.
4583  */
4584 static int
4585 flow_dv_validate_action_modify_ipv4(const uint64_t action_flags,
4586                                     const struct rte_flow_action *action,
4587                                     const uint64_t item_flags,
4588                                     struct rte_flow_error *error)
4589 {
4590         int ret = 0;
4591         uint64_t layer;
4592
4593         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4594         if (!ret) {
4595                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4596                                  MLX5_FLOW_LAYER_INNER_L3_IPV4 :
4597                                  MLX5_FLOW_LAYER_OUTER_L3_IPV4;
4598                 if (!(item_flags & layer))
4599                         return rte_flow_error_set(error, EINVAL,
4600                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4601                                                   NULL,
4602                                                   "no ipv4 item in pattern");
4603         }
4604         return ret;
4605 }
4606
4607 /**
4608  * Validate the modify-header IPv6 address actions.
4609  *
4610  * @param[in] action_flags
4611  *   Holds the actions detected until now.
4612  * @param[in] action
4613  *   Pointer to the modify action.
4614  * @param[in] item_flags
4615  *   Holds the items detected.
4616  * @param[out] error
4617  *   Pointer to error structure.
4618  *
4619  * @return
4620  *   0 on success, a negative errno value otherwise and rte_errno is set.
4621  */
4622 static int
4623 flow_dv_validate_action_modify_ipv6(const uint64_t action_flags,
4624                                     const struct rte_flow_action *action,
4625                                     const uint64_t item_flags,
4626                                     struct rte_flow_error *error)
4627 {
4628         int ret = 0;
4629         uint64_t layer;
4630
4631         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4632         if (!ret) {
4633                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4634                                  MLX5_FLOW_LAYER_INNER_L3_IPV6 :
4635                                  MLX5_FLOW_LAYER_OUTER_L3_IPV6;
4636                 if (!(item_flags & layer))
4637                         return rte_flow_error_set(error, EINVAL,
4638                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4639                                                   NULL,
4640                                                   "no ipv6 item in pattern");
4641         }
4642         return ret;
4643 }
4644
4645 /**
4646  * Validate the modify-header TP actions.
4647  *
4648  * @param[in] action_flags
4649  *   Holds the actions detected until now.
4650  * @param[in] action
4651  *   Pointer to the modify action.
4652  * @param[in] item_flags
4653  *   Holds the items detected.
4654  * @param[out] error
4655  *   Pointer to error structure.
4656  *
4657  * @return
4658  *   0 on success, a negative errno value otherwise and rte_errno is set.
4659  */
4660 static int
4661 flow_dv_validate_action_modify_tp(const uint64_t action_flags,
4662                                   const struct rte_flow_action *action,
4663                                   const uint64_t item_flags,
4664                                   struct rte_flow_error *error)
4665 {
4666         int ret = 0;
4667         uint64_t layer;
4668
4669         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4670         if (!ret) {
4671                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4672                                  MLX5_FLOW_LAYER_INNER_L4 :
4673                                  MLX5_FLOW_LAYER_OUTER_L4;
4674                 if (!(item_flags & layer))
4675                         return rte_flow_error_set(error, EINVAL,
4676                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4677                                                   NULL, "no transport layer "
4678                                                   "in pattern");
4679         }
4680         return ret;
4681 }
4682
4683 /**
4684  * Validate the modify-header actions of increment/decrement
4685  * TCP Sequence-number.
4686  *
4687  * @param[in] action_flags
4688  *   Holds the actions detected until now.
4689  * @param[in] action
4690  *   Pointer to the modify action.
4691  * @param[in] item_flags
4692  *   Holds the items detected.
4693  * @param[out] error
4694  *   Pointer to error structure.
4695  *
4696  * @return
4697  *   0 on success, a negative errno value otherwise and rte_errno is set.
4698  */
4699 static int
4700 flow_dv_validate_action_modify_tcp_seq(const uint64_t action_flags,
4701                                        const struct rte_flow_action *action,
4702                                        const uint64_t item_flags,
4703                                        struct rte_flow_error *error)
4704 {
4705         int ret = 0;
4706         uint64_t layer;
4707
4708         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4709         if (!ret) {
4710                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4711                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4712                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4713                 if (!(item_flags & layer))
4714                         return rte_flow_error_set(error, EINVAL,
4715                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4716                                                   NULL, "no TCP item in"
4717                                                   " pattern");
4718                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ &&
4719                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_SEQ)) ||
4720                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ &&
4721                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_SEQ)))
4722                         return rte_flow_error_set(error, EINVAL,
4723                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4724                                                   NULL,
4725                                                   "cannot decrease and increase"
4726                                                   " TCP sequence number"
4727                                                   " at the same time");
4728         }
4729         return ret;
4730 }
4731
4732 /**
4733  * Validate the modify-header actions of increment/decrement
4734  * TCP Acknowledgment number.
4735  *
4736  * @param[in] action_flags
4737  *   Holds the actions detected until now.
4738  * @param[in] action
4739  *   Pointer to the modify action.
4740  * @param[in] item_flags
4741  *   Holds the items detected.
4742  * @param[out] error
4743  *   Pointer to error structure.
4744  *
4745  * @return
4746  *   0 on success, a negative errno value otherwise and rte_errno is set.
4747  */
4748 static int
4749 flow_dv_validate_action_modify_tcp_ack(const uint64_t action_flags,
4750                                        const struct rte_flow_action *action,
4751                                        const uint64_t item_flags,
4752                                        struct rte_flow_error *error)
4753 {
4754         int ret = 0;
4755         uint64_t layer;
4756
4757         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4758         if (!ret) {
4759                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4760                                  MLX5_FLOW_LAYER_INNER_L4_TCP :
4761                                  MLX5_FLOW_LAYER_OUTER_L4_TCP;
4762                 if (!(item_flags & layer))
4763                         return rte_flow_error_set(error, EINVAL,
4764                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4765                                                   NULL, "no TCP item in"
4766                                                   " pattern");
4767                 if ((action->type == RTE_FLOW_ACTION_TYPE_INC_TCP_ACK &&
4768                         (action_flags & MLX5_FLOW_ACTION_DEC_TCP_ACK)) ||
4769                     (action->type == RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK &&
4770                         (action_flags & MLX5_FLOW_ACTION_INC_TCP_ACK)))
4771                         return rte_flow_error_set(error, EINVAL,
4772                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4773                                                   NULL,
4774                                                   "cannot decrease and increase"
4775                                                   " TCP acknowledgment number"
4776                                                   " at the same time");
4777         }
4778         return ret;
4779 }
4780
4781 /**
4782  * Validate the modify-header TTL actions.
4783  *
4784  * @param[in] action_flags
4785  *   Holds the actions detected until now.
4786  * @param[in] action
4787  *   Pointer to the modify action.
4788  * @param[in] item_flags
4789  *   Holds the items detected.
4790  * @param[out] error
4791  *   Pointer to error structure.
4792  *
4793  * @return
4794  *   0 on success, a negative errno value otherwise and rte_errno is set.
4795  */
4796 static int
4797 flow_dv_validate_action_modify_ttl(const uint64_t action_flags,
4798                                    const struct rte_flow_action *action,
4799                                    const uint64_t item_flags,
4800                                    struct rte_flow_error *error)
4801 {
4802         int ret = 0;
4803         uint64_t layer;
4804
4805         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4806         if (!ret) {
4807                 layer = (action_flags & MLX5_FLOW_ACTION_DECAP) ?
4808                                  MLX5_FLOW_LAYER_INNER_L3 :
4809                                  MLX5_FLOW_LAYER_OUTER_L3;
4810                 if (!(item_flags & layer))
4811                         return rte_flow_error_set(error, EINVAL,
4812                                                   RTE_FLOW_ERROR_TYPE_ACTION,
4813                                                   NULL,
4814                                                   "no IP protocol in pattern");
4815         }
4816         return ret;
4817 }
4818
4819 /**
4820  * Validate the generic modify field actions.
4821  * @param[in] dev
4822  *   Pointer to the rte_eth_dev structure.
4823  * @param[in] action_flags
4824  *   Holds the actions detected until now.
4825  * @param[in] action
4826  *   Pointer to the modify action.
4827  * @param[in] attr
4828  *   Pointer to the flow attributes.
4829  * @param[out] error
4830  *   Pointer to error structure.
4831  *
4832  * @return
4833  *   Number of header fields to modify (0 or more) on success,
4834  *   a negative errno value otherwise and rte_errno is set.
4835  */
4836 static int
4837 flow_dv_validate_action_modify_field(struct rte_eth_dev *dev,
4838                                    const uint64_t action_flags,
4839                                    const struct rte_flow_action *action,
4840                                    const struct rte_flow_attr *attr,
4841                                    struct rte_flow_error *error)
4842 {
4843         int ret = 0;
4844         struct mlx5_priv *priv = dev->data->dev_private;
4845         struct mlx5_sh_config *config = &priv->sh->config;
4846         const struct rte_flow_action_modify_field *action_modify_field =
4847                 action->conf;
4848         uint32_t dst_width = mlx5_flow_item_field_width(dev,
4849                                 action_modify_field->dst.field,
4850                                 -1, attr, error);
4851         uint32_t src_width = mlx5_flow_item_field_width(dev,
4852                                 action_modify_field->src.field,
4853                                 dst_width, attr, error);
4854
4855         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
4856         if (ret)
4857                 return ret;
4858
4859         if (action_modify_field->width == 0)
4860                 return rte_flow_error_set(error, EINVAL,
4861                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4862                                 "no bits are requested to be modified");
4863         else if (action_modify_field->width > dst_width ||
4864                  action_modify_field->width > src_width)
4865                 return rte_flow_error_set(error, EINVAL,
4866                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4867                                 "cannot modify more bits than"
4868                                 " the width of a field");
4869         if (action_modify_field->dst.field != RTE_FLOW_FIELD_VALUE &&
4870             action_modify_field->dst.field != RTE_FLOW_FIELD_POINTER) {
4871                 if ((action_modify_field->dst.offset +
4872                      action_modify_field->width > dst_width) ||
4873                     (action_modify_field->dst.offset % 32))
4874                         return rte_flow_error_set(error, EINVAL,
4875                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4876                                         "destination offset is too big"
4877                                         " or not aligned to 4 bytes");
4878                 if (action_modify_field->dst.level &&
4879                     action_modify_field->dst.field != RTE_FLOW_FIELD_TAG)
4880                         return rte_flow_error_set(error, ENOTSUP,
4881                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4882                                         "inner header fields modification"
4883                                         " is not supported");
4884         }
4885         if (action_modify_field->src.field != RTE_FLOW_FIELD_VALUE &&
4886             action_modify_field->src.field != RTE_FLOW_FIELD_POINTER) {
4887                 if (!attr->transfer && !attr->group)
4888                         return rte_flow_error_set(error, ENOTSUP,
4889                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4890                                         "modify field action is not"
4891                                         " supported for group 0");
4892                 if ((action_modify_field->src.offset +
4893                      action_modify_field->width > src_width) ||
4894                     (action_modify_field->src.offset % 32))
4895                         return rte_flow_error_set(error, EINVAL,
4896                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4897                                         "source offset is too big"
4898                                         " or not aligned to 4 bytes");
4899                 if (action_modify_field->src.level &&
4900                     action_modify_field->src.field != RTE_FLOW_FIELD_TAG)
4901                         return rte_flow_error_set(error, ENOTSUP,
4902                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4903                                         "inner header fields modification"
4904                                         " is not supported");
4905         }
4906         if ((action_modify_field->dst.field ==
4907              action_modify_field->src.field) &&
4908             (action_modify_field->dst.level ==
4909              action_modify_field->src.level))
4910                 return rte_flow_error_set(error, EINVAL,
4911                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4912                                 "source and destination fields"
4913                                 " cannot be the same");
4914         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VALUE ||
4915             action_modify_field->dst.field == RTE_FLOW_FIELD_POINTER ||
4916             action_modify_field->dst.field == RTE_FLOW_FIELD_MARK)
4917                 return rte_flow_error_set(error, EINVAL,
4918                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4919                                 "mark, immediate value or a pointer to it"
4920                                 " cannot be used as a destination");
4921         if (action_modify_field->dst.field == RTE_FLOW_FIELD_START ||
4922             action_modify_field->src.field == RTE_FLOW_FIELD_START)
4923                 return rte_flow_error_set(error, ENOTSUP,
4924                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4925                                 "modifications of an arbitrary"
4926                                 " place in a packet is not supported");
4927         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VLAN_TYPE ||
4928             action_modify_field->src.field == RTE_FLOW_FIELD_VLAN_TYPE)
4929                 return rte_flow_error_set(error, ENOTSUP,
4930                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4931                                 "modifications of the 802.1Q Tag"
4932                                 " Identifier is not supported");
4933         if (action_modify_field->dst.field == RTE_FLOW_FIELD_VXLAN_VNI ||
4934             action_modify_field->src.field == RTE_FLOW_FIELD_VXLAN_VNI)
4935                 return rte_flow_error_set(error, ENOTSUP,
4936                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4937                                 "modifications of the VXLAN Network"
4938                                 " Identifier is not supported");
4939         if (action_modify_field->dst.field == RTE_FLOW_FIELD_GENEVE_VNI ||
4940             action_modify_field->src.field == RTE_FLOW_FIELD_GENEVE_VNI)
4941                 return rte_flow_error_set(error, ENOTSUP,
4942                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4943                                 "modifications of the GENEVE Network"
4944                                 " Identifier is not supported");
4945         if (action_modify_field->dst.field == RTE_FLOW_FIELD_MARK ||
4946             action_modify_field->src.field == RTE_FLOW_FIELD_MARK)
4947                 if (config->dv_xmeta_en == MLX5_XMETA_MODE_LEGACY ||
4948                     !mlx5_flow_ext_mreg_supported(dev))
4949                         return rte_flow_error_set(error, ENOTSUP,
4950                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4951                                         "cannot modify mark in legacy mode"
4952                                         " or without extensive registers");
4953         if (action_modify_field->dst.field == RTE_FLOW_FIELD_META ||
4954             action_modify_field->src.field == RTE_FLOW_FIELD_META) {
4955                 if (config->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
4956                     !mlx5_flow_ext_mreg_supported(dev))
4957                         return rte_flow_error_set(error, ENOTSUP,
4958                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4959                                         "cannot modify meta without"
4960                                         " extensive registers support");
4961                 ret = flow_dv_get_metadata_reg(dev, attr, error);
4962                 if (ret < 0 || ret == REG_NON)
4963                         return rte_flow_error_set(error, ENOTSUP,
4964                                         RTE_FLOW_ERROR_TYPE_ACTION, action,
4965                                         "cannot modify meta without"
4966                                         " extensive registers available");
4967         }
4968         if (action_modify_field->operation != RTE_FLOW_MODIFY_SET)
4969                 return rte_flow_error_set(error, ENOTSUP,
4970                                 RTE_FLOW_ERROR_TYPE_ACTION, action,
4971                                 "add and sub operations"
4972                                 " are not supported");
4973         return (action_modify_field->width / 32) +
4974                !!(action_modify_field->width % 32);
4975 }
4976
4977 /**
4978  * Validate jump action.
4979  *
4980  * @param[in] action
4981  *   Pointer to the jump action.
4982  * @param[in] action_flags
4983  *   Holds the actions detected until now.
4984  * @param[in] attributes
4985  *   Pointer to flow attributes
4986  * @param[in] external
4987  *   Action belongs to flow rule created by request external to PMD.
4988  * @param[out] error
4989  *   Pointer to error structure.
4990  *
4991  * @return
4992  *   0 on success, a negative errno value otherwise and rte_errno is set.
4993  */
4994 static int
4995 flow_dv_validate_action_jump(struct rte_eth_dev *dev,
4996                              const struct mlx5_flow_tunnel *tunnel,
4997                              const struct rte_flow_action *action,
4998                              uint64_t action_flags,
4999                              const struct rte_flow_attr *attributes,
5000                              bool external, struct rte_flow_error *error)
5001 {
5002         uint32_t target_group, table = 0;
5003         int ret = 0;
5004         struct flow_grp_info grp_info = {
5005                 .external = !!external,
5006                 .transfer = !!attributes->transfer,
5007                 .fdb_def_rule = 1,
5008                 .std_tbl_fix = 0
5009         };
5010         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5011                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5012                 return rte_flow_error_set(error, EINVAL,
5013                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5014                                           "can't have 2 fate actions in"
5015                                           " same flow");
5016         if (!action->conf)
5017                 return rte_flow_error_set(error, EINVAL,
5018                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5019                                           NULL, "action configuration not set");
5020         target_group =
5021                 ((const struct rte_flow_action_jump *)action->conf)->group;
5022         ret = mlx5_flow_group_to_table(dev, tunnel, target_group, &table,
5023                                        &grp_info, error);
5024         if (ret)
5025                 return ret;
5026         if (attributes->group == target_group &&
5027             !(action_flags & (MLX5_FLOW_ACTION_TUNNEL_SET |
5028                               MLX5_FLOW_ACTION_TUNNEL_MATCH)))
5029                 return rte_flow_error_set(error, EINVAL,
5030                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5031                                           "target group must be other than"
5032                                           " the current flow group");
5033         if (table == 0)
5034                 return rte_flow_error_set(error, EINVAL,
5035                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5036                                           NULL, "root table shouldn't be destination");
5037         return 0;
5038 }
5039
5040 /*
5041  * Validate action PORT_ID / REPRESENTED_PORT.
5042  *
5043  * @param[in] dev
5044  *   Pointer to rte_eth_dev structure.
5045  * @param[in] action_flags
5046  *   Bit-fields that holds the actions detected until now.
5047  * @param[in] action
5048  *   PORT_ID / REPRESENTED_PORT action structure.
5049  * @param[in] attr
5050  *   Attributes of flow that includes this action.
5051  * @param[out] error
5052  *   Pointer to error structure.
5053  *
5054  * @return
5055  *   0 on success, a negative errno value otherwise and rte_errno is set.
5056  */
5057 static int
5058 flow_dv_validate_action_port_id(struct rte_eth_dev *dev,
5059                                 uint64_t action_flags,
5060                                 const struct rte_flow_action *action,
5061                                 const struct rte_flow_attr *attr,
5062                                 struct rte_flow_error *error)
5063 {
5064         const struct rte_flow_action_port_id *port_id;
5065         const struct rte_flow_action_ethdev *ethdev;
5066         struct mlx5_priv *act_priv;
5067         struct mlx5_priv *dev_priv;
5068         uint16_t port;
5069
5070         if (!attr->transfer)
5071                 return rte_flow_error_set(error, ENOTSUP,
5072                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5073                                           NULL,
5074                                           "port action is valid in transfer"
5075                                           " mode only");
5076         if (!action || !action->conf)
5077                 return rte_flow_error_set(error, ENOTSUP,
5078                                           RTE_FLOW_ERROR_TYPE_ACTION_CONF,
5079                                           NULL,
5080                                           "port action parameters must be"
5081                                           " specified");
5082         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
5083                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
5084                 return rte_flow_error_set(error, EINVAL,
5085                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5086                                           "can have only one fate actions in"
5087                                           " a flow");
5088         dev_priv = mlx5_dev_to_eswitch_info(dev);
5089         if (!dev_priv)
5090                 return rte_flow_error_set(error, rte_errno,
5091                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5092                                           NULL,
5093                                           "failed to obtain E-Switch info");
5094         switch (action->type) {
5095         case RTE_FLOW_ACTION_TYPE_PORT_ID:
5096                 port_id = action->conf;
5097                 port = port_id->original ? dev->data->port_id : port_id->id;
5098                 break;
5099         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5100                 ethdev = action->conf;
5101                 port = ethdev->port_id;
5102                 break;
5103         default:
5104                 MLX5_ASSERT(false);
5105                 return rte_flow_error_set
5106                                 (error, EINVAL,
5107                                  RTE_FLOW_ERROR_TYPE_ACTION, action,
5108                                  "unknown E-Switch action");
5109         }
5110         act_priv = mlx5_port_to_eswitch_info(port, false);
5111         if (!act_priv)
5112                 return rte_flow_error_set
5113                                 (error, rte_errno,
5114                                  RTE_FLOW_ERROR_TYPE_ACTION_CONF, action->conf,
5115                                  "failed to obtain E-Switch port id for port");
5116         if (act_priv->domain_id != dev_priv->domain_id)
5117                 return rte_flow_error_set
5118                                 (error, EINVAL,
5119                                  RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5120                                  "port does not belong to"
5121                                  " E-Switch being configured");
5122         return 0;
5123 }
5124
5125 /**
5126  * Get the maximum number of modify header actions.
5127  *
5128  * @param dev
5129  *   Pointer to rte_eth_dev structure.
5130  * @param root
5131  *   Whether action is on root table.
5132  *
5133  * @return
5134  *   Max number of modify header actions device can support.
5135  */
5136 static inline unsigned int
5137 flow_dv_modify_hdr_action_max(struct rte_eth_dev *dev __rte_unused,
5138                               bool root)
5139 {
5140         /*
5141          * There's no way to directly query the max capacity from FW.
5142          * The maximal value on root table should be assumed to be supported.
5143          */
5144         if (!root)
5145                 return MLX5_MAX_MODIFY_NUM;
5146         else
5147                 return MLX5_ROOT_TBL_MODIFY_NUM;
5148 }
5149
5150 /**
5151  * Validate the meter action.
5152  *
5153  * @param[in] dev
5154  *   Pointer to rte_eth_dev structure.
5155  * @param[in] action_flags
5156  *   Bit-fields that holds the actions detected until now.
5157  * @param[in] item_flags
5158  *   Holds the items detected.
5159  * @param[in] action
5160  *   Pointer to the meter action.
5161  * @param[in] attr
5162  *   Attributes of flow that includes this action.
5163  * @param[in] port_id_item
5164  *   Pointer to item indicating port id.
5165  * @param[out] error
5166  *   Pointer to error structure.
5167  *
5168  * @return
5169  *   0 on success, a negative errno value otherwise and rte_errno is set.
5170  */
5171 static int
5172 mlx5_flow_validate_action_meter(struct rte_eth_dev *dev,
5173                                 uint64_t action_flags, uint64_t item_flags,
5174                                 const struct rte_flow_action *action,
5175                                 const struct rte_flow_attr *attr,
5176                                 const struct rte_flow_item *port_id_item,
5177                                 bool *def_policy,
5178                                 struct rte_flow_error *error)
5179 {
5180         struct mlx5_priv *priv = dev->data->dev_private;
5181         const struct rte_flow_action_meter *am = action->conf;
5182         struct mlx5_flow_meter_info *fm;
5183         struct mlx5_flow_meter_policy *mtr_policy;
5184         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
5185
5186         if (!am)
5187                 return rte_flow_error_set(error, EINVAL,
5188                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5189                                           "meter action conf is NULL");
5190
5191         if (action_flags & MLX5_FLOW_ACTION_METER)
5192                 return rte_flow_error_set(error, ENOTSUP,
5193                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5194                                           "meter chaining not support");
5195         if (action_flags & MLX5_FLOW_ACTION_JUMP)
5196                 return rte_flow_error_set(error, ENOTSUP,
5197                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5198                                           "meter with jump not support");
5199         if (!priv->mtr_en)
5200                 return rte_flow_error_set(error, ENOTSUP,
5201                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5202                                           NULL,
5203                                           "meter action not supported");
5204         fm = mlx5_flow_meter_find(priv, am->mtr_id, NULL);
5205         if (!fm)
5206                 return rte_flow_error_set(error, EINVAL,
5207                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5208                                           "Meter not found");
5209         /* aso meter can always be shared by different domains */
5210         if (fm->ref_cnt && !priv->sh->meter_aso_en &&
5211             !(fm->transfer == attr->transfer ||
5212               (!fm->ingress && !attr->ingress && attr->egress) ||
5213               (!fm->egress && !attr->egress && attr->ingress)))
5214                 return rte_flow_error_set(error, EINVAL,
5215                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5216                         "Flow attributes domain are either invalid "
5217                         "or have a domain conflict with current "
5218                         "meter attributes");
5219         if (fm->def_policy) {
5220                 if (!((attr->transfer &&
5221                         mtrmng->def_policy[MLX5_MTR_DOMAIN_TRANSFER]) ||
5222                         (attr->egress &&
5223                         mtrmng->def_policy[MLX5_MTR_DOMAIN_EGRESS]) ||
5224                         (attr->ingress &&
5225                         mtrmng->def_policy[MLX5_MTR_DOMAIN_INGRESS])))
5226                         return rte_flow_error_set(error, EINVAL,
5227                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5228                                           "Flow attributes domain "
5229                                           "have a conflict with current "
5230                                           "meter domain attributes");
5231                 *def_policy = true;
5232         } else {
5233                 mtr_policy = mlx5_flow_meter_policy_find(dev,
5234                                                 fm->policy_id, NULL);
5235                 if (!mtr_policy)
5236                         return rte_flow_error_set(error, EINVAL,
5237                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5238                                           "Invalid policy id for meter ");
5239                 if (!((attr->transfer && mtr_policy->transfer) ||
5240                         (attr->egress && mtr_policy->egress) ||
5241                         (attr->ingress && mtr_policy->ingress)))
5242                         return rte_flow_error_set(error, EINVAL,
5243                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5244                                           "Flow attributes domain "
5245                                           "have a conflict with current "
5246                                           "meter domain attributes");
5247                 if (attr->transfer && mtr_policy->dev) {
5248                         /**
5249                          * When policy has fate action of port_id,
5250                          * the flow should have the same src port as policy.
5251                          */
5252                         struct mlx5_priv *policy_port_priv =
5253                                         mtr_policy->dev->data->dev_private;
5254                         int32_t flow_src_port = priv->representor_id;
5255
5256                         if (port_id_item) {
5257                                 const struct rte_flow_item_port_id *spec =
5258                                                         port_id_item->spec;
5259                                 struct mlx5_priv *port_priv =
5260                                         mlx5_port_to_eswitch_info(spec->id,
5261                                                                   false);
5262                                 if (!port_priv)
5263                                         return rte_flow_error_set(error,
5264                                                 rte_errno,
5265                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5266                                                 spec,
5267                                                 "Failed to get port info.");
5268                                 flow_src_port = port_priv->representor_id;
5269                         }
5270                         if (flow_src_port != policy_port_priv->representor_id)
5271                                 return rte_flow_error_set(error,
5272                                                 rte_errno,
5273                                                 RTE_FLOW_ERROR_TYPE_ITEM_SPEC,
5274                                                 NULL,
5275                                                 "Flow and meter policy "
5276                                                 "have different src port.");
5277                 } else if (mtr_policy->is_rss) {
5278                         struct mlx5_flow_meter_policy *fp;
5279                         struct mlx5_meter_policy_action_container *acg;
5280                         struct mlx5_meter_policy_action_container *acy;
5281                         const struct rte_flow_action *rss_act;
5282                         int ret;
5283
5284                         fp = mlx5_flow_meter_hierarchy_get_final_policy(dev,
5285                                                                 mtr_policy);
5286                         if (fp == NULL)
5287                                 return rte_flow_error_set(error, EINVAL,
5288                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5289                                                   "Unable to get the final "
5290                                                   "policy in the hierarchy");
5291                         acg = &fp->act_cnt[RTE_COLOR_GREEN];
5292                         acy = &fp->act_cnt[RTE_COLOR_YELLOW];
5293                         MLX5_ASSERT(acg->fate_action ==
5294                                     MLX5_FLOW_FATE_SHARED_RSS ||
5295                                     acy->fate_action ==
5296                                     MLX5_FLOW_FATE_SHARED_RSS);
5297                         if (acg->fate_action == MLX5_FLOW_FATE_SHARED_RSS)
5298                                 rss_act = acg->rss;
5299                         else
5300                                 rss_act = acy->rss;
5301                         ret = mlx5_flow_validate_action_rss(rss_act,
5302                                         action_flags, dev, attr,
5303                                         item_flags, error);
5304                         if (ret)
5305                                 return ret;
5306                 }
5307                 *def_policy = false;
5308         }
5309         return 0;
5310 }
5311
5312 /**
5313  * Validate the age action.
5314  *
5315  * @param[in] action_flags
5316  *   Holds the actions detected until now.
5317  * @param[in] action
5318  *   Pointer to the age action.
5319  * @param[in] dev
5320  *   Pointer to the Ethernet device structure.
5321  * @param[out] error
5322  *   Pointer to error structure.
5323  *
5324  * @return
5325  *   0 on success, a negative errno value otherwise and rte_errno is set.
5326  */
5327 static int
5328 flow_dv_validate_action_age(uint64_t action_flags,
5329                             const struct rte_flow_action *action,
5330                             struct rte_eth_dev *dev,
5331                             struct rte_flow_error *error)
5332 {
5333         struct mlx5_priv *priv = dev->data->dev_private;
5334         const struct rte_flow_action_age *age = action->conf;
5335
5336         if (!priv->sh->cdev->config.devx ||
5337             (priv->sh->cmng.counter_fallback && !priv->sh->aso_age_mng))
5338                 return rte_flow_error_set(error, ENOTSUP,
5339                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5340                                           NULL,
5341                                           "age action not supported");
5342         if (!(action->conf))
5343                 return rte_flow_error_set(error, EINVAL,
5344                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5345                                           "configuration cannot be null");
5346         if (!(age->timeout))
5347                 return rte_flow_error_set(error, EINVAL,
5348                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5349                                           "invalid timeout value 0");
5350         if (action_flags & MLX5_FLOW_ACTION_AGE)
5351                 return rte_flow_error_set(error, EINVAL,
5352                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5353                                           "duplicate age actions set");
5354         return 0;
5355 }
5356
5357 /**
5358  * Validate the modify-header IPv4 DSCP actions.
5359  *
5360  * @param[in] action_flags
5361  *   Holds the actions detected until now.
5362  * @param[in] action
5363  *   Pointer to the modify action.
5364  * @param[in] item_flags
5365  *   Holds the items detected.
5366  * @param[out] error
5367  *   Pointer to error structure.
5368  *
5369  * @return
5370  *   0 on success, a negative errno value otherwise and rte_errno is set.
5371  */
5372 static int
5373 flow_dv_validate_action_modify_ipv4_dscp(const uint64_t action_flags,
5374                                          const struct rte_flow_action *action,
5375                                          const uint64_t item_flags,
5376                                          struct rte_flow_error *error)
5377 {
5378         int ret = 0;
5379
5380         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5381         if (!ret) {
5382                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV4))
5383                         return rte_flow_error_set(error, EINVAL,
5384                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5385                                                   NULL,
5386                                                   "no ipv4 item in pattern");
5387         }
5388         return ret;
5389 }
5390
5391 /**
5392  * Validate the modify-header IPv6 DSCP actions.
5393  *
5394  * @param[in] action_flags
5395  *   Holds the actions detected until now.
5396  * @param[in] action
5397  *   Pointer to the modify action.
5398  * @param[in] item_flags
5399  *   Holds the items detected.
5400  * @param[out] error
5401  *   Pointer to error structure.
5402  *
5403  * @return
5404  *   0 on success, a negative errno value otherwise and rte_errno is set.
5405  */
5406 static int
5407 flow_dv_validate_action_modify_ipv6_dscp(const uint64_t action_flags,
5408                                          const struct rte_flow_action *action,
5409                                          const uint64_t item_flags,
5410                                          struct rte_flow_error *error)
5411 {
5412         int ret = 0;
5413
5414         ret = flow_dv_validate_action_modify_hdr(action_flags, action, error);
5415         if (!ret) {
5416                 if (!(item_flags & MLX5_FLOW_LAYER_L3_IPV6))
5417                         return rte_flow_error_set(error, EINVAL,
5418                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5419                                                   NULL,
5420                                                   "no ipv6 item in pattern");
5421         }
5422         return ret;
5423 }
5424
5425 int
5426 flow_dv_modify_match_cb(void *tool_ctx __rte_unused,
5427                         struct mlx5_list_entry *entry, void *cb_ctx)
5428 {
5429         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5430         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5431         struct mlx5_flow_dv_modify_hdr_resource *resource =
5432                                   container_of(entry, typeof(*resource), entry);
5433         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5434
5435         key_len += ref->actions_num * sizeof(ref->actions[0]);
5436         return ref->actions_num != resource->actions_num ||
5437                memcmp(&ref->ft_type, &resource->ft_type, key_len);
5438 }
5439
5440 static struct mlx5_indexed_pool *
5441 flow_dv_modify_ipool_get(struct mlx5_dev_ctx_shared *sh, uint8_t index)
5442 {
5443         struct mlx5_indexed_pool *ipool = __atomic_load_n
5444                                      (&sh->mdh_ipools[index], __ATOMIC_SEQ_CST);
5445
5446         if (!ipool) {
5447                 struct mlx5_indexed_pool *expected = NULL;
5448                 struct mlx5_indexed_pool_config cfg =
5449                     (struct mlx5_indexed_pool_config) {
5450                        .size = sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
5451                                                                    (index + 1) *
5452                                            sizeof(struct mlx5_modification_cmd),
5453                        .trunk_size = 64,
5454                        .grow_trunk = 3,
5455                        .grow_shift = 2,
5456                        .need_lock = 1,
5457                        .release_mem_en = !!sh->config.reclaim_mode,
5458                        .per_core_cache =
5459                                        sh->config.reclaim_mode ? 0 : (1 << 16),
5460                        .malloc = mlx5_malloc,
5461                        .free = mlx5_free,
5462                        .type = "mlx5_modify_action_resource",
5463                 };
5464
5465                 cfg.size = RTE_ALIGN(cfg.size, sizeof(ipool));
5466                 ipool = mlx5_ipool_create(&cfg);
5467                 if (!ipool)
5468                         return NULL;
5469                 if (!__atomic_compare_exchange_n(&sh->mdh_ipools[index],
5470                                                  &expected, ipool, false,
5471                                                  __ATOMIC_SEQ_CST,
5472                                                  __ATOMIC_SEQ_CST)) {
5473                         mlx5_ipool_destroy(ipool);
5474                         ipool = __atomic_load_n(&sh->mdh_ipools[index],
5475                                                 __ATOMIC_SEQ_CST);
5476                 }
5477         }
5478         return ipool;
5479 }
5480
5481 struct mlx5_list_entry *
5482 flow_dv_modify_create_cb(void *tool_ctx, void *cb_ctx)
5483 {
5484         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5485         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5486         struct mlx5dv_dr_domain *ns;
5487         struct mlx5_flow_dv_modify_hdr_resource *entry;
5488         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5489         struct mlx5_indexed_pool *ipool = flow_dv_modify_ipool_get(sh,
5490                                                           ref->actions_num - 1);
5491         int ret;
5492         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5493         uint32_t key_len = sizeof(*ref) - offsetof(typeof(*ref), ft_type);
5494         uint32_t idx;
5495
5496         if (unlikely(!ipool)) {
5497                 rte_flow_error_set(ctx->error, ENOMEM,
5498                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5499                                    NULL, "cannot allocate modify ipool");
5500                 return NULL;
5501         }
5502         entry = mlx5_ipool_zmalloc(ipool, &idx);
5503         if (!entry) {
5504                 rte_flow_error_set(ctx->error, ENOMEM,
5505                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5506                                    "cannot allocate resource memory");
5507                 return NULL;
5508         }
5509         rte_memcpy(&entry->ft_type,
5510                    RTE_PTR_ADD(ref, offsetof(typeof(*ref), ft_type)),
5511                    key_len + data_len);
5512         if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
5513                 ns = sh->fdb_domain;
5514         else if (entry->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
5515                 ns = sh->tx_domain;
5516         else
5517                 ns = sh->rx_domain;
5518         ret = mlx5_flow_os_create_flow_action_modify_header
5519                                         (sh->cdev->ctx, ns, entry,
5520                                          data_len, &entry->action);
5521         if (ret) {
5522                 mlx5_ipool_free(sh->mdh_ipools[ref->actions_num - 1], idx);
5523                 rte_flow_error_set(ctx->error, ENOMEM,
5524                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5525                                    NULL, "cannot create modification action");
5526                 return NULL;
5527         }
5528         entry->idx = idx;
5529         return &entry->entry;
5530 }
5531
5532 struct mlx5_list_entry *
5533 flow_dv_modify_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
5534                         void *cb_ctx)
5535 {
5536         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5537         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
5538         struct mlx5_flow_dv_modify_hdr_resource *entry;
5539         struct mlx5_flow_dv_modify_hdr_resource *ref = ctx->data;
5540         uint32_t data_len = ref->actions_num * sizeof(ref->actions[0]);
5541         uint32_t idx;
5542
5543         entry = mlx5_ipool_malloc(sh->mdh_ipools[ref->actions_num - 1],
5544                                   &idx);
5545         if (!entry) {
5546                 rte_flow_error_set(ctx->error, ENOMEM,
5547                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
5548                                    "cannot allocate resource memory");
5549                 return NULL;
5550         }
5551         memcpy(entry, oentry, sizeof(*entry) + data_len);
5552         entry->idx = idx;
5553         return &entry->entry;
5554 }
5555
5556 void
5557 flow_dv_modify_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
5558 {
5559         struct mlx5_dev_ctx_shared *sh = tool_ctx;
5560         struct mlx5_flow_dv_modify_hdr_resource *res =
5561                 container_of(entry, typeof(*res), entry);
5562
5563         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
5564 }
5565
5566 /**
5567  * Validate the sample action.
5568  *
5569  * @param[in, out] action_flags
5570  *   Holds the actions detected until now.
5571  * @param[in] action
5572  *   Pointer to the sample action.
5573  * @param[in] dev
5574  *   Pointer to the Ethernet device structure.
5575  * @param[in] attr
5576  *   Attributes of flow that includes this action.
5577  * @param[in] item_flags
5578  *   Holds the items detected.
5579  * @param[in] rss
5580  *   Pointer to the RSS action.
5581  * @param[out] sample_rss
5582  *   Pointer to the RSS action in sample action list.
5583  * @param[out] count
5584  *   Pointer to the COUNT action in sample action list.
5585  * @param[out] fdb_mirror_limit
5586  *   Pointer to the FDB mirror limitation flag.
5587  * @param[out] error
5588  *   Pointer to error structure.
5589  *
5590  * @return
5591  *   0 on success, a negative errno value otherwise and rte_errno is set.
5592  */
5593 static int
5594 flow_dv_validate_action_sample(uint64_t *action_flags,
5595                                const struct rte_flow_action *action,
5596                                struct rte_eth_dev *dev,
5597                                const struct rte_flow_attr *attr,
5598                                uint64_t item_flags,
5599                                const struct rte_flow_action_rss *rss,
5600                                const struct rte_flow_action_rss **sample_rss,
5601                                const struct rte_flow_action_count **count,
5602                                int *fdb_mirror_limit,
5603                                struct rte_flow_error *error)
5604 {
5605         struct mlx5_priv *priv = dev->data->dev_private;
5606         struct mlx5_sh_config *dev_conf = &priv->sh->config;
5607         const struct rte_flow_action_sample *sample = action->conf;
5608         const struct rte_flow_action *act;
5609         uint64_t sub_action_flags = 0;
5610         uint16_t queue_index = 0xFFFF;
5611         int actions_n = 0;
5612         int ret;
5613
5614         if (!sample)
5615                 return rte_flow_error_set(error, EINVAL,
5616                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5617                                           "configuration cannot be NULL");
5618         if (sample->ratio == 0)
5619                 return rte_flow_error_set(error, EINVAL,
5620                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5621                                           "ratio value starts from 1");
5622         if (!priv->sh->cdev->config.devx ||
5623             (sample->ratio > 0 && !priv->sampler_en))
5624                 return rte_flow_error_set(error, ENOTSUP,
5625                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
5626                                           NULL,
5627                                           "sample action not supported");
5628         if (*action_flags & MLX5_FLOW_ACTION_SAMPLE)
5629                 return rte_flow_error_set(error, EINVAL,
5630                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5631                                           "Multiple sample actions not "
5632                                           "supported");
5633         if (*action_flags & MLX5_FLOW_ACTION_METER)
5634                 return rte_flow_error_set(error, EINVAL,
5635                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5636                                           "wrong action order, meter should "
5637                                           "be after sample action");
5638         if (*action_flags & MLX5_FLOW_ACTION_JUMP)
5639                 return rte_flow_error_set(error, EINVAL,
5640                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5641                                           "wrong action order, jump should "
5642                                           "be after sample action");
5643         if (*action_flags & MLX5_FLOW_ACTION_CT)
5644                 return rte_flow_error_set(error, EINVAL,
5645                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
5646                                           "Sample after CT not supported");
5647         act = sample->actions;
5648         for (; act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
5649                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
5650                         return rte_flow_error_set(error, ENOTSUP,
5651                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5652                                                   act, "too many actions");
5653                 switch (act->type) {
5654                 case RTE_FLOW_ACTION_TYPE_QUEUE:
5655                         ret = mlx5_flow_validate_action_queue(act,
5656                                                               sub_action_flags,
5657                                                               dev,
5658                                                               attr, error);
5659                         if (ret < 0)
5660                                 return ret;
5661                         queue_index = ((const struct rte_flow_action_queue *)
5662                                                         (act->conf))->index;
5663                         sub_action_flags |= MLX5_FLOW_ACTION_QUEUE;
5664                         ++actions_n;
5665                         break;
5666                 case RTE_FLOW_ACTION_TYPE_RSS:
5667                         *sample_rss = act->conf;
5668                         ret = mlx5_flow_validate_action_rss(act,
5669                                                             sub_action_flags,
5670                                                             dev, attr,
5671                                                             item_flags,
5672                                                             error);
5673                         if (ret < 0)
5674                                 return ret;
5675                         if (rss && *sample_rss &&
5676                             ((*sample_rss)->level != rss->level ||
5677                             (*sample_rss)->types != rss->types))
5678                                 return rte_flow_error_set(error, ENOTSUP,
5679                                         RTE_FLOW_ERROR_TYPE_ACTION,
5680                                         NULL,
5681                                         "Can't use the different RSS types "
5682                                         "or level in the same flow");
5683                         if (*sample_rss != NULL && (*sample_rss)->queue_num)
5684                                 queue_index = (*sample_rss)->queue[0];
5685                         sub_action_flags |= MLX5_FLOW_ACTION_RSS;
5686                         ++actions_n;
5687                         break;
5688                 case RTE_FLOW_ACTION_TYPE_MARK:
5689                         ret = flow_dv_validate_action_mark(dev, act,
5690                                                            sub_action_flags,
5691                                                            attr, error);
5692                         if (ret < 0)
5693                                 return ret;
5694                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY)
5695                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK |
5696                                                 MLX5_FLOW_ACTION_MARK_EXT;
5697                         else
5698                                 sub_action_flags |= MLX5_FLOW_ACTION_MARK;
5699                         ++actions_n;
5700                         break;
5701                 case RTE_FLOW_ACTION_TYPE_COUNT:
5702                         ret = flow_dv_validate_action_count
5703                                 (dev, false, *action_flags | sub_action_flags,
5704                                  attr, error);
5705                         if (ret < 0)
5706                                 return ret;
5707                         *count = act->conf;
5708                         sub_action_flags |= MLX5_FLOW_ACTION_COUNT;
5709                         *action_flags |= MLX5_FLOW_ACTION_COUNT;
5710                         ++actions_n;
5711                         break;
5712                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
5713                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
5714                         ret = flow_dv_validate_action_port_id(dev,
5715                                                               sub_action_flags,
5716                                                               act,
5717                                                               attr,
5718                                                               error);
5719                         if (ret)
5720                                 return ret;
5721                         sub_action_flags |= MLX5_FLOW_ACTION_PORT_ID;
5722                         ++actions_n;
5723                         break;
5724                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
5725                         ret = flow_dv_validate_action_raw_encap_decap
5726                                 (dev, NULL, act->conf, attr, &sub_action_flags,
5727                                  &actions_n, action, item_flags, error);
5728                         if (ret < 0)
5729                                 return ret;
5730                         ++actions_n;
5731                         break;
5732                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
5733                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
5734                         ret = flow_dv_validate_action_l2_encap(dev,
5735                                                                sub_action_flags,
5736                                                                act, attr,
5737                                                                error);
5738                         if (ret < 0)
5739                                 return ret;
5740                         sub_action_flags |= MLX5_FLOW_ACTION_ENCAP;
5741                         ++actions_n;
5742                         break;
5743                 default:
5744                         return rte_flow_error_set(error, ENOTSUP,
5745                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5746                                                   NULL,
5747                                                   "Doesn't support optional "
5748                                                   "action");
5749                 }
5750         }
5751         if (attr->ingress && !attr->transfer) {
5752                 if (!(sub_action_flags & (MLX5_FLOW_ACTION_QUEUE |
5753                                           MLX5_FLOW_ACTION_RSS)))
5754                         return rte_flow_error_set(error, EINVAL,
5755                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5756                                                   NULL,
5757                                                   "Ingress must has a dest "
5758                                                   "QUEUE for Sample");
5759         } else if (attr->egress && !attr->transfer) {
5760                 return rte_flow_error_set(error, ENOTSUP,
5761                                           RTE_FLOW_ERROR_TYPE_ACTION,
5762                                           NULL,
5763                                           "Sample Only support Ingress "
5764                                           "or E-Switch");
5765         } else if (sample->actions->type != RTE_FLOW_ACTION_TYPE_END) {
5766                 MLX5_ASSERT(attr->transfer);
5767                 if (sample->ratio > 1)
5768                         return rte_flow_error_set(error, ENOTSUP,
5769                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5770                                                   NULL,
5771                                                   "E-Switch doesn't support "
5772                                                   "any optional action "
5773                                                   "for sampling");
5774                 if (sub_action_flags & MLX5_FLOW_ACTION_QUEUE)
5775                         return rte_flow_error_set(error, ENOTSUP,
5776                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5777                                                   NULL,
5778                                                   "unsupported action QUEUE");
5779                 if (sub_action_flags & MLX5_FLOW_ACTION_RSS)
5780                         return rte_flow_error_set(error, ENOTSUP,
5781                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5782                                                   NULL,
5783                                                   "unsupported action QUEUE");
5784                 if (!(sub_action_flags & MLX5_FLOW_ACTION_PORT_ID))
5785                         return rte_flow_error_set(error, EINVAL,
5786                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5787                                                   NULL,
5788                                                   "E-Switch must has a dest "
5789                                                   "port for mirroring");
5790                 if (!priv->sh->cdev->config.hca_attr.reg_c_preserve &&
5791                      priv->representor_id != UINT16_MAX)
5792                         *fdb_mirror_limit = 1;
5793         }
5794         /* Continue validation for Xcap actions.*/
5795         if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) &&
5796             (queue_index == 0xFFFF || !mlx5_rxq_is_hairpin(dev, queue_index))) {
5797                 if ((sub_action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
5798                      MLX5_FLOW_XCAP_ACTIONS)
5799                         return rte_flow_error_set(error, ENOTSUP,
5800                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5801                                                   NULL, "encap and decap "
5802                                                   "combination aren't "
5803                                                   "supported");
5804                 if (!attr->transfer && attr->ingress && (sub_action_flags &
5805                                                         MLX5_FLOW_ACTION_ENCAP))
5806                         return rte_flow_error_set(error, ENOTSUP,
5807                                                   RTE_FLOW_ERROR_TYPE_ACTION,
5808                                                   NULL, "encap is not supported"
5809                                                   " for ingress traffic");
5810         }
5811         return 0;
5812 }
5813
5814 /**
5815  * Find existing modify-header resource or create and register a new one.
5816  *
5817  * @param dev[in, out]
5818  *   Pointer to rte_eth_dev structure.
5819  * @param[in, out] resource
5820  *   Pointer to modify-header resource.
5821  * @parm[in, out] dev_flow
5822  *   Pointer to the dev_flow.
5823  * @param[out] error
5824  *   pointer to error structure.
5825  *
5826  * @return
5827  *   0 on success otherwise -errno and errno is set.
5828  */
5829 static int
5830 flow_dv_modify_hdr_resource_register
5831                         (struct rte_eth_dev *dev,
5832                          struct mlx5_flow_dv_modify_hdr_resource *resource,
5833                          struct mlx5_flow *dev_flow,
5834                          struct rte_flow_error *error)
5835 {
5836         struct mlx5_priv *priv = dev->data->dev_private;
5837         struct mlx5_dev_ctx_shared *sh = priv->sh;
5838         uint32_t key_len = sizeof(*resource) -
5839                            offsetof(typeof(*resource), ft_type) +
5840                            resource->actions_num * sizeof(resource->actions[0]);
5841         struct mlx5_list_entry *entry;
5842         struct mlx5_flow_cb_ctx ctx = {
5843                 .error = error,
5844                 .data = resource,
5845         };
5846         struct mlx5_hlist *modify_cmds;
5847         uint64_t key64;
5848
5849         modify_cmds = flow_dv_hlist_prepare(sh, &sh->modify_cmds,
5850                                 "hdr_modify",
5851                                 MLX5_FLOW_HDR_MODIFY_HTABLE_SZ,
5852                                 true, false, sh,
5853                                 flow_dv_modify_create_cb,
5854                                 flow_dv_modify_match_cb,
5855                                 flow_dv_modify_remove_cb,
5856                                 flow_dv_modify_clone_cb,
5857                                 flow_dv_modify_clone_free_cb,
5858                                 error);
5859         if (unlikely(!modify_cmds))
5860                 return -rte_errno;
5861         resource->root = !dev_flow->dv.group;
5862         if (resource->actions_num > flow_dv_modify_hdr_action_max(dev,
5863                                                                 resource->root))
5864                 return rte_flow_error_set(error, EOVERFLOW,
5865                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
5866                                           "too many modify header items");
5867         key64 = __rte_raw_cksum(&resource->ft_type, key_len, 0);
5868         entry = mlx5_hlist_register(modify_cmds, key64, &ctx);
5869         if (!entry)
5870                 return -rte_errno;
5871         resource = container_of(entry, typeof(*resource), entry);
5872         dev_flow->handle->dvh.modify_hdr = resource;
5873         return 0;
5874 }
5875
5876 /**
5877  * Get DV flow counter by index.
5878  *
5879  * @param[in] dev
5880  *   Pointer to the Ethernet device structure.
5881  * @param[in] idx
5882  *   mlx5 flow counter index in the container.
5883  * @param[out] ppool
5884  *   mlx5 flow counter pool in the container.
5885  *
5886  * @return
5887  *   Pointer to the counter, NULL otherwise.
5888  */
5889 static struct mlx5_flow_counter *
5890 flow_dv_counter_get_by_idx(struct rte_eth_dev *dev,
5891                            uint32_t idx,
5892                            struct mlx5_flow_counter_pool **ppool)
5893 {
5894         struct mlx5_priv *priv = dev->data->dev_private;
5895         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5896         struct mlx5_flow_counter_pool *pool;
5897
5898         /* Decrease to original index and clear shared bit. */
5899         idx = (idx - 1) & (MLX5_CNT_SHARED_OFFSET - 1);
5900         MLX5_ASSERT(idx / MLX5_COUNTERS_PER_POOL < cmng->n);
5901         pool = cmng->pools[idx / MLX5_COUNTERS_PER_POOL];
5902         MLX5_ASSERT(pool);
5903         if (ppool)
5904                 *ppool = pool;
5905         return MLX5_POOL_GET_CNT(pool, idx % MLX5_COUNTERS_PER_POOL);
5906 }
5907
5908 /**
5909  * Check the devx counter belongs to the pool.
5910  *
5911  * @param[in] pool
5912  *   Pointer to the counter pool.
5913  * @param[in] id
5914  *   The counter devx ID.
5915  *
5916  * @return
5917  *   True if counter belongs to the pool, false otherwise.
5918  */
5919 static bool
5920 flow_dv_is_counter_in_pool(struct mlx5_flow_counter_pool *pool, int id)
5921 {
5922         int base = (pool->min_dcs->id / MLX5_COUNTERS_PER_POOL) *
5923                    MLX5_COUNTERS_PER_POOL;
5924
5925         if (id >= base && id < base + MLX5_COUNTERS_PER_POOL)
5926                 return true;
5927         return false;
5928 }
5929
5930 /**
5931  * Get a pool by devx counter ID.
5932  *
5933  * @param[in] cmng
5934  *   Pointer to the counter management.
5935  * @param[in] id
5936  *   The counter devx ID.
5937  *
5938  * @return
5939  *   The counter pool pointer if exists, NULL otherwise,
5940  */
5941 static struct mlx5_flow_counter_pool *
5942 flow_dv_find_pool_by_id(struct mlx5_flow_counter_mng *cmng, int id)
5943 {
5944         uint32_t i;
5945         struct mlx5_flow_counter_pool *pool = NULL;
5946
5947         rte_spinlock_lock(&cmng->pool_update_sl);
5948         /* Check last used pool. */
5949         if (cmng->last_pool_idx != POOL_IDX_INVALID &&
5950             flow_dv_is_counter_in_pool(cmng->pools[cmng->last_pool_idx], id)) {
5951                 pool = cmng->pools[cmng->last_pool_idx];
5952                 goto out;
5953         }
5954         /* ID out of range means no suitable pool in the container. */
5955         if (id > cmng->max_id || id < cmng->min_id)
5956                 goto out;
5957         /*
5958          * Find the pool from the end of the container, since mostly counter
5959          * ID is sequence increasing, and the last pool should be the needed
5960          * one.
5961          */
5962         i = cmng->n_valid;
5963         while (i--) {
5964                 struct mlx5_flow_counter_pool *pool_tmp = cmng->pools[i];
5965
5966                 if (flow_dv_is_counter_in_pool(pool_tmp, id)) {
5967                         pool = pool_tmp;
5968                         break;
5969                 }
5970         }
5971 out:
5972         rte_spinlock_unlock(&cmng->pool_update_sl);
5973         return pool;
5974 }
5975
5976 /**
5977  * Resize a counter container.
5978  *
5979  * @param[in] dev
5980  *   Pointer to the Ethernet device structure.
5981  *
5982  * @return
5983  *   0 on success, otherwise negative errno value and rte_errno is set.
5984  */
5985 static int
5986 flow_dv_container_resize(struct rte_eth_dev *dev)
5987 {
5988         struct mlx5_priv *priv = dev->data->dev_private;
5989         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
5990         void *old_pools = cmng->pools;
5991         uint32_t resize = cmng->n + MLX5_CNT_CONTAINER_RESIZE;
5992         uint32_t mem_size = sizeof(struct mlx5_flow_counter_pool *) * resize;
5993         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
5994
5995         if (!pools) {
5996                 rte_errno = ENOMEM;
5997                 return -ENOMEM;
5998         }
5999         if (old_pools)
6000                 memcpy(pools, old_pools, cmng->n *
6001                                        sizeof(struct mlx5_flow_counter_pool *));
6002         cmng->n = resize;
6003         cmng->pools = pools;
6004         if (old_pools)
6005                 mlx5_free(old_pools);
6006         return 0;
6007 }
6008
6009 /**
6010  * Query a devx flow counter.
6011  *
6012  * @param[in] dev
6013  *   Pointer to the Ethernet device structure.
6014  * @param[in] counter
6015  *   Index to the flow counter.
6016  * @param[out] pkts
6017  *   The statistics value of packets.
6018  * @param[out] bytes
6019  *   The statistics value of bytes.
6020  *
6021  * @return
6022  *   0 on success, otherwise a negative errno value and rte_errno is set.
6023  */
6024 static inline int
6025 _flow_dv_query_count(struct rte_eth_dev *dev, uint32_t counter, uint64_t *pkts,
6026                      uint64_t *bytes)
6027 {
6028         struct mlx5_priv *priv = dev->data->dev_private;
6029         struct mlx5_flow_counter_pool *pool = NULL;
6030         struct mlx5_flow_counter *cnt;
6031         int offset;
6032
6033         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6034         MLX5_ASSERT(pool);
6035         if (priv->sh->cmng.counter_fallback)
6036                 return mlx5_devx_cmd_flow_counter_query(cnt->dcs_when_active, 0,
6037                                         0, pkts, bytes, 0, NULL, NULL, 0);
6038         rte_spinlock_lock(&pool->sl);
6039         if (!pool->raw) {
6040                 *pkts = 0;
6041                 *bytes = 0;
6042         } else {
6043                 offset = MLX5_CNT_ARRAY_IDX(pool, cnt);
6044                 *pkts = rte_be_to_cpu_64(pool->raw->data[offset].hits);
6045                 *bytes = rte_be_to_cpu_64(pool->raw->data[offset].bytes);
6046         }
6047         rte_spinlock_unlock(&pool->sl);
6048         return 0;
6049 }
6050
6051 /**
6052  * Create and initialize a new counter pool.
6053  *
6054  * @param[in] dev
6055  *   Pointer to the Ethernet device structure.
6056  * @param[out] dcs
6057  *   The devX counter handle.
6058  * @param[in] age
6059  *   Whether the pool is for counter that was allocated for aging.
6060  * @param[in/out] cont_cur
6061  *   Pointer to the container pointer, it will be update in pool resize.
6062  *
6063  * @return
6064  *   The pool container pointer on success, NULL otherwise and rte_errno is set.
6065  */
6066 static struct mlx5_flow_counter_pool *
6067 flow_dv_pool_create(struct rte_eth_dev *dev, struct mlx5_devx_obj *dcs,
6068                     uint32_t age)
6069 {
6070         struct mlx5_priv *priv = dev->data->dev_private;
6071         struct mlx5_flow_counter_pool *pool;
6072         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6073         bool fallback = priv->sh->cmng.counter_fallback;
6074         uint32_t size = sizeof(*pool);
6075
6076         size += MLX5_COUNTERS_PER_POOL * MLX5_CNT_SIZE;
6077         size += (!age ? 0 : MLX5_COUNTERS_PER_POOL * MLX5_AGE_SIZE);
6078         pool = mlx5_malloc(MLX5_MEM_ZERO, size, 0, SOCKET_ID_ANY);
6079         if (!pool) {
6080                 rte_errno = ENOMEM;
6081                 return NULL;
6082         }
6083         pool->raw = NULL;
6084         pool->is_aged = !!age;
6085         pool->query_gen = 0;
6086         pool->min_dcs = dcs;
6087         rte_spinlock_init(&pool->sl);
6088         rte_spinlock_init(&pool->csl);
6089         TAILQ_INIT(&pool->counters[0]);
6090         TAILQ_INIT(&pool->counters[1]);
6091         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
6092         rte_spinlock_lock(&cmng->pool_update_sl);
6093         pool->index = cmng->n_valid;
6094         if (pool->index == cmng->n && flow_dv_container_resize(dev)) {
6095                 mlx5_free(pool);
6096                 rte_spinlock_unlock(&cmng->pool_update_sl);
6097                 return NULL;
6098         }
6099         cmng->pools[pool->index] = pool;
6100         cmng->n_valid++;
6101         if (unlikely(fallback)) {
6102                 int base = RTE_ALIGN_FLOOR(dcs->id, MLX5_COUNTERS_PER_POOL);
6103
6104                 if (base < cmng->min_id)
6105                         cmng->min_id = base;
6106                 if (base > cmng->max_id)
6107                         cmng->max_id = base + MLX5_COUNTERS_PER_POOL - 1;
6108                 cmng->last_pool_idx = pool->index;
6109         }
6110         rte_spinlock_unlock(&cmng->pool_update_sl);
6111         return pool;
6112 }
6113
6114 /**
6115  * Prepare a new counter and/or a new counter pool.
6116  *
6117  * @param[in] dev
6118  *   Pointer to the Ethernet device structure.
6119  * @param[out] cnt_free
6120  *   Where to put the pointer of a new counter.
6121  * @param[in] age
6122  *   Whether the pool is for counter that was allocated for aging.
6123  *
6124  * @return
6125  *   The counter pool pointer and @p cnt_free is set on success,
6126  *   NULL otherwise and rte_errno is set.
6127  */
6128 static struct mlx5_flow_counter_pool *
6129 flow_dv_counter_pool_prepare(struct rte_eth_dev *dev,
6130                              struct mlx5_flow_counter **cnt_free,
6131                              uint32_t age)
6132 {
6133         struct mlx5_priv *priv = dev->data->dev_private;
6134         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6135         struct mlx5_flow_counter_pool *pool;
6136         struct mlx5_counters tmp_tq;
6137         struct mlx5_devx_obj *dcs = NULL;
6138         struct mlx5_flow_counter *cnt;
6139         enum mlx5_counter_type cnt_type =
6140                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6141         bool fallback = priv->sh->cmng.counter_fallback;
6142         uint32_t i;
6143
6144         if (fallback) {
6145                 /* bulk_bitmap must be 0 for single counter allocation. */
6146                 dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0);
6147                 if (!dcs)
6148                         return NULL;
6149                 pool = flow_dv_find_pool_by_id(cmng, dcs->id);
6150                 if (!pool) {
6151                         pool = flow_dv_pool_create(dev, dcs, age);
6152                         if (!pool) {
6153                                 mlx5_devx_cmd_destroy(dcs);
6154                                 return NULL;
6155                         }
6156                 }
6157                 i = dcs->id % MLX5_COUNTERS_PER_POOL;
6158                 cnt = MLX5_POOL_GET_CNT(pool, i);
6159                 cnt->pool = pool;
6160                 cnt->dcs_when_free = dcs;
6161                 *cnt_free = cnt;
6162                 return pool;
6163         }
6164         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
6165         if (!dcs) {
6166                 rte_errno = ENODATA;
6167                 return NULL;
6168         }
6169         pool = flow_dv_pool_create(dev, dcs, age);
6170         if (!pool) {
6171                 mlx5_devx_cmd_destroy(dcs);
6172                 return NULL;
6173         }
6174         TAILQ_INIT(&tmp_tq);
6175         for (i = 1; i < MLX5_COUNTERS_PER_POOL; ++i) {
6176                 cnt = MLX5_POOL_GET_CNT(pool, i);
6177                 cnt->pool = pool;
6178                 TAILQ_INSERT_HEAD(&tmp_tq, cnt, next);
6179         }
6180         rte_spinlock_lock(&cmng->csl[cnt_type]);
6181         TAILQ_CONCAT(&cmng->counters[cnt_type], &tmp_tq, next);
6182         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6183         *cnt_free = MLX5_POOL_GET_CNT(pool, 0);
6184         (*cnt_free)->pool = pool;
6185         return pool;
6186 }
6187
6188 /**
6189  * Allocate a flow counter.
6190  *
6191  * @param[in] dev
6192  *   Pointer to the Ethernet device structure.
6193  * @param[in] age
6194  *   Whether the counter was allocated for aging.
6195  *
6196  * @return
6197  *   Index to flow counter on success, 0 otherwise and rte_errno is set.
6198  */
6199 static uint32_t
6200 flow_dv_counter_alloc(struct rte_eth_dev *dev, uint32_t age)
6201 {
6202         struct mlx5_priv *priv = dev->data->dev_private;
6203         struct mlx5_flow_counter_pool *pool = NULL;
6204         struct mlx5_flow_counter *cnt_free = NULL;
6205         bool fallback = priv->sh->cmng.counter_fallback;
6206         struct mlx5_flow_counter_mng *cmng = &priv->sh->cmng;
6207         enum mlx5_counter_type cnt_type =
6208                         age ? MLX5_COUNTER_TYPE_AGE : MLX5_COUNTER_TYPE_ORIGIN;
6209         uint32_t cnt_idx;
6210
6211         if (!priv->sh->cdev->config.devx) {
6212                 rte_errno = ENOTSUP;
6213                 return 0;
6214         }
6215         /* Get free counters from container. */
6216         rte_spinlock_lock(&cmng->csl[cnt_type]);
6217         cnt_free = TAILQ_FIRST(&cmng->counters[cnt_type]);
6218         if (cnt_free)
6219                 TAILQ_REMOVE(&cmng->counters[cnt_type], cnt_free, next);
6220         rte_spinlock_unlock(&cmng->csl[cnt_type]);
6221         if (!cnt_free && !flow_dv_counter_pool_prepare(dev, &cnt_free, age))
6222                 goto err;
6223         pool = cnt_free->pool;
6224         if (fallback)
6225                 cnt_free->dcs_when_active = cnt_free->dcs_when_free;
6226         /* Create a DV counter action only in the first time usage. */
6227         if (!cnt_free->action) {
6228                 uint16_t offset;
6229                 struct mlx5_devx_obj *dcs;
6230                 int ret;
6231
6232                 if (!fallback) {
6233                         offset = MLX5_CNT_ARRAY_IDX(pool, cnt_free);
6234                         dcs = pool->min_dcs;
6235                 } else {
6236                         offset = 0;
6237                         dcs = cnt_free->dcs_when_free;
6238                 }
6239                 ret = mlx5_flow_os_create_flow_action_count(dcs->obj, offset,
6240                                                             &cnt_free->action);
6241                 if (ret) {
6242                         rte_errno = errno;
6243                         goto err;
6244                 }
6245         }
6246         cnt_idx = MLX5_MAKE_CNT_IDX(pool->index,
6247                                 MLX5_CNT_ARRAY_IDX(pool, cnt_free));
6248         /* Update the counter reset values. */
6249         if (_flow_dv_query_count(dev, cnt_idx, &cnt_free->hits,
6250                                  &cnt_free->bytes))
6251                 goto err;
6252         if (!fallback && !priv->sh->cmng.query_thread_on)
6253                 /* Start the asynchronous batch query by the host thread. */
6254                 mlx5_set_query_alarm(priv->sh);
6255         /*
6256          * When the count action isn't shared (by ID), shared_info field is
6257          * used for indirect action API's refcnt.
6258          * When the counter action is not shared neither by ID nor by indirect
6259          * action API, shared info must be 1.
6260          */
6261         cnt_free->shared_info.refcnt = 1;
6262         return cnt_idx;
6263 err:
6264         if (cnt_free) {
6265                 cnt_free->pool = pool;
6266                 if (fallback)
6267                         cnt_free->dcs_when_free = cnt_free->dcs_when_active;
6268                 rte_spinlock_lock(&cmng->csl[cnt_type]);
6269                 TAILQ_INSERT_TAIL(&cmng->counters[cnt_type], cnt_free, next);
6270                 rte_spinlock_unlock(&cmng->csl[cnt_type]);
6271         }
6272         return 0;
6273 }
6274
6275 /**
6276  * Get age param from counter index.
6277  *
6278  * @param[in] dev
6279  *   Pointer to the Ethernet device structure.
6280  * @param[in] counter
6281  *   Index to the counter handler.
6282  *
6283  * @return
6284  *   The aging parameter specified for the counter index.
6285  */
6286 static struct mlx5_age_param*
6287 flow_dv_counter_idx_get_age(struct rte_eth_dev *dev,
6288                                 uint32_t counter)
6289 {
6290         struct mlx5_flow_counter *cnt;
6291         struct mlx5_flow_counter_pool *pool = NULL;
6292
6293         flow_dv_counter_get_by_idx(dev, counter, &pool);
6294         counter = (counter - 1) % MLX5_COUNTERS_PER_POOL;
6295         cnt = MLX5_POOL_GET_CNT(pool, counter);
6296         return MLX5_CNT_TO_AGE(cnt);
6297 }
6298
6299 /**
6300  * Remove a flow counter from aged counter list.
6301  *
6302  * @param[in] dev
6303  *   Pointer to the Ethernet device structure.
6304  * @param[in] counter
6305  *   Index to the counter handler.
6306  * @param[in] cnt
6307  *   Pointer to the counter handler.
6308  */
6309 static void
6310 flow_dv_counter_remove_from_age(struct rte_eth_dev *dev,
6311                                 uint32_t counter, struct mlx5_flow_counter *cnt)
6312 {
6313         struct mlx5_age_info *age_info;
6314         struct mlx5_age_param *age_param;
6315         struct mlx5_priv *priv = dev->data->dev_private;
6316         uint16_t expected = AGE_CANDIDATE;
6317
6318         age_info = GET_PORT_AGE_INFO(priv);
6319         age_param = flow_dv_counter_idx_get_age(dev, counter);
6320         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
6321                                          AGE_FREE, false, __ATOMIC_RELAXED,
6322                                          __ATOMIC_RELAXED)) {
6323                 /**
6324                  * We need the lock even it is age timeout,
6325                  * since counter may still in process.
6326                  */
6327                 rte_spinlock_lock(&age_info->aged_sl);
6328                 TAILQ_REMOVE(&age_info->aged_counters, cnt, next);
6329                 rte_spinlock_unlock(&age_info->aged_sl);
6330                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
6331         }
6332 }
6333
6334 /**
6335  * Release a flow counter.
6336  *
6337  * @param[in] dev
6338  *   Pointer to the Ethernet device structure.
6339  * @param[in] counter
6340  *   Index to the counter handler.
6341  */
6342 static void
6343 flow_dv_counter_free(struct rte_eth_dev *dev, uint32_t counter)
6344 {
6345         struct mlx5_priv *priv = dev->data->dev_private;
6346         struct mlx5_flow_counter_pool *pool = NULL;
6347         struct mlx5_flow_counter *cnt;
6348         enum mlx5_counter_type cnt_type;
6349
6350         if (!counter)
6351                 return;
6352         cnt = flow_dv_counter_get_by_idx(dev, counter, &pool);
6353         MLX5_ASSERT(pool);
6354         if (pool->is_aged) {
6355                 flow_dv_counter_remove_from_age(dev, counter, cnt);
6356         } else {
6357                 /*
6358                  * If the counter action is shared by indirect action API,
6359                  * the atomic function reduces its references counter.
6360                  * If after the reduction the action is still referenced, the
6361                  * function returns here and does not release it.
6362                  * When the counter action is not shared by
6363                  * indirect action API, shared info is 1 before the reduction,
6364                  * so this condition is failed and function doesn't return here.
6365                  */
6366                 if (__atomic_sub_fetch(&cnt->shared_info.refcnt, 1,
6367                                        __ATOMIC_RELAXED))
6368                         return;
6369         }
6370         cnt->pool = pool;
6371         /*
6372          * Put the counter back to list to be updated in none fallback mode.
6373          * Currently, we are using two list alternately, while one is in query,
6374          * add the freed counter to the other list based on the pool query_gen
6375          * value. After query finishes, add counter the list to the global
6376          * container counter list. The list changes while query starts. In
6377          * this case, lock will not be needed as query callback and release
6378          * function both operate with the different list.
6379          */
6380         if (!priv->sh->cmng.counter_fallback) {
6381                 rte_spinlock_lock(&pool->csl);
6382                 TAILQ_INSERT_TAIL(&pool->counters[pool->query_gen], cnt, next);
6383                 rte_spinlock_unlock(&pool->csl);
6384         } else {
6385                 cnt->dcs_when_free = cnt->dcs_when_active;
6386                 cnt_type = pool->is_aged ? MLX5_COUNTER_TYPE_AGE :
6387                                            MLX5_COUNTER_TYPE_ORIGIN;
6388                 rte_spinlock_lock(&priv->sh->cmng.csl[cnt_type]);
6389                 TAILQ_INSERT_TAIL(&priv->sh->cmng.counters[cnt_type],
6390                                   cnt, next);
6391                 rte_spinlock_unlock(&priv->sh->cmng.csl[cnt_type]);
6392         }
6393 }
6394
6395 /**
6396  * Resize a meter id container.
6397  *
6398  * @param[in] dev
6399  *   Pointer to the Ethernet device structure.
6400  *
6401  * @return
6402  *   0 on success, otherwise negative errno value and rte_errno is set.
6403  */
6404 static int
6405 flow_dv_mtr_container_resize(struct rte_eth_dev *dev)
6406 {
6407         struct mlx5_priv *priv = dev->data->dev_private;
6408         struct mlx5_aso_mtr_pools_mng *pools_mng =
6409                                 &priv->sh->mtrmng->pools_mng;
6410         void *old_pools = pools_mng->pools;
6411         uint32_t resize = pools_mng->n + MLX5_MTRS_CONTAINER_RESIZE;
6412         uint32_t mem_size = sizeof(struct mlx5_aso_mtr_pool *) * resize;
6413         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
6414
6415         if (!pools) {
6416                 rte_errno = ENOMEM;
6417                 return -ENOMEM;
6418         }
6419         if (!pools_mng->n)
6420                 if (mlx5_aso_queue_init(priv->sh, ASO_OPC_MOD_POLICER)) {
6421                         mlx5_free(pools);
6422                         return -ENOMEM;
6423                 }
6424         if (old_pools)
6425                 memcpy(pools, old_pools, pools_mng->n *
6426                                        sizeof(struct mlx5_aso_mtr_pool *));
6427         pools_mng->n = resize;
6428         pools_mng->pools = pools;
6429         if (old_pools)
6430                 mlx5_free(old_pools);
6431         return 0;
6432 }
6433
6434 /**
6435  * Prepare a new meter and/or a new meter pool.
6436  *
6437  * @param[in] dev
6438  *   Pointer to the Ethernet device structure.
6439  * @param[out] mtr_free
6440  *   Where to put the pointer of a new meter.g.
6441  *
6442  * @return
6443  *   The meter pool pointer and @mtr_free is set on success,
6444  *   NULL otherwise and rte_errno is set.
6445  */
6446 static struct mlx5_aso_mtr_pool *
6447 flow_dv_mtr_pool_create(struct rte_eth_dev *dev, struct mlx5_aso_mtr **mtr_free)
6448 {
6449         struct mlx5_priv *priv = dev->data->dev_private;
6450         struct mlx5_aso_mtr_pools_mng *pools_mng = &priv->sh->mtrmng->pools_mng;
6451         struct mlx5_aso_mtr_pool *pool = NULL;
6452         struct mlx5_devx_obj *dcs = NULL;
6453         uint32_t i;
6454         uint32_t log_obj_size;
6455
6456         log_obj_size = rte_log2_u32(MLX5_ASO_MTRS_PER_POOL >> 1);
6457         dcs = mlx5_devx_cmd_create_flow_meter_aso_obj(priv->sh->cdev->ctx,
6458                                                       priv->sh->cdev->pdn,
6459                                                       log_obj_size);
6460         if (!dcs) {
6461                 rte_errno = ENODATA;
6462                 return NULL;
6463         }
6464         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
6465         if (!pool) {
6466                 rte_errno = ENOMEM;
6467                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6468                 return NULL;
6469         }
6470         pool->devx_obj = dcs;
6471         rte_rwlock_write_lock(&pools_mng->resize_mtrwl);
6472         pool->index = pools_mng->n_valid;
6473         if (pool->index == pools_mng->n && flow_dv_mtr_container_resize(dev)) {
6474                 mlx5_free(pool);
6475                 claim_zero(mlx5_devx_cmd_destroy(dcs));
6476                 rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6477                 return NULL;
6478         }
6479         pools_mng->pools[pool->index] = pool;
6480         pools_mng->n_valid++;
6481         rte_rwlock_write_unlock(&pools_mng->resize_mtrwl);
6482         for (i = 1; i < MLX5_ASO_MTRS_PER_POOL; ++i) {
6483                 pool->mtrs[i].offset = i;
6484                 LIST_INSERT_HEAD(&pools_mng->meters, &pool->mtrs[i], next);
6485         }
6486         pool->mtrs[0].offset = 0;
6487         *mtr_free = &pool->mtrs[0];
6488         return pool;
6489 }
6490
6491 /**
6492  * Release a flow meter into pool.
6493  *
6494  * @param[in] dev
6495  *   Pointer to the Ethernet device structure.
6496  * @param[in] mtr_idx
6497  *   Index to aso flow meter.
6498  */
6499 static void
6500 flow_dv_aso_mtr_release_to_pool(struct rte_eth_dev *dev, uint32_t mtr_idx)
6501 {
6502         struct mlx5_priv *priv = dev->data->dev_private;
6503         struct mlx5_aso_mtr_pools_mng *pools_mng =
6504                                 &priv->sh->mtrmng->pools_mng;
6505         struct mlx5_aso_mtr *aso_mtr = mlx5_aso_meter_by_idx(priv, mtr_idx);
6506
6507         MLX5_ASSERT(aso_mtr);
6508         rte_spinlock_lock(&pools_mng->mtrsl);
6509         memset(&aso_mtr->fm, 0, sizeof(struct mlx5_flow_meter_info));
6510         aso_mtr->state = ASO_METER_FREE;
6511         LIST_INSERT_HEAD(&pools_mng->meters, aso_mtr, next);
6512         rte_spinlock_unlock(&pools_mng->mtrsl);
6513 }
6514
6515 /**
6516  * Allocate a aso flow meter.
6517  *
6518  * @param[in] dev
6519  *   Pointer to the Ethernet device structure.
6520  *
6521  * @return
6522  *   Index to aso flow meter on success, 0 otherwise and rte_errno is set.
6523  */
6524 static uint32_t
6525 flow_dv_mtr_alloc(struct rte_eth_dev *dev)
6526 {
6527         struct mlx5_priv *priv = dev->data->dev_private;
6528         struct mlx5_aso_mtr *mtr_free = NULL;
6529         struct mlx5_aso_mtr_pools_mng *pools_mng =
6530                                 &priv->sh->mtrmng->pools_mng;
6531         struct mlx5_aso_mtr_pool *pool;
6532         uint32_t mtr_idx = 0;
6533
6534         if (!priv->sh->cdev->config.devx) {
6535                 rte_errno = ENOTSUP;
6536                 return 0;
6537         }
6538         /* Allocate the flow meter memory. */
6539         /* Get free meters from management. */
6540         rte_spinlock_lock(&pools_mng->mtrsl);
6541         mtr_free = LIST_FIRST(&pools_mng->meters);
6542         if (mtr_free)
6543                 LIST_REMOVE(mtr_free, next);
6544         if (!mtr_free && !flow_dv_mtr_pool_create(dev, &mtr_free)) {
6545                 rte_spinlock_unlock(&pools_mng->mtrsl);
6546                 return 0;
6547         }
6548         mtr_free->state = ASO_METER_WAIT;
6549         rte_spinlock_unlock(&pools_mng->mtrsl);
6550         pool = container_of(mtr_free,
6551                         struct mlx5_aso_mtr_pool,
6552                         mtrs[mtr_free->offset]);
6553         mtr_idx = MLX5_MAKE_MTR_IDX(pool->index, mtr_free->offset);
6554         if (!mtr_free->fm.meter_action) {
6555 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
6556                 struct rte_flow_error error;
6557                 uint8_t reg_id;
6558
6559                 reg_id = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &error);
6560                 mtr_free->fm.meter_action =
6561                         mlx5_glue->dv_create_flow_action_aso
6562                                                 (priv->sh->rx_domain,
6563                                                  pool->devx_obj->obj,
6564                                                  mtr_free->offset,
6565                                                  (1 << MLX5_FLOW_COLOR_GREEN),
6566                                                  reg_id - REG_C_0);
6567 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
6568                 if (!mtr_free->fm.meter_action) {
6569                         flow_dv_aso_mtr_release_to_pool(dev, mtr_idx);
6570                         return 0;
6571                 }
6572         }
6573         return mtr_idx;
6574 }
6575
6576 /**
6577  * Verify the @p attributes will be correctly understood by the NIC and store
6578  * them in the @p flow if everything is correct.
6579  *
6580  * @param[in] dev
6581  *   Pointer to dev struct.
6582  * @param[in] attributes
6583  *   Pointer to flow attributes
6584  * @param[in] external
6585  *   This flow rule is created by request external to PMD.
6586  * @param[out] error
6587  *   Pointer to error structure.
6588  *
6589  * @return
6590  *   - 0 on success and non root table.
6591  *   - 1 on success and root table.
6592  *   - a negative errno value otherwise and rte_errno is set.
6593  */
6594 static int
6595 flow_dv_validate_attributes(struct rte_eth_dev *dev,
6596                             const struct mlx5_flow_tunnel *tunnel,
6597                             const struct rte_flow_attr *attributes,
6598                             const struct flow_grp_info *grp_info,
6599                             struct rte_flow_error *error)
6600 {
6601         struct mlx5_priv *priv = dev->data->dev_private;
6602         uint32_t lowest_priority = mlx5_get_lowest_priority(dev, attributes);
6603         int ret = 0;
6604
6605 #ifndef HAVE_MLX5DV_DR
6606         RTE_SET_USED(tunnel);
6607         RTE_SET_USED(grp_info);
6608         if (attributes->group)
6609                 return rte_flow_error_set(error, ENOTSUP,
6610                                           RTE_FLOW_ERROR_TYPE_ATTR_GROUP,
6611                                           NULL,
6612                                           "groups are not supported");
6613 #else
6614         uint32_t table = 0;
6615
6616         ret = mlx5_flow_group_to_table(dev, tunnel, attributes->group, &table,
6617                                        grp_info, error);
6618         if (ret)
6619                 return ret;
6620         if (!table)
6621                 ret = MLX5DV_DR_ACTION_FLAGS_ROOT_LEVEL;
6622 #endif
6623         if (attributes->priority != MLX5_FLOW_LOWEST_PRIO_INDICATOR &&
6624             attributes->priority > lowest_priority)
6625                 return rte_flow_error_set(error, ENOTSUP,
6626                                           RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY,
6627                                           NULL,
6628                                           "priority out of range");
6629         if (attributes->transfer) {
6630                 if (!priv->sh->config.dv_esw_en)
6631                         return rte_flow_error_set
6632                                 (error, ENOTSUP,
6633                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
6634                                  "E-Switch dr is not supported");
6635                 if (attributes->egress)
6636                         return rte_flow_error_set
6637                                 (error, ENOTSUP,
6638                                  RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attributes,
6639                                  "egress is not supported");
6640         }
6641         if (!(attributes->egress ^ attributes->ingress))
6642                 return rte_flow_error_set(error, ENOTSUP,
6643                                           RTE_FLOW_ERROR_TYPE_ATTR, NULL,
6644                                           "must specify exactly one of "
6645                                           "ingress or egress");
6646         return ret;
6647 }
6648
6649 static int
6650 validate_integrity_bits(const struct rte_flow_item_integrity *mask,
6651                         int64_t pattern_flags, uint64_t l3_flags,
6652                         uint64_t l4_flags, uint64_t ip4_flag,
6653                         struct rte_flow_error *error)
6654 {
6655         if (mask->l3_ok && !(pattern_flags & l3_flags))
6656                 return rte_flow_error_set(error, EINVAL,
6657                                           RTE_FLOW_ERROR_TYPE_ITEM,
6658                                           NULL, "missing L3 protocol");
6659
6660         if (mask->ipv4_csum_ok && !(pattern_flags & ip4_flag))
6661                 return rte_flow_error_set(error, EINVAL,
6662                                           RTE_FLOW_ERROR_TYPE_ITEM,
6663                                           NULL, "missing IPv4 protocol");
6664
6665         if ((mask->l4_ok || mask->l4_csum_ok) && !(pattern_flags & l4_flags))
6666                 return rte_flow_error_set(error, EINVAL,
6667                                           RTE_FLOW_ERROR_TYPE_ITEM,
6668                                           NULL, "missing L4 protocol");
6669
6670         return 0;
6671 }
6672
6673 static int
6674 flow_dv_validate_item_integrity_post(const struct
6675                                      rte_flow_item *integrity_items[2],
6676                                      int64_t pattern_flags,
6677                                      struct rte_flow_error *error)
6678 {
6679         const struct rte_flow_item_integrity *mask;
6680         int ret;
6681
6682         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
6683                 mask = (typeof(mask))integrity_items[0]->mask;
6684                 ret = validate_integrity_bits(mask, pattern_flags,
6685                                               MLX5_FLOW_LAYER_OUTER_L3,
6686                                               MLX5_FLOW_LAYER_OUTER_L4,
6687                                               MLX5_FLOW_LAYER_OUTER_L3_IPV4,
6688                                               error);
6689                 if (ret)
6690                         return ret;
6691         }
6692         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
6693                 mask = (typeof(mask))integrity_items[1]->mask;
6694                 ret = validate_integrity_bits(mask, pattern_flags,
6695                                               MLX5_FLOW_LAYER_INNER_L3,
6696                                               MLX5_FLOW_LAYER_INNER_L4,
6697                                               MLX5_FLOW_LAYER_INNER_L3_IPV4,
6698                                               error);
6699                 if (ret)
6700                         return ret;
6701         }
6702         return 0;
6703 }
6704
6705 static int
6706 flow_dv_validate_item_integrity(struct rte_eth_dev *dev,
6707                                 const struct rte_flow_item *integrity_item,
6708                                 uint64_t pattern_flags, uint64_t *last_item,
6709                                 const struct rte_flow_item *integrity_items[2],
6710                                 struct rte_flow_error *error)
6711 {
6712         struct mlx5_priv *priv = dev->data->dev_private;
6713         const struct rte_flow_item_integrity *mask = (typeof(mask))
6714                                                      integrity_item->mask;
6715         const struct rte_flow_item_integrity *spec = (typeof(spec))
6716                                                      integrity_item->spec;
6717
6718         if (!priv->sh->cdev->config.hca_attr.pkt_integrity_match)
6719                 return rte_flow_error_set(error, ENOTSUP,
6720                                           RTE_FLOW_ERROR_TYPE_ITEM,
6721                                           integrity_item,
6722                                           "packet integrity integrity_item not supported");
6723         if (!spec)
6724                 return rte_flow_error_set(error, ENOTSUP,
6725                                           RTE_FLOW_ERROR_TYPE_ITEM,
6726                                           integrity_item,
6727                                           "no spec for integrity item");
6728         if (!mask)
6729                 mask = &rte_flow_item_integrity_mask;
6730         if (!mlx5_validate_integrity_item(mask))
6731                 return rte_flow_error_set(error, ENOTSUP,
6732                                           RTE_FLOW_ERROR_TYPE_ITEM,
6733                                           integrity_item,
6734                                           "unsupported integrity filter");
6735         if (spec->level > 1) {
6736                 if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY)
6737                         return rte_flow_error_set
6738                                 (error, ENOTSUP,
6739                                  RTE_FLOW_ERROR_TYPE_ITEM,
6740                                  NULL, "multiple inner integrity items not supported");
6741                 integrity_items[1] = integrity_item;
6742                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
6743         } else {
6744                 if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY)
6745                         return rte_flow_error_set
6746                                 (error, ENOTSUP,
6747                                  RTE_FLOW_ERROR_TYPE_ITEM,
6748                                  NULL, "multiple outer integrity items not supported");
6749                 integrity_items[0] = integrity_item;
6750                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
6751         }
6752         return 0;
6753 }
6754
6755 static int
6756 flow_dv_validate_item_flex(struct rte_eth_dev *dev,
6757                            const struct rte_flow_item *item,
6758                            uint64_t item_flags,
6759                            uint64_t *last_item,
6760                            bool is_inner,
6761                            struct rte_flow_error *error)
6762 {
6763         const struct rte_flow_item_flex *flow_spec = item->spec;
6764         const struct rte_flow_item_flex *flow_mask = item->mask;
6765         struct mlx5_flex_item *flex;
6766
6767         if (!flow_spec)
6768                 return rte_flow_error_set(error, EINVAL,
6769                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6770                                           "flex flow item spec cannot be NULL");
6771         if (!flow_mask)
6772                 return rte_flow_error_set(error, EINVAL,
6773                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6774                                           "flex flow item mask cannot be NULL");
6775         if (item->last)
6776                 return rte_flow_error_set(error, ENOTSUP,
6777                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6778                                           "flex flow item last not supported");
6779         if (mlx5_flex_acquire_index(dev, flow_spec->handle, false) < 0)
6780                 return rte_flow_error_set(error, EINVAL,
6781                                           RTE_FLOW_ERROR_TYPE_ITEM, NULL,
6782                                           "invalid flex flow item handle");
6783         flex = (struct mlx5_flex_item *)flow_spec->handle;
6784         switch (flex->tunnel_mode) {
6785         case FLEX_TUNNEL_MODE_SINGLE:
6786                 if (item_flags &
6787                     (MLX5_FLOW_ITEM_OUTER_FLEX | MLX5_FLOW_ITEM_INNER_FLEX))
6788                         rte_flow_error_set(error, EINVAL,
6789                                            RTE_FLOW_ERROR_TYPE_ITEM,
6790                                            NULL, "multiple flex items not supported");
6791                 break;
6792         case FLEX_TUNNEL_MODE_OUTER:
6793                 if (is_inner)
6794                         rte_flow_error_set(error, EINVAL,
6795                                            RTE_FLOW_ERROR_TYPE_ITEM,
6796                                            NULL, "inner flex item was not configured");
6797                 if (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX)
6798                         rte_flow_error_set(error, ENOTSUP,
6799                                            RTE_FLOW_ERROR_TYPE_ITEM,
6800                                            NULL, "multiple flex items not supported");
6801                 break;
6802         case FLEX_TUNNEL_MODE_INNER:
6803                 if (!is_inner)
6804                         rte_flow_error_set(error, EINVAL,
6805                                            RTE_FLOW_ERROR_TYPE_ITEM,
6806                                            NULL, "outer flex item was not configured");
6807                 if (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)
6808                         rte_flow_error_set(error, EINVAL,
6809                                            RTE_FLOW_ERROR_TYPE_ITEM,
6810                                            NULL, "multiple flex items not supported");
6811                 break;
6812         case FLEX_TUNNEL_MODE_MULTI:
6813                 if ((is_inner && (item_flags & MLX5_FLOW_ITEM_INNER_FLEX)) ||
6814                     (!is_inner && (item_flags & MLX5_FLOW_ITEM_OUTER_FLEX))) {
6815                         rte_flow_error_set(error, EINVAL,
6816                                            RTE_FLOW_ERROR_TYPE_ITEM,
6817                                            NULL, "multiple flex items not supported");
6818                 }
6819                 break;
6820         case FLEX_TUNNEL_MODE_TUNNEL:
6821                 if (is_inner || (item_flags & MLX5_FLOW_ITEM_FLEX_TUNNEL))
6822                         rte_flow_error_set(error, EINVAL,
6823                                            RTE_FLOW_ERROR_TYPE_ITEM,
6824                                            NULL, "multiple flex tunnel items not supported");
6825                 break;
6826         default:
6827                 rte_flow_error_set(error, EINVAL,
6828                                    RTE_FLOW_ERROR_TYPE_ITEM,
6829                                    NULL, "invalid flex item configuration");
6830         }
6831         *last_item = flex->tunnel_mode == FLEX_TUNNEL_MODE_TUNNEL ?
6832                      MLX5_FLOW_ITEM_FLEX_TUNNEL : is_inner ?
6833                      MLX5_FLOW_ITEM_INNER_FLEX : MLX5_FLOW_ITEM_OUTER_FLEX;
6834         return 0;
6835 }
6836
6837 /**
6838  * Internal validation function. For validating both actions and items.
6839  *
6840  * @param[in] dev
6841  *   Pointer to the rte_eth_dev structure.
6842  * @param[in] attr
6843  *   Pointer to the flow attributes.
6844  * @param[in] items
6845  *   Pointer to the list of items.
6846  * @param[in] actions
6847  *   Pointer to the list of actions.
6848  * @param[in] external
6849  *   This flow rule is created by request external to PMD.
6850  * @param[in] hairpin
6851  *   Number of hairpin TX actions, 0 means classic flow.
6852  * @param[out] error
6853  *   Pointer to the error structure.
6854  *
6855  * @return
6856  *   0 on success, a negative errno value otherwise and rte_errno is set.
6857  */
6858 static int
6859 flow_dv_validate(struct rte_eth_dev *dev, const struct rte_flow_attr *attr,
6860                  const struct rte_flow_item items[],
6861                  const struct rte_flow_action actions[],
6862                  bool external, int hairpin, struct rte_flow_error *error)
6863 {
6864         int ret;
6865         uint64_t action_flags = 0;
6866         uint64_t item_flags = 0;
6867         uint64_t last_item = 0;
6868         uint8_t next_protocol = 0xff;
6869         uint16_t ether_type = 0;
6870         int actions_n = 0;
6871         uint8_t item_ipv6_proto = 0;
6872         int fdb_mirror_limit = 0;
6873         int modify_after_mirror = 0;
6874         const struct rte_flow_item *geneve_item = NULL;
6875         const struct rte_flow_item *gre_item = NULL;
6876         const struct rte_flow_item *gtp_item = NULL;
6877         const struct rte_flow_action_raw_decap *decap;
6878         const struct rte_flow_action_raw_encap *encap;
6879         const struct rte_flow_action_rss *rss = NULL;
6880         const struct rte_flow_action_rss *sample_rss = NULL;
6881         const struct rte_flow_action_count *sample_count = NULL;
6882         const struct rte_flow_item_tcp nic_tcp_mask = {
6883                 .hdr = {
6884                         .tcp_flags = 0xFF,
6885                         .src_port = RTE_BE16(UINT16_MAX),
6886                         .dst_port = RTE_BE16(UINT16_MAX),
6887                 }
6888         };
6889         const struct rte_flow_item_ipv6 nic_ipv6_mask = {
6890                 .hdr = {
6891                         .src_addr =
6892                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6893                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6894                         .dst_addr =
6895                         "\xff\xff\xff\xff\xff\xff\xff\xff"
6896                         "\xff\xff\xff\xff\xff\xff\xff\xff",
6897                         .vtc_flow = RTE_BE32(0xffffffff),
6898                         .proto = 0xff,
6899                         .hop_limits = 0xff,
6900                 },
6901                 .has_frag_ext = 1,
6902         };
6903         const struct rte_flow_item_ecpri nic_ecpri_mask = {
6904                 .hdr = {
6905                         .common = {
6906                                 .u32 =
6907                                 RTE_BE32(((const struct rte_ecpri_common_hdr) {
6908                                         .type = 0xFF,
6909                                         }).u32),
6910                         },
6911                         .dummy[0] = 0xffffffff,
6912                 },
6913         };
6914         struct mlx5_priv *priv = dev->data->dev_private;
6915         struct mlx5_sh_config *dev_conf = &priv->sh->config;
6916         uint16_t queue_index = 0xFFFF;
6917         const struct rte_flow_item_vlan *vlan_m = NULL;
6918         uint32_t rw_act_num = 0;
6919         uint64_t is_root;
6920         const struct mlx5_flow_tunnel *tunnel;
6921         enum mlx5_tof_rule_type tof_rule_type;
6922         struct flow_grp_info grp_info = {
6923                 .external = !!external,
6924                 .transfer = !!attr->transfer,
6925                 .fdb_def_rule = !!priv->fdb_def_rule,
6926                 .std_tbl_fix = true,
6927         };
6928         const struct rte_eth_hairpin_conf *conf;
6929         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
6930         const struct rte_flow_item *port_id_item = NULL;
6931         bool def_policy = false;
6932         bool shared_count = false;
6933         uint16_t udp_dport = 0;
6934
6935         if (items == NULL)
6936                 return -1;
6937         tunnel = is_tunnel_offload_active(dev) ?
6938                  mlx5_get_tof(items, actions, &tof_rule_type) : NULL;
6939         if (tunnel) {
6940                 if (!dev_conf->dv_flow_en)
6941                         return rte_flow_error_set
6942                                 (error, ENOTSUP,
6943                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6944                                  NULL, "tunnel offload requires DV flow interface");
6945                 if (priv->representor)
6946                         return rte_flow_error_set
6947                                 (error, ENOTSUP,
6948                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
6949                                  NULL, "decap not supported for VF representor");
6950                 if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_SET_RULE)
6951                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
6952                 else if (tof_rule_type == MLX5_TUNNEL_OFFLOAD_MATCH_RULE)
6953                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_MATCH |
6954                                         MLX5_FLOW_ACTION_DECAP;
6955                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
6956                                         (dev, attr, tunnel, tof_rule_type);
6957         }
6958         ret = flow_dv_validate_attributes(dev, tunnel, attr, &grp_info, error);
6959         if (ret < 0)
6960                 return ret;
6961         is_root = (uint64_t)ret;
6962         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
6963                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
6964                 int type = items->type;
6965
6966                 if (!mlx5_flow_os_item_supported(type))
6967                         return rte_flow_error_set(error, ENOTSUP,
6968                                                   RTE_FLOW_ERROR_TYPE_ITEM,
6969                                                   NULL, "item not supported");
6970                 switch (type) {
6971                 case RTE_FLOW_ITEM_TYPE_VOID:
6972                         break;
6973                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
6974                         ret = flow_dv_validate_item_port_id
6975                                         (dev, items, attr, item_flags, error);
6976                         if (ret < 0)
6977                                 return ret;
6978                         last_item = MLX5_FLOW_ITEM_PORT_ID;
6979                         port_id_item = items;
6980                         break;
6981                 case RTE_FLOW_ITEM_TYPE_ETH:
6982                         ret = mlx5_flow_validate_item_eth(items, item_flags,
6983                                                           true, error);
6984                         if (ret < 0)
6985                                 return ret;
6986                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
6987                                              MLX5_FLOW_LAYER_OUTER_L2;
6988                         if (items->mask != NULL && items->spec != NULL) {
6989                                 ether_type =
6990                                         ((const struct rte_flow_item_eth *)
6991                                          items->spec)->type;
6992                                 ether_type &=
6993                                         ((const struct rte_flow_item_eth *)
6994                                          items->mask)->type;
6995                                 ether_type = rte_be_to_cpu_16(ether_type);
6996                         } else {
6997                                 ether_type = 0;
6998                         }
6999                         break;
7000                 case RTE_FLOW_ITEM_TYPE_VLAN:
7001                         ret = flow_dv_validate_item_vlan(items, item_flags,
7002                                                          dev, error);
7003                         if (ret < 0)
7004                                 return ret;
7005                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_VLAN :
7006                                              MLX5_FLOW_LAYER_OUTER_VLAN;
7007                         if (items->mask != NULL && items->spec != NULL) {
7008                                 ether_type =
7009                                         ((const struct rte_flow_item_vlan *)
7010                                          items->spec)->inner_type;
7011                                 ether_type &=
7012                                         ((const struct rte_flow_item_vlan *)
7013                                          items->mask)->inner_type;
7014                                 ether_type = rte_be_to_cpu_16(ether_type);
7015                         } else {
7016                                 ether_type = 0;
7017                         }
7018                         /* Store outer VLAN mask for of_push_vlan action. */
7019                         if (!tunnel)
7020                                 vlan_m = items->mask;
7021                         break;
7022                 case RTE_FLOW_ITEM_TYPE_IPV4:
7023                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7024                                                   &item_flags, &tunnel);
7025                         ret = flow_dv_validate_item_ipv4(dev, items, item_flags,
7026                                                          last_item, ether_type,
7027                                                          error);
7028                         if (ret < 0)
7029                                 return ret;
7030                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
7031                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
7032                         if (items->mask != NULL &&
7033                             ((const struct rte_flow_item_ipv4 *)
7034                              items->mask)->hdr.next_proto_id) {
7035                                 next_protocol =
7036                                         ((const struct rte_flow_item_ipv4 *)
7037                                          (items->spec))->hdr.next_proto_id;
7038                                 next_protocol &=
7039                                         ((const struct rte_flow_item_ipv4 *)
7040                                          (items->mask))->hdr.next_proto_id;
7041                         } else {
7042                                 /* Reset for inner layer. */
7043                                 next_protocol = 0xff;
7044                         }
7045                         break;
7046                 case RTE_FLOW_ITEM_TYPE_IPV6:
7047                         mlx5_flow_tunnel_ip_check(items, next_protocol,
7048                                                   &item_flags, &tunnel);
7049                         ret = mlx5_flow_validate_item_ipv6(items, item_flags,
7050                                                            last_item,
7051                                                            ether_type,
7052                                                            &nic_ipv6_mask,
7053                                                            error);
7054                         if (ret < 0)
7055                                 return ret;
7056                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
7057                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
7058                         if (items->mask != NULL &&
7059                             ((const struct rte_flow_item_ipv6 *)
7060                              items->mask)->hdr.proto) {
7061                                 item_ipv6_proto =
7062                                         ((const struct rte_flow_item_ipv6 *)
7063                                          items->spec)->hdr.proto;
7064                                 next_protocol =
7065                                         ((const struct rte_flow_item_ipv6 *)
7066                                          items->spec)->hdr.proto;
7067                                 next_protocol &=
7068                                         ((const struct rte_flow_item_ipv6 *)
7069                                          items->mask)->hdr.proto;
7070                         } else {
7071                                 /* Reset for inner layer. */
7072                                 next_protocol = 0xff;
7073                         }
7074                         break;
7075                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
7076                         ret = flow_dv_validate_item_ipv6_frag_ext(items,
7077                                                                   item_flags,
7078                                                                   error);
7079                         if (ret < 0)
7080                                 return ret;
7081                         last_item = tunnel ?
7082                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
7083                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
7084                         if (items->mask != NULL &&
7085                             ((const struct rte_flow_item_ipv6_frag_ext *)
7086                              items->mask)->hdr.next_header) {
7087                                 next_protocol =
7088                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7089                                  items->spec)->hdr.next_header;
7090                                 next_protocol &=
7091                                 ((const struct rte_flow_item_ipv6_frag_ext *)
7092                                  items->mask)->hdr.next_header;
7093                         } else {
7094                                 /* Reset for inner layer. */
7095                                 next_protocol = 0xff;
7096                         }
7097                         break;
7098                 case RTE_FLOW_ITEM_TYPE_TCP:
7099                         ret = mlx5_flow_validate_item_tcp
7100                                                 (items, item_flags,
7101                                                  next_protocol,
7102                                                  &nic_tcp_mask,
7103                                                  error);
7104                         if (ret < 0)
7105                                 return ret;
7106                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
7107                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
7108                         break;
7109                 case RTE_FLOW_ITEM_TYPE_UDP:
7110                         ret = mlx5_flow_validate_item_udp(items, item_flags,
7111                                                           next_protocol,
7112                                                           error);
7113                         const struct rte_flow_item_udp *spec = items->spec;
7114                         const struct rte_flow_item_udp *mask = items->mask;
7115                         if (!mask)
7116                                 mask = &rte_flow_item_udp_mask;
7117                         if (spec != NULL)
7118                                 udp_dport = rte_be_to_cpu_16
7119                                                 (spec->hdr.dst_port &
7120                                                  mask->hdr.dst_port);
7121                         if (ret < 0)
7122                                 return ret;
7123                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
7124                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
7125                         break;
7126                 case RTE_FLOW_ITEM_TYPE_GRE:
7127                         ret = mlx5_flow_validate_item_gre(items, item_flags,
7128                                                           next_protocol, error);
7129                         if (ret < 0)
7130                                 return ret;
7131                         gre_item = items;
7132                         last_item = MLX5_FLOW_LAYER_GRE;
7133                         break;
7134                 case RTE_FLOW_ITEM_TYPE_GRE_OPTION:
7135                         ret = mlx5_flow_validate_item_gre_option(dev, items, item_flags,
7136                                                           attr, gre_item, error);
7137                         if (ret < 0)
7138                                 return ret;
7139                         last_item = MLX5_FLOW_LAYER_GRE;
7140                         break;
7141                 case RTE_FLOW_ITEM_TYPE_NVGRE:
7142                         ret = mlx5_flow_validate_item_nvgre(items, item_flags,
7143                                                             next_protocol,
7144                                                             error);
7145                         if (ret < 0)
7146                                 return ret;
7147                         last_item = MLX5_FLOW_LAYER_NVGRE;
7148                         break;
7149                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
7150                         ret = mlx5_flow_validate_item_gre_key
7151                                 (items, item_flags, gre_item, error);
7152                         if (ret < 0)
7153                                 return ret;
7154                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
7155                         break;
7156                 case RTE_FLOW_ITEM_TYPE_VXLAN:
7157                         ret = mlx5_flow_validate_item_vxlan(dev, udp_dport,
7158                                                             items, item_flags,
7159                                                             attr, error);
7160                         if (ret < 0)
7161                                 return ret;
7162                         last_item = MLX5_FLOW_LAYER_VXLAN;
7163                         break;
7164                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
7165                         ret = mlx5_flow_validate_item_vxlan_gpe(items,
7166                                                                 item_flags, dev,
7167                                                                 error);
7168                         if (ret < 0)
7169                                 return ret;
7170                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
7171                         break;
7172                 case RTE_FLOW_ITEM_TYPE_GENEVE:
7173                         ret = mlx5_flow_validate_item_geneve(items,
7174                                                              item_flags, dev,
7175                                                              error);
7176                         if (ret < 0)
7177                                 return ret;
7178                         geneve_item = items;
7179                         last_item = MLX5_FLOW_LAYER_GENEVE;
7180                         break;
7181                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
7182                         ret = mlx5_flow_validate_item_geneve_opt(items,
7183                                                                  last_item,
7184                                                                  geneve_item,
7185                                                                  dev,
7186                                                                  error);
7187                         if (ret < 0)
7188                                 return ret;
7189                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
7190                         break;
7191                 case RTE_FLOW_ITEM_TYPE_MPLS:
7192                         ret = mlx5_flow_validate_item_mpls(dev, items,
7193                                                            item_flags,
7194                                                            last_item, error);
7195                         if (ret < 0)
7196                                 return ret;
7197                         last_item = MLX5_FLOW_LAYER_MPLS;
7198                         break;
7199
7200                 case RTE_FLOW_ITEM_TYPE_MARK:
7201                         ret = flow_dv_validate_item_mark(dev, items, attr,
7202                                                          error);
7203                         if (ret < 0)
7204                                 return ret;
7205                         last_item = MLX5_FLOW_ITEM_MARK;
7206                         break;
7207                 case RTE_FLOW_ITEM_TYPE_META:
7208                         ret = flow_dv_validate_item_meta(dev, items, attr,
7209                                                          error);
7210                         if (ret < 0)
7211                                 return ret;
7212                         last_item = MLX5_FLOW_ITEM_METADATA;
7213                         break;
7214                 case RTE_FLOW_ITEM_TYPE_ICMP:
7215                         ret = mlx5_flow_validate_item_icmp(items, item_flags,
7216                                                            next_protocol,
7217                                                            error);
7218                         if (ret < 0)
7219                                 return ret;
7220                         last_item = MLX5_FLOW_LAYER_ICMP;
7221                         break;
7222                 case RTE_FLOW_ITEM_TYPE_ICMP6:
7223                         ret = mlx5_flow_validate_item_icmp6(items, item_flags,
7224                                                             next_protocol,
7225                                                             error);
7226                         if (ret < 0)
7227                                 return ret;
7228                         item_ipv6_proto = IPPROTO_ICMPV6;
7229                         last_item = MLX5_FLOW_LAYER_ICMP6;
7230                         break;
7231                 case RTE_FLOW_ITEM_TYPE_TAG:
7232                         ret = flow_dv_validate_item_tag(dev, items,
7233                                                         attr, error);
7234                         if (ret < 0)
7235                                 return ret;
7236                         last_item = MLX5_FLOW_ITEM_TAG;
7237                         break;
7238                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
7239                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
7240                         break;
7241                 case RTE_FLOW_ITEM_TYPE_GTP:
7242                         ret = flow_dv_validate_item_gtp(dev, items, item_flags,
7243                                                         error);
7244                         if (ret < 0)
7245                                 return ret;
7246                         gtp_item = items;
7247                         last_item = MLX5_FLOW_LAYER_GTP;
7248                         break;
7249                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
7250                         ret = flow_dv_validate_item_gtp_psc(items, last_item,
7251                                                             gtp_item, attr,
7252                                                             error);
7253                         if (ret < 0)
7254                                 return ret;
7255                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
7256                         break;
7257                 case RTE_FLOW_ITEM_TYPE_ECPRI:
7258                         /* Capacity will be checked in the translate stage. */
7259                         ret = mlx5_flow_validate_item_ecpri(items, item_flags,
7260                                                             last_item,
7261                                                             ether_type,
7262                                                             &nic_ecpri_mask,
7263                                                             error);
7264                         if (ret < 0)
7265                                 return ret;
7266                         last_item = MLX5_FLOW_LAYER_ECPRI;
7267                         break;
7268                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
7269                         ret = flow_dv_validate_item_integrity(dev, items,
7270                                                               item_flags,
7271                                                               &last_item,
7272                                                               integrity_items,
7273                                                               error);
7274                         if (ret < 0)
7275                                 return ret;
7276                         break;
7277                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
7278                         ret = flow_dv_validate_item_aso_ct(dev, items,
7279                                                            &item_flags, error);
7280                         if (ret < 0)
7281                                 return ret;
7282                         break;
7283                 case MLX5_RTE_FLOW_ITEM_TYPE_TUNNEL:
7284                         /* tunnel offload item was processed before
7285                          * list it here as a supported type
7286                          */
7287                         break;
7288                 case RTE_FLOW_ITEM_TYPE_FLEX:
7289                         ret = flow_dv_validate_item_flex(dev, items, item_flags,
7290                                                          &last_item,
7291                                                          tunnel != 0, error);
7292                         if (ret < 0)
7293                                 return ret;
7294                         break;
7295                 default:
7296                         return rte_flow_error_set(error, ENOTSUP,
7297                                                   RTE_FLOW_ERROR_TYPE_ITEM,
7298                                                   NULL, "item not supported");
7299                 }
7300                 item_flags |= last_item;
7301         }
7302         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
7303                 ret = flow_dv_validate_item_integrity_post(integrity_items,
7304                                                            item_flags, error);
7305                 if (ret)
7306                         return ret;
7307         }
7308         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
7309                 int type = actions->type;
7310
7311                 if (!mlx5_flow_os_action_supported(type))
7312                         return rte_flow_error_set(error, ENOTSUP,
7313                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7314                                                   actions,
7315                                                   "action not supported");
7316                 if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
7317                         return rte_flow_error_set(error, ENOTSUP,
7318                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7319                                                   actions, "too many actions");
7320                 if (action_flags &
7321                         MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
7322                         return rte_flow_error_set(error, ENOTSUP,
7323                                 RTE_FLOW_ERROR_TYPE_ACTION,
7324                                 NULL, "meter action with policy "
7325                                 "must be the last action");
7326                 switch (type) {
7327                 case RTE_FLOW_ACTION_TYPE_VOID:
7328                         break;
7329                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
7330                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
7331                         ret = flow_dv_validate_action_port_id(dev,
7332                                                               action_flags,
7333                                                               actions,
7334                                                               attr,
7335                                                               error);
7336                         if (ret)
7337                                 return ret;
7338                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
7339                         ++actions_n;
7340                         break;
7341                 case RTE_FLOW_ACTION_TYPE_FLAG:
7342                         ret = flow_dv_validate_action_flag(dev, action_flags,
7343                                                            attr, error);
7344                         if (ret < 0)
7345                                 return ret;
7346                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7347                                 /* Count all modify-header actions as one. */
7348                                 if (!(action_flags &
7349                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7350                                         ++actions_n;
7351                                 action_flags |= MLX5_FLOW_ACTION_FLAG |
7352                                                 MLX5_FLOW_ACTION_MARK_EXT;
7353                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7354                                         modify_after_mirror = 1;
7355
7356                         } else {
7357                                 action_flags |= MLX5_FLOW_ACTION_FLAG;
7358                                 ++actions_n;
7359                         }
7360                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7361                         break;
7362                 case RTE_FLOW_ACTION_TYPE_MARK:
7363                         ret = flow_dv_validate_action_mark(dev, actions,
7364                                                            action_flags,
7365                                                            attr, error);
7366                         if (ret < 0)
7367                                 return ret;
7368                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
7369                                 /* Count all modify-header actions as one. */
7370                                 if (!(action_flags &
7371                                       MLX5_FLOW_MODIFY_HDR_ACTIONS))
7372                                         ++actions_n;
7373                                 action_flags |= MLX5_FLOW_ACTION_MARK |
7374                                                 MLX5_FLOW_ACTION_MARK_EXT;
7375                                 if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7376                                         modify_after_mirror = 1;
7377                         } else {
7378                                 action_flags |= MLX5_FLOW_ACTION_MARK;
7379                                 ++actions_n;
7380                         }
7381                         rw_act_num += MLX5_ACT_NUM_SET_MARK;
7382                         break;
7383                 case RTE_FLOW_ACTION_TYPE_SET_META:
7384                         ret = flow_dv_validate_action_set_meta(dev, actions,
7385                                                                action_flags,
7386                                                                attr, error);
7387                         if (ret < 0)
7388                                 return ret;
7389                         /* Count all modify-header actions as one action. */
7390                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7391                                 ++actions_n;
7392                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7393                                 modify_after_mirror = 1;
7394                         action_flags |= MLX5_FLOW_ACTION_SET_META;
7395                         rw_act_num += MLX5_ACT_NUM_SET_META;
7396                         break;
7397                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
7398                         ret = flow_dv_validate_action_set_tag(dev, actions,
7399                                                               action_flags,
7400                                                               attr, error);
7401                         if (ret < 0)
7402                                 return ret;
7403                         /* Count all modify-header actions as one action. */
7404                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7405                                 ++actions_n;
7406                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7407                                 modify_after_mirror = 1;
7408                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
7409                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7410                         break;
7411                 case RTE_FLOW_ACTION_TYPE_DROP:
7412                         ret = mlx5_flow_validate_action_drop(action_flags,
7413                                                              attr, error);
7414                         if (ret < 0)
7415                                 return ret;
7416                         action_flags |= MLX5_FLOW_ACTION_DROP;
7417                         ++actions_n;
7418                         break;
7419                 case RTE_FLOW_ACTION_TYPE_QUEUE:
7420                         ret = mlx5_flow_validate_action_queue(actions,
7421                                                               action_flags, dev,
7422                                                               attr, error);
7423                         if (ret < 0)
7424                                 return ret;
7425                         queue_index = ((const struct rte_flow_action_queue *)
7426                                                         (actions->conf))->index;
7427                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
7428                         ++actions_n;
7429                         break;
7430                 case RTE_FLOW_ACTION_TYPE_RSS:
7431                         rss = actions->conf;
7432                         ret = mlx5_flow_validate_action_rss(actions,
7433                                                             action_flags, dev,
7434                                                             attr, item_flags,
7435                                                             error);
7436                         if (ret < 0)
7437                                 return ret;
7438                         if (rss && sample_rss &&
7439                             (sample_rss->level != rss->level ||
7440                             sample_rss->types != rss->types))
7441                                 return rte_flow_error_set(error, ENOTSUP,
7442                                         RTE_FLOW_ERROR_TYPE_ACTION,
7443                                         NULL,
7444                                         "Can't use the different RSS types "
7445                                         "or level in the same flow");
7446                         if (rss != NULL && rss->queue_num)
7447                                 queue_index = rss->queue[0];
7448                         action_flags |= MLX5_FLOW_ACTION_RSS;
7449                         ++actions_n;
7450                         break;
7451                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
7452                         ret =
7453                         mlx5_flow_validate_action_default_miss(action_flags,
7454                                         attr, error);
7455                         if (ret < 0)
7456                                 return ret;
7457                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
7458                         ++actions_n;
7459                         break;
7460                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
7461                         shared_count = true;
7462                         /* fall-through. */
7463                 case RTE_FLOW_ACTION_TYPE_COUNT:
7464                         ret = flow_dv_validate_action_count(dev, shared_count,
7465                                                             action_flags,
7466                                                             attr, error);
7467                         if (ret < 0)
7468                                 return ret;
7469                         action_flags |= MLX5_FLOW_ACTION_COUNT;
7470                         ++actions_n;
7471                         break;
7472                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
7473                         if (flow_dv_validate_action_pop_vlan(dev,
7474                                                              action_flags,
7475                                                              actions,
7476                                                              item_flags, attr,
7477                                                              error))
7478                                 return -rte_errno;
7479                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7480                                 modify_after_mirror = 1;
7481                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
7482                         ++actions_n;
7483                         break;
7484                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
7485                         ret = flow_dv_validate_action_push_vlan(dev,
7486                                                                 action_flags,
7487                                                                 vlan_m,
7488                                                                 actions, attr,
7489                                                                 error);
7490                         if (ret < 0)
7491                                 return ret;
7492                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7493                                 modify_after_mirror = 1;
7494                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
7495                         ++actions_n;
7496                         break;
7497                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
7498                         ret = flow_dv_validate_action_set_vlan_pcp
7499                                                 (action_flags, actions, error);
7500                         if (ret < 0)
7501                                 return ret;
7502                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7503                                 modify_after_mirror = 1;
7504                         /* Count PCP with push_vlan command. */
7505                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_PCP;
7506                         break;
7507                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
7508                         ret = flow_dv_validate_action_set_vlan_vid
7509                                                 (item_flags, action_flags,
7510                                                  actions, error);
7511                         if (ret < 0)
7512                                 return ret;
7513                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7514                                 modify_after_mirror = 1;
7515                         /* Count VID with push_vlan command. */
7516                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
7517                         rw_act_num += MLX5_ACT_NUM_MDF_VID;
7518                         break;
7519                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
7520                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
7521                         ret = flow_dv_validate_action_l2_encap(dev,
7522                                                                action_flags,
7523                                                                actions, attr,
7524                                                                error);
7525                         if (ret < 0)
7526                                 return ret;
7527                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
7528                         ++actions_n;
7529                         break;
7530                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
7531                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
7532                         ret = flow_dv_validate_action_decap(dev, action_flags,
7533                                                             actions, item_flags,
7534                                                             attr, error);
7535                         if (ret < 0)
7536                                 return ret;
7537                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7538                                 modify_after_mirror = 1;
7539                         action_flags |= MLX5_FLOW_ACTION_DECAP;
7540                         ++actions_n;
7541                         break;
7542                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
7543                         ret = flow_dv_validate_action_raw_encap_decap
7544                                 (dev, NULL, actions->conf, attr, &action_flags,
7545                                  &actions_n, actions, item_flags, error);
7546                         if (ret < 0)
7547                                 return ret;
7548                         break;
7549                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
7550                         decap = actions->conf;
7551                         while ((++actions)->type == RTE_FLOW_ACTION_TYPE_VOID)
7552                                 ;
7553                         if (actions->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
7554                                 encap = NULL;
7555                                 actions--;
7556                         } else {
7557                                 encap = actions->conf;
7558                         }
7559                         ret = flow_dv_validate_action_raw_encap_decap
7560                                            (dev,
7561                                             decap ? decap : &empty_decap, encap,
7562                                             attr, &action_flags, &actions_n,
7563                                             actions, item_flags, error);
7564                         if (ret < 0)
7565                                 return ret;
7566                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7567                             (action_flags & MLX5_FLOW_ACTION_DECAP))
7568                                 modify_after_mirror = 1;
7569                         break;
7570                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
7571                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
7572                         ret = flow_dv_validate_action_modify_mac(action_flags,
7573                                                                  actions,
7574                                                                  item_flags,
7575                                                                  error);
7576                         if (ret < 0)
7577                                 return ret;
7578                         /* Count all modify-header actions as one action. */
7579                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7580                                 ++actions_n;
7581                         action_flags |= actions->type ==
7582                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
7583                                                 MLX5_FLOW_ACTION_SET_MAC_SRC :
7584                                                 MLX5_FLOW_ACTION_SET_MAC_DST;
7585                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7586                                 modify_after_mirror = 1;
7587                         /*
7588                          * Even if the source and destination MAC addresses have
7589                          * overlap in the header with 4B alignment, the convert
7590                          * function will handle them separately and 4 SW actions
7591                          * will be created. And 2 actions will be added each
7592                          * time no matter how many bytes of address will be set.
7593                          */
7594                         rw_act_num += MLX5_ACT_NUM_MDF_MAC;
7595                         break;
7596                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
7597                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
7598                         ret = flow_dv_validate_action_modify_ipv4(action_flags,
7599                                                                   actions,
7600                                                                   item_flags,
7601                                                                   error);
7602                         if (ret < 0)
7603                                 return ret;
7604                         /* Count all modify-header actions as one action. */
7605                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7606                                 ++actions_n;
7607                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7608                                 modify_after_mirror = 1;
7609                         action_flags |= actions->type ==
7610                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
7611                                                 MLX5_FLOW_ACTION_SET_IPV4_SRC :
7612                                                 MLX5_FLOW_ACTION_SET_IPV4_DST;
7613                         rw_act_num += MLX5_ACT_NUM_MDF_IPV4;
7614                         break;
7615                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
7616                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
7617                         ret = flow_dv_validate_action_modify_ipv6(action_flags,
7618                                                                   actions,
7619                                                                   item_flags,
7620                                                                   error);
7621                         if (ret < 0)
7622                                 return ret;
7623                         if (item_ipv6_proto == IPPROTO_ICMPV6)
7624                                 return rte_flow_error_set(error, ENOTSUP,
7625                                         RTE_FLOW_ERROR_TYPE_ACTION,
7626                                         actions,
7627                                         "Can't change header "
7628                                         "with ICMPv6 proto");
7629                         /* Count all modify-header actions as one action. */
7630                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7631                                 ++actions_n;
7632                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7633                                 modify_after_mirror = 1;
7634                         action_flags |= actions->type ==
7635                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
7636                                                 MLX5_FLOW_ACTION_SET_IPV6_SRC :
7637                                                 MLX5_FLOW_ACTION_SET_IPV6_DST;
7638                         rw_act_num += MLX5_ACT_NUM_MDF_IPV6;
7639                         break;
7640                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
7641                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
7642                         ret = flow_dv_validate_action_modify_tp(action_flags,
7643                                                                 actions,
7644                                                                 item_flags,
7645                                                                 error);
7646                         if (ret < 0)
7647                                 return ret;
7648                         /* Count all modify-header actions as one action. */
7649                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7650                                 ++actions_n;
7651                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7652                                 modify_after_mirror = 1;
7653                         action_flags |= actions->type ==
7654                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
7655                                                 MLX5_FLOW_ACTION_SET_TP_SRC :
7656                                                 MLX5_FLOW_ACTION_SET_TP_DST;
7657                         rw_act_num += MLX5_ACT_NUM_MDF_PORT;
7658                         break;
7659                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
7660                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
7661                         ret = flow_dv_validate_action_modify_ttl(action_flags,
7662                                                                  actions,
7663                                                                  item_flags,
7664                                                                  error);
7665                         if (ret < 0)
7666                                 return ret;
7667                         /* Count all modify-header actions as one action. */
7668                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7669                                 ++actions_n;
7670                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7671                                 modify_after_mirror = 1;
7672                         action_flags |= actions->type ==
7673                                         RTE_FLOW_ACTION_TYPE_SET_TTL ?
7674                                                 MLX5_FLOW_ACTION_SET_TTL :
7675                                                 MLX5_FLOW_ACTION_DEC_TTL;
7676                         rw_act_num += MLX5_ACT_NUM_MDF_TTL;
7677                         break;
7678                 case RTE_FLOW_ACTION_TYPE_JUMP:
7679                         ret = flow_dv_validate_action_jump(dev, tunnel, actions,
7680                                                            action_flags,
7681                                                            attr, external,
7682                                                            error);
7683                         if (ret)
7684                                 return ret;
7685                         if ((action_flags & MLX5_FLOW_ACTION_SAMPLE) &&
7686                             fdb_mirror_limit)
7687                                 return rte_flow_error_set(error, EINVAL,
7688                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7689                                                   NULL,
7690                                                   "sample and jump action combination is not supported");
7691                         ++actions_n;
7692                         action_flags |= MLX5_FLOW_ACTION_JUMP;
7693                         break;
7694                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
7695                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
7696                         ret = flow_dv_validate_action_modify_tcp_seq
7697                                                                 (action_flags,
7698                                                                  actions,
7699                                                                  item_flags,
7700                                                                  error);
7701                         if (ret < 0)
7702                                 return ret;
7703                         /* Count all modify-header actions as one action. */
7704                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7705                                 ++actions_n;
7706                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7707                                 modify_after_mirror = 1;
7708                         action_flags |= actions->type ==
7709                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
7710                                                 MLX5_FLOW_ACTION_INC_TCP_SEQ :
7711                                                 MLX5_FLOW_ACTION_DEC_TCP_SEQ;
7712                         rw_act_num += MLX5_ACT_NUM_MDF_TCPSEQ;
7713                         break;
7714                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
7715                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
7716                         ret = flow_dv_validate_action_modify_tcp_ack
7717                                                                 (action_flags,
7718                                                                  actions,
7719                                                                  item_flags,
7720                                                                  error);
7721                         if (ret < 0)
7722                                 return ret;
7723                         /* Count all modify-header actions as one action. */
7724                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7725                                 ++actions_n;
7726                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7727                                 modify_after_mirror = 1;
7728                         action_flags |= actions->type ==
7729                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
7730                                                 MLX5_FLOW_ACTION_INC_TCP_ACK :
7731                                                 MLX5_FLOW_ACTION_DEC_TCP_ACK;
7732                         rw_act_num += MLX5_ACT_NUM_MDF_TCPACK;
7733                         break;
7734                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
7735                         break;
7736                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
7737                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
7738                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7739                         break;
7740                 case RTE_FLOW_ACTION_TYPE_METER:
7741                         ret = mlx5_flow_validate_action_meter(dev,
7742                                                               action_flags,
7743                                                               item_flags,
7744                                                               actions, attr,
7745                                                               port_id_item,
7746                                                               &def_policy,
7747                                                               error);
7748                         if (ret < 0)
7749                                 return ret;
7750                         action_flags |= MLX5_FLOW_ACTION_METER;
7751                         if (!def_policy)
7752                                 action_flags |=
7753                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
7754                         ++actions_n;
7755                         /* Meter action will add one more TAG action. */
7756                         rw_act_num += MLX5_ACT_NUM_SET_TAG;
7757                         break;
7758                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
7759                         if (!attr->transfer && !attr->group)
7760                                 return rte_flow_error_set(error, ENOTSUP,
7761                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
7762                                                                            NULL,
7763                           "Shared ASO age action is not supported for group 0");
7764                         if (action_flags & MLX5_FLOW_ACTION_AGE)
7765                                 return rte_flow_error_set
7766                                                   (error, EINVAL,
7767                                                    RTE_FLOW_ERROR_TYPE_ACTION,
7768                                                    NULL,
7769                                                    "duplicate age actions set");
7770                         action_flags |= MLX5_FLOW_ACTION_AGE;
7771                         ++actions_n;
7772                         break;
7773                 case RTE_FLOW_ACTION_TYPE_AGE:
7774                         ret = flow_dv_validate_action_age(action_flags,
7775                                                           actions, dev,
7776                                                           error);
7777                         if (ret < 0)
7778                                 return ret;
7779                         /*
7780                          * Validate the regular AGE action (using counter)
7781                          * mutual exclusion with indirect counter actions.
7782                          */
7783                         if (!flow_hit_aso_supported(priv->sh, attr)) {
7784                                 if (shared_count)
7785                                         return rte_flow_error_set
7786                                                 (error, EINVAL,
7787                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7788                                                 NULL,
7789                                                 "old age and indirect count combination is not supported");
7790                                 if (sample_count)
7791                                         return rte_flow_error_set
7792                                                 (error, EINVAL,
7793                                                 RTE_FLOW_ERROR_TYPE_ACTION,
7794                                                 NULL,
7795                                                 "old age action and count must be in the same sub flow");
7796                         }
7797                         action_flags |= MLX5_FLOW_ACTION_AGE;
7798                         ++actions_n;
7799                         break;
7800                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
7801                         ret = flow_dv_validate_action_modify_ipv4_dscp
7802                                                          (action_flags,
7803                                                           actions,
7804                                                           item_flags,
7805                                                           error);
7806                         if (ret < 0)
7807                                 return ret;
7808                         /* Count all modify-header actions as one action. */
7809                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7810                                 ++actions_n;
7811                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7812                                 modify_after_mirror = 1;
7813                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
7814                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7815                         break;
7816                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
7817                         ret = flow_dv_validate_action_modify_ipv6_dscp
7818                                                                 (action_flags,
7819                                                                  actions,
7820                                                                  item_flags,
7821                                                                  error);
7822                         if (ret < 0)
7823                                 return ret;
7824                         /* Count all modify-header actions as one action. */
7825                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7826                                 ++actions_n;
7827                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7828                                 modify_after_mirror = 1;
7829                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
7830                         rw_act_num += MLX5_ACT_NUM_SET_DSCP;
7831                         break;
7832                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
7833                         ret = flow_dv_validate_action_sample(&action_flags,
7834                                                              actions, dev,
7835                                                              attr, item_flags,
7836                                                              rss, &sample_rss,
7837                                                              &sample_count,
7838                                                              &fdb_mirror_limit,
7839                                                              error);
7840                         if (ret < 0)
7841                                 return ret;
7842                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
7843                         ++actions_n;
7844                         break;
7845                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
7846                         ret = flow_dv_validate_action_modify_field(dev,
7847                                                                    action_flags,
7848                                                                    actions,
7849                                                                    attr,
7850                                                                    error);
7851                         if (ret < 0)
7852                                 return ret;
7853                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
7854                                 modify_after_mirror = 1;
7855                         /* Count all modify-header actions as one action. */
7856                         if (!(action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS))
7857                                 ++actions_n;
7858                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
7859                         rw_act_num += ret;
7860                         break;
7861                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
7862                         ret = flow_dv_validate_action_aso_ct(dev, action_flags,
7863                                                              item_flags, attr,
7864                                                              error);
7865                         if (ret < 0)
7866                                 return ret;
7867                         action_flags |= MLX5_FLOW_ACTION_CT;
7868                         break;
7869                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
7870                         /* tunnel offload action was processed before
7871                          * list it here as a supported type
7872                          */
7873                         break;
7874                 default:
7875                         return rte_flow_error_set(error, ENOTSUP,
7876                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7877                                                   actions,
7878                                                   "action not supported");
7879                 }
7880         }
7881         /*
7882          * Validate actions in flow rules
7883          * - Explicit decap action is prohibited by the tunnel offload API.
7884          * - Drop action in tunnel steer rule is prohibited by the API.
7885          * - Application cannot use MARK action because it's value can mask
7886          *   tunnel default miss notification.
7887          * - JUMP in tunnel match rule has no support in current PMD
7888          *   implementation.
7889          * - TAG & META are reserved for future uses.
7890          */
7891         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_SET) {
7892                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_DECAP    |
7893                                             MLX5_FLOW_ACTION_MARK     |
7894                                             MLX5_FLOW_ACTION_SET_TAG  |
7895                                             MLX5_FLOW_ACTION_SET_META |
7896                                             MLX5_FLOW_ACTION_DROP;
7897
7898                 if (action_flags & bad_actions_mask)
7899                         return rte_flow_error_set
7900                                         (error, EINVAL,
7901                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7902                                         "Invalid RTE action in tunnel "
7903                                         "set decap rule");
7904                 if (!(action_flags & MLX5_FLOW_ACTION_JUMP))
7905                         return rte_flow_error_set
7906                                         (error, EINVAL,
7907                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7908                                         "tunnel set decap rule must terminate "
7909                                         "with JUMP");
7910                 if (!attr->ingress)
7911                         return rte_flow_error_set
7912                                         (error, EINVAL,
7913                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7914                                         "tunnel flows for ingress traffic only");
7915         }
7916         if (action_flags & MLX5_FLOW_ACTION_TUNNEL_MATCH) {
7917                 uint64_t bad_actions_mask = MLX5_FLOW_ACTION_JUMP    |
7918                                             MLX5_FLOW_ACTION_MARK    |
7919                                             MLX5_FLOW_ACTION_SET_TAG |
7920                                             MLX5_FLOW_ACTION_SET_META;
7921
7922                 if (action_flags & bad_actions_mask)
7923                         return rte_flow_error_set
7924                                         (error, EINVAL,
7925                                         RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7926                                         "Invalid RTE action in tunnel "
7927                                         "set match rule");
7928         }
7929         /*
7930          * Validate the drop action mutual exclusion with other actions.
7931          * Drop action is mutually-exclusive with any other action, except for
7932          * Count action.
7933          * Drop action compatibility with tunnel offload was already validated.
7934          */
7935         if (action_flags & (MLX5_FLOW_ACTION_TUNNEL_MATCH |
7936                             MLX5_FLOW_ACTION_TUNNEL_MATCH));
7937         else if ((action_flags & MLX5_FLOW_ACTION_DROP) &&
7938             (action_flags & ~(MLX5_FLOW_ACTION_DROP | MLX5_FLOW_ACTION_COUNT)))
7939                 return rte_flow_error_set(error, EINVAL,
7940                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
7941                                           "Drop action is mutually-exclusive "
7942                                           "with any other action, except for "
7943                                           "Count action");
7944         /* Eswitch has few restrictions on using items and actions */
7945         if (attr->transfer) {
7946                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7947                     action_flags & MLX5_FLOW_ACTION_FLAG)
7948                         return rte_flow_error_set(error, ENOTSUP,
7949                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7950                                                   NULL,
7951                                                   "unsupported action FLAG");
7952                 if (!mlx5_flow_ext_mreg_supported(dev) &&
7953                     action_flags & MLX5_FLOW_ACTION_MARK)
7954                         return rte_flow_error_set(error, ENOTSUP,
7955                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7956                                                   NULL,
7957                                                   "unsupported action MARK");
7958                 if (action_flags & MLX5_FLOW_ACTION_QUEUE)
7959                         return rte_flow_error_set(error, ENOTSUP,
7960                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7961                                                   NULL,
7962                                                   "unsupported action QUEUE");
7963                 if (action_flags & MLX5_FLOW_ACTION_RSS)
7964                         return rte_flow_error_set(error, ENOTSUP,
7965                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7966                                                   NULL,
7967                                                   "unsupported action RSS");
7968                 if (!(action_flags & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
7969                         return rte_flow_error_set(error, EINVAL,
7970                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7971                                                   actions,
7972                                                   "no fate action is found");
7973         } else {
7974                 if (!(action_flags & MLX5_FLOW_FATE_ACTIONS) && attr->ingress)
7975                         return rte_flow_error_set(error, EINVAL,
7976                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7977                                                   actions,
7978                                                   "no fate action is found");
7979         }
7980         /*
7981          * Continue validation for Xcap and VLAN actions.
7982          * If hairpin is working in explicit TX rule mode, there is no actions
7983          * splitting and the validation of hairpin ingress flow should be the
7984          * same as other standard flows.
7985          */
7986         if ((action_flags & (MLX5_FLOW_XCAP_ACTIONS |
7987                              MLX5_FLOW_VLAN_ACTIONS)) &&
7988             (queue_index == 0xFFFF || !mlx5_rxq_is_hairpin(dev, queue_index) ||
7989              ((conf = mlx5_rxq_get_hairpin_conf(dev, queue_index)) != NULL &&
7990              conf->tx_explicit != 0))) {
7991                 if ((action_flags & MLX5_FLOW_XCAP_ACTIONS) ==
7992                     MLX5_FLOW_XCAP_ACTIONS)
7993                         return rte_flow_error_set(error, ENOTSUP,
7994                                                   RTE_FLOW_ERROR_TYPE_ACTION,
7995                                                   NULL, "encap and decap "
7996                                                   "combination aren't supported");
7997                 if (!attr->transfer && attr->ingress) {
7998                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
7999                                 return rte_flow_error_set
8000                                                 (error, ENOTSUP,
8001                                                  RTE_FLOW_ERROR_TYPE_ACTION,
8002                                                  NULL, "encap is not supported"
8003                                                  " for ingress traffic");
8004                         else if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
8005                                 return rte_flow_error_set
8006                                                 (error, ENOTSUP,
8007                                                  RTE_FLOW_ERROR_TYPE_ACTION,
8008                                                  NULL, "push VLAN action not "
8009                                                  "supported for ingress");
8010                         else if ((action_flags & MLX5_FLOW_VLAN_ACTIONS) ==
8011                                         MLX5_FLOW_VLAN_ACTIONS)
8012                                 return rte_flow_error_set
8013                                                 (error, ENOTSUP,
8014                                                  RTE_FLOW_ERROR_TYPE_ACTION,
8015                                                  NULL, "no support for "
8016                                                  "multiple VLAN actions");
8017                 }
8018         }
8019         if (action_flags & MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY) {
8020                 if ((action_flags & (MLX5_FLOW_FATE_ACTIONS &
8021                         ~MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)) &&
8022                         attr->ingress)
8023                         return rte_flow_error_set
8024                                 (error, ENOTSUP,
8025                                 RTE_FLOW_ERROR_TYPE_ACTION,
8026                                 NULL, "fate action not supported for "
8027                                 "meter with policy");
8028                 if (attr->egress) {
8029                         if (action_flags & MLX5_FLOW_MODIFY_HDR_ACTIONS)
8030                                 return rte_flow_error_set
8031                                         (error, ENOTSUP,
8032                                         RTE_FLOW_ERROR_TYPE_ACTION,
8033                                         NULL, "modify header action in egress "
8034                                         "cannot be done before meter action");
8035                         if (action_flags & MLX5_FLOW_ACTION_ENCAP)
8036                                 return rte_flow_error_set
8037                                         (error, ENOTSUP,
8038                                         RTE_FLOW_ERROR_TYPE_ACTION,
8039                                         NULL, "encap action in egress "
8040                                         "cannot be done before meter action");
8041                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
8042                                 return rte_flow_error_set
8043                                         (error, ENOTSUP,
8044                                         RTE_FLOW_ERROR_TYPE_ACTION,
8045                                         NULL, "push vlan action in egress "
8046                                         "cannot be done before meter action");
8047                 }
8048         }
8049         /*
8050          * Hairpin flow will add one more TAG action in TX implicit mode.
8051          * In TX explicit mode, there will be no hairpin flow ID.
8052          */
8053         if (hairpin > 0)
8054                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8055         /* extra metadata enabled: one more TAG action will be add. */
8056         if (dev_conf->dv_flow_en &&
8057             dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY &&
8058             mlx5_flow_ext_mreg_supported(dev))
8059                 rw_act_num += MLX5_ACT_NUM_SET_TAG;
8060         if (rw_act_num >
8061                         flow_dv_modify_hdr_action_max(dev, is_root)) {
8062                 return rte_flow_error_set(error, ENOTSUP,
8063                                           RTE_FLOW_ERROR_TYPE_ACTION,
8064                                           NULL, "too many header modify"
8065                                           " actions to support");
8066         }
8067         /* Eswitch egress mirror and modify flow has limitation on CX5 */
8068         if (fdb_mirror_limit && modify_after_mirror)
8069                 return rte_flow_error_set(error, EINVAL,
8070                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
8071                                 "sample before modify action is not supported");
8072         return 0;
8073 }
8074
8075 /**
8076  * Internal preparation function. Allocates the DV flow size,
8077  * this size is constant.
8078  *
8079  * @param[in] dev
8080  *   Pointer to the rte_eth_dev structure.
8081  * @param[in] attr
8082  *   Pointer to the flow attributes.
8083  * @param[in] items
8084  *   Pointer to the list of items.
8085  * @param[in] actions
8086  *   Pointer to the list of actions.
8087  * @param[out] error
8088  *   Pointer to the error structure.
8089  *
8090  * @return
8091  *   Pointer to mlx5_flow object on success,
8092  *   otherwise NULL and rte_errno is set.
8093  */
8094 static struct mlx5_flow *
8095 flow_dv_prepare(struct rte_eth_dev *dev,
8096                 const struct rte_flow_attr *attr __rte_unused,
8097                 const struct rte_flow_item items[] __rte_unused,
8098                 const struct rte_flow_action actions[] __rte_unused,
8099                 struct rte_flow_error *error)
8100 {
8101         uint32_t handle_idx = 0;
8102         struct mlx5_flow *dev_flow;
8103         struct mlx5_flow_handle *dev_handle;
8104         struct mlx5_priv *priv = dev->data->dev_private;
8105         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
8106
8107         MLX5_ASSERT(wks);
8108         wks->skip_matcher_reg = 0;
8109         wks->policy = NULL;
8110         wks->final_policy = NULL;
8111         /* In case of corrupting the memory. */
8112         if (wks->flow_idx >= MLX5_NUM_MAX_DEV_FLOWS) {
8113                 rte_flow_error_set(error, ENOSPC,
8114                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8115                                    "not free temporary device flow");
8116                 return NULL;
8117         }
8118         dev_handle = mlx5_ipool_zmalloc(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
8119                                    &handle_idx);
8120         if (!dev_handle) {
8121                 rte_flow_error_set(error, ENOMEM,
8122                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
8123                                    "not enough memory to create flow handle");
8124                 return NULL;
8125         }
8126         MLX5_ASSERT(wks->flow_idx < RTE_DIM(wks->flows));
8127         dev_flow = &wks->flows[wks->flow_idx++];
8128         memset(dev_flow, 0, sizeof(*dev_flow));
8129         dev_flow->handle = dev_handle;
8130         dev_flow->handle_idx = handle_idx;
8131         dev_flow->dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
8132         dev_flow->ingress = attr->ingress;
8133         dev_flow->dv.transfer = attr->transfer;
8134         return dev_flow;
8135 }
8136
8137 #ifdef RTE_LIBRTE_MLX5_DEBUG
8138 /**
8139  * Sanity check for match mask and value. Similar to check_valid_spec() in
8140  * kernel driver. If unmasked bit is present in value, it returns failure.
8141  *
8142  * @param match_mask
8143  *   pointer to match mask buffer.
8144  * @param match_value
8145  *   pointer to match value buffer.
8146  *
8147  * @return
8148  *   0 if valid, -EINVAL otherwise.
8149  */
8150 static int
8151 flow_dv_check_valid_spec(void *match_mask, void *match_value)
8152 {
8153         uint8_t *m = match_mask;
8154         uint8_t *v = match_value;
8155         unsigned int i;
8156
8157         for (i = 0; i < MLX5_ST_SZ_BYTES(fte_match_param); ++i) {
8158                 if (v[i] & ~m[i]) {
8159                         DRV_LOG(ERR,
8160                                 "match_value differs from match_criteria"
8161                                 " %p[%u] != %p[%u]",
8162                                 match_value, i, match_mask, i);
8163                         return -EINVAL;
8164                 }
8165         }
8166         return 0;
8167 }
8168 #endif
8169
8170 /**
8171  * Add match of ip_version.
8172  *
8173  * @param[in] group
8174  *   Flow group.
8175  * @param[in] headers_v
8176  *   Values header pointer.
8177  * @param[in] headers_m
8178  *   Masks header pointer.
8179  * @param[in] ip_version
8180  *   The IP version to set.
8181  */
8182 static inline void
8183 flow_dv_set_match_ip_version(uint32_t group,
8184                              void *headers_v,
8185                              void *headers_m,
8186                              uint8_t ip_version)
8187 {
8188         if (group == 0)
8189                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version, 0xf);
8190         else
8191                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_version,
8192                          ip_version);
8193         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_version, ip_version);
8194         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ethertype, 0);
8195         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ethertype, 0);
8196 }
8197
8198 /**
8199  * Add Ethernet item to matcher and to the value.
8200  *
8201  * @param[in, out] matcher
8202  *   Flow matcher.
8203  * @param[in, out] key
8204  *   Flow matcher value.
8205  * @param[in] item
8206  *   Flow pattern to translate.
8207  * @param[in] inner
8208  *   Item is inner pattern.
8209  */
8210 static void
8211 flow_dv_translate_item_eth(void *matcher, void *key,
8212                            const struct rte_flow_item *item, int inner,
8213                            uint32_t group)
8214 {
8215         const struct rte_flow_item_eth *eth_m = item->mask;
8216         const struct rte_flow_item_eth *eth_v = item->spec;
8217         const struct rte_flow_item_eth nic_mask = {
8218                 .dst.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8219                 .src.addr_bytes = "\xff\xff\xff\xff\xff\xff",
8220                 .type = RTE_BE16(0xffff),
8221                 .has_vlan = 0,
8222         };
8223         void *hdrs_m;
8224         void *hdrs_v;
8225         char *l24_v;
8226         unsigned int i;
8227
8228         if (!eth_v)
8229                 return;
8230         if (!eth_m)
8231                 eth_m = &nic_mask;
8232         if (inner) {
8233                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8234                                          inner_headers);
8235                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8236         } else {
8237                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8238                                          outer_headers);
8239                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8240         }
8241         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, dmac_47_16),
8242                &eth_m->dst, sizeof(eth_m->dst));
8243         /* The value must be in the range of the mask. */
8244         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, dmac_47_16);
8245         for (i = 0; i < sizeof(eth_m->dst); ++i)
8246                 l24_v[i] = eth_m->dst.addr_bytes[i] & eth_v->dst.addr_bytes[i];
8247         memcpy(MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, smac_47_16),
8248                &eth_m->src, sizeof(eth_m->src));
8249         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, smac_47_16);
8250         /* The value must be in the range of the mask. */
8251         for (i = 0; i < sizeof(eth_m->dst); ++i)
8252                 l24_v[i] = eth_m->src.addr_bytes[i] & eth_v->src.addr_bytes[i];
8253         /*
8254          * HW supports match on one Ethertype, the Ethertype following the last
8255          * VLAN tag of the packet (see PRM).
8256          * Set match on ethertype only if ETH header is not followed by VLAN.
8257          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8258          * ethertype, and use ip_version field instead.
8259          * eCPRI over Ether layer will use type value 0xAEFE.
8260          */
8261         if (eth_m->type == 0xFFFF) {
8262                 /* Set cvlan_tag mask for any single\multi\un-tagged case. */
8263                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8264                 switch (eth_v->type) {
8265                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8266                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8267                         return;
8268                 case RTE_BE16(RTE_ETHER_TYPE_QINQ):
8269                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8270                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8271                         return;
8272                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8273                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8274                         return;
8275                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8276                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8277                         return;
8278                 default:
8279                         break;
8280                 }
8281         }
8282         if (eth_m->has_vlan) {
8283                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8284                 if (eth_v->has_vlan) {
8285                         /*
8286                          * Here, when also has_more_vlan field in VLAN item is
8287                          * not set, only single-tagged packets will be matched.
8288                          */
8289                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8290                         return;
8291                 }
8292         }
8293         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8294                  rte_be_to_cpu_16(eth_m->type));
8295         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
8296         *(uint16_t *)(l24_v) = eth_m->type & eth_v->type;
8297 }
8298
8299 /**
8300  * Add VLAN item to matcher and to the value.
8301  *
8302  * @param[in, out] dev_flow
8303  *   Flow descriptor.
8304  * @param[in, out] matcher
8305  *   Flow matcher.
8306  * @param[in, out] key
8307  *   Flow matcher value.
8308  * @param[in] item
8309  *   Flow pattern to translate.
8310  * @param[in] inner
8311  *   Item is inner pattern.
8312  */
8313 static void
8314 flow_dv_translate_item_vlan(struct mlx5_flow *dev_flow,
8315                             void *matcher, void *key,
8316                             const struct rte_flow_item *item,
8317                             int inner, uint32_t group)
8318 {
8319         const struct rte_flow_item_vlan *vlan_m = item->mask;
8320         const struct rte_flow_item_vlan *vlan_v = item->spec;
8321         void *hdrs_m;
8322         void *hdrs_v;
8323         uint16_t tci_m;
8324         uint16_t tci_v;
8325
8326         if (inner) {
8327                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8328                                          inner_headers);
8329                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8330         } else {
8331                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher,
8332                                          outer_headers);
8333                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8334                 /*
8335                  * This is workaround, masks are not supported,
8336                  * and pre-validated.
8337                  */
8338                 if (vlan_v)
8339                         dev_flow->handle->vf_vlan.tag =
8340                                         rte_be_to_cpu_16(vlan_v->tci) & 0x0fff;
8341         }
8342         /*
8343          * When VLAN item exists in flow, mark packet as tagged,
8344          * even if TCI is not specified.
8345          */
8346         if (!MLX5_GET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag)) {
8347                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, cvlan_tag, 1);
8348                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 1);
8349         }
8350         if (!vlan_v)
8351                 return;
8352         if (!vlan_m)
8353                 vlan_m = &rte_flow_item_vlan_mask;
8354         tci_m = rte_be_to_cpu_16(vlan_m->tci);
8355         tci_v = rte_be_to_cpu_16(vlan_m->tci & vlan_v->tci);
8356         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_vid, tci_m);
8357         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_vid, tci_v);
8358         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_cfi, tci_m >> 12);
8359         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_cfi, tci_v >> 12);
8360         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, first_prio, tci_m >> 13);
8361         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, first_prio, tci_v >> 13);
8362         /*
8363          * HW is optimized for IPv4/IPv6. In such cases, avoid setting
8364          * ethertype, and use ip_version field instead.
8365          */
8366         if (vlan_m->inner_type == 0xFFFF) {
8367                 switch (vlan_v->inner_type) {
8368                 case RTE_BE16(RTE_ETHER_TYPE_VLAN):
8369                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8370                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8371                         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8372                         return;
8373                 case RTE_BE16(RTE_ETHER_TYPE_IPV4):
8374                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 4);
8375                         return;
8376                 case RTE_BE16(RTE_ETHER_TYPE_IPV6):
8377                         flow_dv_set_match_ip_version(group, hdrs_v, hdrs_m, 6);
8378                         return;
8379                 default:
8380                         break;
8381                 }
8382         }
8383         if (vlan_m->has_more_vlan && vlan_v->has_more_vlan) {
8384                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, svlan_tag, 1);
8385                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, svlan_tag, 1);
8386                 /* Only one vlan_tag bit can be set. */
8387                 MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, cvlan_tag, 0);
8388                 return;
8389         }
8390         MLX5_SET(fte_match_set_lyr_2_4, hdrs_m, ethertype,
8391                  rte_be_to_cpu_16(vlan_m->inner_type));
8392         MLX5_SET(fte_match_set_lyr_2_4, hdrs_v, ethertype,
8393                  rte_be_to_cpu_16(vlan_m->inner_type & vlan_v->inner_type));
8394 }
8395
8396 /**
8397  * Add IPV4 item to matcher and to the value.
8398  *
8399  * @param[in, out] matcher
8400  *   Flow matcher.
8401  * @param[in, out] key
8402  *   Flow matcher value.
8403  * @param[in] item
8404  *   Flow pattern to translate.
8405  * @param[in] inner
8406  *   Item is inner pattern.
8407  * @param[in] group
8408  *   The group to insert the rule.
8409  */
8410 static void
8411 flow_dv_translate_item_ipv4(void *matcher, void *key,
8412                             const struct rte_flow_item *item,
8413                             int inner, uint32_t group)
8414 {
8415         const struct rte_flow_item_ipv4 *ipv4_m = item->mask;
8416         const struct rte_flow_item_ipv4 *ipv4_v = item->spec;
8417         const struct rte_flow_item_ipv4 nic_mask = {
8418                 .hdr = {
8419                         .src_addr = RTE_BE32(0xffffffff),
8420                         .dst_addr = RTE_BE32(0xffffffff),
8421                         .type_of_service = 0xff,
8422                         .next_proto_id = 0xff,
8423                         .time_to_live = 0xff,
8424                 },
8425         };
8426         void *headers_m;
8427         void *headers_v;
8428         char *l24_m;
8429         char *l24_v;
8430         uint8_t tos, ihl_m, ihl_v;
8431
8432         if (inner) {
8433                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8434                                          inner_headers);
8435                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8436         } else {
8437                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8438                                          outer_headers);
8439                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8440         }
8441         flow_dv_set_match_ip_version(group, headers_v, headers_m, 4);
8442         if (!ipv4_v)
8443                 return;
8444         if (!ipv4_m)
8445                 ipv4_m = &nic_mask;
8446         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8447                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8448         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8449                              dst_ipv4_dst_ipv6.ipv4_layout.ipv4);
8450         *(uint32_t *)l24_m = ipv4_m->hdr.dst_addr;
8451         *(uint32_t *)l24_v = ipv4_m->hdr.dst_addr & ipv4_v->hdr.dst_addr;
8452         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8453                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8454         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8455                           src_ipv4_src_ipv6.ipv4_layout.ipv4);
8456         *(uint32_t *)l24_m = ipv4_m->hdr.src_addr;
8457         *(uint32_t *)l24_v = ipv4_m->hdr.src_addr & ipv4_v->hdr.src_addr;
8458         tos = ipv4_m->hdr.type_of_service & ipv4_v->hdr.type_of_service;
8459         ihl_m = ipv4_m->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8460         ihl_v = ipv4_v->hdr.version_ihl & RTE_IPV4_HDR_IHL_MASK;
8461         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_ihl, ihl_m);
8462         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_ihl, ihl_m & ihl_v);
8463         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn,
8464                  ipv4_m->hdr.type_of_service);
8465         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, tos);
8466         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp,
8467                  ipv4_m->hdr.type_of_service >> 2);
8468         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, tos >> 2);
8469         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8470                  ipv4_m->hdr.next_proto_id);
8471         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8472                  ipv4_v->hdr.next_proto_id & ipv4_m->hdr.next_proto_id);
8473         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8474                  ipv4_m->hdr.time_to_live);
8475         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8476                  ipv4_v->hdr.time_to_live & ipv4_m->hdr.time_to_live);
8477         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8478                  !!(ipv4_m->hdr.fragment_offset));
8479         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8480                  !!(ipv4_v->hdr.fragment_offset & ipv4_m->hdr.fragment_offset));
8481 }
8482
8483 /**
8484  * Add IPV6 item to matcher and to the value.
8485  *
8486  * @param[in, out] matcher
8487  *   Flow matcher.
8488  * @param[in, out] key
8489  *   Flow matcher value.
8490  * @param[in] item
8491  *   Flow pattern to translate.
8492  * @param[in] inner
8493  *   Item is inner pattern.
8494  * @param[in] group
8495  *   The group to insert the rule.
8496  */
8497 static void
8498 flow_dv_translate_item_ipv6(void *matcher, void *key,
8499                             const struct rte_flow_item *item,
8500                             int inner, uint32_t group)
8501 {
8502         const struct rte_flow_item_ipv6 *ipv6_m = item->mask;
8503         const struct rte_flow_item_ipv6 *ipv6_v = item->spec;
8504         const struct rte_flow_item_ipv6 nic_mask = {
8505                 .hdr = {
8506                         .src_addr =
8507                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8508                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8509                         .dst_addr =
8510                                 "\xff\xff\xff\xff\xff\xff\xff\xff"
8511                                 "\xff\xff\xff\xff\xff\xff\xff\xff",
8512                         .vtc_flow = RTE_BE32(0xffffffff),
8513                         .proto = 0xff,
8514                         .hop_limits = 0xff,
8515                 },
8516         };
8517         void *headers_m;
8518         void *headers_v;
8519         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8520         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8521         char *l24_m;
8522         char *l24_v;
8523         uint32_t vtc_m;
8524         uint32_t vtc_v;
8525         int i;
8526         int size;
8527
8528         if (inner) {
8529                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8530                                          inner_headers);
8531                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8532         } else {
8533                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8534                                          outer_headers);
8535                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8536         }
8537         flow_dv_set_match_ip_version(group, headers_v, headers_m, 6);
8538         if (!ipv6_v)
8539                 return;
8540         if (!ipv6_m)
8541                 ipv6_m = &nic_mask;
8542         size = sizeof(ipv6_m->hdr.dst_addr);
8543         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8544                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8545         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8546                              dst_ipv4_dst_ipv6.ipv6_layout.ipv6);
8547         memcpy(l24_m, ipv6_m->hdr.dst_addr, size);
8548         for (i = 0; i < size; ++i)
8549                 l24_v[i] = l24_m[i] & ipv6_v->hdr.dst_addr[i];
8550         l24_m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_m,
8551                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8552         l24_v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, headers_v,
8553                              src_ipv4_src_ipv6.ipv6_layout.ipv6);
8554         memcpy(l24_m, ipv6_m->hdr.src_addr, size);
8555         for (i = 0; i < size; ++i)
8556                 l24_v[i] = l24_m[i] & ipv6_v->hdr.src_addr[i];
8557         /* TOS. */
8558         vtc_m = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow);
8559         vtc_v = rte_be_to_cpu_32(ipv6_m->hdr.vtc_flow & ipv6_v->hdr.vtc_flow);
8560         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ecn, vtc_m >> 20);
8561         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ecn, vtc_v >> 20);
8562         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_dscp, vtc_m >> 22);
8563         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_dscp, vtc_v >> 22);
8564         /* Label. */
8565         if (inner) {
8566                 MLX5_SET(fte_match_set_misc, misc_m, inner_ipv6_flow_label,
8567                          vtc_m);
8568                 MLX5_SET(fte_match_set_misc, misc_v, inner_ipv6_flow_label,
8569                          vtc_v);
8570         } else {
8571                 MLX5_SET(fte_match_set_misc, misc_m, outer_ipv6_flow_label,
8572                          vtc_m);
8573                 MLX5_SET(fte_match_set_misc, misc_v, outer_ipv6_flow_label,
8574                          vtc_v);
8575         }
8576         /* Protocol. */
8577         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8578                  ipv6_m->hdr.proto);
8579         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8580                  ipv6_v->hdr.proto & ipv6_m->hdr.proto);
8581         /* Hop limit. */
8582         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_ttl_hoplimit,
8583                  ipv6_m->hdr.hop_limits);
8584         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_ttl_hoplimit,
8585                  ipv6_v->hdr.hop_limits & ipv6_m->hdr.hop_limits);
8586         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag,
8587                  !!(ipv6_m->has_frag_ext));
8588         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag,
8589                  !!(ipv6_v->has_frag_ext & ipv6_m->has_frag_ext));
8590 }
8591
8592 /**
8593  * Add IPV6 fragment extension item to matcher and to the value.
8594  *
8595  * @param[in, out] matcher
8596  *   Flow matcher.
8597  * @param[in, out] key
8598  *   Flow matcher value.
8599  * @param[in] item
8600  *   Flow pattern to translate.
8601  * @param[in] inner
8602  *   Item is inner pattern.
8603  */
8604 static void
8605 flow_dv_translate_item_ipv6_frag_ext(void *matcher, void *key,
8606                                      const struct rte_flow_item *item,
8607                                      int inner)
8608 {
8609         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_m = item->mask;
8610         const struct rte_flow_item_ipv6_frag_ext *ipv6_frag_ext_v = item->spec;
8611         const struct rte_flow_item_ipv6_frag_ext nic_mask = {
8612                 .hdr = {
8613                         .next_header = 0xff,
8614                         .frag_data = RTE_BE16(0xffff),
8615                 },
8616         };
8617         void *headers_m;
8618         void *headers_v;
8619
8620         if (inner) {
8621                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8622                                          inner_headers);
8623                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8624         } else {
8625                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8626                                          outer_headers);
8627                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8628         }
8629         /* IPv6 fragment extension item exists, so packet is IP fragment. */
8630         MLX5_SET(fte_match_set_lyr_2_4, headers_m, frag, 1);
8631         MLX5_SET(fte_match_set_lyr_2_4, headers_v, frag, 1);
8632         if (!ipv6_frag_ext_v)
8633                 return;
8634         if (!ipv6_frag_ext_m)
8635                 ipv6_frag_ext_m = &nic_mask;
8636         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol,
8637                  ipv6_frag_ext_m->hdr.next_header);
8638         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol,
8639                  ipv6_frag_ext_v->hdr.next_header &
8640                  ipv6_frag_ext_m->hdr.next_header);
8641 }
8642
8643 /**
8644  * Add TCP item to matcher and to the value.
8645  *
8646  * @param[in, out] matcher
8647  *   Flow matcher.
8648  * @param[in, out] key
8649  *   Flow matcher value.
8650  * @param[in] item
8651  *   Flow pattern to translate.
8652  * @param[in] inner
8653  *   Item is inner pattern.
8654  */
8655 static void
8656 flow_dv_translate_item_tcp(void *matcher, void *key,
8657                            const struct rte_flow_item *item,
8658                            int inner)
8659 {
8660         const struct rte_flow_item_tcp *tcp_m = item->mask;
8661         const struct rte_flow_item_tcp *tcp_v = item->spec;
8662         void *headers_m;
8663         void *headers_v;
8664
8665         if (inner) {
8666                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8667                                          inner_headers);
8668                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8669         } else {
8670                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8671                                          outer_headers);
8672                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8673         }
8674         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8675         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_TCP);
8676         if (!tcp_v)
8677                 return;
8678         if (!tcp_m)
8679                 tcp_m = &rte_flow_item_tcp_mask;
8680         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_sport,
8681                  rte_be_to_cpu_16(tcp_m->hdr.src_port));
8682         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_sport,
8683                  rte_be_to_cpu_16(tcp_v->hdr.src_port & tcp_m->hdr.src_port));
8684         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_dport,
8685                  rte_be_to_cpu_16(tcp_m->hdr.dst_port));
8686         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_dport,
8687                  rte_be_to_cpu_16(tcp_v->hdr.dst_port & tcp_m->hdr.dst_port));
8688         MLX5_SET(fte_match_set_lyr_2_4, headers_m, tcp_flags,
8689                  tcp_m->hdr.tcp_flags);
8690         MLX5_SET(fte_match_set_lyr_2_4, headers_v, tcp_flags,
8691                  (tcp_v->hdr.tcp_flags & tcp_m->hdr.tcp_flags));
8692 }
8693
8694 /**
8695  * Add UDP item to matcher and to the value.
8696  *
8697  * @param[in, out] matcher
8698  *   Flow matcher.
8699  * @param[in, out] key
8700  *   Flow matcher value.
8701  * @param[in] item
8702  *   Flow pattern to translate.
8703  * @param[in] inner
8704  *   Item is inner pattern.
8705  */
8706 static void
8707 flow_dv_translate_item_udp(void *matcher, void *key,
8708                            const struct rte_flow_item *item,
8709                            int inner)
8710 {
8711         const struct rte_flow_item_udp *udp_m = item->mask;
8712         const struct rte_flow_item_udp *udp_v = item->spec;
8713         void *headers_m;
8714         void *headers_v;
8715
8716         if (inner) {
8717                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8718                                          inner_headers);
8719                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
8720         } else {
8721                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
8722                                          outer_headers);
8723                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8724         }
8725         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8726         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_UDP);
8727         if (!udp_v)
8728                 return;
8729         if (!udp_m)
8730                 udp_m = &rte_flow_item_udp_mask;
8731         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_sport,
8732                  rte_be_to_cpu_16(udp_m->hdr.src_port));
8733         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_sport,
8734                  rte_be_to_cpu_16(udp_v->hdr.src_port & udp_m->hdr.src_port));
8735         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
8736                  rte_be_to_cpu_16(udp_m->hdr.dst_port));
8737         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
8738                  rte_be_to_cpu_16(udp_v->hdr.dst_port & udp_m->hdr.dst_port));
8739 }
8740
8741 /**
8742  * Add GRE optional Key item to matcher and to the value.
8743  *
8744  * @param[in, out] matcher
8745  *   Flow matcher.
8746  * @param[in, out] key
8747  *   Flow matcher value.
8748  * @param[in] item
8749  *   Flow pattern to translate.
8750  * @param[in] inner
8751  *   Item is inner pattern.
8752  */
8753 static void
8754 flow_dv_translate_item_gre_key(void *matcher, void *key,
8755                                    const struct rte_flow_item *item)
8756 {
8757         const rte_be32_t *key_m = item->mask;
8758         const rte_be32_t *key_v = item->spec;
8759         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8760         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8761         rte_be32_t gre_key_default_mask = RTE_BE32(UINT32_MAX);
8762
8763         /* GRE K bit must be on and should already be validated */
8764         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present, 1);
8765         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present, 1);
8766         if (!key_v)
8767                 return;
8768         if (!key_m)
8769                 key_m = &gre_key_default_mask;
8770         MLX5_SET(fte_match_set_misc, misc_m, gre_key_h,
8771                  rte_be_to_cpu_32(*key_m) >> 8);
8772         MLX5_SET(fte_match_set_misc, misc_v, gre_key_h,
8773                  rte_be_to_cpu_32((*key_v) & (*key_m)) >> 8);
8774         MLX5_SET(fte_match_set_misc, misc_m, gre_key_l,
8775                  rte_be_to_cpu_32(*key_m) & 0xFF);
8776         MLX5_SET(fte_match_set_misc, misc_v, gre_key_l,
8777                  rte_be_to_cpu_32((*key_v) & (*key_m)) & 0xFF);
8778 }
8779
8780 /**
8781  * Add GRE item to matcher and to the value.
8782  *
8783  * @param[in, out] matcher
8784  *   Flow matcher.
8785  * @param[in, out] key
8786  *   Flow matcher value.
8787  * @param[in] item
8788  *   Flow pattern to translate.
8789  * @param[in] pattern_flags
8790  *   Accumulated pattern flags.
8791  */
8792 static void
8793 flow_dv_translate_item_gre(void *matcher, void *key,
8794                            const struct rte_flow_item *item,
8795                            uint64_t pattern_flags)
8796 {
8797         static const struct rte_flow_item_gre empty_gre = {0,};
8798         const struct rte_flow_item_gre *gre_m = item->mask;
8799         const struct rte_flow_item_gre *gre_v = item->spec;
8800         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
8801         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
8802         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8803         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8804         struct {
8805                 union {
8806                         __extension__
8807                         struct {
8808                                 uint16_t version:3;
8809                                 uint16_t rsvd0:9;
8810                                 uint16_t s_present:1;
8811                                 uint16_t k_present:1;
8812                                 uint16_t rsvd_bit1:1;
8813                                 uint16_t c_present:1;
8814                         };
8815                         uint16_t value;
8816                 };
8817         } gre_crks_rsvd0_ver_m, gre_crks_rsvd0_ver_v;
8818         uint16_t protocol_m, protocol_v;
8819
8820         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xff);
8821         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_GRE);
8822         if (!gre_v) {
8823                 gre_v = &empty_gre;
8824                 gre_m = &empty_gre;
8825         } else {
8826                 if (!gre_m)
8827                         gre_m = &rte_flow_item_gre_mask;
8828         }
8829         gre_crks_rsvd0_ver_m.value = rte_be_to_cpu_16(gre_m->c_rsvd0_ver);
8830         gre_crks_rsvd0_ver_v.value = rte_be_to_cpu_16(gre_v->c_rsvd0_ver);
8831         MLX5_SET(fte_match_set_misc, misc_m, gre_c_present,
8832                  gre_crks_rsvd0_ver_m.c_present);
8833         MLX5_SET(fte_match_set_misc, misc_v, gre_c_present,
8834                  gre_crks_rsvd0_ver_v.c_present &
8835                  gre_crks_rsvd0_ver_m.c_present);
8836         MLX5_SET(fte_match_set_misc, misc_m, gre_k_present,
8837                  gre_crks_rsvd0_ver_m.k_present);
8838         MLX5_SET(fte_match_set_misc, misc_v, gre_k_present,
8839                  gre_crks_rsvd0_ver_v.k_present &
8840                  gre_crks_rsvd0_ver_m.k_present);
8841         MLX5_SET(fte_match_set_misc, misc_m, gre_s_present,
8842                  gre_crks_rsvd0_ver_m.s_present);
8843         MLX5_SET(fte_match_set_misc, misc_v, gre_s_present,
8844                  gre_crks_rsvd0_ver_v.s_present &
8845                  gre_crks_rsvd0_ver_m.s_present);
8846         protocol_m = rte_be_to_cpu_16(gre_m->protocol);
8847         protocol_v = rte_be_to_cpu_16(gre_v->protocol);
8848         if (!protocol_m) {
8849                 /* Force next protocol to prevent matchers duplication */
8850                 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
8851                 if (protocol_v)
8852                         protocol_m = 0xFFFF;
8853         }
8854         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol, protocol_m);
8855         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
8856                  protocol_m & protocol_v);
8857 }
8858
8859 /**
8860  * Add GRE optional items to matcher and to the value.
8861  *
8862  * @param[in, out] matcher
8863  *   Flow matcher.
8864  * @param[in, out] key
8865  *   Flow matcher value.
8866  * @param[in] item
8867  *   Flow pattern to translate.
8868  * @param[in] gre_item
8869  *   Pointer to gre_item.
8870  * @param[in] pattern_flags
8871  *   Accumulated pattern flags.
8872  */
8873 static void
8874 flow_dv_translate_item_gre_option(void *matcher, void *key,
8875                                   const struct rte_flow_item *item,
8876                                   const struct rte_flow_item *gre_item,
8877                                   uint64_t pattern_flags)
8878 {
8879         const struct rte_flow_item_gre_opt *option_m = item->mask;
8880         const struct rte_flow_item_gre_opt *option_v = item->spec;
8881         const struct rte_flow_item_gre *gre_m = gre_item->mask;
8882         const struct rte_flow_item_gre *gre_v = gre_item->spec;
8883         static const struct rte_flow_item_gre empty_gre = {0};
8884         struct rte_flow_item gre_key_item;
8885         uint16_t c_rsvd0_ver_m, c_rsvd0_ver_v;
8886         uint16_t protocol_m, protocol_v;
8887         void *misc5_m;
8888         void *misc5_v;
8889
8890         /*
8891          * If only match key field, keep using misc for matching.
8892          * If need to match checksum or sequence, using misc5 and do
8893          * not need using misc.
8894          */
8895         if (!(option_m->sequence.sequence ||
8896               option_m->checksum_rsvd.checksum)) {
8897                 flow_dv_translate_item_gre(matcher, key, gre_item,
8898                                            pattern_flags);
8899                 gre_key_item.spec = &option_v->key.key;
8900                 gre_key_item.mask = &option_m->key.key;
8901                 flow_dv_translate_item_gre_key(matcher, key, &gre_key_item);
8902                 return;
8903         }
8904         if (!gre_v) {
8905                 gre_v = &empty_gre;
8906                 gre_m = &empty_gre;
8907         } else {
8908                 if (!gre_m)
8909                         gre_m = &rte_flow_item_gre_mask;
8910         }
8911         protocol_v = gre_v->protocol;
8912         protocol_m = gre_m->protocol;
8913         if (!protocol_m) {
8914                 /* Force next protocol to prevent matchers duplication */
8915                 uint16_t ether_type =
8916                         mlx5_translate_tunnel_etypes(pattern_flags);
8917                 if (ether_type) {
8918                         protocol_v = rte_be_to_cpu_16(ether_type);
8919                         protocol_m = UINT16_MAX;
8920                 }
8921         }
8922         c_rsvd0_ver_v = gre_v->c_rsvd0_ver;
8923         c_rsvd0_ver_m = gre_m->c_rsvd0_ver;
8924         if (option_m->sequence.sequence) {
8925                 c_rsvd0_ver_v |= RTE_BE16(0x1000);
8926                 c_rsvd0_ver_m |= RTE_BE16(0x1000);
8927         }
8928         if (option_m->key.key) {
8929                 c_rsvd0_ver_v |= RTE_BE16(0x2000);
8930                 c_rsvd0_ver_m |= RTE_BE16(0x2000);
8931         }
8932         if (option_m->checksum_rsvd.checksum) {
8933                 c_rsvd0_ver_v |= RTE_BE16(0x8000);
8934                 c_rsvd0_ver_m |= RTE_BE16(0x8000);
8935         }
8936         /*
8937          * Hardware parses GRE optional field into the fixed location,
8938          * do not need to adjust the tunnel dword indices.
8939          */
8940         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
8941         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
8942         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_0,
8943                  rte_be_to_cpu_32((c_rsvd0_ver_v | protocol_v << 16) &
8944                                   (c_rsvd0_ver_m | protocol_m << 16)));
8945         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_0,
8946                  rte_be_to_cpu_32(c_rsvd0_ver_m | protocol_m << 16));
8947         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_1,
8948                  rte_be_to_cpu_32(option_v->checksum_rsvd.checksum &
8949                                   option_m->checksum_rsvd.checksum));
8950         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_1,
8951                  rte_be_to_cpu_32(option_m->checksum_rsvd.checksum));
8952         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_2,
8953                  rte_be_to_cpu_32(option_v->key.key & option_m->key.key));
8954         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_2,
8955                  rte_be_to_cpu_32(option_m->key.key));
8956         MLX5_SET(fte_match_set_misc5, misc5_v, tunnel_header_3,
8957                  rte_be_to_cpu_32(option_v->sequence.sequence &
8958                                   option_m->sequence.sequence));
8959         MLX5_SET(fte_match_set_misc5, misc5_m, tunnel_header_3,
8960                  rte_be_to_cpu_32(option_m->sequence.sequence));
8961 }
8962
8963 /**
8964  * Add NVGRE item to matcher and to the value.
8965  *
8966  * @param[in, out] matcher
8967  *   Flow matcher.
8968  * @param[in, out] key
8969  *   Flow matcher value.
8970  * @param[in] item
8971  *   Flow pattern to translate.
8972  * @param[in] pattern_flags
8973  *   Accumulated pattern flags.
8974  */
8975 static void
8976 flow_dv_translate_item_nvgre(void *matcher, void *key,
8977                              const struct rte_flow_item *item,
8978                              unsigned long pattern_flags)
8979 {
8980         const struct rte_flow_item_nvgre *nvgre_m = item->mask;
8981         const struct rte_flow_item_nvgre *nvgre_v = item->spec;
8982         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
8983         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
8984         const char *tni_flow_id_m;
8985         const char *tni_flow_id_v;
8986         char *gre_key_m;
8987         char *gre_key_v;
8988         int size;
8989         int i;
8990
8991         /* For NVGRE, GRE header fields must be set with defined values. */
8992         const struct rte_flow_item_gre gre_spec = {
8993                 .c_rsvd0_ver = RTE_BE16(0x2000),
8994                 .protocol = RTE_BE16(RTE_ETHER_TYPE_TEB)
8995         };
8996         const struct rte_flow_item_gre gre_mask = {
8997                 .c_rsvd0_ver = RTE_BE16(0xB000),
8998                 .protocol = RTE_BE16(UINT16_MAX),
8999         };
9000         const struct rte_flow_item gre_item = {
9001                 .spec = &gre_spec,
9002                 .mask = &gre_mask,
9003                 .last = NULL,
9004         };
9005         flow_dv_translate_item_gre(matcher, key, &gre_item, pattern_flags);
9006         if (!nvgre_v)
9007                 return;
9008         if (!nvgre_m)
9009                 nvgre_m = &rte_flow_item_nvgre_mask;
9010         tni_flow_id_m = (const char *)nvgre_m->tni;
9011         tni_flow_id_v = (const char *)nvgre_v->tni;
9012         size = sizeof(nvgre_m->tni) + sizeof(nvgre_m->flow_id);
9013         gre_key_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, gre_key_h);
9014         gre_key_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, gre_key_h);
9015         memcpy(gre_key_m, tni_flow_id_m, size);
9016         for (i = 0; i < size; ++i)
9017                 gre_key_v[i] = gre_key_m[i] & tni_flow_id_v[i];
9018 }
9019
9020 /**
9021  * Add VXLAN item to matcher and to the value.
9022  *
9023  * @param[in] dev
9024  *   Pointer to the Ethernet device structure.
9025  * @param[in] attr
9026  *   Flow rule attributes.
9027  * @param[in, out] matcher
9028  *   Flow matcher.
9029  * @param[in, out] key
9030  *   Flow matcher value.
9031  * @param[in] item
9032  *   Flow pattern to translate.
9033  * @param[in] inner
9034  *   Item is inner pattern.
9035  */
9036 static void
9037 flow_dv_translate_item_vxlan(struct rte_eth_dev *dev,
9038                              const struct rte_flow_attr *attr,
9039                              void *matcher, void *key,
9040                              const struct rte_flow_item *item,
9041                              int inner)
9042 {
9043         const struct rte_flow_item_vxlan *vxlan_m = item->mask;
9044         const struct rte_flow_item_vxlan *vxlan_v = item->spec;
9045         void *headers_m;
9046         void *headers_v;
9047         void *misc5_m;
9048         void *misc5_v;
9049         uint32_t *tunnel_header_v;
9050         uint32_t *tunnel_header_m;
9051         uint16_t dport;
9052         struct mlx5_priv *priv = dev->data->dev_private;
9053         const struct rte_flow_item_vxlan nic_mask = {
9054                 .vni = "\xff\xff\xff",
9055                 .rsvd1 = 0xff,
9056         };
9057
9058         if (inner) {
9059                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9060                                          inner_headers);
9061                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9062         } else {
9063                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9064                                          outer_headers);
9065                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9066         }
9067         dport = item->type == RTE_FLOW_ITEM_TYPE_VXLAN ?
9068                 MLX5_UDP_PORT_VXLAN : MLX5_UDP_PORT_VXLAN_GPE;
9069         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9070                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9071                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
9072         }
9073         dport = MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport);
9074         if (!vxlan_v)
9075                 return;
9076         if (!vxlan_m) {
9077                 if ((!attr->group && !priv->sh->tunnel_header_0_1) ||
9078                     (attr->group && !priv->sh->misc5_cap))
9079                         vxlan_m = &rte_flow_item_vxlan_mask;
9080                 else
9081                         vxlan_m = &nic_mask;
9082         }
9083         if ((priv->sh->steering_format_version ==
9084             MLX5_STEERING_LOGIC_FORMAT_CONNECTX_5 &&
9085             dport != MLX5_UDP_PORT_VXLAN) ||
9086             (!attr->group && !attr->transfer && !priv->sh->tunnel_header_0_1) ||
9087             ((attr->group || attr->transfer) && !priv->sh->misc5_cap)) {
9088                 void *misc_m;
9089                 void *misc_v;
9090                 char *vni_m;
9091                 char *vni_v;
9092                 int size;
9093                 int i;
9094                 misc_m = MLX5_ADDR_OF(fte_match_param,
9095                                       matcher, misc_parameters);
9096                 misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9097                 size = sizeof(vxlan_m->vni);
9098                 vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, vxlan_vni);
9099                 vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, vxlan_vni);
9100                 memcpy(vni_m, vxlan_m->vni, size);
9101                 for (i = 0; i < size; ++i)
9102                         vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9103                 return;
9104         }
9105         misc5_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_5);
9106         misc5_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_5);
9107         tunnel_header_v = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
9108                                                    misc5_v,
9109                                                    tunnel_header_1);
9110         tunnel_header_m = (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc5,
9111                                                    misc5_m,
9112                                                    tunnel_header_1);
9113         *tunnel_header_v = (vxlan_v->vni[0] & vxlan_m->vni[0]) |
9114                            (vxlan_v->vni[1] & vxlan_m->vni[1]) << 8 |
9115                            (vxlan_v->vni[2] & vxlan_m->vni[2]) << 16;
9116         if (*tunnel_header_v)
9117                 *tunnel_header_m = vxlan_m->vni[0] |
9118                         vxlan_m->vni[1] << 8 |
9119                         vxlan_m->vni[2] << 16;
9120         else
9121                 *tunnel_header_m = 0x0;
9122         *tunnel_header_v |= (vxlan_v->rsvd1 & vxlan_m->rsvd1) << 24;
9123         if (vxlan_v->rsvd1 & vxlan_m->rsvd1)
9124                 *tunnel_header_m |= vxlan_m->rsvd1 << 24;
9125 }
9126
9127 /**
9128  * Add VXLAN-GPE item to matcher and to the value.
9129  *
9130  * @param[in, out] matcher
9131  *   Flow matcher.
9132  * @param[in, out] key
9133  *   Flow matcher value.
9134  * @param[in] item
9135  *   Flow pattern to translate.
9136  * @param[in] inner
9137  *   Item is inner pattern.
9138  */
9139
9140 static void
9141 flow_dv_translate_item_vxlan_gpe(void *matcher, void *key,
9142                                  const struct rte_flow_item *item,
9143                                  const uint64_t pattern_flags)
9144 {
9145         static const struct rte_flow_item_vxlan_gpe dummy_vxlan_gpe_hdr = {0, };
9146         const struct rte_flow_item_vxlan_gpe *vxlan_m = item->mask;
9147         const struct rte_flow_item_vxlan_gpe *vxlan_v = item->spec;
9148         /* The item was validated to be on the outer side */
9149         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9150         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9151         void *misc_m =
9152                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_3);
9153         void *misc_v =
9154                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9155         char *vni_m =
9156                 MLX5_ADDR_OF(fte_match_set_misc3, misc_m, outer_vxlan_gpe_vni);
9157         char *vni_v =
9158                 MLX5_ADDR_OF(fte_match_set_misc3, misc_v, outer_vxlan_gpe_vni);
9159         int i, size = sizeof(vxlan_m->vni);
9160         uint8_t flags_m = 0xff;
9161         uint8_t flags_v = 0xc;
9162         uint8_t m_protocol, v_protocol;
9163
9164         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9165                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9166                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9167                          MLX5_UDP_PORT_VXLAN_GPE);
9168         }
9169         if (!vxlan_v) {
9170                 vxlan_v = &dummy_vxlan_gpe_hdr;
9171                 vxlan_m = &dummy_vxlan_gpe_hdr;
9172         } else {
9173                 if (!vxlan_m)
9174                         vxlan_m = &rte_flow_item_vxlan_gpe_mask;
9175         }
9176         memcpy(vni_m, vxlan_m->vni, size);
9177         for (i = 0; i < size; ++i)
9178                 vni_v[i] = vni_m[i] & vxlan_v->vni[i];
9179         if (vxlan_m->flags) {
9180                 flags_m = vxlan_m->flags;
9181                 flags_v = vxlan_v->flags;
9182         }
9183         MLX5_SET(fte_match_set_misc3, misc_m, outer_vxlan_gpe_flags, flags_m);
9184         MLX5_SET(fte_match_set_misc3, misc_v, outer_vxlan_gpe_flags, flags_v);
9185         m_protocol = vxlan_m->protocol;
9186         v_protocol = vxlan_v->protocol;
9187         if (!m_protocol) {
9188                 /* Force next protocol to ensure next headers parsing. */
9189                 if (pattern_flags & MLX5_FLOW_LAYER_INNER_L2)
9190                         v_protocol = RTE_VXLAN_GPE_TYPE_ETH;
9191                 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4)
9192                         v_protocol = RTE_VXLAN_GPE_TYPE_IPV4;
9193                 else if (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV6)
9194                         v_protocol = RTE_VXLAN_GPE_TYPE_IPV6;
9195                 if (v_protocol)
9196                         m_protocol = 0xFF;
9197         }
9198         MLX5_SET(fte_match_set_misc3, misc_m,
9199                  outer_vxlan_gpe_next_protocol, m_protocol);
9200         MLX5_SET(fte_match_set_misc3, misc_v,
9201                  outer_vxlan_gpe_next_protocol, m_protocol & v_protocol);
9202 }
9203
9204 /**
9205  * Add Geneve item to matcher and to the value.
9206  *
9207  * @param[in, out] matcher
9208  *   Flow matcher.
9209  * @param[in, out] key
9210  *   Flow matcher value.
9211  * @param[in] item
9212  *   Flow pattern to translate.
9213  * @param[in] inner
9214  *   Item is inner pattern.
9215  */
9216
9217 static void
9218 flow_dv_translate_item_geneve(void *matcher, void *key,
9219                               const struct rte_flow_item *item,
9220                               uint64_t pattern_flags)
9221 {
9222         static const struct rte_flow_item_geneve empty_geneve = {0,};
9223         const struct rte_flow_item_geneve *geneve_m = item->mask;
9224         const struct rte_flow_item_geneve *geneve_v = item->spec;
9225         /* GENEVE flow item validation allows single tunnel item */
9226         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9227         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9228         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9229         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9230         uint16_t gbhdr_m;
9231         uint16_t gbhdr_v;
9232         char *vni_m = MLX5_ADDR_OF(fte_match_set_misc, misc_m, geneve_vni);
9233         char *vni_v = MLX5_ADDR_OF(fte_match_set_misc, misc_v, geneve_vni);
9234         size_t size = sizeof(geneve_m->vni), i;
9235         uint16_t protocol_m, protocol_v;
9236
9237         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9238                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
9239                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9240                          MLX5_UDP_PORT_GENEVE);
9241         }
9242         if (!geneve_v) {
9243                 geneve_v = &empty_geneve;
9244                 geneve_m = &empty_geneve;
9245         } else {
9246                 if (!geneve_m)
9247                         geneve_m = &rte_flow_item_geneve_mask;
9248         }
9249         memcpy(vni_m, geneve_m->vni, size);
9250         for (i = 0; i < size; ++i)
9251                 vni_v[i] = vni_m[i] & geneve_v->vni[i];
9252         gbhdr_m = rte_be_to_cpu_16(geneve_m->ver_opt_len_o_c_rsvd0);
9253         gbhdr_v = rte_be_to_cpu_16(geneve_v->ver_opt_len_o_c_rsvd0);
9254         MLX5_SET(fte_match_set_misc, misc_m, geneve_oam,
9255                  MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9256         MLX5_SET(fte_match_set_misc, misc_v, geneve_oam,
9257                  MLX5_GENEVE_OAMF_VAL(gbhdr_v) & MLX5_GENEVE_OAMF_VAL(gbhdr_m));
9258         MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9259                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9260         MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9261                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_v) &
9262                  MLX5_GENEVE_OPTLEN_VAL(gbhdr_m));
9263         protocol_m = rte_be_to_cpu_16(geneve_m->protocol);
9264         protocol_v = rte_be_to_cpu_16(geneve_v->protocol);
9265         if (!protocol_m) {
9266                 /* Force next protocol to prevent matchers duplication */
9267                 protocol_v = mlx5_translate_tunnel_etypes(pattern_flags);
9268                 if (protocol_v)
9269                         protocol_m = 0xFFFF;
9270         }
9271         MLX5_SET(fte_match_set_misc, misc_m, geneve_protocol_type, protocol_m);
9272         MLX5_SET(fte_match_set_misc, misc_v, geneve_protocol_type,
9273                  protocol_m & protocol_v);
9274 }
9275
9276 /**
9277  * Create Geneve TLV option resource.
9278  *
9279  * @param dev[in, out]
9280  *   Pointer to rte_eth_dev structure.
9281  * @param[in, out] tag_be24
9282  *   Tag value in big endian then R-shift 8.
9283  * @parm[in, out] dev_flow
9284  *   Pointer to the dev_flow.
9285  * @param[out] error
9286  *   pointer to error structure.
9287  *
9288  * @return
9289  *   0 on success otherwise -errno and errno is set.
9290  */
9291
9292 int
9293 flow_dev_geneve_tlv_option_resource_register(struct rte_eth_dev *dev,
9294                                              const struct rte_flow_item *item,
9295                                              struct rte_flow_error *error)
9296 {
9297         struct mlx5_priv *priv = dev->data->dev_private;
9298         struct mlx5_dev_ctx_shared *sh = priv->sh;
9299         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
9300                         sh->geneve_tlv_option_resource;
9301         struct mlx5_devx_obj *obj;
9302         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9303         int ret = 0;
9304
9305         if (!geneve_opt_v)
9306                 return -1;
9307         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
9308         if (geneve_opt_resource != NULL) {
9309                 if (geneve_opt_resource->option_class ==
9310                         geneve_opt_v->option_class &&
9311                         geneve_opt_resource->option_type ==
9312                         geneve_opt_v->option_type &&
9313                         geneve_opt_resource->length ==
9314                         geneve_opt_v->option_len) {
9315                         /* We already have GENEVE TLV option obj allocated. */
9316                         __atomic_fetch_add(&geneve_opt_resource->refcnt, 1,
9317                                            __ATOMIC_RELAXED);
9318                 } else {
9319                         ret = rte_flow_error_set(error, ENOMEM,
9320                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9321                                 "Only one GENEVE TLV option supported");
9322                         goto exit;
9323                 }
9324         } else {
9325                 /* Create a GENEVE TLV object and resource. */
9326                 obj = mlx5_devx_cmd_create_geneve_tlv_option(sh->cdev->ctx,
9327                                 geneve_opt_v->option_class,
9328                                 geneve_opt_v->option_type,
9329                                 geneve_opt_v->option_len);
9330                 if (!obj) {
9331                         ret = rte_flow_error_set(error, ENODATA,
9332                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9333                                 "Failed to create GENEVE TLV Devx object");
9334                         goto exit;
9335                 }
9336                 sh->geneve_tlv_option_resource =
9337                                 mlx5_malloc(MLX5_MEM_ZERO,
9338                                                 sizeof(*geneve_opt_resource),
9339                                                 0, SOCKET_ID_ANY);
9340                 if (!sh->geneve_tlv_option_resource) {
9341                         claim_zero(mlx5_devx_cmd_destroy(obj));
9342                         ret = rte_flow_error_set(error, ENOMEM,
9343                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
9344                                 "GENEVE TLV object memory allocation failed");
9345                         goto exit;
9346                 }
9347                 geneve_opt_resource = sh->geneve_tlv_option_resource;
9348                 geneve_opt_resource->obj = obj;
9349                 geneve_opt_resource->option_class = geneve_opt_v->option_class;
9350                 geneve_opt_resource->option_type = geneve_opt_v->option_type;
9351                 geneve_opt_resource->length = geneve_opt_v->option_len;
9352                 __atomic_store_n(&geneve_opt_resource->refcnt, 1,
9353                                 __ATOMIC_RELAXED);
9354         }
9355 exit:
9356         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
9357         return ret;
9358 }
9359
9360 /**
9361  * Add Geneve TLV option item to matcher.
9362  *
9363  * @param[in, out] dev
9364  *   Pointer to rte_eth_dev structure.
9365  * @param[in, out] matcher
9366  *   Flow matcher.
9367  * @param[in, out] key
9368  *   Flow matcher value.
9369  * @param[in] item
9370  *   Flow pattern to translate.
9371  * @param[out] error
9372  *   Pointer to error structure.
9373  */
9374 static int
9375 flow_dv_translate_item_geneve_opt(struct rte_eth_dev *dev, void *matcher,
9376                                   void *key, const struct rte_flow_item *item,
9377                                   struct rte_flow_error *error)
9378 {
9379         const struct rte_flow_item_geneve_opt *geneve_opt_m = item->mask;
9380         const struct rte_flow_item_geneve_opt *geneve_opt_v = item->spec;
9381         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9382         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9383         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9384                         misc_parameters_3);
9385         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9386         rte_be32_t opt_data_key = 0, opt_data_mask = 0;
9387         int ret = 0;
9388
9389         if (!geneve_opt_v)
9390                 return -1;
9391         if (!geneve_opt_m)
9392                 geneve_opt_m = &rte_flow_item_geneve_opt_mask;
9393         ret = flow_dev_geneve_tlv_option_resource_register(dev, item,
9394                                                            error);
9395         if (ret) {
9396                 DRV_LOG(ERR, "Failed to create geneve_tlv_obj");
9397                 return ret;
9398         }
9399         /*
9400          * Set the option length in GENEVE header if not requested.
9401          * The GENEVE TLV option length is expressed by the option length field
9402          * in the GENEVE header.
9403          * If the option length was not requested but the GENEVE TLV option item
9404          * is present we set the option length field implicitly.
9405          */
9406         if (!MLX5_GET16(fte_match_set_misc, misc_m, geneve_opt_len)) {
9407                 MLX5_SET(fte_match_set_misc, misc_m, geneve_opt_len,
9408                          MLX5_GENEVE_OPTLEN_MASK);
9409                 MLX5_SET(fte_match_set_misc, misc_v, geneve_opt_len,
9410                          geneve_opt_v->option_len + 1);
9411         }
9412         MLX5_SET(fte_match_set_misc, misc_m, geneve_tlv_option_0_exist, 1);
9413         MLX5_SET(fte_match_set_misc, misc_v, geneve_tlv_option_0_exist, 1);
9414         /* Set the data. */
9415         if (geneve_opt_v->data) {
9416                 memcpy(&opt_data_key, geneve_opt_v->data,
9417                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9418                                 sizeof(opt_data_key)));
9419                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9420                                 sizeof(opt_data_key));
9421                 memcpy(&opt_data_mask, geneve_opt_m->data,
9422                         RTE_MIN((uint32_t)(geneve_opt_v->option_len * 4),
9423                                 sizeof(opt_data_mask)));
9424                 MLX5_ASSERT((uint32_t)(geneve_opt_v->option_len * 4) <=
9425                                 sizeof(opt_data_mask));
9426                 MLX5_SET(fte_match_set_misc3, misc3_m,
9427                                 geneve_tlv_option_0_data,
9428                                 rte_be_to_cpu_32(opt_data_mask));
9429                 MLX5_SET(fte_match_set_misc3, misc3_v,
9430                                 geneve_tlv_option_0_data,
9431                         rte_be_to_cpu_32(opt_data_key & opt_data_mask));
9432         }
9433         return ret;
9434 }
9435
9436 /**
9437  * Add MPLS item to matcher and to the value.
9438  *
9439  * @param[in, out] matcher
9440  *   Flow matcher.
9441  * @param[in, out] key
9442  *   Flow matcher value.
9443  * @param[in] item
9444  *   Flow pattern to translate.
9445  * @param[in] prev_layer
9446  *   The protocol layer indicated in previous item.
9447  * @param[in] inner
9448  *   Item is inner pattern.
9449  */
9450 static void
9451 flow_dv_translate_item_mpls(void *matcher, void *key,
9452                             const struct rte_flow_item *item,
9453                             uint64_t prev_layer,
9454                             int inner)
9455 {
9456         const uint32_t *in_mpls_m = item->mask;
9457         const uint32_t *in_mpls_v = item->spec;
9458         uint32_t *out_mpls_m = 0;
9459         uint32_t *out_mpls_v = 0;
9460         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9461         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9462         void *misc2_m = MLX5_ADDR_OF(fte_match_param, matcher,
9463                                      misc_parameters_2);
9464         void *misc2_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9465         void *headers_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
9466         void *headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9467
9468         switch (prev_layer) {
9469         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9470                 if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
9471                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport,
9472                                  0xffff);
9473                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport,
9474                                  MLX5_UDP_PORT_MPLS);
9475                 }
9476                 break;
9477         case MLX5_FLOW_LAYER_GRE:
9478                 /* Fall-through. */
9479         case MLX5_FLOW_LAYER_GRE_KEY:
9480                 if (!MLX5_GET16(fte_match_set_misc, misc_v, gre_protocol)) {
9481                         MLX5_SET(fte_match_set_misc, misc_m, gre_protocol,
9482                                  0xffff);
9483                         MLX5_SET(fte_match_set_misc, misc_v, gre_protocol,
9484                                  RTE_ETHER_TYPE_MPLS);
9485                 }
9486                 break;
9487         default:
9488                 break;
9489         }
9490         if (!in_mpls_v)
9491                 return;
9492         if (!in_mpls_m)
9493                 in_mpls_m = (const uint32_t *)&rte_flow_item_mpls_mask;
9494         switch (prev_layer) {
9495         case MLX5_FLOW_LAYER_OUTER_L4_UDP:
9496                 out_mpls_m =
9497                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9498                                                  outer_first_mpls_over_udp);
9499                 out_mpls_v =
9500                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9501                                                  outer_first_mpls_over_udp);
9502                 break;
9503         case MLX5_FLOW_LAYER_GRE:
9504                 out_mpls_m =
9505                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_m,
9506                                                  outer_first_mpls_over_gre);
9507                 out_mpls_v =
9508                         (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2, misc2_v,
9509                                                  outer_first_mpls_over_gre);
9510                 break;
9511         default:
9512                 /* Inner MPLS not over GRE is not supported. */
9513                 if (!inner) {
9514                         out_mpls_m =
9515                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9516                                                          misc2_m,
9517                                                          outer_first_mpls);
9518                         out_mpls_v =
9519                                 (uint32_t *)MLX5_ADDR_OF(fte_match_set_misc2,
9520                                                          misc2_v,
9521                                                          outer_first_mpls);
9522                 }
9523                 break;
9524         }
9525         if (out_mpls_m && out_mpls_v) {
9526                 *out_mpls_m = *in_mpls_m;
9527                 *out_mpls_v = *in_mpls_v & *in_mpls_m;
9528         }
9529 }
9530
9531 /**
9532  * Add metadata register item to matcher
9533  *
9534  * @param[in, out] matcher
9535  *   Flow matcher.
9536  * @param[in, out] key
9537  *   Flow matcher value.
9538  * @param[in] reg_type
9539  *   Type of device metadata register
9540  * @param[in] value
9541  *   Register value
9542  * @param[in] mask
9543  *   Register mask
9544  */
9545 static void
9546 flow_dv_match_meta_reg(void *matcher, void *key,
9547                        enum modify_reg reg_type,
9548                        uint32_t data, uint32_t mask)
9549 {
9550         void *misc2_m =
9551                 MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters_2);
9552         void *misc2_v =
9553                 MLX5_ADDR_OF(fte_match_param, key, misc_parameters_2);
9554         uint32_t temp;
9555
9556         data &= mask;
9557         switch (reg_type) {
9558         case REG_A:
9559                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_a, mask);
9560                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_a, data);
9561                 break;
9562         case REG_B:
9563                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_b, mask);
9564                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_b, data);
9565                 break;
9566         case REG_C_0:
9567                 /*
9568                  * The metadata register C0 field might be divided into
9569                  * source vport index and META item value, we should set
9570                  * this field according to specified mask, not as whole one.
9571                  */
9572                 temp = MLX5_GET(fte_match_set_misc2, misc2_m, metadata_reg_c_0);
9573                 temp |= mask;
9574                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_0, temp);
9575                 temp = MLX5_GET(fte_match_set_misc2, misc2_v, metadata_reg_c_0);
9576                 temp &= ~mask;
9577                 temp |= data;
9578                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_0, temp);
9579                 break;
9580         case REG_C_1:
9581                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_1, mask);
9582                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_1, data);
9583                 break;
9584         case REG_C_2:
9585                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_2, mask);
9586                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_2, data);
9587                 break;
9588         case REG_C_3:
9589                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_3, mask);
9590                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_3, data);
9591                 break;
9592         case REG_C_4:
9593                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_4, mask);
9594                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_4, data);
9595                 break;
9596         case REG_C_5:
9597                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_5, mask);
9598                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_5, data);
9599                 break;
9600         case REG_C_6:
9601                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_6, mask);
9602                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_6, data);
9603                 break;
9604         case REG_C_7:
9605                 MLX5_SET(fte_match_set_misc2, misc2_m, metadata_reg_c_7, mask);
9606                 MLX5_SET(fte_match_set_misc2, misc2_v, metadata_reg_c_7, data);
9607                 break;
9608         default:
9609                 MLX5_ASSERT(false);
9610                 break;
9611         }
9612 }
9613
9614 /**
9615  * Add MARK item to matcher
9616  *
9617  * @param[in] dev
9618  *   The device to configure through.
9619  * @param[in, out] matcher
9620  *   Flow matcher.
9621  * @param[in, out] key
9622  *   Flow matcher value.
9623  * @param[in] item
9624  *   Flow pattern to translate.
9625  */
9626 static void
9627 flow_dv_translate_item_mark(struct rte_eth_dev *dev,
9628                             void *matcher, void *key,
9629                             const struct rte_flow_item *item)
9630 {
9631         struct mlx5_priv *priv = dev->data->dev_private;
9632         const struct rte_flow_item_mark *mark;
9633         uint32_t value;
9634         uint32_t mask;
9635
9636         mark = item->mask ? (const void *)item->mask :
9637                             &rte_flow_item_mark_mask;
9638         mask = mark->id & priv->sh->dv_mark_mask;
9639         mark = (const void *)item->spec;
9640         MLX5_ASSERT(mark);
9641         value = mark->id & priv->sh->dv_mark_mask & mask;
9642         if (mask) {
9643                 enum modify_reg reg;
9644
9645                 /* Get the metadata register index for the mark. */
9646                 reg = mlx5_flow_get_reg_id(dev, MLX5_FLOW_MARK, 0, NULL);
9647                 MLX5_ASSERT(reg > 0);
9648                 if (reg == REG_C_0) {
9649                         struct mlx5_priv *priv = dev->data->dev_private;
9650                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9651                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9652
9653                         mask &= msk_c0;
9654                         mask <<= shl_c0;
9655                         value <<= shl_c0;
9656                 }
9657                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9658         }
9659 }
9660
9661 /**
9662  * Add META item to matcher
9663  *
9664  * @param[in] dev
9665  *   The devich to configure through.
9666  * @param[in, out] matcher
9667  *   Flow matcher.
9668  * @param[in, out] key
9669  *   Flow matcher value.
9670  * @param[in] attr
9671  *   Attributes of flow that includes this item.
9672  * @param[in] item
9673  *   Flow pattern to translate.
9674  */
9675 static void
9676 flow_dv_translate_item_meta(struct rte_eth_dev *dev,
9677                             void *matcher, void *key,
9678                             const struct rte_flow_attr *attr,
9679                             const struct rte_flow_item *item)
9680 {
9681         const struct rte_flow_item_meta *meta_m;
9682         const struct rte_flow_item_meta *meta_v;
9683
9684         meta_m = (const void *)item->mask;
9685         if (!meta_m)
9686                 meta_m = &rte_flow_item_meta_mask;
9687         meta_v = (const void *)item->spec;
9688         if (meta_v) {
9689                 int reg;
9690                 uint32_t value = meta_v->data;
9691                 uint32_t mask = meta_m->data;
9692
9693                 reg = flow_dv_get_metadata_reg(dev, attr, NULL);
9694                 if (reg < 0)
9695                         return;
9696                 MLX5_ASSERT(reg != REG_NON);
9697                 if (reg == REG_C_0) {
9698                         struct mlx5_priv *priv = dev->data->dev_private;
9699                         uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9700                         uint32_t shl_c0 = rte_bsf32(msk_c0);
9701
9702                         mask &= msk_c0;
9703                         mask <<= shl_c0;
9704                         value <<= shl_c0;
9705                 }
9706                 flow_dv_match_meta_reg(matcher, key, reg, value, mask);
9707         }
9708 }
9709
9710 /**
9711  * Add vport metadata Reg C0 item to matcher
9712  *
9713  * @param[in, out] matcher
9714  *   Flow matcher.
9715  * @param[in, out] key
9716  *   Flow matcher value.
9717  * @param[in] reg
9718  *   Flow pattern to translate.
9719  */
9720 static void
9721 flow_dv_translate_item_meta_vport(void *matcher, void *key,
9722                                   uint32_t value, uint32_t mask)
9723 {
9724         flow_dv_match_meta_reg(matcher, key, REG_C_0, value, mask);
9725 }
9726
9727 /**
9728  * Add tag item to matcher
9729  *
9730  * @param[in] dev
9731  *   The devich to configure through.
9732  * @param[in, out] matcher
9733  *   Flow matcher.
9734  * @param[in, out] key
9735  *   Flow matcher value.
9736  * @param[in] item
9737  *   Flow pattern to translate.
9738  */
9739 static void
9740 flow_dv_translate_mlx5_item_tag(struct rte_eth_dev *dev,
9741                                 void *matcher, void *key,
9742                                 const struct rte_flow_item *item)
9743 {
9744         const struct mlx5_rte_flow_item_tag *tag_v = item->spec;
9745         const struct mlx5_rte_flow_item_tag *tag_m = item->mask;
9746         uint32_t mask, value;
9747
9748         MLX5_ASSERT(tag_v);
9749         value = tag_v->data;
9750         mask = tag_m ? tag_m->data : UINT32_MAX;
9751         if (tag_v->id == REG_C_0) {
9752                 struct mlx5_priv *priv = dev->data->dev_private;
9753                 uint32_t msk_c0 = priv->sh->dv_regc0_mask;
9754                 uint32_t shl_c0 = rte_bsf32(msk_c0);
9755
9756                 mask &= msk_c0;
9757                 mask <<= shl_c0;
9758                 value <<= shl_c0;
9759         }
9760         flow_dv_match_meta_reg(matcher, key, tag_v->id, value, mask);
9761 }
9762
9763 /**
9764  * Add TAG item to matcher
9765  *
9766  * @param[in] dev
9767  *   The devich to configure through.
9768  * @param[in, out] matcher
9769  *   Flow matcher.
9770  * @param[in, out] key
9771  *   Flow matcher value.
9772  * @param[in] item
9773  *   Flow pattern to translate.
9774  */
9775 static void
9776 flow_dv_translate_item_tag(struct rte_eth_dev *dev,
9777                            void *matcher, void *key,
9778                            const struct rte_flow_item *item)
9779 {
9780         const struct rte_flow_item_tag *tag_v = item->spec;
9781         const struct rte_flow_item_tag *tag_m = item->mask;
9782         enum modify_reg reg;
9783
9784         MLX5_ASSERT(tag_v);
9785         tag_m = tag_m ? tag_m : &rte_flow_item_tag_mask;
9786         /* Get the metadata register index for the tag. */
9787         reg = mlx5_flow_get_reg_id(dev, MLX5_APP_TAG, tag_v->index, NULL);
9788         MLX5_ASSERT(reg > 0);
9789         flow_dv_match_meta_reg(matcher, key, reg, tag_v->data, tag_m->data);
9790 }
9791
9792 /**
9793  * Add source vport match to the specified matcher.
9794  *
9795  * @param[in, out] matcher
9796  *   Flow matcher.
9797  * @param[in, out] key
9798  *   Flow matcher value.
9799  * @param[in] port
9800  *   Source vport value to match
9801  * @param[in] mask
9802  *   Mask
9803  */
9804 static void
9805 flow_dv_translate_item_source_vport(void *matcher, void *key,
9806                                     int16_t port, uint16_t mask)
9807 {
9808         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
9809         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
9810
9811         MLX5_SET(fte_match_set_misc, misc_m, source_port, mask);
9812         MLX5_SET(fte_match_set_misc, misc_v, source_port, port);
9813 }
9814
9815 /**
9816  * Translate port-id item to eswitch match on  port-id.
9817  *
9818  * @param[in] dev
9819  *   The devich to configure through.
9820  * @param[in, out] matcher
9821  *   Flow matcher.
9822  * @param[in, out] key
9823  *   Flow matcher value.
9824  * @param[in] item
9825  *   Flow pattern to translate.
9826  * @param[in]
9827  *   Flow attributes.
9828  *
9829  * @return
9830  *   0 on success, a negative errno value otherwise.
9831  */
9832 static int
9833 flow_dv_translate_item_port_id(struct rte_eth_dev *dev, void *matcher,
9834                                void *key, const struct rte_flow_item *item,
9835                                const struct rte_flow_attr *attr)
9836 {
9837         const struct rte_flow_item_port_id *pid_m = item ? item->mask : NULL;
9838         const struct rte_flow_item_port_id *pid_v = item ? item->spec : NULL;
9839         struct mlx5_priv *priv;
9840         uint16_t mask, id;
9841
9842         if (pid_v && pid_v->id == MLX5_PORT_ESW_MGR) {
9843                 flow_dv_translate_item_source_vport(matcher, key,
9844                         flow_dv_get_esw_manager_vport_id(dev), 0xffff);
9845                 return 0;
9846         }
9847         mask = pid_m ? pid_m->id : 0xffff;
9848         id = pid_v ? pid_v->id : dev->data->port_id;
9849         priv = mlx5_port_to_eswitch_info(id, item == NULL);
9850         if (!priv)
9851                 return -rte_errno;
9852         /*
9853          * Translate to vport field or to metadata, depending on mode.
9854          * Kernel can use either misc.source_port or half of C0 metadata
9855          * register.
9856          */
9857         if (priv->vport_meta_mask) {
9858                 /*
9859                  * Provide the hint for SW steering library
9860                  * to insert the flow into ingress domain and
9861                  * save the extra vport match.
9862                  */
9863                 if (mask == 0xffff && priv->vport_id == 0xffff &&
9864                     priv->pf_bond < 0 && attr->transfer)
9865                         flow_dv_translate_item_source_vport
9866                                 (matcher, key, priv->vport_id, mask);
9867                 /*
9868                  * We should always set the vport metadata register,
9869                  * otherwise the SW steering library can drop
9870                  * the rule if wire vport metadata value is not zero,
9871                  * it depends on kernel configuration.
9872                  */
9873                 flow_dv_translate_item_meta_vport(matcher, key,
9874                                                   priv->vport_meta_tag,
9875                                                   priv->vport_meta_mask);
9876         } else {
9877                 flow_dv_translate_item_source_vport(matcher, key,
9878                                                     priv->vport_id, mask);
9879         }
9880         return 0;
9881 }
9882
9883 /**
9884  * Add ICMP6 item to matcher and to the value.
9885  *
9886  * @param[in, out] matcher
9887  *   Flow matcher.
9888  * @param[in, out] key
9889  *   Flow matcher value.
9890  * @param[in] item
9891  *   Flow pattern to translate.
9892  * @param[in] inner
9893  *   Item is inner pattern.
9894  */
9895 static void
9896 flow_dv_translate_item_icmp6(void *matcher, void *key,
9897                               const struct rte_flow_item *item,
9898                               int inner)
9899 {
9900         const struct rte_flow_item_icmp6 *icmp6_m = item->mask;
9901         const struct rte_flow_item_icmp6 *icmp6_v = item->spec;
9902         void *headers_m;
9903         void *headers_v;
9904         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9905                                      misc_parameters_3);
9906         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9907         if (inner) {
9908                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9909                                          inner_headers);
9910                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9911         } else {
9912                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9913                                          outer_headers);
9914                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9915         }
9916         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9917         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMPV6);
9918         if (!icmp6_v)
9919                 return;
9920         if (!icmp6_m)
9921                 icmp6_m = &rte_flow_item_icmp6_mask;
9922         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_type, icmp6_m->type);
9923         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_type,
9924                  icmp6_v->type & icmp6_m->type);
9925         MLX5_SET(fte_match_set_misc3, misc3_m, icmpv6_code, icmp6_m->code);
9926         MLX5_SET(fte_match_set_misc3, misc3_v, icmpv6_code,
9927                  icmp6_v->code & icmp6_m->code);
9928 }
9929
9930 /**
9931  * Add ICMP item to matcher and to the value.
9932  *
9933  * @param[in, out] matcher
9934  *   Flow matcher.
9935  * @param[in, out] key
9936  *   Flow matcher value.
9937  * @param[in] item
9938  *   Flow pattern to translate.
9939  * @param[in] inner
9940  *   Item is inner pattern.
9941  */
9942 static void
9943 flow_dv_translate_item_icmp(void *matcher, void *key,
9944                             const struct rte_flow_item *item,
9945                             int inner)
9946 {
9947         const struct rte_flow_item_icmp *icmp_m = item->mask;
9948         const struct rte_flow_item_icmp *icmp_v = item->spec;
9949         uint32_t icmp_header_data_m = 0;
9950         uint32_t icmp_header_data_v = 0;
9951         void *headers_m;
9952         void *headers_v;
9953         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
9954                                      misc_parameters_3);
9955         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
9956         if (inner) {
9957                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9958                                          inner_headers);
9959                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
9960         } else {
9961                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
9962                                          outer_headers);
9963                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
9964         }
9965         MLX5_SET(fte_match_set_lyr_2_4, headers_m, ip_protocol, 0xFF);
9966         MLX5_SET(fte_match_set_lyr_2_4, headers_v, ip_protocol, IPPROTO_ICMP);
9967         if (!icmp_v)
9968                 return;
9969         if (!icmp_m)
9970                 icmp_m = &rte_flow_item_icmp_mask;
9971         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_type,
9972                  icmp_m->hdr.icmp_type);
9973         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_type,
9974                  icmp_v->hdr.icmp_type & icmp_m->hdr.icmp_type);
9975         MLX5_SET(fte_match_set_misc3, misc3_m, icmp_code,
9976                  icmp_m->hdr.icmp_code);
9977         MLX5_SET(fte_match_set_misc3, misc3_v, icmp_code,
9978                  icmp_v->hdr.icmp_code & icmp_m->hdr.icmp_code);
9979         icmp_header_data_m = rte_be_to_cpu_16(icmp_m->hdr.icmp_seq_nb);
9980         icmp_header_data_m |= rte_be_to_cpu_16(icmp_m->hdr.icmp_ident) << 16;
9981         if (icmp_header_data_m) {
9982                 icmp_header_data_v = rte_be_to_cpu_16(icmp_v->hdr.icmp_seq_nb);
9983                 icmp_header_data_v |=
9984                          rte_be_to_cpu_16(icmp_v->hdr.icmp_ident) << 16;
9985                 MLX5_SET(fte_match_set_misc3, misc3_m, icmp_header_data,
9986                          icmp_header_data_m);
9987                 MLX5_SET(fte_match_set_misc3, misc3_v, icmp_header_data,
9988                          icmp_header_data_v & icmp_header_data_m);
9989         }
9990 }
9991
9992 /**
9993  * Add GTP item to matcher and to the value.
9994  *
9995  * @param[in, out] matcher
9996  *   Flow matcher.
9997  * @param[in, out] key
9998  *   Flow matcher value.
9999  * @param[in] item
10000  *   Flow pattern to translate.
10001  * @param[in] inner
10002  *   Item is inner pattern.
10003  */
10004 static void
10005 flow_dv_translate_item_gtp(void *matcher, void *key,
10006                            const struct rte_flow_item *item, int inner)
10007 {
10008         const struct rte_flow_item_gtp *gtp_m = item->mask;
10009         const struct rte_flow_item_gtp *gtp_v = item->spec;
10010         void *headers_m;
10011         void *headers_v;
10012         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
10013                                      misc_parameters_3);
10014         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
10015         uint16_t dport = RTE_GTPU_UDP_PORT;
10016
10017         if (inner) {
10018                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
10019                                          inner_headers);
10020                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
10021         } else {
10022                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
10023                                          outer_headers);
10024                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
10025         }
10026         if (!MLX5_GET16(fte_match_set_lyr_2_4, headers_v, udp_dport)) {
10027                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, udp_dport, 0xFFFF);
10028                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, udp_dport, dport);
10029         }
10030         if (!gtp_v)
10031                 return;
10032         if (!gtp_m)
10033                 gtp_m = &rte_flow_item_gtp_mask;
10034         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags,
10035                  gtp_m->v_pt_rsv_flags);
10036         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags,
10037                  gtp_v->v_pt_rsv_flags & gtp_m->v_pt_rsv_flags);
10038         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_type, gtp_m->msg_type);
10039         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_type,
10040                  gtp_v->msg_type & gtp_m->msg_type);
10041         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_teid,
10042                  rte_be_to_cpu_32(gtp_m->teid));
10043         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_teid,
10044                  rte_be_to_cpu_32(gtp_v->teid & gtp_m->teid));
10045 }
10046
10047 /**
10048  * Add GTP PSC item to matcher.
10049  *
10050  * @param[in, out] matcher
10051  *   Flow matcher.
10052  * @param[in, out] key
10053  *   Flow matcher value.
10054  * @param[in] item
10055  *   Flow pattern to translate.
10056  */
10057 static int
10058 flow_dv_translate_item_gtp_psc(void *matcher, void *key,
10059                                const struct rte_flow_item *item)
10060 {
10061         const struct rte_flow_item_gtp_psc *gtp_psc_m = item->mask;
10062         const struct rte_flow_item_gtp_psc *gtp_psc_v = item->spec;
10063         void *misc3_m = MLX5_ADDR_OF(fte_match_param, matcher,
10064                         misc_parameters_3);
10065         void *misc3_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_3);
10066         union {
10067                 uint32_t w32;
10068                 struct {
10069                         uint16_t seq_num;
10070                         uint8_t npdu_num;
10071                         uint8_t next_ext_header_type;
10072                 };
10073         } dw_2;
10074         uint8_t gtp_flags;
10075
10076         /* Always set E-flag match on one, regardless of GTP item settings. */
10077         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_m, gtpu_msg_flags);
10078         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
10079         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_msg_flags, gtp_flags);
10080         gtp_flags = MLX5_GET(fte_match_set_misc3, misc3_v, gtpu_msg_flags);
10081         gtp_flags |= MLX5_GTP_EXT_HEADER_FLAG;
10082         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_msg_flags, gtp_flags);
10083         /*Set next extension header type. */
10084         dw_2.seq_num = 0;
10085         dw_2.npdu_num = 0;
10086         dw_2.next_ext_header_type = 0xff;
10087         MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_dw_2,
10088                  rte_cpu_to_be_32(dw_2.w32));
10089         dw_2.seq_num = 0;
10090         dw_2.npdu_num = 0;
10091         dw_2.next_ext_header_type = 0x85;
10092         MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_dw_2,
10093                  rte_cpu_to_be_32(dw_2.w32));
10094         if (gtp_psc_v) {
10095                 union {
10096                         uint32_t w32;
10097                         struct {
10098                                 uint8_t len;
10099                                 uint8_t type_flags;
10100                                 uint8_t qfi;
10101                                 uint8_t reserved;
10102                         };
10103                 } dw_0;
10104
10105                 /*Set extension header PDU type and Qos. */
10106                 if (!gtp_psc_m)
10107                         gtp_psc_m = &rte_flow_item_gtp_psc_mask;
10108                 dw_0.w32 = 0;
10109                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_m->hdr.type);
10110                 dw_0.qfi = gtp_psc_m->hdr.qfi;
10111                 MLX5_SET(fte_match_set_misc3, misc3_m, gtpu_first_ext_dw_0,
10112                          rte_cpu_to_be_32(dw_0.w32));
10113                 dw_0.w32 = 0;
10114                 dw_0.type_flags = MLX5_GTP_PDU_TYPE_SHIFT(gtp_psc_v->hdr.type &
10115                                                         gtp_psc_m->hdr.type);
10116                 dw_0.qfi = gtp_psc_v->hdr.qfi & gtp_psc_m->hdr.qfi;
10117                 MLX5_SET(fte_match_set_misc3, misc3_v, gtpu_first_ext_dw_0,
10118                          rte_cpu_to_be_32(dw_0.w32));
10119         }
10120         return 0;
10121 }
10122
10123 /**
10124  * Add eCPRI item to matcher and to the value.
10125  *
10126  * @param[in] dev
10127  *   The devich to configure through.
10128  * @param[in, out] matcher
10129  *   Flow matcher.
10130  * @param[in, out] key
10131  *   Flow matcher value.
10132  * @param[in] item
10133  *   Flow pattern to translate.
10134  * @param[in] last_item
10135  *   Last item flags.
10136  */
10137 static void
10138 flow_dv_translate_item_ecpri(struct rte_eth_dev *dev, void *matcher,
10139                              void *key, const struct rte_flow_item *item,
10140                              uint64_t last_item)
10141 {
10142         struct mlx5_priv *priv = dev->data->dev_private;
10143         const struct rte_flow_item_ecpri *ecpri_m = item->mask;
10144         const struct rte_flow_item_ecpri *ecpri_v = item->spec;
10145         struct rte_ecpri_common_hdr common;
10146         void *misc4_m = MLX5_ADDR_OF(fte_match_param, matcher,
10147                                      misc_parameters_4);
10148         void *misc4_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters_4);
10149         uint32_t *samples;
10150         void *dw_m;
10151         void *dw_v;
10152
10153         /*
10154          * In case of eCPRI over Ethernet, if EtherType is not specified,
10155          * match on eCPRI EtherType implicitly.
10156          */
10157         if (last_item & MLX5_FLOW_LAYER_OUTER_L2) {
10158                 void *hdrs_m, *hdrs_v, *l2m, *l2v;
10159
10160                 hdrs_m = MLX5_ADDR_OF(fte_match_param, matcher, outer_headers);
10161                 hdrs_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
10162                 l2m = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_m, ethertype);
10163                 l2v = MLX5_ADDR_OF(fte_match_set_lyr_2_4, hdrs_v, ethertype);
10164                 if (*(uint16_t *)l2m == 0 && *(uint16_t *)l2v == 0) {
10165                         *(uint16_t *)l2m = UINT16_MAX;
10166                         *(uint16_t *)l2v = RTE_BE16(RTE_ETHER_TYPE_ECPRI);
10167                 }
10168         }
10169         if (!ecpri_v)
10170                 return;
10171         if (!ecpri_m)
10172                 ecpri_m = &rte_flow_item_ecpri_mask;
10173         /*
10174          * Maximal four DW samples are supported in a single matching now.
10175          * Two are used now for a eCPRI matching:
10176          * 1. Type: one byte, mask should be 0x00ff0000 in network order
10177          * 2. ID of a message: one or two bytes, mask 0xffff0000 or 0xff000000
10178          *    if any.
10179          */
10180         if (!ecpri_m->hdr.common.u32)
10181                 return;
10182         samples = priv->sh->ecpri_parser.ids;
10183         /* Need to take the whole DW as the mask to fill the entry. */
10184         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10185                             prog_sample_field_value_0);
10186         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10187                             prog_sample_field_value_0);
10188         /* Already big endian (network order) in the header. */
10189         *(uint32_t *)dw_m = ecpri_m->hdr.common.u32;
10190         *(uint32_t *)dw_v = ecpri_v->hdr.common.u32 & ecpri_m->hdr.common.u32;
10191         /* Sample#0, used for matching type, offset 0. */
10192         MLX5_SET(fte_match_set_misc4, misc4_m,
10193                  prog_sample_field_id_0, samples[0]);
10194         /* It makes no sense to set the sample ID in the mask field. */
10195         MLX5_SET(fte_match_set_misc4, misc4_v,
10196                  prog_sample_field_id_0, samples[0]);
10197         /*
10198          * Checking if message body part needs to be matched.
10199          * Some wildcard rules only matching type field should be supported.
10200          */
10201         if (ecpri_m->hdr.dummy[0]) {
10202                 common.u32 = rte_be_to_cpu_32(ecpri_v->hdr.common.u32);
10203                 switch (common.type) {
10204                 case RTE_ECPRI_MSG_TYPE_IQ_DATA:
10205                 case RTE_ECPRI_MSG_TYPE_RTC_CTRL:
10206                 case RTE_ECPRI_MSG_TYPE_DLY_MSR:
10207                         dw_m = MLX5_ADDR_OF(fte_match_set_misc4, misc4_m,
10208                                             prog_sample_field_value_1);
10209                         dw_v = MLX5_ADDR_OF(fte_match_set_misc4, misc4_v,
10210                                             prog_sample_field_value_1);
10211                         *(uint32_t *)dw_m = ecpri_m->hdr.dummy[0];
10212                         *(uint32_t *)dw_v = ecpri_v->hdr.dummy[0] &
10213                                             ecpri_m->hdr.dummy[0];
10214                         /* Sample#1, to match message body, offset 4. */
10215                         MLX5_SET(fte_match_set_misc4, misc4_m,
10216                                  prog_sample_field_id_1, samples[1]);
10217                         MLX5_SET(fte_match_set_misc4, misc4_v,
10218                                  prog_sample_field_id_1, samples[1]);
10219                         break;
10220                 default:
10221                         /* Others, do not match any sample ID. */
10222                         break;
10223                 }
10224         }
10225 }
10226
10227 /*
10228  * Add connection tracking status item to matcher
10229  *
10230  * @param[in] dev
10231  *   The devich to configure through.
10232  * @param[in, out] matcher
10233  *   Flow matcher.
10234  * @param[in, out] key
10235  *   Flow matcher value.
10236  * @param[in] item
10237  *   Flow pattern to translate.
10238  */
10239 static void
10240 flow_dv_translate_item_aso_ct(struct rte_eth_dev *dev,
10241                               void *matcher, void *key,
10242                               const struct rte_flow_item *item)
10243 {
10244         uint32_t reg_value = 0;
10245         int reg_id;
10246         /* 8LSB 0b 11/0000/11, middle 4 bits are reserved. */
10247         uint32_t reg_mask = 0;
10248         const struct rte_flow_item_conntrack *spec = item->spec;
10249         const struct rte_flow_item_conntrack *mask = item->mask;
10250         uint32_t flags;
10251         struct rte_flow_error error;
10252
10253         if (!mask)
10254                 mask = &rte_flow_item_conntrack_mask;
10255         if (!spec || !mask->flags)
10256                 return;
10257         flags = spec->flags & mask->flags;
10258         /* The conflict should be checked in the validation. */
10259         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_VALID)
10260                 reg_value |= MLX5_CT_SYNDROME_VALID;
10261         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10262                 reg_value |= MLX5_CT_SYNDROME_STATE_CHANGE;
10263         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_INVALID)
10264                 reg_value |= MLX5_CT_SYNDROME_INVALID;
10265         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED)
10266                 reg_value |= MLX5_CT_SYNDROME_TRAP;
10267         if (flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10268                 reg_value |= MLX5_CT_SYNDROME_BAD_PACKET;
10269         if (mask->flags & (RTE_FLOW_CONNTRACK_PKT_STATE_VALID |
10270                            RTE_FLOW_CONNTRACK_PKT_STATE_INVALID |
10271                            RTE_FLOW_CONNTRACK_PKT_STATE_DISABLED))
10272                 reg_mask |= 0xc0;
10273         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_CHANGED)
10274                 reg_mask |= MLX5_CT_SYNDROME_STATE_CHANGE;
10275         if (mask->flags & RTE_FLOW_CONNTRACK_PKT_STATE_BAD)
10276                 reg_mask |= MLX5_CT_SYNDROME_BAD_PACKET;
10277         /* The REG_C_x value could be saved during startup. */
10278         reg_id = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, &error);
10279         if (reg_id == REG_NON)
10280                 return;
10281         flow_dv_match_meta_reg(matcher, key, (enum modify_reg)reg_id,
10282                                reg_value, reg_mask);
10283 }
10284
10285 static void
10286 flow_dv_translate_item_flex(struct rte_eth_dev *dev, void *matcher, void *key,
10287                             const struct rte_flow_item *item,
10288                             struct mlx5_flow *dev_flow, bool is_inner)
10289 {
10290         const struct rte_flow_item_flex *spec =
10291                 (const struct rte_flow_item_flex *)item->spec;
10292         int index = mlx5_flex_acquire_index(dev, spec->handle, false);
10293
10294         MLX5_ASSERT(index >= 0 && index <= (int)(sizeof(uint32_t) * CHAR_BIT));
10295         if (index < 0)
10296                 return;
10297         if (!(dev_flow->handle->flex_item & RTE_BIT32(index))) {
10298                 /* Don't count both inner and outer flex items in one rule. */
10299                 if (mlx5_flex_acquire_index(dev, spec->handle, true) != index)
10300                         MLX5_ASSERT(false);
10301                 dev_flow->handle->flex_item |= (uint8_t)RTE_BIT32(index);
10302         }
10303         mlx5_flex_flow_translate_item(dev, matcher, key, item, is_inner);
10304 }
10305
10306 static uint32_t matcher_zero[MLX5_ST_SZ_DW(fte_match_param)] = { 0 };
10307
10308 #define HEADER_IS_ZERO(match_criteria, headers)                              \
10309         !(memcmp(MLX5_ADDR_OF(fte_match_param, match_criteria, headers),     \
10310                  matcher_zero, MLX5_FLD_SZ_BYTES(fte_match_param, headers))) \
10311
10312 /**
10313  * Calculate flow matcher enable bitmap.
10314  *
10315  * @param match_criteria
10316  *   Pointer to flow matcher criteria.
10317  *
10318  * @return
10319  *   Bitmap of enabled fields.
10320  */
10321 static uint8_t
10322 flow_dv_matcher_enable(uint32_t *match_criteria)
10323 {
10324         uint8_t match_criteria_enable;
10325
10326         match_criteria_enable =
10327                 (!HEADER_IS_ZERO(match_criteria, outer_headers)) <<
10328                 MLX5_MATCH_CRITERIA_ENABLE_OUTER_BIT;
10329         match_criteria_enable |=
10330                 (!HEADER_IS_ZERO(match_criteria, misc_parameters)) <<
10331                 MLX5_MATCH_CRITERIA_ENABLE_MISC_BIT;
10332         match_criteria_enable |=
10333                 (!HEADER_IS_ZERO(match_criteria, inner_headers)) <<
10334                 MLX5_MATCH_CRITERIA_ENABLE_INNER_BIT;
10335         match_criteria_enable |=
10336                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_2)) <<
10337                 MLX5_MATCH_CRITERIA_ENABLE_MISC2_BIT;
10338         match_criteria_enable |=
10339                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_3)) <<
10340                 MLX5_MATCH_CRITERIA_ENABLE_MISC3_BIT;
10341         match_criteria_enable |=
10342                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_4)) <<
10343                 MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT;
10344         match_criteria_enable |=
10345                 (!HEADER_IS_ZERO(match_criteria, misc_parameters_5)) <<
10346                 MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT;
10347         return match_criteria_enable;
10348 }
10349
10350 static void
10351 __flow_dv_adjust_buf_size(size_t *size, uint8_t match_criteria)
10352 {
10353         /*
10354          * Check flow matching criteria first, subtract misc5/4 length if flow
10355          * doesn't own misc5/4 parameters. In some old rdma-core releases,
10356          * misc5/4 are not supported, and matcher creation failure is expected
10357          * w/o subtraction. If misc5 is provided, misc4 must be counted in since
10358          * misc5 is right after misc4.
10359          */
10360         if (!(match_criteria & (1 << MLX5_MATCH_CRITERIA_ENABLE_MISC5_BIT))) {
10361                 *size = MLX5_ST_SZ_BYTES(fte_match_param) -
10362                         MLX5_ST_SZ_BYTES(fte_match_set_misc5);
10363                 if (!(match_criteria & (1 <<
10364                         MLX5_MATCH_CRITERIA_ENABLE_MISC4_BIT))) {
10365                         *size -= MLX5_ST_SZ_BYTES(fte_match_set_misc4);
10366                 }
10367         }
10368 }
10369
10370 static struct mlx5_list_entry *
10371 flow_dv_matcher_clone_cb(void *tool_ctx __rte_unused,
10372                          struct mlx5_list_entry *entry, void *cb_ctx)
10373 {
10374         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10375         struct mlx5_flow_dv_matcher *ref = ctx->data;
10376         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10377                                                             typeof(*tbl), tbl);
10378         struct mlx5_flow_dv_matcher *resource = mlx5_malloc(MLX5_MEM_ANY,
10379                                                             sizeof(*resource),
10380                                                             0, SOCKET_ID_ANY);
10381
10382         if (!resource) {
10383                 rte_flow_error_set(ctx->error, ENOMEM,
10384                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10385                                    "cannot create matcher");
10386                 return NULL;
10387         }
10388         memcpy(resource, entry, sizeof(*resource));
10389         resource->tbl = &tbl->tbl;
10390         return &resource->entry;
10391 }
10392
10393 static void
10394 flow_dv_matcher_clone_free_cb(void *tool_ctx __rte_unused,
10395                              struct mlx5_list_entry *entry)
10396 {
10397         mlx5_free(entry);
10398 }
10399
10400 struct mlx5_list_entry *
10401 flow_dv_tbl_create_cb(void *tool_ctx, void *cb_ctx)
10402 {
10403         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10404         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10405         struct rte_eth_dev *dev = ctx->dev;
10406         struct mlx5_flow_tbl_data_entry *tbl_data;
10407         struct mlx5_flow_tbl_tunnel_prm *tt_prm = ctx->data2;
10408         struct rte_flow_error *error = ctx->error;
10409         union mlx5_flow_tbl_key key = { .v64 = *(uint64_t *)(ctx->data) };
10410         struct mlx5_flow_tbl_resource *tbl;
10411         void *domain;
10412         uint32_t idx = 0;
10413         int ret;
10414
10415         tbl_data = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10416         if (!tbl_data) {
10417                 rte_flow_error_set(error, ENOMEM,
10418                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10419                                    NULL,
10420                                    "cannot allocate flow table data entry");
10421                 return NULL;
10422         }
10423         tbl_data->idx = idx;
10424         tbl_data->tunnel = tt_prm->tunnel;
10425         tbl_data->group_id = tt_prm->group_id;
10426         tbl_data->external = !!tt_prm->external;
10427         tbl_data->tunnel_offload = is_tunnel_offload_active(dev);
10428         tbl_data->is_egress = !!key.is_egress;
10429         tbl_data->is_transfer = !!key.is_fdb;
10430         tbl_data->dummy = !!key.dummy;
10431         tbl_data->level = key.level;
10432         tbl_data->id = key.id;
10433         tbl = &tbl_data->tbl;
10434         if (key.dummy)
10435                 return &tbl_data->entry;
10436         if (key.is_fdb)
10437                 domain = sh->fdb_domain;
10438         else if (key.is_egress)
10439                 domain = sh->tx_domain;
10440         else
10441                 domain = sh->rx_domain;
10442         ret = mlx5_flow_os_create_flow_tbl(domain, key.level, &tbl->obj);
10443         if (ret) {
10444                 rte_flow_error_set(error, ENOMEM,
10445                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10446                                    NULL, "cannot create flow table object");
10447                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10448                 return NULL;
10449         }
10450         if (key.level != 0) {
10451                 ret = mlx5_flow_os_create_flow_action_dest_flow_tbl
10452                                         (tbl->obj, &tbl_data->jump.action);
10453                 if (ret) {
10454                         rte_flow_error_set(error, ENOMEM,
10455                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10456                                            NULL,
10457                                            "cannot create flow jump action");
10458                         mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10459                         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10460                         return NULL;
10461                 }
10462         }
10463         MKSTR(matcher_name, "%s_%s_%u_%u_matcher_list",
10464               key.is_fdb ? "FDB" : "NIC", key.is_egress ? "egress" : "ingress",
10465               key.level, key.id);
10466         tbl_data->matchers = mlx5_list_create(matcher_name, sh, true,
10467                                               flow_dv_matcher_create_cb,
10468                                               flow_dv_matcher_match_cb,
10469                                               flow_dv_matcher_remove_cb,
10470                                               flow_dv_matcher_clone_cb,
10471                                               flow_dv_matcher_clone_free_cb);
10472         if (!tbl_data->matchers) {
10473                 rte_flow_error_set(error, ENOMEM,
10474                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10475                                    NULL,
10476                                    "cannot create tbl matcher list");
10477                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10478                 mlx5_flow_os_destroy_flow_tbl(tbl->obj);
10479                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], idx);
10480                 return NULL;
10481         }
10482         return &tbl_data->entry;
10483 }
10484
10485 int
10486 flow_dv_tbl_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10487                      void *cb_ctx)
10488 {
10489         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10490         struct mlx5_flow_tbl_data_entry *tbl_data =
10491                 container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10492         union mlx5_flow_tbl_key key = { .v64 =  *(uint64_t *)(ctx->data) };
10493
10494         return tbl_data->level != key.level ||
10495                tbl_data->id != key.id ||
10496                tbl_data->dummy != key.dummy ||
10497                tbl_data->is_transfer != !!key.is_fdb ||
10498                tbl_data->is_egress != !!key.is_egress;
10499 }
10500
10501 struct mlx5_list_entry *
10502 flow_dv_tbl_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10503                       void *cb_ctx)
10504 {
10505         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10506         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10507         struct mlx5_flow_tbl_data_entry *tbl_data;
10508         struct rte_flow_error *error = ctx->error;
10509         uint32_t idx = 0;
10510
10511         tbl_data = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_JUMP], &idx);
10512         if (!tbl_data) {
10513                 rte_flow_error_set(error, ENOMEM,
10514                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10515                                    NULL,
10516                                    "cannot allocate flow table data entry");
10517                 return NULL;
10518         }
10519         memcpy(tbl_data, oentry, sizeof(*tbl_data));
10520         tbl_data->idx = idx;
10521         return &tbl_data->entry;
10522 }
10523
10524 void
10525 flow_dv_tbl_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10526 {
10527         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10528         struct mlx5_flow_tbl_data_entry *tbl_data =
10529                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10530
10531         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10532 }
10533
10534 /**
10535  * Get a flow table.
10536  *
10537  * @param[in, out] dev
10538  *   Pointer to rte_eth_dev structure.
10539  * @param[in] table_level
10540  *   Table level to use.
10541  * @param[in] egress
10542  *   Direction of the table.
10543  * @param[in] transfer
10544  *   E-Switch or NIC flow.
10545  * @param[in] dummy
10546  *   Dummy entry for dv API.
10547  * @param[in] table_id
10548  *   Table id to use.
10549  * @param[out] error
10550  *   pointer to error structure.
10551  *
10552  * @return
10553  *   Returns tables resource based on the index, NULL in case of failed.
10554  */
10555 struct mlx5_flow_tbl_resource *
10556 flow_dv_tbl_resource_get(struct rte_eth_dev *dev,
10557                          uint32_t table_level, uint8_t egress,
10558                          uint8_t transfer,
10559                          bool external,
10560                          const struct mlx5_flow_tunnel *tunnel,
10561                          uint32_t group_id, uint8_t dummy,
10562                          uint32_t table_id,
10563                          struct rte_flow_error *error)
10564 {
10565         struct mlx5_priv *priv = dev->data->dev_private;
10566         union mlx5_flow_tbl_key table_key = {
10567                 {
10568                         .level = table_level,
10569                         .id = table_id,
10570                         .reserved = 0,
10571                         .dummy = !!dummy,
10572                         .is_fdb = !!transfer,
10573                         .is_egress = !!egress,
10574                 }
10575         };
10576         struct mlx5_flow_tbl_tunnel_prm tt_prm = {
10577                 .tunnel = tunnel,
10578                 .group_id = group_id,
10579                 .external = external,
10580         };
10581         struct mlx5_flow_cb_ctx ctx = {
10582                 .dev = dev,
10583                 .error = error,
10584                 .data = &table_key.v64,
10585                 .data2 = &tt_prm,
10586         };
10587         struct mlx5_list_entry *entry;
10588         struct mlx5_flow_tbl_data_entry *tbl_data;
10589
10590         entry = mlx5_hlist_register(priv->sh->flow_tbls, table_key.v64, &ctx);
10591         if (!entry) {
10592                 rte_flow_error_set(error, ENOMEM,
10593                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10594                                    "cannot get table");
10595                 return NULL;
10596         }
10597         DRV_LOG(DEBUG, "table_level %u table_id %u "
10598                 "tunnel %u group %u registered.",
10599                 table_level, table_id,
10600                 tunnel ? tunnel->tunnel_id : 0, group_id);
10601         tbl_data = container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10602         return &tbl_data->tbl;
10603 }
10604
10605 void
10606 flow_dv_tbl_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10607 {
10608         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10609         struct mlx5_flow_tbl_data_entry *tbl_data =
10610                     container_of(entry, struct mlx5_flow_tbl_data_entry, entry);
10611
10612         MLX5_ASSERT(entry && sh);
10613         if (tbl_data->jump.action)
10614                 mlx5_flow_os_destroy_flow_action(tbl_data->jump.action);
10615         if (tbl_data->tbl.obj)
10616                 mlx5_flow_os_destroy_flow_tbl(tbl_data->tbl.obj);
10617         if (tbl_data->tunnel_offload && tbl_data->external) {
10618                 struct mlx5_list_entry *he;
10619                 struct mlx5_hlist *tunnel_grp_hash;
10620                 struct mlx5_flow_tunnel_hub *thub = sh->tunnel_hub;
10621                 union tunnel_tbl_key tunnel_key = {
10622                         .tunnel_id = tbl_data->tunnel ?
10623                                         tbl_data->tunnel->tunnel_id : 0,
10624                         .group = tbl_data->group_id
10625                 };
10626                 uint32_t table_level = tbl_data->level;
10627                 struct mlx5_flow_cb_ctx ctx = {
10628                         .data = (void *)&tunnel_key.val,
10629                 };
10630
10631                 tunnel_grp_hash = tbl_data->tunnel ?
10632                                         tbl_data->tunnel->groups :
10633                                         thub->groups;
10634                 he = mlx5_hlist_lookup(tunnel_grp_hash, tunnel_key.val, &ctx);
10635                 if (he)
10636                         mlx5_hlist_unregister(tunnel_grp_hash, he);
10637                 DRV_LOG(DEBUG,
10638                         "table_level %u id %u tunnel %u group %u released.",
10639                         table_level,
10640                         tbl_data->id,
10641                         tbl_data->tunnel ?
10642                         tbl_data->tunnel->tunnel_id : 0,
10643                         tbl_data->group_id);
10644         }
10645         if (tbl_data->matchers)
10646                 mlx5_list_destroy(tbl_data->matchers);
10647         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_JUMP], tbl_data->idx);
10648 }
10649
10650 /**
10651  * Release a flow table.
10652  *
10653  * @param[in] sh
10654  *   Pointer to device shared structure.
10655  * @param[in] tbl
10656  *   Table resource to be released.
10657  *
10658  * @return
10659  *   Returns 0 if table was released, else return 1;
10660  */
10661 static int
10662 flow_dv_tbl_resource_release(struct mlx5_dev_ctx_shared *sh,
10663                              struct mlx5_flow_tbl_resource *tbl)
10664 {
10665         struct mlx5_flow_tbl_data_entry *tbl_data =
10666                 container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10667
10668         if (!tbl)
10669                 return 0;
10670         return mlx5_hlist_unregister(sh->flow_tbls, &tbl_data->entry);
10671 }
10672
10673 int
10674 flow_dv_matcher_match_cb(void *tool_ctx __rte_unused,
10675                          struct mlx5_list_entry *entry, void *cb_ctx)
10676 {
10677         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10678         struct mlx5_flow_dv_matcher *ref = ctx->data;
10679         struct mlx5_flow_dv_matcher *cur = container_of(entry, typeof(*cur),
10680                                                         entry);
10681
10682         return cur->crc != ref->crc ||
10683                cur->priority != ref->priority ||
10684                memcmp((const void *)cur->mask.buf,
10685                       (const void *)ref->mask.buf, ref->mask.size);
10686 }
10687
10688 struct mlx5_list_entry *
10689 flow_dv_matcher_create_cb(void *tool_ctx, void *cb_ctx)
10690 {
10691         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10692         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10693         struct mlx5_flow_dv_matcher *ref = ctx->data;
10694         struct mlx5_flow_dv_matcher *resource;
10695         struct mlx5dv_flow_matcher_attr dv_attr = {
10696                 .type = IBV_FLOW_ATTR_NORMAL,
10697                 .match_mask = (void *)&ref->mask,
10698         };
10699         struct mlx5_flow_tbl_data_entry *tbl = container_of(ref->tbl,
10700                                                             typeof(*tbl), tbl);
10701         int ret;
10702
10703         resource = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*resource), 0,
10704                                SOCKET_ID_ANY);
10705         if (!resource) {
10706                 rte_flow_error_set(ctx->error, ENOMEM,
10707                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10708                                    "cannot create matcher");
10709                 return NULL;
10710         }
10711         *resource = *ref;
10712         dv_attr.match_criteria_enable =
10713                 flow_dv_matcher_enable(resource->mask.buf);
10714         __flow_dv_adjust_buf_size(&ref->mask.size,
10715                                   dv_attr.match_criteria_enable);
10716         dv_attr.priority = ref->priority;
10717         if (tbl->is_egress)
10718                 dv_attr.flags |= IBV_FLOW_ATTR_FLAGS_EGRESS;
10719         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
10720                                                tbl->tbl.obj,
10721                                                &resource->matcher_object);
10722         if (ret) {
10723                 mlx5_free(resource);
10724                 rte_flow_error_set(ctx->error, ENOMEM,
10725                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10726                                    "cannot create matcher");
10727                 return NULL;
10728         }
10729         return &resource->entry;
10730 }
10731
10732 /**
10733  * Register the flow matcher.
10734  *
10735  * @param[in, out] dev
10736  *   Pointer to rte_eth_dev structure.
10737  * @param[in, out] matcher
10738  *   Pointer to flow matcher.
10739  * @param[in, out] key
10740  *   Pointer to flow table key.
10741  * @parm[in, out] dev_flow
10742  *   Pointer to the dev_flow.
10743  * @param[out] error
10744  *   pointer to error structure.
10745  *
10746  * @return
10747  *   0 on success otherwise -errno and errno is set.
10748  */
10749 static int
10750 flow_dv_matcher_register(struct rte_eth_dev *dev,
10751                          struct mlx5_flow_dv_matcher *ref,
10752                          union mlx5_flow_tbl_key *key,
10753                          struct mlx5_flow *dev_flow,
10754                          const struct mlx5_flow_tunnel *tunnel,
10755                          uint32_t group_id,
10756                          struct rte_flow_error *error)
10757 {
10758         struct mlx5_list_entry *entry;
10759         struct mlx5_flow_dv_matcher *resource;
10760         struct mlx5_flow_tbl_resource *tbl;
10761         struct mlx5_flow_tbl_data_entry *tbl_data;
10762         struct mlx5_flow_cb_ctx ctx = {
10763                 .error = error,
10764                 .data = ref,
10765         };
10766         /**
10767          * tunnel offload API requires this registration for cases when
10768          * tunnel match rule was inserted before tunnel set rule.
10769          */
10770         tbl = flow_dv_tbl_resource_get(dev, key->level,
10771                                        key->is_egress, key->is_fdb,
10772                                        dev_flow->external, tunnel,
10773                                        group_id, 0, key->id, error);
10774         if (!tbl)
10775                 return -rte_errno;      /* No need to refill the error info */
10776         tbl_data = container_of(tbl, struct mlx5_flow_tbl_data_entry, tbl);
10777         ref->tbl = tbl;
10778         entry = mlx5_list_register(tbl_data->matchers, &ctx);
10779         if (!entry) {
10780                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
10781                 return rte_flow_error_set(error, ENOMEM,
10782                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10783                                           "cannot allocate ref memory");
10784         }
10785         resource = container_of(entry, typeof(*resource), entry);
10786         dev_flow->handle->dvh.matcher = resource;
10787         return 0;
10788 }
10789
10790 struct mlx5_list_entry *
10791 flow_dv_tag_create_cb(void *tool_ctx, void *cb_ctx)
10792 {
10793         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10794         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10795         struct mlx5_flow_dv_tag_resource *entry;
10796         uint32_t idx = 0;
10797         int ret;
10798
10799         entry = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10800         if (!entry) {
10801                 rte_flow_error_set(ctx->error, ENOMEM,
10802                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10803                                    "cannot allocate resource memory");
10804                 return NULL;
10805         }
10806         entry->idx = idx;
10807         entry->tag_id = *(uint32_t *)(ctx->data);
10808         ret = mlx5_flow_os_create_flow_action_tag(entry->tag_id,
10809                                                   &entry->action);
10810         if (ret) {
10811                 mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], idx);
10812                 rte_flow_error_set(ctx->error, ENOMEM,
10813                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
10814                                    NULL, "cannot create action");
10815                 return NULL;
10816         }
10817         return &entry->entry;
10818 }
10819
10820 int
10821 flow_dv_tag_match_cb(void *tool_ctx __rte_unused, struct mlx5_list_entry *entry,
10822                      void *cb_ctx)
10823 {
10824         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10825         struct mlx5_flow_dv_tag_resource *tag =
10826                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10827
10828         return *(uint32_t *)(ctx->data) != tag->tag_id;
10829 }
10830
10831 struct mlx5_list_entry *
10832 flow_dv_tag_clone_cb(void *tool_ctx, struct mlx5_list_entry *oentry,
10833                      void *cb_ctx)
10834 {
10835         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10836         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
10837         struct mlx5_flow_dv_tag_resource *entry;
10838         uint32_t idx = 0;
10839
10840         entry = mlx5_ipool_malloc(sh->ipool[MLX5_IPOOL_TAG], &idx);
10841         if (!entry) {
10842                 rte_flow_error_set(ctx->error, ENOMEM,
10843                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
10844                                    "cannot allocate tag resource memory");
10845                 return NULL;
10846         }
10847         memcpy(entry, oentry, sizeof(*entry));
10848         entry->idx = idx;
10849         return &entry->entry;
10850 }
10851
10852 void
10853 flow_dv_tag_clone_free_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10854 {
10855         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10856         struct mlx5_flow_dv_tag_resource *tag =
10857                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10858
10859         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10860 }
10861
10862 /**
10863  * Find existing tag resource or create and register a new one.
10864  *
10865  * @param dev[in, out]
10866  *   Pointer to rte_eth_dev structure.
10867  * @param[in, out] tag_be24
10868  *   Tag value in big endian then R-shift 8.
10869  * @parm[in, out] dev_flow
10870  *   Pointer to the dev_flow.
10871  * @param[out] error
10872  *   pointer to error structure.
10873  *
10874  * @return
10875  *   0 on success otherwise -errno and errno is set.
10876  */
10877 static int
10878 flow_dv_tag_resource_register
10879                         (struct rte_eth_dev *dev,
10880                          uint32_t tag_be24,
10881                          struct mlx5_flow *dev_flow,
10882                          struct rte_flow_error *error)
10883 {
10884         struct mlx5_priv *priv = dev->data->dev_private;
10885         struct mlx5_flow_dv_tag_resource *resource;
10886         struct mlx5_list_entry *entry;
10887         struct mlx5_flow_cb_ctx ctx = {
10888                                         .error = error,
10889                                         .data = &tag_be24,
10890                                         };
10891         struct mlx5_hlist *tag_table;
10892
10893         tag_table = flow_dv_hlist_prepare(priv->sh, &priv->sh->tag_table,
10894                                       "tags",
10895                                       MLX5_TAGS_HLIST_ARRAY_SIZE,
10896                                       false, false, priv->sh,
10897                                       flow_dv_tag_create_cb,
10898                                       flow_dv_tag_match_cb,
10899                                       flow_dv_tag_remove_cb,
10900                                       flow_dv_tag_clone_cb,
10901                                       flow_dv_tag_clone_free_cb,
10902                                       error);
10903         if (unlikely(!tag_table))
10904                 return -rte_errno;
10905         entry = mlx5_hlist_register(tag_table, tag_be24, &ctx);
10906         if (entry) {
10907                 resource = container_of(entry, struct mlx5_flow_dv_tag_resource,
10908                                         entry);
10909                 dev_flow->handle->dvh.rix_tag = resource->idx;
10910                 dev_flow->dv.tag_resource = resource;
10911                 return 0;
10912         }
10913         return -rte_errno;
10914 }
10915
10916 void
10917 flow_dv_tag_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
10918 {
10919         struct mlx5_dev_ctx_shared *sh = tool_ctx;
10920         struct mlx5_flow_dv_tag_resource *tag =
10921                    container_of(entry, struct mlx5_flow_dv_tag_resource, entry);
10922
10923         MLX5_ASSERT(tag && sh && tag->action);
10924         claim_zero(mlx5_flow_os_destroy_flow_action(tag->action));
10925         DRV_LOG(DEBUG, "Tag %p: removed.", (void *)tag);
10926         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_TAG], tag->idx);
10927 }
10928
10929 /**
10930  * Release the tag.
10931  *
10932  * @param dev
10933  *   Pointer to Ethernet device.
10934  * @param tag_idx
10935  *   Tag index.
10936  *
10937  * @return
10938  *   1 while a reference on it exists, 0 when freed.
10939  */
10940 static int
10941 flow_dv_tag_release(struct rte_eth_dev *dev,
10942                     uint32_t tag_idx)
10943 {
10944         struct mlx5_priv *priv = dev->data->dev_private;
10945         struct mlx5_flow_dv_tag_resource *tag;
10946
10947         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG], tag_idx);
10948         if (!tag)
10949                 return 0;
10950         DRV_LOG(DEBUG, "port %u tag %p: refcnt %d--",
10951                 dev->data->port_id, (void *)tag, tag->entry.ref_cnt);
10952         return mlx5_hlist_unregister(priv->sh->tag_table, &tag->entry);
10953 }
10954
10955 /**
10956  * Translate action PORT_ID / REPRESENTED_PORT to vport.
10957  *
10958  * @param[in] dev
10959  *   Pointer to rte_eth_dev structure.
10960  * @param[in] action
10961  *   Pointer to action PORT_ID / REPRESENTED_PORT.
10962  * @param[out] dst_port_id
10963  *   The target port ID.
10964  * @param[out] error
10965  *   Pointer to the error structure.
10966  *
10967  * @return
10968  *   0 on success, a negative errno value otherwise and rte_errno is set.
10969  */
10970 static int
10971 flow_dv_translate_action_port_id(struct rte_eth_dev *dev,
10972                                  const struct rte_flow_action *action,
10973                                  uint32_t *dst_port_id,
10974                                  struct rte_flow_error *error)
10975 {
10976         uint32_t port;
10977         struct mlx5_priv *priv;
10978
10979         switch (action->type) {
10980         case RTE_FLOW_ACTION_TYPE_PORT_ID: {
10981                 const struct rte_flow_action_port_id *conf;
10982
10983                 conf = (const struct rte_flow_action_port_id *)action->conf;
10984                 port = conf->original ? dev->data->port_id : conf->id;
10985                 break;
10986         }
10987         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT: {
10988                 const struct rte_flow_action_ethdev *ethdev;
10989
10990                 ethdev = (const struct rte_flow_action_ethdev *)action->conf;
10991                 port = ethdev->port_id;
10992                 break;
10993         }
10994         default:
10995                 MLX5_ASSERT(false);
10996                 return rte_flow_error_set(error, EINVAL,
10997                                           RTE_FLOW_ERROR_TYPE_ACTION, action,
10998                                           "unknown E-Switch action");
10999         }
11000
11001         priv = mlx5_port_to_eswitch_info(port, false);
11002         if (!priv)
11003                 return rte_flow_error_set(error, -rte_errno,
11004                                           RTE_FLOW_ERROR_TYPE_ACTION,
11005                                           NULL,
11006                                           "No eswitch info was found for port");
11007 #ifdef HAVE_MLX5DV_DR_CREATE_DEST_IB_PORT
11008         /*
11009          * This parameter is transferred to
11010          * mlx5dv_dr_action_create_dest_ib_port().
11011          */
11012         *dst_port_id = priv->dev_port;
11013 #else
11014         /*
11015          * Legacy mode, no LAG configurations is supported.
11016          * This parameter is transferred to
11017          * mlx5dv_dr_action_create_dest_vport().
11018          */
11019         *dst_port_id = priv->vport_id;
11020 #endif
11021         return 0;
11022 }
11023
11024 /**
11025  * Create a counter with aging configuration.
11026  *
11027  * @param[in] dev
11028  *   Pointer to rte_eth_dev structure.
11029  * @param[in] dev_flow
11030  *   Pointer to the mlx5_flow.
11031  * @param[out] count
11032  *   Pointer to the counter action configuration.
11033  * @param[in] age
11034  *   Pointer to the aging action configuration.
11035  *
11036  * @return
11037  *   Index to flow counter on success, 0 otherwise.
11038  */
11039 static uint32_t
11040 flow_dv_translate_create_counter(struct rte_eth_dev *dev,
11041                                 struct mlx5_flow *dev_flow,
11042                                 const struct rte_flow_action_count *count
11043                                         __rte_unused,
11044                                 const struct rte_flow_action_age *age)
11045 {
11046         uint32_t counter;
11047         struct mlx5_age_param *age_param;
11048
11049         counter = flow_dv_counter_alloc(dev, !!age);
11050         if (!counter || age == NULL)
11051                 return counter;
11052         age_param = flow_dv_counter_idx_get_age(dev, counter);
11053         age_param->context = age->context ? age->context :
11054                 (void *)(uintptr_t)(dev_flow->flow_idx);
11055         age_param->timeout = age->timeout;
11056         age_param->port_id = dev->data->port_id;
11057         __atomic_store_n(&age_param->sec_since_last_hit, 0, __ATOMIC_RELAXED);
11058         __atomic_store_n(&age_param->state, AGE_CANDIDATE, __ATOMIC_RELAXED);
11059         return counter;
11060 }
11061
11062 /**
11063  * Add Tx queue matcher
11064  *
11065  * @param[in] dev
11066  *   Pointer to the dev struct.
11067  * @param[in, out] matcher
11068  *   Flow matcher.
11069  * @param[in, out] key
11070  *   Flow matcher value.
11071  * @param[in] item
11072  *   Flow pattern to translate.
11073  * @param[in] inner
11074  *   Item is inner pattern.
11075  */
11076 static void
11077 flow_dv_translate_item_tx_queue(struct rte_eth_dev *dev,
11078                                 void *matcher, void *key,
11079                                 const struct rte_flow_item *item)
11080 {
11081         const struct mlx5_rte_flow_item_tx_queue *queue_m;
11082         const struct mlx5_rte_flow_item_tx_queue *queue_v;
11083         void *misc_m = MLX5_ADDR_OF(fte_match_param, matcher, misc_parameters);
11084         void *misc_v = MLX5_ADDR_OF(fte_match_param, key, misc_parameters);
11085         struct mlx5_txq_ctrl *txq;
11086         uint32_t queue, mask;
11087
11088         queue_m = (const void *)item->mask;
11089         queue_v = (const void *)item->spec;
11090         if (!queue_v)
11091                 return;
11092         txq = mlx5_txq_get(dev, queue_v->queue);
11093         if (!txq)
11094                 return;
11095         if (txq->is_hairpin)
11096                 queue = txq->obj->sq->id;
11097         else
11098                 queue = txq->obj->sq_obj.sq->id;
11099         mask = queue_m == NULL ? UINT32_MAX : queue_m->queue;
11100         MLX5_SET(fte_match_set_misc, misc_m, source_sqn, mask);
11101         MLX5_SET(fte_match_set_misc, misc_v, source_sqn, queue & mask);
11102         mlx5_txq_release(dev, queue_v->queue);
11103 }
11104
11105 /**
11106  * Set the hash fields according to the @p flow information.
11107  *
11108  * @param[in] item_flags
11109  *   The match pattern item flags.
11110  * @param[in] rss_desc
11111  *   Pointer to the mlx5_flow_rss_desc.
11112  * @param[out] hash_fields
11113  *   Pointer to the RSS hash fields.
11114  */
11115 void
11116 flow_dv_hashfields_set(uint64_t item_flags,
11117                        struct mlx5_flow_rss_desc *rss_desc,
11118                        uint64_t *hash_fields)
11119 {
11120         uint64_t items = item_flags;
11121         uint64_t fields = 0;
11122         int rss_inner = 0;
11123         uint64_t rss_types = rte_eth_rss_hf_refine(rss_desc->types);
11124
11125         *hash_fields = 0;
11126 #ifdef HAVE_IBV_DEVICE_TUNNEL_SUPPORT
11127         if (rss_desc->level >= 2)
11128                 rss_inner = 1;
11129 #endif
11130         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV4)) ||
11131             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV4)) ||
11132              !items) {
11133                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
11134                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
11135                                 fields |= IBV_RX_HASH_SRC_IPV4;
11136                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
11137                                 fields |= IBV_RX_HASH_DST_IPV4;
11138                         else
11139                                 fields |= MLX5_IPV4_IBV_RX_HASH;
11140                 }
11141         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L3_IPV6)) ||
11142                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L3_IPV6)) ||
11143                    !items) {
11144                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
11145                         if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
11146                                 fields |= IBV_RX_HASH_SRC_IPV6;
11147                         else if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
11148                                 fields |= IBV_RX_HASH_DST_IPV6;
11149                         else
11150                                 fields |= MLX5_IPV6_IBV_RX_HASH;
11151                 }
11152         }
11153         if (fields == 0)
11154                 /*
11155                  * There is no match between the RSS types and the
11156                  * L3 protocol (IPv4/IPv6) defined in the flow rule.
11157                  */
11158                 return;
11159         if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_UDP)) ||
11160             (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_UDP)) ||
11161             !items) {
11162                 if (rss_types & RTE_ETH_RSS_UDP) {
11163                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
11164                                 fields |= IBV_RX_HASH_SRC_PORT_UDP;
11165                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11166                                 fields |= IBV_RX_HASH_DST_PORT_UDP;
11167                         else
11168                                 fields |= MLX5_UDP_IBV_RX_HASH;
11169                 }
11170         } else if ((rss_inner && (items & MLX5_FLOW_LAYER_INNER_L4_TCP)) ||
11171                    (!rss_inner && (items & MLX5_FLOW_LAYER_OUTER_L4_TCP)) ||
11172                    !items) {
11173                 if (rss_types & RTE_ETH_RSS_TCP) {
11174                         if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
11175                                 fields |= IBV_RX_HASH_SRC_PORT_TCP;
11176                         else if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
11177                                 fields |= IBV_RX_HASH_DST_PORT_TCP;
11178                         else
11179                                 fields |= MLX5_TCP_IBV_RX_HASH;
11180                 }
11181         }
11182         if (rss_inner)
11183                 fields |= IBV_RX_HASH_INNER;
11184         *hash_fields = fields;
11185 }
11186
11187 /**
11188  * Prepare an Rx Hash queue.
11189  *
11190  * @param dev
11191  *   Pointer to Ethernet device.
11192  * @param[in] dev_flow
11193  *   Pointer to the mlx5_flow.
11194  * @param[in] rss_desc
11195  *   Pointer to the mlx5_flow_rss_desc.
11196  * @param[out] hrxq_idx
11197  *   Hash Rx queue index.
11198  *
11199  * @return
11200  *   The Verbs/DevX object initialised, NULL otherwise and rte_errno is set.
11201  */
11202 static struct mlx5_hrxq *
11203 flow_dv_hrxq_prepare(struct rte_eth_dev *dev,
11204                      struct mlx5_flow *dev_flow,
11205                      struct mlx5_flow_rss_desc *rss_desc,
11206                      uint32_t *hrxq_idx)
11207 {
11208         struct mlx5_flow_handle *dh = dev_flow->handle;
11209         struct mlx5_hrxq *hrxq;
11210
11211         MLX5_ASSERT(rss_desc->queue_num);
11212         rss_desc->key_len = MLX5_RSS_HASH_KEY_LEN;
11213         rss_desc->hash_fields = dev_flow->hash_fields;
11214         rss_desc->tunnel = !!(dh->layers & MLX5_FLOW_LAYER_TUNNEL);
11215         rss_desc->shared_rss = 0;
11216         if (rss_desc->hash_fields == 0)
11217                 rss_desc->queue_num = 1;
11218         hrxq = mlx5_hrxq_get(dev, rss_desc);
11219         *hrxq_idx = hrxq ? hrxq->idx : 0;
11220         return hrxq;
11221 }
11222
11223 /**
11224  * Release sample sub action resource.
11225  *
11226  * @param[in, out] dev
11227  *   Pointer to rte_eth_dev structure.
11228  * @param[in] act_res
11229  *   Pointer to sample sub action resource.
11230  */
11231 static void
11232 flow_dv_sample_sub_actions_release(struct rte_eth_dev *dev,
11233                                    struct mlx5_flow_sub_actions_idx *act_res)
11234 {
11235         if (act_res->rix_hrxq) {
11236                 mlx5_hrxq_release(dev, act_res->rix_hrxq);
11237                 act_res->rix_hrxq = 0;
11238         }
11239         if (act_res->rix_encap_decap) {
11240                 flow_dv_encap_decap_resource_release(dev,
11241                                                      act_res->rix_encap_decap);
11242                 act_res->rix_encap_decap = 0;
11243         }
11244         if (act_res->rix_port_id_action) {
11245                 flow_dv_port_id_action_resource_release(dev,
11246                                                 act_res->rix_port_id_action);
11247                 act_res->rix_port_id_action = 0;
11248         }
11249         if (act_res->rix_tag) {
11250                 flow_dv_tag_release(dev, act_res->rix_tag);
11251                 act_res->rix_tag = 0;
11252         }
11253         if (act_res->rix_jump) {
11254                 flow_dv_jump_tbl_resource_release(dev, act_res->rix_jump);
11255                 act_res->rix_jump = 0;
11256         }
11257 }
11258
11259 int
11260 flow_dv_sample_match_cb(void *tool_ctx __rte_unused,
11261                         struct mlx5_list_entry *entry, void *cb_ctx)
11262 {
11263         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11264         struct rte_eth_dev *dev = ctx->dev;
11265         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11266         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
11267                                                               typeof(*resource),
11268                                                               entry);
11269
11270         if (ctx_resource->ratio == resource->ratio &&
11271             ctx_resource->ft_type == resource->ft_type &&
11272             ctx_resource->ft_id == resource->ft_id &&
11273             ctx_resource->set_action == resource->set_action &&
11274             !memcmp((void *)&ctx_resource->sample_act,
11275                     (void *)&resource->sample_act,
11276                     sizeof(struct mlx5_flow_sub_actions_list))) {
11277                 /*
11278                  * Existing sample action should release the prepared
11279                  * sub-actions reference counter.
11280                  */
11281                 flow_dv_sample_sub_actions_release(dev,
11282                                                    &ctx_resource->sample_idx);
11283                 return 0;
11284         }
11285         return 1;
11286 }
11287
11288 struct mlx5_list_entry *
11289 flow_dv_sample_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11290 {
11291         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11292         struct rte_eth_dev *dev = ctx->dev;
11293         struct mlx5_flow_dv_sample_resource *ctx_resource = ctx->data;
11294         void **sample_dv_actions = ctx_resource->sub_actions;
11295         struct mlx5_flow_dv_sample_resource *resource;
11296         struct mlx5dv_dr_flow_sampler_attr sampler_attr;
11297         struct mlx5_priv *priv = dev->data->dev_private;
11298         struct mlx5_dev_ctx_shared *sh = priv->sh;
11299         struct mlx5_flow_tbl_resource *tbl;
11300         uint32_t idx = 0;
11301         const uint32_t next_ft_step = 1;
11302         uint32_t next_ft_id = ctx_resource->ft_id + next_ft_step;
11303         uint8_t is_egress = 0;
11304         uint8_t is_transfer = 0;
11305         struct rte_flow_error *error = ctx->error;
11306
11307         /* Register new sample resource. */
11308         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11309         if (!resource) {
11310                 rte_flow_error_set(error, ENOMEM,
11311                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11312                                           NULL,
11313                                           "cannot allocate resource memory");
11314                 return NULL;
11315         }
11316         *resource = *ctx_resource;
11317         /* Create normal path table level */
11318         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11319                 is_transfer = 1;
11320         else if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_TX)
11321                 is_egress = 1;
11322         tbl = flow_dv_tbl_resource_get(dev, next_ft_id,
11323                                         is_egress, is_transfer,
11324                                         true, NULL, 0, 0, 0, error);
11325         if (!tbl) {
11326                 rte_flow_error_set(error, ENOMEM,
11327                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11328                                           NULL,
11329                                           "fail to create normal path table "
11330                                           "for sample");
11331                 goto error;
11332         }
11333         resource->normal_path_tbl = tbl;
11334         if (ctx_resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB) {
11335                 if (!sh->default_miss_action) {
11336                         rte_flow_error_set(error, ENOMEM,
11337                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11338                                                 NULL,
11339                                                 "default miss action was not "
11340                                                 "created");
11341                         goto error;
11342                 }
11343                 sample_dv_actions[ctx_resource->sample_act.actions_num++] =
11344                                                 sh->default_miss_action;
11345         }
11346         /* Create a DR sample action */
11347         sampler_attr.sample_ratio = resource->ratio;
11348         sampler_attr.default_next_table = tbl->obj;
11349         sampler_attr.num_sample_actions = ctx_resource->sample_act.actions_num;
11350         sampler_attr.sample_actions = (struct mlx5dv_dr_action **)
11351                                                         &sample_dv_actions[0];
11352         sampler_attr.action = resource->set_action;
11353         if (mlx5_os_flow_dr_create_flow_action_sampler
11354                         (&sampler_attr, &resource->verbs_action)) {
11355                 rte_flow_error_set(error, ENOMEM,
11356                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11357                                         NULL, "cannot create sample action");
11358                 goto error;
11359         }
11360         resource->idx = idx;
11361         resource->dev = dev;
11362         return &resource->entry;
11363 error:
11364         if (resource->ft_type != MLX5DV_FLOW_TABLE_TYPE_FDB)
11365                 flow_dv_sample_sub_actions_release(dev,
11366                                                    &resource->sample_idx);
11367         if (resource->normal_path_tbl)
11368                 flow_dv_tbl_resource_release(MLX5_SH(dev),
11369                                 resource->normal_path_tbl);
11370         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_SAMPLE], idx);
11371         return NULL;
11372
11373 }
11374
11375 struct mlx5_list_entry *
11376 flow_dv_sample_clone_cb(void *tool_ctx __rte_unused,
11377                          struct mlx5_list_entry *entry __rte_unused,
11378                          void *cb_ctx)
11379 {
11380         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11381         struct rte_eth_dev *dev = ctx->dev;
11382         struct mlx5_flow_dv_sample_resource *resource;
11383         struct mlx5_priv *priv = dev->data->dev_private;
11384         struct mlx5_dev_ctx_shared *sh = priv->sh;
11385         uint32_t idx = 0;
11386
11387         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_SAMPLE], &idx);
11388         if (!resource) {
11389                 rte_flow_error_set(ctx->error, ENOMEM,
11390                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11391                                           NULL,
11392                                           "cannot allocate resource memory");
11393                 return NULL;
11394         }
11395         memcpy(resource, entry, sizeof(*resource));
11396         resource->idx = idx;
11397         resource->dev = dev;
11398         return &resource->entry;
11399 }
11400
11401 void
11402 flow_dv_sample_clone_free_cb(void *tool_ctx __rte_unused,
11403                              struct mlx5_list_entry *entry)
11404 {
11405         struct mlx5_flow_dv_sample_resource *resource =
11406                                   container_of(entry, typeof(*resource), entry);
11407         struct rte_eth_dev *dev = resource->dev;
11408         struct mlx5_priv *priv = dev->data->dev_private;
11409
11410         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
11411 }
11412
11413 /**
11414  * Find existing sample resource or create and register a new one.
11415  *
11416  * @param[in, out] dev
11417  *   Pointer to rte_eth_dev structure.
11418  * @param[in] ref
11419  *   Pointer to sample resource reference.
11420  * @parm[in, out] dev_flow
11421  *   Pointer to the dev_flow.
11422  * @param[out] error
11423  *   pointer to error structure.
11424  *
11425  * @return
11426  *   0 on success otherwise -errno and errno is set.
11427  */
11428 static int
11429 flow_dv_sample_resource_register(struct rte_eth_dev *dev,
11430                          struct mlx5_flow_dv_sample_resource *ref,
11431                          struct mlx5_flow *dev_flow,
11432                          struct rte_flow_error *error)
11433 {
11434         struct mlx5_flow_dv_sample_resource *resource;
11435         struct mlx5_list_entry *entry;
11436         struct mlx5_priv *priv = dev->data->dev_private;
11437         struct mlx5_flow_cb_ctx ctx = {
11438                 .dev = dev,
11439                 .error = error,
11440                 .data = ref,
11441         };
11442
11443         entry = mlx5_list_register(priv->sh->sample_action_list, &ctx);
11444         if (!entry)
11445                 return -rte_errno;
11446         resource = container_of(entry, typeof(*resource), entry);
11447         dev_flow->handle->dvh.rix_sample = resource->idx;
11448         dev_flow->dv.sample_res = resource;
11449         return 0;
11450 }
11451
11452 int
11453 flow_dv_dest_array_match_cb(void *tool_ctx __rte_unused,
11454                             struct mlx5_list_entry *entry, void *cb_ctx)
11455 {
11456         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11457         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11458         struct rte_eth_dev *dev = ctx->dev;
11459         struct mlx5_flow_dv_dest_array_resource *resource =
11460                                   container_of(entry, typeof(*resource), entry);
11461         uint32_t idx = 0;
11462
11463         if (ctx_resource->num_of_dest == resource->num_of_dest &&
11464             ctx_resource->ft_type == resource->ft_type &&
11465             !memcmp((void *)resource->sample_act,
11466                     (void *)ctx_resource->sample_act,
11467                    (ctx_resource->num_of_dest *
11468                    sizeof(struct mlx5_flow_sub_actions_list)))) {
11469                 /*
11470                  * Existing sample action should release the prepared
11471                  * sub-actions reference counter.
11472                  */
11473                 for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11474                         flow_dv_sample_sub_actions_release(dev,
11475                                         &ctx_resource->sample_idx[idx]);
11476                 return 0;
11477         }
11478         return 1;
11479 }
11480
11481 struct mlx5_list_entry *
11482 flow_dv_dest_array_create_cb(void *tool_ctx __rte_unused, void *cb_ctx)
11483 {
11484         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11485         struct rte_eth_dev *dev = ctx->dev;
11486         struct mlx5_flow_dv_dest_array_resource *resource;
11487         struct mlx5_flow_dv_dest_array_resource *ctx_resource = ctx->data;
11488         struct mlx5dv_dr_action_dest_attr *dest_attr[MLX5_MAX_DEST_NUM] = { 0 };
11489         struct mlx5dv_dr_action_dest_reformat dest_reformat[MLX5_MAX_DEST_NUM];
11490         struct mlx5_priv *priv = dev->data->dev_private;
11491         struct mlx5_dev_ctx_shared *sh = priv->sh;
11492         struct mlx5_flow_sub_actions_list *sample_act;
11493         struct mlx5dv_dr_domain *domain;
11494         uint32_t idx = 0, res_idx = 0;
11495         struct rte_flow_error *error = ctx->error;
11496         uint64_t action_flags;
11497         int ret;
11498
11499         /* Register new destination array resource. */
11500         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11501                                             &res_idx);
11502         if (!resource) {
11503                 rte_flow_error_set(error, ENOMEM,
11504                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11505                                           NULL,
11506                                           "cannot allocate resource memory");
11507                 return NULL;
11508         }
11509         *resource = *ctx_resource;
11510         if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_FDB)
11511                 domain = sh->fdb_domain;
11512         else if (resource->ft_type == MLX5DV_FLOW_TABLE_TYPE_NIC_RX)
11513                 domain = sh->rx_domain;
11514         else
11515                 domain = sh->tx_domain;
11516         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11517                 dest_attr[idx] = (struct mlx5dv_dr_action_dest_attr *)
11518                                  mlx5_malloc(MLX5_MEM_ZERO,
11519                                  sizeof(struct mlx5dv_dr_action_dest_attr),
11520                                  0, SOCKET_ID_ANY);
11521                 if (!dest_attr[idx]) {
11522                         rte_flow_error_set(error, ENOMEM,
11523                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11524                                            NULL,
11525                                            "cannot allocate resource memory");
11526                         goto error;
11527                 }
11528                 dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST;
11529                 sample_act = &ctx_resource->sample_act[idx];
11530                 action_flags = sample_act->action_flags;
11531                 switch (action_flags) {
11532                 case MLX5_FLOW_ACTION_QUEUE:
11533                         dest_attr[idx]->dest = sample_act->dr_queue_action;
11534                         break;
11535                 case (MLX5_FLOW_ACTION_PORT_ID | MLX5_FLOW_ACTION_ENCAP):
11536                         dest_attr[idx]->type = MLX5DV_DR_ACTION_DEST_REFORMAT;
11537                         dest_attr[idx]->dest_reformat = &dest_reformat[idx];
11538                         dest_attr[idx]->dest_reformat->reformat =
11539                                         sample_act->dr_encap_action;
11540                         dest_attr[idx]->dest_reformat->dest =
11541                                         sample_act->dr_port_id_action;
11542                         break;
11543                 case MLX5_FLOW_ACTION_PORT_ID:
11544                         dest_attr[idx]->dest = sample_act->dr_port_id_action;
11545                         break;
11546                 case MLX5_FLOW_ACTION_JUMP:
11547                         dest_attr[idx]->dest = sample_act->dr_jump_action;
11548                         break;
11549                 default:
11550                         rte_flow_error_set(error, EINVAL,
11551                                            RTE_FLOW_ERROR_TYPE_ACTION,
11552                                            NULL,
11553                                            "unsupported actions type");
11554                         goto error;
11555                 }
11556         }
11557         /* create a dest array action */
11558         ret = mlx5_os_flow_dr_create_flow_action_dest_array
11559                                                 (domain,
11560                                                  resource->num_of_dest,
11561                                                  dest_attr,
11562                                                  &resource->action);
11563         if (ret) {
11564                 rte_flow_error_set(error, ENOMEM,
11565                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11566                                    NULL,
11567                                    "cannot create destination array action");
11568                 goto error;
11569         }
11570         resource->idx = res_idx;
11571         resource->dev = dev;
11572         for (idx = 0; idx < ctx_resource->num_of_dest; idx++)
11573                 mlx5_free(dest_attr[idx]);
11574         return &resource->entry;
11575 error:
11576         for (idx = 0; idx < ctx_resource->num_of_dest; idx++) {
11577                 flow_dv_sample_sub_actions_release(dev,
11578                                                    &resource->sample_idx[idx]);
11579                 if (dest_attr[idx])
11580                         mlx5_free(dest_attr[idx]);
11581         }
11582         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DEST_ARRAY], res_idx);
11583         return NULL;
11584 }
11585
11586 struct mlx5_list_entry *
11587 flow_dv_dest_array_clone_cb(void *tool_ctx __rte_unused,
11588                             struct mlx5_list_entry *entry __rte_unused,
11589                             void *cb_ctx)
11590 {
11591         struct mlx5_flow_cb_ctx *ctx = cb_ctx;
11592         struct rte_eth_dev *dev = ctx->dev;
11593         struct mlx5_flow_dv_dest_array_resource *resource;
11594         struct mlx5_priv *priv = dev->data->dev_private;
11595         struct mlx5_dev_ctx_shared *sh = priv->sh;
11596         uint32_t res_idx = 0;
11597         struct rte_flow_error *error = ctx->error;
11598
11599         resource = mlx5_ipool_zmalloc(sh->ipool[MLX5_IPOOL_DEST_ARRAY],
11600                                       &res_idx);
11601         if (!resource) {
11602                 rte_flow_error_set(error, ENOMEM,
11603                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11604                                           NULL,
11605                                           "cannot allocate dest-array memory");
11606                 return NULL;
11607         }
11608         memcpy(resource, entry, sizeof(*resource));
11609         resource->idx = res_idx;
11610         resource->dev = dev;
11611         return &resource->entry;
11612 }
11613
11614 void
11615 flow_dv_dest_array_clone_free_cb(void *tool_ctx __rte_unused,
11616                                  struct mlx5_list_entry *entry)
11617 {
11618         struct mlx5_flow_dv_dest_array_resource *resource =
11619                         container_of(entry, typeof(*resource), entry);
11620         struct rte_eth_dev *dev = resource->dev;
11621         struct mlx5_priv *priv = dev->data->dev_private;
11622
11623         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
11624 }
11625
11626 /**
11627  * Find existing destination array resource or create and register a new one.
11628  *
11629  * @param[in, out] dev
11630  *   Pointer to rte_eth_dev structure.
11631  * @param[in] ref
11632  *   Pointer to destination array resource reference.
11633  * @parm[in, out] dev_flow
11634  *   Pointer to the dev_flow.
11635  * @param[out] error
11636  *   pointer to error structure.
11637  *
11638  * @return
11639  *   0 on success otherwise -errno and errno is set.
11640  */
11641 static int
11642 flow_dv_dest_array_resource_register(struct rte_eth_dev *dev,
11643                          struct mlx5_flow_dv_dest_array_resource *ref,
11644                          struct mlx5_flow *dev_flow,
11645                          struct rte_flow_error *error)
11646 {
11647         struct mlx5_flow_dv_dest_array_resource *resource;
11648         struct mlx5_priv *priv = dev->data->dev_private;
11649         struct mlx5_list_entry *entry;
11650         struct mlx5_flow_cb_ctx ctx = {
11651                 .dev = dev,
11652                 .error = error,
11653                 .data = ref,
11654         };
11655
11656         entry = mlx5_list_register(priv->sh->dest_array_list, &ctx);
11657         if (!entry)
11658                 return -rte_errno;
11659         resource = container_of(entry, typeof(*resource), entry);
11660         dev_flow->handle->dvh.rix_dest_array = resource->idx;
11661         dev_flow->dv.dest_array_res = resource;
11662         return 0;
11663 }
11664
11665 /**
11666  * Convert Sample action to DV specification.
11667  *
11668  * @param[in] dev
11669  *   Pointer to rte_eth_dev structure.
11670  * @param[in] action
11671  *   Pointer to sample action structure.
11672  * @param[in, out] dev_flow
11673  *   Pointer to the mlx5_flow.
11674  * @param[in] attr
11675  *   Pointer to the flow attributes.
11676  * @param[in, out] num_of_dest
11677  *   Pointer to the num of destination.
11678  * @param[in, out] sample_actions
11679  *   Pointer to sample actions list.
11680  * @param[in, out] res
11681  *   Pointer to sample resource.
11682  * @param[out] error
11683  *   Pointer to the error structure.
11684  *
11685  * @return
11686  *   0 on success, a negative errno value otherwise and rte_errno is set.
11687  */
11688 static int
11689 flow_dv_translate_action_sample(struct rte_eth_dev *dev,
11690                                 const struct rte_flow_action_sample *action,
11691                                 struct mlx5_flow *dev_flow,
11692                                 const struct rte_flow_attr *attr,
11693                                 uint32_t *num_of_dest,
11694                                 void **sample_actions,
11695                                 struct mlx5_flow_dv_sample_resource *res,
11696                                 struct rte_flow_error *error)
11697 {
11698         struct mlx5_priv *priv = dev->data->dev_private;
11699         const struct rte_flow_action *sub_actions;
11700         struct mlx5_flow_sub_actions_list *sample_act;
11701         struct mlx5_flow_sub_actions_idx *sample_idx;
11702         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11703         struct rte_flow *flow = dev_flow->flow;
11704         struct mlx5_flow_rss_desc *rss_desc;
11705         uint64_t action_flags = 0;
11706
11707         MLX5_ASSERT(wks);
11708         rss_desc = &wks->rss_desc;
11709         sample_act = &res->sample_act;
11710         sample_idx = &res->sample_idx;
11711         res->ratio = action->ratio;
11712         sub_actions = action->actions;
11713         for (; sub_actions->type != RTE_FLOW_ACTION_TYPE_END; sub_actions++) {
11714                 int type = sub_actions->type;
11715                 uint32_t pre_rix = 0;
11716                 void *pre_r;
11717                 switch (type) {
11718                 case RTE_FLOW_ACTION_TYPE_QUEUE:
11719                 {
11720                         const struct rte_flow_action_queue *queue;
11721                         struct mlx5_hrxq *hrxq;
11722                         uint32_t hrxq_idx;
11723
11724                         queue = sub_actions->conf;
11725                         rss_desc->queue_num = 1;
11726                         rss_desc->queue[0] = queue->index;
11727                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11728                                                     rss_desc, &hrxq_idx);
11729                         if (!hrxq)
11730                                 return rte_flow_error_set
11731                                         (error, rte_errno,
11732                                          RTE_FLOW_ERROR_TYPE_ACTION,
11733                                          NULL,
11734                                          "cannot create fate queue");
11735                         sample_act->dr_queue_action = hrxq->action;
11736                         sample_idx->rix_hrxq = hrxq_idx;
11737                         sample_actions[sample_act->actions_num++] =
11738                                                 hrxq->action;
11739                         (*num_of_dest)++;
11740                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
11741                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11742                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11743                         dev_flow->handle->fate_action =
11744                                         MLX5_FLOW_FATE_QUEUE;
11745                         break;
11746                 }
11747                 case RTE_FLOW_ACTION_TYPE_RSS:
11748                 {
11749                         struct mlx5_hrxq *hrxq;
11750                         uint32_t hrxq_idx;
11751                         const struct rte_flow_action_rss *rss;
11752                         const uint8_t *rss_key;
11753
11754                         rss = sub_actions->conf;
11755                         memcpy(rss_desc->queue, rss->queue,
11756                                rss->queue_num * sizeof(uint16_t));
11757                         rss_desc->queue_num = rss->queue_num;
11758                         /* NULL RSS key indicates default RSS key. */
11759                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
11760                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
11761                         /*
11762                          * rss->level and rss.types should be set in advance
11763                          * when expanding items for RSS.
11764                          */
11765                         flow_dv_hashfields_set(dev_flow->handle->layers,
11766                                                rss_desc,
11767                                                &dev_flow->hash_fields);
11768                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11769                                                     rss_desc, &hrxq_idx);
11770                         if (!hrxq)
11771                                 return rte_flow_error_set
11772                                         (error, rte_errno,
11773                                          RTE_FLOW_ERROR_TYPE_ACTION,
11774                                          NULL,
11775                                          "cannot create fate queue");
11776                         sample_act->dr_queue_action = hrxq->action;
11777                         sample_idx->rix_hrxq = hrxq_idx;
11778                         sample_actions[sample_act->actions_num++] =
11779                                                 hrxq->action;
11780                         (*num_of_dest)++;
11781                         action_flags |= MLX5_FLOW_ACTION_RSS;
11782                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11783                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11784                         dev_flow->handle->fate_action =
11785                                         MLX5_FLOW_FATE_QUEUE;
11786                         break;
11787                 }
11788                 case RTE_FLOW_ACTION_TYPE_MARK:
11789                 {
11790                         uint32_t tag_be = mlx5_flow_mark_set
11791                                 (((const struct rte_flow_action_mark *)
11792                                 (sub_actions->conf))->id);
11793
11794                         wks->mark = 1;
11795                         pre_rix = dev_flow->handle->dvh.rix_tag;
11796                         /* Save the mark resource before sample */
11797                         pre_r = dev_flow->dv.tag_resource;
11798                         if (flow_dv_tag_resource_register(dev, tag_be,
11799                                                   dev_flow, error))
11800                                 return -rte_errno;
11801                         MLX5_ASSERT(dev_flow->dv.tag_resource);
11802                         sample_act->dr_tag_action =
11803                                 dev_flow->dv.tag_resource->action;
11804                         sample_idx->rix_tag =
11805                                 dev_flow->handle->dvh.rix_tag;
11806                         sample_actions[sample_act->actions_num++] =
11807                                                 sample_act->dr_tag_action;
11808                         /* Recover the mark resource after sample */
11809                         dev_flow->dv.tag_resource = pre_r;
11810                         dev_flow->handle->dvh.rix_tag = pre_rix;
11811                         action_flags |= MLX5_FLOW_ACTION_MARK;
11812                         break;
11813                 }
11814                 case RTE_FLOW_ACTION_TYPE_COUNT:
11815                 {
11816                         if (!flow->counter) {
11817                                 flow->counter =
11818                                         flow_dv_translate_create_counter(dev,
11819                                                 dev_flow, sub_actions->conf,
11820                                                 0);
11821                                 if (!flow->counter)
11822                                         return rte_flow_error_set
11823                                                 (error, rte_errno,
11824                                                 RTE_FLOW_ERROR_TYPE_ACTION,
11825                                                 NULL,
11826                                                 "cannot create counter"
11827                                                 " object.");
11828                         }
11829                         sample_act->dr_cnt_action =
11830                                   (flow_dv_counter_get_by_idx(dev,
11831                                   flow->counter, NULL))->action;
11832                         sample_actions[sample_act->actions_num++] =
11833                                                 sample_act->dr_cnt_action;
11834                         action_flags |= MLX5_FLOW_ACTION_COUNT;
11835                         break;
11836                 }
11837                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
11838                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
11839                 {
11840                         struct mlx5_flow_dv_port_id_action_resource
11841                                         port_id_resource;
11842                         uint32_t port_id = 0;
11843
11844                         memset(&port_id_resource, 0, sizeof(port_id_resource));
11845                         /* Save the port id resource before sample */
11846                         pre_rix = dev_flow->handle->rix_port_id_action;
11847                         pre_r = dev_flow->dv.port_id_action;
11848                         if (flow_dv_translate_action_port_id(dev, sub_actions,
11849                                                              &port_id, error))
11850                                 return -rte_errno;
11851                         port_id_resource.port_id = port_id;
11852                         if (flow_dv_port_id_action_resource_register
11853                             (dev, &port_id_resource, dev_flow, error))
11854                                 return -rte_errno;
11855                         sample_act->dr_port_id_action =
11856                                 dev_flow->dv.port_id_action->action;
11857                         sample_idx->rix_port_id_action =
11858                                 dev_flow->handle->rix_port_id_action;
11859                         sample_actions[sample_act->actions_num++] =
11860                                                 sample_act->dr_port_id_action;
11861                         /* Recover the port id resource after sample */
11862                         dev_flow->dv.port_id_action = pre_r;
11863                         dev_flow->handle->rix_port_id_action = pre_rix;
11864                         (*num_of_dest)++;
11865                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
11866                         break;
11867                 }
11868                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
11869                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
11870                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
11871                         /* Save the encap resource before sample */
11872                         pre_rix = dev_flow->handle->dvh.rix_encap_decap;
11873                         pre_r = dev_flow->dv.encap_decap;
11874                         if (flow_dv_create_action_l2_encap(dev, sub_actions,
11875                                                            dev_flow,
11876                                                            attr->transfer,
11877                                                            error))
11878                                 return -rte_errno;
11879                         sample_act->dr_encap_action =
11880                                 dev_flow->dv.encap_decap->action;
11881                         sample_idx->rix_encap_decap =
11882                                 dev_flow->handle->dvh.rix_encap_decap;
11883                         sample_actions[sample_act->actions_num++] =
11884                                                 sample_act->dr_encap_action;
11885                         /* Recover the encap resource after sample */
11886                         dev_flow->dv.encap_decap = pre_r;
11887                         dev_flow->handle->dvh.rix_encap_decap = pre_rix;
11888                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
11889                         break;
11890                 default:
11891                         return rte_flow_error_set(error, EINVAL,
11892                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
11893                                 NULL,
11894                                 "Not support for sampler action");
11895                 }
11896         }
11897         sample_act->action_flags = action_flags;
11898         res->ft_id = dev_flow->dv.group;
11899         if (attr->transfer) {
11900                 union {
11901                         uint32_t action_in[MLX5_ST_SZ_DW(set_action_in)];
11902                         uint64_t set_action;
11903                 } action_ctx = { .set_action = 0 };
11904
11905                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
11906                 MLX5_SET(set_action_in, action_ctx.action_in, action_type,
11907                          MLX5_MODIFICATION_TYPE_SET);
11908                 MLX5_SET(set_action_in, action_ctx.action_in, field,
11909                          MLX5_MODI_META_REG_C_0);
11910                 MLX5_SET(set_action_in, action_ctx.action_in, data,
11911                          priv->vport_meta_tag);
11912                 res->set_action = action_ctx.set_action;
11913         } else if (attr->ingress) {
11914                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
11915         } else {
11916                 res->ft_type = MLX5DV_FLOW_TABLE_TYPE_NIC_TX;
11917         }
11918         return 0;
11919 }
11920
11921 /**
11922  * Convert Sample action to DV specification.
11923  *
11924  * @param[in] dev
11925  *   Pointer to rte_eth_dev structure.
11926  * @param[in, out] dev_flow
11927  *   Pointer to the mlx5_flow.
11928  * @param[in] num_of_dest
11929  *   The num of destination.
11930  * @param[in, out] res
11931  *   Pointer to sample resource.
11932  * @param[in, out] mdest_res
11933  *   Pointer to destination array resource.
11934  * @param[in] sample_actions
11935  *   Pointer to sample path actions list.
11936  * @param[in] action_flags
11937  *   Holds the actions detected until now.
11938  * @param[out] error
11939  *   Pointer to the error structure.
11940  *
11941  * @return
11942  *   0 on success, a negative errno value otherwise and rte_errno is set.
11943  */
11944 static int
11945 flow_dv_create_action_sample(struct rte_eth_dev *dev,
11946                              struct mlx5_flow *dev_flow,
11947                              uint32_t num_of_dest,
11948                              struct mlx5_flow_dv_sample_resource *res,
11949                              struct mlx5_flow_dv_dest_array_resource *mdest_res,
11950                              void **sample_actions,
11951                              uint64_t action_flags,
11952                              struct rte_flow_error *error)
11953 {
11954         /* update normal path action resource into last index of array */
11955         uint32_t dest_index = MLX5_MAX_DEST_NUM - 1;
11956         struct mlx5_flow_sub_actions_list *sample_act =
11957                                         &mdest_res->sample_act[dest_index];
11958         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
11959         struct mlx5_flow_rss_desc *rss_desc;
11960         uint32_t normal_idx = 0;
11961         struct mlx5_hrxq *hrxq;
11962         uint32_t hrxq_idx;
11963
11964         MLX5_ASSERT(wks);
11965         rss_desc = &wks->rss_desc;
11966         if (num_of_dest > 1) {
11967                 if (sample_act->action_flags & MLX5_FLOW_ACTION_QUEUE) {
11968                         /* Handle QP action for mirroring */
11969                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow,
11970                                                     rss_desc, &hrxq_idx);
11971                         if (!hrxq)
11972                                 return rte_flow_error_set
11973                                      (error, rte_errno,
11974                                       RTE_FLOW_ERROR_TYPE_ACTION,
11975                                       NULL,
11976                                       "cannot create rx queue");
11977                         normal_idx++;
11978                         mdest_res->sample_idx[dest_index].rix_hrxq = hrxq_idx;
11979                         sample_act->dr_queue_action = hrxq->action;
11980                         if (action_flags & MLX5_FLOW_ACTION_MARK)
11981                                 dev_flow->handle->rix_hrxq = hrxq_idx;
11982                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
11983                 }
11984                 if (sample_act->action_flags & MLX5_FLOW_ACTION_ENCAP) {
11985                         normal_idx++;
11986                         mdest_res->sample_idx[dest_index].rix_encap_decap =
11987                                 dev_flow->handle->dvh.rix_encap_decap;
11988                         sample_act->dr_encap_action =
11989                                 dev_flow->dv.encap_decap->action;
11990                         dev_flow->handle->dvh.rix_encap_decap = 0;
11991                 }
11992                 if (sample_act->action_flags & MLX5_FLOW_ACTION_PORT_ID) {
11993                         normal_idx++;
11994                         mdest_res->sample_idx[dest_index].rix_port_id_action =
11995                                 dev_flow->handle->rix_port_id_action;
11996                         sample_act->dr_port_id_action =
11997                                 dev_flow->dv.port_id_action->action;
11998                         dev_flow->handle->rix_port_id_action = 0;
11999                 }
12000                 if (sample_act->action_flags & MLX5_FLOW_ACTION_JUMP) {
12001                         normal_idx++;
12002                         mdest_res->sample_idx[dest_index].rix_jump =
12003                                 dev_flow->handle->rix_jump;
12004                         sample_act->dr_jump_action =
12005                                 dev_flow->dv.jump->action;
12006                         dev_flow->handle->rix_jump = 0;
12007                 }
12008                 sample_act->actions_num = normal_idx;
12009                 /* update sample action resource into first index of array */
12010                 mdest_res->ft_type = res->ft_type;
12011                 memcpy(&mdest_res->sample_idx[0], &res->sample_idx,
12012                                 sizeof(struct mlx5_flow_sub_actions_idx));
12013                 memcpy(&mdest_res->sample_act[0], &res->sample_act,
12014                                 sizeof(struct mlx5_flow_sub_actions_list));
12015                 mdest_res->num_of_dest = num_of_dest;
12016                 if (flow_dv_dest_array_resource_register(dev, mdest_res,
12017                                                          dev_flow, error))
12018                         return rte_flow_error_set(error, EINVAL,
12019                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12020                                                   NULL, "can't create sample "
12021                                                   "action");
12022         } else {
12023                 res->sub_actions = sample_actions;
12024                 if (flow_dv_sample_resource_register(dev, res, dev_flow, error))
12025                         return rte_flow_error_set(error, EINVAL,
12026                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12027                                                   NULL,
12028                                                   "can't create sample action");
12029         }
12030         return 0;
12031 }
12032
12033 /**
12034  * Remove an ASO age action from age actions list.
12035  *
12036  * @param[in] dev
12037  *   Pointer to the Ethernet device structure.
12038  * @param[in] age
12039  *   Pointer to the aso age action handler.
12040  */
12041 static void
12042 flow_dv_aso_age_remove_from_age(struct rte_eth_dev *dev,
12043                                 struct mlx5_aso_age_action *age)
12044 {
12045         struct mlx5_age_info *age_info;
12046         struct mlx5_age_param *age_param = &age->age_params;
12047         struct mlx5_priv *priv = dev->data->dev_private;
12048         uint16_t expected = AGE_CANDIDATE;
12049
12050         age_info = GET_PORT_AGE_INFO(priv);
12051         if (!__atomic_compare_exchange_n(&age_param->state, &expected,
12052                                          AGE_FREE, false, __ATOMIC_RELAXED,
12053                                          __ATOMIC_RELAXED)) {
12054                 /**
12055                  * We need the lock even it is age timeout,
12056                  * since age action may still in process.
12057                  */
12058                 rte_spinlock_lock(&age_info->aged_sl);
12059                 LIST_REMOVE(age, next);
12060                 rte_spinlock_unlock(&age_info->aged_sl);
12061                 __atomic_store_n(&age_param->state, AGE_FREE, __ATOMIC_RELAXED);
12062         }
12063 }
12064
12065 /**
12066  * Release an ASO age action.
12067  *
12068  * @param[in] dev
12069  *   Pointer to the Ethernet device structure.
12070  * @param[in] age_idx
12071  *   Index of ASO age action to release.
12072  * @param[in] flow
12073  *   True if the release operation is during flow destroy operation.
12074  *   False if the release operation is during action destroy operation.
12075  *
12076  * @return
12077  *   0 when age action was removed, otherwise the number of references.
12078  */
12079 static int
12080 flow_dv_aso_age_release(struct rte_eth_dev *dev, uint32_t age_idx)
12081 {
12082         struct mlx5_priv *priv = dev->data->dev_private;
12083         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12084         struct mlx5_aso_age_action *age = flow_aso_age_get_by_idx(dev, age_idx);
12085         uint32_t ret = __atomic_sub_fetch(&age->refcnt, 1, __ATOMIC_RELAXED);
12086
12087         if (!ret) {
12088                 flow_dv_aso_age_remove_from_age(dev, age);
12089                 rte_spinlock_lock(&mng->free_sl);
12090                 LIST_INSERT_HEAD(&mng->free, age, next);
12091                 rte_spinlock_unlock(&mng->free_sl);
12092         }
12093         return ret;
12094 }
12095
12096 /**
12097  * Resize the ASO age pools array by MLX5_CNT_CONTAINER_RESIZE pools.
12098  *
12099  * @param[in] dev
12100  *   Pointer to the Ethernet device structure.
12101  *
12102  * @return
12103  *   0 on success, otherwise negative errno value and rte_errno is set.
12104  */
12105 static int
12106 flow_dv_aso_age_pools_resize(struct rte_eth_dev *dev)
12107 {
12108         struct mlx5_priv *priv = dev->data->dev_private;
12109         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12110         void *old_pools = mng->pools;
12111         uint32_t resize = mng->n + MLX5_CNT_CONTAINER_RESIZE;
12112         uint32_t mem_size = sizeof(struct mlx5_aso_age_pool *) * resize;
12113         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12114
12115         if (!pools) {
12116                 rte_errno = ENOMEM;
12117                 return -ENOMEM;
12118         }
12119         if (old_pools) {
12120                 memcpy(pools, old_pools,
12121                        mng->n * sizeof(struct mlx5_flow_counter_pool *));
12122                 mlx5_free(old_pools);
12123         } else {
12124                 /* First ASO flow hit allocation - starting ASO data-path. */
12125                 int ret = mlx5_aso_flow_hit_queue_poll_start(priv->sh);
12126
12127                 if (ret) {
12128                         mlx5_free(pools);
12129                         return ret;
12130                 }
12131         }
12132         mng->n = resize;
12133         mng->pools = pools;
12134         return 0;
12135 }
12136
12137 /**
12138  * Create and initialize a new ASO aging pool.
12139  *
12140  * @param[in] dev
12141  *   Pointer to the Ethernet device structure.
12142  * @param[out] age_free
12143  *   Where to put the pointer of a new age action.
12144  *
12145  * @return
12146  *   The age actions pool pointer and @p age_free is set on success,
12147  *   NULL otherwise and rte_errno is set.
12148  */
12149 static struct mlx5_aso_age_pool *
12150 flow_dv_age_pool_create(struct rte_eth_dev *dev,
12151                         struct mlx5_aso_age_action **age_free)
12152 {
12153         struct mlx5_priv *priv = dev->data->dev_private;
12154         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12155         struct mlx5_aso_age_pool *pool = NULL;
12156         struct mlx5_devx_obj *obj = NULL;
12157         uint32_t i;
12158
12159         obj = mlx5_devx_cmd_create_flow_hit_aso_obj(priv->sh->cdev->ctx,
12160                                                     priv->sh->cdev->pdn);
12161         if (!obj) {
12162                 rte_errno = ENODATA;
12163                 DRV_LOG(ERR, "Failed to create flow_hit_aso_obj using DevX.");
12164                 return NULL;
12165         }
12166         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12167         if (!pool) {
12168                 claim_zero(mlx5_devx_cmd_destroy(obj));
12169                 rte_errno = ENOMEM;
12170                 return NULL;
12171         }
12172         pool->flow_hit_aso_obj = obj;
12173         pool->time_of_last_age_check = MLX5_CURR_TIME_SEC;
12174         rte_rwlock_write_lock(&mng->resize_rwl);
12175         pool->index = mng->next;
12176         /* Resize pools array if there is no room for the new pool in it. */
12177         if (pool->index == mng->n && flow_dv_aso_age_pools_resize(dev)) {
12178                 claim_zero(mlx5_devx_cmd_destroy(obj));
12179                 mlx5_free(pool);
12180                 rte_rwlock_write_unlock(&mng->resize_rwl);
12181                 return NULL;
12182         }
12183         mng->pools[pool->index] = pool;
12184         mng->next++;
12185         rte_rwlock_write_unlock(&mng->resize_rwl);
12186         /* Assign the first action in the new pool, the rest go to free list. */
12187         *age_free = &pool->actions[0];
12188         for (i = 1; i < MLX5_ASO_AGE_ACTIONS_PER_POOL; i++) {
12189                 pool->actions[i].offset = i;
12190                 LIST_INSERT_HEAD(&mng->free, &pool->actions[i], next);
12191         }
12192         return pool;
12193 }
12194
12195 /**
12196  * Allocate a ASO aging bit.
12197  *
12198  * @param[in] dev
12199  *   Pointer to the Ethernet device structure.
12200  * @param[out] error
12201  *   Pointer to the error structure.
12202  *
12203  * @return
12204  *   Index to ASO age action on success, 0 otherwise and rte_errno is set.
12205  */
12206 static uint32_t
12207 flow_dv_aso_age_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12208 {
12209         struct mlx5_priv *priv = dev->data->dev_private;
12210         const struct mlx5_aso_age_pool *pool;
12211         struct mlx5_aso_age_action *age_free = NULL;
12212         struct mlx5_aso_age_mng *mng = priv->sh->aso_age_mng;
12213
12214         MLX5_ASSERT(mng);
12215         /* Try to get the next free age action bit. */
12216         rte_spinlock_lock(&mng->free_sl);
12217         age_free = LIST_FIRST(&mng->free);
12218         if (age_free) {
12219                 LIST_REMOVE(age_free, next);
12220         } else if (!flow_dv_age_pool_create(dev, &age_free)) {
12221                 rte_spinlock_unlock(&mng->free_sl);
12222                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12223                                    NULL, "failed to create ASO age pool");
12224                 return 0; /* 0 is an error. */
12225         }
12226         rte_spinlock_unlock(&mng->free_sl);
12227         pool = container_of
12228           ((const struct mlx5_aso_age_action (*)[MLX5_ASO_AGE_ACTIONS_PER_POOL])
12229                   (age_free - age_free->offset), const struct mlx5_aso_age_pool,
12230                                                                        actions);
12231         if (!age_free->dr_action) {
12232                 int reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_FLOW_HIT, 0,
12233                                                  error);
12234
12235                 if (reg_c < 0) {
12236                         rte_flow_error_set(error, rte_errno,
12237                                            RTE_FLOW_ERROR_TYPE_ACTION,
12238                                            NULL, "failed to get reg_c "
12239                                            "for ASO flow hit");
12240                         return 0; /* 0 is an error. */
12241                 }
12242 #ifdef HAVE_MLX5_DR_CREATE_ACTION_ASO
12243                 age_free->dr_action = mlx5_glue->dv_create_flow_action_aso
12244                                 (priv->sh->rx_domain,
12245                                  pool->flow_hit_aso_obj->obj, age_free->offset,
12246                                  MLX5DV_DR_ACTION_FLAGS_ASO_FIRST_HIT_SET,
12247                                  (reg_c - REG_C_0));
12248 #endif /* HAVE_MLX5_DR_CREATE_ACTION_ASO */
12249                 if (!age_free->dr_action) {
12250                         rte_errno = errno;
12251                         rte_spinlock_lock(&mng->free_sl);
12252                         LIST_INSERT_HEAD(&mng->free, age_free, next);
12253                         rte_spinlock_unlock(&mng->free_sl);
12254                         rte_flow_error_set(error, rte_errno,
12255                                            RTE_FLOW_ERROR_TYPE_ACTION,
12256                                            NULL, "failed to create ASO "
12257                                            "flow hit action");
12258                         return 0; /* 0 is an error. */
12259                 }
12260         }
12261         __atomic_store_n(&age_free->refcnt, 1, __ATOMIC_RELAXED);
12262         return pool->index | ((age_free->offset + 1) << 16);
12263 }
12264
12265 /**
12266  * Initialize flow ASO age parameters.
12267  *
12268  * @param[in] dev
12269  *   Pointer to rte_eth_dev structure.
12270  * @param[in] age_idx
12271  *   Index of ASO age action.
12272  * @param[in] context
12273  *   Pointer to flow counter age context.
12274  * @param[in] timeout
12275  *   Aging timeout in seconds.
12276  *
12277  */
12278 static void
12279 flow_dv_aso_age_params_init(struct rte_eth_dev *dev,
12280                             uint32_t age_idx,
12281                             void *context,
12282                             uint32_t timeout)
12283 {
12284         struct mlx5_aso_age_action *aso_age;
12285
12286         aso_age = flow_aso_age_get_by_idx(dev, age_idx);
12287         MLX5_ASSERT(aso_age);
12288         aso_age->age_params.context = context;
12289         aso_age->age_params.timeout = timeout;
12290         aso_age->age_params.port_id = dev->data->port_id;
12291         __atomic_store_n(&aso_age->age_params.sec_since_last_hit, 0,
12292                          __ATOMIC_RELAXED);
12293         __atomic_store_n(&aso_age->age_params.state, AGE_CANDIDATE,
12294                          __ATOMIC_RELAXED);
12295 }
12296
12297 static void
12298 flow_dv_translate_integrity_l4(const struct rte_flow_item_integrity *mask,
12299                                const struct rte_flow_item_integrity *value,
12300                                void *headers_m, void *headers_v)
12301 {
12302         if (mask->l4_ok) {
12303                 /* RTE l4_ok filter aggregates hardware l4_ok and
12304                  * l4_checksum_ok filters.
12305                  * Positive RTE l4_ok match requires hardware match on both L4
12306                  * hardware integrity bits.
12307                  * For negative match, check hardware l4_checksum_ok bit only,
12308                  * because hardware sets that bit to 0 for all packets
12309                  * with bad L4.
12310                  */
12311                 if (value->l4_ok) {
12312                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_ok, 1);
12313                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_ok, 1);
12314                 }
12315                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12316                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12317                          !!value->l4_ok);
12318         }
12319         if (mask->l4_csum_ok) {
12320                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, l4_checksum_ok, 1);
12321                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, l4_checksum_ok,
12322                          value->l4_csum_ok);
12323         }
12324 }
12325
12326 static void
12327 flow_dv_translate_integrity_l3(const struct rte_flow_item_integrity *mask,
12328                                const struct rte_flow_item_integrity *value,
12329                                void *headers_m, void *headers_v, bool is_ipv4)
12330 {
12331         if (mask->l3_ok) {
12332                 /* RTE l3_ok filter aggregates for IPv4 hardware l3_ok and
12333                  * ipv4_csum_ok filters.
12334                  * Positive RTE l3_ok match requires hardware match on both L3
12335                  * hardware integrity bits.
12336                  * For negative match, check hardware l3_csum_ok bit only,
12337                  * because hardware sets that bit to 0 for all packets
12338                  * with bad L3.
12339                  */
12340                 if (is_ipv4) {
12341                         if (value->l3_ok) {
12342                                 MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12343                                          l3_ok, 1);
12344                                 MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12345                                          l3_ok, 1);
12346                         }
12347                         MLX5_SET(fte_match_set_lyr_2_4, headers_m,
12348                                  ipv4_checksum_ok, 1);
12349                         MLX5_SET(fte_match_set_lyr_2_4, headers_v,
12350                                  ipv4_checksum_ok, !!value->l3_ok);
12351                 } else {
12352                         MLX5_SET(fte_match_set_lyr_2_4, headers_m, l3_ok, 1);
12353                         MLX5_SET(fte_match_set_lyr_2_4, headers_v, l3_ok,
12354                                  value->l3_ok);
12355                 }
12356         }
12357         if (mask->ipv4_csum_ok) {
12358                 MLX5_SET(fte_match_set_lyr_2_4, headers_m, ipv4_checksum_ok, 1);
12359                 MLX5_SET(fte_match_set_lyr_2_4, headers_v, ipv4_checksum_ok,
12360                          value->ipv4_csum_ok);
12361         }
12362 }
12363
12364 static void
12365 set_integrity_bits(void *headers_m, void *headers_v,
12366                    const struct rte_flow_item *integrity_item, bool is_l3_ip4)
12367 {
12368         const struct rte_flow_item_integrity *spec = integrity_item->spec;
12369         const struct rte_flow_item_integrity *mask = integrity_item->mask;
12370
12371         /* Integrity bits validation cleared spec pointer */
12372         MLX5_ASSERT(spec != NULL);
12373         if (!mask)
12374                 mask = &rte_flow_item_integrity_mask;
12375         flow_dv_translate_integrity_l3(mask, spec, headers_m, headers_v,
12376                                        is_l3_ip4);
12377         flow_dv_translate_integrity_l4(mask, spec, headers_m, headers_v);
12378 }
12379
12380 static void
12381 flow_dv_translate_item_integrity_post(void *matcher, void *key,
12382                                       const
12383                                       struct rte_flow_item *integrity_items[2],
12384                                       uint64_t pattern_flags)
12385 {
12386         void *headers_m, *headers_v;
12387         bool is_l3_ip4;
12388
12389         if (pattern_flags & MLX5_FLOW_ITEM_INNER_INTEGRITY) {
12390                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12391                                          inner_headers);
12392                 headers_v = MLX5_ADDR_OF(fte_match_param, key, inner_headers);
12393                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_INNER_L3_IPV4) !=
12394                             0;
12395                 set_integrity_bits(headers_m, headers_v,
12396                                    integrity_items[1], is_l3_ip4);
12397         }
12398         if (pattern_flags & MLX5_FLOW_ITEM_OUTER_INTEGRITY) {
12399                 headers_m = MLX5_ADDR_OF(fte_match_param, matcher,
12400                                          outer_headers);
12401                 headers_v = MLX5_ADDR_OF(fte_match_param, key, outer_headers);
12402                 is_l3_ip4 = (pattern_flags & MLX5_FLOW_LAYER_OUTER_L3_IPV4) !=
12403                             0;
12404                 set_integrity_bits(headers_m, headers_v,
12405                                    integrity_items[0], is_l3_ip4);
12406         }
12407 }
12408
12409 static void
12410 flow_dv_translate_item_integrity(const struct rte_flow_item *item,
12411                                  const struct rte_flow_item *integrity_items[2],
12412                                  uint64_t *last_item)
12413 {
12414         const struct rte_flow_item_integrity *spec = (typeof(spec))item->spec;
12415
12416         /* integrity bits validation cleared spec pointer */
12417         MLX5_ASSERT(spec != NULL);
12418         if (spec->level > 1) {
12419                 integrity_items[1] = item;
12420                 *last_item |= MLX5_FLOW_ITEM_INNER_INTEGRITY;
12421         } else {
12422                 integrity_items[0] = item;
12423                 *last_item |= MLX5_FLOW_ITEM_OUTER_INTEGRITY;
12424         }
12425 }
12426
12427 /**
12428  * Prepares DV flow counter with aging configuration.
12429  * Gets it by index when exists, creates a new one when doesn't.
12430  *
12431  * @param[in] dev
12432  *   Pointer to rte_eth_dev structure.
12433  * @param[in] dev_flow
12434  *   Pointer to the mlx5_flow.
12435  * @param[in, out] flow
12436  *   Pointer to the sub flow.
12437  * @param[in] count
12438  *   Pointer to the counter action configuration.
12439  * @param[in] age
12440  *   Pointer to the aging action configuration.
12441  * @param[out] error
12442  *   Pointer to the error structure.
12443  *
12444  * @return
12445  *   Pointer to the counter, NULL otherwise.
12446  */
12447 static struct mlx5_flow_counter *
12448 flow_dv_prepare_counter(struct rte_eth_dev *dev,
12449                         struct mlx5_flow *dev_flow,
12450                         struct rte_flow *flow,
12451                         const struct rte_flow_action_count *count,
12452                         const struct rte_flow_action_age *age,
12453                         struct rte_flow_error *error)
12454 {
12455         if (!flow->counter) {
12456                 flow->counter = flow_dv_translate_create_counter(dev, dev_flow,
12457                                                                  count, age);
12458                 if (!flow->counter) {
12459                         rte_flow_error_set(error, rte_errno,
12460                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12461                                            "cannot create counter object.");
12462                         return NULL;
12463                 }
12464         }
12465         return flow_dv_counter_get_by_idx(dev, flow->counter, NULL);
12466 }
12467
12468 /*
12469  * Release an ASO CT action by its own device.
12470  *
12471  * @param[in] dev
12472  *   Pointer to the Ethernet device structure.
12473  * @param[in] idx
12474  *   Index of ASO CT action to release.
12475  *
12476  * @return
12477  *   0 when CT action was removed, otherwise the number of references.
12478  */
12479 static inline int
12480 flow_dv_aso_ct_dev_release(struct rte_eth_dev *dev, uint32_t idx)
12481 {
12482         struct mlx5_priv *priv = dev->data->dev_private;
12483         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12484         uint32_t ret;
12485         struct mlx5_aso_ct_action *ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12486         enum mlx5_aso_ct_state state =
12487                         __atomic_load_n(&ct->state, __ATOMIC_RELAXED);
12488
12489         /* Cannot release when CT is in the ASO SQ. */
12490         if (state == ASO_CONNTRACK_WAIT || state == ASO_CONNTRACK_QUERY)
12491                 return -1;
12492         ret = __atomic_sub_fetch(&ct->refcnt, 1, __ATOMIC_RELAXED);
12493         if (!ret) {
12494                 if (ct->dr_action_orig) {
12495 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12496                         claim_zero(mlx5_glue->destroy_flow_action
12497                                         (ct->dr_action_orig));
12498 #endif
12499                         ct->dr_action_orig = NULL;
12500                 }
12501                 if (ct->dr_action_rply) {
12502 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12503                         claim_zero(mlx5_glue->destroy_flow_action
12504                                         (ct->dr_action_rply));
12505 #endif
12506                         ct->dr_action_rply = NULL;
12507                 }
12508                 /* Clear the state to free, no need in 1st allocation. */
12509                 MLX5_ASO_CT_UPDATE_STATE(ct, ASO_CONNTRACK_FREE);
12510                 rte_spinlock_lock(&mng->ct_sl);
12511                 LIST_INSERT_HEAD(&mng->free_cts, ct, next);
12512                 rte_spinlock_unlock(&mng->ct_sl);
12513         }
12514         return (int)ret;
12515 }
12516
12517 static inline int
12518 flow_dv_aso_ct_release(struct rte_eth_dev *dev, uint32_t own_idx,
12519                        struct rte_flow_error *error)
12520 {
12521         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(own_idx);
12522         uint32_t idx = MLX5_INDIRECT_ACT_CT_GET_IDX(own_idx);
12523         struct rte_eth_dev *owndev = &rte_eth_devices[owner];
12524         int ret;
12525
12526         MLX5_ASSERT(owner < RTE_MAX_ETHPORTS);
12527         if (dev->data->dev_started != 1)
12528                 return rte_flow_error_set(error, EAGAIN,
12529                                           RTE_FLOW_ERROR_TYPE_ACTION,
12530                                           NULL,
12531                                           "Indirect CT action cannot be destroyed when the port is stopped");
12532         ret = flow_dv_aso_ct_dev_release(owndev, idx);
12533         if (ret < 0)
12534                 return rte_flow_error_set(error, EAGAIN,
12535                                           RTE_FLOW_ERROR_TYPE_ACTION,
12536                                           NULL,
12537                                           "Current state prevents indirect CT action from being destroyed");
12538         return ret;
12539 }
12540
12541 /*
12542  * Resize the ASO CT pools array by 64 pools.
12543  *
12544  * @param[in] dev
12545  *   Pointer to the Ethernet device structure.
12546  *
12547  * @return
12548  *   0 on success, otherwise negative errno value and rte_errno is set.
12549  */
12550 static int
12551 flow_dv_aso_ct_pools_resize(struct rte_eth_dev *dev)
12552 {
12553         struct mlx5_priv *priv = dev->data->dev_private;
12554         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12555         void *old_pools = mng->pools;
12556         /* Magic number now, need a macro. */
12557         uint32_t resize = mng->n + 64;
12558         uint32_t mem_size = sizeof(struct mlx5_aso_ct_pool *) * resize;
12559         void *pools = mlx5_malloc(MLX5_MEM_ZERO, mem_size, 0, SOCKET_ID_ANY);
12560
12561         if (!pools) {
12562                 rte_errno = ENOMEM;
12563                 return -rte_errno;
12564         }
12565         rte_rwlock_write_lock(&mng->resize_rwl);
12566         /* ASO SQ/QP was already initialized in the startup. */
12567         if (old_pools) {
12568                 /* Realloc could be an alternative choice. */
12569                 rte_memcpy(pools, old_pools,
12570                            mng->n * sizeof(struct mlx5_aso_ct_pool *));
12571                 mlx5_free(old_pools);
12572         }
12573         mng->n = resize;
12574         mng->pools = pools;
12575         rte_rwlock_write_unlock(&mng->resize_rwl);
12576         return 0;
12577 }
12578
12579 /*
12580  * Create and initialize a new ASO CT pool.
12581  *
12582  * @param[in] dev
12583  *   Pointer to the Ethernet device structure.
12584  * @param[out] ct_free
12585  *   Where to put the pointer of a new CT action.
12586  *
12587  * @return
12588  *   The CT actions pool pointer and @p ct_free is set on success,
12589  *   NULL otherwise and rte_errno is set.
12590  */
12591 static struct mlx5_aso_ct_pool *
12592 flow_dv_ct_pool_create(struct rte_eth_dev *dev,
12593                        struct mlx5_aso_ct_action **ct_free)
12594 {
12595         struct mlx5_priv *priv = dev->data->dev_private;
12596         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12597         struct mlx5_aso_ct_pool *pool = NULL;
12598         struct mlx5_devx_obj *obj = NULL;
12599         uint32_t i;
12600         uint32_t log_obj_size = rte_log2_u32(MLX5_ASO_CT_ACTIONS_PER_POOL);
12601
12602         obj = mlx5_devx_cmd_create_conn_track_offload_obj(priv->sh->cdev->ctx,
12603                                                           priv->sh->cdev->pdn,
12604                                                           log_obj_size);
12605         if (!obj) {
12606                 rte_errno = ENODATA;
12607                 DRV_LOG(ERR, "Failed to create conn_track_offload_obj using DevX.");
12608                 return NULL;
12609         }
12610         pool = mlx5_malloc(MLX5_MEM_ZERO, sizeof(*pool), 0, SOCKET_ID_ANY);
12611         if (!pool) {
12612                 rte_errno = ENOMEM;
12613                 claim_zero(mlx5_devx_cmd_destroy(obj));
12614                 return NULL;
12615         }
12616         pool->devx_obj = obj;
12617         pool->index = mng->next;
12618         /* Resize pools array if there is no room for the new pool in it. */
12619         if (pool->index == mng->n && flow_dv_aso_ct_pools_resize(dev)) {
12620                 claim_zero(mlx5_devx_cmd_destroy(obj));
12621                 mlx5_free(pool);
12622                 return NULL;
12623         }
12624         mng->pools[pool->index] = pool;
12625         mng->next++;
12626         /* Assign the first action in the new pool, the rest go to free list. */
12627         *ct_free = &pool->actions[0];
12628         /* Lock outside, the list operation is safe here. */
12629         for (i = 1; i < MLX5_ASO_CT_ACTIONS_PER_POOL; i++) {
12630                 /* refcnt is 0 when allocating the memory. */
12631                 pool->actions[i].offset = i;
12632                 LIST_INSERT_HEAD(&mng->free_cts, &pool->actions[i], next);
12633         }
12634         return pool;
12635 }
12636
12637 /*
12638  * Allocate a ASO CT action from free list.
12639  *
12640  * @param[in] dev
12641  *   Pointer to the Ethernet device structure.
12642  * @param[out] error
12643  *   Pointer to the error structure.
12644  *
12645  * @return
12646  *   Index to ASO CT action on success, 0 otherwise and rte_errno is set.
12647  */
12648 static uint32_t
12649 flow_dv_aso_ct_alloc(struct rte_eth_dev *dev, struct rte_flow_error *error)
12650 {
12651         struct mlx5_priv *priv = dev->data->dev_private;
12652         struct mlx5_aso_ct_pools_mng *mng = priv->sh->ct_mng;
12653         struct mlx5_aso_ct_action *ct = NULL;
12654         struct mlx5_aso_ct_pool *pool;
12655         uint8_t reg_c;
12656         uint32_t ct_idx;
12657
12658         MLX5_ASSERT(mng);
12659         if (!priv->sh->cdev->config.devx) {
12660                 rte_errno = ENOTSUP;
12661                 return 0;
12662         }
12663         /* Get a free CT action, if no, a new pool will be created. */
12664         rte_spinlock_lock(&mng->ct_sl);
12665         ct = LIST_FIRST(&mng->free_cts);
12666         if (ct) {
12667                 LIST_REMOVE(ct, next);
12668         } else if (!flow_dv_ct_pool_create(dev, &ct)) {
12669                 rte_spinlock_unlock(&mng->ct_sl);
12670                 rte_flow_error_set(error, rte_errno, RTE_FLOW_ERROR_TYPE_ACTION,
12671                                    NULL, "failed to create ASO CT pool");
12672                 return 0;
12673         }
12674         rte_spinlock_unlock(&mng->ct_sl);
12675         pool = container_of(ct, struct mlx5_aso_ct_pool, actions[ct->offset]);
12676         ct_idx = MLX5_MAKE_CT_IDX(pool->index, ct->offset);
12677         /* 0: inactive, 1: created, 2+: used by flows. */
12678         __atomic_store_n(&ct->refcnt, 1, __ATOMIC_RELAXED);
12679         reg_c = mlx5_flow_get_reg_id(dev, MLX5_ASO_CONNTRACK, 0, error);
12680         if (!ct->dr_action_orig) {
12681 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12682                 ct->dr_action_orig = mlx5_glue->dv_create_flow_action_aso
12683                         (priv->sh->rx_domain, pool->devx_obj->obj,
12684                          ct->offset,
12685                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_INITIATOR,
12686                          reg_c - REG_C_0);
12687 #else
12688                 RTE_SET_USED(reg_c);
12689 #endif
12690                 if (!ct->dr_action_orig) {
12691                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12692                         rte_flow_error_set(error, rte_errno,
12693                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12694                                            "failed to create ASO CT action");
12695                         return 0;
12696                 }
12697         }
12698         if (!ct->dr_action_rply) {
12699 #ifdef HAVE_MLX5_DR_ACTION_ASO_CT
12700                 ct->dr_action_rply = mlx5_glue->dv_create_flow_action_aso
12701                         (priv->sh->rx_domain, pool->devx_obj->obj,
12702                          ct->offset,
12703                          MLX5DV_DR_ACTION_FLAGS_ASO_CT_DIRECTION_RESPONDER,
12704                          reg_c - REG_C_0);
12705 #endif
12706                 if (!ct->dr_action_rply) {
12707                         flow_dv_aso_ct_dev_release(dev, ct_idx);
12708                         rte_flow_error_set(error, rte_errno,
12709                                            RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12710                                            "failed to create ASO CT action");
12711                         return 0;
12712                 }
12713         }
12714         return ct_idx;
12715 }
12716
12717 /*
12718  * Create a conntrack object with context and actions by using ASO mechanism.
12719  *
12720  * @param[in] dev
12721  *   Pointer to rte_eth_dev structure.
12722  * @param[in] pro
12723  *   Pointer to conntrack information profile.
12724  * @param[out] error
12725  *   Pointer to the error structure.
12726  *
12727  * @return
12728  *   Index to conntrack object on success, 0 otherwise.
12729  */
12730 static uint32_t
12731 flow_dv_translate_create_conntrack(struct rte_eth_dev *dev,
12732                                    const struct rte_flow_action_conntrack *pro,
12733                                    struct rte_flow_error *error)
12734 {
12735         struct mlx5_priv *priv = dev->data->dev_private;
12736         struct mlx5_dev_ctx_shared *sh = priv->sh;
12737         struct mlx5_aso_ct_action *ct;
12738         uint32_t idx;
12739
12740         if (!sh->ct_aso_en)
12741                 return rte_flow_error_set(error, ENOTSUP,
12742                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12743                                           "Connection is not supported");
12744         idx = flow_dv_aso_ct_alloc(dev, error);
12745         if (!idx)
12746                 return rte_flow_error_set(error, rte_errno,
12747                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12748                                           "Failed to allocate CT object");
12749         ct = flow_aso_ct_get_by_dev_idx(dev, idx);
12750         if (mlx5_aso_ct_update_by_wqe(sh, ct, pro))
12751                 return rte_flow_error_set(error, EBUSY,
12752                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
12753                                           "Failed to update CT");
12754         ct->is_original = !!pro->is_original_dir;
12755         ct->peer = pro->peer_port;
12756         return idx;
12757 }
12758
12759 /**
12760  * Fill the flow with DV spec, lock free
12761  * (mutex should be acquired by caller).
12762  *
12763  * @param[in] dev
12764  *   Pointer to rte_eth_dev structure.
12765  * @param[in, out] dev_flow
12766  *   Pointer to the sub flow.
12767  * @param[in] attr
12768  *   Pointer to the flow attributes.
12769  * @param[in] items
12770  *   Pointer to the list of items.
12771  * @param[in] actions
12772  *   Pointer to the list of actions.
12773  * @param[out] error
12774  *   Pointer to the error structure.
12775  *
12776  * @return
12777  *   0 on success, a negative errno value otherwise and rte_errno is set.
12778  */
12779 static int
12780 flow_dv_translate(struct rte_eth_dev *dev,
12781                   struct mlx5_flow *dev_flow,
12782                   const struct rte_flow_attr *attr,
12783                   const struct rte_flow_item items[],
12784                   const struct rte_flow_action actions[],
12785                   struct rte_flow_error *error)
12786 {
12787         struct mlx5_priv *priv = dev->data->dev_private;
12788         struct mlx5_sh_config *dev_conf = &priv->sh->config;
12789         struct rte_flow *flow = dev_flow->flow;
12790         struct mlx5_flow_handle *handle = dev_flow->handle;
12791         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
12792         struct mlx5_flow_rss_desc *rss_desc;
12793         uint64_t item_flags = 0;
12794         uint64_t last_item = 0;
12795         uint64_t action_flags = 0;
12796         struct mlx5_flow_dv_matcher matcher = {
12797                 .mask = {
12798                         .size = sizeof(matcher.mask.buf),
12799                 },
12800         };
12801         int actions_n = 0;
12802         bool actions_end = false;
12803         union {
12804                 struct mlx5_flow_dv_modify_hdr_resource res;
12805                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
12806                             sizeof(struct mlx5_modification_cmd) *
12807                             (MLX5_MAX_MODIFY_NUM + 1)];
12808         } mhdr_dummy;
12809         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
12810         const struct rte_flow_action_count *count = NULL;
12811         const struct rte_flow_action_age *non_shared_age = NULL;
12812         union flow_dv_attr flow_attr = { .attr = 0 };
12813         uint32_t tag_be;
12814         union mlx5_flow_tbl_key tbl_key;
12815         uint32_t modify_action_position = UINT32_MAX;
12816         void *match_mask = matcher.mask.buf;
12817         void *match_value = dev_flow->dv.value.buf;
12818         uint8_t next_protocol = 0xff;
12819         struct rte_vlan_hdr vlan = { 0 };
12820         struct mlx5_flow_dv_dest_array_resource mdest_res;
12821         struct mlx5_flow_dv_sample_resource sample_res;
12822         void *sample_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
12823         const struct rte_flow_action_sample *sample = NULL;
12824         struct mlx5_flow_sub_actions_list *sample_act;
12825         uint32_t sample_act_pos = UINT32_MAX;
12826         uint32_t age_act_pos = UINT32_MAX;
12827         uint32_t num_of_dest = 0;
12828         int tmp_actions_n = 0;
12829         uint32_t table;
12830         int ret = 0;
12831         const struct mlx5_flow_tunnel *tunnel = NULL;
12832         struct flow_grp_info grp_info = {
12833                 .external = !!dev_flow->external,
12834                 .transfer = !!attr->transfer,
12835                 .fdb_def_rule = !!priv->fdb_def_rule,
12836                 .skip_scale = dev_flow->skip_scale &
12837                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
12838                 .std_tbl_fix = true,
12839         };
12840         const struct rte_flow_item *integrity_items[2] = {NULL, NULL};
12841         const struct rte_flow_item *tunnel_item = NULL;
12842         const struct rte_flow_item *gre_item = NULL;
12843
12844         if (!wks)
12845                 return rte_flow_error_set(error, ENOMEM,
12846                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
12847                                           NULL,
12848                                           "failed to push flow workspace");
12849         rss_desc = &wks->rss_desc;
12850         memset(&mdest_res, 0, sizeof(struct mlx5_flow_dv_dest_array_resource));
12851         memset(&sample_res, 0, sizeof(struct mlx5_flow_dv_sample_resource));
12852         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12853                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12854         /* update normal path action resource into last index of array */
12855         sample_act = &mdest_res.sample_act[MLX5_MAX_DEST_NUM - 1];
12856         if (is_tunnel_offload_active(dev)) {
12857                 if (dev_flow->tunnel) {
12858                         RTE_VERIFY(dev_flow->tof_type ==
12859                                    MLX5_TUNNEL_OFFLOAD_MISS_RULE);
12860                         tunnel = dev_flow->tunnel;
12861                 } else {
12862                         tunnel = mlx5_get_tof(items, actions,
12863                                               &dev_flow->tof_type);
12864                         dev_flow->tunnel = tunnel;
12865                 }
12866                 grp_info.std_tbl_fix = tunnel_use_standard_attr_group_translate
12867                                         (dev, attr, tunnel, dev_flow->tof_type);
12868         }
12869         mhdr_res->ft_type = attr->egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
12870                                            MLX5DV_FLOW_TABLE_TYPE_NIC_RX;
12871         ret = mlx5_flow_group_to_table(dev, tunnel, attr->group, &table,
12872                                        &grp_info, error);
12873         if (ret)
12874                 return ret;
12875         dev_flow->dv.group = table;
12876         if (attr->transfer)
12877                 mhdr_res->ft_type = MLX5DV_FLOW_TABLE_TYPE_FDB;
12878         /* number of actions must be set to 0 in case of dirty stack. */
12879         mhdr_res->actions_num = 0;
12880         if (is_flow_tunnel_match_rule(dev_flow->tof_type)) {
12881                 /*
12882                  * do not add decap action if match rule drops packet
12883                  * HW rejects rules with decap & drop
12884                  *
12885                  * if tunnel match rule was inserted before matching tunnel set
12886                  * rule flow table used in the match rule must be registered.
12887                  * current implementation handles that in the
12888                  * flow_dv_match_register() at the function end.
12889                  */
12890                 bool add_decap = true;
12891                 const struct rte_flow_action *ptr = actions;
12892
12893                 for (; ptr->type != RTE_FLOW_ACTION_TYPE_END; ptr++) {
12894                         if (ptr->type == RTE_FLOW_ACTION_TYPE_DROP) {
12895                                 add_decap = false;
12896                                 break;
12897                         }
12898                 }
12899                 if (add_decap) {
12900                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
12901                                                            attr->transfer,
12902                                                            error))
12903                                 return -rte_errno;
12904                         dev_flow->dv.actions[actions_n++] =
12905                                         dev_flow->dv.encap_decap->action;
12906                         action_flags |= MLX5_FLOW_ACTION_DECAP;
12907                 }
12908         }
12909         for (; !actions_end ; actions++) {
12910                 const struct rte_flow_action_queue *queue;
12911                 const struct rte_flow_action_rss *rss;
12912                 const struct rte_flow_action *action = actions;
12913                 const uint8_t *rss_key;
12914                 struct mlx5_flow_tbl_resource *tbl;
12915                 struct mlx5_aso_age_action *age_act;
12916                 struct mlx5_flow_counter *cnt_act;
12917                 uint32_t port_id = 0;
12918                 struct mlx5_flow_dv_port_id_action_resource port_id_resource;
12919                 int action_type = actions->type;
12920                 const struct rte_flow_action *found_action = NULL;
12921                 uint32_t jump_group = 0;
12922                 uint32_t owner_idx;
12923                 struct mlx5_aso_ct_action *ct;
12924
12925                 if (!mlx5_flow_os_action_supported(action_type))
12926                         return rte_flow_error_set(error, ENOTSUP,
12927                                                   RTE_FLOW_ERROR_TYPE_ACTION,
12928                                                   actions,
12929                                                   "action not supported");
12930                 switch (action_type) {
12931                 case MLX5_RTE_FLOW_ACTION_TYPE_TUNNEL_SET:
12932                         action_flags |= MLX5_FLOW_ACTION_TUNNEL_SET;
12933                         break;
12934                 case RTE_FLOW_ACTION_TYPE_VOID:
12935                         break;
12936                 case RTE_FLOW_ACTION_TYPE_PORT_ID:
12937                 case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
12938                         if (flow_dv_translate_action_port_id(dev, action,
12939                                                              &port_id, error))
12940                                 return -rte_errno;
12941                         port_id_resource.port_id = port_id;
12942                         MLX5_ASSERT(!handle->rix_port_id_action);
12943                         if (flow_dv_port_id_action_resource_register
12944                             (dev, &port_id_resource, dev_flow, error))
12945                                 return -rte_errno;
12946                         dev_flow->dv.actions[actions_n++] =
12947                                         dev_flow->dv.port_id_action->action;
12948                         action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12949                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_PORT_ID;
12950                         sample_act->action_flags |= MLX5_FLOW_ACTION_PORT_ID;
12951                         num_of_dest++;
12952                         break;
12953                 case RTE_FLOW_ACTION_TYPE_FLAG:
12954                         action_flags |= MLX5_FLOW_ACTION_FLAG;
12955                         wks->mark = 1;
12956                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12957                                 struct rte_flow_action_mark mark = {
12958                                         .id = MLX5_FLOW_MARK_DEFAULT,
12959                                 };
12960
12961                                 if (flow_dv_convert_action_mark(dev, &mark,
12962                                                                 mhdr_res,
12963                                                                 error))
12964                                         return -rte_errno;
12965                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12966                                 break;
12967                         }
12968                         tag_be = mlx5_flow_mark_set(MLX5_FLOW_MARK_DEFAULT);
12969                         /*
12970                          * Only one FLAG or MARK is supported per device flow
12971                          * right now. So the pointer to the tag resource must be
12972                          * zero before the register process.
12973                          */
12974                         MLX5_ASSERT(!handle->dvh.rix_tag);
12975                         if (flow_dv_tag_resource_register(dev, tag_be,
12976                                                           dev_flow, error))
12977                                 return -rte_errno;
12978                         MLX5_ASSERT(dev_flow->dv.tag_resource);
12979                         dev_flow->dv.actions[actions_n++] =
12980                                         dev_flow->dv.tag_resource->action;
12981                         break;
12982                 case RTE_FLOW_ACTION_TYPE_MARK:
12983                         action_flags |= MLX5_FLOW_ACTION_MARK;
12984                         wks->mark = 1;
12985                         if (dev_conf->dv_xmeta_en != MLX5_XMETA_MODE_LEGACY) {
12986                                 const struct rte_flow_action_mark *mark =
12987                                         (const struct rte_flow_action_mark *)
12988                                                 actions->conf;
12989
12990                                 if (flow_dv_convert_action_mark(dev, mark,
12991                                                                 mhdr_res,
12992                                                                 error))
12993                                         return -rte_errno;
12994                                 action_flags |= MLX5_FLOW_ACTION_MARK_EXT;
12995                                 break;
12996                         }
12997                         /* Fall-through */
12998                 case MLX5_RTE_FLOW_ACTION_TYPE_MARK:
12999                         /* Legacy (non-extensive) MARK action. */
13000                         tag_be = mlx5_flow_mark_set
13001                               (((const struct rte_flow_action_mark *)
13002                                (actions->conf))->id);
13003                         MLX5_ASSERT(!handle->dvh.rix_tag);
13004                         if (flow_dv_tag_resource_register(dev, tag_be,
13005                                                           dev_flow, error))
13006                                 return -rte_errno;
13007                         MLX5_ASSERT(dev_flow->dv.tag_resource);
13008                         dev_flow->dv.actions[actions_n++] =
13009                                         dev_flow->dv.tag_resource->action;
13010                         break;
13011                 case RTE_FLOW_ACTION_TYPE_SET_META:
13012                         if (flow_dv_convert_action_set_meta
13013                                 (dev, mhdr_res, attr,
13014                                  (const struct rte_flow_action_set_meta *)
13015                                   actions->conf, error))
13016                                 return -rte_errno;
13017                         action_flags |= MLX5_FLOW_ACTION_SET_META;
13018                         break;
13019                 case RTE_FLOW_ACTION_TYPE_SET_TAG:
13020                         if (flow_dv_convert_action_set_tag
13021                                 (dev, mhdr_res,
13022                                  (const struct rte_flow_action_set_tag *)
13023                                   actions->conf, error))
13024                                 return -rte_errno;
13025                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13026                         break;
13027                 case RTE_FLOW_ACTION_TYPE_DROP:
13028                         action_flags |= MLX5_FLOW_ACTION_DROP;
13029                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_DROP;
13030                         break;
13031                 case RTE_FLOW_ACTION_TYPE_QUEUE:
13032                         queue = actions->conf;
13033                         rss_desc->queue_num = 1;
13034                         rss_desc->queue[0] = queue->index;
13035                         action_flags |= MLX5_FLOW_ACTION_QUEUE;
13036                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_QUEUE;
13037                         sample_act->action_flags |= MLX5_FLOW_ACTION_QUEUE;
13038                         num_of_dest++;
13039                         break;
13040                 case RTE_FLOW_ACTION_TYPE_RSS:
13041                         rss = actions->conf;
13042                         memcpy(rss_desc->queue, rss->queue,
13043                                rss->queue_num * sizeof(uint16_t));
13044                         rss_desc->queue_num = rss->queue_num;
13045                         /* NULL RSS key indicates default RSS key. */
13046                         rss_key = !rss->key ? rss_hash_default_key : rss->key;
13047                         memcpy(rss_desc->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
13048                         /*
13049                          * rss->level and rss.types should be set in advance
13050                          * when expanding items for RSS.
13051                          */
13052                         action_flags |= MLX5_FLOW_ACTION_RSS;
13053                         dev_flow->handle->fate_action = rss_desc->shared_rss ?
13054                                 MLX5_FLOW_FATE_SHARED_RSS :
13055                                 MLX5_FLOW_FATE_QUEUE;
13056                         break;
13057                 case MLX5_RTE_FLOW_ACTION_TYPE_AGE:
13058                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13059                         age_act = flow_aso_age_get_by_idx(dev, owner_idx);
13060                         if (flow->age == 0) {
13061                                 flow->age = owner_idx;
13062                                 __atomic_fetch_add(&age_act->refcnt, 1,
13063                                                    __ATOMIC_RELAXED);
13064                         }
13065                         age_act_pos = actions_n++;
13066                         action_flags |= MLX5_FLOW_ACTION_AGE;
13067                         break;
13068                 case RTE_FLOW_ACTION_TYPE_AGE:
13069                         non_shared_age = action->conf;
13070                         age_act_pos = actions_n++;
13071                         action_flags |= MLX5_FLOW_ACTION_AGE;
13072                         break;
13073                 case MLX5_RTE_FLOW_ACTION_TYPE_COUNT:
13074                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13075                         cnt_act = flow_dv_counter_get_by_idx(dev, owner_idx,
13076                                                              NULL);
13077                         MLX5_ASSERT(cnt_act != NULL);
13078                         /**
13079                          * When creating meter drop flow in drop table, the
13080                          * counter should not overwrite the rte flow counter.
13081                          */
13082                         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13083                             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP) {
13084                                 dev_flow->dv.actions[actions_n++] =
13085                                                         cnt_act->action;
13086                         } else {
13087                                 if (flow->counter == 0) {
13088                                         flow->counter = owner_idx;
13089                                         __atomic_fetch_add
13090                                                 (&cnt_act->shared_info.refcnt,
13091                                                  1, __ATOMIC_RELAXED);
13092                                 }
13093                                 /* Save information first, will apply later. */
13094                                 action_flags |= MLX5_FLOW_ACTION_COUNT;
13095                         }
13096                         break;
13097                 case RTE_FLOW_ACTION_TYPE_COUNT:
13098                         if (!priv->sh->cdev->config.devx) {
13099                                 return rte_flow_error_set
13100                                               (error, ENOTSUP,
13101                                                RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
13102                                                NULL,
13103                                                "count action not supported");
13104                         }
13105                         /* Save information first, will apply later. */
13106                         count = action->conf;
13107                         action_flags |= MLX5_FLOW_ACTION_COUNT;
13108                         break;
13109                 case RTE_FLOW_ACTION_TYPE_OF_POP_VLAN:
13110                         dev_flow->dv.actions[actions_n++] =
13111                                                 priv->sh->pop_vlan_action;
13112                         action_flags |= MLX5_FLOW_ACTION_OF_POP_VLAN;
13113                         break;
13114                 case RTE_FLOW_ACTION_TYPE_OF_PUSH_VLAN:
13115                         if (!(action_flags &
13116                               MLX5_FLOW_ACTION_OF_SET_VLAN_VID))
13117                                 flow_dev_get_vlan_info_from_items(items, &vlan);
13118                         vlan.eth_proto = rte_be_to_cpu_16
13119                              ((((const struct rte_flow_action_of_push_vlan *)
13120                                                    actions->conf)->ethertype));
13121                         found_action = mlx5_flow_find_action
13122                                         (actions + 1,
13123                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID);
13124                         if (found_action)
13125                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
13126                         found_action = mlx5_flow_find_action
13127                                         (actions + 1,
13128                                          RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP);
13129                         if (found_action)
13130                                 mlx5_update_vlan_vid_pcp(found_action, &vlan);
13131                         if (flow_dv_create_action_push_vlan
13132                                             (dev, attr, &vlan, dev_flow, error))
13133                                 return -rte_errno;
13134                         dev_flow->dv.actions[actions_n++] =
13135                                         dev_flow->dv.push_vlan_res->action;
13136                         action_flags |= MLX5_FLOW_ACTION_OF_PUSH_VLAN;
13137                         break;
13138                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_PCP:
13139                         /* of_vlan_push action handled this action */
13140                         MLX5_ASSERT(action_flags &
13141                                     MLX5_FLOW_ACTION_OF_PUSH_VLAN);
13142                         break;
13143                 case RTE_FLOW_ACTION_TYPE_OF_SET_VLAN_VID:
13144                         if (action_flags & MLX5_FLOW_ACTION_OF_PUSH_VLAN)
13145                                 break;
13146                         flow_dev_get_vlan_info_from_items(items, &vlan);
13147                         mlx5_update_vlan_vid_pcp(actions, &vlan);
13148                         /* If no VLAN push - this is a modify header action */
13149                         if (flow_dv_convert_action_modify_vlan_vid
13150                                                 (mhdr_res, actions, error))
13151                                 return -rte_errno;
13152                         action_flags |= MLX5_FLOW_ACTION_OF_SET_VLAN_VID;
13153                         break;
13154                 case RTE_FLOW_ACTION_TYPE_VXLAN_ENCAP:
13155                 case RTE_FLOW_ACTION_TYPE_NVGRE_ENCAP:
13156                         if (flow_dv_create_action_l2_encap(dev, actions,
13157                                                            dev_flow,
13158                                                            attr->transfer,
13159                                                            error))
13160                                 return -rte_errno;
13161                         dev_flow->dv.actions[actions_n++] =
13162                                         dev_flow->dv.encap_decap->action;
13163                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
13164                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13165                                 sample_act->action_flags |=
13166                                                         MLX5_FLOW_ACTION_ENCAP;
13167                         break;
13168                 case RTE_FLOW_ACTION_TYPE_VXLAN_DECAP:
13169                 case RTE_FLOW_ACTION_TYPE_NVGRE_DECAP:
13170                         if (flow_dv_create_action_l2_decap(dev, dev_flow,
13171                                                            attr->transfer,
13172                                                            error))
13173                                 return -rte_errno;
13174                         dev_flow->dv.actions[actions_n++] =
13175                                         dev_flow->dv.encap_decap->action;
13176                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13177                         break;
13178                 case RTE_FLOW_ACTION_TYPE_RAW_ENCAP:
13179                         /* Handle encap with preceding decap. */
13180                         if (action_flags & MLX5_FLOW_ACTION_DECAP) {
13181                                 if (flow_dv_create_action_raw_encap
13182                                         (dev, actions, dev_flow, attr, error))
13183                                         return -rte_errno;
13184                                 dev_flow->dv.actions[actions_n++] =
13185                                         dev_flow->dv.encap_decap->action;
13186                         } else {
13187                                 /* Handle encap without preceding decap. */
13188                                 if (flow_dv_create_action_l2_encap
13189                                     (dev, actions, dev_flow, attr->transfer,
13190                                      error))
13191                                         return -rte_errno;
13192                                 dev_flow->dv.actions[actions_n++] =
13193                                         dev_flow->dv.encap_decap->action;
13194                         }
13195                         action_flags |= MLX5_FLOW_ACTION_ENCAP;
13196                         if (action_flags & MLX5_FLOW_ACTION_SAMPLE)
13197                                 sample_act->action_flags |=
13198                                                         MLX5_FLOW_ACTION_ENCAP;
13199                         break;
13200                 case RTE_FLOW_ACTION_TYPE_RAW_DECAP:
13201                         while ((++action)->type == RTE_FLOW_ACTION_TYPE_VOID)
13202                                 ;
13203                         if (action->type != RTE_FLOW_ACTION_TYPE_RAW_ENCAP) {
13204                                 if (flow_dv_create_action_l2_decap
13205                                     (dev, dev_flow, attr->transfer, error))
13206                                         return -rte_errno;
13207                                 dev_flow->dv.actions[actions_n++] =
13208                                         dev_flow->dv.encap_decap->action;
13209                         }
13210                         /* If decap is followed by encap, handle it at encap. */
13211                         action_flags |= MLX5_FLOW_ACTION_DECAP;
13212                         break;
13213                 case MLX5_RTE_FLOW_ACTION_TYPE_JUMP:
13214                         dev_flow->dv.actions[actions_n++] =
13215                                 (void *)(uintptr_t)action->conf;
13216                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13217                         break;
13218                 case RTE_FLOW_ACTION_TYPE_JUMP:
13219                         jump_group = ((const struct rte_flow_action_jump *)
13220                                                         action->conf)->group;
13221                         grp_info.std_tbl_fix = 0;
13222                         if (dev_flow->skip_scale &
13223                                 (1 << MLX5_SCALE_JUMP_FLOW_GROUP_BIT))
13224                                 grp_info.skip_scale = 1;
13225                         else
13226                                 grp_info.skip_scale = 0;
13227                         ret = mlx5_flow_group_to_table(dev, tunnel,
13228                                                        jump_group,
13229                                                        &table,
13230                                                        &grp_info, error);
13231                         if (ret)
13232                                 return ret;
13233                         tbl = flow_dv_tbl_resource_get(dev, table, attr->egress,
13234                                                        attr->transfer,
13235                                                        !!dev_flow->external,
13236                                                        tunnel, jump_group, 0,
13237                                                        0, error);
13238                         if (!tbl)
13239                                 return rte_flow_error_set
13240                                                 (error, errno,
13241                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13242                                                  NULL,
13243                                                  "cannot create jump action.");
13244                         if (flow_dv_jump_tbl_resource_register
13245                             (dev, tbl, dev_flow, error)) {
13246                                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
13247                                 return rte_flow_error_set
13248                                                 (error, errno,
13249                                                  RTE_FLOW_ERROR_TYPE_ACTION,
13250                                                  NULL,
13251                                                  "cannot create jump action.");
13252                         }
13253                         dev_flow->dv.actions[actions_n++] =
13254                                         dev_flow->dv.jump->action;
13255                         action_flags |= MLX5_FLOW_ACTION_JUMP;
13256                         dev_flow->handle->fate_action = MLX5_FLOW_FATE_JUMP;
13257                         sample_act->action_flags |= MLX5_FLOW_ACTION_JUMP;
13258                         num_of_dest++;
13259                         break;
13260                 case RTE_FLOW_ACTION_TYPE_SET_MAC_SRC:
13261                 case RTE_FLOW_ACTION_TYPE_SET_MAC_DST:
13262                         if (flow_dv_convert_action_modify_mac
13263                                         (mhdr_res, actions, error))
13264                                 return -rte_errno;
13265                         action_flags |= actions->type ==
13266                                         RTE_FLOW_ACTION_TYPE_SET_MAC_SRC ?
13267                                         MLX5_FLOW_ACTION_SET_MAC_SRC :
13268                                         MLX5_FLOW_ACTION_SET_MAC_DST;
13269                         break;
13270                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC:
13271                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DST:
13272                         if (flow_dv_convert_action_modify_ipv4
13273                                         (mhdr_res, actions, error))
13274                                 return -rte_errno;
13275                         action_flags |= actions->type ==
13276                                         RTE_FLOW_ACTION_TYPE_SET_IPV4_SRC ?
13277                                         MLX5_FLOW_ACTION_SET_IPV4_SRC :
13278                                         MLX5_FLOW_ACTION_SET_IPV4_DST;
13279                         break;
13280                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC:
13281                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DST:
13282                         if (flow_dv_convert_action_modify_ipv6
13283                                         (mhdr_res, actions, error))
13284                                 return -rte_errno;
13285                         action_flags |= actions->type ==
13286                                         RTE_FLOW_ACTION_TYPE_SET_IPV6_SRC ?
13287                                         MLX5_FLOW_ACTION_SET_IPV6_SRC :
13288                                         MLX5_FLOW_ACTION_SET_IPV6_DST;
13289                         break;
13290                 case RTE_FLOW_ACTION_TYPE_SET_TP_SRC:
13291                 case RTE_FLOW_ACTION_TYPE_SET_TP_DST:
13292                         if (flow_dv_convert_action_modify_tp
13293                                         (mhdr_res, actions, items,
13294                                          &flow_attr, dev_flow, !!(action_flags &
13295                                          MLX5_FLOW_ACTION_DECAP), error))
13296                                 return -rte_errno;
13297                         action_flags |= actions->type ==
13298                                         RTE_FLOW_ACTION_TYPE_SET_TP_SRC ?
13299                                         MLX5_FLOW_ACTION_SET_TP_SRC :
13300                                         MLX5_FLOW_ACTION_SET_TP_DST;
13301                         break;
13302                 case RTE_FLOW_ACTION_TYPE_DEC_TTL:
13303                         if (flow_dv_convert_action_modify_dec_ttl
13304                                         (mhdr_res, items, &flow_attr, dev_flow,
13305                                          !!(action_flags &
13306                                          MLX5_FLOW_ACTION_DECAP), error))
13307                                 return -rte_errno;
13308                         action_flags |= MLX5_FLOW_ACTION_DEC_TTL;
13309                         break;
13310                 case RTE_FLOW_ACTION_TYPE_SET_TTL:
13311                         if (flow_dv_convert_action_modify_ttl
13312                                         (mhdr_res, actions, items, &flow_attr,
13313                                          dev_flow, !!(action_flags &
13314                                          MLX5_FLOW_ACTION_DECAP), error))
13315                                 return -rte_errno;
13316                         action_flags |= MLX5_FLOW_ACTION_SET_TTL;
13317                         break;
13318                 case RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ:
13319                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_SEQ:
13320                         if (flow_dv_convert_action_modify_tcp_seq
13321                                         (mhdr_res, actions, error))
13322                                 return -rte_errno;
13323                         action_flags |= actions->type ==
13324                                         RTE_FLOW_ACTION_TYPE_INC_TCP_SEQ ?
13325                                         MLX5_FLOW_ACTION_INC_TCP_SEQ :
13326                                         MLX5_FLOW_ACTION_DEC_TCP_SEQ;
13327                         break;
13328
13329                 case RTE_FLOW_ACTION_TYPE_INC_TCP_ACK:
13330                 case RTE_FLOW_ACTION_TYPE_DEC_TCP_ACK:
13331                         if (flow_dv_convert_action_modify_tcp_ack
13332                                         (mhdr_res, actions, error))
13333                                 return -rte_errno;
13334                         action_flags |= actions->type ==
13335                                         RTE_FLOW_ACTION_TYPE_INC_TCP_ACK ?
13336                                         MLX5_FLOW_ACTION_INC_TCP_ACK :
13337                                         MLX5_FLOW_ACTION_DEC_TCP_ACK;
13338                         break;
13339                 case MLX5_RTE_FLOW_ACTION_TYPE_TAG:
13340                         if (flow_dv_convert_action_set_reg
13341                                         (mhdr_res, actions, error))
13342                                 return -rte_errno;
13343                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13344                         break;
13345                 case MLX5_RTE_FLOW_ACTION_TYPE_COPY_MREG:
13346                         if (flow_dv_convert_action_copy_mreg
13347                                         (dev, mhdr_res, actions, error))
13348                                 return -rte_errno;
13349                         action_flags |= MLX5_FLOW_ACTION_SET_TAG;
13350                         break;
13351                 case MLX5_RTE_FLOW_ACTION_TYPE_DEFAULT_MISS:
13352                         action_flags |= MLX5_FLOW_ACTION_DEFAULT_MISS;
13353                         dev_flow->handle->fate_action =
13354                                         MLX5_FLOW_FATE_DEFAULT_MISS;
13355                         break;
13356                 case RTE_FLOW_ACTION_TYPE_METER:
13357                         if (!wks->fm)
13358                                 return rte_flow_error_set(error, rte_errno,
13359                                         RTE_FLOW_ERROR_TYPE_ACTION,
13360                                         NULL, "Failed to get meter in flow.");
13361                         /* Set the meter action. */
13362                         dev_flow->dv.actions[actions_n++] =
13363                                 wks->fm->meter_action;
13364                         action_flags |= MLX5_FLOW_ACTION_METER;
13365                         break;
13366                 case RTE_FLOW_ACTION_TYPE_SET_IPV4_DSCP:
13367                         if (flow_dv_convert_action_modify_ipv4_dscp(mhdr_res,
13368                                                               actions, error))
13369                                 return -rte_errno;
13370                         action_flags |= MLX5_FLOW_ACTION_SET_IPV4_DSCP;
13371                         break;
13372                 case RTE_FLOW_ACTION_TYPE_SET_IPV6_DSCP:
13373                         if (flow_dv_convert_action_modify_ipv6_dscp(mhdr_res,
13374                                                               actions, error))
13375                                 return -rte_errno;
13376                         action_flags |= MLX5_FLOW_ACTION_SET_IPV6_DSCP;
13377                         break;
13378                 case RTE_FLOW_ACTION_TYPE_SAMPLE:
13379                         sample_act_pos = actions_n;
13380                         sample = (const struct rte_flow_action_sample *)
13381                                  action->conf;
13382                         actions_n++;
13383                         action_flags |= MLX5_FLOW_ACTION_SAMPLE;
13384                         /* put encap action into group if work with port id */
13385                         if ((action_flags & MLX5_FLOW_ACTION_ENCAP) &&
13386                             (action_flags & MLX5_FLOW_ACTION_PORT_ID))
13387                                 sample_act->action_flags |=
13388                                                         MLX5_FLOW_ACTION_ENCAP;
13389                         break;
13390                 case RTE_FLOW_ACTION_TYPE_MODIFY_FIELD:
13391                         if (flow_dv_convert_action_modify_field
13392                                         (dev, mhdr_res, actions, attr, error))
13393                                 return -rte_errno;
13394                         action_flags |= MLX5_FLOW_ACTION_MODIFY_FIELD;
13395                         break;
13396                 case RTE_FLOW_ACTION_TYPE_CONNTRACK:
13397                         owner_idx = (uint32_t)(uintptr_t)action->conf;
13398                         ct = flow_aso_ct_get_by_idx(dev, owner_idx);
13399                         if (!ct)
13400                                 return rte_flow_error_set(error, EINVAL,
13401                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13402                                                 NULL,
13403                                                 "Failed to get CT object.");
13404                         if (mlx5_aso_ct_available(priv->sh, ct))
13405                                 return rte_flow_error_set(error, rte_errno,
13406                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13407                                                 NULL,
13408                                                 "CT is unavailable.");
13409                         if (ct->is_original)
13410                                 dev_flow->dv.actions[actions_n] =
13411                                                         ct->dr_action_orig;
13412                         else
13413                                 dev_flow->dv.actions[actions_n] =
13414                                                         ct->dr_action_rply;
13415                         if (flow->ct == 0) {
13416                                 flow->indirect_type =
13417                                                 MLX5_INDIRECT_ACTION_TYPE_CT;
13418                                 flow->ct = owner_idx;
13419                                 __atomic_fetch_add(&ct->refcnt, 1,
13420                                                    __ATOMIC_RELAXED);
13421                         }
13422                         actions_n++;
13423                         action_flags |= MLX5_FLOW_ACTION_CT;
13424                         break;
13425                 case RTE_FLOW_ACTION_TYPE_END:
13426                         actions_end = true;
13427                         if (mhdr_res->actions_num) {
13428                                 /* create modify action if needed. */
13429                                 if (flow_dv_modify_hdr_resource_register
13430                                         (dev, mhdr_res, dev_flow, error))
13431                                         return -rte_errno;
13432                                 dev_flow->dv.actions[modify_action_position] =
13433                                         handle->dvh.modify_hdr->action;
13434                         }
13435                         /*
13436                          * Handle AGE and COUNT action by single HW counter
13437                          * when they are not shared.
13438                          */
13439                         if (action_flags & MLX5_FLOW_ACTION_AGE) {
13440                                 if ((non_shared_age && count) ||
13441                                     !flow_hit_aso_supported(priv->sh, attr)) {
13442                                         /* Creates age by counters. */
13443                                         cnt_act = flow_dv_prepare_counter
13444                                                                 (dev, dev_flow,
13445                                                                  flow, count,
13446                                                                  non_shared_age,
13447                                                                  error);
13448                                         if (!cnt_act)
13449                                                 return -rte_errno;
13450                                         dev_flow->dv.actions[age_act_pos] =
13451                                                                 cnt_act->action;
13452                                         break;
13453                                 }
13454                                 if (!flow->age && non_shared_age) {
13455                                         flow->age = flow_dv_aso_age_alloc
13456                                                                 (dev, error);
13457                                         if (!flow->age)
13458                                                 return -rte_errno;
13459                                         flow_dv_aso_age_params_init
13460                                                     (dev, flow->age,
13461                                                      non_shared_age->context ?
13462                                                      non_shared_age->context :
13463                                                      (void *)(uintptr_t)
13464                                                      (dev_flow->flow_idx),
13465                                                      non_shared_age->timeout);
13466                                 }
13467                                 age_act = flow_aso_age_get_by_idx(dev,
13468                                                                   flow->age);
13469                                 dev_flow->dv.actions[age_act_pos] =
13470                                                              age_act->dr_action;
13471                         }
13472                         if (action_flags & MLX5_FLOW_ACTION_COUNT) {
13473                                 /*
13474                                  * Create one count action, to be used
13475                                  * by all sub-flows.
13476                                  */
13477                                 cnt_act = flow_dv_prepare_counter(dev, dev_flow,
13478                                                                   flow, count,
13479                                                                   NULL, error);
13480                                 if (!cnt_act)
13481                                         return -rte_errno;
13482                                 dev_flow->dv.actions[actions_n++] =
13483                                                                 cnt_act->action;
13484                         }
13485                 default:
13486                         break;
13487                 }
13488                 if (mhdr_res->actions_num &&
13489                     modify_action_position == UINT32_MAX)
13490                         modify_action_position = actions_n++;
13491         }
13492         for (; items->type != RTE_FLOW_ITEM_TYPE_END; items++) {
13493                 int tunnel = !!(item_flags & MLX5_FLOW_LAYER_TUNNEL);
13494                 int item_type = items->type;
13495
13496                 if (!mlx5_flow_os_item_supported(item_type))
13497                         return rte_flow_error_set(error, ENOTSUP,
13498                                                   RTE_FLOW_ERROR_TYPE_ITEM,
13499                                                   NULL, "item not supported");
13500                 switch (item_type) {
13501                 case RTE_FLOW_ITEM_TYPE_PORT_ID:
13502                         flow_dv_translate_item_port_id
13503                                 (dev, match_mask, match_value, items, attr);
13504                         last_item = MLX5_FLOW_ITEM_PORT_ID;
13505                         break;
13506                 case RTE_FLOW_ITEM_TYPE_ETH:
13507                         flow_dv_translate_item_eth(match_mask, match_value,
13508                                                    items, tunnel,
13509                                                    dev_flow->dv.group);
13510                         matcher.priority = action_flags &
13511                                         MLX5_FLOW_ACTION_DEFAULT_MISS &&
13512                                         !dev_flow->external ?
13513                                         MLX5_PRIORITY_MAP_L3 :
13514                                         MLX5_PRIORITY_MAP_L2;
13515                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L2 :
13516                                              MLX5_FLOW_LAYER_OUTER_L2;
13517                         break;
13518                 case RTE_FLOW_ITEM_TYPE_VLAN:
13519                         flow_dv_translate_item_vlan(dev_flow,
13520                                                     match_mask, match_value,
13521                                                     items, tunnel,
13522                                                     dev_flow->dv.group);
13523                         matcher.priority = MLX5_PRIORITY_MAP_L2;
13524                         last_item = tunnel ? (MLX5_FLOW_LAYER_INNER_L2 |
13525                                               MLX5_FLOW_LAYER_INNER_VLAN) :
13526                                              (MLX5_FLOW_LAYER_OUTER_L2 |
13527                                               MLX5_FLOW_LAYER_OUTER_VLAN);
13528                         break;
13529                 case RTE_FLOW_ITEM_TYPE_IPV4:
13530                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13531                                                   &item_flags, &tunnel);
13532                         flow_dv_translate_item_ipv4(match_mask, match_value,
13533                                                     items, tunnel,
13534                                                     dev_flow->dv.group);
13535                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13536                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV4 :
13537                                              MLX5_FLOW_LAYER_OUTER_L3_IPV4;
13538                         if (items->mask != NULL &&
13539                             ((const struct rte_flow_item_ipv4 *)
13540                              items->mask)->hdr.next_proto_id) {
13541                                 next_protocol =
13542                                         ((const struct rte_flow_item_ipv4 *)
13543                                          (items->spec))->hdr.next_proto_id;
13544                                 next_protocol &=
13545                                         ((const struct rte_flow_item_ipv4 *)
13546                                          (items->mask))->hdr.next_proto_id;
13547                         } else {
13548                                 /* Reset for inner layer. */
13549                                 next_protocol = 0xff;
13550                         }
13551                         break;
13552                 case RTE_FLOW_ITEM_TYPE_IPV6:
13553                         mlx5_flow_tunnel_ip_check(items, next_protocol,
13554                                                   &item_flags, &tunnel);
13555                         flow_dv_translate_item_ipv6(match_mask, match_value,
13556                                                     items, tunnel,
13557                                                     dev_flow->dv.group);
13558                         matcher.priority = MLX5_PRIORITY_MAP_L3;
13559                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L3_IPV6 :
13560                                              MLX5_FLOW_LAYER_OUTER_L3_IPV6;
13561                         if (items->mask != NULL &&
13562                             ((const struct rte_flow_item_ipv6 *)
13563                              items->mask)->hdr.proto) {
13564                                 next_protocol =
13565                                         ((const struct rte_flow_item_ipv6 *)
13566                                          items->spec)->hdr.proto;
13567                                 next_protocol &=
13568                                         ((const struct rte_flow_item_ipv6 *)
13569                                          items->mask)->hdr.proto;
13570                         } else {
13571                                 /* Reset for inner layer. */
13572                                 next_protocol = 0xff;
13573                         }
13574                         break;
13575                 case RTE_FLOW_ITEM_TYPE_IPV6_FRAG_EXT:
13576                         flow_dv_translate_item_ipv6_frag_ext(match_mask,
13577                                                              match_value,
13578                                                              items, tunnel);
13579                         last_item = tunnel ?
13580                                         MLX5_FLOW_LAYER_INNER_L3_IPV6_FRAG_EXT :
13581                                         MLX5_FLOW_LAYER_OUTER_L3_IPV6_FRAG_EXT;
13582                         if (items->mask != NULL &&
13583                             ((const struct rte_flow_item_ipv6_frag_ext *)
13584                              items->mask)->hdr.next_header) {
13585                                 next_protocol =
13586                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13587                                  items->spec)->hdr.next_header;
13588                                 next_protocol &=
13589                                 ((const struct rte_flow_item_ipv6_frag_ext *)
13590                                  items->mask)->hdr.next_header;
13591                         } else {
13592                                 /* Reset for inner layer. */
13593                                 next_protocol = 0xff;
13594                         }
13595                         break;
13596                 case RTE_FLOW_ITEM_TYPE_TCP:
13597                         flow_dv_translate_item_tcp(match_mask, match_value,
13598                                                    items, tunnel);
13599                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13600                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_TCP :
13601                                              MLX5_FLOW_LAYER_OUTER_L4_TCP;
13602                         break;
13603                 case RTE_FLOW_ITEM_TYPE_UDP:
13604                         flow_dv_translate_item_udp(match_mask, match_value,
13605                                                    items, tunnel);
13606                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13607                         last_item = tunnel ? MLX5_FLOW_LAYER_INNER_L4_UDP :
13608                                              MLX5_FLOW_LAYER_OUTER_L4_UDP;
13609                         break;
13610                 case RTE_FLOW_ITEM_TYPE_GRE:
13611                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13612                         last_item = MLX5_FLOW_LAYER_GRE;
13613                         tunnel_item = items;
13614                         gre_item = items;
13615                         break;
13616                 case RTE_FLOW_ITEM_TYPE_GRE_KEY:
13617                         flow_dv_translate_item_gre_key(match_mask,
13618                                                        match_value, items);
13619                         last_item = MLX5_FLOW_LAYER_GRE_KEY;
13620                         break;
13621                 case RTE_FLOW_ITEM_TYPE_GRE_OPTION:
13622                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13623                         last_item = MLX5_FLOW_LAYER_GRE;
13624                         tunnel_item = items;
13625                         break;
13626                 case RTE_FLOW_ITEM_TYPE_NVGRE:
13627                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13628                         last_item = MLX5_FLOW_LAYER_GRE;
13629                         tunnel_item = items;
13630                         break;
13631                 case RTE_FLOW_ITEM_TYPE_VXLAN:
13632                         flow_dv_translate_item_vxlan(dev, attr,
13633                                                      match_mask, match_value,
13634                                                      items, tunnel);
13635                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13636                         last_item = MLX5_FLOW_LAYER_VXLAN;
13637                         break;
13638                 case RTE_FLOW_ITEM_TYPE_VXLAN_GPE:
13639                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13640                         last_item = MLX5_FLOW_LAYER_VXLAN_GPE;
13641                         tunnel_item = items;
13642                         break;
13643                 case RTE_FLOW_ITEM_TYPE_GENEVE:
13644                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13645                         last_item = MLX5_FLOW_LAYER_GENEVE;
13646                         tunnel_item = items;
13647                         break;
13648                 case RTE_FLOW_ITEM_TYPE_GENEVE_OPT:
13649                         ret = flow_dv_translate_item_geneve_opt(dev, match_mask,
13650                                                           match_value,
13651                                                           items, error);
13652                         if (ret)
13653                                 return rte_flow_error_set(error, -ret,
13654                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13655                                         "cannot create GENEVE TLV option");
13656                         flow->geneve_tlv_option = 1;
13657                         last_item = MLX5_FLOW_LAYER_GENEVE_OPT;
13658                         break;
13659                 case RTE_FLOW_ITEM_TYPE_MPLS:
13660                         flow_dv_translate_item_mpls(match_mask, match_value,
13661                                                     items, last_item, tunnel);
13662                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13663                         last_item = MLX5_FLOW_LAYER_MPLS;
13664                         break;
13665                 case RTE_FLOW_ITEM_TYPE_MARK:
13666                         flow_dv_translate_item_mark(dev, match_mask,
13667                                                     match_value, items);
13668                         last_item = MLX5_FLOW_ITEM_MARK;
13669                         break;
13670                 case RTE_FLOW_ITEM_TYPE_META:
13671                         flow_dv_translate_item_meta(dev, match_mask,
13672                                                     match_value, attr, items);
13673                         last_item = MLX5_FLOW_ITEM_METADATA;
13674                         break;
13675                 case RTE_FLOW_ITEM_TYPE_ICMP:
13676                         flow_dv_translate_item_icmp(match_mask, match_value,
13677                                                     items, tunnel);
13678                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13679                         last_item = MLX5_FLOW_LAYER_ICMP;
13680                         break;
13681                 case RTE_FLOW_ITEM_TYPE_ICMP6:
13682                         flow_dv_translate_item_icmp6(match_mask, match_value,
13683                                                       items, tunnel);
13684                         matcher.priority = MLX5_PRIORITY_MAP_L4;
13685                         last_item = MLX5_FLOW_LAYER_ICMP6;
13686                         break;
13687                 case RTE_FLOW_ITEM_TYPE_TAG:
13688                         flow_dv_translate_item_tag(dev, match_mask,
13689                                                    match_value, items);
13690                         last_item = MLX5_FLOW_ITEM_TAG;
13691                         break;
13692                 case MLX5_RTE_FLOW_ITEM_TYPE_TAG:
13693                         flow_dv_translate_mlx5_item_tag(dev, match_mask,
13694                                                         match_value, items);
13695                         last_item = MLX5_FLOW_ITEM_TAG;
13696                         break;
13697                 case MLX5_RTE_FLOW_ITEM_TYPE_TX_QUEUE:
13698                         flow_dv_translate_item_tx_queue(dev, match_mask,
13699                                                         match_value,
13700                                                         items);
13701                         last_item = MLX5_FLOW_ITEM_TX_QUEUE;
13702                         break;
13703                 case RTE_FLOW_ITEM_TYPE_GTP:
13704                         flow_dv_translate_item_gtp(match_mask, match_value,
13705                                                    items, tunnel);
13706                         matcher.priority = MLX5_TUNNEL_PRIO_GET(rss_desc);
13707                         last_item = MLX5_FLOW_LAYER_GTP;
13708                         break;
13709                 case RTE_FLOW_ITEM_TYPE_GTP_PSC:
13710                         ret = flow_dv_translate_item_gtp_psc(match_mask,
13711                                                           match_value,
13712                                                           items);
13713                         if (ret)
13714                                 return rte_flow_error_set(error, -ret,
13715                                         RTE_FLOW_ERROR_TYPE_ITEM, NULL,
13716                                         "cannot create GTP PSC item");
13717                         last_item = MLX5_FLOW_LAYER_GTP_PSC;
13718                         break;
13719                 case RTE_FLOW_ITEM_TYPE_ECPRI:
13720                         if (!mlx5_flex_parser_ecpri_exist(dev)) {
13721                                 /* Create it only the first time to be used. */
13722                                 ret = mlx5_flex_parser_ecpri_alloc(dev);
13723                                 if (ret)
13724                                         return rte_flow_error_set
13725                                                 (error, -ret,
13726                                                 RTE_FLOW_ERROR_TYPE_ITEM,
13727                                                 NULL,
13728                                                 "cannot create eCPRI parser");
13729                         }
13730                         flow_dv_translate_item_ecpri(dev, match_mask,
13731                                                      match_value, items,
13732                                                      last_item);
13733                         /* No other protocol should follow eCPRI layer. */
13734                         last_item = MLX5_FLOW_LAYER_ECPRI;
13735                         break;
13736                 case RTE_FLOW_ITEM_TYPE_INTEGRITY:
13737                         flow_dv_translate_item_integrity(items, integrity_items,
13738                                                          &last_item);
13739                         break;
13740                 case RTE_FLOW_ITEM_TYPE_CONNTRACK:
13741                         flow_dv_translate_item_aso_ct(dev, match_mask,
13742                                                       match_value, items);
13743                         break;
13744                 case RTE_FLOW_ITEM_TYPE_FLEX:
13745                         flow_dv_translate_item_flex(dev, match_mask,
13746                                                     match_value, items,
13747                                                     dev_flow, tunnel != 0);
13748                         last_item = tunnel ? MLX5_FLOW_ITEM_INNER_FLEX :
13749                                     MLX5_FLOW_ITEM_OUTER_FLEX;
13750                         break;
13751                 default:
13752                         break;
13753                 }
13754                 item_flags |= last_item;
13755         }
13756         /*
13757          * When E-Switch mode is enabled, we have two cases where we need to
13758          * set the source port manually.
13759          * The first one, is in case of Nic steering rule, and the second is
13760          * E-Switch rule where no port_id item was found. In both cases
13761          * the source port is set according the current port in use.
13762          */
13763         if (!(item_flags & MLX5_FLOW_ITEM_PORT_ID) && priv->sh->esw_mode) {
13764                 if (flow_dv_translate_item_port_id(dev, match_mask,
13765                                                    match_value, NULL, attr))
13766                         return -rte_errno;
13767         }
13768         if (item_flags & MLX5_FLOW_ITEM_INTEGRITY) {
13769                 flow_dv_translate_item_integrity_post(match_mask, match_value,
13770                                                       integrity_items,
13771                                                       item_flags);
13772         }
13773         if (item_flags & MLX5_FLOW_LAYER_VXLAN_GPE)
13774                 flow_dv_translate_item_vxlan_gpe(match_mask, match_value,
13775                                                  tunnel_item, item_flags);
13776         else if (item_flags & MLX5_FLOW_LAYER_GENEVE)
13777                 flow_dv_translate_item_geneve(match_mask, match_value,
13778                                               tunnel_item, item_flags);
13779         else if (item_flags & MLX5_FLOW_LAYER_GRE) {
13780                 if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_GRE)
13781                         flow_dv_translate_item_gre(match_mask, match_value,
13782                                                    tunnel_item, item_flags);
13783                 else if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_NVGRE)
13784                         flow_dv_translate_item_nvgre(match_mask, match_value,
13785                                                      tunnel_item, item_flags);
13786                 else if (tunnel_item->type == RTE_FLOW_ITEM_TYPE_GRE_OPTION)
13787                         flow_dv_translate_item_gre_option(match_mask, match_value,
13788                                         tunnel_item, gre_item, item_flags);
13789                 else
13790                         MLX5_ASSERT(false);
13791         }
13792 #ifdef RTE_LIBRTE_MLX5_DEBUG
13793         MLX5_ASSERT(!flow_dv_check_valid_spec(matcher.mask.buf,
13794                                               dev_flow->dv.value.buf));
13795 #endif
13796         /*
13797          * Layers may be already initialized from prefix flow if this dev_flow
13798          * is the suffix flow.
13799          */
13800         handle->layers |= item_flags;
13801         if (action_flags & MLX5_FLOW_ACTION_RSS)
13802                 flow_dv_hashfields_set(dev_flow->handle->layers,
13803                                        rss_desc,
13804                                        &dev_flow->hash_fields);
13805         /* If has RSS action in the sample action, the Sample/Mirror resource
13806          * should be registered after the hash filed be update.
13807          */
13808         if (action_flags & MLX5_FLOW_ACTION_SAMPLE) {
13809                 ret = flow_dv_translate_action_sample(dev,
13810                                                       sample,
13811                                                       dev_flow, attr,
13812                                                       &num_of_dest,
13813                                                       sample_actions,
13814                                                       &sample_res,
13815                                                       error);
13816                 if (ret < 0)
13817                         return ret;
13818                 ret = flow_dv_create_action_sample(dev,
13819                                                    dev_flow,
13820                                                    num_of_dest,
13821                                                    &sample_res,
13822                                                    &mdest_res,
13823                                                    sample_actions,
13824                                                    action_flags,
13825                                                    error);
13826                 if (ret < 0)
13827                         return rte_flow_error_set
13828                                                 (error, rte_errno,
13829                                                 RTE_FLOW_ERROR_TYPE_ACTION,
13830                                                 NULL,
13831                                                 "cannot create sample action");
13832                 if (num_of_dest > 1) {
13833                         dev_flow->dv.actions[sample_act_pos] =
13834                         dev_flow->dv.dest_array_res->action;
13835                 } else {
13836                         dev_flow->dv.actions[sample_act_pos] =
13837                         dev_flow->dv.sample_res->verbs_action;
13838                 }
13839         }
13840         /*
13841          * For multiple destination (sample action with ratio=1), the encap
13842          * action and port id action will be combined into group action.
13843          * So need remove the original these actions in the flow and only
13844          * use the sample action instead of.
13845          */
13846         if (num_of_dest > 1 &&
13847             (sample_act->dr_port_id_action || sample_act->dr_jump_action)) {
13848                 int i;
13849                 void *temp_actions[MLX5_DV_MAX_NUMBER_OF_ACTIONS] = {0};
13850
13851                 for (i = 0; i < actions_n; i++) {
13852                         if ((sample_act->dr_encap_action &&
13853                                 sample_act->dr_encap_action ==
13854                                 dev_flow->dv.actions[i]) ||
13855                                 (sample_act->dr_port_id_action &&
13856                                 sample_act->dr_port_id_action ==
13857                                 dev_flow->dv.actions[i]) ||
13858                                 (sample_act->dr_jump_action &&
13859                                 sample_act->dr_jump_action ==
13860                                 dev_flow->dv.actions[i]))
13861                                 continue;
13862                         temp_actions[tmp_actions_n++] = dev_flow->dv.actions[i];
13863                 }
13864                 memcpy((void *)dev_flow->dv.actions,
13865                                 (void *)temp_actions,
13866                                 tmp_actions_n * sizeof(void *));
13867                 actions_n = tmp_actions_n;
13868         }
13869         dev_flow->dv.actions_n = actions_n;
13870         dev_flow->act_flags = action_flags;
13871         if (wks->skip_matcher_reg)
13872                 return 0;
13873         /* Register matcher. */
13874         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
13875                                     matcher.mask.size);
13876         matcher.priority = mlx5_get_matcher_priority(dev, attr,
13877                                                      matcher.priority,
13878                                                      dev_flow->external);
13879         /**
13880          * When creating meter drop flow in drop table, using original
13881          * 5-tuple match, the matcher priority should be lower than
13882          * mtr_id matcher.
13883          */
13884         if (attr->group == MLX5_FLOW_TABLE_LEVEL_METER &&
13885             dev_flow->dv.table_id == MLX5_MTR_TABLE_ID_DROP &&
13886             matcher.priority <= MLX5_REG_BITS)
13887                 matcher.priority += MLX5_REG_BITS;
13888         /* reserved field no needs to be set to 0 here. */
13889         tbl_key.is_fdb = attr->transfer;
13890         tbl_key.is_egress = attr->egress;
13891         tbl_key.level = dev_flow->dv.group;
13892         tbl_key.id = dev_flow->dv.table_id;
13893         if (flow_dv_matcher_register(dev, &matcher, &tbl_key, dev_flow,
13894                                      tunnel, attr->group, error))
13895                 return -rte_errno;
13896         return 0;
13897 }
13898
13899 /**
13900  * Set hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13901  * and tunnel.
13902  *
13903  * @param[in, out] action
13904  *   Shred RSS action holding hash RX queue objects.
13905  * @param[in] hash_fields
13906  *   Defines combination of packet fields to participate in RX hash.
13907  * @param[in] tunnel
13908  *   Tunnel type
13909  * @param[in] hrxq_idx
13910  *   Hash RX queue index to set.
13911  *
13912  * @return
13913  *   0 on success, otherwise negative errno value.
13914  */
13915 static int
13916 __flow_dv_action_rss_hrxq_set(struct mlx5_shared_action_rss *action,
13917                               const uint64_t hash_fields,
13918                               uint32_t hrxq_idx)
13919 {
13920         uint32_t *hrxqs = action->hrxq;
13921
13922         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13923         case MLX5_RSS_HASH_IPV4:
13924                 /* fall-through. */
13925         case MLX5_RSS_HASH_IPV4_DST_ONLY:
13926                 /* fall-through. */
13927         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
13928                 hrxqs[0] = hrxq_idx;
13929                 return 0;
13930         case MLX5_RSS_HASH_IPV4_TCP:
13931                 /* fall-through. */
13932         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
13933                 /* fall-through. */
13934         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
13935                 hrxqs[1] = hrxq_idx;
13936                 return 0;
13937         case MLX5_RSS_HASH_IPV4_UDP:
13938                 /* fall-through. */
13939         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
13940                 /* fall-through. */
13941         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
13942                 hrxqs[2] = hrxq_idx;
13943                 return 0;
13944         case MLX5_RSS_HASH_IPV6:
13945                 /* fall-through. */
13946         case MLX5_RSS_HASH_IPV6_DST_ONLY:
13947                 /* fall-through. */
13948         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
13949                 hrxqs[3] = hrxq_idx;
13950                 return 0;
13951         case MLX5_RSS_HASH_IPV6_TCP:
13952                 /* fall-through. */
13953         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
13954                 /* fall-through. */
13955         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
13956                 hrxqs[4] = hrxq_idx;
13957                 return 0;
13958         case MLX5_RSS_HASH_IPV6_UDP:
13959                 /* fall-through. */
13960         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
13961                 /* fall-through. */
13962         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
13963                 hrxqs[5] = hrxq_idx;
13964                 return 0;
13965         case MLX5_RSS_HASH_NONE:
13966                 hrxqs[6] = hrxq_idx;
13967                 return 0;
13968         default:
13969                 return -1;
13970         }
13971 }
13972
13973 /**
13974  * Look up for hash RX queue by hash fields (see enum ibv_rx_hash_fields)
13975  * and tunnel.
13976  *
13977  * @param[in] dev
13978  *   Pointer to the Ethernet device structure.
13979  * @param[in] idx
13980  *   Shared RSS action ID holding hash RX queue objects.
13981  * @param[in] hash_fields
13982  *   Defines combination of packet fields to participate in RX hash.
13983  * @param[in] tunnel
13984  *   Tunnel type
13985  *
13986  * @return
13987  *   Valid hash RX queue index, otherwise 0.
13988  */
13989 uint32_t
13990 flow_dv_action_rss_hrxq_lookup(struct rte_eth_dev *dev, uint32_t idx,
13991                                const uint64_t hash_fields)
13992 {
13993         struct mlx5_priv *priv = dev->data->dev_private;
13994         struct mlx5_shared_action_rss *shared_rss =
13995             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
13996         const uint32_t *hrxqs = shared_rss->hrxq;
13997
13998         switch (hash_fields & ~IBV_RX_HASH_INNER) {
13999         case MLX5_RSS_HASH_IPV4:
14000                 /* fall-through. */
14001         case MLX5_RSS_HASH_IPV4_DST_ONLY:
14002                 /* fall-through. */
14003         case MLX5_RSS_HASH_IPV4_SRC_ONLY:
14004                 return hrxqs[0];
14005         case MLX5_RSS_HASH_IPV4_TCP:
14006                 /* fall-through. */
14007         case MLX5_RSS_HASH_IPV4_TCP_DST_ONLY:
14008                 /* fall-through. */
14009         case MLX5_RSS_HASH_IPV4_TCP_SRC_ONLY:
14010                 return hrxqs[1];
14011         case MLX5_RSS_HASH_IPV4_UDP:
14012                 /* fall-through. */
14013         case MLX5_RSS_HASH_IPV4_UDP_DST_ONLY:
14014                 /* fall-through. */
14015         case MLX5_RSS_HASH_IPV4_UDP_SRC_ONLY:
14016                 return hrxqs[2];
14017         case MLX5_RSS_HASH_IPV6:
14018                 /* fall-through. */
14019         case MLX5_RSS_HASH_IPV6_DST_ONLY:
14020                 /* fall-through. */
14021         case MLX5_RSS_HASH_IPV6_SRC_ONLY:
14022                 return hrxqs[3];
14023         case MLX5_RSS_HASH_IPV6_TCP:
14024                 /* fall-through. */
14025         case MLX5_RSS_HASH_IPV6_TCP_DST_ONLY:
14026                 /* fall-through. */
14027         case MLX5_RSS_HASH_IPV6_TCP_SRC_ONLY:
14028                 return hrxqs[4];
14029         case MLX5_RSS_HASH_IPV6_UDP:
14030                 /* fall-through. */
14031         case MLX5_RSS_HASH_IPV6_UDP_DST_ONLY:
14032                 /* fall-through. */
14033         case MLX5_RSS_HASH_IPV6_UDP_SRC_ONLY:
14034                 return hrxqs[5];
14035         case MLX5_RSS_HASH_NONE:
14036                 return hrxqs[6];
14037         default:
14038                 return 0;
14039         }
14040
14041 }
14042
14043 /**
14044  * Apply the flow to the NIC, lock free,
14045  * (mutex should be acquired by caller).
14046  *
14047  * @param[in] dev
14048  *   Pointer to the Ethernet device structure.
14049  * @param[in, out] flow
14050  *   Pointer to flow structure.
14051  * @param[out] error
14052  *   Pointer to error structure.
14053  *
14054  * @return
14055  *   0 on success, a negative errno value otherwise and rte_errno is set.
14056  */
14057 static int
14058 flow_dv_apply(struct rte_eth_dev *dev, struct rte_flow *flow,
14059               struct rte_flow_error *error)
14060 {
14061         struct mlx5_flow_dv_workspace *dv;
14062         struct mlx5_flow_handle *dh;
14063         struct mlx5_flow_handle_dv *dv_h;
14064         struct mlx5_flow *dev_flow;
14065         struct mlx5_priv *priv = dev->data->dev_private;
14066         uint32_t handle_idx;
14067         int n;
14068         int err;
14069         int idx;
14070         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
14071         struct mlx5_flow_rss_desc *rss_desc = &wks->rss_desc;
14072         uint8_t misc_mask;
14073
14074         MLX5_ASSERT(wks);
14075         for (idx = wks->flow_idx - 1; idx >= 0; idx--) {
14076                 dev_flow = &wks->flows[idx];
14077                 dv = &dev_flow->dv;
14078                 dh = dev_flow->handle;
14079                 dv_h = &dh->dvh;
14080                 n = dv->actions_n;
14081                 if (dh->fate_action == MLX5_FLOW_FATE_DROP) {
14082                         if (dv->transfer) {
14083                                 MLX5_ASSERT(priv->sh->dr_drop_action);
14084                                 dv->actions[n++] = priv->sh->dr_drop_action;
14085                         } else {
14086 #ifdef HAVE_MLX5DV_DR
14087                                 /* DR supports drop action placeholder. */
14088                                 MLX5_ASSERT(priv->sh->dr_drop_action);
14089                                 dv->actions[n++] = dv->group ?
14090                                         priv->sh->dr_drop_action :
14091                                         priv->root_drop_action;
14092 #else
14093                                 /* For DV we use the explicit drop queue. */
14094                                 MLX5_ASSERT(priv->drop_queue.hrxq);
14095                                 dv->actions[n++] =
14096                                                 priv->drop_queue.hrxq->action;
14097 #endif
14098                         }
14099                 } else if ((dh->fate_action == MLX5_FLOW_FATE_QUEUE &&
14100                            !dv_h->rix_sample && !dv_h->rix_dest_array)) {
14101                         struct mlx5_hrxq *hrxq;
14102                         uint32_t hrxq_idx;
14103
14104                         hrxq = flow_dv_hrxq_prepare(dev, dev_flow, rss_desc,
14105                                                     &hrxq_idx);
14106                         if (!hrxq) {
14107                                 rte_flow_error_set
14108                                         (error, rte_errno,
14109                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14110                                          "cannot get hash queue");
14111                                 goto error;
14112                         }
14113                         dh->rix_hrxq = hrxq_idx;
14114                         dv->actions[n++] = hrxq->action;
14115                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
14116                         struct mlx5_hrxq *hrxq = NULL;
14117                         uint32_t hrxq_idx;
14118
14119                         hrxq_idx = flow_dv_action_rss_hrxq_lookup(dev,
14120                                                 rss_desc->shared_rss,
14121                                                 dev_flow->hash_fields);
14122                         if (hrxq_idx)
14123                                 hrxq = mlx5_ipool_get
14124                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
14125                                          hrxq_idx);
14126                         if (!hrxq) {
14127                                 rte_flow_error_set
14128                                         (error, rte_errno,
14129                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14130                                          "cannot get hash queue");
14131                                 goto error;
14132                         }
14133                         dh->rix_srss = rss_desc->shared_rss;
14134                         dv->actions[n++] = hrxq->action;
14135                 } else if (dh->fate_action == MLX5_FLOW_FATE_DEFAULT_MISS) {
14136                         if (!priv->sh->default_miss_action) {
14137                                 rte_flow_error_set
14138                                         (error, rte_errno,
14139                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14140                                          "default miss action not be created.");
14141                                 goto error;
14142                         }
14143                         dv->actions[n++] = priv->sh->default_miss_action;
14144                 }
14145                 misc_mask = flow_dv_matcher_enable(dv->value.buf);
14146                 __flow_dv_adjust_buf_size(&dv->value.size, misc_mask);
14147                 err = mlx5_flow_os_create_flow(dv_h->matcher->matcher_object,
14148                                                (void *)&dv->value, n,
14149                                                dv->actions, &dh->drv_flow);
14150                 if (err) {
14151                         rte_flow_error_set
14152                                 (error, errno,
14153                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
14154                                 NULL,
14155                                 (!priv->sh->config.allow_duplicate_pattern &&
14156                                 errno == EEXIST) ?
14157                                 "duplicating pattern is not allowed" :
14158                                 "hardware refuses to create flow");
14159                         goto error;
14160                 }
14161                 if (priv->vmwa_context &&
14162                     dh->vf_vlan.tag && !dh->vf_vlan.created) {
14163                         /*
14164                          * The rule contains the VLAN pattern.
14165                          * For VF we are going to create VLAN
14166                          * interface to make hypervisor set correct
14167                          * e-Switch vport context.
14168                          */
14169                         mlx5_vlan_vmwa_acquire(dev, &dh->vf_vlan);
14170                 }
14171         }
14172         return 0;
14173 error:
14174         err = rte_errno; /* Save rte_errno before cleanup. */
14175         SILIST_FOREACH(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW], flow->dev_handles,
14176                        handle_idx, dh, next) {
14177                 /* hrxq is union, don't clear it if the flag is not set. */
14178                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE && dh->rix_hrxq) {
14179                         mlx5_hrxq_release(dev, dh->rix_hrxq);
14180                         dh->rix_hrxq = 0;
14181                 } else if (dh->fate_action == MLX5_FLOW_FATE_SHARED_RSS) {
14182                         dh->rix_srss = 0;
14183                 }
14184                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14185                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14186         }
14187         rte_errno = err; /* Restore rte_errno. */
14188         return -rte_errno;
14189 }
14190
14191 void
14192 flow_dv_matcher_remove_cb(void *tool_ctx __rte_unused,
14193                           struct mlx5_list_entry *entry)
14194 {
14195         struct mlx5_flow_dv_matcher *resource = container_of(entry,
14196                                                              typeof(*resource),
14197                                                              entry);
14198
14199         claim_zero(mlx5_flow_os_destroy_flow_matcher(resource->matcher_object));
14200         mlx5_free(resource);
14201 }
14202
14203 /**
14204  * Release the flow matcher.
14205  *
14206  * @param dev
14207  *   Pointer to Ethernet device.
14208  * @param port_id
14209  *   Index to port ID action resource.
14210  *
14211  * @return
14212  *   1 while a reference on it exists, 0 when freed.
14213  */
14214 static int
14215 flow_dv_matcher_release(struct rte_eth_dev *dev,
14216                         struct mlx5_flow_handle *handle)
14217 {
14218         struct mlx5_flow_dv_matcher *matcher = handle->dvh.matcher;
14219         struct mlx5_flow_tbl_data_entry *tbl = container_of(matcher->tbl,
14220                                                             typeof(*tbl), tbl);
14221         int ret;
14222
14223         MLX5_ASSERT(matcher->matcher_object);
14224         ret = mlx5_list_unregister(tbl->matchers, &matcher->entry);
14225         flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl->tbl);
14226         return ret;
14227 }
14228
14229 void
14230 flow_dv_encap_decap_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14231 {
14232         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14233         struct mlx5_flow_dv_encap_decap_resource *res =
14234                                        container_of(entry, typeof(*res), entry);
14235
14236         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14237         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_DECAP_ENCAP], res->idx);
14238 }
14239
14240 /**
14241  * Release an encap/decap resource.
14242  *
14243  * @param dev
14244  *   Pointer to Ethernet device.
14245  * @param encap_decap_idx
14246  *   Index of encap decap resource.
14247  *
14248  * @return
14249  *   1 while a reference on it exists, 0 when freed.
14250  */
14251 static int
14252 flow_dv_encap_decap_resource_release(struct rte_eth_dev *dev,
14253                                      uint32_t encap_decap_idx)
14254 {
14255         struct mlx5_priv *priv = dev->data->dev_private;
14256         struct mlx5_flow_dv_encap_decap_resource *resource;
14257
14258         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DECAP_ENCAP],
14259                                   encap_decap_idx);
14260         if (!resource)
14261                 return 0;
14262         MLX5_ASSERT(resource->action);
14263         return mlx5_hlist_unregister(priv->sh->encaps_decaps, &resource->entry);
14264 }
14265
14266 /**
14267  * Release an jump to table action resource.
14268  *
14269  * @param dev
14270  *   Pointer to Ethernet device.
14271  * @param rix_jump
14272  *   Index to the jump action resource.
14273  *
14274  * @return
14275  *   1 while a reference on it exists, 0 when freed.
14276  */
14277 static int
14278 flow_dv_jump_tbl_resource_release(struct rte_eth_dev *dev,
14279                                   uint32_t rix_jump)
14280 {
14281         struct mlx5_priv *priv = dev->data->dev_private;
14282         struct mlx5_flow_tbl_data_entry *tbl_data;
14283
14284         tbl_data = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_JUMP],
14285                                   rix_jump);
14286         if (!tbl_data)
14287                 return 0;
14288         return flow_dv_tbl_resource_release(MLX5_SH(dev), &tbl_data->tbl);
14289 }
14290
14291 void
14292 flow_dv_modify_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14293 {
14294         struct mlx5_flow_dv_modify_hdr_resource *res =
14295                 container_of(entry, typeof(*res), entry);
14296         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14297
14298         claim_zero(mlx5_flow_os_destroy_flow_action(res->action));
14299         mlx5_ipool_free(sh->mdh_ipools[res->actions_num - 1], res->idx);
14300 }
14301
14302 /**
14303  * Release a modify-header resource.
14304  *
14305  * @param dev
14306  *   Pointer to Ethernet device.
14307  * @param handle
14308  *   Pointer to mlx5_flow_handle.
14309  *
14310  * @return
14311  *   1 while a reference on it exists, 0 when freed.
14312  */
14313 static int
14314 flow_dv_modify_hdr_resource_release(struct rte_eth_dev *dev,
14315                                     struct mlx5_flow_handle *handle)
14316 {
14317         struct mlx5_priv *priv = dev->data->dev_private;
14318         struct mlx5_flow_dv_modify_hdr_resource *entry = handle->dvh.modify_hdr;
14319
14320         MLX5_ASSERT(entry->action);
14321         return mlx5_hlist_unregister(priv->sh->modify_cmds, &entry->entry);
14322 }
14323
14324 void
14325 flow_dv_port_id_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14326 {
14327         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14328         struct mlx5_flow_dv_port_id_action_resource *resource =
14329                                   container_of(entry, typeof(*resource), entry);
14330
14331         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14332         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PORT_ID], resource->idx);
14333 }
14334
14335 /**
14336  * Release port ID action resource.
14337  *
14338  * @param dev
14339  *   Pointer to Ethernet device.
14340  * @param handle
14341  *   Pointer to mlx5_flow_handle.
14342  *
14343  * @return
14344  *   1 while a reference on it exists, 0 when freed.
14345  */
14346 static int
14347 flow_dv_port_id_action_resource_release(struct rte_eth_dev *dev,
14348                                         uint32_t port_id)
14349 {
14350         struct mlx5_priv *priv = dev->data->dev_private;
14351         struct mlx5_flow_dv_port_id_action_resource *resource;
14352
14353         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PORT_ID], port_id);
14354         if (!resource)
14355                 return 0;
14356         MLX5_ASSERT(resource->action);
14357         return mlx5_list_unregister(priv->sh->port_id_action_list,
14358                                     &resource->entry);
14359 }
14360
14361 /**
14362  * Release shared RSS action resource.
14363  *
14364  * @param dev
14365  *   Pointer to Ethernet device.
14366  * @param srss
14367  *   Shared RSS action index.
14368  */
14369 static void
14370 flow_dv_shared_rss_action_release(struct rte_eth_dev *dev, uint32_t srss)
14371 {
14372         struct mlx5_priv *priv = dev->data->dev_private;
14373         struct mlx5_shared_action_rss *shared_rss;
14374
14375         shared_rss = mlx5_ipool_get
14376                         (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], srss);
14377         __atomic_sub_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14378 }
14379
14380 void
14381 flow_dv_push_vlan_remove_cb(void *tool_ctx, struct mlx5_list_entry *entry)
14382 {
14383         struct mlx5_dev_ctx_shared *sh = tool_ctx;
14384         struct mlx5_flow_dv_push_vlan_action_resource *resource =
14385                         container_of(entry, typeof(*resource), entry);
14386
14387         claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14388         mlx5_ipool_free(sh->ipool[MLX5_IPOOL_PUSH_VLAN], resource->idx);
14389 }
14390
14391 /**
14392  * Release push vlan action resource.
14393  *
14394  * @param dev
14395  *   Pointer to Ethernet device.
14396  * @param handle
14397  *   Pointer to mlx5_flow_handle.
14398  *
14399  * @return
14400  *   1 while a reference on it exists, 0 when freed.
14401  */
14402 static int
14403 flow_dv_push_vlan_action_resource_release(struct rte_eth_dev *dev,
14404                                           struct mlx5_flow_handle *handle)
14405 {
14406         struct mlx5_priv *priv = dev->data->dev_private;
14407         struct mlx5_flow_dv_push_vlan_action_resource *resource;
14408         uint32_t idx = handle->dvh.rix_push_vlan;
14409
14410         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_PUSH_VLAN], idx);
14411         if (!resource)
14412                 return 0;
14413         MLX5_ASSERT(resource->action);
14414         return mlx5_list_unregister(priv->sh->push_vlan_action_list,
14415                                     &resource->entry);
14416 }
14417
14418 /**
14419  * Release the fate resource.
14420  *
14421  * @param dev
14422  *   Pointer to Ethernet device.
14423  * @param handle
14424  *   Pointer to mlx5_flow_handle.
14425  */
14426 static void
14427 flow_dv_fate_resource_release(struct rte_eth_dev *dev,
14428                                struct mlx5_flow_handle *handle)
14429 {
14430         if (!handle->rix_fate)
14431                 return;
14432         switch (handle->fate_action) {
14433         case MLX5_FLOW_FATE_QUEUE:
14434                 if (!handle->dvh.rix_sample && !handle->dvh.rix_dest_array)
14435                         mlx5_hrxq_release(dev, handle->rix_hrxq);
14436                 break;
14437         case MLX5_FLOW_FATE_JUMP:
14438                 flow_dv_jump_tbl_resource_release(dev, handle->rix_jump);
14439                 break;
14440         case MLX5_FLOW_FATE_PORT_ID:
14441                 flow_dv_port_id_action_resource_release(dev,
14442                                 handle->rix_port_id_action);
14443                 break;
14444         default:
14445                 DRV_LOG(DEBUG, "Incorrect fate action:%d", handle->fate_action);
14446                 break;
14447         }
14448         handle->rix_fate = 0;
14449 }
14450
14451 void
14452 flow_dv_sample_remove_cb(void *tool_ctx __rte_unused,
14453                          struct mlx5_list_entry *entry)
14454 {
14455         struct mlx5_flow_dv_sample_resource *resource = container_of(entry,
14456                                                               typeof(*resource),
14457                                                               entry);
14458         struct rte_eth_dev *dev = resource->dev;
14459         struct mlx5_priv *priv = dev->data->dev_private;
14460
14461         if (resource->verbs_action)
14462                 claim_zero(mlx5_flow_os_destroy_flow_action
14463                                                       (resource->verbs_action));
14464         if (resource->normal_path_tbl)
14465                 flow_dv_tbl_resource_release(MLX5_SH(dev),
14466                                              resource->normal_path_tbl);
14467         flow_dv_sample_sub_actions_release(dev, &resource->sample_idx);
14468         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_SAMPLE], resource->idx);
14469         DRV_LOG(DEBUG, "sample resource %p: removed", (void *)resource);
14470 }
14471
14472 /**
14473  * Release an sample resource.
14474  *
14475  * @param dev
14476  *   Pointer to Ethernet device.
14477  * @param handle
14478  *   Pointer to mlx5_flow_handle.
14479  *
14480  * @return
14481  *   1 while a reference on it exists, 0 when freed.
14482  */
14483 static int
14484 flow_dv_sample_resource_release(struct rte_eth_dev *dev,
14485                                      struct mlx5_flow_handle *handle)
14486 {
14487         struct mlx5_priv *priv = dev->data->dev_private;
14488         struct mlx5_flow_dv_sample_resource *resource;
14489
14490         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_SAMPLE],
14491                                   handle->dvh.rix_sample);
14492         if (!resource)
14493                 return 0;
14494         MLX5_ASSERT(resource->verbs_action);
14495         return mlx5_list_unregister(priv->sh->sample_action_list,
14496                                     &resource->entry);
14497 }
14498
14499 void
14500 flow_dv_dest_array_remove_cb(void *tool_ctx __rte_unused,
14501                              struct mlx5_list_entry *entry)
14502 {
14503         struct mlx5_flow_dv_dest_array_resource *resource =
14504                         container_of(entry, typeof(*resource), entry);
14505         struct rte_eth_dev *dev = resource->dev;
14506         struct mlx5_priv *priv = dev->data->dev_private;
14507         uint32_t i = 0;
14508
14509         MLX5_ASSERT(resource->action);
14510         if (resource->action)
14511                 claim_zero(mlx5_flow_os_destroy_flow_action(resource->action));
14512         for (; i < resource->num_of_dest; i++)
14513                 flow_dv_sample_sub_actions_release(dev,
14514                                                    &resource->sample_idx[i]);
14515         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY], resource->idx);
14516         DRV_LOG(DEBUG, "destination array resource %p: removed",
14517                 (void *)resource);
14518 }
14519
14520 /**
14521  * Release an destination array resource.
14522  *
14523  * @param dev
14524  *   Pointer to Ethernet device.
14525  * @param handle
14526  *   Pointer to mlx5_flow_handle.
14527  *
14528  * @return
14529  *   1 while a reference on it exists, 0 when freed.
14530  */
14531 static int
14532 flow_dv_dest_array_resource_release(struct rte_eth_dev *dev,
14533                                     struct mlx5_flow_handle *handle)
14534 {
14535         struct mlx5_priv *priv = dev->data->dev_private;
14536         struct mlx5_flow_dv_dest_array_resource *resource;
14537
14538         resource = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_DEST_ARRAY],
14539                                   handle->dvh.rix_dest_array);
14540         if (!resource)
14541                 return 0;
14542         MLX5_ASSERT(resource->action);
14543         return mlx5_list_unregister(priv->sh->dest_array_list,
14544                                     &resource->entry);
14545 }
14546
14547 static void
14548 flow_dv_geneve_tlv_option_resource_release(struct rte_eth_dev *dev)
14549 {
14550         struct mlx5_priv *priv = dev->data->dev_private;
14551         struct mlx5_dev_ctx_shared *sh = priv->sh;
14552         struct mlx5_geneve_tlv_option_resource *geneve_opt_resource =
14553                                 sh->geneve_tlv_option_resource;
14554         rte_spinlock_lock(&sh->geneve_tlv_opt_sl);
14555         if (geneve_opt_resource) {
14556                 if (!(__atomic_sub_fetch(&geneve_opt_resource->refcnt, 1,
14557                                          __ATOMIC_RELAXED))) {
14558                         claim_zero(mlx5_devx_cmd_destroy
14559                                         (geneve_opt_resource->obj));
14560                         mlx5_free(sh->geneve_tlv_option_resource);
14561                         sh->geneve_tlv_option_resource = NULL;
14562                 }
14563         }
14564         rte_spinlock_unlock(&sh->geneve_tlv_opt_sl);
14565 }
14566
14567 /**
14568  * Remove the flow from the NIC but keeps it in memory.
14569  * Lock free, (mutex should be acquired by caller).
14570  *
14571  * @param[in] dev
14572  *   Pointer to Ethernet device.
14573  * @param[in, out] flow
14574  *   Pointer to flow structure.
14575  */
14576 static void
14577 flow_dv_remove(struct rte_eth_dev *dev, struct rte_flow *flow)
14578 {
14579         struct mlx5_flow_handle *dh;
14580         uint32_t handle_idx;
14581         struct mlx5_priv *priv = dev->data->dev_private;
14582
14583         if (!flow)
14584                 return;
14585         handle_idx = flow->dev_handles;
14586         while (handle_idx) {
14587                 dh = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14588                                     handle_idx);
14589                 if (!dh)
14590                         return;
14591                 if (dh->drv_flow) {
14592                         claim_zero(mlx5_flow_os_destroy_flow(dh->drv_flow));
14593                         dh->drv_flow = NULL;
14594                 }
14595                 if (dh->fate_action == MLX5_FLOW_FATE_QUEUE)
14596                         flow_dv_fate_resource_release(dev, dh);
14597                 if (dh->vf_vlan.tag && dh->vf_vlan.created)
14598                         mlx5_vlan_vmwa_release(dev, &dh->vf_vlan);
14599                 handle_idx = dh->next.next;
14600         }
14601 }
14602
14603 /**
14604  * Remove the flow from the NIC and the memory.
14605  * Lock free, (mutex should be acquired by caller).
14606  *
14607  * @param[in] dev
14608  *   Pointer to the Ethernet device structure.
14609  * @param[in, out] flow
14610  *   Pointer to flow structure.
14611  */
14612 static void
14613 flow_dv_destroy(struct rte_eth_dev *dev, struct rte_flow *flow)
14614 {
14615         struct mlx5_flow_handle *dev_handle;
14616         struct mlx5_priv *priv = dev->data->dev_private;
14617         struct mlx5_flow_meter_info *fm = NULL;
14618         uint32_t srss = 0;
14619
14620         if (!flow)
14621                 return;
14622         flow_dv_remove(dev, flow);
14623         if (flow->counter) {
14624                 flow_dv_counter_free(dev, flow->counter);
14625                 flow->counter = 0;
14626         }
14627         if (flow->meter) {
14628                 fm = flow_dv_meter_find_by_idx(priv, flow->meter);
14629                 if (fm)
14630                         mlx5_flow_meter_detach(priv, fm);
14631                 flow->meter = 0;
14632         }
14633         /* Keep the current age handling by default. */
14634         if (flow->indirect_type == MLX5_INDIRECT_ACTION_TYPE_CT && flow->ct)
14635                 flow_dv_aso_ct_release(dev, flow->ct, NULL);
14636         else if (flow->age)
14637                 flow_dv_aso_age_release(dev, flow->age);
14638         if (flow->geneve_tlv_option) {
14639                 flow_dv_geneve_tlv_option_resource_release(dev);
14640                 flow->geneve_tlv_option = 0;
14641         }
14642         while (flow->dev_handles) {
14643                 uint32_t tmp_idx = flow->dev_handles;
14644
14645                 dev_handle = mlx5_ipool_get(priv->sh->ipool
14646                                             [MLX5_IPOOL_MLX5_FLOW], tmp_idx);
14647                 if (!dev_handle)
14648                         return;
14649                 flow->dev_handles = dev_handle->next.next;
14650                 while (dev_handle->flex_item) {
14651                         int index = rte_bsf32(dev_handle->flex_item);
14652
14653                         mlx5_flex_release_index(dev, index);
14654                         dev_handle->flex_item &= ~(uint8_t)RTE_BIT32(index);
14655                 }
14656                 if (dev_handle->dvh.matcher)
14657                         flow_dv_matcher_release(dev, dev_handle);
14658                 if (dev_handle->dvh.rix_sample)
14659                         flow_dv_sample_resource_release(dev, dev_handle);
14660                 if (dev_handle->dvh.rix_dest_array)
14661                         flow_dv_dest_array_resource_release(dev, dev_handle);
14662                 if (dev_handle->dvh.rix_encap_decap)
14663                         flow_dv_encap_decap_resource_release(dev,
14664                                 dev_handle->dvh.rix_encap_decap);
14665                 if (dev_handle->dvh.modify_hdr)
14666                         flow_dv_modify_hdr_resource_release(dev, dev_handle);
14667                 if (dev_handle->dvh.rix_push_vlan)
14668                         flow_dv_push_vlan_action_resource_release(dev,
14669                                                                   dev_handle);
14670                 if (dev_handle->dvh.rix_tag)
14671                         flow_dv_tag_release(dev,
14672                                             dev_handle->dvh.rix_tag);
14673                 if (dev_handle->fate_action != MLX5_FLOW_FATE_SHARED_RSS)
14674                         flow_dv_fate_resource_release(dev, dev_handle);
14675                 else if (!srss)
14676                         srss = dev_handle->rix_srss;
14677                 if (fm && dev_handle->is_meter_flow_id &&
14678                     dev_handle->split_flow_id)
14679                         mlx5_ipool_free(fm->flow_ipool,
14680                                         dev_handle->split_flow_id);
14681                 else if (dev_handle->split_flow_id &&
14682                     !dev_handle->is_meter_flow_id)
14683                         mlx5_ipool_free(priv->sh->ipool
14684                                         [MLX5_IPOOL_RSS_EXPANTION_FLOW_ID],
14685                                         dev_handle->split_flow_id);
14686                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW],
14687                            tmp_idx);
14688         }
14689         if (srss)
14690                 flow_dv_shared_rss_action_release(dev, srss);
14691 }
14692
14693 /**
14694  * Release array of hash RX queue objects.
14695  * Helper function.
14696  *
14697  * @param[in] dev
14698  *   Pointer to the Ethernet device structure.
14699  * @param[in, out] hrxqs
14700  *   Array of hash RX queue objects.
14701  *
14702  * @return
14703  *   Total number of references to hash RX queue objects in *hrxqs* array
14704  *   after this operation.
14705  */
14706 static int
14707 __flow_dv_hrxqs_release(struct rte_eth_dev *dev,
14708                         uint32_t (*hrxqs)[MLX5_RSS_HASH_FIELDS_LEN])
14709 {
14710         size_t i;
14711         int remaining = 0;
14712
14713         for (i = 0; i < RTE_DIM(*hrxqs); i++) {
14714                 int ret = mlx5_hrxq_release(dev, (*hrxqs)[i]);
14715
14716                 if (!ret)
14717                         (*hrxqs)[i] = 0;
14718                 remaining += ret;
14719         }
14720         return remaining;
14721 }
14722
14723 /**
14724  * Release all hash RX queue objects representing shared RSS action.
14725  *
14726  * @param[in] dev
14727  *   Pointer to the Ethernet device structure.
14728  * @param[in, out] action
14729  *   Shared RSS action to remove hash RX queue objects from.
14730  *
14731  * @return
14732  *   Total number of references to hash RX queue objects stored in *action*
14733  *   after this operation.
14734  *   Expected to be 0 if no external references held.
14735  */
14736 static int
14737 __flow_dv_action_rss_hrxqs_release(struct rte_eth_dev *dev,
14738                                  struct mlx5_shared_action_rss *shared_rss)
14739 {
14740         return __flow_dv_hrxqs_release(dev, &shared_rss->hrxq);
14741 }
14742
14743 /**
14744  * Adjust L3/L4 hash value of pre-created shared RSS hrxq according to
14745  * user input.
14746  *
14747  * Only one hash value is available for one L3+L4 combination:
14748  * for example:
14749  * MLX5_RSS_HASH_IPV4, MLX5_RSS_HASH_IPV4_SRC_ONLY, and
14750  * MLX5_RSS_HASH_IPV4_DST_ONLY are mutually exclusive so they can share
14751  * same slot in mlx5_rss_hash_fields.
14752  *
14753  * @param[in] rss_types
14754  *   RSS type.
14755  * @param[in, out] hash_field
14756  *   hash_field variable needed to be adjusted.
14757  *
14758  * @return
14759  *   void
14760  */
14761 void
14762 flow_dv_action_rss_l34_hash_adjust(uint64_t rss_types,
14763                                    uint64_t *hash_field)
14764 {
14765         switch (*hash_field & ~IBV_RX_HASH_INNER) {
14766         case MLX5_RSS_HASH_IPV4:
14767                 if (rss_types & MLX5_IPV4_LAYER_TYPES) {
14768                         *hash_field &= ~MLX5_RSS_HASH_IPV4;
14769                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14770                                 *hash_field |= IBV_RX_HASH_DST_IPV4;
14771                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14772                                 *hash_field |= IBV_RX_HASH_SRC_IPV4;
14773                         else
14774                                 *hash_field |= MLX5_RSS_HASH_IPV4;
14775                 }
14776                 return;
14777         case MLX5_RSS_HASH_IPV6:
14778                 if (rss_types & MLX5_IPV6_LAYER_TYPES) {
14779                         *hash_field &= ~MLX5_RSS_HASH_IPV6;
14780                         if (rss_types & RTE_ETH_RSS_L3_DST_ONLY)
14781                                 *hash_field |= IBV_RX_HASH_DST_IPV6;
14782                         else if (rss_types & RTE_ETH_RSS_L3_SRC_ONLY)
14783                                 *hash_field |= IBV_RX_HASH_SRC_IPV6;
14784                         else
14785                                 *hash_field |= MLX5_RSS_HASH_IPV6;
14786                 }
14787                 return;
14788         case MLX5_RSS_HASH_IPV4_UDP:
14789                 /* fall-through. */
14790         case MLX5_RSS_HASH_IPV6_UDP:
14791                 if (rss_types & RTE_ETH_RSS_UDP) {
14792                         *hash_field &= ~MLX5_UDP_IBV_RX_HASH;
14793                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14794                                 *hash_field |= IBV_RX_HASH_DST_PORT_UDP;
14795                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14796                                 *hash_field |= IBV_RX_HASH_SRC_PORT_UDP;
14797                         else
14798                                 *hash_field |= MLX5_UDP_IBV_RX_HASH;
14799                 }
14800                 return;
14801         case MLX5_RSS_HASH_IPV4_TCP:
14802                 /* fall-through. */
14803         case MLX5_RSS_HASH_IPV6_TCP:
14804                 if (rss_types & RTE_ETH_RSS_TCP) {
14805                         *hash_field &= ~MLX5_TCP_IBV_RX_HASH;
14806                         if (rss_types & RTE_ETH_RSS_L4_DST_ONLY)
14807                                 *hash_field |= IBV_RX_HASH_DST_PORT_TCP;
14808                         else if (rss_types & RTE_ETH_RSS_L4_SRC_ONLY)
14809                                 *hash_field |= IBV_RX_HASH_SRC_PORT_TCP;
14810                         else
14811                                 *hash_field |= MLX5_TCP_IBV_RX_HASH;
14812                 }
14813                 return;
14814         default:
14815                 return;
14816         }
14817 }
14818
14819 /**
14820  * Setup shared RSS action.
14821  * Prepare set of hash RX queue objects sufficient to handle all valid
14822  * hash_fields combinations (see enum ibv_rx_hash_fields).
14823  *
14824  * @param[in] dev
14825  *   Pointer to the Ethernet device structure.
14826  * @param[in] action_idx
14827  *   Shared RSS action ipool index.
14828  * @param[in, out] action
14829  *   Partially initialized shared RSS action.
14830  * @param[out] error
14831  *   Perform verbose error reporting if not NULL. Initialized in case of
14832  *   error only.
14833  *
14834  * @return
14835  *   0 on success, otherwise negative errno value.
14836  */
14837 static int
14838 __flow_dv_action_rss_setup(struct rte_eth_dev *dev,
14839                            uint32_t action_idx,
14840                            struct mlx5_shared_action_rss *shared_rss,
14841                            struct rte_flow_error *error)
14842 {
14843         struct mlx5_priv *priv = dev->data->dev_private;
14844         struct mlx5_flow_rss_desc rss_desc = { 0 };
14845         size_t i;
14846         int err;
14847
14848         shared_rss->ind_tbl = mlx5_ind_table_obj_new
14849                               (dev, shared_rss->origin.queue,
14850                                shared_rss->origin.queue_num,
14851                                true,
14852                                !!dev->data->dev_started);
14853         if (!shared_rss->ind_tbl)
14854                 return rte_flow_error_set(error, rte_errno,
14855                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14856                                           "cannot setup indirection table");
14857         memcpy(rss_desc.key, shared_rss->origin.key, MLX5_RSS_HASH_KEY_LEN);
14858         rss_desc.key_len = MLX5_RSS_HASH_KEY_LEN;
14859         rss_desc.const_q = shared_rss->origin.queue;
14860         rss_desc.queue_num = shared_rss->origin.queue_num;
14861         /* Set non-zero value to indicate a shared RSS. */
14862         rss_desc.shared_rss = action_idx;
14863         rss_desc.ind_tbl = shared_rss->ind_tbl;
14864         if (priv->sh->config.dv_flow_en == 2)
14865                 rss_desc.hws_flags = MLX5DR_ACTION_FLAG_HWS_RX;
14866         for (i = 0; i < MLX5_RSS_HASH_FIELDS_LEN; i++) {
14867                 struct mlx5_hrxq *hrxq;
14868                 uint64_t hash_fields = mlx5_rss_hash_fields[i];
14869                 int tunnel = 0;
14870
14871                 flow_dv_action_rss_l34_hash_adjust(shared_rss->origin.types,
14872                                                    &hash_fields);
14873                 if (shared_rss->origin.level > 1) {
14874                         hash_fields |= IBV_RX_HASH_INNER;
14875                         tunnel = 1;
14876                 }
14877                 rss_desc.tunnel = tunnel;
14878                 rss_desc.hash_fields = hash_fields;
14879                 hrxq = mlx5_hrxq_get(dev, &rss_desc);
14880                 if (!hrxq) {
14881                         rte_flow_error_set
14882                                 (error, rte_errno,
14883                                  RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14884                                  "cannot get hash queue");
14885                         goto error_hrxq_new;
14886                 }
14887                 err = __flow_dv_action_rss_hrxq_set
14888                         (shared_rss, hash_fields, hrxq->idx);
14889                 MLX5_ASSERT(!err);
14890         }
14891         return 0;
14892 error_hrxq_new:
14893         err = rte_errno;
14894         __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
14895         if (!mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl, true))
14896                 shared_rss->ind_tbl = NULL;
14897         rte_errno = err;
14898         return -rte_errno;
14899 }
14900
14901 /**
14902  * Create shared RSS action.
14903  *
14904  * @param[in] dev
14905  *   Pointer to the Ethernet device structure.
14906  * @param[in] conf
14907  *   Shared action configuration.
14908  * @param[in] rss
14909  *   RSS action specification used to create shared action.
14910  * @param[out] error
14911  *   Perform verbose error reporting if not NULL. Initialized in case of
14912  *   error only.
14913  *
14914  * @return
14915  *   A valid shared action ID in case of success, 0 otherwise and
14916  *   rte_errno is set.
14917  */
14918 static uint32_t
14919 __flow_dv_action_rss_create(struct rte_eth_dev *dev,
14920                             const struct rte_flow_indir_action_conf *conf,
14921                             const struct rte_flow_action_rss *rss,
14922                             struct rte_flow_error *error)
14923 {
14924         struct mlx5_priv *priv = dev->data->dev_private;
14925         struct mlx5_shared_action_rss *shared_rss = NULL;
14926         struct rte_flow_action_rss *origin;
14927         const uint8_t *rss_key;
14928         uint32_t idx;
14929
14930         RTE_SET_USED(conf);
14931         shared_rss = mlx5_ipool_zmalloc
14932                          (priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], &idx);
14933         if (!shared_rss) {
14934                 rte_flow_error_set(error, ENOMEM,
14935                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14936                                    "cannot allocate resource memory");
14937                 goto error_rss_init;
14938         }
14939         if (idx > (1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET)) {
14940                 rte_flow_error_set(error, E2BIG,
14941                                    RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
14942                                    "rss action number out of range");
14943                 goto error_rss_init;
14944         }
14945         origin = &shared_rss->origin;
14946         origin->func = rss->func;
14947         origin->level = rss->level;
14948         /* RSS type 0 indicates default RSS type (RTE_ETH_RSS_IP). */
14949         origin->types = !rss->types ? RTE_ETH_RSS_IP : rss->types;
14950         /* NULL RSS key indicates default RSS key. */
14951         rss_key = !rss->key ? rss_hash_default_key : rss->key;
14952         memcpy(shared_rss->key, rss_key, MLX5_RSS_HASH_KEY_LEN);
14953         origin->key = &shared_rss->key[0];
14954         origin->key_len = MLX5_RSS_HASH_KEY_LEN;
14955         origin->queue = rss->queue;
14956         origin->queue_num = rss->queue_num;
14957         if (__flow_dv_action_rss_setup(dev, idx, shared_rss, error))
14958                 goto error_rss_init;
14959         /* Update queue with indirect table queue memoyr. */
14960         origin->queue = shared_rss->ind_tbl->queues;
14961         rte_spinlock_init(&shared_rss->action_rss_sl);
14962         __atomic_add_fetch(&shared_rss->refcnt, 1, __ATOMIC_RELAXED);
14963         rte_spinlock_lock(&priv->shared_act_sl);
14964         ILIST_INSERT(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14965                      &priv->rss_shared_actions, idx, shared_rss, next);
14966         rte_spinlock_unlock(&priv->shared_act_sl);
14967         return idx;
14968 error_rss_init:
14969         if (shared_rss) {
14970                 if (shared_rss->ind_tbl)
14971                         mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl,
14972                                                    !!dev->data->dev_started);
14973                 mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
14974                                 idx);
14975         }
14976         return 0;
14977 }
14978
14979 /**
14980  * Destroy the shared RSS action.
14981  * Release related hash RX queue objects.
14982  *
14983  * @param[in] dev
14984  *   Pointer to the Ethernet device structure.
14985  * @param[in] idx
14986  *   The shared RSS action object ID to be removed.
14987  * @param[out] error
14988  *   Perform verbose error reporting if not NULL. Initialized in case of
14989  *   error only.
14990  *
14991  * @return
14992  *   0 on success, otherwise negative errno value.
14993  */
14994 static int
14995 __flow_dv_action_rss_release(struct rte_eth_dev *dev, uint32_t idx,
14996                              struct rte_flow_error *error)
14997 {
14998         struct mlx5_priv *priv = dev->data->dev_private;
14999         struct mlx5_shared_action_rss *shared_rss =
15000             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
15001         uint32_t old_refcnt = 1;
15002         int remaining;
15003
15004         if (!shared_rss)
15005                 return rte_flow_error_set(error, EINVAL,
15006                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15007                                           "invalid shared action");
15008         if (!__atomic_compare_exchange_n(&shared_rss->refcnt, &old_refcnt,
15009                                          0, 0, __ATOMIC_ACQUIRE,
15010                                          __ATOMIC_RELAXED))
15011                 return rte_flow_error_set(error, EBUSY,
15012                                           RTE_FLOW_ERROR_TYPE_ACTION,
15013                                           NULL,
15014                                           "shared rss has references");
15015         remaining = __flow_dv_action_rss_hrxqs_release(dev, shared_rss);
15016         if (remaining)
15017                 return rte_flow_error_set(error, EBUSY,
15018                                           RTE_FLOW_ERROR_TYPE_ACTION,
15019                                           NULL,
15020                                           "shared rss hrxq has references");
15021         remaining = mlx5_ind_table_obj_release(dev, shared_rss->ind_tbl,
15022                                                !!dev->data->dev_started);
15023         if (remaining)
15024                 return rte_flow_error_set(error, EBUSY,
15025                                           RTE_FLOW_ERROR_TYPE_ACTION,
15026                                           NULL,
15027                                           "shared rss indirection table has"
15028                                           " references");
15029         rte_spinlock_lock(&priv->shared_act_sl);
15030         ILIST_REMOVE(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
15031                      &priv->rss_shared_actions, idx, shared_rss, next);
15032         rte_spinlock_unlock(&priv->shared_act_sl);
15033         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS],
15034                         idx);
15035         return 0;
15036 }
15037
15038 /**
15039  * Create indirect action, lock free,
15040  * (mutex should be acquired by caller).
15041  * Dispatcher for action type specific call.
15042  *
15043  * @param[in] dev
15044  *   Pointer to the Ethernet device structure.
15045  * @param[in] conf
15046  *   Shared action configuration.
15047  * @param[in] action
15048  *   Action specification used to create indirect action.
15049  * @param[out] error
15050  *   Perform verbose error reporting if not NULL. Initialized in case of
15051  *   error only.
15052  *
15053  * @return
15054  *   A valid shared action handle in case of success, NULL otherwise and
15055  *   rte_errno is set.
15056  */
15057 struct rte_flow_action_handle *
15058 flow_dv_action_create(struct rte_eth_dev *dev,
15059                       const struct rte_flow_indir_action_conf *conf,
15060                       const struct rte_flow_action *action,
15061                       struct rte_flow_error *err)
15062 {
15063         struct mlx5_priv *priv = dev->data->dev_private;
15064         uint32_t age_idx = 0;
15065         uint32_t idx = 0;
15066         uint32_t ret = 0;
15067
15068         switch (action->type) {
15069         case RTE_FLOW_ACTION_TYPE_RSS:
15070                 ret = __flow_dv_action_rss_create(dev, conf, action->conf, err);
15071                 idx = (MLX5_INDIRECT_ACTION_TYPE_RSS <<
15072                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
15073                 break;
15074         case RTE_FLOW_ACTION_TYPE_AGE:
15075                 age_idx = flow_dv_aso_age_alloc(dev, err);
15076                 if (!age_idx) {
15077                         ret = -rte_errno;
15078                         break;
15079                 }
15080                 idx = (MLX5_INDIRECT_ACTION_TYPE_AGE <<
15081                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | age_idx;
15082                 flow_dv_aso_age_params_init(dev, age_idx,
15083                                         ((const struct rte_flow_action_age *)
15084                                                 action->conf)->context ?
15085                                         ((const struct rte_flow_action_age *)
15086                                                 action->conf)->context :
15087                                         (void *)(uintptr_t)idx,
15088                                         ((const struct rte_flow_action_age *)
15089                                                 action->conf)->timeout);
15090                 ret = age_idx;
15091                 break;
15092         case RTE_FLOW_ACTION_TYPE_COUNT:
15093                 ret = flow_dv_translate_create_counter(dev, NULL, NULL, NULL);
15094                 idx = (MLX5_INDIRECT_ACTION_TYPE_COUNT <<
15095                        MLX5_INDIRECT_ACTION_TYPE_OFFSET) | ret;
15096                 break;
15097         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
15098                 ret = flow_dv_translate_create_conntrack(dev, action->conf,
15099                                                          err);
15100                 idx = MLX5_INDIRECT_ACT_CT_GEN_IDX(PORT_ID(priv), ret);
15101                 break;
15102         default:
15103                 rte_flow_error_set(err, ENOTSUP, RTE_FLOW_ERROR_TYPE_ACTION,
15104                                    NULL, "action type not supported");
15105                 break;
15106         }
15107         return ret ? (struct rte_flow_action_handle *)(uintptr_t)idx : NULL;
15108 }
15109
15110 /**
15111  * Destroy the indirect action.
15112  * Release action related resources on the NIC and the memory.
15113  * Lock free, (mutex should be acquired by caller).
15114  * Dispatcher for action type specific call.
15115  *
15116  * @param[in] dev
15117  *   Pointer to the Ethernet device structure.
15118  * @param[in] handle
15119  *   The indirect action object handle to be removed.
15120  * @param[out] error
15121  *   Perform verbose error reporting if not NULL. Initialized in case of
15122  *   error only.
15123  *
15124  * @return
15125  *   0 on success, otherwise negative errno value.
15126  */
15127 int
15128 flow_dv_action_destroy(struct rte_eth_dev *dev,
15129                        struct rte_flow_action_handle *handle,
15130                        struct rte_flow_error *error)
15131 {
15132         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15133         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15134         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15135         struct mlx5_flow_counter *cnt;
15136         uint32_t no_flow_refcnt = 1;
15137         int ret;
15138
15139         switch (type) {
15140         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15141                 return __flow_dv_action_rss_release(dev, idx, error);
15142         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
15143                 cnt = flow_dv_counter_get_by_idx(dev, idx, NULL);
15144                 if (!__atomic_compare_exchange_n(&cnt->shared_info.refcnt,
15145                                                  &no_flow_refcnt, 1, false,
15146                                                  __ATOMIC_ACQUIRE,
15147                                                  __ATOMIC_RELAXED))
15148                         return rte_flow_error_set(error, EBUSY,
15149                                                   RTE_FLOW_ERROR_TYPE_ACTION,
15150                                                   NULL,
15151                                                   "Indirect count action has references");
15152                 flow_dv_counter_free(dev, idx);
15153                 return 0;
15154         case MLX5_INDIRECT_ACTION_TYPE_AGE:
15155                 ret = flow_dv_aso_age_release(dev, idx);
15156                 if (ret)
15157                         /*
15158                          * In this case, the last flow has a reference will
15159                          * actually release the age action.
15160                          */
15161                         DRV_LOG(DEBUG, "Indirect age action %" PRIu32 " was"
15162                                 " released with references %d.", idx, ret);
15163                 return 0;
15164         case MLX5_INDIRECT_ACTION_TYPE_CT:
15165                 ret = flow_dv_aso_ct_release(dev, idx, error);
15166                 if (ret < 0)
15167                         return ret;
15168                 if (ret > 0)
15169                         DRV_LOG(DEBUG, "Connection tracking object %u still "
15170                                 "has references %d.", idx, ret);
15171                 return 0;
15172         default:
15173                 return rte_flow_error_set(error, ENOTSUP,
15174                                           RTE_FLOW_ERROR_TYPE_ACTION,
15175                                           NULL,
15176                                           "action type not supported");
15177         }
15178 }
15179
15180 /**
15181  * Updates in place shared RSS action configuration.
15182  *
15183  * @param[in] dev
15184  *   Pointer to the Ethernet device structure.
15185  * @param[in] idx
15186  *   The shared RSS action object ID to be updated.
15187  * @param[in] action_conf
15188  *   RSS action specification used to modify *shared_rss*.
15189  * @param[out] error
15190  *   Perform verbose error reporting if not NULL. Initialized in case of
15191  *   error only.
15192  *
15193  * @return
15194  *   0 on success, otherwise negative errno value.
15195  * @note: currently only support update of RSS queues.
15196  */
15197 static int
15198 __flow_dv_action_rss_update(struct rte_eth_dev *dev, uint32_t idx,
15199                             const struct rte_flow_action_rss *action_conf,
15200                             struct rte_flow_error *error)
15201 {
15202         struct mlx5_priv *priv = dev->data->dev_private;
15203         struct mlx5_shared_action_rss *shared_rss =
15204             mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_RSS_SHARED_ACTIONS], idx);
15205         int ret = 0;
15206         void *queue = NULL;
15207         void *queue_i = NULL;
15208         uint32_t queue_size = action_conf->queue_num * sizeof(uint16_t);
15209         bool dev_started = !!dev->data->dev_started;
15210
15211         if (!shared_rss)
15212                 return rte_flow_error_set(error, EINVAL,
15213                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15214                                           "invalid shared action to update");
15215         if (priv->obj_ops.ind_table_modify == NULL)
15216                 return rte_flow_error_set(error, ENOTSUP,
15217                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15218                                           "cannot modify indirection table");
15219         queue = mlx5_malloc(MLX5_MEM_ZERO,
15220                             RTE_ALIGN_CEIL(queue_size, sizeof(void *)),
15221                             0, SOCKET_ID_ANY);
15222         if (!queue)
15223                 return rte_flow_error_set(error, ENOMEM,
15224                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15225                                           NULL,
15226                                           "cannot allocate resource memory");
15227         memcpy(queue, action_conf->queue, queue_size);
15228         MLX5_ASSERT(shared_rss->ind_tbl);
15229         rte_spinlock_lock(&shared_rss->action_rss_sl);
15230         queue_i = shared_rss->ind_tbl->queues;
15231         ret = mlx5_ind_table_obj_modify(dev, shared_rss->ind_tbl,
15232                                         queue, action_conf->queue_num,
15233                                         true /* standalone */,
15234                                         dev_started /* ref_new_qs */,
15235                                         dev_started /* deref_old_qs */);
15236         if (ret) {
15237                 ret = rte_flow_error_set(error, rte_errno,
15238                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
15239                                           "cannot update indirection table");
15240         } else {
15241                 /* Restore the queue to indirect table internal queue. */
15242                 memcpy(queue_i, queue, queue_size);
15243                 shared_rss->ind_tbl->queues = queue_i;
15244                 shared_rss->origin.queue_num = action_conf->queue_num;
15245         }
15246         mlx5_free(queue);
15247         rte_spinlock_unlock(&shared_rss->action_rss_sl);
15248         return ret;
15249 }
15250
15251 /*
15252  * Updates in place conntrack context or direction.
15253  * Context update should be synchronized.
15254  *
15255  * @param[in] dev
15256  *   Pointer to the Ethernet device structure.
15257  * @param[in] idx
15258  *   The conntrack object ID to be updated.
15259  * @param[in] update
15260  *   Pointer to the structure of information to update.
15261  * @param[out] error
15262  *   Perform verbose error reporting if not NULL. Initialized in case of
15263  *   error only.
15264  *
15265  * @return
15266  *   0 on success, otherwise negative errno value.
15267  */
15268 static int
15269 __flow_dv_action_ct_update(struct rte_eth_dev *dev, uint32_t idx,
15270                            const struct rte_flow_modify_conntrack *update,
15271                            struct rte_flow_error *error)
15272 {
15273         struct mlx5_priv *priv = dev->data->dev_private;
15274         struct mlx5_aso_ct_action *ct;
15275         const struct rte_flow_action_conntrack *new_prf;
15276         int ret = 0;
15277         uint16_t owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
15278         uint32_t dev_idx;
15279
15280         if (PORT_ID(priv) != owner)
15281                 return rte_flow_error_set(error, EACCES,
15282                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15283                                           NULL,
15284                                           "CT object owned by another port");
15285         dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
15286         ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
15287         if (!ct->refcnt)
15288                 return rte_flow_error_set(error, ENOMEM,
15289                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15290                                           NULL,
15291                                           "CT object is inactive");
15292         new_prf = &update->new_ct;
15293         if (update->direction)
15294                 ct->is_original = !!new_prf->is_original_dir;
15295         if (update->state) {
15296                 /* Only validate the profile when it needs to be updated. */
15297                 ret = mlx5_validate_action_ct(dev, new_prf, error);
15298                 if (ret)
15299                         return ret;
15300                 ret = mlx5_aso_ct_update_by_wqe(priv->sh, ct, new_prf);
15301                 if (ret)
15302                         return rte_flow_error_set(error, EIO,
15303                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15304                                         NULL,
15305                                         "Failed to send CT context update WQE");
15306                 /* Block until ready or a failure. */
15307                 ret = mlx5_aso_ct_available(priv->sh, ct);
15308                 if (ret)
15309                         rte_flow_error_set(error, rte_errno,
15310                                            RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15311                                            NULL,
15312                                            "Timeout to get the CT update");
15313         }
15314         return ret;
15315 }
15316
15317 /**
15318  * Updates in place shared action configuration, lock free,
15319  * (mutex should be acquired by caller).
15320  *
15321  * @param[in] dev
15322  *   Pointer to the Ethernet device structure.
15323  * @param[in] handle
15324  *   The indirect action object handle to be updated.
15325  * @param[in] update
15326  *   Action specification used to modify the action pointed by *handle*.
15327  *   *update* could be of same type with the action pointed by the *handle*
15328  *   handle argument, or some other structures like a wrapper, depending on
15329  *   the indirect action type.
15330  * @param[out] error
15331  *   Perform verbose error reporting if not NULL. Initialized in case of
15332  *   error only.
15333  *
15334  * @return
15335  *   0 on success, otherwise negative errno value.
15336  */
15337 int
15338 flow_dv_action_update(struct rte_eth_dev *dev,
15339                         struct rte_flow_action_handle *handle,
15340                         const void *update,
15341                         struct rte_flow_error *err)
15342 {
15343         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
15344         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
15345         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
15346         const void *action_conf;
15347
15348         switch (type) {
15349         case MLX5_INDIRECT_ACTION_TYPE_RSS:
15350                 action_conf = ((const struct rte_flow_action *)update)->conf;
15351                 return __flow_dv_action_rss_update(dev, idx, action_conf, err);
15352         case MLX5_INDIRECT_ACTION_TYPE_CT:
15353                 return __flow_dv_action_ct_update(dev, idx, update, err);
15354         default:
15355                 return rte_flow_error_set(err, ENOTSUP,
15356                                           RTE_FLOW_ERROR_TYPE_ACTION,
15357                                           NULL,
15358                                           "action type update not supported");
15359         }
15360 }
15361
15362 /**
15363  * Destroy the meter sub policy table rules.
15364  * Lock free, (mutex should be acquired by caller).
15365  *
15366  * @param[in] dev
15367  *   Pointer to Ethernet device.
15368  * @param[in] sub_policy
15369  *   Pointer to meter sub policy table.
15370  */
15371 static void
15372 __flow_dv_destroy_sub_policy_rules(struct rte_eth_dev *dev,
15373                              struct mlx5_flow_meter_sub_policy *sub_policy)
15374 {
15375         struct mlx5_priv *priv = dev->data->dev_private;
15376         struct mlx5_flow_tbl_data_entry *tbl;
15377         struct mlx5_flow_meter_policy *policy = sub_policy->main_policy;
15378         struct mlx5_flow_meter_info *next_fm;
15379         struct mlx5_sub_policy_color_rule *color_rule;
15380         void *tmp;
15381         uint32_t i;
15382
15383         for (i = 0; i < RTE_COLORS; i++) {
15384                 next_fm = NULL;
15385                 if (i == RTE_COLOR_GREEN && policy &&
15386                     policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR)
15387                         next_fm = mlx5_flow_meter_find(priv,
15388                                         policy->act_cnt[i].next_mtr_id, NULL);
15389                 RTE_TAILQ_FOREACH_SAFE(color_rule, &sub_policy->color_rules[i],
15390                                    next_port, tmp) {
15391                         claim_zero(mlx5_flow_os_destroy_flow(color_rule->rule));
15392                         tbl = container_of(color_rule->matcher->tbl,
15393                                            typeof(*tbl), tbl);
15394                         mlx5_list_unregister(tbl->matchers,
15395                                              &color_rule->matcher->entry);
15396                         TAILQ_REMOVE(&sub_policy->color_rules[i],
15397                                      color_rule, next_port);
15398                         mlx5_free(color_rule);
15399                         if (next_fm)
15400                                 mlx5_flow_meter_detach(priv, next_fm);
15401                 }
15402         }
15403         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15404                 if (sub_policy->rix_hrxq[i]) {
15405                         if (policy && !policy->is_hierarchy)
15406                                 mlx5_hrxq_release(dev, sub_policy->rix_hrxq[i]);
15407                         sub_policy->rix_hrxq[i] = 0;
15408                 }
15409                 if (sub_policy->jump_tbl[i]) {
15410                         flow_dv_tbl_resource_release(MLX5_SH(dev),
15411                                                      sub_policy->jump_tbl[i]);
15412                         sub_policy->jump_tbl[i] = NULL;
15413                 }
15414         }
15415         if (sub_policy->tbl_rsc) {
15416                 flow_dv_tbl_resource_release(MLX5_SH(dev),
15417                                              sub_policy->tbl_rsc);
15418                 sub_policy->tbl_rsc = NULL;
15419         }
15420 }
15421
15422 /**
15423  * Destroy policy rules, lock free,
15424  * (mutex should be acquired by caller).
15425  * Dispatcher for action type specific call.
15426  *
15427  * @param[in] dev
15428  *   Pointer to the Ethernet device structure.
15429  * @param[in] mtr_policy
15430  *   Meter policy struct.
15431  */
15432 static void
15433 flow_dv_destroy_policy_rules(struct rte_eth_dev *dev,
15434                              struct mlx5_flow_meter_policy *mtr_policy)
15435 {
15436         uint32_t i, j;
15437         struct mlx5_flow_meter_sub_policy *sub_policy;
15438         uint16_t sub_policy_num;
15439
15440         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15441                 sub_policy_num = (mtr_policy->sub_policy_num >>
15442                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15443                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15444                 for (j = 0; j < sub_policy_num; j++) {
15445                         sub_policy = mtr_policy->sub_policys[i][j];
15446                         if (sub_policy)
15447                                 __flow_dv_destroy_sub_policy_rules(dev,
15448                                                                    sub_policy);
15449                 }
15450         }
15451 }
15452
15453 /**
15454  * Destroy policy action, lock free,
15455  * (mutex should be acquired by caller).
15456  * Dispatcher for action type specific call.
15457  *
15458  * @param[in] dev
15459  *   Pointer to the Ethernet device structure.
15460  * @param[in] mtr_policy
15461  *   Meter policy struct.
15462  */
15463 static void
15464 flow_dv_destroy_mtr_policy_acts(struct rte_eth_dev *dev,
15465                       struct mlx5_flow_meter_policy *mtr_policy)
15466 {
15467         struct rte_flow_action *rss_action;
15468         struct mlx5_flow_handle dev_handle;
15469         uint32_t i, j;
15470
15471         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
15472                 if (mtr_policy->act_cnt[i].rix_mark) {
15473                         flow_dv_tag_release(dev,
15474                                 mtr_policy->act_cnt[i].rix_mark);
15475                         mtr_policy->act_cnt[i].rix_mark = 0;
15476                 }
15477                 if (mtr_policy->act_cnt[i].modify_hdr) {
15478                         dev_handle.dvh.modify_hdr =
15479                                 mtr_policy->act_cnt[i].modify_hdr;
15480                         flow_dv_modify_hdr_resource_release(dev, &dev_handle);
15481                 }
15482                 switch (mtr_policy->act_cnt[i].fate_action) {
15483                 case MLX5_FLOW_FATE_SHARED_RSS:
15484                         rss_action = mtr_policy->act_cnt[i].rss;
15485                         mlx5_free(rss_action);
15486                         break;
15487                 case MLX5_FLOW_FATE_PORT_ID:
15488                         if (mtr_policy->act_cnt[i].rix_port_id_action) {
15489                                 flow_dv_port_id_action_resource_release(dev,
15490                                 mtr_policy->act_cnt[i].rix_port_id_action);
15491                                 mtr_policy->act_cnt[i].rix_port_id_action = 0;
15492                         }
15493                         break;
15494                 case MLX5_FLOW_FATE_DROP:
15495                 case MLX5_FLOW_FATE_JUMP:
15496                         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15497                                 mtr_policy->act_cnt[i].dr_jump_action[j] =
15498                                                 NULL;
15499                         break;
15500                 default:
15501                         /*Queue action do nothing*/
15502                         break;
15503                 }
15504         }
15505         for (j = 0; j < MLX5_MTR_DOMAIN_MAX; j++)
15506                 mtr_policy->dr_drop_action[j] = NULL;
15507 }
15508
15509 /**
15510  * Create policy action per domain, lock free,
15511  * (mutex should be acquired by caller).
15512  * Dispatcher for action type specific call.
15513  *
15514  * @param[in] dev
15515  *   Pointer to the Ethernet device structure.
15516  * @param[in] mtr_policy
15517  *   Meter policy struct.
15518  * @param[in] action
15519  *   Action specification used to create meter actions.
15520  * @param[out] error
15521  *   Perform verbose error reporting if not NULL. Initialized in case of
15522  *   error only.
15523  *
15524  * @return
15525  *   0 on success, otherwise negative errno value.
15526  */
15527 static int
15528 __flow_dv_create_domain_policy_acts(struct rte_eth_dev *dev,
15529                         struct mlx5_flow_meter_policy *mtr_policy,
15530                         const struct rte_flow_action *actions[RTE_COLORS],
15531                         enum mlx5_meter_domain domain,
15532                         struct rte_mtr_error *error)
15533 {
15534         struct mlx5_priv *priv = dev->data->dev_private;
15535         struct rte_flow_error flow_err;
15536         const struct rte_flow_action *act;
15537         uint64_t action_flags;
15538         struct mlx5_flow_handle dh;
15539         struct mlx5_flow dev_flow;
15540         struct mlx5_flow_dv_port_id_action_resource port_id_action;
15541         int i, ret;
15542         uint8_t egress, transfer;
15543         struct mlx5_meter_policy_action_container *act_cnt = NULL;
15544         union {
15545                 struct mlx5_flow_dv_modify_hdr_resource res;
15546                 uint8_t len[sizeof(struct mlx5_flow_dv_modify_hdr_resource) +
15547                             sizeof(struct mlx5_modification_cmd) *
15548                             (MLX5_MAX_MODIFY_NUM + 1)];
15549         } mhdr_dummy;
15550         struct mlx5_flow_dv_modify_hdr_resource *mhdr_res = &mhdr_dummy.res;
15551         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
15552
15553         MLX5_ASSERT(wks);
15554         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
15555         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
15556         memset(&dh, 0, sizeof(struct mlx5_flow_handle));
15557         memset(&dev_flow, 0, sizeof(struct mlx5_flow));
15558         memset(&port_id_action, 0,
15559                sizeof(struct mlx5_flow_dv_port_id_action_resource));
15560         memset(mhdr_res, 0, sizeof(*mhdr_res));
15561         mhdr_res->ft_type = transfer ? MLX5DV_FLOW_TABLE_TYPE_FDB :
15562                                        (egress ? MLX5DV_FLOW_TABLE_TYPE_NIC_TX :
15563                                         MLX5DV_FLOW_TABLE_TYPE_NIC_RX);
15564         dev_flow.handle = &dh;
15565         dev_flow.dv.port_id_action = &port_id_action;
15566         dev_flow.external = true;
15567         for (i = 0; i < RTE_COLORS; i++) {
15568                 if (i < MLX5_MTR_RTE_COLORS)
15569                         act_cnt = &mtr_policy->act_cnt[i];
15570                 /* Skip the color policy actions creation. */
15571                 if ((i == RTE_COLOR_YELLOW && mtr_policy->skip_y) ||
15572                     (i == RTE_COLOR_GREEN && mtr_policy->skip_g))
15573                         continue;
15574                 action_flags = 0;
15575                 for (act = actions[i];
15576                      act && act->type != RTE_FLOW_ACTION_TYPE_END; act++) {
15577                         switch (act->type) {
15578                         case RTE_FLOW_ACTION_TYPE_MARK:
15579                         {
15580                                 uint32_t tag_be = mlx5_flow_mark_set
15581                                         (((const struct rte_flow_action_mark *)
15582                                         (act->conf))->id);
15583
15584                                 if (i >= MLX5_MTR_RTE_COLORS)
15585                                         return -rte_mtr_error_set(error,
15586                                           ENOTSUP,
15587                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15588                                           NULL,
15589                                           "cannot create policy "
15590                                           "mark action for this color");
15591                                 wks->mark = 1;
15592                                 if (flow_dv_tag_resource_register(dev, tag_be,
15593                                                   &dev_flow, &flow_err))
15594                                         return -rte_mtr_error_set(error,
15595                                         ENOTSUP,
15596                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15597                                         NULL,
15598                                         "cannot setup policy mark action");
15599                                 MLX5_ASSERT(dev_flow.dv.tag_resource);
15600                                 act_cnt->rix_mark =
15601                                         dev_flow.handle->dvh.rix_tag;
15602                                 action_flags |= MLX5_FLOW_ACTION_MARK;
15603                                 break;
15604                         }
15605                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
15606                                 if (i >= MLX5_MTR_RTE_COLORS)
15607                                         return -rte_mtr_error_set(error,
15608                                           ENOTSUP,
15609                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15610                                           NULL,
15611                                           "cannot create policy "
15612                                           "set tag action for this color");
15613                                 if (flow_dv_convert_action_set_tag
15614                                 (dev, mhdr_res,
15615                                 (const struct rte_flow_action_set_tag *)
15616                                 act->conf,  &flow_err))
15617                                         return -rte_mtr_error_set(error,
15618                                         ENOTSUP,
15619                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15620                                         NULL, "cannot convert policy "
15621                                         "set tag action");
15622                                 if (!mhdr_res->actions_num)
15623                                         return -rte_mtr_error_set(error,
15624                                         ENOTSUP,
15625                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15626                                         NULL, "cannot find policy "
15627                                         "set tag action");
15628                                 action_flags |= MLX5_FLOW_ACTION_SET_TAG;
15629                                 break;
15630                         case RTE_FLOW_ACTION_TYPE_DROP:
15631                         {
15632                                 struct mlx5_flow_mtr_mng *mtrmng =
15633                                                 priv->sh->mtrmng;
15634                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15635
15636                                 /*
15637                                  * Create the drop table with
15638                                  * METER DROP level.
15639                                  */
15640                                 if (!mtrmng->drop_tbl[domain]) {
15641                                         mtrmng->drop_tbl[domain] =
15642                                         flow_dv_tbl_resource_get(dev,
15643                                         MLX5_FLOW_TABLE_LEVEL_METER,
15644                                         egress, transfer, false, NULL, 0,
15645                                         0, MLX5_MTR_TABLE_ID_DROP, &flow_err);
15646                                         if (!mtrmng->drop_tbl[domain])
15647                                                 return -rte_mtr_error_set
15648                                         (error, ENOTSUP,
15649                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15650                                         NULL,
15651                                         "Failed to create meter drop table");
15652                                 }
15653                                 tbl_data = container_of
15654                                 (mtrmng->drop_tbl[domain],
15655                                 struct mlx5_flow_tbl_data_entry, tbl);
15656                                 if (i < MLX5_MTR_RTE_COLORS) {
15657                                         act_cnt->dr_jump_action[domain] =
15658                                                 tbl_data->jump.action;
15659                                         act_cnt->fate_action =
15660                                                 MLX5_FLOW_FATE_DROP;
15661                                 }
15662                                 if (i == RTE_COLOR_RED)
15663                                         mtr_policy->dr_drop_action[domain] =
15664                                                 tbl_data->jump.action;
15665                                 action_flags |= MLX5_FLOW_ACTION_DROP;
15666                                 break;
15667                         }
15668                         case RTE_FLOW_ACTION_TYPE_QUEUE:
15669                         {
15670                                 if (i >= MLX5_MTR_RTE_COLORS)
15671                                         return -rte_mtr_error_set(error,
15672                                         ENOTSUP,
15673                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15674                                         NULL, "cannot create policy "
15675                                         "fate queue for this color");
15676                                 act_cnt->queue =
15677                                 ((const struct rte_flow_action_queue *)
15678                                         (act->conf))->index;
15679                                 act_cnt->fate_action =
15680                                         MLX5_FLOW_FATE_QUEUE;
15681                                 dev_flow.handle->fate_action =
15682                                         MLX5_FLOW_FATE_QUEUE;
15683                                 mtr_policy->is_queue = 1;
15684                                 action_flags |= MLX5_FLOW_ACTION_QUEUE;
15685                                 break;
15686                         }
15687                         case RTE_FLOW_ACTION_TYPE_RSS:
15688                         {
15689                                 int rss_size;
15690
15691                                 if (i >= MLX5_MTR_RTE_COLORS)
15692                                         return -rte_mtr_error_set(error,
15693                                           ENOTSUP,
15694                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15695                                           NULL,
15696                                           "cannot create policy "
15697                                           "rss action for this color");
15698                                 /*
15699                                  * Save RSS conf into policy struct
15700                                  * for translate stage.
15701                                  */
15702                                 rss_size = (int)rte_flow_conv
15703                                         (RTE_FLOW_CONV_OP_ACTION,
15704                                         NULL, 0, act, &flow_err);
15705                                 if (rss_size <= 0)
15706                                         return -rte_mtr_error_set(error,
15707                                           ENOTSUP,
15708                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15709                                           NULL, "Get the wrong "
15710                                           "rss action struct size");
15711                                 act_cnt->rss = mlx5_malloc(MLX5_MEM_ZERO,
15712                                                 rss_size, 0, SOCKET_ID_ANY);
15713                                 if (!act_cnt->rss)
15714                                         return -rte_mtr_error_set(error,
15715                                           ENOTSUP,
15716                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15717                                           NULL,
15718                                           "Fail to malloc rss action memory");
15719                                 ret = rte_flow_conv(RTE_FLOW_CONV_OP_ACTION,
15720                                         act_cnt->rss, rss_size,
15721                                         act, &flow_err);
15722                                 if (ret < 0)
15723                                         return -rte_mtr_error_set(error,
15724                                           ENOTSUP,
15725                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15726                                           NULL, "Fail to save "
15727                                           "rss action into policy struct");
15728                                 act_cnt->fate_action =
15729                                         MLX5_FLOW_FATE_SHARED_RSS;
15730                                 action_flags |= MLX5_FLOW_ACTION_RSS;
15731                                 break;
15732                         }
15733                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
15734                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
15735                         {
15736                                 struct mlx5_flow_dv_port_id_action_resource
15737                                         port_id_resource;
15738                                 uint32_t port_id = 0;
15739
15740                                 if (i >= MLX5_MTR_RTE_COLORS)
15741                                         return -rte_mtr_error_set(error,
15742                                         ENOTSUP,
15743                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15744                                         NULL, "cannot create policy "
15745                                         "port action for this color");
15746                                 memset(&port_id_resource, 0,
15747                                         sizeof(port_id_resource));
15748                                 if (flow_dv_translate_action_port_id(dev, act,
15749                                                 &port_id, &flow_err))
15750                                         return -rte_mtr_error_set(error,
15751                                         ENOTSUP,
15752                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15753                                         NULL, "cannot translate "
15754                                         "policy port action");
15755                                 port_id_resource.port_id = port_id;
15756                                 if (flow_dv_port_id_action_resource_register
15757                                         (dev, &port_id_resource,
15758                                         &dev_flow, &flow_err))
15759                                         return -rte_mtr_error_set(error,
15760                                         ENOTSUP,
15761                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15762                                         NULL, "cannot setup "
15763                                         "policy port action");
15764                                 act_cnt->rix_port_id_action =
15765                                         dev_flow.handle->rix_port_id_action;
15766                                 act_cnt->fate_action =
15767                                         MLX5_FLOW_FATE_PORT_ID;
15768                                 action_flags |= MLX5_FLOW_ACTION_PORT_ID;
15769                                 break;
15770                         }
15771                         case RTE_FLOW_ACTION_TYPE_JUMP:
15772                         {
15773                                 uint32_t jump_group = 0;
15774                                 uint32_t table = 0;
15775                                 struct mlx5_flow_tbl_data_entry *tbl_data;
15776                                 struct flow_grp_info grp_info = {
15777                                         .external = !!dev_flow.external,
15778                                         .transfer = !!transfer,
15779                                         .fdb_def_rule = !!priv->fdb_def_rule,
15780                                         .std_tbl_fix = 0,
15781                                         .skip_scale = dev_flow.skip_scale &
15782                                         (1 << MLX5_SCALE_FLOW_GROUP_BIT),
15783                                 };
15784                                 struct mlx5_flow_meter_sub_policy *sub_policy =
15785                                         mtr_policy->sub_policys[domain][0];
15786
15787                                 if (i >= MLX5_MTR_RTE_COLORS)
15788                                         return -rte_mtr_error_set(error,
15789                                           ENOTSUP,
15790                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15791                                           NULL,
15792                                           "cannot create policy "
15793                                           "jump action for this color");
15794                                 jump_group =
15795                                 ((const struct rte_flow_action_jump *)
15796                                                         act->conf)->group;
15797                                 if (mlx5_flow_group_to_table(dev, NULL,
15798                                                        jump_group,
15799                                                        &table,
15800                                                        &grp_info, &flow_err))
15801                                         return -rte_mtr_error_set(error,
15802                                         ENOTSUP,
15803                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15804                                         NULL, "cannot setup "
15805                                         "policy jump action");
15806                                 sub_policy->jump_tbl[i] =
15807                                 flow_dv_tbl_resource_get(dev,
15808                                         table, egress,
15809                                         transfer,
15810                                         !!dev_flow.external,
15811                                         NULL, jump_group, 0,
15812                                         0, &flow_err);
15813                                 if
15814                                 (!sub_policy->jump_tbl[i])
15815                                         return  -rte_mtr_error_set(error,
15816                                         ENOTSUP,
15817                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
15818                                         NULL, "cannot create jump action.");
15819                                 tbl_data = container_of
15820                                 (sub_policy->jump_tbl[i],
15821                                 struct mlx5_flow_tbl_data_entry, tbl);
15822                                 act_cnt->dr_jump_action[domain] =
15823                                         tbl_data->jump.action;
15824                                 act_cnt->fate_action =
15825                                         MLX5_FLOW_FATE_JUMP;
15826                                 action_flags |= MLX5_FLOW_ACTION_JUMP;
15827                                 break;
15828                         }
15829                         /*
15830                          * No need to check meter hierarchy for Y or R colors
15831                          * here since it is done in the validation stage.
15832                          */
15833                         case RTE_FLOW_ACTION_TYPE_METER:
15834                         {
15835                                 const struct rte_flow_action_meter *mtr;
15836                                 struct mlx5_flow_meter_info *next_fm;
15837                                 struct mlx5_flow_meter_policy *next_policy;
15838                                 struct rte_flow_action tag_action;
15839                                 struct mlx5_rte_flow_action_set_tag set_tag;
15840                                 uint32_t next_mtr_idx = 0;
15841
15842                                 mtr = act->conf;
15843                                 next_fm = mlx5_flow_meter_find(priv,
15844                                                         mtr->mtr_id,
15845                                                         &next_mtr_idx);
15846                                 if (!next_fm)
15847                                         return -rte_mtr_error_set(error, EINVAL,
15848                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15849                                                 "Fail to find next meter.");
15850                                 if (next_fm->def_policy)
15851                                         return -rte_mtr_error_set(error, EINVAL,
15852                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
15853                                 "Hierarchy only supports termination meter.");
15854                                 next_policy = mlx5_flow_meter_policy_find(dev,
15855                                                 next_fm->policy_id, NULL);
15856                                 MLX5_ASSERT(next_policy);
15857                                 if (next_fm->drop_cnt) {
15858                                         set_tag.id =
15859                                                 (enum modify_reg)
15860                                                 mlx5_flow_get_reg_id(dev,
15861                                                 MLX5_MTR_ID,
15862                                                 0,
15863                                                 (struct rte_flow_error *)error);
15864                                         set_tag.offset = (priv->mtr_reg_share ?
15865                                                 MLX5_MTR_COLOR_BITS : 0);
15866                                         set_tag.length = (priv->mtr_reg_share ?
15867                                                MLX5_MTR_IDLE_BITS_IN_COLOR_REG :
15868                                                MLX5_REG_BITS);
15869                                         set_tag.data = next_mtr_idx;
15870                                         tag_action.type =
15871                                                 (enum rte_flow_action_type)
15872                                                 MLX5_RTE_FLOW_ACTION_TYPE_TAG;
15873                                         tag_action.conf = &set_tag;
15874                                         if (flow_dv_convert_action_set_reg
15875                                                 (mhdr_res, &tag_action,
15876                                                 (struct rte_flow_error *)error))
15877                                                 return -rte_errno;
15878                                         action_flags |=
15879                                                 MLX5_FLOW_ACTION_SET_TAG;
15880                                 }
15881                                 act_cnt->fate_action = MLX5_FLOW_FATE_MTR;
15882                                 act_cnt->next_mtr_id = next_fm->meter_id;
15883                                 act_cnt->next_sub_policy = NULL;
15884                                 mtr_policy->is_hierarchy = 1;
15885                                 mtr_policy->dev = next_policy->dev;
15886                                 action_flags |=
15887                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
15888                                 break;
15889                         }
15890                         default:
15891                                 return -rte_mtr_error_set(error, ENOTSUP,
15892                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
15893                                           NULL, "action type not supported");
15894                         }
15895                         if (action_flags & MLX5_FLOW_ACTION_SET_TAG) {
15896                                 /* create modify action if needed. */
15897                                 dev_flow.dv.group = 1;
15898                                 if (flow_dv_modify_hdr_resource_register
15899                                         (dev, mhdr_res, &dev_flow, &flow_err))
15900                                         return -rte_mtr_error_set(error,
15901                                                 ENOTSUP,
15902                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
15903                                                 NULL, "cannot register policy "
15904                                                 "set tag action");
15905                                 act_cnt->modify_hdr =
15906                                         dev_flow.handle->dvh.modify_hdr;
15907                         }
15908                 }
15909         }
15910         return 0;
15911 }
15912
15913 /**
15914  * Create policy action per domain, lock free,
15915  * (mutex should be acquired by caller).
15916  * Dispatcher for action type specific call.
15917  *
15918  * @param[in] dev
15919  *   Pointer to the Ethernet device structure.
15920  * @param[in] mtr_policy
15921  *   Meter policy struct.
15922  * @param[in] action
15923  *   Action specification used to create meter actions.
15924  * @param[out] error
15925  *   Perform verbose error reporting if not NULL. Initialized in case of
15926  *   error only.
15927  *
15928  * @return
15929  *   0 on success, otherwise negative errno value.
15930  */
15931 static int
15932 flow_dv_create_mtr_policy_acts(struct rte_eth_dev *dev,
15933                       struct mlx5_flow_meter_policy *mtr_policy,
15934                       const struct rte_flow_action *actions[RTE_COLORS],
15935                       struct rte_mtr_error *error)
15936 {
15937         int ret, i;
15938         uint16_t sub_policy_num;
15939
15940         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
15941                 sub_policy_num = (mtr_policy->sub_policy_num >>
15942                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
15943                         MLX5_MTR_SUB_POLICY_NUM_MASK;
15944                 if (sub_policy_num) {
15945                         ret = __flow_dv_create_domain_policy_acts(dev,
15946                                 mtr_policy, actions,
15947                                 (enum mlx5_meter_domain)i, error);
15948                         /* Cleaning resource is done in the caller level. */
15949                         if (ret)
15950                                 return ret;
15951                 }
15952         }
15953         return 0;
15954 }
15955
15956 /**
15957  * Query a DV flow rule for its statistics via DevX.
15958  *
15959  * @param[in] dev
15960  *   Pointer to Ethernet device.
15961  * @param[in] cnt_idx
15962  *   Index to the flow counter.
15963  * @param[out] data
15964  *   Data retrieved by the query.
15965  * @param[out] error
15966  *   Perform verbose error reporting if not NULL.
15967  *
15968  * @return
15969  *   0 on success, a negative errno value otherwise and rte_errno is set.
15970  */
15971 static int
15972 flow_dv_query_count(struct rte_eth_dev *dev, uint32_t cnt_idx, void *data,
15973                     struct rte_flow_error *error)
15974 {
15975         struct mlx5_priv *priv = dev->data->dev_private;
15976         struct rte_flow_query_count *qc = data;
15977
15978         if (!priv->sh->cdev->config.devx)
15979                 return rte_flow_error_set(error, ENOTSUP,
15980                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15981                                           NULL,
15982                                           "counters are not supported");
15983         if (cnt_idx) {
15984                 uint64_t pkts, bytes;
15985                 struct mlx5_flow_counter *cnt;
15986                 int err = _flow_dv_query_count(dev, cnt_idx, &pkts, &bytes);
15987
15988                 if (err)
15989                         return rte_flow_error_set(error, -err,
15990                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
15991                                         NULL, "cannot read counters");
15992                 cnt = flow_dv_counter_get_by_idx(dev, cnt_idx, NULL);
15993                 qc->hits_set = 1;
15994                 qc->bytes_set = 1;
15995                 qc->hits = pkts - cnt->hits;
15996                 qc->bytes = bytes - cnt->bytes;
15997                 if (qc->reset) {
15998                         cnt->hits = pkts;
15999                         cnt->bytes = bytes;
16000                 }
16001                 return 0;
16002         }
16003         return rte_flow_error_set(error, EINVAL,
16004                                   RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16005                                   NULL,
16006                                   "counters are not available");
16007 }
16008
16009 int
16010 flow_dv_action_query(struct rte_eth_dev *dev,
16011                      const struct rte_flow_action_handle *handle, void *data,
16012                      struct rte_flow_error *error)
16013 {
16014         struct mlx5_age_param *age_param;
16015         struct rte_flow_query_age *resp;
16016         uint32_t act_idx = (uint32_t)(uintptr_t)handle;
16017         uint32_t type = act_idx >> MLX5_INDIRECT_ACTION_TYPE_OFFSET;
16018         uint32_t idx = act_idx & ((1u << MLX5_INDIRECT_ACTION_TYPE_OFFSET) - 1);
16019         struct mlx5_priv *priv = dev->data->dev_private;
16020         struct mlx5_aso_ct_action *ct;
16021         uint16_t owner;
16022         uint32_t dev_idx;
16023
16024         switch (type) {
16025         case MLX5_INDIRECT_ACTION_TYPE_AGE:
16026                 age_param = &flow_aso_age_get_by_idx(dev, idx)->age_params;
16027                 resp = data;
16028                 resp->aged = __atomic_load_n(&age_param->state,
16029                                               __ATOMIC_RELAXED) == AGE_TMOUT ?
16030                                                                           1 : 0;
16031                 resp->sec_since_last_hit_valid = !resp->aged;
16032                 if (resp->sec_since_last_hit_valid)
16033                         resp->sec_since_last_hit = __atomic_load_n
16034                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
16035                 return 0;
16036         case MLX5_INDIRECT_ACTION_TYPE_COUNT:
16037                 return flow_dv_query_count(dev, idx, data, error);
16038         case MLX5_INDIRECT_ACTION_TYPE_CT:
16039                 owner = (uint16_t)MLX5_INDIRECT_ACT_CT_GET_OWNER(idx);
16040                 if (owner != PORT_ID(priv))
16041                         return rte_flow_error_set(error, EACCES,
16042                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16043                                         NULL,
16044                                         "CT object owned by another port");
16045                 dev_idx = MLX5_INDIRECT_ACT_CT_GET_IDX(idx);
16046                 ct = flow_aso_ct_get_by_dev_idx(dev, dev_idx);
16047                 MLX5_ASSERT(ct);
16048                 if (!ct->refcnt)
16049                         return rte_flow_error_set(error, EFAULT,
16050                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16051                                         NULL,
16052                                         "CT object is inactive");
16053                 ((struct rte_flow_action_conntrack *)data)->peer_port =
16054                                                         ct->peer;
16055                 ((struct rte_flow_action_conntrack *)data)->is_original_dir =
16056                                                         ct->is_original;
16057                 if (mlx5_aso_ct_query_by_wqe(priv->sh, ct, data))
16058                         return rte_flow_error_set(error, EIO,
16059                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16060                                         NULL,
16061                                         "Failed to query CT context");
16062                 return 0;
16063         default:
16064                 return rte_flow_error_set(error, ENOTSUP,
16065                                           RTE_FLOW_ERROR_TYPE_ACTION, NULL,
16066                                           "action type query not supported");
16067         }
16068 }
16069
16070 /**
16071  * Query a flow rule AGE action for aging information.
16072  *
16073  * @param[in] dev
16074  *   Pointer to Ethernet device.
16075  * @param[in] flow
16076  *   Pointer to the sub flow.
16077  * @param[out] data
16078  *   data retrieved by the query.
16079  * @param[out] error
16080  *   Perform verbose error reporting if not NULL.
16081  *
16082  * @return
16083  *   0 on success, a negative errno value otherwise and rte_errno is set.
16084  */
16085 static int
16086 flow_dv_query_age(struct rte_eth_dev *dev, struct rte_flow *flow,
16087                   void *data, struct rte_flow_error *error)
16088 {
16089         struct rte_flow_query_age *resp = data;
16090         struct mlx5_age_param *age_param;
16091
16092         if (flow->age) {
16093                 struct mlx5_aso_age_action *act =
16094                                      flow_aso_age_get_by_idx(dev, flow->age);
16095
16096                 age_param = &act->age_params;
16097         } else if (flow->counter) {
16098                 age_param = flow_dv_counter_idx_get_age(dev, flow->counter);
16099
16100                 if (!age_param || !age_param->timeout)
16101                         return rte_flow_error_set
16102                                         (error, EINVAL,
16103                                          RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16104                                          NULL, "cannot read age data");
16105         } else {
16106                 return rte_flow_error_set(error, EINVAL,
16107                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
16108                                           NULL, "age data not available");
16109         }
16110         resp->aged = __atomic_load_n(&age_param->state, __ATOMIC_RELAXED) ==
16111                                      AGE_TMOUT ? 1 : 0;
16112         resp->sec_since_last_hit_valid = !resp->aged;
16113         if (resp->sec_since_last_hit_valid)
16114                 resp->sec_since_last_hit = __atomic_load_n
16115                              (&age_param->sec_since_last_hit, __ATOMIC_RELAXED);
16116         return 0;
16117 }
16118
16119 /**
16120  * Query a flow.
16121  *
16122  * @see rte_flow_query()
16123  * @see rte_flow_ops
16124  */
16125 static int
16126 flow_dv_query(struct rte_eth_dev *dev,
16127               struct rte_flow *flow __rte_unused,
16128               const struct rte_flow_action *actions __rte_unused,
16129               void *data __rte_unused,
16130               struct rte_flow_error *error __rte_unused)
16131 {
16132         int ret = -EINVAL;
16133
16134         for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
16135                 switch (actions->type) {
16136                 case RTE_FLOW_ACTION_TYPE_VOID:
16137                         break;
16138                 case RTE_FLOW_ACTION_TYPE_COUNT:
16139                         ret = flow_dv_query_count(dev, flow->counter, data,
16140                                                   error);
16141                         break;
16142                 case RTE_FLOW_ACTION_TYPE_AGE:
16143                         ret = flow_dv_query_age(dev, flow, data, error);
16144                         break;
16145                 default:
16146                         return rte_flow_error_set(error, ENOTSUP,
16147                                                   RTE_FLOW_ERROR_TYPE_ACTION,
16148                                                   actions,
16149                                                   "action not supported");
16150                 }
16151         }
16152         return ret;
16153 }
16154
16155 /**
16156  * Destroy the meter table set.
16157  * Lock free, (mutex should be acquired by caller).
16158  *
16159  * @param[in] dev
16160  *   Pointer to Ethernet device.
16161  * @param[in] fm
16162  *   Meter information table.
16163  */
16164 static void
16165 flow_dv_destroy_mtr_tbls(struct rte_eth_dev *dev,
16166                         struct mlx5_flow_meter_info *fm)
16167 {
16168         struct mlx5_priv *priv = dev->data->dev_private;
16169         int i;
16170
16171         if (!fm || !priv->sh->config.dv_flow_en)
16172                 return;
16173         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16174                 if (fm->drop_rule[i]) {
16175                         claim_zero(mlx5_flow_os_destroy_flow(fm->drop_rule[i]));
16176                         fm->drop_rule[i] = NULL;
16177                 }
16178         }
16179 }
16180
16181 static void
16182 flow_dv_destroy_mtr_drop_tbls(struct rte_eth_dev *dev)
16183 {
16184         struct mlx5_priv *priv = dev->data->dev_private;
16185         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16186         struct mlx5_flow_tbl_data_entry *tbl;
16187         int i, j;
16188
16189         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16190                 if (mtrmng->def_rule[i]) {
16191                         claim_zero(mlx5_flow_os_destroy_flow
16192                                         (mtrmng->def_rule[i]));
16193                         mtrmng->def_rule[i] = NULL;
16194                 }
16195                 if (mtrmng->def_matcher[i]) {
16196                         tbl = container_of(mtrmng->def_matcher[i]->tbl,
16197                                 struct mlx5_flow_tbl_data_entry, tbl);
16198                         mlx5_list_unregister(tbl->matchers,
16199                                              &mtrmng->def_matcher[i]->entry);
16200                         mtrmng->def_matcher[i] = NULL;
16201                 }
16202                 for (j = 0; j < MLX5_REG_BITS; j++) {
16203                         if (mtrmng->drop_matcher[i][j]) {
16204                                 tbl =
16205                                 container_of(mtrmng->drop_matcher[i][j]->tbl,
16206                                              struct mlx5_flow_tbl_data_entry,
16207                                              tbl);
16208                                 mlx5_list_unregister(tbl->matchers,
16209                                             &mtrmng->drop_matcher[i][j]->entry);
16210                                 mtrmng->drop_matcher[i][j] = NULL;
16211                         }
16212                 }
16213                 if (mtrmng->drop_tbl[i]) {
16214                         flow_dv_tbl_resource_release(MLX5_SH(dev),
16215                                 mtrmng->drop_tbl[i]);
16216                         mtrmng->drop_tbl[i] = NULL;
16217                 }
16218         }
16219 }
16220
16221 /* Number of meter flow actions, count and jump or count and drop. */
16222 #define METER_ACTIONS 2
16223
16224 static void
16225 __flow_dv_destroy_domain_def_policy(struct rte_eth_dev *dev,
16226                                     enum mlx5_meter_domain domain)
16227 {
16228         struct mlx5_priv *priv = dev->data->dev_private;
16229         struct mlx5_flow_meter_def_policy *def_policy =
16230                         priv->sh->mtrmng->def_policy[domain];
16231
16232         __flow_dv_destroy_sub_policy_rules(dev, &def_policy->sub_policy);
16233         mlx5_free(def_policy);
16234         priv->sh->mtrmng->def_policy[domain] = NULL;
16235 }
16236
16237 /**
16238  * Destroy the default policy table set.
16239  *
16240  * @param[in] dev
16241  *   Pointer to Ethernet device.
16242  */
16243 static void
16244 flow_dv_destroy_def_policy(struct rte_eth_dev *dev)
16245 {
16246         struct mlx5_priv *priv = dev->data->dev_private;
16247         int i;
16248
16249         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++)
16250                 if (priv->sh->mtrmng->def_policy[i])
16251                         __flow_dv_destroy_domain_def_policy(dev,
16252                                         (enum mlx5_meter_domain)i);
16253         priv->sh->mtrmng->def_policy_id = MLX5_INVALID_POLICY_ID;
16254 }
16255
16256 static int
16257 __flow_dv_create_policy_flow(struct rte_eth_dev *dev,
16258                         uint32_t color_reg_c_idx,
16259                         enum rte_color color, void *matcher_object,
16260                         int actions_n, void *actions,
16261                         bool match_src_port, const struct rte_flow_item *item,
16262                         void **rule, const struct rte_flow_attr *attr)
16263 {
16264         int ret;
16265         struct mlx5_flow_dv_match_params value = {
16266                 .size = sizeof(value.buf),
16267         };
16268         struct mlx5_flow_dv_match_params matcher = {
16269                 .size = sizeof(matcher.buf),
16270         };
16271         struct mlx5_priv *priv = dev->data->dev_private;
16272         uint8_t misc_mask;
16273
16274         if (match_src_port && priv->sh->esw_mode) {
16275                 if (flow_dv_translate_item_port_id(dev, matcher.buf,
16276                                                    value.buf, item, attr)) {
16277                         DRV_LOG(ERR, "Failed to create meter policy%d flow's"
16278                                 " value with port.", color);
16279                         return -1;
16280                 }
16281         }
16282         flow_dv_match_meta_reg(matcher.buf, value.buf,
16283                                (enum modify_reg)color_reg_c_idx,
16284                                rte_col_2_mlx5_col(color), UINT32_MAX);
16285         misc_mask = flow_dv_matcher_enable(value.buf);
16286         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16287         ret = mlx5_flow_os_create_flow(matcher_object, (void *)&value,
16288                                        actions_n, actions, rule);
16289         if (ret) {
16290                 DRV_LOG(ERR, "Failed to create meter policy%d flow.", color);
16291                 return -1;
16292         }
16293         return 0;
16294 }
16295
16296 static int
16297 __flow_dv_create_policy_matcher(struct rte_eth_dev *dev,
16298                         uint32_t color_reg_c_idx,
16299                         uint16_t priority,
16300                         struct mlx5_flow_meter_sub_policy *sub_policy,
16301                         const struct rte_flow_attr *attr,
16302                         bool match_src_port,
16303                         const struct rte_flow_item *item,
16304                         struct mlx5_flow_dv_matcher **policy_matcher,
16305                         struct rte_flow_error *error)
16306 {
16307         struct mlx5_list_entry *entry;
16308         struct mlx5_flow_tbl_resource *tbl_rsc = sub_policy->tbl_rsc;
16309         struct mlx5_flow_dv_matcher matcher = {
16310                 .mask = {
16311                         .size = sizeof(matcher.mask.buf),
16312                 },
16313                 .tbl = tbl_rsc,
16314         };
16315         struct mlx5_flow_dv_match_params value = {
16316                 .size = sizeof(value.buf),
16317         };
16318         struct mlx5_flow_cb_ctx ctx = {
16319                 .error = error,
16320                 .data = &matcher,
16321         };
16322         struct mlx5_flow_tbl_data_entry *tbl_data;
16323         struct mlx5_priv *priv = dev->data->dev_private;
16324         const uint32_t color_mask = (UINT32_C(1) << MLX5_MTR_COLOR_BITS) - 1;
16325
16326         if (match_src_port && priv->sh->esw_mode) {
16327                 if (flow_dv_translate_item_port_id(dev, matcher.mask.buf,
16328                                                    value.buf, item, attr)) {
16329                         DRV_LOG(ERR, "Failed to register meter policy%d matcher"
16330                                 " with port.", priority);
16331                         return -1;
16332                 }
16333         }
16334         tbl_data = container_of(tbl_rsc, struct mlx5_flow_tbl_data_entry, tbl);
16335         if (priority < RTE_COLOR_RED)
16336                 flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16337                         (enum modify_reg)color_reg_c_idx, 0, color_mask);
16338         matcher.priority = priority;
16339         matcher.crc = rte_raw_cksum((const void *)matcher.mask.buf,
16340                                     matcher.mask.size);
16341         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16342         if (!entry) {
16343                 DRV_LOG(ERR, "Failed to register meter drop matcher.");
16344                 return -1;
16345         }
16346         *policy_matcher =
16347                 container_of(entry, struct mlx5_flow_dv_matcher, entry);
16348         return 0;
16349 }
16350
16351 /**
16352  * Create the policy rules per domain.
16353  *
16354  * @param[in] dev
16355  *   Pointer to Ethernet device.
16356  * @param[in] sub_policy
16357  *    Pointer to sub policy table..
16358  * @param[in] egress
16359  *   Direction of the table.
16360  * @param[in] transfer
16361  *   E-Switch or NIC flow.
16362  * @param[in] acts
16363  *   Pointer to policy action list per color.
16364  *
16365  * @return
16366  *   0 on success, -1 otherwise.
16367  */
16368 static int
16369 __flow_dv_create_domain_policy_rules(struct rte_eth_dev *dev,
16370                 struct mlx5_flow_meter_sub_policy *sub_policy,
16371                 uint8_t egress, uint8_t transfer, bool match_src_port,
16372                 struct mlx5_meter_policy_acts acts[RTE_COLORS])
16373 {
16374         struct mlx5_priv *priv = dev->data->dev_private;
16375         struct rte_flow_error flow_err;
16376         uint32_t color_reg_c_idx;
16377         struct rte_flow_attr attr = {
16378                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
16379                 .priority = 0,
16380                 .ingress = 0,
16381                 .egress = !!egress,
16382                 .transfer = !!transfer,
16383                 .reserved = 0,
16384         };
16385         int i;
16386         int ret = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, &flow_err);
16387         struct mlx5_sub_policy_color_rule *color_rule;
16388         bool svport_match;
16389         struct mlx5_sub_policy_color_rule *tmp_rules[RTE_COLORS] = {NULL};
16390
16391         if (ret < 0)
16392                 return -1;
16393         /* Create policy table with POLICY level. */
16394         if (!sub_policy->tbl_rsc)
16395                 sub_policy->tbl_rsc = flow_dv_tbl_resource_get(dev,
16396                                 MLX5_FLOW_TABLE_LEVEL_POLICY,
16397                                 egress, transfer, false, NULL, 0, 0,
16398                                 sub_policy->idx, &flow_err);
16399         if (!sub_policy->tbl_rsc) {
16400                 DRV_LOG(ERR,
16401                         "Failed to create meter sub policy table.");
16402                 return -1;
16403         }
16404         /* Prepare matchers. */
16405         color_reg_c_idx = ret;
16406         for (i = 0; i < RTE_COLORS; i++) {
16407                 TAILQ_INIT(&sub_policy->color_rules[i]);
16408                 if (!acts[i].actions_n)
16409                         continue;
16410                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
16411                                 sizeof(struct mlx5_sub_policy_color_rule),
16412                                 0, SOCKET_ID_ANY);
16413                 if (!color_rule) {
16414                         DRV_LOG(ERR, "No memory to create color rule.");
16415                         goto err_exit;
16416                 }
16417                 tmp_rules[i] = color_rule;
16418                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
16419                                   color_rule, next_port);
16420                 color_rule->src_port = priv->representor_id;
16421                 /* No use. */
16422                 attr.priority = i;
16423                 /* Create matchers for colors. */
16424                 svport_match = (i != RTE_COLOR_RED) ? match_src_port : false;
16425                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
16426                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
16427                                 &attr, svport_match, NULL,
16428                                 &color_rule->matcher, &flow_err)) {
16429                         DRV_LOG(ERR, "Failed to create color%u matcher.", i);
16430                         goto err_exit;
16431                 }
16432                 /* Create flow, matching color. */
16433                 if (__flow_dv_create_policy_flow(dev,
16434                                 color_reg_c_idx, (enum rte_color)i,
16435                                 color_rule->matcher->matcher_object,
16436                                 acts[i].actions_n, acts[i].dv_actions,
16437                                 svport_match, NULL, &color_rule->rule,
16438                                 &attr)) {
16439                         DRV_LOG(ERR, "Failed to create color%u rule.", i);
16440                         goto err_exit;
16441                 }
16442         }
16443         return 0;
16444 err_exit:
16445         /* All the policy rules will be cleared. */
16446         do {
16447                 color_rule = tmp_rules[i];
16448                 if (color_rule) {
16449                         if (color_rule->rule)
16450                                 mlx5_flow_os_destroy_flow(color_rule->rule);
16451                         if (color_rule->matcher) {
16452                                 struct mlx5_flow_tbl_data_entry *tbl =
16453                                         container_of(color_rule->matcher->tbl,
16454                                                      typeof(*tbl), tbl);
16455                                 mlx5_list_unregister(tbl->matchers,
16456                                                 &color_rule->matcher->entry);
16457                         }
16458                         TAILQ_REMOVE(&sub_policy->color_rules[i],
16459                                      color_rule, next_port);
16460                         mlx5_free(color_rule);
16461                 }
16462         } while (i--);
16463         return -1;
16464 }
16465
16466 static int
16467 __flow_dv_create_policy_acts_rules(struct rte_eth_dev *dev,
16468                         struct mlx5_flow_meter_policy *mtr_policy,
16469                         struct mlx5_flow_meter_sub_policy *sub_policy,
16470                         uint32_t domain)
16471 {
16472         struct mlx5_priv *priv = dev->data->dev_private;
16473         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16474         struct mlx5_flow_dv_tag_resource *tag;
16475         struct mlx5_flow_dv_port_id_action_resource *port_action;
16476         struct mlx5_hrxq *hrxq;
16477         struct mlx5_flow_meter_info *next_fm = NULL;
16478         struct mlx5_flow_meter_policy *next_policy;
16479         struct mlx5_flow_meter_sub_policy *next_sub_policy;
16480         struct mlx5_flow_tbl_data_entry *tbl_data;
16481         struct rte_flow_error error;
16482         uint8_t egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16483         uint8_t transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16484         bool mtr_first = egress || (transfer && priv->representor_id != UINT16_MAX);
16485         bool match_src_port = false;
16486         int i;
16487
16488         /* If RSS or Queue, no previous actions / rules is created. */
16489         for (i = 0; i < RTE_COLORS; i++) {
16490                 acts[i].actions_n = 0;
16491                 if (i == RTE_COLOR_RED) {
16492                         /* Only support drop on red. */
16493                         acts[i].dv_actions[0] =
16494                                 mtr_policy->dr_drop_action[domain];
16495                         acts[i].actions_n = 1;
16496                         continue;
16497                 }
16498                 if (i == RTE_COLOR_GREEN &&
16499                     mtr_policy->act_cnt[i].fate_action == MLX5_FLOW_FATE_MTR) {
16500                         struct rte_flow_attr attr = {
16501                                 .transfer = transfer
16502                         };
16503
16504                         next_fm = mlx5_flow_meter_find(priv,
16505                                         mtr_policy->act_cnt[i].next_mtr_id,
16506                                         NULL);
16507                         if (!next_fm) {
16508                                 DRV_LOG(ERR,
16509                                         "Failed to get next hierarchy meter.");
16510                                 goto err_exit;
16511                         }
16512                         if (mlx5_flow_meter_attach(priv, next_fm,
16513                                                    &attr, &error)) {
16514                                 DRV_LOG(ERR, "%s", error.message);
16515                                 next_fm = NULL;
16516                                 goto err_exit;
16517                         }
16518                         /* Meter action must be the first for TX. */
16519                         if (mtr_first) {
16520                                 acts[i].dv_actions[acts[i].actions_n] =
16521                                         next_fm->meter_action;
16522                                 acts[i].actions_n++;
16523                         }
16524                 }
16525                 if (mtr_policy->act_cnt[i].rix_mark) {
16526                         tag = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_TAG],
16527                                         mtr_policy->act_cnt[i].rix_mark);
16528                         if (!tag) {
16529                                 DRV_LOG(ERR, "Failed to find "
16530                                 "mark action for policy.");
16531                                 goto err_exit;
16532                         }
16533                         acts[i].dv_actions[acts[i].actions_n] = tag->action;
16534                         acts[i].actions_n++;
16535                 }
16536                 if (mtr_policy->act_cnt[i].modify_hdr) {
16537                         acts[i].dv_actions[acts[i].actions_n] =
16538                                 mtr_policy->act_cnt[i].modify_hdr->action;
16539                         acts[i].actions_n++;
16540                 }
16541                 if (mtr_policy->act_cnt[i].fate_action) {
16542                         switch (mtr_policy->act_cnt[i].fate_action) {
16543                         case MLX5_FLOW_FATE_PORT_ID:
16544                                 port_action = mlx5_ipool_get
16545                                         (priv->sh->ipool[MLX5_IPOOL_PORT_ID],
16546                                 mtr_policy->act_cnt[i].rix_port_id_action);
16547                                 if (!port_action) {
16548                                         DRV_LOG(ERR, "Failed to find "
16549                                                 "port action for policy.");
16550                                         goto err_exit;
16551                                 }
16552                                 acts[i].dv_actions[acts[i].actions_n] =
16553                                         port_action->action;
16554                                 acts[i].actions_n++;
16555                                 mtr_policy->dev = dev;
16556                                 match_src_port = true;
16557                                 break;
16558                         case MLX5_FLOW_FATE_DROP:
16559                         case MLX5_FLOW_FATE_JUMP:
16560                                 acts[i].dv_actions[acts[i].actions_n] =
16561                                 mtr_policy->act_cnt[i].dr_jump_action[domain];
16562                                 acts[i].actions_n++;
16563                                 break;
16564                         case MLX5_FLOW_FATE_SHARED_RSS:
16565                         case MLX5_FLOW_FATE_QUEUE:
16566                                 hrxq = mlx5_ipool_get
16567                                         (priv->sh->ipool[MLX5_IPOOL_HRXQ],
16568                                          sub_policy->rix_hrxq[i]);
16569                                 if (!hrxq) {
16570                                         DRV_LOG(ERR, "Failed to find "
16571                                                 "queue action for policy.");
16572                                         goto err_exit;
16573                                 }
16574                                 acts[i].dv_actions[acts[i].actions_n] =
16575                                         hrxq->action;
16576                                 acts[i].actions_n++;
16577                                 break;
16578                         case MLX5_FLOW_FATE_MTR:
16579                                 if (!next_fm) {
16580                                         DRV_LOG(ERR,
16581                                                 "No next hierarchy meter.");
16582                                         goto err_exit;
16583                                 }
16584                                 if (!mtr_first) {
16585                                         acts[i].dv_actions[acts[i].actions_n] =
16586                                                         next_fm->meter_action;
16587                                         acts[i].actions_n++;
16588                                 }
16589                                 if (mtr_policy->act_cnt[i].next_sub_policy) {
16590                                         next_sub_policy =
16591                                         mtr_policy->act_cnt[i].next_sub_policy;
16592                                 } else {
16593                                         next_policy =
16594                                                 mlx5_flow_meter_policy_find(dev,
16595                                                 next_fm->policy_id, NULL);
16596                                         MLX5_ASSERT(next_policy);
16597                                         next_sub_policy =
16598                                         next_policy->sub_policys[domain][0];
16599                                 }
16600                                 tbl_data =
16601                                         container_of(next_sub_policy->tbl_rsc,
16602                                         struct mlx5_flow_tbl_data_entry, tbl);
16603                                 acts[i].dv_actions[acts[i].actions_n++] =
16604                                                         tbl_data->jump.action;
16605                                 if (mtr_policy->act_cnt[i].modify_hdr)
16606                                         match_src_port = !!transfer;
16607                                 break;
16608                         default:
16609                                 /*Queue action do nothing*/
16610                                 break;
16611                         }
16612                 }
16613         }
16614         if (__flow_dv_create_domain_policy_rules(dev, sub_policy,
16615                                 egress, transfer, match_src_port, acts)) {
16616                 DRV_LOG(ERR,
16617                         "Failed to create policy rules per domain.");
16618                 goto err_exit;
16619         }
16620         return 0;
16621 err_exit:
16622         if (next_fm)
16623                 mlx5_flow_meter_detach(priv, next_fm);
16624         return -1;
16625 }
16626
16627 /**
16628  * Create the policy rules.
16629  *
16630  * @param[in] dev
16631  *   Pointer to Ethernet device.
16632  * @param[in,out] mtr_policy
16633  *   Pointer to meter policy table.
16634  *
16635  * @return
16636  *   0 on success, -1 otherwise.
16637  */
16638 static int
16639 flow_dv_create_policy_rules(struct rte_eth_dev *dev,
16640                              struct mlx5_flow_meter_policy *mtr_policy)
16641 {
16642         int i;
16643         uint16_t sub_policy_num;
16644
16645         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16646                 sub_policy_num = (mtr_policy->sub_policy_num >>
16647                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i)) &
16648                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16649                 if (!sub_policy_num)
16650                         continue;
16651                 /* Prepare actions list and create policy rules. */
16652                 if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
16653                         mtr_policy->sub_policys[i][0], i)) {
16654                         DRV_LOG(ERR, "Failed to create policy action "
16655                                 "list per domain.");
16656                         return -1;
16657                 }
16658         }
16659         return 0;
16660 }
16661
16662 static int
16663 __flow_dv_create_domain_def_policy(struct rte_eth_dev *dev, uint32_t domain)
16664 {
16665         struct mlx5_priv *priv = dev->data->dev_private;
16666         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16667         struct mlx5_flow_meter_def_policy *def_policy;
16668         struct mlx5_flow_tbl_resource *jump_tbl;
16669         struct mlx5_flow_tbl_data_entry *tbl_data;
16670         uint8_t egress, transfer;
16671         struct rte_flow_error error;
16672         struct mlx5_meter_policy_acts acts[RTE_COLORS];
16673         int ret;
16674
16675         egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16676         transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16677         def_policy = mtrmng->def_policy[domain];
16678         if (!def_policy) {
16679                 def_policy = mlx5_malloc(MLX5_MEM_ZERO,
16680                         sizeof(struct mlx5_flow_meter_def_policy),
16681                         RTE_CACHE_LINE_SIZE, SOCKET_ID_ANY);
16682                 if (!def_policy) {
16683                         DRV_LOG(ERR, "Failed to alloc default policy table.");
16684                         goto def_policy_error;
16685                 }
16686                 mtrmng->def_policy[domain] = def_policy;
16687                 /* Create the meter suffix table with SUFFIX level. */
16688                 jump_tbl = flow_dv_tbl_resource_get(dev,
16689                                 MLX5_FLOW_TABLE_LEVEL_METER,
16690                                 egress, transfer, false, NULL, 0,
16691                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16692                 if (!jump_tbl) {
16693                         DRV_LOG(ERR,
16694                                 "Failed to create meter suffix table.");
16695                         goto def_policy_error;
16696                 }
16697                 def_policy->sub_policy.jump_tbl[RTE_COLOR_GREEN] = jump_tbl;
16698                 tbl_data = container_of(jump_tbl,
16699                                         struct mlx5_flow_tbl_data_entry, tbl);
16700                 def_policy->dr_jump_action[RTE_COLOR_GREEN] =
16701                                                 tbl_data->jump.action;
16702                 acts[RTE_COLOR_GREEN].dv_actions[0] = tbl_data->jump.action;
16703                 acts[RTE_COLOR_GREEN].actions_n = 1;
16704                 /*
16705                  * YELLOW has the same default policy as GREEN does.
16706                  * G & Y share the same table and action. The 2nd time of table
16707                  * resource getting is just to update the reference count for
16708                  * the releasing stage.
16709                  */
16710                 jump_tbl = flow_dv_tbl_resource_get(dev,
16711                                 MLX5_FLOW_TABLE_LEVEL_METER,
16712                                 egress, transfer, false, NULL, 0,
16713                                 0, MLX5_MTR_TABLE_ID_SUFFIX, &error);
16714                 if (!jump_tbl) {
16715                         DRV_LOG(ERR,
16716                                 "Failed to get meter suffix table.");
16717                         goto def_policy_error;
16718                 }
16719                 def_policy->sub_policy.jump_tbl[RTE_COLOR_YELLOW] = jump_tbl;
16720                 tbl_data = container_of(jump_tbl,
16721                                         struct mlx5_flow_tbl_data_entry, tbl);
16722                 def_policy->dr_jump_action[RTE_COLOR_YELLOW] =
16723                                                 tbl_data->jump.action;
16724                 acts[RTE_COLOR_YELLOW].dv_actions[0] = tbl_data->jump.action;
16725                 acts[RTE_COLOR_YELLOW].actions_n = 1;
16726                 /* Create jump action to the drop table. */
16727                 if (!mtrmng->drop_tbl[domain]) {
16728                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get
16729                                 (dev, MLX5_FLOW_TABLE_LEVEL_METER,
16730                                  egress, transfer, false, NULL, 0,
16731                                  0, MLX5_MTR_TABLE_ID_DROP, &error);
16732                         if (!mtrmng->drop_tbl[domain]) {
16733                                 DRV_LOG(ERR, "Failed to create meter "
16734                                         "drop table for default policy.");
16735                                 goto def_policy_error;
16736                         }
16737                 }
16738                 /* all RED: unique Drop table for jump action. */
16739                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16740                                         struct mlx5_flow_tbl_data_entry, tbl);
16741                 def_policy->dr_jump_action[RTE_COLOR_RED] =
16742                                                 tbl_data->jump.action;
16743                 acts[RTE_COLOR_RED].dv_actions[0] = tbl_data->jump.action;
16744                 acts[RTE_COLOR_RED].actions_n = 1;
16745                 /* Create default policy rules. */
16746                 ret = __flow_dv_create_domain_policy_rules(dev,
16747                                         &def_policy->sub_policy,
16748                                         egress, transfer, false, acts);
16749                 if (ret) {
16750                         DRV_LOG(ERR, "Failed to create default policy rules.");
16751                         goto def_policy_error;
16752                 }
16753         }
16754         return 0;
16755 def_policy_error:
16756         __flow_dv_destroy_domain_def_policy(dev,
16757                                             (enum mlx5_meter_domain)domain);
16758         return -1;
16759 }
16760
16761 /**
16762  * Create the default policy table set.
16763  *
16764  * @param[in] dev
16765  *   Pointer to Ethernet device.
16766  * @return
16767  *   0 on success, -1 otherwise.
16768  */
16769 static int
16770 flow_dv_create_def_policy(struct rte_eth_dev *dev)
16771 {
16772         struct mlx5_priv *priv = dev->data->dev_private;
16773         int i;
16774
16775         /* Non-termination policy table. */
16776         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16777                 if (!priv->sh->config.dv_esw_en &&
16778                     i == MLX5_MTR_DOMAIN_TRANSFER)
16779                         continue;
16780                 if (__flow_dv_create_domain_def_policy(dev, i)) {
16781                         DRV_LOG(ERR, "Failed to create default policy");
16782                         /* Rollback the created default policies for others. */
16783                         flow_dv_destroy_def_policy(dev);
16784                         return -1;
16785                 }
16786         }
16787         return 0;
16788 }
16789
16790 /**
16791  * Create the needed meter tables.
16792  * Lock free, (mutex should be acquired by caller).
16793  *
16794  * @param[in] dev
16795  *   Pointer to Ethernet device.
16796  * @param[in] fm
16797  *   Meter information table.
16798  * @param[in] mtr_idx
16799  *   Meter index.
16800  * @param[in] domain_bitmap
16801  *   Domain bitmap.
16802  * @return
16803  *   0 on success, -1 otherwise.
16804  */
16805 static int
16806 flow_dv_create_mtr_tbls(struct rte_eth_dev *dev,
16807                         struct mlx5_flow_meter_info *fm,
16808                         uint32_t mtr_idx,
16809                         uint8_t domain_bitmap)
16810 {
16811         struct mlx5_priv *priv = dev->data->dev_private;
16812         struct mlx5_flow_mtr_mng *mtrmng = priv->sh->mtrmng;
16813         struct rte_flow_error error;
16814         struct mlx5_flow_tbl_data_entry *tbl_data;
16815         uint8_t egress, transfer;
16816         void *actions[METER_ACTIONS];
16817         int domain, ret, i;
16818         struct mlx5_flow_counter *cnt;
16819         struct mlx5_flow_dv_match_params value = {
16820                 .size = sizeof(value.buf),
16821         };
16822         struct mlx5_flow_dv_match_params matcher_para = {
16823                 .size = sizeof(matcher_para.buf),
16824         };
16825         int mtr_id_reg_c = mlx5_flow_get_reg_id(dev, MLX5_MTR_ID,
16826                                                      0, &error);
16827         uint32_t mtr_id_mask = (UINT32_C(1) << mtrmng->max_mtr_bits) - 1;
16828         uint8_t mtr_id_offset = priv->mtr_reg_share ? MLX5_MTR_COLOR_BITS : 0;
16829         struct mlx5_list_entry *entry;
16830         struct mlx5_flow_dv_matcher matcher = {
16831                 .mask = {
16832                         .size = sizeof(matcher.mask.buf),
16833                 },
16834         };
16835         struct mlx5_flow_dv_matcher *drop_matcher;
16836         struct mlx5_flow_cb_ctx ctx = {
16837                 .error = &error,
16838                 .data = &matcher,
16839         };
16840         uint8_t misc_mask;
16841
16842         if (!priv->mtr_en || mtr_id_reg_c < 0) {
16843                 rte_errno = ENOTSUP;
16844                 return -1;
16845         }
16846         for (domain = 0; domain < MLX5_MTR_DOMAIN_MAX; domain++) {
16847                 if (!(domain_bitmap & (1 << domain)) ||
16848                         (mtrmng->def_rule[domain] && !fm->drop_cnt))
16849                         continue;
16850                 egress = (domain == MLX5_MTR_DOMAIN_EGRESS) ? 1 : 0;
16851                 transfer = (domain == MLX5_MTR_DOMAIN_TRANSFER) ? 1 : 0;
16852                 /* Create the drop table with METER DROP level. */
16853                 if (!mtrmng->drop_tbl[domain]) {
16854                         mtrmng->drop_tbl[domain] = flow_dv_tbl_resource_get(dev,
16855                                         MLX5_FLOW_TABLE_LEVEL_METER,
16856                                         egress, transfer, false, NULL, 0,
16857                                         0, MLX5_MTR_TABLE_ID_DROP, &error);
16858                         if (!mtrmng->drop_tbl[domain]) {
16859                                 DRV_LOG(ERR, "Failed to create meter drop table.");
16860                                 goto policy_error;
16861                         }
16862                 }
16863                 /* Create default matcher in drop table. */
16864                 matcher.tbl = mtrmng->drop_tbl[domain],
16865                 tbl_data = container_of(mtrmng->drop_tbl[domain],
16866                                 struct mlx5_flow_tbl_data_entry, tbl);
16867                 if (!mtrmng->def_matcher[domain]) {
16868                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16869                                        (enum modify_reg)mtr_id_reg_c,
16870                                        0, 0);
16871                         matcher.priority = MLX5_MTRS_DEFAULT_RULE_PRIORITY;
16872                         matcher.crc = rte_raw_cksum
16873                                         ((const void *)matcher.mask.buf,
16874                                         matcher.mask.size);
16875                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16876                         if (!entry) {
16877                                 DRV_LOG(ERR, "Failed to register meter "
16878                                 "drop default matcher.");
16879                                 goto policy_error;
16880                         }
16881                         mtrmng->def_matcher[domain] = container_of(entry,
16882                         struct mlx5_flow_dv_matcher, entry);
16883                 }
16884                 /* Create default rule in drop table. */
16885                 if (!mtrmng->def_rule[domain]) {
16886                         i = 0;
16887                         actions[i++] = priv->sh->dr_drop_action;
16888                         flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16889                                 (enum modify_reg)mtr_id_reg_c, 0, 0);
16890                         misc_mask = flow_dv_matcher_enable(value.buf);
16891                         __flow_dv_adjust_buf_size(&value.size, misc_mask);
16892                         ret = mlx5_flow_os_create_flow
16893                                 (mtrmng->def_matcher[domain]->matcher_object,
16894                                 (void *)&value, i, actions,
16895                                 &mtrmng->def_rule[domain]);
16896                         if (ret) {
16897                                 DRV_LOG(ERR, "Failed to create meter "
16898                                 "default drop rule for drop table.");
16899                                 goto policy_error;
16900                         }
16901                 }
16902                 if (!fm->drop_cnt)
16903                         continue;
16904                 MLX5_ASSERT(mtrmng->max_mtr_bits);
16905                 if (!mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1]) {
16906                         /* Create matchers for Drop. */
16907                         flow_dv_match_meta_reg(matcher.mask.buf, value.buf,
16908                                         (enum modify_reg)mtr_id_reg_c, 0,
16909                                         (mtr_id_mask << mtr_id_offset));
16910                         matcher.priority = MLX5_REG_BITS - mtrmng->max_mtr_bits;
16911                         matcher.crc = rte_raw_cksum
16912                                         ((const void *)matcher.mask.buf,
16913                                         matcher.mask.size);
16914                         entry = mlx5_list_register(tbl_data->matchers, &ctx);
16915                         if (!entry) {
16916                                 DRV_LOG(ERR,
16917                                 "Failed to register meter drop matcher.");
16918                                 goto policy_error;
16919                         }
16920                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1] =
16921                                 container_of(entry, struct mlx5_flow_dv_matcher,
16922                                              entry);
16923                 }
16924                 drop_matcher =
16925                         mtrmng->drop_matcher[domain][mtrmng->max_mtr_bits - 1];
16926                 /* Create drop rule, matching meter_id only. */
16927                 flow_dv_match_meta_reg(matcher_para.buf, value.buf,
16928                                 (enum modify_reg)mtr_id_reg_c,
16929                                 (mtr_idx << mtr_id_offset), UINT32_MAX);
16930                 i = 0;
16931                 cnt = flow_dv_counter_get_by_idx(dev,
16932                                         fm->drop_cnt, NULL);
16933                 actions[i++] = cnt->action;
16934                 actions[i++] = priv->sh->dr_drop_action;
16935                 misc_mask = flow_dv_matcher_enable(value.buf);
16936                 __flow_dv_adjust_buf_size(&value.size, misc_mask);
16937                 ret = mlx5_flow_os_create_flow(drop_matcher->matcher_object,
16938                                                (void *)&value, i, actions,
16939                                                &fm->drop_rule[domain]);
16940                 if (ret) {
16941                         DRV_LOG(ERR, "Failed to create meter "
16942                                 "drop rule for drop table.");
16943                                 goto policy_error;
16944                 }
16945         }
16946         return 0;
16947 policy_error:
16948         for (i = 0; i < MLX5_MTR_DOMAIN_MAX; i++) {
16949                 if (fm->drop_rule[i]) {
16950                         claim_zero(mlx5_flow_os_destroy_flow
16951                                 (fm->drop_rule[i]));
16952                         fm->drop_rule[i] = NULL;
16953                 }
16954         }
16955         return -1;
16956 }
16957
16958 static struct mlx5_flow_meter_sub_policy *
16959 __flow_dv_meter_get_rss_sub_policy(struct rte_eth_dev *dev,
16960                 struct mlx5_flow_meter_policy *mtr_policy,
16961                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS],
16962                 struct mlx5_flow_meter_sub_policy *next_sub_policy,
16963                 bool *is_reuse)
16964 {
16965         struct mlx5_priv *priv = dev->data->dev_private;
16966         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
16967         uint32_t sub_policy_idx = 0;
16968         uint32_t hrxq_idx[MLX5_MTR_RTE_COLORS] = {0};
16969         uint32_t i, j;
16970         struct mlx5_hrxq *hrxq;
16971         struct mlx5_flow_handle dh;
16972         struct mlx5_meter_policy_action_container *act_cnt;
16973         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
16974         uint16_t sub_policy_num;
16975         struct mlx5_flow_workspace *wks = mlx5_flow_get_thread_workspace();
16976
16977         MLX5_ASSERT(wks);
16978         rte_spinlock_lock(&mtr_policy->sl);
16979         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16980                 if (!rss_desc[i])
16981                         continue;
16982                 hrxq = mlx5_hrxq_get(dev, rss_desc[i]);
16983                 if (!hrxq) {
16984                         rte_spinlock_unlock(&mtr_policy->sl);
16985                         return NULL;
16986                 }
16987                 hrxq_idx[i] = hrxq->idx;
16988         }
16989         sub_policy_num = (mtr_policy->sub_policy_num >>
16990                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
16991                         MLX5_MTR_SUB_POLICY_NUM_MASK;
16992         for (j = 0; j < sub_policy_num; j++) {
16993                 for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
16994                         if (rss_desc[i] &&
16995                             hrxq_idx[i] !=
16996                             mtr_policy->sub_policys[domain][j]->rix_hrxq[i])
16997                                 break;
16998                 }
16999                 if (i >= MLX5_MTR_RTE_COLORS) {
17000                         /*
17001                          * Found the sub policy table with
17002                          * the same queue per color.
17003                          */
17004                         rte_spinlock_unlock(&mtr_policy->sl);
17005                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
17006                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
17007                         *is_reuse = true;
17008                         return mtr_policy->sub_policys[domain][j];
17009                 }
17010         }
17011         /* Create sub policy. */
17012         if (!mtr_policy->sub_policys[domain][0]->rix_hrxq[0]) {
17013                 /* Reuse the first pre-allocated sub_policy. */
17014                 sub_policy = mtr_policy->sub_policys[domain][0];
17015                 sub_policy_idx = sub_policy->idx;
17016         } else {
17017                 sub_policy = mlx5_ipool_zmalloc
17018                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17019                                  &sub_policy_idx);
17020                 if (!sub_policy ||
17021                     sub_policy_idx > MLX5_MAX_SUB_POLICY_TBL_NUM) {
17022                         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++)
17023                                 mlx5_hrxq_release(dev, hrxq_idx[i]);
17024                         goto rss_sub_policy_error;
17025                 }
17026                 sub_policy->idx = sub_policy_idx;
17027                 sub_policy->main_policy = mtr_policy;
17028         }
17029         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17030                 if (!rss_desc[i])
17031                         continue;
17032                 sub_policy->rix_hrxq[i] = hrxq_idx[i];
17033                 if (mtr_policy->is_hierarchy) {
17034                         act_cnt = &mtr_policy->act_cnt[i];
17035                         act_cnt->next_sub_policy = next_sub_policy;
17036                         mlx5_hrxq_release(dev, hrxq_idx[i]);
17037                 } else {
17038                         /*
17039                          * Overwrite the last action from
17040                          * RSS action to Queue action.
17041                          */
17042                         hrxq = mlx5_ipool_get(priv->sh->ipool[MLX5_IPOOL_HRXQ],
17043                                               hrxq_idx[i]);
17044                         if (!hrxq) {
17045                                 DRV_LOG(ERR, "Failed to get policy hrxq");
17046                                 goto rss_sub_policy_error;
17047                         }
17048                         act_cnt = &mtr_policy->act_cnt[i];
17049                         if (act_cnt->rix_mark || act_cnt->modify_hdr) {
17050                                 memset(&dh, 0, sizeof(struct mlx5_flow_handle));
17051                                 if (act_cnt->rix_mark)
17052                                         wks->mark = 1;
17053                                 dh.fate_action = MLX5_FLOW_FATE_QUEUE;
17054                                 dh.rix_hrxq = hrxq_idx[i];
17055                                 flow_drv_rxq_flags_set(dev, &dh);
17056                         }
17057                 }
17058         }
17059         if (__flow_dv_create_policy_acts_rules(dev, mtr_policy,
17060                                                sub_policy, domain)) {
17061                 DRV_LOG(ERR, "Failed to create policy "
17062                         "rules for ingress domain.");
17063                 goto rss_sub_policy_error;
17064         }
17065         if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17066                 i = (mtr_policy->sub_policy_num >>
17067                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17068                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17069                 if (i >= MLX5_MTR_RSS_MAX_SUB_POLICY) {
17070                         DRV_LOG(ERR, "No free sub-policy slot.");
17071                         goto rss_sub_policy_error;
17072                 }
17073                 mtr_policy->sub_policys[domain][i] = sub_policy;
17074                 i++;
17075                 mtr_policy->sub_policy_num &= ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17076                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17077                 mtr_policy->sub_policy_num |=
17078                         (i & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17079                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17080         }
17081         rte_spinlock_unlock(&mtr_policy->sl);
17082         *is_reuse = false;
17083         return sub_policy;
17084 rss_sub_policy_error:
17085         if (sub_policy) {
17086                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
17087                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17088                         i = (mtr_policy->sub_policy_num >>
17089                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17090                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17091                         mtr_policy->sub_policys[domain][i] = NULL;
17092                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17093                                         sub_policy->idx);
17094                 }
17095         }
17096         rte_spinlock_unlock(&mtr_policy->sl);
17097         return NULL;
17098 }
17099
17100 /**
17101  * Find the policy table for prefix table with RSS.
17102  *
17103  * @param[in] dev
17104  *   Pointer to Ethernet device.
17105  * @param[in] mtr_policy
17106  *   Pointer to meter policy table.
17107  * @param[in] rss_desc
17108  *   Pointer to rss_desc
17109  * @return
17110  *   Pointer to table set on success, NULL otherwise and rte_errno is set.
17111  */
17112 static struct mlx5_flow_meter_sub_policy *
17113 flow_dv_meter_sub_policy_rss_prepare(struct rte_eth_dev *dev,
17114                 struct mlx5_flow_meter_policy *mtr_policy,
17115                 struct mlx5_flow_rss_desc *rss_desc[MLX5_MTR_RTE_COLORS])
17116 {
17117         struct mlx5_priv *priv = dev->data->dev_private;
17118         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17119         struct mlx5_flow_meter_info *next_fm;
17120         struct mlx5_flow_meter_policy *next_policy;
17121         struct mlx5_flow_meter_sub_policy *next_sub_policy = NULL;
17122         struct mlx5_flow_meter_policy *policies[MLX5_MTR_CHAIN_MAX_NUM];
17123         struct mlx5_flow_meter_sub_policy *sub_policies[MLX5_MTR_CHAIN_MAX_NUM];
17124         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17125         bool reuse_sub_policy;
17126         uint32_t i = 0;
17127         uint32_t j = 0;
17128
17129         while (true) {
17130                 /* Iterate hierarchy to get all policies in this hierarchy. */
17131                 policies[i++] = mtr_policy;
17132                 if (!mtr_policy->is_hierarchy)
17133                         break;
17134                 if (i >= MLX5_MTR_CHAIN_MAX_NUM) {
17135                         DRV_LOG(ERR, "Exceed max meter number in hierarchy.");
17136                         return NULL;
17137                 }
17138                 next_fm = mlx5_flow_meter_find(priv,
17139                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
17140                 if (!next_fm) {
17141                         DRV_LOG(ERR, "Failed to get next meter in hierarchy.");
17142                         return NULL;
17143                 }
17144                 next_policy =
17145                         mlx5_flow_meter_policy_find(dev, next_fm->policy_id,
17146                                                     NULL);
17147                 MLX5_ASSERT(next_policy);
17148                 mtr_policy = next_policy;
17149         }
17150         while (i) {
17151                 /**
17152                  * From last policy to the first one in hierarchy,
17153                  * create / get the sub policy for each of them.
17154                  */
17155                 sub_policy = __flow_dv_meter_get_rss_sub_policy(dev,
17156                                                         policies[--i],
17157                                                         rss_desc,
17158                                                         next_sub_policy,
17159                                                         &reuse_sub_policy);
17160                 if (!sub_policy) {
17161                         DRV_LOG(ERR, "Failed to get the sub policy.");
17162                         goto err_exit;
17163                 }
17164                 if (!reuse_sub_policy)
17165                         sub_policies[j++] = sub_policy;
17166                 next_sub_policy = sub_policy;
17167         }
17168         return sub_policy;
17169 err_exit:
17170         while (j) {
17171                 uint16_t sub_policy_num;
17172
17173                 sub_policy = sub_policies[--j];
17174                 mtr_policy = sub_policy->main_policy;
17175                 __flow_dv_destroy_sub_policy_rules(dev, sub_policy);
17176                 if (sub_policy != mtr_policy->sub_policys[domain][0]) {
17177                         sub_policy_num = (mtr_policy->sub_policy_num >>
17178                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17179                                 MLX5_MTR_SUB_POLICY_NUM_MASK;
17180                         mtr_policy->sub_policys[domain][sub_policy_num - 1] =
17181                                                                         NULL;
17182                         sub_policy_num--;
17183                         mtr_policy->sub_policy_num &=
17184                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17185                                   (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i));
17186                         mtr_policy->sub_policy_num |=
17187                         (sub_policy_num & MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17188                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * i);
17189                         mlx5_ipool_free(priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17190                                         sub_policy->idx);
17191                 }
17192         }
17193         return NULL;
17194 }
17195
17196 /**
17197  * Create the sub policy tag rule for all meters in hierarchy.
17198  *
17199  * @param[in] dev
17200  *   Pointer to Ethernet device.
17201  * @param[in] fm
17202  *   Meter information table.
17203  * @param[in] src_port
17204  *   The src port this extra rule should use.
17205  * @param[in] item
17206  *   The src port match item.
17207  * @param[out] error
17208  *   Perform verbose error reporting if not NULL.
17209  * @return
17210  *   0 on success, a negative errno value otherwise and rte_errno is set.
17211  */
17212 static int
17213 flow_dv_meter_hierarchy_rule_create(struct rte_eth_dev *dev,
17214                                 struct mlx5_flow_meter_info *fm,
17215                                 int32_t src_port,
17216                                 const struct rte_flow_item *item,
17217                                 struct rte_flow_error *error)
17218 {
17219         struct mlx5_priv *priv = dev->data->dev_private;
17220         struct mlx5_flow_meter_policy *mtr_policy;
17221         struct mlx5_flow_meter_sub_policy *sub_policy;
17222         struct mlx5_flow_meter_info *next_fm = NULL;
17223         struct mlx5_flow_meter_policy *next_policy;
17224         struct mlx5_flow_meter_sub_policy *next_sub_policy;
17225         struct mlx5_flow_tbl_data_entry *tbl_data;
17226         struct mlx5_sub_policy_color_rule *color_rule;
17227         struct mlx5_meter_policy_acts acts;
17228         uint32_t color_reg_c_idx;
17229         bool mtr_first = (src_port != UINT16_MAX) ? true : false;
17230         struct rte_flow_attr attr = {
17231                 .group = MLX5_FLOW_TABLE_LEVEL_POLICY,
17232                 .priority = 0,
17233                 .ingress = 0,
17234                 .egress = 0,
17235                 .transfer = 1,
17236                 .reserved = 0,
17237         };
17238         uint32_t domain = MLX5_MTR_DOMAIN_TRANSFER;
17239         int i;
17240
17241         mtr_policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17242         MLX5_ASSERT(mtr_policy);
17243         if (!mtr_policy->is_hierarchy)
17244                 return 0;
17245         next_fm = mlx5_flow_meter_find(priv,
17246                         mtr_policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id, NULL);
17247         if (!next_fm) {
17248                 return rte_flow_error_set(error, EINVAL,
17249                                 RTE_FLOW_ERROR_TYPE_ACTION, NULL,
17250                                 "Failed to find next meter in hierarchy.");
17251         }
17252         if (!next_fm->drop_cnt)
17253                 goto exit;
17254         color_reg_c_idx = mlx5_flow_get_reg_id(dev, MLX5_MTR_COLOR, 0, error);
17255         sub_policy = mtr_policy->sub_policys[domain][0];
17256         for (i = 0; i < RTE_COLORS; i++) {
17257                 bool rule_exist = false;
17258                 struct mlx5_meter_policy_action_container *act_cnt;
17259
17260                 if (i >= RTE_COLOR_YELLOW)
17261                         break;
17262                 TAILQ_FOREACH(color_rule,
17263                               &sub_policy->color_rules[i], next_port)
17264                         if (color_rule->src_port == src_port) {
17265                                 rule_exist = true;
17266                                 break;
17267                         }
17268                 if (rule_exist)
17269                         continue;
17270                 color_rule = mlx5_malloc(MLX5_MEM_ZERO,
17271                                 sizeof(struct mlx5_sub_policy_color_rule),
17272                                 0, SOCKET_ID_ANY);
17273                 if (!color_rule)
17274                         return rte_flow_error_set(error, ENOMEM,
17275                                 RTE_FLOW_ERROR_TYPE_ACTION,
17276                                 NULL, "No memory to create tag color rule.");
17277                 color_rule->src_port = src_port;
17278                 attr.priority = i;
17279                 next_policy = mlx5_flow_meter_policy_find(dev,
17280                                                 next_fm->policy_id, NULL);
17281                 MLX5_ASSERT(next_policy);
17282                 next_sub_policy = next_policy->sub_policys[domain][0];
17283                 tbl_data = container_of(next_sub_policy->tbl_rsc,
17284                                         struct mlx5_flow_tbl_data_entry, tbl);
17285                 act_cnt = &mtr_policy->act_cnt[i];
17286                 if (mtr_first) {
17287                         acts.dv_actions[0] = next_fm->meter_action;
17288                         acts.dv_actions[1] = act_cnt->modify_hdr->action;
17289                 } else {
17290                         acts.dv_actions[0] = act_cnt->modify_hdr->action;
17291                         acts.dv_actions[1] = next_fm->meter_action;
17292                 }
17293                 acts.dv_actions[2] = tbl_data->jump.action;
17294                 acts.actions_n = 3;
17295                 if (mlx5_flow_meter_attach(priv, next_fm, &attr, error)) {
17296                         next_fm = NULL;
17297                         goto err_exit;
17298                 }
17299                 if (__flow_dv_create_policy_matcher(dev, color_reg_c_idx,
17300                                 MLX5_MTR_POLICY_MATCHER_PRIO, sub_policy,
17301                                 &attr, true, item,
17302                                 &color_rule->matcher, error)) {
17303                         rte_flow_error_set(error, errno,
17304                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17305                                 "Failed to create hierarchy meter matcher.");
17306                         goto err_exit;
17307                 }
17308                 if (__flow_dv_create_policy_flow(dev, color_reg_c_idx,
17309                                         (enum rte_color)i,
17310                                         color_rule->matcher->matcher_object,
17311                                         acts.actions_n, acts.dv_actions,
17312                                         true, item,
17313                                         &color_rule->rule, &attr)) {
17314                         rte_flow_error_set(error, errno,
17315                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17316                                 "Failed to create hierarchy meter rule.");
17317                         goto err_exit;
17318                 }
17319                 TAILQ_INSERT_TAIL(&sub_policy->color_rules[i],
17320                                   color_rule, next_port);
17321         }
17322 exit:
17323         /**
17324          * Recursive call to iterate all meters in hierarchy and
17325          * create needed rules.
17326          */
17327         return flow_dv_meter_hierarchy_rule_create(dev, next_fm,
17328                                                 src_port, item, error);
17329 err_exit:
17330         if (color_rule) {
17331                 if (color_rule->rule)
17332                         mlx5_flow_os_destroy_flow(color_rule->rule);
17333                 if (color_rule->matcher) {
17334                         struct mlx5_flow_tbl_data_entry *tbl =
17335                                 container_of(color_rule->matcher->tbl,
17336                                                 typeof(*tbl), tbl);
17337                         mlx5_list_unregister(tbl->matchers,
17338                                                 &color_rule->matcher->entry);
17339                 }
17340                 mlx5_free(color_rule);
17341         }
17342         if (next_fm)
17343                 mlx5_flow_meter_detach(priv, next_fm);
17344         return -rte_errno;
17345 }
17346
17347 /**
17348  * Destroy the sub policy table with RX queue.
17349  *
17350  * @param[in] dev
17351  *   Pointer to Ethernet device.
17352  * @param[in] mtr_policy
17353  *   Pointer to meter policy table.
17354  */
17355 static void
17356 flow_dv_destroy_sub_policy_with_rxq(struct rte_eth_dev *dev,
17357                                     struct mlx5_flow_meter_policy *mtr_policy)
17358 {
17359         struct mlx5_priv *priv = dev->data->dev_private;
17360         struct mlx5_flow_meter_sub_policy *sub_policy = NULL;
17361         uint32_t domain = MLX5_MTR_DOMAIN_INGRESS;
17362         uint32_t i, j;
17363         uint16_t sub_policy_num, new_policy_num;
17364
17365         rte_spinlock_lock(&mtr_policy->sl);
17366         for (i = 0; i < MLX5_MTR_RTE_COLORS; i++) {
17367                 switch (mtr_policy->act_cnt[i].fate_action) {
17368                 case MLX5_FLOW_FATE_SHARED_RSS:
17369                         sub_policy_num = (mtr_policy->sub_policy_num >>
17370                         (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain)) &
17371                         MLX5_MTR_SUB_POLICY_NUM_MASK;
17372                         new_policy_num = sub_policy_num;
17373                         for (j = 0; j < sub_policy_num; j++) {
17374                                 sub_policy =
17375                                         mtr_policy->sub_policys[domain][j];
17376                                 if (sub_policy) {
17377                                         __flow_dv_destroy_sub_policy_rules(dev,
17378                                                 sub_policy);
17379                                 if (sub_policy !=
17380                                         mtr_policy->sub_policys[domain][0]) {
17381                                         mtr_policy->sub_policys[domain][j] =
17382                                                                 NULL;
17383                                         mlx5_ipool_free
17384                                 (priv->sh->ipool[MLX5_IPOOL_MTR_POLICY],
17385                                                 sub_policy->idx);
17386                                                 new_policy_num--;
17387                                         }
17388                                 }
17389                         }
17390                         if (new_policy_num != sub_policy_num) {
17391                                 mtr_policy->sub_policy_num &=
17392                                 ~(MLX5_MTR_SUB_POLICY_NUM_MASK <<
17393                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain));
17394                                 mtr_policy->sub_policy_num |=
17395                                 (new_policy_num &
17396                                         MLX5_MTR_SUB_POLICY_NUM_MASK) <<
17397                                 (MLX5_MTR_SUB_POLICY_NUM_SHIFT * domain);
17398                         }
17399                         break;
17400                 case MLX5_FLOW_FATE_QUEUE:
17401                         sub_policy = mtr_policy->sub_policys[domain][0];
17402                         __flow_dv_destroy_sub_policy_rules(dev,
17403                                                            sub_policy);
17404                         break;
17405                 default:
17406                         /*Other actions without queue and do nothing*/
17407                         break;
17408                 }
17409         }
17410         rte_spinlock_unlock(&mtr_policy->sl);
17411 }
17412 /**
17413  * Check whether the DR drop action is supported on the root table or not.
17414  *
17415  * Create a simple flow with DR drop action on root table to validate
17416  * if DR drop action on root table is supported or not.
17417  *
17418  * @param[in] dev
17419  *   Pointer to rte_eth_dev structure.
17420  *
17421  * @return
17422  *   0 on success, a negative errno value otherwise and rte_errno is set.
17423  */
17424 int
17425 mlx5_flow_discover_dr_action_support(struct rte_eth_dev *dev)
17426 {
17427         struct mlx5_priv *priv = dev->data->dev_private;
17428         struct mlx5_dev_ctx_shared *sh = priv->sh;
17429         struct mlx5_flow_dv_match_params mask = {
17430                 .size = sizeof(mask.buf),
17431         };
17432         struct mlx5_flow_dv_match_params value = {
17433                 .size = sizeof(value.buf),
17434         };
17435         struct mlx5dv_flow_matcher_attr dv_attr = {
17436                 .type = IBV_FLOW_ATTR_NORMAL,
17437                 .priority = 0,
17438                 .match_criteria_enable = 0,
17439                 .match_mask = (void *)&mask,
17440         };
17441         struct mlx5_flow_tbl_resource *tbl = NULL;
17442         void *matcher = NULL;
17443         void *flow = NULL;
17444         int ret = -1;
17445
17446         tbl = flow_dv_tbl_resource_get(dev, 0, 0, 0, false, NULL,
17447                                         0, 0, 0, NULL);
17448         if (!tbl)
17449                 goto err;
17450         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17451         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17452         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17453                                                tbl->obj, &matcher);
17454         if (ret)
17455                 goto err;
17456         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17457         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17458                                        &sh->dr_drop_action, &flow);
17459 err:
17460         /*
17461          * If DR drop action is not supported on root table, flow create will
17462          * be failed with EOPNOTSUPP or EPROTONOSUPPORT.
17463          */
17464         if (!flow) {
17465                 if (matcher &&
17466                     (errno == EPROTONOSUPPORT || errno == EOPNOTSUPP))
17467                         DRV_LOG(INFO, "DR drop action is not supported in root table.");
17468                 else
17469                         DRV_LOG(ERR, "Unexpected error in DR drop action support detection");
17470                 ret = -1;
17471         } else {
17472                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17473         }
17474         if (matcher)
17475                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17476         if (tbl)
17477                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17478         return ret;
17479 }
17480
17481 /**
17482  * Validate the batch counter support in root table.
17483  *
17484  * Create a simple flow with invalid counter and drop action on root table to
17485  * validate if batch counter with offset on root table is supported or not.
17486  *
17487  * @param[in] dev
17488  *   Pointer to rte_eth_dev structure.
17489  *
17490  * @return
17491  *   0 on success, a negative errno value otherwise and rte_errno is set.
17492  */
17493 int
17494 mlx5_flow_dv_discover_counter_offset_support(struct rte_eth_dev *dev)
17495 {
17496         struct mlx5_priv *priv = dev->data->dev_private;
17497         struct mlx5_dev_ctx_shared *sh = priv->sh;
17498         struct mlx5_flow_dv_match_params mask = {
17499                 .size = sizeof(mask.buf),
17500         };
17501         struct mlx5_flow_dv_match_params value = {
17502                 .size = sizeof(value.buf),
17503         };
17504         struct mlx5dv_flow_matcher_attr dv_attr = {
17505                 .type = IBV_FLOW_ATTR_NORMAL | IBV_FLOW_ATTR_FLAGS_EGRESS,
17506                 .priority = 0,
17507                 .match_criteria_enable = 0,
17508                 .match_mask = (void *)&mask,
17509         };
17510         void *actions[2] = { 0 };
17511         struct mlx5_flow_tbl_resource *tbl = NULL;
17512         struct mlx5_devx_obj *dcs = NULL;
17513         void *matcher = NULL;
17514         void *flow = NULL;
17515         int ret = -1;
17516
17517         tbl = flow_dv_tbl_resource_get(dev, 0, 1, 0, false, NULL,
17518                                         0, 0, 0, NULL);
17519         if (!tbl)
17520                 goto err;
17521         dcs = mlx5_devx_cmd_flow_counter_alloc(priv->sh->cdev->ctx, 0x4);
17522         if (!dcs)
17523                 goto err;
17524         ret = mlx5_flow_os_create_flow_action_count(dcs->obj, UINT16_MAX,
17525                                                     &actions[0]);
17526         if (ret)
17527                 goto err;
17528         dv_attr.match_criteria_enable = flow_dv_matcher_enable(mask.buf);
17529         __flow_dv_adjust_buf_size(&mask.size, dv_attr.match_criteria_enable);
17530         ret = mlx5_flow_os_create_flow_matcher(sh->cdev->ctx, &dv_attr,
17531                                                tbl->obj, &matcher);
17532         if (ret)
17533                 goto err;
17534         __flow_dv_adjust_buf_size(&value.size, dv_attr.match_criteria_enable);
17535         ret = mlx5_flow_os_create_flow(matcher, (void *)&value, 1,
17536                                        actions, &flow);
17537 err:
17538         /*
17539          * If batch counter with offset is not supported, the driver will not
17540          * validate the invalid offset value, flow create should success.
17541          * In this case, it means batch counter is not supported in root table.
17542          *
17543          * Otherwise, if flow create is failed, counter offset is supported.
17544          */
17545         if (flow) {
17546                 DRV_LOG(INFO, "Batch counter is not supported in root "
17547                               "table. Switch to fallback mode.");
17548                 rte_errno = ENOTSUP;
17549                 ret = -rte_errno;
17550                 claim_zero(mlx5_flow_os_destroy_flow(flow));
17551         } else {
17552                 /* Check matcher to make sure validate fail at flow create. */
17553                 if (!matcher || (matcher && errno != EINVAL))
17554                         DRV_LOG(ERR, "Unexpected error in counter offset "
17555                                      "support detection");
17556                 ret = 0;
17557         }
17558         if (actions[0])
17559                 claim_zero(mlx5_flow_os_destroy_flow_action(actions[0]));
17560         if (matcher)
17561                 claim_zero(mlx5_flow_os_destroy_flow_matcher(matcher));
17562         if (tbl)
17563                 flow_dv_tbl_resource_release(MLX5_SH(dev), tbl);
17564         if (dcs)
17565                 claim_zero(mlx5_devx_cmd_destroy(dcs));
17566         return ret;
17567 }
17568
17569 /**
17570  * Query a devx counter.
17571  *
17572  * @param[in] dev
17573  *   Pointer to the Ethernet device structure.
17574  * @param[in] cnt
17575  *   Index to the flow counter.
17576  * @param[in] clear
17577  *   Set to clear the counter statistics.
17578  * @param[out] pkts
17579  *   The statistics value of packets.
17580  * @param[out] bytes
17581  *   The statistics value of bytes.
17582  *
17583  * @return
17584  *   0 on success, otherwise return -1.
17585  */
17586 static int
17587 flow_dv_counter_query(struct rte_eth_dev *dev, uint32_t counter, bool clear,
17588                       uint64_t *pkts, uint64_t *bytes, void **action)
17589 {
17590         struct mlx5_priv *priv = dev->data->dev_private;
17591         struct mlx5_flow_counter *cnt;
17592         uint64_t inn_pkts, inn_bytes;
17593         int ret;
17594
17595         if (!priv->sh->cdev->config.devx)
17596                 return -1;
17597
17598         ret = _flow_dv_query_count(dev, counter, &inn_pkts, &inn_bytes);
17599         if (ret)
17600                 return -1;
17601         cnt = flow_dv_counter_get_by_idx(dev, counter, NULL);
17602         if (cnt && action)
17603                 *action = cnt->action;
17604
17605         *pkts = inn_pkts - cnt->hits;
17606         *bytes = inn_bytes - cnt->bytes;
17607         if (clear) {
17608                 cnt->hits = inn_pkts;
17609                 cnt->bytes = inn_bytes;
17610         }
17611         return 0;
17612 }
17613
17614 /**
17615  * Get aged-out flows.
17616  *
17617  * @param[in] dev
17618  *   Pointer to the Ethernet device structure.
17619  * @param[in] context
17620  *   The address of an array of pointers to the aged-out flows contexts.
17621  * @param[in] nb_contexts
17622  *   The length of context array pointers.
17623  * @param[out] error
17624  *   Perform verbose error reporting if not NULL. Initialized in case of
17625  *   error only.
17626  *
17627  * @return
17628  *   how many contexts get in success, otherwise negative errno value.
17629  *   if nb_contexts is 0, return the amount of all aged contexts.
17630  *   if nb_contexts is not 0 , return the amount of aged flows reported
17631  *   in the context array.
17632  * @note: only stub for now
17633  */
17634 static int
17635 flow_dv_get_aged_flows(struct rte_eth_dev *dev,
17636                     void **context,
17637                     uint32_t nb_contexts,
17638                     struct rte_flow_error *error)
17639 {
17640         struct mlx5_priv *priv = dev->data->dev_private;
17641         struct mlx5_age_info *age_info;
17642         struct mlx5_age_param *age_param;
17643         struct mlx5_flow_counter *counter;
17644         struct mlx5_aso_age_action *act;
17645         int nb_flows = 0;
17646
17647         if (nb_contexts && !context)
17648                 return rte_flow_error_set(error, EINVAL,
17649                                           RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17650                                           NULL, "empty context");
17651         age_info = GET_PORT_AGE_INFO(priv);
17652         rte_spinlock_lock(&age_info->aged_sl);
17653         LIST_FOREACH(act, &age_info->aged_aso, next) {
17654                 nb_flows++;
17655                 if (nb_contexts) {
17656                         context[nb_flows - 1] =
17657                                                 act->age_params.context;
17658                         if (!(--nb_contexts))
17659                                 break;
17660                 }
17661         }
17662         TAILQ_FOREACH(counter, &age_info->aged_counters, next) {
17663                 nb_flows++;
17664                 if (nb_contexts) {
17665                         age_param = MLX5_CNT_TO_AGE(counter);
17666                         context[nb_flows - 1] = age_param->context;
17667                         if (!(--nb_contexts))
17668                                 break;
17669                 }
17670         }
17671         rte_spinlock_unlock(&age_info->aged_sl);
17672         MLX5_AGE_SET(age_info, MLX5_AGE_TRIGGER);
17673         return nb_flows;
17674 }
17675
17676 /*
17677  * Mutex-protected thunk to lock-free flow_dv_counter_alloc().
17678  */
17679 static uint32_t
17680 flow_dv_counter_allocate(struct rte_eth_dev *dev)
17681 {
17682         return flow_dv_counter_alloc(dev, 0);
17683 }
17684
17685 /**
17686  * Validate indirect action.
17687  * Dispatcher for action type specific validation.
17688  *
17689  * @param[in] dev
17690  *   Pointer to the Ethernet device structure.
17691  * @param[in] conf
17692  *   Indirect action configuration.
17693  * @param[in] action
17694  *   The indirect action object to validate.
17695  * @param[out] error
17696  *   Perform verbose error reporting if not NULL. Initialized in case of
17697  *   error only.
17698  *
17699  * @return
17700  *   0 on success, otherwise negative errno value.
17701  */
17702 int
17703 flow_dv_action_validate(struct rte_eth_dev *dev,
17704                         const struct rte_flow_indir_action_conf *conf,
17705                         const struct rte_flow_action *action,
17706                         struct rte_flow_error *err)
17707 {
17708         struct mlx5_priv *priv = dev->data->dev_private;
17709
17710         RTE_SET_USED(conf);
17711         switch (action->type) {
17712         case RTE_FLOW_ACTION_TYPE_RSS:
17713                 /*
17714                  * priv->obj_ops is set according to driver capabilities.
17715                  * When DevX capabilities are
17716                  * sufficient, it is set to devx_obj_ops.
17717                  * Otherwise, it is set to ibv_obj_ops.
17718                  * ibv_obj_ops doesn't support ind_table_modify operation.
17719                  * In this case the indirect RSS action can't be used.
17720                  */
17721                 if (priv->obj_ops.ind_table_modify == NULL)
17722                         return rte_flow_error_set
17723                                         (err, ENOTSUP,
17724                                          RTE_FLOW_ERROR_TYPE_ACTION,
17725                                          NULL,
17726                                          "Indirect RSS action not supported");
17727                 return mlx5_validate_action_rss(dev, action, err);
17728         case RTE_FLOW_ACTION_TYPE_AGE:
17729                 if (!priv->sh->aso_age_mng)
17730                         return rte_flow_error_set(err, ENOTSUP,
17731                                                 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
17732                                                 NULL,
17733                                                 "Indirect age action not supported");
17734                 return flow_dv_validate_action_age(0, action, dev, err);
17735         case RTE_FLOW_ACTION_TYPE_COUNT:
17736                 return flow_dv_validate_action_count(dev, true, 0, NULL, err);
17737         case RTE_FLOW_ACTION_TYPE_CONNTRACK:
17738                 if (!priv->sh->ct_aso_en)
17739                         return rte_flow_error_set(err, ENOTSUP,
17740                                         RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
17741                                         "ASO CT is not supported");
17742                 return mlx5_validate_action_ct(dev, action->conf, err);
17743         default:
17744                 return rte_flow_error_set(err, ENOTSUP,
17745                                           RTE_FLOW_ERROR_TYPE_ACTION,
17746                                           NULL,
17747                                           "action type not supported");
17748         }
17749 }
17750
17751 /*
17752  * Check if the RSS configurations for colors of a meter policy match
17753  * each other, except the queues.
17754  *
17755  * @param[in] r1
17756  *   Pointer to the first RSS flow action.
17757  * @param[in] r2
17758  *   Pointer to the second RSS flow action.
17759  *
17760  * @return
17761  *   0 on match, 1 on conflict.
17762  */
17763 static inline int
17764 flow_dv_mtr_policy_rss_compare(const struct rte_flow_action_rss *r1,
17765                                const struct rte_flow_action_rss *r2)
17766 {
17767         if (r1 == NULL || r2 == NULL)
17768                 return 0;
17769         if (!(r1->level <= 1 && r2->level <= 1) &&
17770             !(r1->level > 1 && r2->level > 1))
17771                 return 1;
17772         if (r1->types != r2->types &&
17773             !((r1->types == 0 || r1->types == RTE_ETH_RSS_IP) &&
17774               (r2->types == 0 || r2->types == RTE_ETH_RSS_IP)))
17775                 return 1;
17776         if (r1->key || r2->key) {
17777                 const void *key1 = r1->key ? r1->key : rss_hash_default_key;
17778                 const void *key2 = r2->key ? r2->key : rss_hash_default_key;
17779
17780                 if (memcmp(key1, key2, MLX5_RSS_HASH_KEY_LEN))
17781                         return 1;
17782         }
17783         return 0;
17784 }
17785
17786 /**
17787  * Validate the meter hierarchy chain for meter policy.
17788  *
17789  * @param[in] dev
17790  *   Pointer to the Ethernet device structure.
17791  * @param[in] meter_id
17792  *   Meter id.
17793  * @param[in] action_flags
17794  *   Holds the actions detected until now.
17795  * @param[out] is_rss
17796  *   Is RSS or not.
17797  * @param[out] hierarchy_domain
17798  *   The domain bitmap for hierarchy policy.
17799  * @param[out] error
17800  *   Perform verbose error reporting if not NULL. Initialized in case of
17801  *   error only.
17802  *
17803  * @return
17804  *   0 on success, otherwise negative errno value with error set.
17805  */
17806 static int
17807 flow_dv_validate_policy_mtr_hierarchy(struct rte_eth_dev *dev,
17808                                   uint32_t meter_id,
17809                                   uint64_t action_flags,
17810                                   bool *is_rss,
17811                                   uint8_t *hierarchy_domain,
17812                                   struct rte_mtr_error *error)
17813 {
17814         struct mlx5_priv *priv = dev->data->dev_private;
17815         struct mlx5_flow_meter_info *fm;
17816         struct mlx5_flow_meter_policy *policy;
17817         uint8_t cnt = 1;
17818
17819         if (action_flags & (MLX5_FLOW_FATE_ACTIONS |
17820                             MLX5_FLOW_FATE_ESWITCH_ACTIONS))
17821                 return -rte_mtr_error_set(error, EINVAL,
17822                                         RTE_MTR_ERROR_TYPE_POLICER_ACTION_GREEN,
17823                                         NULL,
17824                                         "Multiple fate actions not supported.");
17825         *hierarchy_domain = 0;
17826         while (true) {
17827                 fm = mlx5_flow_meter_find(priv, meter_id, NULL);
17828                 if (!fm)
17829                         return -rte_mtr_error_set(error, EINVAL,
17830                                                 RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17831                                         "Meter not found in meter hierarchy.");
17832                 if (fm->def_policy)
17833                         return -rte_mtr_error_set(error, EINVAL,
17834                                         RTE_MTR_ERROR_TYPE_MTR_ID, NULL,
17835                         "Non termination meter not supported in hierarchy.");
17836                 policy = mlx5_flow_meter_policy_find(dev, fm->policy_id, NULL);
17837                 MLX5_ASSERT(policy);
17838                 /**
17839                  * Only inherit the supported domains of the first meter in
17840                  * hierarchy.
17841                  * One meter supports at least one domain.
17842                  */
17843                 if (!*hierarchy_domain) {
17844                         if (policy->transfer)
17845                                 *hierarchy_domain |=
17846                                                 MLX5_MTR_DOMAIN_TRANSFER_BIT;
17847                         if (policy->ingress)
17848                                 *hierarchy_domain |=
17849                                                 MLX5_MTR_DOMAIN_INGRESS_BIT;
17850                         if (policy->egress)
17851                                 *hierarchy_domain |= MLX5_MTR_DOMAIN_EGRESS_BIT;
17852                 }
17853                 if (!policy->is_hierarchy) {
17854                         *is_rss = policy->is_rss;
17855                         break;
17856                 }
17857                 meter_id = policy->act_cnt[RTE_COLOR_GREEN].next_mtr_id;
17858                 if (++cnt >= MLX5_MTR_CHAIN_MAX_NUM)
17859                         return -rte_mtr_error_set(error, EINVAL,
17860                                         RTE_MTR_ERROR_TYPE_METER_POLICY, NULL,
17861                                         "Exceed max hierarchy meter number.");
17862         }
17863         return 0;
17864 }
17865
17866 /**
17867  * Validate meter policy actions.
17868  * Dispatcher for action type specific validation.
17869  *
17870  * @param[in] dev
17871  *   Pointer to the Ethernet device structure.
17872  * @param[in] action
17873  *   The meter policy action object to validate.
17874  * @param[in] attr
17875  *   Attributes of flow to determine steering domain.
17876  * @param[out] error
17877  *   Perform verbose error reporting if not NULL. Initialized in case of
17878  *   error only.
17879  *
17880  * @return
17881  *   0 on success, otherwise negative errno value.
17882  */
17883 static int
17884 flow_dv_validate_mtr_policy_acts(struct rte_eth_dev *dev,
17885                         const struct rte_flow_action *actions[RTE_COLORS],
17886                         struct rte_flow_attr *attr,
17887                         bool *is_rss,
17888                         uint8_t *domain_bitmap,
17889                         uint8_t *policy_mode,
17890                         struct rte_mtr_error *error)
17891 {
17892         struct mlx5_priv *priv = dev->data->dev_private;
17893         struct mlx5_sh_config *dev_conf = &priv->sh->config;
17894         const struct rte_flow_action *act;
17895         uint64_t action_flags[RTE_COLORS] = {0};
17896         int actions_n;
17897         int i, ret;
17898         struct rte_flow_error flow_err;
17899         uint8_t domain_color[RTE_COLORS] = {0};
17900         uint8_t def_domain = MLX5_MTR_ALL_DOMAIN_BIT;
17901         uint8_t hierarchy_domain = 0;
17902         const struct rte_flow_action_meter *mtr;
17903         bool def_green = false;
17904         bool def_yellow = false;
17905         const struct rte_flow_action_rss *rss_color[RTE_COLORS] = {NULL};
17906
17907         if (!dev_conf->dv_esw_en)
17908                 def_domain &= ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
17909         *domain_bitmap = def_domain;
17910         /* Red color could only support DROP action. */
17911         if (!actions[RTE_COLOR_RED] ||
17912             actions[RTE_COLOR_RED]->type != RTE_FLOW_ACTION_TYPE_DROP)
17913                 return -rte_mtr_error_set(error, ENOTSUP,
17914                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
17915                                 NULL, "Red color only supports drop action.");
17916         /*
17917          * Check default policy actions:
17918          * Green / Yellow: no action, Red: drop action
17919          * Either G or Y will trigger default policy actions to be created.
17920          */
17921         if (!actions[RTE_COLOR_GREEN] ||
17922             actions[RTE_COLOR_GREEN]->type == RTE_FLOW_ACTION_TYPE_END)
17923                 def_green = true;
17924         if (!actions[RTE_COLOR_YELLOW] ||
17925             actions[RTE_COLOR_YELLOW]->type == RTE_FLOW_ACTION_TYPE_END)
17926                 def_yellow = true;
17927         if (def_green && def_yellow) {
17928                 *policy_mode = MLX5_MTR_POLICY_MODE_DEF;
17929                 return 0;
17930         } else if (!def_green && def_yellow) {
17931                 *policy_mode = MLX5_MTR_POLICY_MODE_OG;
17932         } else if (def_green && !def_yellow) {
17933                 *policy_mode = MLX5_MTR_POLICY_MODE_OY;
17934         } else {
17935                 *policy_mode = MLX5_MTR_POLICY_MODE_ALL;
17936         }
17937         /* Set to empty string in case of NULL pointer access by user. */
17938         flow_err.message = "";
17939         for (i = 0; i < RTE_COLORS; i++) {
17940                 act = actions[i];
17941                 for (action_flags[i] = 0, actions_n = 0;
17942                      act && act->type != RTE_FLOW_ACTION_TYPE_END;
17943                      act++) {
17944                         if (actions_n == MLX5_DV_MAX_NUMBER_OF_ACTIONS)
17945                                 return -rte_mtr_error_set(error, ENOTSUP,
17946                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
17947                                           NULL, "too many actions");
17948                         switch (act->type) {
17949                         case RTE_FLOW_ACTION_TYPE_PORT_ID:
17950                         case RTE_FLOW_ACTION_TYPE_REPRESENTED_PORT:
17951                                 if (!dev_conf->dv_esw_en)
17952                                         return -rte_mtr_error_set(error,
17953                                         ENOTSUP,
17954                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17955                                         NULL, "PORT action validate check"
17956                                         " fail for ESW disable");
17957                                 ret = flow_dv_validate_action_port_id(dev,
17958                                                 action_flags[i],
17959                                                 act, attr, &flow_err);
17960                                 if (ret)
17961                                         return -rte_mtr_error_set(error,
17962                                         ENOTSUP,
17963                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17964                                         NULL, flow_err.message ?
17965                                         flow_err.message :
17966                                         "PORT action validate check fail");
17967                                 ++actions_n;
17968                                 action_flags[i] |= MLX5_FLOW_ACTION_PORT_ID;
17969                                 break;
17970                         case RTE_FLOW_ACTION_TYPE_MARK:
17971                                 ret = flow_dv_validate_action_mark(dev, act,
17972                                                            action_flags[i],
17973                                                            attr, &flow_err);
17974                                 if (ret < 0)
17975                                         return -rte_mtr_error_set(error,
17976                                         ENOTSUP,
17977                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17978                                         NULL, flow_err.message ?
17979                                         flow_err.message :
17980                                         "Mark action validate check fail");
17981                                 if (dev_conf->dv_xmeta_en !=
17982                                         MLX5_XMETA_MODE_LEGACY)
17983                                         return -rte_mtr_error_set(error,
17984                                         ENOTSUP,
17985                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
17986                                         NULL, "Extend MARK action is "
17987                                         "not supported. Please try use "
17988                                         "default policy for meter.");
17989                                 action_flags[i] |= MLX5_FLOW_ACTION_MARK;
17990                                 ++actions_n;
17991                                 break;
17992                         case RTE_FLOW_ACTION_TYPE_SET_TAG:
17993                                 ret = flow_dv_validate_action_set_tag(dev,
17994                                                         act, action_flags[i],
17995                                                         attr, &flow_err);
17996                                 if (ret)
17997                                         return -rte_mtr_error_set(error,
17998                                         ENOTSUP,
17999                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18000                                         NULL, flow_err.message ?
18001                                         flow_err.message :
18002                                         "Set tag action validate check fail");
18003                                 action_flags[i] |= MLX5_FLOW_ACTION_SET_TAG;
18004                                 ++actions_n;
18005                                 break;
18006                         case RTE_FLOW_ACTION_TYPE_DROP:
18007                                 ret = mlx5_flow_validate_action_drop
18008                                         (action_flags[i], attr, &flow_err);
18009                                 if (ret < 0)
18010                                         return -rte_mtr_error_set(error,
18011                                         ENOTSUP,
18012                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18013                                         NULL, flow_err.message ?
18014                                         flow_err.message :
18015                                         "Drop action validate check fail");
18016                                 action_flags[i] |= MLX5_FLOW_ACTION_DROP;
18017                                 ++actions_n;
18018                                 break;
18019                         case RTE_FLOW_ACTION_TYPE_QUEUE:
18020                                 /*
18021                                  * Check whether extensive
18022                                  * metadata feature is engaged.
18023                                  */
18024                                 if (dev_conf->dv_flow_en &&
18025                                     (dev_conf->dv_xmeta_en !=
18026                                      MLX5_XMETA_MODE_LEGACY) &&
18027                                     mlx5_flow_ext_mreg_supported(dev))
18028                                         return -rte_mtr_error_set(error,
18029                                           ENOTSUP,
18030                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18031                                           NULL, "Queue action with meta "
18032                                           "is not supported. Please try use "
18033                                           "default policy for meter.");
18034                                 ret = mlx5_flow_validate_action_queue(act,
18035                                                         action_flags[i], dev,
18036                                                         attr, &flow_err);
18037                                 if (ret < 0)
18038                                         return -rte_mtr_error_set(error,
18039                                           ENOTSUP,
18040                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18041                                           NULL, flow_err.message ?
18042                                           flow_err.message :
18043                                           "Queue action validate check fail");
18044                                 action_flags[i] |= MLX5_FLOW_ACTION_QUEUE;
18045                                 ++actions_n;
18046                                 break;
18047                         case RTE_FLOW_ACTION_TYPE_RSS:
18048                                 if (dev_conf->dv_flow_en &&
18049                                     (dev_conf->dv_xmeta_en !=
18050                                      MLX5_XMETA_MODE_LEGACY) &&
18051                                     mlx5_flow_ext_mreg_supported(dev))
18052                                         return -rte_mtr_error_set(error,
18053                                           ENOTSUP,
18054                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18055                                           NULL, "RSS action with meta "
18056                                           "is not supported. Please try use "
18057                                           "default policy for meter.");
18058                                 ret = mlx5_validate_action_rss(dev, act,
18059                                                                &flow_err);
18060                                 if (ret < 0)
18061                                         return -rte_mtr_error_set(error,
18062                                           ENOTSUP,
18063                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18064                                           NULL, flow_err.message ?
18065                                           flow_err.message :
18066                                           "RSS action validate check fail");
18067                                 action_flags[i] |= MLX5_FLOW_ACTION_RSS;
18068                                 ++actions_n;
18069                                 /* Either G or Y will set the RSS. */
18070                                 rss_color[i] = act->conf;
18071                                 break;
18072                         case RTE_FLOW_ACTION_TYPE_JUMP:
18073                                 ret = flow_dv_validate_action_jump(dev,
18074                                         NULL, act, action_flags[i],
18075                                         attr, true, &flow_err);
18076                                 if (ret)
18077                                         return -rte_mtr_error_set(error,
18078                                           ENOTSUP,
18079                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18080                                           NULL, flow_err.message ?
18081                                           flow_err.message :
18082                                           "Jump action validate check fail");
18083                                 ++actions_n;
18084                                 action_flags[i] |= MLX5_FLOW_ACTION_JUMP;
18085                                 break;
18086                         /*
18087                          * Only the last meter in the hierarchy will support
18088                          * the YELLOW color steering. Then in the meter policy
18089                          * actions list, there should be no other meter inside.
18090                          */
18091                         case RTE_FLOW_ACTION_TYPE_METER:
18092                                 if (i != RTE_COLOR_GREEN)
18093                                         return -rte_mtr_error_set(error,
18094                                                 ENOTSUP,
18095                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18096                                                 NULL,
18097                                                 "Meter hierarchy only supports GREEN color.");
18098                                 if (*policy_mode != MLX5_MTR_POLICY_MODE_OG)
18099                                         return -rte_mtr_error_set(error,
18100                                                 ENOTSUP,
18101                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18102                                                 NULL,
18103                                                 "No yellow policy should be provided in meter hierarchy.");
18104                                 mtr = act->conf;
18105                                 ret = flow_dv_validate_policy_mtr_hierarchy(dev,
18106                                                         mtr->mtr_id,
18107                                                         action_flags[i],
18108                                                         is_rss,
18109                                                         &hierarchy_domain,
18110                                                         error);
18111                                 if (ret)
18112                                         return ret;
18113                                 ++actions_n;
18114                                 action_flags[i] |=
18115                                 MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY;
18116                                 break;
18117                         default:
18118                                 return -rte_mtr_error_set(error, ENOTSUP,
18119                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18120                                         NULL,
18121                                         "Doesn't support optional action");
18122                         }
18123                 }
18124                 if (action_flags[i] & MLX5_FLOW_ACTION_PORT_ID) {
18125                         domain_color[i] = MLX5_MTR_DOMAIN_TRANSFER_BIT;
18126                 } else if ((action_flags[i] &
18127                           (MLX5_FLOW_ACTION_RSS | MLX5_FLOW_ACTION_QUEUE)) ||
18128                           (action_flags[i] & MLX5_FLOW_ACTION_MARK)) {
18129                         /*
18130                          * Only support MLX5_XMETA_MODE_LEGACY
18131                          * so MARK action is only in ingress domain.
18132                          */
18133                         domain_color[i] = MLX5_MTR_DOMAIN_INGRESS_BIT;
18134                 } else {
18135                         domain_color[i] = def_domain;
18136                         if (action_flags[i] &&
18137                             !(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18138                                 domain_color[i] &=
18139                                 ~MLX5_MTR_DOMAIN_TRANSFER_BIT;
18140                 }
18141                 if (action_flags[i] &
18142                     MLX5_FLOW_ACTION_METER_WITH_TERMINATED_POLICY)
18143                         domain_color[i] &= hierarchy_domain;
18144                 /*
18145                  * Non-termination actions only support NIC Tx domain.
18146                  * The adjustion should be skipped when there is no
18147                  * action or only END is provided. The default domains
18148                  * bit-mask is set to find the MIN intersection.
18149                  * The action flags checking should also be skipped.
18150                  */
18151                 if ((def_green && i == RTE_COLOR_GREEN) ||
18152                     (def_yellow && i == RTE_COLOR_YELLOW))
18153                         continue;
18154                 /*
18155                  * Validate the drop action mutual exclusion
18156                  * with other actions. Drop action is mutually-exclusive
18157                  * with any other action, except for Count action.
18158                  */
18159                 if ((action_flags[i] & MLX5_FLOW_ACTION_DROP) &&
18160                     (action_flags[i] & ~MLX5_FLOW_ACTION_DROP)) {
18161                         return -rte_mtr_error_set(error, ENOTSUP,
18162                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18163                                 NULL, "Drop action is mutually-exclusive "
18164                                 "with any other action");
18165                 }
18166                 /* Eswitch has few restrictions on using items and actions */
18167                 if (domain_color[i] & MLX5_MTR_DOMAIN_TRANSFER_BIT) {
18168                         if (!mlx5_flow_ext_mreg_supported(dev) &&
18169                             action_flags[i] & MLX5_FLOW_ACTION_MARK)
18170                                 return -rte_mtr_error_set(error, ENOTSUP,
18171                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18172                                         NULL, "unsupported action MARK");
18173                         if (action_flags[i] & MLX5_FLOW_ACTION_QUEUE)
18174                                 return -rte_mtr_error_set(error, ENOTSUP,
18175                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18176                                         NULL, "unsupported action QUEUE");
18177                         if (action_flags[i] & MLX5_FLOW_ACTION_RSS)
18178                                 return -rte_mtr_error_set(error, ENOTSUP,
18179                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18180                                         NULL, "unsupported action RSS");
18181                         if (!(action_flags[i] & MLX5_FLOW_FATE_ESWITCH_ACTIONS))
18182                                 return -rte_mtr_error_set(error, ENOTSUP,
18183                                         RTE_MTR_ERROR_TYPE_METER_POLICY,
18184                                         NULL, "no fate action is found");
18185                 } else {
18186                         if (!(action_flags[i] & MLX5_FLOW_FATE_ACTIONS) &&
18187                             (domain_color[i] & MLX5_MTR_DOMAIN_INGRESS_BIT)) {
18188                                 if ((domain_color[i] &
18189                                      MLX5_MTR_DOMAIN_EGRESS_BIT))
18190                                         domain_color[i] =
18191                                                 MLX5_MTR_DOMAIN_EGRESS_BIT;
18192                                 else
18193                                         return -rte_mtr_error_set(error,
18194                                                 ENOTSUP,
18195                                                 RTE_MTR_ERROR_TYPE_METER_POLICY,
18196                                                 NULL,
18197                                                 "no fate action is found");
18198                         }
18199                 }
18200         }
18201         /* If both colors have RSS, the attributes should be the same. */
18202         if (flow_dv_mtr_policy_rss_compare(rss_color[RTE_COLOR_GREEN],
18203                                            rss_color[RTE_COLOR_YELLOW]))
18204                 return -rte_mtr_error_set(error, EINVAL,
18205                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18206                                           NULL, "policy RSS attr conflict");
18207         if (rss_color[RTE_COLOR_GREEN] || rss_color[RTE_COLOR_YELLOW])
18208                 *is_rss = true;
18209         /* "domain_color[C]" is non-zero for each color, default is ALL. */
18210         if (!def_green && !def_yellow &&
18211             domain_color[RTE_COLOR_GREEN] != domain_color[RTE_COLOR_YELLOW] &&
18212             !(action_flags[RTE_COLOR_GREEN] & MLX5_FLOW_ACTION_DROP) &&
18213             !(action_flags[RTE_COLOR_YELLOW] & MLX5_FLOW_ACTION_DROP))
18214                 return -rte_mtr_error_set(error, EINVAL,
18215                                           RTE_MTR_ERROR_TYPE_METER_POLICY,
18216                                           NULL, "policy domains conflict");
18217         /*
18218          * At least one color policy is listed in the actions, the domains
18219          * to be supported should be the intersection.
18220          */
18221         *domain_bitmap = domain_color[RTE_COLOR_GREEN] &
18222                          domain_color[RTE_COLOR_YELLOW];
18223         return 0;
18224 }
18225
18226 static int
18227 flow_dv_sync_domain(struct rte_eth_dev *dev, uint32_t domains, uint32_t flags)
18228 {
18229         struct mlx5_priv *priv = dev->data->dev_private;
18230         int ret = 0;
18231
18232         if ((domains & MLX5_DOMAIN_BIT_NIC_RX) && priv->sh->rx_domain != NULL) {
18233                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->rx_domain,
18234                                                 flags);
18235                 if (ret != 0)
18236                         return ret;
18237         }
18238         if ((domains & MLX5_DOMAIN_BIT_NIC_TX) && priv->sh->tx_domain != NULL) {
18239                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->tx_domain, flags);
18240                 if (ret != 0)
18241                         return ret;
18242         }
18243         if ((domains & MLX5_DOMAIN_BIT_FDB) && priv->sh->fdb_domain != NULL) {
18244                 ret = mlx5_os_flow_dr_sync_domain(priv->sh->fdb_domain, flags);
18245                 if (ret != 0)
18246                         return ret;
18247         }
18248         return 0;
18249 }
18250
18251 /**
18252  * Discover the number of available flow priorities
18253  * by trying to create a flow with the highest priority value
18254  * for each possible number.
18255  *
18256  * @param[in] dev
18257  *   Ethernet device.
18258  * @param[in] vprio
18259  *   List of possible number of available priorities.
18260  * @param[in] vprio_n
18261  *   Size of @p vprio array.
18262  * @return
18263  *   On success, number of available flow priorities.
18264  *   On failure, a negative errno-style code and rte_errno is set.
18265  */
18266 static int
18267 flow_dv_discover_priorities(struct rte_eth_dev *dev,
18268                             const uint16_t *vprio, int vprio_n)
18269 {
18270         struct mlx5_priv *priv = dev->data->dev_private;
18271         struct mlx5_indexed_pool *pool = priv->sh->ipool[MLX5_IPOOL_MLX5_FLOW];
18272         struct rte_flow_item_eth eth;
18273         struct rte_flow_item item = {
18274                 .type = RTE_FLOW_ITEM_TYPE_ETH,
18275                 .spec = &eth,
18276                 .mask = &eth,
18277         };
18278         struct mlx5_flow_dv_matcher matcher = {
18279                 .mask = {
18280                         .size = sizeof(matcher.mask.buf),
18281                 },
18282         };
18283         union mlx5_flow_tbl_key tbl_key;
18284         struct mlx5_flow flow;
18285         void *action;
18286         struct rte_flow_error error;
18287         uint8_t misc_mask;
18288         int i, err, ret = -ENOTSUP;
18289
18290         /*
18291          * Prepare a flow with a catch-all pattern and a drop action.
18292          * Use drop queue, because shared drop action may be unavailable.
18293          */
18294         action = priv->drop_queue.hrxq->action;
18295         if (action == NULL) {
18296                 DRV_LOG(ERR, "Priority discovery requires a drop action");
18297                 rte_errno = ENOTSUP;
18298                 return -rte_errno;
18299         }
18300         memset(&flow, 0, sizeof(flow));
18301         flow.handle = mlx5_ipool_zmalloc(pool, &flow.handle_idx);
18302         if (flow.handle == NULL) {
18303                 DRV_LOG(ERR, "Cannot create flow handle");
18304                 rte_errno = ENOMEM;
18305                 return -rte_errno;
18306         }
18307         flow.ingress = true;
18308         flow.dv.value.size = MLX5_ST_SZ_BYTES(fte_match_param);
18309         flow.dv.actions[0] = action;
18310         flow.dv.actions_n = 1;
18311         memset(&eth, 0, sizeof(eth));
18312         flow_dv_translate_item_eth(matcher.mask.buf, flow.dv.value.buf,
18313                                    &item, /* inner */ false, /* group */ 0);
18314         matcher.crc = rte_raw_cksum(matcher.mask.buf, matcher.mask.size);
18315         for (i = 0; i < vprio_n; i++) {
18316                 /* Configure the next proposed maximum priority. */
18317                 matcher.priority = vprio[i] - 1;
18318                 memset(&tbl_key, 0, sizeof(tbl_key));
18319                 err = flow_dv_matcher_register(dev, &matcher, &tbl_key, &flow,
18320                                                /* tunnel */ NULL,
18321                                                /* group */ 0,
18322                                                &error);
18323                 if (err != 0) {
18324                         /* This action is pure SW and must always succeed. */
18325                         DRV_LOG(ERR, "Cannot register matcher");
18326                         ret = -rte_errno;
18327                         break;
18328                 }
18329                 /* Try to apply the flow to HW. */
18330                 misc_mask = flow_dv_matcher_enable(flow.dv.value.buf);
18331                 __flow_dv_adjust_buf_size(&flow.dv.value.size, misc_mask);
18332                 err = mlx5_flow_os_create_flow
18333                                 (flow.handle->dvh.matcher->matcher_object,
18334                                  (void *)&flow.dv.value, flow.dv.actions_n,
18335                                  flow.dv.actions, &flow.handle->drv_flow);
18336                 if (err == 0) {
18337                         claim_zero(mlx5_flow_os_destroy_flow
18338                                                 (flow.handle->drv_flow));
18339                         flow.handle->drv_flow = NULL;
18340                 }
18341                 claim_zero(flow_dv_matcher_release(dev, flow.handle));
18342                 if (err != 0)
18343                         break;
18344                 ret = vprio[i];
18345         }
18346         mlx5_ipool_free(pool, flow.handle_idx);
18347         /* Set rte_errno if no expected priority value matched. */
18348         if (ret < 0)
18349                 rte_errno = -ret;
18350         return ret;
18351 }
18352
18353 const struct mlx5_flow_driver_ops mlx5_flow_dv_drv_ops = {
18354         .validate = flow_dv_validate,
18355         .prepare = flow_dv_prepare,
18356         .translate = flow_dv_translate,
18357         .apply = flow_dv_apply,
18358         .remove = flow_dv_remove,
18359         .destroy = flow_dv_destroy,
18360         .query = flow_dv_query,
18361         .create_mtr_tbls = flow_dv_create_mtr_tbls,
18362         .destroy_mtr_tbls = flow_dv_destroy_mtr_tbls,
18363         .destroy_mtr_drop_tbls = flow_dv_destroy_mtr_drop_tbls,
18364         .create_meter = flow_dv_mtr_alloc,
18365         .free_meter = flow_dv_aso_mtr_release_to_pool,
18366         .validate_mtr_acts = flow_dv_validate_mtr_policy_acts,
18367         .create_mtr_acts = flow_dv_create_mtr_policy_acts,
18368         .destroy_mtr_acts = flow_dv_destroy_mtr_policy_acts,
18369         .create_policy_rules = flow_dv_create_policy_rules,
18370         .destroy_policy_rules = flow_dv_destroy_policy_rules,
18371         .create_def_policy = flow_dv_create_def_policy,
18372         .destroy_def_policy = flow_dv_destroy_def_policy,
18373         .meter_sub_policy_rss_prepare = flow_dv_meter_sub_policy_rss_prepare,
18374         .meter_hierarchy_rule_create = flow_dv_meter_hierarchy_rule_create,
18375         .destroy_sub_policy_with_rxq = flow_dv_destroy_sub_policy_with_rxq,
18376         .counter_alloc = flow_dv_counter_allocate,
18377         .counter_free = flow_dv_counter_free,
18378         .counter_query = flow_dv_counter_query,
18379         .get_aged_flows = flow_dv_get_aged_flows,
18380         .action_validate = flow_dv_action_validate,
18381         .action_create = flow_dv_action_create,
18382         .action_destroy = flow_dv_action_destroy,
18383         .action_update = flow_dv_action_update,
18384         .action_query = flow_dv_action_query,
18385         .sync_domain = flow_dv_sync_domain,
18386         .discover_priorities = flow_dv_discover_priorities,
18387         .item_create = flow_dv_item_create,
18388         .item_release = flow_dv_item_release,
18389 };
18390
18391 #endif /* HAVE_IBV_FLOW_DV_SUPPORT */